72 Commits

Author SHA1 Message Date
98fcfdfec0 random changes i found on my laptop 2025-04-17 21:51:15 +02:00
f97daa8df3 Adapt to inverted SDC close 2023-08-04 23:00:31 +02:00
1e4e5a91aa Only close SDC if watchdog is OK 2023-08-03 16:40:42 +02:00
34611dac20 Reduce startup delay
The 5s discharge is managed via ABX/PDU
2023-08-03 16:11:09 +02:00
d1c2cc5d80 Fix mission LEDs 2023-08-03 16:05:40 +02:00
75b8039e96 Update bodges to fully remove latch and logic 2023-08-03 13:36:33 +02:00
18d02abf9d Fix bug where WDG wouldn't initialize if ASMS is turned on after SDCL bootup 2023-07-31 01:27:56 +02:00
3fedb7117b Disable Watchdog in manual mode 2023-05-31 16:42:07 +02:00
f9256860e8 Update bodge with actual wiring (was easier, AScSDC now inverted) 2023-05-28 12:59:18 +02:00
460578e359 Only close SDC once conditions are met
- Watchdog is initialized
- Potential discharge is completed (5s)
- Flag is set by ABX
2023-05-24 13:29:38 +02:00
1bc02e7f02 Add bodged PCB version with adapted code
- No SDC latching
- No TSOn needed to close SDC
2023-05-24 12:54:30 +02:00
86f688c0f7 Bootup animation for LED debugging + Freeze WDG when debugging 2023-05-19 22:04:33 +02:00
e46a75f99f No termination by default 2023-05-03 17:12:54 +02:00
0195578317 Start WD only after init period so messages are sent even if WD isn't petted 2023-05-03 17:12:12 +02:00
c6fedbd759 Oops filter was misconfigured 2023-05-03 14:29:03 +02:00
df13585c01 Debug.launch whatever 2023-05-03 14:28:49 +02:00
8f23be6be1 Add CAN Filter and Watchdog functionality, theoretically complete 2023-04-26 21:41:43 +02:00
933f9dd64b Harsware: Notes and integration fixes 2023-04-26 15:06:49 +02:00
fd5478a521 Firmware integration fixes 2023-04-26 15:06:03 +02:00
b20f63608d Update DBC 2023-04-26 15:05:11 +02:00
c11c0291c0 Add most core functionality, should be drivable 2023-04-19 15:57:53 +02:00
4a5bcc4046 DRC updates 2023-04-19 15:57:37 +02:00
946bd8e5a0 FT23 Firmware beginnings 2023-04-07 00:18:34 +02:00
6202a467b1 Add DBC 2023-04-06 23:15:27 +02:00
0a2fcb6d48 Update divider and use straight header on backside for SWD 2023-04-06 20:33:25 +02:00
41bdd1b31e Update dividers for 12V supply, convert to KiCAD 7 2023-02-23 14:19:18 +01:00
afebc5a0e5 Implement Feedback 2023-01-15 15:45:57 +01:00
d5f9805f04 Update image 2023-01-14 02:11:05 +01:00
ce231750f5 Rename layers for export 2023-01-14 01:55:40 +01:00
3a5a1f8454 Some cleanup, some upbeefing, and some dumb jokes 2023-01-14 01:48:25 +01:00
22e9f0f49a Forgot the DRC 2023-01-04 03:12:45 +01:00
bd4686d517 Add Button mounting socket springs for easier disassembly 2023-01-04 01:49:07 +01:00
f6575d5da8 Allow radial supply capacitors
and smoother curves in traces ;)
2023-01-03 19:57:11 +01:00
e8d86040e2 Remove BG, tune 2022-12-30 01:34:46 +01:00
5a148a0839 Replace README image 2022-12-30 01:25:16 +01:00
100be1c2f0 Replace WRL models with STEP for export 2022-12-30 00:33:14 +01:00
cad7391f7a c-c-c-cleanup? 2022-12-30 00:09:29 +01:00
3661a3a607 Update IOC with new STM32F302 pin assignments 2022-12-25 02:12:50 +01:00
7fd434e62c Read LV sense analog voltage
- Move to ADC pins
- Adjust voltage dividers
- Comments
- And an unrelated DRC fix :)
2022-12-25 01:56:40 +01:00
83098af6d2 Use available components 2022-12-21 21:49:16 +01:00
3e5600be3e it goes even cleaner‽‽‽ 2022-12-21 01:47:21 +01:00
36c7d810d1 Even more cleanup 2022-12-21 01:29:18 +01:00
71ebec061f More cleanup + vanity 2022-12-21 01:18:44 +01:00
06565ca7bd Clean up melty stuff 2022-12-21 00:43:15 +01:00
62bfe1788d M̷̬͓͂͋͜͝Ë̶̘́L̴͈͐̐T̵͔̠̅ ̴̦̂̕Ì̷̙͚̮͊͘T̴̛͕̙̠̋ 2022-12-20 15:55:06 +01:00
c9e51b935e Clean up DRC 2022-12-20 14:48:58 +01:00
e45fcf5388 Finish routing, cleanup, add Vdivs for SDC measurements 2022-12-20 01:00:30 +01:00
08c28cc214 Finish routing 2022-12-19 22:02:24 +01:00
eb3e35a57e Make ERC happy 2022-12-19 19:00:21 +01:00
590c34977d Preliminary routing 2022-12-19 02:34:10 +01:00
111b3f442c Add labels to jumpers 2022-12-16 02:08:33 +01:00
3fb3b43de2 PCB shape and placement 2022-12-16 01:52:29 +01:00
6ac906f030 Fixes and cleanup resulting from placement 2022-12-16 01:52:01 +01:00
18178ce121 Clean up and update symbols/footprints/3d 2022-12-16 01:51:48 +01:00
d19aff9e26 Assign Footprints 2022-12-15 18:36:53 +01:00
e71647b9d1 Add UCC bypass and PoR circuit to resolve #11 2022-12-15 17:59:32 +01:00
df11f72e76 Add voluntary ASB LED to resolve #14 2022-12-15 16:10:33 +01:00
a854e8010d Resolve #13 by adding backup AMI LEDs 2022-12-15 16:07:00 +01:00
711dde5a40 Use buffer to protect SCS from software faults when reading from uC
To satisfy rule EV 4.11.5

Resolves #4
Resolves #12
2022-11-25 23:45:50 +01:00
4eec043766 Add TVS to CAN filter stage 2022-11-25 22:09:42 +01:00
693ae95ee9 Update README with new functions 2022-11-24 11:59:23 +01:00
cf3444ff5f Add licensing information 2022-11-24 11:45:17 +01:00
255aa0b50b Remove voltage divider by default bc dashboard sends defined 3V3 signal 2022-11-24 11:25:10 +01:00
6ae68e2209 Fix #9 by moving LED to 12V SDC in signal 2022-11-24 01:07:11 +01:00
ca92b5a729 Add 4 buttons, ASMS input, move pulls/dividers around
Resolves #5
Resolves #6
Resolves #8
2022-11-24 01:00:13 +01:00
65f5d0307e Resolve #7 by using simpler CAN filtering
According to [Podio](https://podio.com/fasttubede/modulubergreifend/apps/tech-tutorials/items/53)
2022-11-23 23:21:52 +01:00
31258b754a Resolve #3 by moving essential signals to GPIO bank A 2022-11-23 23:15:36 +01:00
6938437d3f Resolve #2 by using standard header
According to [Podio](https://podio.com/fasttubede/modulubergreifend/apps/tech-tutorials/items/52)
2022-11-23 23:12:52 +01:00
6562cae6da Solve #1 by using a 20V capable LDO from our inventory 2022-11-23 23:05:09 +01:00
ae2f0c8442 Update and extend README 2022-11-16 12:59:40 +01:00
b7762f40e2 Convert to KiCAD 6 2022-11-16 12:37:18 +01:00
4b658d4176 Don't commit backups 2022-11-16 12:18:55 +01:00
82 changed files with 76293 additions and 34723 deletions

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GNU GENERAL PUBLIC LICENSE
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This program comes with ABSOLUTELY NO WARRANTY; for details type `show w'.
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<https://www.gnu.org/licenses/why-not-lgpl.html>.

View File

@ -1,5 +1,24 @@
# SDCL
Shutdown Circuit Logic
Allows for the AS to control SDC closure/opening under certain circumstances using hard-wired logic.
Shutdown Circuit Logic
The Shutdown Circuit Logic (SDCL) PCB has 6 functions:
1. To guarantee only one of the TS activation buttons can start the TS, depending on the current Mission and ASMS state according to T 14.5.1
2. To supervise the EBS monitoring running on the ECU/Autobox using a hardware watchdog. This fulfills T 15.3.2 / T 15.3.4 by immediately triggering the Shutdown Circuit (SDC) if an error occurs within the EBS monitoring or the SDCL communication while in autonomous mode.
3. To facilitate Autonomous System (AS) control over the final closing of the Shutdown Circuit (SDC) when activating the Tractive System (TS) and reopening it upon AS emergencies (T 15.3.5), while strictly prohibiting re-closing of the SDC using hard-wired logic (EV 4.11.5).
4. To indicate the currently chosen Mission in accordance with T 14.11.3-4 and allow changing it.
5. To embed all sidepanel buttons on one rigid, evenly spaced surface
6. To indicate ASB errors
It therefore sits in the last spot before the TSMS in the SDC and is also the link between the TS activation buttons on dashboard and sidepanel and the ECU/Autobox.
In combination with the PDU and the ECU/Autobox, the SDCL fulfills the (electrical) functionality described in the [FSG21 EBS reference design](https://www.formulastudent.de/fileadmin/user_upload/FSG21_EBS_Reference_Design.pdf). This functionality is safety critical and must be shown in the ASF.
![](SDCL.png)
# Licensing
The Project's Hardware is licensed under the CERN OHL v1.2, see [LICENSE_HARDWARE.txt](LICENSE_HARDWARE.txt)
The Project's Software is licensed under the GNU GPL v3, see [LICENSE_SOFTWARE.txt](LICENSE_SOFTWARE.txt)

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@ -0,0 +1,502 @@
VERSION ""
NS_ :
NS_DESC_
CM_
BA_DEF_
BA_
VAL_
CAT_DEF_
CAT_
FILTER
BA_DEF_DEF_
EV_DATA_
ENVVAR_DATA_
SGTYPE_
SGTYPE_VAL_
BA_DEF_SGTYPE_
BA_SGTYPE_
SIG_TYPE_REF_
VAL_TABLE_
SIG_GROUP_
SIG_VALTYPE_
SIGTYPE_VALTYPE_
BO_TX_BU_
BA_DEF_REL_
BA_REL_
BA_DEF_DEF_REL_
BU_SG_REL_
BU_EV_REL_
BU_BO_REL_
SG_MUL_VAL_
BS_:
BU_: SSU TTS_4 TTS_3 TTS_2 TTS_1 Shunt AMS ABX SDCL PDU PDMV XSens STW EPSC
BO_ 3221225472 VECTOR__INDEPENDENT_SIG_MSG: 0 Vector__XXX
SG_ STW_debugMode : 0|1@1+ (1,0) [0|1] "" Vector__XXX
BO_ 302 Vector_Logging_3: 8 ABX
BO_ 301 Vector_Logging_2: 4 ABX
SG_ Logging_Wheelspeed_RR : 24|8@1- (1,0) [-128|127] "/s" Vector__XXX
SG_ Logging_Wheelspeed_RL : 16|8@1- (1,0) [-128|127] "/s" Vector__XXX
SG_ Logging_Wheelspeed_FR : 8|8@1- (1,0) [-128|127] "/s" Vector__XXX
SG_ Logging_Wheelspeed_FL : 0|8@1- (1,0) [-128|127] "/s" Vector__XXX
BO_ 300 Vector_Logging_1: 8 ABX
SG_ Logging_Velocity : 0|16@1- (1,0) [-32768|32767] "km/h" Vector__XXX
BO_ 1026 STW_Param_Set: 5 STW
SG_ STW_Param_BBal m0 : 15|32@0+ (0.1,0) [0|0] "" Vector__XXX
SG_ STW_Param_Type M : 0|8@1+ (1,0) [0|0] "" Vector__XXX
SG_ STW_Param_SLIPREF m1 : 15|32@0+ (0.01,0) [0|1] "" Vector__XXX
SG_ STW_Param_ASRP m3 : 15|32@0+ (1,0) [0|1] "" Vector__XXX
SG_ STW_Param_ASRON m4 : 15|32@0+ (1,0) [0|1] "" Vector__XXX
SG_ STW_Param_Test1 m5 : 15|32@0+ (1,0) [0|1] "" Vector__XXX
SG_ STW_Param_Test2 m6 : 15|32@0+ (1,0) [0|1] "" Vector__XXX
SG_ STW_Param_Test3 m7 : 15|32@0+ (1,0) [0|1] "" Vector__XXX
SG_ STW_Param_Test4 m8 : 15|32@0+ (1,0) [0|1] "" Vector__XXX
SG_ STW_Param_MUMAX m2 : 15|32@0+ (0.1,0) [0|1] "" Vector__XXX
BO_ 20 AMS_SlaveStatus: 8 AMS
SG_ AMS_SlaveStatus_ID : 6|7@0+ (1,0) [0|0] "" Vector__XXX
SG_ AMS_SlaveStatus_Error : 7|1@0+ (1,0) [0|1] "" Vector__XXX
SG_ AMS_SlaveStatus_SoC : 15|8@0+ (1,0) [0|1] "%" Vector__XXX
SG_ AMS_SlaveStatus_MinCellVolt : 23|16@0+ (0.0001,0) [0|1] "V" Vector__XXX
SG_ AMS_SlaveStatus_MaxCellVolt : 39|16@0+ (0.0001,0) [0|1] "V" Vector__XXX
SG_ AMS_SlaveStatus_MaxTemp : 51|12@0- (0.0625,0) [0|1] "degC" Vector__XXX
BO_ 1280 SSU_Message: 8 SSU
SG_ SSU_Message : 0|64@1+ (1,0) [0|1.84467E+019] "" ABX
BO_ 1805 TTS_4_Message_2: 8 TTS_4
SG_ TTS_4_Message_2 : 0|64@1+ (1,0) [0|1.84467E+019] "" Vector__XXX
BO_ 1804 TTS_4_Message_1: 8 TTS_4
SG_ TTS_4_Message_1 : 0|64@1+ (1,0) [0|1.84467E+019] "" Vector__XXX
BO_ 1801 TTS_3_Message_2: 8 TTS_3
SG_ TTS_3_Message_2 : 0|64@1+ (1,0) [0|1.84467E+019] "" Vector__XXX
BO_ 1800 TTS_3_Message_1: 8 TTS_3
SG_ TTS_3_Message_1 : 0|64@1+ (1,0) [0|1.84467E+019] "" Vector__XXX
BO_ 1797 TTS_2_Message_2: 8 TTS_2
SG_ TTS_2_Message_2 : 0|64@1+ (1,0) [0|1.84467E+019] "" Vector__XXX
BO_ 1796 TTS_2_Message_1: 8 TTS_2
SG_ TTS_2_Message_1 : 0|64@1+ (1,0) [0|1.84467E+019] "" Vector__XXX
BO_ 1793 TTS_1_Message_2: 8 TTS_1
SG_ TTS_1_Message_2 : 0|64@1+ (1,0) [0|1.84467E+019] "" ABX
BO_ 1792 TTS_1_Message_1: 8 TTS_1
SG_ TTS_1_Message_1 : 0|64@1+ (1,0) [0|1.84467E+019] "" ABX
BO_ 1268 AMS_Log: 3 AMS
SG_ AMS_Log_voltage7 m1 : 8|8@1+ (0.0196078,0) [0|5] "V" ABX
SG_ AMS_Log_voltage0 m0 : 8|8@1+ (0.0196078,0) [0|5] "V" ABX
SG_ AMS_Log_slave_ID : 4|4@1+ (1,0) [0|15] "" ABX
SG_ AMS_Log_frame M : 0|4@1+ (1,0) [0|15] "" ABX
BO_ 10 AMS_Status: 6 AMS
SG_ AMS_State : 0|7@1+ (1,0) [0|1] "" ABX
SG_ SDC_Closed : 7|1@1+ (1,0) [0|1] "" ABX
SG_ SOC : 8|8@1+ (0.392157,0) [0|100] "%" ABX
SG_ Min_cell_volt : 23|16@0+ (7.62951E-005,0) [0|5] "V" ABX
SG_ Max_cell_temp : 39|16@0+ (0.0625,0) [0|4095.94] "°C" ABX
BO_ 9 AMS_Panic: 8 AMS
SG_ AMS_Error_Kind : 15|8@0+ (1,0) [0|7.20576E+016] "" ABX
SG_ AMS_Error_SlaveID : 0|8@1+ (1,0) [0|255] "" ABX
SG_ AMS_Error_Arg : 23|32@0+ (1,0) [0|7.20576E+016] "" ABX
BO_ 11 AMS_In: 1 ABX
SG_ TS_activate : 0|1@1+ (1,0) [0|1] "" AMS
SG_ Lap_Number : 2|6@1+ (1,0) [0|64] "Laps" AMS
SG_ Inverters_discharged : 1|1@1+ (1,0) [0|1] "" AMS
BO_ 1313 Shunt_Current: 6 Shunt
SG_ Shunt_Current : 23|32@0- (0.001,0) [-2000000|2000000] "A" AMS
BO_ 1314 Shunt_Voltage1: 6 Shunt
SG_ Shunt_Voltage1 : 23|32@0- (0.001,0) [-2000000|2000000] "V" AMS
BO_ 1315 Shunt_Voltage2: 6 Shunt
SG_ Shunt_Voltage2 : 23|32@0- (0.001,0) [-2000000|2000000] "V" AMS
BO_ 1316 Shunt_Voltage3: 6 Shunt
SG_ Shunt_Voltage3 : 23|32@0- (0.001,0) [-2000000|2000000] "V" AMS
BO_ 1317 Shunt_Temperature: 6 Shunt
SG_ Shunt_Temperature : 23|32@0+ (0.1,0) [0|1000] "°C" ABX
BO_ 16 SDCL_tx: 4 SDCL
SG_ asms_state : 0|1@1+ (1,0) [0|1] "" ABX
SG_ sdc_state_1 : 1|1@1+ (1,0) [0|1] "" ABX
SG_ sdc_state_2 : 2|1@1+ (1,0) [0|1] "" ABX
SG_ sdc_state_3 : 3|1@1+ (1,0) [0|1] "" ABX
SG_ heartbeat_ok : 4|1@1+ (1,0) [0|1] "" ABX
SG_ sdcl_sdc_ready : 5|1@1+ (1,0) [0|1] "" ABX
SG_ ts_start_muxed : 6|1@1+ (1,0) [0|1] "" ABX
SG_ latch_init_open : 8|1@1+ (1,0) [0|1] "" ABX
SG_ latch_closed : 9|1@1+ (1,0) [0|1] "" ABX
SG_ latch_reopened : 10|1@1+ (1,0) [0|1] "" ABX
SG_ as_mission : 11|3@1+ (1,0) [0|7] "" ABX
BO_ 15 SDCL_rx: 3 ABX
SG_ as_close_sdc : 0|1@1+ (1,0) [0|1] "" SDCL
SG_ sdcl_heartbeat : 1|1@1+ (1,0) [0|1] "" SDCL
SG_ asb_error : 2|1@1+ (1,0) [0|1] "" SDCL
SG_ as_mission : 4|3@1+ (1,0) [0|7] "" SDCL
BO_ 200 PDU_Command: 6 ABX
SG_ PDU_led3_rx : 13|1@0+ (1,0) [0|1] "" Vector__XXX
SG_ PDU_led2_rx : 14|1@0+ (1,0) [0|1] "" Vector__XXX
SG_ PDU_led1_rx : 15|1@0+ (1,0) [0|1] "" Vector__XXX
SG_ PDU_servo_rx : 1|1@0+ (1,0) [0|1] "" PDU
SG_ PDU_misc_rx : 2|1@0+ (1,0) [0|1] "" PDU
SG_ PDU_alwayson_rx : 3|1@0+ (1,0) [0|1] "" PDU
SG_ PDU_shutdown_circuit_rx : 4|1@0+ (1,0) [0|1] "" PDU
SG_ PDU_ebs_valve_2_rx : 5|1@0+ (1,0) [0|1] "" PDU
SG_ PDU_mode_valve_2_rx : 6|1@0+ (1,0) [0|1] "" PDU
SG_ PDU_inverter_rx : 7|1@0+ (1,0) [0|1] "" PDU
SG_ PDU_mode_valve_1_rx : 8|1@0+ (1,0) [0|1] "" PDU
SG_ PDU_steering_rx : 9|1@0+ (1,0) [0|1] "" PDU
SG_ PDU_ebs_valve_1_rx : 10|1@0+ (1,0) [0|1] "" PDU
SG_ PDU_service_brake_rx : 11|1@0+ (1,0) [0|1] "" PDU
SG_ PDU_sensorbox_rx : 12|1@0+ (1,0) [0|1] "" PDU
SG_ PDU_PWM_fans_rx : 23|8@0+ (1,0) [0|255] "" PDU
SG_ PDU_PWM_aggregat_rx : 31|8@0+ (1,0) [0|255] "" PDU
SG_ PDU_PWM_pump_rx : 39|8@0+ (1,0) [0|255] "" PDU
SG_ PDU_checksum_rx : 47|8@0+ (1,0) [0|255] "" PDU
BO_ 201 PDU_Response: 6 PDU
SG_ PDU_led3_tx : 13|1@0+ (1,0) [0|1] "" Vector__XXX
SG_ PDU_led2_tx : 14|1@0+ (1,0) [0|1] "" Vector__XXX
SG_ PDU_led1_tx : 15|1@0+ (1,0) [0|1] "" Vector__XXX
SG_ PDU_servo_tx : 1|1@0+ (1,0) [0|1] "" ABX
SG_ PDU_misc_tx : 2|1@0+ (1,0) [0|1] "" ABX
SG_ PDU_alwayson_tx : 3|1@0+ (1,0) [0|1] "" ABX
SG_ PDU_shutdown_circuit_tx : 4|1@0+ (1,0) [0|1] "" ABX
SG_ PDU_evs_valve_2_tx : 5|1@0+ (1,0) [0|1] "" ABX
SG_ PDU_mode_valve_2_tx : 6|1@0+ (1,0) [0|1] "" ABX
SG_ PDU_inverter_tx : 7|1@0+ (1,0) [0|1] "" ABX
SG_ PDU_mode_valve_1_tx : 8|1@0+ (1,0) [0|1] "" ABX
SG_ PDU_steering_tx : 9|1@0+ (1,0) [0|1] "" ABX
SG_ PDU_ebs_valve_1_tx : 10|1@0+ (1,0) [0|1] "" ABX
SG_ PDU_service_brake_tx : 11|1@0+ (1,0) [0|1] "" ABX
SG_ PDU_sensorbox_tx : 12|1@0+ (1,0) [0|1] "" ABX
SG_ PDU_PWM_fans_tx : 23|8@0+ (1,0) [0|255] "" ABX
SG_ PDU_PWM_aggregat : 31|8@0+ (1,0) [0|255] "" ABX
SG_ PDU_PWM_pump : 39|8@0+ (1,0) [0|255] "" ABX
SG_ PDU_checksum_tx : 47|8@0+ (1,0) [0|255] "" ABX
BO_ 514 TxPDO: 6 ABX
SG_ pdm_output2_shortcircuit : 21|1@1+ (1,0) [0|1] "" Vector__XXX
SG_ pdm_output1_shortcircuit : 20|1@1+ (1,0) [0|1] "" Vector__XXX
SG_ pdm_output2_cablebreak : 19|1@1+ (1,0) [0|1] "" Vector__XXX
SG_ pdm_output1_cablebreak : 18|1@1+ (1,0) [0|1] "" Vector__XXX
SG_ pdm_output2_controllerrange : 17|1@1+ (1,0) [0|1] "" Vector__XXX
SG_ pdm_output1_controllerrange : 16|1@1+ (1,0) [0|1] "" Vector__XXX
SG_ pdm_temperature_shutdown : 13|1@1+ (1,0) [0|1] "" Vector__XXX
SG_ pdm_temperature_warning : 12|1@1+ (1,0) [0|1] "" Vector__XXX
SG_ pdm_analoginput_currentoverload : 11|1@1+ (1,0) [0|1] "" Vector__XXX
SG_ pdm_analoginput_shortcircuit : 10|1@1+ (1,0) [0|1] "" Vector__XXX
SG_ pdm_analoginput_cablebreak : 9|1@1+ (1,0) [0|1] "" Vector__XXX
SG_ pdm_analoginput_middleposition : 8|1@1+ (1,0) [0|1] "" Vector__XXX
SG_ pdm_canbus_statewarning : 5|1@1+ (1,0) [0|1] "" Vector__XXX
SG_ pdm_canbus_startupmissing : 4|1@1+ (1,0) [0|1] "" Vector__XXX
SG_ pdm_canbus_timeout : 3|1@1+ (1,0) [0|1] "" Vector__XXX
SG_ pdm_powersupply_greater_32v : 2|1@1+ (1,0) [0|1] "" ABX
SG_ pdm_powersupply_less_8v : 1|1@1+ (1,0) [0|1] "" ABX
SG_ PDM_analoginput : 32|16@1+ (1,0) [0|65535] "%." ABX
BO_ 1 Error: 1 XSens
BO_ 2 Warning: 1 XSens
SG_ WarningCode : 7|8@0+ (1,0) [0|0] "" ABX
BO_ 5 SampleTime: 4 XSens
SG_ Timestamp : 7|32@0+ (1,0) [0|0] "us" ABX
BO_ 6 GroupCounter: 2 XSens
SG_ Counter : 7|16@0+ (1,0) [0|0] "" ABX
BO_ 17 StatusWord: 4 XSens
SG_ SelfTestOk : 24|1@1+ (1,0) [0|1] "" ABX
SG_ OrientationValid : 25|1@1+ (1,0) [0|1] "" ABX
SG_ GpsValid : 26|1@1+ (1,0) [0|1] "" ABX
SG_ NoRotation : 28|2@0+ (1,0) [0|3] "" ABX
SG_ RepresentativeMotion : 29|1@1+ (1,0) [0|1] "" ABX
SG_ ExternalClockSynced : 30|1@1+ (1,0) [0|1] "" ABX
SG_ ClipAccX : 16|1@1+ (1,0) [0|1] "" ABX
SG_ ClipAccY : 17|1@1+ (1,0) [0|1] "" ABX
SG_ ClipAccZ : 18|1@1+ (1,0) [0|1] "" ABX
SG_ ClipGyrX : 19|1@1+ (1,0) [0|1] "" ABX
SG_ ClipGyrY : 20|1@1+ (1,0) [0|1] "" ABX
SG_ ClipGyrZ : 21|1@1+ (1,0) [0|1] "" ABX
SG_ ClipMagX : 22|1@1+ (1,0) [0|1] "" ABX
SG_ ClipMagY : 23|1@1+ (1,0) [0|1] "" ABX
SG_ ClipMagZ : 8|1@1+ (1,0) [0|1] "" ABX
SG_ Retransmitted : 10|1@1+ (1,0) [0|1] "" ABX
SG_ ClippingDetected : 11|1@1+ (1,0) [0|1] "" ABX
SG_ Interpolated : 12|1@1+ (1,0) [0|1] "" ABX
SG_ SyncIn : 13|1@1+ (1,0) [0|1] "" ABX
SG_ SyncOut : 14|1@1+ (1,0) [0|1] "" ABX
SG_ FilterMode : 1|3@0+ (1,0) [0|1] "" ABX
SG_ HaveGnssTimePulse : 2|1@1+ (1,0) [0|1] "" ABX
SG_ RtkStatus : 4|2@0+ (1,0) [0|1] "" ABX
BO_ 33 Quaternion: 8 XSens
SG_ Q1 : 7|16@0- (3.05176E-005,0) [-1|1] "" ABX
SG_ Q2 : 23|16@0- (3.05176E-005,0) [-1|1] "" ABX
SG_ Q3 : 39|16@0- (3.05176E-005,0) [-1|1] "" ABX
SG_ Q4 : 55|16@0- (3.05176E-005,0) [-1|1] "" ABX
BO_ 49 DeltaV: 7 XSens
SG_ X : 7|16@0- (7.62939E-006,0) [-0.25|0.25] "m/s" ABX
SG_ Y : 23|16@0- (7.62939E-006,0) [-0.25|0.25] "m/s" ABX
SG_ Z : 39|16@0- (7.62939E-006,0) [-0.25|0.25] "m/s" ABX
SG_ Exponent : 55|8@0+ (1,0) [0|0] "" ABX
BO_ 50 RateOfTurn: 6 XSens
SG_ gyrX : 7|16@0- (0.00195313,0) [-35|35] "rad/s" ABX
SG_ gyrY : 23|16@0- (0.00195313,0) [-35|35] "rad/s" ABX
SG_ gyrZ : 39|16@0- (0.00195313,0) [-35|35] "rad/s" ABX
BO_ 51 DeltaQ: 8 XSens
SG_ DeltaQ1 : 7|16@0- (3.05185E-005,0) [-1|1] "m/s²" ABX
SG_ DeltaQ2 : 23|16@0- (3.05185E-005,0) [-1|1] "m/s²" ABX
SG_ DeltaQ3 : 39|16@0- (3.05185E-005,0) [-1|1] "m/s²" ABX
SG_ DeltaQ4 : 55|16@0- (3.05185E-005,0) [-1|1] "m/s²" ABX
BO_ 52 Acceleration: 6 XSens
SG_ accX : 7|16@0- (0.00390625,0) [-100|100] "m/s²" ABX
SG_ accY : 23|16@0- (0.00390625,0) [-100|100] "m/s²" ABX
SG_ accZ : 39|16@0- (0.00390625,0) [-100|100] "m/s²" ABX
BO_ 53 FreeAcceleration: 6 XSens
SG_ FreeAccX : 7|16@0- (0.00390625,0) [-100|100] "m/s²" ABX
SG_ FreeAccY : 23|16@0- (0.00390625,0) [-100|100] "m/s²" ABX
SG_ FreeAccZ : 39|16@0- (0.00390625,0) [-100|100] "m/s²" ABX
BO_ 97 RateOfTurnHR: 6 XSens
SG_ HrGyrX : 7|16@0- (0.00195313,0) [-35|35] "rad/s" ABX
SG_ HrGyrY : 23|16@0- (0.00195313,0) [-35|35] "rad/s" ABX
SG_ HrGyrZ : 39|16@0- (0.00195313,0) [-35|35] "rad/s" ABX
BO_ 98 AccelerationHR: 6 XSens
SG_ HrAccX : 7|16@0- (0.00390625,0) [-100|100] "m/s²" ABX
SG_ HrAccY : 23|16@0- (0.00390625,0) [-100|100] "m/s²" ABX
SG_ HrAccZ : 39|16@0- (0.00390625,0) [-100|100] "m/s²" ABX
BO_ 65 MagneticField: 6 XSens
SG_ magX : 7|16@0- (0.000976563,0) [-32|32] "a.u." ABX
SG_ magY : 23|16@0- (0.000976563,0) [-32|32] "a.u" ABX
SG_ magZ : 39|16@0- (0.000976563,0) [-32|32] "a.u" ABX
BO_ 81 Temperature: 2 XSens
SG_ Temperature : 7|16@0- (0.00390625,0) [-40|85] "degC" ABX
BO_ 82 BarometricPressure: 4 XSens
SG_ Pressure : 7|32@0- (3.05176E-005,0) [30000|125000] "Pa" ABX
BO_ 7 UTC: 8 XSens
SG_ year : 7|8@0+ (1,0) [0|0] "Y" ABX
SG_ month : 15|8@0+ (1,0) [1|12] "M" ABX
SG_ day : 23|8@0+ (1,0) [1|31] "D" ABX
SG_ hour : 31|8@0+ (1,0) [0|24] "h" ABX
SG_ minute : 39|8@0+ (1,0) [0|60] "m" ABX
SG_ second : 47|8@0+ (1,0) [0|60] "s" ABX
SG_ tenthms : 55|16@0+ (1,0) [0|0] "ms/10" ABX
BO_ 34 EulerAngles: 6 XSens
SG_ roll : 7|16@0- (0.0078125,0) [-180|180] "deg" ABX
SG_ pitch : 23|16@0- (0.0078125,0) [-90|90] "deg" ABX
SG_ yaw : 39|16@0- (0.0078125,0) [-180|180] "deg" ABX
BO_ 113 LongLat: 8 XSens
SG_ latitude : 7|32@0- (5.96046E-008,0) [-90|90] "deg" ABX
SG_ longitude : 39|32@0- (1.19209E-007,0) [-180|180] "deg" ABX
BO_ 114 AltitudeEllipsoid: 4 XSens
SG_ altEllipsoid : 7|32@0+ (3.05176E-005,0) [0|50000] "m" ABX
BO_ 115 PositionEcef_X: 4 XSens
SG_ PositionEcef_X : 7|32@0- (0.00390625,0) [-6500000|6500000] "m" ABX
BO_ 116 PositionEcef_Y: 4 XSens
SG_ PositionEcef_Y : 7|32@0- (0.00390625,0) [-6500000|6500000] "m" ABX
BO_ 117 PositionEcef_Z: 4 XSens
SG_ PositionEcef_Z : 7|32@0- (0.00390625,0) [-6500000|6500000] "m" ABX
BO_ 118 Velocity: 6 XSens
SG_ velX : 7|16@0- (0.015625,0) [-500|500] "m/s" ABX
SG_ velY : 23|16@0- (0.015625,0) [-500|500] "m/s" ABX
SG_ velZ : 39|16@0- (0.015625,0) [-500|500] "m/s" ABX
BO_ 1040 AS_Mission_fb: 1 ABX
SG_ Mission_selection : 0|3@1+ (1,0) [1|7] "" STW
BO_ 1024 STW_mission_selected: 1 STW
SG_ Mission_selection : 0|3@1+ (1,0) [1|7] "" ABX
BO_ 801 EPSC_out: 8 EPSC
SG_ EPSC_measured_steering_angle : 7|16@0- (7.20721E-005,0) [-13875|13875] "part of full steering" ABX
SG_ EPSC_measured_rpm : 39|12@0- (0.1,0) [-204.8|204.7] "rpm" ABX
SG_ EPSC_measured_current : 23|8@0+ (0.1,0) [0|25.5] "A" ABX
SG_ EPSC_measured_voltage : 31|8@0+ (0.1,0) [0|20] "V" ABX
SG_ EPSC_measured_temperature : 43|10@0+ (0.1,0) [0|102.3] "°C" ABX
SG_ EPSC_measured_internal_temp : 49|10@0+ (0.1,0) [0|102.3] "°C" ABX
BO_ 291 EPSC_Steering_In: 2 ABX
SG_ EPSC_desired_steering_angle : 7|16@0- (0.0001,0) [-10000|10000] "" EPSC
BO_ 1025 STW_buttons: 1 STW
SG_ STW_button_left : 0|1@1+ (1,0) [0|1] "" ABX
SG_ STW_button_right : 1|1@1+ (1,0) [0|1] "" ABX
SG_ STW_button_R2D : 2|1@1+ (1,0) [0|1] "" ABX
SG_ STW_button_Enter : 3|1@1+ (1,0) [0|1] "" ABX
BO_ 1042 STW_status: 6 ABX
SG_ InvL_ready : 8|1@1+ (1,0) [0|0] "" STW
SG_ iniChk_state : 24|8@1+ (1,0) [0|255] "" STW
SG_ InvR_ready : 9|1@1+ (1,0) [0|0] "" STW
SG_ AS_state : 0|3@1+ (1,0) [0|5] "" Vector__XXX
SG_ SDC_BFL : 10|1@1+ (1,0) [0|0] "" STW
SG_ SDC_BRL : 11|1@1+ (1,0) [0|0] "" STW
SG_ SDC_ACC : 12|1@1+ (1,0) [0|0] "" STW
SG_ SDC_HVB : 13|1@1+ (1,0) [0|0] "" STW
SG_ Lap_Count : 16|6@1+ (1,0) [0|64] "" STW
SG_ ERR_SDC : 32|1@1+ (1,0) [0|1] "" STW
SG_ ERR_AMS : 33|1@1+ (1,0) [0|1] "" STW
SG_ ERR_InvL : 43|1@1+ (1,0) [0|1] "" STW
SG_ ERR_InvR : 44|1@1+ (1,0) [0|1] "" STW
SG_ ERR_IniChk : 35|1@1+ (1,0) [0|1] "" STW
SG_ ERR_ConMon : 36|1@1+ (1,0) [0|1] "" STW
SG_ ERR_SCS : 37|1@1+ (1,0) [0|1] "" STW
SG_ ERR_sBSPD : 38|1@1+ (1,0) [0|1] "" STW
SG_ ERR_APPSp : 39|1@1+ (1,0) [0|1] "" STW
SG_ ERR_AS : 40|1@1+ (1,0) [0|1] "" STW
SG_ ERR_ROS : 41|1@1+ (1,0) [0|1] "" STW
SG_ ERR_RES : 42|1@1+ (1,0) [0|1] "" STW
SG_ ERR_PDU : 34|1@1+ (1,0) [0|1] "" STW
SG_ R2D_Progress : 4|4@1+ (1,0) [0|15] "" STW
BO_ 202 PDU_Current_1: 8 PDU
SG_ PDU_alwayson_curr : 7|16@0+ (1,0) [0|65535] "" ABX
SG_ PDU_misc_curr : 23|16@0+ (1,0) [0|65535] "" ABX
SG_ PDU_inverter_curr : 39|16@0+ (1,0) [0|65535] "" ABX
SG_ PDU_shutdown_circuit_curr : 55|16@0+ (1,0) [0|65535] "" ABX
BO_ 203 PDU_Current_2: 8 PDU
SG_ PDU_fans_curr : 7|16@0+ (1,0) [0|65535] "" ABX
SG_ PDU_pump_curr : 23|16@0+ (1,0) [0|65535] "" ABX
SG_ PDU_aggregat_curr : 39|16@0+ (1,0) [0|65535] "" ABX
SG_ PDU_steering_curr : 55|16@0+ (1,0) [0|65535] "" ABX
BO_ 204 PDU_Current_3: 8 PDU
SG_ PDU_ebs_valve_1_curr : 7|16@0+ (1,0) [0|65535] "" ABX
SG_ PDU_ebs_valve_2_curr : 23|16@0+ (1,0) [0|65535] "" ABX
SG_ PDU_mode_valve_1_curr : 39|16@0+ (1,0) [0|65535] "" ABX
SG_ PDU_mode_valve_2_curr : 55|16@0+ (1,0) [0|65535] "" ABX
BO_ 205 PDU_Current_4: 8 PDU
SG_ PDU_sensorbox_curr : 7|16@0+ (1,0) [0|65535] "" ABX
SG_ PDU_service_brake_curr : 23|16@0+ (1,0) [0|65535] "" ABX
SG_ PDU_servos_curr : 39|16@0+ (1,0) [0|65535] "" ABX
SG_ PDU_shutdown_circuit_curr : 55|16@0+ (1,0) [0|65535] "" ABX
BO_ 292 EPSC_Config_In: 7 ABX
SG_ EPSC_Ki_curr m1 : 55|8@0+ (0.1,0) [0|25.6] "" Vector__XXX
SG_ EPSC_Kp_curr m1 : 47|8@0+ (0.1,0) [0|25.6] "" Vector__XXX
SG_ EPSC_Ki_rpm m1 : 39|8@0+ (0.1,0) [0|25.6] "" Vector__XXX
SG_ EPSC_Kp_rpm m1 : 31|8@0+ (0.1,0) [0|25.6] "" Vector__XXX
SG_ EPSC_Ki_pos m1 : 23|8@0+ (0.1,0) [0|25.6] "" Vector__XXX
SG_ EPSC_Kp_pos m1 : 15|8@0+ (0.1,0) [0|25.6] "" Vector__XXX
SG_ EPSC_should_calibrate : 7|1@0- (1,0) [0|1] "" Vector__XXX
SG_ EPSC_should_change_mode M : 6|1@0+ (1,0) [0|1] "" Vector__XXX
SG_ EPSC_mode m1 : 5|1@0+ (1,0) [0|1] "" Vector__XXX
SG_ EPSC_flag3 : 4|1@0+ (1,0) [0|1] "" Vector__XXX
SG_ EPSC_flag4 : 3|1@0+ (1,0) [0|1] "" Vector__XXX
SG_ EPSC_flag5 : 2|1@0+ (1,0) [0|1] "" Vector__XXX
SG_ EPSC_flag6 : 1|1@0+ (1,0) [0|1] "" Vector__XXX
SG_ EPSC_flag7 : 0|1@0+ (1,0) [0|1] "" Vector__XXX
BO_ 0 AMSMsg99: 0 AMS
CM_ BU_ XSens "Generic Xsens Motion Sensor";
CM_ BO_ 3221225472 "This is a message for not used signals, created by Vector CANdb++ DBC OLE DB Provider.";
CM_ SG_ 1280 SSU_Message "TBD";
CM_ SG_ 1804 TTS_4_Message_1 "TBD";
CM_ SG_ 1801 TTS_3_Message_2 "TBD";
CM_ SG_ 1800 TTS_3_Message_1 "TBD";
CM_ SG_ 1797 TTS_2_Message_2 "TBD";
CM_ SG_ 1796 TTS_2_Message_1 "TBD";
CM_ SG_ 1793 TTS_1_Message_2 "TBD";
CM_ SG_ 1792 TTS_1_Message_1 "TBD";
CM_ SG_ 17 SelfTestOk "Set when the self test result was ok";
CM_ SG_ 17 OrientationValid "Set when the computed orientation is valid. The orientation may be invalid during startup or when the XSens data is clipping during violent (for the device) motion";
CM_ SG_ 17 GpsValid "Set when the device has a GPS receiver and the receiver says that there is a GPS position fix.";
CM_ SG_ 17 RepresentativeMotion "Indicates if the In-Run Compass Calibration is doing the representative motion analysis";
CM_ SG_ 17 ExternalClockSynced "Indicates whether the internal clock is synced with an external clock (Either GNNS or custom provided clock sync)";
CM_ SG_ 17 ClipAccX "Indicates if there was clipping on the X-axis of the accelerometer";
CM_ SG_ 17 ClipAccY "Indicates if there was clipping on the Y-axis of the accelerometer";
CM_ SG_ 17 ClipAccZ "Indicates if there was clipping on the Z-axis of the accelerometer";
CM_ SG_ 17 ClipGyrX "Indicates if there was clipping on the X-axis of the gyroscope";
CM_ SG_ 17 ClipGyrY "Indicates if there was clipping on the Y-axis of the gyroscope";
CM_ SG_ 17 ClipGyrZ "Indicates if there was clipping on the Z-axis of the gyroscope";
CM_ SG_ 17 ClipMagX "Indicates if there was clipping on the X-axis of the magnetometer";
CM_ SG_ 17 ClipMagY "Indicates if there was clipping on the Y-axis of the magnetometer";
CM_ SG_ 17 ClipMagZ "Indicates if there was clipping on the Z-axis of the magnetometer";
CM_ SG_ 17 Retransmitted "When set Indicates the sample was received as a retransmission";
CM_ SG_ 17 ClippingDetected "When set Indicates clipping has occurred";
CM_ SG_ 17 Interpolated "When set Indicates the sample is an interpolation between other samples";
CM_ SG_ 17 SyncIn "When set indicates a sync-in event has been triggered";
CM_ SG_ 17 SyncOut "When set Indicates a sync-out event has been generated";
CM_ SG_ 17 FilterMode "Mask for the 3 bit filter mode field";
CM_ SG_ 17 HaveGnssTimePulse "Indicates that the 1PPS GNSS time pulse is present";
CM_ SG_ 17 RtkStatus "Mask for 2 bit RTK status field";
CM_ BO_ 7 "UTC Time in the following format YYMMDDhhmmss plus tenth of a milli second";
CM_ SG_ 801 EPSC_measured_steering_angle "+-13875 equals to +-1.0, so the factor is 1/13875";
VAL_ 1026 STW_Param_Type 0 "BrakeBalance" 1 "TractionControl1" 2 "TractionControl2" 3 "TorqueMap" 4 "Test1" 5 "Test2" 6 "Test3" 7 "Test4" ;
VAL_ 1026 STW_Param_ASRON 0 "OFF" 1 "ON" ;
VAL_ 10 AMS_State 0 "No Description" 1 "TS_ACTIVE" 2 "TS_PRECHARGE" 3 "TS_DISCHARGE" 4 "TS_ERROR" ;
VAL_ 9 AMS_Error_Kind 0 "Overtemperature" 1 "Undertemperature" 2 "Overvoltage" 3 "Undervoltage" 4 "Too_few_working_temperature_sensors" 5 "Open_cell_connection" ;
VAL_ 17 SelfTestOk 0 "false" 1 "true" ;
VAL_ 17 OrientationValid 0 "false" 1 "true" ;
VAL_ 17 GpsValid 0 "false" 1 "true" ;
VAL_ 17 NoRotation 1 "Aborted" 2 "SamplesRejected" 3 "RunningNormally" ;
VAL_ 17 RepresentativeMotion 0 "false" 1 "true" ;
VAL_ 17 ExternalClockSynced 0 "false" 1 "true" ;
VAL_ 17 ClipAccX 0 "false" 1 "true" ;
VAL_ 17 ClipAccY 0 "false" 1 "true" ;
VAL_ 17 ClipAccZ 0 "false" 1 "true" ;
VAL_ 17 ClipGyrX 0 "false" 1 "true" ;
VAL_ 17 ClipGyrY 0 "false" 1 "true" ;
VAL_ 17 ClipGyrZ 0 "false" 1 "true" ;
VAL_ 17 ClipMagX 0 "false" 1 "true" ;
VAL_ 17 ClipMagY 0 "false" 1 "true" ;
VAL_ 17 ClipMagZ 0 "false" 1 "true" ;
VAL_ 17 Retransmitted 0 "false" 1 "true" ;
VAL_ 17 ClippingDetected 0 "false" 1 "true" ;
VAL_ 17 Interpolated 0 "false" 1 "true" ;
VAL_ 17 SyncIn 0 "false" 1 "true" ;
VAL_ 17 SyncOut 0 "false" 1 "true" ;
VAL_ 17 FilterMode 0 "false" 1 "true" ;
VAL_ 17 HaveGnssTimePulse 0 "false" 1 "true" ;
VAL_ 17 RtkStatus 0 "No RTK" 1 "RTK floating" 2 "RTK fixed" ;
VAL_ 1040 Mission_selection 1 "MissionSelection_acceleration" 2 "MissionSelection_skidpad" 3 "MissionSelection_trackdrive" 4 "MissionSelection_braketest" 5 "MissionSelection_inspection" 6 "MissionSelection_autocross" 7 "MissionSelection_manual" ;
VAL_ 1024 Mission_selection 1 "MissionSelection_acceleration" 2 "MissionSelection_skidpad" 3 "MissionSelection_trackdrive" 4 "MissionSelection_braketest" 5 "MissionSelection_inspection" 6 "MissionSelection_autocross" 7 "MissionSelection_manual" ;
VAL_ 1042 iniChk_state 0 "Start" 1 "WD_Check" 2 "WD_OK" 3 "ASB_Check_1" 4 "ASB_Check_2" 5 "Wait_TS" 6 "EBS_Check_A" 7 "EBS_Check_B" 8 "Done" 9 "Error" ;
VAL_ 1042 AS_state 0 "AS_Off" 1 "AS_Manual" 2 "AS_Ready" 3 "AS_Driving" 4 "AS_Finished" 5 "AS_Emergency" ;
VAL_ 1042 R2D_Progress 0 "R2D_None" 1 "R2D_TSMS" 2 "R2D_TSActive" 3 "R2D_Resetting_Nodes" 4 "R2D_Resetting_Comms" 5 "R2D_Waiting_Init" 6 "R2D_Init_Stage1" 7 "R2D_Init_Stage2" 15 "R2D_Init_Success" ;

View File

@ -57,18 +57,48 @@ void Error_Handler(void);
/* USER CODE END EFP */
/* Private defines -----------------------------------------------------------*/
#define SDC_is_ready_Pin GPIO_PIN_1
#define SDC_is_ready_GPIO_Port GPIOA
#define AS_close_SDC_Pin GPIO_PIN_3
#define AS_close_SDC_GPIO_Port GPIOA
#define AS_driving_mode_Pin GPIO_PIN_4
#define AS_driving_mode_GPIO_Port GPIOA
#define Watchdog_Pin GPIO_PIN_5
#define Watchdog_GPIO_Port GPIOA
#define TS_activate_MUXed_Pin GPIO_PIN_7
#define TS_activate_MUXed_Pin GPIO_PIN_0
#define TS_activate_MUXed_GPIO_Port GPIOA
#define SDC_in_3V3_Pin GPIO_PIN_8
#define ASMS_Pin GPIO_PIN_1
#define ASMS_GPIO_Port GPIOA
#define INITIAL_OPEN_Pin GPIO_PIN_2
#define INITIAL_OPEN_GPIO_Port GPIOA
#define CLOSED_Pin GPIO_PIN_3
#define CLOSED_GPIO_Port GPIOA
#define REOPENED_Pin GPIO_PIN_4
#define REOPENED_GPIO_Port GPIOA
#define WD_OK_Pin GPIO_PIN_5
#define WD_OK_GPIO_Port GPIOA
#define SDC_is_ready_Pin GPIO_PIN_6
#define SDC_is_ready_GPIO_Port GPIOA
#define SDC_in_3V3_Pin GPIO_PIN_7
#define SDC_in_3V3_GPIO_Port GPIOA
#define LV_SENSE_1_Pin GPIO_PIN_0
#define LV_SENSE_1_GPIO_Port GPIOB
#define LV_SENSE_2_Pin GPIO_PIN_1
#define LV_SENSE_2_GPIO_Port GPIOB
#define AMI_EBSTEST_Pin GPIO_PIN_10
#define AMI_EBSTEST_GPIO_Port GPIOB
#define AMI_INSPECTION_Pin GPIO_PIN_11
#define AMI_INSPECTION_GPIO_Port GPIOB
#define AS_close_SDC_Pin GPIO_PIN_9
#define AS_close_SDC_GPIO_Port GPIOA
#define Watchdog_Pin GPIO_PIN_10
#define Watchdog_GPIO_Port GPIOA
#define AMC_Pin GPIO_PIN_15
#define AMC_GPIO_Port GPIOA
#define ASB_Error_Pin GPIO_PIN_4
#define ASB_Error_GPIO_Port GPIOB
#define AMI_TRACKDRIVE_Pin GPIO_PIN_5
#define AMI_TRACKDRIVE_GPIO_Port GPIOB
#define AMI_AUTOX_Pin GPIO_PIN_6
#define AMI_AUTOX_GPIO_Port GPIOB
#define AMI_SKIDPAD_Pin GPIO_PIN_7
#define AMI_SKIDPAD_GPIO_Port GPIOB
#define AMI_ACCEL_Pin GPIO_PIN_8
#define AMI_ACCEL_GPIO_Port GPIOB
#define AMI_MANUAL_Pin GPIO_PIN_9
#define AMI_MANUAL_GPIO_Port GPIOB
/* USER CODE BEGIN Private defines */
/* USER CODE END Private defines */

View File

@ -51,7 +51,7 @@
/*#define HAL_CRYP_MODULE_ENABLED */
/*#define HAL_DAC_MODULE_ENABLED */
/*#define HAL_I2S_MODULE_ENABLED */
/*#define HAL_IWDG_MODULE_ENABLED */
#define HAL_IWDG_MODULE_ENABLED
/*#define HAL_LCD_MODULE_ENABLED */
/*#define HAL_LPTIM_MODULE_ENABLED */
/*#define HAL_RNG_MODULE_ENABLED */

View File

@ -26,26 +26,92 @@
/* Private typedef -----------------------------------------------------------*/
/* USER CODE BEGIN PTD */
// BITFIELDS ARE LSB FIRST!
/*
* VAL_ 1040 Mission_selection
* 1 "MissionSelection_acceleration"
* 2 "MissionSelection_skidpad"
* 3 "MissionSelection_trackdrive"
* 4 "MissionSelection_braketest"
* 5 "MissionSelection_inspection"
* 6 "MissionSelection_autocross"
* 7 "MissionSelection_manual";
*/
typedef enum {
M_NONE = 0,
M_ACCEL = 1,
M_SKIDPAD = 2,
M_TRACKDRIVE = 3,
M_EBSTEST = 4,
M_INSPECTION = 5,
M_AUTOX = 6,
M_MANUAL = 7
} mission_t;
typedef enum {
AS_OFF = 0,
AS_MANUAL = 1,
AS_READY = 2,
AS_DRIVING = 3,
AS_FINISHED = 4,
AS_EMERGENCY = 5,
} as_state_t;
/*
* BO_ 15 SDCL_rx: 3 ABX
* SG_ as_close_sdc : 0|1@1+ (1,0) [0|1] "" SDCL
* SG_ sdcl_heartbeat : 1|1@1+ (1,0) [0|1] "" SDCL
* SG_ asb_error : 2|1@1+ (1,0) [0|1] "" SDCL
* SG_ as_mission : 4|3@1+ (1,0) [0|7] "" SDCL
*/
typedef union {
uint8_t raw[1];
uint8_t raw[8]; // Must be 8 bytes because HAL always writes 8 bytes
struct {
bool as_driving_mode : 1;
// BITFIELDS ARE LSB FIRST!
bool as_close_sdc : 1;
bool watchdog : 1;
uint8_t _padding : 5;
} signals;
bool heartbeat : 1;
bool asb_error : 1;
unsigned int _padding1 : 1;
mission_t as_mission : 3;
unsigned int _padding2 : 1;
} __attribute__((packed)) signals;
} rx_data_t;
/*
* BO_ 16 SDCL_tx: 4 SDCL
* SG_ asms_state : 0|1@1+ (1,0) [0|1] "" ABX
* SG_ sdc_state_1 : 1|1@1+ (1,0) [0|1] "" ABX
* SG_ sdc_state_2 : 2|1@1+ (1,0) [0|1] "" ABX
* SG_ sdc_state_3 : 3|1@1+ (1,0) [0|1] "" ABX
* SG_ heartbeat_ok : 4|1@1+ (1,0) [0|1] "" ABX
* SG_ sdcl_sdc_ready : 5|1@1+ (1,0) [0|1] "" ABX
* SG_ ts_start_muxed : 6|1@1+ (1,0) [0|1] "" ABX
* SG_ latch_init_open : 8|1@1+ (1,0) [0|1] "" ABX
* SG_ latch_closed : 9|1@1+ (1,0) [0|1] "" ABX
* SG_ latch_reopened : 10|1@1+ (1,0) [0|1] "" ABX
* SG_ as_mission : 11|3@1+ (1,0) [0|7] "" ABX
*/
typedef union {
uint8_t raw[1];
uint8_t raw[2];
struct {
bool sdc_in : 1;
// BITFIELDS ARE LSB FIRST!
bool asms_state : 1;
bool sdc_state_1 : 1;
bool sdc_state_2 : 1;
bool sdc_state_3 : 1;
bool heartbeat_ok : 1;
bool sdc_ready : 1;
bool ts_start : 1;
uint8_t _padding : 5;
} signals;
bool ts_start_muxed : 1;
unsigned int _padding1 : 1;
// -- byte border
bool latch_init_open : 1;
bool latch_closed : 1;
bool latch_reopened : 1;
mission_t as_mission : 3;
unsigned int _padding2 : 2;
} __attribute__((packed)) signals;
} tx_data_t;
/* USER CODE END PTD */
@ -53,14 +119,18 @@ typedef union {
/* Private define ------------------------------------------------------------*/
/* USER CODE BEGIN PD */
#define CAN_ID_RX 0x10
#define CAN_ID_TX 0x11
#define CAN_ID_RX 0x00F
#define CAN_ID_TX 0x010
#define CAN_ID_JETSON_RX 0x0E0
// Wait 20ms. Needs to be less than watchdog period!
#define RX_UPDATE_PERIOD 20
// Defined in DBC. Should be multiple of RX_UPDATE_PERIOD
// Defined in DBC?
#define TX_UPDATE_PERIOD 100
#define AMI_GPIO_Port GPIOB
//#define WATCHDOG_UCC
#define WATCHDOG_STM
/* USER CODE END PD */
/* Private macro -------------------------------------------------------------*/
@ -71,9 +141,25 @@ typedef union {
/* Private variables ---------------------------------------------------------*/
CAN_HandleTypeDef hcan;
IWDG_HandleTypeDef hiwdg;
/* USER CODE BEGIN PV */
rx_data_t RxData;
// Mission Maps: NONE ACCEL SKIDPAD AUTOX EBSTEST INSPECTION TRACKDRIVE MANUAL
const uint16_t mission2led[] = {0 , AMI_ACCEL_Pin , AMI_SKIDPAD_Pin , AMI_AUTOX_Pin , AMI_TRACKDRIVE_Pin, AMI_EBSTEST_Pin , AMI_INSPECTION_Pin, AMI_MANUAL_Pin};
const mission_t mission2next[] = {M_MANUAL , M_SKIDPAD , M_AUTOX , M_EBSTEST , M_INSPECTION , M_MANUAL , M_TRACKDRIVE , M_ACCEL };
mission_t mission = M_NONE;
as_state_t state = AS_OFF;
bool setup_done = false;
#ifdef WATCHDOG_STM
bool heartbeat_received = false;
bool pHeartbeat = false;
bool WD_OK = false;
bool WD_initialized = false;
#endif
/* USER CODE END PV */
@ -81,13 +167,18 @@ rx_data_t RxData;
void SystemClock_Config(void);
static void MX_GPIO_Init(void);
static void MX_CAN_Init(void);
static void MX_IWDG_Init(void);
/* USER CODE BEGIN PFP */
/* USER CODE END PFP */
/* Private user code ---------------------------------------------------------*/
/* USER CODE BEGIN 0 */
void setMissionLED(mission_t mission, GPIO_PinState state)
{
if (mission != M_NONE)
HAL_GPIO_WritePin(AMI_GPIO_Port, mission2led[mission], state);
}
/* USER CODE END 0 */
/**
@ -114,15 +205,24 @@ int main(void)
/* USER CODE BEGIN SysInit */
MX_GPIO_Init();
MX_CAN_Init();
#if false
/* USER CODE END SysInit */
/* Initialize all configured peripherals */
MX_GPIO_Init();
MX_CAN_Init();
MX_IWDG_Init();
/* USER CODE BEGIN 2 */
#endif
// Init data as LOW
memset(&RxData, 0, sizeof(rx_data_t));
// Freeze WDG when debugging
__HAL_DBGMCU_FREEZE_IWDG();
// Ensure we start with SDC disabled
HAL_GPIO_WritePin(AS_close_SDC_GPIO_Port, AS_close_SDC_Pin, GPIO_PIN_SET);
if (HAL_CAN_Start(&hcan) != HAL_OK)
Error_Handler();
@ -132,14 +232,18 @@ int main(void)
canfilterconfig.FilterActivation = CAN_FILTER_ENABLE;
canfilterconfig.FilterBank = 0;
canfilterconfig.FilterFIFOAssignment = CAN_FILTER_FIFO0;
canfilterconfig.FilterIdHigh = 0;
canfilterconfig.FilterIdHigh = CAN_ID_RX << (16 - 11);
canfilterconfig.FilterIdLow = 0;
canfilterconfig.FilterMaskIdHigh = 0;
canfilterconfig.FilterMaskIdHigh = 0x7FF << (16 - 11);
canfilterconfig.FilterMaskIdLow = 0;
canfilterconfig.FilterMode = CAN_FILTERMODE_IDMASK;
canfilterconfig.FilterScale = CAN_FILTERSCALE_32BIT;
canfilterconfig.SlaveStartFilterBank = 14;
if (HAL_CAN_ConfigFilter(&hcan, &canfilterconfig) != HAL_OK) {
Error_Handler();
}
canfilterconfig.FilterBank = 1;
canfilterconfig.FilterIdHigh = CAN_ID_JETSON_RX << (16 -11);
if (HAL_CAN_ConfigFilter(&hcan, &canfilterconfig) != HAL_OK) {
Error_Handler();
}
@ -147,53 +251,107 @@ int main(void)
if (HAL_CAN_ActivateNotification(&hcan, CAN_IT_RX_FIFO0_MSG_PENDING) != HAL_OK)
Error_Handler();
CAN_TxHeaderTypeDef TxHeader;
uint32_t TxMailbox;
tx_data_t TxData;
CAN_TxHeaderTypeDef txHeader;
uint32_t txMailbox;
tx_data_t txData;
memset(&TxData, 0, sizeof(tx_data_t));
memset(&txData, 0, sizeof(tx_data_t));
// Prep the tx frame
TxHeader.IDE = CAN_ID_STD;
TxHeader.StdId = CAN_ID_TX;
TxHeader.RTR = CAN_RTR_DATA;
TxHeader.DLC = 1;
txHeader.IDE = CAN_ID_STD;
txHeader.StdId = CAN_ID_TX;
txHeader.RTR = CAN_RTR_DATA;
txHeader.DLC = 2;
/* USER CODE END 2 */
/* Infinite loop */
/* USER CODE BEGIN WHILE */
uint32_t counter = 0;
bool pAMC = false;
bool pASMS = false;
mission_t new_mission = mission; // By default, don't change mission
// Wait at least 1s to prevent bus error state while ABX is starting up
// During that time, show loading animation to show LEDs work
while (HAL_GetTick() < 1000) {
setMissionLED(M_MANUAL, GPIO_PIN_SET);
HAL_Delay(150);
setMissionLED(M_MANUAL, GPIO_PIN_RESET);
for (mission_t m = M_ACCEL; m != M_MANUAL; m = mission2next[m]) {
setMissionLED(m, GPIO_PIN_SET);
HAL_Delay(150);
setMissionLED(m, GPIO_PIN_RESET);
}
}
setup_done = true;
uint32_t last_msg = 0;
while (true) {
// Write out all values received via interrupt to the pins
HAL_GPIO_WritePin(GPIOA, AS_driving_mode_Pin, RxData.signals.as_driving_mode);
HAL_GPIO_WritePin(GPIOA, AS_close_SDC_Pin, RxData.signals.as_close_sdc);
HAL_GPIO_WritePin(GPIOA, Watchdog_Pin, RxData.signals.watchdog);
// Compare with RESET for signals obtained via inverting buffer
bool TS_activate_MUXed = HAL_GPIO_ReadPin(TS_activate_MUXed_GPIO_Port, TS_activate_MUXed_Pin) == GPIO_PIN_RESET;
bool ASMS = HAL_GPIO_ReadPin(ASMS_GPIO_Port, ASMS_Pin) == GPIO_PIN_RESET;
#ifdef WATCHDOG_UCC
bool WD_OK = HAL_GPIO_ReadPin(WD_OK_GPIO_Port, WD_OK_Pin) == GPIO_PIN_RESET;
#endif
bool SDC_is_ready = HAL_GPIO_ReadPin(SDC_is_ready_GPIO_Port, SDC_is_ready_Pin) == GPIO_PIN_SET;
bool SDC_in_3V3 = HAL_GPIO_ReadPin(SDC_in_3V3_GPIO_Port, SDC_in_3V3_Pin) == GPIO_PIN_SET;
bool LV_SENSE_1 = HAL_GPIO_ReadPin(LV_SENSE_1_GPIO_Port, LV_SENSE_1_Pin) == GPIO_PIN_SET;
bool LV_SENSE_2 = HAL_GPIO_ReadPin(LV_SENSE_2_GPIO_Port, LV_SENSE_2_Pin) == GPIO_PIN_SET;
// every nth rx, we tx¨
if (++counter >= (TX_UPDATE_PERIOD / RX_UPDATE_PERIOD)) {
bool INITIAL_OPEN = HAL_GPIO_ReadPin(INITIAL_OPEN_GPIO_Port, INITIAL_OPEN_Pin) == GPIO_PIN_RESET;
bool CLOSED = HAL_GPIO_ReadPin(CLOSED_GPIO_Port, CLOSED_Pin) == GPIO_PIN_RESET;
bool REOPENED = HAL_GPIO_ReadPin(REOPENED_GPIO_Port, REOPENED_Pin) == GPIO_PIN_RESET;
// Read values to send
uint8_t s = HAL_GPIO_ReadPin(GPIOA, SDC_in_3V3_Pin) == GPIO_PIN_SET;
uint8_t r = HAL_GPIO_ReadPin(GPIOA, SDC_is_ready_Pin) == GPIO_PIN_SET;
uint8_t t = HAL_GPIO_ReadPin(GPIOA, TS_activate_MUXed_Pin) == GPIO_PIN_SET;
TxData.signals.sdc_in = s;
TxData.signals.sdc_ready = r;
TxData.signals.ts_start = t;
if (HAL_GetTick() - last_msg >= TX_UPDATE_PERIOD) {
last_msg = HAL_GetTick();
bool AMC = HAL_GPIO_ReadPin(AMC_GPIO_Port, AMC_Pin) == GPIO_PIN_SET;
// On signal edge. Debouncing usually not needed at these polling rates (10Hz)
if (AMC < pAMC) {
// Send out CAN message
if (HAL_CAN_AddTxMessage(&hcan, &TxHeader, TxData.raw, &TxMailbox) != HAL_OK)
// Reset LED to indicate transaction / mission change in progress
setMissionLED(mission, GPIO_PIN_RESET);
new_mission = mission2next[mission];
// New LED will be set once response from ABX is received
}
// TEMP: Only enable WD if in autonomous mode because EMI currently messes it up during R2D
if (ASMS > pASMS) {
MX_IWDG_Init();
WD_initialized = true;
}
txData = (tx_data_t) {
.signals = {
.asms_state = ASMS,
.sdc_state_1 = LV_SENSE_1,
.sdc_state_2 = LV_SENSE_2,
.sdc_state_3 = SDC_in_3V3,
.heartbeat_ok = WD_OK,
.sdc_ready = SDC_is_ready,
.ts_start_muxed = TS_activate_MUXed,
.latch_init_open = INITIAL_OPEN,
.latch_closed = CLOSED,
.latch_reopened = REOPENED,
.as_mission = new_mission
}
};
if (HAL_CAN_AddTxMessage(&hcan, &txHeader, txData.raw, &txMailbox) != HAL_OK)
Error_Handler();
counter = 0;
// Store previous button value to detect signal edges
pAMC = AMC;
pASMS = ASMS;
}
if (state != AS_OFF && state != AS_MANUAL && WD_initialized) {
HAL_IWDG_Refresh(&hiwdg);
WD_OK = true;
}
// Slow the loop
HAL_Delay(RX_UPDATE_PERIOD);
/* USER CODE END WHILE */
@ -214,14 +372,16 @@ void SystemClock_Config(void)
/** Initializes the RCC Oscillators according to the specified parameters
* in the RCC_OscInitTypeDef structure.
*/
RCC_OscInitStruct.OscillatorType = RCC_OSCILLATORTYPE_HSI;
RCC_OscInitStruct.OscillatorType = RCC_OSCILLATORTYPE_HSI|RCC_OSCILLATORTYPE_LSI;
RCC_OscInitStruct.HSIState = RCC_HSI_ON;
RCC_OscInitStruct.HSICalibrationValue = RCC_HSICALIBRATION_DEFAULT;
RCC_OscInitStruct.LSIState = RCC_LSI_ON;
RCC_OscInitStruct.PLL.PLLState = RCC_PLL_NONE;
if (HAL_RCC_OscConfig(&RCC_OscInitStruct) != HAL_OK)
{
Error_Handler();
}
/** Initializes the CPU, AHB and APB buses clocks
*/
RCC_ClkInitStruct.ClockType = RCC_CLOCKTYPE_HCLK|RCC_CLOCKTYPE_SYSCLK
@ -259,8 +419,8 @@ static void MX_CAN_Init(void)
hcan.Init.TimeSeg1 = CAN_BS1_13TQ;
hcan.Init.TimeSeg2 = CAN_BS2_2TQ;
hcan.Init.TimeTriggeredMode = DISABLE;
hcan.Init.AutoBusOff = DISABLE;
hcan.Init.AutoWakeUp = DISABLE;
hcan.Init.AutoBusOff = ENABLE;
hcan.Init.AutoWakeUp = ENABLE;
hcan.Init.AutoRetransmission = ENABLE;
hcan.Init.ReceiveFifoLocked = DISABLE;
hcan.Init.TransmitFifoPriority = DISABLE;
@ -274,6 +434,35 @@ static void MX_CAN_Init(void)
}
/**
* @brief IWDG Initialization Function
* @param None
* @retval None
*/
static void MX_IWDG_Init(void)
{
/* USER CODE BEGIN IWDG_Init 0 */
/* USER CODE END IWDG_Init 0 */
/* USER CODE BEGIN IWDG_Init 1 */
/* USER CODE END IWDG_Init 1 */
hiwdg.Instance = IWDG;
hiwdg.Init.Prescaler = IWDG_PRESCALER_4;
hiwdg.Init.Window = 1000;
hiwdg.Init.Reload = 1000;
if (HAL_IWDG_Init(&hiwdg) != HAL_OK)
{
Error_Handler();
}
/* USER CODE BEGIN IWDG_Init 2 */
/* USER CODE END IWDG_Init 2 */
}
/**
* @brief GPIO Initialization Function
* @param None
@ -288,27 +477,47 @@ static void MX_GPIO_Init(void)
__HAL_RCC_GPIOB_CLK_ENABLE();
/*Configure GPIO pin Output Level */
HAL_GPIO_WritePin(GPIOA, AS_close_SDC_Pin|AS_driving_mode_Pin|Watchdog_Pin, GPIO_PIN_RESET);
HAL_GPIO_WritePin(GPIOB, AMI_EBSTEST_Pin|AMI_INSPECTION_Pin|ASB_Error_Pin|AMI_TRACKDRIVE_Pin
|AMI_AUTOX_Pin|AMI_SKIDPAD_Pin|AMI_ACCEL_Pin|AMI_MANUAL_Pin, GPIO_PIN_RESET);
/*Configure GPIO pins : SDC_is_ready_Pin SDC_in_3V3_Pin */
GPIO_InitStruct.Pin = SDC_is_ready_Pin|SDC_in_3V3_Pin;
/*Configure GPIO pin Output Level */
HAL_GPIO_WritePin(AS_close_SDC_GPIO_Port, AS_close_SDC_Pin, GPIO_PIN_SET);
/*Configure GPIO pin Output Level */
HAL_GPIO_WritePin(Watchdog_GPIO_Port, Watchdog_Pin, GPIO_PIN_RESET);
/*Configure GPIO pins : TS_activate_MUXed_Pin ASMS_Pin INITIAL_OPEN_Pin CLOSED_Pin
REOPENED_Pin WD_OK_Pin SDC_is_ready_Pin SDC_in_3V3_Pin
AMC_Pin */
GPIO_InitStruct.Pin = TS_activate_MUXed_Pin|ASMS_Pin|INITIAL_OPEN_Pin|CLOSED_Pin
|REOPENED_Pin|WD_OK_Pin|SDC_is_ready_Pin|SDC_in_3V3_Pin
|AMC_Pin;
GPIO_InitStruct.Mode = GPIO_MODE_INPUT;
GPIO_InitStruct.Pull = GPIO_NOPULL;
HAL_GPIO_Init(GPIOA, &GPIO_InitStruct);
/*Configure GPIO pins : AS_close_SDC_Pin AS_driving_mode_Pin Watchdog_Pin */
GPIO_InitStruct.Pin = AS_close_SDC_Pin|AS_driving_mode_Pin|Watchdog_Pin;
/*Configure GPIO pins : LV_SENSE_1_Pin LV_SENSE_2_Pin */
GPIO_InitStruct.Pin = LV_SENSE_1_Pin|LV_SENSE_2_Pin;
GPIO_InitStruct.Mode = GPIO_MODE_INPUT;
GPIO_InitStruct.Pull = GPIO_NOPULL;
HAL_GPIO_Init(GPIOB, &GPIO_InitStruct);
/*Configure GPIO pins : AMI_EBSTEST_Pin AMI_INSPECTION_Pin ASB_Error_Pin AMI_TRACKDRIVE_Pin
AMI_AUTOX_Pin AMI_SKIDPAD_Pin AMI_ACCEL_Pin AMI_MANUAL_Pin */
GPIO_InitStruct.Pin = AMI_EBSTEST_Pin|AMI_INSPECTION_Pin|ASB_Error_Pin|AMI_TRACKDRIVE_Pin
|AMI_AUTOX_Pin|AMI_SKIDPAD_Pin|AMI_ACCEL_Pin|AMI_MANUAL_Pin;
GPIO_InitStruct.Mode = GPIO_MODE_OUTPUT_PP;
GPIO_InitStruct.Pull = GPIO_NOPULL;
GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_LOW;
HAL_GPIO_Init(GPIOB, &GPIO_InitStruct);
/*Configure GPIO pins : AS_close_SDC_Pin Watchdog_Pin */
GPIO_InitStruct.Pin = AS_close_SDC_Pin|Watchdog_Pin;
GPIO_InitStruct.Mode = GPIO_MODE_OUTPUT_PP;
GPIO_InitStruct.Pull = GPIO_NOPULL;
GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_LOW;
HAL_GPIO_Init(GPIOA, &GPIO_InitStruct);
/*Configure GPIO pin : TS_activate_MUXed_Pin */
GPIO_InitStruct.Pin = TS_activate_MUXed_Pin;
GPIO_InitStruct.Mode = GPIO_MODE_INPUT;
GPIO_InitStruct.Pull = GPIO_PULLDOWN;
HAL_GPIO_Init(TS_activate_MUXed_GPIO_Port, &GPIO_InitStruct);
}
/* USER CODE BEGIN 4 */
@ -316,16 +525,54 @@ static void MX_GPIO_Init(void)
// CAN RX interrupt handler
void HAL_CAN_RxFifo0MsgPendingCallback(CAN_HandleTypeDef *hcan) {
CAN_RxHeaderTypeDef RxHeader;
uint8_t RxBuffer[8];
CAN_RxHeaderTypeDef rxHeader;
rx_data_t rxData;
// Read frame from HW into buffer
if (HAL_CAN_GetRxMessage(hcan, CAN_RX_FIFO0, &RxHeader, RxBuffer) != HAL_OK)
if (HAL_CAN_GetRxMessage(hcan, CAN_RX_FIFO0, &rxHeader, rxData.raw) != HAL_OK)
Error_Handler();
// Copy into the bitfield if it's for us
if (RxHeader.StdId == CAN_ID_RX)
RxData.raw[0] = RxBuffer[0];
// Discard if it's not for us (shouldn't happen thanks to filter, but just to be sure)
if (rxHeader.StdId == CAN_ID_RX) {
// return;
#ifdef WATCHDOG_STM
if (rxData.signals.heartbeat != pHeartbeat) {
if (WD_initialized)
HAL_IWDG_Refresh(&hiwdg);
if (heartbeat_received) {
WD_OK = true;
}
heartbeat_received = true;
//HAL_GPIO_WritePin(Watchdog_GPIO_Port, Watchdog_Pin, GPIO_PIN_SET);
}
pHeartbeat = rxData.signals.heartbeat;
bool close_sdc = setup_done && rxData.signals.as_close_sdc && WD_OK;
#endif
#ifdef WATCHDOG_UCC
HAL_GPIO_WritePin(Watchdog_GPIO_Port, Watchdog_Pin, rxData.signals.heartbeat);
bool close_sdc = rxData.signals.as_close_sdc;
#endif
// Set whether to close the relay. The port is inverted due to multiple bodges
GPIO_PinState close_sdc_val = close_sdc ? GPIO_PIN_RESET : GPIO_PIN_SET;
HAL_GPIO_WritePin(AS_close_SDC_GPIO_Port, AS_close_SDC_Pin, close_sdc_val);
// Reset old mission LED
setMissionLED(mission, GPIO_PIN_RESET);
mission = rxData.signals.as_mission;
setMissionLED(mission, GPIO_PIN_SET);
// Set ASB Error status
HAL_GPIO_WritePin(ASB_Error_GPIO_Port, ASB_Error_Pin, rxData.signals.asb_error);
} else if (rxHeader.StdId == CAN_ID_JETSON_RX) {
state = (rxData.raw[0] >> 3) & 0b111;
}
}
@ -362,4 +609,3 @@ void assert_failed(uint8_t *file, uint32_t line)
/* USER CODE END 6 */
}
#endif /* USE_FULL_ASSERT */

View File

@ -149,4 +149,3 @@ void HAL_CAN_MspDeInit(CAN_HandleTypeDef* hcan)
/* USER CODE BEGIN 1 */
/* USER CODE END 1 */

View File

@ -215,4 +215,3 @@ void USB_LP_CAN_RX0_IRQHandler(void)
/* USER CODE BEGIN 1 */
/* USER CODE END 1 */

View File

@ -0,0 +1,240 @@
/**
******************************************************************************
* @file stm32f3xx_hal_iwdg.h
* @author MCD Application Team
* @brief Header file of IWDG HAL module.
******************************************************************************
* @attention
*
* <h2><center>&copy; Copyright (c) 2016 STMicroelectronics.
* All rights reserved.</center></h2>
*
* This software component is licensed by ST under BSD 3-Clause license,
* the "License"; You may not use this file except in compliance with the
* License. You may obtain a copy of the License at:
* opensource.org/licenses/BSD-3-Clause
*
******************************************************************************
*/
/* Define to prevent recursive inclusion -------------------------------------*/
#ifndef STM32F3xx_HAL_IWDG_H
#define STM32F3xx_HAL_IWDG_H
#ifdef __cplusplus
extern "C" {
#endif
/* Includes ------------------------------------------------------------------*/
#include "stm32f3xx_hal_def.h"
/** @addtogroup STM32F3xx_HAL_Driver
* @{
*/
/** @defgroup IWDG IWDG
* @{
*/
/* Exported types ------------------------------------------------------------*/
/** @defgroup IWDG_Exported_Types IWDG Exported Types
* @{
*/
/**
* @brief IWDG Init structure definition
*/
typedef struct
{
uint32_t Prescaler; /*!< Select the prescaler of the IWDG.
This parameter can be a value of @ref IWDG_Prescaler */
uint32_t Reload; /*!< Specifies the IWDG down-counter reload value.
This parameter must be a number between Min_Data = 0 and Max_Data = 0x0FFF */
uint32_t Window; /*!< Specifies the window value to be compared to the down-counter.
This parameter must be a number between Min_Data = 0 and Max_Data = 0x0FFF */
} IWDG_InitTypeDef;
/**
* @brief IWDG Handle Structure definition
*/
typedef struct
{
IWDG_TypeDef *Instance; /*!< Register base address */
IWDG_InitTypeDef Init; /*!< IWDG required parameters */
} IWDG_HandleTypeDef;
/**
* @}
*/
/* Exported constants --------------------------------------------------------*/
/** @defgroup IWDG_Exported_Constants IWDG Exported Constants
* @{
*/
/** @defgroup IWDG_Prescaler IWDG Prescaler
* @{
*/
#define IWDG_PRESCALER_4 0x00000000u /*!< IWDG prescaler set to 4 */
#define IWDG_PRESCALER_8 IWDG_PR_PR_0 /*!< IWDG prescaler set to 8 */
#define IWDG_PRESCALER_16 IWDG_PR_PR_1 /*!< IWDG prescaler set to 16 */
#define IWDG_PRESCALER_32 (IWDG_PR_PR_1 | IWDG_PR_PR_0) /*!< IWDG prescaler set to 32 */
#define IWDG_PRESCALER_64 IWDG_PR_PR_2 /*!< IWDG prescaler set to 64 */
#define IWDG_PRESCALER_128 (IWDG_PR_PR_2 | IWDG_PR_PR_0) /*!< IWDG prescaler set to 128 */
#define IWDG_PRESCALER_256 (IWDG_PR_PR_2 | IWDG_PR_PR_1) /*!< IWDG prescaler set to 256 */
/**
* @}
*/
/** @defgroup IWDG_Window_option IWDG Window option
* @{
*/
#define IWDG_WINDOW_DISABLE IWDG_WINR_WIN
/**
* @}
*/
/**
* @}
*/
/* Exported macros -----------------------------------------------------------*/
/** @defgroup IWDG_Exported_Macros IWDG Exported Macros
* @{
*/
/**
* @brief Enable the IWDG peripheral.
* @param __HANDLE__ IWDG handle
* @retval None
*/
#define __HAL_IWDG_START(__HANDLE__) WRITE_REG((__HANDLE__)->Instance->KR, IWDG_KEY_ENABLE)
/**
* @brief Reload IWDG counter with value defined in the reload register
* (write access to IWDG_PR, IWDG_RLR and IWDG_WINR registers disabled).
* @param __HANDLE__ IWDG handle
* @retval None
*/
#define __HAL_IWDG_RELOAD_COUNTER(__HANDLE__) WRITE_REG((__HANDLE__)->Instance->KR, IWDG_KEY_RELOAD)
/**
* @}
*/
/* Exported functions --------------------------------------------------------*/
/** @defgroup IWDG_Exported_Functions IWDG Exported Functions
* @{
*/
/** @defgroup IWDG_Exported_Functions_Group1 Initialization and Start functions
* @{
*/
/* Initialization/Start functions ********************************************/
HAL_StatusTypeDef HAL_IWDG_Init(IWDG_HandleTypeDef *hiwdg);
/**
* @}
*/
/** @defgroup IWDG_Exported_Functions_Group2 IO operation functions
* @{
*/
/* I/O operation functions ****************************************************/
HAL_StatusTypeDef HAL_IWDG_Refresh(IWDG_HandleTypeDef *hiwdg);
/**
* @}
*/
/**
* @}
*/
/* Private constants ---------------------------------------------------------*/
/** @defgroup IWDG_Private_Constants IWDG Private Constants
* @{
*/
/**
* @brief IWDG Key Register BitMask
*/
#define IWDG_KEY_RELOAD 0x0000AAAAu /*!< IWDG Reload Counter Enable */
#define IWDG_KEY_ENABLE 0x0000CCCCu /*!< IWDG Peripheral Enable */
#define IWDG_KEY_WRITE_ACCESS_ENABLE 0x00005555u /*!< IWDG KR Write Access Enable */
#define IWDG_KEY_WRITE_ACCESS_DISABLE 0x00000000u /*!< IWDG KR Write Access Disable */
/**
* @}
*/
/* Private macros ------------------------------------------------------------*/
/** @defgroup IWDG_Private_Macros IWDG Private Macros
* @{
*/
/**
* @brief Enable write access to IWDG_PR, IWDG_RLR and IWDG_WINR registers.
* @param __HANDLE__ IWDG handle
* @retval None
*/
#define IWDG_ENABLE_WRITE_ACCESS(__HANDLE__) WRITE_REG((__HANDLE__)->Instance->KR, IWDG_KEY_WRITE_ACCESS_ENABLE)
/**
* @brief Disable write access to IWDG_PR, IWDG_RLR and IWDG_WINR registers.
* @param __HANDLE__ IWDG handle
* @retval None
*/
#define IWDG_DISABLE_WRITE_ACCESS(__HANDLE__) WRITE_REG((__HANDLE__)->Instance->KR, IWDG_KEY_WRITE_ACCESS_DISABLE)
/**
* @brief Check IWDG prescaler value.
* @param __PRESCALER__ IWDG prescaler value
* @retval None
*/
#define IS_IWDG_PRESCALER(__PRESCALER__) (((__PRESCALER__) == IWDG_PRESCALER_4) || \
((__PRESCALER__) == IWDG_PRESCALER_8) || \
((__PRESCALER__) == IWDG_PRESCALER_16) || \
((__PRESCALER__) == IWDG_PRESCALER_32) || \
((__PRESCALER__) == IWDG_PRESCALER_64) || \
((__PRESCALER__) == IWDG_PRESCALER_128)|| \
((__PRESCALER__) == IWDG_PRESCALER_256))
/**
* @brief Check IWDG reload value.
* @param __RELOAD__ IWDG reload value
* @retval None
*/
#define IS_IWDG_RELOAD(__RELOAD__) ((__RELOAD__) <= IWDG_RLR_RL)
/**
* @brief Check IWDG window value.
* @param __WINDOW__ IWDG window value
* @retval None
*/
#define IS_IWDG_WINDOW(__WINDOW__) ((__WINDOW__) <= IWDG_WINR_WIN)
/**
* @}
*/
/**
* @}
*/
/**
* @}
*/
#ifdef __cplusplus
}
#endif
#endif /* STM32F3xx_HAL_IWDG_H */
/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/

File diff suppressed because it is too large Load Diff

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@ -0,0 +1,640 @@
/**
******************************************************************************
* @file stm32f3xx_ll_cortex.h
* @author MCD Application Team
* @brief Header file of CORTEX LL module.
@verbatim
==============================================================================
##### How to use this driver #####
==============================================================================
[..]
The LL CORTEX driver contains a set of generic APIs that can be
used by user:
(+) SYSTICK configuration used by LL_mDelay and LL_Init1msTick
functions
(+) Low power mode configuration (SCB register of Cortex-MCU)
(+) MPU API to configure and enable regions
(MPU services provided only on some devices)
(+) API to access to MCU info (CPUID register)
(+) API to enable fault handler (SHCSR accesses)
@endverbatim
******************************************************************************
* @attention
*
* <h2><center>&copy; Copyright (c) 2016 STMicroelectronics.
* All rights reserved.</center></h2>
*
* This software component is licensed by ST under BSD 3-Clause license,
* the "License"; You may not use this file except in compliance with the
* License. You may obtain a copy of the License at:
* opensource.org/licenses/BSD-3-Clause
*
******************************************************************************
*/
/* Define to prevent recursive inclusion -------------------------------------*/
#ifndef __STM32F3xx_LL_CORTEX_H
#define __STM32F3xx_LL_CORTEX_H
#ifdef __cplusplus
extern "C" {
#endif
/* Includes ------------------------------------------------------------------*/
#include "stm32f3xx.h"
/** @addtogroup STM32F3xx_LL_Driver
* @{
*/
/** @defgroup CORTEX_LL CORTEX
* @{
*/
/* Private types -------------------------------------------------------------*/
/* Private variables ---------------------------------------------------------*/
/* Private constants ---------------------------------------------------------*/
/* Private macros ------------------------------------------------------------*/
/* Exported types ------------------------------------------------------------*/
/* Exported constants --------------------------------------------------------*/
/** @defgroup CORTEX_LL_Exported_Constants CORTEX Exported Constants
* @{
*/
/** @defgroup CORTEX_LL_EC_CLKSOURCE_HCLK SYSTICK Clock Source
* @{
*/
#define LL_SYSTICK_CLKSOURCE_HCLK_DIV8 0x00000000U /*!< AHB clock divided by 8 selected as SysTick clock source.*/
#define LL_SYSTICK_CLKSOURCE_HCLK SysTick_CTRL_CLKSOURCE_Msk /*!< AHB clock selected as SysTick clock source. */
/**
* @}
*/
/** @defgroup CORTEX_LL_EC_FAULT Handler Fault type
* @{
*/
#define LL_HANDLER_FAULT_USG SCB_SHCSR_USGFAULTENA_Msk /*!< Usage fault */
#define LL_HANDLER_FAULT_BUS SCB_SHCSR_BUSFAULTENA_Msk /*!< Bus fault */
#define LL_HANDLER_FAULT_MEM SCB_SHCSR_MEMFAULTENA_Msk /*!< Memory management fault */
/**
* @}
*/
#if __MPU_PRESENT
/** @defgroup CORTEX_LL_EC_CTRL_HFNMI_PRIVDEF MPU Control
* @{
*/
#define LL_MPU_CTRL_HFNMI_PRIVDEF_NONE 0x00000000U /*!< Disable NMI and privileged SW access */
#define LL_MPU_CTRL_HARDFAULT_NMI MPU_CTRL_HFNMIENA_Msk /*!< Enables the operation of MPU during hard fault, NMI, and FAULTMASK handlers */
#define LL_MPU_CTRL_PRIVILEGED_DEFAULT MPU_CTRL_PRIVDEFENA_Msk /*!< Enable privileged software access to default memory map */
#define LL_MPU_CTRL_HFNMI_PRIVDEF (MPU_CTRL_HFNMIENA_Msk | MPU_CTRL_PRIVDEFENA_Msk) /*!< Enable NMI and privileged SW access */
/**
* @}
*/
/** @defgroup CORTEX_LL_EC_REGION MPU Region Number
* @{
*/
#define LL_MPU_REGION_NUMBER0 0x00U /*!< REGION Number 0 */
#define LL_MPU_REGION_NUMBER1 0x01U /*!< REGION Number 1 */
#define LL_MPU_REGION_NUMBER2 0x02U /*!< REGION Number 2 */
#define LL_MPU_REGION_NUMBER3 0x03U /*!< REGION Number 3 */
#define LL_MPU_REGION_NUMBER4 0x04U /*!< REGION Number 4 */
#define LL_MPU_REGION_NUMBER5 0x05U /*!< REGION Number 5 */
#define LL_MPU_REGION_NUMBER6 0x06U /*!< REGION Number 6 */
#define LL_MPU_REGION_NUMBER7 0x07U /*!< REGION Number 7 */
/**
* @}
*/
/** @defgroup CORTEX_LL_EC_REGION_SIZE MPU Region Size
* @{
*/
#define LL_MPU_REGION_SIZE_32B (0x04U << MPU_RASR_SIZE_Pos) /*!< 32B Size of the MPU protection region */
#define LL_MPU_REGION_SIZE_64B (0x05U << MPU_RASR_SIZE_Pos) /*!< 64B Size of the MPU protection region */
#define LL_MPU_REGION_SIZE_128B (0x06U << MPU_RASR_SIZE_Pos) /*!< 128B Size of the MPU protection region */
#define LL_MPU_REGION_SIZE_256B (0x07U << MPU_RASR_SIZE_Pos) /*!< 256B Size of the MPU protection region */
#define LL_MPU_REGION_SIZE_512B (0x08U << MPU_RASR_SIZE_Pos) /*!< 512B Size of the MPU protection region */
#define LL_MPU_REGION_SIZE_1KB (0x09U << MPU_RASR_SIZE_Pos) /*!< 1KB Size of the MPU protection region */
#define LL_MPU_REGION_SIZE_2KB (0x0AU << MPU_RASR_SIZE_Pos) /*!< 2KB Size of the MPU protection region */
#define LL_MPU_REGION_SIZE_4KB (0x0BU << MPU_RASR_SIZE_Pos) /*!< 4KB Size of the MPU protection region */
#define LL_MPU_REGION_SIZE_8KB (0x0CU << MPU_RASR_SIZE_Pos) /*!< 8KB Size of the MPU protection region */
#define LL_MPU_REGION_SIZE_16KB (0x0DU << MPU_RASR_SIZE_Pos) /*!< 16KB Size of the MPU protection region */
#define LL_MPU_REGION_SIZE_32KB (0x0EU << MPU_RASR_SIZE_Pos) /*!< 32KB Size of the MPU protection region */
#define LL_MPU_REGION_SIZE_64KB (0x0FU << MPU_RASR_SIZE_Pos) /*!< 64KB Size of the MPU protection region */
#define LL_MPU_REGION_SIZE_128KB (0x10U << MPU_RASR_SIZE_Pos) /*!< 128KB Size of the MPU protection region */
#define LL_MPU_REGION_SIZE_256KB (0x11U << MPU_RASR_SIZE_Pos) /*!< 256KB Size of the MPU protection region */
#define LL_MPU_REGION_SIZE_512KB (0x12U << MPU_RASR_SIZE_Pos) /*!< 512KB Size of the MPU protection region */
#define LL_MPU_REGION_SIZE_1MB (0x13U << MPU_RASR_SIZE_Pos) /*!< 1MB Size of the MPU protection region */
#define LL_MPU_REGION_SIZE_2MB (0x14U << MPU_RASR_SIZE_Pos) /*!< 2MB Size of the MPU protection region */
#define LL_MPU_REGION_SIZE_4MB (0x15U << MPU_RASR_SIZE_Pos) /*!< 4MB Size of the MPU protection region */
#define LL_MPU_REGION_SIZE_8MB (0x16U << MPU_RASR_SIZE_Pos) /*!< 8MB Size of the MPU protection region */
#define LL_MPU_REGION_SIZE_16MB (0x17U << MPU_RASR_SIZE_Pos) /*!< 16MB Size of the MPU protection region */
#define LL_MPU_REGION_SIZE_32MB (0x18U << MPU_RASR_SIZE_Pos) /*!< 32MB Size of the MPU protection region */
#define LL_MPU_REGION_SIZE_64MB (0x19U << MPU_RASR_SIZE_Pos) /*!< 64MB Size of the MPU protection region */
#define LL_MPU_REGION_SIZE_128MB (0x1AU << MPU_RASR_SIZE_Pos) /*!< 128MB Size of the MPU protection region */
#define LL_MPU_REGION_SIZE_256MB (0x1BU << MPU_RASR_SIZE_Pos) /*!< 256MB Size of the MPU protection region */
#define LL_MPU_REGION_SIZE_512MB (0x1CU << MPU_RASR_SIZE_Pos) /*!< 512MB Size of the MPU protection region */
#define LL_MPU_REGION_SIZE_1GB (0x1DU << MPU_RASR_SIZE_Pos) /*!< 1GB Size of the MPU protection region */
#define LL_MPU_REGION_SIZE_2GB (0x1EU << MPU_RASR_SIZE_Pos) /*!< 2GB Size of the MPU protection region */
#define LL_MPU_REGION_SIZE_4GB (0x1FU << MPU_RASR_SIZE_Pos) /*!< 4GB Size of the MPU protection region */
/**
* @}
*/
/** @defgroup CORTEX_LL_EC_REGION_PRIVILEDGES MPU Region Privileges
* @{
*/
#define LL_MPU_REGION_NO_ACCESS (0x00U << MPU_RASR_AP_Pos) /*!< No access*/
#define LL_MPU_REGION_PRIV_RW (0x01U << MPU_RASR_AP_Pos) /*!< RW privileged (privileged access only)*/
#define LL_MPU_REGION_PRIV_RW_URO (0x02U << MPU_RASR_AP_Pos) /*!< RW privileged - RO user (Write in a user program generates a fault) */
#define LL_MPU_REGION_FULL_ACCESS (0x03U << MPU_RASR_AP_Pos) /*!< RW privileged & user (Full access) */
#define LL_MPU_REGION_PRIV_RO (0x05U << MPU_RASR_AP_Pos) /*!< RO privileged (privileged read only)*/
#define LL_MPU_REGION_PRIV_RO_URO (0x06U << MPU_RASR_AP_Pos) /*!< RO privileged & user (read only) */
/**
* @}
*/
/** @defgroup CORTEX_LL_EC_TEX MPU TEX Level
* @{
*/
#define LL_MPU_TEX_LEVEL0 (0x00U << MPU_RASR_TEX_Pos) /*!< b000 for TEX bits */
#define LL_MPU_TEX_LEVEL1 (0x01U << MPU_RASR_TEX_Pos) /*!< b001 for TEX bits */
#define LL_MPU_TEX_LEVEL2 (0x02U << MPU_RASR_TEX_Pos) /*!< b010 for TEX bits */
#define LL_MPU_TEX_LEVEL4 (0x04U << MPU_RASR_TEX_Pos) /*!< b100 for TEX bits */
/**
* @}
*/
/** @defgroup CORTEX_LL_EC_INSTRUCTION_ACCESS MPU Instruction Access
* @{
*/
#define LL_MPU_INSTRUCTION_ACCESS_ENABLE 0x00U /*!< Instruction fetches enabled */
#define LL_MPU_INSTRUCTION_ACCESS_DISABLE MPU_RASR_XN_Msk /*!< Instruction fetches disabled*/
/**
* @}
*/
/** @defgroup CORTEX_LL_EC_SHAREABLE_ACCESS MPU Shareable Access
* @{
*/
#define LL_MPU_ACCESS_SHAREABLE MPU_RASR_S_Msk /*!< Shareable memory attribute */
#define LL_MPU_ACCESS_NOT_SHAREABLE 0x00U /*!< Not Shareable memory attribute */
/**
* @}
*/
/** @defgroup CORTEX_LL_EC_CACHEABLE_ACCESS MPU Cacheable Access
* @{
*/
#define LL_MPU_ACCESS_CACHEABLE MPU_RASR_C_Msk /*!< Cacheable memory attribute */
#define LL_MPU_ACCESS_NOT_CACHEABLE 0x00U /*!< Not Cacheable memory attribute */
/**
* @}
*/
/** @defgroup CORTEX_LL_EC_BUFFERABLE_ACCESS MPU Bufferable Access
* @{
*/
#define LL_MPU_ACCESS_BUFFERABLE MPU_RASR_B_Msk /*!< Bufferable memory attribute */
#define LL_MPU_ACCESS_NOT_BUFFERABLE 0x00U /*!< Not Bufferable memory attribute */
/**
* @}
*/
#endif /* __MPU_PRESENT */
/**
* @}
*/
/* Exported macro ------------------------------------------------------------*/
/* Exported functions --------------------------------------------------------*/
/** @defgroup CORTEX_LL_Exported_Functions CORTEX Exported Functions
* @{
*/
/** @defgroup CORTEX_LL_EF_SYSTICK SYSTICK
* @{
*/
/**
* @brief This function checks if the Systick counter flag is active or not.
* @note It can be used in timeout function on application side.
* @rmtoll STK_CTRL COUNTFLAG LL_SYSTICK_IsActiveCounterFlag
* @retval State of bit (1 or 0).
*/
__STATIC_INLINE uint32_t LL_SYSTICK_IsActiveCounterFlag(void)
{
return ((SysTick->CTRL & SysTick_CTRL_COUNTFLAG_Msk) == (SysTick_CTRL_COUNTFLAG_Msk));
}
/**
* @brief Configures the SysTick clock source
* @rmtoll STK_CTRL CLKSOURCE LL_SYSTICK_SetClkSource
* @param Source This parameter can be one of the following values:
* @arg @ref LL_SYSTICK_CLKSOURCE_HCLK_DIV8
* @arg @ref LL_SYSTICK_CLKSOURCE_HCLK
* @retval None
*/
__STATIC_INLINE void LL_SYSTICK_SetClkSource(uint32_t Source)
{
if (Source == LL_SYSTICK_CLKSOURCE_HCLK)
{
SET_BIT(SysTick->CTRL, LL_SYSTICK_CLKSOURCE_HCLK);
}
else
{
CLEAR_BIT(SysTick->CTRL, LL_SYSTICK_CLKSOURCE_HCLK);
}
}
/**
* @brief Get the SysTick clock source
* @rmtoll STK_CTRL CLKSOURCE LL_SYSTICK_GetClkSource
* @retval Returned value can be one of the following values:
* @arg @ref LL_SYSTICK_CLKSOURCE_HCLK_DIV8
* @arg @ref LL_SYSTICK_CLKSOURCE_HCLK
*/
__STATIC_INLINE uint32_t LL_SYSTICK_GetClkSource(void)
{
return READ_BIT(SysTick->CTRL, LL_SYSTICK_CLKSOURCE_HCLK);
}
/**
* @brief Enable SysTick exception request
* @rmtoll STK_CTRL TICKINT LL_SYSTICK_EnableIT
* @retval None
*/
__STATIC_INLINE void LL_SYSTICK_EnableIT(void)
{
SET_BIT(SysTick->CTRL, SysTick_CTRL_TICKINT_Msk);
}
/**
* @brief Disable SysTick exception request
* @rmtoll STK_CTRL TICKINT LL_SYSTICK_DisableIT
* @retval None
*/
__STATIC_INLINE void LL_SYSTICK_DisableIT(void)
{
CLEAR_BIT(SysTick->CTRL, SysTick_CTRL_TICKINT_Msk);
}
/**
* @brief Checks if the SYSTICK interrupt is enabled or disabled.
* @rmtoll STK_CTRL TICKINT LL_SYSTICK_IsEnabledIT
* @retval State of bit (1 or 0).
*/
__STATIC_INLINE uint32_t LL_SYSTICK_IsEnabledIT(void)
{
return (READ_BIT(SysTick->CTRL, SysTick_CTRL_TICKINT_Msk) == (SysTick_CTRL_TICKINT_Msk));
}
/**
* @}
*/
/** @defgroup CORTEX_LL_EF_LOW_POWER_MODE LOW POWER MODE
* @{
*/
/**
* @brief Processor uses sleep as its low power mode
* @rmtoll SCB_SCR SLEEPDEEP LL_LPM_EnableSleep
* @retval None
*/
__STATIC_INLINE void LL_LPM_EnableSleep(void)
{
/* Clear SLEEPDEEP bit of Cortex System Control Register */
CLEAR_BIT(SCB->SCR, ((uint32_t)SCB_SCR_SLEEPDEEP_Msk));
}
/**
* @brief Processor uses deep sleep as its low power mode
* @rmtoll SCB_SCR SLEEPDEEP LL_LPM_EnableDeepSleep
* @retval None
*/
__STATIC_INLINE void LL_LPM_EnableDeepSleep(void)
{
/* Set SLEEPDEEP bit of Cortex System Control Register */
SET_BIT(SCB->SCR, ((uint32_t)SCB_SCR_SLEEPDEEP_Msk));
}
/**
* @brief Configures sleep-on-exit when returning from Handler mode to Thread mode.
* @note Setting this bit to 1 enables an interrupt-driven application to avoid returning to an
* empty main application.
* @rmtoll SCB_SCR SLEEPONEXIT LL_LPM_EnableSleepOnExit
* @retval None
*/
__STATIC_INLINE void LL_LPM_EnableSleepOnExit(void)
{
/* Set SLEEPONEXIT bit of Cortex System Control Register */
SET_BIT(SCB->SCR, ((uint32_t)SCB_SCR_SLEEPONEXIT_Msk));
}
/**
* @brief Do not sleep when returning to Thread mode.
* @rmtoll SCB_SCR SLEEPONEXIT LL_LPM_DisableSleepOnExit
* @retval None
*/
__STATIC_INLINE void LL_LPM_DisableSleepOnExit(void)
{
/* Clear SLEEPONEXIT bit of Cortex System Control Register */
CLEAR_BIT(SCB->SCR, ((uint32_t)SCB_SCR_SLEEPONEXIT_Msk));
}
/**
* @brief Enabled events and all interrupts, including disabled interrupts, can wakeup the
* processor.
* @rmtoll SCB_SCR SEVEONPEND LL_LPM_EnableEventOnPend
* @retval None
*/
__STATIC_INLINE void LL_LPM_EnableEventOnPend(void)
{
/* Set SEVEONPEND bit of Cortex System Control Register */
SET_BIT(SCB->SCR, ((uint32_t)SCB_SCR_SEVONPEND_Msk));
}
/**
* @brief Only enabled interrupts or events can wakeup the processor, disabled interrupts are
* excluded
* @rmtoll SCB_SCR SEVEONPEND LL_LPM_DisableEventOnPend
* @retval None
*/
__STATIC_INLINE void LL_LPM_DisableEventOnPend(void)
{
/* Clear SEVEONPEND bit of Cortex System Control Register */
CLEAR_BIT(SCB->SCR, ((uint32_t)SCB_SCR_SEVONPEND_Msk));
}
/**
* @}
*/
/** @defgroup CORTEX_LL_EF_HANDLER HANDLER
* @{
*/
/**
* @brief Enable a fault in System handler control register (SHCSR)
* @rmtoll SCB_SHCSR MEMFAULTENA LL_HANDLER_EnableFault
* @param Fault This parameter can be a combination of the following values:
* @arg @ref LL_HANDLER_FAULT_USG
* @arg @ref LL_HANDLER_FAULT_BUS
* @arg @ref LL_HANDLER_FAULT_MEM
* @retval None
*/
__STATIC_INLINE void LL_HANDLER_EnableFault(uint32_t Fault)
{
/* Enable the system handler fault */
SET_BIT(SCB->SHCSR, Fault);
}
/**
* @brief Disable a fault in System handler control register (SHCSR)
* @rmtoll SCB_SHCSR MEMFAULTENA LL_HANDLER_DisableFault
* @param Fault This parameter can be a combination of the following values:
* @arg @ref LL_HANDLER_FAULT_USG
* @arg @ref LL_HANDLER_FAULT_BUS
* @arg @ref LL_HANDLER_FAULT_MEM
* @retval None
*/
__STATIC_INLINE void LL_HANDLER_DisableFault(uint32_t Fault)
{
/* Disable the system handler fault */
CLEAR_BIT(SCB->SHCSR, Fault);
}
/**
* @}
*/
/** @defgroup CORTEX_LL_EF_MCU_INFO MCU INFO
* @{
*/
/**
* @brief Get Implementer code
* @rmtoll SCB_CPUID IMPLEMENTER LL_CPUID_GetImplementer
* @retval Value should be equal to 0x41 for ARM
*/
__STATIC_INLINE uint32_t LL_CPUID_GetImplementer(void)
{
return (uint32_t)(READ_BIT(SCB->CPUID, SCB_CPUID_IMPLEMENTER_Msk) >> SCB_CPUID_IMPLEMENTER_Pos);
}
/**
* @brief Get Variant number (The r value in the rnpn product revision identifier)
* @rmtoll SCB_CPUID VARIANT LL_CPUID_GetVariant
* @retval Value between 0 and 255 (0x0: revision 0)
*/
__STATIC_INLINE uint32_t LL_CPUID_GetVariant(void)
{
return (uint32_t)(READ_BIT(SCB->CPUID, SCB_CPUID_VARIANT_Msk) >> SCB_CPUID_VARIANT_Pos);
}
/**
* @brief Get Constant number
* @rmtoll SCB_CPUID ARCHITECTURE LL_CPUID_GetConstant
* @retval Value should be equal to 0xF for Cortex-M4 devices
*/
__STATIC_INLINE uint32_t LL_CPUID_GetConstant(void)
{
return (uint32_t)(READ_BIT(SCB->CPUID, SCB_CPUID_ARCHITECTURE_Msk) >> SCB_CPUID_ARCHITECTURE_Pos);
}
/**
* @brief Get Part number
* @rmtoll SCB_CPUID PARTNO LL_CPUID_GetParNo
* @retval Value should be equal to 0xC24 for Cortex-M4
*/
__STATIC_INLINE uint32_t LL_CPUID_GetParNo(void)
{
return (uint32_t)(READ_BIT(SCB->CPUID, SCB_CPUID_PARTNO_Msk) >> SCB_CPUID_PARTNO_Pos);
}
/**
* @brief Get Revision number (The p value in the rnpn product revision identifier, indicates patch release)
* @rmtoll SCB_CPUID REVISION LL_CPUID_GetRevision
* @retval Value between 0 and 255 (0x1: patch 1)
*/
__STATIC_INLINE uint32_t LL_CPUID_GetRevision(void)
{
return (uint32_t)(READ_BIT(SCB->CPUID, SCB_CPUID_REVISION_Msk) >> SCB_CPUID_REVISION_Pos);
}
/**
* @}
*/
#if __MPU_PRESENT
/** @defgroup CORTEX_LL_EF_MPU MPU
* @{
*/
/**
* @brief Enable MPU with input options
* @rmtoll MPU_CTRL ENABLE LL_MPU_Enable
* @param Options This parameter can be one of the following values:
* @arg @ref LL_MPU_CTRL_HFNMI_PRIVDEF_NONE
* @arg @ref LL_MPU_CTRL_HARDFAULT_NMI
* @arg @ref LL_MPU_CTRL_PRIVILEGED_DEFAULT
* @arg @ref LL_MPU_CTRL_HFNMI_PRIVDEF
* @retval None
*/
__STATIC_INLINE void LL_MPU_Enable(uint32_t Options)
{
/* Enable the MPU*/
WRITE_REG(MPU->CTRL, (MPU_CTRL_ENABLE_Msk | Options));
/* Ensure MPU settings take effects */
__DSB();
/* Sequence instruction fetches using update settings */
__ISB();
}
/**
* @brief Disable MPU
* @rmtoll MPU_CTRL ENABLE LL_MPU_Disable
* @retval None
*/
__STATIC_INLINE void LL_MPU_Disable(void)
{
/* Make sure outstanding transfers are done */
__DMB();
/* Disable MPU*/
WRITE_REG(MPU->CTRL, 0U);
}
/**
* @brief Check if MPU is enabled or not
* @rmtoll MPU_CTRL ENABLE LL_MPU_IsEnabled
* @retval State of bit (1 or 0).
*/
__STATIC_INLINE uint32_t LL_MPU_IsEnabled(void)
{
return (READ_BIT(MPU->CTRL, MPU_CTRL_ENABLE_Msk) == (MPU_CTRL_ENABLE_Msk));
}
/**
* @brief Enable a MPU region
* @rmtoll MPU_RASR ENABLE LL_MPU_EnableRegion
* @param Region This parameter can be one of the following values:
* @arg @ref LL_MPU_REGION_NUMBER0
* @arg @ref LL_MPU_REGION_NUMBER1
* @arg @ref LL_MPU_REGION_NUMBER2
* @arg @ref LL_MPU_REGION_NUMBER3
* @arg @ref LL_MPU_REGION_NUMBER4
* @arg @ref LL_MPU_REGION_NUMBER5
* @arg @ref LL_MPU_REGION_NUMBER6
* @arg @ref LL_MPU_REGION_NUMBER7
* @retval None
*/
__STATIC_INLINE void LL_MPU_EnableRegion(uint32_t Region)
{
/* Set Region number */
WRITE_REG(MPU->RNR, Region);
/* Enable the MPU region */
SET_BIT(MPU->RASR, MPU_RASR_ENABLE_Msk);
}
/**
* @brief Configure and enable a region
* @rmtoll MPU_RNR REGION LL_MPU_ConfigRegion\n
* MPU_RBAR REGION LL_MPU_ConfigRegion\n
* MPU_RBAR ADDR LL_MPU_ConfigRegion\n
* MPU_RASR XN LL_MPU_ConfigRegion\n
* MPU_RASR AP LL_MPU_ConfigRegion\n
* MPU_RASR S LL_MPU_ConfigRegion\n
* MPU_RASR C LL_MPU_ConfigRegion\n
* MPU_RASR B LL_MPU_ConfigRegion\n
* MPU_RASR SIZE LL_MPU_ConfigRegion
* @param Region This parameter can be one of the following values:
* @arg @ref LL_MPU_REGION_NUMBER0
* @arg @ref LL_MPU_REGION_NUMBER1
* @arg @ref LL_MPU_REGION_NUMBER2
* @arg @ref LL_MPU_REGION_NUMBER3
* @arg @ref LL_MPU_REGION_NUMBER4
* @arg @ref LL_MPU_REGION_NUMBER5
* @arg @ref LL_MPU_REGION_NUMBER6
* @arg @ref LL_MPU_REGION_NUMBER7
* @param Address Value of region base address
* @param SubRegionDisable Sub-region disable value between Min_Data = 0x00 and Max_Data = 0xFF
* @param Attributes This parameter can be a combination of the following values:
* @arg @ref LL_MPU_REGION_SIZE_32B or @ref LL_MPU_REGION_SIZE_64B or @ref LL_MPU_REGION_SIZE_128B or @ref LL_MPU_REGION_SIZE_256B or @ref LL_MPU_REGION_SIZE_512B
* or @ref LL_MPU_REGION_SIZE_1KB or @ref LL_MPU_REGION_SIZE_2KB or @ref LL_MPU_REGION_SIZE_4KB or @ref LL_MPU_REGION_SIZE_8KB or @ref LL_MPU_REGION_SIZE_16KB
* or @ref LL_MPU_REGION_SIZE_32KB or @ref LL_MPU_REGION_SIZE_64KB or @ref LL_MPU_REGION_SIZE_128KB or @ref LL_MPU_REGION_SIZE_256KB or @ref LL_MPU_REGION_SIZE_512KB
* or @ref LL_MPU_REGION_SIZE_1MB or @ref LL_MPU_REGION_SIZE_2MB or @ref LL_MPU_REGION_SIZE_4MB or @ref LL_MPU_REGION_SIZE_8MB or @ref LL_MPU_REGION_SIZE_16MB
* or @ref LL_MPU_REGION_SIZE_32MB or @ref LL_MPU_REGION_SIZE_64MB or @ref LL_MPU_REGION_SIZE_128MB or @ref LL_MPU_REGION_SIZE_256MB or @ref LL_MPU_REGION_SIZE_512MB
* or @ref LL_MPU_REGION_SIZE_1GB or @ref LL_MPU_REGION_SIZE_2GB or @ref LL_MPU_REGION_SIZE_4GB
* @arg @ref LL_MPU_REGION_NO_ACCESS or @ref LL_MPU_REGION_PRIV_RW or @ref LL_MPU_REGION_PRIV_RW_URO or @ref LL_MPU_REGION_FULL_ACCESS
* or @ref LL_MPU_REGION_PRIV_RO or @ref LL_MPU_REGION_PRIV_RO_URO
* @arg @ref LL_MPU_TEX_LEVEL0 or @ref LL_MPU_TEX_LEVEL1 or @ref LL_MPU_TEX_LEVEL2 or @ref LL_MPU_TEX_LEVEL4
* @arg @ref LL_MPU_INSTRUCTION_ACCESS_ENABLE or @ref LL_MPU_INSTRUCTION_ACCESS_DISABLE
* @arg @ref LL_MPU_ACCESS_SHAREABLE or @ref LL_MPU_ACCESS_NOT_SHAREABLE
* @arg @ref LL_MPU_ACCESS_CACHEABLE or @ref LL_MPU_ACCESS_NOT_CACHEABLE
* @arg @ref LL_MPU_ACCESS_BUFFERABLE or @ref LL_MPU_ACCESS_NOT_BUFFERABLE
* @retval None
*/
__STATIC_INLINE void LL_MPU_ConfigRegion(uint32_t Region, uint32_t SubRegionDisable, uint32_t Address, uint32_t Attributes)
{
/* Set Region number */
WRITE_REG(MPU->RNR, Region);
/* Set base address */
WRITE_REG(MPU->RBAR, (Address & 0xFFFFFFE0U));
/* Configure MPU */
WRITE_REG(MPU->RASR, (MPU_RASR_ENABLE_Msk | Attributes | SubRegionDisable << MPU_RASR_SRD_Pos));
}
/**
* @brief Disable a region
* @rmtoll MPU_RNR REGION LL_MPU_DisableRegion\n
* MPU_RASR ENABLE LL_MPU_DisableRegion
* @param Region This parameter can be one of the following values:
* @arg @ref LL_MPU_REGION_NUMBER0
* @arg @ref LL_MPU_REGION_NUMBER1
* @arg @ref LL_MPU_REGION_NUMBER2
* @arg @ref LL_MPU_REGION_NUMBER3
* @arg @ref LL_MPU_REGION_NUMBER4
* @arg @ref LL_MPU_REGION_NUMBER5
* @arg @ref LL_MPU_REGION_NUMBER6
* @arg @ref LL_MPU_REGION_NUMBER7
* @retval None
*/
__STATIC_INLINE void LL_MPU_DisableRegion(uint32_t Region)
{
/* Set Region number */
WRITE_REG(MPU->RNR, Region);
/* Disable the MPU region */
CLEAR_BIT(MPU->RASR, MPU_RASR_ENABLE_Msk);
}
/**
* @}
*/
#endif /* __MPU_PRESENT */
/**
* @}
*/
/**
* @}
*/
/**
* @}
*/
#ifdef __cplusplus
}
#endif
#endif /* __STM32F3xx_LL_CORTEX_H */
/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/

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/**
******************************************************************************
* @file stm32f3xx_ll_gpio.h
* @author MCD Application Team
* @brief Header file of GPIO LL module.
******************************************************************************
* @attention
*
* <h2><center>&copy; Copyright (c) 2016 STMicroelectronics.
* All rights reserved.</center></h2>
*
* This software component is licensed by ST under BSD 3-Clause license,
* the "License"; You may not use this file except in compliance with the
* License. You may obtain a copy of the License at:
* opensource.org/licenses/BSD-3-Clause
*
******************************************************************************
*/
/* Define to prevent recursive inclusion -------------------------------------*/
#ifndef __STM32F3xx_LL_GPIO_H
#define __STM32F3xx_LL_GPIO_H
#ifdef __cplusplus
extern "C" {
#endif
/* Includes ------------------------------------------------------------------*/
#include "stm32f3xx.h"
/** @addtogroup STM32F3xx_LL_Driver
* @{
*/
#if defined (GPIOA) || defined (GPIOB) || defined (GPIOC) || defined (GPIOD) || defined (GPIOE) || defined (GPIOF) || defined (GPIOG) || defined (GPIOH)
/** @defgroup GPIO_LL GPIO
* @{
*/
/* Private types -------------------------------------------------------------*/
/* Private variables ---------------------------------------------------------*/
/* Private constants ---------------------------------------------------------*/
/* Private macros ------------------------------------------------------------*/
#if defined(USE_FULL_LL_DRIVER)
/** @defgroup GPIO_LL_Private_Macros GPIO Private Macros
* @{
*/
/**
* @}
*/
#endif /*USE_FULL_LL_DRIVER*/
/* Exported types ------------------------------------------------------------*/
#if defined(USE_FULL_LL_DRIVER)
/** @defgroup GPIO_LL_ES_INIT GPIO Exported Init structures
* @{
*/
/**
* @brief LL GPIO Init Structure definition
*/
typedef struct
{
uint32_t Pin; /*!< Specifies the GPIO pins to be configured.
This parameter can be any value of @ref GPIO_LL_EC_PIN */
uint32_t Mode; /*!< Specifies the operating mode for the selected pins.
This parameter can be a value of @ref GPIO_LL_EC_MODE.
GPIO HW configuration can be modified afterwards using unitary function @ref LL_GPIO_SetPinMode().*/
uint32_t Speed; /*!< Specifies the speed for the selected pins.
This parameter can be a value of @ref GPIO_LL_EC_SPEED.
GPIO HW configuration can be modified afterwards using unitary function @ref LL_GPIO_SetPinSpeed().*/
uint32_t OutputType; /*!< Specifies the operating output type for the selected pins.
This parameter can be a value of @ref GPIO_LL_EC_OUTPUT.
GPIO HW configuration can be modified afterwards using unitary function @ref LL_GPIO_SetPinOutputType().*/
uint32_t Pull; /*!< Specifies the operating Pull-up/Pull down for the selected pins.
This parameter can be a value of @ref GPIO_LL_EC_PULL.
GPIO HW configuration can be modified afterwards using unitary function @ref LL_GPIO_SetPinPull().*/
uint32_t Alternate; /*!< Specifies the Peripheral to be connected to the selected pins.
This parameter can be a value of @ref GPIO_LL_EC_AF.
GPIO HW configuration can be modified afterwards using unitary function @ref LL_GPIO_SetAFPin_0_7() and LL_GPIO_SetAFPin_8_15().*/
} LL_GPIO_InitTypeDef;
/**
* @}
*/
#endif /* USE_FULL_LL_DRIVER */
/* Exported constants --------------------------------------------------------*/
/** @defgroup GPIO_LL_Exported_Constants GPIO Exported Constants
* @{
*/
/** @defgroup GPIO_LL_EC_PIN PIN
* @{
*/
#define LL_GPIO_PIN_0 GPIO_BSRR_BS_0 /*!< Select pin 0 */
#define LL_GPIO_PIN_1 GPIO_BSRR_BS_1 /*!< Select pin 1 */
#define LL_GPIO_PIN_2 GPIO_BSRR_BS_2 /*!< Select pin 2 */
#define LL_GPIO_PIN_3 GPIO_BSRR_BS_3 /*!< Select pin 3 */
#define LL_GPIO_PIN_4 GPIO_BSRR_BS_4 /*!< Select pin 4 */
#define LL_GPIO_PIN_5 GPIO_BSRR_BS_5 /*!< Select pin 5 */
#define LL_GPIO_PIN_6 GPIO_BSRR_BS_6 /*!< Select pin 6 */
#define LL_GPIO_PIN_7 GPIO_BSRR_BS_7 /*!< Select pin 7 */
#define LL_GPIO_PIN_8 GPIO_BSRR_BS_8 /*!< Select pin 8 */
#define LL_GPIO_PIN_9 GPIO_BSRR_BS_9 /*!< Select pin 9 */
#define LL_GPIO_PIN_10 GPIO_BSRR_BS_10 /*!< Select pin 10 */
#define LL_GPIO_PIN_11 GPIO_BSRR_BS_11 /*!< Select pin 11 */
#define LL_GPIO_PIN_12 GPIO_BSRR_BS_12 /*!< Select pin 12 */
#define LL_GPIO_PIN_13 GPIO_BSRR_BS_13 /*!< Select pin 13 */
#define LL_GPIO_PIN_14 GPIO_BSRR_BS_14 /*!< Select pin 14 */
#define LL_GPIO_PIN_15 GPIO_BSRR_BS_15 /*!< Select pin 15 */
#define LL_GPIO_PIN_ALL (GPIO_BSRR_BS_0 | GPIO_BSRR_BS_1 | GPIO_BSRR_BS_2 | \
GPIO_BSRR_BS_3 | GPIO_BSRR_BS_4 | GPIO_BSRR_BS_5 | \
GPIO_BSRR_BS_6 | GPIO_BSRR_BS_7 | GPIO_BSRR_BS_8 | \
GPIO_BSRR_BS_9 | GPIO_BSRR_BS_10 | GPIO_BSRR_BS_11 | \
GPIO_BSRR_BS_12 | GPIO_BSRR_BS_13 | GPIO_BSRR_BS_14 | \
GPIO_BSRR_BS_15) /*!< Select all pins */
/**
* @}
*/
/** @defgroup GPIO_LL_EC_MODE Mode
* @{
*/
#define LL_GPIO_MODE_INPUT (0x00000000U) /*!< Select input mode */
#define LL_GPIO_MODE_OUTPUT GPIO_MODER_MODER0_0 /*!< Select output mode */
#define LL_GPIO_MODE_ALTERNATE GPIO_MODER_MODER0_1 /*!< Select alternate function mode */
#define LL_GPIO_MODE_ANALOG GPIO_MODER_MODER0 /*!< Select analog mode */
/**
* @}
*/
/** @defgroup GPIO_LL_EC_OUTPUT Output Type
* @{
*/
#define LL_GPIO_OUTPUT_PUSHPULL (0x00000000U) /*!< Select push-pull as output type */
#define LL_GPIO_OUTPUT_OPENDRAIN GPIO_OTYPER_OT_0 /*!< Select open-drain as output type */
/**
* @}
*/
/** @defgroup GPIO_LL_EC_SPEED Output Speed
* @{
*/
#define LL_GPIO_SPEED_FREQ_LOW (0x00000000U) /*!< Select I/O low output speed */
#define LL_GPIO_SPEED_FREQ_MEDIUM GPIO_OSPEEDER_OSPEEDR0_0 /*!< Select I/O medium output speed */
#define LL_GPIO_SPEED_FREQ_HIGH GPIO_OSPEEDER_OSPEEDR0 /*!< Select I/O high output speed */
/**
* @}
*/
/** @defgroup GPIO_LL_EC_PULL Pull Up Pull Down
* @{
*/
#define LL_GPIO_PULL_NO (0x00000000U) /*!< Select I/O no pull */
#define LL_GPIO_PULL_UP GPIO_PUPDR_PUPDR0_0 /*!< Select I/O pull up */
#define LL_GPIO_PULL_DOWN GPIO_PUPDR_PUPDR0_1 /*!< Select I/O pull down */
/**
* @}
*/
/** @defgroup GPIO_LL_EC_AF Alternate Function
* @{
*/
#define LL_GPIO_AF_0 (0x0000000U) /*!< Select alternate function 0 */
#define LL_GPIO_AF_1 (0x0000001U) /*!< Select alternate function 1 */
#define LL_GPIO_AF_2 (0x0000002U) /*!< Select alternate function 2 */
#define LL_GPIO_AF_3 (0x0000003U) /*!< Select alternate function 3 */
#define LL_GPIO_AF_4 (0x0000004U) /*!< Select alternate function 4 */
#define LL_GPIO_AF_5 (0x0000005U) /*!< Select alternate function 5 */
#define LL_GPIO_AF_6 (0x0000006U) /*!< Select alternate function 6 */
#define LL_GPIO_AF_7 (0x0000007U) /*!< Select alternate function 7 */
#define LL_GPIO_AF_8 (0x0000008U) /*!< Select alternate function 8 */
#define LL_GPIO_AF_9 (0x0000009U) /*!< Select alternate function 9 */
#define LL_GPIO_AF_10 (0x000000AU) /*!< Select alternate function 10 */
#define LL_GPIO_AF_11 (0x000000BU) /*!< Select alternate function 11 */
#define LL_GPIO_AF_12 (0x000000CU) /*!< Select alternate function 12 */
#define LL_GPIO_AF_13 (0x000000DU) /*!< Select alternate function 13 */
#define LL_GPIO_AF_14 (0x000000EU) /*!< Select alternate function 14 */
#define LL_GPIO_AF_15 (0x000000FU) /*!< Select alternate function 15 */
/**
* @}
*/
/**
* @}
*/
/* Exported macro ------------------------------------------------------------*/
/** @defgroup GPIO_LL_Exported_Macros GPIO Exported Macros
* @{
*/
/** @defgroup GPIO_LL_EM_WRITE_READ Common Write and read registers Macros
* @{
*/
/**
* @brief Write a value in GPIO register
* @param __INSTANCE__ GPIO Instance
* @param __REG__ Register to be written
* @param __VALUE__ Value to be written in the register
* @retval None
*/
#define LL_GPIO_WriteReg(__INSTANCE__, __REG__, __VALUE__) WRITE_REG(__INSTANCE__->__REG__, (__VALUE__))
/**
* @brief Read a value in GPIO register
* @param __INSTANCE__ GPIO Instance
* @param __REG__ Register to be read
* @retval Register value
*/
#define LL_GPIO_ReadReg(__INSTANCE__, __REG__) READ_REG(__INSTANCE__->__REG__)
/**
* @}
*/
/**
* @}
*/
/* Exported functions --------------------------------------------------------*/
/** @defgroup GPIO_LL_Exported_Functions GPIO Exported Functions
* @{
*/
/** @defgroup GPIO_LL_EF_Port_Configuration Port Configuration
* @{
*/
/**
* @brief Configure gpio mode for a dedicated pin on dedicated port.
* @note I/O mode can be Input mode, General purpose output, Alternate function mode or Analog.
* @note Warning: only one pin can be passed as parameter.
* @rmtoll MODER MODEy LL_GPIO_SetPinMode
* @param GPIOx GPIO Port
* @param Pin This parameter can be one of the following values:
* @arg @ref LL_GPIO_PIN_0
* @arg @ref LL_GPIO_PIN_1
* @arg @ref LL_GPIO_PIN_2
* @arg @ref LL_GPIO_PIN_3
* @arg @ref LL_GPIO_PIN_4
* @arg @ref LL_GPIO_PIN_5
* @arg @ref LL_GPIO_PIN_6
* @arg @ref LL_GPIO_PIN_7
* @arg @ref LL_GPIO_PIN_8
* @arg @ref LL_GPIO_PIN_9
* @arg @ref LL_GPIO_PIN_10
* @arg @ref LL_GPIO_PIN_11
* @arg @ref LL_GPIO_PIN_12
* @arg @ref LL_GPIO_PIN_13
* @arg @ref LL_GPIO_PIN_14
* @arg @ref LL_GPIO_PIN_15
* @param Mode This parameter can be one of the following values:
* @arg @ref LL_GPIO_MODE_INPUT
* @arg @ref LL_GPIO_MODE_OUTPUT
* @arg @ref LL_GPIO_MODE_ALTERNATE
* @arg @ref LL_GPIO_MODE_ANALOG
* @retval None
*/
__STATIC_INLINE void LL_GPIO_SetPinMode(GPIO_TypeDef *GPIOx, uint32_t Pin, uint32_t Mode)
{
MODIFY_REG(GPIOx->MODER, (GPIO_MODER_MODER0 << (POSITION_VAL(Pin) * 2U)), (Mode << (POSITION_VAL(Pin) * 2U)));
}
/**
* @brief Return gpio mode for a dedicated pin on dedicated port.
* @note I/O mode can be Input mode, General purpose output, Alternate function mode or Analog.
* @note Warning: only one pin can be passed as parameter.
* @rmtoll MODER MODEy LL_GPIO_GetPinMode
* @param GPIOx GPIO Port
* @param Pin This parameter can be one of the following values:
* @arg @ref LL_GPIO_PIN_0
* @arg @ref LL_GPIO_PIN_1
* @arg @ref LL_GPIO_PIN_2
* @arg @ref LL_GPIO_PIN_3
* @arg @ref LL_GPIO_PIN_4
* @arg @ref LL_GPIO_PIN_5
* @arg @ref LL_GPIO_PIN_6
* @arg @ref LL_GPIO_PIN_7
* @arg @ref LL_GPIO_PIN_8
* @arg @ref LL_GPIO_PIN_9
* @arg @ref LL_GPIO_PIN_10
* @arg @ref LL_GPIO_PIN_11
* @arg @ref LL_GPIO_PIN_12
* @arg @ref LL_GPIO_PIN_13
* @arg @ref LL_GPIO_PIN_14
* @arg @ref LL_GPIO_PIN_15
* @retval Returned value can be one of the following values:
* @arg @ref LL_GPIO_MODE_INPUT
* @arg @ref LL_GPIO_MODE_OUTPUT
* @arg @ref LL_GPIO_MODE_ALTERNATE
* @arg @ref LL_GPIO_MODE_ANALOG
*/
__STATIC_INLINE uint32_t LL_GPIO_GetPinMode(GPIO_TypeDef *GPIOx, uint32_t Pin)
{
return (uint32_t)(READ_BIT(GPIOx->MODER,
(GPIO_MODER_MODER0 << (POSITION_VAL(Pin) * 2U))) >> (POSITION_VAL(Pin) * 2U));
}
/**
* @brief Configure gpio output type for several pins on dedicated port.
* @note Output type as to be set when gpio pin is in output or
* alternate modes. Possible type are Push-pull or Open-drain.
* @rmtoll OTYPER OTy LL_GPIO_SetPinOutputType
* @param GPIOx GPIO Port
* @param PinMask This parameter can be a combination of the following values:
* @arg @ref LL_GPIO_PIN_0
* @arg @ref LL_GPIO_PIN_1
* @arg @ref LL_GPIO_PIN_2
* @arg @ref LL_GPIO_PIN_3
* @arg @ref LL_GPIO_PIN_4
* @arg @ref LL_GPIO_PIN_5
* @arg @ref LL_GPIO_PIN_6
* @arg @ref LL_GPIO_PIN_7
* @arg @ref LL_GPIO_PIN_8
* @arg @ref LL_GPIO_PIN_9
* @arg @ref LL_GPIO_PIN_10
* @arg @ref LL_GPIO_PIN_11
* @arg @ref LL_GPIO_PIN_12
* @arg @ref LL_GPIO_PIN_13
* @arg @ref LL_GPIO_PIN_14
* @arg @ref LL_GPIO_PIN_15
* @arg @ref LL_GPIO_PIN_ALL
* @param OutputType This parameter can be one of the following values:
* @arg @ref LL_GPIO_OUTPUT_PUSHPULL
* @arg @ref LL_GPIO_OUTPUT_OPENDRAIN
* @retval None
*/
__STATIC_INLINE void LL_GPIO_SetPinOutputType(GPIO_TypeDef *GPIOx, uint32_t PinMask, uint32_t OutputType)
{
MODIFY_REG(GPIOx->OTYPER, PinMask, (PinMask * OutputType));
}
/**
* @brief Return gpio output type for several pins on dedicated port.
* @note Output type as to be set when gpio pin is in output or
* alternate modes. Possible type are Push-pull or Open-drain.
* @note Warning: only one pin can be passed as parameter.
* @rmtoll OTYPER OTy LL_GPIO_GetPinOutputType
* @param GPIOx GPIO Port
* @param Pin This parameter can be one of the following values:
* @arg @ref LL_GPIO_PIN_0
* @arg @ref LL_GPIO_PIN_1
* @arg @ref LL_GPIO_PIN_2
* @arg @ref LL_GPIO_PIN_3
* @arg @ref LL_GPIO_PIN_4
* @arg @ref LL_GPIO_PIN_5
* @arg @ref LL_GPIO_PIN_6
* @arg @ref LL_GPIO_PIN_7
* @arg @ref LL_GPIO_PIN_8
* @arg @ref LL_GPIO_PIN_9
* @arg @ref LL_GPIO_PIN_10
* @arg @ref LL_GPIO_PIN_11
* @arg @ref LL_GPIO_PIN_12
* @arg @ref LL_GPIO_PIN_13
* @arg @ref LL_GPIO_PIN_14
* @arg @ref LL_GPIO_PIN_15
* @arg @ref LL_GPIO_PIN_ALL
* @retval Returned value can be one of the following values:
* @arg @ref LL_GPIO_OUTPUT_PUSHPULL
* @arg @ref LL_GPIO_OUTPUT_OPENDRAIN
*/
__STATIC_INLINE uint32_t LL_GPIO_GetPinOutputType(GPIO_TypeDef *GPIOx, uint32_t Pin)
{
return (uint32_t)(READ_BIT(GPIOx->OTYPER, Pin) >> POSITION_VAL(Pin));
}
/**
* @brief Configure gpio speed for a dedicated pin on dedicated port.
* @note I/O speed can be Low, Medium, Fast or High speed.
* @note Warning: only one pin can be passed as parameter.
* @note Refer to datasheet for frequency specifications and the power
* supply and load conditions for each speed.
* @rmtoll OSPEEDR OSPEEDy LL_GPIO_SetPinSpeed
* @param GPIOx GPIO Port
* @param Pin This parameter can be one of the following values:
* @arg @ref LL_GPIO_PIN_0
* @arg @ref LL_GPIO_PIN_1
* @arg @ref LL_GPIO_PIN_2
* @arg @ref LL_GPIO_PIN_3
* @arg @ref LL_GPIO_PIN_4
* @arg @ref LL_GPIO_PIN_5
* @arg @ref LL_GPIO_PIN_6
* @arg @ref LL_GPIO_PIN_7
* @arg @ref LL_GPIO_PIN_8
* @arg @ref LL_GPIO_PIN_9
* @arg @ref LL_GPIO_PIN_10
* @arg @ref LL_GPIO_PIN_11
* @arg @ref LL_GPIO_PIN_12
* @arg @ref LL_GPIO_PIN_13
* @arg @ref LL_GPIO_PIN_14
* @arg @ref LL_GPIO_PIN_15
* @param Speed This parameter can be one of the following values:
* @arg @ref LL_GPIO_SPEED_FREQ_LOW
* @arg @ref LL_GPIO_SPEED_FREQ_MEDIUM
* @arg @ref LL_GPIO_SPEED_FREQ_HIGH
* @retval None
*/
__STATIC_INLINE void LL_GPIO_SetPinSpeed(GPIO_TypeDef *GPIOx, uint32_t Pin, uint32_t Speed)
{
MODIFY_REG(GPIOx->OSPEEDR, (GPIO_OSPEEDER_OSPEEDR0 << (POSITION_VAL(Pin) * 2U)),
(Speed << (POSITION_VAL(Pin) * 2U)));
}
/**
* @brief Return gpio speed for a dedicated pin on dedicated port.
* @note I/O speed can be Low, Medium, Fast or High speed.
* @note Warning: only one pin can be passed as parameter.
* @note Refer to datasheet for frequency specifications and the power
* supply and load conditions for each speed.
* @rmtoll OSPEEDR OSPEEDy LL_GPIO_GetPinSpeed
* @param GPIOx GPIO Port
* @param Pin This parameter can be one of the following values:
* @arg @ref LL_GPIO_PIN_0
* @arg @ref LL_GPIO_PIN_1
* @arg @ref LL_GPIO_PIN_2
* @arg @ref LL_GPIO_PIN_3
* @arg @ref LL_GPIO_PIN_4
* @arg @ref LL_GPIO_PIN_5
* @arg @ref LL_GPIO_PIN_6
* @arg @ref LL_GPIO_PIN_7
* @arg @ref LL_GPIO_PIN_8
* @arg @ref LL_GPIO_PIN_9
* @arg @ref LL_GPIO_PIN_10
* @arg @ref LL_GPIO_PIN_11
* @arg @ref LL_GPIO_PIN_12
* @arg @ref LL_GPIO_PIN_13
* @arg @ref LL_GPIO_PIN_14
* @arg @ref LL_GPIO_PIN_15
* @retval Returned value can be one of the following values:
* @arg @ref LL_GPIO_SPEED_FREQ_LOW
* @arg @ref LL_GPIO_SPEED_FREQ_MEDIUM
* @arg @ref LL_GPIO_SPEED_FREQ_HIGH
*/
__STATIC_INLINE uint32_t LL_GPIO_GetPinSpeed(GPIO_TypeDef *GPIOx, uint32_t Pin)
{
return (uint32_t)(READ_BIT(GPIOx->OSPEEDR,
(GPIO_OSPEEDER_OSPEEDR0 << (POSITION_VAL(Pin) * 2U))) >> (POSITION_VAL(Pin) * 2U));
}
/**
* @brief Configure gpio pull-up or pull-down for a dedicated pin on a dedicated port.
* @note Warning: only one pin can be passed as parameter.
* @rmtoll PUPDR PUPDy LL_GPIO_SetPinPull
* @param GPIOx GPIO Port
* @param Pin This parameter can be one of the following values:
* @arg @ref LL_GPIO_PIN_0
* @arg @ref LL_GPIO_PIN_1
* @arg @ref LL_GPIO_PIN_2
* @arg @ref LL_GPIO_PIN_3
* @arg @ref LL_GPIO_PIN_4
* @arg @ref LL_GPIO_PIN_5
* @arg @ref LL_GPIO_PIN_6
* @arg @ref LL_GPIO_PIN_7
* @arg @ref LL_GPIO_PIN_8
* @arg @ref LL_GPIO_PIN_9
* @arg @ref LL_GPIO_PIN_10
* @arg @ref LL_GPIO_PIN_11
* @arg @ref LL_GPIO_PIN_12
* @arg @ref LL_GPIO_PIN_13
* @arg @ref LL_GPIO_PIN_14
* @arg @ref LL_GPIO_PIN_15
* @param Pull This parameter can be one of the following values:
* @arg @ref LL_GPIO_PULL_NO
* @arg @ref LL_GPIO_PULL_UP
* @arg @ref LL_GPIO_PULL_DOWN
* @retval None
*/
__STATIC_INLINE void LL_GPIO_SetPinPull(GPIO_TypeDef *GPIOx, uint32_t Pin, uint32_t Pull)
{
MODIFY_REG(GPIOx->PUPDR, (GPIO_PUPDR_PUPDR0 << (POSITION_VAL(Pin) * 2U)), (Pull << (POSITION_VAL(Pin) * 2U)));
}
/**
* @brief Return gpio pull-up or pull-down for a dedicated pin on a dedicated port
* @note Warning: only one pin can be passed as parameter.
* @rmtoll PUPDR PUPDy LL_GPIO_GetPinPull
* @param GPIOx GPIO Port
* @param Pin This parameter can be one of the following values:
* @arg @ref LL_GPIO_PIN_0
* @arg @ref LL_GPIO_PIN_1
* @arg @ref LL_GPIO_PIN_2
* @arg @ref LL_GPIO_PIN_3
* @arg @ref LL_GPIO_PIN_4
* @arg @ref LL_GPIO_PIN_5
* @arg @ref LL_GPIO_PIN_6
* @arg @ref LL_GPIO_PIN_7
* @arg @ref LL_GPIO_PIN_8
* @arg @ref LL_GPIO_PIN_9
* @arg @ref LL_GPIO_PIN_10
* @arg @ref LL_GPIO_PIN_11
* @arg @ref LL_GPIO_PIN_12
* @arg @ref LL_GPIO_PIN_13
* @arg @ref LL_GPIO_PIN_14
* @arg @ref LL_GPIO_PIN_15
* @retval Returned value can be one of the following values:
* @arg @ref LL_GPIO_PULL_NO
* @arg @ref LL_GPIO_PULL_UP
* @arg @ref LL_GPIO_PULL_DOWN
*/
__STATIC_INLINE uint32_t LL_GPIO_GetPinPull(GPIO_TypeDef *GPIOx, uint32_t Pin)
{
return (uint32_t)(READ_BIT(GPIOx->PUPDR,
(GPIO_PUPDR_PUPDR0 << (POSITION_VAL(Pin) * 2U))) >> (POSITION_VAL(Pin) * 2U));
}
/**
* @brief Configure gpio alternate function of a dedicated pin from 0 to 7 for a dedicated port.
* @note Possible values are from AF0 to AF15 depending on target.
* @note Warning: only one pin can be passed as parameter.
* @rmtoll AFRL AFSELy LL_GPIO_SetAFPin_0_7
* @param GPIOx GPIO Port
* @param Pin This parameter can be one of the following values:
* @arg @ref LL_GPIO_PIN_0
* @arg @ref LL_GPIO_PIN_1
* @arg @ref LL_GPIO_PIN_2
* @arg @ref LL_GPIO_PIN_3
* @arg @ref LL_GPIO_PIN_4
* @arg @ref LL_GPIO_PIN_5
* @arg @ref LL_GPIO_PIN_6
* @arg @ref LL_GPIO_PIN_7
* @param Alternate This parameter can be one of the following values:
* @arg @ref LL_GPIO_AF_0
* @arg @ref LL_GPIO_AF_1
* @arg @ref LL_GPIO_AF_2
* @arg @ref LL_GPIO_AF_3
* @arg @ref LL_GPIO_AF_4
* @arg @ref LL_GPIO_AF_5
* @arg @ref LL_GPIO_AF_6
* @arg @ref LL_GPIO_AF_7
* @arg @ref LL_GPIO_AF_8
* @arg @ref LL_GPIO_AF_9
* @arg @ref LL_GPIO_AF_10
* @arg @ref LL_GPIO_AF_11
* @arg @ref LL_GPIO_AF_12
* @arg @ref LL_GPIO_AF_13
* @arg @ref LL_GPIO_AF_14
* @arg @ref LL_GPIO_AF_15
* @retval None
*/
__STATIC_INLINE void LL_GPIO_SetAFPin_0_7(GPIO_TypeDef *GPIOx, uint32_t Pin, uint32_t Alternate)
{
MODIFY_REG(GPIOx->AFR[0], (GPIO_AFRL_AFRL0 << (POSITION_VAL(Pin) * 4U)),
(Alternate << (POSITION_VAL(Pin) * 4U)));
}
/**
* @brief Return gpio alternate function of a dedicated pin from 0 to 7 for a dedicated port.
* @rmtoll AFRL AFSELy LL_GPIO_GetAFPin_0_7
* @param GPIOx GPIO Port
* @param Pin This parameter can be one of the following values:
* @arg @ref LL_GPIO_PIN_0
* @arg @ref LL_GPIO_PIN_1
* @arg @ref LL_GPIO_PIN_2
* @arg @ref LL_GPIO_PIN_3
* @arg @ref LL_GPIO_PIN_4
* @arg @ref LL_GPIO_PIN_5
* @arg @ref LL_GPIO_PIN_6
* @arg @ref LL_GPIO_PIN_7
* @retval Returned value can be one of the following values:
* @arg @ref LL_GPIO_AF_0
* @arg @ref LL_GPIO_AF_1
* @arg @ref LL_GPIO_AF_2
* @arg @ref LL_GPIO_AF_3
* @arg @ref LL_GPIO_AF_4
* @arg @ref LL_GPIO_AF_5
* @arg @ref LL_GPIO_AF_6
* @arg @ref LL_GPIO_AF_7
* @arg @ref LL_GPIO_AF_8
* @arg @ref LL_GPIO_AF_9
* @arg @ref LL_GPIO_AF_10
* @arg @ref LL_GPIO_AF_11
* @arg @ref LL_GPIO_AF_12
* @arg @ref LL_GPIO_AF_13
* @arg @ref LL_GPIO_AF_14
* @arg @ref LL_GPIO_AF_15
*/
__STATIC_INLINE uint32_t LL_GPIO_GetAFPin_0_7(GPIO_TypeDef *GPIOx, uint32_t Pin)
{
return (uint32_t)(READ_BIT(GPIOx->AFR[0],
(GPIO_AFRL_AFRL0 << (POSITION_VAL(Pin) * 4U))) >> (POSITION_VAL(Pin) * 4U));
}
/**
* @brief Configure gpio alternate function of a dedicated pin from 8 to 15 for a dedicated port.
* @note Possible values are from AF0 to AF15 depending on target.
* @note Warning: only one pin can be passed as parameter.
* @rmtoll AFRH AFSELy LL_GPIO_SetAFPin_8_15
* @param GPIOx GPIO Port
* @param Pin This parameter can be one of the following values:
* @arg @ref LL_GPIO_PIN_8
* @arg @ref LL_GPIO_PIN_9
* @arg @ref LL_GPIO_PIN_10
* @arg @ref LL_GPIO_PIN_11
* @arg @ref LL_GPIO_PIN_12
* @arg @ref LL_GPIO_PIN_13
* @arg @ref LL_GPIO_PIN_14
* @arg @ref LL_GPIO_PIN_15
* @param Alternate This parameter can be one of the following values:
* @arg @ref LL_GPIO_AF_0
* @arg @ref LL_GPIO_AF_1
* @arg @ref LL_GPIO_AF_2
* @arg @ref LL_GPIO_AF_3
* @arg @ref LL_GPIO_AF_4
* @arg @ref LL_GPIO_AF_5
* @arg @ref LL_GPIO_AF_6
* @arg @ref LL_GPIO_AF_7
* @arg @ref LL_GPIO_AF_8
* @arg @ref LL_GPIO_AF_9
* @arg @ref LL_GPIO_AF_10
* @arg @ref LL_GPIO_AF_11
* @arg @ref LL_GPIO_AF_12
* @arg @ref LL_GPIO_AF_13
* @arg @ref LL_GPIO_AF_14
* @arg @ref LL_GPIO_AF_15
* @retval None
*/
__STATIC_INLINE void LL_GPIO_SetAFPin_8_15(GPIO_TypeDef *GPIOx, uint32_t Pin, uint32_t Alternate)
{
MODIFY_REG(GPIOx->AFR[1], (GPIO_AFRH_AFRH0 << (POSITION_VAL(Pin >> 8U) * 4U)),
(Alternate << (POSITION_VAL(Pin >> 8U) * 4U)));
}
/**
* @brief Return gpio alternate function of a dedicated pin from 8 to 15 for a dedicated port.
* @note Possible values are from AF0 to AF15 depending on target.
* @rmtoll AFRH AFSELy LL_GPIO_GetAFPin_8_15
* @param GPIOx GPIO Port
* @param Pin This parameter can be one of the following values:
* @arg @ref LL_GPIO_PIN_8
* @arg @ref LL_GPIO_PIN_9
* @arg @ref LL_GPIO_PIN_10
* @arg @ref LL_GPIO_PIN_11
* @arg @ref LL_GPIO_PIN_12
* @arg @ref LL_GPIO_PIN_13
* @arg @ref LL_GPIO_PIN_14
* @arg @ref LL_GPIO_PIN_15
* @retval Returned value can be one of the following values:
* @arg @ref LL_GPIO_AF_0
* @arg @ref LL_GPIO_AF_1
* @arg @ref LL_GPIO_AF_2
* @arg @ref LL_GPIO_AF_3
* @arg @ref LL_GPIO_AF_4
* @arg @ref LL_GPIO_AF_5
* @arg @ref LL_GPIO_AF_6
* @arg @ref LL_GPIO_AF_7
* @arg @ref LL_GPIO_AF_8
* @arg @ref LL_GPIO_AF_9
* @arg @ref LL_GPIO_AF_10
* @arg @ref LL_GPIO_AF_11
* @arg @ref LL_GPIO_AF_12
* @arg @ref LL_GPIO_AF_13
* @arg @ref LL_GPIO_AF_14
* @arg @ref LL_GPIO_AF_15
*/
__STATIC_INLINE uint32_t LL_GPIO_GetAFPin_8_15(GPIO_TypeDef *GPIOx, uint32_t Pin)
{
return (uint32_t)(READ_BIT(GPIOx->AFR[1],
(GPIO_AFRH_AFRH0 << (POSITION_VAL(Pin >> 8U) * 4U))) >> (POSITION_VAL(Pin >> 8U) * 4U));
}
/**
* @brief Lock configuration of several pins for a dedicated port.
* @note When the lock sequence has been applied on a port bit, the
* value of this port bit can no longer be modified until the
* next reset.
* @note Each lock bit freezes a specific configuration register
* (control and alternate function registers).
* @rmtoll LCKR LCKK LL_GPIO_LockPin
* @param GPIOx GPIO Port
* @param PinMask This parameter can be a combination of the following values:
* @arg @ref LL_GPIO_PIN_0
* @arg @ref LL_GPIO_PIN_1
* @arg @ref LL_GPIO_PIN_2
* @arg @ref LL_GPIO_PIN_3
* @arg @ref LL_GPIO_PIN_4
* @arg @ref LL_GPIO_PIN_5
* @arg @ref LL_GPIO_PIN_6
* @arg @ref LL_GPIO_PIN_7
* @arg @ref LL_GPIO_PIN_8
* @arg @ref LL_GPIO_PIN_9
* @arg @ref LL_GPIO_PIN_10
* @arg @ref LL_GPIO_PIN_11
* @arg @ref LL_GPIO_PIN_12
* @arg @ref LL_GPIO_PIN_13
* @arg @ref LL_GPIO_PIN_14
* @arg @ref LL_GPIO_PIN_15
* @arg @ref LL_GPIO_PIN_ALL
* @retval None
*/
__STATIC_INLINE void LL_GPIO_LockPin(GPIO_TypeDef *GPIOx, uint32_t PinMask)
{
__IO uint32_t temp;
WRITE_REG(GPIOx->LCKR, GPIO_LCKR_LCKK | PinMask);
WRITE_REG(GPIOx->LCKR, PinMask);
WRITE_REG(GPIOx->LCKR, GPIO_LCKR_LCKK | PinMask);
temp = READ_REG(GPIOx->LCKR);
(void) temp;
}
/**
* @brief Return 1 if all pins passed as parameter, of a dedicated port, are locked. else Return 0.
* @rmtoll LCKR LCKy LL_GPIO_IsPinLocked
* @param GPIOx GPIO Port
* @param PinMask This parameter can be a combination of the following values:
* @arg @ref LL_GPIO_PIN_0
* @arg @ref LL_GPIO_PIN_1
* @arg @ref LL_GPIO_PIN_2
* @arg @ref LL_GPIO_PIN_3
* @arg @ref LL_GPIO_PIN_4
* @arg @ref LL_GPIO_PIN_5
* @arg @ref LL_GPIO_PIN_6
* @arg @ref LL_GPIO_PIN_7
* @arg @ref LL_GPIO_PIN_8
* @arg @ref LL_GPIO_PIN_9
* @arg @ref LL_GPIO_PIN_10
* @arg @ref LL_GPIO_PIN_11
* @arg @ref LL_GPIO_PIN_12
* @arg @ref LL_GPIO_PIN_13
* @arg @ref LL_GPIO_PIN_14
* @arg @ref LL_GPIO_PIN_15
* @arg @ref LL_GPIO_PIN_ALL
* @retval State of bit (1 or 0).
*/
__STATIC_INLINE uint32_t LL_GPIO_IsPinLocked(GPIO_TypeDef *GPIOx, uint32_t PinMask)
{
return (READ_BIT(GPIOx->LCKR, PinMask) == (PinMask));
}
/**
* @brief Return 1 if one of the pin of a dedicated port is locked. else return 0.
* @rmtoll LCKR LCKK LL_GPIO_IsAnyPinLocked
* @param GPIOx GPIO Port
* @retval State of bit (1 or 0).
*/
__STATIC_INLINE uint32_t LL_GPIO_IsAnyPinLocked(GPIO_TypeDef *GPIOx)
{
return (READ_BIT(GPIOx->LCKR, GPIO_LCKR_LCKK) == (GPIO_LCKR_LCKK));
}
/**
* @}
*/
/** @defgroup GPIO_LL_EF_Data_Access Data Access
* @{
*/
/**
* @brief Return full input data register value for a dedicated port.
* @rmtoll IDR IDy LL_GPIO_ReadInputPort
* @param GPIOx GPIO Port
* @retval Input data register value of port
*/
__STATIC_INLINE uint32_t LL_GPIO_ReadInputPort(GPIO_TypeDef *GPIOx)
{
return (uint32_t)(READ_REG(GPIOx->IDR));
}
/**
* @brief Return if input data level for several pins of dedicated port is high or low.
* @rmtoll IDR IDy LL_GPIO_IsInputPinSet
* @param GPIOx GPIO Port
* @param PinMask This parameter can be a combination of the following values:
* @arg @ref LL_GPIO_PIN_0
* @arg @ref LL_GPIO_PIN_1
* @arg @ref LL_GPIO_PIN_2
* @arg @ref LL_GPIO_PIN_3
* @arg @ref LL_GPIO_PIN_4
* @arg @ref LL_GPIO_PIN_5
* @arg @ref LL_GPIO_PIN_6
* @arg @ref LL_GPIO_PIN_7
* @arg @ref LL_GPIO_PIN_8
* @arg @ref LL_GPIO_PIN_9
* @arg @ref LL_GPIO_PIN_10
* @arg @ref LL_GPIO_PIN_11
* @arg @ref LL_GPIO_PIN_12
* @arg @ref LL_GPIO_PIN_13
* @arg @ref LL_GPIO_PIN_14
* @arg @ref LL_GPIO_PIN_15
* @arg @ref LL_GPIO_PIN_ALL
* @retval State of bit (1 or 0).
*/
__STATIC_INLINE uint32_t LL_GPIO_IsInputPinSet(GPIO_TypeDef *GPIOx, uint32_t PinMask)
{
return (READ_BIT(GPIOx->IDR, PinMask) == (PinMask));
}
/**
* @brief Write output data register for the port.
* @rmtoll ODR ODy LL_GPIO_WriteOutputPort
* @param GPIOx GPIO Port
* @param PortValue Level value for each pin of the port
* @retval None
*/
__STATIC_INLINE void LL_GPIO_WriteOutputPort(GPIO_TypeDef *GPIOx, uint32_t PortValue)
{
WRITE_REG(GPIOx->ODR, PortValue);
}
/**
* @brief Return full output data register value for a dedicated port.
* @rmtoll ODR ODy LL_GPIO_ReadOutputPort
* @param GPIOx GPIO Port
* @retval Output data register value of port
*/
__STATIC_INLINE uint32_t LL_GPIO_ReadOutputPort(GPIO_TypeDef *GPIOx)
{
return (uint32_t)(READ_REG(GPIOx->ODR));
}
/**
* @brief Return if input data level for several pins of dedicated port is high or low.
* @rmtoll ODR ODy LL_GPIO_IsOutputPinSet
* @param GPIOx GPIO Port
* @param PinMask This parameter can be a combination of the following values:
* @arg @ref LL_GPIO_PIN_0
* @arg @ref LL_GPIO_PIN_1
* @arg @ref LL_GPIO_PIN_2
* @arg @ref LL_GPIO_PIN_3
* @arg @ref LL_GPIO_PIN_4
* @arg @ref LL_GPIO_PIN_5
* @arg @ref LL_GPIO_PIN_6
* @arg @ref LL_GPIO_PIN_7
* @arg @ref LL_GPIO_PIN_8
* @arg @ref LL_GPIO_PIN_9
* @arg @ref LL_GPIO_PIN_10
* @arg @ref LL_GPIO_PIN_11
* @arg @ref LL_GPIO_PIN_12
* @arg @ref LL_GPIO_PIN_13
* @arg @ref LL_GPIO_PIN_14
* @arg @ref LL_GPIO_PIN_15
* @arg @ref LL_GPIO_PIN_ALL
* @retval State of bit (1 or 0).
*/
__STATIC_INLINE uint32_t LL_GPIO_IsOutputPinSet(GPIO_TypeDef *GPIOx, uint32_t PinMask)
{
return (READ_BIT(GPIOx->ODR, PinMask) == (PinMask));
}
/**
* @brief Set several pins to high level on dedicated gpio port.
* @rmtoll BSRR BSy LL_GPIO_SetOutputPin
* @param GPIOx GPIO Port
* @param PinMask This parameter can be a combination of the following values:
* @arg @ref LL_GPIO_PIN_0
* @arg @ref LL_GPIO_PIN_1
* @arg @ref LL_GPIO_PIN_2
* @arg @ref LL_GPIO_PIN_3
* @arg @ref LL_GPIO_PIN_4
* @arg @ref LL_GPIO_PIN_5
* @arg @ref LL_GPIO_PIN_6
* @arg @ref LL_GPIO_PIN_7
* @arg @ref LL_GPIO_PIN_8
* @arg @ref LL_GPIO_PIN_9
* @arg @ref LL_GPIO_PIN_10
* @arg @ref LL_GPIO_PIN_11
* @arg @ref LL_GPIO_PIN_12
* @arg @ref LL_GPIO_PIN_13
* @arg @ref LL_GPIO_PIN_14
* @arg @ref LL_GPIO_PIN_15
* @arg @ref LL_GPIO_PIN_ALL
* @retval None
*/
__STATIC_INLINE void LL_GPIO_SetOutputPin(GPIO_TypeDef *GPIOx, uint32_t PinMask)
{
WRITE_REG(GPIOx->BSRR, PinMask);
}
/**
* @brief Set several pins to low level on dedicated gpio port.
* @rmtoll BRR BRy LL_GPIO_ResetOutputPin
* @param GPIOx GPIO Port
* @param PinMask This parameter can be a combination of the following values:
* @arg @ref LL_GPIO_PIN_0
* @arg @ref LL_GPIO_PIN_1
* @arg @ref LL_GPIO_PIN_2
* @arg @ref LL_GPIO_PIN_3
* @arg @ref LL_GPIO_PIN_4
* @arg @ref LL_GPIO_PIN_5
* @arg @ref LL_GPIO_PIN_6
* @arg @ref LL_GPIO_PIN_7
* @arg @ref LL_GPIO_PIN_8
* @arg @ref LL_GPIO_PIN_9
* @arg @ref LL_GPIO_PIN_10
* @arg @ref LL_GPIO_PIN_11
* @arg @ref LL_GPIO_PIN_12
* @arg @ref LL_GPIO_PIN_13
* @arg @ref LL_GPIO_PIN_14
* @arg @ref LL_GPIO_PIN_15
* @arg @ref LL_GPIO_PIN_ALL
* @retval None
*/
__STATIC_INLINE void LL_GPIO_ResetOutputPin(GPIO_TypeDef *GPIOx, uint32_t PinMask)
{
WRITE_REG(GPIOx->BRR, PinMask);
}
/**
* @brief Toggle data value for several pin of dedicated port.
* @rmtoll ODR ODy LL_GPIO_TogglePin
* @param GPIOx GPIO Port
* @param PinMask This parameter can be a combination of the following values:
* @arg @ref LL_GPIO_PIN_0
* @arg @ref LL_GPIO_PIN_1
* @arg @ref LL_GPIO_PIN_2
* @arg @ref LL_GPIO_PIN_3
* @arg @ref LL_GPIO_PIN_4
* @arg @ref LL_GPIO_PIN_5
* @arg @ref LL_GPIO_PIN_6
* @arg @ref LL_GPIO_PIN_7
* @arg @ref LL_GPIO_PIN_8
* @arg @ref LL_GPIO_PIN_9
* @arg @ref LL_GPIO_PIN_10
* @arg @ref LL_GPIO_PIN_11
* @arg @ref LL_GPIO_PIN_12
* @arg @ref LL_GPIO_PIN_13
* @arg @ref LL_GPIO_PIN_14
* @arg @ref LL_GPIO_PIN_15
* @arg @ref LL_GPIO_PIN_ALL
* @retval None
*/
__STATIC_INLINE void LL_GPIO_TogglePin(GPIO_TypeDef *GPIOx, uint32_t PinMask)
{
uint32_t odr = READ_REG(GPIOx->ODR);
WRITE_REG(GPIOx->BSRR, ((odr & PinMask) << 16u) | (~odr & PinMask));
}
/**
* @}
*/
#if defined(USE_FULL_LL_DRIVER)
/** @defgroup GPIO_LL_EF_Init Initialization and de-initialization functions
* @{
*/
ErrorStatus LL_GPIO_DeInit(GPIO_TypeDef *GPIOx);
ErrorStatus LL_GPIO_Init(GPIO_TypeDef *GPIOx, LL_GPIO_InitTypeDef *GPIO_InitStruct);
void LL_GPIO_StructInit(LL_GPIO_InitTypeDef *GPIO_InitStruct);
/**
* @}
*/
#endif /* USE_FULL_LL_DRIVER */
/**
* @}
*/
/**
* @}
*/
#endif /* defined (GPIOA) || defined (GPIOB) || defined (GPIOC) || defined (GPIOD) || defined (GPIOE) || defined (GPIOF) || defined (GPIOG) || defined (GPIOH) */
/**
* @}
*/
#ifdef __cplusplus
}
#endif
#endif /* __STM32F3xx_LL_GPIO_H */
/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/

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@ -0,0 +1,554 @@
/**
******************************************************************************
* @file stm32f3xx_ll_pwr.h
* @author MCD Application Team
* @brief Header file of PWR LL module.
******************************************************************************
* @attention
*
* <h2><center>&copy; Copyright (c) 2016 STMicroelectronics.
* All rights reserved.</center></h2>
*
* This software component is licensed by ST under BSD 3-Clause license,
* the "License"; You may not use this file except in compliance with the
* License. You may obtain a copy of the License at:
* opensource.org/licenses/BSD-3-Clause
*
******************************************************************************
*/
/* Define to prevent recursive inclusion -------------------------------------*/
#ifndef __STM32F3xx_LL_PWR_H
#define __STM32F3xx_LL_PWR_H
#ifdef __cplusplus
extern "C" {
#endif
/* Includes ------------------------------------------------------------------*/
#include "stm32f3xx.h"
/** @addtogroup STM32F3xx_LL_Driver
* @{
*/
#if defined(PWR)
/** @defgroup PWR_LL PWR
* @{
*/
/* Private types -------------------------------------------------------------*/
/* Private variables ---------------------------------------------------------*/
/* Private constants ---------------------------------------------------------*/
/* Private macros ------------------------------------------------------------*/
/* Exported types ------------------------------------------------------------*/
/* Exported constants --------------------------------------------------------*/
/** @defgroup PWR_LL_Exported_Constants PWR Exported Constants
* @{
*/
/** @defgroup PWR_LL_EC_CLEAR_FLAG Clear Flags Defines
* @brief Flags defines which can be used with LL_PWR_WriteReg function
* @{
*/
#define LL_PWR_CR_CSBF PWR_CR_CSBF /*!< Clear standby flag */
#define LL_PWR_CR_CWUF PWR_CR_CWUF /*!< Clear wakeup flag */
/**
* @}
*/
/** @defgroup PWR_LL_EC_GET_FLAG Get Flags Defines
* @brief Flags defines which can be used with LL_PWR_ReadReg function
* @{
*/
#define LL_PWR_CSR_WUF PWR_CSR_WUF /*!< Wakeup flag */
#define LL_PWR_CSR_SBF PWR_CSR_SBF /*!< Standby flag */
#if defined(PWR_PVD_SUPPORT)
#define LL_PWR_CSR_PVDO PWR_CSR_PVDO /*!< Power voltage detector output flag */
#endif /* PWR_PVD_SUPPORT */
#if defined(PWR_CSR_VREFINTRDYF)
#define LL_PWR_CSR_VREFINTRDYF PWR_CSR_VREFINTRDYF /*!< VREFINT ready flag */
#endif /* PWR_CSR_VREFINTRDYF */
#define LL_PWR_CSR_EWUP1 PWR_CSR_EWUP1 /*!< Enable WKUP pin 1 */
#define LL_PWR_CSR_EWUP2 PWR_CSR_EWUP2 /*!< Enable WKUP pin 2 */
#if defined(PWR_CSR_EWUP3)
#define LL_PWR_CSR_EWUP3 PWR_CSR_EWUP3 /*!< Enable WKUP pin 3 */
#endif /* PWR_CSR_EWUP3 */
/**
* @}
*/
/** @defgroup PWR_LL_EC_MODE_PWR Mode Power
* @{
*/
#define LL_PWR_MODE_STOP_MAINREGU 0x00000000U /*!< Enter Stop mode when the CPU enters deepsleep */
#define LL_PWR_MODE_STOP_LPREGU (PWR_CR_LPDS) /*!< Enter Stop mode (with low power Regulator ON) when the CPU enters deepsleep */
#define LL_PWR_MODE_STANDBY (PWR_CR_PDDS) /*!< Enter Standby mode when the CPU enters deepsleep */
/**
* @}
*/
#if defined(PWR_CR_LPDS)
/** @defgroup PWR_LL_EC_REGU_MODE_DS_MODE Regulator Mode In Deep Sleep Mode
* @{
*/
#define LL_PWR_REGU_DSMODE_MAIN 0x00000000U /*!< Voltage Regulator in main mode during deepsleep mode */
#define LL_PWR_REGU_DSMODE_LOW_POWER (PWR_CR_LPDS) /*!< Voltage Regulator in low-power mode during deepsleep mode */
/**
* @}
*/
#endif /* PWR_CR_LPDS */
#if defined(PWR_PVD_SUPPORT)
/** @defgroup PWR_LL_EC_PVDLEVEL Power Voltage Detector Level
* @{
*/
#define LL_PWR_PVDLEVEL_0 (PWR_CR_PLS_LEV0) /*!< Voltage threshold detected by PVD 2.2 V */
#define LL_PWR_PVDLEVEL_1 (PWR_CR_PLS_LEV1) /*!< Voltage threshold detected by PVD 2.3 V */
#define LL_PWR_PVDLEVEL_2 (PWR_CR_PLS_LEV2) /*!< Voltage threshold detected by PVD 2.4 V */
#define LL_PWR_PVDLEVEL_3 (PWR_CR_PLS_LEV3) /*!< Voltage threshold detected by PVD 2.5 V */
#define LL_PWR_PVDLEVEL_4 (PWR_CR_PLS_LEV4) /*!< Voltage threshold detected by PVD 2.6 V */
#define LL_PWR_PVDLEVEL_5 (PWR_CR_PLS_LEV5) /*!< Voltage threshold detected by PVD 2.7 V */
#define LL_PWR_PVDLEVEL_6 (PWR_CR_PLS_LEV6) /*!< Voltage threshold detected by PVD 2.8 V */
#define LL_PWR_PVDLEVEL_7 (PWR_CR_PLS_LEV7) /*!< Voltage threshold detected by PVD 2.9 V */
/**
* @}
*/
#endif /* PWR_PVD_SUPPORT */
/** @defgroup PWR_LL_EC_WAKEUP_PIN Wakeup Pins
* @{
*/
#define LL_PWR_WAKEUP_PIN1 (PWR_CSR_EWUP1) /*!< WKUP pin 1 : PA0 */
#define LL_PWR_WAKEUP_PIN2 (PWR_CSR_EWUP2) /*!< WKUP pin 2 : PC13 */
#if defined(PWR_CSR_EWUP3)
#define LL_PWR_WAKEUP_PIN3 (PWR_CSR_EWUP3) /*!< WKUP pin 3 : PE6 or PA2 according to device */
#endif /* PWR_CSR_EWUP3 */
/**
* @}
*/
/** @defgroup PWR_LL_EC_SDADC_ANALOG_X SDADC Analogx
* @{
*/
#if defined(SDADC1)
#define LL_PWR_SDADC_ANALOG1 (PWR_CR_ENSD1) /*!< Enable SDADC1 */
#endif /* SDADC1 */
#if defined(SDADC2)
#define LL_PWR_SDADC_ANALOG2 (PWR_CR_ENSD2) /*!< Enable SDADC2 */
#endif /* SDADC2 */
#if defined(SDADC3)
#define LL_PWR_SDADC_ANALOG3 (PWR_CR_ENSD3) /*!< Enable SDADC3 */
#endif /* SDADC3 */
/**
* @}
*/
/**
* @}
*/
/* Exported macro ------------------------------------------------------------*/
/** @defgroup PWR_LL_Exported_Macros PWR Exported Macros
* @{
*/
/** @defgroup PWR_LL_EM_WRITE_READ Common write and read registers Macros
* @{
*/
/**
* @brief Write a value in PWR register
* @param __REG__ Register to be written
* @param __VALUE__ Value to be written in the register
* @retval None
*/
#define LL_PWR_WriteReg(__REG__, __VALUE__) WRITE_REG(PWR->__REG__, (__VALUE__))
/**
* @brief Read a value in PWR register
* @param __REG__ Register to be read
* @retval Register value
*/
#define LL_PWR_ReadReg(__REG__) READ_REG(PWR->__REG__)
/**
* @}
*/
/**
* @}
*/
/* Exported functions --------------------------------------------------------*/
/** @defgroup PWR_LL_Exported_Functions PWR Exported Functions
* @{
*/
/** @defgroup PWR_LL_EF_Configuration Configuration
* @{
*/
/**
* @brief Enables the SDADC peripheral functionality
* @rmtoll CR ENSD1 LL_PWR_EnableSDADC\n
* CR ENSD2 LL_PWR_EnableSDADC\n
* CR ENSD3 LL_PWR_EnableSDADC
* @param Analogx This parameter can be a combination of the following values:
* @arg @ref LL_PWR_SDADC_ANALOG1
* @arg @ref LL_PWR_SDADC_ANALOG2
* @arg @ref LL_PWR_SDADC_ANALOG3
* @retval None
*/
__STATIC_INLINE void LL_PWR_EnableSDADC(uint32_t Analogx)
{
SET_BIT(PWR->CR, Analogx);
}
/**
* @brief Disables the SDADC peripheral functionality
* @rmtoll CR ENSD1 LL_PWR_EnableSDADC\n
* CR ENSD2 LL_PWR_EnableSDADC\n
* CR ENSD3 LL_PWR_EnableSDADC
* @param Analogx This parameter can be a combination of the following values:
* @arg @ref LL_PWR_SDADC_ANALOG1
* @arg @ref LL_PWR_SDADC_ANALOG2
* @arg @ref LL_PWR_SDADC_ANALOG3
* @retval None
*/
__STATIC_INLINE void LL_PWR_DisableSDADC(uint32_t Analogx)
{
CLEAR_BIT(PWR->CR, Analogx);
}
/**
* @brief Check if SDADCx has been enabled or not
* @rmtoll CR ENSD1 LL_PWR_IsEnabledSDADC\n
* CR ENSD2 LL_PWR_IsEnabledSDADC\n
* CR ENSD3 LL_PWR_IsEnabledSDADC
* @param Analogx This parameter can be a combination of the following values:
* @arg @ref LL_PWR_SDADC_ANALOG1
* @arg @ref LL_PWR_SDADC_ANALOG2
* @arg @ref LL_PWR_SDADC_ANALOG3
* @retval None
*/
__STATIC_INLINE uint32_t LL_PWR_IsEnabledSDADC(uint32_t Analogx)
{
return (READ_BIT(PWR->CR, Analogx) == (Analogx));
}
/**
* @brief Enable access to the backup domain
* @rmtoll CR DBP LL_PWR_EnableBkUpAccess
* @retval None
*/
__STATIC_INLINE void LL_PWR_EnableBkUpAccess(void)
{
SET_BIT(PWR->CR, PWR_CR_DBP);
}
/**
* @brief Disable access to the backup domain
* @rmtoll CR DBP LL_PWR_DisableBkUpAccess
* @retval None
*/
__STATIC_INLINE void LL_PWR_DisableBkUpAccess(void)
{
CLEAR_BIT(PWR->CR, PWR_CR_DBP);
}
/**
* @brief Check if the backup domain is enabled
* @rmtoll CR DBP LL_PWR_IsEnabledBkUpAccess
* @retval State of bit (1 or 0).
*/
__STATIC_INLINE uint32_t LL_PWR_IsEnabledBkUpAccess(void)
{
return (READ_BIT(PWR->CR, PWR_CR_DBP) == (PWR_CR_DBP));
}
#if defined(PWR_CR_LPDS)
/**
* @brief Set voltage Regulator mode during deep sleep mode
* @rmtoll CR LPDS LL_PWR_SetRegulModeDS
* @param RegulMode This parameter can be one of the following values:
* @arg @ref LL_PWR_REGU_DSMODE_MAIN
* @arg @ref LL_PWR_REGU_DSMODE_LOW_POWER
* @retval None
*/
__STATIC_INLINE void LL_PWR_SetRegulModeDS(uint32_t RegulMode)
{
MODIFY_REG(PWR->CR, PWR_CR_LPDS, RegulMode);
}
/**
* @brief Get voltage Regulator mode during deep sleep mode
* @rmtoll CR LPDS LL_PWR_GetRegulModeDS
* @retval Returned value can be one of the following values:
* @arg @ref LL_PWR_REGU_DSMODE_MAIN
* @arg @ref LL_PWR_REGU_DSMODE_LOW_POWER
*/
__STATIC_INLINE uint32_t LL_PWR_GetRegulModeDS(void)
{
return (uint32_t)(READ_BIT(PWR->CR, PWR_CR_LPDS));
}
#endif /* PWR_CR_LPDS */
/**
* @brief Set Power Down mode when CPU enters deepsleep
* @rmtoll CR PDDS LL_PWR_SetPowerMode\n
* @rmtoll CR LPDS LL_PWR_SetPowerMode
* @param PDMode This parameter can be one of the following values:
* @arg @ref LL_PWR_MODE_STOP_MAINREGU
* @arg @ref LL_PWR_MODE_STOP_LPREGU
* @arg @ref LL_PWR_MODE_STANDBY
* @retval None
*/
__STATIC_INLINE void LL_PWR_SetPowerMode(uint32_t PDMode)
{
MODIFY_REG(PWR->CR, (PWR_CR_PDDS| PWR_CR_LPDS), PDMode);
}
/**
* @brief Get Power Down mode when CPU enters deepsleep
* @rmtoll CR PDDS LL_PWR_GetPowerMode\n
* @rmtoll CR LPDS LL_PWR_GetPowerMode
* @retval Returned value can be one of the following values:
* @arg @ref LL_PWR_MODE_STOP_MAINREGU
* @arg @ref LL_PWR_MODE_STOP_LPREGU
* @arg @ref LL_PWR_MODE_STANDBY
*/
__STATIC_INLINE uint32_t LL_PWR_GetPowerMode(void)
{
return (uint32_t)(READ_BIT(PWR->CR, (PWR_CR_PDDS| PWR_CR_LPDS)));
}
#if defined(PWR_PVD_SUPPORT)
/**
* @brief Configure the voltage threshold detected by the Power Voltage Detector
* @rmtoll CR PLS LL_PWR_SetPVDLevel
* @param PVDLevel This parameter can be one of the following values:
* @arg @ref LL_PWR_PVDLEVEL_0
* @arg @ref LL_PWR_PVDLEVEL_1
* @arg @ref LL_PWR_PVDLEVEL_2
* @arg @ref LL_PWR_PVDLEVEL_3
* @arg @ref LL_PWR_PVDLEVEL_4
* @arg @ref LL_PWR_PVDLEVEL_5
* @arg @ref LL_PWR_PVDLEVEL_6
* @arg @ref LL_PWR_PVDLEVEL_7
* @retval None
*/
__STATIC_INLINE void LL_PWR_SetPVDLevel(uint32_t PVDLevel)
{
MODIFY_REG(PWR->CR, PWR_CR_PLS, PVDLevel);
}
/**
* @brief Get the voltage threshold detection
* @rmtoll CR PLS LL_PWR_GetPVDLevel
* @retval Returned value can be one of the following values:
* @arg @ref LL_PWR_PVDLEVEL_0
* @arg @ref LL_PWR_PVDLEVEL_1
* @arg @ref LL_PWR_PVDLEVEL_2
* @arg @ref LL_PWR_PVDLEVEL_3
* @arg @ref LL_PWR_PVDLEVEL_4
* @arg @ref LL_PWR_PVDLEVEL_5
* @arg @ref LL_PWR_PVDLEVEL_6
* @arg @ref LL_PWR_PVDLEVEL_7
*/
__STATIC_INLINE uint32_t LL_PWR_GetPVDLevel(void)
{
return (uint32_t)(READ_BIT(PWR->CR, PWR_CR_PLS));
}
/**
* @brief Enable Power Voltage Detector
* @rmtoll CR PVDE LL_PWR_EnablePVD
* @retval None
*/
__STATIC_INLINE void LL_PWR_EnablePVD(void)
{
SET_BIT(PWR->CR, PWR_CR_PVDE);
}
/**
* @brief Disable Power Voltage Detector
* @rmtoll CR PVDE LL_PWR_DisablePVD
* @retval None
*/
__STATIC_INLINE void LL_PWR_DisablePVD(void)
{
CLEAR_BIT(PWR->CR, PWR_CR_PVDE);
}
/**
* @brief Check if Power Voltage Detector is enabled
* @rmtoll CR PVDE LL_PWR_IsEnabledPVD
* @retval State of bit (1 or 0).
*/
__STATIC_INLINE uint32_t LL_PWR_IsEnabledPVD(void)
{
return (READ_BIT(PWR->CR, PWR_CR_PVDE) == (PWR_CR_PVDE));
}
#endif /* PWR_PVD_SUPPORT */
/**
* @brief Enable the WakeUp PINx functionality
* @rmtoll CSR EWUP1 LL_PWR_EnableWakeUpPin\n
* @rmtoll CSR EWUP2 LL_PWR_EnableWakeUpPin\n
* @rmtoll CSR EWUP3 LL_PWR_EnableWakeUpPin
* @param WakeUpPin This parameter can be one of the following values:
* @arg @ref LL_PWR_WAKEUP_PIN1
* @arg @ref LL_PWR_WAKEUP_PIN2
* @arg @ref LL_PWR_WAKEUP_PIN3 (*)
*
* (*) not available on all devices
* @retval None
*/
__STATIC_INLINE void LL_PWR_EnableWakeUpPin(uint32_t WakeUpPin)
{
SET_BIT(PWR->CSR, WakeUpPin);
}
/**
* @brief Disable the WakeUp PINx functionality
* @rmtoll CSR EWUP1 LL_PWR_DisableWakeUpPin\n
* @rmtoll CSR EWUP2 LL_PWR_DisableWakeUpPin\n
* @rmtoll CSR EWUP3 LL_PWR_DisableWakeUpPin
* @param WakeUpPin This parameter can be one of the following values:
* @arg @ref LL_PWR_WAKEUP_PIN1
* @arg @ref LL_PWR_WAKEUP_PIN2
* @arg @ref LL_PWR_WAKEUP_PIN3 (*)
*
* (*) not available on all devices
* @retval None
*/
__STATIC_INLINE void LL_PWR_DisableWakeUpPin(uint32_t WakeUpPin)
{
CLEAR_BIT(PWR->CSR, WakeUpPin);
}
/**
* @brief Check if the WakeUp PINx functionality is enabled
* @rmtoll CSR EWUP1 LL_PWR_IsEnabledWakeUpPin\n
* @rmtoll CSR EWUP2 LL_PWR_IsEnabledWakeUpPin\n
* @rmtoll CSR EWUP3 LL_PWR_IsEnabledWakeUpPin
* @param WakeUpPin This parameter can be one of the following values:
* @arg @ref LL_PWR_WAKEUP_PIN1
* @arg @ref LL_PWR_WAKEUP_PIN2
* @arg @ref LL_PWR_WAKEUP_PIN3 (*)
*
* (*) not available on all devices
* @retval State of bit (1 or 0).
*/
__STATIC_INLINE uint32_t LL_PWR_IsEnabledWakeUpPin(uint32_t WakeUpPin)
{
return (READ_BIT(PWR->CSR, WakeUpPin) == (WakeUpPin));
}
/**
* @}
*/
/** @defgroup PWR_LL_EF_FLAG_Management FLAG_Management
* @{
*/
/**
* @brief Get Wake-up Flag
* @rmtoll CSR WUF LL_PWR_IsActiveFlag_WU
* @retval State of bit (1 or 0).
*/
__STATIC_INLINE uint32_t LL_PWR_IsActiveFlag_WU(void)
{
return (READ_BIT(PWR->CSR, PWR_CSR_WUF) == (PWR_CSR_WUF));
}
/**
* @brief Get Standby Flag
* @rmtoll CSR SBF LL_PWR_IsActiveFlag_SB
* @retval State of bit (1 or 0).
*/
__STATIC_INLINE uint32_t LL_PWR_IsActiveFlag_SB(void)
{
return (READ_BIT(PWR->CSR, PWR_CSR_SBF) == (PWR_CSR_SBF));
}
#if defined(PWR_PVD_SUPPORT)
/**
* @brief Indicate whether VDD voltage is below the selected PVD threshold
* @rmtoll CSR PVDO LL_PWR_IsActiveFlag_PVDO
* @retval State of bit (1 or 0).
*/
__STATIC_INLINE uint32_t LL_PWR_IsActiveFlag_PVDO(void)
{
return (READ_BIT(PWR->CSR, PWR_CSR_PVDO) == (PWR_CSR_PVDO));
}
#endif /* PWR_PVD_SUPPORT */
#if defined(PWR_CSR_VREFINTRDYF)
/**
* @brief Get Internal Reference VrefInt Flag
* @rmtoll CSR VREFINTRDYF LL_PWR_IsActiveFlag_VREFINTRDY
* @retval State of bit (1 or 0).
*/
__STATIC_INLINE uint32_t LL_PWR_IsActiveFlag_VREFINTRDY(void)
{
return (READ_BIT(PWR->CSR, PWR_CSR_VREFINTRDYF) == (PWR_CSR_VREFINTRDYF));
}
#endif /* PWR_CSR_VREFINTRDYF */
/**
* @brief Clear Standby Flag
* @rmtoll CR CSBF LL_PWR_ClearFlag_SB
* @retval None
*/
__STATIC_INLINE void LL_PWR_ClearFlag_SB(void)
{
SET_BIT(PWR->CR, PWR_CR_CSBF);
}
/**
* @brief Clear Wake-up Flags
* @rmtoll CR CWUF LL_PWR_ClearFlag_WU
* @retval None
*/
__STATIC_INLINE void LL_PWR_ClearFlag_WU(void)
{
SET_BIT(PWR->CR, PWR_CR_CWUF);
}
/**
* @}
*/
#if defined(USE_FULL_LL_DRIVER)
/** @defgroup PWR_LL_EF_Init De-initialization function
* @{
*/
ErrorStatus LL_PWR_DeInit(void);
/**
* @}
*/
#endif /* USE_FULL_LL_DRIVER */
/**
* @}
*/
/**
* @}
*/
#endif /* defined(PWR) */
/**
* @}
*/
#ifdef __cplusplus
}
#endif
#endif /* __STM32F3xx_LL_PWR_H */
/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/

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@ -0,0 +1,282 @@
/**
******************************************************************************
* @file stm32f3xx_ll_utils.h
* @author MCD Application Team
* @brief Header file of UTILS LL module.
@verbatim
==============================================================================
##### How to use this driver #####
==============================================================================
[..]
The LL UTILS driver contains a set of generic APIs that can be
used by user:
(+) Device electronic signature
(+) Timing functions
(+) PLL configuration functions
@endverbatim
******************************************************************************
* @attention
*
* <h2><center>&copy; Copyright (c) 2016 STMicroelectronics.
* All rights reserved.</center></h2>
*
* This software component is licensed by ST under BSD 3-Clause license,
* the "License"; You may not use this file except in compliance with the
* License. You may obtain a copy of the License at:
* opensource.org/licenses/BSD-3-Clause
*
******************************************************************************
*/
/* Define to prevent recursive inclusion -------------------------------------*/
#ifndef __STM32F3xx_LL_UTILS_H
#define __STM32F3xx_LL_UTILS_H
#ifdef __cplusplus
extern "C" {
#endif
/* Includes ------------------------------------------------------------------*/
#include "stm32f3xx.h"
/** @addtogroup STM32F3xx_LL_Driver
* @{
*/
/** @defgroup UTILS_LL UTILS
* @{
*/
/* Private types -------------------------------------------------------------*/
/* Private variables ---------------------------------------------------------*/
/* Private constants ---------------------------------------------------------*/
/** @defgroup UTILS_LL_Private_Constants UTILS Private Constants
* @{
*/
/* Max delay can be used in LL_mDelay */
#define LL_MAX_DELAY 0xFFFFFFFFU
/**
* @brief Unique device ID register base address
*/
#define UID_BASE_ADDRESS UID_BASE
/**
* @brief Flash size data register base address
*/
#define FLASHSIZE_BASE_ADDRESS FLASHSIZE_BASE
/**
* @brief Package data register base address
*/
#define PACKAGE_BASE_ADDRESS PACKAGE_BASE
/**
* @}
*/
/* Private macros ------------------------------------------------------------*/
/** @defgroup UTILS_LL_Private_Macros UTILS Private Macros
* @{
*/
/**
* @}
*/
/* Exported types ------------------------------------------------------------*/
/** @defgroup UTILS_LL_ES_INIT UTILS Exported structures
* @{
*/
/**
* @brief UTILS PLL structure definition
*/
typedef struct
{
uint32_t PLLMul; /*!< Multiplication factor for PLL VCO input clock.
This parameter can be a value of @ref RCC_LL_EC_PLL_MUL
This feature can be modified afterwards using unitary function
@ref LL_RCC_PLL_ConfigDomain_SYS(). */
#if defined(RCC_PLLSRC_PREDIV1_SUPPORT)
uint32_t PLLDiv; /*!< Division factor for PLL VCO output clock.
This parameter can be a value of @ref RCC_LL_EC_PREDIV_DIV
This feature can be modified afterwards using unitary function
@ref LL_RCC_PLL_ConfigDomain_SYS(). */
#else
uint32_t Prediv; /*!< Division factor for HSE used as PLL clock source.
This parameter can be a value of @ref RCC_LL_EC_PREDIV_DIV
This feature can be modified afterwards using unitary function
@ref LL_RCC_PLL_ConfigDomain_SYS(). */
#endif /* RCC_PLLSRC_PREDIV1_SUPPORT */
} LL_UTILS_PLLInitTypeDef;
/**
* @brief UTILS System, AHB and APB buses clock configuration structure definition
*/
typedef struct
{
uint32_t AHBCLKDivider; /*!< The AHB clock (HCLK) divider. This clock is derived from the system clock (SYSCLK).
This parameter can be a value of @ref RCC_LL_EC_SYSCLK_DIV
This feature can be modified afterwards using unitary function
@ref LL_RCC_SetAHBPrescaler(). */
uint32_t APB1CLKDivider; /*!< The APB1 clock (PCLK1) divider. This clock is derived from the AHB clock (HCLK).
This parameter can be a value of @ref RCC_LL_EC_APB1_DIV
This feature can be modified afterwards using unitary function
@ref LL_RCC_SetAPB1Prescaler(). */
uint32_t APB2CLKDivider; /*!< The APB2 clock (PCLK2) divider. This clock is derived from the AHB clock (HCLK).
This parameter can be a value of @ref RCC_LL_EC_APB2_DIV
This feature can be modified afterwards using unitary function
@ref LL_RCC_SetAPB2Prescaler(). */
} LL_UTILS_ClkInitTypeDef;
/**
* @}
*/
/* Exported constants --------------------------------------------------------*/
/** @defgroup UTILS_LL_Exported_Constants UTILS Exported Constants
* @{
*/
/** @defgroup UTILS_EC_HSE_BYPASS HSE Bypass activation
* @{
*/
#define LL_UTILS_HSEBYPASS_OFF 0x00000000U /*!< HSE Bypass is not enabled */
#define LL_UTILS_HSEBYPASS_ON 0x00000001U /*!< HSE Bypass is enabled */
/**
* @}
*/
/**
* @}
*/
/* Exported macro ------------------------------------------------------------*/
/* Exported functions --------------------------------------------------------*/
/** @defgroup UTILS_LL_Exported_Functions UTILS Exported Functions
* @{
*/
/** @defgroup UTILS_EF_DEVICE_ELECTRONIC_SIGNATURE DEVICE ELECTRONIC SIGNATURE
* @{
*/
/**
* @brief Get Word0 of the unique device identifier (UID based on 96 bits)
* @retval UID[31:0]: X and Y coordinates on the wafer expressed in BCD format
*/
__STATIC_INLINE uint32_t LL_GetUID_Word0(void)
{
return (uint32_t)(READ_REG(*((uint32_t *)UID_BASE_ADDRESS)));
}
/**
* @brief Get Word1 of the unique device identifier (UID based on 96 bits)
* @retval UID[63:32]: Wafer number (UID[39:32]) & LOT_NUM[23:0] (UID[63:40])
*/
__STATIC_INLINE uint32_t LL_GetUID_Word1(void)
{
return (uint32_t)(READ_REG(*((uint32_t *)(UID_BASE_ADDRESS + 4U))));
}
/**
* @brief Get Word2 of the unique device identifier (UID based on 96 bits)
* @retval UID[95:64]: Lot number (ASCII encoded) - LOT_NUM[55:24]
*/
__STATIC_INLINE uint32_t LL_GetUID_Word2(void)
{
return (uint32_t)(READ_REG(*((uint32_t *)(UID_BASE_ADDRESS + 8U))));
}
/**
* @brief Get Flash memory size
* @note This bitfield indicates the size of the device Flash memory expressed in
* Kbytes. As an example, 0x040 corresponds to 64 Kbytes.
* @retval FLASH_SIZE[15:0]: Flash memory size
*/
__STATIC_INLINE uint32_t LL_GetFlashSize(void)
{
return (uint16_t)(READ_REG(*((uint32_t *)FLASHSIZE_BASE_ADDRESS)));
}
/**
* @}
*/
/** @defgroup UTILS_LL_EF_DELAY DELAY
* @{
*/
/**
* @brief This function configures the Cortex-M SysTick source of the time base.
* @param HCLKFrequency HCLK frequency in Hz (can be calculated thanks to RCC helper macro)
* @note When a RTOS is used, it is recommended to avoid changing the SysTick
* configuration by calling this function, for a delay use rather osDelay RTOS service.
* @param Ticks Number of ticks
* @retval None
*/
__STATIC_INLINE void LL_InitTick(uint32_t HCLKFrequency, uint32_t Ticks)
{
/* Configure the SysTick to have interrupt in 1ms time base */
SysTick->LOAD = (uint32_t)((HCLKFrequency / Ticks) - 1UL); /* set reload register */
SysTick->VAL = 0UL; /* Load the SysTick Counter Value */
SysTick->CTRL = SysTick_CTRL_CLKSOURCE_Msk |
SysTick_CTRL_ENABLE_Msk; /* Enable the Systick Timer */
}
void LL_Init1msTick(uint32_t HCLKFrequency);
void LL_mDelay(uint32_t Delay);
/**
* @}
*/
/** @defgroup UTILS_EF_SYSTEM SYSTEM
* @{
*/
void LL_SetSystemCoreClock(uint32_t HCLKFrequency);
#if defined(FLASH_ACR_LATENCY)
ErrorStatus LL_SetFlashLatency(uint32_t Frequency);
#endif /* FLASH_ACR_LATENCY */
ErrorStatus LL_PLL_ConfigSystemClock_HSI(LL_UTILS_PLLInitTypeDef *UTILS_PLLInitStruct,
LL_UTILS_ClkInitTypeDef *UTILS_ClkInitStruct);
ErrorStatus LL_PLL_ConfigSystemClock_HSE(uint32_t HSEFrequency, uint32_t HSEBypass,
LL_UTILS_PLLInitTypeDef *UTILS_PLLInitStruct, LL_UTILS_ClkInitTypeDef *UTILS_ClkInitStruct);
/**
* @}
*/
/**
* @}
*/
/**
* @}
*/
/**
* @}
*/
#ifdef __cplusplus
}
#endif
#endif /* __STM32F3xx_LL_UTILS_H */
/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/

View File

@ -0,0 +1,285 @@
/**
******************************************************************************
* @file stm32f3xx_hal_iwdg.c
* @author MCD Application Team
* @brief IWDG HAL module driver.
* This file provides firmware functions to manage the following
* functionalities of the Independent Watchdog (IWDG) peripheral:
* + Initialization and Start functions
* + IO operation functions
*
@verbatim
==============================================================================
##### IWDG Generic features #####
==============================================================================
[..]
(+) The IWDG can be started by either software or hardware (configurable
through option byte).
(+) The IWDG is clocked by the Low-Speed Internal clock (LSI) and thus stays
active even if the main clock fails.
(+) Once the IWDG is started, the LSI is forced ON and both cannot be
disabled. The counter starts counting down from the reset value (0xFFF).
When it reaches the end of count value (0x000) a reset signal is
generated (IWDG reset).
(+) Whenever the key value 0x0000 AAAA is written in the IWDG_KR register,
the IWDG_RLR value is reloaded into the counter and the watchdog reset
is prevented.
(+) The IWDG is implemented in the VDD voltage domain that is still functional
in STOP and STANDBY mode (IWDG reset can wake up the CPU from STANDBY).
IWDGRST flag in RCC_CSR register can be used to inform when an IWDG
reset occurs.
(+) Debug mode: When the microcontroller enters debug mode (core halted),
the IWDG counter either continues to work normally or stops, depending
on DBG_IWDG_STOP configuration bit in DBG module, accessible through
__HAL_DBGMCU_FREEZE_IWDG() and __HAL_DBGMCU_UNFREEZE_IWDG() macros.
[..] Min-max timeout value @40KHz (LSI): ~100us / ~26.2s
The IWDG timeout may vary due to LSI clock frequency dispersion.
STM32F3xx devices provide the capability to measure the LSI clock
frequency (LSI clock is internally connected to TIM16 CH1 input capture).
The measured value can be used to have an IWDG timeout with an
acceptable accuracy.
[..] Default timeout value (necessary for IWDG_SR status register update):
Constant LSI_VALUE is defined based on the nominal LSI clock frequency.
This frequency being subject to variations as mentioned above, the
default timeout value (defined through constant HAL_IWDG_DEFAULT_TIMEOUT
below) may become too short or too long.
In such cases, this default timeout value can be tuned by redefining
the constant LSI_VALUE at user-application level (based, for instance,
on the measured LSI clock frequency as explained above).
##### How to use this driver #####
==============================================================================
[..]
(#) Use IWDG using HAL_IWDG_Init() function to :
(++) Enable instance by writing Start keyword in IWDG_KEY register. LSI
clock is forced ON and IWDG counter starts counting down.
(++) Enable write access to configuration registers:
IWDG_PR, IWDG_RLR and IWDG_WINR.
(++) Configure the IWDG prescaler and counter reload value. This reload
value will be loaded in the IWDG counter each time the watchdog is
reloaded, then the IWDG will start counting down from this value.
(++) Depending on window parameter:
(+++) If Window Init parameter is same as Window register value,
nothing more is done but reload counter value in order to exit
function with exact time base.
(+++) Else modify Window register. This will automatically reload
watchdog counter.
(++) Wait for status flags to be reset.
(#) Then the application program must refresh the IWDG counter at regular
intervals during normal operation to prevent an MCU reset, using
HAL_IWDG_Refresh() function.
*** IWDG HAL driver macros list ***
====================================
[..]
Below the list of most used macros in IWDG HAL driver:
(+) __HAL_IWDG_START: Enable the IWDG peripheral
(+) __HAL_IWDG_RELOAD_COUNTER: Reloads IWDG counter with value defined in
the reload register
@endverbatim
******************************************************************************
* @attention
*
* <h2><center>&copy; Copyright (c) 2016 STMicroelectronics.
* All rights reserved.</center></h2>
*
* This software component is licensed by ST under BSD 3-Clause license,
* the "License"; You may not use this file except in compliance with the
* License. You may obtain a copy of the License at:
* opensource.org/licenses/BSD-3-Clause
*
******************************************************************************
*/
/* Includes ------------------------------------------------------------------*/
#include "stm32f3xx_hal.h"
/** @addtogroup STM32F3xx_HAL_Driver
* @{
*/
#ifdef HAL_IWDG_MODULE_ENABLED
/** @addtogroup IWDG
* @brief IWDG HAL module driver.
* @{
*/
/* Private typedef -----------------------------------------------------------*/
/* Private define ------------------------------------------------------------*/
/** @defgroup IWDG_Private_Defines IWDG Private Defines
* @{
*/
/* Status register needs up to 5 LSI clock periods divided by the clock
prescaler to be updated. The number of LSI clock periods is upper-rounded to
6 for the timeout value calculation.
The timeout value is calculated using the highest prescaler (256) and
the LSI_VALUE constant. The value of this constant can be changed by the user
to take into account possible LSI clock period variations.
The timeout value is multiplied by 1000 to be converted in milliseconds.
LSI startup time is also considered here by adding LSI_STARTUP_TIMEOUT
converted in milliseconds. */
#define HAL_IWDG_DEFAULT_TIMEOUT (((6UL * 256UL * 1000UL) / LSI_VALUE) + ((LSI_STARTUP_TIME / 1000UL) + 1UL))
#define IWDG_KERNEL_UPDATE_FLAGS (IWDG_SR_WVU | IWDG_SR_RVU | IWDG_SR_PVU)
/**
* @}
*/
/* Private macro -------------------------------------------------------------*/
/* Private variables ---------------------------------------------------------*/
/* Private function prototypes -----------------------------------------------*/
/* Exported functions --------------------------------------------------------*/
/** @addtogroup IWDG_Exported_Functions
* @{
*/
/** @addtogroup IWDG_Exported_Functions_Group1
* @brief Initialization and Start functions.
*
@verbatim
===============================================================================
##### Initialization and Start functions #####
===============================================================================
[..] This section provides functions allowing to:
(+) Initialize the IWDG according to the specified parameters in the
IWDG_InitTypeDef of associated handle.
(+) Manage Window option.
(+) Once initialization is performed in HAL_IWDG_Init function, Watchdog
is reloaded in order to exit function with correct time base.
@endverbatim
* @{
*/
/**
* @brief Initialize the IWDG according to the specified parameters in the
* IWDG_InitTypeDef and start watchdog. Before exiting function,
* watchdog is refreshed in order to have correct time base.
* @param hiwdg pointer to a IWDG_HandleTypeDef structure that contains
* the configuration information for the specified IWDG module.
* @retval HAL status
*/
HAL_StatusTypeDef HAL_IWDG_Init(IWDG_HandleTypeDef *hiwdg)
{
uint32_t tickstart;
/* Check the IWDG handle allocation */
if (hiwdg == NULL)
{
return HAL_ERROR;
}
/* Check the parameters */
assert_param(IS_IWDG_ALL_INSTANCE(hiwdg->Instance));
assert_param(IS_IWDG_PRESCALER(hiwdg->Init.Prescaler));
assert_param(IS_IWDG_RELOAD(hiwdg->Init.Reload));
assert_param(IS_IWDG_WINDOW(hiwdg->Init.Window));
/* Enable IWDG. LSI is turned on automatically */
__HAL_IWDG_START(hiwdg);
/* Enable write access to IWDG_PR, IWDG_RLR and IWDG_WINR registers by writing
0x5555 in KR */
IWDG_ENABLE_WRITE_ACCESS(hiwdg);
/* Write to IWDG registers the Prescaler & Reload values to work with */
hiwdg->Instance->PR = hiwdg->Init.Prescaler;
hiwdg->Instance->RLR = hiwdg->Init.Reload;
/* Check pending flag, if previous update not done, return timeout */
tickstart = HAL_GetTick();
/* Wait for register to be updated */
while ((hiwdg->Instance->SR & IWDG_KERNEL_UPDATE_FLAGS) != 0x00u)
{
if ((HAL_GetTick() - tickstart) > HAL_IWDG_DEFAULT_TIMEOUT)
{
if ((hiwdg->Instance->SR & IWDG_KERNEL_UPDATE_FLAGS) != 0x00u)
{
return HAL_TIMEOUT;
}
}
}
/* If window parameter is different than current value, modify window
register */
if (hiwdg->Instance->WINR != hiwdg->Init.Window)
{
/* Write to IWDG WINR the IWDG_Window value to compare with. In any case,
even if window feature is disabled, Watchdog will be reloaded by writing
windows register */
hiwdg->Instance->WINR = hiwdg->Init.Window;
}
else
{
/* Reload IWDG counter with value defined in the reload register */
__HAL_IWDG_RELOAD_COUNTER(hiwdg);
}
/* Return function status */
return HAL_OK;
}
/**
* @}
*/
/** @addtogroup IWDG_Exported_Functions_Group2
* @brief IO operation functions
*
@verbatim
===============================================================================
##### IO operation functions #####
===============================================================================
[..] This section provides functions allowing to:
(+) Refresh the IWDG.
@endverbatim
* @{
*/
/**
* @brief Refresh the IWDG.
* @param hiwdg pointer to a IWDG_HandleTypeDef structure that contains
* the configuration information for the specified IWDG module.
* @retval HAL status
*/
HAL_StatusTypeDef HAL_IWDG_Refresh(IWDG_HandleTypeDef *hiwdg)
{
/* Reload IWDG counter with value defined in the reload register */
__HAL_IWDG_RELOAD_COUNTER(hiwdg);
/* Return function status */
return HAL_OK;
}
/**
* @}
*/
/**
* @}
*/
#endif /* HAL_IWDG_MODULE_ENABLED */
/**
* @}
*/
/**
* @}
*/
/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/

View File

@ -38,8 +38,8 @@ ENTRY(Reset_Handler)
/* Highest address of the user mode stack */
_estack = ORIGIN(RAM) + LENGTH(RAM); /* end of "RAM" Ram type memory */
_Min_Heap_Size = 0x200 ; /* required amount of heap */
_Min_Stack_Size = 0x400 ; /* required amount of stack */
_Min_Heap_Size = 0x200; /* required amount of heap */
_Min_Stack_Size = 0x400; /* required amount of stack */
/* Memories definition */
MEMORY

View File

@ -26,19 +26,19 @@
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<stringAttribute key="com.st.stm32cube.ide.mcu.debug.stlinkrestart_configurations" value="{&quot;fVersion&quot;:1,&quot;fItems&quot;:[{&quot;fDisplayName&quot;:&quot;Reset&quot;,&quot;fIsSuppressible&quot;:false,&quot;fResetAttribute&quot;:&quot;Software system reset&quot;,&quot;fResetStrategies&quot;:[{&quot;fDisplayName&quot;:&quot;Software system reset&quot;,&quot;fLaunchAttribute&quot;:&quot;system_reset&quot;,&quot;fGdbCommands&quot;:[&quot;monitor reset\n&quot;],&quot;fCmdOptions&quot;:[&quot;-g&quot;]},{&quot;fDisplayName&quot;:&quot;Hardware reset&quot;,&quot;fLaunchAttribute&quot;:&quot;hardware_reset&quot;,&quot;fGdbCommands&quot;:[&quot;monitor reset hardware\n&quot;],&quot;fCmdOptions&quot;:[&quot;-g&quot;]},{&quot;fDisplayName&quot;:&quot;Core reset&quot;,&quot;fLaunchAttribute&quot;:&quot;core_reset&quot;,&quot;fGdbCommands&quot;:[&quot;monitor reset core\n&quot;],&quot;fCmdOptions&quot;:[&quot;-g&quot;]},{&quot;fDisplayName&quot;:&quot;None&quot;,&quot;fLaunchAttribute&quot;:&quot;no_reset&quot;,&quot;fGdbCommands&quot;:[],&quot;fCmdOptions&quot;:[&quot;-g&quot;]}],&quot;fGdbCommandGroup&quot;:{&quot;name&quot;:&quot;Additional commands&quot;,&quot;commands&quot;:[]},&quot;fStartApplication&quot;:true}]}"/>
<booleanAttribute key="com.st.stm32cube.ide.mcu.rtosproxy.enableRtosProxy" value="false"/>
<stringAttribute key="com.st.stm32cube.ide.mcu.rtosproxy.rtosProxyCustomProperties" value=""/>
<stringAttribute key="com.st.stm32cube.ide.mcu.rtosproxy.rtosProxyDriver" value="threadx"/>

View File

@ -1,58 +1,92 @@
#MicroXplorer Configuration settings - do not modify
CAD.formats=
CAD.pinconfig=
CAD.provider=
CAN.ABOM=ENABLE
CAN.AWUM=ENABLE
CAN.BS1=CAN_BS1_13TQ
CAN.BS2=CAN_BS2_2TQ
CAN.CalculateBaudRate=500000
CAN.CalculateTimeBit=2000
CAN.CalculateTimeQuantum=125.0
CAN.IPParameters=CalculateTimeQuantum,CalculateTimeBit,CalculateBaudRate,Prescaler,BS1,BS2,SJW,NART
CAN.IPParameters=CalculateTimeQuantum,CalculateTimeBit,CalculateBaudRate,Prescaler,BS1,BS2,SJW,NART,ABOM,AWUM
CAN.NART=ENABLE
CAN.Prescaler=1
CAN.SJW=CAN_SJW_1TQ
File.Version=6
GPIO.groupedBy=Group By Peripherals
IWDG.IPParameters=Window,Reload
IWDG.Reload=1000
IWDG.Window=1000
KeepUserPlacement=false
Mcu.CPN=STM32F302C8T6
Mcu.Family=STM32F3
Mcu.IP0=CAN
Mcu.IP1=NVIC
Mcu.IP2=RCC
Mcu.IP3=SYS
Mcu.IPNb=4
Mcu.IP1=IWDG
Mcu.IP2=NVIC
Mcu.IP3=RCC
Mcu.IP4=SYS
Mcu.IPNb=5
Mcu.Name=STM32F302C(6-8)Tx
Mcu.Package=LQFP48
Mcu.Pin0=PA1
Mcu.Pin1=PA3
Mcu.Pin10=PB3
Mcu.Pin11=VP_SYS_VS_Systick
Mcu.Pin2=PA4
Mcu.Pin3=PA5
Mcu.Pin4=PA7
Mcu.Pin5=PA8
Mcu.Pin6=PA11
Mcu.Pin7=PA12
Mcu.Pin8=PA13
Mcu.Pin9=PA14
Mcu.PinsNb=12
Mcu.Pin0=PA0
Mcu.Pin1=PA1
Mcu.Pin10=PB10
Mcu.Pin11=PB11
Mcu.Pin12=PA9
Mcu.Pin13=PA10
Mcu.Pin14=PA11
Mcu.Pin15=PA12
Mcu.Pin16=PA13
Mcu.Pin17=PA14
Mcu.Pin18=PA15
Mcu.Pin19=PB3
Mcu.Pin2=PA2
Mcu.Pin20=PB4
Mcu.Pin21=PB5
Mcu.Pin22=PB6
Mcu.Pin23=PB7
Mcu.Pin24=PB8
Mcu.Pin25=PB9
Mcu.Pin26=VP_IWDG_VS_IWDG
Mcu.Pin27=VP_SYS_VS_Systick
Mcu.Pin3=PA3
Mcu.Pin4=PA4
Mcu.Pin5=PA5
Mcu.Pin6=PA6
Mcu.Pin7=PA7
Mcu.Pin8=PB0
Mcu.Pin9=PB1
Mcu.PinsNb=28
Mcu.ThirdPartyNb=0
Mcu.UserConstants=
Mcu.UserName=STM32F302C8Tx
MxCube.Version=6.4.0
MxDb.Version=DB.6.0.40
NVIC.BusFault_IRQn=true\:0\:0\:false\:false\:true\:false\:false
NVIC.DebugMonitor_IRQn=true\:0\:0\:false\:false\:true\:false\:false
MxCube.Version=6.6.1
MxDb.Version=DB.6.0.60
NVIC.BusFault_IRQn=true\:0\:0\:false\:false\:true\:false\:false\:false
NVIC.DebugMonitor_IRQn=true\:0\:0\:false\:false\:true\:false\:false\:false
NVIC.ForceEnableDMAVector=true
NVIC.HardFault_IRQn=true\:0\:0\:false\:false\:true\:false\:false
NVIC.MemoryManagement_IRQn=true\:0\:0\:false\:false\:true\:false\:false
NVIC.NonMaskableInt_IRQn=true\:0\:0\:false\:false\:true\:false\:false
NVIC.PendSV_IRQn=true\:0\:0\:false\:false\:true\:false\:false
NVIC.HardFault_IRQn=true\:0\:0\:false\:false\:true\:false\:false\:false
NVIC.MemoryManagement_IRQn=true\:0\:0\:false\:false\:true\:false\:false\:false
NVIC.NonMaskableInt_IRQn=true\:0\:0\:false\:false\:true\:false\:false\:false
NVIC.PendSV_IRQn=true\:0\:0\:false\:false\:true\:false\:false\:false
NVIC.PriorityGroup=NVIC_PRIORITYGROUP_4
NVIC.SVCall_IRQn=true\:0\:0\:false\:false\:true\:false\:false
NVIC.SysTick_IRQn=true\:15\:0\:false\:false\:true\:false\:true
NVIC.USB_LP_CAN_RX0_IRQn=true\:0\:0\:false\:false\:true\:true\:true
NVIC.UsageFault_IRQn=true\:0\:0\:false\:false\:true\:false\:false
NVIC.SVCall_IRQn=true\:0\:0\:false\:false\:true\:false\:false\:false
NVIC.SysTick_IRQn=true\:15\:0\:false\:false\:true\:false\:true\:false
NVIC.USB_LP_CAN_RX0_IRQn=true\:0\:0\:false\:false\:true\:true\:true\:true
NVIC.UsageFault_IRQn=true\:0\:0\:false\:false\:true\:false\:false\:false
PA0.GPIOParameters=GPIO_Label
PA0.GPIO_Label=TS_activate_MUXed
PA0.Locked=true
PA0.Signal=GPIO_Input
PA1.GPIOParameters=GPIO_Label
PA1.GPIO_Label=SDC_is_ready
PA1.GPIO_Label=ASMS
PA1.Locked=true
PA1.Signal=GPIO_Input
PA10.GPIOParameters=GPIO_Label
PA10.GPIO_Label=Watchdog
PA10.Locked=true
PA10.Signal=GPIO_Output
PA11.Locked=true
PA11.Mode=CAN_Activate
PA11.Signal=CAN_RX
@ -63,29 +97,81 @@ PA13.Mode=Trace_Asynchronous_SW
PA13.Signal=SYS_JTMS-SWDIO
PA14.Mode=Trace_Asynchronous_SW
PA14.Signal=SYS_JTCK-SWCLK
PA15.GPIOParameters=GPIO_Label
PA15.GPIO_Label=AMC
PA15.Locked=true
PA15.Signal=GPIO_Input
PA2.GPIOParameters=GPIO_Label
PA2.GPIO_Label=INITIAL_OPEN
PA2.Locked=true
PA2.Signal=GPIO_Input
PA3.GPIOParameters=GPIO_Label
PA3.GPIO_Label=AS_close_SDC
PA3.GPIO_Label=CLOSED
PA3.Locked=true
PA3.Signal=GPIO_Output
PA3.Signal=GPIO_Input
PA4.GPIOParameters=GPIO_Label
PA4.GPIO_Label=AS_driving_mode
PA4.GPIO_Label=REOPENED
PA4.Locked=true
PA4.Signal=GPIO_Output
PA4.Signal=GPIO_Input
PA5.GPIOParameters=GPIO_Label
PA5.GPIO_Label=Watchdog
PA5.GPIO_Label=WD_OK
PA5.Locked=true
PA5.Signal=GPIO_Output
PA7.GPIOParameters=GPIO_PuPd,GPIO_Label
PA7.GPIO_Label=TS_activate_MUXed
PA7.GPIO_PuPd=GPIO_PULLDOWN
PA5.Signal=GPIO_Input
PA6.GPIOParameters=GPIO_Label
PA6.GPIO_Label=SDC_is_ready
PA6.Locked=true
PA6.Signal=GPIO_Input
PA7.GPIOParameters=GPIO_Label
PA7.GPIO_Label=SDC_in_3V3
PA7.Locked=true
PA7.Signal=GPIO_Input
PA8.GPIOParameters=GPIO_Label
PA8.GPIO_Label=SDC_in_3V3
PA8.Locked=true
PA8.Signal=GPIO_Input
PA9.GPIOParameters=PinState,GPIO_Label
PA9.GPIO_Label=AS_close_SDC
PA9.Locked=true
PA9.PinState=GPIO_PIN_SET
PA9.Signal=GPIO_Output
PB0.GPIOParameters=GPIO_Label
PB0.GPIO_Label=LV_SENSE_1
PB0.Locked=true
PB0.Signal=GPIO_Input
PB1.GPIOParameters=GPIO_Label
PB1.GPIO_Label=LV_SENSE_2
PB1.Locked=true
PB1.Signal=GPIO_Input
PB10.GPIOParameters=GPIO_Label
PB10.GPIO_Label=AMI_EBSTEST
PB10.Locked=true
PB10.Signal=GPIO_Output
PB11.GPIOParameters=GPIO_Label
PB11.GPIO_Label=AMI_INSPECTION
PB11.Locked=true
PB11.Signal=GPIO_Output
PB3.Mode=Trace_Asynchronous_SW
PB3.Signal=SYS_JTDO-TRACESWO
PB4.GPIOParameters=GPIO_Label
PB4.GPIO_Label=ASB_Error
PB4.Locked=true
PB4.Signal=GPIO_Output
PB5.GPIOParameters=GPIO_Label
PB5.GPIO_Label=AMI_TRACKDRIVE
PB5.Locked=true
PB5.Signal=GPIO_Output
PB6.GPIOParameters=GPIO_Label
PB6.GPIO_Label=AMI_AUTOX
PB6.Locked=true
PB6.Signal=GPIO_Output
PB7.GPIOParameters=GPIO_Label
PB7.GPIO_Label=AMI_SKIDPAD
PB7.Locked=true
PB7.Signal=GPIO_Output
PB8.GPIOParameters=GPIO_Label
PB8.GPIO_Label=AMI_ACCEL
PB8.Locked=true
PB8.Signal=GPIO_Output
PB9.GPIOParameters=GPIO_Label
PB9.GPIO_Label=AMI_MANUAL
PB9.Locked=true
PB9.Signal=GPIO_Output
PCC.Checker=false
PCC.Line=STM32F302
PCC.MCU=STM32F302C(6-8)Tx
@ -177,14 +263,17 @@ ProjectManager.PreviousToolchain=STM32CubeIDE
ProjectManager.ProjectBuild=false
ProjectManager.ProjectFileName=sdcl-firmware.ioc
ProjectManager.ProjectName=sdcl-firmware
ProjectManager.ProjectStructure=
ProjectManager.RegisterCallBack=
ProjectManager.StackSize=0x400
ProjectManager.TargetToolchain=STM32CubeIDE
ProjectManager.ToolChainLocation=
ProjectManager.UnderRoot=true
ProjectManager.functionlistsort=1-MX_GPIO_Init-GPIO-false-HAL-true,2-SystemClock_Config-RCC-false-HAL-false,3-MX_CAN_Init-CAN-false-HAL-true
ProjectManager.functionlistsort=1-MX_GPIO_Init-GPIO-false-HAL-true,2-SystemClock_Config-RCC-false-HAL-false,3-MX_CAN_Init-CAN-false-HAL-true,4-MX_IWDG_Init-IWDG-false-HAL-true
RCC.ADC12outputFreq_Value=16000000
RCC.AHBFreq_Value=8000000
RCC.APB1Freq_Value=8000000
RCC.APB1TimFreq_Value=8000000
RCC.APB2Freq_Value=8000000
RCC.CortexFreq_Value=8000000
RCC.FamilyName=M
@ -195,17 +284,21 @@ RCC.HSI_VALUE=8000000
RCC.I2C1Freq_Value=8000000
RCC.I2C2Freq_Value=8000000
RCC.I2C3Freq_Value=8000000
RCC.IPParameters=AHBFreq_Value,APB1Freq_Value,APB2Freq_Value,CortexFreq_Value,FamilyName,HSEPLLFreq_Value,HSE_VALUE,HSIPLLFreq_Value,HSI_VALUE,I2C1Freq_Value,I2C2Freq_Value,I2C3Freq_Value,LSE_VALUE,LSI_VALUE,PLLCLKFreq_Value,PLLMCOFreq_Value,RTCFreq_Value,RTCHSEDivFreq_Value,SYSCLKFreq_VALUE,TIM2Freq_Value,USART1Freq_Value,VCOOutput2Freq_Value
RCC.IPParameters=ADC12outputFreq_Value,AHBFreq_Value,APB1Freq_Value,APB1TimFreq_Value,APB2Freq_Value,CortexFreq_Value,FamilyName,HSEPLLFreq_Value,HSE_VALUE,HSIPLLFreq_Value,HSI_VALUE,I2C1Freq_Value,I2C2Freq_Value,I2C3Freq_Value,LSE_VALUE,LSI_VALUE,PLLCLKFreq_Value,PLLMCOFreq_Value,PLLMUL,RTCFreq_Value,RTCHSEDivFreq_Value,SYSCLKFreq_VALUE,TIM2Freq_Value,USART1Freq_Value,USBFreq_Value,VCOOutput2Freq_Value
RCC.LSE_VALUE=32768
RCC.LSI_VALUE=40000
RCC.PLLCLKFreq_Value=8000000
RCC.PLLMCOFreq_Value=8000000
RCC.PLLCLKFreq_Value=16000000
RCC.PLLMCOFreq_Value=16000000
RCC.PLLMUL=RCC_PLL_MUL4
RCC.RTCFreq_Value=40000
RCC.RTCHSEDivFreq_Value=250000
RCC.SYSCLKFreq_VALUE=8000000
RCC.TIM2Freq_Value=8000000
RCC.USART1Freq_Value=8000000
RCC.USBFreq_Value=16000000
RCC.VCOOutput2Freq_Value=4000000
VP_IWDG_VS_IWDG.Mode=IWDG_Activate
VP_IWDG_VS_IWDG.Signal=IWDG_VS_IWDG
VP_SYS_VS_Systick.Mode=SysTick
VP_SYS_VS_Systick.Signal=SYS_VS_Systick
board=custom

View File

@ -29,4 +29,5 @@ fp-info-cache
*.xml
*.csv
SDCL-backups/
export/

View File

@ -1,3 +0,0 @@
EESchema-DOCLIB Version 2.0
#
#End Doc Library

View File

@ -1,64 +0,0 @@
EESchema-LIBRARY Version 2.4
#encoding utf-8
#
# +3.3V-power
#
DEF +3.3V-power #PWR 0 0 Y Y 1 F P
F0 "#PWR" 0 -150 50 H I C CNN
F1 "+3.3V-power" 0 140 50 H V C CNN
F2 "" 0 0 50 H I C CNN
F3 "" 0 0 50 H I C CNN
DRAW
P 2 0 1 0 -30 50 0 100 N
P 2 0 1 0 0 0 0 100 N
P 2 0 1 0 0 100 30 50 N
X +3V3 1 0 0 0 U 50 50 1 1 W N
ENDDRAW
ENDDEF
#
# CP-Device
#
DEF CP-Device C 0 10 N Y 1 F N
F0 "C" 25 100 50 H V L CNN
F1 "CP-Device" 25 -100 50 H V L CNN
F2 "" 38 -150 50 H I C CNN
F3 "" 0 0 50 H I C CNN
$FPLIST
CP_*
$ENDFPLIST
DRAW
S -90 20 90 40 0 1 0 N
P 2 0 1 0 -70 90 -30 90 N
P 2 0 1 0 -50 110 -50 70 N
S 90 -20 -90 -40 0 1 0 F
X ~ 1 0 150 110 D 50 50 1 1 P
X ~ 2 0 -150 110 U 50 50 1 1 P
ENDDRAW
ENDDEF
#
# D_Zener_x2_ACom_KKA-Device
#
DEF D_Zener_x2_ACom_KKA-Device D 0 30 Y N 1 F N
F0 "D" 50 -100 50 H V C CNN
F1 "D_Zener_x2_ACom_KKA-Device" 0 100 50 H V C CNN
F2 "" 0 0 50 H I C CNN
F3 "" 0 0 50 H I C CNN
$FPLIST
SOT*
SC*
$ENDFPLIST
DRAW
P 2 0 1 0 -140 0 150 0 N
P 2 0 1 0 0 0 0 -100 N
P 3 0 1 10 -150 -50 -150 50 -130 50 N
P 3 0 1 10 130 -50 150 -50 150 50 N
P 6 0 1 10 -50 -50 -150 0 -50 50 -50 -50 -50 -50 -50 -50 N
P 6 0 1 10 50 50 150 0 50 -50 50 50 50 50 50 50 N
C 0 0 10 0 1 0 F
X K 1 -300 0 150 R 50 50 0 1 P
X K 2 300 0 150 L 50 50 0 1 P
X A 3 0 -200 100 U 50 50 0 1 P
ENDDRAW
ENDDEF
#
#End Library

File diff suppressed because it is too large Load Diff

View File

@ -1,5 +1,6 @@
{
"board": {
"3dviewports": [],
"design_settings": {
"defaults": {
"board_outline_line_width": 0.09999999999999999,
@ -45,11 +46,22 @@
"silk_text_upright": false,
"zones": {
"45_degree_only": false,
"min_clearance": 0.32999999999999996
"min_clearance": 0.39999999999999997
}
},
"diff_pair_dimensions": [],
"drc_exclusions": [],
"diff_pair_dimensions": [
{
"gap": 0.0,
"via_gap": 0.0,
"width": 0.0
}
],
"drc_exclusions": [
"courtyards_overlap|146655666|89350001|560e3988-3361-4d74-83df-0603892fca5b|ced02bd7-62ab-4180-b003-706d5fe404a1",
"courtyards_overlap|146655666|89350001|ced02bd7-62ab-4180-b003-706d5fe404a1|560e3988-3361-4d74-83df-0603892fca5b",
"courtyards_overlap|153599999|91035474|560e3988-3361-4d74-83df-0603892fca5b|6bc7dc00-f530-4f2f-986f-d27c3452cfab",
"courtyards_overlap|153599999|91035474|6bc7dc00-f530-4f2f-986f-d27c3452cfab|560e3988-3361-4d74-83df-0603892fca5b"
],
"meta": {
"filename": "board_design_settings.json",
"version": 2
@ -57,20 +69,26 @@
"rule_severities": {
"annular_width": "error",
"clearance": "error",
"connection_width": "warning",
"copper_edge_clearance": "error",
"copper_sliver": "warning",
"courtyards_overlap": "error",
"diff_pair_gap_out_of_range": "error",
"diff_pair_uncoupled_length_too_long": "error",
"drill_out_of_range": "error",
"duplicate_footprints": "warning",
"extra_footprint": "warning",
"footprint": "error",
"footprint_type_mismatch": "error",
"hole_clearance": "error",
"hole_near_hole": "error",
"invalid_outline": "error",
"isolated_copper": "warning",
"item_on_disabled_layer": "error",
"items_not_allowed": "error",
"length_out_of_range": "error",
"lib_footprint_issues": "warning",
"lib_footprint_mismatch": "warning",
"malformed_courtyard": "error",
"microvia_drill_out_of_range": "error",
"missing_courtyard": "ignore",
@ -80,9 +98,14 @@
"padstack": "error",
"pth_inside_courtyard": "ignore",
"shorting_items": "error",
"silk_edge_clearance": "warning",
"silk_over_copper": "warning",
"silk_overlap": "warning",
"skew_out_of_range": "error",
"solder_mask_bridge": "error",
"starved_thermal": "error",
"text_height": "warning",
"text_thickness": "warning",
"through_hole_pad_without_hole": "error",
"too_many_vias": "error",
"track_dangling": "warning",
@ -91,7 +114,6 @@
"unconnected_items": "error",
"unresolved_variable": "error",
"via_dangling": "warning",
"zone_has_empty_net": "error",
"zones_intersect": "error"
},
"rule_severitieslegacy_courtyards_overlap": true,
@ -101,28 +123,78 @@
"allow_microvias": false,
"max_error": 0.005,
"min_clearance": 0.0,
"min_connection": 0.0,
"min_copper_edge_clearance": 0.049999999999999996,
"min_hole_clearance": 0.25,
"min_hole_to_hole": 0.25,
"min_microvia_diameter": 0.19999999999999998,
"min_microvia_drill": 0.09999999999999999,
"min_resolved_spokes": 2,
"min_silk_clearance": 0.0,
"min_text_height": 0.7999999999999999,
"min_text_thickness": 0.08,
"min_through_hole_diameter": 0.3,
"min_track_width": 0.19999999999999998,
"min_via_annular_width": 0.049999999999999996,
"min_via_diameter": 0.39999999999999997,
"solder_mask_to_copper_clearance": 0.0,
"use_height_for_length_calcs": true
},
"teardrop_options": [
{
"td_allow_use_two_tracks": true,
"td_curve_segcount": 5,
"td_on_pad_in_zone": false,
"td_onpadsmd": true,
"td_onroundshapesonly": false,
"td_ontrackend": false,
"td_onviapad": true
}
],
"teardrop_parameters": [
{
"td_curve_segcount": 0,
"td_height_ratio": 1.0,
"td_length_ratio": 0.5,
"td_maxheight": 2.0,
"td_maxlen": 1.0,
"td_target_name": "td_round_shape",
"td_width_to_size_filter_ratio": 0.9
},
{
"td_curve_segcount": 0,
"td_height_ratio": 1.0,
"td_length_ratio": 0.5,
"td_maxheight": 2.0,
"td_maxlen": 1.0,
"td_target_name": "td_rect_shape",
"td_width_to_size_filter_ratio": 0.9
},
{
"td_curve_segcount": 0,
"td_height_ratio": 1.0,
"td_length_ratio": 0.5,
"td_maxheight": 2.0,
"td_maxlen": 1.0,
"td_target_name": "td_track_end",
"td_width_to_size_filter_ratio": 0.9
}
],
"track_widths": [
0.0,
0.5,
0.75
1.0
],
"via_dimensions": [
{
"diameter": 0.0,
"drill": 0.0
}
],
"via_dimensions": [],
"zones_allow_external_fillets": false,
"zones_use_no_outline": true
},
"layer_presets": []
"layer_presets": [],
"viewports": []
},
"boards": [],
"cvpcb": {
@ -306,18 +378,23 @@
"rule_severities": {
"bus_definition_conflict": "error",
"bus_entry_needed": "error",
"bus_label_syntax": "error",
"bus_to_bus_conflict": "error",
"bus_to_net_conflict": "error",
"conflicting_netclasses": "error",
"different_unit_footprint": "error",
"different_unit_net": "error",
"duplicate_reference": "error",
"duplicate_sheet_names": "error",
"endpoint_off_grid": "warning",
"extra_units": "error",
"global_label_dangling": "warning",
"hier_label_mismatch": "error",
"label_dangling": "error",
"lib_symbol_issues": "warning",
"missing_bidi_pin": "warning",
"missing_input_pin": "warning",
"missing_power_pin": "error",
"missing_unit": "warning",
"multiple_net_names": "warning",
"net_not_bus_member": "warning",
"no_connect_connected": "warning",
@ -327,6 +404,7 @@
"pin_to_pin": "warning",
"power_pin_not_driven": "error",
"similar_labels": "warning",
"simulation_model_issue": "error",
"unannotated": "error",
"unit_value_mismatch": "error",
"unresolved_variable": "error",
@ -344,7 +422,7 @@
"net_settings": {
"classes": [
{
"bus_width": 12.0,
"bus_width": 12,
"clearance": 0.2,
"diff_pair_gap": 0.25,
"diff_pair_via_gap": 0.25,
@ -358,13 +436,15 @@
"track_width": 0.25,
"via_diameter": 0.8,
"via_drill": 0.4,
"wire_width": 6.0
"wire_width": 6
}
],
"meta": {
"version": 2
"version": 3
},
"net_colors": null
"net_colors": null,
"netclass_assignments": null,
"netclass_patterns": []
},
"pcbnew": {
"last_paths": {
@ -372,7 +452,7 @@
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@ -380,6 +460,8 @@
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View File

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EESchema Schematic File Version 4
EELAYER 30 0
EELAYER END
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Title "SDCL - Meta"
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Rev "v1.0"
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(uuid d71f7058-1a63-443c-a2d4-234e95112d53)
(property "Reference" "R29" (at 126.8984 81.788 0)
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(symbol (lib_id "power:GND") (at 101.6 101.6 0) (mirror y) (unit 1)
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)

1069
sdcl-hardware/can.kicad_sch Normal file

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@ -1,253 +0,0 @@
EESchema Schematic File Version 4
EELAYER 30 0
EELAYER END
$Descr A4 11693 8268
encoding utf-8
Sheet 7 8
Title "SDCL - CAN"
Date "2021-12-16"
Rev "v1.0"
Comp "FaSTTUBe - Formula Student Team TU Berlin"
Comment1 "Car 113"
Comment2 "EBS Electronics"
Comment3 "CAN Bus input/output stage"
Comment4 ""
$EndDescr
$Comp
L Device:R R12
U 1 1 61B519D5
P 7700 4100
F 0 "R12" H 7770 4146 50 0000 L CNN
F 1 "10k" H 7770 4055 50 0000 L CNN
F 2 "Resistor_SMD:R_0603_1608Metric_Pad1.05x0.95mm_HandSolder" V 7630 4100 50 0001 C CNN
F 3 "~" H 7700 4100 50 0001 C CNN
1 7700 4100
1 0 0 -1
$EndComp
$Comp
L Device:R R11
U 1 1 61B519DB
P 3850 3700
F 0 "R11" H 3920 3746 50 0000 L CNN
F 1 "120" H 3920 3655 50 0000 L CNN
F 2 "Resistor_SMD:R_0603_1608Metric_Pad1.05x0.95mm_HandSolder" V 3780 3700 50 0001 C CNN
F 3 "~" H 3850 3700 50 0001 C CNN
1 3850 3700
1 0 0 -1
$EndComp
$Comp
L Device:C C14
U 1 1 61B519E1
P 6300 3700
F 0 "C14" H 6415 3746 50 0000 L CNN
F 1 "220p" H 6415 3655 50 0000 L CNN
F 2 "Capacitor_SMD:C_0603_1608Metric_Pad1.05x0.95mm_HandSolder" H 6338 3550 50 0001 C CNN
F 3 "~" H 6300 3700 50 0001 C CNN
1 6300 3700
1 0 0 -1
$EndComp
$Comp
L Device:C C15
U 1 1 61B519E7
P 8350 4100
F 0 "C15" H 8465 4146 50 0000 L CNN
F 1 "100n" H 8465 4055 50 0000 L CNN
F 2 "Capacitor_SMD:C_0603_1608Metric_Pad1.05x0.95mm_HandSolder" H 8388 3950 50 0001 C CNN
F 3 "~" H 8350 4100 50 0001 C CNN
1 8350 4100
1 0 0 -1
$EndComp
$Comp
L Device:C C12
U 1 1 61B519ED
P 5600 3550
F 0 "C12" H 5715 3596 50 0000 L CNN
F 1 "220p" H 5715 3505 50 0000 L CNN
F 2 "Capacitor_SMD:C_0603_1608Metric_Pad1.05x0.95mm_HandSolder" H 5638 3400 50 0001 C CNN
F 3 "~" H 5600 3550 50 0001 C CNN
1 5600 3550
1 0 0 -1
$EndComp
$Comp
L Device:C C13
U 1 1 61B519F3
P 5600 3850
F 0 "C13" H 5715 3896 50 0000 L CNN
F 1 "220p" H 5715 3805 50 0000 L CNN
F 2 "Capacitor_SMD:C_0603_1608Metric_Pad1.05x0.95mm_HandSolder" H 5638 3700 50 0001 C CNN
F 3 "~" H 5600 3850 50 0001 C CNN
1 5600 3850
1 0 0 -1
$EndComp
$Comp
L Device:D_Zener_x2_ACom_KKA D2
U 1 1 61B51A05
P 4450 3700
F 0 "D2" H 4450 3916 50 0000 C CNN
F 1 "CDSOT23-T05C" H 4450 3825 50 0000 C CNN
F 2 "Package_TO_SOT_SMD:SOT-23" H 4450 3700 50 0001 C CNN
F 3 "~" H 4450 3700 50 0001 C CNN
1 4450 3700
0 -1 -1 0
$EndComp
$Comp
L power:GND #PWR0142
U 1 1 61B51A36
P 6000 3700
F 0 "#PWR0142" H 6000 3450 50 0001 C CNN
F 1 "GND" H 6005 3527 50 0000 C CNN
F 2 "" H 6000 3700 50 0001 C CNN
F 3 "" H 6000 3700 50 0001 C CNN
1 6000 3700
1 0 0 -1
$EndComp
Wire Wire Line
7500 3850 7700 3850
Wire Wire Line
7700 3850 7700 3950
Wire Wire Line
7100 4050 7100 4250
Wire Wire Line
7100 4250 7700 4250
Wire Wire Line
8350 4250 7700 4250
Connection ~ 7700 4250
Wire Wire Line
8350 3350 7100 3350
$Comp
L power:GND #PWR0143
U 1 1 61B51A49
P 7100 4350
F 0 "#PWR0143" H 7100 4100 50 0001 C CNN
F 1 "GND" H 7105 4177 50 0000 C CNN
F 2 "" H 7100 4350 50 0001 C CNN
F 3 "" H 7100 4350 50 0001 C CNN
1 7100 4350
1 0 0 -1
$EndComp
Wire Wire Line
7100 4250 7100 4350
Connection ~ 7100 4250
Wire Wire Line
7100 3050 7100 3350
Wire Wire Line
3450 4000 3850 4000
Wire Wire Line
7600 3550 7500 3550
Wire Wire Line
7600 3650 7500 3650
$Comp
L power:+3.3V #PWR0156
U 1 1 61BBBAC3
P 7100 3050
F 0 "#PWR0156" H 7100 2900 50 0001 C CNN
F 1 "+3.3V" H 7115 3223 50 0000 C CNN
F 2 "" H 7100 3050 50 0001 C CNN
F 3 "" H 7100 3050 50 0001 C CNN
1 7100 3050
1 0 0 -1
$EndComp
Connection ~ 4850 3700
Wire Wire Line
4650 3700 4850 3700
$Comp
L Device:D_Zener_x2_ACom_KKA D3
U 1 1 61B51A0B
P 5150 3700
F 0 "D3" H 5150 3916 50 0000 C CNN
F 1 "CDSOT23-T05C" H 5150 3825 50 0000 C CNN
F 2 "Package_TO_SOT_SMD:SOT-23" H 5150 3700 50 0001 C CNN
F 3 "~" H 5150 3700 50 0001 C CNN
1 5150 3700
1 0 0 -1
$EndComp
Wire Wire Line
4850 3700 4850 3900
Wire Wire Line
4850 3900 5150 3900
Connection ~ 5600 3700
Wire Wire Line
5450 3700 5600 3700
Wire Wire Line
3850 4000 4450 4000
Wire Wire Line
3850 4000 3850 3850
Connection ~ 4450 4000
Wire Wire Line
4450 4000 5600 4000
Wire Wire Line
3850 3400 4450 3400
Wire Wire Line
3850 3400 3850 3550
Connection ~ 4450 3400
Wire Wire Line
4450 3400 5600 3400
Wire Wire Line
6300 4000 6300 3850
Wire Wire Line
6300 3400 6300 3550
Wire Wire Line
3850 3400 3450 3400
Connection ~ 3850 4000
Connection ~ 3850 3400
Wire Wire Line
6000 3700 5600 3700
Wire Wire Line
5600 3400 6300 3400
Connection ~ 5600 3400
Wire Wire Line
5600 4000 6300 4000
Connection ~ 5600 4000
Wire Wire Line
6300 3400 6700 3400
Wire Wire Line
6700 3400 6700 3650
Connection ~ 6300 3400
Wire Wire Line
6300 4000 6700 4000
Wire Wire Line
6700 3750 6700 4000
Connection ~ 6300 4000
Text Notes 4400 3350 0 50 ~ 0
What's this? How does it work?
Connection ~ 7100 3350
$Comp
L Interface_CAN_LIN:SN65HVD231 U8
U 1 1 61D66C8F
P 7100 3650
F 0 "U8" H 7100 4131 50 0000 C CNN
F 1 "SN65HVD231" H 7100 4040 50 0000 C CNN
F 2 "Package_SO:SOIC-8_3.9x4.9mm_P1.27mm" H 7100 3150 50 0001 C CNN
F 3 "http://www.ti.com/lit/ds/symlink/sn65hvd230.pdf" H 7000 4050 50 0001 C CNN
1 7100 3650
-1 0 0 -1
$EndComp
Wire Wire Line
8050 3750 7500 3750
Wire Wire Line
8350 3350 8350 3750
Wire Wire Line
8350 3750 8350 3950
Connection ~ 8350 3750
Text Notes 8050 3650 0 50 ~ 0
ONLY populate if it's one of the\ntransceivers that have `EN` on pin 5
$Comp
L Device:R R!1
U 1 1 61BF7CE9
P 8200 3750
F 0 "R!1" H 8270 3796 50 0000 L CNN
F 1 "∞" H 8270 3705 50 0000 L CNN
F 2 "Resistor_SMD:R_0603_1608Metric_Pad1.05x0.95mm_HandSolder" V 8130 3750 50 0001 C CNN
F 3 "~" H 8200 3750 50 0001 C CNN
1 8200 3750
0 1 1 0
$EndComp
Text HLabel 3450 3400 0 50 BiDi ~ 0
CAN_H
Text HLabel 3450 4000 0 50 BiDi ~ 0
CAN_L
Text HLabel 7600 3550 2 50 Input ~ 0
CAN_TX
Text HLabel 7600 3650 2 50 Output ~ 0
CAN_RX
$EndSCHEMATC

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@ -1,363 +0,0 @@
EESchema Schematic File Version 4
EELAYER 30 0
EELAYER END
$Descr A4 11693 8268
encoding utf-8
Sheet 7 8
Title "SDCL - Connections"
Date "2021-12-16"
Rev "v1.0"
Comp "FaSTTUBe - Formula Student Team TU Berlin"
Comment1 "Car 113"
Comment2 "EBS Electronics"
Comment3 "Electrical connections: Power, Programming, Buttons, CAN, SDC"
Comment4 ""
$EndDescr
$Comp
L Device:R R?
U 1 1 61BC33E6
P 8200 3900
AR Path="/61A897B7/61BC33E6" Ref="R?" Part="1"
AR Path="/61BBA8EA/61BC33E6" Ref="R6" Part="1"
F 0 "R6" V 8100 3900 50 0000 C CNN
F 1 "2k" V 8300 3900 50 0000 C CNN
F 2 "Resistor_SMD:R_0603_1608Metric_Pad1.05x0.95mm_HandSolder" V 8130 3900 50 0001 C CNN
F 3 "~" H 8200 3900 50 0001 C CNN
1 8200 3900
0 -1 1 0
$EndComp
$Comp
L power:GND #PWR?
U 1 1 61BC33F2
P 8500 4250
AR Path="/61A897B7/61BC33F2" Ref="#PWR?" Part="1"
AR Path="/61BBA8EA/61BC33F2" Ref="#PWR0101" Part="1"
F 0 "#PWR0101" H 8500 4000 50 0001 C CNN
F 1 "GND" H 8505 4077 50 0000 C CNN
F 2 "" H 8500 4250 50 0001 C CNN
F 3 "" H 8500 4250 50 0001 C CNN
1 8500 4250
1 0 0 -1
$EndComp
$Comp
L power:GND #PWR?
U 1 1 61BC33FD
P 9100 4200
AR Path="/61A897B7/61BC33FD" Ref="#PWR?" Part="1"
AR Path="/61BBA8EA/61BC33FD" Ref="#PWR0102" Part="1"
F 0 "#PWR0102" H 9100 3950 50 0001 C CNN
F 1 "GND" H 9105 4027 50 0000 C CNN
F 2 "" H 9100 4200 50 0001 C CNN
F 3 "" H 9100 4200 50 0001 C CNN
1 9100 4200
1 0 0 -1
$EndComp
$Comp
L Device:C C?
U 1 1 61BC340A
P 8800 4050
AR Path="/61A897B7/61BC340A" Ref="C?" Part="1"
AR Path="/61BBA8EA/61BC340A" Ref="C23" Part="1"
F 0 "C23" H 8750 3750 50 0000 L CNN
F 1 "100nF" H 8700 3850 50 0000 L CNN
F 2 "Capacitor_SMD:C_0603_1608Metric_Pad1.05x0.95mm_HandSolder" H 8838 3900 50 0001 C CNN
F 3 "~" H 8800 4050 50 0001 C CNN
1 8800 4050
-1 0 0 1
$EndComp
$Comp
L power:GND #PWR?
U 1 1 61BC3411
P 8800 4200
AR Path="/61A897B7/61BC3411" Ref="#PWR?" Part="1"
AR Path="/61BBA8EA/61BC3411" Ref="#PWR0104" Part="1"
F 0 "#PWR0104" H 8800 3950 50 0001 C CNN
F 1 "GND" H 8805 4027 50 0000 C CNN
F 2 "" H 8800 4200 50 0001 C CNN
F 3 "" H 8800 4200 50 0001 C CNN
1 8800 4200
1 0 0 -1
$EndComp
$Comp
L Device:D_TVS D?
U 1 1 61BC341D
P 9100 4050
AR Path="/61A897B7/61BC341D" Ref="D?" Part="1"
AR Path="/61BBA8EA/61BC341D" Ref="D8" Part="1"
F 0 "D8" V 9054 4130 50 0000 L CNN
F 1 "D_TVS" V 9145 4130 50 0000 L CNN
F 2 "Diode_SMD:D_SOD-323_HandSoldering" H 9100 4050 50 0001 C CNN
F 3 "~" H 9100 4050 50 0001 C CNN
1 9100 4050
0 1 1 0
$EndComp
Text Notes 9000 3800 0 50 ~ 0
ESD + Transient\nprotection
Text Notes 8000 3750 0 50 ~ 0
12V -> 3.3V
Text GLabel 2200 3750 0 50 BiDi ~ 0
SWDIO
Text GLabel 2700 3850 2 50 Output ~ 0
SWCLK
Text GLabel 2700 3750 2 50 Input ~ 0
TRACESWO
Text GLabel 2200 3850 0 50 Output ~ 0
NRST
$Comp
L Connector_Generic:Conn_02x03_Odd_Even J?
U 1 1 61BDC487
P 2500 3850
AR Path="/61AD620F/61BDC487" Ref="J?" Part="1"
AR Path="/61BDC487" Ref="J?" Part="1"
AR Path="/61BBA8EA/61BDC487" Ref="J1" Part="1"
F 0 "J1" H 2550 4050 50 0000 C CNN
F 1 "Debug_Connector" H 2550 3600 50 0000 C CNN
F 2 "Connector_PinHeader_2.54mm:PinHeader_2x03_P2.54mm_Horizontal" H 2500 3850 50 0001 C CNN
F 3 "~" H 2500 3850 50 0001 C CNN
1 2500 3850
-1 0 0 1
$EndComp
$Comp
L power:+3.3V #PWR?
U 1 1 61BDC48D
P 2200 3950
AR Path="/61AD620F/61BDC48D" Ref="#PWR?" Part="1"
AR Path="/61BDC48D" Ref="#PWR?" Part="1"
AR Path="/61BBA8EA/61BDC48D" Ref="#PWR0141" Part="1"
F 0 "#PWR0141" H 2200 3800 50 0001 C CNN
F 1 "+3.3V" H 2215 4123 50 0000 C CNN
F 2 "" H 2200 3950 50 0001 C CNN
F 3 "" H 2200 3950 50 0001 C CNN
1 2200 3950
1 0 0 1
$EndComp
$Comp
L power:GND #PWR?
U 1 1 61BDC493
P 2750 3950
AR Path="/61AD620F/61BDC493" Ref="#PWR?" Part="1"
AR Path="/61BDC493" Ref="#PWR?" Part="1"
AR Path="/61BBA8EA/61BDC493" Ref="#PWR0164" Part="1"
F 0 "#PWR0164" H 2750 3700 50 0001 C CNN
F 1 "GND" H 2755 3777 50 0000 C CNN
F 2 "" H 2750 3950 50 0001 C CNN
F 3 "" H 2750 3950 50 0001 C CNN
1 2750 3950
-1 0 0 -1
$EndComp
Wire Wire Line
2750 3950 2700 3950
$Comp
L power:+3.3V #PWR?
U 1 1 61BD84E0
P 5550 2300
AR Path="/61BD84E0" Ref="#PWR?" Part="1"
AR Path="/61BBA8EA/61BD84E0" Ref="#PWR0105" Part="1"
F 0 "#PWR0105" H 5550 2150 50 0001 C CNN
F 1 "+3.3V" H 5565 2473 50 0000 C CNN
F 2 "" H 5550 2300 50 0001 C CNN
F 3 "" H 5550 2300 50 0001 C CNN
1 5550 2300
1 0 0 -1
$EndComp
$Comp
L power:+12V #PWR?
U 1 1 61BD8FBA
P 5250 3200
AR Path="/61ABEE8E/61BD8FBA" Ref="#PWR?" Part="1"
AR Path="/61A7C038/61BD8FBA" Ref="#PWR?" Part="1"
AR Path="/61A7E868/61BD8FBA" Ref="#PWR?" Part="1"
AR Path="/61BD8FBA" Ref="#PWR?" Part="1"
AR Path="/61AD620F/61BD8FBA" Ref="#PWR?" Part="1"
AR Path="/61BBA8EA/61BD8FBA" Ref="#PWR0106" Part="1"
F 0 "#PWR0106" H 5250 3050 50 0001 C CNN
F 1 "+12V" H 5265 3373 50 0000 C CNN
F 2 "" H 5250 3200 50 0001 C CNN
F 3 "" H 5250 3200 50 0001 C CNN
1 5250 3200
1 0 0 -1
$EndComp
$Comp
L Mechanical:MountingHole H1
U 1 1 61BD2819
P 1750 6700
F 0 "H1" H 1850 6746 50 0000 L CNN
F 1 "MountingHole" H 1850 6655 50 0000 L CNN
F 2 "MountingHole:MountingHole_3.2mm_M3" H 1750 6700 50 0001 C CNN
F 3 "~" H 1750 6700 50 0001 C CNN
1 1750 6700
1 0 0 -1
$EndComp
$Comp
L Mechanical:MountingHole H2
U 1 1 61BD2B10
P 1750 6950
F 0 "H2" H 1850 6996 50 0000 L CNN
F 1 "MountingHole" H 1850 6905 50 0000 L CNN
F 2 "MountingHole:MountingHole_3.2mm_M3" H 1750 6950 50 0001 C CNN
F 3 "~" H 1750 6950 50 0001 C CNN
1 1750 6950
1 0 0 -1
$EndComp
$Comp
L power:GND #PWR0110
U 1 1 61BE7574
P 5450 3150
F 0 "#PWR0110" H 5450 2900 50 0001 C CNN
F 1 "GND" H 5455 2977 50 0000 C CNN
F 2 "" H 5450 3150 50 0001 C CNN
F 3 "" H 5450 3150 50 0001 C CNN
1 5450 3150
1 0 0 -1
$EndComp
$Comp
L power:GND #PWR0121
U 1 1 61BE8A87
P 5800 3050
F 0 "#PWR0121" H 5800 2800 50 0001 C CNN
F 1 "GND" H 5805 2877 50 0000 C CNN
F 2 "" H 5800 3050 50 0001 C CNN
F 3 "" H 5800 3050 50 0001 C CNN
1 5800 3050
1 0 0 -1
$EndComp
$Comp
L Mechanical:MountingHole H3
U 1 1 61BD2D0B
P 1750 7200
F 0 "H3" H 1850 7246 50 0000 L CNN
F 1 "MountingHole" H 1850 7155 50 0000 L CNN
F 2 "MountingHole:MountingHole_3.2mm_M3" H 1750 7200 50 0001 C CNN
F 3 "~" H 1750 7200 50 0001 C CNN
1 1750 7200
1 0 0 -1
$EndComp
$Comp
L Custom:Binder-M12-12P J2
U 1 1 61CD6444
P 5550 2700
F 0 "J2" H 5250 2500 50 0000 L CNN
F 1 "Binder-M12-12P" H 5750 2950 50 0000 L CNN
F 2 "Custom:Binder_M12-A_12P_Female_NoSilk" H 5550 2550 50 0001 C CNN
F 3 "http://www.mouser.com/ds/2/18/40_c091_abd_e-75918.pdf" H 5550 2550 50 0001 C CNN
1 5550 2700
1 0 0 -1
$EndComp
$Comp
L power:GND #PWR0114
U 1 1 61CDBB5A
P 5000 2300
F 0 "#PWR0114" H 5000 2050 50 0001 C CNN
F 1 "GND" H 5005 2127 50 0000 C CNN
F 2 "" H 5000 2300 50 0001 C CNN
F 3 "" H 5000 2300 50 0001 C CNN
1 5000 2300
1 0 0 -1
$EndComp
Wire Wire Line
5650 3150 5650 3300
Wire Wire Line
5650 3300 5950 3300
$Comp
L power:+3.3V #PWR?
U 1 1 61CDE0C4
P 5950 3300
AR Path="/61CDE0C4" Ref="#PWR?" Part="1"
AR Path="/61BBA8EA/61CDE0C4" Ref="#PWR0165" Part="1"
F 0 "#PWR0165" H 5950 3150 50 0001 C CNN
F 1 "+3.3V" H 5965 3473 50 0000 C CNN
F 2 "" H 5950 3300 50 0001 C CNN
F 3 "" H 5950 3300 50 0001 C CNN
1 5950 3300
1 0 0 -1
$EndComp
Wire Wire Line
5650 2300 5650 2250
Wire Wire Line
5650 2250 5700 2250
Wire Wire Line
5250 3200 5250 3400
Wire Wire Line
5250 3400 5550 3400
Wire Wire Line
5550 3400 5550 3150
Wire Wire Line
5000 2300 5300 2300
Wire Wire Line
5300 2300 5300 2350
Wire Wire Line
5300 2300 5450 2300
Connection ~ 5300 2300
Wire Wire Line
4900 2550 5000 2550
Wire Wire Line
5000 2550 5000 2600
Wire Wire Line
5000 2600 5100 2600
$Comp
L Device:D_Zener D1
U 1 1 61E0CD10
P 8500 4100
F 0 "D1" V 8600 4000 50 0000 R CNN
F 1 "Zener 3V" V 8500 4000 50 0000 R CNN
F 2 "Diode_SMD:D_SOD-323_HandSoldering" H 8500 4100 50 0001 C CNN
F 3 "~" H 8500 4100 50 0001 C CNN
1 8500 4100
0 1 1 0
$EndComp
Wire Wire Line
8350 3900 8500 3900
Wire Wire Line
8500 3950 8500 3900
Connection ~ 8500 3900
Wire Wire Line
8500 3900 8800 3900
Connection ~ 8800 3900
Connection ~ 9100 3900
Wire Wire Line
9100 3900 9450 3900
Wire Wire Line
8800 3900 9100 3900
Wire Wire Line
7950 3900 8050 3900
Text HLabel 9450 3900 2 50 Output ~ 0
SDC_in_3V3
Text HLabel 5100 2700 0 50 Output ~ 0
TS_activate_dash
Text HLabel 5100 2800 0 50 Output ~ 0
TS_activate_ext
Text HLabel 5950 2600 2 50 Output ~ 0
SDC_in
Text HLabel 5700 2250 2 50 Input ~ 0
SDC_out
Text HLabel 7950 3900 0 50 Input ~ 0
SDC_in
Text HLabel 4900 2550 0 50 Output ~ 0
~SDC_reset~
Text HLabel 5950 2700 2 50 BiDi ~ 0
CAN_H
Text HLabel 5950 2800 2 50 BiDi ~ 0
CAN_L
Text Notes 4950 6750 0 50 ~ 0
Dummy so that the overview is usable for ASF
Text HLabel 6000 7000 2 50 Output ~ 0
Pressure_A
NoConn ~ 5500 7000
Wire Wire Line
5500 7000 6000 7000
Text HLabel 6000 7100 2 50 Output ~ 0
Pressure_B
NoConn ~ 5500 7100
Wire Wire Line
5500 7100 6000 7100
Text HLabel 6000 7200 2 50 Output ~ 0
Pressure_F
NoConn ~ 5500 7200
Wire Wire Line
5500 7200 6000 7200
Text HLabel 6000 7300 2 50 Output ~ 0
Pressure_R
NoConn ~ 5500 7300
Wire Wire Line
5500 7300 6000 7300
$EndSCHEMATC

2629
sdcl-hardware/cu.kicad_sch Normal file

File diff suppressed because it is too large Load Diff

View File

@ -1,389 +0,0 @@
EESchema Schematic File Version 4
EELAYER 30 0
EELAYER END
$Descr A4 11693 8268
encoding utf-8
Sheet 3 8
Title "SDCL - CU"
Date "2021-12-16"
Rev "v1.0"
Comp "FaSTTUBe - Formula Student Team TU Berlin"
Comment1 "Car 113"
Comment2 "EBS Electronics"
Comment3 "CU for CAN Bus connection to supervisor"
Comment4 ""
$EndDescr
$Comp
L Device:C C?
U 1 1 61B1D2A8
P 5150 1950
AR Path="/61A83A4A/61B1D2A8" Ref="C?" Part="1"
AR Path="/61AD1F2E/61B1D2A8" Ref="C?" Part="1"
AR Path="/61AD620F/61B1D2A8" Ref="C8" Part="1"
F 0 "C8" H 5265 1996 50 0000 L CNN
F 1 "100nF" H 5265 1905 50 0000 L CNN
F 2 "Capacitor_SMD:C_0603_1608Metric_Pad1.05x0.95mm_HandSolder" H 5188 1800 50 0001 C CNN
F 3 "~" H 5150 1950 50 0001 C CNN
1 5150 1950
1 0 0 -1
$EndComp
$Comp
L Device:C C?
U 1 1 61B1D2AE
P 5600 1950
AR Path="/61A83A4A/61B1D2AE" Ref="C?" Part="1"
AR Path="/61AD1F2E/61B1D2AE" Ref="C?" Part="1"
AR Path="/61AD620F/61B1D2AE" Ref="C9" Part="1"
F 0 "C9" H 5715 1996 50 0000 L CNN
F 1 "4.7uF" H 5715 1905 50 0000 L CNN
F 2 "Capacitor_SMD:C_0603_1608Metric_Pad1.05x0.95mm_HandSolder" H 5638 1800 50 0001 C CNN
F 3 "~" H 5600 1950 50 0001 C CNN
1 5600 1950
1 0 0 -1
$EndComp
$Comp
L Device:C C?
U 1 1 61B1D2B4
P 4650 1950
AR Path="/61A83A4A/61B1D2B4" Ref="C?" Part="1"
AR Path="/61AD1F2E/61B1D2B4" Ref="C?" Part="1"
AR Path="/61AD620F/61B1D2B4" Ref="C7" Part="1"
F 0 "C7" H 4765 1996 50 0000 L CNN
F 1 "100nF" H 4765 1905 50 0000 L CNN
F 2 "Capacitor_SMD:C_0603_1608Metric_Pad1.05x0.95mm_HandSolder" H 4688 1800 50 0001 C CNN
F 3 "~" H 4650 1950 50 0001 C CNN
1 4650 1950
1 0 0 -1
$EndComp
$Comp
L Device:C C?
U 1 1 61B1D2BA
P 4200 1950
AR Path="/61A83A4A/61B1D2BA" Ref="C?" Part="1"
AR Path="/61AD1F2E/61B1D2BA" Ref="C?" Part="1"
AR Path="/61AD620F/61B1D2BA" Ref="C5" Part="1"
F 0 "C5" H 4315 1996 50 0000 L CNN
F 1 "100nF" H 4315 1905 50 0000 L CNN
F 2 "Capacitor_SMD:C_0603_1608Metric_Pad1.05x0.95mm_HandSolder" H 4238 1800 50 0001 C CNN
F 3 "~" H 4200 1950 50 0001 C CNN
1 4200 1950
1 0 0 -1
$EndComp
$Comp
L Device:C C?
U 1 1 61B1D2C0
P 3750 1950
AR Path="/61A83A4A/61B1D2C0" Ref="C?" Part="1"
AR Path="/61AD1F2E/61B1D2C0" Ref="C?" Part="1"
AR Path="/61AD620F/61B1D2C0" Ref="C4" Part="1"
F 0 "C4" H 3865 1996 50 0000 L CNN
F 1 "100nF" H 3865 1905 50 0000 L CNN
F 2 "Capacitor_SMD:C_0603_1608Metric_Pad1.05x0.95mm_HandSolder" H 3788 1800 50 0001 C CNN
F 3 "~" H 3750 1950 50 0001 C CNN
1 3750 1950
1 0 0 -1
$EndComp
$Comp
L power:GND #PWR?
U 1 1 61B1D2DD
P 5600 2100
AR Path="/61A83A4A/61B1D2DD" Ref="#PWR?" Part="1"
AR Path="/61AD1F2E/61B1D2DD" Ref="#PWR?" Part="1"
AR Path="/61AD620F/61B1D2DD" Ref="#PWR0133" Part="1"
F 0 "#PWR0133" H 5600 1850 50 0001 C CNN
F 1 "GND" H 5605 1927 50 0000 C CNN
F 2 "" H 5600 2100 50 0001 C CNN
F 3 "" H 5600 2100 50 0001 C CNN
1 5600 2100
1 0 0 -1
$EndComp
Wire Wire Line
5600 1800 5950 1800
Wire Wire Line
6150 2550 6150 2500
Wire Wire Line
6150 2500 6050 2500
Wire Wire Line
6250 2550 6250 2500
Wire Wire Line
6250 2500 6150 2500
$Comp
L Device:C C?
U 1 1 61B1D305
P 7050 1950
AR Path="/61A83A4A/61B1D305" Ref="C?" Part="1"
AR Path="/61AD1F2E/61B1D305" Ref="C?" Part="1"
AR Path="/61AD620F/61B1D305" Ref="C11" Part="1"
F 0 "C11" H 7165 1996 50 0000 L CNN
F 1 "1uF" H 7165 1905 50 0000 L CNN
F 2 "Capacitor_SMD:C_0603_1608Metric_Pad1.05x0.95mm_HandSolder" H 7088 1800 50 0001 C CNN
F 3 "~" H 7050 1950 50 0001 C CNN
1 7050 1950
1 0 0 -1
$EndComp
$Comp
L power:GND #PWR?
U 1 1 61B1D30F
P 6650 2100
AR Path="/61A83A4A/61B1D30F" Ref="#PWR?" Part="1"
AR Path="/61AD1F2E/61B1D30F" Ref="#PWR?" Part="1"
AR Path="/61AD620F/61B1D30F" Ref="#PWR0134" Part="1"
F 0 "#PWR0134" H 6650 1850 50 0001 C CNN
F 1 "GND" H 6655 1927 50 0000 C CNN
F 2 "" H 6650 2100 50 0001 C CNN
F 3 "" H 6650 2100 50 0001 C CNN
1 6650 2100
1 0 0 -1
$EndComp
Wire Wire Line
6050 2500 5950 2500
Text GLabel 6750 5150 2 50 BiDi ~ 0
SWDIO
Text GLabel 6750 5250 2 50 Input ~ 0
SWCLK
Text GLabel 5450 4150 0 50 Output ~ 0
TRACESWO
Text GLabel 4250 2750 0 50 Input ~ 0
NRST
NoConn ~ 5450 3450
NoConn ~ 5450 3550
NoConn ~ 5450 3650
NoConn ~ 5450 4250
NoConn ~ 5450 4350
NoConn ~ 5450 4450
NoConn ~ 5450 4550
NoConn ~ 5450 5050
NoConn ~ 6750 4550
NoConn ~ 6750 4850
NoConn ~ 6750 5350
NoConn ~ 6750 3850
$Comp
L MCU_ST_STM32F3:STM32F302C8Tx U?
U 1 1 61B1D34C
P 6150 4050
AR Path="/61A83A4A/61B1D34C" Ref="U?" Part="1"
AR Path="/61AD1F2E/61B1D34C" Ref="U?" Part="1"
AR Path="/61AD620F/61B1D34C" Ref="U7" Part="1"
F 0 "U7" H 6600 5500 50 0000 C CNN
F 1 "STM32F302C8T6" V 6700 5100 50 0000 C CNN
F 2 "Package_QFP:LQFP-48_7x7mm_P0.5mm" H 5550 2650 50 0001 R CNN
F 3 "http://www.st.com/st-web-ui/static/active/en/resource/technical/document/datasheet/DM00093333.pdf" H 6150 4050 50 0001 C CNN
1 6150 4050
1 0 0 -1
$EndComp
Text Notes 3250 1700 0 50 ~ 0
Capacitors need to be placed close to their STM pins
NoConn ~ 5450 3150
NoConn ~ 5450 3250
$Comp
L Device:R R9
U 1 1 61B1D35F
P 4450 2600
F 0 "R9" H 4520 2646 50 0000 L CNN
F 1 "10k" H 4520 2555 50 0000 L CNN
F 2 "Resistor_SMD:R_0603_1608Metric_Pad1.05x0.95mm_HandSolder" V 4380 2600 50 0001 C CNN
F 3 "~" H 4450 2600 50 0001 C CNN
1 4450 2600
1 0 0 -1
$EndComp
$Comp
L Device:C C6
U 1 1 61B1D368
P 4450 2900
F 0 "C6" H 4565 2946 50 0000 L CNN
F 1 "100nF" H 4565 2855 50 0000 L CNN
F 2 "Capacitor_SMD:C_0603_1608Metric_Pad1.05x0.95mm_HandSolder" H 4488 2750 50 0001 C CNN
F 3 "~" H 4450 2900 50 0001 C CNN
1 4450 2900
1 0 0 -1
$EndComp
$Comp
L power:GND #PWR0135
U 1 1 61B1D36E
P 4450 3050
F 0 "#PWR0135" H 4450 2800 50 0001 C CNN
F 1 "GND" H 4455 2877 50 0000 C CNN
F 2 "" H 4450 3050 50 0001 C CNN
F 3 "" H 4450 3050 50 0001 C CNN
1 4450 3050
1 0 0 -1
$EndComp
$Comp
L power:GND #PWR0136
U 1 1 61B1D355
P 5200 3250
F 0 "#PWR0136" H 5200 3000 50 0001 C CNN
F 1 "GND" H 5205 3077 50 0000 C CNN
F 2 "" H 5200 3250 50 0001 C CNN
F 3 "" H 5200 3250 50 0001 C CNN
1 5200 3250
1 0 0 -1
$EndComp
$Comp
L Device:R R10
U 1 1 61B1D343
P 5200 3100
F 0 "R10" H 5270 3146 50 0000 L CNN
F 1 "10k" H 5270 3055 50 0000 L CNN
F 2 "Resistor_SMD:R_0603_1608Metric_Pad1.05x0.95mm_HandSolder" V 5130 3100 50 0001 C CNN
F 3 "~" H 5200 3100 50 0001 C CNN
1 5200 3100
1 0 0 -1
$EndComp
Wire Wire Line
5200 2950 5450 2950
NoConn ~ 5450 4950
NoConn ~ 5450 4850
NoConn ~ 6750 4450
NoConn ~ 6750 4050
NoConn ~ 6750 3950
NoConn ~ 5450 5150
NoConn ~ 5450 5250
NoConn ~ 5450 5350
NoConn ~ 5450 4650
NoConn ~ 5450 4750
NoConn ~ 6750 4650
NoConn ~ 6750 4750
$Comp
L power:+3.3V #PWR0137
U 1 1 61B8F284
P 5600 1800
F 0 "#PWR0137" H 5600 1650 50 0001 C CNN
F 1 "+3.3V" H 5615 1973 50 0000 C CNN
F 2 "" H 5600 1800 50 0001 C CNN
F 3 "" H 5600 1800 50 0001 C CNN
1 5600 1800
1 0 0 -1
$EndComp
$Comp
L power:+3.3V #PWR0138
U 1 1 61B91367
P 6650 1800
F 0 "#PWR0138" H 6650 1650 50 0001 C CNN
F 1 "+3.3V" H 6665 1973 50 0000 C CNN
F 2 "" H 6650 1800 50 0001 C CNN
F 3 "" H 6650 1800 50 0001 C CNN
1 6650 1800
1 0 0 -1
$EndComp
Wire Wire Line
5950 2500 5950 2550
Connection ~ 6050 2500
Wire Wire Line
6050 2500 6050 2550
Connection ~ 6150 2500
Connection ~ 5150 2100
Wire Wire Line
5150 2100 5600 2100
Connection ~ 5600 2100
Connection ~ 5150 1800
Wire Wire Line
5150 1800 5600 1800
Connection ~ 5600 1800
Wire Wire Line
5950 1800 5950 2500
Connection ~ 4650 1800
Connection ~ 4650 2100
Wire Wire Line
4200 1800 4650 1800
Wire Wire Line
4200 2100 4650 2100
Wire Wire Line
4650 2100 5150 2100
Wire Wire Line
4650 1800 5150 1800
Wire Wire Line
4200 1800 3750 1800
Connection ~ 4200 1800
Wire Wire Line
3750 2100 4200 2100
Connection ~ 4200 2100
Wire Wire Line
6350 1800 6650 1800
Connection ~ 6650 1800
$Comp
L Device:C C?
U 1 1 61B1D2FF
P 6650 1950
AR Path="/61A83A4A/61B1D2FF" Ref="C?" Part="1"
AR Path="/61AD1F2E/61B1D2FF" Ref="C?" Part="1"
AR Path="/61AD620F/61B1D2FF" Ref="C10" Part="1"
F 0 "C10" H 6765 1996 50 0000 L CNN
F 1 "10nF" H 6765 1905 50 0000 L CNN
F 2 "Capacitor_SMD:C_0603_1608Metric_Pad1.05x0.95mm_HandSolder" H 6688 1800 50 0001 C CNN
F 3 "~" H 6650 1950 50 0001 C CNN
1 6650 1950
1 0 0 -1
$EndComp
Connection ~ 6650 2100
Wire Wire Line
6650 2100 7050 2100
Wire Wire Line
6650 1800 7050 1800
Wire Wire Line
6350 1800 6350 2550
Connection ~ 5950 2500
$Comp
L power:+3.3V #PWR0139
U 1 1 61BB6BF1
P 4450 2450
F 0 "#PWR0139" H 4450 2300 50 0001 C CNN
F 1 "+3.3V" H 4465 2623 50 0000 C CNN
F 2 "" H 4450 2450 50 0001 C CNN
F 3 "" H 4450 2450 50 0001 C CNN
1 4450 2450
1 0 0 -1
$EndComp
Wire Wire Line
4250 2750 4450 2750
Connection ~ 4450 2750
Wire Wire Line
4450 2750 5450 2750
$Comp
L power:GND #PWR?
U 1 1 61B1D2E8
P 6250 5650
AR Path="/61A83A4A/61B1D2E8" Ref="#PWR?" Part="1"
AR Path="/61AD1F2E/61B1D2E8" Ref="#PWR?" Part="1"
AR Path="/61AD620F/61B1D2E8" Ref="#PWR0140" Part="1"
F 0 "#PWR0140" H 6250 5400 50 0001 C CNN
F 1 "GND" H 6255 5477 50 0000 C CNN
F 2 "" H 6250 5650 50 0001 C CNN
F 3 "" H 6250 5650 50 0001 C CNN
1 6250 5650
1 0 0 -1
$EndComp
Connection ~ 6250 5650
Wire Wire Line
6250 5550 6250 5650
Wire Wire Line
6250 5650 6150 5650
Connection ~ 6150 5650
Wire Wire Line
6150 5550 6150 5650
Wire Wire Line
5950 5650 6050 5650
Wire Wire Line
6150 5650 6050 5650
Connection ~ 6050 5650
Wire Wire Line
6050 5550 6050 5650
Wire Wire Line
5950 5550 5950 5650
Text HLabel 5450 3950 0 50 Input ~ 0
SDC_is_ready
Text HLabel 6750 4150 2 50 Output ~ 0
AS_close_SDC
Text HLabel 6750 4250 2 50 Output ~ 0
AS_driving_mode
Text HLabel 6750 4350 2 50 Output ~ 0
Watchdog
Text HLabel 6750 4950 2 50 Input ~ 0
CAN_RX
Text HLabel 6750 5050 2 50 Output ~ 0
CAN_TX
Text HLabel 5450 3850 0 50 Input ~ 0
TS_activate_MUXed
Text HLabel 5450 4050 0 50 Input ~ 0
SDC_in_3V3
$EndSCHEMATC

View File

@ -0,0 +1,24 @@
(footprint "APEM-ISx3SAD" (version 20211014) (generator pcbnew)
(layer "F.Cu")
(tedit 61C621C8)
(descr "Sealed pushbutton switch")
(tags "ISR3AD, ISP3AD")
(attr through_hole)
(fp_text reference "BTN501" (at 0 -9.33) (layer "F.SilkS")
(effects (font (size 1 1) (thickness 0.15)))
(tstamp 4bbb7a56-8979-4d46-b19f-b3fabc0536c5)
)
(fp_text value "SW_Push" (at 0 -11.43) (layer "F.Fab")
(effects (font (size 1 1) (thickness 0.15)))
(tstamp 734347db-23d4-41fa-9688-637554ee1b59)
)
(fp_circle (center 0 0) (end 0 -7.5) (layer "F.SilkS") (width 0.12) (fill none) (tstamp 1068cfac-4c4c-4d8b-8b09-85cb7363f1d8))
(fp_circle (center 0 0) (end 8 0) (layer "F.CrtYd") (width 0.12) (fill none) (tstamp eb82c349-2a66-4750-936b-b1a6bacea06b))
(pad "1" thru_hole roundrect (at -2.54 0) (size 1.6 4) (drill oval 1 3.3) (layers *.Cu *.Mask) (roundrect_rratio 0.25) (tstamp ace15fec-d222-4d10-8b2d-a093a6c81fb8))
(pad "2" thru_hole roundrect (at 2.54 0) (size 1.6 4) (drill oval 1 3.3) (layers *.Cu *.Mask) (roundrect_rratio 0.25) (tstamp 892f0ac5-b430-401b-a8db-74d309cd8e3e))
(model "${KIPRJMOD}/packages3d/Binder.3dshapes/APEM-ISx3SAD.stp"
(offset (xyz 0 0 10.5))
(scale (xyz 1 1 1))
(rotate (xyz 180 0 0))
)
)

View File

@ -0,0 +1,41 @@
(footprint "APEM-ISx3SAD_Harwin_S9091-46R_NoSilk" (version 20211014) (generator pcbnew)
(layer "F.Cu")
(tedit 61C621C8)
(descr "Sealed pushbutton switch")
(tags "ISR3AD, ISP3AD")
(property "Sheetfile" "buttons.kicad_sch")
(property "Sheetname" "Buttons")
(attr through_hole)
(fp_text reference "AMC1" (at 9 0.333334 90) (layer "F.SilkS")
(effects (font (size 1 1) (thickness 0.15)))
(tstamp f4411b4c-3b05-437e-8121-f36a1e7385cc)
)
(fp_text value "SW_Push" (at 0 -11.43 180) (layer "F.Fab")
(effects (font (size 1 1) (thickness 0.15)))
(tstamp f7678448-59ce-423d-9ac9-1ab76125b847)
)
(fp_rect (start 1.25 3.25) (end 3.75 -3.25) (layer "F.CrtYd") (width 0.05) (fill none) (tstamp 012bd6fb-e35a-4ae9-af40-8d0c184a49e9))
(fp_rect (start -3.79 3.25) (end -1.29 -3.25) (layer "F.CrtYd") (width 0.05) (fill none) (tstamp 1223bf0d-c22e-477b-95a1-3545b2024011))
(fp_circle (center 0 0) (end 8 0) (layer "F.CrtYd") (width 0.12) (fill none) (tstamp 092b614f-ec5f-4c70-b62a-9a73c6a6093e))
(pad "" np_thru_hole circle (at 2.5 0 90) (size 3.8 3.8) (drill 3.8) (layers *.Mask) (tstamp 2213bc2a-f51d-4f4f-be50-444ceaee2e6a))
(pad "" np_thru_hole circle (at -2.54 0 90) (size 3.8 3.8) (drill 3.8) (layers *.Mask) (tstamp 28ceebe1-79ac-4a63-9660-90c38b7a98cf))
(pad "1" smd roundrect (at -2.55 2.5 180) (size 2 1) (layers "B.Cu" "B.Paste" "B.Mask") (roundrect_rratio 0.25) (tstamp 3c2ac476-fc84-49a5-aad0-86ad9021bc64))
(pad "1" smd roundrect (at -2.55 -2.5 180) (size 2 1) (layers "B.Cu" "B.Paste" "B.Mask") (roundrect_rratio 0.25) (tstamp aa00010d-b319-412c-a448-033152234416))
(pad "2" smd roundrect (at 2.5 2.5 180) (size 2 1) (layers "B.Cu" "B.Paste" "B.Mask") (roundrect_rratio 0.25) (tstamp 7347a874-9f42-488c-8800-5283857fa454))
(pad "2" smd roundrect (at 2.5 -2.5 180) (size 2 1) (layers "B.Cu" "B.Paste" "B.Mask") (roundrect_rratio 0.25) (tstamp e11bcd78-e910-4ea0-9d13-0d5d0df1d23f))
(model "${KIPRJMOD}/packages3d/Binder.3dshapes/APEM-ISx3SAD.stp"
(offset (xyz 0 0 12.5))
(scale (xyz 1 1 1))
(rotate (xyz 180 0 0))
)
(model "${KIPRJMOD}/packages3d/Binder.3dshapes/s9091-46r.stp"
(offset (xyz 2.5 0 -2))
(scale (xyz 1 1 1))
(rotate (xyz 0 0 90))
)
(model "${KIPRJMOD}/packages3d/Binder.3dshapes/s9091-46r.stp"
(offset (xyz -2.5 0 -2))
(scale (xyz 1 1 1))
(rotate (xyz 0 0 90))
)
)

View File

@ -0,0 +1,25 @@
(footprint "APEM-ISx3SAD_NoSilk" (version 20211014) (generator pcbnew)
(layer "F.Cu")
(tedit 61C621C8)
(descr "Sealed pushbutton switch")
(tags "ISR3AD, ISP3AD")
(property "Sheetfile" "buttons.kicad_sch")
(property "Sheetname" "Buttons")
(attr through_hole)
(fp_text reference "AMC1" (at 9 0.333334 90) (layer "F.SilkS")
(effects (font (size 1 1) (thickness 0.15)))
(tstamp f4411b4c-3b05-437e-8121-f36a1e7385cc)
)
(fp_text value "SW_Push" (at 0 -11.43 180) (layer "F.Fab")
(effects (font (size 1 1) (thickness 0.15)))
(tstamp f7678448-59ce-423d-9ac9-1ab76125b847)
)
(fp_circle (center 0 0) (end 8 0) (layer "F.CrtYd") (width 0.12) (fill none) (tstamp 092b614f-ec5f-4c70-b62a-9a73c6a6093e))
(pad "1" thru_hole roundrect (at -2.54 0) (size 1.6 4) (drill oval 1 3.3) (layers *.Cu *.Mask) (roundrect_rratio 0.25) (tstamp c07c5d16-3194-4e72-b4b3-f4bf0a0e5afd))
(pad "2" thru_hole roundrect (at 2.54 0) (size 1.6 4) (drill oval 1 3.3) (layers *.Cu *.Mask) (roundrect_rratio 0.25) (tstamp a47a5593-e189-48e9-b869-6a1feeac1d20))
(model "${KIPRJMOD}/packages3d/Binder.3dshapes/APEM-ISx3SAD.stp"
(offset (xyz 0 0 10.5))
(scale (xyz 1 1 1))
(rotate (xyz 180 0 0))
)
)

View File

@ -1,25 +0,0 @@
(module Binder-86_6618_1120_00004 (layer F.Cu) (tedit 61B3F2C1)
(descr "Binder M8 Flanschdose, 4-polig, schirmbar, IP67, M10x0.75 (86 6618 1120 00004)")
(tags Connector)
(fp_text reference J** (at 0 -7.62) (layer F.SilkS)
(effects (font (size 1.27 1.27) (thickness 0.254)))
)
(fp_text value Binder-86_6618_1120_00004 (at 1 -10.16) (layer F.SilkS) hide
(effects (font (size 1.27 1.27) (thickness 0.254)))
)
(fp_text user %R (at 0 -7.62) (layer F.Fab)
(effects (font (size 1.27 1.27) (thickness 0.254)))
)
(fp_circle (center 0 0) (end 6.3 0) (layer F.CrtYd) (width 0.12))
(pad MH2 thru_hole circle (at 6.25 0) (size 4.5 4.5) (drill 3) (layers *.Cu *.Mask))
(pad MH1 thru_hole circle (at -6.25 0) (size 4.5 4.5) (drill 3) (layers *.Cu *.Mask))
(pad 4 thru_hole circle (at -1.075 -1.45) (size 1.8 1.8) (drill 1.3) (layers *.Cu *.Mask))
(pad 3 thru_hole circle (at -1.7 0.5) (size 1.8 1.8) (drill 1.3) (layers *.Cu *.Mask))
(pad 2 thru_hole circle (at 1.075 -1.45) (size 1.8 1.8) (drill 1.3) (layers *.Cu *.Mask))
(pad 1 thru_hole circle (at 1.7 0.5) (size 1.8 1.8) (drill 1.3) (layers *.Cu *.Mask))
(model 09_0416_55_05.stp
(at (xyz 0 0 0))
(scale (xyz 1 1 1))
(rotate (xyz 0 0 0))
)
)

View File

@ -1,29 +1,36 @@
(module Binder_M12-A_12P_Female (layer F.Cu) (tedit 61BE1FE9)
(fp_text reference REF** (at 0 -10.045) (layer F.SilkS)
(footprint "Binder_M12-A_12P_Female_NoSilk" (version 20211014) (generator pcbnew)
(layer "F.Cu")
(tedit 62083683)
(attr through_hole)
(fp_text reference "J2" (at 0 -10.045) (layer "F.SilkS") hide
(effects (font (size 1 1) (thickness 0.15)))
(tstamp aa2b0a93-cf71-4f1a-9437-882c36d07d80)
)
(fp_text value Binder_M12-A_12P_Female (at 0 10.045) (layer F.Fab)
(fp_text value "Binder-M12-12P" (at 0 10.045) (layer "F.Fab") hide
(effects (font (size 1 1) (thickness 0.15)))
(tstamp fb3d633b-8978-4288-8347-3cba8378f752)
)
(fp_circle (center 0 0) (end 0 9.37) (layer "F.CrtYd") (width 0.05) (fill none) (tstamp 119c80a2-9d7e-4bbc-9b8d-a9fb4eff2301))
(fp_line (start -0.6 -3.7) (end -0.6 -4.1) (layer "F.Fab") (width 0.12) (tstamp 4ff95af7-d058-424d-aaf3-96a69c53afd3))
(fp_line (start 0.6 -3.7) (end 0.6 -4.1) (layer "F.Fab") (width 0.12) (tstamp f1f38b2a-b0ac-44fc-acf3-eb28f9edcb70))
(fp_arc (start 0.6 -3.7) (mid 0 -3.1) (end -0.6 -3.7) (layer "F.Fab") (width 0.12) (tstamp fc37e9b8-13d7-4762-aca2-931a3e66a3ef))
(fp_circle (center 0 0) (end 0 9) (layer "F.Fab") (width 0.1) (fill none) (tstamp 0f691f3c-0b7a-47a3-8297-f765fc827b9b))
(fp_circle (center 0 -0.1) (end 0 -4.2) (layer "F.Fab") (width 0.12) (fill none) (tstamp 98cf9718-dafb-47bb-b0c4-293529a8f44c))
(pad "1" thru_hole circle (at -1.428 -2.524) (size 1.1 1.1) (drill 0.8) (layers *.Cu *.Mask) (tstamp 54df4804-24ea-43b3-bccc-9c4163b5f544))
(pad "2" thru_hole circle (at 1.428 -2.524) (size 1.1 1.1) (drill 0.8) (layers *.Cu *.Mask) (tstamp a6949e52-d0d1-4a77-a548-57d1360f470e))
(pad "3" thru_hole circle (at 2.672 -1.127) (size 1.1 1.1) (drill 0.8) (layers *.Cu *.Mask) (tstamp 26996f56-0ebb-43ad-b15d-58cde1ec17c3))
(pad "4" thru_hole circle (at 2.804 0.738) (size 1.1 1.1) (drill 0.8) (layers *.Cu *.Mask) (tstamp be57b1c1-68e6-4dba-b2b5-ad0d8b683384))
(pad "5" thru_hole circle (at 1.77 2.297) (size 1.1 1.1) (drill 0.8) (layers *.Cu *.Mask) (tstamp 19dfcf90-cdac-409e-9dc0-08d5a6ca3dab))
(pad "6" thru_hole circle (at 0 2.9) (size 1.1 1.1) (drill 0.8) (layers *.Cu *.Mask) (tstamp a9ebf4ce-4494-47d9-b02d-a3c1d4ce80fb))
(pad "7" thru_hole circle (at -1.77 2.297) (size 1.1 1.1) (drill 0.8) (layers *.Cu *.Mask) (tstamp fe2acaed-a2cd-48b4-bef0-2a5143ddeb93))
(pad "8" thru_hole circle (at -2.804 0.738) (size 1.1 1.1) (drill 0.8) (layers *.Cu *.Mask) (tstamp 1a0bfc3a-02b7-43f3-9bf1-a51234353b67))
(pad "9" thru_hole circle (at -2.672 -1.127) (size 1.1 1.1) (drill 0.8) (layers *.Cu *.Mask) (tstamp 9b0a9bd6-d2e6-4357-86d3-998e035ab37e))
(pad "10" thru_hole circle (at 0 -1.1) (size 1.1 1.1) (drill 0.8) (layers *.Cu *.Mask) (tstamp 836e2893-8082-412e-8fb2-4a549a706c43))
(pad "11" thru_hole circle (at 0.952627 0.549999) (size 1.1 1.1) (drill 0.8) (layers *.Cu *.Mask) (tstamp 1116e4d3-7a4c-47d3-a9bd-4965b0465262))
(pad "12" thru_hole circle (at -0.952627 0.55) (size 1.1 1.1) (drill 0.8) (layers *.Cu *.Mask) (tstamp 6bb76e5f-c8e7-49ac-b154-410c47f57a43))
(model "${KIPRJMOD}/packages3d/Binder.3dshapes/M12-12P.stp"
(offset (xyz 12.75 0 -2.5))
(scale (xyz 1 1 1))
(rotate (xyz 0 180 -45))
)
(fp_circle (center 0 0) (end 0 9) (layer F.Fab) (width 0.1))
(fp_circle (center 0 0) (end 0 9.12) (layer F.SilkS) (width 0.12))
(fp_circle (center 0 0) (end 0 9.37) (layer F.CrtYd) (width 0.05))
(fp_circle (center 0 -0.1) (end 0 -4.2) (layer F.Fab) (width 0.12))
(fp_arc (start 0 -3.7) (end -0.6 -3.7) (angle -180) (layer F.Fab) (width 0.12))
(fp_line (start 0.6 -3.7) (end 0.6 -4.1) (layer F.Fab) (width 0.12))
(fp_line (start -0.6 -3.7) (end -0.6 -4.1) (layer F.Fab) (width 0.12))
(pad 10 thru_hole oval (at 0 -1.1) (size 1.5 1.5) (drill 1) (layers *.Cu *.Mask))
(pad 11 thru_hole oval (at 0.952627 0.549999) (size 1.5 1.5) (drill 1) (layers *.Cu *.Mask))
(pad 12 thru_hole oval (at -0.952627 0.55) (size 1.5 1.5) (drill 1) (layers *.Cu *.Mask))
(pad 1 thru_hole circle (at -1.428 -2.524) (size 1.5 1.5) (drill 1) (layers *.Cu *.Mask))
(pad 2 thru_hole circle (at 1.428 -2.524) (size 1.5 1.5) (drill 1) (layers *.Cu *.Mask))
(pad 3 thru_hole circle (at 2.672 -1.127) (size 1.5 1.5) (drill 1) (layers *.Cu *.Mask))
(pad 4 thru_hole circle (at 2.804 0.738) (size 1.5 1.5) (drill 1) (layers *.Cu *.Mask))
(pad 5 thru_hole circle (at 1.77 2.297) (size 1.5 1.5) (drill 1) (layers *.Cu *.Mask))
(pad 6 thru_hole circle (at 0 2.9) (size 1.5 1.5) (drill 1) (layers *.Cu *.Mask))
(pad 7 thru_hole circle (at -1.77 2.297) (size 1.5 1.5) (drill 1) (layers *.Cu *.Mask))
(pad 8 thru_hole circle (at -2.804 0.738) (size 1.5 1.5) (drill 1) (layers *.Cu *.Mask))
(pad 9 thru_hole circle (at -2.672 -1.127) (size 1.5 1.5) (drill 1) (layers *.Cu *.Mask))
(pad M1 thru_hole circle (at -4.419 -4.419) (size 3.5 3.5) (drill 3) (layers *.Cu *.Mask))
(pad M2 thru_hole circle (at 4.419 4.419) (size 3.5 3.5) (drill 3) (layers *.Cu *.Mask))
)

View File

@ -1,33 +0,0 @@
(module Binder_M12-A_12P_Female_NoSilk (layer F.Cu) (tedit 62083683)
(fp_text reference J2 (at 0 -10.045) (layer F.SilkS) hide
(effects (font (size 1 1) (thickness 0.15)))
)
(fp_text value Binder-M12-12P (at 0 10.045) (layer F.Fab) hide
(effects (font (size 1 1) (thickness 0.15)))
)
(fp_circle (center 0 0) (end 0 9) (layer F.Fab) (width 0.1))
(fp_circle (center 0 0) (end 0 9.37) (layer F.CrtYd) (width 0.05))
(fp_circle (center 0 -0.1) (end 0 -4.2) (layer F.Fab) (width 0.12))
(fp_line (start 0.6 -3.7) (end 0.6 -4.1) (layer F.Fab) (width 0.12))
(fp_line (start -0.6 -3.7) (end -0.6 -4.1) (layer F.Fab) (width 0.12))
(fp_arc (start 0 -3.7) (end -0.6 -3.7) (angle -180) (layer F.Fab) (width 0.12))
(pad M2 thru_hole circle (at 4.419 4.419) (size 3.5 3.5) (drill 3) (layers *.Cu *.Mask))
(pad M1 thru_hole circle (at -4.419 -4.419) (size 3.5 3.5) (drill 3) (layers *.Cu *.Mask))
(pad 9 thru_hole circle (at -2.672 -1.127) (size 1.1 1.1) (drill 0.8) (layers *.Cu *.Mask))
(pad 8 thru_hole circle (at -2.804 0.738) (size 1.1 1.1) (drill 0.8) (layers *.Cu *.Mask))
(pad 7 thru_hole circle (at -1.77 2.297) (size 1.1 1.1) (drill 0.8) (layers *.Cu *.Mask))
(pad 6 thru_hole circle (at 0 2.9) (size 1.1 1.1) (drill 0.8) (layers *.Cu *.Mask))
(pad 5 thru_hole circle (at 1.77 2.297) (size 1.1 1.1) (drill 0.8) (layers *.Cu *.Mask))
(pad 4 thru_hole circle (at 2.804 0.738) (size 1.1 1.1) (drill 0.8) (layers *.Cu *.Mask))
(pad 3 thru_hole circle (at 2.672 -1.127) (size 1.1 1.1) (drill 0.8) (layers *.Cu *.Mask))
(pad 2 thru_hole circle (at 1.428 -2.524) (size 1.1 1.1) (drill 0.8) (layers *.Cu *.Mask))
(pad 1 thru_hole circle (at -1.428 -2.524) (size 1.1 1.1) (drill 0.8) (layers *.Cu *.Mask))
(pad 12 thru_hole circle (at -0.952627 0.55) (size 1.1 1.1) (drill 0.8) (layers *.Cu *.Mask))
(pad 11 thru_hole circle (at 0.952627 0.549999) (size 1.1 1.1) (drill 0.8) (layers *.Cu *.Mask))
(pad 10 thru_hole circle (at 0 -1.1) (size 1.1 1.1) (drill 0.8) (layers *.Cu *.Mask))
(model ${KIPRJMOD}/packages3d/Phoenix.3dshapes/1441820.stp
(offset (xyz 12.75 0 -2.5))
(scale (xyz 1 1 1))
(rotate (xyz 0 180 -45))
)
)

View File

@ -0,0 +1,34 @@
(footprint "CP_Axial_15.0mm_5mm_P2.00mm_Horizontal_Slotted" (version 20211014) (generator pcbnew)
(layer "F.Cu")
(tedit 0)
(attr smd)
(fp_text reference "REF**" (at 1 2 unlocked) (layer "F.SilkS")
(effects (font (size 1 1) (thickness 0.15)))
(tstamp db485260-35d1-41c6-be48-e09046f649b8)
)
(fp_text value "CP_Axial_15.0mm_5mm_P2.00mm_Horizontal_Slotted" (at 1 3.5 unlocked) (layer "F.Fab")
(effects (font (size 1 1) (thickness 0.15)))
(tstamp 246fc9a1-9c36-4bbf-9fff-b66f34fade67)
)
(fp_text user "+" (at 1.25 -17 unlocked) (layer "F.SilkS")
(effects (font (size 0.8 0.8) (thickness 0.15)))
(tstamp f8a2f6d5-a7f8-4fcb-85e8-9d7508ce0240)
)
(fp_text user "${REFERENCE}" (at 1 2 unlocked) (layer "F.Fab")
(effects (font (size 1 1) (thickness 0.15)))
(tstamp c0abae27-2668-4ef9-8429-e39a830481bc)
)
(fp_line (start -3.75 -13) (end -3 -13.75) (layer "F.SilkS") (width 0.12) (tstamp 3f154e81-080a-4eac-94e2-a57b350c2978))
(fp_line (start -1.25 -0.75) (end -1.25 0.75) (layer "F.SilkS") (width 0.4) (tstamp 7b507eed-8efb-4822-8cc7-aadfe799d0bb))
(fp_line (start 3.75 -14.5) (end 3 -13.75) (layer "F.SilkS") (width 0.12) (tstamp af55e5ed-2cb9-4283-916f-1f6f4377ede1))
(fp_line (start -3 -13.75) (end -3.75 -14.5) (layer "F.SilkS") (width 0.12) (tstamp e0064674-cc27-4394-b555-ccf9d18d0f44))
(fp_line (start 3 -13.75) (end 3.75 -13) (layer "F.SilkS") (width 0.12) (tstamp f90baa84-3a74-47be-99d1-5aa261a5b253))
(fp_rect (start 2.75 -1.25) (end -2.75 -16.25) (layer "Edge.Cuts") (width 0.12) (fill none) (tstamp 45b4ef61-88f6-4eb4-8106-9ca3e87943e7))
(pad "1" smd roundrect (at 0 -17.5 270) (size 2 1.2) (layers "F.Cu" "F.Paste" "F.Mask") (roundrect_rratio 0.2) (tstamp 78de7dd2-ad59-4066-a037-c0adc5c5f761))
(pad "2" smd roundrect (at 0 0 270) (size 2 1.2) (layers "F.Cu" "F.Paste" "F.Mask") (roundrect_rratio 0.2) (tstamp 848ac8c0-db8e-4c72-a57f-78222a82f4cd))
(model "${KICAD6_3DMODEL_DIR}/Capacitor_THT.3dshapes/CP_Axial_L11.0mm_D5.0mm_P18.00mm_Horizontal.step"
(offset (xyz -2.5 18 -1.2))
(scale (xyz 1 1 1))
(rotate (xyz 90 2 90))
)
)

View File

@ -0,0 +1,48 @@
(footprint "CP_Combo_15.0mm_5mm_P2.00mm_Horizontal_Slotted" (version 20211014) (generator pcbnew)
(layer "F.Cu")
(tedit 0)
(attr smd)
(fp_text reference "REF**" (at 0 2 unlocked) (layer "F.SilkS")
(effects (font (size 1 1) (thickness 0.15)))
(tstamp db485260-35d1-41c6-be48-e09046f649b8)
)
(fp_text value "CP_Combo_15.0mm_5mm_P2.00mm_Horizontal_Slotted" (at 0 3.5 unlocked) (layer "F.Fab")
(effects (font (size 1 1) (thickness 0.15)))
(tstamp 246fc9a1-9c36-4bbf-9fff-b66f34fade67)
)
(fp_text user "+" (at 2.25 -0.5 180 unlocked) (layer "F.SilkS")
(effects (font (size 0.8 0.8) (thickness 0.15)))
(tstamp f8a2f6d5-a7f8-4fcb-85e8-9d7508ce0240)
)
(fp_text user "${REFERENCE}" (at 0 2 unlocked) (layer "F.Fab")
(effects (font (size 1 1) (thickness 0.15)))
(tstamp c0abae27-2668-4ef9-8429-e39a830481bc)
)
(fp_line (start 3.75 -4.5) (end 3 -3.75) (layer "F.SilkS") (width 0.12) (tstamp 3f154e81-080a-4eac-94e2-a57b350c2978))
(fp_line (start -1.25 -16.75) (end -1.25 -18.25) (layer "F.SilkS") (width 0.4) (tstamp 7b507eed-8efb-4822-8cc7-aadfe799d0bb))
(fp_line (start -2.5 0.75) (end -2.5 -0.75) (layer "F.SilkS") (width 0.4) (tstamp 8146c854-8a94-460e-91f6-0d5e97e5069d))
(fp_line (start -3.75 -3) (end -3 -3.75) (layer "F.SilkS") (width 0.12) (tstamp af55e5ed-2cb9-4283-916f-1f6f4377ede1))
(fp_line (start 3 -3.75) (end 3.75 -3) (layer "F.SilkS") (width 0.12) (tstamp e0064674-cc27-4394-b555-ccf9d18d0f44))
(fp_line (start -3 -3.75) (end -3.75 -4.5) (layer "F.SilkS") (width 0.12) (tstamp f90baa84-3a74-47be-99d1-5aa261a5b253))
(fp_rect (start -2.75 -16.25) (end 2.75 -1.25) (layer "Edge.Cuts") (width 0.12) (fill none) (tstamp 45b4ef61-88f6-4eb4-8106-9ca3e87943e7))
(fp_line (start -3 -16.5) (end -3 -1) (layer "F.CrtYd") (width 0.05) (tstamp 158a813d-1c38-493d-ae26-da4960da326a))
(fp_line (start 2.25 -1) (end 3 -1) (layer "F.CrtYd") (width 0.05) (tstamp 20a46376-a7b0-4b8f-8d35-33fed3bd5c52))
(fp_line (start 3 -1) (end 3 -16.5) (layer "F.CrtYd") (width 0.05) (tstamp 4e4564d4-30dc-42d8-9169-d8b4985bb924))
(fp_line (start -1.25 -19) (end -1.25 -16.5) (layer "F.CrtYd") (width 0.05) (tstamp 5c14fbda-342b-4e02-9e99-f9a56ee4fbd2))
(fp_line (start -3 -1) (end -2.5 -1) (layer "F.CrtYd") (width 0.05) (tstamp 63d523a4-bc5c-4bcf-8fbb-2e596efb2e15))
(fp_line (start -1.25 -16.5) (end -3 -16.5) (layer "F.CrtYd") (width 0.05) (tstamp 6fe169c0-13c3-483a-abdc-523a9de1b1fb))
(fp_line (start -2.5 1.5) (end 2.25 1.5) (layer "F.CrtYd") (width 0.05) (tstamp c15b8e1d-4556-4949-ab84-bbb9f7611ffe))
(fp_line (start 2.25 1.5) (end 2.25 -1) (layer "F.CrtYd") (width 0.05) (tstamp ca531509-0e26-4dc6-acdc-cbf73428037b))
(fp_line (start -2.5 -1) (end -2.5 1.5) (layer "F.CrtYd") (width 0.05) (tstamp d4fc26ad-e5f8-4a7c-9265-a8a2d5118e4f))
(fp_line (start 1.25 -16.5) (end 1.25 -19) (layer "F.CrtYd") (width 0.05) (tstamp eb7f73eb-789c-4acc-b242-b7ee49bf7bcd))
(fp_line (start 3 -16.5) (end 1.25 -16.5) (layer "F.CrtYd") (width 0.05) (tstamp f2492c82-6691-4ffa-bd53-1594e3108b16))
(fp_line (start 1.25 -19) (end -1.25 -19) (layer "F.CrtYd") (width 0.05) (tstamp f5d4ca73-c617-49d6-a4f8-11478234f86f))
(pad "1" smd roundrect (at 0.75 0 90) (size 2 1.6) (layers "F.Cu" "F.Paste" "F.Mask") (roundrect_rratio 0.2) (tstamp 78de7dd2-ad59-4066-a037-c0adc5c5f761))
(pad "2" smd roundrect (at -1.25 0 90) (size 2 1.2) (layers "F.Cu" "F.Paste" "F.Mask") (roundrect_rratio 0.2) (tstamp 0b22ec7a-796a-44ce-a329-1d243662c897))
(pad "2" smd roundrect (at 0 -17.5 90) (size 2 1.2) (layers "F.Cu" "F.Paste" "F.Mask") (roundrect_rratio 0.2) (tstamp 848ac8c0-db8e-4c72-a57f-78222a82f4cd))
(model "${KICAD6_3DMODEL_DIR}/Capacitor_THT.3dshapes/CP_Axial_L11.0mm_D5.0mm_P18.00mm_Horizontal.step"
(offset (xyz 2.9 0 -0.8))
(scale (xyz 1 1 1))
(rotate (xyz 75 0 -93))
)
)

View File

@ -0,0 +1,42 @@
(footprint "CP_Combo_15.0mm_5mm_P2.00mm_Horizontal_Slotted_Backside" (version 20211014) (generator pcbnew)
(layer "F.Cu")
(tedit 0)
(attr smd)
(fp_text reference "REF**" (at 0 2.5 unlocked) (layer "F.SilkS")
(effects (font (size 1 1) (thickness 0.15)))
(tstamp db485260-35d1-41c6-be48-e09046f649b8)
)
(fp_text value "CP_Combo_15.0mm_5mm_P2.00mm_Horizontal_Slotted_Backside" (at 0 4 unlocked) (layer "F.Fab")
(effects (font (size 1 1) (thickness 0.15)))
(tstamp 246fc9a1-9c36-4bbf-9fff-b66f34fade67)
)
(fp_text user "+" (at -1.25 -0.5 180 unlocked) (layer "F.SilkS")
(effects (font (size 0.8 0.8) (thickness 0.15)))
(tstamp f8a2f6d5-a7f8-4fcb-85e8-9d7508ce0240)
)
(fp_text user "${REFERENCE}" (at 0 2.5 unlocked) (layer "F.Fab")
(effects (font (size 1 1) (thickness 0.15)))
(tstamp c0abae27-2668-4ef9-8429-e39a830481bc)
)
(fp_line (start 3.75 -4.5) (end 3 -3.75) (layer "F.SilkS") (width 0.12) (tstamp 3f154e81-080a-4eac-94e2-a57b350c2978))
(fp_line (start 1.25 -16.75) (end 1.25 -18.25) (layer "F.SilkS") (width 0.4) (tstamp 7b507eed-8efb-4822-8cc7-aadfe799d0bb))
(fp_line (start -3.75 -3) (end -3 -3.75) (layer "F.SilkS") (width 0.12) (tstamp af55e5ed-2cb9-4283-916f-1f6f4377ede1))
(fp_line (start 3 -3.75) (end 3.75 -3) (layer "F.SilkS") (width 0.12) (tstamp e0064674-cc27-4394-b555-ccf9d18d0f44))
(fp_line (start -3 -3.75) (end -3.75 -4.5) (layer "F.SilkS") (width 0.12) (tstamp f90baa84-3a74-47be-99d1-5aa261a5b253))
(fp_line (start 2.75 -15.75) (end 2.75 -1.75) (layer "Edge.Cuts") (width 0.12) (tstamp 6f210137-2dfc-431e-842c-fb6abbbe423a))
(fp_line (start -2.25 -16.25) (end 2.25 -16.25) (layer "Edge.Cuts") (width 0.12) (tstamp 742a6486-9946-431f-af75-71181b2334bf))
(fp_line (start -2.75 -1.75) (end -2.75 -15.75) (layer "Edge.Cuts") (width 0.12) (tstamp bfc39be9-b905-47dc-bd8f-a718fecf3918))
(fp_line (start 2.25 -1.25) (end -2.25 -1.25) (layer "Edge.Cuts") (width 0.12) (tstamp faa96ab5-baf2-45d7-83d8-77cdf9e98adc))
(fp_arc (start -2.25 -1.25) (mid -2.603553 -1.396447) (end -2.75 -1.75) (layer "Edge.Cuts") (width 0.12) (tstamp 6e0b6b88-7a92-45aa-97f5-60cd72de1399))
(fp_arc (start 2.25 -16.25) (mid 2.603553 -16.103553) (end 2.75 -15.75) (layer "Edge.Cuts") (width 0.12) (tstamp 9ae2189c-bef5-4c8b-b29f-1e3f09a5b338))
(fp_arc (start -2.75 -15.75) (mid -2.603553 -16.103553) (end -2.25 -16.25) (layer "Edge.Cuts") (width 0.12) (tstamp aca165dc-5d19-4db9-a3c9-99e0fa277054))
(fp_arc (start 2.75 -1.75) (mid 2.603553 -1.396447) (end 2.25 -1.25) (layer "Edge.Cuts") (width 0.12) (tstamp e7c3c0b1-1551-4e31-8966-2a0c204ad8ab))
(pad "1" smd roundrect (at 0 0 90) (size 2 1.2) (layers "F.Cu" "F.Paste" "F.Mask") (roundrect_rratio 0.2) (tstamp 78de7dd2-ad59-4066-a037-c0adc5c5f761))
(pad "2" smd roundrect (at 0 0 270) (size 2 1.2) (layers "B.Cu" "B.Paste" "B.Mask") (roundrect_rratio 0.2) (tstamp 099c54ca-f69b-4321-8ac5-a21ae488c41c))
(pad "2" smd roundrect (at 0 -17.5 90) (size 2 1.2) (layers "F.Cu" "F.Paste" "F.Mask") (roundrect_rratio 0.2) (tstamp 848ac8c0-db8e-4c72-a57f-78222a82f4cd))
(model "${KICAD6_3DMODEL_DIR}/Capacitor_THT.3dshapes/CP_Axial_L11.0mm_D5.0mm_P18.00mm_Horizontal.step"
(offset (xyz -2.5 18 -1.2))
(scale (xyz 1 1 1))
(rotate (xyz 90 2 90))
)
)

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@ -0,0 +1,35 @@
(footprint "CP_Radial_10.0mm_4.5mm_P2.00mm_Horizontal_Slotted" (version 20211014) (generator pcbnew)
(layer "F.Cu")
(tedit 0)
(attr smd)
(fp_text reference "REF**" (at 1 2 unlocked) (layer "F.SilkS")
(effects (font (size 1 1) (thickness 0.15)))
(tstamp db485260-35d1-41c6-be48-e09046f649b8)
)
(fp_text value "CP_Radial_10.0mm_4.5mm_P2.00mm_Horizontal_Slotted" (at 1 3.5 unlocked) (layer "F.Fab")
(effects (font (size 1 1) (thickness 0.15)))
(tstamp 246fc9a1-9c36-4bbf-9fff-b66f34fade67)
)
(fp_text user "+" (at 3.25 -0.5 unlocked) (layer "B.SilkS")
(effects (font (size 0.8 0.8) (thickness 0.15)) (justify mirror))
(tstamp c78985b3-9572-4caf-b990-86ab9120fc63)
)
(fp_text user "+" (at 3.25 -0.5 unlocked) (layer "F.SilkS")
(effects (font (size 0.8 0.8) (thickness 0.15)))
(tstamp f8a2f6d5-a7f8-4fcb-85e8-9d7508ce0240)
)
(fp_text user "${REFERENCE}" (at 1 2 unlocked) (layer "F.Fab")
(effects (font (size 1 1) (thickness 0.15)))
(tstamp c0abae27-2668-4ef9-8429-e39a830481bc)
)
(fp_line (start -1.25 -0.75) (end -1.25 0.75) (layer "B.SilkS") (width 0.4) (tstamp f1521435-82eb-4f42-a627-5dffbe900568))
(fp_line (start -1.25 -0.75) (end -1.25 0.75) (layer "F.SilkS") (width 0.4) (tstamp 7b507eed-8efb-4822-8cc7-aadfe799d0bb))
(fp_rect (start 3.75 -1.25) (end -1.75 -13.75) (layer "Edge.Cuts") (width 0.12) (fill none) (tstamp 45b4ef61-88f6-4eb4-8106-9ca3e87943e7))
(pad "1" smd roundrect (at 2 0 270) (size 2 1.2) (layers "F.Cu" "F.Paste" "F.Mask") (roundrect_rratio 0.2) (tstamp 78de7dd2-ad59-4066-a037-c0adc5c5f761))
(pad "2" smd roundrect (at 0 0 270) (size 2 1.2) (layers "F.Cu" "F.Paste" "F.Mask") (roundrect_rratio 0.2) (tstamp 848ac8c0-db8e-4c72-a57f-78222a82f4cd))
(model "${KICAD6_3DMODEL_DIR}/Capacitor_THT.3dshapes/C_Radial_D5.0mm_H11.0mm_P2.00mm.step"
(offset (xyz 0 2 0))
(scale (xyz 1 1 1))
(rotate (xyz 90 0 0))
)
)

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@ -1,30 +0,0 @@
(module Molex_SL_171971-0002_1x02_P2.54mm_Horizontal (layer F.Cu) (tedit 61B3ED2E)
(descr "Molex Stackable Linear Connector, 171971-0006 (compatible alternatives: 171971-0106, 171971-0206), 6 Pins per row (https://www.molex.com/pdm_docs/sd/1719710002_sd.pdf), generated with kicad-footprint-generator")
(tags "connector Molex SL vertical")
(fp_text reference REF** (at 1.27 -13.97) (layer F.SilkS)
(effects (font (size 1 1) (thickness 0.15)))
)
(fp_text value Molex_SL_171971-0002_1x02_P2.54mm_Horizontal (at 6.35 2.54) (layer F.Fab)
(effects (font (size 1 1) (thickness 0.15)))
)
(fp_line (start 5.53 -3.05) (end -3 -3.05) (layer F.CrtYd) (width 0.05))
(fp_line (start 5.53 1.27) (end 5.53 -3.05) (layer F.CrtYd) (width 0.05))
(fp_line (start -3 1.27) (end 5.53 1.27) (layer F.CrtYd) (width 0.05))
(fp_line (start -3 -3.05) (end -3 1.27) (layer F.CrtYd) (width 0.05))
(fp_line (start 0 -11.43) (end -0.5 -13.11) (layer F.Fab) (width 0.1))
(fp_line (start 0.5 -13.11) (end 0 -11.43) (layer F.Fab) (width 0.1))
(fp_line (start 5.08 -13.2) (end -2.54 -13.2) (layer F.SilkS) (width 0.12))
(fp_line (start 5.08 0.5) (end 5.08 -13.2) (layer F.SilkS) (width 0.12))
(fp_line (start -2.54 0.5) (end 5.08 0.5) (layer F.SilkS) (width 0.12))
(fp_line (start -2.54 -13.2) (end -2.54 0.5) (layer F.SilkS) (width 0.12))
(fp_text user %R (at 1.27 -2.04) (layer F.Fab)
(effects (font (size 1 1) (thickness 0.15)))
)
(pad 2 thru_hole circle (at 2.54 0) (size 1.74 1.74) (drill 1.09) (layers *.Cu *.Mask))
(pad 1 thru_hole roundrect (at 0 0) (size 1.74 1.74) (drill 1.09) (layers *.Cu *.Mask) (roundrect_rratio 0.143678))
(model ${KISYS3DMOD}/Connector_Molex.3dshapes/Molex_SL_171971-0006_1x06_P2.54mm_Vertical.wrl
(at (xyz 0 0 0))
(scale (xyz 1 1 1))
(rotate (xyz 0 0 0))
)
)

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@ -1,32 +0,0 @@
(module Molex_SL_171971-0004_1x04_P2.54mm_Horizontal (layer F.Cu) (tedit 61B3ED37)
(descr "Molex Stackable Linear Connector, 171971-0006 (compatible alternatives: 171971-0106, 171971-0206), 6 Pins per row (https://www.molex.com/pdm_docs/sd/1719710002_sd.pdf), generated with kicad-footprint-generator")
(tags "connector Molex SL vertical")
(fp_text reference REF** (at 3.81 -13.97) (layer F.SilkS)
(effects (font (size 1 1) (thickness 0.15)))
)
(fp_text value Molex_SL_171971-0004_1x04_P2.54mm_Horizontal (at 6.35 2.54) (layer F.Fab)
(effects (font (size 1 1) (thickness 0.15)))
)
(fp_line (start 10.53 -3.05) (end -3 -3.05) (layer F.CrtYd) (width 0.05))
(fp_line (start 10.53 1.27) (end 10.53 -3.05) (layer F.CrtYd) (width 0.05))
(fp_line (start -3 1.27) (end 10.53 1.27) (layer F.CrtYd) (width 0.05))
(fp_line (start -3 -3.05) (end -3 1.27) (layer F.CrtYd) (width 0.05))
(fp_line (start 0 -11.43) (end -0.5 -13.11) (layer F.Fab) (width 0.1))
(fp_line (start 0.5 -13.11) (end 0 -11.43) (layer F.Fab) (width 0.1))
(fp_line (start 10.16 -13.2) (end -2.54 -13.2) (layer F.SilkS) (width 0.12))
(fp_line (start 10.16 0.5) (end 10.16 -13.2) (layer F.SilkS) (width 0.12))
(fp_line (start -2.54 0.5) (end 10.16 0.5) (layer F.SilkS) (width 0.12))
(fp_line (start -2.54 -13.2) (end -2.54 0.5) (layer F.SilkS) (width 0.12))
(fp_text user %R (at 3.81 -2.04) (layer F.Fab)
(effects (font (size 1 1) (thickness 0.15)))
)
(pad 4 thru_hole circle (at 7.62 0) (size 1.74 1.74) (drill 1.09) (layers *.Cu *.Mask))
(pad 3 thru_hole circle (at 5.08 0) (size 1.74 1.74) (drill 1.09) (layers *.Cu *.Mask))
(pad 2 thru_hole circle (at 2.54 0) (size 1.74 1.74) (drill 1.09) (layers *.Cu *.Mask))
(pad 1 thru_hole roundrect (at 0 0) (size 1.74 1.74) (drill 1.09) (layers *.Cu *.Mask) (roundrect_rratio 0.143678))
(model ${KISYS3DMOD}/Connector_Molex.3dshapes/Molex_SL_171971-0006_1x06_P2.54mm_Vertical.wrl
(at (xyz 0 0 0))
(scale (xyz 1 1 1))
(rotate (xyz 0 0 0))
)
)

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@ -1,34 +0,0 @@
(module Molex_SL_171971-0006_1x06_P2.54mm_Horizontal (layer F.Cu) (tedit 61B3ECB6)
(descr "Molex Stackable Linear Connector, 171971-0006 (compatible alternatives: 171971-0106, 171971-0206), 6 Pins per row (https://www.molex.com/pdm_docs/sd/1719710002_sd.pdf), generated with kicad-footprint-generator")
(tags "connector Molex SL vertical")
(fp_text reference REF** (at 6.35 -13.97) (layer F.SilkS)
(effects (font (size 1 1) (thickness 0.15)))
)
(fp_text value Molex_SL_171971-0006_1x06_P2.54mm_Horizontal (at 6.35 2.54) (layer F.Fab)
(effects (font (size 1 1) (thickness 0.15)))
)
(fp_line (start 15.7 -3.05) (end -3 -3.05) (layer F.CrtYd) (width 0.05))
(fp_line (start 15.7 1.27) (end 15.7 -3.05) (layer F.CrtYd) (width 0.05))
(fp_line (start -3 1.27) (end 15.7 1.27) (layer F.CrtYd) (width 0.05))
(fp_line (start -3 -3.05) (end -3 1.27) (layer F.CrtYd) (width 0.05))
(fp_line (start 0 -11.43) (end -0.5 -13.11) (layer F.Fab) (width 0.1))
(fp_line (start 0.5 -13.11) (end 0 -11.43) (layer F.Fab) (width 0.1))
(fp_line (start 15.24 -13.2) (end -2.54 -13.2) (layer F.SilkS) (width 0.12))
(fp_line (start 15.24 0.5) (end 15.24 -13.2) (layer F.SilkS) (width 0.12))
(fp_line (start -2.54 0.5) (end 15.24 0.5) (layer F.SilkS) (width 0.12))
(fp_line (start -2.54 -13.2) (end -2.54 0.5) (layer F.SilkS) (width 0.12))
(fp_text user %R (at 6.35 -2.04) (layer F.Fab)
(effects (font (size 1 1) (thickness 0.15)))
)
(pad 6 thru_hole circle (at 12.7 0) (size 1.74 1.74) (drill 1.09) (layers *.Cu *.Mask))
(pad 5 thru_hole circle (at 10.16 0) (size 1.74 1.74) (drill 1.09) (layers *.Cu *.Mask))
(pad 4 thru_hole circle (at 7.62 0) (size 1.74 1.74) (drill 1.09) (layers *.Cu *.Mask))
(pad 3 thru_hole circle (at 5.08 0) (size 1.74 1.74) (drill 1.09) (layers *.Cu *.Mask))
(pad 2 thru_hole circle (at 2.54 0) (size 1.74 1.74) (drill 1.09) (layers *.Cu *.Mask))
(pad 1 thru_hole roundrect (at 0 0) (size 1.74 1.74) (drill 1.09) (layers *.Cu *.Mask) (roundrect_rratio 0.143678))
(model ${KISYS3DMOD}/Connector_Molex.3dshapes/Molex_SL_171971-0006_1x06_P2.54mm_Vertical.wrl
(at (xyz 0 0 0))
(scale (xyz 1 1 1))
(rotate (xyz 0 0 0))
)
)

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@ -1,58 +0,0 @@
(module Molex_iGrid_501645-1220-12P_2x06_P2.00mm_Vertical (layer F.Cu) (tedit 61BD21C6)
(descr "Molex Nano-Fit Power Connectors, 105310-xx12, 6 Pins per row (http://www.molex.com/pdm_docs/sd/1053101208_sd.pdf), generated with kicad-footprint-generator")
(tags "connector Molex Nano-Fit side entry")
(fp_text reference REF** (at -3.9 -2.8) (layer F.SilkS)
(effects (font (size 1 1) (thickness 0.15)))
)
(fp_text value Molex_iGrid_501645-1220-12P_2x06_P2.00mm_Vertical (at 0 13.4) (layer F.Fab)
(effects (font (size 1 1) (thickness 0.15)))
)
(fp_line (start 0.812893 0) (end 1.3 0.4) (layer F.Fab) (width 0.1))
(fp_line (start 1.3 -0.4) (end 0.812893 0) (layer F.Fab) (width 0.1))
(fp_line (start -3.3 1.35) (end -4.6 1.35) (layer F.Fab) (width 0.1))
(fp_line (start 1.3 11.35) (end 1.3 -1.35) (layer F.Fab) (width 0.1))
(fp_line (start -4.6 8.65) (end -3.3 8.65) (layer F.Fab) (width 0.1))
(fp_line (start -4.6 1.35) (end -4.6 8.65) (layer F.Fab) (width 0.1))
(fp_line (start -6.6 12.5) (end -6.6 -2.5) (layer F.CrtYd) (width 0.05))
(fp_line (start 2.6 12.5) (end -6.6 12.5) (layer F.CrtYd) (width 0.05))
(fp_line (start 2.6 -2.5) (end -6.6 -2.5) (layer F.CrtYd) (width 0.05))
(fp_line (start 2.6 12.5) (end 2.6 -2.5) (layer F.CrtYd) (width 0.05))
(fp_line (start -6.2 12.1) (end -6.2 -2.1) (layer F.SilkS) (width 0.12))
(fp_line (start 2.2 12.1) (end -6.2 12.1) (layer F.SilkS) (width 0.12))
(fp_line (start 2.2 -2.1) (end -6.2 -2.1) (layer F.SilkS) (width 0.12))
(fp_line (start 2.2 12.1) (end 2.2 -2.1) (layer F.SilkS) (width 0.12))
(fp_line (start -6.1 12) (end -6.1 -2) (layer F.Fab) (width 0.1))
(fp_line (start 2.1 12) (end -6.1 12) (layer F.Fab) (width 0.1))
(fp_line (start 2.1 -2) (end -6.1 -2) (layer F.Fab) (width 0.1))
(fp_line (start 2.1 12) (end 2.1 -2) (layer F.Fab) (width 0.1))
(fp_text user %R (at 0.8 -3.2 180) (layer F.Fab)
(effects (font (size 1 1) (thickness 0.15)))
)
(fp_line (start 1.3 -1.35) (end -4.6 -1.35) (layer F.Fab) (width 0.1))
(fp_line (start -3.3 10) (end -3.3 0) (layer F.Fab) (width 0.1))
(fp_line (start -3.3 0) (end -4.6 0) (layer F.Fab) (width 0.1))
(fp_line (start -4.6 -1.35) (end -4.6 0) (layer F.Fab) (width 0.1))
(fp_line (start -3.3 10) (end -4.6 10) (layer F.Fab) (width 0.1))
(fp_line (start -4.6 10) (end -4.6 11.35) (layer F.Fab) (width 0.1))
(fp_line (start 1.3 11.35) (end -4.6 11.35) (layer F.Fab) (width 0.1))
(fp_line (start -4.6 2.5) (end -6.1 2.5) (layer F.Fab) (width 0.1))
(fp_line (start -4.6 7.5) (end -6.1 7.5) (layer F.Fab) (width 0.1))
(pad 1 thru_hole roundrect (at 0 0) (size 1.5 1.5) (drill 1) (layers *.Cu *.Mask) (roundrect_rratio 0.147))
(pad 2 thru_hole circle (at -2 0) (size 1.5 1.5) (drill 1) (layers *.Cu *.Mask))
(pad 3 thru_hole circle (at 0 2) (size 1.5 1.5) (drill 1) (layers *.Cu *.Mask))
(pad 4 thru_hole circle (at -2 2) (size 1.5 1.5) (drill 1) (layers *.Cu *.Mask))
(pad 6 thru_hole circle (at -2 4) (size 1.5 1.5) (drill 1) (layers *.Cu *.Mask))
(pad 5 thru_hole circle (at 0 4) (size 1.5 1.5) (drill 1) (layers *.Cu *.Mask))
(pad 8 thru_hole circle (at -2 5.9) (size 1.5 1.5) (drill 1) (layers *.Cu *.Mask))
(pad 7 thru_hole circle (at 0 5.9) (size 1.5 1.5) (drill 1) (layers *.Cu *.Mask))
(pad 10 thru_hole circle (at -2 8) (size 1.5 1.5) (drill 1) (layers *.Cu *.Mask))
(pad 9 thru_hole circle (at 0 8) (size 1.5 1.5) (drill 1) (layers *.Cu *.Mask))
(pad 12 thru_hole circle (at -2 10) (size 1.5 1.5) (drill 1) (layers *.Cu *.Mask))
(pad 11 thru_hole circle (at 0 10) (size 1.5 1.5) (drill 1) (layers *.Cu *.Mask))
(pad "" np_thru_hole circle (at -5.1 -1.2) (size 1.2 1.2) (drill 1.2) (layers *.Cu *.Mask))
(model ${KISYS3DMOD}/Connector_Molex.3dshapes/Molex_Nano-Fit_105310-xx12_2x06_P2.50mm_Vertical.wrl
(at (xyz 0 0 0))
(scale (xyz 1 1 1))
(rotate (xyz 0 0 0))
)
)

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@ -1,38 +0,0 @@
(module SC-74-6_1.5x2.9mm_P0.95mm (layer F.Cu) (tedit 61BBD8F1)
(descr "SC-74, 6 Pin (https://www.nxp.com/docs/en/package-information/SOT457.pdf), generated with kicad-footprint-generator ipc_gullwing_generator.py")
(tags "SC-74 SO")
(attr smd)
(fp_text reference REF** (at 0 -2.4) (layer F.SilkS)
(effects (font (size 1 1) (thickness 0.15)))
)
(fp_text value SC-74-6_1.5x2.9mm_P0.95mm (at 0 2.4) (layer F.Fab)
(effects (font (size 1 1) (thickness 0.15)))
)
(fp_line (start 0 1.56) (end 0.75 1.56) (layer F.SilkS) (width 0.12))
(fp_line (start 0 1.56) (end -0.75 1.56) (layer F.SilkS) (width 0.12))
(fp_line (start 0 -1.56) (end 0.75 -1.56) (layer F.SilkS) (width 0.12))
(fp_line (start 0 -1.56) (end -1.85 -1.56) (layer F.SilkS) (width 0.12))
(fp_line (start -0.375 -1.45) (end 0.75 -1.45) (layer F.Fab) (width 0.1))
(fp_line (start 0.75 -1.45) (end 0.75 1.45) (layer F.Fab) (width 0.1))
(fp_line (start 0.75 1.45) (end -0.75 1.45) (layer F.Fab) (width 0.1))
(fp_line (start -0.75 1.45) (end -0.75 -1.075) (layer F.Fab) (width 0.1))
(fp_line (start -0.75 -1.075) (end -0.375 -1.45) (layer F.Fab) (width 0.1))
(fp_line (start -2.1 -1.7) (end -2.1 1.7) (layer F.CrtYd) (width 0.05))
(fp_line (start -2.1 1.7) (end 2.1 1.7) (layer F.CrtYd) (width 0.05))
(fp_line (start 2.1 1.7) (end 2.1 -1.7) (layer F.CrtYd) (width 0.05))
(fp_line (start 2.1 -1.7) (end -2.1 -1.7) (layer F.CrtYd) (width 0.05))
(fp_text user %R (at 0 0) (layer F.Fab)
(effects (font (size 0.38 0.38) (thickness 0.06)))
)
(pad 1 smd roundrect (at -1.1375 -0.95) (size 1.425 0.5) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.25))
(pad 2 smd roundrect (at -1.1375 0) (size 1.425 0.5) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.25))
(pad 3 smd roundrect (at -1.1375 0.95) (size 1.425 0.5) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.25))
(pad 4 smd roundrect (at 1.1375 0.95) (size 1.425 0.5) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.25))
(pad 5 smd roundrect (at 1.1375 0) (size 1.425 0.5) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.25))
(pad 6 smd roundrect (at 1.1375 -0.95) (size 1.425 0.5) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.25))
(model ${KIPRJMOD}/packages3d/SC-74.3dshapes/SC-74-6.stp
(at (xyz 0 0 0))
(scale (xyz 1 1 1))
(rotate (xyz 0 0 90))
)
)

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@ -1,37 +0,0 @@
(module SC-74A-5_1.5x2.9mm_P0.95mm (layer F.Cu) (tedit 61BBD969)
(descr "SC-74, 6 Pin (https://www.nxp.com/docs/en/package-information/SOT457.pdf), generated with kicad-footprint-generator ipc_gullwing_generator.py")
(tags "SC-74 SO")
(attr smd)
(fp_text reference REF** (at 0 -2.4) (layer F.SilkS)
(effects (font (size 1 1) (thickness 0.15)))
)
(fp_text value SC-74A-5_1.5x2.9mm_P0.95mm (at 0 2.4) (layer F.Fab)
(effects (font (size 1 1) (thickness 0.15)))
)
(fp_line (start 0 1.56) (end 0.75 1.56) (layer F.SilkS) (width 0.12))
(fp_line (start 0 1.56) (end -0.75 1.56) (layer F.SilkS) (width 0.12))
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)

View File

@ -0,0 +1,30 @@
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redraw_on_drag=1
board_rotation=0
checkboxes=Sourced,Placed
bom_view=left-right
layer_view=FB
compression=1
open_browser=1
[general]
bom_dest_dir=export
bom_name_format=ibom
component_sort_order=C,R,L,D,U,Y,X,F,SW,A,~,HS,CNN,J,P,NT,MH
component_blacklist=
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blacklist_empty_val=0
include_tracks=0
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3950
sdcl-hardware/npl.kicad_sch Normal file

File diff suppressed because it is too large Load Diff

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View File

@ -1,485 +0,0 @@
EESchema Schematic File Version 4
EELAYER 30 0
EELAYER END
$Descr A4 11693 8268
encoding utf-8
Sheet 5 6
Title ""
Date ""
Rev ""
Comp ""
Comment1 ""
Comment2 ""
Comment3 ""
Comment4 ""
$EndDescr
$Comp
L Regulator_Linear:AZ1117-3.3 U10
U 1 1 61B53DAA
P 5350 5150
F 0 "U10" H 5350 5392 50 0000 C CNN
F 1 "AZ1117-3.3" H 5350 5301 50 0000 C CNN
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F 3 "https://www.diodes.com/assets/Datasheets/AZ1117.pdf" H 5350 5150 50 0001 C CNN
1 5350 5150
1 0 0 -1
$EndComp
$Comp
L power:GND #PWR?
U 1 1 61B48E26
P 5800 5450
AR Path="/61ABEE8E/61B48E26" Ref="#PWR?" Part="1"
AR Path="/61A7C038/61B48E26" Ref="#PWR?" Part="1"
AR Path="/61A7E868/61B48E26" Ref="#PWR?" Part="1"
AR Path="/61AD620F/61B441C4/61B48E26" Ref="#PWR?" Part="1"
AR Path="/61B4E8CF/61B48E26" Ref="#PWR0144" Part="1"
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1 5800 5450
1 0 0 -1
$EndComp
$Comp
L power:GND #PWR?
U 1 1 61B48A87
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AR Path="/61ABEE8E/61B48A87" Ref="#PWR?" Part="1"
AR Path="/61A7C038/61B48A87" Ref="#PWR?" Part="1"
AR Path="/61A7E868/61B48A87" Ref="#PWR?" Part="1"
AR Path="/61AD620F/61B441C4/61B48A87" Ref="#PWR?" Part="1"
AR Path="/61B4E8CF/61B48A87" Ref="#PWR0145" Part="1"
F 0 "#PWR0145" H 4900 5200 50 0001 C CNN
F 1 "GND" H 4905 5277 50 0000 C CNN
F 2 "" H 4900 5450 50 0001 C CNN
F 3 "" H 4900 5450 50 0001 C CNN
1 4900 5450
1 0 0 -1
$EndComp
Wire Wire Line
5800 5150 6000 5150
Connection ~ 5800 5150
$Comp
L Device:CP C?
U 1 1 61B4815D
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AR Path="/61AD620F/61B441C4/61B4815D" Ref="C?" Part="1"
AR Path="/61B4E8CF/61B4815D" Ref="C19" Part="1"
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$EndComp
Wire Wire Line
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$Comp
L Device:CP C?
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AR Path="/61A7C038/61B46489" Ref="C?" Part="1"
AR Path="/61A7E868/61B46489" Ref="C?" Part="1"
AR Path="/61AD620F/61B441C4/61B46489" Ref="C?" Part="1"
AR Path="/61B4E8CF/61B46489" Ref="C17" Part="1"
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1 4900 5300
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$EndComp
$Comp
L power:GND #PWR?
U 1 1 61B443AE
P 5350 5450
AR Path="/61ABEE8E/61B443AE" Ref="#PWR?" Part="1"
AR Path="/61A7C038/61B443AE" Ref="#PWR?" Part="1"
AR Path="/61A7E868/61B443AE" Ref="#PWR?" Part="1"
AR Path="/61AD620F/61B441C4/61B443AE" Ref="#PWR?" Part="1"
AR Path="/61B4E8CF/61B443AE" Ref="#PWR0146" Part="1"
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F 3 "" H 5350 5450 50 0001 C CNN
1 5350 5450
1 0 0 -1
$EndComp
Wire Wire Line
5650 5150 5800 5150
$Comp
L power:+3.3V #PWR?
U 1 1 61B42D86
P 6000 5150
AR Path="/61AD620F/61B441C4/61B42D86" Ref="#PWR?" Part="1"
AR Path="/61B4E8CF/61B42D86" Ref="#PWR0147" Part="1"
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1 0 0 -1
$EndComp
Wire Wire Line
4700 5150 4900 5150
$Comp
L power:+12V #PWR?
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AR Path="/61ABEE8E/61B3E2A5" Ref="#PWR?" Part="1"
AR Path="/61A7C038/61B3E2A5" Ref="#PWR?" Part="1"
AR Path="/61A7E868/61B3E2A5" Ref="#PWR?" Part="1"
AR Path="/61AD620F/61B441C4/61B3E2A5" Ref="#PWR?" Part="1"
AR Path="/61B4E8CF/61B3E2A5" Ref="#PWR0148" Part="1"
F 0 "#PWR0148" H 4700 5000 50 0001 C CNN
F 1 "+12V" H 4715 5323 50 0000 C CNN
F 2 "" H 4700 5150 50 0001 C CNN
F 3 "" H 4700 5150 50 0001 C CNN
1 4700 5150
1 0 0 -1
$EndComp
Text Notes 5550 2050 0 50 ~ 0
TODO: Replace with 3.3V only LDO
Wire Wire Line
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$Comp
L Regulator_Switching:ADP2303ARDZ-5.0 U?
U 1 1 61B65217
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AR Path="/61A7C038/61B65217" Ref="U?" Part="1"
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AR Path="/61AD620F/61B441C4/61B65217" Ref="U9" Part="1"
AR Path="/61B4E8CF/61B65217" Ref="U9" Part="1"
F 0 "U9" H 3950 3167 50 0000 C CNN
F 1 "ADP2303ARDZ-5.0" H 3950 3076 50 0000 C CNN
F 2 "Package_SO:SOIC-8-1EP_3.9x4.9mm_P1.27mm_EP2.29x3mm" H 4100 2350 50 0001 L CNN
F 3 "https://www.analog.com/media/en/technical-documentation/data-sheets/ADP2302_2303.pdf" H 3750 3300 50 0001 C CNN
1 3950 2700
1 0 0 -1
$EndComp
$Comp
L Device:D_Schottky D?
U 1 1 61B65211
P 4850 2850
AR Path="/61ABEE8E/61B65211" Ref="D?" Part="1"
AR Path="/61A7C038/61B65211" Ref="D?" Part="1"
AR Path="/61A7E868/61B65211" Ref="D?" Part="1"
AR Path="/61AD620F/61B441C4/61B65211" Ref="D4" Part="1"
AR Path="/61B4E8CF/61B65211" Ref="D5" Part="1"
F 0 "D5" V 4804 2929 50 0000 L CNN
F 1 "SSB43L" V 4895 2929 50 0000 L CNN
F 2 "Diode_SMD:D_SMB_Handsoldering" H 4850 2850 50 0001 C CNN
F 3 "~" H 4850 2850 50 0001 C CNN
1 4850 2850
0 1 1 0
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$Comp
L Device:C C?
U 1 1 61B6520B
P 4850 2550
AR Path="/61ABEE8E/61B6520B" Ref="C?" Part="1"
AR Path="/61A7C038/61B6520B" Ref="C?" Part="1"
AR Path="/61A7E868/61B6520B" Ref="C?" Part="1"
AR Path="/61AD620F/61B441C4/61B6520B" Ref="C17" Part="1"
AR Path="/61B4E8CF/61B6520B" Ref="C18" Part="1"
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F 1 "0.1uF" H 4965 2505 50 0000 L CNN
F 2 "Capacitor_SMD:C_0603_1608Metric_Pad1.08x0.95mm_HandSolder" H 4888 2400 50 0001 C CNN
F 3 "~" H 4850 2550 50 0001 C CNN
1 4850 2550
1 0 0 -1
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Connection ~ 4850 2700
Wire Wire Line
4450 2700 4850 2700
Wire Wire Line
5200 2700 4850 2700
$Comp
L Device:L L?
U 1 1 61B65202
P 5350 2700
AR Path="/61ABEE8E/61B65202" Ref="L?" Part="1"
AR Path="/61A7C038/61B65202" Ref="L?" Part="1"
AR Path="/61A7E868/61B65202" Ref="L?" Part="1"
AR Path="/61AD620F/61B441C4/61B65202" Ref="L1" Part="1"
AR Path="/61B4E8CF/61B65202" Ref="L1" Part="1"
F 0 "L1" V 5540 2700 50 0000 C CNN
F 1 "4.7uH" V 5449 2700 50 0000 C CNN
F 2 "Inductor_SMD:L_Wuerth_HCI-7040" H 5350 2700 50 0001 C CNN
F 3 "~" H 5350 2700 50 0001 C CNN
1 5350 2700
0 -1 -1 0
$EndComp
$Comp
L Device:C C?
U 1 1 61B651FC
P 2500 2650
AR Path="/61ABEE8E/61B651FC" Ref="C?" Part="1"
AR Path="/61A7C038/61B651FC" Ref="C?" Part="1"
AR Path="/61A7E868/61B651FC" Ref="C?" Part="1"
AR Path="/61AD620F/61B441C4/61B651FC" Ref="C16" Part="1"
AR Path="/61B4E8CF/61B651FC" Ref="C16" Part="1"
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Connection ~ 2500 2500
Wire Wire Line
2500 2500 2250 2500
$Comp
L Device:R R?
U 1 1 61B651F3
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AR Path="/61ABEE8E/61B651F3" Ref="R?" Part="1"
AR Path="/61A7C038/61B651F3" Ref="R?" Part="1"
AR Path="/61A7E868/61B651F3" Ref="R?" Part="1"
AR Path="/61AD620F/61B441C4/61B651F3" Ref="R14" Part="1"
AR Path="/61B4E8CF/61B651F3" Ref="R14" Part="1"
F 0 "R14" H 3220 2896 50 0000 L CNN
F 1 "100k" H 3220 2805 50 0000 L CNN
F 2 "Resistor_SMD:R_0603_1608Metric_Pad0.98x0.95mm_HandSolder" V 3080 2850 50 0001 C CNN
F 3 "~" H 3150 2850 50 0001 C CNN
1 3150 2850
1 0 0 -1
$EndComp
$Comp
L Device:C C?
U 1 1 61B651EC
P 5700 2850
AR Path="/61ABEE8E/61B651EC" Ref="C?" Part="1"
AR Path="/61A7C038/61B651EC" Ref="C?" Part="1"
AR Path="/61A7E868/61B651EC" Ref="C?" Part="1"
AR Path="/61AD620F/61B441C4/61B651EC" Ref="C18" Part="1"
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EESchema Schematic File Version 4
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$Descr A4 11693 8268
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Title "SDCL - SDC Relay"
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$EndComp
Text Notes 4800 3200 0 50 ~ 0
(3.3V1.6V)/5.6mA = 303 Ω
Text Notes 6500 3700 0 50 ~ 0
~~2A / 3A
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View File

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K TTL nand 2-input
F http://www.ti.com/lit/gpn/sn7400
$ENDCMP
#
$CMP 74HC00
D quad 2-input NAND gate
K HCMOS nand 2-input
F http://www.ti.com/lit/gpn/sn74hc00
$ENDCMP
#
$CMP 74HCT00
D quad 2-input NAND gate
K HCTMOS nand 2-input
F http://www.ti.com/lit/gpn/sn74hct00
$ENDCMP
#
$CMP 74LS09
D Quad 2-input AND Open Collect
K TTL and2 OpenCol
F http://www.ti.com/lit/gpn/sn74LS09
$ENDCMP
#
$CMP 74LS37
D quad 2-input NAND buffer
K TTL nand 2-input buffer
F http://www.ti.com/lit/gpn/sn74ls37
$ENDCMP
#
$CMP 74LV08D
D Quad And
K And
F https://www.mouser.de/datasheet/2/916/74LV08-1388983.pdf
$ENDCMP
#
$CMP AZ1117-1.5
D 1A 20V Fixed LDO Linear Regulator, 1.5V, SOT-89/SOT-223/TO-220/TO-252/TO-263
K Fixed Voltage Regulator 1A Positive LDO
F https://www.diodes.com/assets/Datasheets/AZ1117.pdf
$ENDCMP
#
$CMP AZ1117-1.8
D 1A 20V Fixed LDO Linear Regulator, 1.8V, SOT-89/SOT-223/TO-220/TO-252/TO-263
K Fixed Voltage Regulator 1A Positive LDO
F https://www.diodes.com/assets/Datasheets/AZ1117.pdf
$ENDCMP
#
$CMP AZ1117-2.5
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K Fixed Voltage Regulator 1A Positive LDO
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#
$CMP AZ1117-2.85
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K Fixed Voltage Regulator 1A Positive LDO
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#
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K Fixed Voltage Regulator 1A Positive LDO
F https://www.diodes.com/assets/Datasheets/AZ1117.pdf
$ENDCMP
#
$CMP AZ1117-3Pin
D 1A 20V Fixed LDO Linear Regulator, 1.2V, SOT-89/SOT-223/TO-220/TO-252/TO-263
K Fixed Voltage Regulator 1A Positive LDO
F https://www.diodes.com/assets/Datasheets/AZ1117.pdf
$ENDCMP
#
$CMP AZ1117-4Pin
D 1A 20V Fixed LDO Linear Regulator, 1.2V, SOT-89/SOT-223/TO-220/TO-252/TO-263
K Fixed Voltage Regulator 1A Positive LDO
F https://www.diodes.com/assets/Datasheets/AZ1117.pdf
$ENDCMP
#
$CMP AZ1117-5.0
D 1A 20V Fixed LDO Linear Regulator, 5.0V, SOT-89/SOT-223/TO-220/TO-252/TO-263
K Fixed Voltage Regulator 1A Positive LDO
F https://www.diodes.com/assets/Datasheets/AZ1117.pdf
$ENDCMP
#
$CMP Binder-M12-12P
D 8-pin DIN connector
K circular DIN connector
F http://www.mouser.com/ds/2/18/40_c091_abd_e-75918.pdf
$ENDCMP
#
$CMP CAT811JTBI-GT3
D Power supply supervisor, Manual reset, Threshold 4.00V, SOT-143
K Supervisor Reset
F http://www.onsemi.com/pub/Collateral/CAT811-D.PDF
$ENDCMP
#
$CMP CAT811LTBI-GT3
D Power supply supervisor, Manual reset, Threshold 4.63V, SOT-143
K Supervisor Reset
F http://www.onsemi.com/pub/Collateral/CAT811-D.PDF
$ENDCMP
#
$CMP CAT811MTBI-GT3
D Power supply supervisor, Manual reset, Threshold 4.38V, SOT-143
K Supervisor Reset
F http://www.onsemi.com/pub/Collateral/CAT811-D.PDF
$ENDCMP
#
$CMP CAT811RTBI-GT3
D Power supply supervisor, Manual reset, Threshold 2.63V, SOT-143
K Supervisor Reset
F http://www.onsemi.com/pub/Collateral/CAT811-D.PDF
$ENDCMP
#
$CMP CAT811STBI-GT3
D Power supply supervisor, Manual reset, Threshold 2.93V, SOT-143
K Supervisor Reset
F http://www.onsemi.com/pub/Collateral/CAT811-D.PDF
$ENDCMP
#
$CMP CAT811TTBI-GT3
D Power supply supervisor, Manual reset, Threshold 3.08V, SOT-143
K Supervisor Reset
F http://www.onsemi.com/pub/Collateral/CAT811-D.PDF
$ENDCMP
#
$CMP CAT811ZTBI-GT3
D Power supply supervisor, Manual reset, Threshold 2.32V, SOT-143
K Supervisor Reset
F http://www.onsemi.com/pub/Collateral/CAT811-D.PDF
$ENDCMP
#
$CMP Conn_02x02_Staggered_2xMountingPin
D Generic connectable mounting pin connector, double row, 02x02, counter clockwise pin numbering scheme (similar to DIP packge numbering), script generated (kicad-library-utils/schlib/autogen/connector/)
K connector
F ~
$ENDCMP
#
$CMP LM3880
D Simple Power Sequencer, SOT-23-6
K Power Sequencer
F http://www.ti.com/lit/ds/symlink/lm3880.pdf
$ENDCMP
#
$CMP LM809
D Microprocessor Reset (active-low) Circuit, SOT-23
K reset supervisor
F http://www.ti.com/lit/ds/symlink/lm809.pdf
$ENDCMP
#
$CMP LM810
D Microprocessor Reset (active-high) Circuit, SOT-23
K reset supervisor
F http://www.ti.com/lit/ds/symlink/lm809.pdf
$ENDCMP
#
$CMP MAX6355
D Dual Voltage μP Supervisory Circuits, SOT-23-6
K Power Supervisor
F https://datasheets.maximintegrated.com/en/ds/MAX6351-MAX6360.pdf
$ENDCMP
#
$CMP MAX6369
D Precision Pin-Selectable Watchdog Timer, 200us to 60s, SOT-23-8
K watchdog supervisor
F https://datasheets.maximintegrated.com/en/ds/MAX6369-MAX6374.pdf
$ENDCMP
#
$CMP MAX6370
D Precision Pin-Selectable Watchdog Timer, 200us to 60s, SOT-23-8
K watchdog supervisor
F https://datasheets.maximintegrated.com/en/ds/MAX6369-MAX6374.pdf
$ENDCMP
#
$CMP MAX6371
D Precision Pin-Selectable Watchdog Timer, 200us to 60s, SOT-23-8
K watchdog supervisor
F https://datasheets.maximintegrated.com/en/ds/MAX6369-MAX6374.pdf
$ENDCMP
#
$CMP MAX6372
D Precision Pin-Selectable Watchdog Timer, 200us to 60s, SOT-23-8
K watchdog supervisor
F https://datasheets.maximintegrated.com/en/ds/MAX6369-MAX6374.pdf
$ENDCMP
#
$CMP MAX6373
D Precision Pin-Selectable Watchdog Timer, 200us to 60s, SOT-23-8
K watchdog supervisor
F https://datasheets.maximintegrated.com/en/ds/MAX6369-MAX6374.pdf
$ENDCMP
#
$CMP MAX6374
D Precision Pin-Selectable Watchdog Timer, 200us to 60s, SOT-23-8
K watchdog supervisor
F https://datasheets.maximintegrated.com/en/ds/MAX6369-MAX6374.pdf
$ENDCMP
#
$CMP MAX691xPE
D Microprocessor Supervisory Circuit, DIP-16
K Power Supervisor
F https://datasheets.maximintegrated.com/en/ds/MAX690-MAX695.pdf
$ENDCMP
#
$CMP MAX691xWE
D Microprocessor Supervisory Circuit, SOIC-16
K Power Supervisor
F https://datasheets.maximintegrated.com/en/ds/MAX690-MAX695.pdf
$ENDCMP
#
$CMP MAX811LEUS-T
D Power supply supervisor, Manual reset, Threshold 4.63V, SOT-143
K Supervisor Reset
F https://datasheets.maximintegrated.com/en/ds/MAX811-MAX812.pdf
$ENDCMP
#
$CMP MAX811MEUS-T
D Power supply supervisor, Manual reset, Threshold 4.38V, SOT-143
K Supervisor Reset
F https://datasheets.maximintegrated.com/en/ds/MAX811-MAX812.pdf
$ENDCMP
#
$CMP MAX811REUS-T
D Power supply supervisor, Manual reset, Threshold 2.63V, SOT-143
K Supervisor Reset
F https://datasheets.maximintegrated.com/en/ds/MAX811-MAX812.pdf
$ENDCMP
#
$CMP MAX811SEUS-T
D Power supply supervisor, Manual reset, Threshold 2.93V, SOT-143
K Supervisor Reset
F https://datasheets.maximintegrated.com/en/ds/MAX811-MAX812.pdf
$ENDCMP
#
$CMP MAX811TEUS-T
D Power supply supervisor, Manual reset, Threshold 3.08V, SOT-143
K Supervisor Reset
F https://datasheets.maximintegrated.com/en/ds/MAX811-MAX812.pdf
$ENDCMP
#
$CMP MC34064D
D Undervoltage Sensing Circuit, SOIC-8
K Power Supervisor
F https://www.onsemi.com/pub/Collateral/MC34064-D.PDF
$ENDCMP
#
$CMP MC34064DM
D Undervoltage Sensing Circuit, MSOP-8
K Power Supervisor
F https://www.onsemi.com/pub/Collateral/MC34064-D.PDF
$ENDCMP
#
$CMP MC34064P
D Undervoltage Sensing Circuit, TO-92
K Power Supervisor
F https://www.onsemi.com/pub/Collateral/MC34064-D.PDF
$ENDCMP
#
$CMP MC34064SN
D Undervoltage Sensing Circuit, TSOP-5
K Power Supervisor
F https://www.onsemi.com/pub/Collateral/MC34064-D.PDF
$ENDCMP
#
$CMP MC74HC1G00
D Single 2-input NAND gate
K nand
F https://www.mouser.de/datasheet/2/308/1/MC74HC1G00_D-2315437.pdf
$ENDCMP
#
$CMP MC74HC1G32
D Single 2-input OR
K Or
F https://www.mouser.de/datasheet/2/308/1/MC74HC1G32_D-2315545.pdf
$ENDCMP
#
$CMP MCP100-270D
D Microcontroller reset monitor, 2.70V threshold, active low output
K supervisor reset push-pull
F http://ww1.microchip.com/downloads/en/DeviceDoc/11187f.pdf
$ENDCMP
#
$CMP MCP100-300D
D Microcontroller reset monitor, 3.00V threshold, active low output
K supervisor reset push-pull
F http://ww1.microchip.com/downloads/en/DeviceDoc/11187f.pdf
$ENDCMP
#
$CMP MCP100-315D
D Microcontroller reset monitor, 3.15V threshold, active low output
K supervisor reset push-pull
F http://ww1.microchip.com/downloads/en/DeviceDoc/11187f.pdf
$ENDCMP
#
$CMP MCP100-450D
D Microcontroller reset monitor, 4.50V threshold, active low output
K supervisor reset push-pull
F http://ww1.microchip.com/downloads/en/DeviceDoc/11187f.pdf
$ENDCMP
#
$CMP MCP100-460D
D Microcontroller reset monitor, 4.60V threshold, active low output
K supervisor reset push-pull
F http://ww1.microchip.com/downloads/en/DeviceDoc/11187f.pdf
$ENDCMP
#
$CMP MCP100-475D
D Microcontroller reset monitor, 4.75V threshold, active low output
K supervisor reset push-pull
F http://ww1.microchip.com/downloads/en/DeviceDoc/11187f.pdf
$ENDCMP
#
$CMP MCP100-485D
D Microcontroller reset monitor, 4.85V threshold, active low output
K supervisor reset push-pull
F http://ww1.microchip.com/downloads/en/DeviceDoc/11187f.pdf
$ENDCMP
#
$CMP MCP101-270D
D Microcontroller reset monitor, 2.70V threshold, active high output
K supervisor reset push-pull
F http://ww1.microchip.com/downloads/en/DeviceDoc/11187f.pdf
$ENDCMP
#
$CMP MCP101-300D
D Microcontroller reset monitor, 3.00V threshold, active high output
K supervisor reset push-pull
F http://ww1.microchip.com/downloads/en/DeviceDoc/11187f.pdf
$ENDCMP
#
$CMP MCP101-315D
D Microcontroller reset monitor, 3.15V threshold, active high output
K supervisor reset push-pull
F http://ww1.microchip.com/downloads/en/DeviceDoc/11187f.pdf
$ENDCMP
#
$CMP MCP101-450D
D Microcontroller reset monitor, 4.50V threshold, active high output
K supervisor reset push-pull
F http://ww1.microchip.com/downloads/en/DeviceDoc/11187f.pdf
$ENDCMP
#
$CMP MCP101-460D
D Microcontroller reset monitor, 4.60V threshold, active high output
K supervisor reset push-pull
F http://ww1.microchip.com/downloads/en/DeviceDoc/11187f.pdf
$ENDCMP
#
$CMP MCP101-475D
D Microcontroller reset monitor, 4.75V threshold, active high output
K supervisor reset push-pull
F http://ww1.microchip.com/downloads/en/DeviceDoc/11187f.pdf
$ENDCMP
#
$CMP MCP101-485D
D Microcontroller reset monitor, 4.85V threshold, active high output
K supervisor reset push-pull
F http://ww1.microchip.com/downloads/en/DeviceDoc/11187f.pdf
$ENDCMP
#
$CMP MCP120-xxxDxTO
D Microcontroller supervisory circuit, TO-92
K supervisory circuit
F http://ww1.microchip.com/downloads/en/DeviceDoc/11184d.pdf
$ENDCMP
#
$CMP MCP120-xxxGxTO
D Microcontroller supervisory circuit, TO-92
K supervisory circuit
F http://ww1.microchip.com/downloads/en/DeviceDoc/11184d.pdf
$ENDCMP
#
$CMP MCP120-xxxHxTO
D Microcontroller supervisory circuit, TO-92
K supervisory circuit
F http://ww1.microchip.com/downloads/en/DeviceDoc/11184d.pdf
$ENDCMP
#
$CMP MCP120-xxxxSN
D Microcontroller supervisory circuit, SOIC-8
K supervisory circuit
F http://ww1.microchip.com/downloads/en/DeviceDoc/11184d.pdf
$ENDCMP
#
$CMP MCP120-xxxxTT
D Microcontroller supervisory circuit, SOT-23
K supervisory circuit
F http://ww1.microchip.com/downloads/en/DeviceDoc/11184d.pdf
$ENDCMP
#
$CMP MCP130-xxxDxTO
D Microcontroller supervisory circuit with internal 5 kΩ pull-up, TO-92
K supervisory circuit pull-up
F http://ww1.microchip.com/downloads/en/DeviceDoc/11184d.pdf
$ENDCMP
#
$CMP MCP130-xxxFxTO
D Microcontroller supervisory circuit with internal 5 kΩ pull-up, TO-92
K supervisory circuit pull-up
F http://ww1.microchip.com/downloads/en/DeviceDoc/11184d.pdf
$ENDCMP
#
$CMP MCP130-xxxHxTO
D Microcontroller supervisory circuit with internal 5 kΩ pull-up, TO-92
K supervisory circuit pull-up
F http://ww1.microchip.com/downloads/en/DeviceDoc/11184d.pdf
$ENDCMP
#
$CMP MCP130-xxxxSN
D Microcontroller supervisory circuit with internal 5 kΩ pull-up, SOIC-8
K supervisory circuit pull-up
F http://ww1.microchip.com/downloads/en/DeviceDoc/11184d.pdf
$ENDCMP
#
$CMP MCP130-xxxxTT
D Microcontroller supervisory circuit with internal 5 kΩ pull-up, SOT-23
K supervisory circuit pull-up
F http://ww1.microchip.com/downloads/en/DeviceDoc/11184d.pdf
$ENDCMP
#
$CMP MCP39F521
D Power Monitor, Calculation and Energy Accumulation, I2C, 16-bit, QFN-28
K i2c power monitor
F http://ww1.microchip.com/downloads/en/DeviceDoc/20005442A.pdf
$ENDCMP
#
$CMP MIC811JUY
D Power supply supervisor, Manual reset, Threshold 4.00V, SOT-143
K Supervisor Reset
F http://ww1.microchip.com/downloads/en/DeviceDoc/mic811.pdf
$ENDCMP
#
$CMP MIC811LUY
D Power supply supervisor, Manual reset, Threshold 4.63V, SOT-143
K Supervisor Reset
F http://ww1.microchip.com/downloads/en/DeviceDoc/mic811.pdf
$ENDCMP
#
$CMP MIC811MUY
D Power supply supervisor, Manual reset, Threshold 4.38V, SOT-143
K Supervisor Reset
F http://ww1.microchip.com/downloads/en/DeviceDoc/mic811.pdf
$ENDCMP
#
$CMP MIC811RUY
D Power supply supervisor, Manual reset, Threshold 2.63V, SOT-143
K Supervisor Reset
F http://ww1.microchip.com/downloads/en/DeviceDoc/mic811.pdf
$ENDCMP
#
$CMP MIC811SUY
D Power supply supervisor, Manual reset, Threshold 2.93V, SOT-143
K Supervisor Reset
F http://ww1.microchip.com/downloads/en/DeviceDoc/mic811.pdf
$ENDCMP
#
$CMP MIC811TUY
D Power supply supervisor, Manual reset, Threshold 3.08V, SOT-143
K Supervisor Reset
F http://ww1.microchip.com/downloads/en/DeviceDoc/mic811.pdf
$ENDCMP
#
$CMP TCM809
D Microcontroller reset monitor, active low output
K supervisor reset push-pull
F http://ww1.microchip.com/downloads/en/DeviceDoc/21661E.pdf
$ENDCMP
#
$CMP TCM810
D Microcontroller reset monitor, active high output
K supervisor reset push-pull
F http://ww1.microchip.com/downloads/en/DeviceDoc/21661E.pdf
$ENDCMP
#
$CMP TL7702A
D Supply-Voltage Supervisors, 2.53V, PDIP-8/SOIC-8
K voltage supervisor
F http://www.ti.com.cn/cn/lit/ds/symlink/tl7705a.pdf
$ENDCMP
#
$CMP TL7702B
D Supply-Voltage Supervisors, 2.53V, PDIP-8/SOIC-8
K voltage supervisor
F http://www.ti.com.cn/cn/lit/ds/symlink/tl7705b.pdf
$ENDCMP
#
$CMP TL7705A
D Supply-Voltage Supervisors, 4.55V, PDIP-8/SOIC-8
K voltage supervisor
F http://www.ti.com.cn/cn/lit/ds/symlink/tl7705a.pdf
$ENDCMP
#
$CMP TL7705ACPSR
D Supply-Voltage Supervisors, 4.55V, SO-8
K voltage supervisor
F http://www.ti.com.cn/cn/lit/ds/symlink/tl7705a.pdf
$ENDCMP
#
$CMP TL7705B
D Supply-Voltage Supervisors, 4.55V, PDIP-8/SOIC-8
K voltage supervisor
F http://www.ti.com.cn/cn/lit/ds/symlink/tl7705b.pdf
$ENDCMP
#
$CMP TL7709A
D Supply-Voltage Supervisors, 7.6V, PDIP-8/SOIC-8
K voltage supervisor
F http://www.ti.com.cn/cn/lit/ds/symlink/tl7705a.pdf
$ENDCMP
#
$CMP TL7712A
D Supply-Voltage Supervisors, 10.8V, PDIP-8/SOIC-8
K voltage supervisor
F http://www.ti.com.cn/cn/lit/ds/symlink/tl7705a.pdf
$ENDCMP
#
$CMP TL7715A
D Supply-Voltage Supervisors, 13.5V, PDIP-8/SOIC-8
K voltage supervisor
F http://www.ti.com.cn/cn/lit/ds/symlink/tl7705a.pdf
$ENDCMP
#
$CMP TL7733B
D Supply-Voltage Supervisors, 3.08V, PDIP-8/SOIC-8
K voltage supervisor
F http://www.ti.com.cn/cn/lit/ds/symlink/tl7705b.pdf
$ENDCMP
#
$CMP TPS3702
D High-Accuracy, Overvoltage and Undervoltage Monitor, SOT-23-6
K protection overvoltage unvervoltage monitor
F http://www.ti.com/lit/ds/symlink/tps3702.pdf
$ENDCMP
#
$CMP TPS3808DBV
D Low-Quiescent-Current, Programmable-Delay Supervisory Circuit, SOT-23-6
K supply voltage supervisor
F http://www.ti.com/lit/ds/symlink/tps3808.pdf
$ENDCMP
#
$CMP TPS3831
D 150-nA, Ultralow Power, Supply Voltage Monitor, X2SON-4
K supply voltage supervisor
F http://www.ti.com/lit/ds/sbvs193d/sbvs193d.pdf
$ENDCMP
#
$CMP TPS3839DBZ
D 150-nA, Ultralow Power, Supply Voltage Monitor, SOT-23
K supply voltage supervisor
F http://www.ti.com/lit/ds/sbvs193d/sbvs193d.pdf
$ENDCMP
#
$CMP TPS3839DQN
D 150-nA, Ultralow Power, Supply Voltage Monitor, X2SON-4
K supply voltage supervisor
F http://www.ti.com/lit/ds/sbvs193d/sbvs193d.pdf
$ENDCMP
#
#End Doc Library

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EESchema-LIBRARY Version 2.4
#encoding utf-8
#
# 74LV08D
#
DEF 74LV08D U 0 40 Y Y 5 L N
F0 "U" 150 250 50 H V C CNN
F1 "74LV08D" 300 150 50 H V C CNN
F2 "" 0 0 50 H I C CNN
F3 "" 0 0 50 H I C CNN
ALIAS 74LS09
$FPLIST
DIP*W7.62mm*
$ENDFPLIST
DRAW
A 0 0 150 -899 899 1 1 10 f 0 -150 0 150
A 0 0 150 -899 899 2 1 10 f 0 -150 0 150
A 0 0 150 -899 899 3 1 10 f 0 -150 0 150
A 0 0 150 -899 899 4 1 10 f 0 -150 0 150
A -360 0 258 354 -354 1 2 10 N -150 150 -150 -150
A -47 -52 204 150 837 1 2 10 f 150 0 -24 150
A -47 52 204 -150 -837 1 2 10 f 150 0 -24 -150
A -360 0 258 354 -354 2 2 10 N -150 150 -150 -150
A -47 -52 204 150 837 2 2 10 f 150 0 -24 150
A -47 52 204 -150 -837 2 2 10 f 150 0 -24 -150
A -360 0 258 354 -354 3 2 10 N -150 150 -150 -150
A -47 -52 204 150 837 3 2 10 f 150 0 -24 150
A -47 52 204 -150 -837 3 2 10 f 150 0 -24 -150
A -360 0 258 354 -354 4 2 10 N -150 150 -150 -150
A -47 -52 204 150 837 4 2 10 f 150 0 -24 150
A -47 52 204 -150 -837 4 2 10 f 150 0 -24 -150
S -200 300 200 -300 5 1 10 f
P 4 1 1 10 0 150 -150 150 -150 -150 0 -150 f
P 4 2 1 10 0 150 -150 150 -150 -150 0 -150 f
P 4 3 1 10 0 150 -150 150 -150 -150 0 -150 f
P 4 4 1 10 0 150 -150 150 -150 -150 0 -150 f
P 2 1 2 10 -150 -150 -25 -150 f
P 2 1 2 10 -150 150 -25 150 f
P 12 1 2 -1000 -25 150 -150 150 -150 150 -140 134 -119 89 -106 41 -103 -10 -109 -59 -125 -107 -150 -150 -150 -150 -25 -150 f
P 2 2 2 10 -150 -150 -25 -150 f
P 2 2 2 10 -150 150 -25 150 f
P 12 2 2 -1000 -25 150 -150 150 -150 150 -140 134 -119 89 -106 41 -103 -10 -109 -59 -125 -107 -150 -150 -150 -150 -25 -150 f
P 2 3 2 10 -150 -150 -25 -150 f
P 2 3 2 10 -150 150 -25 150 f
P 12 3 2 -1000 -25 150 -150 150 -150 150 -140 134 -119 89 -106 41 -103 -10 -109 -59 -125 -107 -150 -150 -150 -150 -25 -150 f
P 2 4 2 10 -150 -150 -25 -150 f
P 2 4 2 10 -150 150 -25 150 f
P 12 4 2 -1000 -25 150 -150 150 -150 150 -140 134 -119 89 -106 41 -103 -10 -109 -59 -125 -107 -150 -150 -150 -150 -25 -150 f
X VCC 14 0 500 200 D 50 50 5 0 W
X GND 7 0 -500 200 U 50 50 5 0 W
X ~ 1 -300 100 150 R 50 50 1 1 I
X ~ 2 -300 -100 150 R 50 50 1 1 I
X ~ 3 300 0 150 L 50 50 1 1 O
X ~ 4 -300 100 150 R 50 50 2 1 I
X ~ 5 -300 -100 150 R 50 50 2 1 I
X ~ 6 300 0 150 L 50 50 2 1 O
X ~ 10 -300 -100 150 R 50 50 3 1 I
X ~ 8 300 0 150 L 50 50 3 1 O
X ~ 9 -300 100 150 R 50 50 3 1 I
X ~ 11 300 0 150 L 50 50 4 1 O
X ~ 12 -300 100 150 R 50 50 4 1 I
X ~ 13 -300 -100 150 R 50 50 4 1 I
X ~ 1 -300 100 170 R 50 50 1 2 I I
X ~ 2 -300 -100 170 R 50 50 1 2 I I
X ~ 3 300 0 150 L 50 50 1 2 O I
X ~ 4 -300 100 170 R 50 50 2 2 I I
X ~ 5 -300 -100 170 R 50 50 2 2 I I
X ~ 6 300 0 150 L 50 50 2 2 O I
X ~ 10 -300 -100 170 R 50 50 3 2 I I
X ~ 8 300 0 150 L 50 50 3 2 O I
X ~ 9 -300 100 170 R 50 50 3 2 I I
X ~ 11 300 0 150 L 50 50 4 2 O I
X ~ 12 -300 100 170 R 50 50 4 2 I I
X ~ 13 -300 -100 170 R 50 50 4 2 I I
ENDDRAW
ENDDEF
#
# AZ1117-3Pin
#
DEF AZ1117-3Pin U 0 10 Y Y 1 F N
F0 "U" -150 175 50 H V C CNN
F1 "AZ1117-3Pin" -50 175 50 H V L CNN
F2 "" 0 250 50 H I C CIN
F3 "" 0 0 50 H I C CNN
$FPLIST
SOT?223*
SOT?89*
TO?220*
TO?252*
TO?263*
$ENDFPLIST
DRAW
S -200 100 200 -200 0 1 10 f
X GND 1 0 -300 100 U 50 50 1 1 W
X VOUT 2 300 0 100 L 50 50 1 1 w
X VIN 3 -300 0 100 R 50 50 1 1 W
ENDDRAW
ENDDEF
#
# AZ1117-4Pin
#
DEF AZ1117-4Pin U 0 10 Y Y 1 F N
F0 "U" -150 175 50 H V C CNN
F1 "AZ1117-4Pin" 100 175 50 H V L CNN
F2 "" 0 250 50 H I C CIN
F3 "" 0 0 50 H I C CNN
ALIAS AZ1117-1.5 AZ1117-1.8 AZ1117-2.5 AZ1117-2.85 AZ1117-3.3 AZ1117-5.0
$FPLIST
SOT?223*
SOT?89*
TO?220*
TO?252*
TO?263*
$ENDFPLIST
DRAW
S -200 100 200 -200 0 1 10 f
X GND 1 50 -300 100 U 50 50 1 1 W
X OUT 2 300 0 100 L 50 50 1 1 w
X IN 3 -300 0 100 R 50 50 1 1 W
X VOUT 4 -50 200 100 D 50 50 1 1 w
ENDDRAW
ENDDEF
#
# Binder-M12-12P
#
DEF Binder-M12-12P J 0 40 Y Y 1 F N
F0 "J" -275 -225 50 H V C CNN
F1 "Binder-M12-12P" 180 270 50 H V L CNN
F2 "" 0 -150 50 H I C CNN
F3 "" 0 -150 50 H I C CNN
$FPLIST
DIN*
$ENDFPLIST
DRAW
C -150 80 20 0 1 0 N
C -40 -60 20 0 1 0 N
C 0 -150 20 0 1 0 N
C 0 0 250 0 1 0 f
C 0 30 20 0 1 0 N
C 40 -60 20 0 1 0 N
C 150 80 20 0 1 0 N
C -150 -80 20 1 1 0 N
C -150 0 20 1 1 0 N
C -80 150 20 1 1 0 N
C 80 150 20 1 1 0 N
C 150 -80 20 1 1 0 N
C 150 0 20 1 1 0 N
P 2 0 1 0 -350 -100 -250 -100 N
P 2 0 1 0 -350 100 -250 100 N
P 2 0 1 0 -100 -200 -100 -350 N
P 2 0 1 0 -100 250 -100 300 N
P 2 0 1 0 -49 -77 -100 -200 N
P 2 0 1 0 0 -170 0 -350 N
P 2 0 1 0 0 100 0 50 N
P 2 0 1 0 0 100 0 300 N
P 2 0 1 0 48 -78 100 -200 N
P 2 0 1 0 100 -200 100 -350 N
P 2 0 1 0 100 250 100 300 N
P 2 0 1 0 250 -100 300 -100 N
P 2 0 1 0 250 100 300 100 N
P 3 0 1 0 -250 100 -220 100 -170 90 N
P 3 0 1 0 250 100 220 100 170 90 N
P 2 1 1 0 -170 0 -350 0 N
P 2 1 1 0 170 0 350 0 N
P 3 1 1 0 -250 -100 -220 -100 -170 -90 N
P 3 1 1 0 -100 250 -100 220 -90 170 N
P 3 1 1 0 100 250 100 220 90 170 N
P 3 1 1 0 250 -100 220 -100 170 -90 N
X ~ 1 -100 400 100 D 50 50 1 1 P
X ~ 10 0 400 100 D 50 50 1 1 P
X ~ 11 100 -450 100 U 50 50 1 1 P
X ~ 12 -100 -450 100 U 50 50 1 1 P
X ~ 2 100 400 100 D 50 50 1 1 P
X ~ 3 400 100 100 L 50 50 1 1 P
X ~ 4 400 0 100 L 50 50 1 1 P
X ~ 5 400 -100 100 L 50 50 1 1 P
X ~ 6 0 -450 100 U 50 50 1 1 P
X ~ 7 -450 -100 100 R 50 50 1 1 P
X ~ 8 -450 0 100 R 50 50 1 1 P
X ~ 9 -450 100 100 R 50 50 1 1 P
X ~ M1 250 -350 100 U 50 50 1 1 P X
X ~ M2 -250 350 100 D 50 50 1 1 P X
ENDDRAW
ENDDEF
#
# Conn_02x02_Staggered_2xMountingPin
#
DEF Conn_02x02_Staggered_2xMountingPin J 0 40 Y N 1 F N
F0 "J" 0 150 50 H V C CNN
F1 "Conn_02x02_Staggered_2xMountingPin" -750 250 50 H V L CNN
F2 "" -50 50 50 H I C CNN
F3 "" -50 50 50 H I C CNN
$FPLIST
Connector*:*_2x??-1MP*
$ENDFPLIST
DRAW
C 0 0 112 0 1 0 f
C 50 -50 12 0 1 0 N
C -50 -50 12 1 1 0 N
C -50 50 12 1 1 0 N
C 50 50 12 1 1 0 N
T 0 0 -115 15 0 1 1 Mounting Normal 0 C C
P 2 1 1 6 -90 -130 -10 -130 N
P 2 1 1 6 10 -130 90 -130 N
X Pin_1 1 250 -50 150 L 50 50 1 1 P
X Pin_2 2 250 50 150 L 50 50 1 1 P
X Pin_3 3 -250 -50 150 R 50 50 1 1 P
X Pin_4 4 -250 50 150 R 50 50 1 1 P
X MountPin1 MP1 -50 -300 165 U 50 50 1 1 P
X MountPin2 MP2 50 -300 165 U 50 50 1 1 P
ENDDRAW
ENDDEF
#
# LM3880
#
DEF LM3880 U 0 20 Y Y 1 F N
F0 "U" 50 350 50 H V C CNN
F1 "LM3880" 150 250 50 H V C CNN
F2 "Package_TO_SOT_SMD:SOT-23-6" 650 -250 50 H I C CNN
F3 "" 0 0 50 H I C CNN
$FPLIST
SOT?23*
$ENDFPLIST
DRAW
S -300 200 300 -200 0 1 10 f
X VCC 1 0 300 100 D 50 50 1 1 W
X GND 2 0 -300 100 U 50 50 1 1 W
X EN 3 -400 0 100 R 50 50 1 1 I
X FLAG3 4 400 -100 100 L 50 50 1 1 C
X FLAG2 5 400 0 100 L 50 50 1 1 C
X FLAG1 6 400 100 100 L 50 50 1 1 C
ENDDRAW
ENDDEF
#
# LM809
#
DEF LM809 U 0 20 Y Y 1 F N
F0 "U" 100 500 50 H V C CNN
F1 "LM809" 200 400 50 H V C CNN
F2 "Package_TO_SOT_SMD:SOT-23" 300 100 50 H I C CNN
F3 "" 300 100 50 H I C CNN
$FPLIST
SOT?23*
$ENDFPLIST
DRAW
S 200 300 -200 -300 0 1 10 f
X GND 1 0 -400 100 U 50 50 1 1 W
X ~RESET 2 300 0 100 L 50 50 1 1 O
X VCC 3 0 400 100 D 50 50 1 1 W
ENDDRAW
ENDDEF
#
# LM810
#
DEF LM810 U 0 20 Y Y 1 F N
F0 "U" 100 500 50 H V C CNN
F1 "LM810" 200 400 50 H V C CNN
F2 "Package_TO_SOT_SMD:SOT-23" 300 100 50 H I C CNN
F3 "" 300 100 50 H I C CNN
$FPLIST
SOT?23*
$ENDFPLIST
DRAW
S 200 300 -200 -300 0 1 10 f
X GND 1 0 -400 100 U 50 50 1 1 W
X RESET 2 300 0 100 L 50 50 1 1 O
X VCC 3 0 400 100 D 50 50 1 1 W
ENDDRAW
ENDDEF
#
# MAX6355
#
DEF MAX6355 U 0 20 Y Y 1 F N
F0 "U" -550 350 50 H V C CNN
F1 "MAX6355" 450 350 50 H V C CNN
F2 "Package_TO_SOT_SMD:SOT-23-6" 0 -550 50 H I C CNN
F3 "" 0 0 50 H I C CNN
$FPLIST
SOT?23*
$ENDFPLIST
DRAW
S -600 300 600 -300 0 1 10 f
X ~RST 1 700 0 100 L 50 50 1 1 C
X GND 2 0 -400 100 U 50 50 1 1 W
X ~MR 3 -700 -200 100 R 50 50 1 1 I
X VCC2 4 700 200 100 L 50 50 1 1 W
X RSTIN 5 -700 0 100 R 50 50 1 1 I
X VCC1 6 -700 200 100 R 50 50 1 1 W
ENDDRAW
ENDDEF
#
# MAX6369
#
DEF MAX6369 U 0 20 Y Y 1 F N
F0 "U" -140 530 50 H V C CNN
F1 "MAX6369" -260 450 50 H V C CNN
F2 "Package_TO_SOT_SMD:SOT-23-8" 650 -450 50 H I C CNN
F3 "" 150 500 50 H I C CNN
ALIAS MAX6371 MAX6373
$FPLIST
SOT?23*
$ENDFPLIST
DRAW
S -300 400 300 -400 0 1 10 f
X WDI 1 -400 200 100 R 50 50 1 1 I
X GND 2 0 -500 100 U 50 50 1 1 W
X NC 3 300 -200 100 L 50 50 1 1 N N
X SET0 4 -400 0 100 R 50 50 1 1 I
X SET1 5 -400 -100 100 R 50 50 1 1 I
X SET2 6 -400 -200 100 R 50 50 1 1 I
X ~WDO 7 400 200 100 L 50 50 1 1 C
X VCC 8 0 500 100 D 50 50 1 1 W
ENDDRAW
ENDDEF
#
# MAX6370
#
DEF MAX6370 U 0 20 Y Y 1 F N
F0 "U" -140 530 50 H V C CNN
F1 "MAX6370" -260 450 50 H V C CNN
F2 "Package_TO_SOT_SMD:SOT-23-8" 650 -450 50 H I C CNN
F3 "" 150 500 50 H I C CNN
ALIAS MAX6372 MAX6374
$FPLIST
SOT?23*
$ENDFPLIST
DRAW
S -300 400 300 -400 0 1 10 f
X WDI 1 -400 200 100 R 50 50 1 1 I
X GND 2 0 -500 100 U 50 50 1 1 W
X NC 3 300 -200 100 L 50 50 1 1 N N
X SET0 4 -400 0 100 R 50 50 1 1 I
X SET1 5 -400 -100 100 R 50 50 1 1 I
X SET2 6 -400 -200 100 R 50 50 1 1 I
X ~WDO 7 400 200 100 L 50 50 1 1 O
X VCC 8 0 500 100 D 50 50 1 1 W
ENDDRAW
ENDDEF
#
# MAX691xPE
#
DEF MAX691xPE U 0 20 Y Y 1 F N
F0 "U" -600 550 50 H V C CNN
F1 "MAX691xPE" 150 550 50 H V L CNN
F2 "Package_DIP:DIP-16_W7.62mm" 0 -850 50 H I C CNN
F3 "" 0 0 50 H I C CNN
$FPLIST
DIP*W7.62mm*
$ENDFPLIST
DRAW
S 650 500 -650 -600 0 1 10 f
X VBATT 1 -750 -250 100 R 50 50 1 1 W
X ~PFO 10 750 100 100 L 50 50 1 1 O
X WDI 11 -750 -100 100 R 50 50 1 1 I
X ~CE_OUT 12 750 -400 100 L 50 50 1 1 O
X ~CE_IN 13 -750 -400 100 R 50 50 1 1 I
X ~WDO 14 750 -100 100 L 50 50 1 1 O
X ~RESET 15 750 300 100 L 50 50 1 1 O
X RESET 16 750 200 100 L 50 50 1 1 O
X VOUT 2 750 -300 100 L 50 50 1 1 w
X VCC 3 0 600 100 D 50 50 1 1 W
X GND 4 0 -700 100 U 50 50 1 1 W
X BATT_ON 5 750 -200 100 L 50 50 1 1 O
X ~LOW_LINE 6 750 0 100 L 50 50 1 1 O
X OSC_IN 7 -750 150 100 R 50 50 1 1 I
X OSC_SEL 8 -750 50 100 R 50 50 1 1 I
X PFI 9 -750 250 100 R 50 50 1 1 I
ENDDRAW
ENDDEF
#
# MAX691xWE
#
DEF MAX691xWE U 0 20 Y Y 1 F N
F0 "U" -600 550 50 H V C CNN
F1 "MAX691xWE" 200 550 50 H V L CNN
F2 "Package_SO:SOIC-16W_7.5x10.3mm_P1.27mm" 0 -850 50 H I C CNN
F3 "" 0 0 50 H I C CNN
$FPLIST
SOIC*7.5x10.3mm*P1.27mm*
$ENDFPLIST
DRAW
S 650 500 -650 -600 0 1 10 f
X VBATT 1 -750 -250 100 R 50 50 1 1 W
X ~PFO 10 750 100 100 L 50 50 1 1 O
X WDI 11 -750 -100 100 R 50 50 1 1 I
X ~CE_OUT 12 750 -400 100 L 50 50 1 1 O
X ~CE_IN 13 -750 -400 100 R 50 50 1 1 I
X ~WDO 14 750 -100 100 L 50 50 1 1 O
X ~RESET 15 750 300 100 L 50 50 1 1 O
X RESET 16 750 200 100 L 50 50 1 1 O
X VOUT 2 750 -300 100 L 50 50 1 1 w
X VCC 3 0 600 100 D 50 50 1 1 W
X GND 4 0 -700 100 U 50 50 1 1 W
X BATT_ON 5 750 -200 100 L 50 50 1 1 O
X ~LOW_LINE 6 750 0 100 L 50 50 1 1 O
X OSC_IN 7 -750 150 100 R 50 50 1 1 I
X OSC_SEL 8 -750 50 100 R 50 50 1 1 I
X PFI 9 -750 250 100 R 50 50 1 1 I
ENDDRAW
ENDDEF
#
# MC34064D
#
DEF MC34064D U 0 20 Y Y 1 F N
F0 "U" -150 200 50 H V C CNN
F1 "MC34064D" 200 200 50 H V C CNN
F2 "Package_SO:SOIC-8_3.9x4.9mm_P1.27mm" 0 -450 50 H I C CNN
F3 "" 0 0 50 H I C CNN
$FPLIST
SOIC*3.9x4.9mm*P1.27mm*
$ENDFPLIST
DRAW
S -250 -150 250 150 0 1 10 f
X ~RESET 1 350 50 100 L 50 50 1 1 C
X IN 2 -350 50 100 R 50 50 1 1 I
X NC 3 250 -100 100 L 50 50 1 1 N N
X GND 4 0 -250 100 U 50 50 1 1 W
X NC 5 0 150 100 D 50 50 1 1 N N
X NC 6 100 150 100 D 50 50 1 1 N N
X NC 7 -250 -100 100 R 50 50 1 1 N N
X NC 8 -100 150 100 D 50 50 1 1 N N
ENDDRAW
ENDDEF
#
# MC34064DM
#
DEF MC34064DM U 0 20 Y Y 1 F N
F0 "U" -150 200 50 H V C CNN
F1 "MC34064DM" 200 200 50 H V C CNN
F2 "Package_SO:MSOP-8_3x3mm_P0.65mm" 0 -450 50 H I C CNN
F3 "" 0 0 50 H I C CNN
$FPLIST
MSOP*3x3mm*P0.65mm*
$ENDFPLIST
DRAW
S -250 -150 250 150 0 1 10 f
X ~RESET 1 350 50 100 L 50 50 1 1 C
X IN 2 -350 50 100 R 50 50 1 1 I
X NC 3 250 -100 100 L 50 50 1 1 N N
X GND 4 0 -250 100 U 50 50 1 1 W
X NC 5 0 150 100 D 50 50 1 1 N N
X NC 6 100 150 100 D 50 50 1 1 N N
X NC 7 -250 -100 100 R 50 50 1 1 N N
X NC 8 -100 150 100 D 50 50 1 1 N N
ENDDRAW
ENDDEF
#
# MC34064P
#
DEF MC34064P U 0 20 Y Y 1 F N
F0 "U" -200 200 50 H V C CNN
F1 "MC34064P" 200 200 50 H V C CNN
F2 "Package_TO_SOT_THT:TO-92L_Inline" 0 -500 50 H I C CNN
F3 "" 0 0 50 H I C CNN
$FPLIST
TO?92L?Inline*
$ENDFPLIST
DRAW
S -250 -200 250 150 0 1 10 f
X ~RESET 1 350 50 100 L 50 50 1 1 C
X IN 2 -350 50 100 R 50 50 1 1 I
X GND 3 0 -300 100 U 50 50 1 1 I
ENDDRAW
ENDDEF
#
# MC34064SN
#
DEF MC34064SN U 0 20 Y Y 1 F N
F0 "U" -200 200 50 H V C CNN
F1 "MC34064SN" 250 200 50 H V C CNN
F2 "Package_SO:TSOP-5_1.65x3.05mm_P0.95mm" 0 -450 50 H I C CNN
F3 "" 0 0 50 H I C CNN
$FPLIST
TSOP*1.65x3.05mm*P0.95mm*
$ENDFPLIST
DRAW
S -250 -150 250 150 0 1 10 f
X GND 1 0 -250 100 U 50 50 1 1 W
X IN 2 -350 50 100 R 50 50 1 1 I
X ~RESET 3 350 50 100 L 50 50 1 1 C
X NC 4 -100 150 100 D 50 50 1 1 N N
X NC 5 100 150 100 D 50 50 1 1 N N
ENDDRAW
ENDDEF
#
# MC74HC1G00
#
DEF MC74HC1G00 U 0 40 Y Y 1 F N
F0 "U" 50 300 50 H V C CNN
F1 "MC74HC1G00" 300 200 50 H V C CNN
F2 "" 0 0 50 H I C CNN
F3 "" 0 0 50 H I C CNN
ALIAS 74LS37 7400 74HCT00 74HC00
$FPLIST
DIP*W7.62mm*
SO14*
$ENDFPLIST
DRAW
A 0 0 150 -899 899 1 1 10 f 0 -150 0 150
A -360 0 258 354 -354 1 2 10 N -150 150 -150 -150
A -47 -52 204 150 837 1 2 10 f 150 0 -24 150
A -47 52 204 -150 -837 1 2 10 f 150 0 -24 -150
P 4 1 1 10 0 150 -150 150 -150 -150 0 -150 f
P 2 1 2 10 -150 -150 -25 -150 f
P 2 1 2 10 -150 150 -25 150 f
P 12 1 2 -1000 -25 150 -150 150 -150 150 -140 134 -119 89 -106 41 -103 -10 -109 -59 -125 -107 -150 -150 -150 -150 -25 -150 f
X ~ 1 -300 100 150 R 50 50 1 1 I
X ~ 2 -300 -100 150 R 50 50 1 1 I
X GND 3 -50 -250 100 U 50 39 1 1 W
X ~ 4 300 0 150 L 50 50 1 1 O I
X VCC 5 0 250 100 D 50 39 1 1 W
X ~ 1 -300 100 170 R 50 50 1 2 I I
X ~ 2 -300 -100 170 R 50 50 1 2 I I
X ~ 3 300 0 150 L 50 50 1 2 O
ENDDRAW
ENDDEF
#
# MC74HC1G32
#
DEF MC74HC1G32 U 0 40 Y Y 1 F N
F0 "U" 150 250 50 H V C CNN
F1 "MC74HC1G32" 350 150 50 H V C CNN
F2 "" 0 0 50 H I C CNN
F3 "" 0 0 50 H I C CNN
$FPLIST
DIP?14*
$ENDFPLIST
DRAW
A -360 0 258 354 -354 1 1 10 N -150 150 -150 -150
A -47 -52 204 150 837 1 1 10 f 150 0 -24 150
A -47 52 204 -150 -837 1 1 10 f 150 0 -24 -150
A 0 0 150 -899 899 1 2 10 f 0 -150 0 150
P 2 1 1 10 -150 -150 -25 -150 f
P 2 1 1 10 -150 150 -25 150 f
P 12 1 1 -1000 -25 150 -150 150 -150 150 -140 134 -119 89 -106 41 -103 -10 -109 -59 -125 -107 -150 -150 -150 -150 -25 -150 f
P 4 1 2 10 0 150 -150 150 -150 -150 0 -150 f
X ~ 1 -300 100 170 R 50 50 1 1 I
X ~ 2 -300 -100 170 R 50 50 1 1 I
X GND 3 -50 -250 100 U 50 39 1 1 W
X ~ 4 300 0 150 L 50 50 1 1 O
X VCC 5 0 250 100 D 50 39 1 1 W
X ~ 1 -300 100 150 R 50 50 1 2 I I
X ~ 2 -300 -100 150 R 50 50 1 2 I I
X ~ 3 300 0 150 L 50 50 1 2 O I
ENDDRAW
ENDDEF
#
# MCP100-270D
#
DEF MCP100-270D U 0 40 Y Y 1 F N
F0 "U" 0 350 50 H V L CNN
F1 "MCP100-270D" -50 -350 50 H V L CNN
F2 "" -400 150 50 H I C CNN
F3 "" -300 250 50 H I C CNN
ALIAS MCP100-300D MCP100-315D MCP100-450D MCP100-460D MCP100-475D MCP100-485D
$FPLIST
SOT?23*
TO?92*
$ENDFPLIST
DRAW
S -200 300 200 -300 1 1 10 f
X ~RST 1 300 0 100 L 50 50 1 1 O
X VDD 2 -100 400 100 D 50 50 1 1 W
X VSS 3 -100 -400 100 U 50 50 1 1 W
ENDDRAW
ENDDEF
#
# MCP101-270D
#
DEF MCP101-270D U 0 40 Y Y 1 F N
F0 "U" 0 350 50 H V L CNN
F1 "MCP101-270D" -50 -350 50 H V L CNN
F2 "" -400 150 50 H I C CNN
F3 "" -300 250 50 H I C CNN
ALIAS MCP101-300D MCP101-315D MCP101-450D MCP101-460D MCP101-475D MCP101-485D
$FPLIST
SOT?23*
TO?92*
$ENDFPLIST
DRAW
S -200 300 200 -300 1 1 10 f
X RST 1 300 0 100 L 50 50 1 1 O
X VDD 2 -100 400 100 D 50 50 1 1 W
X VSS 3 -100 -400 100 U 50 50 1 1 W
ENDDRAW
ENDDEF
#
# MCP120-xxxDxTO
#
DEF MCP120-xxxDxTO U 0 20 Y Y 1 F N
F0 "U" -200 350 50 H V C CNN
F1 "MCP120-xxxDxTO" 350 350 50 H V C CNN
F2 "Package_TO_SOT_THT:TO-92_Inline" 650 -350 50 H I C CNN
F3 "" 0 0 50 H I C CNN
ALIAS MCP130-xxxDxTO
$FPLIST
TO*92*Inline*
$ENDFPLIST
DRAW
S 200 300 -200 -300 0 1 10 f
X VDD 2 0 400 100 D 50 50 0 1 W
X ~RST 1 300 0 100 L 50 50 1 1 C
X VSS 3 0 -400 100 U 50 50 1 1 W
ENDDRAW
ENDDEF
#
# MCP120-xxxGxTO
#
DEF MCP120-xxxGxTO U 0 20 Y Y 1 F N
F0 "U" -200 350 50 H V C CNN
F1 "MCP120-xxxGxTO" 350 350 50 H V C CNN
F2 "Package_TO_SOT_THT:TO-92_Inline" 650 -350 50 H I C CNN
F3 "" 0 0 50 H I C CNN
$FPLIST
TO*92*Inline*
$ENDFPLIST
DRAW
S 200 300 -200 -300 0 1 10 f
X VDD 1 0 400 100 D 50 50 1 1 W
X VSS 2 0 -400 100 U 50 50 1 1 W
X ~RST 3 300 0 100 L 50 50 1 1 C
ENDDRAW
ENDDEF
#
# MCP120-xxxHxTO
#
DEF MCP120-xxxHxTO U 0 20 Y Y 1 F N
F0 "U" -200 350 50 H V C CNN
F1 "MCP120-xxxHxTO" 350 350 50 H V C CNN
F2 "Package_TO_SOT_THT:TO-92_Inline" 650 -350 50 H I C CNN
F3 "" 0 0 50 H I C CNN
ALIAS MCP130-xxxHxTO
$FPLIST
TO*92*Inline*
$ENDFPLIST
DRAW
S 200 300 -200 -300 0 1 10 f
X VDD 1 0 400 100 D 50 50 1 1 W
X ~RST 2 300 0 100 L 50 50 1 1 C
X VSS 3 0 -400 100 U 50 50 1 1 W
ENDDRAW
ENDDEF
#
# MCP120-xxxxSN
#
DEF MCP120-xxxxSN U 0 20 Y Y 1 F N
F0 "U" -200 350 50 H V C CNN
F1 "MCP120-xxxxSN" 350 350 50 H V C CNN
F2 "Package_SO:SOIC-8_3.9x4.9mm_P1.27mm" 800 -350 50 H I C CNN
F3 "" 0 0 50 H I C CNN
ALIAS MCP130-xxxxSN
$FPLIST
SOIC*3.9x4.9mm*P1.27mm*
$ENDFPLIST
DRAW
S 200 300 -200 -300 0 1 10 f
X ~RST 1 300 0 100 L 50 50 1 1 C
X VDD 2 0 400 100 D 50 50 1 1 W
X NC 3 -200 200 100 R 50 50 1 1 N N
X VSS 4 0 -400 100 U 50 50 1 1 W
X NC 5 -200 100 100 R 50 50 1 1 N N
X NC 6 -200 0 100 R 50 50 1 1 N N
X NC 7 -200 -100 100 R 50 50 1 1 N N
X NC 8 -200 -200 100 R 50 50 1 1 N N
ENDDRAW
ENDDEF
#
# MCP120-xxxxTT
#
DEF MCP120-xxxxTT U 0 20 Y Y 1 F N
F0 "U" -200 350 50 H V C CNN
F1 "MCP120-xxxxTT" 350 350 50 H V C CNN
F2 "Package_TO_SOT_SMD:SOT-23" 600 -350 50 H I C CNN
F3 "" 0 0 50 H I C CNN
ALIAS MCP130-xxxxTT
$FPLIST
SOT?23*
$ENDFPLIST
DRAW
S 200 300 -200 -300 0 1 10 f
X ~RST 1 300 0 100 L 50 50 1 1 C
X VDD 2 0 400 100 D 50 50 1 1 W
X VSS 3 0 -400 100 U 50 50 1 1 W
ENDDRAW
ENDDEF
#
# MCP130-xxxFxTO
#
DEF MCP130-xxxFxTO U 0 20 Y Y 1 F N
F0 "U" -200 350 50 H V C CNN
F1 "MCP130-xxxFxTO" 350 350 50 H V C CNN
F2 "Package_TO_SOT_THT:TO-92_Inline" 650 -350 50 H I C CNN
F3 "" 0 0 50 H I C CNN
$FPLIST
TO*92*Inline*
$ENDFPLIST
DRAW
S 200 300 -200 -300 0 1 10 f
X VDD 3 0 400 100 D 50 50 0 1 W
X VSS 1 0 -400 100 U 50 50 1 1 W
X ~RST 2 300 0 100 L 50 50 1 1 C
ENDDRAW
ENDDEF
#
# MCP39F521
#
DEF MCP39F521 U 0 20 Y Y 1 F N
F0 "U" -450 750 50 H V C CNN
F1 "MCP39F521" 350 750 50 H V C CNN
F2 "Package_DFN_QFN:QFN-28-1EP_5x5mm_P0.5mm_EP3.35x3.35mm" 0 100 50 H I C CNN
F3 "" 0 100 50 H I C CNN
$FPLIST
QFN*1EP*5x5mm*P0.5mm*
$ENDFPLIST
DRAW
S -500 700 500 -800 0 1 10 f
X EVENT 1 600 -100 100 L 50 50 1 1 O
X ~RESET 10 -600 600 100 R 50 50 1 1 I
X AVDD 11 -100 800 100 D 50 50 1 1 W
X A0 12 600 400 100 L 50 50 1 1 I
X SCL 13 600 200 100 L 50 50 1 1 I
X SDA 14 600 100 100 L 50 50 1 1 B
X A1 15 600 300 100 L 50 50 1 1 I
X I1+ 16 -600 400 100 R 50 50 1 1 I
X I1- 17 -600 300 100 R 50 50 1 1 I
X V1- 18 -600 100 100 R 50 50 1 1 I
X V1+ 19 -600 200 100 R 50 50 1 1 I
X NC 2 -500 500 100 R 50 50 1 1 N N
X AN_IN 20 -600 -400 100 R 50 50 1 1 I
X AGND 21 -100 -900 100 U 50 50 1 1 W
X ZCD 22 600 -200 100 L 50 50 1 1 O
X REFIN+/OUT 23 600 -400 100 L 50 50 1 1 B
X DGND 24 100 -900 100 U 50 50 1 1 W
X DVDD 25 100 800 100 D 50 50 1 1 W
X ~MCLR 26 600 600 100 L 50 50 1 1 I
X DGND 27 100 -900 100 U 50 50 1 1 P N
X ~DR 28 600 -600 100 L 50 50 1 1 O
X DGND 29 100 -900 100 U 50 50 1 1 P N
X NC 3 -500 0 100 R 50 50 1 1 N N
X COMMON_B 4 -600 -200 100 R 50 50 1 1 P
X COMMON_A 5 -600 -100 100 R 50 50 1 1 P
X OSCI 6 -600 -600 100 R 50 50 1 1 I
X OSCO 7 -600 -700 100 R 50 50 1 1 P
X NC 8 500 500 100 L 50 50 1 1 N N
X NC 9 500 0 100 L 50 50 1 1 N N
ENDDRAW
ENDDEF
#
# MIC811LUY
#
DEF MIC811LUY U 0 20 Y Y 1 F N
F0 "U" -300 250 50 H V L CNN
F1 "MIC811LUY" 50 250 50 H V L CNN
F2 "Package_TO_SOT_SMD:SOT-143" 100 -300 50 H I L CNN
F3 "" -350 -700 50 H I C CNN
ALIAS MIC811MUY MIC811JUY MIC811TUY MIC811SUY MIC811RUY CAT811LTBI-GT3 CAT811MTBI-GT3 CAT811JTBI-GT3 CAT811TTBI-GT3 CAT811STBI-GT3 CAT811RTBI-GT3 CAT811ZTBI-GT3 MAX811LEUS-T MAX811MEUS-T MAX811TEUS-T MAX811SEUS-T MAX811REUS-T
$FPLIST
SOT*143*
$ENDFPLIST
DRAW
S -300 200 300 -200 0 1 10 f
X GND 1 0 -300 100 U 50 50 1 1 W
X ~RESET 2 400 0 100 L 50 50 1 1 O
X ~MR 3 -400 0 100 R 50 50 1 1 I
X VCC 4 0 300 100 D 50 50 1 1 W
ENDDRAW
ENDDEF
#
# NL17SZ157
#
DEF NL17SZ157 U 0 40 Y Y 1 F N
F0 "U" 0 600 50 H V C CNN
F1 "NL17SZ157" 0 500 50 H V C CNN
F2 "" 0 500 50 H I C CNN
F3 "" 0 500 50 H I C CNN
DRAW
S -200 250 200 -250 1 1 10 f
X I1 1 -300 -150 100 R 40 40 1 1 I
X GND 2 0 -350 100 U 40 40 1 1 W
X I0 3 -300 -50 100 R 40 40 1 1 I
X Z 4 300 0 100 L 40 40 1 1 O
X VCC 5 0 350 100 D 40 40 1 1 W
X S 6 -300 150 100 R 40 40 1 1 I
ENDDRAW
ENDDEF
#
# TCM809
#
DEF TCM809 U 0 40 Y Y 1 F N
F0 "U" 0 350 50 H V L CNN
F1 "TCM809" -50 -350 50 H V L CNN
F2 "" -400 150 50 H I C CNN
F3 "" -300 250 50 H I C CNN
$FPLIST
SOT?23*
*SC?70*
$ENDFPLIST
DRAW
S -200 300 200 -300 1 1 10 f
X GND 1 -100 -400 100 U 50 50 1 1 W
X ~RESET~ 2 300 0 100 L 50 50 1 1 O
X VCC 3 -100 400 100 D 50 50 1 1 W
ENDDRAW
ENDDEF
#
# TCM810
#
DEF TCM810 U 0 40 Y Y 1 F N
F0 "U" 0 350 50 H V L CNN
F1 "TCM810" -50 -350 50 H V L CNN
F2 "" -400 150 50 H I C CNN
F3 "" -300 250 50 H I C CNN
$FPLIST
SOT?23*
*SC?70*
$ENDFPLIST
DRAW
S -200 300 200 -300 1 1 10 f
X GND 1 -100 -400 100 U 50 50 1 1 W
X RESET 2 300 0 100 L 50 50 1 1 O
X VCC 3 -100 400 100 D 50 50 1 1 W
ENDDRAW
ENDDEF
#
# TL7702A
#
DEF TL7702A U 0 20 Y Y 1 F N
F0 "U" -350 350 50 H V C CNN
F1 "TL7702A" 400 350 50 H V R CNN
F2 "" 0 0 50 H I C CNN
F3 "" 0 0 50 H I C CNN
ALIAS TL7705A TL7709A TL7712A TL7715A TL7702B TL7733B TL7705B
$FPLIST
SOIC*3.9x4.9mm*P1.27mm*
DIP*W7.62mm*
$ENDFPLIST
DRAW
S -400 300 400 -300 0 1 10 f
X REF 1 500 -200 100 L 50 50 1 1 O
X ~RESIN 2 -500 0 100 R 50 50 1 1 I
X CT 3 -500 -200 100 R 50 50 1 1 P
X GND 4 0 -400 100 U 50 50 1 1 W
X ~RESET 5 500 200 100 L 50 50 1 1 C
X RESET 6 500 0 100 L 50 50 1 1 C
X SENSE 7 -500 200 100 R 50 50 1 1 I
X VCC 8 0 400 100 D 50 50 1 1 W
ENDDRAW
ENDDEF
#
# TL7705ACPSR
#
DEF TL7705ACPSR U 0 20 Y Y 1 F N
F0 "U" -350 350 50 H V C CNN
F1 "TL7705ACPSR" 400 350 50 H V R CNN
F2 "Package_SO:SO-8_5.3x6.2mm_P1.27mm" 0 0 50 H I C CNN
F3 "" 0 0 50 H I C CNN
$FPLIST
SO*5.3x6.2mm*P1.27mm*
$ENDFPLIST
DRAW
S -400 300 400 -300 0 1 10 f
X REF 1 500 -200 100 L 50 50 1 1 O
X ~RESIN 2 -500 0 100 R 50 50 1 1 I
X CT 3 -500 -200 100 R 50 50 1 1 P
X GND 4 0 -400 100 U 50 50 1 1 W
X ~RESET 5 500 200 100 L 50 50 1 1 C
X RESET 6 500 0 100 L 50 50 1 1 C
X SENSE 7 -500 200 100 R 50 50 1 1 I
X VCC 8 0 400 100 D 50 50 1 1 W
ENDDRAW
ENDDEF
#
# TPS3702
#
DEF TPS3702 U 0 20 Y Y 1 F N
F0 "U" -250 250 50 H V C CNN
F1 "TPS3702" 250 250 50 H V C CNN
F2 "Package_TO_SOT_SMD:SOT-23-6" 0 0 50 H I C CNN
F3 "" -400 400 50 H I C CNN
$FPLIST
SOT?23*
$ENDFPLIST
DRAW
S -300 200 300 -200 0 1 10 f
X UV 1 400 0 100 L 50 50 1 1 O
X GND 2 0 -300 100 U 50 50 1 1 W
X SENSE 3 -400 100 100 R 50 50 1 1 I
X SET 4 -400 0 100 R 50 50 1 1 I
X VDD 5 0 300 100 D 50 50 1 1 W
X OV 6 400 100 100 L 50 50 1 1 O
ENDDRAW
ENDDEF
#
# TPS3808DBV
#
DEF TPS3808DBV U 0 20 Y Y 1 F N
F0 "U" 0 350 50 H V L CNN
F1 "TPS3808DBV" 0 250 50 H V L CNN
F2 "Package_TO_SOT_SMD:SOT-23-6" -100 0 50 H I C CNN
F3 "" -100 0 50 H I C CNN
$FPLIST
SOT?23*
$ENDFPLIST
DRAW
S -300 200 300 -200 0 1 10 f
X ~RESET 1 400 0 100 L 50 50 1 1 O
X GND 2 0 -300 100 U 50 50 1 1 W
X ~MR 3 -400 0 100 R 50 50 1 1 I
X CT 4 -400 -100 100 R 50 50 1 1 I
X SENSE 5 -400 100 100 R 50 50 1 1 I
X VDD 6 0 300 100 D 50 50 1 1 W
ENDDRAW
ENDDEF
#
# TPS3831
#
DEF TPS3831 U 0 10 Y Y 1 F N
F0 "U" 100 350 50 H V L CNN
F1 "TPS3831" 100 250 50 H V L CNN
F2 "Package_SON:Texas_X2SON-4_1x1mm_P0.65mm" 0 -600 50 H I C CNN
F3 "" 0 0 50 H I C CNN
$FPLIST
Texas*X2SON*1x1mm*P0.65mm*
$ENDFPLIST
DRAW
S -200 200 300 -200 0 1 10 f
X ~RESET 1 400 0 100 L 50 50 1 1 O
X ~MR 2 -300 0 100 R 50 50 1 1 I
X GND 3 0 -300 100 U 50 50 1 1 W
X VDD 4 0 300 100 D 50 50 1 1 W
X TP 5 100 -300 100 U 50 50 1 1 W
ENDDRAW
ENDDEF
#
# TPS3839DBZ
#
DEF TPS3839DBZ U 0 10 Y Y 1 F N
F0 "U" 100 350 50 H V L CNN
F1 "TPS3839DBZ" 100 250 50 H V L CNN
F2 "Package_TO_SOT_SMD:SOT-23" 0 0 50 H I C CNN
F3 "" 0 0 50 H I C CNN
$FPLIST
SOT?23*
$ENDFPLIST
DRAW
S -100 200 300 -200 0 1 10 f
X GND 1 0 -300 100 U 50 50 1 1 W
X ~RESET 2 400 0 100 L 50 50 1 1 O
X VDD 3 0 300 100 D 50 50 1 1 W
ENDDRAW
ENDDEF
#
# TPS3839DQN
#
DEF TPS3839DQN U 0 20 Y Y 1 F N
F0 "U" 100 350 50 H V L CNN
F1 "TPS3839DQN" 100 250 50 H V L CNN
F2 "Package_SON:Texas_X2SON-4_1x1mm_P0.65mm" 0 -600 50 H I C CNN
F3 "" 0 0 50 H I C CNN
$FPLIST
Texas*X2SON*1x1mm*P0.65mm*
$ENDFPLIST
DRAW
S -100 200 300 -200 0 1 10 f
X ~RESET 1 400 0 100 L 50 50 1 1 O
X NC 2 -100 0 100 R 50 50 1 1 N N
X GND 3 0 -300 100 U 50 50 1 1 W
X VDD 4 0 300 100 D 50 50 1 1 W
X TP 5 100 -300 100 U 50 50 1 1 W
ENDDRAW
ENDDEF
#
# UCC2946
#
DEF UCC2946 U 0 40 Y Y 1 F N
F0 "U" 0 600 50 H V C CNN
F1 "UCC2946" 0 500 50 H V C CNN
F2 "" 0 600 50 H I C CNN
F3 "" 0 600 50 H I C CNN
DRAW
S -250 300 250 -300 0 1 0 f
X GND 1 0 -400 100 U 50 50 1 1 W
X RTH 2 -350 200 100 R 50 50 1 1 I
X ~RES~ 3 350 150 100 L 50 50 1 1 I
X RP 4 -350 100 100 R 50 50 1 1 I
X ~WDO~ 5 350 -150 100 L 50 50 1 1 I
X WP 6 -350 -100 100 R 50 50 1 1 I
X WDI 7 -350 -200 100 R 50 50 1 1 I
X VDD 8 0 400 100 D 50 50 1 1 W
ENDDRAW
ENDDEF
#
#End Library