Add CAN Filter and Watchdog functionality, theoretically complete
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E7484A06E99DAEF1
File diff suppressed because one or more lines are too long
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@ -51,7 +51,7 @@
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/*#define HAL_CRYP_MODULE_ENABLED */
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/*#define HAL_DAC_MODULE_ENABLED */
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/*#define HAL_I2S_MODULE_ENABLED */
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/*#define HAL_IWDG_MODULE_ENABLED */
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#define HAL_IWDG_MODULE_ENABLED
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/*#define HAL_LCD_MODULE_ENABLED */
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/*#define HAL_LPTIM_MODULE_ENABLED */
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/*#define HAL_RNG_MODULE_ENABLED */
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@ -57,7 +57,7 @@ typedef enum {
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*/
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typedef union {
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uint8_t raw[1];
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uint8_t raw[8]; // Must be 8 bytes because HAL always writes 8 bytes
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struct {
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// BITFIELDS ARE LSB FIRST!
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bool as_close_sdc : 1;
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@ -118,6 +118,9 @@ typedef union {
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#define AMI_GPIO_Port GPIOB
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//#define WATCHDOG_UCC
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#define WATCHDOG_STM
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/* USER CODE END PD */
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/* Private macro -------------------------------------------------------------*/
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@ -128,6 +131,8 @@ typedef union {
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/* Private variables ---------------------------------------------------------*/
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CAN_HandleTypeDef hcan;
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IWDG_HandleTypeDef hiwdg;
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/* USER CODE BEGIN PV */
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// Mission Maps: NONE ACCEL SKIDPAD TRACKDRIVE EBSTEST INSPECTION AUTOX MANUAL
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@ -136,12 +141,18 @@ const mission_t mission2next[] = {M_MANUAL , M_SKIDPAD , M_AUTOX , M_EBSTEST
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mission_t mission = M_NONE;
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#ifdef WATCHDOG_STM
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bool pHeartbeat = false;
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bool WD_OK = false;
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#endif
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/* USER CODE END PV */
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/* Private function prototypes -----------------------------------------------*/
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void SystemClock_Config(void);
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static void MX_GPIO_Init(void);
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static void MX_CAN_Init(void);
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static void MX_IWDG_Init(void);
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/* USER CODE BEGIN PFP */
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/* USER CODE END PFP */
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@ -184,20 +195,23 @@ int main(void)
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/* Initialize all configured peripherals */
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MX_GPIO_Init();
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MX_CAN_Init();
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MX_IWDG_Init();
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/* USER CODE BEGIN 2 */
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// Ensure we start with SDC disabled
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HAL_GPIO_WritePin(Watchdog_GPIO_Port, Watchdog_Pin, GPIO_PIN_RESET);
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if (HAL_CAN_Start(&hcan) != HAL_OK)
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Error_Handler();
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// TODO: Use Filter
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CAN_FilterTypeDef canfilterconfig;
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canfilterconfig.FilterActivation = CAN_FILTER_ENABLE;
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canfilterconfig.FilterBank = 0;
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canfilterconfig.FilterFIFOAssignment = CAN_FILTER_FIFO0;
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canfilterconfig.FilterIdHigh = 0;
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canfilterconfig.FilterIdHigh = 0 << (16 - 11);
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canfilterconfig.FilterIdLow = 0;
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canfilterconfig.FilterMaskIdHigh = 0;
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canfilterconfig.FilterMaskIdHigh = 0x7FF << (16 - 11);
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canfilterconfig.FilterMaskIdLow = 0;
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canfilterconfig.FilterMode = CAN_FILTERMODE_IDMASK;
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canfilterconfig.FilterScale = CAN_FILTERSCALE_32BIT;
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@ -230,13 +244,16 @@ int main(void)
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bool pAMC = false;
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mission_t new_mission = mission; // By default, don't change mission
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// Important to prevent bus error state while ABX is starting up
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HAL_Delay(1000);
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while (true) {
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bool TS_activate_MUXed = HAL_GPIO_ReadPin(TS_activate_MUXed_GPIO_Port, TS_activate_MUXed_Pin) == GPIO_PIN_RESET;
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bool ASMS = HAL_GPIO_ReadPin(ASMS_GPIO_Port, ASMS_Pin) == GPIO_PIN_RESET;
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//bool WD_OK = HAL_GPIO_ReadPin(WD_OK_GPIO_Port, WD_OK_Pin) == GPIO_PIN_RESET;
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#ifdef WATCHDOG_UCC
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bool WD_OK = HAL_GPIO_ReadPin(WD_OK_GPIO_Port, WD_OK_Pin) == GPIO_PIN_RESET;
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#endif
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bool SDC_is_ready = HAL_GPIO_ReadPin(SDC_is_ready_GPIO_Port, SDC_is_ready_Pin) == GPIO_PIN_SET;
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bool SDC_in_3V3 = HAL_GPIO_ReadPin(SDC_in_3V3_GPIO_Port, SDC_in_3V3_Pin) == GPIO_PIN_SET;
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bool LV_SENSE_1 = HAL_GPIO_ReadPin(LV_SENSE_1_GPIO_Port, LV_SENSE_1_Pin) == GPIO_PIN_SET;
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@ -258,9 +275,6 @@ int main(void)
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}
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// TODO: Depends on STM watchdog
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bool WD_OK = true;
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txData = (tx_data_t) {
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.signals = {
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.asms_state = ASMS,
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@ -304,9 +318,10 @@ void SystemClock_Config(void)
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/** Initializes the RCC Oscillators according to the specified parameters
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* in the RCC_OscInitTypeDef structure.
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*/
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RCC_OscInitStruct.OscillatorType = RCC_OSCILLATORTYPE_HSI;
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RCC_OscInitStruct.OscillatorType = RCC_OSCILLATORTYPE_HSI|RCC_OSCILLATORTYPE_LSI;
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RCC_OscInitStruct.HSIState = RCC_HSI_ON;
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RCC_OscInitStruct.HSICalibrationValue = RCC_HSICALIBRATION_DEFAULT;
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RCC_OscInitStruct.LSIState = RCC_LSI_ON;
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RCC_OscInitStruct.PLL.PLLState = RCC_PLL_NONE;
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if (HAL_RCC_OscConfig(&RCC_OscInitStruct) != HAL_OK)
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{
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@ -365,6 +380,35 @@ static void MX_CAN_Init(void)
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}
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/**
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* @brief IWDG Initialization Function
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* @param None
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* @retval None
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*/
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static void MX_IWDG_Init(void)
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{
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/* USER CODE BEGIN IWDG_Init 0 */
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/* USER CODE END IWDG_Init 0 */
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/* USER CODE BEGIN IWDG_Init 1 */
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/* USER CODE END IWDG_Init 1 */
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hiwdg.Instance = IWDG;
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hiwdg.Init.Prescaler = IWDG_PRESCALER_4;
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hiwdg.Init.Window = 1000;
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hiwdg.Init.Reload = 1000;
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if (HAL_IWDG_Init(&hiwdg) != HAL_OK)
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{
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Error_Handler();
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}
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/* USER CODE BEGIN IWDG_Init 2 */
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/* USER CODE END IWDG_Init 2 */
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}
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/**
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* @brief GPIO Initialization Function
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* @param None
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@ -425,32 +469,33 @@ static void MX_GPIO_Init(void)
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void HAL_CAN_RxFifo0MsgPendingCallback(CAN_HandleTypeDef *hcan) {
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CAN_RxHeaderTypeDef rxHeader;
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// TODO: Remove buffer once filter is implemented?
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uint8_t rxBuffer[8];
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rx_data_t rxData;
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// Read frame from HW into buffer
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if (HAL_CAN_GetRxMessage(hcan, CAN_RX_FIFO0, &rxHeader, rxBuffer) != HAL_OK)
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if (HAL_CAN_GetRxMessage(hcan, CAN_RX_FIFO0, &rxHeader, rxData.raw) != HAL_OK)
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Error_Handler();
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// Discard if it's not for us
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// Discard if it's not for us (shouldn't happen thanks to filter, but just to be sure)
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if (rxHeader.StdId != CAN_ID_RX)
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return;
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// copy to bitfield
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rxData.raw[0] = rxBuffer[0];
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HAL_GPIO_WritePin(ASB_Error_GPIO_Port, ASB_Error_Pin, rxData.signals.asb_error);
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HAL_GPIO_WritePin(AS_close_SDC_GPIO_Port, AS_close_SDC_Pin, rxData.signals.as_close_sdc);
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/*
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* TODO: Heartbeat -> Watchdog via STM Watchdog
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* Also alternative implementation for UCC? With ifdefs?
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* rxData.signals.heartbeat
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*/
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#ifdef WATCHDOG_STM
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// TODO: TEMP!
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HAL_GPIO_WritePin(Watchdog_GPIO_Port, Watchdog_Pin, true);
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if (rxData.signals.heartbeat != pHeartbeat) {
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HAL_IWDG_Refresh(&hiwdg);
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WD_OK = true;
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HAL_GPIO_WritePin(Watchdog_GPIO_Port, Watchdog_Pin, GPIO_PIN_SET);
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}
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pHeartbeat = rxData.signals.heartbeat;
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#endif
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#ifdef WATCHDOG_UCC
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HAL_GPIO_WritePin(Watchdog_GPIO_Port, Watchdog_Pin, rxData.signals.heartbeat);
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#endif
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// Reset old mission LED
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setMissionLED(mission, GPIO_PIN_RESET);
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@ -0,0 +1,240 @@
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/**
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******************************************************************************
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* @file stm32f3xx_hal_iwdg.h
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* @author MCD Application Team
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* @brief Header file of IWDG HAL module.
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******************************************************************************
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* @attention
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*
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* <h2><center>© Copyright (c) 2016 STMicroelectronics.
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* All rights reserved.</center></h2>
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*
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* This software component is licensed by ST under BSD 3-Clause license,
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* the "License"; You may not use this file except in compliance with the
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* License. You may obtain a copy of the License at:
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* opensource.org/licenses/BSD-3-Clause
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*
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******************************************************************************
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*/
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/* Define to prevent recursive inclusion -------------------------------------*/
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#ifndef STM32F3xx_HAL_IWDG_H
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#define STM32F3xx_HAL_IWDG_H
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#ifdef __cplusplus
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extern "C" {
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#endif
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/* Includes ------------------------------------------------------------------*/
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#include "stm32f3xx_hal_def.h"
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/** @addtogroup STM32F3xx_HAL_Driver
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* @{
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*/
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/** @defgroup IWDG IWDG
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* @{
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*/
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/* Exported types ------------------------------------------------------------*/
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/** @defgroup IWDG_Exported_Types IWDG Exported Types
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* @{
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*/
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/**
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* @brief IWDG Init structure definition
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*/
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typedef struct
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{
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uint32_t Prescaler; /*!< Select the prescaler of the IWDG.
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This parameter can be a value of @ref IWDG_Prescaler */
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uint32_t Reload; /*!< Specifies the IWDG down-counter reload value.
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This parameter must be a number between Min_Data = 0 and Max_Data = 0x0FFF */
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uint32_t Window; /*!< Specifies the window value to be compared to the down-counter.
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This parameter must be a number between Min_Data = 0 and Max_Data = 0x0FFF */
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} IWDG_InitTypeDef;
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/**
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* @brief IWDG Handle Structure definition
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*/
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typedef struct
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{
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IWDG_TypeDef *Instance; /*!< Register base address */
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IWDG_InitTypeDef Init; /*!< IWDG required parameters */
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} IWDG_HandleTypeDef;
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/**
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* @}
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*/
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/* Exported constants --------------------------------------------------------*/
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/** @defgroup IWDG_Exported_Constants IWDG Exported Constants
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* @{
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*/
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/** @defgroup IWDG_Prescaler IWDG Prescaler
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* @{
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*/
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#define IWDG_PRESCALER_4 0x00000000u /*!< IWDG prescaler set to 4 */
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#define IWDG_PRESCALER_8 IWDG_PR_PR_0 /*!< IWDG prescaler set to 8 */
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#define IWDG_PRESCALER_16 IWDG_PR_PR_1 /*!< IWDG prescaler set to 16 */
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#define IWDG_PRESCALER_32 (IWDG_PR_PR_1 | IWDG_PR_PR_0) /*!< IWDG prescaler set to 32 */
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#define IWDG_PRESCALER_64 IWDG_PR_PR_2 /*!< IWDG prescaler set to 64 */
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#define IWDG_PRESCALER_128 (IWDG_PR_PR_2 | IWDG_PR_PR_0) /*!< IWDG prescaler set to 128 */
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#define IWDG_PRESCALER_256 (IWDG_PR_PR_2 | IWDG_PR_PR_1) /*!< IWDG prescaler set to 256 */
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/**
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* @}
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*/
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/** @defgroup IWDG_Window_option IWDG Window option
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* @{
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*/
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#define IWDG_WINDOW_DISABLE IWDG_WINR_WIN
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/**
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* @}
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*/
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/**
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* @}
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*/
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/* Exported macros -----------------------------------------------------------*/
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/** @defgroup IWDG_Exported_Macros IWDG Exported Macros
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* @{
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*/
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/**
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* @brief Enable the IWDG peripheral.
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* @param __HANDLE__ IWDG handle
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* @retval None
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*/
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#define __HAL_IWDG_START(__HANDLE__) WRITE_REG((__HANDLE__)->Instance->KR, IWDG_KEY_ENABLE)
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/**
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* @brief Reload IWDG counter with value defined in the reload register
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* (write access to IWDG_PR, IWDG_RLR and IWDG_WINR registers disabled).
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* @param __HANDLE__ IWDG handle
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* @retval None
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*/
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#define __HAL_IWDG_RELOAD_COUNTER(__HANDLE__) WRITE_REG((__HANDLE__)->Instance->KR, IWDG_KEY_RELOAD)
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/**
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* @}
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*/
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/* Exported functions --------------------------------------------------------*/
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/** @defgroup IWDG_Exported_Functions IWDG Exported Functions
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* @{
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*/
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/** @defgroup IWDG_Exported_Functions_Group1 Initialization and Start functions
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* @{
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*/
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/* Initialization/Start functions ********************************************/
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HAL_StatusTypeDef HAL_IWDG_Init(IWDG_HandleTypeDef *hiwdg);
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/**
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* @}
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*/
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/** @defgroup IWDG_Exported_Functions_Group2 IO operation functions
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* @{
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*/
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/* I/O operation functions ****************************************************/
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HAL_StatusTypeDef HAL_IWDG_Refresh(IWDG_HandleTypeDef *hiwdg);
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/**
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* @}
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*/
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/**
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* @}
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*/
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/* Private constants ---------------------------------------------------------*/
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/** @defgroup IWDG_Private_Constants IWDG Private Constants
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* @{
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*/
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/**
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* @brief IWDG Key Register BitMask
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*/
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#define IWDG_KEY_RELOAD 0x0000AAAAu /*!< IWDG Reload Counter Enable */
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#define IWDG_KEY_ENABLE 0x0000CCCCu /*!< IWDG Peripheral Enable */
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#define IWDG_KEY_WRITE_ACCESS_ENABLE 0x00005555u /*!< IWDG KR Write Access Enable */
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#define IWDG_KEY_WRITE_ACCESS_DISABLE 0x00000000u /*!< IWDG KR Write Access Disable */
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/**
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* @}
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*/
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/* Private macros ------------------------------------------------------------*/
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/** @defgroup IWDG_Private_Macros IWDG Private Macros
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* @{
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*/
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/**
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* @brief Enable write access to IWDG_PR, IWDG_RLR and IWDG_WINR registers.
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* @param __HANDLE__ IWDG handle
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* @retval None
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*/
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#define IWDG_ENABLE_WRITE_ACCESS(__HANDLE__) WRITE_REG((__HANDLE__)->Instance->KR, IWDG_KEY_WRITE_ACCESS_ENABLE)
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/**
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* @brief Disable write access to IWDG_PR, IWDG_RLR and IWDG_WINR registers.
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* @param __HANDLE__ IWDG handle
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* @retval None
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*/
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#define IWDG_DISABLE_WRITE_ACCESS(__HANDLE__) WRITE_REG((__HANDLE__)->Instance->KR, IWDG_KEY_WRITE_ACCESS_DISABLE)
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/**
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* @brief Check IWDG prescaler value.
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* @param __PRESCALER__ IWDG prescaler value
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* @retval None
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*/
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#define IS_IWDG_PRESCALER(__PRESCALER__) (((__PRESCALER__) == IWDG_PRESCALER_4) || \
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((__PRESCALER__) == IWDG_PRESCALER_8) || \
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((__PRESCALER__) == IWDG_PRESCALER_16) || \
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((__PRESCALER__) == IWDG_PRESCALER_32) || \
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((__PRESCALER__) == IWDG_PRESCALER_64) || \
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((__PRESCALER__) == IWDG_PRESCALER_128)|| \
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((__PRESCALER__) == IWDG_PRESCALER_256))
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/**
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* @brief Check IWDG reload value.
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* @param __RELOAD__ IWDG reload value
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* @retval None
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*/
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#define IS_IWDG_RELOAD(__RELOAD__) ((__RELOAD__) <= IWDG_RLR_RL)
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/**
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* @brief Check IWDG window value.
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* @param __WINDOW__ IWDG window value
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* @retval None
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*/
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#define IS_IWDG_WINDOW(__WINDOW__) ((__WINDOW__) <= IWDG_WINR_WIN)
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/**
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* @}
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*/
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/**
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* @}
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*/
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/**
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* @}
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*/
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#ifdef __cplusplus
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}
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#endif
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#endif /* STM32F3xx_HAL_IWDG_H */
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/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/
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@ -0,0 +1,285 @@
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/**
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******************************************************************************
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* @file stm32f3xx_hal_iwdg.c
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* @author MCD Application Team
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* @brief IWDG HAL module driver.
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* This file provides firmware functions to manage the following
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* functionalities of the Independent Watchdog (IWDG) peripheral:
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* + Initialization and Start functions
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* + IO operation functions
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*
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@verbatim
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==============================================================================
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||||
##### IWDG Generic features #####
|
||||
==============================================================================
|
||||
[..]
|
||||
(+) The IWDG can be started by either software or hardware (configurable
|
||||
through option byte).
|
||||
|
||||
(+) The IWDG is clocked by the Low-Speed Internal clock (LSI) and thus stays
|
||||
active even if the main clock fails.
|
||||
|
||||
(+) Once the IWDG is started, the LSI is forced ON and both cannot be
|
||||
disabled. The counter starts counting down from the reset value (0xFFF).
|
||||
When it reaches the end of count value (0x000) a reset signal is
|
||||
generated (IWDG reset).
|
||||
|
||||
(+) Whenever the key value 0x0000 AAAA is written in the IWDG_KR register,
|
||||
the IWDG_RLR value is reloaded into the counter and the watchdog reset
|
||||
is prevented.
|
||||
|
||||
(+) The IWDG is implemented in the VDD voltage domain that is still functional
|
||||
in STOP and STANDBY mode (IWDG reset can wake up the CPU from STANDBY).
|
||||
IWDGRST flag in RCC_CSR register can be used to inform when an IWDG
|
||||
reset occurs.
|
||||
|
||||
(+) Debug mode: When the microcontroller enters debug mode (core halted),
|
||||
the IWDG counter either continues to work normally or stops, depending
|
||||
on DBG_IWDG_STOP configuration bit in DBG module, accessible through
|
||||
__HAL_DBGMCU_FREEZE_IWDG() and __HAL_DBGMCU_UNFREEZE_IWDG() macros.
|
||||
|
||||
[..] Min-max timeout value @40KHz (LSI): ~100us / ~26.2s
|
||||
The IWDG timeout may vary due to LSI clock frequency dispersion.
|
||||
STM32F3xx devices provide the capability to measure the LSI clock
|
||||
frequency (LSI clock is internally connected to TIM16 CH1 input capture).
|
||||
The measured value can be used to have an IWDG timeout with an
|
||||
acceptable accuracy.
|
||||
|
||||
[..] Default timeout value (necessary for IWDG_SR status register update):
|
||||
Constant LSI_VALUE is defined based on the nominal LSI clock frequency.
|
||||
This frequency being subject to variations as mentioned above, the
|
||||
default timeout value (defined through constant HAL_IWDG_DEFAULT_TIMEOUT
|
||||
below) may become too short or too long.
|
||||
In such cases, this default timeout value can be tuned by redefining
|
||||
the constant LSI_VALUE at user-application level (based, for instance,
|
||||
on the measured LSI clock frequency as explained above).
|
||||
|
||||
##### How to use this driver #####
|
||||
==============================================================================
|
||||
[..]
|
||||
(#) Use IWDG using HAL_IWDG_Init() function to :
|
||||
(++) Enable instance by writing Start keyword in IWDG_KEY register. LSI
|
||||
clock is forced ON and IWDG counter starts counting down.
|
||||
(++) Enable write access to configuration registers:
|
||||
IWDG_PR, IWDG_RLR and IWDG_WINR.
|
||||
(++) Configure the IWDG prescaler and counter reload value. This reload
|
||||
value will be loaded in the IWDG counter each time the watchdog is
|
||||
reloaded, then the IWDG will start counting down from this value.
|
||||
(++) Depending on window parameter:
|
||||
(+++) If Window Init parameter is same as Window register value,
|
||||
nothing more is done but reload counter value in order to exit
|
||||
function with exact time base.
|
||||
(+++) Else modify Window register. This will automatically reload
|
||||
watchdog counter.
|
||||
(++) Wait for status flags to be reset.
|
||||
|
||||
(#) Then the application program must refresh the IWDG counter at regular
|
||||
intervals during normal operation to prevent an MCU reset, using
|
||||
HAL_IWDG_Refresh() function.
|
||||
|
||||
*** IWDG HAL driver macros list ***
|
||||
====================================
|
||||
[..]
|
||||
Below the list of most used macros in IWDG HAL driver:
|
||||
(+) __HAL_IWDG_START: Enable the IWDG peripheral
|
||||
(+) __HAL_IWDG_RELOAD_COUNTER: Reloads IWDG counter with value defined in
|
||||
the reload register
|
||||
|
||||
@endverbatim
|
||||
******************************************************************************
|
||||
* @attention
|
||||
*
|
||||
* <h2><center>© Copyright (c) 2016 STMicroelectronics.
|
||||
* All rights reserved.</center></h2>
|
||||
*
|
||||
* This software component is licensed by ST under BSD 3-Clause license,
|
||||
* the "License"; You may not use this file except in compliance with the
|
||||
* License. You may obtain a copy of the License at:
|
||||
* opensource.org/licenses/BSD-3-Clause
|
||||
*
|
||||
******************************************************************************
|
||||
*/
|
||||
|
||||
/* Includes ------------------------------------------------------------------*/
|
||||
#include "stm32f3xx_hal.h"
|
||||
|
||||
/** @addtogroup STM32F3xx_HAL_Driver
|
||||
* @{
|
||||
*/
|
||||
|
||||
#ifdef HAL_IWDG_MODULE_ENABLED
|
||||
/** @addtogroup IWDG
|
||||
* @brief IWDG HAL module driver.
|
||||
* @{
|
||||
*/
|
||||
|
||||
/* Private typedef -----------------------------------------------------------*/
|
||||
/* Private define ------------------------------------------------------------*/
|
||||
/** @defgroup IWDG_Private_Defines IWDG Private Defines
|
||||
* @{
|
||||
*/
|
||||
/* Status register needs up to 5 LSI clock periods divided by the clock
|
||||
prescaler to be updated. The number of LSI clock periods is upper-rounded to
|
||||
6 for the timeout value calculation.
|
||||
The timeout value is calculated using the highest prescaler (256) and
|
||||
the LSI_VALUE constant. The value of this constant can be changed by the user
|
||||
to take into account possible LSI clock period variations.
|
||||
The timeout value is multiplied by 1000 to be converted in milliseconds.
|
||||
LSI startup time is also considered here by adding LSI_STARTUP_TIMEOUT
|
||||
converted in milliseconds. */
|
||||
#define HAL_IWDG_DEFAULT_TIMEOUT (((6UL * 256UL * 1000UL) / LSI_VALUE) + ((LSI_STARTUP_TIME / 1000UL) + 1UL))
|
||||
#define IWDG_KERNEL_UPDATE_FLAGS (IWDG_SR_WVU | IWDG_SR_RVU | IWDG_SR_PVU)
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
|
||||
/* Private macro -------------------------------------------------------------*/
|
||||
/* Private variables ---------------------------------------------------------*/
|
||||
/* Private function prototypes -----------------------------------------------*/
|
||||
/* Exported functions --------------------------------------------------------*/
|
||||
|
||||
/** @addtogroup IWDG_Exported_Functions
|
||||
* @{
|
||||
*/
|
||||
|
||||
/** @addtogroup IWDG_Exported_Functions_Group1
|
||||
* @brief Initialization and Start functions.
|
||||
*
|
||||
@verbatim
|
||||
===============================================================================
|
||||
##### Initialization and Start functions #####
|
||||
===============================================================================
|
||||
[..] This section provides functions allowing to:
|
||||
(+) Initialize the IWDG according to the specified parameters in the
|
||||
IWDG_InitTypeDef of associated handle.
|
||||
(+) Manage Window option.
|
||||
(+) Once initialization is performed in HAL_IWDG_Init function, Watchdog
|
||||
is reloaded in order to exit function with correct time base.
|
||||
|
||||
@endverbatim
|
||||
* @{
|
||||
*/
|
||||
|
||||
/**
|
||||
* @brief Initialize the IWDG according to the specified parameters in the
|
||||
* IWDG_InitTypeDef and start watchdog. Before exiting function,
|
||||
* watchdog is refreshed in order to have correct time base.
|
||||
* @param hiwdg pointer to a IWDG_HandleTypeDef structure that contains
|
||||
* the configuration information for the specified IWDG module.
|
||||
* @retval HAL status
|
||||
*/
|
||||
HAL_StatusTypeDef HAL_IWDG_Init(IWDG_HandleTypeDef *hiwdg)
|
||||
{
|
||||
uint32_t tickstart;
|
||||
|
||||
/* Check the IWDG handle allocation */
|
||||
if (hiwdg == NULL)
|
||||
{
|
||||
return HAL_ERROR;
|
||||
}
|
||||
|
||||
/* Check the parameters */
|
||||
assert_param(IS_IWDG_ALL_INSTANCE(hiwdg->Instance));
|
||||
assert_param(IS_IWDG_PRESCALER(hiwdg->Init.Prescaler));
|
||||
assert_param(IS_IWDG_RELOAD(hiwdg->Init.Reload));
|
||||
assert_param(IS_IWDG_WINDOW(hiwdg->Init.Window));
|
||||
|
||||
/* Enable IWDG. LSI is turned on automatically */
|
||||
__HAL_IWDG_START(hiwdg);
|
||||
|
||||
/* Enable write access to IWDG_PR, IWDG_RLR and IWDG_WINR registers by writing
|
||||
0x5555 in KR */
|
||||
IWDG_ENABLE_WRITE_ACCESS(hiwdg);
|
||||
|
||||
/* Write to IWDG registers the Prescaler & Reload values to work with */
|
||||
hiwdg->Instance->PR = hiwdg->Init.Prescaler;
|
||||
hiwdg->Instance->RLR = hiwdg->Init.Reload;
|
||||
|
||||
/* Check pending flag, if previous update not done, return timeout */
|
||||
tickstart = HAL_GetTick();
|
||||
|
||||
/* Wait for register to be updated */
|
||||
while ((hiwdg->Instance->SR & IWDG_KERNEL_UPDATE_FLAGS) != 0x00u)
|
||||
{
|
||||
if ((HAL_GetTick() - tickstart) > HAL_IWDG_DEFAULT_TIMEOUT)
|
||||
{
|
||||
if ((hiwdg->Instance->SR & IWDG_KERNEL_UPDATE_FLAGS) != 0x00u)
|
||||
{
|
||||
return HAL_TIMEOUT;
|
||||
}
|
||||
}
|
||||
}
|
||||
|
||||
/* If window parameter is different than current value, modify window
|
||||
register */
|
||||
if (hiwdg->Instance->WINR != hiwdg->Init.Window)
|
||||
{
|
||||
/* Write to IWDG WINR the IWDG_Window value to compare with. In any case,
|
||||
even if window feature is disabled, Watchdog will be reloaded by writing
|
||||
windows register */
|
||||
hiwdg->Instance->WINR = hiwdg->Init.Window;
|
||||
}
|
||||
else
|
||||
{
|
||||
/* Reload IWDG counter with value defined in the reload register */
|
||||
__HAL_IWDG_RELOAD_COUNTER(hiwdg);
|
||||
}
|
||||
|
||||
/* Return function status */
|
||||
return HAL_OK;
|
||||
}
|
||||
|
||||
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
|
||||
|
||||
/** @addtogroup IWDG_Exported_Functions_Group2
|
||||
* @brief IO operation functions
|
||||
*
|
||||
@verbatim
|
||||
===============================================================================
|
||||
##### IO operation functions #####
|
||||
===============================================================================
|
||||
[..] This section provides functions allowing to:
|
||||
(+) Refresh the IWDG.
|
||||
|
||||
@endverbatim
|
||||
* @{
|
||||
*/
|
||||
|
||||
/**
|
||||
* @brief Refresh the IWDG.
|
||||
* @param hiwdg pointer to a IWDG_HandleTypeDef structure that contains
|
||||
* the configuration information for the specified IWDG module.
|
||||
* @retval HAL status
|
||||
*/
|
||||
HAL_StatusTypeDef HAL_IWDG_Refresh(IWDG_HandleTypeDef *hiwdg)
|
||||
{
|
||||
/* Reload IWDG counter with value defined in the reload register */
|
||||
__HAL_IWDG_RELOAD_COUNTER(hiwdg);
|
||||
|
||||
/* Return function status */
|
||||
return HAL_OK;
|
||||
}
|
||||
|
||||
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
|
||||
#endif /* HAL_IWDG_MODULE_ENABLED */
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
|
||||
/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/
|
||||
|
|
@ -12,14 +12,18 @@ CAN.Prescaler=1
|
|||
CAN.SJW=CAN_SJW_1TQ
|
||||
File.Version=6
|
||||
GPIO.groupedBy=Group By Peripherals
|
||||
IWDG.IPParameters=Window,Reload
|
||||
IWDG.Reload=1000
|
||||
IWDG.Window=1000
|
||||
KeepUserPlacement=false
|
||||
Mcu.CPN=STM32F302C8T6
|
||||
Mcu.Family=STM32F3
|
||||
Mcu.IP0=CAN
|
||||
Mcu.IP1=NVIC
|
||||
Mcu.IP2=RCC
|
||||
Mcu.IP3=SYS
|
||||
Mcu.IPNb=4
|
||||
Mcu.IP1=IWDG
|
||||
Mcu.IP2=NVIC
|
||||
Mcu.IP3=RCC
|
||||
Mcu.IP4=SYS
|
||||
Mcu.IPNb=5
|
||||
Mcu.Name=STM32F302C(6-8)Tx
|
||||
Mcu.Package=LQFP48
|
||||
Mcu.Pin0=PA0
|
||||
|
|
@ -41,7 +45,8 @@ Mcu.Pin22=PB6
|
|||
Mcu.Pin23=PB7
|
||||
Mcu.Pin24=PB8
|
||||
Mcu.Pin25=PB9
|
||||
Mcu.Pin26=VP_SYS_VS_Systick
|
||||
Mcu.Pin26=VP_IWDG_VS_IWDG
|
||||
Mcu.Pin27=VP_SYS_VS_Systick
|
||||
Mcu.Pin3=PA3
|
||||
Mcu.Pin4=PA4
|
||||
Mcu.Pin5=PA5
|
||||
|
|
@ -49,7 +54,7 @@ Mcu.Pin6=PA6
|
|||
Mcu.Pin7=PA7
|
||||
Mcu.Pin8=PB0
|
||||
Mcu.Pin9=PB1
|
||||
Mcu.PinsNb=27
|
||||
Mcu.PinsNb=28
|
||||
Mcu.ThirdPartyNb=0
|
||||
Mcu.UserConstants=
|
||||
Mcu.UserName=STM32F302C8Tx
|
||||
|
|
@ -259,10 +264,11 @@ ProjectManager.StackSize=0x400
|
|||
ProjectManager.TargetToolchain=STM32CubeIDE
|
||||
ProjectManager.ToolChainLocation=
|
||||
ProjectManager.UnderRoot=true
|
||||
ProjectManager.functionlistsort=1-MX_GPIO_Init-GPIO-false-HAL-true,2-SystemClock_Config-RCC-false-HAL-false,3-MX_CAN_Init-CAN-false-HAL-true
|
||||
ProjectManager.functionlistsort=1-MX_GPIO_Init-GPIO-false-HAL-true,2-SystemClock_Config-RCC-false-HAL-false,3-MX_CAN_Init-CAN-false-HAL-true,4-MX_WWDG_Init-WWDG-false-HAL-true
|
||||
RCC.ADC12outputFreq_Value=16000000
|
||||
RCC.AHBFreq_Value=8000000
|
||||
RCC.APB1Freq_Value=8000000
|
||||
RCC.APB1TimFreq_Value=8000000
|
||||
RCC.APB2Freq_Value=8000000
|
||||
RCC.CortexFreq_Value=8000000
|
||||
RCC.FamilyName=M
|
||||
|
|
@ -273,7 +279,7 @@ RCC.HSI_VALUE=8000000
|
|||
RCC.I2C1Freq_Value=8000000
|
||||
RCC.I2C2Freq_Value=8000000
|
||||
RCC.I2C3Freq_Value=8000000
|
||||
RCC.IPParameters=ADC12outputFreq_Value,AHBFreq_Value,APB1Freq_Value,APB2Freq_Value,CortexFreq_Value,FamilyName,HSEPLLFreq_Value,HSE_VALUE,HSIPLLFreq_Value,HSI_VALUE,I2C1Freq_Value,I2C2Freq_Value,I2C3Freq_Value,LSE_VALUE,LSI_VALUE,PLLCLKFreq_Value,PLLMCOFreq_Value,PLLMUL,RTCFreq_Value,RTCHSEDivFreq_Value,SYSCLKFreq_VALUE,TIM2Freq_Value,USART1Freq_Value,USBFreq_Value,VCOOutput2Freq_Value
|
||||
RCC.IPParameters=ADC12outputFreq_Value,AHBFreq_Value,APB1Freq_Value,APB1TimFreq_Value,APB2Freq_Value,CortexFreq_Value,FamilyName,HSEPLLFreq_Value,HSE_VALUE,HSIPLLFreq_Value,HSI_VALUE,I2C1Freq_Value,I2C2Freq_Value,I2C3Freq_Value,LSE_VALUE,LSI_VALUE,PLLCLKFreq_Value,PLLMCOFreq_Value,PLLMUL,RTCFreq_Value,RTCHSEDivFreq_Value,SYSCLKFreq_VALUE,TIM2Freq_Value,USART1Freq_Value,USBFreq_Value,VCOOutput2Freq_Value
|
||||
RCC.LSE_VALUE=32768
|
||||
RCC.LSI_VALUE=40000
|
||||
RCC.PLLCLKFreq_Value=16000000
|
||||
|
|
@ -286,6 +292,8 @@ RCC.TIM2Freq_Value=8000000
|
|||
RCC.USART1Freq_Value=8000000
|
||||
RCC.USBFreq_Value=16000000
|
||||
RCC.VCOOutput2Freq_Value=4000000
|
||||
VP_IWDG_VS_IWDG.Mode=IWDG_Activate
|
||||
VP_IWDG_VS_IWDG.Signal=IWDG_VS_IWDG
|
||||
VP_SYS_VS_Systick.Mode=SysTick
|
||||
VP_SYS_VS_Systick.Signal=SYS_VS_Systick
|
||||
board=custom
|
||||
|
|
|
|||
Loading…
Reference in New Issue