added testbench for ams slave

This commit is contained in:
davidscherer 2023-05-30 18:57:16 +02:00
parent 4f601c8b44
commit d48136cb1a
315 changed files with 288831 additions and 0 deletions

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<listEntry value="/BMS_Software"/>
</listAttribute>
<listAttribute key="org.eclipse.debug.core.MAPPED_RESOURCE_TYPES">
<listEntry value="4"/>
</listAttribute>
<stringAttribute key="org.eclipse.dsf.launch.MEMORY_BLOCKS" value="&lt;?xml version=&quot;1.0&quot; encoding=&quot;UTF-8&quot; standalone=&quot;no&quot;?&gt;&lt;memoryBlockExpressionList context=&quot;reserved-for-future-use&quot;/&gt;"/>
<stringAttribute key="process_factory_id" value="com.st.stm32cube.ide.mcu.debug.launch.HardwareDebugProcessFactory"/>
</launchConfiguration>

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#MicroXplorer Configuration settings - do not modify
CAD.formats=
CAD.pinconfig=
CAD.provider=
CAN.ABOM=ENABLE
CAN.BS1=CAN_BS1_13TQ
CAN.BS2=CAN_BS2_2TQ
CAN.CalculateBaudRate=500000
CAN.CalculateTimeBit=2000
CAN.CalculateTimeQuantum=125.0
CAN.IPParameters=CalculateTimeQuantum,CalculateTimeBit,CalculateBaudRate,BS1,BS2,Prescaler,NART,ABOM
CAN.NART=ENABLE
CAN.Prescaler=2
File.Version=6
KeepUserPlacement=false
Mcu.CPN=STM32F302CCT6
Mcu.Family=STM32F3
Mcu.IP0=CAN
Mcu.IP1=I2C1
Mcu.IP2=I2C2
Mcu.IP3=NVIC
Mcu.IP4=RCC
Mcu.IP5=SPI1
Mcu.IP6=SYS
Mcu.IPNb=7
Mcu.Name=STM32F302C(B-C)Tx
Mcu.Package=LQFP48
Mcu.Pin0=PF0-OSC_IN
Mcu.Pin1=PF1-OSC_OUT
Mcu.Pin10=PA9
Mcu.Pin11=PA10
Mcu.Pin12=PA11
Mcu.Pin13=PA12
Mcu.Pin14=PA13
Mcu.Pin15=PA14
Mcu.Pin16=PA15
Mcu.Pin17=PB3
Mcu.Pin18=PB7
Mcu.Pin2=PA4
Mcu.Pin3=PA5
Mcu.Pin4=PA6
Mcu.Pin5=PA7
Mcu.Pin6=PB13
Mcu.Pin7=PB14
Mcu.Pin8=PB15
Mcu.Pin9=PA8
Mcu.PinsNb=19
Mcu.ThirdPartyNb=0
Mcu.UserConstants=
Mcu.UserName=STM32F302CCTx
MxCube.Version=6.7.0
MxDb.Version=DB.6.0.70
NVIC.BusFault_IRQn=true\:0\:0\:false\:false\:true\:false\:false\:false
NVIC.DebugMonitor_IRQn=true\:0\:0\:false\:false\:true\:false\:false\:false
NVIC.ForceEnableDMAVector=true
NVIC.HardFault_IRQn=true\:0\:0\:false\:false\:true\:false\:false\:false
NVIC.MemoryManagement_IRQn=true\:0\:0\:false\:false\:true\:false\:false\:false
NVIC.NonMaskableInt_IRQn=true\:0\:0\:false\:false\:true\:false\:false\:false
NVIC.PendSV_IRQn=true\:0\:0\:false\:false\:true\:false\:false\:false
NVIC.PriorityGroup=NVIC_PRIORITYGROUP_4
NVIC.SVCall_IRQn=true\:0\:0\:false\:false\:true\:false\:false\:false
NVIC.SysTick_IRQn=true\:15\:0\:false\:false\:true\:false\:true\:false
NVIC.USB_LP_CAN_RX0_IRQn=true\:0\:0\:false\:false\:true\:true\:true\:true
NVIC.UsageFault_IRQn=true\:0\:0\:false\:false\:true\:false\:false\:false
PA10.Locked=true
PA10.Mode=I2C
PA10.Signal=I2C2_SDA
PA11.Locked=true
PA11.Mode=CAN_Activate
PA11.Signal=CAN_RX
PA12.Locked=true
PA12.Mode=CAN_Activate
PA12.Signal=CAN_TX
PA13.Locked=true
PA13.Mode=Trace_Asynchronous_SW
PA13.Signal=SYS_JTMS-SWDIO
PA14.Locked=true
PA14.Mode=Trace_Asynchronous_SW
PA14.Signal=SYS_JTCK-SWCLK
PA15.GPIOParameters=GPIO_Label
PA15.GPIO_Label=TMP_SCL
PA15.Locked=true
PA15.Mode=I2C
PA15.Signal=I2C1_SCL
PA4.GPIOParameters=GPIO_Label
PA4.GPIO_Label=CSB
PA4.Locked=true
PA4.Signal=GPIO_Output
PA5.Locked=true
PA5.Mode=Full_Duplex_Master
PA5.Signal=SPI1_SCK
PA6.Locked=true
PA6.Mode=Full_Duplex_Master
PA6.Signal=SPI1_MISO
PA7.Locked=true
PA7.Mode=Full_Duplex_Master
PA7.Signal=SPI1_MOSI
PA8.GPIOParameters=GPIO_Label
PA8.GPIO_Label=Status_3
PA8.Locked=true
PA8.Signal=GPIO_Output
PA9.Locked=true
PA9.Mode=I2C
PA9.Signal=I2C2_SCL
PB13.GPIOParameters=GPIO_Label
PB13.GPIO_Label=Status_0
PB13.Locked=true
PB13.Signal=GPIO_Output
PB14.GPIOParameters=GPIO_Label
PB14.GPIO_Label=Status_1
PB14.Locked=true
PB14.Signal=GPIO_Output
PB15.GPIOParameters=GPIO_Label
PB15.GPIO_Label=Status_2
PB15.Locked=true
PB15.Signal=GPIO_Output
PB3.Mode=Trace_Asynchronous_SW
PB3.Signal=SYS_JTDO-TRACESWO
PB7.GPIOParameters=GPIO_Label
PB7.GPIO_Label=TMP_SDA
PB7.Locked=true
PB7.Mode=I2C
PB7.Signal=I2C1_SDA
PF0-OSC_IN.Mode=HSE-External-Oscillator
PF0-OSC_IN.Signal=RCC_OSC_IN
PF1-OSC_OUT.Mode=HSE-External-Oscillator
PF1-OSC_OUT.Signal=RCC_OSC_OUT
PinOutPanel.RotationAngle=0
ProjectManager.AskForMigrate=true
ProjectManager.BackupPrevious=false
ProjectManager.CompilerOptimize=6
ProjectManager.ComputerToolchain=false
ProjectManager.CoupleFile=false
ProjectManager.CustomerFirmwarePackage=
ProjectManager.DefaultFWLocation=true
ProjectManager.DeletePrevious=true
ProjectManager.DeviceId=STM32F302CCTx
ProjectManager.FirmwarePackage=STM32Cube FW_F3 V1.11.3
ProjectManager.FreePins=false
ProjectManager.HalAssertFull=false
ProjectManager.HeapSize=0x200
ProjectManager.KeepUserCode=true
ProjectManager.LastFirmware=false
ProjectManager.LibraryCopy=1
ProjectManager.MainLocation=Core/Src
ProjectManager.NoMain=false
ProjectManager.PreviousToolchain=STM32CubeIDE
ProjectManager.ProjectBuild=false
ProjectManager.ProjectFileName=BMS_Software.ioc
ProjectManager.ProjectName=BMS_Software
ProjectManager.RegisterCallBack=
ProjectManager.StackSize=0x400
ProjectManager.TargetToolchain=STM32CubeIDE
ProjectManager.ToolChainLocation=
ProjectManager.UnderRoot=true
ProjectManager.functionlistsort=1-SystemClock_Config-RCC-false-HAL-false,2-MX_GPIO_Init-GPIO-false-HAL-true,3-MX_CAN_Init-CAN-false-HAL-true,4-MX_I2C1_Init-I2C1-false-HAL-true,5-MX_I2C2_Init-I2C2-false-HAL-true,6-MX_SPI1_Init-SPI1-false-HAL-true
RCC.ADC12outputFreq_Value=32000000
RCC.AHBFreq_Value=16000000
RCC.APB1Freq_Value=16000000
RCC.APB1TimFreq_Value=16000000
RCC.APB2Freq_Value=16000000
RCC.APB2TimFreq_Value=16000000
RCC.CortexFreq_Value=16000000
RCC.FCLKCortexFreq_Value=16000000
RCC.FamilyName=M
RCC.HCLKFreq_Value=16000000
RCC.HSEPLLFreq_Value=16000000
RCC.HSE_VALUE=16000000
RCC.HSIPLLFreq_Value=4000000
RCC.HSI_VALUE=8000000
RCC.I2C1Freq_Value=8000000
RCC.I2C2Freq_Value=8000000
RCC.IPParameters=ADC12outputFreq_Value,AHBFreq_Value,APB1Freq_Value,APB1TimFreq_Value,APB2Freq_Value,APB2TimFreq_Value,CortexFreq_Value,FCLKCortexFreq_Value,FamilyName,HCLKFreq_Value,HSEPLLFreq_Value,HSE_VALUE,HSIPLLFreq_Value,HSI_VALUE,I2C1Freq_Value,I2C2Freq_Value,LSE_VALUE,LSI_VALUE,MCOFreq_Value,PLLCLKFreq_Value,PLLMCOFreq_Value,PLLSourceVirtual,RTCFreq_Value,RTCHSEDivFreq_Value,SYSCLKFreq_VALUE,SYSCLKSourceVirtual,TIM1Freq_Value,TIM2Freq_Value,USART1Freq_Value,USART2Freq_Value,USART3Freq_Value,USBFreq_Value,VCOOutput2Freq_Value
RCC.LSE_VALUE=32768
RCC.LSI_VALUE=40000
RCC.MCOFreq_Value=16000000
RCC.PLLCLKFreq_Value=32000000
RCC.PLLMCOFreq_Value=16000000
RCC.PLLSourceVirtual=RCC_PLLSOURCE_HSE
RCC.RTCFreq_Value=40000
RCC.RTCHSEDivFreq_Value=500000
RCC.SYSCLKFreq_VALUE=16000000
RCC.SYSCLKSourceVirtual=RCC_SYSCLKSOURCE_HSE
RCC.TIM1Freq_Value=16000000
RCC.TIM2Freq_Value=16000000
RCC.USART1Freq_Value=16000000
RCC.USART2Freq_Value=16000000
RCC.USART3Freq_Value=16000000
RCC.USBFreq_Value=32000000
RCC.VCOOutput2Freq_Value=16000000
SPI1.BaudRatePrescaler=SPI_BAUDRATEPRESCALER_32
SPI1.CalculateBaudRate=500.0 KBits/s
SPI1.DataSize=SPI_DATASIZE_8BIT
SPI1.Direction=SPI_DIRECTION_2LINES
SPI1.IPParameters=VirtualType,Mode,Direction,CalculateBaudRate,BaudRatePrescaler,DataSize
SPI1.Mode=SPI_MODE_MASTER
SPI1.VirtualType=VM_MASTER
board=custom
isbadioc=false

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/*
* ADBMS_Abstraction.h
*
* Created on: 14.07.2022
* Author: max
*/
#ifndef INC_ADBMS_ABSTRACTION_H_
#define INC_ADBMS_ABSTRACTION_H_
#include "ADBMS_LL_Driver.h"
#include "ADBMS_CMD_MAKROS.h"
#include "main.h"
#define MAXIMUM_CELL_VOLTAGES 18
#define MAXIMUM_AUX_VOLTAGES 10
#define MAXIMUM_GPIO 10
#define DEFAULT_UV 1562//(VUV + 1)*16*100uV Default Setting 2.5V
#define DEFAULT_OV 2625//(VOV)*16*100uV Default Setting 4.2V
typedef struct
{
uint16 cellVoltages[MAXIMUM_CELL_VOLTAGES];
uint16 auxVoltages[MAXIMUM_AUX_VOLTAGES];
uint16 internalDieTemp;
uint16 analogSupplyVoltage;
uint16 digitalSupplyVoltage;
uint16 sumOfCellMeasurements;
uint16 refVoltage;
uint16 GPIO_Values[MAXIMUM_GPIO];
uint32 overVoltage;
uint32 underVoltage;
} Cell_Module;
uint8 initAMS(SPI_HandleTypeDef* hspi, uint8 numofcells, uint8 numofaux);
uint8 amsWakeUp();
uint8 amsCellMeasurement(Cell_Module *module);
uint8 amsConfigCellMeasurement(uint8 numberofChannels);
uint8 amsAuxMeasurement(Cell_Module *module);
uint8 amsConfigAuxMeasurement(uint16 Channels);
uint8 amsInternalStatusMeasurement(Cell_Module *module);
uint8 amsConfigGPIO(uint16 gpios);
uint8 amsSetGPIO(uint16 gpios);
uint8 readGPIO(Cell_Module* module);
uint8 amsConfigBalancing(uint32 Channels);
uint8 amsStartBalancing(uint8 dutyCycle);
uint8 amsStopBalancing();
uint8 amsSelfTest();
uint8 amsConfigUnderVoltage(uint16 underVoltage);
uint8 amsCheckUnderOverVoltage(Cell_Module *module);
uint8 amsConfigOverVoltage(uint16 overVoltage);
uint8 amscheckOpenCellWire(Cell_Module *module);
uint8 amsClearStatus();
uint8 amsClearAux();
uint8 amsClearCells();
uint8 amsSendWarning();
uint8 amsSendError();
uint8 amsClearWarning();
uint8 amsClearError();
uint8 amsReadCellVoltages(Cell_Module *module);
#endif /* INC_ADBMS_ABSTRACTION_H_ */

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/*
* ADBMS_CMD_MAKROS.h
*
* Created on: 14.07.2022
* Author: max
*/
#ifndef INC_ADBMS_CMD_MAKROS_H_
#define INC_ADBMS_CMD_MAKROS_H_
#define WRCFGA 0x0001 //Write Configuration Register Group A
#define RDCFGA 0x0002 //Read Configuration Register Group A
#define WRCFGB 0x0024 //Write Configuration Register Group B
#define RDCFGB 0x0026 //Read Configuration Register Group B
#define RDCVA 0x0004 //Read Cell Voltage Register Group A
#define RDCVB 0x0006 //Read Cell Voltage Register Group B
#define RDCVC 0x0008 //Read Cell Voltage Register Group C
#define RDCVD 0x000A //Read Cell Voltage Register Group D
#define RDCVE 0x0009 //Read Cell Voltage Register Group E
#define RDCVF 0x000B //Read Cell Voltage Register Group F
#define RDAUXA 0x000C //Read Auxilliary Register Group A
#define RDAUXB 0x000E //Read Auxilliary Register Group B
#define RDAUXC 0x000D //Read Auxilliary Register Group C
#define RDAUXD 0x000F //Read Auxilliary Register Group D
#define RDSTATA 0x0010//Read Status Register Group A
#define RDSTATB 0x0012//Read Status Register Group B
#define WRSCTRL 0x0014 //Write S Control Register Group
#define WRPWM 0x0020//Write PWM Register Group
#define WRPSB 0x001A //Write PWM/S Control Register Group
#define RDSCTRL 0x0016 //Read S Control Register Group
#define RDPWM 0x0022//Read PWM Register Group
#define RDPSB 0x001E //Read PWM/S Control Register Group B
#define STSCTRL 0x0019 //Start S Control Pulsing and Poll Status
#define CLRSCTRL 0x0018 //Clear S Control Register Group
#define ADCV 0x0260 //Start Cell Voltage Conversion
#define ADOW 0x0228 //Start Open Wire ADC Conversion and Poll Status
#define CVST 0x0207//Start Self Test Cell Voltage Conversion and Poll Status
#define ADOL 0x201//Start Overlap Measurement of Cell 7 and 13 Voltages
#define ADAX 0x460 //Start GPIOs ADC Conversion and Poll Status
#define ADAXD 0x400 //Start GPIOs ADC Conversion with Digital Redundancy and Poll Status
#define AXOW 0x410 //Start GPIOs Open Wire ADC Conversion and Poll Status
#define AXST 0x407 //Start Self Test GPIOs Conversion and Poll Status
#define ADSTAT 0x468 //Start Status Group ADC Conversion and Poll Status
#define ADSTATD 0x408//Start Status Group ADC Conversion with Digital Redundany and Poll Status
#define STATST 0x40F //Start Self Test Status Group Conversion and Poll Status
#define ADCVAX 0x46F//Start Combiinden Cell Voltage and GPIO 1, GPIO2, Conversion and Poll Status
#define ADCVSC 0x467//Start Combined Cell Voltage and SC Conversion and Poll Status
#define CLRCELL 0x711//Clear Cell Voltage Register Groups
#define CLRAUX 0x712//Clear Auxiliary Register Groups
#define CLRSTAT 0x713//Clear Status Register Groups
#define PLADC 0x714//Poll ADC Conversion Status
#define DIAGN 0x715//Diagnos MUX and Poll Status
#define WRCOMM 0x721//Write COMM Register Group
#define RDCOMM 0x722//Read COMM Register Group
#define STCOMM 0x723//Start I2C/SPI Communication
#define MUTE 0x28//Mute Discharge
#define UNMUTE 0x29//Unmute Discharge
/*ADC Modes
* ADCOPT(CFGAR0,Bit 0) = 0 ADCOPT(CFGAR0,Bit 0) = 1
* 00 422Hz mode 1kHz mode
* 01 27kHz mode (fast) 14kHz mode
* 10 7kHz mode (normal) 3kHz mode
* 11 26Hz mode (filtered) 2kHz mode
*/
#define MD00 (0x00<<7)
#define MD01 (0x01<<7)
#define MD10 (0x02<<7)
#define MD11 (0x03<<7)
//Discharge Permitted if DCP = 1
#define DCP (0x01<<4)
/*Cell Selection for ADC Conversion
* 000: All Cells
* 001: Cells 1,7,13
* 010: Cells 2,8,14
* 011: Cells 3,9,15
* 100: Cells 4,10,16
* 101: Cells 5,11,17
* 110: Cells 6,12,18
*/
#define CH000 (0x00)
#define CH001 (0x01)
#define CH010 (0x02)
#define CH011 (0x03)
#define CH100 (0x04)
#define CH101 (0x05)
#define CH110 (0x06)
/* Pull-Up/Pull-Down Current for Open Wire Conversion
* 0 Pull down current
* 1 Pull up current
*/
#define PUP (0x01<<6)
/*Self Test Mode Selection
* ST01 for Self Test 1
* ST02 for Self Test 2
* for value consultate Datasheet
*/
#define ST01 (0x01<<5)
#define ST10 (0x02<<5)
/* GPIO Selection for ADC Converion
* 000: GPIO1 to 5, 2nd Reference, GPIO 6 to 9
* 001: GPIO1 and GPIO6
* 010 GPIO2 and GPIO7
* 011 GPIO3 and GPIO8
* 100 GPIO4 and GPIO9
* 101 GPIO5
* 110 2nd Reference
*/
#define CHG000 (0x00)
#define CHG001 (0x01)
#define CHG010 (0x02)
#define CHG011 (0x03)
#define CHG100 (0x04)
#define CHG101 (0x05)
#define CHG110 (0x06)
/* Status Group Selection
* 000: SC,ITMP,VA,VD
* 001: SC
* 010: ITMP
* 011: VA
* 100: VD
*/
#define CHST000 (0x00)
#define CHST001 (0x01)
#define CHST010 (0x02)
#define CHST011 (0x03)
#define CHST100 (0x04)
#define PEC_FIELD_SIZE 2
#define CFG_GROUP_A_SIZE 6
#define CFG_GROUP_B_SIZE 6
#define CV_GROUP_A_SIZE 6
#define CV_GROUP_B_SIZE 6
#define CV_GROUP_C_SIZE 6
#define CV_GROUP_D_SIZE 6
#define CV_GROUP_E_SIZE 6
#define CV_GROUP_F_SIZE 6
#define AUX_GROUP_A_SIZE 6
#define AUX_GROUP_B_SIZE 6
#define AUX_GROUP_C_SIZE 6
#define AUX_GROUP_D_SIZE 6
#define STATUS_GROUP_A_SIZE 6
#define STATUS_GROUP_B_SIZE 6
#define COMM_GROUP_SIZE 6
#define S_CONTROL_GROUP_SIZE 6
#define PWM_GROUP_SIZE 6
#define PWM_S_CONTROL_GROUP_B_SIZE 6
#define CFG_GROUP_A_ID 1
#define CFG_GROUP_B_ID 2
#define CV_GROUP_A_ID 3
#define CV_GROUP_B_ID 4
#define CV_GROUP_C_ID 5
#define CV_GROUP_D_ID 6
#define CV_GROUP_E_ID 7
#define CV_GROUP_F_ID 8
#define AUX_GROUP_A_ID 9
#define AUX_GROUP_B_ID 10
#define AUX_GROUP_C_ID 11
#define AUX_GROUP_D_ID 12
#define STATUS_GROUP_A_ID 13
#define STATUS_GROUP_B_ID 14
#define COMM_GROUP_ID 15
#define S_CONTROL_GROUP_ID 16
#define PWM_GROUP_ID 17
#define PWM_S_CONTROL_GROUP_B_ID 18
#endif /* INC_ADBMS_CMD_MAKROS_H_ */

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/*
* ADBMS_LL_Driver.h
*
* Created on: 05.06.2022
* Author: max
*/
#ifndef ADBMS_LL_DRIVER_H_
#define ADBMS_LL_DRIVER_H_
#define TARGET_STM32
#include "main.h"
#ifdef TARGET_STM32
typedef uint8_t uint8;
typedef uint16_t uint16;
typedef uint32_t uint32;
#endif
uint8 adbmsDriverInit();
uint8 calculatePEC(uint8* data, uint8 datalen);
uint16 updatePEC(uint16 currentPEC, uint8 din);
uint8 checkPEC(uint8* data, uint8 datalen);
uint8 writeCMD(uint16 command, uint8* args, uint8 arglen);
uint8 readCMD(uint16 command, uint8* buffer, uint8 buflen);
void mcuAdbmsCSLow();
void mcuAdbmsCSHigh();
uint8 mcuSPITransmit(uint8* buffer, uint8 buffersize);
uint8 mcuSPIReceive(uint8* buffer, uint8 buffersize);
uint8 mcuSPITransmitReceive(uint8* rxbuffer, uint8* txbuffer, uint8 buffersize);
uint8 wakeUpCmd();
void mcuDelay(uint16 delay);
#endif /* ADBMS_LL_DRIVER_H_ */

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/*
* AMS_CAN.h
*
* Created on: Mar 19, 2022
* Author: jasper
*/
#ifndef INC_AMS_CAN_H_
#define INC_AMS_CAN_H_
#include "main.h"
#include "stm32f3xx_hal.h"
#include "stm32f3xx_hal_can.h"
#include "stm32f3xx_hal_def.h"
#include <stdint.h>
#define CAN_ID_SLAVE_ERROR 0x001
#define CAN_ID_CLOCK_SYNC 0x002
#define CAN_ID_MASTER_HEARTBEAT 0x010
#define CAN_ID_AMS_SLAVE_HEARTBEAT_BASE 0x600
#define CAN_HEARTBEAT_TX_TIMEOUT 10
/* ms */
#define BMS_IN_TEST_MODE 1 // set to test the BMS use < sudo ip link set can0 up type can bitrate 500000 > // Use for Test Mode only for reducing weight of the handler
#define BMS_TEST_ID 0
extern CAN_HandleTypeDef* ams_can_handle;
void ams_can_init(CAN_HandleTypeDef* ams, CAN_HandleTypeDef* car);
void ams_can_handle_ams_msg(CAN_RxHeaderTypeDef* header, uint8_t* data);
void ams_can_send_heartbeat();
/**
* @brief Send an AMS Error via CAN.
*
* @param error_code The kind of error
* @param transmission_timeout How long to wait for the transmission to complete
* after starting it (in ms). Set to 0 for no wait.
*/
/*void ams_can_send_error(AMS_ErrorCode error_code,
uint32_t transmission_timeout);*/
HAL_StatusTypeDef ams_can_wait_for_free_mailboxes(CAN_HandleTypeDef* handle,
int num_mailboxes,
uint32_t timeout);
#endif /* INC_AMS_CAN_H_ */

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/*
* AMS_HighLevel.h
*
* Created on: 20.07.2022
* Author: max
*/
#ifndef INC_AMS_HIGHLEVEL_H_
#define INC_AMS_HIGHLEVEL_H_
#include "ADBMS_Abstraction.h"
#include "ADBMS_LL_Driver.h"
#include "ADBMS_CMD_MAKROS.h"
typedef enum {AMSDEACTIVE, AMSIDLE, AMSCHARGING, AMSIDLEBALANCING, AMSDISCHARGING, AMSWARNING, AMSERROR} amsState;
extern amsState currentAMSState;
extern Cell_Module module;
extern uint32_t balancedCells;
extern uint8_t BalancingActive;
extern uint8_t stateofcharge;
extern uint8_t amserrorcode;
extern uint8_t amswarningcode;
extern uint8_t numberofCells;
extern uint8_t numberofAux;
void AMS_Init();
void AMS_Loop();
uint8_t AMS_Balancing_Loop();
uint8_t AMS_Idle_Loop();
uint8_t AMS_Warning_Loop();
uint8_t AMS_Error_Loop();
uint8_t AMS_Charging_Loop();
uint8_t AMS_Discharging_Loop();
uint8_t writeWarningLog(uint8_t warningCode);
uint8_t writeErrorLog(uint8_t errorCode);
uint8_t integrateCurrent();
#endif /* INC_AMS_HIGHLEVEL_H_ */

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/*
* Testbench.h
*
* Created on: 13.03.2023
* Author: david
*/
#ifndef SRC_TESTBENCH_H_
#define SRC_TESTBENCH_H_
#include "main.h"
#include "stm32f3xx_hal.h"
#include "stm32f3xx_hal_can.h"
#include "stm32f3xx_hal_def.h"
#include "ADBMS_Abstraction.h"
#include <stdint.h>
extern Cell_Module module;
#define CAN_TEST 0x1
#define VOLTAGE_TEST 0x2
#define TEMP_TEST 0x3
#define EPROM_TEST 0x4
#define BALANCING_TEST 0x5
void testLoop(uint8_t* action);
#endif /* SRC_TESTBENCH_H_ */

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/*
* common_defs.h
*
* Created on: 23 Mar 2022
* Author: Jasper
*/
#ifndef INC_COMMON_DEFS_H_
#define INC_COMMON_DEFS_H_
#define N_CELLS 17
#endif /* INC_COMMON_DEFS_H_ */

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/* USER CODE BEGIN Header */
/**
******************************************************************************
* @file : main.h
* @brief : Header for main.c file.
* This file contains the common defines of the application.
******************************************************************************
* @attention
*
* Copyright (c) 2023 STMicroelectronics.
* All rights reserved.
*
* This software is licensed under terms that can be found in the LICENSE file
* in the root directory of this software component.
* If no LICENSE file comes with this software, it is provided AS-IS.
*
******************************************************************************
*/
/* USER CODE END Header */
/* Define to prevent recursive inclusion -------------------------------------*/
#ifndef __MAIN_H
#define __MAIN_H
#ifdef __cplusplus
extern "C" {
#endif
/* Includes ------------------------------------------------------------------*/
#include "stm32f3xx_hal.h"
/* Private includes ----------------------------------------------------------*/
/* USER CODE BEGIN Includes */
/* USER CODE END Includes */
/* Exported types ------------------------------------------------------------*/
/* USER CODE BEGIN ET */
/* USER CODE END ET */
/* Exported constants --------------------------------------------------------*/
/* USER CODE BEGIN EC */
/* USER CODE END EC */
/* Exported macro ------------------------------------------------------------*/
/* USER CODE BEGIN EM */
/* USER CODE END EM */
/* Exported functions prototypes ---------------------------------------------*/
void Error_Handler(void);
/* USER CODE BEGIN EFP */
/* USER CODE END EFP */
/* Private defines -----------------------------------------------------------*/
#define CSB_Pin GPIO_PIN_4
#define CSB_GPIO_Port GPIOA
#define Status_0_Pin GPIO_PIN_13
#define Status_0_GPIO_Port GPIOB
#define Status_1_Pin GPIO_PIN_14
#define Status_1_GPIO_Port GPIOB
#define Status_2_Pin GPIO_PIN_15
#define Status_2_GPIO_Port GPIOB
#define Status_3_Pin GPIO_PIN_8
#define Status_3_GPIO_Port GPIOA
#define TMP_SCL_Pin GPIO_PIN_15
#define TMP_SCL_GPIO_Port GPIOA
#define TMP_SDA_Pin GPIO_PIN_7
#define TMP_SDA_GPIO_Port GPIOB
/* USER CODE BEGIN Private defines */
/* USER CODE END Private defines */
#ifdef __cplusplus
}
#endif
#endif /* __MAIN_H */

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/* USER CODE BEGIN Header */
/**
******************************************************************************
* @file stm32f3xx_hal_conf.h
* @brief HAL configuration file.
******************************************************************************
* @attention
*
* Copyright (c) 2016 STMicroelectronics.
* All rights reserved.
*
* This software is licensed under terms that can be found in the LICENSE file
* in the root directory of this software component.
* If no LICENSE file comes with this software, it is provided AS-IS.
*
******************************************************************************
*/
/* USER CODE END Header */
/* Define to prevent recursive inclusion -------------------------------------*/
#ifndef __STM32F3xx_HAL_CONF_H
#define __STM32F3xx_HAL_CONF_H
#ifdef __cplusplus
extern "C" {
#endif
/* Exported types ------------------------------------------------------------*/
/* Exported constants --------------------------------------------------------*/
/* ########################## Module Selection ############################## */
/**
* @brief This is the list of modules to be used in the HAL driver
*/
#define HAL_MODULE_ENABLED
/*#define HAL_ADC_MODULE_ENABLED */
/*#define HAL_CRYP_MODULE_ENABLED */
#define HAL_CAN_MODULE_ENABLED
/*#define HAL_CEC_MODULE_ENABLED */
/*#define HAL_NAND_MODULE_ENABLED */
/*#define HAL_NOR_MODULE_ENABLED */
/*#define HAL_PCCARD_MODULE_ENABLED */
/*#define HAL_SRAM_MODULE_ENABLED */
/*#define HAL_HRTIM_MODULE_ENABLED */
/*#define HAL_OPAMP_MODULE_ENABLED */
/*#define HAL_SDADC_MODULE_ENABLED */
/*#define HAL_TSC_MODULE_ENABLED */
/*#define HAL_COMP_MODULE_ENABLED */
/*#define HAL_CRC_MODULE_ENABLED */
/*#define HAL_CRYP_MODULE_ENABLED */
/*#define HAL_DAC_MODULE_ENABLED */
/*#define HAL_I2S_MODULE_ENABLED */
/*#define HAL_IWDG_MODULE_ENABLED */
/*#define HAL_LCD_MODULE_ENABLED */
/*#define HAL_LPTIM_MODULE_ENABLED */
/*#define HAL_RNG_MODULE_ENABLED */
/*#define HAL_RTC_MODULE_ENABLED */
#define HAL_SPI_MODULE_ENABLED
/*#define HAL_TIM_MODULE_ENABLED */
/*#define HAL_UART_MODULE_ENABLED */
/*#define HAL_USART_MODULE_ENABLED */
/*#define HAL_IRDA_MODULE_ENABLED */
/*#define HAL_SMARTCARD_MODULE_ENABLED */
/*#define HAL_SMBUS_MODULE_ENABLED */
/*#define HAL_WWDG_MODULE_ENABLED */
/*#define HAL_PCD_MODULE_ENABLED */
#define HAL_GPIO_MODULE_ENABLED
#define HAL_EXTI_MODULE_ENABLED
/* #define HAL_CAN_LEGACY_MODULE_ENABLED */
#define HAL_DMA_MODULE_ENABLED
#define HAL_RCC_MODULE_ENABLED
#define HAL_FLASH_MODULE_ENABLED
#define HAL_PWR_MODULE_ENABLED
#define HAL_CORTEX_MODULE_ENABLED
#define HAL_I2C_MODULE_ENABLED
/* ########################## HSE/HSI Values adaptation ##################### */
/**
* @brief Adjust the value of External High Speed oscillator (HSE) used in your application.
* This value is used by the RCC HAL module to compute the system frequency
* (when HSE is used as system clock source, directly or through the PLL).
*/
#if !defined (HSE_VALUE)
#define HSE_VALUE ((uint32_t)16000000) /*!< Value of the External oscillator in Hz */
#endif /* HSE_VALUE */
/**
* @brief In the following line adjust the External High Speed oscillator (HSE) Startup
* Timeout value
*/
#if !defined (HSE_STARTUP_TIMEOUT)
#define HSE_STARTUP_TIMEOUT ((uint32_t)100) /*!< Time out for HSE start up, in ms */
#endif /* HSE_STARTUP_TIMEOUT */
/**
* @brief Internal High Speed oscillator (HSI) value.
* This value is used by the RCC HAL module to compute the system frequency
* (when HSI is used as system clock source, directly or through the PLL).
*/
#if !defined (HSI_VALUE)
#define HSI_VALUE ((uint32_t)8000000) /*!< Value of the Internal oscillator in Hz*/
#endif /* HSI_VALUE */
/**
* @brief In the following line adjust the Internal High Speed oscillator (HSI) Startup
* Timeout value
*/
#if !defined (HSI_STARTUP_TIMEOUT)
#define HSI_STARTUP_TIMEOUT ((uint32_t)5000) /*!< Time out for HSI start up */
#endif /* HSI_STARTUP_TIMEOUT */
/**
* @brief Internal Low Speed oscillator (LSI) value.
*/
#if !defined (LSI_VALUE)
#define LSI_VALUE ((uint32_t)40000)
#endif /* LSI_VALUE */ /*!< Value of the Internal Low Speed oscillator in Hz
The real value may vary depending on the variations
in voltage and temperature. */
/**
* @brief External Low Speed oscillator (LSE) value.
*/
#if !defined (LSE_VALUE)
#define LSE_VALUE ((uint32_t)32768) /*!< Value of the External Low Speed oscillator in Hz */
#endif /* LSE_VALUE */
/**
* @brief Time out for LSE start up value in ms.
*/
#if !defined (LSE_STARTUP_TIMEOUT)
#define LSE_STARTUP_TIMEOUT ((uint32_t)5000) /*!< Time out for LSE start up, in ms */
#endif /* LSE_STARTUP_TIMEOUT */
/**
* @brief External clock source for I2S peripheral
* This value is used by the I2S HAL module to compute the I2S clock source
* frequency, this source is inserted directly through I2S_CKIN pad.
* - External clock generated through external PLL component on EVAL 303 (based on MCO or crystal)
* - External clock not generated on EVAL 373
*/
#if !defined (EXTERNAL_CLOCK_VALUE)
#define EXTERNAL_CLOCK_VALUE ((uint32_t)8000000) /*!< Value of the External oscillator in Hz*/
#endif /* EXTERNAL_CLOCK_VALUE */
/* Tip: To avoid modifying this file each time you need to use different HSE,
=== you can define the HSE value in your toolchain compiler preprocessor. */
/* ########################### System Configuration ######################### */
/**
* @brief This is the HAL system configuration section
*/
#define VDD_VALUE ((uint32_t)3300) /*!< Value of VDD in mv */
#define TICK_INT_PRIORITY ((uint32_t)15) /*!< tick interrupt priority (lowest by default) */
#define USE_RTOS 0
#define PREFETCH_ENABLE 1
#define INSTRUCTION_CACHE_ENABLE 0
#define DATA_CACHE_ENABLE 0
#define USE_SPI_CRC 0U
#define USE_HAL_ADC_REGISTER_CALLBACKS 0U /* ADC register callback disabled */
#define USE_HAL_CAN_REGISTER_CALLBACKS 0U /* CAN register callback disabled */
#define USE_HAL_COMP_REGISTER_CALLBACKS 0U /* COMP register callback disabled */
#define USE_HAL_CEC_REGISTER_CALLBACKS 0U /* CEC register callback disabled */
#define USE_HAL_DAC_REGISTER_CALLBACKS 0U /* DAC register callback disabled */
#define USE_HAL_SRAM_REGISTER_CALLBACKS 0U /* SRAM register callback disabled */
#define USE_HAL_SMBUS_REGISTER_CALLBACKS 0U /* SMBUS register callback disabled */
#define USE_HAL_NAND_REGISTER_CALLBACKS 0U /* NAND register callback disabled */
#define USE_HAL_NOR_REGISTER_CALLBACKS 0U /* NOR register callback disabled */
#define USE_HAL_PCCARD_REGISTER_CALLBACKS 0U /* PCCARD register callback disabled */
#define USE_HAL_HRTIM_REGISTER_CALLBACKS 0U /* HRTIM register callback disabled */
#define USE_HAL_I2C_REGISTER_CALLBACKS 0U /* I2C register callback disabled */
#define USE_HAL_UART_REGISTER_CALLBACKS 0U /* UART register callback disabled */
#define USE_HAL_USART_REGISTER_CALLBACKS 0U /* USART register callback disabled */
#define USE_HAL_IRDA_REGISTER_CALLBACKS 0U /* IRDA register callback disabled */
#define USE_HAL_SMARTCARD_REGISTER_CALLBACKS 0U /* SMARTCARD register callback disabled */
#define USE_HAL_WWDG_REGISTER_CALLBACKS 0U /* WWDG register callback disabled */
#define USE_HAL_OPAMP_REGISTER_CALLBACKS 0U /* OPAMP register callback disabled */
#define USE_HAL_RTC_REGISTER_CALLBACKS 0U /* RTC register callback disabled */
#define USE_HAL_SPI_REGISTER_CALLBACKS 0U /* SPI register callback disabled */
#define USE_HAL_I2S_REGISTER_CALLBACKS 0U /* I2S register callback disabled */
#define USE_HAL_TIM_REGISTER_CALLBACKS 0U /* TIM register callback disabled */
#define USE_HAL_TSC_REGISTER_CALLBACKS 0U /* TSC register callback disabled */
#define USE_HAL_PCD_REGISTER_CALLBACKS 0U /* PCD register callback disabled */
/* ########################## Assert Selection ############################## */
/**
* @brief Uncomment the line below to expanse the "assert_param" macro in the
* HAL drivers code
*/
/* #define USE_FULL_ASSERT 1U */
/* Includes ------------------------------------------------------------------*/
/**
* @brief Include module's header file
*/
#ifdef HAL_RCC_MODULE_ENABLED
#include "stm32f3xx_hal_rcc.h"
#endif /* HAL_RCC_MODULE_ENABLED */
#ifdef HAL_GPIO_MODULE_ENABLED
#include "stm32f3xx_hal_gpio.h"
#endif /* HAL_GPIO_MODULE_ENABLED */
#ifdef HAL_EXTI_MODULE_ENABLED
#include "stm32f3xx_hal_exti.h"
#endif /* HAL_EXTI_MODULE_ENABLED */
#ifdef HAL_DMA_MODULE_ENABLED
#include "stm32f3xx_hal_dma.h"
#endif /* HAL_DMA_MODULE_ENABLED */
#ifdef HAL_CORTEX_MODULE_ENABLED
#include "stm32f3xx_hal_cortex.h"
#endif /* HAL_CORTEX_MODULE_ENABLED */
#ifdef HAL_ADC_MODULE_ENABLED
#include "stm32f3xx_hal_adc.h"
#endif /* HAL_ADC_MODULE_ENABLED */
#ifdef HAL_CAN_MODULE_ENABLED
#include "stm32f3xx_hal_can.h"
#endif /* HAL_CAN_MODULE_ENABLED */
#ifdef HAL_CAN_LEGACY_MODULE_ENABLED
#include "stm32f3xx_hal_can_legacy.h"
#endif /* HAL_CAN_LEGACY_MODULE_ENABLED */
#ifdef HAL_CEC_MODULE_ENABLED
#include "stm32f3xx_hal_cec.h"
#endif /* HAL_CEC_MODULE_ENABLED */
#ifdef HAL_COMP_MODULE_ENABLED
#include "stm32f3xx_hal_comp.h"
#endif /* HAL_COMP_MODULE_ENABLED */
#ifdef HAL_CRC_MODULE_ENABLED
#include "stm32f3xx_hal_crc.h"
#endif /* HAL_CRC_MODULE_ENABLED */
#ifdef HAL_DAC_MODULE_ENABLED
#include "stm32f3xx_hal_dac.h"
#endif /* HAL_DAC_MODULE_ENABLED */
#ifdef HAL_FLASH_MODULE_ENABLED
#include "stm32f3xx_hal_flash.h"
#endif /* HAL_FLASH_MODULE_ENABLED */
#ifdef HAL_SRAM_MODULE_ENABLED
#include "stm32f3xx_hal_sram.h"
#endif /* HAL_SRAM_MODULE_ENABLED */
#ifdef HAL_NOR_MODULE_ENABLED
#include "stm32f3xx_hal_nor.h"
#endif /* HAL_NOR_MODULE_ENABLED */
#ifdef HAL_NAND_MODULE_ENABLED
#include "stm32f3xx_hal_nand.h"
#endif /* HAL_NAND_MODULE_ENABLED */
#ifdef HAL_PCCARD_MODULE_ENABLED
#include "stm32f3xx_hal_pccard.h"
#endif /* HAL_PCCARD_MODULE_ENABLED */
#ifdef HAL_HRTIM_MODULE_ENABLED
#include "stm32f3xx_hal_hrtim.h"
#endif /* HAL_HRTIM_MODULE_ENABLED */
#ifdef HAL_I2C_MODULE_ENABLED
#include "stm32f3xx_hal_i2c.h"
#endif /* HAL_I2C_MODULE_ENABLED */
#ifdef HAL_I2S_MODULE_ENABLED
#include "stm32f3xx_hal_i2s.h"
#endif /* HAL_I2S_MODULE_ENABLED */
#ifdef HAL_IRDA_MODULE_ENABLED
#include "stm32f3xx_hal_irda.h"
#endif /* HAL_IRDA_MODULE_ENABLED */
#ifdef HAL_IWDG_MODULE_ENABLED
#include "stm32f3xx_hal_iwdg.h"
#endif /* HAL_IWDG_MODULE_ENABLED */
#ifdef HAL_OPAMP_MODULE_ENABLED
#include "stm32f3xx_hal_opamp.h"
#endif /* HAL_OPAMP_MODULE_ENABLED */
#ifdef HAL_PCD_MODULE_ENABLED
#include "stm32f3xx_hal_pcd.h"
#endif /* HAL_PCD_MODULE_ENABLED */
#ifdef HAL_PWR_MODULE_ENABLED
#include "stm32f3xx_hal_pwr.h"
#endif /* HAL_PWR_MODULE_ENABLED */
#ifdef HAL_RTC_MODULE_ENABLED
#include "stm32f3xx_hal_rtc.h"
#endif /* HAL_RTC_MODULE_ENABLED */
#ifdef HAL_SDADC_MODULE_ENABLED
#include "stm32f3xx_hal_sdadc.h"
#endif /* HAL_SDADC_MODULE_ENABLED */
#ifdef HAL_SMARTCARD_MODULE_ENABLED
#include "stm32f3xx_hal_smartcard.h"
#endif /* HAL_SMARTCARD_MODULE_ENABLED */
#ifdef HAL_SMBUS_MODULE_ENABLED
#include "stm32f3xx_hal_smbus.h"
#endif /* HAL_SMBUS_MODULE_ENABLED */
#ifdef HAL_SPI_MODULE_ENABLED
#include "stm32f3xx_hal_spi.h"
#endif /* HAL_SPI_MODULE_ENABLED */
#ifdef HAL_TIM_MODULE_ENABLED
#include "stm32f3xx_hal_tim.h"
#endif /* HAL_TIM_MODULE_ENABLED */
#ifdef HAL_TSC_MODULE_ENABLED
#include "stm32f3xx_hal_tsc.h"
#endif /* HAL_TSC_MODULE_ENABLED */
#ifdef HAL_UART_MODULE_ENABLED
#include "stm32f3xx_hal_uart.h"
#endif /* HAL_UART_MODULE_ENABLED */
#ifdef HAL_USART_MODULE_ENABLED
#include "stm32f3xx_hal_usart.h"
#endif /* HAL_USART_MODULE_ENABLED */
#ifdef HAL_WWDG_MODULE_ENABLED
#include "stm32f3xx_hal_wwdg.h"
#endif /* HAL_WWDG_MODULE_ENABLED */
/* Exported macro ------------------------------------------------------------*/
#ifdef USE_FULL_ASSERT
/**
* @brief The assert_param macro is used for function's parameters check.
* @param expr If expr is false, it calls assert_failed function
* which reports the name of the source file and the source
* line number of the call that failed.
* If expr is true, it returns no value.
* @retval None
*/
#define assert_param(expr) ((expr) ? (void)0U : assert_failed((uint8_t *)__FILE__, __LINE__))
/* Exported functions ------------------------------------------------------- */
void assert_failed(uint8_t* file, uint32_t line);
#else
#define assert_param(expr) ((void)0U)
#endif /* USE_FULL_ASSERT */
#ifdef __cplusplus
}
#endif
#endif /* __STM32F3xx_HAL_CONF_H */

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/* USER CODE BEGIN Header */
/**
******************************************************************************
* @file stm32f3xx_it.h
* @brief This file contains the headers of the interrupt handlers.
******************************************************************************
* @attention
*
* Copyright (c) 2023 STMicroelectronics.
* All rights reserved.
*
* This software is licensed under terms that can be found in the LICENSE file
* in the root directory of this software component.
* If no LICENSE file comes with this software, it is provided AS-IS.
*
******************************************************************************
*/
/* USER CODE END Header */
/* Define to prevent recursive inclusion -------------------------------------*/
#ifndef __STM32F3xx_IT_H
#define __STM32F3xx_IT_H
#ifdef __cplusplus
extern "C" {
#endif
/* Private includes ----------------------------------------------------------*/
/* USER CODE BEGIN Includes */
/* USER CODE END Includes */
/* Exported types ------------------------------------------------------------*/
/* USER CODE BEGIN ET */
/* USER CODE END ET */
/* Exported constants --------------------------------------------------------*/
/* USER CODE BEGIN EC */
/* USER CODE END EC */
/* Exported macro ------------------------------------------------------------*/
/* USER CODE BEGIN EM */
/* USER CODE END EM */
/* Exported functions prototypes ---------------------------------------------*/
void NMI_Handler(void);
void HardFault_Handler(void);
void MemManage_Handler(void);
void BusFault_Handler(void);
void UsageFault_Handler(void);
void SVC_Handler(void);
void DebugMon_Handler(void);
void PendSV_Handler(void);
void SysTick_Handler(void);
void USB_LP_CAN_RX0_IRQHandler(void);
/* USER CODE BEGIN EFP */
/* USER CODE END EFP */
#ifdef __cplusplus
}
#endif
#endif /* __STM32F3xx_IT_H */

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/*
* ADBMS_Abstraction.c
*
* Created on: 14.07.2022
* Author: max
*/
#include "ADBMS_Abstraction.h"
uint8 numberofcells;
uint8 numberofauxchannels;
uint8 initAMS(SPI_HandleTypeDef* hspi, uint8 numofcells, uint8 numofaux)
{
adbmsDriverInit(hspi);
numberofcells = numofcells;
numberofauxchannels = numofaux;
amsWakeUp();
amsStopBalancing();
amsConfigOverVoltage(DEFAULT_OV);
amsConfigUnderVoltage(DEFAULT_UV);
amsConfigAuxMeasurement(0xFFFF);
return 0;
}
uint8 amsWakeUp()
{
uint8 buf[6];
readCMD(RDCFGA, buf, 6);
return 0;
}
uint8 amsCellMeasurement(Cell_Module *module)
{
uint8_t rxbuffer[CV_GROUP_A_SIZE];
writeCMD((ADCV | CH000 | MD10), rxbuffer, 0);
mcuDelay(5);
amsReadCellVoltages(module);
return 0;
}
uint8 amsConfigCellMeasurement(uint8 numberofChannels)
{
numberofcells = numberofChannels;
return 0;
}
uint8 amsAuxMeasurement(Cell_Module *module)
{
uint8 args;
uint8 rxbuf[AUX_GROUP_A_SIZE];
writeCMD(ADAX | MD01 | CHG000, &args, 0);
mcuDelay(5);
readCMD(RDAUXA, rxbuf, AUX_GROUP_A_SIZE);
module->auxVoltages[0] = rxbuf[0] | (rxbuf[1]<<8);
module->auxVoltages[1] = rxbuf[2] | (rxbuf[3]<<8);
module->auxVoltages[2] = rxbuf[4] | (rxbuf[5]<<8);
readCMD(RDAUXB, rxbuf, AUX_GROUP_A_SIZE);
module->auxVoltages[3] = rxbuf[0] | (rxbuf[1]<<8);
module->auxVoltages[4] = rxbuf[2] | (rxbuf[3]<<8);
module->refVoltage = rxbuf[4] | (rxbuf[5]<<8);
readCMD(RDAUXC, rxbuf, AUX_GROUP_A_SIZE);
module->auxVoltages[5] = rxbuf[0] | (rxbuf[1]<<8);
module->auxVoltages[6] = rxbuf[2] | (rxbuf[3]<<8);
module->auxVoltages[7] = rxbuf[4] | (rxbuf[5]<<8);
readCMD(RDAUXD, rxbuf, AUX_GROUP_A_SIZE);
module->auxVoltages[8] = rxbuf[0] | (rxbuf[1]<<8);
return 0;
}
uint8 amsInternalStatusMeasurement(Cell_Module *module)
{
uint8 rxbuffer[STATUS_GROUP_A_SIZE];
writeCMD(ADSTAT | MD01 | CHST000, rxbuffer, STATUS_GROUP_A_SIZE);
mcuDelay(5);
readCMD(RDSTATA, rxbuffer, STATUS_GROUP_A_SIZE);
module->sumOfCellMeasurements = rxbuffer[0] | (rxbuffer[1]<<8);
module->internalDieTemp = rxbuffer[2] | (rxbuffer[3]<<8);
module->analogSupplyVoltage = rxbuffer[4] | (rxbuffer[5]<<8);
readCMD(RDSTATB, rxbuffer, STATUS_GROUP_B_SIZE);
module->digitalSupplyVoltage = rxbuffer[0] | (rxbuffer[1]<<8);
return 0;
}
uint8 amsConfigAuxMeasurement(uint16 Channels)
{
uint8 buf[CFG_GROUP_A_SIZE];
readCMD(RDCFGA, buf, CFG_GROUP_A_SIZE);
buf[0] |= 0xF8;
writeCMD(WRCFGA, buf, CFG_GROUP_A_SIZE);
readCMD(RDCFGB, buf, CFG_GROUP_B_SIZE);
buf[0] |= 0x0F;
writeCMD(WRCFGB, buf, CFG_GROUP_B_SIZE);
return 0;
}
uint8 amsConfigGPIO(uint16 gpios)
{
return 0;
}
uint8 amsSetGPIO(uint16 gpios)
{
return 0;
}
uint8 readGPIO(Cell_Module* module)
{
return 0;
}
uint8 amsConfigBalancing(uint32 Channels)
{
uint8 regbuffer[CFG_GROUP_A_SIZE];
readCMD(RDCFGA, regbuffer, CFG_GROUP_A_SIZE);
regbuffer[4] = Channels & 0xFF;
regbuffer[5] &= 0xF0;
regbuffer[5] |= (Channels>>8) & 0x0F;
writeCMD(WRCFGA, regbuffer, CFG_GROUP_A_SIZE);
readCMD(RDCFGB, regbuffer, CFG_GROUP_B_SIZE);
regbuffer[0] &= 0x0F;
regbuffer[0] |= (Channels>>8) & 0xF0;
regbuffer[1] &= 0xFC;
regbuffer[1] |= 0x03 & (Channels>>16);
writeCMD(WRCFGB, regbuffer, CFG_GROUP_B_SIZE);
return 0;
}
uint8 amsStartBalancing(uint8 dutyCycle)
{
writeCMD(UNMUTE, NULL, 0);
return 0;
}
uint8 amsStopBalancing()
{
writeCMD(MUTE, NULL, 0);
return 0;
}
uint8 amsSelfTest()
{
return 0;
}
uint8 amsConfigUnderVoltage(uint16 underVoltage)
{
uint8 buffer[CFG_GROUP_A_SIZE];
readCMD(RDCFGA, buffer, CFG_GROUP_A_SIZE);
buffer[1] = (uint8) underVoltage & 0xFF;
uint8 ovuv = buffer[2] & 0xF0;
ovuv |= (uint8) (underVoltage >> 8) & 0x0F;
buffer[2] = ovuv;
writeCMD(WRCFGA, buffer, CFG_GROUP_A_SIZE);
return 0;
}
uint8 amsCheckUnderOverVoltage(Cell_Module *module)
{
uint8 regbuffer[STATUS_GROUP_B_SIZE];
uint32 overundervoltages = 0;
readCMD(RDSTATB, regbuffer, STATUS_GROUP_B_SIZE);
overundervoltages = regbuffer[2] | (regbuffer[3]<<8) | (regbuffer[4]<<16);
module->overVoltage = 0;
module->underVoltage = 0;
for(uint8 n = 0; n < 12; n++)
{
uint8 overvolt = (overundervoltages>>(2*n+1)) & 0x01;
uint8 undervolt = (overundervoltages>>(2*n))&0x01;
module->overVoltage |= overvolt<<n;
module->underVoltage |= undervolt<<n;
}
readCMD(RDAUXD,regbuffer,AUX_GROUP_D_SIZE);
overundervoltages = 0;
overundervoltages = regbuffer[4] | (regbuffer[5]<<8);
for(uint8 n = 0; n < 6; n++)
{
uint8 overvolt = (overundervoltages>>(2*n+1)) & 0x01;
uint8 undervolt = (overundervoltages>>(2*n))&0x01;
module->overVoltage |= (uint32) overvolt<<(n+12);
module->underVoltage |= (uint32) undervolt<<(n+12);
}
return 0;
}
uint8 amsConfigOverVoltage(uint16 overVoltage)
{
uint8 buffer[CFG_GROUP_B_SIZE];
readCMD(RDCFGA, buffer, CFG_GROUP_A_SIZE);
buffer[2] &= 0x0F;
buffer[2] |= (uint8) overVoltage << 4;
buffer[3] = (uint8)(overVoltage>>4);
writeCMD(WRCFGA, buffer, CFG_GROUP_A_SIZE);
return 0;
}
/*
void dumpRegister(UART_HandleTypeDef *huart, uint8 RegID, uint8* buffer)
{
switch(RegID)
{
case CFG_GROUP_A_ID:
readCMD(RDCFGA, buffer, CFG_GROUP_A_SIZE);
break;
case CFG_GROUP_B_ID:
readCMD(RDCFGB, buffer, CFG_GROUP_A_SIZE);
break;
case CV_GROUP_A_ID:
readCMD(RDCVA, buffer, CFG_GROUP_A_SIZE);
break;
case CV_GROUP_B_ID:
readCMD(RDCVB, buffer, CFG_GROUP_A_SIZE);
break;
case CV_GROUP_C_ID:
readCMD(RDCVC, buffer, CFG_GROUP_A_SIZE);
break;
case CV_GROUP_D_ID:
readCMD(RDCVD, buffer, CFG_GROUP_A_SIZE);
break;
case CV_GROUP_E_ID:
readCMD(RDCVE, buffer, CFG_GROUP_A_SIZE);
break;
case CV_GROUP_F_ID:
readCMD(RDCVF, buffer, CFG_GROUP_A_SIZE);
break;
case AUX_GROUP_A_ID:
readCMD(RDAUXA, buffer, CFG_GROUP_A_SIZE);
break;
case AUX_GROUP_B_ID:
readCMD(RDAUXB, buffer, CFG_GROUP_A_SIZE);
break;
case AUX_GROUP_C_ID:
readCMD(RDAUXC, buffer, CFG_GROUP_A_SIZE);
break;
case AUX_GROUP_D_ID:
readCMD(RDAUXD, buffer, CFG_GROUP_A_SIZE);
break;
case STATUS_GROUP_A_ID:
readCMD(RDSTATA, buffer, CFG_GROUP_A_SIZE);
break;
case STATUS_GROUP_B_ID:
readCMD(RDSTATB, buffer, CFG_GROUP_A_SIZE);
break;
case COMM_GROUP_ID:
readCMD(RDCOMM, buffer, CFG_GROUP_A_SIZE);
break;
case S_CONTROL_GROUP_ID:
readCMD(RDSCTRL, buffer, CFG_GROUP_A_SIZE);
break;
case PWM_GROUP_ID:
readCMD(RDPWM, buffer, CFG_GROUP_A_SIZE);
break;
case PWM_S_CONTROL_GROUP_B_ID:
readCMD(RDPSB, buffer, CFG_GROUP_A_SIZE);
break;
}
}
*/
uint8 amsClearStatus()
{
uint8 buffer[6];
writeCMD(CLRSTAT, buffer, 0);
return 0;
}
uint8 amsClearAux()
{
uint8 buffer[6];
writeCMD(CLRAUX, buffer, 0);
return 0;
}
uint8 amsClearCells()
{
uint8 buffer[6];
writeCMD(CLRCELL, buffer, 0);
return 0;
}
uint8 amsSendWarning()
{
//HAL_GPIO_WritePin(AMS_Warning_GPIO_Port, AMS_Warning_Pin, GPIO_PIN_SET);
return 0;
}
uint8 amsSendError()
{
//HAL_GPIO_WritePin(AMS_Error_GPIO_Port, AMS_Error_Pin, GPIO_PIN_SET);
return 0;
}
uint8 amsClearWarning()
{
//HAL_GPIO_WritePin(AMS_Warning_GPIO_Port, AMS_Warning_Pin, GPIO_PIN_RESET);
return 0;
}
uint8 amsClearError()
{
//HAL_GPIO_WritePin(AMS_Error_GPIO_Port, AMS_Error_Pin, GPIO_PIN_RESET);
return 0;
}
uint8 amscheckOpenCellWire(Cell_Module *module)
{
uint8 args;
uint16 cellspu[18];
writeCMD(ADOW |MD01|CH000|PUP , &args, 0); //run Pull Up at least Twice
HAL_Delay(5);
writeCMD(ADOW |MD01|CH000|PUP , &args, 0); //run Pull Up at least Twice
HAL_Delay(5);
amsReadCellVoltages(module);
for(uint8_t n = 0; n <numberofcells; n++)
{
cellspu[n] = module->cellVoltages[n];
}
writeCMD(ADOW |MD01|CH000, &args, 0); //run Pull Up at least Twice
HAL_Delay(5);
writeCMD(ADOW |MD01|CH000, &args, 0); //run Pull Up at least Twice
HAL_Delay(5);
amsReadCellVoltages(module);
for(uint8 n = 1; n < numberofcells; n++)
{
int dv = cellspu[n]-module->cellVoltages[n];
if(dv < -4000)
{
return (1+n);
}
}
if((cellspu[0] == 0) || (cellspu[0] == 0xFFFF))
{
return 1;
}
if(module->cellVoltages[numberofcells-1] == 0)
{
return 19;
}
return 0;
}
uint8 amsReadCellVoltages(Cell_Module *module)
{
uint8 rxbuffer[CV_GROUP_A_SIZE];
readCMD(RDCVA, rxbuffer, CV_GROUP_A_SIZE);
module->cellVoltages[0] = rxbuffer[0] | (rxbuffer[1]<<8);
module->cellVoltages[1] = rxbuffer[2] | (rxbuffer[3]<<8);
module->cellVoltages[2] = rxbuffer[4] | (rxbuffer[5]<<8);
readCMD(RDCVB, rxbuffer, CV_GROUP_A_SIZE);
module->cellVoltages[3] = rxbuffer[0] | (rxbuffer[1]<<8);
module->cellVoltages[4] = rxbuffer[2] | (rxbuffer[3]<<8);
module->cellVoltages[5] = rxbuffer[4] | (rxbuffer[5]<<8);
readCMD(RDCVC, rxbuffer, CV_GROUP_A_SIZE);
module->cellVoltages[6] = rxbuffer[0] | (rxbuffer[1]<<8);
module->cellVoltages[7] = rxbuffer[2] | (rxbuffer[3]<<8);
module->cellVoltages[8] = rxbuffer[4] | (rxbuffer[5]<<8);
readCMD(RDCVD, rxbuffer, CV_GROUP_A_SIZE);
module->cellVoltages[9] = rxbuffer[0] | (rxbuffer[1]<<8);
module->cellVoltages[10] = rxbuffer[2] | (rxbuffer[3]<<8);
module->cellVoltages[11] = rxbuffer[4] | (rxbuffer[5]<<8);
readCMD(RDCVE, rxbuffer, CV_GROUP_A_SIZE);
module->cellVoltages[12] = rxbuffer[0] | (rxbuffer[1]<<8);
module->cellVoltages[13] = rxbuffer[2] | (rxbuffer[3]<<8);
module->cellVoltages[14] = rxbuffer[4] | (rxbuffer[5]<<8);
readCMD(RDCVF, rxbuffer, CV_GROUP_A_SIZE);
module->cellVoltages[15] = rxbuffer[0] | (rxbuffer[1]<<8);
module->cellVoltages[16] = rxbuffer[2] | (rxbuffer[3]<<8);
module->cellVoltages[17] = rxbuffer[4] | (rxbuffer[5]<<8);
return 0;
}

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/*
* ADBMS_LL_Driver.c
*
* Created on: 05.06.2022
* Author: max
*/
#include "ADBMS_LL_Driver.h"
#define INITAL_PEC 0x0010
#define ADBMS_SPI_TIMEOUT 1000 //Timeout in ms
SPI_HandleTypeDef* adbmsspi;
uint8 adbmsDriverInit(SPI_HandleTypeDef* hspi)
{
mcuAdbmsCSLow();
HAL_Delay(1);
mcuAdbmsCSHigh();
adbmsspi = hspi;
return 0;
}
uint8 calculatePEC(uint8_t* data, uint8_t datalen)
{
uint16 currentpec = INITAL_PEC;
if(datalen >= 3)
{
for(int i = 0; i < (datalen-2); i++)
{
for(int n = 0; n < 8;n++)
{
uint8 din = data[i] << (n);
currentpec = updatePEC(currentpec, din);
}
}
data[datalen-2] = (currentpec>>7) & 0xFF;
data[datalen-1] = (currentpec<<1) & 0xFF;
return 0;
}
else
{
return 1;
}
}
uint8 checkPEC(uint8* data, uint8 datalen)
{
if(datalen <= 3)
{
return 255;
}
uint16 currentpec = INITAL_PEC;
for(int i = 0; i < (datalen-2); i++)
{
for(int n = 0; n < 8;n++)
{
uint8 din = data[i] << (n);
currentpec = updatePEC(currentpec, din);
}
}
uint8 pechigh = (currentpec>>7) & 0xFF;
uint8 peclow = (currentpec<<1) & 0xFF;
if((pechigh == data[datalen-2]) && (peclow == data[datalen-1]))
{
return 0;
}
return 1;
}
uint16 updatePEC(uint16 currentPEC, uint8 din)
{
din = (din>>7) & 0x01;
uint8 in0 = din ^ ((currentPEC >> 14) &0x01);
uint8 in3 = in0 ^ ((currentPEC >> 2) &0x01);
uint8 in4 = in0 ^ ((currentPEC >> 3) &0x01);
uint8 in7 = in0 ^ ((currentPEC >> 6) &0x01);
uint8 in8 = in0 ^ ((currentPEC >> 7) &0x01);
uint8 in10 = in0 ^ ((currentPEC >> 9) &0x01);
uint8 in14 = in0 ^ ((currentPEC >> 13) &0x01);
uint16 newPEC = 0;
newPEC |= in14<<14;
newPEC |= (currentPEC & (0x01<<12))<<1;
newPEC |= (currentPEC & (0x01<<11))<<1;
newPEC |= (currentPEC & (0x01<<10))<<1;
newPEC |= in10<<10;
newPEC |= (currentPEC & (0x01<<8))<<1;
newPEC |= in8<<8;
newPEC |= in7<<7;
newPEC |= (currentPEC & (0x01<<5))<<1;
newPEC |= (currentPEC & (0x01<<4))<<1;
newPEC |= in4<<4;
newPEC |= in3<<3;
newPEC |= (currentPEC & (0x01<<1))<<1;
newPEC |= (currentPEC & (0x01))<<1;
newPEC |= in0;
return newPEC;
}
uint8 writeCMD(uint16 command, uint8* args, uint8 arglen)
{
if(arglen > 0)
{
uint8 buffer[6+arglen];
buffer[0] = (command >> 8) & 0xFF;
buffer[1] = (command) & 0xFF;
calculatePEC(buffer, 4);
for(uint8 i = 0; i < arglen; i++)
{
buffer[4+i] = args[i];
}
calculatePEC(&buffer[4], arglen+2); //Calculate PEC of Data Part with offset of 4 Bytes for CMD and CMD PEC
mcuAdbmsCSLow();
mcuSPITransmit(buffer, 6+arglen);
mcuAdbmsCSHigh();
}
else
{
uint8 buffer[4];
buffer[0] = (command >> 8) & 0xFF;
buffer[1] = (command) & 0xFF;
calculatePEC(buffer, 4);
mcuAdbmsCSLow();
mcuSPITransmit(buffer, 4);
mcuAdbmsCSHigh();
}
return 0;
}
uint8 readCMD(uint16 command, uint8* buffer, uint8 buflen)
{
//uint8* txbuffer = (uint8*) malloc(6+buflen);
//uint8* rxbuffer = (uint8*) malloc(6+buflen);
uint8 txbuffer[6+buflen];
uint8 rxbuffer[6+buflen];
txbuffer[0] = (command >> 8) & 0xFF;
txbuffer[1] = (command) & 0xFF;
calculatePEC(txbuffer, 4);
mcuAdbmsCSLow();
mcuSPITransmitReceive(rxbuffer, txbuffer, 6+buflen);
mcuAdbmsCSHigh();
for(uint8 i = 0; i<buflen; i++)
{
buffer[i] = rxbuffer[i+4];
}
uint8 peccheck = checkPEC(&rxbuffer[4], buflen+2);
//free(txbuffer);
//free(rxbuffer);
if(peccheck == 0)
return 0;
else
{
static int err_cnt = 0;
if (err_cnt++ > 100) {
Error_Handler();
} else {
return 1;
}
}
}
void mcuAdbmsCSLow()
{
HAL_GPIO_WritePin(CSB_GPIO_Port, CSB_Pin, GPIO_PIN_RESET);
}
void mcuAdbmsCSHigh()
{
HAL_GPIO_WritePin(CSB_GPIO_Port, CSB_Pin, GPIO_PIN_SET);
}
uint8 mcuSPITransmit(uint8* buffer, uint8 buffersize)
{
HAL_StatusTypeDef status;
//status = HAL_SPI_Transmit(adbmsspi, buffer, buffersize, ADBMS_SPI_TIMEOUT);
//uint8 *rxbuf = (uint8*) malloc(buffersize);
uint8 rxbuf[buffersize];
status = HAL_SPI_TransmitReceive(adbmsspi, buffer, rxbuf, buffersize, ADBMS_SPI_TIMEOUT);
__HAL_SPI_CLEAR_OVRFLAG(adbmsspi);
//free(rxbuf);
return status;
}
uint8 mcuSPIReceive(uint8* buffer, uint8 buffersize)
{
HAL_StatusTypeDef status;
status = HAL_SPI_Receive(adbmsspi, buffer, buffersize, ADBMS_SPI_TIMEOUT);
return status;
}
uint8 mcuSPITransmitReceive(uint8* rxbuffer, uint8* txbuffer, uint8 buffersize)
{
HAL_StatusTypeDef status;
status = HAL_SPI_TransmitReceive(adbmsspi, txbuffer, rxbuffer, buffersize, ADBMS_SPI_TIMEOUT);
return status;
}
inline void mcuDelay(uint16 delay)
{
HAL_Delay(delay);
}

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/*
* AMS_CAN.c
*
* Created on: Mar 19, 2022
* Author: jasper
*/
#include "AMS_CAN.h"
#include "ADBMS_Abstraction.h"
#include "common_defs.h"
#include "main.h"
#include "AMS_HighLevel.h"
#include "stm32f3xx.h"
#include "stm32f3xx_hal.h"
#include "stm32f3xx_hal_can.h"
#include <stdint.h>
int PENDING_MESSAGE_HANDLE = 0;
uint8_t canTestData[8] = {0,0,0,0,0,0,0,0};
CAN_HandleTypeDef* ams_can_handle;
void ams_can_init(CAN_HandleTypeDef* ams_handle,
CAN_HandleTypeDef* car_handle) {
ams_can_handle = ams_handle;
// Start peripheral
if (HAL_CAN_Start(ams_can_handle) != HAL_OK) {
ams_can_handle = car_handle;
if (HAL_CAN_Start(ams_can_handle) != HAL_OK) {
Error_Handler();
}
}
// Config filter
CAN_FilterTypeDef can_filter;
can_filter.FilterActivation = CAN_FILTER_ENABLE;
can_filter.FilterBank = 0;
can_filter.FilterFIFOAssignment = CAN_FILTER_FIFO0;
/* Message ID is in the MSBs of the FilterId register */
can_filter.FilterIdHigh = CAN_ID_CLOCK_SYNC << (16 - 11);
can_filter.FilterIdLow = 0;
/* Filter the 11 MSBs (i.e. a StdId) */
if(BMS_IN_TEST_MODE == 1){
can_filter.FilterMaskIdHigh = BMS_TEST_ID; // alleNachrichtenIds werden akzeptiert
}else{
can_filter.FilterMaskIdHigh = 0xFFE0;
}
can_filter.FilterMaskIdLow = 0;
can_filter.FilterMode = CAN_FILTERMODE_IDMASK;
can_filter.FilterScale = CAN_FILTERSCALE_32BIT;
can_filter.SlaveStartFilterBank = 0;
if (HAL_CAN_ConfigFilter(ams_can_handle, &can_filter) != HAL_OK) {
Error_Handler();
}
can_filter.FilterBank++;
can_filter.FilterIdHigh = CAN_ID_MASTER_HEARTBEAT << (16 - 11);
can_filter.FilterIdLow = 0;
if (HAL_CAN_ConfigFilter(ams_can_handle, &can_filter) != HAL_OK) {
Error_Handler();
}
// Activate RX notifications
if (HAL_CAN_ActivateNotification(ams_can_handle,
CAN_IT_RX_FIFO0_MSG_PENDING) != HAL_OK) {
Error_Handler();
}
}
static int cb_triggered = 0;
void HAL_CAN_RxFifo0MsgPendingCallback(CAN_HandleTypeDef* handle) {
static CAN_RxHeaderTypeDef header;
static uint8_t data[8];
cb_triggered = 1;
if (HAL_CAN_GetRxMessage(handle, CAN_RX_FIFO0, &header, data) != HAL_OK) {
Error_Handler();
}
if (handle == ams_can_handle) {
ams_can_handle_ams_msg(&header, data);
} else {
Error_Handler();
}
}
void ams_can_handle_ams_msg(CAN_RxHeaderTypeDef* header, uint8_t* data) {
if(BMS_IN_TEST_MODE == 1){
PENDING_MESSAGE_HANDLE = 1;
for(int i = 0; i < 8; i++){
canTestData[i] = data[i];
}
return;
}
if (header->IDE != CAN_ID_STD) {
return;
}
switch (header->StdId) {
case CAN_ID_CLOCK_SYNC:
// clock_sync_handle_clock_sync_frame(data[0]);
break;
case CAN_ID_MASTER_HEARTBEAT:
// clock_sync_handle_master_heartbeat();
break;
}
}
void ams_can_send_heartbeat() {
static CAN_TxHeaderTypeDef header;
static uint8_t data[8];
header.IDE = CAN_ID_STD;
header.DLC = 8;
header.RTR = CAN_RTR_DATA;
header.TransmitGlobalTime = DISABLE;
// Send voltages
for (int msg_id = 0; msg_id < 5; msg_id++) {
header.StdId = CAN_ID_AMS_SLAVE_HEARTBEAT_BASE | (0 << 4) | msg_id; //TODO: Use slave_id/new format
for (int i = 0; i < 4; i++) {
int cell = msg_id * 4 + i;
uint16_t v = (cell < N_CELLS) ? module.cellVoltages[cell] : 0;
data[2 * i + 0] = v & 0xFF;
data[2 * i + 1] = v >> 8;
}
if (ams_can_wait_for_free_mailboxes(ams_can_handle, 1,
CAN_HEARTBEAT_TX_TIMEOUT) == HAL_OK) {
uint32_t mailbox;
HAL_CAN_AddTxMessage(ams_can_handle, &header, data, &mailbox);
}
}
// Send temperatures
/*for (int temp_msg_id = 0; temp_msg_id < 8; temp_msg_id++) {
int msg_id = temp_msg_id + 3;
header.StdId = CAN_ID_AMS_SLAVE_HEARTBEAT_BASE | (slave_id << 4) | msg_id;
for (int i = 0; i < 4; i++) {
int sensor = temp_msg_id * 4 + i;
uint16_t temp = temperatures[sensor];
data[2 * i + 0] = temp & 0xFF;
data[2 * i + 1] = temp >> 8;
}
if (ams_can_wait_for_free_mailboxes(ams_can_handle, 1,
CAN_HEARTBEAT_TX_TIMEOUT) == HAL_OK) {
uint32_t mailbox;
HAL_CAN_AddTxMessage(ams_can_handle, &header, data, &mailbox);
}
}*/
}
/*void ams_can_send_error(AMS_ErrorCode error_code,
uint32_t transmission_timeout) {
static CAN_TxHeaderTypeDef header;
header.IDE = CAN_ID_STD;
header.DLC = 8;
header.RTR = CAN_RTR_DATA;
header.TransmitGlobalTime = DISABLE;
header.StdId = CAN_ID_SLAVE_ERROR;
static uint8_t data[8];
data[0] = slave_id;
data[1] = error_code;
HAL_CAN_AbortTxRequest(ams_can_handle,
CAN_TX_MAILBOX0 | CAN_TX_MAILBOX1 | CAN_TX_MAILBOX2);
uint32_t mailbox;
HAL_CAN_AddTxMessage(ams_can_handle, &header, data, &mailbox);
ams_can_wait_for_free_mailboxes(ams_can_handle, 3, transmission_timeout);
}*/
HAL_StatusTypeDef ams_can_wait_for_free_mailboxes(CAN_HandleTypeDef* handle,
int num_mailboxes,
uint32_t timeout) {
uint32_t end = HAL_GetTick() + timeout;
while (HAL_GetTick() < end) {
if (HAL_CAN_GetTxMailboxesFreeLevel(handle) >= num_mailboxes) {
return HAL_OK;
}
}
return HAL_TIMEOUT;
}

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/*
* AMS_HighLevel.c
*
* Created on: 20.07.2022
* Author: max
*/
#include "AMS_HighLevel.h"
Cell_Module module;
uint32_t balancedCells = 0;
uint8_t BalancingActive = 0;
uint8_t stateofcharge = 100;
int64_t currentintegrator = 0;
uint32_t lastticks = 0;
uint32_t currenttick = 0;
uint8_t eepromconfigured = 0;
uint8_t internalbalancingalgo = 1;
uint16_t startbalancingthreshold = 41000;
uint16_t stopbalancingthreshold = 30000;
uint16_t balancingvoltagedelta = 10;
uint16_t amsuv = 0;
uint16_t amsov = 0;
uint8_t amserrorcode = 0;
uint8_t amswarningcode = 0;
uint8_t numberofCells = 17;
uint8_t numberofAux = 0;
amsState currentAMSState = AMSDEACTIVE;
amsState lastAMSState = AMSDEACTIVE;
void AMS_Init(SPI_HandleTypeDef *hspi)
{
if(eepromconfigured == 1)
{
/*amsov = eepromcellovervoltage>>4;
amsuv = (eepromcellundervoltage-1)>>4;
numberofCells = eepromnumofcells;
numberofAux = eepromnumofaux;
initAMS(hspi, eepromnumofcells, eepromnumofaux);*/
amsConfigOverVoltage(amsov);
amsConfigUnderVoltage(amsuv);
}
else
{
initAMS(hspi, numberofCells, numberofAux);
amsov = DEFAULT_OV;
amsuv = DEFAULT_UV;
}
currentAMSState = AMSIDLE;
}
void AMS_Loop()
{
//On Transition Functions called ones if the State Changed
if(currentAMSState != lastAMSState)
{
switch(currentAMSState)
{
case AMSIDLE:
break;
case AMSDEACTIVE:
break;
case AMSCHARGING:
break;
case AMSIDLEBALANCING:
break;
case AMSDISCHARGING:
break;
case AMSWARNING:
writeWarningLog(0x01);
break;
case AMSERROR:
writeErrorLog(amserrorcode);
break;
}
lastAMSState = currentAMSState;
}
//Main Loops for different AMS States
switch(currentAMSState)
{
case AMSIDLE:
AMS_Idle_Loop();
break;
case AMSDEACTIVE:
break;
case AMSCHARGING:
break;
case AMSIDLEBALANCING:
AMS_Idle_Loop();
break;
case AMSDISCHARGING:
break;
case AMSWARNING:
AMS_Warning_Loop();
break;
case AMSERROR:
break;
}
}
uint8_t AMS_Idle_Loop()
{
amsWakeUp();
amsConfigOverVoltage(amsov);
amsConfigUnderVoltage(amsuv);
amsConfigAuxMeasurement(0xFFFF);
amsClearAux();
amsCellMeasurement(&module);
amsInternalStatusMeasurement(&module);
amsAuxMeasurement(&module);
amsCheckUnderOverVoltage(&module);
integrateCurrent();
static uint32_t channelstobalance = 1;
channelstobalance = 0x1FFFF;
/* if(channelstobalance & 0x20000){
channelstobalance = 1;
}*/
amsConfigBalancing(channelstobalance);
amsStartBalancing(100);
if((module.overVoltage | module.underVoltage))
{
//amsSendWarning();
// currentAMSState = AMSWARNING;
}
// AMS_Balancing_Loop();
/* if(BalancingActive)
{
amsStartBalancing(100);
}
else
{
amsStopBalancing();
}*/
//amsConfigBalancing(balancedCells);
//volatile amscheck = amscheckOpenCellWire(&module);
return 0;
}
uint8_t AMS_Warning_Loop()
{
amsWakeUp();
amsConfigOverVoltage(amsov);
amsConfigUnderVoltage(amsuv);
amsConfigAuxMeasurement(0xFFFF);
amsClearAux();
amsCellMeasurement(&module);
amsInternalStatusMeasurement(&module);
amsAuxMeasurement(&module);
amsCheckUnderOverVoltage(&module);
if(!(module.overVoltage | module.underVoltage))
{
currentAMSState = AMSIDLE;
amsClearWarning();
}
amsStopBalancing();
return 0;
}
uint8_t AMS_Error_Loop()
{
return 0;
}
uint8_t AMS_Charging_Loop()
{
return 0;
}
uint8_t AMS_Discharging_Loop()
{
return 0;
}
uint8_t AMS_Balancing_Loop()
{
uint8_t balancingdone = 1;
if((eepromconfigured == 1) && (internalbalancingalgo == 1) && (module.internalDieTemp<28000/*Thermal Protection 93°C*/)) //If the EEPROM is configured and the internal Balancing Algorithm should be used
{
uint16_t highestcellvoltage = module.cellVoltages[0];
uint16_t lowestcellvoltage = module.cellVoltages[0];
uint8_t highestcell = 0;
uint8_t lowestcell = 0;
for(uint8_t n = 0; n < numberofCells; n++)
{
if(module.cellVoltages[n] > highestcellvoltage)
{
highestcellvoltage = module.cellVoltages[n];
highestcell = n;
}
if(module.cellVoltages[n] < lowestcellvoltage)
{
lowestcellvoltage = module.cellVoltages[n];
lowestcell = n;
}
}
if(currentAMSState == AMSCHARGING) //Balancing is only Active if the BMS is in Charging Mode
{
uint32_t channelstobalance = 0;
if(highestcellvoltage > startbalancingthreshold)
{
for(uint8_t n = 0; n < numberofCells; n++)
{
if(module.cellVoltages[n] > stopbalancingthreshold)
{
uint16_t dv = module.cellVoltages[n]-lowestcellvoltage;
if(dv > (balancingvoltagedelta*1000))
{
balancingdone = 0;
channelstobalance |= 1<<n;
}
}
}
}
amsConfigBalancing(channelstobalance);
amsStartBalancing(100);
}
else if(currentAMSState == AMSIDLEBALANCING)
{
uint32_t channelstobalance = 0;
if(lowestcellvoltage < stopbalancingthreshold) //If under Voltage of one Cell is reached
{
amsStopBalancing();
balancingdone = 1;
}
else // otherwise continue with regular Balancing Algorithm
{
for(uint8_t n = 0; n < numberofCells; n++)
{
uint16_t dv = module.cellVoltages[n] - lowestcellvoltage;
if(dv > balancingvoltagedelta)
{
balancingdone = 0;
channelstobalance |= 1<<n;
}
}
amsConfigBalancing(channelstobalance);
amsStartBalancing(100);
}
}
}
else
{
amsStopBalancing();
balancingdone = 1;
}
return balancingdone;
}
uint8_t writeWarningLog(uint8_t warningCode)
{
//eepromWriteWarningLog(warningCode);
return 0;
}
uint8_t writeErrorLog(uint8_t errorCode)
{
//eepromWriteErrorLog(errorCode);
return 0;
}
uint8_t integrateCurrent()
{
lastticks = currenttick;
currenttick = HAL_GetTick();
if(currenttick < lastticks)
{
currentintegrator += (module.auxVoltages[0] - module.auxVoltages[2])*(currenttick-lastticks);
}
return 0;
}

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/*
* Testbench.c
*
* Created on: 13.03.2023
* Author: david
*/
#include "Testbench.h"
#include "AMS_CAN.h"
#include "common_defs.h"
#include "AMS_CAN.h"
#include "AMS_HighLevel.h"
#include "stm32f3xx.h"
#include "stm32f3xx_hal.h"
#include "stm32f3xx_hal_can.h"
#include <stdint.h>
#include "ADBMS_Abstraction.h"
#include "main.h"
void canTestSendTemperatures(uint16_t* data){
static CAN_TxHeaderTypeDef header;
header.IDE = CAN_ID_STD;
header.DLC = 8;
header.RTR = CAN_RTR_DATA;
header.TransmitGlobalTime = DISABLE;
uint8_t buffer[24];
uint8_t tmp[8];
for(int i = 0; i < 12; i++){
buffer[((i*2)+1)] = data[i] >> 8;
buffer[(i*2)] = data[i];
}
for(int i = 0; i < 8; i++){
tmp[i] = buffer[i];
}
if (ams_can_wait_for_free_mailboxes(ams_can_handle, 1, CAN_HEARTBEAT_TX_TIMEOUT) == HAL_OK) {
uint32_t mailbox;
HAL_CAN_AddTxMessage(ams_can_handle, &header, tmp, &mailbox);
}
int m = 0;
for(int i = 8; i < 16; i++){
tmp[m] = buffer[i];
m++;
}
if (ams_can_wait_for_free_mailboxes(ams_can_handle, 1, CAN_HEARTBEAT_TX_TIMEOUT) == HAL_OK) {
uint32_t mailbox;
HAL_CAN_AddTxMessage(ams_can_handle, &header, tmp, &mailbox);
}
m = 0;
for(int i = 16; i < 24; i++){
tmp[m] = buffer[i];
m++;
}
if (ams_can_wait_for_free_mailboxes(ams_can_handle, 1, CAN_HEARTBEAT_TX_TIMEOUT) == HAL_OK) {
uint32_t mailbox;
HAL_CAN_AddTxMessage(ams_can_handle, &header, tmp, &mailbox);
}
}
void canTestSendAnswer(uint8_t* data){
static CAN_TxHeaderTypeDef header;
header.IDE = CAN_ID_STD;
header.DLC = 8;
header.RTR = CAN_RTR_DATA;
header.TransmitGlobalTime = DISABLE;
if (ams_can_wait_for_free_mailboxes(ams_can_handle, 1,
CAN_HEARTBEAT_TX_TIMEOUT) == HAL_OK) {
uint32_t mailbox;
HAL_CAN_AddTxMessage(ams_can_handle, &header, data, &mailbox);
}
}
void resetData(uint8_t* data){
for(int i = 0; i < 8; i++){
data[0] = 0;
}
}
void readTemperatures(){
uint8_t last_error = 0;
int N_SENSORS = 12;
uint16_t temperatures[N_SENSORS];
for (int i = 0; i < N_SENSORS; i++) {
if (sensor_read(i, &temperatures[i]) != HAL_OK) {
sensor_init(i);
last_error = HAL_GetTick();
}
}
canTestSendTemperatures(temperatures);
}
void testLoop(uint8_t* data){
uint8_t action = data[0];
switch(action){
case CAN_TEST:
HAL_Delay(100);
canTestSendAnswer(data);
break;
case VOLTAGE_TEST:
HAL_Delay(100);
amsReadCellVoltages(&module);
ams_can_send_heartbeat();
break;
case TEMP_TEST:
HAL_Delay(1000);
readTemperatures();
break;
case EPROM_TEST:
HAL_Delay(1000);
for(uint16_t i = 1; i < 9; i++ ){
if(i == 4){
writeeeprom(i*3, 0x42);
}else{
writeeeprom(i*3, 0x69);
}
}
HAL_Delay(1000);
for(uint16_t i = 1; i < 9; i++ ){
data[i-1] = readeeprom(i*3);
}
canTestSendAnswer(data);
break;
case BALANCING_TEST:
HAL_Delay(1000);
for(int i = 0; i < 17; i++){
amsConfigBalancing(0x00001<<i);
amsStartBalancing(10);
HAL_Delay(1000);
}
HAL_Delay(1000);
amsConfigBalancing(0x1FFFF);
amsStartBalancing(10);
HAL_Delay(1000);
amsStopBalancing();
break;
}
resetData(data);
}

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/* USER CODE BEGIN Header */
/**
******************************************************************************
* @file : main.c
* @brief : Main program body
******************************************************************************
* @attention
*
* Copyright (c) 2023 STMicroelectronics.
* All rights reserved.
*
* This software is licensed under terms that can be found in the LICENSE file
* in the root directory of this software component.
* If no LICENSE file comes with this software, it is provided AS-IS.
*
******************************************************************************
*/
/* USER CODE END Header */
/* Includes ------------------------------------------------------------------*/
#include "main.h"
/* Private includes ----------------------------------------------------------*/
/* USER CODE BEGIN Includes */
#include "ADBMS_Abstraction.h"
#include "ADBMS_CMD_MAKROS.h"
#include "AMS_HighLevel.h"
#include "AMS_CAN.h"
#include "Testbench.h"
/* USER CODE END Includes */
/* Private typedef -----------------------------------------------------------*/
/* USER CODE BEGIN PTD */
/* USER CODE END PTD */
/* Private define ------------------------------------------------------------*/
/* USER CODE BEGIN PD */
#define N_SENSORS 12
#define eAdress 0xAE
/* USER CODE END PD */
/* Private macro -------------------------------------------------------------*/
/* USER CODE BEGIN PM */
/* USER CODE END PM */
/* Private variables ---------------------------------------------------------*/
CAN_HandleTypeDef hcan;
I2C_HandleTypeDef hi2c1;
I2C_HandleTypeDef hi2c2;
SPI_HandleTypeDef hspi1;
/* USER CODE BEGIN PV */
static uint32_t last_error = 0;
extern uint8_t canTestData;
extern int PENDING_MESSAGE_HANDLE;
extern
/* USER CODE END PV */
/* Private function prototypes -----------------------------------------------*/
void SystemClock_Config(void);
static void MX_GPIO_Init(void);
static void MX_CAN_Init(void);
static void MX_I2C1_Init(void);
static void MX_I2C2_Init(void);
static void MX_SPI1_Init(void);
/* USER CODE BEGIN PFP */
void lowPowerLoop(void);
HAL_StatusTypeDef sensor_init(int);
HAL_StatusTypeDef sensor_read(int, uint16_t*);
uint8_t readeeprom(uint16_t address);
void writeeeprom(uint16_t address, uint8_t data);
/* USER CODE END PFP */
/* Private user code ---------------------------------------------------------*/
/* USER CODE BEGIN 0 */
/* USER CODE END 0 */
/**
* @brief The application entry point.
* @retval int
*/
int main(void)
{
/* USER CODE BEGIN 1 */
/* USER CODE END 1 */
/* MCU Configuration--------------------------------------------------------*/
/* Reset of all peripherals, Initializes the Flash interface and the Systick. */
HAL_Init();
/* USER CODE BEGIN Init */
/* USER CODE END Init */
/* Configure the system clock */
SystemClock_Config();
/* USER CODE BEGIN SysInit */
/* USER CODE END SysInit */
/* Initialize all configured peripherals */
MX_GPIO_Init();
MX_CAN_Init();
MX_I2C1_Init();
MX_I2C2_Init();
MX_SPI1_Init();
/* USER CODE BEGIN 2 */
// eepromInitParameters();
for (int i = 0; i < N_SENSORS; i++) {
if (sensor_init(i) != HAL_OK) {
last_error = HAL_GetTick();
}
}
AMS_Init(&hspi1);
ams_can_init(&hcan, &hcan);
//amsConfigAuxMeasurement(9);
// startUARTConsole(&huart2, &module);
// htim2.Instance->CCR1 = 0x01FF;
// HAL_TIM_Base_Start(&htim2);
/* USER CODE END 2 */
/* Infinite loop */
/* USER CODE BEGIN WHILE */
writeeeprom(1, 69);
uint16_t temperatures[N_SENSORS];
AMS_Loop();
while (1){
if(BMS_IN_TEST_MODE == 1 ){ ////&& PENDING_MESSAGE_HANDLE == 1
testLoop(&canTestData);
/* USER CODE END WHILE */
/* USER CODE BEGIN 3 */
for (int i = 0; i < N_SENSORS; i++) {
if (sensor_read(i, &temperatures[i]) != HAL_OK) {
sensor_init(i);
last_error = HAL_GetTick();
}
}
if(BMS_IN_TEST_MODE != 1){
ams_can_send_heartbeat(); //for testing
}
}
}
/* USER CODE END 3 */
}
/**
* @brief System Clock Configuration
* @retval None
*/
void SystemClock_Config(void)
{
RCC_OscInitTypeDef RCC_OscInitStruct = {0};
RCC_ClkInitTypeDef RCC_ClkInitStruct = {0};
RCC_PeriphCLKInitTypeDef PeriphClkInit = {0};
/** Initializes the RCC Oscillators according to the specified parameters
* in the RCC_OscInitTypeDef structure.
*/
RCC_OscInitStruct.OscillatorType = RCC_OSCILLATORTYPE_HSI|RCC_OSCILLATORTYPE_HSE;
RCC_OscInitStruct.HSEState = RCC_HSE_ON;
RCC_OscInitStruct.HSIState = RCC_HSI_ON;
RCC_OscInitStruct.HSICalibrationValue = RCC_HSICALIBRATION_DEFAULT;
RCC_OscInitStruct.PLL.PLLState = RCC_PLL_NONE;
if (HAL_RCC_OscConfig(&RCC_OscInitStruct) != HAL_OK)
{
Error_Handler();
}
/** Initializes the CPU, AHB and APB buses clocks
*/
RCC_ClkInitStruct.ClockType = RCC_CLOCKTYPE_HCLK|RCC_CLOCKTYPE_SYSCLK
|RCC_CLOCKTYPE_PCLK1|RCC_CLOCKTYPE_PCLK2;
RCC_ClkInitStruct.SYSCLKSource = RCC_SYSCLKSOURCE_HSE;
RCC_ClkInitStruct.AHBCLKDivider = RCC_SYSCLK_DIV1;
RCC_ClkInitStruct.APB1CLKDivider = RCC_HCLK_DIV1;
RCC_ClkInitStruct.APB2CLKDivider = RCC_HCLK_DIV1;
if (HAL_RCC_ClockConfig(&RCC_ClkInitStruct, FLASH_LATENCY_0) != HAL_OK)
{
Error_Handler();
}
PeriphClkInit.PeriphClockSelection = RCC_PERIPHCLK_I2C1|RCC_PERIPHCLK_I2C2;
PeriphClkInit.I2c1ClockSelection = RCC_I2C1CLKSOURCE_HSI;
PeriphClkInit.I2c2ClockSelection = RCC_I2C2CLKSOURCE_HSI;
if (HAL_RCCEx_PeriphCLKConfig(&PeriphClkInit) != HAL_OK)
{
Error_Handler();
}
}
/**
* @brief CAN Initialization Function
* @param None
* @retval None
*/
static void MX_CAN_Init(void)
{
/* USER CODE BEGIN CAN_Init 0 */
/* USER CODE END CAN_Init 0 */
/* USER CODE BEGIN CAN_Init 1 */
/* USER CODE END CAN_Init 1 */
hcan.Instance = CAN;
hcan.Init.Prescaler = 2;
hcan.Init.Mode = CAN_MODE_NORMAL;
hcan.Init.SyncJumpWidth = CAN_SJW_1TQ;
hcan.Init.TimeSeg1 = CAN_BS1_13TQ;
hcan.Init.TimeSeg2 = CAN_BS2_2TQ;
hcan.Init.TimeTriggeredMode = DISABLE;
hcan.Init.AutoBusOff = ENABLE;
hcan.Init.AutoWakeUp = DISABLE;
hcan.Init.AutoRetransmission = ENABLE;
hcan.Init.ReceiveFifoLocked = DISABLE;
hcan.Init.TransmitFifoPriority = DISABLE;
if (HAL_CAN_Init(&hcan) != HAL_OK)
{
Error_Handler();
}
/* USER CODE BEGIN CAN_Init 2 */
/* USER CODE END CAN_Init 2 */
}
/**
* @brief I2C1 Initialization Function
* @param None
* @retval None
*/
static void MX_I2C1_Init(void)
{
/* USER CODE BEGIN I2C1_Init 0 */
/* USER CODE END I2C1_Init 0 */
/* USER CODE BEGIN I2C1_Init 1 */
/* USER CODE END I2C1_Init 1 */
hi2c1.Instance = I2C1;
hi2c1.Init.Timing = 0x2000090E;
hi2c1.Init.OwnAddress1 = 0;
hi2c1.Init.AddressingMode = I2C_ADDRESSINGMODE_7BIT;
hi2c1.Init.DualAddressMode = I2C_DUALADDRESS_DISABLE;
hi2c1.Init.OwnAddress2 = 0;
hi2c1.Init.OwnAddress2Masks = I2C_OA2_NOMASK;
hi2c1.Init.GeneralCallMode = I2C_GENERALCALL_DISABLE;
hi2c1.Init.NoStretchMode = I2C_NOSTRETCH_DISABLE;
if (HAL_I2C_Init(&hi2c1) != HAL_OK)
{
Error_Handler();
}
/** Configure Analogue filter
*/
if (HAL_I2CEx_ConfigAnalogFilter(&hi2c1, I2C_ANALOGFILTER_ENABLE) != HAL_OK)
{
Error_Handler();
}
/** Configure Digital filter
*/
if (HAL_I2CEx_ConfigDigitalFilter(&hi2c1, 0) != HAL_OK)
{
Error_Handler();
}
/* USER CODE BEGIN I2C1_Init 2 */
/* USER CODE END I2C1_Init 2 */
}
/**
* @brief I2C2 Initialization Function
* @param None
* @retval None
*/
static void MX_I2C2_Init(void)
{
/* USER CODE BEGIN I2C2_Init 0 */
/* USER CODE END I2C2_Init 0 */
/* USER CODE BEGIN I2C2_Init 1 */
/* USER CODE END I2C2_Init 1 */
hi2c2.Instance = I2C2;
hi2c2.Init.Timing = 0x2000090E;
hi2c2.Init.OwnAddress1 = 0;
hi2c2.Init.AddressingMode = I2C_ADDRESSINGMODE_7BIT;
hi2c2.Init.DualAddressMode = I2C_DUALADDRESS_DISABLE;
hi2c2.Init.OwnAddress2 = 0;
hi2c2.Init.OwnAddress2Masks = I2C_OA2_NOMASK;
hi2c2.Init.GeneralCallMode = I2C_GENERALCALL_DISABLE;
hi2c2.Init.NoStretchMode = I2C_NOSTRETCH_DISABLE;
if (HAL_I2C_Init(&hi2c2) != HAL_OK)
{
Error_Handler();
}
/** Configure Analogue filter
*/
if (HAL_I2CEx_ConfigAnalogFilter(&hi2c2, I2C_ANALOGFILTER_ENABLE) != HAL_OK)
{
Error_Handler();
}
/** Configure Digital filter
*/
if (HAL_I2CEx_ConfigDigitalFilter(&hi2c2, 0) != HAL_OK)
{
Error_Handler();
}
/* USER CODE BEGIN I2C2_Init 2 */
/* USER CODE END I2C2_Init 2 */
}
/**
* @brief SPI1 Initialization Function
* @param None
* @retval None
*/
static void MX_SPI1_Init(void)
{
/* USER CODE BEGIN SPI1_Init 0 */
/* USER CODE END SPI1_Init 0 */
/* USER CODE BEGIN SPI1_Init 1 */
/* USER CODE END SPI1_Init 1 */
/* SPI1 parameter configuration*/
hspi1.Instance = SPI1;
hspi1.Init.Mode = SPI_MODE_MASTER;
hspi1.Init.Direction = SPI_DIRECTION_2LINES;
hspi1.Init.DataSize = SPI_DATASIZE_8BIT;
hspi1.Init.CLKPolarity = SPI_POLARITY_LOW;
hspi1.Init.CLKPhase = SPI_PHASE_1EDGE;
hspi1.Init.NSS = SPI_NSS_SOFT;
hspi1.Init.BaudRatePrescaler = SPI_BAUDRATEPRESCALER_32;
hspi1.Init.FirstBit = SPI_FIRSTBIT_MSB;
hspi1.Init.TIMode = SPI_TIMODE_DISABLE;
hspi1.Init.CRCCalculation = SPI_CRCCALCULATION_DISABLE;
hspi1.Init.CRCPolynomial = 7;
hspi1.Init.CRCLength = SPI_CRC_LENGTH_DATASIZE;
hspi1.Init.NSSPMode = SPI_NSS_PULSE_ENABLE;
if (HAL_SPI_Init(&hspi1) != HAL_OK)
{
Error_Handler();
}
/* USER CODE BEGIN SPI1_Init 2 */
/* USER CODE END SPI1_Init 2 */
}
/**
* @brief GPIO Initialization Function
* @param None
* @retval None
*/
static void MX_GPIO_Init(void)
{
GPIO_InitTypeDef GPIO_InitStruct = {0};
/* GPIO Ports Clock Enable */
__HAL_RCC_GPIOF_CLK_ENABLE();
__HAL_RCC_GPIOA_CLK_ENABLE();
__HAL_RCC_GPIOB_CLK_ENABLE();
/*Configure GPIO pin Output Level */
HAL_GPIO_WritePin(GPIOA, CSB_Pin|Status_3_Pin, GPIO_PIN_RESET);
/*Configure GPIO pin Output Level */
HAL_GPIO_WritePin(GPIOB, Status_0_Pin|Status_1_Pin|Status_2_Pin, GPIO_PIN_RESET);
/*Configure GPIO pins : CSB_Pin Status_3_Pin */
GPIO_InitStruct.Pin = CSB_Pin|Status_3_Pin;
GPIO_InitStruct.Mode = GPIO_MODE_OUTPUT_PP;
GPIO_InitStruct.Pull = GPIO_NOPULL;
GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_LOW;
HAL_GPIO_Init(GPIOA, &GPIO_InitStruct);
/*Configure GPIO pins : Status_0_Pin Status_1_Pin Status_2_Pin */
GPIO_InitStruct.Pin = Status_0_Pin|Status_1_Pin|Status_2_Pin;
GPIO_InitStruct.Mode = GPIO_MODE_OUTPUT_PP;
GPIO_InitStruct.Pull = GPIO_NOPULL;
GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_LOW;
HAL_GPIO_Init(GPIOB, &GPIO_InitStruct);
}
/* USER CODE BEGIN 4 */
HAL_StatusTypeDef sensor_init(int n) {
uint16_t addr = (0b1000000 | n) << 1;
uint8_t data[] = {0};
return HAL_I2C_Master_Transmit(&hi2c1, addr, data, sizeof(data), 100);
}
HAL_StatusTypeDef sensor_read(int n, uint16_t *res) {
uint16_t addr = (0b1000000 | n) << 1;
addr |= 1; // Read
uint8_t result[2];
HAL_StatusTypeDef status =
HAL_I2C_Master_Receive(&hi2c1, addr, result, sizeof(result), 100);
if (status == HAL_OK) {
*res = (result[0] << 8) | result[1];
}
return status;
}
uint8_t readeeprom(uint16_t address){
uint8_t data = 0;
//uint8_t* address2 = (uint8_t*) &address;
//HAL_I2C_Master_Transmit(&hi2c2, 0xA0, address2, 2, 1000);
//HAL_I2C_Master_Receive(&hi2c2, 0xA0, &data, 1, 1000);
HAL_I2C_Mem_Read(&hi2c2, 0xA0, address, 2, &data, 1 , 1000);
//HAL_I2C_Mem_Read(I2C_HandleTypeDef *hi2c, uint16_t DevAddress, uint16_t MemAddress,
// uint16_t MemAddSize, uint8_t *pData, uint16_t Size, uint32_t Timeout)
return data;
}
void writeeeprom(uint16_t address, uint8_t data){
HAL_I2C_Mem_Write(&hi2c2, 0xA0, address, 2, &data, 1, 1000);
HAL_Delay(5);
}
/* USER CODE END 4 */
/**
* @brief This function is executed in case of error occurrence.
* @retval None
*/
void Error_Handler(void)
{
/* USER CODE BEGIN Error_Handler_Debug */
/* User can add his own implementation to report the HAL error return state */
__disable_irq();
while (1)
{
}
/* USER CODE END Error_Handler_Debug */
}
#ifdef USE_FULL_ASSERT
/**
* @brief Reports the name of the source file and the source line number
* where the assert_param error has occurred.
* @param file: pointer to the source file name
* @param line: assert_param error line source number
* @retval None
*/
void assert_failed(uint8_t *file, uint32_t line)
{
/* USER CODE BEGIN 6 */
/* User can add his own implementation to report the file name and line number,
ex: printf("Wrong parameters value: file %s on line %d\r\n", file, line) */
/* USER CODE END 6 */
}
#endif /* USE_FULL_ASSERT */

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/* USER CODE BEGIN Header */
/**
******************************************************************************
* @file stm32f3xx_hal_msp.c
* @brief This file provides code for the MSP Initialization
* and de-Initialization codes.
******************************************************************************
* @attention
*
* Copyright (c) 2023 STMicroelectronics.
* All rights reserved.
*
* This software is licensed under terms that can be found in the LICENSE file
* in the root directory of this software component.
* If no LICENSE file comes with this software, it is provided AS-IS.
*
******************************************************************************
*/
/* USER CODE END Header */
/* Includes ------------------------------------------------------------------*/
#include "main.h"
/* USER CODE BEGIN Includes */
/* USER CODE END Includes */
/* Private typedef -----------------------------------------------------------*/
/* USER CODE BEGIN TD */
/* USER CODE END TD */
/* Private define ------------------------------------------------------------*/
/* USER CODE BEGIN Define */
/* USER CODE END Define */
/* Private macro -------------------------------------------------------------*/
/* USER CODE BEGIN Macro */
/* USER CODE END Macro */
/* Private variables ---------------------------------------------------------*/
/* USER CODE BEGIN PV */
/* USER CODE END PV */
/* Private function prototypes -----------------------------------------------*/
/* USER CODE BEGIN PFP */
/* USER CODE END PFP */
/* External functions --------------------------------------------------------*/
/* USER CODE BEGIN ExternalFunctions */
/* USER CODE END ExternalFunctions */
/* USER CODE BEGIN 0 */
/* USER CODE END 0 */
/**
* Initializes the Global MSP.
*/
void HAL_MspInit(void)
{
/* USER CODE BEGIN MspInit 0 */
/* USER CODE END MspInit 0 */
__HAL_RCC_SYSCFG_CLK_ENABLE();
__HAL_RCC_PWR_CLK_ENABLE();
/* System interrupt init*/
/* USER CODE BEGIN MspInit 1 */
/* USER CODE END MspInit 1 */
}
/**
* @brief CAN MSP Initialization
* This function configures the hardware resources used in this example
* @param hcan: CAN handle pointer
* @retval None
*/
void HAL_CAN_MspInit(CAN_HandleTypeDef* hcan)
{
GPIO_InitTypeDef GPIO_InitStruct = {0};
if(hcan->Instance==CAN)
{
/* USER CODE BEGIN CAN_MspInit 0 */
/* USER CODE END CAN_MspInit 0 */
/* Peripheral clock enable */
__HAL_RCC_CAN1_CLK_ENABLE();
__HAL_RCC_GPIOA_CLK_ENABLE();
/**CAN GPIO Configuration
PA11 ------> CAN_RX
PA12 ------> CAN_TX
*/
GPIO_InitStruct.Pin = GPIO_PIN_11|GPIO_PIN_12;
GPIO_InitStruct.Mode = GPIO_MODE_AF_PP;
GPIO_InitStruct.Pull = GPIO_NOPULL;
GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_HIGH;
GPIO_InitStruct.Alternate = GPIO_AF9_CAN;
HAL_GPIO_Init(GPIOA, &GPIO_InitStruct);
/* CAN interrupt Init */
HAL_NVIC_SetPriority(USB_LP_CAN_RX0_IRQn, 0, 0);
HAL_NVIC_EnableIRQ(USB_LP_CAN_RX0_IRQn);
/* USER CODE BEGIN CAN_MspInit 1 */
/* USER CODE END CAN_MspInit 1 */
}
}
/**
* @brief CAN MSP De-Initialization
* This function freeze the hardware resources used in this example
* @param hcan: CAN handle pointer
* @retval None
*/
void HAL_CAN_MspDeInit(CAN_HandleTypeDef* hcan)
{
if(hcan->Instance==CAN)
{
/* USER CODE BEGIN CAN_MspDeInit 0 */
/* USER CODE END CAN_MspDeInit 0 */
/* Peripheral clock disable */
__HAL_RCC_CAN1_CLK_DISABLE();
/**CAN GPIO Configuration
PA11 ------> CAN_RX
PA12 ------> CAN_TX
*/
HAL_GPIO_DeInit(GPIOA, GPIO_PIN_11|GPIO_PIN_12);
/* CAN interrupt DeInit */
HAL_NVIC_DisableIRQ(USB_LP_CAN_RX0_IRQn);
/* USER CODE BEGIN CAN_MspDeInit 1 */
/* USER CODE END CAN_MspDeInit 1 */
}
}
/**
* @brief I2C MSP Initialization
* This function configures the hardware resources used in this example
* @param hi2c: I2C handle pointer
* @retval None
*/
void HAL_I2C_MspInit(I2C_HandleTypeDef* hi2c)
{
GPIO_InitTypeDef GPIO_InitStruct = {0};
if(hi2c->Instance==I2C1)
{
/* USER CODE BEGIN I2C1_MspInit 0 */
/* USER CODE END I2C1_MspInit 0 */
__HAL_RCC_GPIOA_CLK_ENABLE();
__HAL_RCC_GPIOB_CLK_ENABLE();
/**I2C1 GPIO Configuration
PA15 ------> I2C1_SCL
PB7 ------> I2C1_SDA
*/
GPIO_InitStruct.Pin = TMP_SCL_Pin;
GPIO_InitStruct.Mode = GPIO_MODE_AF_OD;
GPIO_InitStruct.Pull = GPIO_NOPULL;
GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_HIGH;
GPIO_InitStruct.Alternate = GPIO_AF4_I2C1;
HAL_GPIO_Init(TMP_SCL_GPIO_Port, &GPIO_InitStruct);
GPIO_InitStruct.Pin = TMP_SDA_Pin;
GPIO_InitStruct.Mode = GPIO_MODE_AF_OD;
GPIO_InitStruct.Pull = GPIO_NOPULL;
GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_HIGH;
GPIO_InitStruct.Alternate = GPIO_AF4_I2C1;
HAL_GPIO_Init(TMP_SDA_GPIO_Port, &GPIO_InitStruct);
/* Peripheral clock enable */
__HAL_RCC_I2C1_CLK_ENABLE();
/* USER CODE BEGIN I2C1_MspInit 1 */
/* USER CODE END I2C1_MspInit 1 */
}
else if(hi2c->Instance==I2C2)
{
/* USER CODE BEGIN I2C2_MspInit 0 */
/* USER CODE END I2C2_MspInit 0 */
__HAL_RCC_GPIOA_CLK_ENABLE();
/**I2C2 GPIO Configuration
PA9 ------> I2C2_SCL
PA10 ------> I2C2_SDA
*/
GPIO_InitStruct.Pin = GPIO_PIN_9|GPIO_PIN_10;
GPIO_InitStruct.Mode = GPIO_MODE_AF_OD;
GPIO_InitStruct.Pull = GPIO_NOPULL;
GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_HIGH;
GPIO_InitStruct.Alternate = GPIO_AF4_I2C2;
HAL_GPIO_Init(GPIOA, &GPIO_InitStruct);
/* Peripheral clock enable */
__HAL_RCC_I2C2_CLK_ENABLE();
/* USER CODE BEGIN I2C2_MspInit 1 */
/* USER CODE END I2C2_MspInit 1 */
}
}
/**
* @brief I2C MSP De-Initialization
* This function freeze the hardware resources used in this example
* @param hi2c: I2C handle pointer
* @retval None
*/
void HAL_I2C_MspDeInit(I2C_HandleTypeDef* hi2c)
{
if(hi2c->Instance==I2C1)
{
/* USER CODE BEGIN I2C1_MspDeInit 0 */
/* USER CODE END I2C1_MspDeInit 0 */
/* Peripheral clock disable */
__HAL_RCC_I2C1_CLK_DISABLE();
/**I2C1 GPIO Configuration
PA15 ------> I2C1_SCL
PB7 ------> I2C1_SDA
*/
HAL_GPIO_DeInit(TMP_SCL_GPIO_Port, TMP_SCL_Pin);
HAL_GPIO_DeInit(TMP_SDA_GPIO_Port, TMP_SDA_Pin);
/* USER CODE BEGIN I2C1_MspDeInit 1 */
/* USER CODE END I2C1_MspDeInit 1 */
}
else if(hi2c->Instance==I2C2)
{
/* USER CODE BEGIN I2C2_MspDeInit 0 */
/* USER CODE END I2C2_MspDeInit 0 */
/* Peripheral clock disable */
__HAL_RCC_I2C2_CLK_DISABLE();
/**I2C2 GPIO Configuration
PA9 ------> I2C2_SCL
PA10 ------> I2C2_SDA
*/
HAL_GPIO_DeInit(GPIOA, GPIO_PIN_9);
HAL_GPIO_DeInit(GPIOA, GPIO_PIN_10);
/* USER CODE BEGIN I2C2_MspDeInit 1 */
/* USER CODE END I2C2_MspDeInit 1 */
}
}
/**
* @brief SPI MSP Initialization
* This function configures the hardware resources used in this example
* @param hspi: SPI handle pointer
* @retval None
*/
void HAL_SPI_MspInit(SPI_HandleTypeDef* hspi)
{
GPIO_InitTypeDef GPIO_InitStruct = {0};
if(hspi->Instance==SPI1)
{
/* USER CODE BEGIN SPI1_MspInit 0 */
/* USER CODE END SPI1_MspInit 0 */
/* Peripheral clock enable */
__HAL_RCC_SPI1_CLK_ENABLE();
__HAL_RCC_GPIOA_CLK_ENABLE();
/**SPI1 GPIO Configuration
PA5 ------> SPI1_SCK
PA6 ------> SPI1_MISO
PA7 ------> SPI1_MOSI
*/
GPIO_InitStruct.Pin = GPIO_PIN_5|GPIO_PIN_6|GPIO_PIN_7;
GPIO_InitStruct.Mode = GPIO_MODE_AF_PP;
GPIO_InitStruct.Pull = GPIO_NOPULL;
GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_HIGH;
GPIO_InitStruct.Alternate = GPIO_AF5_SPI1;
HAL_GPIO_Init(GPIOA, &GPIO_InitStruct);
/* USER CODE BEGIN SPI1_MspInit 1 */
/* USER CODE END SPI1_MspInit 1 */
}
}
/**
* @brief SPI MSP De-Initialization
* This function freeze the hardware resources used in this example
* @param hspi: SPI handle pointer
* @retval None
*/
void HAL_SPI_MspDeInit(SPI_HandleTypeDef* hspi)
{
if(hspi->Instance==SPI1)
{
/* USER CODE BEGIN SPI1_MspDeInit 0 */
/* USER CODE END SPI1_MspDeInit 0 */
/* Peripheral clock disable */
__HAL_RCC_SPI1_CLK_DISABLE();
/**SPI1 GPIO Configuration
PA5 ------> SPI1_SCK
PA6 ------> SPI1_MISO
PA7 ------> SPI1_MOSI
*/
HAL_GPIO_DeInit(GPIOA, GPIO_PIN_5|GPIO_PIN_6|GPIO_PIN_7);
/* USER CODE BEGIN SPI1_MspDeInit 1 */
/* USER CODE END SPI1_MspDeInit 1 */
}
}
/* USER CODE BEGIN 1 */
/* USER CODE END 1 */

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@ -0,0 +1,217 @@
/* USER CODE BEGIN Header */
/**
******************************************************************************
* @file stm32f3xx_it.c
* @brief Interrupt Service Routines.
******************************************************************************
* @attention
*
* Copyright (c) 2023 STMicroelectronics.
* All rights reserved.
*
* This software is licensed under terms that can be found in the LICENSE file
* in the root directory of this software component.
* If no LICENSE file comes with this software, it is provided AS-IS.
*
******************************************************************************
*/
/* USER CODE END Header */
/* Includes ------------------------------------------------------------------*/
#include "main.h"
#include "stm32f3xx_it.h"
/* Private includes ----------------------------------------------------------*/
/* USER CODE BEGIN Includes */
/* USER CODE END Includes */
/* Private typedef -----------------------------------------------------------*/
/* USER CODE BEGIN TD */
/* USER CODE END TD */
/* Private define ------------------------------------------------------------*/
/* USER CODE BEGIN PD */
/* USER CODE END PD */
/* Private macro -------------------------------------------------------------*/
/* USER CODE BEGIN PM */
/* USER CODE END PM */
/* Private variables ---------------------------------------------------------*/
/* USER CODE BEGIN PV */
/* USER CODE END PV */
/* Private function prototypes -----------------------------------------------*/
/* USER CODE BEGIN PFP */
/* USER CODE END PFP */
/* Private user code ---------------------------------------------------------*/
/* USER CODE BEGIN 0 */
/* USER CODE END 0 */
/* External variables --------------------------------------------------------*/
extern CAN_HandleTypeDef hcan;
/* USER CODE BEGIN EV */
/* USER CODE END EV */
/******************************************************************************/
/* Cortex-M4 Processor Interruption and Exception Handlers */
/******************************************************************************/
/**
* @brief This function handles Non maskable interrupt.
*/
void NMI_Handler(void)
{
/* USER CODE BEGIN NonMaskableInt_IRQn 0 */
/* USER CODE END NonMaskableInt_IRQn 0 */
/* USER CODE BEGIN NonMaskableInt_IRQn 1 */
while (1)
{
}
/* USER CODE END NonMaskableInt_IRQn 1 */
}
/**
* @brief This function handles Hard fault interrupt.
*/
void HardFault_Handler(void)
{
/* USER CODE BEGIN HardFault_IRQn 0 */
/* USER CODE END HardFault_IRQn 0 */
while (1)
{
/* USER CODE BEGIN W1_HardFault_IRQn 0 */
/* USER CODE END W1_HardFault_IRQn 0 */
}
}
/**
* @brief This function handles Memory management fault.
*/
void MemManage_Handler(void)
{
/* USER CODE BEGIN MemoryManagement_IRQn 0 */
/* USER CODE END MemoryManagement_IRQn 0 */
while (1)
{
/* USER CODE BEGIN W1_MemoryManagement_IRQn 0 */
/* USER CODE END W1_MemoryManagement_IRQn 0 */
}
}
/**
* @brief This function handles Pre-fetch fault, memory access fault.
*/
void BusFault_Handler(void)
{
/* USER CODE BEGIN BusFault_IRQn 0 */
/* USER CODE END BusFault_IRQn 0 */
while (1)
{
/* USER CODE BEGIN W1_BusFault_IRQn 0 */
/* USER CODE END W1_BusFault_IRQn 0 */
}
}
/**
* @brief This function handles Undefined instruction or illegal state.
*/
void UsageFault_Handler(void)
{
/* USER CODE BEGIN UsageFault_IRQn 0 */
/* USER CODE END UsageFault_IRQn 0 */
while (1)
{
/* USER CODE BEGIN W1_UsageFault_IRQn 0 */
/* USER CODE END W1_UsageFault_IRQn 0 */
}
}
/**
* @brief This function handles System service call via SWI instruction.
*/
void SVC_Handler(void)
{
/* USER CODE BEGIN SVCall_IRQn 0 */
/* USER CODE END SVCall_IRQn 0 */
/* USER CODE BEGIN SVCall_IRQn 1 */
/* USER CODE END SVCall_IRQn 1 */
}
/**
* @brief This function handles Debug monitor.
*/
void DebugMon_Handler(void)
{
/* USER CODE BEGIN DebugMonitor_IRQn 0 */
/* USER CODE END DebugMonitor_IRQn 0 */
/* USER CODE BEGIN DebugMonitor_IRQn 1 */
/* USER CODE END DebugMonitor_IRQn 1 */
}
/**
* @brief This function handles Pendable request for system service.
*/
void PendSV_Handler(void)
{
/* USER CODE BEGIN PendSV_IRQn 0 */
/* USER CODE END PendSV_IRQn 0 */
/* USER CODE BEGIN PendSV_IRQn 1 */
/* USER CODE END PendSV_IRQn 1 */
}
/**
* @brief This function handles System tick timer.
*/
void SysTick_Handler(void)
{
/* USER CODE BEGIN SysTick_IRQn 0 */
/* USER CODE END SysTick_IRQn 0 */
HAL_IncTick();
/* USER CODE BEGIN SysTick_IRQn 1 */
/* USER CODE END SysTick_IRQn 1 */
}
/******************************************************************************/
/* STM32F3xx Peripheral Interrupt Handlers */
/* Add here the Interrupt Handlers for the used peripherals. */
/* For the available peripheral interrupt handler names, */
/* please refer to the startup file (startup_stm32f3xx.s). */
/******************************************************************************/
/**
* @brief This function handles USB low priority or CAN_RX0 interrupts.
*/
void USB_LP_CAN_RX0_IRQHandler(void)
{
/* USER CODE BEGIN USB_LP_CAN_RX0_IRQn 0 */
/* USER CODE END USB_LP_CAN_RX0_IRQn 0 */
HAL_CAN_IRQHandler(&hcan);
/* USER CODE BEGIN USB_LP_CAN_RX0_IRQn 1 */
/* USER CODE END USB_LP_CAN_RX0_IRQn 1 */
}
/* USER CODE BEGIN 1 */
/* USER CODE END 1 */

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/**
******************************************************************************
* @file syscalls.c
* @author Auto-generated by STM32CubeIDE
* @brief STM32CubeIDE Minimal System calls file
*
* For more information about which c-functions
* need which of these lowlevel functions
* please consult the Newlib libc-manual
******************************************************************************
* @attention
*
* Copyright (c) 2020-2022 STMicroelectronics.
* All rights reserved.
*
* This software is licensed under terms that can be found in the LICENSE file
* in the root directory of this software component.
* If no LICENSE file comes with this software, it is provided AS-IS.
*
******************************************************************************
*/
/* Includes */
#include <sys/stat.h>
#include <stdlib.h>
#include <errno.h>
#include <stdio.h>
#include <signal.h>
#include <time.h>
#include <sys/time.h>
#include <sys/times.h>
/* Variables */
extern int __io_putchar(int ch) __attribute__((weak));
extern int __io_getchar(void) __attribute__((weak));
char *__env[1] = { 0 };
char **environ = __env;
/* Functions */
void initialise_monitor_handles()
{
}
int _getpid(void)
{
return 1;
}
int _kill(int pid, int sig)
{
(void)pid;
(void)sig;
errno = EINVAL;
return -1;
}
void _exit (int status)
{
_kill(status, -1);
while (1) {} /* Make sure we hang here */
}
__attribute__((weak)) int _read(int file, char *ptr, int len)
{
(void)file;
int DataIdx;
for (DataIdx = 0; DataIdx < len; DataIdx++)
{
*ptr++ = __io_getchar();
}
return len;
}
__attribute__((weak)) int _write(int file, char *ptr, int len)
{
(void)file;
int DataIdx;
for (DataIdx = 0; DataIdx < len; DataIdx++)
{
__io_putchar(*ptr++);
}
return len;
}
int _close(int file)
{
(void)file;
return -1;
}
int _fstat(int file, struct stat *st)
{
(void)file;
st->st_mode = S_IFCHR;
return 0;
}
int _isatty(int file)
{
(void)file;
return 1;
}
int _lseek(int file, int ptr, int dir)
{
(void)file;
(void)ptr;
(void)dir;
return 0;
}
int _open(char *path, int flags, ...)
{
(void)path;
(void)flags;
/* Pretend like we always fail */
return -1;
}
int _wait(int *status)
{
(void)status;
errno = ECHILD;
return -1;
}
int _unlink(char *name)
{
(void)name;
errno = ENOENT;
return -1;
}
int _times(struct tms *buf)
{
(void)buf;
return -1;
}
int _stat(char *file, struct stat *st)
{
(void)file;
st->st_mode = S_IFCHR;
return 0;
}
int _link(char *old, char *new)
{
(void)old;
(void)new;
errno = EMLINK;
return -1;
}
int _fork(void)
{
errno = EAGAIN;
return -1;
}
int _execve(char *name, char **argv, char **env)
{
(void)name;
(void)argv;
(void)env;
errno = ENOMEM;
return -1;
}

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/**
******************************************************************************
* @file sysmem.c
* @author Generated by STM32CubeIDE
* @brief STM32CubeIDE System Memory calls file
*
* For more information about which C functions
* need which of these lowlevel functions
* please consult the newlib libc manual
******************************************************************************
* @attention
*
* Copyright (c) 2022 STMicroelectronics.
* All rights reserved.
*
* This software is licensed under terms that can be found in the LICENSE file
* in the root directory of this software component.
* If no LICENSE file comes with this software, it is provided AS-IS.
*
******************************************************************************
*/
/* Includes */
#include <errno.h>
#include <stdint.h>
/**
* Pointer to the current high watermark of the heap usage
*/
static uint8_t *__sbrk_heap_end = NULL;
/**
* @brief _sbrk() allocates memory to the newlib heap and is used by malloc
* and others from the C library
*
* @verbatim
* ############################################################################
* # .data # .bss # newlib heap # MSP stack #
* # # # # Reserved by _Min_Stack_Size #
* ############################################################################
* ^-- RAM start ^-- _end _estack, RAM end --^
* @endverbatim
*
* This implementation starts allocating at the '_end' linker symbol
* The '_Min_Stack_Size' linker symbol reserves a memory for the MSP stack
* The implementation considers '_estack' linker symbol to be RAM end
* NOTE: If the MSP stack, at any point during execution, grows larger than the
* reserved size, please increase the '_Min_Stack_Size'.
*
* @param incr Memory size
* @return Pointer to allocated memory
*/
void *_sbrk(ptrdiff_t incr)
{
extern uint8_t _end; /* Symbol defined in the linker script */
extern uint8_t _estack; /* Symbol defined in the linker script */
extern uint32_t _Min_Stack_Size; /* Symbol defined in the linker script */
const uint32_t stack_limit = (uint32_t)&_estack - (uint32_t)&_Min_Stack_Size;
const uint8_t *max_heap = (uint8_t *)stack_limit;
uint8_t *prev_heap_end;
/* Initialize heap end at first call */
if (NULL == __sbrk_heap_end)
{
__sbrk_heap_end = &_end;
}
/* Protect heap from growing into the reserved MSP stack */
if (__sbrk_heap_end + incr > max_heap)
{
errno = ENOMEM;
return (void *)-1;
}
prev_heap_end = __sbrk_heap_end;
__sbrk_heap_end += incr;
return (void *)prev_heap_end;
}

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/**
******************************************************************************
* @file system_stm32f3xx.c
* @author MCD Application Team
* @brief CMSIS Cortex-M4 Device Peripheral Access Layer System Source File.
*
* 1. This file provides two functions and one global variable to be called from
* user application:
* - SystemInit(): This function is called at startup just after reset and
* before branch to main program. This call is made inside
* the "startup_stm32f3xx.s" file.
*
* - SystemCoreClock variable: Contains the core clock (HCLK), it can be used
* by the user application to setup the SysTick
* timer or configure other parameters.
*
* - SystemCoreClockUpdate(): Updates the variable SystemCoreClock and must
* be called whenever the core clock is changed
* during program execution.
*
* 2. After each device reset the HSI (8 MHz) is used as system clock source.
* Then SystemInit() function is called, in "startup_stm32f3xx.s" file, to
* configure the system clock before to branch to main program.
*
* 3. This file configures the system clock as follows:
*=============================================================================
* Supported STM32F3xx device
*-----------------------------------------------------------------------------
* System Clock source | HSI
*-----------------------------------------------------------------------------
* SYSCLK(Hz) | 8000000
*-----------------------------------------------------------------------------
* HCLK(Hz) | 8000000
*-----------------------------------------------------------------------------
* AHB Prescaler | 1
*-----------------------------------------------------------------------------
* APB2 Prescaler | 1
*-----------------------------------------------------------------------------
* APB1 Prescaler | 1
*-----------------------------------------------------------------------------
* USB Clock | DISABLE
*-----------------------------------------------------------------------------
*=============================================================================
******************************************************************************
* @attention
*
* <h2><center>&copy; Copyright (c) 2016 STMicroelectronics.
* All rights reserved.</center></h2>
*
* This software component is licensed by ST under BSD 3-Clause license,
* the "License"; You may not use this file except in compliance with the
* License. You may obtain a copy of the License at:
* opensource.org/licenses/BSD-3-Clause
*
******************************************************************************
*/
/** @addtogroup CMSIS
* @{
*/
/** @addtogroup stm32f3xx_system
* @{
*/
/** @addtogroup STM32F3xx_System_Private_Includes
* @{
*/
#include "stm32f3xx.h"
/**
* @}
*/
/** @addtogroup STM32F3xx_System_Private_TypesDefinitions
* @{
*/
/**
* @}
*/
/** @addtogroup STM32F3xx_System_Private_Defines
* @{
*/
#if !defined (HSE_VALUE)
#define HSE_VALUE ((uint32_t)8000000) /*!< Default value of the External oscillator in Hz.
This value can be provided and adapted by the user application. */
#endif /* HSE_VALUE */
#if !defined (HSI_VALUE)
#define HSI_VALUE ((uint32_t)8000000) /*!< Default value of the Internal oscillator in Hz.
This value can be provided and adapted by the user application. */
#endif /* HSI_VALUE */
/* Note: Following vector table addresses must be defined in line with linker
configuration. */
/*!< Uncomment the following line if you need to relocate the vector table
anywhere in Flash or Sram, else the vector table is kept at the automatic
remap of boot address selected */
/* #define USER_VECT_TAB_ADDRESS */
#if defined(USER_VECT_TAB_ADDRESS)
/*!< Uncomment the following line if you need to relocate your vector Table
in Sram else user remap will be done in Flash. */
/* #define VECT_TAB_SRAM */
#if defined(VECT_TAB_SRAM)
#define VECT_TAB_BASE_ADDRESS SRAM_BASE /*!< Vector Table base address field.
This value must be a multiple of 0x200. */
#define VECT_TAB_OFFSET 0x00000000U /*!< Vector Table base offset field.
This value must be a multiple of 0x200. */
#else
#define VECT_TAB_BASE_ADDRESS FLASH_BASE /*!< Vector Table base address field.
This value must be a multiple of 0x200. */
#define VECT_TAB_OFFSET 0x00000000U /*!< Vector Table base offset field.
This value must be a multiple of 0x200. */
#endif /* VECT_TAB_SRAM */
#endif /* USER_VECT_TAB_ADDRESS */
/******************************************************************************/
/**
* @}
*/
/** @addtogroup STM32F3xx_System_Private_Macros
* @{
*/
/**
* @}
*/
/** @addtogroup STM32F3xx_System_Private_Variables
* @{
*/
/* This variable is updated in three ways:
1) by calling CMSIS function SystemCoreClockUpdate()
2) by calling HAL API function HAL_RCC_GetHCLKFreq()
3) each time HAL_RCC_ClockConfig() is called to configure the system clock frequency
Note: If you use this function to configure the system clock there is no need to
call the 2 first functions listed above, since SystemCoreClock variable is
updated automatically.
*/
uint32_t SystemCoreClock = 8000000;
const uint8_t AHBPrescTable[16] = {0, 0, 0, 0, 0, 0, 0, 0, 1, 2, 3, 4, 6, 7, 8, 9};
const uint8_t APBPrescTable[8] = {0, 0, 0, 0, 1, 2, 3, 4};
/**
* @}
*/
/** @addtogroup STM32F3xx_System_Private_FunctionPrototypes
* @{
*/
/**
* @}
*/
/** @addtogroup STM32F3xx_System_Private_Functions
* @{
*/
/**
* @brief Setup the microcontroller system
* @param None
* @retval None
*/
void SystemInit(void)
{
/* FPU settings --------------------------------------------------------------*/
#if (__FPU_PRESENT == 1) && (__FPU_USED == 1)
SCB->CPACR |= ((3UL << 10*2)|(3UL << 11*2)); /* set CP10 and CP11 Full Access */
#endif
/* Configure the Vector Table location -------------------------------------*/
#if defined(USER_VECT_TAB_ADDRESS)
SCB->VTOR = VECT_TAB_BASE_ADDRESS | VECT_TAB_OFFSET; /* Vector Table Relocation in Internal SRAM */
#endif /* USER_VECT_TAB_ADDRESS */
}
/**
* @brief Update SystemCoreClock variable according to Clock Register Values.
* The SystemCoreClock variable contains the core clock (HCLK), it can
* be used by the user application to setup the SysTick timer or configure
* other parameters.
*
* @note Each time the core clock (HCLK) changes, this function must be called
* to update SystemCoreClock variable value. Otherwise, any configuration
* based on this variable will be incorrect.
*
* @note - The system frequency computed by this function is not the real
* frequency in the chip. It is calculated based on the predefined
* constant and the selected clock source:
*
* - If SYSCLK source is HSI, SystemCoreClock will contain the HSI_VALUE(*)
*
* - If SYSCLK source is HSE, SystemCoreClock will contain the HSE_VALUE(**)
*
* - If SYSCLK source is PLL, SystemCoreClock will contain the HSE_VALUE(**)
* or HSI_VALUE(*) multiplied/divided by the PLL factors.
*
* (*) HSI_VALUE is a constant defined in stm32f3xx_hal.h file (default value
* 8 MHz) but the real value may vary depending on the variations
* in voltage and temperature.
*
* (**) HSE_VALUE is a constant defined in stm32f3xx_hal.h file (default value
* 8 MHz), user has to ensure that HSE_VALUE is same as the real
* frequency of the crystal used. Otherwise, this function may
* have wrong result.
*
* - The result of this function could be not correct when using fractional
* value for HSE crystal.
*
* @param None
* @retval None
*/
void SystemCoreClockUpdate (void)
{
uint32_t tmp = 0, pllmull = 0, pllsource = 0, predivfactor = 0;
/* Get SYSCLK source -------------------------------------------------------*/
tmp = RCC->CFGR & RCC_CFGR_SWS;
switch (tmp)
{
case RCC_CFGR_SWS_HSI: /* HSI used as system clock */
SystemCoreClock = HSI_VALUE;
break;
case RCC_CFGR_SWS_HSE: /* HSE used as system clock */
SystemCoreClock = HSE_VALUE;
break;
case RCC_CFGR_SWS_PLL: /* PLL used as system clock */
/* Get PLL clock source and multiplication factor ----------------------*/
pllmull = RCC->CFGR & RCC_CFGR_PLLMUL;
pllsource = RCC->CFGR & RCC_CFGR_PLLSRC;
pllmull = ( pllmull >> 18) + 2;
#if defined (STM32F302xE) || defined (STM32F303xE) || defined (STM32F398xx)
predivfactor = (RCC->CFGR2 & RCC_CFGR2_PREDIV) + 1;
if (pllsource == RCC_CFGR_PLLSRC_HSE_PREDIV)
{
/* HSE oscillator clock selected as PREDIV1 clock entry */
SystemCoreClock = (HSE_VALUE / predivfactor) * pllmull;
}
else
{
/* HSI oscillator clock selected as PREDIV1 clock entry */
SystemCoreClock = (HSI_VALUE / predivfactor) * pllmull;
}
#else
if (pllsource == RCC_CFGR_PLLSRC_HSI_DIV2)
{
/* HSI oscillator clock divided by 2 selected as PLL clock entry */
SystemCoreClock = (HSI_VALUE >> 1) * pllmull;
}
else
{
predivfactor = (RCC->CFGR2 & RCC_CFGR2_PREDIV) + 1;
/* HSE oscillator clock selected as PREDIV1 clock entry */
SystemCoreClock = (HSE_VALUE / predivfactor) * pllmull;
}
#endif /* STM32F302xE || STM32F303xE || STM32F398xx */
break;
default: /* HSI used as system clock */
SystemCoreClock = HSI_VALUE;
break;
}
/* Compute HCLK clock frequency ----------------*/
/* Get HCLK prescaler */
tmp = AHBPrescTable[((RCC->CFGR & RCC_CFGR_HPRE) >> 4)];
/* HCLK clock frequency */
SystemCoreClock >>= tmp;
}
/**
* @}
*/
/**
* @}
*/
/**
* @}
*/
/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/

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/**
******************************************************************************
* @file startup_stm32f302xc.s
* @author MCD Application Team
* @brief STM32F302xB/STM32F302xC devices vector table for GCC toolchain.
* This module performs:
* - Set the initial SP
* - Set the initial PC == Reset_Handler,
* - Set the vector table entries with the exceptions ISR address,
* - Configure the clock system
* - Branches to main in the C library (which eventually
* calls main()).
* After Reset the Cortex-M4 processor is in Thread mode,
* priority is Privileged, and the Stack is set to Main.
******************************************************************************
* @attention
*
* <h2><center>&copy; Copyright (c) 2016 STMicroelectronics.
* All rights reserved.</center></h2>
*
* This software component is licensed by ST under BSD 3-Clause license,
* the "License"; You may not use this file except in compliance with the
* License. You may obtain a copy of the License at:
* opensource.org/licenses/BSD-3-Clause
*
******************************************************************************
*/
.syntax unified
.cpu cortex-m4
.fpu softvfp
.thumb
.global g_pfnVectors
.global Default_Handler
/* start address for the initialization values of the .data section.
defined in linker script */
.word _sidata
/* start address for the .data section. defined in linker script */
.word _sdata
/* end address for the .data section. defined in linker script */
.word _edata
/* start address for the .bss section. defined in linker script */
.word _sbss
/* end address for the .bss section. defined in linker script */
.word _ebss
.equ BootRAM, 0xF1E0F85F
/**
* @brief This is the code that gets called when the processor first
* starts execution following a reset event. Only the absolutely
* necessary set is performed, after which the application
* supplied main() routine is called.
* @param None
* @retval : None
*/
.section .text.Reset_Handler
.weak Reset_Handler
.type Reset_Handler, %function
Reset_Handler:
ldr sp, =_estack /* Atollic update: set stack pointer */
/* Copy the data segment initializers from flash to SRAM */
ldr r0, =_sdata
ldr r1, =_edata
ldr r2, =_sidata
movs r3, #0
b LoopCopyDataInit
CopyDataInit:
ldr r4, [r2, r3]
str r4, [r0, r3]
adds r3, r3, #4
LoopCopyDataInit:
adds r4, r0, r3
cmp r4, r1
bcc CopyDataInit
/* Zero fill the bss segment. */
ldr r2, =_sbss
ldr r4, =_ebss
movs r3, #0
b LoopFillZerobss
FillZerobss:
str r3, [r2]
adds r2, r2, #4
LoopFillZerobss:
cmp r2, r4
bcc FillZerobss
/* Call the clock system intitialization function.*/
bl SystemInit
/* Call static constructors */
bl __libc_init_array
/* Call the application's entry point.*/
bl main
LoopForever:
b LoopForever
.size Reset_Handler, .-Reset_Handler
/**
* @brief This is the code that gets called when the processor receives an
* unexpected interrupt. This simply enters an infinite loop, preserving
* the system state for examination by a debugger.
*
* @param None
* @retval : None
*/
.section .text.Default_Handler,"ax",%progbits
Default_Handler:
Infinite_Loop:
b Infinite_Loop
.size Default_Handler, .-Default_Handler
/******************************************************************************
*
* The minimal vector table for a Cortex-M4. Note that the proper constructs
* must be placed on this to ensure that it ends up at physical address
* 0x0000.0000.
*
******************************************************************************/
.section .isr_vector,"a",%progbits
.type g_pfnVectors, %object
.size g_pfnVectors, .-g_pfnVectors
g_pfnVectors:
.word _estack
.word Reset_Handler
.word NMI_Handler
.word HardFault_Handler
.word MemManage_Handler
.word BusFault_Handler
.word UsageFault_Handler
.word 0
.word 0
.word 0
.word 0
.word SVC_Handler
.word DebugMon_Handler
.word 0
.word PendSV_Handler
.word SysTick_Handler
.word WWDG_IRQHandler
.word PVD_IRQHandler
.word TAMP_STAMP_IRQHandler
.word RTC_WKUP_IRQHandler
.word FLASH_IRQHandler
.word RCC_IRQHandler
.word EXTI0_IRQHandler
.word EXTI1_IRQHandler
.word EXTI2_TSC_IRQHandler
.word EXTI3_IRQHandler
.word EXTI4_IRQHandler
.word DMA1_Channel1_IRQHandler
.word DMA1_Channel2_IRQHandler
.word DMA1_Channel3_IRQHandler
.word DMA1_Channel4_IRQHandler
.word DMA1_Channel5_IRQHandler
.word DMA1_Channel6_IRQHandler
.word DMA1_Channel7_IRQHandler
.word ADC1_2_IRQHandler
.word USB_HP_CAN_TX_IRQHandler
.word USB_LP_CAN_RX0_IRQHandler
.word CAN_RX1_IRQHandler
.word CAN_SCE_IRQHandler
.word EXTI9_5_IRQHandler
.word TIM1_BRK_TIM15_IRQHandler
.word TIM1_UP_TIM16_IRQHandler
.word TIM1_TRG_COM_TIM17_IRQHandler
.word TIM1_CC_IRQHandler
.word TIM2_IRQHandler
.word TIM3_IRQHandler
.word TIM4_IRQHandler
.word I2C1_EV_IRQHandler
.word I2C1_ER_IRQHandler
.word I2C2_EV_IRQHandler
.word I2C2_ER_IRQHandler
.word SPI1_IRQHandler
.word SPI2_IRQHandler
.word USART1_IRQHandler
.word USART2_IRQHandler
.word USART3_IRQHandler
.word EXTI15_10_IRQHandler
.word RTC_Alarm_IRQHandler
.word USBWakeUp_IRQHandler
.word 0
.word 0
.word 0
.word 0
.word 0
.word 0
.word 0
.word 0
.word SPI3_IRQHandler
.word UART4_IRQHandler
.word UART5_IRQHandler
.word TIM6_DAC_IRQHandler
.word 0
.word DMA2_Channel1_IRQHandler
.word DMA2_Channel2_IRQHandler
.word DMA2_Channel3_IRQHandler
.word DMA2_Channel4_IRQHandler
.word DMA2_Channel5_IRQHandler
.word 0
.word 0
.word 0
.word COMP1_2_IRQHandler
.word COMP4_6_IRQHandler
.word 0
.word 0
.word 0
.word 0
.word 0
.word 0
.word 0
.word 0
.word USB_HP_IRQHandler
.word USB_LP_IRQHandler
.word USBWakeUp_RMP_IRQHandler
.word 0
.word 0
.word 0
.word 0
.word FPU_IRQHandler
/*******************************************************************************
*
* Provide weak aliases for each Exception handler to the Default_Handler.
* As they are weak aliases, any function with the same name will override
* this definition.
*
*******************************************************************************/
.weak NMI_Handler
.thumb_set NMI_Handler,Default_Handler
.weak HardFault_Handler
.thumb_set HardFault_Handler,Default_Handler
.weak MemManage_Handler
.thumb_set MemManage_Handler,Default_Handler
.weak BusFault_Handler
.thumb_set BusFault_Handler,Default_Handler
.weak UsageFault_Handler
.thumb_set UsageFault_Handler,Default_Handler
.weak SVC_Handler
.thumb_set SVC_Handler,Default_Handler
.weak DebugMon_Handler
.thumb_set DebugMon_Handler,Default_Handler
.weak PendSV_Handler
.thumb_set PendSV_Handler,Default_Handler
.weak SysTick_Handler
.thumb_set SysTick_Handler,Default_Handler
.weak WWDG_IRQHandler
.thumb_set WWDG_IRQHandler,Default_Handler
.weak PVD_IRQHandler
.thumb_set PVD_IRQHandler,Default_Handler
.weak TAMP_STAMP_IRQHandler
.thumb_set TAMP_STAMP_IRQHandler,Default_Handler
.weak RTC_WKUP_IRQHandler
.thumb_set RTC_WKUP_IRQHandler,Default_Handler
.weak FLASH_IRQHandler
.thumb_set FLASH_IRQHandler,Default_Handler
.weak RCC_IRQHandler
.thumb_set RCC_IRQHandler,Default_Handler
.weak EXTI0_IRQHandler
.thumb_set EXTI0_IRQHandler,Default_Handler
.weak EXTI1_IRQHandler
.thumb_set EXTI1_IRQHandler,Default_Handler
.weak EXTI2_TSC_IRQHandler
.thumb_set EXTI2_TSC_IRQHandler,Default_Handler
.weak EXTI3_IRQHandler
.thumb_set EXTI3_IRQHandler,Default_Handler
.weak EXTI4_IRQHandler
.thumb_set EXTI4_IRQHandler,Default_Handler
.weak DMA1_Channel1_IRQHandler
.thumb_set DMA1_Channel1_IRQHandler,Default_Handler
.weak DMA1_Channel2_IRQHandler
.thumb_set DMA1_Channel2_IRQHandler,Default_Handler
.weak DMA1_Channel3_IRQHandler
.thumb_set DMA1_Channel3_IRQHandler,Default_Handler
.weak DMA1_Channel4_IRQHandler
.thumb_set DMA1_Channel4_IRQHandler,Default_Handler
.weak DMA1_Channel5_IRQHandler
.thumb_set DMA1_Channel5_IRQHandler,Default_Handler
.weak DMA1_Channel6_IRQHandler
.thumb_set DMA1_Channel6_IRQHandler,Default_Handler
.weak DMA1_Channel7_IRQHandler
.thumb_set DMA1_Channel7_IRQHandler,Default_Handler
.weak ADC1_2_IRQHandler
.thumb_set ADC1_2_IRQHandler,Default_Handler
.weak USB_HP_CAN_TX_IRQHandler
.thumb_set USB_HP_CAN_TX_IRQHandler,Default_Handler
.weak USB_LP_CAN_RX0_IRQHandler
.thumb_set USB_LP_CAN_RX0_IRQHandler,Default_Handler
.weak CAN_RX1_IRQHandler
.thumb_set CAN_RX1_IRQHandler,Default_Handler
.weak CAN_SCE_IRQHandler
.thumb_set CAN_SCE_IRQHandler,Default_Handler
.weak EXTI9_5_IRQHandler
.thumb_set EXTI9_5_IRQHandler,Default_Handler
.weak TIM1_BRK_TIM15_IRQHandler
.thumb_set TIM1_BRK_TIM15_IRQHandler,Default_Handler
.weak TIM1_UP_TIM16_IRQHandler
.thumb_set TIM1_UP_TIM16_IRQHandler,Default_Handler
.weak TIM1_TRG_COM_TIM17_IRQHandler
.thumb_set TIM1_TRG_COM_TIM17_IRQHandler,Default_Handler
.weak TIM1_CC_IRQHandler
.thumb_set TIM1_CC_IRQHandler,Default_Handler
.weak TIM2_IRQHandler
.thumb_set TIM2_IRQHandler,Default_Handler
.weak TIM3_IRQHandler
.thumb_set TIM3_IRQHandler,Default_Handler
.weak TIM4_IRQHandler
.thumb_set TIM4_IRQHandler,Default_Handler
.weak I2C1_EV_IRQHandler
.thumb_set I2C1_EV_IRQHandler,Default_Handler
.weak I2C1_ER_IRQHandler
.thumb_set I2C1_ER_IRQHandler,Default_Handler
.weak I2C2_EV_IRQHandler
.thumb_set I2C2_EV_IRQHandler,Default_Handler
.weak I2C2_ER_IRQHandler
.thumb_set I2C2_ER_IRQHandler,Default_Handler
.weak SPI1_IRQHandler
.thumb_set SPI1_IRQHandler,Default_Handler
.weak SPI2_IRQHandler
.thumb_set SPI2_IRQHandler,Default_Handler
.weak USART1_IRQHandler
.thumb_set USART1_IRQHandler,Default_Handler
.weak USART2_IRQHandler
.thumb_set USART2_IRQHandler,Default_Handler
.weak USART3_IRQHandler
.thumb_set USART3_IRQHandler,Default_Handler
.weak EXTI15_10_IRQHandler
.thumb_set EXTI15_10_IRQHandler,Default_Handler
.weak RTC_Alarm_IRQHandler
.thumb_set RTC_Alarm_IRQHandler,Default_Handler
.weak USBWakeUp_IRQHandler
.thumb_set USBWakeUp_IRQHandler,Default_Handler
.weak SPI3_IRQHandler
.thumb_set SPI3_IRQHandler,Default_Handler
.weak UART4_IRQHandler
.thumb_set UART4_IRQHandler,Default_Handler
.weak UART5_IRQHandler
.thumb_set UART5_IRQHandler,Default_Handler
.weak TIM6_DAC_IRQHandler
.thumb_set TIM6_DAC_IRQHandler,Default_Handler
.weak DMA2_Channel1_IRQHandler
.thumb_set DMA2_Channel1_IRQHandler,Default_Handler
.weak DMA2_Channel2_IRQHandler
.thumb_set DMA2_Channel2_IRQHandler,Default_Handler
.weak DMA2_Channel3_IRQHandler
.thumb_set DMA2_Channel3_IRQHandler,Default_Handler
.weak DMA2_Channel4_IRQHandler
.thumb_set DMA2_Channel4_IRQHandler,Default_Handler
.weak DMA2_Channel5_IRQHandler
.thumb_set DMA2_Channel5_IRQHandler,Default_Handler
.weak COMP1_2_IRQHandler
.thumb_set COMP1_2_IRQHandler,Default_Handler
.weak COMP4_6_IRQHandler
.thumb_set COMP4_6_IRQHandler,Default_Handler
.weak USB_HP_IRQHandler
.thumb_set USB_HP_IRQHandler,Default_Handler
.weak USB_LP_IRQHandler
.thumb_set USB_LP_IRQHandler,Default_Handler
.weak USBWakeUp_RMP_IRQHandler
.thumb_set USBWakeUp_RMP_IRQHandler,Default_Handler
.weak FPU_IRQHandler
.thumb_set FPU_IRQHandler,Default_Handler
/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/

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Core/Src/ADBMS_Abstraction.o: ../Core/Src/ADBMS_Abstraction.c \
../Core/Inc/ADBMS_Abstraction.h ../Core/Inc/ADBMS_LL_Driver.h \
../Core/Inc/main.h ../Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal.h \
../Core/Inc/stm32f3xx_hal_conf.h \
../Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_rcc.h \
../Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_def.h \
../Drivers/CMSIS/Device/ST/STM32F3xx/Include/stm32f3xx.h \
../Drivers/CMSIS/Device/ST/STM32F3xx/Include/stm32f302xc.h \
../Drivers/CMSIS/Include/core_cm4.h \
../Drivers/CMSIS/Include/cmsis_version.h \
../Drivers/CMSIS/Include/cmsis_compiler.h \
../Drivers/CMSIS/Include/cmsis_gcc.h \
../Drivers/CMSIS/Include/mpu_armv7.h \
../Drivers/CMSIS/Device/ST/STM32F3xx/Include/system_stm32f3xx.h \
../Drivers/STM32F3xx_HAL_Driver/Inc/Legacy/stm32_hal_legacy.h \
../Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_rcc_ex.h \
../Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_gpio.h \
../Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_gpio_ex.h \
../Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_exti.h \
../Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_dma.h \
../Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_dma_ex.h \
../Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_cortex.h \
../Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_can.h \
../Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_flash.h \
../Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_flash_ex.h \
../Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_i2c.h \
../Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_i2c_ex.h \
../Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_pwr.h \
../Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_pwr_ex.h \
../Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_spi.h \
../Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_spi_ex.h \
../Core/Inc/ADBMS_CMD_MAKROS.h
../Core/Inc/ADBMS_Abstraction.h:
../Core/Inc/ADBMS_LL_Driver.h:
../Core/Inc/main.h:
../Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal.h:
../Core/Inc/stm32f3xx_hal_conf.h:
../Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_rcc.h:
../Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_def.h:
../Drivers/CMSIS/Device/ST/STM32F3xx/Include/stm32f3xx.h:
../Drivers/CMSIS/Device/ST/STM32F3xx/Include/stm32f302xc.h:
../Drivers/CMSIS/Include/core_cm4.h:
../Drivers/CMSIS/Include/cmsis_version.h:
../Drivers/CMSIS/Include/cmsis_compiler.h:
../Drivers/CMSIS/Include/cmsis_gcc.h:
../Drivers/CMSIS/Include/mpu_armv7.h:
../Drivers/CMSIS/Device/ST/STM32F3xx/Include/system_stm32f3xx.h:
../Drivers/STM32F3xx_HAL_Driver/Inc/Legacy/stm32_hal_legacy.h:
../Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_rcc_ex.h:
../Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_gpio.h:
../Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_gpio_ex.h:
../Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_exti.h:
../Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_dma.h:
../Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_dma_ex.h:
../Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_cortex.h:
../Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_can.h:
../Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_flash.h:
../Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_flash_ex.h:
../Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_i2c.h:
../Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_i2c_ex.h:
../Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_pwr.h:
../Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_pwr_ex.h:
../Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_spi.h:
../Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_spi_ex.h:
../Core/Inc/ADBMS_CMD_MAKROS.h:

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@ -0,0 +1,26 @@
../Core/Src/ADBMS_Abstraction.c:15:7:initAMS 16 static
../Core/Src/ADBMS_Abstraction.c:31:7:amsWakeUp 16 static
../Core/Src/ADBMS_Abstraction.c:38:7:amsCellMeasurement 24 static
../Core/Src/ADBMS_Abstraction.c:47:7:amsConfigCellMeasurement 16 static
../Core/Src/ADBMS_Abstraction.c:53:7:amsAuxMeasurement 24 static
../Core/Src/ADBMS_Abstraction.c:86:7:amsInternalStatusMeasurement 24 static
../Core/Src/ADBMS_Abstraction.c:105:7:amsConfigAuxMeasurement 24 static
../Core/Src/ADBMS_Abstraction.c:119:7:amsConfigGPIO 16 static
../Core/Src/ADBMS_Abstraction.c:124:7:amsSetGPIO 16 static
../Core/Src/ADBMS_Abstraction.c:129:7:readGPIO 16 static
../Core/Src/ADBMS_Abstraction.c:134:7:amsConfigBalancing 24 static
../Core/Src/ADBMS_Abstraction.c:155:7:amsStartBalancing 16 static
../Core/Src/ADBMS_Abstraction.c:161:7:amsStopBalancing 8 static
../Core/Src/ADBMS_Abstraction.c:167:7:amsSelfTest 4 static
../Core/Src/ADBMS_Abstraction.c:174:7:amsConfigUnderVoltage 24 static
../Core/Src/ADBMS_Abstraction.c:189:7:amsCheckUnderOverVoltage 40 static
../Core/Src/ADBMS_Abstraction.c:223:7:amsConfigOverVoltage 24 static
../Core/Src/ADBMS_Abstraction.c:300:7:amsClearStatus 16 static
../Core/Src/ADBMS_Abstraction.c:306:7:amsClearAux 16 static
../Core/Src/ADBMS_Abstraction.c:312:7:amsClearCells 16 static
../Core/Src/ADBMS_Abstraction.c:319:7:amsSendWarning 4 static
../Core/Src/ADBMS_Abstraction.c:325:7:amsSendError 4 static
../Core/Src/ADBMS_Abstraction.c:331:7:amsClearWarning 4 static
../Core/Src/ADBMS_Abstraction.c:337:7:amsClearError 4 static
../Core/Src/ADBMS_Abstraction.c:343:7:amscheckOpenCellWire 64 static
../Core/Src/ADBMS_Abstraction.c:388:7:amsReadCellVoltages 24 static

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@ -0,0 +1,62 @@
Core/Src/ADBMS_LL_Driver.o: ../Core/Src/ADBMS_LL_Driver.c \
../Core/Inc/ADBMS_LL_Driver.h ../Core/Inc/main.h \
../Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal.h \
../Core/Inc/stm32f3xx_hal_conf.h \
../Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_rcc.h \
../Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_def.h \
../Drivers/CMSIS/Device/ST/STM32F3xx/Include/stm32f3xx.h \
../Drivers/CMSIS/Device/ST/STM32F3xx/Include/stm32f302xc.h \
../Drivers/CMSIS/Include/core_cm4.h \
../Drivers/CMSIS/Include/cmsis_version.h \
../Drivers/CMSIS/Include/cmsis_compiler.h \
../Drivers/CMSIS/Include/cmsis_gcc.h \
../Drivers/CMSIS/Include/mpu_armv7.h \
../Drivers/CMSIS/Device/ST/STM32F3xx/Include/system_stm32f3xx.h \
../Drivers/STM32F3xx_HAL_Driver/Inc/Legacy/stm32_hal_legacy.h \
../Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_rcc_ex.h \
../Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_gpio.h \
../Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_gpio_ex.h \
../Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_exti.h \
../Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_dma.h \
../Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_dma_ex.h \
../Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_cortex.h \
../Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_can.h \
../Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_flash.h \
../Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_flash_ex.h \
../Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_i2c.h \
../Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_i2c_ex.h \
../Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_pwr.h \
../Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_pwr_ex.h \
../Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_spi.h \
../Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_spi_ex.h
../Core/Inc/ADBMS_LL_Driver.h:
../Core/Inc/main.h:
../Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal.h:
../Core/Inc/stm32f3xx_hal_conf.h:
../Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_rcc.h:
../Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_def.h:
../Drivers/CMSIS/Device/ST/STM32F3xx/Include/stm32f3xx.h:
../Drivers/CMSIS/Device/ST/STM32F3xx/Include/stm32f302xc.h:
../Drivers/CMSIS/Include/core_cm4.h:
../Drivers/CMSIS/Include/cmsis_version.h:
../Drivers/CMSIS/Include/cmsis_compiler.h:
../Drivers/CMSIS/Include/cmsis_gcc.h:
../Drivers/CMSIS/Include/mpu_armv7.h:
../Drivers/CMSIS/Device/ST/STM32F3xx/Include/system_stm32f3xx.h:
../Drivers/STM32F3xx_HAL_Driver/Inc/Legacy/stm32_hal_legacy.h:
../Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_rcc_ex.h:
../Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_gpio.h:
../Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_gpio_ex.h:
../Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_exti.h:
../Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_dma.h:
../Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_dma_ex.h:
../Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_cortex.h:
../Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_can.h:
../Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_flash.h:
../Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_flash_ex.h:
../Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_i2c.h:
../Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_i2c_ex.h:
../Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_pwr.h:
../Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_pwr_ex.h:
../Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_spi.h:
../Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_spi_ex.h:

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@ -0,0 +1,12 @@
../Core/Src/ADBMS_LL_Driver.c:15:7:adbmsDriverInit 16 static
../Core/Src/ADBMS_LL_Driver.c:24:7:calculatePEC 32 static
../Core/Src/ADBMS_LL_Driver.c:49:7:checkPEC 32 static
../Core/Src/ADBMS_LL_Driver.c:79:8:updatePEC 32 static
../Core/Src/ADBMS_LL_Driver.c:112:7:writeCMD 56 dynamic
../Core/Src/ADBMS_LL_Driver.c:149:7:readCMD 80 dynamic
../Core/Src/ADBMS_LL_Driver.c:189:6:mcuAdbmsCSLow 8 static
../Core/Src/ADBMS_LL_Driver.c:194:6:mcuAdbmsCSHigh 8 static
../Core/Src/ADBMS_LL_Driver.c:199:7:mcuSPITransmit 64 dynamic
../Core/Src/ADBMS_LL_Driver.c:211:7:mcuSPIReceive 24 static
../Core/Src/ADBMS_LL_Driver.c:218:7:mcuSPITransmitReceive 40 static
../Core/Src/ADBMS_LL_Driver.c:225:13:mcuDelay 16 static

View File

@ -0,0 +1,74 @@
Core/Src/AMS_CAN.o: ../Core/Src/AMS_CAN.c ../Core/Inc/AMS_CAN.h \
../Core/Inc/main.h ../Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal.h \
../Core/Inc/stm32f3xx_hal_conf.h \
../Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_rcc.h \
../Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_def.h \
../Drivers/CMSIS/Device/ST/STM32F3xx/Include/stm32f3xx.h \
../Drivers/CMSIS/Device/ST/STM32F3xx/Include/stm32f302xc.h \
../Drivers/CMSIS/Include/core_cm4.h \
../Drivers/CMSIS/Include/cmsis_version.h \
../Drivers/CMSIS/Include/cmsis_compiler.h \
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../Core/Inc/ADBMS_LL_Driver.h:
../Core/Inc/ADBMS_CMD_MAKROS.h:
../Core/Inc/AMS_HighLevel.h:
../Core/Inc/EEPROM_Parameters.h:
../Core/Inc/EEPROM.h:
../Core/Inc/AMS_HighLevel.h:

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@ -0,0 +1,76 @@
Core/Src/main.o: ../Core/Src/main.c ../Core/Inc/main.h \
../Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal.h \
../Core/Inc/stm32f3xx_hal_conf.h \
../Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_rcc.h \
../Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_def.h \
../Drivers/CMSIS/Device/ST/STM32F3xx/Include/stm32f3xx.h \
../Drivers/CMSIS/Device/ST/STM32F3xx/Include/stm32f302xc.h \
../Drivers/CMSIS/Include/core_cm4.h \
../Drivers/CMSIS/Include/cmsis_version.h \
../Drivers/CMSIS/Include/cmsis_compiler.h \
../Drivers/CMSIS/Include/cmsis_gcc.h \
../Drivers/CMSIS/Include/mpu_armv7.h \
../Drivers/CMSIS/Device/ST/STM32F3xx/Include/system_stm32f3xx.h \
../Drivers/STM32F3xx_HAL_Driver/Inc/Legacy/stm32_hal_legacy.h \
../Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_rcc_ex.h \
../Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_gpio.h \
../Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_gpio_ex.h \
../Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_exti.h \
../Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_dma.h \
../Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_dma_ex.h \
../Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_cortex.h \
../Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_can.h \
../Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_flash.h \
../Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_flash_ex.h \
../Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_i2c.h \
../Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_i2c_ex.h \
../Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_pwr.h \
../Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_pwr_ex.h \
../Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_spi.h \
../Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_spi_ex.h \
../Core/Inc/ADBMS_Abstraction.h ../Core/Inc/ADBMS_LL_Driver.h \
../Core/Inc/main.h ../Core/Inc/ADBMS_CMD_MAKROS.h \
../Core/Inc/ADBMS_CMD_MAKROS.h ../Core/Inc/AMS_HighLevel.h \
../Core/Inc/ADBMS_Abstraction.h ../Core/Inc/AMS_CAN.h \
../Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_def.h \
../Core/Inc/Testbench.h
../Core/Inc/main.h:
../Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal.h:
../Core/Inc/stm32f3xx_hal_conf.h:
../Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_rcc.h:
../Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_def.h:
../Drivers/CMSIS/Device/ST/STM32F3xx/Include/stm32f3xx.h:
../Drivers/CMSIS/Device/ST/STM32F3xx/Include/stm32f302xc.h:
../Drivers/CMSIS/Include/core_cm4.h:
../Drivers/CMSIS/Include/cmsis_version.h:
../Drivers/CMSIS/Include/cmsis_compiler.h:
../Drivers/CMSIS/Include/cmsis_gcc.h:
../Drivers/CMSIS/Include/mpu_armv7.h:
../Drivers/CMSIS/Device/ST/STM32F3xx/Include/system_stm32f3xx.h:
../Drivers/STM32F3xx_HAL_Driver/Inc/Legacy/stm32_hal_legacy.h:
../Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_rcc_ex.h:
../Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_gpio.h:
../Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_gpio_ex.h:
../Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_exti.h:
../Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_dma.h:
../Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_dma_ex.h:
../Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_cortex.h:
../Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_can.h:
../Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_flash.h:
../Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_flash_ex.h:
../Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_i2c.h:
../Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_i2c_ex.h:
../Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_pwr.h:
../Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_pwr_ex.h:
../Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_spi.h:
../Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_spi_ex.h:
../Core/Inc/ADBMS_Abstraction.h:
../Core/Inc/ADBMS_LL_Driver.h:
../Core/Inc/main.h:
../Core/Inc/ADBMS_CMD_MAKROS.h:
../Core/Inc/ADBMS_CMD_MAKROS.h:
../Core/Inc/AMS_HighLevel.h:
../Core/Inc/ADBMS_Abstraction.h:
../Core/Inc/AMS_CAN.h:
../Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_def.h:
../Core/Inc/Testbench.h:

Binary file not shown.

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../Core/Src/main.c:88:5:main 40 static
../Core/Src/main.c:163:6:SystemClock_Config 120 static
../Core/Src/main.c:209:13:MX_CAN_Init 8 static
../Core/Src/main.c:246:13:MX_I2C1_Init 8 static
../Core/Src/main.c:294:13:MX_I2C2_Init 8 static
../Core/Src/main.c:342:13:MX_SPI1_Init 8 static
../Core/Src/main.c:382:13:MX_GPIO_Init 40 static
../Core/Src/main.c:414:19:sensor_init 32 static
../Core/Src/main.c:420:19:sensor_read 32 static
../Core/Src/main.c:432:9:readeeprom 40 static
../Core/Src/main.c:443:6:writeeeprom 32 static
../Core/Src/main.c:453:6:Error_Handler 4 static,ignoring_inline_asm

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Core/Src/stm32f3xx_hal_msp.o: ../Core/Src/stm32f3xx_hal_msp.c \
../Core/Inc/main.h ../Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal.h \
../Core/Inc/stm32f3xx_hal_conf.h \
../Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_rcc.h \
../Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_def.h \
../Drivers/CMSIS/Device/ST/STM32F3xx/Include/stm32f3xx.h \
../Drivers/CMSIS/Device/ST/STM32F3xx/Include/stm32f302xc.h \
../Drivers/CMSIS/Include/core_cm4.h \
../Drivers/CMSIS/Include/cmsis_version.h \
../Drivers/CMSIS/Include/cmsis_compiler.h \
../Drivers/CMSIS/Include/cmsis_gcc.h \
../Drivers/CMSIS/Include/mpu_armv7.h \
../Drivers/CMSIS/Device/ST/STM32F3xx/Include/system_stm32f3xx.h \
../Drivers/STM32F3xx_HAL_Driver/Inc/Legacy/stm32_hal_legacy.h \
../Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_rcc_ex.h \
../Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_gpio.h \
../Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_gpio_ex.h \
../Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_exti.h \
../Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_dma.h \
../Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_dma_ex.h \
../Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_cortex.h \
../Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_can.h \
../Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_flash.h \
../Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_flash_ex.h \
../Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_i2c.h \
../Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_i2c_ex.h \
../Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_pwr.h \
../Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_pwr_ex.h \
../Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_spi.h \
../Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_spi_ex.h
../Core/Inc/main.h:
../Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal.h:
../Core/Inc/stm32f3xx_hal_conf.h:
../Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_rcc.h:
../Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_def.h:
../Drivers/CMSIS/Device/ST/STM32F3xx/Include/stm32f3xx.h:
../Drivers/CMSIS/Device/ST/STM32F3xx/Include/stm32f302xc.h:
../Drivers/CMSIS/Include/core_cm4.h:
../Drivers/CMSIS/Include/cmsis_version.h:
../Drivers/CMSIS/Include/cmsis_compiler.h:
../Drivers/CMSIS/Include/cmsis_gcc.h:
../Drivers/CMSIS/Include/mpu_armv7.h:
../Drivers/CMSIS/Device/ST/STM32F3xx/Include/system_stm32f3xx.h:
../Drivers/STM32F3xx_HAL_Driver/Inc/Legacy/stm32_hal_legacy.h:
../Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_rcc_ex.h:
../Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_gpio.h:
../Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_gpio_ex.h:
../Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_exti.h:
../Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_dma.h:
../Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_dma_ex.h:
../Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_cortex.h:
../Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_can.h:
../Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_flash.h:
../Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_flash_ex.h:
../Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_i2c.h:
../Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_i2c_ex.h:
../Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_pwr.h:
../Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_pwr_ex.h:
../Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_spi.h:
../Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_spi_ex.h:

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../Core/Src/stm32f3xx_hal_msp.c:63:6:HAL_MspInit 16 static
../Core/Src/stm32f3xx_hal_msp.c:85:6:HAL_CAN_MspInit 48 static
../Core/Src/stm32f3xx_hal_msp.c:124:6:HAL_CAN_MspDeInit 16 static
../Core/Src/stm32f3xx_hal_msp.c:155:6:HAL_I2C_MspInit 56 static
../Core/Src/stm32f3xx_hal_msp.c:223:6:HAL_I2C_MspDeInit 16 static
../Core/Src/stm32f3xx_hal_msp.c:274:6:HAL_SPI_MspInit 48 static
../Core/Src/stm32f3xx_hal_msp.c:311:6:HAL_SPI_MspDeInit 16 static

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Core/Src/stm32f3xx_it.o: ../Core/Src/stm32f3xx_it.c ../Core/Inc/main.h \
../Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal.h \
../Core/Inc/stm32f3xx_hal_conf.h \
../Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_rcc.h \
../Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_def.h \
../Drivers/CMSIS/Device/ST/STM32F3xx/Include/stm32f3xx.h \
../Drivers/CMSIS/Device/ST/STM32F3xx/Include/stm32f302xc.h \
../Drivers/CMSIS/Include/core_cm4.h \
../Drivers/CMSIS/Include/cmsis_version.h \
../Drivers/CMSIS/Include/cmsis_compiler.h \
../Drivers/CMSIS/Include/cmsis_gcc.h \
../Drivers/CMSIS/Include/mpu_armv7.h \
../Drivers/CMSIS/Device/ST/STM32F3xx/Include/system_stm32f3xx.h \
../Drivers/STM32F3xx_HAL_Driver/Inc/Legacy/stm32_hal_legacy.h \
../Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_rcc_ex.h \
../Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_gpio.h \
../Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_gpio_ex.h \
../Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_exti.h \
../Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_dma.h \
../Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_dma_ex.h \
../Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_cortex.h \
../Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_can.h \
../Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_flash.h \
../Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_flash_ex.h \
../Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_i2c.h \
../Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_i2c_ex.h \
../Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_pwr.h \
../Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_pwr_ex.h \
../Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_spi.h \
../Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_spi_ex.h \
../Core/Inc/stm32f3xx_it.h
../Core/Inc/main.h:
../Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal.h:
../Core/Inc/stm32f3xx_hal_conf.h:
../Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_rcc.h:
../Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_def.h:
../Drivers/CMSIS/Device/ST/STM32F3xx/Include/stm32f3xx.h:
../Drivers/CMSIS/Device/ST/STM32F3xx/Include/stm32f302xc.h:
../Drivers/CMSIS/Include/core_cm4.h:
../Drivers/CMSIS/Include/cmsis_version.h:
../Drivers/CMSIS/Include/cmsis_compiler.h:
../Drivers/CMSIS/Include/cmsis_gcc.h:
../Drivers/CMSIS/Include/mpu_armv7.h:
../Drivers/CMSIS/Device/ST/STM32F3xx/Include/system_stm32f3xx.h:
../Drivers/STM32F3xx_HAL_Driver/Inc/Legacy/stm32_hal_legacy.h:
../Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_rcc_ex.h:
../Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_gpio.h:
../Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_gpio_ex.h:
../Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_exti.h:
../Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_dma.h:
../Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_dma_ex.h:
../Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_cortex.h:
../Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_can.h:
../Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_flash.h:
../Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_flash_ex.h:
../Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_i2c.h:
../Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_i2c_ex.h:
../Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_pwr.h:
../Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_pwr_ex.h:
../Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_spi.h:
../Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_spi_ex.h:
../Core/Inc/stm32f3xx_it.h:

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../Core/Src/stm32f3xx_it.c:69:6:NMI_Handler 4 static
../Core/Src/stm32f3xx_it.c:84:6:HardFault_Handler 4 static
../Core/Src/stm32f3xx_it.c:99:6:MemManage_Handler 4 static
../Core/Src/stm32f3xx_it.c:114:6:BusFault_Handler 4 static
../Core/Src/stm32f3xx_it.c:129:6:UsageFault_Handler 4 static
../Core/Src/stm32f3xx_it.c:144:6:SVC_Handler 4 static
../Core/Src/stm32f3xx_it.c:157:6:DebugMon_Handler 4 static
../Core/Src/stm32f3xx_it.c:170:6:PendSV_Handler 4 static
../Core/Src/stm32f3xx_it.c:183:6:SysTick_Handler 8 static
../Core/Src/stm32f3xx_it.c:204:6:USB_LP_CAN_RX0_IRQHandler 8 static

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@ -0,0 +1,57 @@
################################################################################
# Automatically-generated file. Do not edit!
# Toolchain: GNU Tools for STM32 (10.3-2021.10)
################################################################################
# Add inputs and outputs from these tool invocations to the build variables
C_SRCS += \
../Core/Src/ADBMS_Abstraction.c \
../Core/Src/ADBMS_LL_Driver.c \
../Core/Src/AMS_CAN.c \
../Core/Src/AMS_HighLevel.c \
../Core/Src/Testbench.c \
../Core/Src/main.c \
../Core/Src/stm32f3xx_hal_msp.c \
../Core/Src/stm32f3xx_it.c \
../Core/Src/syscalls.c \
../Core/Src/sysmem.c \
../Core/Src/system_stm32f3xx.c
OBJS += \
./Core/Src/ADBMS_Abstraction.o \
./Core/Src/ADBMS_LL_Driver.o \
./Core/Src/AMS_CAN.o \
./Core/Src/AMS_HighLevel.o \
./Core/Src/Testbench.o \
./Core/Src/main.o \
./Core/Src/stm32f3xx_hal_msp.o \
./Core/Src/stm32f3xx_it.o \
./Core/Src/syscalls.o \
./Core/Src/sysmem.o \
./Core/Src/system_stm32f3xx.o
C_DEPS += \
./Core/Src/ADBMS_Abstraction.d \
./Core/Src/ADBMS_LL_Driver.d \
./Core/Src/AMS_CAN.d \
./Core/Src/AMS_HighLevel.d \
./Core/Src/Testbench.d \
./Core/Src/main.d \
./Core/Src/stm32f3xx_hal_msp.d \
./Core/Src/stm32f3xx_it.d \
./Core/Src/syscalls.d \
./Core/Src/sysmem.d \
./Core/Src/system_stm32f3xx.d
# Each subdirectory must supply rules for building sources it contributes
Core/Src/%.o Core/Src/%.su: ../Core/Src/%.c Core/Src/subdir.mk
arm-none-eabi-gcc "$<" -mcpu=cortex-m4 -std=gnu11 -g3 -DDEBUG -DUSE_HAL_DRIVER -DSTM32F302xC -c -I../Core/Inc -I../Drivers/STM32F3xx_HAL_Driver/Inc/Legacy -I../Drivers/STM32F3xx_HAL_Driver/Inc -I../Drivers/CMSIS/Device/ST/STM32F3xx/Include -I../Drivers/CMSIS/Include -O0 -ffunction-sections -fdata-sections -Wall -fstack-usage -MMD -MP -MF"$(@:%.o=%.d)" -MT"$@" --specs=nano.specs -mfpu=fpv4-sp-d16 -mfloat-abi=hard -mthumb -o "$@"
clean: clean-Core-2f-Src
clean-Core-2f-Src:
-$(RM) ./Core/Src/ADBMS_Abstraction.d ./Core/Src/ADBMS_Abstraction.o ./Core/Src/ADBMS_Abstraction.su ./Core/Src/ADBMS_LL_Driver.d ./Core/Src/ADBMS_LL_Driver.o ./Core/Src/ADBMS_LL_Driver.su ./Core/Src/AMS_CAN.d ./Core/Src/AMS_CAN.o ./Core/Src/AMS_CAN.su ./Core/Src/AMS_HighLevel.d ./Core/Src/AMS_HighLevel.o ./Core/Src/AMS_HighLevel.su ./Core/Src/Testbench.d ./Core/Src/Testbench.o ./Core/Src/Testbench.su ./Core/Src/main.d ./Core/Src/main.o ./Core/Src/main.su ./Core/Src/stm32f3xx_hal_msp.d ./Core/Src/stm32f3xx_hal_msp.o ./Core/Src/stm32f3xx_hal_msp.su ./Core/Src/stm32f3xx_it.d ./Core/Src/stm32f3xx_it.o ./Core/Src/stm32f3xx_it.su ./Core/Src/syscalls.d ./Core/Src/syscalls.o ./Core/Src/syscalls.su ./Core/Src/sysmem.d ./Core/Src/sysmem.o ./Core/Src/sysmem.su ./Core/Src/system_stm32f3xx.d ./Core/Src/system_stm32f3xx.o ./Core/Src/system_stm32f3xx.su
.PHONY: clean-Core-2f-Src

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Core/Src/syscalls.o: ../Core/Src/syscalls.c

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../Core/Src/syscalls.c:44:6:initialise_monitor_handles 4 static
../Core/Src/syscalls.c:48:5:_getpid 4 static
../Core/Src/syscalls.c:53:5:_kill 16 static
../Core/Src/syscalls.c:61:6:_exit 16 static
../Core/Src/syscalls.c:67:27:_read 32 static
../Core/Src/syscalls.c:80:27:_write 32 static
../Core/Src/syscalls.c:92:5:_close 16 static
../Core/Src/syscalls.c:99:5:_fstat 16 static
../Core/Src/syscalls.c:106:5:_isatty 16 static
../Core/Src/syscalls.c:112:5:_lseek 24 static
../Core/Src/syscalls.c:120:5:_open 12 static
../Core/Src/syscalls.c:128:5:_wait 16 static
../Core/Src/syscalls.c:135:5:_unlink 16 static
../Core/Src/syscalls.c:142:5:_times 16 static
../Core/Src/syscalls.c:148:5:_stat 16 static
../Core/Src/syscalls.c:155:5:_link 16 static
../Core/Src/syscalls.c:163:5:_fork 8 static
../Core/Src/syscalls.c:169:5:_execve 24 static

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Core/Src/sysmem.o: ../Core/Src/sysmem.c

Binary file not shown.

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../Core/Src/sysmem.c:53:7:_sbrk 32 static

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Core/Src/system_stm32f3xx.o: ../Core/Src/system_stm32f3xx.c \
../Drivers/CMSIS/Device/ST/STM32F3xx/Include/stm32f3xx.h \
../Drivers/CMSIS/Device/ST/STM32F3xx/Include/stm32f302xc.h \
../Drivers/CMSIS/Include/core_cm4.h \
../Drivers/CMSIS/Include/cmsis_version.h \
../Drivers/CMSIS/Include/cmsis_compiler.h \
../Drivers/CMSIS/Include/cmsis_gcc.h \
../Drivers/CMSIS/Include/mpu_armv7.h \
../Drivers/CMSIS/Device/ST/STM32F3xx/Include/system_stm32f3xx.h \
../Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal.h \
../Core/Inc/stm32f3xx_hal_conf.h \
../Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_rcc.h \
../Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_def.h \
../Drivers/STM32F3xx_HAL_Driver/Inc/Legacy/stm32_hal_legacy.h \
../Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_rcc_ex.h \
../Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_gpio.h \
../Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_gpio_ex.h \
../Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_exti.h \
../Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_dma.h \
../Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_dma_ex.h \
../Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_cortex.h \
../Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_can.h \
../Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_flash.h \
../Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_flash_ex.h \
../Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_i2c.h \
../Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_i2c_ex.h \
../Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_pwr.h \
../Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_pwr_ex.h \
../Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_spi.h \
../Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_spi_ex.h
../Drivers/CMSIS/Device/ST/STM32F3xx/Include/stm32f3xx.h:
../Drivers/CMSIS/Device/ST/STM32F3xx/Include/stm32f302xc.h:
../Drivers/CMSIS/Include/core_cm4.h:
../Drivers/CMSIS/Include/cmsis_version.h:
../Drivers/CMSIS/Include/cmsis_compiler.h:
../Drivers/CMSIS/Include/cmsis_gcc.h:
../Drivers/CMSIS/Include/mpu_armv7.h:
../Drivers/CMSIS/Device/ST/STM32F3xx/Include/system_stm32f3xx.h:
../Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal.h:
../Core/Inc/stm32f3xx_hal_conf.h:
../Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_rcc.h:
../Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_def.h:
../Drivers/STM32F3xx_HAL_Driver/Inc/Legacy/stm32_hal_legacy.h:
../Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_rcc_ex.h:
../Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_gpio.h:
../Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_gpio_ex.h:
../Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_exti.h:
../Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_dma.h:
../Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_dma_ex.h:
../Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_cortex.h:
../Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_can.h:
../Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_flash.h:
../Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_flash_ex.h:
../Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_i2c.h:
../Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_i2c_ex.h:
../Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_pwr.h:
../Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_pwr_ex.h:
../Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_spi.h:
../Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_spi_ex.h:

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../Core/Src/system_stm32f3xx.c:171:6:SystemInit 4 static
../Core/Src/system_stm32f3xx.c:220:6:SystemCoreClockUpdate 24 static

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Core/Startup/startup_stm32f302cctx.o: \
../Core/Startup/startup_stm32f302cctx.s

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################################################################################
# Automatically-generated file. Do not edit!
# Toolchain: GNU Tools for STM32 (10.3-2021.10)
################################################################################
# Add inputs and outputs from these tool invocations to the build variables
S_SRCS += \
../Core/Startup/startup_stm32f302cctx.s
OBJS += \
./Core/Startup/startup_stm32f302cctx.o
S_DEPS += \
./Core/Startup/startup_stm32f302cctx.d
# Each subdirectory must supply rules for building sources it contributes
Core/Startup/%.o: ../Core/Startup/%.s Core/Startup/subdir.mk
arm-none-eabi-gcc -mcpu=cortex-m4 -g3 -DDEBUG -c -x assembler-with-cpp -MMD -MP -MF"$(@:%.o=%.d)" -MT"$@" --specs=nano.specs -mfpu=fpv4-sp-d16 -mfloat-abi=hard -mthumb -o "$@" "$<"
clean: clean-Core-2f-Startup
clean-Core-2f-Startup:
-$(RM) ./Core/Startup/startup_stm32f302cctx.d ./Core/Startup/startup_stm32f302cctx.o
.PHONY: clean-Core-2f-Startup

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Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal.o: \
../Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal.c \
../Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal.h \
../Core/Inc/stm32f3xx_hal_conf.h \
../Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_rcc.h \
../Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_def.h \
../Drivers/CMSIS/Device/ST/STM32F3xx/Include/stm32f3xx.h \
../Drivers/CMSIS/Device/ST/STM32F3xx/Include/stm32f302xc.h \
../Drivers/CMSIS/Include/core_cm4.h \
../Drivers/CMSIS/Include/cmsis_version.h \
../Drivers/CMSIS/Include/cmsis_compiler.h \
../Drivers/CMSIS/Include/cmsis_gcc.h \
../Drivers/CMSIS/Include/mpu_armv7.h \
../Drivers/CMSIS/Device/ST/STM32F3xx/Include/system_stm32f3xx.h \
../Drivers/STM32F3xx_HAL_Driver/Inc/Legacy/stm32_hal_legacy.h \
../Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_rcc_ex.h \
../Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_gpio.h \
../Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_gpio_ex.h \
../Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_exti.h \
../Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_dma.h \
../Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_dma_ex.h \
../Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_cortex.h \
../Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_can.h \
../Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_flash.h \
../Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_flash_ex.h \
../Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_i2c.h \
../Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_i2c_ex.h \
../Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_pwr.h \
../Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_pwr_ex.h \
../Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_spi.h \
../Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_spi_ex.h
../Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal.h:
../Core/Inc/stm32f3xx_hal_conf.h:
../Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_rcc.h:
../Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_def.h:
../Drivers/CMSIS/Device/ST/STM32F3xx/Include/stm32f3xx.h:
../Drivers/CMSIS/Device/ST/STM32F3xx/Include/stm32f302xc.h:
../Drivers/CMSIS/Include/core_cm4.h:
../Drivers/CMSIS/Include/cmsis_version.h:
../Drivers/CMSIS/Include/cmsis_compiler.h:
../Drivers/CMSIS/Include/cmsis_gcc.h:
../Drivers/CMSIS/Include/mpu_armv7.h:
../Drivers/CMSIS/Device/ST/STM32F3xx/Include/system_stm32f3xx.h:
../Drivers/STM32F3xx_HAL_Driver/Inc/Legacy/stm32_hal_legacy.h:
../Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_rcc_ex.h:
../Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_gpio.h:
../Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_gpio_ex.h:
../Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_exti.h:
../Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_dma.h:
../Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_dma_ex.h:
../Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_cortex.h:
../Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_can.h:
../Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_flash.h:
../Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_flash_ex.h:
../Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_i2c.h:
../Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_i2c_ex.h:
../Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_pwr.h:
../Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_pwr_ex.h:
../Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_spi.h:
../Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_spi_ex.h:

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../Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal.c:138:19:HAL_Init 8 static
../Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal.c:163:19:HAL_DeInit 8 static
../Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal.c:186:13:HAL_MspInit 4 static
../Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal.c:197:13:HAL_MspDeInit 4 static
../Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal.c:220:26:HAL_InitTick 16 static
../Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal.c:278:13:HAL_IncTick 4 static
../Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal.c:289:17:HAL_GetTick 4 static
../Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal.c:298:10:HAL_GetTickPrio 4 static
../Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal.c:307:19:HAL_SetTickFreq 24 static
../Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal.c:339:21:HAL_GetTickFreq 4 static
../Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal.c:355:13:HAL_Delay 24 static
../Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal.c:381:13:HAL_SuspendTick 4 static
../Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal.c:399:13:HAL_ResumeTick 4 static
../Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal.c:410:10:HAL_GetHalVersion 4 static
../Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal.c:419:10:HAL_GetREVID 4 static
../Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal.c:428:10:HAL_GetDEVID 4 static
../Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal.c:437:10:HAL_GetUIDw0 4 static
../Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal.c:446:10:HAL_GetUIDw1 4 static
../Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal.c:455:10:HAL_GetUIDw2 4 static
../Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal.c:464:6:HAL_DBGMCU_EnableDBGSleepMode 4 static
../Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal.c:473:6:HAL_DBGMCU_DisableDBGSleepMode 4 static
../Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal.c:482:6:HAL_DBGMCU_EnableDBGStopMode 4 static
../Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal.c:491:6:HAL_DBGMCU_DisableDBGStopMode 4 static
../Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal.c:500:6:HAL_DBGMCU_EnableDBGStandbyMode 4 static
../Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal.c:509:6:HAL_DBGMCU_DisableDBGStandbyMode 4 static

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Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.o: \
../Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c \
../Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal.h \
../Core/Inc/stm32f3xx_hal_conf.h \
../Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_rcc.h \
../Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_def.h \
../Drivers/CMSIS/Device/ST/STM32F3xx/Include/stm32f3xx.h \
../Drivers/CMSIS/Device/ST/STM32F3xx/Include/stm32f302xc.h \
../Drivers/CMSIS/Include/core_cm4.h \
../Drivers/CMSIS/Include/cmsis_version.h \
../Drivers/CMSIS/Include/cmsis_compiler.h \
../Drivers/CMSIS/Include/cmsis_gcc.h \
../Drivers/CMSIS/Include/mpu_armv7.h \
../Drivers/CMSIS/Device/ST/STM32F3xx/Include/system_stm32f3xx.h \
../Drivers/STM32F3xx_HAL_Driver/Inc/Legacy/stm32_hal_legacy.h \
../Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_rcc_ex.h \
../Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_gpio.h \
../Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_gpio_ex.h \
../Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_exti.h \
../Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_dma.h \
../Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_dma_ex.h \
../Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_cortex.h \
../Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_can.h \
../Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_flash.h \
../Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_flash_ex.h \
../Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_i2c.h \
../Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_i2c_ex.h \
../Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_pwr.h \
../Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_pwr_ex.h \
../Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_spi.h \
../Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_spi_ex.h
../Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal.h:
../Core/Inc/stm32f3xx_hal_conf.h:
../Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_rcc.h:
../Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_def.h:
../Drivers/CMSIS/Device/ST/STM32F3xx/Include/stm32f3xx.h:
../Drivers/CMSIS/Device/ST/STM32F3xx/Include/stm32f302xc.h:
../Drivers/CMSIS/Include/core_cm4.h:
../Drivers/CMSIS/Include/cmsis_version.h:
../Drivers/CMSIS/Include/cmsis_compiler.h:
../Drivers/CMSIS/Include/cmsis_gcc.h:
../Drivers/CMSIS/Include/mpu_armv7.h:
../Drivers/CMSIS/Device/ST/STM32F3xx/Include/system_stm32f3xx.h:
../Drivers/STM32F3xx_HAL_Driver/Inc/Legacy/stm32_hal_legacy.h:
../Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_rcc_ex.h:
../Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_gpio.h:
../Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_gpio_ex.h:
../Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_exti.h:
../Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_dma.h:
../Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_dma_ex.h:
../Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_cortex.h:
../Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_can.h:
../Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_flash.h:
../Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_flash_ex.h:
../Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_i2c.h:
../Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_i2c_ex.h:
../Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_pwr.h:
../Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_pwr_ex.h:
../Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_spi.h:
../Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_spi_ex.h:

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../Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c:274:19:HAL_CAN_Init 24 static
../Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c:459:19:HAL_CAN_DeInit 16 static
../Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c:506:13:HAL_CAN_MspInit 16 static
../Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c:522:13:HAL_CAN_MspDeInit 16 static
../Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c:838:19:HAL_CAN_ConfigFilter 32 static
../Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c:988:19:HAL_CAN_Start 24 static
../Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c:1040:19:HAL_CAN_Stop 24 static
../Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c:1095:19:HAL_CAN_RequestSleep 24 static
../Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c:1126:19:HAL_CAN_WakeUp 32 static
../Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c:1175:10:HAL_CAN_IsSleepActive 24 static
../Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c:1206:19:HAL_CAN_AddTxMessage 40 static
../Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c:1314:19:HAL_CAN_AbortTxRequest 24 static
../Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c:1363:10:HAL_CAN_GetTxMailboxesFreeLevel 24 static
../Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c:1406:10:HAL_CAN_IsTxMessagePending 24 static
../Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c:1438:10:HAL_CAN_GetTxTimestamp 40 static,ignoring_inline_asm
../Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c:1472:19:HAL_CAN_GetRxMessage 32 static
../Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c:1562:10:HAL_CAN_GetRxFifoFillLevel 24 static
../Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c:1615:19:HAL_CAN_ActivateNotification 24 static
../Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c:1648:19:HAL_CAN_DeactivateNotification 24 static
../Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c:1679:6:HAL_CAN_IRQHandler 48 static
../Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c:2090:13:HAL_CAN_TxMailbox0CompleteCallback 16 static
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Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash.o: \
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Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.o: \
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Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_gpio.o: \
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../Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_i2c.h \
../Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_i2c_ex.h \
../Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_pwr.h \
../Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_pwr_ex.h \
../Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_spi.h \
../Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_spi_ex.h
../Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal.h:
../Core/Inc/stm32f3xx_hal_conf.h:
../Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_rcc.h:
../Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_def.h:
../Drivers/CMSIS/Device/ST/STM32F3xx/Include/stm32f3xx.h:
../Drivers/CMSIS/Device/ST/STM32F3xx/Include/stm32f302xc.h:
../Drivers/CMSIS/Include/core_cm4.h:
../Drivers/CMSIS/Include/cmsis_version.h:
../Drivers/CMSIS/Include/cmsis_compiler.h:
../Drivers/CMSIS/Include/cmsis_gcc.h:
../Drivers/CMSIS/Include/mpu_armv7.h:
../Drivers/CMSIS/Device/ST/STM32F3xx/Include/system_stm32f3xx.h:
../Drivers/STM32F3xx_HAL_Driver/Inc/Legacy/stm32_hal_legacy.h:
../Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_rcc_ex.h:
../Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_gpio.h:
../Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_gpio_ex.h:
../Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_exti.h:
../Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_dma.h:
../Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_dma_ex.h:
../Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_cortex.h:
../Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_can.h:
../Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_flash.h:
../Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_flash_ex.h:
../Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_i2c.h:
../Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_i2c_ex.h:
../Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_pwr.h:
../Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_pwr_ex.h:
../Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_spi.h:
../Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_spi_ex.h:

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