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804bb33064
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Add PWM control functionality
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2025-04-20 17:30:52 +02:00 |
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1a517299a0
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Add CAN send logic and DIO mapping
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2025-03-30 11:14:16 +02:00 |
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eb994ad693
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New pin mappings for wiring optimization
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2025-03-29 15:45:20 +01:00 |
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8e62180537
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Remove old signal mapping
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2025-03-29 12:57:28 +01:00 |
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8f6b924865
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Complete new CAN mappings
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2025-03-29 12:56:06 +01:00 |
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298fd8709c
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A few ideas for can mappings
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2025-03-27 20:24:25 +01:00 |
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84b4a487fc
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mappings scaffold
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2025-03-24 20:35:14 +01:00 |
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60a84c1290
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regen code
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2025-03-24 19:21:46 +01:00 |
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d05f28700f
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Update ADC DMA rank mappings to reflect pinout
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2025-03-24 19:13:54 +01:00 |
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29ebac472f
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clean up llm code and test all ADCs successfully
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2025-03-24 18:24:55 +01:00 |
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d089fa4796
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probably correct ram adresses for h7a3
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2025-03-24 17:33:43 +01:00 |
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852ce2fbae
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adc callback reached, llm linker script changes
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2025-03-24 17:19:55 +01:00 |
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fe9a486819
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Remove build/ and .stm32env from git
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2025-03-24 07:43:56 +01:00 |
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f7b04fb8ed
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Still no ADC (Timer 6 worked in Interrupt mode)
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2025-03-18 17:32:57 +01:00 |
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cd50212b39
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Software Scaffold
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2025-03-12 16:29:44 +01:00 |
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c512851a7c
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changed project structure
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2024-11-19 11:40:34 +01:00 |
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