clean up llm code and test all ADCs successfully
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parent
d089fa4796
commit
29ebac472f
Software
@ -46,7 +46,7 @@ void MX_ADC1_Init(void)
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*/
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hadc1.Instance = ADC1;
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hadc1.Init.ClockPrescaler = ADC_CLOCK_ASYNC_DIV2;
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hadc1.Init.Resolution = ADC_RESOLUTION_16B;
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hadc1.Init.Resolution = ADC_RESOLUTION_12B;
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hadc1.Init.ScanConvMode = ADC_SCAN_ENABLE;
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hadc1.Init.EOCSelection = ADC_EOC_SEQ_CONV;
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hadc1.Init.LowPowerAutoWait = DISABLE;
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@ -112,7 +112,6 @@ int main(void)
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Error_Handler();
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}
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if (HAL_ADC_Start_DMA(&hadc1, (uint32_t*)adc_values, 16) != HAL_OK)
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{
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Error_Handler();
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@ -120,11 +119,6 @@ int main(void)
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HAL_TIM_Base_Start(&htim6);
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if (!(hadc1.Instance->CR & ADC_CR_ADSTART))
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{
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Error_Handler(); // ADC not started
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}
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/* USER CODE END 2 */
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@ -135,12 +129,6 @@ int main(void)
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/* USER CODE END WHILE */
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/* USER CODE BEGIN 3 */
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volatile uint32_t counter = __HAL_TIM_GET_COUNTER(&htim6);
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volatile uint32_t adc_cr = (hadc1.Instance->CR);
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volatile uint32_t adc_values_adress = (uint32_t)adc_values;
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HAL_GPIO_WritePin(STATUS_G_GPIO_Port, STATUS_G_Pin, GPIO_PIN_SET);
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HAL_Delay(500);
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HAL_GPIO_WritePin(STATUS_G_GPIO_Port, STATUS_G_Pin, GPIO_PIN_RESET);
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@ -224,7 +212,10 @@ static void MX_NVIC_Init(void)
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/* USER CODE BEGIN 4 */
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void HAL_ADC_ConvCpltCallback(ADC_HandleTypeDef* hadc)
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{
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HAL_GPIO_WritePin(STATUS_R_GPIO_Port, STATUS_R_Pin, GPIO_PIN_SET);
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if (hadc->Instance == ADC1)
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{
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__asm volatile ("NOP");
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}
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}
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/* USER CODE END 4 */
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@ -236,6 +227,7 @@ void Error_Handler(void)
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{
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/* USER CODE BEGIN Error_Handler_Debug */
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/* User can add his own implementation to report the HAL error return state */
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HAL_GPIO_WritePin(STATUS_R_GPIO_Port, STATUS_R_Pin, GPIO_PIN_SET);
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__disable_irq();
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while (1)
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{
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@ -1,5 +1,5 @@
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##########################################################################################################################
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# File automatically-generated by tool: [projectgenerator] version: [4.5.0-RC5] date: [Mon Mar 24 15:58:35 CET 2025]
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# File automatically-generated by tool: [projectgenerator] version: [4.5.0-RC5] date: [Mon Mar 24 17:44:55 CET 2025]
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##########################################################################################################################
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# ------------------------------------------------
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@ -74,7 +74,7 @@ ADC1.Rank-6\#ChannelRegularConversion=7
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ADC1.Rank-7\#ChannelRegularConversion=8
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ADC1.Rank-8\#ChannelRegularConversion=9
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ADC1.Rank-9\#ChannelRegularConversion=10
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ADC1.Resolution=ADC_RESOLUTION_16B
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ADC1.Resolution=ADC_RESOLUTION_12B
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ADC1.SamplingTime-0\#ChannelRegularConversion=ADC_SAMPLETIME_16CYCLES_5
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ADC1.SamplingTime-1\#ChannelRegularConversion=ADC_SAMPLETIME_16CYCLES_5
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ADC1.SamplingTime-10\#ChannelRegularConversion=ADC_SAMPLETIME_16CYCLES_5
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@ -63,8 +63,8 @@ MEMORY
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{
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DTCMRAM (xrw) : ORIGIN = 0x20000000, LENGTH = 128K
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RAM_D1 (xrw) : ORIGIN = 0x24000000, LENGTH = 1024K /* D1 domain AXI SRAM */
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RAM_D2 (xrw) : ORIGIN = 0x30000000, LENGTH = 64K /* D2 domain AHB SRAM */
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RAM_D3 (xrw) : ORIGIN = 0x30010000, LENGTH = 64K /* D3 domain AHB SRAM */
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RAM_D2 (xrw) : ORIGIN = 0x30000000, LENGTH = 128K /* D2 domain AHB SRAM */
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RAM_D3 (xrw) : ORIGIN = 0x38000000, LENGTH = 64K /* D3 domain SDR SRAM */
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ITCMRAM (xrw) : ORIGIN = 0x00000000, LENGTH = 64K
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FLASH (rx) : ORIGIN = 0x8000000, LENGTH = 2048K
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}
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