diff --git a/Software/Core/Src/adc.c b/Software/Core/Src/adc.c index 60e64ec..35f14b9 100644 --- a/Software/Core/Src/adc.c +++ b/Software/Core/Src/adc.c @@ -46,7 +46,7 @@ void MX_ADC1_Init(void) */ hadc1.Instance = ADC1; hadc1.Init.ClockPrescaler = ADC_CLOCK_ASYNC_DIV2; - hadc1.Init.Resolution = ADC_RESOLUTION_16B; + hadc1.Init.Resolution = ADC_RESOLUTION_12B; hadc1.Init.ScanConvMode = ADC_SCAN_ENABLE; hadc1.Init.EOCSelection = ADC_EOC_SEQ_CONV; hadc1.Init.LowPowerAutoWait = DISABLE; diff --git a/Software/Core/Src/main.c b/Software/Core/Src/main.c index b93dd31..124cd13 100644 --- a/Software/Core/Src/main.c +++ b/Software/Core/Src/main.c @@ -112,7 +112,6 @@ int main(void) Error_Handler(); } - if (HAL_ADC_Start_DMA(&hadc1, (uint32_t*)adc_values, 16) != HAL_OK) { Error_Handler(); @@ -120,11 +119,6 @@ int main(void) HAL_TIM_Base_Start(&htim6); - if (!(hadc1.Instance->CR & ADC_CR_ADSTART)) - { - Error_Handler(); // ADC not started - } - /* USER CODE END 2 */ @@ -135,12 +129,6 @@ int main(void) /* USER CODE END WHILE */ /* USER CODE BEGIN 3 */ - volatile uint32_t counter = __HAL_TIM_GET_COUNTER(&htim6); - - volatile uint32_t adc_cr = (hadc1.Instance->CR); - - volatile uint32_t adc_values_adress = (uint32_t)adc_values; - HAL_GPIO_WritePin(STATUS_G_GPIO_Port, STATUS_G_Pin, GPIO_PIN_SET); HAL_Delay(500); HAL_GPIO_WritePin(STATUS_G_GPIO_Port, STATUS_G_Pin, GPIO_PIN_RESET); @@ -224,7 +212,10 @@ static void MX_NVIC_Init(void) /* USER CODE BEGIN 4 */ void HAL_ADC_ConvCpltCallback(ADC_HandleTypeDef* hadc) { - HAL_GPIO_WritePin(STATUS_R_GPIO_Port, STATUS_R_Pin, GPIO_PIN_SET); + if (hadc->Instance == ADC1) + { + __asm volatile ("NOP"); + } } /* USER CODE END 4 */ @@ -236,6 +227,7 @@ void Error_Handler(void) { /* USER CODE BEGIN Error_Handler_Debug */ /* User can add his own implementation to report the HAL error return state */ + HAL_GPIO_WritePin(STATUS_R_GPIO_Port, STATUS_R_Pin, GPIO_PIN_SET); __disable_irq(); while (1) { diff --git a/Software/Makefile b/Software/Makefile index bddfe30..5473417 100644 --- a/Software/Makefile +++ b/Software/Makefile @@ -1,5 +1,5 @@ ########################################################################################################################## -# File automatically-generated by tool: [projectgenerator] version: [4.5.0-RC5] date: [Mon Mar 24 15:58:35 CET 2025] +# File automatically-generated by tool: [projectgenerator] version: [4.5.0-RC5] date: [Mon Mar 24 17:44:55 CET 2025] ########################################################################################################################## # ------------------------------------------------ diff --git a/Software/sensor-node.ioc b/Software/sensor-node.ioc index 6e509c9..c2ea03f 100644 --- a/Software/sensor-node.ioc +++ b/Software/sensor-node.ioc @@ -74,7 +74,7 @@ ADC1.Rank-6\#ChannelRegularConversion=7 ADC1.Rank-7\#ChannelRegularConversion=8 ADC1.Rank-8\#ChannelRegularConversion=9 ADC1.Rank-9\#ChannelRegularConversion=10 -ADC1.Resolution=ADC_RESOLUTION_16B +ADC1.Resolution=ADC_RESOLUTION_12B ADC1.SamplingTime-0\#ChannelRegularConversion=ADC_SAMPLETIME_16CYCLES_5 ADC1.SamplingTime-1\#ChannelRegularConversion=ADC_SAMPLETIME_16CYCLES_5 ADC1.SamplingTime-10\#ChannelRegularConversion=ADC_SAMPLETIME_16CYCLES_5 diff --git a/Software/stm32h7a3ritx_flash.ld b/Software/stm32h7a3ritx_flash.ld index dcffb63..d6db316 100644 --- a/Software/stm32h7a3ritx_flash.ld +++ b/Software/stm32h7a3ritx_flash.ld @@ -63,8 +63,8 @@ MEMORY { DTCMRAM (xrw) : ORIGIN = 0x20000000, LENGTH = 128K RAM_D1 (xrw) : ORIGIN = 0x24000000, LENGTH = 1024K /* D1 domain AXI SRAM */ -RAM_D2 (xrw) : ORIGIN = 0x30000000, LENGTH = 64K /* D2 domain AHB SRAM */ -RAM_D3 (xrw) : ORIGIN = 0x30010000, LENGTH = 64K /* D3 domain AHB SRAM */ +RAM_D2 (xrw) : ORIGIN = 0x30000000, LENGTH = 128K /* D2 domain AHB SRAM */ +RAM_D3 (xrw) : ORIGIN = 0x38000000, LENGTH = 64K /* D3 domain SDR SRAM */ ITCMRAM (xrw) : ORIGIN = 0x00000000, LENGTH = 64K FLASH (rx) : ORIGIN = 0x8000000, LENGTH = 2048K }