Replace hard WD with soft one and figure out headless toolchain

This commit is contained in:
Oskar Winkels 2024-07-29 16:22:11 +02:00
parent 20b613b661
commit ad69b0a0be
Signed by: o.winkels
GPG Key ID: E7484A06E99DAEF1
3 changed files with 56 additions and 37 deletions

View File

@ -13,8 +13,9 @@ volatile uint8_t canmsg_received = 0;
extern PortExtenderGPIO EN_Ports;
extern CurrentMeasurements current_measurements_adc_val;
//extern IWDG_HandleTypeDef hiwdg;
extern uint32_t lastheartbeat;
extern int inhibit_SDC;
extern IWDG_HandleTypeDef hiwdg;
void can_init(CAN_HandleTypeDef* hcan) {
ftcan_init(hcan);
@ -31,7 +32,7 @@ void can_sendloop() {
status_data[3] = rxstate.radiatorfans;
status_data[4] = rxstate.pwmaggregat;
status_data[5] = rxstate.cooling_pump;
status_data[6] = 0xFF ^ rxstate.checksum;
status_data[6] = !inhibit_SDC; // Now means "WD Okay". TODO: Change DBC
ftcan_transmit(TX_STATUS_MSG_ID, status_data, 7);
uint8_t data[8];
@ -100,17 +101,22 @@ return;
}
void ftcan_msg_received_cb(uint16_t id, size_t datalen, const uint8_t* data) {
canmsg_received = 1;
if ((id == RX_STATUS_MSG_ID) && (datalen == 7)) {
rxstate.iostatus.porta.porta = data[0];
rxstate.iostatus.portb.portb = data[1];
rxstate.radiatorfans = data[2];
rxstate.tsacfans = data[3];
rxstate.pwmaggregat = data[4];
rxstate.cooling_pump = data[5];
rxstate.checksum = data[6];
rxstate.iostatus.porta.porta = data[0];
rxstate.iostatus.portb.portb = data[1];
rxstate.radiatorfans = data[2];
rxstate.tsacfans = data[3];
rxstate.pwmaggregat = data[4];
rxstate.cooling_pump = data[5];
rxstate.checksum = data[6];
}
if (id == RX_STATUS_HEARTBEAT) {
lastheartbeat = HAL_GetTick();
inhibit_SDC = 0;
}
if (id == RX_STATUS_HEARTBEAT)
HAL_IWDG_Refresh(&hiwdg);
}

View File

@ -75,7 +75,7 @@ static void MX_TIM3_Init(void);
static void MX_I2C1_Init(void);
static void MX_USART1_UART_Init(void);
static void MX_TIM6_Init(void);
static void MX_IWDG_Init(void);
//static void MX_IWDG_Init(void);
/* USER CODE BEGIN PFP */
/* USER CODE END PFP */
@ -83,11 +83,12 @@ static void MX_IWDG_Init(void);
/* Private user code ---------------------------------------------------------*/
/* USER CODE BEGIN 0 */
uint16_t adc1_buffer[7];
uint16_t adc2_buffer[7]; // data type specific to 16 bit integer with no sign ( vorzeichen )
uint16_t adc2_buffer[7]; // data type specific to 16 bit integer with no sign ( vorzeichen )
extern rx_status_frame rxstate;
extern volatile uint8_t canmsg_received;
uint32_t lastheartbeat;
int inhibit_SDC;
/* USER CODE END 0 */
@ -101,7 +102,7 @@ int main(void)
/* USER CODE BEGIN 1 */
// Freeze WDG when debugging
__HAL_DBGMCU_FREEZE_IWDG();
//__HAL_DBGMCU_FREEZE_IWDG();
/* USER CODE END 1 */
@ -135,7 +136,7 @@ int main(void)
//MX_IWDG_Init();
/* USER CODE BEGIN 2 */
// REMINDER: Comment out the IWDG Init above!!!
HAL_GPIO_WritePin(STATUS_LED1_GPIO_Port , STATUS_LED1_Pin , GPIO_PIN_SET);
HAL_GPIO_WritePin(GSS_GPIO_GPIO_Port, GSS_GPIO_Pin, GPIO_PIN_SET);
@ -150,27 +151,26 @@ int main(void)
HAL_TIM_Base_Start(&htim3);
// Prevent closing of SDC (esp. after WDG reset)
inhibit_SDC = 1;
//inhibit_SDC = 1;
// Wait 1s to prevent bus error state while ABX is starting up
// Wait 5s for the discharge of the DC link (so AMS can't restart)
HAL_Delay(5000);
//HAL_Delay(1000);
// SDC can now be closed
inhibit_SDC = 0;
// PDU will reset if it doesn't receive a heartbeat every 120ms
MX_IWDG_Init();
//MX_IWDG_Init();
/* USER CODE END 2 */
/* Infinite loop */
/* USER CODE BEGIN WHILE */
while(1)
{
while(1) {
/* USER CODE END WHILE */
/* USER CODE BEGIN 3 */
if (canmsg_received) { // USB zu CAN wandler , und dann CAN testen , validieren ob der code macht was es soll , red mit oskar/jasper
if (canmsg_received) { // USB zu CAN wandler , und dann CAN testen , validieren ob der code macht was es soll , red mit oskar/jasper
canmsg_received = 0;
ChannelControl_UpdateGPIOs(rxstate.iostatus);
ChannelControl_UpdatePWMs(
@ -186,7 +186,14 @@ while(1)
can_sendloop();
}
currentMonitor_checklimits(); // ob irgnwo ueberstrom getreten ist
// nominal WD time is 100ms, plus a bit of tolerance
// only trigger after 1s to allow for ABX bootup
if (((HAL_GetTick() - lastheartbeat) > 125U) && (HAL_GetTick() > 1000U)) {
// force open SDC, only resettable by power cycle
inhibit_SDC = 1;
}
currentMonitor_checklimits(); // ob irgnwo ueberstrom getreten ist
}
/* USER CODE END 3 */
}
@ -467,6 +474,12 @@ static void MX_IWDG_Init(void)
/* USER CODE BEGIN IWDG_Init 1 */
//
// CALC:
//
// 1000 × 1/(32 kHz / 4)
//
/* USER CODE END IWDG_Init 1 */
hiwdg.Instance = IWDG;
hiwdg.Init.Prescaler = IWDG_PRESCALER_4;

View File

@ -86,7 +86,7 @@ PREFIX = arm-none-eabi-
POSTFIX = "
# The gcc compiler bin path can be either defined in make command via GCC_PATH variable (> make GCC_PATH=xxx)
# either it can be added to the PATH environment variable.
GCC_PATH="c:/Users/nived/AppData/Roaming/Code/User/globalStorage/bmd.stm32-for-vscode/@xpack-dev-tools/arm-none-eabi-gcc/12.3.1-1.2.1/.content/bin
#GCC_PATH="c:/Users/nived/AppData/Roaming/Code/User/globalStorage/bmd.stm32-for-vscode/@xpack-dev-tools/arm-none-eabi-gcc/12.3.1-1.2.1/.content/bin
ifdef GCC_PATH
CXX = $(GCC_PATH)/$(PREFIX)g++$(POSTFIX)
CC = $(GCC_PATH)/$(PREFIX)gcc$(POSTFIX)
@ -120,7 +120,7 @@ MCU = $(CPU) -mthumb $(FPU) $(FLOAT-ABI)
# macros for gcc
# AS defines
AS_DEFS =
AS_DEFS =
# C defines
C_DEFS = \
@ -160,9 +160,9 @@ CXXFLAGS += -g -gdwarf -ggdb
endif
# Add additional flags
CFLAGS += -Wall -fdata-sections -ffunction-sections
ASFLAGS += -Wall -fdata-sections -ffunction-sections
CXXFLAGS +=
CFLAGS += -Wall -fdata-sections -ffunction-sections
ASFLAGS += -Wall -fdata-sections -ffunction-sections
CXXFLAGS +=
# Generate dependency information
CFLAGS += -MMD -MP -MF"$(@:%.o=%.d)"
@ -175,12 +175,12 @@ CXXFLAGS += -MMD -MP -MF"$(@:%.o=%.d)"
LDSCRIPT = STM32F302RBTx_FLASH.ld
# libraries
LIBS = -lc -lm -lnosys
LIBS = -lc -lm -lnosys
LIBDIR = \
# Additional LD Flags from config file
ADDITIONALLDFLAGS = -specs=nano.specs
ADDITIONALLDFLAGS = -specs=nano.specs
LDFLAGS = $(MCU) $(ADDITIONALLDFLAGS) -T$(LDSCRIPT) $(LIBDIR) $(LIBS) -Wl,-Map=$(BUILD_DIR)/$(TARGET).map,--cref -Wl,--gc-sections
@ -207,13 +207,13 @@ OBJECTS += $(addprefix $(BUILD_DIR)/,$(notdir $(UPPER_CASE_ASM_SOURCES:.S=.o)))
OBJECTS += $(addprefix $(BUILD_DIR)/,$(notdir $(LOWER_CASE_ASM_SOURCES:.s=.o)))
vpath %.s $(sort $(dir $(ASM_SOURCES)))
$(BUILD_DIR)/%.o: %.cpp STM32Make.make | $(BUILD_DIR)
$(BUILD_DIR)/%.o: %.cpp STM32Make.make | $(BUILD_DIR)
$(CXX) -c $(CXXFLAGS) -Wa,-a,-ad,-alms=$(BUILD_DIR)/$(notdir $(<:.cpp=.lst)) $< -o $@
$(BUILD_DIR)/%.o: %.cxx STM32Make.make | $(BUILD_DIR)
$(BUILD_DIR)/%.o: %.cxx STM32Make.make | $(BUILD_DIR)
$(CXX) -c $(CXXFLAGS) -Wa,-a,-ad,-alms=$(BUILD_DIR)/$(notdir $(<:.cxx=.lst)) $< -o $@
$(BUILD_DIR)/%.o: %.c STM32Make.make | $(BUILD_DIR)
$(BUILD_DIR)/%.o: %.c STM32Make.make | $(BUILD_DIR)
$(CC) -c $(CFLAGS) -Wa,-a,-ad,-alms=$(BUILD_DIR)/$(notdir $(<:.c=.lst)) $< -o $@
$(BUILD_DIR)/%.o: %.s STM32Make.make | $(BUILD_DIR)
@ -239,29 +239,29 @@ $(BUILD_DIR):
# flash
#######################################
flash: $(BUILD_DIR)/$(TARGET).elf
"C:/USERS/NIVED/APPDATA/ROAMING/CODE/USER/GLOBALSTORAGE/BMD.STM32-FOR-VSCODE/@XPACK-DEV-TOOLS/OPENOCD/0.12.0-2.1/.CONTENT/BIN/OPENOCD.EXE" -f ./openocd.cfg -c "program $(BUILD_DIR)/$(TARGET).elf verify reset exit"
openocd -f ./openocd.cfg -c "program $(BUILD_DIR)/$(TARGET).elf verify reset exit"
#######################################
# erase
#######################################
erase: $(BUILD_DIR)/$(TARGET).elf
"C:/USERS/NIVED/APPDATA/ROAMING/CODE/USER/GLOBALSTORAGE/BMD.STM32-FOR-VSCODE/@XPACK-DEV-TOOLS/OPENOCD/0.12.0-2.1/.CONTENT/BIN/OPENOCD.EXE" -f ./openocd.cfg -c "init; reset halt; stm32f3x mass_erase 0; exit"
openocd -f ./openocd.cfg -c "init; reset halt; stm32f3x mass_erase 0; exit"
#######################################
# clean up
#######################################
clean:
cmd /c rd /s /q $(BUILD_DIR)
rm -r $(BUILD_DIR)
#######################################
# custom makefile rules
#######################################
#######################################
# dependencies
#######################################
-include $(wildcard $(BUILD_DIR)/*.d)
# *** EOF ***
# *** EOF ***