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/**
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******************************************************************************
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* @file stm32h7xx_ll_delayblock.c
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* @author MCD Application Team
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* @brief DelayBlock Low Layer HAL module driver.
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*
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* This file provides firmware functions to manage the following
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* functionalities of the Delay Block peripheral:
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* + input clock frequency range 25MHz to 208MHz
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* + up to 12 oversampling phases
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*
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******************************************************************************
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* @attention
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*
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* Copyright (c) 2017 STMicroelectronics.
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* All rights reserved.
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*
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* This software is licensed under terms that can be found in the LICENSE file
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* in the root directory of this software component.
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* If no LICENSE file comes with this software, it is provided AS-IS.
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*
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******************************************************************************
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@verbatim
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==============================================================================
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##### DelayBlock peripheral features #####
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==============================================================================
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[..] The Delay block is used to generate an Output clock which is de-phased from the Input
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clock. The phase of the Output clock is programmed by FW. The Output clock is then used
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to clock the receive data in i.e. a SDMMC or QSPI interface.
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The delay is Voltage and Temperature dependent, which may require FW to do re-tuning
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and recenter the Output clock phase to the receive data.
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[..] The Delay Block features include the following:
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(+) Input clock frequency range 25MHz to 208MHz.
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(+) Up to 12 oversampling phases.
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##### How to use this driver #####
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==============================================================================
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[..]
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This driver is a considered as a driver of service for external devices drivers
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that interfaces with the DELAY peripheral.
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The DelayBlock_Enable() function, enables the DelayBlock instance, configure the delay line length
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and configure the Output clock phase.
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The DelayBlock_Disable() function, disables the DelayBlock instance by setting DEN flag to 0.
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@endverbatim
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*/
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/* Includes ------------------------------------------------------------------*/
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#include "stm32h7xx_hal.h"
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/** @addtogroup STM32H7xx_HAL_Driver
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* @{
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*/
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/** @defgroup DELAYBLOCK_LL DELAYBLOCK_LL
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* @brief Low layer module for Delay Block
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* @{
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*/
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#if defined(HAL_SD_MODULE_ENABLED) || defined(HAL_QSPI_MODULE_ENABLED)
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/* Private typedef -----------------------------------------------------------*/
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/* Private define ------------------------------------------------------------*/
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/** @defgroup DelayBlock_LL_Private_Defines Delay Block Low Layer Private Defines
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* @{
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*/
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#define DLYB_TIMEOUT 0xFFU
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/**
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* @}
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*/
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/* Private macro -------------------------------------------------------------*/
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/* Private variables ---------------------------------------------------------*/
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/* Private function prototypes -----------------------------------------------*/
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/* Exported functions --------------------------------------------------------*/
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/** @defgroup DelayBlock_LL_Exported_Functions Delay Block Low Layer Exported Functions
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* @{
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*/
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/** @defgroup HAL_DELAY_LL_Group1 Initialization de-initialization functions
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* @brief Initialization and Configuration functions
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*
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@verbatim
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===============================================================================
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##### Initialization and de-initialization functions #####
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===============================================================================
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[..] This section provides functions allowing to:
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@endverbatim
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* @{
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*/
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/**
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* @brief Enable the Delay Block instance.
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* @param DLYBx: Pointer to DLYB instance.
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* @retval HAL status
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*/
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HAL_StatusTypeDef DelayBlock_Enable(DLYB_TypeDef *DLYBx)
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{
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uint32_t unit = 0U;
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uint32_t sel = 0U;
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uint32_t sel_current;
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uint32_t unit_current;
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uint32_t tuning;
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uint32_t lng_mask;
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uint32_t tickstart;
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DLYBx->CR = DLYB_CR_DEN | DLYB_CR_SEN;
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for (sel_current = 0U; sel_current < DLYB_MAX_SELECT; sel_current++)
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{
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/* lng_mask is the mask bit for the LNG field to check the output of the UNITx*/
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lng_mask = DLYB_CFGR_LNG_0 << sel_current;
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tuning = 0U;
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for (unit_current = 0U; unit_current < DLYB_MAX_UNIT; unit_current++)
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{
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/* Set the Delay of the UNIT(s)*/
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DLYBx->CFGR = DLYB_MAX_SELECT | (unit_current << DLYB_CFGR_UNIT_Pos);
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/* Waiting for a LNG valid value */
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tickstart = HAL_GetTick();
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while ((DLYBx->CFGR & DLYB_CFGR_LNGF) == 0U)
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{
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if((HAL_GetTick() - tickstart) >= DLYB_TIMEOUT)
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{
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return HAL_TIMEOUT;
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}
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}
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if (tuning == 0U)
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{
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if ((DLYBx->CFGR & lng_mask) != 0U)
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{
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/* 1/2 period HIGH is detected */
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tuning = 1U;
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}
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}
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else
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{
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/* 1/2 period LOW detected after the HIGH 1/2 period => FULL PERIOD passed*/
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if((DLYBx->CFGR & lng_mask ) == 0U)
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{
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/* Save the first result */
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if( unit == 0U )
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{
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unit = unit_current;
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sel = sel_current + 1U;
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}
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break;
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}
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}
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}
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}
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/* Apply the Tuning settings */
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DLYBx->CR = 0U;
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DLYBx->CR = DLYB_CR_DEN | DLYB_CR_SEN;
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DLYBx->CFGR = sel | (unit << DLYB_CFGR_UNIT_Pos);
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DLYBx->CR = DLYB_CR_DEN;
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return HAL_OK;
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}
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/**
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* @brief Disable the Delay Block instance.
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* @param DLYBx: Pointer to DLYB instance.
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* @retval HAL status
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*/
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HAL_StatusTypeDef DelayBlock_Disable(DLYB_TypeDef *DLYBx)
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{
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/* Disable DLYB */
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DLYBx->CR = 0U;
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return HAL_OK;
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}
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/**
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* @brief Configure the Delay Block instance.
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* @param DLYBx: Pointer to DLYB instance.
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* @param PhaseSel: Phase selection [0..11].
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* @param Units: Delay units[0..127].
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* @retval HAL status
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*/
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HAL_StatusTypeDef DelayBlock_Configure(DLYB_TypeDef *DLYBx,uint32_t PhaseSel, uint32_t Units )
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{
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/* Apply the delay settings */
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DLYBx->CR = 0U;
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DLYBx->CR = DLYB_CR_DEN | DLYB_CR_SEN;
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DLYBx->CFGR = PhaseSel | (Units << DLYB_CFGR_UNIT_Pos);
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DLYBx->CR = DLYB_CR_DEN;
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return HAL_OK;
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}
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/**
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* @}
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*/
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/**
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* @}
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*/
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#endif /* (HAL_SD_MODULE_ENABLED) & (HAL_QSPI_MODULE_ENABLED)*/
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/**
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* @}
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*/
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/**
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* @}
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*/
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