72 lines
1.9 KiB
C
72 lines
1.9 KiB
C
#include "EEPROM.h"
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#include "main.h"
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#include "stm32f4xx_hal_def.h"
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#include "stm32f4xx_hal_i2c.h"
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EEPROM_State eeprom_state = EEPROM_OFF;
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I2C_HandleTypeDef* i2c;
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void eeprom_init(I2C_HandleTypeDef* handle) {
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i2c = handle;
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eeprom_state = EEPROM_READY;
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}
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HAL_StatusTypeDef eeprom_write(uint16_t addr, uint8_t data) {
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uint8_t page = (addr >> 8) & 0b1;
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uint8_t mem_addr = addr & 0xFF;
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// Address must be shifted left for the HAL
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uint8_t dev_addr = EEPROM_DEV_ADDR | (page << 1);
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uint8_t msg[2] = {mem_addr, data};
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return HAL_I2C_Master_Transmit(i2c, dev_addr, msg, 2, EEPROM_TIMEOUT);
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}
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HAL_StatusTypeDef eeprom_read_curr(uint8_t* data) {
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return HAL_I2C_Master_Receive(i2c, EEPROM_DEV_ADDR, data, 1, EEPROM_TIMEOUT);
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}
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HAL_StatusTypeDef eeprom_read_random(uint16_t addr, uint8_t* data) {
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// This is basically an SMBus Read Byte, see
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// https://www.kernel.org/doc/html/latest/i2c/smbus-protocol.html#smbus-read-byte
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uint8_t page = (addr >> 8) & 0b1;
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uint8_t mem_addr = addr & 0xFF;
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// Address must be shifted left for the HAL
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uint8_t dev_addr = EEPROM_DEV_ADDR | (page << 1);
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HAL_StatusTypeDef status = HAL_I2C_Master_Seq_Transmit_IT(
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i2c, dev_addr, &mem_addr, 1, I2C_FIRST_FRAME);
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if (status != HAL_OK) {
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return status;
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}
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// Wait for write to be complete
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while (HAL_I2C_GetState(i2c) != HAL_I2C_STATE_READY) {
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}
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// Try up to EEPROM_READ_TRIES times to get an acknowledgement from the slave.
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// If we don't abort and return the error.
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for (int i = 0; i < EEPROM_READ_TRIES; i++) {
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status =
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HAL_I2C_Master_Seq_Receive_IT(i2c, dev_addr, data, 1, I2C_LAST_FRAME);
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if (status == HAL_OK) {
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break;
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} else if (HAL_I2C_GetError(i2c) != HAL_I2C_ERROR_AF) {
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// Not an acknowledge failure -> timeout, abort
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break;
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}
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}
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if (status != HAL_OK) {
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return status;
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}
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// Wait for read to be complete
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while (HAL_I2C_GetState(i2c) != HAL_I2C_STATE_READY) {
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}
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return HAL_OK;
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}
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