FaSTTUBe/ams-master
59
1
Fork 0
Code Issues 2 Pull Requests Packages Projects Releases Wiki Activity

add: log module status in main loop

Browse Source
This commit is contained in:
Kilian Bracher 2025-03-07 23:27:17 +01:00
parent 983c8b1e2f
commit f6024f9744
1 changed files with 118 additions and 0 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

118
AMS_Master_Code/Core/Src/main.c
View File

@ -22,7 +22,9 @@
/* Private includes ----------------------------------------------------------*/
/* USER CODE BEGIN Includes */
#include "ADBMS_Driver.h"
#include "config_ADBMS6830.h"
#include "swo_log.h"
#include <string.h>
/* USER CODE END Includes */
/* Private typedef -----------------------------------------------------------*/
@ -111,6 +113,7 @@ int main(void)
/* Infinite loop */
/* USER CODE BEGIN WHILE */
int count = 0;
while (1)
{
status = AMS_Idle_Loop().status;
@ -119,10 +122,125 @@ int main(void)
HAL_Delay(2000);
AMS_Init(&hspi1);
}
if (count % 4 == 0) {
for (size_t i = 0; i < N_BMS; i++) {
debug_log(LOG_LEVEL_INFO, "Module %d status:", i);
// Print cell voltages in 4x4 format
debug_log(LOG_LEVEL_INFO, " Cell voltages (mV):");
debug_log(LOG_LEVEL_INFO, " C0: %4d C1: %4d C2: %4d C3: %4d",
modules[i].cellVoltages[0], modules[i].cellVoltages[1],
modules[i].cellVoltages[2], modules[i].cellVoltages[3]);
debug_log(LOG_LEVEL_INFO, " C4: %4d C5: %4d C6: %4d C7: %4d",
modules[i].cellVoltages[4], modules[i].cellVoltages[5],
modules[i].cellVoltages[6], modules[i].cellVoltages[7]);
debug_log(LOG_LEVEL_INFO, " C8: %4d C9: %4d C10: %4d C11: %4d",
modules[i].cellVoltages[8], modules[i].cellVoltages[9],
modules[i].cellVoltages[10], modules[i].cellVoltages[11]);
debug_log(LOG_LEVEL_INFO, " C12: %4d C13: %4d C14: %4d C15: %4d",
modules[i].cellVoltages[12], modules[i].cellVoltages[13],
modules[i].cellVoltages[14], modules[i].cellVoltages[15]);
// Print GPIO values
debug_log(LOG_LEVEL_INFO, " GPIO values:");
debug_log(LOG_LEVEL_INFO, " G0: %4d G1: %4d G2: %4d G3: %4d G4: %4d",
modules[i].GPIO_Values[0], modules[i].GPIO_Values[1],
modules[i].GPIO_Values[2], modules[i].GPIO_Values[3],
modules[i].GPIO_Values[4]);
debug_log(LOG_LEVEL_INFO, " G5: %4d G6: %4d G7: %4d G8: %4d G9: %4d",
modules[i].GPIO_Values[5], modules[i].GPIO_Values[6],
modules[i].GPIO_Values[7], modules[i].GPIO_Values[8],
modules[i].GPIO_Values[9]);
debug_log(LOG_LEVEL_INFO, " Internal temp: %d, VAnalog: %d, VDigital: %d, VRef: %d",
modules[i].internalDieTemp, modules[i].analogSupplyVoltage,
modules[i].digitalSupplyVoltage, modules[i].refVoltage);
// Print error flags if any are set
bool hasFlags = false;
char flagBuffer[128] = "";
char *bufPos = flagBuffer;
if (modules[i].status.CS_FLT) {
bufPos = stpcpy(bufPos, "CS_FLT ");
hasFlags = true;
}
if (modules[i].status.SMED) {
bufPos = stpcpy(bufPos, "SMED ");
hasFlags = true;
}
if (modules[i].status.SED) {
bufPos = stpcpy(bufPos, "SED ");
hasFlags = true;
}
if (modules[i].status.CMED) {
bufPos = stpcpy(bufPos, "CMED ");
hasFlags = true;
}
if (modules[i].status.CED) {
bufPos = stpcpy(bufPos, "CED ");
hasFlags = true;
}
if (modules[i].status.VD_UV) {
bufPos = stpcpy(bufPos, "VD_UV ");
hasFlags = true;
}
if (modules[i].status.VD_OV) {
bufPos = stpcpy(bufPos, "VD_OV ");
hasFlags = true;
}
if (modules[i].status.VA_UV) {
bufPos = stpcpy(bufPos, "VA_UV ");
hasFlags = true;
}
if (modules[i].status.VA_OV) {
bufPos = stpcpy(bufPos, "VA_OV ");
hasFlags = true;
}
if (modules[i].status.THSD) {
bufPos = stpcpy(bufPos, "THSD ");
hasFlags = true;
}
if (modules[i].status.SLEEP) {
bufPos = stpcpy(bufPos, "SLEEP ");
hasFlags = true;
}
if (modules[i].status.SPIFLT) {
bufPos = stpcpy(bufPos, "SPIFLT ");
hasFlags = true;
}
if (modules[i].status.COMPARE) {
bufPos = stpcpy(bufPos, "COMPARE ");
hasFlags = true;
}
if (modules[i].status.VDE) {
bufPos = stpcpy(bufPos, "VDE ");
hasFlags = true;
}
if (modules[i].status.VDEL) {
bufPos = stpcpy(bufPos, "VDEL ");
hasFlags = true;
}
debug_log(LOG_LEVEL_INFO, " Status flags: %s", hasFlags ? flagBuffer : "[none]");
debug_log(LOG_LEVEL_INFO, " Conversion counter: %d", modules[i].status.CCTS);
// Check for over/under voltage
if (modules[i].overVoltage || modules[i].underVoltage) {
debug_log(LOG_LEVEL_WARNING, " Module %d voltage issues - OV: 0x%08lX, UV: 0x%08lX",
i, modules[i].overVoltage, modules[i].underVoltage);
}
debug_log(LOG_LEVEL_INFO, " ---------------");
}
}
HAL_Delay(100);
/* USER CODE END WHILE */
/* USER CODE BEGIN 3 */
count++;
count &= 0b1111; // wrap around at 16
}
/* USER CODE END 3 */
}