416 lines
17 KiB
Plaintext
416 lines
17 KiB
Plaintext
ARM GAS /tmp/cczmVS9Q.s page 1
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1 .cpu cortex-m4
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2 .arch armv7e-m
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3 .fpu fpv4-sp-d16
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4 .eabi_attribute 27, 1
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5 .eabi_attribute 28, 1
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6 .eabi_attribute 20, 1
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7 .eabi_attribute 21, 1
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8 .eabi_attribute 23, 3
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9 .eabi_attribute 24, 1
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10 .eabi_attribute 25, 1
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11 .eabi_attribute 26, 1
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12 .eabi_attribute 30, 1
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13 .eabi_attribute 34, 1
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14 .eabi_attribute 18, 4
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15 .file "AMS_HighLevel.c"
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16 .text
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17 .Ltext0:
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18 .cfi_sections .debug_frame
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19 .file 1 "Core/Src/AMS_HighLevel.c"
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20 .section .text.AMS_Init,"ax",%progbits
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21 .align 1
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22 .global AMS_Init
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23 .syntax unified
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24 .thumb
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25 .thumb_func
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27 AMS_Init:
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28 .LVL0:
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29 .LFB123:
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1:Core/Src/AMS_HighLevel.c **** /*
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2:Core/Src/AMS_HighLevel.c **** * AMS_HighLevel.c
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3:Core/Src/AMS_HighLevel.c **** *
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4:Core/Src/AMS_HighLevel.c **** * Created on: 20.07.2022
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5:Core/Src/AMS_HighLevel.c **** * Author: max
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6:Core/Src/AMS_HighLevel.c **** */
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7:Core/Src/AMS_HighLevel.c ****
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8:Core/Src/AMS_HighLevel.c **** #include "AMS_HighLevel.h"
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9:Core/Src/AMS_HighLevel.c **** #include "ADBMS_Abstraction.h"
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10:Core/Src/AMS_HighLevel.c **** #include "TMP1075.h"
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11:Core/Src/AMS_HighLevel.c **** #include "24LC02.h"
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12:Core/Src/AMS_HighLevel.c **** #include "stm32f3xx_hal.h"
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13:Core/Src/AMS_HighLevel.c **** #include <stdint.h>
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14:Core/Src/AMS_HighLevel.c **** #include <string.h>
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15:Core/Src/AMS_HighLevel.c ****
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16:Core/Src/AMS_HighLevel.c **** Cell_Module module = {};
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17:Core/Src/AMS_HighLevel.c ****
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18:Core/Src/AMS_HighLevel.c **** uint16_t amsuv = 0;
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19:Core/Src/AMS_HighLevel.c **** uint16_t amsov = 0;
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20:Core/Src/AMS_HighLevel.c ****
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21:Core/Src/AMS_HighLevel.c **** uint8_t numberofCells = 15;
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22:Core/Src/AMS_HighLevel.c **** uint8_t numberofAux = 0;
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23:Core/Src/AMS_HighLevel.c ****
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24:Core/Src/AMS_HighLevel.c **** uint8_t packetChecksumFails = 0;
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25:Core/Src/AMS_HighLevel.c **** #define MAX_PACKET_CHECKSUM_FAILS 5
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26:Core/Src/AMS_HighLevel.c ****
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27:Core/Src/AMS_HighLevel.c **** uint8_t deviceSleeps = 0;
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28:Core/Src/AMS_HighLevel.c **** #define MAX_DEVICE_SLEEP 3 //TODO: change to correct value
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29:Core/Src/AMS_HighLevel.c ****
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ARM GAS /tmp/cczmVS9Q.s page 2
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30:Core/Src/AMS_HighLevel.c **** struct pollingTimes {
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31:Core/Src/AMS_HighLevel.c **** uint32_t S_ADC_OW_CHECK;
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32:Core/Src/AMS_HighLevel.c **** uint32_t TMP1075;
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33:Core/Src/AMS_HighLevel.c **** };
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34:Core/Src/AMS_HighLevel.c ****
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35:Core/Src/AMS_HighLevel.c **** struct pollingTimes pollingTimes = {0, 0};
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36:Core/Src/AMS_HighLevel.c ****
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37:Core/Src/AMS_HighLevel.c **** uint8_t AMS_Init(SPI_HandleTypeDef* hspi) {
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30 .loc 1 37 43 view -0
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31 .cfi_startproc
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32 @ args = 0, pretend = 0, frame = 0
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33 @ frame_needed = 0, uses_anonymous_args = 0
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34 .loc 1 37 43 is_stmt 0 view .LVU1
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35 0000 38B5 push {r3, r4, r5, lr}
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36 .cfi_def_cfa_offset 16
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37 .cfi_offset 3, -16
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38 .cfi_offset 4, -12
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39 .cfi_offset 5, -8
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40 .cfi_offset 14, -4
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38:Core/Src/AMS_HighLevel.c **** uint8_t ret = initAMS(hspi, numberofCells, numberofAux);
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41 .loc 1 38 3 is_stmt 1 view .LVU2
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42 .loc 1 38 17 is_stmt 0 view .LVU3
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43 0002 0C4B ldr r3, .L3
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44 0004 1A78 ldrb r2, [r3] @ zero_extendqisi2
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45 0006 0C4B ldr r3, .L3+4
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46 0008 1978 ldrb r1, [r3] @ zero_extendqisi2
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47 000a FFF7FEFF bl initAMS
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48 .LVL1:
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49 .loc 1 38 17 view .LVU4
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50 000e 0446 mov r4, r0
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51 .LVL2:
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39:Core/Src/AMS_HighLevel.c **** amsov = DEFAULT_OV;
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52 .loc 1 39 3 is_stmt 1 view .LVU5
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53 .loc 1 39 9 is_stmt 0 view .LVU6
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54 0010 0A4B ldr r3, .L3+8
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55 0012 40F26542 movw r2, #1125
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56 0016 1A80 strh r2, [r3] @ movhi
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40:Core/Src/AMS_HighLevel.c **** amsuv = DEFAULT_UV;
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57 .loc 1 40 3 is_stmt 1 view .LVU7
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58 .loc 1 40 9 is_stmt 0 view .LVU8
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59 0018 094B ldr r3, .L3+12
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60 001a 40F2A112 movw r2, #417
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61 001e 1A80 strh r2, [r3] @ movhi
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41:Core/Src/AMS_HighLevel.c ****
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42:Core/Src/AMS_HighLevel.c **** pollingTimes = (struct pollingTimes) {HAL_GetTick(), HAL_GetTick()};
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62 .loc 1 42 3 is_stmt 1 view .LVU9
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63 .loc 1 42 41 is_stmt 0 view .LVU10
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64 0020 FFF7FEFF bl HAL_GetTick
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65 .LVL3:
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66 0024 0546 mov r5, r0
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67 .loc 1 42 56 discriminator 1 view .LVU11
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68 0026 FFF7FEFF bl HAL_GetTick
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69 .LVL4:
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70 .loc 1 42 16 discriminator 2 view .LVU12
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71 002a 064B ldr r3, .L3+16
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72 002c 1D60 str r5, [r3]
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73 002e 5860 str r0, [r3, #4]
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ARM GAS /tmp/cczmVS9Q.s page 3
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43:Core/Src/AMS_HighLevel.c ****
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44:Core/Src/AMS_HighLevel.c **** return ret;
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74 .loc 1 44 3 is_stmt 1 view .LVU13
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45:Core/Src/AMS_HighLevel.c **** }
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75 .loc 1 45 1 is_stmt 0 view .LVU14
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76 0030 2046 mov r0, r4
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77 0032 38BD pop {r3, r4, r5, pc}
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78 .LVL5:
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79 .L4:
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80 .loc 1 45 1 view .LVU15
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81 .align 2
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82 .L3:
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83 0034 00000000 .word numberofAux
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84 0038 00000000 .word numberofCells
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85 003c 00000000 .word amsov
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86 0040 00000000 .word amsuv
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87 0044 00000000 .word pollingTimes
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88 .cfi_endproc
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89 .LFE123:
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91 .section .text.AMS_Idle_Loop,"ax",%progbits
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92 .align 1
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93 .global AMS_Idle_Loop
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94 .syntax unified
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95 .thumb
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96 .thumb_func
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98 AMS_Idle_Loop:
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99 .LFB124:
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46:Core/Src/AMS_HighLevel.c ****
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47:Core/Src/AMS_HighLevel.c **** uint8_t AMS_Idle_Loop() {
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100 .loc 1 47 25 is_stmt 1 view -0
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101 .cfi_startproc
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102 @ args = 0, pretend = 0, frame = 8
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103 @ frame_needed = 0, uses_anonymous_args = 0
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104 0000 30B5 push {r4, r5, lr}
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105 .cfi_def_cfa_offset 12
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106 .cfi_offset 4, -12
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107 .cfi_offset 5, -8
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108 .cfi_offset 14, -4
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109 0002 83B0 sub sp, sp, #12
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110 .cfi_def_cfa_offset 24
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48:Core/Src/AMS_HighLevel.c **** if (!amsWakeUp()) {
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111 .loc 1 48 3 view .LVU17
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112 .loc 1 48 8 is_stmt 0 view .LVU18
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113 0004 FFF7FEFF bl amsWakeUp
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114 .LVL6:
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49:Core/Src/AMS_HighLevel.c **** //error_data.data_kind = SEK_INTERNAL_BMS_TIMEOUT; //we don't receive data for the wakeup comma
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50:Core/Src/AMS_HighLevel.c **** //set_error_source(ERROR_SOURCE_INTERNAL); //so we can't tell if we timed out
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51:Core/Src/AMS_HighLevel.c **** }
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115 .loc 1 51 3 is_stmt 1 view .LVU19
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52:Core/Src/AMS_HighLevel.c ****
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53:Core/Src/AMS_HighLevel.c **** packetChecksumFails += amsAuxAndStatusMeasurement(&module);
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116 .loc 1 53 3 view .LVU20
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117 .loc 1 53 26 is_stmt 0 view .LVU21
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118 0008 1B4C ldr r4, .L15
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119 000a 2046 mov r0, r4
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120 000c FFF7FEFF bl amsAuxAndStatusMeasurement
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121 .LVL7:
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ARM GAS /tmp/cczmVS9Q.s page 4
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122 .loc 1 53 23 discriminator 1 view .LVU22
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123 0010 1A4A ldr r2, .L15+4
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124 0012 1378 ldrb r3, [r2] @ zero_extendqisi2
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125 0014 0344 add r3, r3, r0
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126 0016 1370 strb r3, [r2]
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54:Core/Src/AMS_HighLevel.c ****
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55:Core/Src/AMS_HighLevel.c **** if (module.status.SLEEP) {
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127 .loc 1 55 3 is_stmt 1 view .LVU23
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128 .loc 1 55 7 is_stmt 0 view .LVU24
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129 0018 94F83930 ldrb r3, [r4, #57] @ zero_extendqisi2
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130 .loc 1 55 6 view .LVU25
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131 001c 13F0100F tst r3, #16
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132 0020 06D0 beq .L6
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56:Core/Src/AMS_HighLevel.c **** deviceSleeps++;
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133 .loc 1 56 5 is_stmt 1 view .LVU26
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134 .loc 1 56 17 is_stmt 0 view .LVU27
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135 0022 174A ldr r2, .L15+8
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136 0024 1378 ldrb r3, [r2] @ zero_extendqisi2
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137 0026 0133 adds r3, r3, #1
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138 0028 DBB2 uxtb r3, r3
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139 002a 1370 strb r3, [r2]
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57:Core/Src/AMS_HighLevel.c **** if (deviceSleeps > MAX_DEVICE_SLEEP) {
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140 .loc 1 57 5 is_stmt 1 view .LVU28
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141 .loc 1 57 8 is_stmt 0 view .LVU29
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142 002c 032B cmp r3, #3
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143 002e 13D9 bls .L14
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144 .L6:
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58:Core/Src/AMS_HighLevel.c ****
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59:Core/Src/AMS_HighLevel.c **** } else {
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60:Core/Src/AMS_HighLevel.c **** amsReset();
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61:Core/Src/AMS_HighLevel.c **** }
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62:Core/Src/AMS_HighLevel.c **** }
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63:Core/Src/AMS_HighLevel.c ****
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64:Core/Src/AMS_HighLevel.c **** packetChecksumFails += amsCellMeasurement(&module);
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145 .loc 1 64 3 is_stmt 1 view .LVU30
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146 .loc 1 64 26 is_stmt 0 view .LVU31
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147 0030 114D ldr r5, .L15
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148 0032 2846 mov r0, r5
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149 0034 FFF7FEFF bl amsCellMeasurement
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150 .LVL8:
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151 .loc 1 64 23 discriminator 1 view .LVU32
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152 0038 104C ldr r4, .L15+4
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153 003a 2378 ldrb r3, [r4] @ zero_extendqisi2
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154 003c 0344 add r3, r3, r0
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155 003e 2370 strb r3, [r4]
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65:Core/Src/AMS_HighLevel.c **** packetChecksumFails += amsCheckUnderOverVoltage(&module);
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156 .loc 1 65 3 is_stmt 1 view .LVU33
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157 .loc 1 65 26 is_stmt 0 view .LVU34
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158 0040 2846 mov r0, r5
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159 0042 FFF7FEFF bl amsCheckUnderOverVoltage
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160 .LVL9:
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161 .loc 1 65 23 discriminator 1 view .LVU35
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162 0046 2378 ldrb r3, [r4] @ zero_extendqisi2
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163 0048 0344 add r3, r3, r0
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164 004a 2370 strb r3, [r4]
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66:Core/Src/AMS_HighLevel.c ****
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67:Core/Src/AMS_HighLevel.c **** if(eeprom_write(0, 7) != 0){
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ARM GAS /tmp/cczmVS9Q.s page 5
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165 .loc 1 67 3 is_stmt 1 view .LVU36
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166 .loc 1 67 6 is_stmt 0 view .LVU37
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167 004c 0721 movs r1, #7
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168 004e 0020 movs r0, #0
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169 0050 FFF7FEFF bl eeprom_write
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170 .LVL10:
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171 .loc 1 67 5 discriminator 1 view .LVU38
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172 0054 18B1 cbz r0, .L7
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173 .L8:
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68:Core/Src/AMS_HighLevel.c **** while(1){}
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174 .loc 1 68 5 is_stmt 1 view .LVU39
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175 .loc 1 68 14 view .LVU40
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176 .loc 1 68 10 view .LVU41
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177 0056 FEE7 b .L8
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178 .L14:
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60:Core/Src/AMS_HighLevel.c **** }
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179 .loc 1 60 7 view .LVU42
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180 0058 FFF7FEFF bl amsReset
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181 .LVL11:
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182 005c E8E7 b .L6
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183 .L7:
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69:Core/Src/AMS_HighLevel.c **** }
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70:Core/Src/AMS_HighLevel.c **** int eepromBuf;
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184 .loc 1 70 3 view .LVU43
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71:Core/Src/AMS_HighLevel.c **** if(eeprom_read(0, &eepromBuf) != 0){
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185 .loc 1 71 3 view .LVU44
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186 .loc 1 71 6 is_stmt 0 view .LVU45
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187 005e 01A9 add r1, sp, #4
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188 0060 0020 movs r0, #0
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189 0062 FFF7FEFF bl eeprom_read
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190 .LVL12:
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191 .loc 1 71 5 discriminator 1 view .LVU46
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192 0066 00B1 cbz r0, .L9
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193 .L10:
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72:Core/Src/AMS_HighLevel.c **** while(1){}
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194 .loc 1 72 5 is_stmt 1 view .LVU47
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195 .loc 1 72 14 view .LVU48
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196 .loc 1 72 10 view .LVU49
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197 0068 FEE7 b .L10
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198 .L9:
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73:Core/Src/AMS_HighLevel.c **** }
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74:Core/Src/AMS_HighLevel.c ****
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75:Core/Src/AMS_HighLevel.c **** if (eepromBuf != 7){
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199 .loc 1 75 3 view .LVU50
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200 .loc 1 75 17 is_stmt 0 view .LVU51
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201 006a 019B ldr r3, [sp, #4]
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202 .loc 1 75 6 view .LVU52
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203 006c 072B cmp r3, #7
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204 006e 00D0 beq .L11
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205 .L12:
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76:Core/Src/AMS_HighLevel.c **** while(1){}
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206 .loc 1 76 5 is_stmt 1 view .LVU53
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207 .loc 1 76 14 view .LVU54
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208 .loc 1 76 10 view .LVU55
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209 0070 FEE7 b .L12
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210 .L11:
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77:Core/Src/AMS_HighLevel.c **** }
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ARM GAS /tmp/cczmVS9Q.s page 6
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78:Core/Src/AMS_HighLevel.c ****
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79:Core/Src/AMS_HighLevel.c **** return 0;
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211 .loc 1 79 3 view .LVU56
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80:Core/Src/AMS_HighLevel.c **** }...
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212 .loc 1 80 1 is_stmt 0 view .LVU57
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213 0072 0020 movs r0, #0
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214 0074 03B0 add sp, sp, #12
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215 .cfi_def_cfa_offset 12
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216 @ sp needed
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217 0076 30BD pop {r4, r5, pc}
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218 .L16:
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219 .align 2
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220 .L15:
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221 0078 00000000 .word module
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222 007c 00000000 .word packetChecksumFails
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223 0080 00000000 .word deviceSleeps
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224 .cfi_endproc
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225 .LFE124:
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227 .global pollingTimes
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228 .section .bss.pollingTimes,"aw",%nobits
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229 .align 2
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232 pollingTimes:
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233 0000 00000000 .space 8
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233 00000000
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234 .global deviceSleeps
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235 .section .bss.deviceSleeps,"aw",%nobits
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238 deviceSleeps:
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239 0000 00 .space 1
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240 .global packetChecksumFails
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241 .section .bss.packetChecksumFails,"aw",%nobits
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244 packetChecksumFails:
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245 0000 00 .space 1
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246 .global numberofAux
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247 .section .bss.numberofAux,"aw",%nobits
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250 numberofAux:
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251 0000 00 .space 1
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252 .global numberofCells
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253 .section .data.numberofCells,"aw"
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256 numberofCells:
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257 0000 0F .byte 15
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258 .global amsov
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259 .section .bss.amsov,"aw",%nobits
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260 .align 1
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263 amsov:
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264 0000 0000 .space 2
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265 .global amsuv
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266 .section .bss.amsuv,"aw",%nobits
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267 .align 1
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270 amsuv:
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271 0000 0000 .space 2
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272 .global module
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273 .section .bss.module,"aw",%nobits
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274 .align 2
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277 module:
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278 0000 00000000 .space 96
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278 00000000
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278 00000000
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ARM GAS /tmp/cczmVS9Q.s page 7
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278 00000000
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278 00000000
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279 .text
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280 .Letext0:
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281 .file 2 "/home/chiangni/.config/Code/User/globalStorage/bmd.stm32-for-vscode/@xpack-dev-tools/arm-
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282 .file 3 "/home/chiangni/.config/Code/User/globalStorage/bmd.stm32-for-vscode/@xpack-dev-tools/arm-
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283 .file 4 "Drivers/CMSIS/Device/ST/STM32F3xx/Include/stm32f302x8.h"
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284 .file 5 "Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_def.h"
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285 .file 6 "Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_dma.h"
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286 .file 7 "Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_spi.h"
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287 .file 8 "Core/Inc/ADBMS_LL_Driver.h"
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288 .file 9 "Core/Inc/ADBMS_Abstraction.h"
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289 .file 10 "Core/Inc/AMS_HighLevel.h"
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290 .file 11 "Core/Inc/24LC02.h"
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291 .file 12 "Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal.h"
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ARM GAS /tmp/cczmVS9Q.s page 8
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DEFINED SYMBOLS
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*ABS*:00000000 AMS_HighLevel.c
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/tmp/cczmVS9Q.s:21 .text.AMS_Init:00000000 $t
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/tmp/cczmVS9Q.s:27 .text.AMS_Init:00000000 AMS_Init
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/tmp/cczmVS9Q.s:83 .text.AMS_Init:00000034 $d
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/tmp/cczmVS9Q.s:250 .bss.numberofAux:00000000 numberofAux
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/tmp/cczmVS9Q.s:256 .data.numberofCells:00000000 numberofCells
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/tmp/cczmVS9Q.s:263 .bss.amsov:00000000 amsov
|
||
/tmp/cczmVS9Q.s:270 .bss.amsuv:00000000 amsuv
|
||
/tmp/cczmVS9Q.s:232 .bss.pollingTimes:00000000 pollingTimes
|
||
/tmp/cczmVS9Q.s:92 .text.AMS_Idle_Loop:00000000 $t
|
||
/tmp/cczmVS9Q.s:98 .text.AMS_Idle_Loop:00000000 AMS_Idle_Loop
|
||
/tmp/cczmVS9Q.s:221 .text.AMS_Idle_Loop:00000078 $d
|
||
/tmp/cczmVS9Q.s:277 .bss.module:00000000 module
|
||
/tmp/cczmVS9Q.s:244 .bss.packetChecksumFails:00000000 packetChecksumFails
|
||
/tmp/cczmVS9Q.s:238 .bss.deviceSleeps:00000000 deviceSleeps
|
||
/tmp/cczmVS9Q.s:229 .bss.pollingTimes:00000000 $d
|
||
/tmp/cczmVS9Q.s:239 .bss.deviceSleeps:00000000 $d
|
||
/tmp/cczmVS9Q.s:245 .bss.packetChecksumFails:00000000 $d
|
||
/tmp/cczmVS9Q.s:251 .bss.numberofAux:00000000 $d
|
||
/tmp/cczmVS9Q.s:260 .bss.amsov:00000000 $d
|
||
/tmp/cczmVS9Q.s:267 .bss.amsuv:00000000 $d
|
||
/tmp/cczmVS9Q.s:274 .bss.module:00000000 $d
|
||
|
||
UNDEFINED SYMBOLS
|
||
initAMS
|
||
HAL_GetTick
|
||
amsWakeUp
|
||
amsAuxAndStatusMeasurement
|
||
amsCellMeasurement
|
||
amsCheckUnderOverVoltage
|
||
eeprom_write
|
||
amsReset
|
||
eeprom_read
|