ARM GAS /tmp/cczmVS9Q.s page 1 1 .cpu cortex-m4 2 .arch armv7e-m 3 .fpu fpv4-sp-d16 4 .eabi_attribute 27, 1 5 .eabi_attribute 28, 1 6 .eabi_attribute 20, 1 7 .eabi_attribute 21, 1 8 .eabi_attribute 23, 3 9 .eabi_attribute 24, 1 10 .eabi_attribute 25, 1 11 .eabi_attribute 26, 1 12 .eabi_attribute 30, 1 13 .eabi_attribute 34, 1 14 .eabi_attribute 18, 4 15 .file "AMS_HighLevel.c" 16 .text 17 .Ltext0: 18 .cfi_sections .debug_frame 19 .file 1 "Core/Src/AMS_HighLevel.c" 20 .section .text.AMS_Init,"ax",%progbits 21 .align 1 22 .global AMS_Init 23 .syntax unified 24 .thumb 25 .thumb_func 27 AMS_Init: 28 .LVL0: 29 .LFB123: 1:Core/Src/AMS_HighLevel.c **** /* 2:Core/Src/AMS_HighLevel.c **** * AMS_HighLevel.c 3:Core/Src/AMS_HighLevel.c **** * 4:Core/Src/AMS_HighLevel.c **** * Created on: 20.07.2022 5:Core/Src/AMS_HighLevel.c **** * Author: max 6:Core/Src/AMS_HighLevel.c **** */ 7:Core/Src/AMS_HighLevel.c **** 8:Core/Src/AMS_HighLevel.c **** #include "AMS_HighLevel.h" 9:Core/Src/AMS_HighLevel.c **** #include "ADBMS_Abstraction.h" 10:Core/Src/AMS_HighLevel.c **** #include "TMP1075.h" 11:Core/Src/AMS_HighLevel.c **** #include "24LC02.h" 12:Core/Src/AMS_HighLevel.c **** #include "stm32f3xx_hal.h" 13:Core/Src/AMS_HighLevel.c **** #include 14:Core/Src/AMS_HighLevel.c **** #include 15:Core/Src/AMS_HighLevel.c **** 16:Core/Src/AMS_HighLevel.c **** Cell_Module module = {}; 17:Core/Src/AMS_HighLevel.c **** 18:Core/Src/AMS_HighLevel.c **** uint16_t amsuv = 0; 19:Core/Src/AMS_HighLevel.c **** uint16_t amsov = 0; 20:Core/Src/AMS_HighLevel.c **** 21:Core/Src/AMS_HighLevel.c **** uint8_t numberofCells = 15; 22:Core/Src/AMS_HighLevel.c **** uint8_t numberofAux = 0; 23:Core/Src/AMS_HighLevel.c **** 24:Core/Src/AMS_HighLevel.c **** uint8_t packetChecksumFails = 0; 25:Core/Src/AMS_HighLevel.c **** #define MAX_PACKET_CHECKSUM_FAILS 5 26:Core/Src/AMS_HighLevel.c **** 27:Core/Src/AMS_HighLevel.c **** uint8_t deviceSleeps = 0; 28:Core/Src/AMS_HighLevel.c **** #define MAX_DEVICE_SLEEP 3 //TODO: change to correct value 29:Core/Src/AMS_HighLevel.c **** ARM GAS /tmp/cczmVS9Q.s page 2 30:Core/Src/AMS_HighLevel.c **** struct pollingTimes { 31:Core/Src/AMS_HighLevel.c **** uint32_t S_ADC_OW_CHECK; 32:Core/Src/AMS_HighLevel.c **** uint32_t TMP1075; 33:Core/Src/AMS_HighLevel.c **** }; 34:Core/Src/AMS_HighLevel.c **** 35:Core/Src/AMS_HighLevel.c **** struct pollingTimes pollingTimes = {0, 0}; 36:Core/Src/AMS_HighLevel.c **** 37:Core/Src/AMS_HighLevel.c **** uint8_t AMS_Init(SPI_HandleTypeDef* hspi) { 30 .loc 1 37 43 view -0 31 .cfi_startproc 32 @ args = 0, pretend = 0, frame = 0 33 @ frame_needed = 0, uses_anonymous_args = 0 34 .loc 1 37 43 is_stmt 0 view .LVU1 35 0000 38B5 push {r3, r4, r5, lr} 36 .cfi_def_cfa_offset 16 37 .cfi_offset 3, -16 38 .cfi_offset 4, -12 39 .cfi_offset 5, -8 40 .cfi_offset 14, -4 38:Core/Src/AMS_HighLevel.c **** uint8_t ret = initAMS(hspi, numberofCells, numberofAux); 41 .loc 1 38 3 is_stmt 1 view .LVU2 42 .loc 1 38 17 is_stmt 0 view .LVU3 43 0002 0C4B ldr r3, .L3 44 0004 1A78 ldrb r2, [r3] @ zero_extendqisi2 45 0006 0C4B ldr r3, .L3+4 46 0008 1978 ldrb r1, [r3] @ zero_extendqisi2 47 000a FFF7FEFF bl initAMS 48 .LVL1: 49 .loc 1 38 17 view .LVU4 50 000e 0446 mov r4, r0 51 .LVL2: 39:Core/Src/AMS_HighLevel.c **** amsov = DEFAULT_OV; 52 .loc 1 39 3 is_stmt 1 view .LVU5 53 .loc 1 39 9 is_stmt 0 view .LVU6 54 0010 0A4B ldr r3, .L3+8 55 0012 40F26542 movw r2, #1125 56 0016 1A80 strh r2, [r3] @ movhi 40:Core/Src/AMS_HighLevel.c **** amsuv = DEFAULT_UV; 57 .loc 1 40 3 is_stmt 1 view .LVU7 58 .loc 1 40 9 is_stmt 0 view .LVU8 59 0018 094B ldr r3, .L3+12 60 001a 40F2A112 movw r2, #417 61 001e 1A80 strh r2, [r3] @ movhi 41:Core/Src/AMS_HighLevel.c **** 42:Core/Src/AMS_HighLevel.c **** pollingTimes = (struct pollingTimes) {HAL_GetTick(), HAL_GetTick()}; 62 .loc 1 42 3 is_stmt 1 view .LVU9 63 .loc 1 42 41 is_stmt 0 view .LVU10 64 0020 FFF7FEFF bl HAL_GetTick 65 .LVL3: 66 0024 0546 mov r5, r0 67 .loc 1 42 56 discriminator 1 view .LVU11 68 0026 FFF7FEFF bl HAL_GetTick 69 .LVL4: 70 .loc 1 42 16 discriminator 2 view .LVU12 71 002a 064B ldr r3, .L3+16 72 002c 1D60 str r5, [r3] 73 002e 5860 str r0, [r3, #4] ARM GAS /tmp/cczmVS9Q.s page 3 43:Core/Src/AMS_HighLevel.c **** 44:Core/Src/AMS_HighLevel.c **** return ret; 74 .loc 1 44 3 is_stmt 1 view .LVU13 45:Core/Src/AMS_HighLevel.c **** } 75 .loc 1 45 1 is_stmt 0 view .LVU14 76 0030 2046 mov r0, r4 77 0032 38BD pop {r3, r4, r5, pc} 78 .LVL5: 79 .L4: 80 .loc 1 45 1 view .LVU15 81 .align 2 82 .L3: 83 0034 00000000 .word numberofAux 84 0038 00000000 .word numberofCells 85 003c 00000000 .word amsov 86 0040 00000000 .word amsuv 87 0044 00000000 .word pollingTimes 88 .cfi_endproc 89 .LFE123: 91 .section .text.AMS_Idle_Loop,"ax",%progbits 92 .align 1 93 .global AMS_Idle_Loop 94 .syntax unified 95 .thumb 96 .thumb_func 98 AMS_Idle_Loop: 99 .LFB124: 46:Core/Src/AMS_HighLevel.c **** 47:Core/Src/AMS_HighLevel.c **** uint8_t AMS_Idle_Loop() { 100 .loc 1 47 25 is_stmt 1 view -0 101 .cfi_startproc 102 @ args = 0, pretend = 0, frame = 8 103 @ frame_needed = 0, uses_anonymous_args = 0 104 0000 30B5 push {r4, r5, lr} 105 .cfi_def_cfa_offset 12 106 .cfi_offset 4, -12 107 .cfi_offset 5, -8 108 .cfi_offset 14, -4 109 0002 83B0 sub sp, sp, #12 110 .cfi_def_cfa_offset 24 48:Core/Src/AMS_HighLevel.c **** if (!amsWakeUp()) { 111 .loc 1 48 3 view .LVU17 112 .loc 1 48 8 is_stmt 0 view .LVU18 113 0004 FFF7FEFF bl amsWakeUp 114 .LVL6: 49:Core/Src/AMS_HighLevel.c **** //error_data.data_kind = SEK_INTERNAL_BMS_TIMEOUT; //we don't receive data for the wakeup comma 50:Core/Src/AMS_HighLevel.c **** //set_error_source(ERROR_SOURCE_INTERNAL); //so we can't tell if we timed out 51:Core/Src/AMS_HighLevel.c **** } 115 .loc 1 51 3 is_stmt 1 view .LVU19 52:Core/Src/AMS_HighLevel.c **** 53:Core/Src/AMS_HighLevel.c **** packetChecksumFails += amsAuxAndStatusMeasurement(&module); 116 .loc 1 53 3 view .LVU20 117 .loc 1 53 26 is_stmt 0 view .LVU21 118 0008 1B4C ldr r4, .L15 119 000a 2046 mov r0, r4 120 000c FFF7FEFF bl amsAuxAndStatusMeasurement 121 .LVL7: ARM GAS /tmp/cczmVS9Q.s page 4 122 .loc 1 53 23 discriminator 1 view .LVU22 123 0010 1A4A ldr r2, .L15+4 124 0012 1378 ldrb r3, [r2] @ zero_extendqisi2 125 0014 0344 add r3, r3, r0 126 0016 1370 strb r3, [r2] 54:Core/Src/AMS_HighLevel.c **** 55:Core/Src/AMS_HighLevel.c **** if (module.status.SLEEP) { 127 .loc 1 55 3 is_stmt 1 view .LVU23 128 .loc 1 55 7 is_stmt 0 view .LVU24 129 0018 94F83930 ldrb r3, [r4, #57] @ zero_extendqisi2 130 .loc 1 55 6 view .LVU25 131 001c 13F0100F tst r3, #16 132 0020 06D0 beq .L6 56:Core/Src/AMS_HighLevel.c **** deviceSleeps++; 133 .loc 1 56 5 is_stmt 1 view .LVU26 134 .loc 1 56 17 is_stmt 0 view .LVU27 135 0022 174A ldr r2, .L15+8 136 0024 1378 ldrb r3, [r2] @ zero_extendqisi2 137 0026 0133 adds r3, r3, #1 138 0028 DBB2 uxtb r3, r3 139 002a 1370 strb r3, [r2] 57:Core/Src/AMS_HighLevel.c **** if (deviceSleeps > MAX_DEVICE_SLEEP) { 140 .loc 1 57 5 is_stmt 1 view .LVU28 141 .loc 1 57 8 is_stmt 0 view .LVU29 142 002c 032B cmp r3, #3 143 002e 13D9 bls .L14 144 .L6: 58:Core/Src/AMS_HighLevel.c **** 59:Core/Src/AMS_HighLevel.c **** } else { 60:Core/Src/AMS_HighLevel.c **** amsReset(); 61:Core/Src/AMS_HighLevel.c **** } 62:Core/Src/AMS_HighLevel.c **** } 63:Core/Src/AMS_HighLevel.c **** 64:Core/Src/AMS_HighLevel.c **** packetChecksumFails += amsCellMeasurement(&module); 145 .loc 1 64 3 is_stmt 1 view .LVU30 146 .loc 1 64 26 is_stmt 0 view .LVU31 147 0030 114D ldr r5, .L15 148 0032 2846 mov r0, r5 149 0034 FFF7FEFF bl amsCellMeasurement 150 .LVL8: 151 .loc 1 64 23 discriminator 1 view .LVU32 152 0038 104C ldr r4, .L15+4 153 003a 2378 ldrb r3, [r4] @ zero_extendqisi2 154 003c 0344 add r3, r3, r0 155 003e 2370 strb r3, [r4] 65:Core/Src/AMS_HighLevel.c **** packetChecksumFails += amsCheckUnderOverVoltage(&module); 156 .loc 1 65 3 is_stmt 1 view .LVU33 157 .loc 1 65 26 is_stmt 0 view .LVU34 158 0040 2846 mov r0, r5 159 0042 FFF7FEFF bl amsCheckUnderOverVoltage 160 .LVL9: 161 .loc 1 65 23 discriminator 1 view .LVU35 162 0046 2378 ldrb r3, [r4] @ zero_extendqisi2 163 0048 0344 add r3, r3, r0 164 004a 2370 strb r3, [r4] 66:Core/Src/AMS_HighLevel.c **** 67:Core/Src/AMS_HighLevel.c **** if(eeprom_write(0, 7) != 0){ ARM GAS /tmp/cczmVS9Q.s page 5 165 .loc 1 67 3 is_stmt 1 view .LVU36 166 .loc 1 67 6 is_stmt 0 view .LVU37 167 004c 0721 movs r1, #7 168 004e 0020 movs r0, #0 169 0050 FFF7FEFF bl eeprom_write 170 .LVL10: 171 .loc 1 67 5 discriminator 1 view .LVU38 172 0054 18B1 cbz r0, .L7 173 .L8: 68:Core/Src/AMS_HighLevel.c **** while(1){} 174 .loc 1 68 5 is_stmt 1 view .LVU39 175 .loc 1 68 14 view .LVU40 176 .loc 1 68 10 view .LVU41 177 0056 FEE7 b .L8 178 .L14: 60:Core/Src/AMS_HighLevel.c **** } 179 .loc 1 60 7 view .LVU42 180 0058 FFF7FEFF bl amsReset 181 .LVL11: 182 005c E8E7 b .L6 183 .L7: 69:Core/Src/AMS_HighLevel.c **** } 70:Core/Src/AMS_HighLevel.c **** int eepromBuf; 184 .loc 1 70 3 view .LVU43 71:Core/Src/AMS_HighLevel.c **** if(eeprom_read(0, &eepromBuf) != 0){ 185 .loc 1 71 3 view .LVU44 186 .loc 1 71 6 is_stmt 0 view .LVU45 187 005e 01A9 add r1, sp, #4 188 0060 0020 movs r0, #0 189 0062 FFF7FEFF bl eeprom_read 190 .LVL12: 191 .loc 1 71 5 discriminator 1 view .LVU46 192 0066 00B1 cbz r0, .L9 193 .L10: 72:Core/Src/AMS_HighLevel.c **** while(1){} 194 .loc 1 72 5 is_stmt 1 view .LVU47 195 .loc 1 72 14 view .LVU48 196 .loc 1 72 10 view .LVU49 197 0068 FEE7 b .L10 198 .L9: 73:Core/Src/AMS_HighLevel.c **** } 74:Core/Src/AMS_HighLevel.c **** 75:Core/Src/AMS_HighLevel.c **** if (eepromBuf != 7){ 199 .loc 1 75 3 view .LVU50 200 .loc 1 75 17 is_stmt 0 view .LVU51 201 006a 019B ldr r3, [sp, #4] 202 .loc 1 75 6 view .LVU52 203 006c 072B cmp r3, #7 204 006e 00D0 beq .L11 205 .L12: 76:Core/Src/AMS_HighLevel.c **** while(1){} 206 .loc 1 76 5 is_stmt 1 view .LVU53 207 .loc 1 76 14 view .LVU54 208 .loc 1 76 10 view .LVU55 209 0070 FEE7 b .L12 210 .L11: 77:Core/Src/AMS_HighLevel.c **** } ARM GAS /tmp/cczmVS9Q.s page 6 78:Core/Src/AMS_HighLevel.c **** 79:Core/Src/AMS_HighLevel.c **** return 0; 211 .loc 1 79 3 view .LVU56 80:Core/Src/AMS_HighLevel.c **** }... 212 .loc 1 80 1 is_stmt 0 view .LVU57 213 0072 0020 movs r0, #0 214 0074 03B0 add sp, sp, #12 215 .cfi_def_cfa_offset 12 216 @ sp needed 217 0076 30BD pop {r4, r5, pc} 218 .L16: 219 .align 2 220 .L15: 221 0078 00000000 .word module 222 007c 00000000 .word packetChecksumFails 223 0080 00000000 .word deviceSleeps 224 .cfi_endproc 225 .LFE124: 227 .global pollingTimes 228 .section .bss.pollingTimes,"aw",%nobits 229 .align 2 232 pollingTimes: 233 0000 00000000 .space 8 233 00000000 234 .global deviceSleeps 235 .section .bss.deviceSleeps,"aw",%nobits 238 deviceSleeps: 239 0000 00 .space 1 240 .global packetChecksumFails 241 .section .bss.packetChecksumFails,"aw",%nobits 244 packetChecksumFails: 245 0000 00 .space 1 246 .global numberofAux 247 .section .bss.numberofAux,"aw",%nobits 250 numberofAux: 251 0000 00 .space 1 252 .global numberofCells 253 .section .data.numberofCells,"aw" 256 numberofCells: 257 0000 0F .byte 15 258 .global amsov 259 .section .bss.amsov,"aw",%nobits 260 .align 1 263 amsov: 264 0000 0000 .space 2 265 .global amsuv 266 .section .bss.amsuv,"aw",%nobits 267 .align 1 270 amsuv: 271 0000 0000 .space 2 272 .global module 273 .section .bss.module,"aw",%nobits 274 .align 2 277 module: 278 0000 00000000 .space 96 278 00000000 278 00000000 ARM GAS /tmp/cczmVS9Q.s page 7 278 00000000 278 00000000 279 .text 280 .Letext0: 281 .file 2 "/home/chiangni/.config/Code/User/globalStorage/bmd.stm32-for-vscode/@xpack-dev-tools/arm- 282 .file 3 "/home/chiangni/.config/Code/User/globalStorage/bmd.stm32-for-vscode/@xpack-dev-tools/arm- 283 .file 4 "Drivers/CMSIS/Device/ST/STM32F3xx/Include/stm32f302x8.h" 284 .file 5 "Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_def.h" 285 .file 6 "Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_dma.h" 286 .file 7 "Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_spi.h" 287 .file 8 "Core/Inc/ADBMS_LL_Driver.h" 288 .file 9 "Core/Inc/ADBMS_Abstraction.h" 289 .file 10 "Core/Inc/AMS_HighLevel.h" 290 .file 11 "Core/Inc/24LC02.h" 291 .file 12 "Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal.h" ARM GAS /tmp/cczmVS9Q.s page 8 DEFINED SYMBOLS *ABS*:00000000 AMS_HighLevel.c /tmp/cczmVS9Q.s:21 .text.AMS_Init:00000000 $t /tmp/cczmVS9Q.s:27 .text.AMS_Init:00000000 AMS_Init /tmp/cczmVS9Q.s:83 .text.AMS_Init:00000034 $d /tmp/cczmVS9Q.s:250 .bss.numberofAux:00000000 numberofAux /tmp/cczmVS9Q.s:256 .data.numberofCells:00000000 numberofCells /tmp/cczmVS9Q.s:263 .bss.amsov:00000000 amsov /tmp/cczmVS9Q.s:270 .bss.amsuv:00000000 amsuv /tmp/cczmVS9Q.s:232 .bss.pollingTimes:00000000 pollingTimes /tmp/cczmVS9Q.s:92 .text.AMS_Idle_Loop:00000000 $t /tmp/cczmVS9Q.s:98 .text.AMS_Idle_Loop:00000000 AMS_Idle_Loop /tmp/cczmVS9Q.s:221 .text.AMS_Idle_Loop:00000078 $d /tmp/cczmVS9Q.s:277 .bss.module:00000000 module /tmp/cczmVS9Q.s:244 .bss.packetChecksumFails:00000000 packetChecksumFails /tmp/cczmVS9Q.s:238 .bss.deviceSleeps:00000000 deviceSleeps /tmp/cczmVS9Q.s:229 .bss.pollingTimes:00000000 $d /tmp/cczmVS9Q.s:239 .bss.deviceSleeps:00000000 $d /tmp/cczmVS9Q.s:245 .bss.packetChecksumFails:00000000 $d /tmp/cczmVS9Q.s:251 .bss.numberofAux:00000000 $d /tmp/cczmVS9Q.s:260 .bss.amsov:00000000 $d /tmp/cczmVS9Q.s:267 .bss.amsuv:00000000 $d /tmp/cczmVS9Q.s:274 .bss.module:00000000 $d UNDEFINED SYMBOLS initAMS HAL_GetTick amsWakeUp amsAuxAndStatusMeasurement amsCellMeasurement amsCheckUnderOverVoltage eeprom_write amsReset eeprom_read