FaSTTUBe/TS-DCDC
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v0.2

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This commit is contained in:
Frederico Boavida
2024-12-09 22:03:38 +01:00
parent e1dce1aafd
commit 68b366e2d4
8 changed files with 3859 additions and 3982 deletions
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Hardware/Screenshot 2024-12-07 225116.png Normal file
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Hardware/TDK_DCDC_pcb/#auto_saved_files# Normal file
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C:\Users\frede\OneDrive\Dokumente\Fasttube\FT25\dc_dc\TS-DCDC\Hardware\TDK_DCDC_pcb\_autosave-TDK_DCDC_pcb.kicad_sch

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Hardware/TDK_DCDC_pcb/Library.pretty/footprints.pretty/436500300.kicad_mod Normal file
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(module "436500300" (layer F.Cu)
(descr "4365003YY_4")
(tags "Connector")
(fp_text reference J** (at -2.263 3.95) (layer F.SilkS)
(effects (font (size 1.27 1.27) (thickness 0.254)))
)
(fp_text user %R (at -2.263 3.95) (layer F.Fab)
(effects (font (size 1.27 1.27) (thickness 0.254)))
)
(fp_text value "436500300" (at -2.263 3.95) (layer F.SilkS) hide
(effects (font (size 1.27 1.27) (thickness 0.254)))
)
(fp_line (start -9.325 -1) (end 3.325 -1) (layer F.Fab) (width 0.127))
(fp_line (start 3.325 -1) (end 3.325 8.9) (layer F.Fab) (width 0.127))
(fp_line (start 3.325 8.9) (end -9.325 8.9) (layer F.Fab) (width 0.127))
(fp_line (start -9.325 8.9) (end -9.325 -1) (layer F.Fab) (width 0.127))
(fp_line (start -9.325 -1) (end 3.325 -1) (layer F.SilkS) (width 0.127))
(fp_line (start 3.325 -1) (end 3.325 8.9) (layer F.SilkS) (width 0.127))
(fp_line (start 3.325 8.9) (end -9.325 8.9) (layer F.SilkS) (width 0.127))
(fp_line (start -9.325 8.9) (end -9.325 -1) (layer F.SilkS) (width 0.127))
(fp_line (start -10.452 -2.127) (end 5.927 -2.127) (layer F.CrtYd) (width 0.05))
(fp_line (start 5.927 -2.127) (end 5.927 10.027) (layer F.CrtYd) (width 0.05))
(fp_line (start 5.927 10.027) (end -10.452 10.027) (layer F.CrtYd) (width 0.05))
(fp_line (start -10.452 10.027) (end -10.452 -2.127) (layer F.CrtYd) (width 0.05))
(fp_line (start 4.8 -0.5) (end 4.8 0.5) (layer F.SilkS) (width 0.127))
(fp_line (start 4.8 0.5) (end 3.8 -0) (layer F.SilkS) (width 0.127))
(fp_line (start 3.8 -0) (end 4.8 -0.5) (layer F.SilkS) (width 0.127))
(fp_line (start 4.8 -0.5) (end 4.8 0.5) (layer F.Fab) (width 0.127))
(fp_line (start 4.8 0.5) (end 3.8 -0) (layer F.Fab) (width 0.127))
(fp_line (start 3.8 -0) (end 4.8 -0.5) (layer F.Fab) (width 0.127))
(pad 1 thru_hole rect (at 0.000 -0) (size 1.550 1.550) (drill 1.02) (layers *.Cu *.Mask))
(pad 2 thru_hole circle (at -3.000 -0) (size 1.550 1.550) (drill 1.02) (layers *.Cu *.Mask))
(pad 3 thru_hole circle (at -6.000 -0) (size 1.550 1.550) (drill 1.02) (layers *.Cu *.Mask))
(pad 4 np_thru_hole circle (at -3.000 4.32) (size 3 3) (drill 3) (layers *.Cu *.Mask))
(model 43650-0300.stp
(at (xyz -0.11653543457272 -0.15551181290093 0.090551179225051))
(scale (xyz 1 1 1))
(rotate (xyz -90 0 0))
)
)

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Hardware/TDK_DCDC_pcb/TDK_DCDC_pcb.kicad_pcb
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Hardware/TDK_DCDC_pcb/TDK_DCDC_pcb.kicad_sch
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Hardware/TDK_DCDC_pcb/sym-lib-table
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(lib (name "VOR1060M4T")(type "KiCad")(uri "${KIPRJMOD}/symbol_lib/VOR1060M4T.kicad_sym")(options "")(descr ""))
(lib (name "43650-0317")(type "KiCad")(uri "${KIPRJMOD}/symbol_lib/43650-0317.kicad_sym")(options "")(descr ""))
(lib (name "2024-11-26_19-54-55")(type "KiCad")(uri "${KIPRJMOD}/symbol_lib/2024-11-26_19-54-55.kicad_sym")(options "")(descr ""))
(lib (name "43650-0300")(type "KiCad")(uri "${KIPRJMOD}/symbol_lib/43650-0300.kicad_sym")(options "")(descr ""))
)

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Hardware/TDK_DCDC_pcb/symbol_lib/43650-0300.kicad_sym Normal file
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(kicad_symbol_lib (version 20211014) (generator SamacSys_ECAD_Model)
(symbol "43650-0300" (in_bom yes) (on_board yes)
(property "Reference" "J" (at 16.51 7.62 0)
(effects (font (size 1.27 1.27)) (justify left top))
)
(property "Value" "43650-0300" (at 16.51 5.08 0)
(effects (font (size 1.27 1.27)) (justify left top))
)
(property "Footprint" "436500300" (at 16.51 -94.92 0)
(effects (font (size 1.27 1.27)) (justify left top) hide)
)
(property "Datasheet" "https://www.molex.com/pdm_docs/sd/436500200_sd.pdf" (at 16.51 -194.92 0)
(effects (font (size 1.27 1.27)) (justify left top) hide)
)
(property "ki_description" "Micro-Fit 3.0 Right-Angle Header, 3.00mm Pitch, Single Row, 3 Circuits, with Snap-in Plastic Peg PCB Lock, Glow-Wire Capable, Black" (at 16.51 -294.92 0)
(effects (font (size 1.27 1.27)) (justify left top) hide)
)
(property "Height" "13.56" (at 16.51 -394.92 0)
(effects (font (size 1.27 1.27)) (justify left top) hide)
)
(property "Mouser Part Number" "538-43650-0300" (at 16.51 -494.92 0)
(effects (font (size 1.27 1.27)) (justify left top) hide)
)
(property "Mouser Price/Stock" "https://www.mouser.co.uk/ProductDetail/Molex/43650-0300?qs=P7cO%252B%252BFDLzTpuYfoYulxAA%3D%3D" (at 16.51 -594.92 0)
(effects (font (size 1.27 1.27)) (justify left top) hide)
)
(property "Manufacturer_Name" "Molex" (at 16.51 -694.92 0)
(effects (font (size 1.27 1.27)) (justify left top) hide)
)
(property "Manufacturer_Part_Number" "43650-0300" (at 16.51 -794.92 0)
(effects (font (size 1.27 1.27)) (justify left top) hide)
)
(rectangle
(start 5.08 2.54)
(end 15.24 -7.62)
(stroke (width 0.254) (type default))
(fill (type background))
)
(pin passive line (at 0 -5.08 0) (length 5.08)
(name "1" (effects (font (size 1.27 1.27))))
(number "1" (effects (font (size 1.27 1.27))))
)
(pin passive line (at 0 -2.54 0) (length 5.08)
(name "2" (effects (font (size 1.27 1.27))))
(number "2" (effects (font (size 1.27 1.27))))
)
(pin passive line (at 0 0 0) (length 5.08)
(name "3" (effects (font (size 1.27 1.27))))
(number "3" (effects (font (size 1.27 1.27))))
)
)
)

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Hardware/TDK_DCDC_pcb/~TDK_DCDC_pcb.kicad_sch.lck Normal file
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{"hostname":"FBB-XPS13","username":"Frederico Boavida"}