test commit, update gitignore
This commit is contained in:
parent
9cee5c9ca7
commit
68e7aab29e
|
|
@ -2,5 +2,15 @@
|
|||
Manual/*
|
||||
Datenblätter/*
|
||||
|
||||
Software/.vscode/*
|
||||
Software/build/*
|
||||
Software/Debug
|
||||
Software/.cache/*
|
||||
Software/.clangd
|
||||
Software/compile_commands.json
|
||||
Software/STM32Make.make
|
||||
Software/.metadata/*
|
||||
Software/openocd.cfg
|
||||
|
||||
Simulation/*
|
||||
!Simulation/SLS_Sim.asc
|
||||
|
|
|
|||
|
|
@ -0,0 +1,5 @@
|
|||
10-09 17:16:28 com_github_MitjaNemec_ReplicateLayout.action_replicate_layout 392:Plugin executed on: 'linux'
|
||||
10-09 17:16:28 com_github_MitjaNemec_ReplicateLayout.action_replicate_layout 393:Plugin executed with python version: '3.12.6 (main, Sep 9 2024, 00:00:00) [GCC 14.2.1 20240801 (Red Hat 14.2.1-1)]'
|
||||
10-09 17:16:28 com_github_MitjaNemec_ReplicateLayout.action_replicate_layout 394:KiCad build version: 8.0.5-1.fc40
|
||||
10-09 17:16:28 com_github_MitjaNemec_ReplicateLayout.action_replicate_layout 395:Plugin version: 3.0.3
|
||||
10-09 17:16:28 com_github_MitjaNemec_ReplicateLayout.action_replicate_layout 396:Frame repr: <wx._core.Frame object at 0x7f5ea35c00e0>
|
||||
|
|
@ -1 +0,0 @@
|
|||
{"hostname":"eggyhitsrock-fedora","username":"chiangni"}
|
||||
Binary file not shown.
Binary file not shown.
Binary file not shown.
Binary file not shown.
Binary file not shown.
Binary file not shown.
Binary file not shown.
Binary file not shown.
Binary file not shown.
Binary file not shown.
Binary file not shown.
Binary file not shown.
Binary file not shown.
Binary file not shown.
Binary file not shown.
Binary file not shown.
Binary file not shown.
Binary file not shown.
Binary file not shown.
Binary file not shown.
Binary file not shown.
Binary file not shown.
Binary file not shown.
Binary file not shown.
Binary file not shown.
Binary file not shown.
Binary file not shown.
Binary file not shown.
Binary file not shown.
Binary file not shown.
Binary file not shown.
Binary file not shown.
Binary file not shown.
Binary file not shown.
Binary file not shown.
Binary file not shown.
Binary file not shown.
Binary file not shown.
Binary file not shown.
Binary file not shown.
Binary file not shown.
Binary file not shown.
Binary file not shown.
Binary file not shown.
Binary file not shown.
Binary file not shown.
Binary file not shown.
Binary file not shown.
Binary file not shown.
Binary file not shown.
Binary file not shown.
Binary file not shown.
Binary file not shown.
Binary file not shown.
Binary file not shown.
|
|
@ -0,0 +1,20 @@
|
|||
{
|
||||
"configurations": [
|
||||
{
|
||||
"name": "STM32",
|
||||
"includePath": [
|
||||
"Core/Inc",
|
||||
"Drivers/CMSIS/Device/ST/STM32F0xx/Include",
|
||||
"Drivers/CMSIS/Include",
|
||||
"Drivers/STM32F0xx_HAL_Driver/Inc",
|
||||
"Drivers/STM32F0xx_HAL_Driver/Inc/Legacy"
|
||||
],
|
||||
"defines": [
|
||||
"STM32F042x6",
|
||||
"USE_HAL_DRIVER"
|
||||
],
|
||||
"compilerPath": "/home/chiangni/.config/VSCodium/User/globalStorage/bmd.stm32-for-vscode/@xpack-dev-tools/arm-none-eabi-gcc/13.2.1-1.1.1/.content/bin/arm-none-eabi-gcc"
|
||||
}
|
||||
],
|
||||
"version": 4
|
||||
}
|
||||
|
|
@ -0,0 +1,32 @@
|
|||
{
|
||||
"configurations": [
|
||||
{
|
||||
"showDevDebugOutput": "parsed",
|
||||
"cwd": "${workspaceRoot}",
|
||||
"executable": "./build/SLS.elf",
|
||||
"name": "Debug STM32",
|
||||
"request": "launch",
|
||||
"type": "cortex-debug",
|
||||
"servertype": "openocd",
|
||||
"preLaunchTask": "Build STM",
|
||||
"device": "stm32f042x6.s",
|
||||
"configFiles": [
|
||||
"openocd.cfg"
|
||||
]
|
||||
},
|
||||
{
|
||||
"showDevDebugOutput": "parsed",
|
||||
"cwd": "${workspaceRoot}",
|
||||
"executable": "./build/SLS.elf",
|
||||
"name": "Attach STM32",
|
||||
"request": "attach",
|
||||
"type": "cortex-debug",
|
||||
"servertype": "openocd",
|
||||
"preLaunchTask": "Build STM",
|
||||
"device": "stm32f042x6.s",
|
||||
"configFiles": [
|
||||
"openocd.cfg"
|
||||
]
|
||||
}
|
||||
]
|
||||
}
|
||||
|
|
@ -0,0 +1,4 @@
|
|||
{
|
||||
"cortex-debug.armToolchainPath": "/home/chiangni/.config/VSCodium/User/globalStorage/bmd.stm32-for-vscode/@xpack-dev-tools/arm-none-eabi-gcc/13.2.1-1.1.1/.content/bin",
|
||||
"cortex-debug.openocdPath": "/home/chiangni/Documents/STM32/OpenOCD/xpacks/@xpack-dev-tools/openocd/.content/bin/openocd"
|
||||
}
|
||||
|
|
@ -0,0 +1,50 @@
|
|||
{
|
||||
"version": "2.0.0",
|
||||
"tasks": [
|
||||
{
|
||||
"label": "Build STM",
|
||||
"type": "process",
|
||||
"command": "${command:stm32-for-vscode.build}",
|
||||
"options": {
|
||||
"cwd": "${workspaceRoot}"
|
||||
},
|
||||
"group": {
|
||||
"kind": "build",
|
||||
"isDefault": true
|
||||
},
|
||||
"problemMatcher": [
|
||||
"$gcc"
|
||||
]
|
||||
},
|
||||
{
|
||||
"label": "Build Clean STM",
|
||||
"type": "process",
|
||||
"command": "${command:stm32-for-vscode.cleanBuild}",
|
||||
"options": {
|
||||
"cwd": "${workspaceRoot}"
|
||||
},
|
||||
"group": {
|
||||
"kind": "build",
|
||||
"isDefault": true
|
||||
},
|
||||
"problemMatcher": [
|
||||
"$gcc"
|
||||
]
|
||||
},
|
||||
{
|
||||
"label": "Flash STM",
|
||||
"type": "process",
|
||||
"command": "${command:stm32-for-vscode.flash}",
|
||||
"options": {
|
||||
"cwd": "${workspaceRoot}"
|
||||
},
|
||||
"group": {
|
||||
"kind": "build",
|
||||
"isDefault": true
|
||||
},
|
||||
"problemMatcher": [
|
||||
"$gcc"
|
||||
]
|
||||
}
|
||||
]
|
||||
}
|
||||
|
|
@ -73,7 +73,7 @@
|
|||
* (when HSE is used as system clock source, directly or through the PLL).
|
||||
*/
|
||||
#if !defined (HSE_VALUE)
|
||||
#define HSE_VALUE ((uint32_t)8000000) /*!< Value of the External oscillator in Hz */
|
||||
#define HSE_VALUE ((uint32_t)12000000) /*!< Value of the External oscillator in Hz */
|
||||
#endif /* HSE_VALUE */
|
||||
|
||||
/**
|
||||
|
|
|
|||
|
|
@ -51,6 +51,7 @@ void HardFault_Handler(void);
|
|||
void SVC_Handler(void);
|
||||
void PendSV_Handler(void);
|
||||
void SysTick_Handler(void);
|
||||
void ADC1_IRQHandler(void);
|
||||
/* USER CODE BEGIN EFP */
|
||||
|
||||
/* USER CODE END EFP */
|
||||
|
|
|
|||
|
|
@ -0,0 +1,273 @@
|
|||
#include "can-halal.h"
|
||||
|
||||
#include <string.h>
|
||||
|
||||
#if defined(FTCAN_IS_BXCAN)
|
||||
static CAN_HandleTypeDef *hcan;
|
||||
|
||||
HAL_StatusTypeDef ftcan_init(CAN_HandleTypeDef *handle) {
|
||||
hcan = handle;
|
||||
|
||||
HAL_StatusTypeDef status =
|
||||
HAL_CAN_ActivateNotification(hcan, CAN_IT_RX_FIFO0_MSG_PENDING);
|
||||
if (status != HAL_OK) {
|
||||
return status;
|
||||
}
|
||||
|
||||
return HAL_CAN_Start(hcan);
|
||||
}
|
||||
|
||||
HAL_StatusTypeDef ftcan_transmit(uint16_t id, const uint8_t *data,
|
||||
size_t datalen) {
|
||||
static CAN_TxHeaderTypeDef header;
|
||||
header.StdId = id;
|
||||
header.IDE = CAN_ID_STD;
|
||||
header.RTR = CAN_RTR_DATA;
|
||||
header.DLC = datalen;
|
||||
uint32_t mailbox;
|
||||
return HAL_CAN_AddTxMessage(hcan, &header, data, &mailbox);
|
||||
}
|
||||
|
||||
HAL_StatusTypeDef ftcan_add_filter(uint16_t id, uint16_t mask) {
|
||||
static uint32_t next_filter_no = 0;
|
||||
static CAN_FilterTypeDef filter;
|
||||
if (next_filter_no % 2 == 0) {
|
||||
filter.FilterIdHigh = id << 5;
|
||||
filter.FilterMaskIdHigh = mask << 5;
|
||||
filter.FilterIdLow = id << 5;
|
||||
filter.FilterMaskIdLow = mask << 5;
|
||||
} else {
|
||||
// Leave high filter untouched from the last configuration
|
||||
filter.FilterIdLow = id << 5;
|
||||
filter.FilterMaskIdLow = mask << 5;
|
||||
}
|
||||
filter.FilterFIFOAssignment = CAN_FILTER_FIFO0;
|
||||
filter.FilterBank = next_filter_no / 2;
|
||||
if (filter.FilterBank > FTCAN_NUM_FILTERS + 1) {
|
||||
return HAL_ERROR;
|
||||
}
|
||||
filter.FilterMode = CAN_FILTERMODE_IDMASK;
|
||||
filter.FilterScale = CAN_FILTERSCALE_16BIT;
|
||||
filter.FilterActivation = CAN_FILTER_ENABLE;
|
||||
|
||||
// Disable slave filters
|
||||
// TODO: Some STM32 have multiple CAN peripherals, and one uses the slave
|
||||
// filter bank
|
||||
filter.SlaveStartFilterBank = FTCAN_NUM_FILTERS;
|
||||
|
||||
HAL_StatusTypeDef status = HAL_CAN_ConfigFilter(hcan, &filter);
|
||||
if (status == HAL_OK) {
|
||||
next_filter_no++;
|
||||
}
|
||||
return status;
|
||||
}
|
||||
|
||||
void HAL_CAN_RxFifo0MsgPendingCallback(CAN_HandleTypeDef *handle) {
|
||||
if (handle != hcan) {
|
||||
return;
|
||||
}
|
||||
CAN_RxHeaderTypeDef header;
|
||||
uint8_t data[8];
|
||||
if (HAL_CAN_GetRxMessage(hcan, CAN_RX_FIFO0, &header, data) != HAL_OK) {
|
||||
return;
|
||||
}
|
||||
|
||||
if (header.IDE != CAN_ID_STD) {
|
||||
return;
|
||||
}
|
||||
|
||||
ftcan_msg_received_cb(header.StdId, header.DLC, data);
|
||||
}
|
||||
#elif defined(FTCAN_IS_FDCAN)
|
||||
static FDCAN_HandleTypeDef *hcan;
|
||||
|
||||
HAL_StatusTypeDef ftcan_init(FDCAN_HandleTypeDef *handle) {
|
||||
hcan = handle;
|
||||
|
||||
HAL_StatusTypeDef status =
|
||||
HAL_FDCAN_ActivateNotification(hcan, FDCAN_IT_RX_FIFO0_NEW_MESSAGE, 0);
|
||||
if (status != HAL_OK) {
|
||||
return status;
|
||||
}
|
||||
// Reject non-matching messages
|
||||
status =
|
||||
HAL_FDCAN_ConfigGlobalFilter(hcan, FDCAN_REJECT, FDCAN_REJECT,
|
||||
FDCAN_REJECT_REMOTE, FDCAN_REJECT_REMOTE);
|
||||
if (status != HAL_OK) {
|
||||
return status;
|
||||
}
|
||||
|
||||
return HAL_FDCAN_Start(hcan);
|
||||
}
|
||||
|
||||
HAL_StatusTypeDef ftcan_transmit(uint16_t id, const uint8_t *data,
|
||||
size_t datalen) {
|
||||
static FDCAN_TxHeaderTypeDef header;
|
||||
header.Identifier = id;
|
||||
header.IdType = FDCAN_STANDARD_ID;
|
||||
header.TxFrameType = FDCAN_DATA_FRAME;
|
||||
switch (datalen) {
|
||||
case 0:
|
||||
header.DataLength = FDCAN_DLC_BYTES_0;
|
||||
break;
|
||||
case 1:
|
||||
header.DataLength = FDCAN_DLC_BYTES_1;
|
||||
break;
|
||||
case 2:
|
||||
header.DataLength = FDCAN_DLC_BYTES_2;
|
||||
break;
|
||||
case 3:
|
||||
header.DataLength = FDCAN_DLC_BYTES_3;
|
||||
break;
|
||||
case 4:
|
||||
header.DataLength = FDCAN_DLC_BYTES_4;
|
||||
break;
|
||||
case 5:
|
||||
header.DataLength = FDCAN_DLC_BYTES_5;
|
||||
break;
|
||||
case 6:
|
||||
header.DataLength = FDCAN_DLC_BYTES_6;
|
||||
break;
|
||||
case 7:
|
||||
header.DataLength = FDCAN_DLC_BYTES_7;
|
||||
break;
|
||||
case 8:
|
||||
default:
|
||||
header.DataLength = FDCAN_DLC_BYTES_8;
|
||||
break;
|
||||
}
|
||||
header.ErrorStateIndicator = FDCAN_ESI_PASSIVE;
|
||||
header.BitRateSwitch = FDCAN_BRS_OFF;
|
||||
header.FDFormat = FDCAN_CLASSIC_CAN;
|
||||
header.TxEventFifoControl = FDCAN_NO_TX_EVENTS;
|
||||
|
||||
// HAL_FDCAN_AddMessageToTxFifoQ doesn't modify the data, but it's not marked
|
||||
// as const for some reason.
|
||||
uint8_t *data_nonconst = (uint8_t *)data;
|
||||
return HAL_FDCAN_AddMessageToTxFifoQ(hcan, &header, data_nonconst);
|
||||
}
|
||||
|
||||
HAL_StatusTypeDef ftcan_add_filter(uint16_t id, uint16_t mask) {
|
||||
static uint32_t next_filter_no = 0;
|
||||
static FDCAN_FilterTypeDef filter;
|
||||
filter.IdType = FDCAN_STANDARD_ID;
|
||||
filter.FilterIndex = next_filter_no;
|
||||
if (filter.FilterIndex > FTCAN_NUM_FILTERS + 1) {
|
||||
return HAL_ERROR;
|
||||
}
|
||||
filter.FilterType = FDCAN_FILTER_MASK;
|
||||
filter.FilterConfig = FDCAN_FILTER_TO_RXFIFO0;
|
||||
filter.FilterID1 = id;
|
||||
filter.FilterID2 = mask;
|
||||
|
||||
HAL_StatusTypeDef status = HAL_FDCAN_ConfigFilter(hcan, &filter);
|
||||
if (status == HAL_OK) {
|
||||
next_filter_no++;
|
||||
}
|
||||
return status;
|
||||
}
|
||||
|
||||
void HAL_FDCAN_RxFifo0Callback(FDCAN_HandleTypeDef *handle,
|
||||
uint32_t RxFifo0ITs) {
|
||||
if (handle != hcan || (RxFifo0ITs & FDCAN_IT_RX_FIFO0_NEW_MESSAGE) == RESET) {
|
||||
return;
|
||||
}
|
||||
|
||||
static FDCAN_RxHeaderTypeDef header;
|
||||
static uint8_t data[8];
|
||||
if (HAL_FDCAN_GetRxMessage(hcan, FDCAN_RX_FIFO0, &header, data) != HAL_OK) {
|
||||
return;
|
||||
}
|
||||
|
||||
if (header.FDFormat != FDCAN_CLASSIC_CAN ||
|
||||
header.RxFrameType != FDCAN_DATA_FRAME ||
|
||||
header.IdType != FDCAN_STANDARD_ID) {
|
||||
return;
|
||||
}
|
||||
|
||||
size_t datalen;
|
||||
switch (header.DataLength) {
|
||||
case FDCAN_DLC_BYTES_0:
|
||||
datalen = 0;
|
||||
break;
|
||||
case FDCAN_DLC_BYTES_1:
|
||||
datalen = 1;
|
||||
break;
|
||||
case FDCAN_DLC_BYTES_2:
|
||||
datalen = 2;
|
||||
break;
|
||||
case FDCAN_DLC_BYTES_3:
|
||||
datalen = 3;
|
||||
break;
|
||||
case FDCAN_DLC_BYTES_4:
|
||||
datalen = 4;
|
||||
break;
|
||||
case FDCAN_DLC_BYTES_5:
|
||||
datalen = 5;
|
||||
break;
|
||||
case FDCAN_DLC_BYTES_6:
|
||||
datalen = 6;
|
||||
break;
|
||||
case FDCAN_DLC_BYTES_7:
|
||||
datalen = 7;
|
||||
break;
|
||||
case FDCAN_DLC_BYTES_8:
|
||||
datalen = 8;
|
||||
break;
|
||||
default:
|
||||
return;
|
||||
}
|
||||
|
||||
ftcan_msg_received_cb(header.Identifier, datalen, data);
|
||||
}
|
||||
#endif
|
||||
|
||||
__weak void ftcan_msg_received_cb(uint16_t id, size_t datalen,
|
||||
const uint8_t *data) {}
|
||||
|
||||
uint64_t ftcan_unmarshal_unsigned(const uint8_t **data_ptr, size_t num_bytes) {
|
||||
if (num_bytes > 8) {
|
||||
num_bytes = 8;
|
||||
}
|
||||
|
||||
const uint8_t *data = *data_ptr;
|
||||
uint64_t result = 0;
|
||||
for (size_t i = 0; i < num_bytes; i++) {
|
||||
result <<= 8;
|
||||
result |= data[i];
|
||||
}
|
||||
*data_ptr += num_bytes;
|
||||
return result;
|
||||
}
|
||||
|
||||
int64_t ftcan_unmarshal_signed(const uint8_t **data_ptr, size_t num_bytes) {
|
||||
if (num_bytes > 8) {
|
||||
num_bytes = 8;
|
||||
}
|
||||
|
||||
uint64_t result_unsigned = ftcan_unmarshal_unsigned(data_ptr, num_bytes);
|
||||
// Sign extend by shifting left, then copying to a signed int and shifting
|
||||
// back to the right
|
||||
size_t diff_to_64 = 64 - num_bytes * 8;
|
||||
result_unsigned <<= diff_to_64;
|
||||
int64_t result;
|
||||
memcpy(&result, &result_unsigned, 8);
|
||||
return result >> diff_to_64;
|
||||
}
|
||||
|
||||
uint8_t *ftcan_marshal_unsigned(uint8_t *data, uint64_t val, size_t num_bytes) {
|
||||
if (num_bytes > 8) {
|
||||
num_bytes = 8;
|
||||
}
|
||||
|
||||
for (int i = num_bytes - 1; i >= 0; i--) {
|
||||
data[i] = val & 0xFF;
|
||||
val >>= 8;
|
||||
}
|
||||
|
||||
return data + num_bytes;
|
||||
}
|
||||
|
||||
uint8_t *ftcan_marshal_signed(uint8_t *data, int64_t val, size_t num_bytes) {
|
||||
return ftcan_marshal_unsigned(data, val, num_bytes);
|
||||
}
|
||||
|
|
@ -0,0 +1,61 @@
|
|||
#ifndef CAN_HALAL_H
|
||||
#define CAN_HALAL_H
|
||||
|
||||
// Define family macros if none are defined and we recognize a chip macro
|
||||
#if !defined(STM32F3) && !defined(STM32H7)
|
||||
#if defined(STM32F302x6) || defined(STM32F302x8) || defined(STM32F302xB) || \
|
||||
defined(STM32F302xC)
|
||||
#define STM32F3
|
||||
#endif
|
||||
#if defined(STM32H7A3xx)
|
||||
#define STM32H7
|
||||
#endif
|
||||
#endif
|
||||
|
||||
#if defined(STM32F3)
|
||||
#include "stm32f3xx_hal.h"
|
||||
#define FTCAN_IS_BXCAN
|
||||
#define FTCAN_NUM_FILTERS 13
|
||||
#elif defined(STM32H7)
|
||||
#include "stm32h7xx_hal.h"
|
||||
#define FTCAN_IS_FDCAN
|
||||
#else
|
||||
#error "Couldn't detect STM family"
|
||||
#endif
|
||||
|
||||
#if defined(FTCAN_IS_BXCAN)
|
||||
HAL_StatusTypeDef ftcan_init(CAN_HandleTypeDef *handle);
|
||||
#elif defined(FTCAN_IS_FDCAN)
|
||||
HAL_StatusTypeDef ftcan_init(FDCAN_HandleTypeDef *handle);
|
||||
#else
|
||||
#error "Unknown CAN peripheral"
|
||||
#endif
|
||||
|
||||
HAL_StatusTypeDef ftcan_transmit(uint16_t id, const uint8_t *data,
|
||||
size_t datalen);
|
||||
|
||||
HAL_StatusTypeDef ftcan_add_filter(uint16_t id, uint16_t mask);
|
||||
|
||||
/**
|
||||
* Define this function to be notified of incoming CAN messages
|
||||
*/
|
||||
void ftcan_msg_received_cb(uint16_t id, size_t datalen, const uint8_t *data);
|
||||
|
||||
/**
|
||||
* Read num_bytes bytes from a message (unmarshalled network byte order). The
|
||||
* msg pointer is advanced by the corresponding number of bytes.
|
||||
*
|
||||
* Both methods return a 64-bit integer, but you can safely cast it to a smaller
|
||||
* integer type.
|
||||
*/
|
||||
uint64_t ftcan_unmarshal_unsigned(const uint8_t **data, size_t num_bytes);
|
||||
int64_t ftcan_unmarshal_signed(const uint8_t **data, size_t num_bytes);
|
||||
|
||||
/**
|
||||
* Write num_bytes to a message (marshalled in network byte order). The pointer
|
||||
* is advanced by the corresponding number of bytes and returned.
|
||||
*/
|
||||
uint8_t *ftcan_marshal_unsigned(uint8_t *data, uint64_t val, size_t num_bytes);
|
||||
uint8_t *ftcan_marshal_signed(uint8_t *data, int64_t val, size_t num_bytes);
|
||||
|
||||
#endif // CAN_HALAL_H
|
||||
|
|
@ -71,6 +71,7 @@ static void MX_TIM2_Init(void);
|
|||
*/
|
||||
int main(void)
|
||||
{
|
||||
|
||||
/* USER CODE BEGIN 1 */
|
||||
|
||||
/* USER CODE END 1 */
|
||||
|
|
@ -107,6 +108,7 @@ int main(void)
|
|||
/* USER CODE END WHILE */
|
||||
|
||||
/* USER CODE BEGIN 3 */
|
||||
ADCMeasureLooooop();
|
||||
}
|
||||
/* USER CODE END 3 */
|
||||
}
|
||||
|
|
@ -123,12 +125,14 @@ void SystemClock_Config(void)
|
|||
/** Initializes the RCC Oscillators according to the specified parameters
|
||||
* in the RCC_OscInitTypeDef structure.
|
||||
*/
|
||||
RCC_OscInitStruct.OscillatorType = RCC_OSCILLATORTYPE_HSI|RCC_OSCILLATORTYPE_HSI14;
|
||||
RCC_OscInitStruct.HSIState = RCC_HSI_ON;
|
||||
RCC_OscInitStruct.OscillatorType = RCC_OSCILLATORTYPE_HSI14|RCC_OSCILLATORTYPE_HSE;
|
||||
RCC_OscInitStruct.HSEState = RCC_HSE_ON;
|
||||
RCC_OscInitStruct.HSI14State = RCC_HSI14_ON;
|
||||
RCC_OscInitStruct.HSICalibrationValue = RCC_HSICALIBRATION_DEFAULT;
|
||||
RCC_OscInitStruct.HSI14CalibrationValue = 16;
|
||||
RCC_OscInitStruct.PLL.PLLState = RCC_PLL_NONE;
|
||||
RCC_OscInitStruct.PLL.PLLState = RCC_PLL_ON;
|
||||
RCC_OscInitStruct.PLL.PLLSource = RCC_PLLSOURCE_HSE;
|
||||
RCC_OscInitStruct.PLL.PLLMUL = RCC_PLL_MUL4;
|
||||
RCC_OscInitStruct.PLL.PREDIV = RCC_PREDIV_DIV3;
|
||||
if (HAL_RCC_OscConfig(&RCC_OscInitStruct) != HAL_OK)
|
||||
{
|
||||
Error_Handler();
|
||||
|
|
@ -138,7 +142,7 @@ void SystemClock_Config(void)
|
|||
*/
|
||||
RCC_ClkInitStruct.ClockType = RCC_CLOCKTYPE_HCLK|RCC_CLOCKTYPE_SYSCLK
|
||||
|RCC_CLOCKTYPE_PCLK1;
|
||||
RCC_ClkInitStruct.SYSCLKSource = RCC_SYSCLKSOURCE_HSI;
|
||||
RCC_ClkInitStruct.SYSCLKSource = RCC_SYSCLKSOURCE_PLLCLK;
|
||||
RCC_ClkInitStruct.AHBCLKDivider = RCC_SYSCLK_DIV1;
|
||||
RCC_ClkInitStruct.APB1CLKDivider = RCC_HCLK_DIV1;
|
||||
|
||||
|
|
@ -226,15 +230,15 @@ static void MX_CAN_Init(void)
|
|||
|
||||
/* USER CODE END CAN_Init 1 */
|
||||
hcan.Instance = CAN;
|
||||
hcan.Init.Prescaler = 16;
|
||||
hcan.Init.Prescaler = 2;
|
||||
hcan.Init.Mode = CAN_MODE_NORMAL;
|
||||
hcan.Init.SyncJumpWidth = CAN_SJW_1TQ;
|
||||
hcan.Init.TimeSeg1 = CAN_BS1_1TQ;
|
||||
hcan.Init.TimeSeg2 = CAN_BS2_1TQ;
|
||||
hcan.Init.TimeSeg1 = CAN_BS1_13TQ;
|
||||
hcan.Init.TimeSeg2 = CAN_BS2_2TQ;
|
||||
hcan.Init.TimeTriggeredMode = DISABLE;
|
||||
hcan.Init.AutoBusOff = DISABLE;
|
||||
hcan.Init.AutoBusOff = ENABLE;
|
||||
hcan.Init.AutoWakeUp = DISABLE;
|
||||
hcan.Init.AutoRetransmission = DISABLE;
|
||||
hcan.Init.AutoRetransmission = ENABLE;
|
||||
hcan.Init.ReceiveFifoLocked = DISABLE;
|
||||
hcan.Init.TransmitFifoPriority = DISABLE;
|
||||
if (HAL_CAN_Init(&hcan) != HAL_OK)
|
||||
|
|
|
|||
|
|
@ -20,7 +20,6 @@
|
|||
|
||||
/* Includes ------------------------------------------------------------------*/
|
||||
#include "main.h"
|
||||
|
||||
/* USER CODE BEGIN Includes */
|
||||
|
||||
/* USER CODE END Includes */
|
||||
|
|
@ -65,6 +64,7 @@ void HAL_TIM_MspPostInit(TIM_HandleTypeDef *htim);
|
|||
*/
|
||||
void HAL_MspInit(void)
|
||||
{
|
||||
|
||||
/* USER CODE BEGIN MspInit 0 */
|
||||
|
||||
/* USER CODE END MspInit 0 */
|
||||
|
|
@ -106,6 +106,9 @@ void HAL_ADC_MspInit(ADC_HandleTypeDef* hadc)
|
|||
GPIO_InitStruct.Pull = GPIO_NOPULL;
|
||||
HAL_GPIO_Init(GPIOA, &GPIO_InitStruct);
|
||||
|
||||
/* ADC1 interrupt Init */
|
||||
HAL_NVIC_SetPriority(ADC1_IRQn, 0, 0);
|
||||
HAL_NVIC_EnableIRQ(ADC1_IRQn);
|
||||
/* USER CODE BEGIN ADC1_MspInit 1 */
|
||||
|
||||
/* USER CODE END ADC1_MspInit 1 */
|
||||
|
|
@ -135,6 +138,8 @@ void HAL_ADC_MspDeInit(ADC_HandleTypeDef* hadc)
|
|||
*/
|
||||
HAL_GPIO_DeInit(GPIOA, GPIO_PIN_0|GPIO_PIN_1);
|
||||
|
||||
/* ADC1 interrupt DeInit */
|
||||
HAL_NVIC_DisableIRQ(ADC1_IRQn);
|
||||
/* USER CODE BEGIN ADC1_MspDeInit 1 */
|
||||
|
||||
/* USER CODE END ADC1_MspDeInit 1 */
|
||||
|
|
|
|||
|
|
@ -55,7 +55,7 @@
|
|||
/* USER CODE END 0 */
|
||||
|
||||
/* External variables --------------------------------------------------------*/
|
||||
|
||||
extern ADC_HandleTypeDef hadc;
|
||||
/* USER CODE BEGIN EV */
|
||||
|
||||
/* USER CODE END EV */
|
||||
|
|
@ -140,6 +140,20 @@ void SysTick_Handler(void)
|
|||
/* please refer to the startup file (startup_stm32f0xx.s). */
|
||||
/******************************************************************************/
|
||||
|
||||
/**
|
||||
* @brief This function handles ADC interrupt.
|
||||
*/
|
||||
void ADC1_IRQHandler(void)
|
||||
{
|
||||
/* USER CODE BEGIN ADC1_IRQn 0 */
|
||||
|
||||
/* USER CODE END ADC1_IRQn 0 */
|
||||
HAL_ADC_IRQHandler(&hadc);
|
||||
/* USER CODE BEGIN ADC1_IRQn 1 */
|
||||
|
||||
/* USER CODE END ADC1_IRQn 1 */
|
||||
}
|
||||
|
||||
/* USER CODE BEGIN 1 */
|
||||
|
||||
/* USER CODE END 1 */
|
||||
|
|
|
|||
|
|
@ -0,0 +1,176 @@
|
|||
/**
|
||||
******************************************************************************
|
||||
* @file syscalls.c
|
||||
* @author Auto-generated by STM32CubeMX
|
||||
* @brief Minimal System calls file
|
||||
*
|
||||
* For more information about which c-functions
|
||||
* need which of these lowlevel functions
|
||||
* please consult the Newlib libc-manual
|
||||
******************************************************************************
|
||||
* @attention
|
||||
*
|
||||
* Copyright (c) 2020-2024 STMicroelectronics.
|
||||
* All rights reserved.
|
||||
*
|
||||
* This software is licensed under terms that can be found in the LICENSE file
|
||||
* in the root directory of this software component.
|
||||
* If no LICENSE file comes with this software, it is provided AS-IS.
|
||||
*
|
||||
******************************************************************************
|
||||
*/
|
||||
|
||||
/* Includes */
|
||||
#include <sys/stat.h>
|
||||
#include <stdlib.h>
|
||||
#include <errno.h>
|
||||
#include <stdio.h>
|
||||
#include <signal.h>
|
||||
#include <time.h>
|
||||
#include <sys/time.h>
|
||||
#include <sys/times.h>
|
||||
|
||||
|
||||
/* Variables */
|
||||
extern int __io_putchar(int ch) __attribute__((weak));
|
||||
extern int __io_getchar(void) __attribute__((weak));
|
||||
|
||||
|
||||
char *__env[1] = { 0 };
|
||||
char **environ = __env;
|
||||
|
||||
|
||||
/* Functions */
|
||||
void initialise_monitor_handles()
|
||||
{
|
||||
}
|
||||
|
||||
int _getpid(void)
|
||||
{
|
||||
return 1;
|
||||
}
|
||||
|
||||
int _kill(int pid, int sig)
|
||||
{
|
||||
(void)pid;
|
||||
(void)sig;
|
||||
errno = EINVAL;
|
||||
return -1;
|
||||
}
|
||||
|
||||
void _exit (int status)
|
||||
{
|
||||
_kill(status, -1);
|
||||
while (1) {} /* Make sure we hang here */
|
||||
}
|
||||
|
||||
__attribute__((weak)) int _read(int file, char *ptr, int len)
|
||||
{
|
||||
(void)file;
|
||||
int DataIdx;
|
||||
|
||||
for (DataIdx = 0; DataIdx < len; DataIdx++)
|
||||
{
|
||||
*ptr++ = __io_getchar();
|
||||
}
|
||||
|
||||
return len;
|
||||
}
|
||||
|
||||
__attribute__((weak)) int _write(int file, char *ptr, int len)
|
||||
{
|
||||
(void)file;
|
||||
int DataIdx;
|
||||
|
||||
for (DataIdx = 0; DataIdx < len; DataIdx++)
|
||||
{
|
||||
__io_putchar(*ptr++);
|
||||
}
|
||||
return len;
|
||||
}
|
||||
|
||||
int _close(int file)
|
||||
{
|
||||
(void)file;
|
||||
return -1;
|
||||
}
|
||||
|
||||
|
||||
int _fstat(int file, struct stat *st)
|
||||
{
|
||||
(void)file;
|
||||
st->st_mode = S_IFCHR;
|
||||
return 0;
|
||||
}
|
||||
|
||||
int _isatty(int file)
|
||||
{
|
||||
(void)file;
|
||||
return 1;
|
||||
}
|
||||
|
||||
int _lseek(int file, int ptr, int dir)
|
||||
{
|
||||
(void)file;
|
||||
(void)ptr;
|
||||
(void)dir;
|
||||
return 0;
|
||||
}
|
||||
|
||||
int _open(char *path, int flags, ...)
|
||||
{
|
||||
(void)path;
|
||||
(void)flags;
|
||||
/* Pretend like we always fail */
|
||||
return -1;
|
||||
}
|
||||
|
||||
int _wait(int *status)
|
||||
{
|
||||
(void)status;
|
||||
errno = ECHILD;
|
||||
return -1;
|
||||
}
|
||||
|
||||
int _unlink(char *name)
|
||||
{
|
||||
(void)name;
|
||||
errno = ENOENT;
|
||||
return -1;
|
||||
}
|
||||
|
||||
int _times(struct tms *buf)
|
||||
{
|
||||
(void)buf;
|
||||
return -1;
|
||||
}
|
||||
|
||||
int _stat(char *file, struct stat *st)
|
||||
{
|
||||
(void)file;
|
||||
st->st_mode = S_IFCHR;
|
||||
return 0;
|
||||
}
|
||||
|
||||
int _link(char *old, char *new)
|
||||
{
|
||||
(void)old;
|
||||
(void)new;
|
||||
errno = EMLINK;
|
||||
return -1;
|
||||
}
|
||||
|
||||
int _fork(void)
|
||||
{
|
||||
errno = EAGAIN;
|
||||
return -1;
|
||||
}
|
||||
|
||||
int _execve(char *name, char **argv, char **env)
|
||||
{
|
||||
(void)name;
|
||||
(void)argv;
|
||||
(void)env;
|
||||
errno = ENOMEM;
|
||||
return -1;
|
||||
}
|
||||
|
|
@ -0,0 +1,79 @@
|
|||
/**
|
||||
******************************************************************************
|
||||
* @file sysmem.c
|
||||
* @author Generated by STM32CubeMX
|
||||
* @brief System Memory calls file
|
||||
*
|
||||
* For more information about which C functions
|
||||
* need which of these lowlevel functions
|
||||
* please consult the newlib libc manual
|
||||
******************************************************************************
|
||||
* @attention
|
||||
*
|
||||
* Copyright (c) 2024 STMicroelectronics.
|
||||
* All rights reserved.
|
||||
*
|
||||
* This software is licensed under terms that can be found in the LICENSE file
|
||||
* in the root directory of this software component.
|
||||
* If no LICENSE file comes with this software, it is provided AS-IS.
|
||||
*
|
||||
******************************************************************************
|
||||
*/
|
||||
|
||||
/* Includes */
|
||||
#include <errno.h>
|
||||
#include <stdint.h>
|
||||
|
||||
/**
|
||||
* Pointer to the current high watermark of the heap usage
|
||||
*/
|
||||
static uint8_t *__sbrk_heap_end = NULL;
|
||||
|
||||
/**
|
||||
* @brief _sbrk() allocates memory to the newlib heap and is used by malloc
|
||||
* and others from the C library
|
||||
*
|
||||
* @verbatim
|
||||
* ############################################################################
|
||||
* # .data # .bss # newlib heap # MSP stack #
|
||||
* # # # # Reserved by _Min_Stack_Size #
|
||||
* ############################################################################
|
||||
* ^-- RAM start ^-- _end _estack, RAM end --^
|
||||
* @endverbatim
|
||||
*
|
||||
* This implementation starts allocating at the '_end' linker symbol
|
||||
* The '_Min_Stack_Size' linker symbol reserves a memory for the MSP stack
|
||||
* The implementation considers '_estack' linker symbol to be RAM end
|
||||
* NOTE: If the MSP stack, at any point during execution, grows larger than the
|
||||
* reserved size, please increase the '_Min_Stack_Size'.
|
||||
*
|
||||
* @param incr Memory size
|
||||
* @return Pointer to allocated memory
|
||||
*/
|
||||
void *_sbrk(ptrdiff_t incr)
|
||||
{
|
||||
extern uint8_t _end; /* Symbol defined in the linker script */
|
||||
extern uint8_t _estack; /* Symbol defined in the linker script */
|
||||
extern uint32_t _Min_Stack_Size; /* Symbol defined in the linker script */
|
||||
const uint32_t stack_limit = (uint32_t)&_estack - (uint32_t)&_Min_Stack_Size;
|
||||
const uint8_t *max_heap = (uint8_t *)stack_limit;
|
||||
uint8_t *prev_heap_end;
|
||||
|
||||
/* Initialize heap end at first call */
|
||||
if (NULL == __sbrk_heap_end)
|
||||
{
|
||||
__sbrk_heap_end = &_end;
|
||||
}
|
||||
|
||||
/* Protect heap from growing into the reserved MSP stack */
|
||||
if (__sbrk_heap_end + incr > max_heap)
|
||||
{
|
||||
errno = ENOMEM;
|
||||
return (void *)-1;
|
||||
}
|
||||
|
||||
prev_heap_end = __sbrk_heap_end;
|
||||
__sbrk_heap_end += incr;
|
||||
|
||||
return (void *)prev_heap_end;
|
||||
}
|
||||
|
|
@ -7,7 +7,7 @@
|
|||
******************************************************************************
|
||||
* @attention
|
||||
*
|
||||
* Copyright (c) 2023 STMicroelectronics.
|
||||
* Copyright (c) 2021 STMicroelectronics.
|
||||
* All rights reserved.
|
||||
*
|
||||
* This software is licensed under terms that can be found in the LICENSE file
|
||||
|
|
@ -37,16 +37,12 @@ extern "C" {
|
|||
#define AES_CLEARFLAG_CCF CRYP_CLEARFLAG_CCF
|
||||
#define AES_CLEARFLAG_RDERR CRYP_CLEARFLAG_RDERR
|
||||
#define AES_CLEARFLAG_WRERR CRYP_CLEARFLAG_WRERR
|
||||
#if defined(STM32U5) || defined(STM32H7) || defined(STM32MP1)
|
||||
#if defined(STM32H7) || defined(STM32MP1)
|
||||
#define CRYP_DATATYPE_32B CRYP_NO_SWAP
|
||||
#define CRYP_DATATYPE_16B CRYP_HALFWORD_SWAP
|
||||
#define CRYP_DATATYPE_8B CRYP_BYTE_SWAP
|
||||
#define CRYP_DATATYPE_1B CRYP_BIT_SWAP
|
||||
#if defined(STM32U5)
|
||||
#define CRYP_CCF_CLEAR CRYP_CLEAR_CCF
|
||||
#define CRYP_ERR_CLEAR CRYP_CLEAR_RWEIF
|
||||
#endif /* STM32U5 */
|
||||
#endif /* STM32U5 || STM32H7 || STM32MP1 */
|
||||
#endif /* STM32H7 || STM32MP1 */
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
|
|
@ -279,7 +275,7 @@ extern "C" {
|
|||
#define DAC_WAVEGENERATION_NOISE DAC_WAVE_NOISE
|
||||
#define DAC_WAVEGENERATION_TRIANGLE DAC_WAVE_TRIANGLE
|
||||
|
||||
#if defined(STM32G4) || defined(STM32L5) || defined(STM32H7) || defined (STM32U5)
|
||||
#if defined(STM32G4) || defined(STM32H7) || defined (STM32U5)
|
||||
#define DAC_CHIPCONNECT_DISABLE DAC_CHIPCONNECT_EXTERNAL
|
||||
#define DAC_CHIPCONNECT_ENABLE DAC_CHIPCONNECT_INTERNAL
|
||||
#endif
|
||||
|
|
@ -552,6 +548,16 @@ extern "C" {
|
|||
#define OB_SRAM134_RST_ERASE OB_SRAM_RST_ERASE
|
||||
#define OB_SRAM134_RST_NOT_ERASE OB_SRAM_RST_NOT_ERASE
|
||||
#endif /* STM32U5 */
|
||||
#if defined(STM32U0)
|
||||
#define OB_USER_nRST_STOP OB_USER_NRST_STOP
|
||||
#define OB_USER_nRST_STDBY OB_USER_NRST_STDBY
|
||||
#define OB_USER_nRST_SHDW OB_USER_NRST_SHDW
|
||||
#define OB_USER_nBOOT_SEL OB_USER_NBOOT_SEL
|
||||
#define OB_USER_nBOOT0 OB_USER_NBOOT0
|
||||
#define OB_USER_nBOOT1 OB_USER_NBOOT1
|
||||
#define OB_nBOOT0_RESET OB_NBOOT0_RESET
|
||||
#define OB_nBOOT0_SET OB_NBOOT0_SET
|
||||
#endif /* STM32U0 */
|
||||
|
||||
/**
|
||||
* @}
|
||||
|
|
@ -1243,10 +1249,10 @@ extern "C" {
|
|||
#define RTC_TAMPERPIN_PA0 RTC_TAMPERPIN_POS1
|
||||
#define RTC_TAMPERPIN_PI8 RTC_TAMPERPIN_POS1
|
||||
|
||||
#if defined(STM32H5)
|
||||
#if defined(STM32H5) || defined(STM32H7RS)
|
||||
#define TAMP_SECRETDEVICE_ERASE_NONE TAMP_DEVICESECRETS_ERASE_NONE
|
||||
#define TAMP_SECRETDEVICE_ERASE_BKP_SRAM TAMP_DEVICESECRETS_ERASE_BKPSRAM
|
||||
#endif /* STM32H5 */
|
||||
#endif /* STM32H5 || STM32H7RS */
|
||||
|
||||
#if defined(STM32WBA)
|
||||
#define TAMP_SECRETDEVICE_ERASE_NONE TAMP_DEVICESECRETS_ERASE_NONE
|
||||
|
|
@ -1258,10 +1264,10 @@ extern "C" {
|
|||
#define TAMP_SECRETDEVICE_ERASE_ALL TAMP_DEVICESECRETS_ERASE_ALL
|
||||
#endif /* STM32WBA */
|
||||
|
||||
#if defined(STM32H5) || defined(STM32WBA)
|
||||
#if defined(STM32H5) || defined(STM32WBA) || defined(STM32H7RS)
|
||||
#define TAMP_SECRETDEVICE_ERASE_DISABLE TAMP_DEVICESECRETS_ERASE_NONE
|
||||
#define TAMP_SECRETDEVICE_ERASE_ENABLE TAMP_SECRETDEVICE_ERASE_ALL
|
||||
#endif /* STM32H5 || STM32WBA */
|
||||
#endif /* STM32H5 || STM32WBA || STM32H7RS */
|
||||
|
||||
#if defined(STM32F7)
|
||||
#define RTC_TAMPCR_TAMPXE RTC_TAMPER_ENABLE_BITS_MASK
|
||||
|
|
@ -1599,6 +1605,8 @@ extern "C" {
|
|||
#define ETH_MAC_SMALL_FIFO_RW_ACTIVE 0x00000006U /* MAC small FIFO read / write controllers active */
|
||||
#define ETH_MAC_MII_RECEIVE_PROTOCOL_ACTIVE 0x00000001U /* MAC MII receive protocol engine active */
|
||||
|
||||
#define ETH_TxPacketConfig ETH_TxPacketConfigTypeDef /* Transmit Packet Configuration structure definition */
|
||||
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
|
|
@ -1991,12 +1999,12 @@ extern "C" {
|
|||
/** @defgroup HAL_RTC_Aliased_Functions HAL RTC Aliased Functions maintained for legacy purpose
|
||||
* @{
|
||||
*/
|
||||
#if defined(STM32H5) || defined(STM32WBA)
|
||||
#if defined(STM32H5) || defined(STM32WBA) || defined(STM32H7RS)
|
||||
#define HAL_RTCEx_SetBoothardwareKey HAL_RTCEx_LockBootHardwareKey
|
||||
#define HAL_RTCEx_BKUPBlock_Enable HAL_RTCEx_BKUPBlock
|
||||
#define HAL_RTCEx_BKUPBlock_Disable HAL_RTCEx_BKUPUnblock
|
||||
#define HAL_RTCEx_Erase_SecretDev_Conf HAL_RTCEx_ConfigEraseDeviceSecrets
|
||||
#endif /* STM32H5 || STM32WBA */
|
||||
#endif /* STM32H5 || STM32WBA || STM32H7RS */
|
||||
|
||||
/**
|
||||
* @}
|
||||
|
|
@ -2723,6 +2731,12 @@ extern "C" {
|
|||
#define __APB1_RELEASE_RESET __HAL_RCC_APB1_RELEASE_RESET
|
||||
#define __APB2_FORCE_RESET __HAL_RCC_APB2_FORCE_RESET
|
||||
#define __APB2_RELEASE_RESET __HAL_RCC_APB2_RELEASE_RESET
|
||||
#if defined(STM32C0)
|
||||
#define __HAL_RCC_APB1_FORCE_RESET __HAL_RCC_APB1_GRP1_FORCE_RESET
|
||||
#define __HAL_RCC_APB1_RELEASE_RESET __HAL_RCC_APB1_GRP1_RELEASE_RESET
|
||||
#define __HAL_RCC_APB2_FORCE_RESET __HAL_RCC_APB1_GRP2_FORCE_RESET
|
||||
#define __HAL_RCC_APB2_RELEASE_RESET __HAL_RCC_APB1_GRP2_RELEASE_RESET
|
||||
#endif /* STM32C0 */
|
||||
#define __BKP_CLK_DISABLE __HAL_RCC_BKP_CLK_DISABLE
|
||||
#define __BKP_CLK_ENABLE __HAL_RCC_BKP_CLK_ENABLE
|
||||
#define __BKP_FORCE_RESET __HAL_RCC_BKP_FORCE_RESET
|
||||
|
|
@ -3646,8 +3660,12 @@ extern "C" {
|
|||
#define RCC_MCOSOURCE_PLLCLK_NODIV RCC_MCO1SOURCE_PLLCLK
|
||||
#define RCC_MCOSOURCE_PLLCLK_DIV2 RCC_MCO1SOURCE_PLLCLK_DIV2
|
||||
|
||||
#if defined(STM32U0)
|
||||
#define RCC_SYSCLKSOURCE_STATUS_PLLR RCC_SYSCLKSOURCE_STATUS_PLLCLK
|
||||
#endif
|
||||
|
||||
#if defined(STM32L4) || defined(STM32WB) || defined(STM32G0) || defined(STM32G4) || defined(STM32L5) || \
|
||||
defined(STM32WL) || defined(STM32C0)
|
||||
defined(STM32WL) || defined(STM32C0) || defined(STM32H7RS) || defined(STM32U0)
|
||||
#define RCC_RTCCLKSOURCE_NO_CLK RCC_RTCCLKSOURCE_NONE
|
||||
#else
|
||||
#define RCC_RTCCLKSOURCE_NONE RCC_RTCCLKSOURCE_NO_CLK
|
||||
|
|
@ -3749,8 +3767,10 @@ extern "C" {
|
|||
#define __HAL_RCC_GET_DFSDM_SOURCE __HAL_RCC_GET_DFSDM1_SOURCE
|
||||
#define RCC_DFSDM1CLKSOURCE_PCLK RCC_DFSDM1CLKSOURCE_PCLK2
|
||||
#define RCC_SWPMI1CLKSOURCE_PCLK RCC_SWPMI1CLKSOURCE_PCLK1
|
||||
#if !defined(STM32U0)
|
||||
#define RCC_LPTIM1CLKSOURCE_PCLK RCC_LPTIM1CLKSOURCE_PCLK1
|
||||
#define RCC_LPTIM2CLKSOURCE_PCLK RCC_LPTIM2CLKSOURCE_PCLK1
|
||||
#endif
|
||||
|
||||
#define RCC_DFSDM1AUDIOCLKSOURCE_I2SAPB1 RCC_DFSDM1AUDIOCLKSOURCE_I2S1
|
||||
#define RCC_DFSDM1AUDIOCLKSOURCE_I2SAPB2 RCC_DFSDM1AUDIOCLKSOURCE_I2S2
|
||||
|
|
@ -3896,7 +3916,8 @@ extern "C" {
|
|||
*/
|
||||
#if defined (STM32G0) || defined (STM32L5) || defined (STM32L412xx) || defined (STM32L422xx) || \
|
||||
defined (STM32L4P5xx)|| defined (STM32L4Q5xx) || defined (STM32G4) || defined (STM32WL) || defined (STM32U5) || \
|
||||
defined (STM32WBA) || defined (STM32H5) || defined (STM32C0)
|
||||
defined (STM32WBA) || defined (STM32H5) || \
|
||||
defined (STM32C0) || defined (STM32H7RS) || defined (STM32U0)
|
||||
#else
|
||||
#define __HAL_RTC_CLEAR_FLAG __HAL_RTC_EXTI_CLEAR_FLAG
|
||||
#endif
|
||||
|
|
@ -3931,6 +3952,13 @@ extern "C" {
|
|||
__HAL_RTC_TAMPER_TIMESTAMP_EXTI_GENERATE_SWIT()))
|
||||
#endif /* STM32F1 */
|
||||
|
||||
#if defined (STM32F0) || defined (STM32F2) || defined (STM32F3) || defined (STM32F4) || defined (STM32F7) || \
|
||||
defined (STM32H7) || \
|
||||
defined (STM32L0) || defined (STM32L1) || \
|
||||
defined (STM32WB)
|
||||
#define __HAL_RTC_TAMPER_GET_IT __HAL_RTC_TAMPER_GET_FLAG
|
||||
#endif
|
||||
|
||||
#define IS_ALARM IS_RTC_ALARM
|
||||
#define IS_ALARM_MASK IS_RTC_ALARM_MASK
|
||||
#define IS_TAMPER IS_RTC_TAMPER
|
||||
|
|
@ -4212,6 +4240,9 @@ extern "C" {
|
|||
#define __HAL_TIM_GetCompare __HAL_TIM_GET_COMPARE
|
||||
|
||||
#define TIM_BREAKINPUTSOURCE_DFSDM TIM_BREAKINPUTSOURCE_DFSDM1
|
||||
|
||||
#define TIM_OCMODE_ASSYMETRIC_PWM1 TIM_OCMODE_ASYMMETRIC_PWM1
|
||||
#define TIM_OCMODE_ASSYMETRIC_PWM2 TIM_OCMODE_ASYMMETRIC_PWM2
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
|
|
|
|||
|
|
@ -204,7 +204,11 @@ typedef struct
|
|||
/**
|
||||
* @brief CAN handle Structure definition
|
||||
*/
|
||||
#if USE_HAL_CAN_REGISTER_CALLBACKS == 1
|
||||
typedef struct __CAN_HandleTypeDef
|
||||
#else
|
||||
typedef struct
|
||||
#endif /* USE_HAL_CAN_REGISTER_CALLBACKS */
|
||||
{
|
||||
CAN_TypeDef *Instance; /*!< Register base address */
|
||||
|
||||
|
|
|
|||
|
|
@ -332,7 +332,7 @@ uint32_t HAL_CRC_Calculate(CRC_HandleTypeDef *hcrc, uint32_t pBuffer[], uint32_t
|
|||
/** @defgroup CRC_Exported_Functions_Group3 Peripheral State functions
|
||||
* @{
|
||||
*/
|
||||
HAL_CRC_StateTypeDef HAL_CRC_GetState(CRC_HandleTypeDef *hcrc);
|
||||
HAL_CRC_StateTypeDef HAL_CRC_GetState(const CRC_HandleTypeDef *hcrc);
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
|
|
|
|||
|
|
@ -236,8 +236,8 @@ typedef enum
|
|||
*/
|
||||
#define IS_GPIO_PIN_ACTION(ACTION) (((ACTION) == GPIO_PIN_RESET) || ((ACTION) == GPIO_PIN_SET))
|
||||
|
||||
#define IS_GPIO_PIN(__PIN__) (((((uint32_t)__PIN__) & GPIO_PIN_MASK) != 0x00U) &&\
|
||||
((((uint32_t)__PIN__) & ~GPIO_PIN_MASK) == 0x00U))
|
||||
#define IS_GPIO_PIN(__PIN__) (((((uint32_t)(__PIN__)) & GPIO_PIN_MASK) != 0x00U) &&\
|
||||
((((uint32_t)(__PIN__)) & ~GPIO_PIN_MASK) == 0x00U))
|
||||
|
||||
#define IS_GPIO_MODE(__MODE__) (((__MODE__) == GPIO_MODE_INPUT) ||\
|
||||
((__MODE__) == GPIO_MODE_OUTPUT_PP) ||\
|
||||
|
|
|
|||
|
|
@ -118,8 +118,6 @@ typedef enum
|
|||
HAL_I2C_STATE_BUSY_RX_LISTEN = 0x2AU, /*!< Address Listen Mode and Data Reception
|
||||
process is ongoing */
|
||||
HAL_I2C_STATE_ABORT = 0x60U, /*!< Abort user request ongoing */
|
||||
HAL_I2C_STATE_TIMEOUT = 0xA0U, /*!< Timeout state */
|
||||
HAL_I2C_STATE_ERROR = 0xE0U /*!< Error */
|
||||
|
||||
} HAL_I2C_StateTypeDef;
|
||||
|
||||
|
|
|
|||
|
|
@ -339,7 +339,7 @@ HAL_StatusTypeDef HAL_PCD_EP_Flush(PCD_HandleTypeDef *hpcd, uint8_t ep_addr);
|
|||
HAL_StatusTypeDef HAL_PCD_EP_Abort(PCD_HandleTypeDef *hpcd, uint8_t ep_addr);
|
||||
HAL_StatusTypeDef HAL_PCD_ActivateRemoteWakeup(PCD_HandleTypeDef *hpcd);
|
||||
HAL_StatusTypeDef HAL_PCD_DeActivateRemoteWakeup(PCD_HandleTypeDef *hpcd);
|
||||
uint32_t HAL_PCD_EP_GetRxCount(PCD_HandleTypeDef *hpcd, uint8_t ep_addr);
|
||||
uint32_t HAL_PCD_EP_GetRxCount(PCD_HandleTypeDef const *hpcd, uint8_t ep_addr);
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
|
|
@ -348,7 +348,7 @@ uint32_t HAL_PCD_EP_GetRxCount(PCD_HandleTypeDef *hpcd, uint8_t ep_addr
|
|||
/** @addtogroup PCD_Exported_Functions_Group4 Peripheral State functions
|
||||
* @{
|
||||
*/
|
||||
PCD_StateTypeDef HAL_PCD_GetState(PCD_HandleTypeDef *hpcd);
|
||||
PCD_StateTypeDef HAL_PCD_GetState(PCD_HandleTypeDef const *hpcd);
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
|
|
@ -806,20 +806,17 @@ PCD_StateTypeDef HAL_PCD_GetState(PCD_HandleTypeDef *hpcd);
|
|||
\
|
||||
*(pdwReg) &= 0x3FFU; \
|
||||
\
|
||||
if ((wCount) > 62U) \
|
||||
{ \
|
||||
PCD_CALC_BLK32((pdwReg), (wCount), wNBlocks); \
|
||||
} \
|
||||
else \
|
||||
{ \
|
||||
if ((wCount) == 0U) \
|
||||
{ \
|
||||
*(pdwReg) |= USB_CNTRX_BLSIZE; \
|
||||
} \
|
||||
else \
|
||||
else if ((wCount) <= 62U) \
|
||||
{ \
|
||||
PCD_CALC_BLK2((pdwReg), (wCount), wNBlocks); \
|
||||
} \
|
||||
else \
|
||||
{ \
|
||||
PCD_CALC_BLK32((pdwReg), (wCount), wNBlocks); \
|
||||
} \
|
||||
} while(0) /* PCD_SET_EP_CNT_RX_REG */
|
||||
|
||||
|
|
|
|||
|
|
@ -785,7 +785,7 @@ HAL_RTCStateTypeDef HAL_RTC_GetState(RTC_HandleTypeDef *hrtc);
|
|||
|
||||
#define RTC_TIMEOUT_VALUE 1000U
|
||||
|
||||
#define RTC_EXTI_LINE_ALARM_EVENT EXTI_IMR_MR17 /*!< External interrupt line 17 Connected to the RTC Alarm event */
|
||||
#define RTC_EXTI_LINE_ALARM_EVENT EXTI_IMR_MR17 /*!< External interrupt line 17 connected to the RTC Alarm event */
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
|
|
|
|||
|
|
@ -623,19 +623,6 @@ typedef struct
|
|||
*/
|
||||
#define __HAL_RTC_TAMPER_DISABLE_IT(__HANDLE__, __INTERRUPT__) ((__HANDLE__)->Instance->TAFCR &= ~(__INTERRUPT__))
|
||||
|
||||
/**
|
||||
* @brief Check whether the specified RTC Tamper interrupt has occurred or not.
|
||||
* @param __HANDLE__ specifies the RTC handle.
|
||||
* @param __INTERRUPT__ specifies the RTC Tamper interrupt to check.
|
||||
* This parameter can be:
|
||||
* @arg RTC_IT_TAMP1: Tamper 1 interrupt
|
||||
* @arg RTC_IT_TAMP2: Tamper 2 interrupt
|
||||
* @arg RTC_IT_TAMP3: Tamper 3 interrupt
|
||||
* @note RTC_IT_TAMP3 is not applicable to all devices.
|
||||
* @retval None
|
||||
*/
|
||||
#define __HAL_RTC_TAMPER_GET_IT(__HANDLE__, __INTERRUPT__) (((((__HANDLE__)->Instance->ISR) & ((__INTERRUPT__) >> 4U)) != 0U) ? 1U : 0U)
|
||||
|
||||
/**
|
||||
* @brief Check whether the specified RTC Tamper interrupt has been enabled or not.
|
||||
* @param __HANDLE__ specifies the RTC handle.
|
||||
|
|
@ -653,8 +640,9 @@ typedef struct
|
|||
* This parameter can be:
|
||||
* @arg RTC_FLAG_TAMP1F: Tamper 1 interrupt flag
|
||||
* @arg RTC_FLAG_TAMP2F: Tamper 2 interrupt flag
|
||||
* @arg RTC_FLAG_TAMP3F: Tamper 3 interrupt flag
|
||||
* @note RTC_FLAG_TAMP3F is not applicable to all devices.
|
||||
* @arg RTC_FLAG_TAMP3F: Tamper 3 interrupt flag (*)
|
||||
*
|
||||
* (*) value not applicable to all devices.
|
||||
* @retval None
|
||||
*/
|
||||
#define __HAL_RTC_TAMPER_GET_FLAG(__HANDLE__, __FLAG__) (((((__HANDLE__)->Instance->ISR) & (__FLAG__)) != 0U)? 1U : 0U)
|
||||
|
|
@ -666,8 +654,9 @@ typedef struct
|
|||
* This parameter can be:
|
||||
* @arg RTC_FLAG_TAMP1F: Tamper 1 interrupt flag
|
||||
* @arg RTC_FLAG_TAMP2F: Tamper 2 interrupt flag
|
||||
* @arg RTC_FLAG_TAMP3F: Tamper 3 interrupt flag
|
||||
* @note RTC_FLAG_TAMP3F is not applicable to all devices.
|
||||
* @arg RTC_FLAG_TAMP3F: Tamper 3 interrupt flag (*)
|
||||
*
|
||||
* (*) value not applicable to all devices.
|
||||
* @retval None
|
||||
*/
|
||||
#define __HAL_RTC_TAMPER_CLEAR_FLAG(__HANDLE__, __FLAG__) ((__HANDLE__)->Instance->ISR) = (~((__FLAG__) | RTC_ISR_INIT)|((__HANDLE__)->Instance->ISR & RTC_ISR_INIT))
|
||||
|
|
|
|||
|
|
@ -100,8 +100,6 @@ typedef struct
|
|||
#define HAL_SMBUS_STATE_MASTER_BUSY_RX (0x00000022U) /*!< Master Data Reception process is ongoing */
|
||||
#define HAL_SMBUS_STATE_SLAVE_BUSY_TX (0x00000032U) /*!< Slave Data Transmission process is ongoing */
|
||||
#define HAL_SMBUS_STATE_SLAVE_BUSY_RX (0x00000042U) /*!< Slave Data Reception process is ongoing */
|
||||
#define HAL_SMBUS_STATE_TIMEOUT (0x00000003U) /*!< Timeout state */
|
||||
#define HAL_SMBUS_STATE_ERROR (0x00000004U) /*!< Reception process is ongoing */
|
||||
#define HAL_SMBUS_STATE_LISTEN (0x00000008U) /*!< Address Listen Mode is ongoing */
|
||||
/**
|
||||
* @}
|
||||
|
|
|
|||
|
|
@ -48,7 +48,7 @@ extern "C" {
|
|||
/** @addtogroup SPIEx_Exported_Functions_Group1
|
||||
* @{
|
||||
*/
|
||||
HAL_StatusTypeDef HAL_SPIEx_FlushRxFifo(SPI_HandleTypeDef *hspi);
|
||||
HAL_StatusTypeDef HAL_SPIEx_FlushRxFifo(const SPI_HandleTypeDef *hspi);
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
|
|
|
|||
|
|
@ -403,7 +403,6 @@ typedef enum
|
|||
, HAL_TIM_PERIOD_ELAPSED_HALF_CB_ID = 0x0FU /*!< TIM Period Elapsed half complete Callback ID */
|
||||
, HAL_TIM_TRIGGER_CB_ID = 0x10U /*!< TIM Trigger Callback ID */
|
||||
, HAL_TIM_TRIGGER_HALF_CB_ID = 0x11U /*!< TIM Trigger half complete Callback ID */
|
||||
|
||||
, HAL_TIM_IC_CAPTURE_CB_ID = 0x12U /*!< TIM Input Capture Callback ID */
|
||||
, HAL_TIM_IC_CAPTURE_HALF_CB_ID = 0x13U /*!< TIM Input Capture half complete Callback ID */
|
||||
, HAL_TIM_OC_DELAY_ELAPSED_CB_ID = 0x14U /*!< TIM Output Compare Delay Elapsed Callback ID */
|
||||
|
|
@ -1656,8 +1655,9 @@ typedef void (*pTIM_CallbackTypeDef)(TIM_HandleTypeDef *htim); /*!< pointer to
|
|||
#define IS_TIM_OPM_CHANNELS(__CHANNEL__) (((__CHANNEL__) == TIM_CHANNEL_1) || \
|
||||
((__CHANNEL__) == TIM_CHANNEL_2))
|
||||
|
||||
#define IS_TIM_PERIOD(__HANDLE__, __PERIOD__) \
|
||||
((IS_TIM_32B_COUNTER_INSTANCE(((__HANDLE__)->Instance)) == 0U) ? (((__PERIOD__) > 0U) && ((__PERIOD__) <= 0x0000FFFFU)) : ((__PERIOD__) > 0U))
|
||||
#define IS_TIM_PERIOD(__HANDLE__, __PERIOD__) ((IS_TIM_32B_COUNTER_INSTANCE(((__HANDLE__)->Instance)) == 0U) ? \
|
||||
(((__PERIOD__) > 0U) && ((__PERIOD__) <= 0x0000FFFFU)) : \
|
||||
((__PERIOD__) > 0U))
|
||||
|
||||
#define IS_TIM_COMPLEMENTARY_CHANNELS(__CHANNEL__) (((__CHANNEL__) == TIM_CHANNEL_1) || \
|
||||
((__CHANNEL__) == TIM_CHANNEL_2) || \
|
||||
|
|
@ -1710,7 +1710,6 @@ typedef void (*pTIM_CallbackTypeDef)(TIM_HandleTypeDef *htim); /*!< pointer to
|
|||
|
||||
#define IS_TIM_BREAK_FILTER(__BRKFILTER__) ((__BRKFILTER__) <= 0xFUL)
|
||||
|
||||
|
||||
#define IS_TIM_BREAK_STATE(__STATE__) (((__STATE__) == TIM_BREAK_ENABLE) || \
|
||||
((__STATE__) == TIM_BREAK_DISABLE))
|
||||
|
||||
|
|
@ -2048,7 +2047,8 @@ HAL_StatusTypeDef HAL_TIM_ConfigTI1Input(TIM_HandleTypeDef *htim, uint32_t TI1_S
|
|||
HAL_StatusTypeDef HAL_TIM_SlaveConfigSynchro(TIM_HandleTypeDef *htim, const TIM_SlaveConfigTypeDef *sSlaveConfig);
|
||||
HAL_StatusTypeDef HAL_TIM_SlaveConfigSynchro_IT(TIM_HandleTypeDef *htim, const TIM_SlaveConfigTypeDef *sSlaveConfig);
|
||||
HAL_StatusTypeDef HAL_TIM_DMABurst_WriteStart(TIM_HandleTypeDef *htim, uint32_t BurstBaseAddress,
|
||||
uint32_t BurstRequestSrc, const uint32_t *BurstBuffer, uint32_t BurstLength);
|
||||
uint32_t BurstRequestSrc, const uint32_t *BurstBuffer,
|
||||
uint32_t BurstLength);
|
||||
HAL_StatusTypeDef HAL_TIM_DMABurst_MultiWriteStart(TIM_HandleTypeDef *htim, uint32_t BurstBaseAddress,
|
||||
uint32_t BurstRequestSrc, const uint32_t *BurstBuffer,
|
||||
uint32_t BurstLength, uint32_t DataLength);
|
||||
|
|
|
|||
|
|
@ -145,7 +145,7 @@ HAL_StatusTypeDef HAL_UARTEx_ReceiveToIdle(UART_HandleTypeDef *huart, uint8_t *p
|
|||
HAL_StatusTypeDef HAL_UARTEx_ReceiveToIdle_IT(UART_HandleTypeDef *huart, uint8_t *pData, uint16_t Size);
|
||||
HAL_StatusTypeDef HAL_UARTEx_ReceiveToIdle_DMA(UART_HandleTypeDef *huart, uint8_t *pData, uint16_t Size);
|
||||
|
||||
HAL_UART_RxEventTypeTypeDef HAL_UARTEx_GetRxEventType(UART_HandleTypeDef *huart);
|
||||
HAL_UART_RxEventTypeTypeDef HAL_UARTEx_GetRxEventType(const UART_HandleTypeDef *huart);
|
||||
|
||||
|
||||
/**
|
||||
|
|
|
|||
|
|
@ -463,7 +463,6 @@ typedef void (*pUSART_CallbackTypeDef)(USART_HandleTypeDef *husart); /*!< poin
|
|||
#define __HAL_USART_CLEAR_IDLEFLAG(__HANDLE__) __HAL_USART_CLEAR_FLAG((__HANDLE__), USART_CLEAR_IDLEF)
|
||||
|
||||
|
||||
|
||||
/** @brief Enable the specified USART interrupt.
|
||||
* @param __HANDLE__ specifies the USART Handle.
|
||||
* @param __INTERRUPT__ specifies the USART interrupt source to enable.
|
||||
|
|
|
|||
|
|
@ -183,7 +183,7 @@ typedef void (*pWWDG_CallbackTypeDef)(WWDG_HandleTypeDef *hppp); /*!< pointer t
|
|||
|
||||
/**
|
||||
* @brief Enable the WWDG early wakeup interrupt.
|
||||
* @param __HANDLE__ WWDG handle
|
||||
* @param __HANDLE__: WWDG handle
|
||||
* @param __INTERRUPT__ specifies the interrupt to enable.
|
||||
* This parameter can be one of the following values:
|
||||
* @arg WWDG_IT_EWI: Early wakeup interrupt
|
||||
|
|
@ -296,3 +296,4 @@ void HAL_WWDG_EarlyWakeupCallback(WWDG_HandleTypeDef *hwwdg);
|
|||
#endif
|
||||
|
||||
#endif /* STM32F0xx_HAL_WWDG_H */
|
||||
|
||||
|
|
|
|||
|
|
@ -2928,8 +2928,7 @@ __STATIC_INLINE uint32_t LL_ADC_REG_IsStopConversionOngoing(ADC_TypeDef *ADCx)
|
|||
/**
|
||||
* @brief Get ADC group regular conversion data, range fit for
|
||||
* all ADC configurations: all ADC resolutions and
|
||||
* all oversampling increased data width (for devices
|
||||
* with feature oversampling).
|
||||
* features extending data width (oversampling, data shift,...).
|
||||
* @rmtoll DR DATA LL_ADC_REG_ReadConversionData32
|
||||
* @param ADCx ADC instance
|
||||
* @retval Value between Min_Data=0x00000000 and Max_Data=0xFFFFFFFF
|
||||
|
|
|
|||
|
|
@ -189,7 +189,7 @@ __STATIC_INLINE void LL_CRC_SetPolynomialSize(CRC_TypeDef *CRCx, uint32_t PolySi
|
|||
* @arg @ref LL_CRC_POLYLENGTH_8B
|
||||
* @arg @ref LL_CRC_POLYLENGTH_7B
|
||||
*/
|
||||
__STATIC_INLINE uint32_t LL_CRC_GetPolynomialSize(CRC_TypeDef *CRCx)
|
||||
__STATIC_INLINE uint32_t LL_CRC_GetPolynomialSize(const CRC_TypeDef *CRCx)
|
||||
{
|
||||
return (uint32_t)(READ_BIT(CRCx->CR, CRC_CR_POLYSIZE));
|
||||
}
|
||||
|
|
@ -221,7 +221,7 @@ __STATIC_INLINE void LL_CRC_SetInputDataReverseMode(CRC_TypeDef *CRCx, uint32_t
|
|||
* @arg @ref LL_CRC_INDATA_REVERSE_HALFWORD
|
||||
* @arg @ref LL_CRC_INDATA_REVERSE_WORD
|
||||
*/
|
||||
__STATIC_INLINE uint32_t LL_CRC_GetInputDataReverseMode(CRC_TypeDef *CRCx)
|
||||
__STATIC_INLINE uint32_t LL_CRC_GetInputDataReverseMode(const CRC_TypeDef *CRCx)
|
||||
{
|
||||
return (uint32_t)(READ_BIT(CRCx->CR, CRC_CR_REV_IN));
|
||||
}
|
||||
|
|
@ -248,7 +248,7 @@ __STATIC_INLINE void LL_CRC_SetOutputDataReverseMode(CRC_TypeDef *CRCx, uint32_t
|
|||
* @arg @ref LL_CRC_OUTDATA_REVERSE_NONE
|
||||
* @arg @ref LL_CRC_OUTDATA_REVERSE_BIT
|
||||
*/
|
||||
__STATIC_INLINE uint32_t LL_CRC_GetOutputDataReverseMode(CRC_TypeDef *CRCx)
|
||||
__STATIC_INLINE uint32_t LL_CRC_GetOutputDataReverseMode(const CRC_TypeDef *CRCx)
|
||||
{
|
||||
return (uint32_t)(READ_BIT(CRCx->CR, CRC_CR_REV_OUT));
|
||||
}
|
||||
|
|
@ -276,7 +276,7 @@ __STATIC_INLINE void LL_CRC_SetInitialData(CRC_TypeDef *CRCx, uint32_t InitCrc)
|
|||
* @param CRCx CRC Instance
|
||||
* @retval Value programmed in Programmable initial CRC value register
|
||||
*/
|
||||
__STATIC_INLINE uint32_t LL_CRC_GetInitialData(CRC_TypeDef *CRCx)
|
||||
__STATIC_INLINE uint32_t LL_CRC_GetInitialData(const CRC_TypeDef *CRCx)
|
||||
{
|
||||
return (uint32_t)(READ_REG(CRCx->INIT));
|
||||
}
|
||||
|
|
@ -308,7 +308,7 @@ __STATIC_INLINE void LL_CRC_SetPolynomialCoef(CRC_TypeDef *CRCx, uint32_t Polyno
|
|||
* @param CRCx CRC Instance
|
||||
* @retval Value programmed in Programmable Polynomial value register
|
||||
*/
|
||||
__STATIC_INLINE uint32_t LL_CRC_GetPolynomialCoef(CRC_TypeDef *CRCx)
|
||||
__STATIC_INLINE uint32_t LL_CRC_GetPolynomialCoef(const CRC_TypeDef *CRCx)
|
||||
{
|
||||
return (uint32_t)(READ_REG(CRCx->POL));
|
||||
}
|
||||
|
|
@ -367,7 +367,7 @@ __STATIC_INLINE void LL_CRC_FeedData8(CRC_TypeDef *CRCx, uint8_t InData)
|
|||
* @param CRCx CRC Instance
|
||||
* @retval Current CRC calculation result as stored in CRC_DR register (32 bits).
|
||||
*/
|
||||
__STATIC_INLINE uint32_t LL_CRC_ReadData32(CRC_TypeDef *CRCx)
|
||||
__STATIC_INLINE uint32_t LL_CRC_ReadData32(const CRC_TypeDef *CRCx)
|
||||
{
|
||||
return (uint32_t)(READ_REG(CRCx->DR));
|
||||
}
|
||||
|
|
@ -380,7 +380,7 @@ __STATIC_INLINE uint32_t LL_CRC_ReadData32(CRC_TypeDef *CRCx)
|
|||
* @param CRCx CRC Instance
|
||||
* @retval Current CRC calculation result as stored in CRC_DR register (16 bits).
|
||||
*/
|
||||
__STATIC_INLINE uint16_t LL_CRC_ReadData16(CRC_TypeDef *CRCx)
|
||||
__STATIC_INLINE uint16_t LL_CRC_ReadData16(const CRC_TypeDef *CRCx)
|
||||
{
|
||||
return (uint16_t)READ_REG(CRCx->DR);
|
||||
}
|
||||
|
|
@ -392,7 +392,7 @@ __STATIC_INLINE uint16_t LL_CRC_ReadData16(CRC_TypeDef *CRCx)
|
|||
* @param CRCx CRC Instance
|
||||
* @retval Current CRC calculation result as stored in CRC_DR register (8 bits).
|
||||
*/
|
||||
__STATIC_INLINE uint8_t LL_CRC_ReadData8(CRC_TypeDef *CRCx)
|
||||
__STATIC_INLINE uint8_t LL_CRC_ReadData8(const CRC_TypeDef *CRCx)
|
||||
{
|
||||
return (uint8_t)READ_REG(CRCx->DR);
|
||||
}
|
||||
|
|
@ -404,7 +404,7 @@ __STATIC_INLINE uint8_t LL_CRC_ReadData8(CRC_TypeDef *CRCx)
|
|||
* @param CRCx CRC Instance
|
||||
* @retval Current CRC calculation result as stored in CRC_DR register (7 bits).
|
||||
*/
|
||||
__STATIC_INLINE uint8_t LL_CRC_ReadData7(CRC_TypeDef *CRCx)
|
||||
__STATIC_INLINE uint8_t LL_CRC_ReadData7(const CRC_TypeDef *CRCx)
|
||||
{
|
||||
return (uint8_t)(READ_REG(CRCx->DR) & 0x7FU);
|
||||
}
|
||||
|
|
|
|||
|
|
@ -2135,11 +2135,18 @@ __STATIC_INLINE uint32_t LL_I2C_GetSlaveAddr(const I2C_TypeDef *I2Cx)
|
|||
__STATIC_INLINE void LL_I2C_HandleTransfer(I2C_TypeDef *I2Cx, uint32_t SlaveAddr, uint32_t SlaveAddrSize,
|
||||
uint32_t TransferSize, uint32_t EndMode, uint32_t Request)
|
||||
{
|
||||
/* Declaration of tmp to prevent undefined behavior of volatile usage */
|
||||
uint32_t tmp = ((uint32_t)(((uint32_t)SlaveAddr & I2C_CR2_SADD) | \
|
||||
((uint32_t)SlaveAddrSize & I2C_CR2_ADD10) | \
|
||||
(((uint32_t)TransferSize << I2C_CR2_NBYTES_Pos) & I2C_CR2_NBYTES) | \
|
||||
(uint32_t)EndMode | (uint32_t)Request) & (~0x80000000U));
|
||||
|
||||
/* update CR2 register */
|
||||
MODIFY_REG(I2Cx->CR2, I2C_CR2_SADD | I2C_CR2_ADD10 |
|
||||
(I2C_CR2_RD_WRN & (uint32_t)(Request >> (31U - I2C_CR2_RD_WRN_Pos))) |
|
||||
I2C_CR2_START | I2C_CR2_STOP | I2C_CR2_RELOAD |
|
||||
I2C_CR2_NBYTES | I2C_CR2_AUTOEND | I2C_CR2_HEAD10R,
|
||||
SlaveAddr | SlaveAddrSize | (TransferSize << I2C_CR2_NBYTES_Pos) | EndMode | Request);
|
||||
tmp);
|
||||
}
|
||||
|
||||
/**
|
||||
|
|
|
|||
|
|
@ -208,7 +208,7 @@ __STATIC_INLINE void LL_IWDG_SetPrescaler(IWDG_TypeDef *IWDGx, uint32_t Prescale
|
|||
* @arg @ref LL_IWDG_PRESCALER_128
|
||||
* @arg @ref LL_IWDG_PRESCALER_256
|
||||
*/
|
||||
__STATIC_INLINE uint32_t LL_IWDG_GetPrescaler(IWDG_TypeDef *IWDGx)
|
||||
__STATIC_INLINE uint32_t LL_IWDG_GetPrescaler(const IWDG_TypeDef *IWDGx)
|
||||
{
|
||||
return (READ_REG(IWDGx->PR));
|
||||
}
|
||||
|
|
@ -231,7 +231,7 @@ __STATIC_INLINE void LL_IWDG_SetReloadCounter(IWDG_TypeDef *IWDGx, uint32_t Coun
|
|||
* @param IWDGx IWDG Instance
|
||||
* @retval Value between Min_Data=0 and Max_Data=0x0FFF
|
||||
*/
|
||||
__STATIC_INLINE uint32_t LL_IWDG_GetReloadCounter(IWDG_TypeDef *IWDGx)
|
||||
__STATIC_INLINE uint32_t LL_IWDG_GetReloadCounter(const IWDG_TypeDef *IWDGx)
|
||||
{
|
||||
return (READ_REG(IWDGx->RLR));
|
||||
}
|
||||
|
|
@ -254,7 +254,7 @@ __STATIC_INLINE void LL_IWDG_SetWindow(IWDG_TypeDef *IWDGx, uint32_t Window)
|
|||
* @param IWDGx IWDG Instance
|
||||
* @retval Value between Min_Data=0 and Max_Data=0x0FFF
|
||||
*/
|
||||
__STATIC_INLINE uint32_t LL_IWDG_GetWindow(IWDG_TypeDef *IWDGx)
|
||||
__STATIC_INLINE uint32_t LL_IWDG_GetWindow(const IWDG_TypeDef *IWDGx)
|
||||
{
|
||||
return (READ_REG(IWDGx->WINR));
|
||||
}
|
||||
|
|
@ -273,7 +273,7 @@ __STATIC_INLINE uint32_t LL_IWDG_GetWindow(IWDG_TypeDef *IWDGx)
|
|||
* @param IWDGx IWDG Instance
|
||||
* @retval State of bit (1 or 0).
|
||||
*/
|
||||
__STATIC_INLINE uint32_t LL_IWDG_IsActiveFlag_PVU(IWDG_TypeDef *IWDGx)
|
||||
__STATIC_INLINE uint32_t LL_IWDG_IsActiveFlag_PVU(const IWDG_TypeDef *IWDGx)
|
||||
{
|
||||
return ((READ_BIT(IWDGx->SR, IWDG_SR_PVU) == (IWDG_SR_PVU)) ? 1UL : 0UL);
|
||||
}
|
||||
|
|
@ -284,7 +284,7 @@ __STATIC_INLINE uint32_t LL_IWDG_IsActiveFlag_PVU(IWDG_TypeDef *IWDGx)
|
|||
* @param IWDGx IWDG Instance
|
||||
* @retval State of bit (1 or 0).
|
||||
*/
|
||||
__STATIC_INLINE uint32_t LL_IWDG_IsActiveFlag_RVU(IWDG_TypeDef *IWDGx)
|
||||
__STATIC_INLINE uint32_t LL_IWDG_IsActiveFlag_RVU(const IWDG_TypeDef *IWDGx)
|
||||
{
|
||||
return ((READ_BIT(IWDGx->SR, IWDG_SR_RVU) == (IWDG_SR_RVU)) ? 1UL : 0UL);
|
||||
}
|
||||
|
|
@ -295,7 +295,7 @@ __STATIC_INLINE uint32_t LL_IWDG_IsActiveFlag_RVU(IWDG_TypeDef *IWDGx)
|
|||
* @param IWDGx IWDG Instance
|
||||
* @retval State of bit (1 or 0).
|
||||
*/
|
||||
__STATIC_INLINE uint32_t LL_IWDG_IsActiveFlag_WVU(IWDG_TypeDef *IWDGx)
|
||||
__STATIC_INLINE uint32_t LL_IWDG_IsActiveFlag_WVU(const IWDG_TypeDef *IWDGx)
|
||||
{
|
||||
return ((READ_BIT(IWDGx->SR, IWDG_SR_WVU) == (IWDG_SR_WVU)) ? 1UL : 0UL);
|
||||
}
|
||||
|
|
@ -308,7 +308,7 @@ __STATIC_INLINE uint32_t LL_IWDG_IsActiveFlag_WVU(IWDG_TypeDef *IWDGx)
|
|||
* @param IWDGx IWDG Instance
|
||||
* @retval State of bits (1 or 0).
|
||||
*/
|
||||
__STATIC_INLINE uint32_t LL_IWDG_IsReady(IWDG_TypeDef *IWDGx)
|
||||
__STATIC_INLINE uint32_t LL_IWDG_IsReady(const IWDG_TypeDef *IWDGx)
|
||||
{
|
||||
return ((READ_BIT(IWDGx->SR, IWDG_SR_PVU | IWDG_SR_RVU | IWDG_SR_WVU) == 0U) ? 1UL : 0UL);
|
||||
}
|
||||
|
|
|
|||
|
|
@ -378,7 +378,7 @@ typedef struct
|
|||
* @{
|
||||
*/
|
||||
#define LL_RTC_TIMESTAMP_EDGE_RISING 0x00000000U /*!< RTC_TS input rising edge generates a time-stamp event */
|
||||
#define LL_RTC_TIMESTAMP_EDGE_FALLING RTC_CR_TSEDGE /*!< RTC_TS input falling edge generates a time-stamp even */
|
||||
#define LL_RTC_TIMESTAMP_EDGE_FALLING RTC_CR_TSEDGE /*!< RTC_TS input falling edge generates a time-stamp event */
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
|
|
@ -1037,7 +1037,7 @@ __STATIC_INLINE void LL_RTC_TIME_SetFormat(RTC_TypeDef *RTCx, uint32_t TimeForma
|
|||
|
||||
/**
|
||||
* @brief Get time format (AM or PM notation)
|
||||
* @note if shadow mode is disabled (BYPSHAD=0), need to check if RSF flag is set
|
||||
* @note if RTC shadow registers are not bypassed (BYPSHAD=0), need to check if RSF flag is set
|
||||
* before reading this bit
|
||||
* @note Read either RTC_SSR or RTC_TR locks the values in the higher-order calendar
|
||||
* shadow registers until RTC_DR is read (LL_RTC_ReadReg(RTC, DR)).
|
||||
|
|
@ -1071,7 +1071,7 @@ __STATIC_INLINE void LL_RTC_TIME_SetHour(RTC_TypeDef *RTCx, uint32_t Hours)
|
|||
|
||||
/**
|
||||
* @brief Get Hours in BCD format
|
||||
* @note if shadow mode is disabled (BYPSHAD=0), need to check if RSF flag is set
|
||||
* @note if RTC shadow registers are not bypassed (BYPSHAD=0), need to check if RSF flag is set
|
||||
* before reading this bit
|
||||
* @note Read either RTC_SSR or RTC_TR locks the values in the higher-order calendar
|
||||
* shadow registers until RTC_DR is read (LL_RTC_ReadReg(RTC, DR)).
|
||||
|
|
@ -1106,7 +1106,7 @@ __STATIC_INLINE void LL_RTC_TIME_SetMinute(RTC_TypeDef *RTCx, uint32_t Minutes)
|
|||
|
||||
/**
|
||||
* @brief Get Minutes in BCD format
|
||||
* @note if shadow mode is disabled (BYPSHAD=0), need to check if RSF flag is set
|
||||
* @note if RTC shadow registers are not bypassed (BYPSHAD=0), need to check if RSF flag is set
|
||||
* before reading this bit
|
||||
* @note Read either RTC_SSR or RTC_TR locks the values in the higher-order calendar
|
||||
* shadow registers until RTC_DR is read (LL_RTC_ReadReg(RTC, DR)).
|
||||
|
|
@ -1141,7 +1141,7 @@ __STATIC_INLINE void LL_RTC_TIME_SetSecond(RTC_TypeDef *RTCx, uint32_t Seconds)
|
|||
|
||||
/**
|
||||
* @brief Get Seconds in BCD format
|
||||
* @note if shadow mode is disabled (BYPSHAD=0), need to check if RSF flag is set
|
||||
* @note if RTC shadow registers are not bypassed (BYPSHAD=0), need to check if RSF flag is set
|
||||
* before reading this bit
|
||||
* @note Read either RTC_SSR or RTC_TR locks the values in the higher-order calendar
|
||||
* shadow registers until RTC_DR is read (LL_RTC_ReadReg(RTC, DR)).
|
||||
|
|
@ -1191,7 +1191,7 @@ __STATIC_INLINE void LL_RTC_TIME_Config(RTC_TypeDef *RTCx, uint32_t Format12_24,
|
|||
|
||||
/**
|
||||
* @brief Get time (hour, minute and second) in BCD format
|
||||
* @note if shadow mode is disabled (BYPSHAD=0), need to check if RSF flag is set
|
||||
* @note if RTC shadow registers are not bypassed (BYPSHAD=0), need to check if RSF flag is set
|
||||
* before reading this bit
|
||||
* @note Read either RTC_SSR or RTC_TR locks the values in the higher-order calendar
|
||||
* shadow registers until RTC_DR is read (LL_RTC_ReadReg(RTC, DR)).
|
||||
|
|
@ -1333,7 +1333,7 @@ __STATIC_INLINE void LL_RTC_DATE_SetYear(RTC_TypeDef *RTCx, uint32_t Year)
|
|||
|
||||
/**
|
||||
* @brief Get Year in BCD format
|
||||
* @note if shadow mode is disabled (BYPSHAD=0), need to check if RSF flag is set
|
||||
* @note if RTC shadow registers are not bypassed (BYPSHAD=0), need to check if RSF flag is set
|
||||
* before reading this bit
|
||||
* @note helper macro __LL_RTC_CONVERT_BCD2BIN is available to convert Year from BCD to Binary format
|
||||
* @rmtoll DR YT LL_RTC_DATE_GetYear\n
|
||||
|
|
@ -1367,7 +1367,7 @@ __STATIC_INLINE void LL_RTC_DATE_SetWeekDay(RTC_TypeDef *RTCx, uint32_t WeekDay)
|
|||
|
||||
/**
|
||||
* @brief Get Week day
|
||||
* @note if shadow mode is disabled (BYPSHAD=0), need to check if RSF flag is set
|
||||
* @note if RTC shadow registers are not bypassed (BYPSHAD=0), need to check if RSF flag is set
|
||||
* before reading this bit
|
||||
* @rmtoll DR WDU LL_RTC_DATE_GetWeekDay
|
||||
* @param RTCx RTC Instance
|
||||
|
|
@ -1414,7 +1414,7 @@ __STATIC_INLINE void LL_RTC_DATE_SetMonth(RTC_TypeDef *RTCx, uint32_t Month)
|
|||
|
||||
/**
|
||||
* @brief Get Month in BCD format
|
||||
* @note if shadow mode is disabled (BYPSHAD=0), need to check if RSF flag is set
|
||||
* @note if RTC shadow registers are not bypassed (BYPSHAD=0), need to check if RSF flag is set
|
||||
* before reading this bit
|
||||
* @note helper macro __LL_RTC_CONVERT_BCD2BIN is available to convert Month from BCD to Binary format
|
||||
* @rmtoll DR MT LL_RTC_DATE_GetMonth\n
|
||||
|
|
@ -1456,7 +1456,7 @@ __STATIC_INLINE void LL_RTC_DATE_SetDay(RTC_TypeDef *RTCx, uint32_t Day)
|
|||
|
||||
/**
|
||||
* @brief Get Day in BCD format
|
||||
* @note if shadow mode is disabled (BYPSHAD=0), need to check if RSF flag is set
|
||||
* @note if RTC shadow registers are not bypassed (BYPSHAD=0), need to check if RSF flag is set
|
||||
* before reading this bit
|
||||
* @note helper macro __LL_RTC_CONVERT_BCD2BIN is available to convert Day from BCD to Binary format
|
||||
* @rmtoll DR DT LL_RTC_DATE_GetDay\n
|
||||
|
|
@ -1518,7 +1518,7 @@ __STATIC_INLINE void LL_RTC_DATE_Config(RTC_TypeDef *RTCx, uint32_t WeekDay, uin
|
|||
|
||||
/**
|
||||
* @brief Get date (WeekDay, Day, Month and Year) in BCD format
|
||||
* @note if shadow mode is disabled (BYPSHAD=0), need to check if RSF flag is set
|
||||
* @note if RTC shadow registers are not bypassed (BYPSHAD=0), need to check if RSF flag is set
|
||||
* before reading this bit
|
||||
* @note helper macros __LL_RTC_GET_WEEKDAY, __LL_RTC_GET_YEAR, __LL_RTC_GET_MONTH,
|
||||
* and __LL_RTC_GET_DAY are available to get independently each parameter.
|
||||
|
|
|
|||
|
|
@ -822,11 +822,11 @@ typedef struct
|
|||
#define LL_TIM_ETR_FILTER_FDIV2_N8 (TIM_SMCR_ETF_2 | TIM_SMCR_ETF_0) /*!< fSAMPLING=fDTS/2, N=8 */
|
||||
#define LL_TIM_ETR_FILTER_FDIV4_N6 (TIM_SMCR_ETF_2 | TIM_SMCR_ETF_1) /*!< fSAMPLING=fDTS/4, N=6 */
|
||||
#define LL_TIM_ETR_FILTER_FDIV4_N8 (TIM_SMCR_ETF_2 | TIM_SMCR_ETF_1 | TIM_SMCR_ETF_0) /*!< fSAMPLING=fDTS/4, N=8 */
|
||||
#define LL_TIM_ETR_FILTER_FDIV8_N6 TIM_SMCR_ETF_3 /*!< fSAMPLING=fDTS/8, N=8 */
|
||||
#define LL_TIM_ETR_FILTER_FDIV8_N8 (TIM_SMCR_ETF_3 | TIM_SMCR_ETF_0) /*!< fSAMPLING=fDTS/16, N=5 */
|
||||
#define LL_TIM_ETR_FILTER_FDIV16_N5 (TIM_SMCR_ETF_3 | TIM_SMCR_ETF_1) /*!< fSAMPLING=fDTS/16, N=6 */
|
||||
#define LL_TIM_ETR_FILTER_FDIV16_N6 (TIM_SMCR_ETF_3 | TIM_SMCR_ETF_1 | TIM_SMCR_ETF_0) /*!< fSAMPLING=fDTS/16, N=8 */
|
||||
#define LL_TIM_ETR_FILTER_FDIV16_N8 (TIM_SMCR_ETF_3 | TIM_SMCR_ETF_2) /*!< fSAMPLING=fDTS/16, N=5 */
|
||||
#define LL_TIM_ETR_FILTER_FDIV8_N6 TIM_SMCR_ETF_3 /*!< fSAMPLING=fDTS/8, N=6 */
|
||||
#define LL_TIM_ETR_FILTER_FDIV8_N8 (TIM_SMCR_ETF_3 | TIM_SMCR_ETF_0) /*!< fSAMPLING=fDTS/16, N=8 */
|
||||
#define LL_TIM_ETR_FILTER_FDIV16_N5 (TIM_SMCR_ETF_3 | TIM_SMCR_ETF_1) /*!< fSAMPLING=fDTS/16, N=5 */
|
||||
#define LL_TIM_ETR_FILTER_FDIV16_N6 (TIM_SMCR_ETF_3 | TIM_SMCR_ETF_1 | TIM_SMCR_ETF_0) /*!< fSAMPLING=fDTS/16, N=6 */
|
||||
#define LL_TIM_ETR_FILTER_FDIV16_N8 (TIM_SMCR_ETF_3 | TIM_SMCR_ETF_2) /*!< fSAMPLING=fDTS/16, N=8 */
|
||||
#define LL_TIM_ETR_FILTER_FDIV32_N5 (TIM_SMCR_ETF_3 | TIM_SMCR_ETF_2 | TIM_SMCR_ETF_0) /*!< fSAMPLING=fDTS/32, N=5 */
|
||||
#define LL_TIM_ETR_FILTER_FDIV32_N6 (TIM_SMCR_ETF_3 | TIM_SMCR_ETF_2 | TIM_SMCR_ETF_1) /*!< fSAMPLING=fDTS/32, N=6 */
|
||||
#define LL_TIM_ETR_FILTER_FDIV32_N8 TIM_SMCR_ETF /*!< fSAMPLING=fDTS/32, N=8 */
|
||||
|
|
@ -1473,6 +1473,17 @@ __STATIC_INLINE void LL_TIM_CC_DisablePreload(TIM_TypeDef *TIMx)
|
|||
CLEAR_BIT(TIMx->CR2, TIM_CR2_CCPC);
|
||||
}
|
||||
|
||||
/**
|
||||
* @brief Indicates whether the capture/compare control bits (CCxE, CCxNE and OCxM) preload is enabled.
|
||||
* @rmtoll CR2 CCPC LL_TIM_CC_IsEnabledPreload
|
||||
* @param TIMx Timer instance
|
||||
* @retval State of bit (1 or 0).
|
||||
*/
|
||||
__STATIC_INLINE uint32_t LL_TIM_CC_IsEnabledPreload(const TIM_TypeDef *TIMx)
|
||||
{
|
||||
return ((READ_BIT(TIMx->CR2, TIM_CR2_CCPC) == (TIM_CR2_CCPC)) ? 1UL : 0UL);
|
||||
}
|
||||
|
||||
/**
|
||||
* @brief Set the updated source of the capture/compare control bits (CCxE, CCxNE and OCxM).
|
||||
* @note Macro IS_TIM_COMMUTATION_EVENT_INSTANCE(TIMx) can be used to check
|
||||
|
|
|
|||
|
|
@ -53,26 +53,26 @@ typedef enum
|
|||
*/
|
||||
typedef struct
|
||||
{
|
||||
uint32_t dev_endpoints; /*!< Device Endpoints number.
|
||||
uint8_t dev_endpoints; /*!< Device Endpoints number.
|
||||
This parameter depends on the used USB core.
|
||||
This parameter must be a number between Min_Data = 1 and Max_Data = 15 */
|
||||
|
||||
uint32_t speed; /*!< USB Core speed.
|
||||
uint8_t speed; /*!< USB Core speed.
|
||||
This parameter can be any value of @ref PCD_Speed/HCD_Speed
|
||||
(HCD_SPEED_xxx, HCD_SPEED_xxx) */
|
||||
|
||||
uint32_t ep0_mps; /*!< Set the Endpoint 0 Max Packet size. */
|
||||
uint8_t ep0_mps; /*!< Set the Endpoint 0 Max Packet size. */
|
||||
|
||||
uint32_t phy_itface; /*!< Select the used PHY interface.
|
||||
uint8_t phy_itface; /*!< Select the used PHY interface.
|
||||
This parameter can be any value of @ref PCD_PHY_Module/HCD_PHY_Module */
|
||||
|
||||
uint32_t Sof_enable; /*!< Enable or disable the output of the SOF signal. */
|
||||
uint8_t Sof_enable; /*!< Enable or disable the output of the SOF signal. */
|
||||
|
||||
uint32_t low_power_enable; /*!< Enable or disable the low Power Mode. */
|
||||
uint8_t low_power_enable; /*!< Enable or disable the low Power Mode. */
|
||||
|
||||
uint32_t lpm_enable; /*!< Enable or disable Link Power Management. */
|
||||
uint8_t lpm_enable; /*!< Enable or disable Link Power Management. */
|
||||
|
||||
uint32_t battery_charging_enable; /*!< Enable or disable Battery charging. */
|
||||
uint8_t battery_charging_enable; /*!< Enable or disable Battery charging. */
|
||||
} USB_CfgTypeDef;
|
||||
|
||||
typedef struct
|
||||
|
|
@ -192,6 +192,9 @@ HAL_StatusTypeDef USB_EnableGlobalInt(USB_TypeDef *USBx);
|
|||
HAL_StatusTypeDef USB_DisableGlobalInt(USB_TypeDef *USBx);
|
||||
HAL_StatusTypeDef USB_SetCurrentMode(USB_TypeDef *USBx, USB_ModeTypeDef mode);
|
||||
|
||||
HAL_StatusTypeDef USB_FlushRxFifo(USB_TypeDef const *USBx);
|
||||
HAL_StatusTypeDef USB_FlushTxFifo(USB_TypeDef const *USBx, uint32_t num);
|
||||
|
||||
#if defined (HAL_PCD_MODULE_ENABLED)
|
||||
HAL_StatusTypeDef USB_ActivateEndpoint(USB_TypeDef *USBx, USB_EPTypeDef *ep);
|
||||
HAL_StatusTypeDef USB_DeactivateEndpoint(USB_TypeDef *USBx, USB_EPTypeDef *ep);
|
||||
|
|
@ -205,14 +208,14 @@ HAL_StatusTypeDef USB_SetDevAddress(USB_TypeDef *USBx, uint8_t address);
|
|||
HAL_StatusTypeDef USB_DevConnect(USB_TypeDef *USBx);
|
||||
HAL_StatusTypeDef USB_DevDisconnect(USB_TypeDef *USBx);
|
||||
HAL_StatusTypeDef USB_StopDevice(USB_TypeDef *USBx);
|
||||
uint32_t USB_ReadInterrupts(USB_TypeDef *USBx);
|
||||
uint32_t USB_ReadInterrupts(USB_TypeDef const *USBx);
|
||||
HAL_StatusTypeDef USB_ActivateRemoteWakeup(USB_TypeDef *USBx);
|
||||
HAL_StatusTypeDef USB_DeActivateRemoteWakeup(USB_TypeDef *USBx);
|
||||
|
||||
void USB_WritePMA(USB_TypeDef *USBx, uint8_t *pbUsrBuf,
|
||||
void USB_WritePMA(USB_TypeDef const *USBx, uint8_t *pbUsrBuf,
|
||||
uint16_t wPMABufAddr, uint16_t wNBytes);
|
||||
|
||||
void USB_ReadPMA(USB_TypeDef *USBx, uint8_t *pbUsrBuf,
|
||||
void USB_ReadPMA(USB_TypeDef const *USBx, uint8_t *pbUsrBuf,
|
||||
uint16_t wPMABufAddr, uint16_t wNBytes);
|
||||
|
||||
/**
|
||||
|
|
|
|||
|
|
@ -213,7 +213,7 @@ __STATIC_INLINE uint32_t LL_GetFlashSize(void)
|
|||
* @param HCLKFrequency HCLK frequency in Hz (can be calculated thanks to RCC helper macro)
|
||||
* @note When a RTOS is used, it is recommended to avoid changing the SysTick
|
||||
* configuration by calling this function, for a delay use rather osDelay RTOS service.
|
||||
* @param Ticks Number of ticks
|
||||
* @param Ticks Frequency of Ticks (Hz)
|
||||
* @retval None
|
||||
*/
|
||||
__STATIC_INLINE void LL_InitTick(uint32_t HCLKFrequency, uint32_t Ticks)
|
||||
|
|
|
|||
|
|
@ -131,7 +131,7 @@ __STATIC_INLINE void LL_WWDG_Enable(WWDG_TypeDef *WWDGx)
|
|||
* @param WWDGx WWDG Instance
|
||||
* @retval State of bit (1 or 0).
|
||||
*/
|
||||
__STATIC_INLINE uint32_t LL_WWDG_IsEnabled(WWDG_TypeDef *WWDGx)
|
||||
__STATIC_INLINE uint32_t LL_WWDG_IsEnabled(const WWDG_TypeDef *WWDGx)
|
||||
{
|
||||
return ((READ_BIT(WWDGx->CR, WWDG_CR_WDGA) == (WWDG_CR_WDGA)) ? 1UL : 0UL);
|
||||
}
|
||||
|
|
@ -158,7 +158,7 @@ __STATIC_INLINE void LL_WWDG_SetCounter(WWDG_TypeDef *WWDGx, uint32_t Counter)
|
|||
* @param WWDGx WWDG Instance
|
||||
* @retval 7 bit Watchdog Counter value
|
||||
*/
|
||||
__STATIC_INLINE uint32_t LL_WWDG_GetCounter(WWDG_TypeDef *WWDGx)
|
||||
__STATIC_INLINE uint32_t LL_WWDG_GetCounter(const WWDG_TypeDef *WWDGx)
|
||||
{
|
||||
return (READ_BIT(WWDGx->CR, WWDG_CR_T));
|
||||
}
|
||||
|
|
@ -191,7 +191,7 @@ __STATIC_INLINE void LL_WWDG_SetPrescaler(WWDG_TypeDef *WWDGx, uint32_t Prescale
|
|||
* @arg @ref LL_WWDG_PRESCALER_4
|
||||
* @arg @ref LL_WWDG_PRESCALER_8
|
||||
*/
|
||||
__STATIC_INLINE uint32_t LL_WWDG_GetPrescaler(WWDG_TypeDef *WWDGx)
|
||||
__STATIC_INLINE uint32_t LL_WWDG_GetPrescaler(const WWDG_TypeDef *WWDGx)
|
||||
{
|
||||
return (READ_BIT(WWDGx->CFR, WWDG_CFR_WDGTB));
|
||||
}
|
||||
|
|
@ -223,7 +223,7 @@ __STATIC_INLINE void LL_WWDG_SetWindow(WWDG_TypeDef *WWDGx, uint32_t Window)
|
|||
* @param WWDGx WWDG Instance
|
||||
* @retval 7 bit Watchdog Window value
|
||||
*/
|
||||
__STATIC_INLINE uint32_t LL_WWDG_GetWindow(WWDG_TypeDef *WWDGx)
|
||||
__STATIC_INLINE uint32_t LL_WWDG_GetWindow(const WWDG_TypeDef *WWDGx)
|
||||
{
|
||||
return (READ_BIT(WWDGx->CFR, WWDG_CFR_W));
|
||||
}
|
||||
|
|
@ -244,7 +244,7 @@ __STATIC_INLINE uint32_t LL_WWDG_GetWindow(WWDG_TypeDef *WWDGx)
|
|||
* @param WWDGx WWDG Instance
|
||||
* @retval State of bit (1 or 0).
|
||||
*/
|
||||
__STATIC_INLINE uint32_t LL_WWDG_IsActiveFlag_EWKUP(WWDG_TypeDef *WWDGx)
|
||||
__STATIC_INLINE uint32_t LL_WWDG_IsActiveFlag_EWKUP(const WWDG_TypeDef *WWDGx)
|
||||
{
|
||||
return ((READ_BIT(WWDGx->SR, WWDG_SR_EWIF) == (WWDG_SR_EWIF)) ? 1UL : 0UL);
|
||||
}
|
||||
|
|
@ -286,7 +286,7 @@ __STATIC_INLINE void LL_WWDG_EnableIT_EWKUP(WWDG_TypeDef *WWDGx)
|
|||
* @param WWDGx WWDG Instance
|
||||
* @retval State of bit (1 or 0).
|
||||
*/
|
||||
__STATIC_INLINE uint32_t LL_WWDG_IsEnabledIT_EWKUP(WWDG_TypeDef *WWDGx)
|
||||
__STATIC_INLINE uint32_t LL_WWDG_IsEnabledIT_EWKUP(const WWDG_TypeDef *WWDGx)
|
||||
{
|
||||
return ((READ_BIT(WWDGx->CFR, WWDG_CFR_EWI) == (WWDG_CFR_EWI)) ? 1UL : 0UL);
|
||||
}
|
||||
|
|
|
|||
|
|
@ -56,7 +56,7 @@
|
|||
*/
|
||||
#define __STM32F0xx_HAL_VERSION_MAIN (0x01U) /*!< [31:24] main version */
|
||||
#define __STM32F0xx_HAL_VERSION_SUB1 (0x07U) /*!< [23:16] sub1 version */
|
||||
#define __STM32F0xx_HAL_VERSION_SUB2 (0x07U) /*!< [15:8] sub2 version */
|
||||
#define __STM32F0xx_HAL_VERSION_SUB2 (0x08U) /*!< [15:8] sub2 version */
|
||||
#define __STM32F0xx_HAL_VERSION_RC (0x00U) /*!< [7:0] release candidate */
|
||||
#define __STM32F0xx_HAL_VERSION ((__STM32F0xx_HAL_VERSION_MAIN << 24U)\
|
||||
|(__STM32F0xx_HAL_VERSION_SUB1 << 16U)\
|
||||
|
|
|
|||
|
|
@ -33,7 +33,7 @@
|
|||
(++) Enable the CAN interface clock using __HAL_RCC_CANx_CLK_ENABLE()
|
||||
(++) Configure CAN pins
|
||||
(+++) Enable the clock for the CAN GPIOs
|
||||
(+++) Configure CAN pins as alternate function open-drain
|
||||
(+++) Configure CAN pins as alternate function
|
||||
(++) In case of using interrupts (e.g. HAL_CAN_ActivateNotification())
|
||||
(+++) Configure the CAN interrupt priority using
|
||||
HAL_NVIC_SetPriority()
|
||||
|
|
@ -235,6 +235,7 @@
|
|||
* @{
|
||||
*/
|
||||
#define CAN_TIMEOUT_VALUE 10U
|
||||
#define CAN_WAKEUP_TIMEOUT_COUNTER 1000000U
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
|
|
@ -328,7 +329,7 @@ HAL_StatusTypeDef HAL_CAN_Init(CAN_HandleTypeDef *hcan)
|
|||
/* Init the low level hardware: CLOCK, NVIC */
|
||||
HAL_CAN_MspInit(hcan);
|
||||
}
|
||||
#endif /* (USE_HAL_CAN_REGISTER_CALLBACKS) */
|
||||
#endif /* USE_HAL_CAN_REGISTER_CALLBACKS */
|
||||
|
||||
/* Request initialisation */
|
||||
SET_BIT(hcan->Instance->MCR, CAN_MCR_INRQ);
|
||||
|
|
@ -482,7 +483,7 @@ HAL_StatusTypeDef HAL_CAN_DeInit(CAN_HandleTypeDef *hcan)
|
|||
#else
|
||||
/* DeInit the low level hardware: CLOCK, NVIC */
|
||||
HAL_CAN_MspDeInit(hcan);
|
||||
#endif /* (USE_HAL_CAN_REGISTER_CALLBACKS) */
|
||||
#endif /* USE_HAL_CAN_REGISTER_CALLBACKS */
|
||||
|
||||
/* Reset the CAN peripheral */
|
||||
SET_BIT(hcan->Instance->MCR, CAN_MCR_RESET);
|
||||
|
|
@ -1127,7 +1128,6 @@ HAL_StatusTypeDef HAL_CAN_RequestSleep(CAN_HandleTypeDef *hcan)
|
|||
HAL_StatusTypeDef HAL_CAN_WakeUp(CAN_HandleTypeDef *hcan)
|
||||
{
|
||||
__IO uint32_t count = 0;
|
||||
uint32_t timeout = 1000000U;
|
||||
HAL_CAN_StateTypeDef state = hcan->State;
|
||||
|
||||
if ((state == HAL_CAN_STATE_READY) ||
|
||||
|
|
@ -1143,15 +1143,14 @@ HAL_StatusTypeDef HAL_CAN_WakeUp(CAN_HandleTypeDef *hcan)
|
|||
count++;
|
||||
|
||||
/* Check if timeout is reached */
|
||||
if (count > timeout)
|
||||
if (count > CAN_WAKEUP_TIMEOUT_COUNTER)
|
||||
{
|
||||
/* Update error code */
|
||||
hcan->ErrorCode |= HAL_CAN_ERROR_TIMEOUT;
|
||||
|
||||
return HAL_ERROR;
|
||||
}
|
||||
}
|
||||
while ((hcan->Instance->MSR & CAN_MSR_SLAK) != 0U);
|
||||
} while ((hcan->Instance->MSR & CAN_MSR_SLAK) != 0U);
|
||||
|
||||
/* Return function status */
|
||||
return HAL_OK;
|
||||
|
|
|
|||
|
|
@ -137,6 +137,9 @@ void HAL_NVIC_SetPriority(IRQn_Type IRQn, uint32_t PreemptPriority, uint32_t Sub
|
|||
/* Check the parameters */
|
||||
assert_param(IS_NVIC_PREEMPTION_PRIORITY(PreemptPriority));
|
||||
NVIC_SetPriority(IRQn,PreemptPriority);
|
||||
|
||||
/* Prevent unused argument(s) compilation warning */
|
||||
UNUSED(SubPriority);
|
||||
}
|
||||
|
||||
/**
|
||||
|
|
|
|||
|
|
@ -405,7 +405,7 @@ uint32_t HAL_CRC_Calculate(CRC_HandleTypeDef *hcrc, uint32_t pBuffer[], uint32_t
|
|||
* @param hcrc CRC handle
|
||||
* @retval HAL state
|
||||
*/
|
||||
HAL_CRC_StateTypeDef HAL_CRC_GetState(CRC_HandleTypeDef *hcrc)
|
||||
HAL_CRC_StateTypeDef HAL_CRC_GetState(const CRC_HandleTypeDef *hcrc)
|
||||
{
|
||||
/* Return CRC handle state */
|
||||
return hcrc->State;
|
||||
|
|
|
|||
|
|
@ -212,8 +212,6 @@ HAL_StatusTypeDef HAL_CRCEx_Output_Data_Reverse(CRC_HandleTypeDef *hcrc, uint32_
|
|||
}
|
||||
|
||||
|
||||
|
||||
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
|
|
|
|||
Some files were not shown because too many files have changed in this diff Show More
Loading…
Reference in New Issue