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"STM32F042x6", + "USE_HAL_DRIVER" + ], + "compilerPath": "/home/chiangni/.config/VSCodium/User/globalStorage/bmd.stm32-for-vscode/@xpack-dev-tools/arm-none-eabi-gcc/13.2.1-1.1.1/.content/bin/arm-none-eabi-gcc" + } + ], + "version": 4 +} \ No newline at end of file diff --git a/Software/.vscode/launch.json b/Software/.vscode/launch.json new file mode 100644 index 0000000..ebfdbaf --- /dev/null +++ b/Software/.vscode/launch.json @@ -0,0 +1,32 @@ +{ + "configurations": [ + { + "showDevDebugOutput": "parsed", + "cwd": "${workspaceRoot}", + "executable": "./build/SLS.elf", + "name": "Debug STM32", + "request": "launch", + "type": "cortex-debug", + "servertype": "openocd", + "preLaunchTask": "Build STM", + "device": "stm32f042x6.s", + "configFiles": [ + "openocd.cfg" + ] + }, + { + "showDevDebugOutput": "parsed", + "cwd": "${workspaceRoot}", + "executable": "./build/SLS.elf", + "name": "Attach STM32", + "request": "attach", + "type": "cortex-debug", + "servertype": "openocd", + "preLaunchTask": "Build STM", + "device": "stm32f042x6.s", + "configFiles": [ + "openocd.cfg" + ] + } + ] +} \ No newline at end of file diff --git a/Software/.vscode/settings.json b/Software/.vscode/settings.json new file mode 100644 index 0000000..faad003 --- /dev/null +++ b/Software/.vscode/settings.json @@ -0,0 +1,4 @@ +{ + "cortex-debug.armToolchainPath": "/home/chiangni/.config/VSCodium/User/globalStorage/bmd.stm32-for-vscode/@xpack-dev-tools/arm-none-eabi-gcc/13.2.1-1.1.1/.content/bin", + "cortex-debug.openocdPath": "/home/chiangni/Documents/STM32/OpenOCD/xpacks/@xpack-dev-tools/openocd/.content/bin/openocd" +} \ No newline at end of file diff --git a/Software/.vscode/tasks.json b/Software/.vscode/tasks.json new file mode 100644 index 0000000..39d8d34 --- /dev/null +++ b/Software/.vscode/tasks.json @@ -0,0 +1,50 @@ +{ + "version": "2.0.0", + "tasks": [ + { + "label": "Build STM", + "type": "process", + "command": "${command:stm32-for-vscode.build}", + "options": { + "cwd": "${workspaceRoot}" + }, + "group": { + "kind": "build", + "isDefault": true + }, + "problemMatcher": [ + "$gcc" + ] + }, + { + "label": "Build Clean STM", + "type": "process", + "command": "${command:stm32-for-vscode.cleanBuild}", + "options": { + "cwd": "${workspaceRoot}" + }, + "group": { + "kind": "build", + "isDefault": true + }, + "problemMatcher": [ + "$gcc" + ] + }, + { + "label": "Flash STM", + "type": "process", + "command": "${command:stm32-for-vscode.flash}", + "options": { + "cwd": "${workspaceRoot}" + }, + "group": { + "kind": "build", + "isDefault": true + }, + "problemMatcher": [ + "$gcc" + ] + } + ] +} \ No newline at end of file diff --git a/Software/Core/Inc/stm32f0xx_hal_conf.h b/Software/Core/Inc/stm32f0xx_hal_conf.h index 0babd97..9db9553 100644 --- a/Software/Core/Inc/stm32f0xx_hal_conf.h +++ b/Software/Core/Inc/stm32f0xx_hal_conf.h @@ -73,7 +73,7 @@ * (when HSE is used as system clock source, directly or through the PLL). */ #if !defined (HSE_VALUE) - #define HSE_VALUE ((uint32_t)8000000) /*!< Value of the External oscillator in Hz */ + #define HSE_VALUE ((uint32_t)12000000) /*!< Value of the External oscillator in Hz */ #endif /* HSE_VALUE */ /** diff --git a/Software/Core/Inc/stm32f0xx_it.h b/Software/Core/Inc/stm32f0xx_it.h index 29d1034..317e5aa 100644 --- a/Software/Core/Inc/stm32f0xx_it.h +++ b/Software/Core/Inc/stm32f0xx_it.h @@ -51,6 +51,7 @@ void HardFault_Handler(void); void SVC_Handler(void); void PendSV_Handler(void); void SysTick_Handler(void); +void ADC1_IRQHandler(void); /* USER CODE BEGIN EFP */ /* USER CODE END EFP */ diff --git a/Software/Core/Lib/can-halal.c b/Software/Core/Lib/can-halal.c new file mode 100644 index 0000000..7c85c0c --- /dev/null +++ b/Software/Core/Lib/can-halal.c @@ -0,0 +1,273 @@ +#include "can-halal.h" + +#include + +#if defined(FTCAN_IS_BXCAN) +static CAN_HandleTypeDef *hcan; + +HAL_StatusTypeDef ftcan_init(CAN_HandleTypeDef *handle) { + hcan = handle; + + HAL_StatusTypeDef status = + HAL_CAN_ActivateNotification(hcan, CAN_IT_RX_FIFO0_MSG_PENDING); + if (status != HAL_OK) { + return status; + } + + return HAL_CAN_Start(hcan); +} + +HAL_StatusTypeDef ftcan_transmit(uint16_t id, const uint8_t *data, + size_t datalen) { + static CAN_TxHeaderTypeDef header; + header.StdId = id; + header.IDE = CAN_ID_STD; + header.RTR = CAN_RTR_DATA; + header.DLC = datalen; + uint32_t mailbox; + return HAL_CAN_AddTxMessage(hcan, &header, data, &mailbox); +} + +HAL_StatusTypeDef ftcan_add_filter(uint16_t id, uint16_t mask) { + static uint32_t next_filter_no = 0; + static CAN_FilterTypeDef filter; + if (next_filter_no % 2 == 0) { + filter.FilterIdHigh = id << 5; + filter.FilterMaskIdHigh = mask << 5; + filter.FilterIdLow = id << 5; + filter.FilterMaskIdLow = mask << 5; + } else { + // Leave high filter untouched from the last configuration + filter.FilterIdLow = id << 5; + filter.FilterMaskIdLow = mask << 5; + } + filter.FilterFIFOAssignment = CAN_FILTER_FIFO0; + filter.FilterBank = next_filter_no / 2; + if (filter.FilterBank > FTCAN_NUM_FILTERS + 1) { + return HAL_ERROR; + } + filter.FilterMode = CAN_FILTERMODE_IDMASK; + filter.FilterScale = CAN_FILTERSCALE_16BIT; + filter.FilterActivation = CAN_FILTER_ENABLE; + + // Disable slave filters + // TODO: Some STM32 have multiple CAN peripherals, and one uses the slave + // filter bank + filter.SlaveStartFilterBank = FTCAN_NUM_FILTERS; + + HAL_StatusTypeDef status = HAL_CAN_ConfigFilter(hcan, &filter); + if (status == HAL_OK) { + next_filter_no++; + } + return status; +} + +void HAL_CAN_RxFifo0MsgPendingCallback(CAN_HandleTypeDef *handle) { + if (handle != hcan) { + return; + } + CAN_RxHeaderTypeDef header; + uint8_t data[8]; + if (HAL_CAN_GetRxMessage(hcan, CAN_RX_FIFO0, &header, data) != HAL_OK) { + return; + } + + if (header.IDE != CAN_ID_STD) { + return; + } + + ftcan_msg_received_cb(header.StdId, header.DLC, data); +} +#elif defined(FTCAN_IS_FDCAN) +static FDCAN_HandleTypeDef *hcan; + +HAL_StatusTypeDef ftcan_init(FDCAN_HandleTypeDef *handle) { + hcan = handle; + + HAL_StatusTypeDef status = + HAL_FDCAN_ActivateNotification(hcan, FDCAN_IT_RX_FIFO0_NEW_MESSAGE, 0); + if (status != HAL_OK) { + return status; + } + // Reject non-matching messages + status = + HAL_FDCAN_ConfigGlobalFilter(hcan, FDCAN_REJECT, FDCAN_REJECT, + FDCAN_REJECT_REMOTE, FDCAN_REJECT_REMOTE); + if (status != HAL_OK) { + return status; + } + + return HAL_FDCAN_Start(hcan); +} + +HAL_StatusTypeDef ftcan_transmit(uint16_t id, const uint8_t *data, + size_t datalen) { + static FDCAN_TxHeaderTypeDef header; + header.Identifier = id; + header.IdType = FDCAN_STANDARD_ID; + header.TxFrameType = FDCAN_DATA_FRAME; + switch (datalen) { + case 0: + header.DataLength = FDCAN_DLC_BYTES_0; + break; + case 1: + header.DataLength = FDCAN_DLC_BYTES_1; + break; + case 2: + header.DataLength = FDCAN_DLC_BYTES_2; + break; + case 3: + header.DataLength = FDCAN_DLC_BYTES_3; + break; + case 4: + header.DataLength = FDCAN_DLC_BYTES_4; + break; + case 5: + header.DataLength = FDCAN_DLC_BYTES_5; + break; + case 6: + header.DataLength = FDCAN_DLC_BYTES_6; + break; + case 7: + header.DataLength = FDCAN_DLC_BYTES_7; + break; + case 8: + default: + header.DataLength = FDCAN_DLC_BYTES_8; + break; + } + header.ErrorStateIndicator = FDCAN_ESI_PASSIVE; + header.BitRateSwitch = FDCAN_BRS_OFF; + header.FDFormat = FDCAN_CLASSIC_CAN; + header.TxEventFifoControl = FDCAN_NO_TX_EVENTS; + + // HAL_FDCAN_AddMessageToTxFifoQ doesn't modify the data, but it's not marked + // as const for some reason. + uint8_t *data_nonconst = (uint8_t *)data; + return HAL_FDCAN_AddMessageToTxFifoQ(hcan, &header, data_nonconst); +} + +HAL_StatusTypeDef ftcan_add_filter(uint16_t id, uint16_t mask) { + static uint32_t next_filter_no = 0; + static FDCAN_FilterTypeDef filter; + filter.IdType = FDCAN_STANDARD_ID; + filter.FilterIndex = next_filter_no; + if (filter.FilterIndex > FTCAN_NUM_FILTERS + 1) { + return HAL_ERROR; + } + filter.FilterType = FDCAN_FILTER_MASK; + filter.FilterConfig = FDCAN_FILTER_TO_RXFIFO0; + filter.FilterID1 = id; + filter.FilterID2 = mask; + + HAL_StatusTypeDef status = HAL_FDCAN_ConfigFilter(hcan, &filter); + if (status == HAL_OK) { + next_filter_no++; + } + return status; +} + +void HAL_FDCAN_RxFifo0Callback(FDCAN_HandleTypeDef *handle, + uint32_t RxFifo0ITs) { + if (handle != hcan || (RxFifo0ITs & FDCAN_IT_RX_FIFO0_NEW_MESSAGE) == RESET) { + return; + } + + static FDCAN_RxHeaderTypeDef header; + static uint8_t data[8]; + if (HAL_FDCAN_GetRxMessage(hcan, FDCAN_RX_FIFO0, &header, data) != HAL_OK) { + return; + } + + if (header.FDFormat != FDCAN_CLASSIC_CAN || + header.RxFrameType != FDCAN_DATA_FRAME || + header.IdType != FDCAN_STANDARD_ID) { + return; + } + + size_t datalen; + switch (header.DataLength) { + case FDCAN_DLC_BYTES_0: + datalen = 0; + break; + case FDCAN_DLC_BYTES_1: + datalen = 1; + break; + case FDCAN_DLC_BYTES_2: + datalen = 2; + break; + case FDCAN_DLC_BYTES_3: + datalen = 3; + break; + case FDCAN_DLC_BYTES_4: + datalen = 4; + break; + case FDCAN_DLC_BYTES_5: + datalen = 5; + break; + case FDCAN_DLC_BYTES_6: + datalen = 6; + break; + case FDCAN_DLC_BYTES_7: + datalen = 7; + break; + case FDCAN_DLC_BYTES_8: + datalen = 8; + break; + default: + return; + } + + ftcan_msg_received_cb(header.Identifier, datalen, data); +} +#endif + +__weak void ftcan_msg_received_cb(uint16_t id, size_t datalen, + const uint8_t *data) {} + +uint64_t ftcan_unmarshal_unsigned(const uint8_t **data_ptr, size_t num_bytes) { + if (num_bytes > 8) { + num_bytes = 8; + } + + const uint8_t *data = *data_ptr; + uint64_t result = 0; + for (size_t i = 0; i < num_bytes; i++) { + result <<= 8; + result |= data[i]; + } + *data_ptr += num_bytes; + return result; +} + +int64_t ftcan_unmarshal_signed(const uint8_t **data_ptr, size_t num_bytes) { + if (num_bytes > 8) { + num_bytes = 8; + } + + uint64_t result_unsigned = ftcan_unmarshal_unsigned(data_ptr, num_bytes); + // Sign extend by shifting left, then copying to a signed int and shifting + // back to the right + size_t diff_to_64 = 64 - num_bytes * 8; + result_unsigned <<= diff_to_64; + int64_t result; + memcpy(&result, &result_unsigned, 8); + return result >> diff_to_64; +} + +uint8_t *ftcan_marshal_unsigned(uint8_t *data, uint64_t val, size_t num_bytes) { + if (num_bytes > 8) { + num_bytes = 8; + } + + for (int i = num_bytes - 1; i >= 0; i--) { + data[i] = val & 0xFF; + val >>= 8; + } + + return data + num_bytes; +} + +uint8_t *ftcan_marshal_signed(uint8_t *data, int64_t val, size_t num_bytes) { + return ftcan_marshal_unsigned(data, val, num_bytes); +} diff --git a/Software/Core/Lib/can-halal.h b/Software/Core/Lib/can-halal.h new file mode 100644 index 0000000..57c155f --- /dev/null +++ b/Software/Core/Lib/can-halal.h @@ -0,0 +1,61 @@ +#ifndef CAN_HALAL_H +#define CAN_HALAL_H + +// Define family macros if none are defined and we recognize a chip macro +#if !defined(STM32F3) && !defined(STM32H7) +#if defined(STM32F302x6) || defined(STM32F302x8) || defined(STM32F302xB) || \ + defined(STM32F302xC) +#define STM32F3 +#endif +#if defined(STM32H7A3xx) +#define STM32H7 +#endif +#endif + +#if defined(STM32F3) +#include "stm32f3xx_hal.h" +#define FTCAN_IS_BXCAN +#define FTCAN_NUM_FILTERS 13 +#elif defined(STM32H7) +#include "stm32h7xx_hal.h" +#define FTCAN_IS_FDCAN +#else +#error "Couldn't detect STM family" +#endif + +#if defined(FTCAN_IS_BXCAN) +HAL_StatusTypeDef ftcan_init(CAN_HandleTypeDef *handle); +#elif defined(FTCAN_IS_FDCAN) +HAL_StatusTypeDef ftcan_init(FDCAN_HandleTypeDef *handle); +#else +#error "Unknown CAN peripheral" +#endif + +HAL_StatusTypeDef ftcan_transmit(uint16_t id, const uint8_t *data, + size_t datalen); + +HAL_StatusTypeDef ftcan_add_filter(uint16_t id, uint16_t mask); + +/** + * Define this function to be notified of incoming CAN messages + */ +void ftcan_msg_received_cb(uint16_t id, size_t datalen, const uint8_t *data); + +/** + * Read num_bytes bytes from a message (unmarshalled network byte order). The + * msg pointer is advanced by the corresponding number of bytes. + * + * Both methods return a 64-bit integer, but you can safely cast it to a smaller + * integer type. + */ +uint64_t ftcan_unmarshal_unsigned(const uint8_t **data, size_t num_bytes); +int64_t ftcan_unmarshal_signed(const uint8_t **data, size_t num_bytes); + +/** + * Write num_bytes to a message (marshalled in network byte order). The pointer + * is advanced by the corresponding number of bytes and returned. + */ +uint8_t *ftcan_marshal_unsigned(uint8_t *data, uint64_t val, size_t num_bytes); +uint8_t *ftcan_marshal_signed(uint8_t *data, int64_t val, size_t num_bytes); + +#endif // CAN_HALAL_H diff --git a/Software/Core/Src/adc.c b/Software/Core/Src/adc.c new file mode 100644 index 0000000..e69de29 diff --git a/Software/Core/Src/main.c b/Software/Core/Src/main.c index 86634ac..0095a8f 100644 --- a/Software/Core/Src/main.c +++ b/Software/Core/Src/main.c @@ -71,6 +71,7 @@ static void MX_TIM2_Init(void); */ int main(void) { + /* USER CODE BEGIN 1 */ /* USER CODE END 1 */ @@ -107,6 +108,7 @@ int main(void) /* USER CODE END WHILE */ /* USER CODE BEGIN 3 */ + ADCMeasureLooooop(); } /* USER CODE END 3 */ } @@ -123,12 +125,14 @@ void SystemClock_Config(void) /** Initializes the RCC Oscillators according to the specified parameters * in the RCC_OscInitTypeDef structure. */ - RCC_OscInitStruct.OscillatorType = RCC_OSCILLATORTYPE_HSI|RCC_OSCILLATORTYPE_HSI14; - RCC_OscInitStruct.HSIState = RCC_HSI_ON; + RCC_OscInitStruct.OscillatorType = RCC_OSCILLATORTYPE_HSI14|RCC_OSCILLATORTYPE_HSE; + RCC_OscInitStruct.HSEState = RCC_HSE_ON; RCC_OscInitStruct.HSI14State = RCC_HSI14_ON; - RCC_OscInitStruct.HSICalibrationValue = RCC_HSICALIBRATION_DEFAULT; RCC_OscInitStruct.HSI14CalibrationValue = 16; - RCC_OscInitStruct.PLL.PLLState = RCC_PLL_NONE; + RCC_OscInitStruct.PLL.PLLState = RCC_PLL_ON; + RCC_OscInitStruct.PLL.PLLSource = RCC_PLLSOURCE_HSE; + RCC_OscInitStruct.PLL.PLLMUL = RCC_PLL_MUL4; + RCC_OscInitStruct.PLL.PREDIV = RCC_PREDIV_DIV3; if (HAL_RCC_OscConfig(&RCC_OscInitStruct) != HAL_OK) { Error_Handler(); @@ -138,7 +142,7 @@ void SystemClock_Config(void) */ RCC_ClkInitStruct.ClockType = RCC_CLOCKTYPE_HCLK|RCC_CLOCKTYPE_SYSCLK |RCC_CLOCKTYPE_PCLK1; - RCC_ClkInitStruct.SYSCLKSource = RCC_SYSCLKSOURCE_HSI; + RCC_ClkInitStruct.SYSCLKSource = RCC_SYSCLKSOURCE_PLLCLK; RCC_ClkInitStruct.AHBCLKDivider = RCC_SYSCLK_DIV1; RCC_ClkInitStruct.APB1CLKDivider = RCC_HCLK_DIV1; @@ -226,15 +230,15 @@ static void MX_CAN_Init(void) /* USER CODE END CAN_Init 1 */ hcan.Instance = CAN; - hcan.Init.Prescaler = 16; + hcan.Init.Prescaler = 2; hcan.Init.Mode = CAN_MODE_NORMAL; hcan.Init.SyncJumpWidth = CAN_SJW_1TQ; - hcan.Init.TimeSeg1 = CAN_BS1_1TQ; - hcan.Init.TimeSeg2 = CAN_BS2_1TQ; + hcan.Init.TimeSeg1 = CAN_BS1_13TQ; + hcan.Init.TimeSeg2 = CAN_BS2_2TQ; hcan.Init.TimeTriggeredMode = DISABLE; - hcan.Init.AutoBusOff = DISABLE; + hcan.Init.AutoBusOff = ENABLE; hcan.Init.AutoWakeUp = DISABLE; - hcan.Init.AutoRetransmission = DISABLE; + hcan.Init.AutoRetransmission = ENABLE; hcan.Init.ReceiveFifoLocked = DISABLE; hcan.Init.TransmitFifoPriority = DISABLE; if (HAL_CAN_Init(&hcan) != HAL_OK) diff --git a/Software/Core/Src/stm32f0xx_hal_msp.c b/Software/Core/Src/stm32f0xx_hal_msp.c index f04d789..f0d0afe 100644 --- a/Software/Core/Src/stm32f0xx_hal_msp.c +++ b/Software/Core/Src/stm32f0xx_hal_msp.c @@ -20,7 +20,6 @@ /* Includes ------------------------------------------------------------------*/ #include "main.h" - /* USER CODE BEGIN Includes */ /* USER CODE END Includes */ @@ -65,6 +64,7 @@ void HAL_TIM_MspPostInit(TIM_HandleTypeDef *htim); */ void HAL_MspInit(void) { + /* USER CODE BEGIN MspInit 0 */ /* USER CODE END MspInit 0 */ @@ -106,6 +106,9 @@ void HAL_ADC_MspInit(ADC_HandleTypeDef* hadc) GPIO_InitStruct.Pull = GPIO_NOPULL; HAL_GPIO_Init(GPIOA, &GPIO_InitStruct); + /* ADC1 interrupt Init */ + HAL_NVIC_SetPriority(ADC1_IRQn, 0, 0); + HAL_NVIC_EnableIRQ(ADC1_IRQn); /* USER CODE BEGIN ADC1_MspInit 1 */ /* USER CODE END ADC1_MspInit 1 */ @@ -135,6 +138,8 @@ void HAL_ADC_MspDeInit(ADC_HandleTypeDef* hadc) */ HAL_GPIO_DeInit(GPIOA, GPIO_PIN_0|GPIO_PIN_1); + /* ADC1 interrupt DeInit */ + HAL_NVIC_DisableIRQ(ADC1_IRQn); /* USER CODE BEGIN ADC1_MspDeInit 1 */ /* USER CODE END ADC1_MspDeInit 1 */ diff --git a/Software/Core/Src/stm32f0xx_it.c b/Software/Core/Src/stm32f0xx_it.c index db62670..0b67aee 100644 --- a/Software/Core/Src/stm32f0xx_it.c +++ b/Software/Core/Src/stm32f0xx_it.c @@ -55,7 +55,7 @@ /* USER CODE END 0 */ /* External variables --------------------------------------------------------*/ - +extern ADC_HandleTypeDef hadc; /* USER CODE BEGIN EV */ /* USER CODE END EV */ @@ -140,6 +140,20 @@ void SysTick_Handler(void) /* please refer to the startup file (startup_stm32f0xx.s). */ /******************************************************************************/ +/** + * @brief This function handles ADC interrupt. + */ +void ADC1_IRQHandler(void) +{ + /* USER CODE BEGIN ADC1_IRQn 0 */ + + /* USER CODE END ADC1_IRQn 0 */ + HAL_ADC_IRQHandler(&hadc); + /* USER CODE BEGIN ADC1_IRQn 1 */ + + /* USER CODE END ADC1_IRQn 1 */ +} + /* USER CODE BEGIN 1 */ /* USER CODE END 1 */ diff --git a/Software/Core/Src/syscalls.c b/Software/Core/Src/syscalls.c new file mode 100644 index 0000000..e33a849 --- /dev/null +++ b/Software/Core/Src/syscalls.c @@ -0,0 +1,176 @@ +/** + ****************************************************************************** + * @file syscalls.c + * @author Auto-generated by STM32CubeMX + * @brief Minimal System calls file + * + * For more information about which c-functions + * need which of these lowlevel functions + * please consult the Newlib libc-manual + ****************************************************************************** + * @attention + * + * Copyright (c) 2020-2024 STMicroelectronics. + * All rights reserved. + * + * This software is licensed under terms that can be found in the LICENSE file + * in the root directory of this software component. + * If no LICENSE file comes with this software, it is provided AS-IS. + * + ****************************************************************************** + */ + +/* Includes */ +#include +#include +#include +#include +#include +#include +#include +#include + + +/* Variables */ +extern int __io_putchar(int ch) __attribute__((weak)); +extern int __io_getchar(void) __attribute__((weak)); + + +char *__env[1] = { 0 }; +char **environ = __env; + + +/* Functions */ +void initialise_monitor_handles() +{ +} + +int _getpid(void) +{ + return 1; +} + +int _kill(int pid, int sig) +{ + (void)pid; + (void)sig; + errno = EINVAL; + return -1; +} + +void _exit (int status) +{ + _kill(status, -1); + while (1) {} /* Make sure we hang here */ +} + +__attribute__((weak)) int _read(int file, char *ptr, int len) +{ + (void)file; + int DataIdx; + + for (DataIdx = 0; DataIdx < len; DataIdx++) + { + *ptr++ = __io_getchar(); + } + + return len; +} + +__attribute__((weak)) int _write(int file, char *ptr, int len) +{ + (void)file; + int DataIdx; + + for (DataIdx = 0; DataIdx < len; DataIdx++) + { + __io_putchar(*ptr++); + } + return len; +} + +int _close(int file) +{ + (void)file; + return -1; +} + + +int _fstat(int file, struct stat *st) +{ + (void)file; + st->st_mode = S_IFCHR; + return 0; +} + +int _isatty(int file) +{ + (void)file; + return 1; +} + +int _lseek(int file, int ptr, int dir) +{ + (void)file; + (void)ptr; + (void)dir; + return 0; +} + +int _open(char *path, int flags, ...) +{ + (void)path; + (void)flags; + /* Pretend like we always fail */ + return -1; +} + +int _wait(int *status) +{ + (void)status; + errno = ECHILD; + return -1; +} + +int _unlink(char *name) +{ + (void)name; + errno = ENOENT; + return -1; +} + +int _times(struct tms *buf) +{ + (void)buf; + return -1; +} + +int _stat(char *file, struct stat *st) +{ + (void)file; + st->st_mode = S_IFCHR; + return 0; +} + +int _link(char *old, char *new) +{ + (void)old; + (void)new; + errno = EMLINK; + return -1; +} + +int _fork(void) +{ + errno = EAGAIN; + return -1; +} + +int _execve(char *name, char **argv, char **env) +{ + (void)name; + (void)argv; + (void)env; + errno = ENOMEM; + return -1; +} diff --git a/Software/Core/Src/sysmem.c b/Software/Core/Src/sysmem.c new file mode 100644 index 0000000..246470e --- /dev/null +++ b/Software/Core/Src/sysmem.c @@ -0,0 +1,79 @@ +/** + ****************************************************************************** + * @file sysmem.c + * @author Generated by STM32CubeMX + * @brief System Memory calls file + * + * For more information about which C functions + * need which of these lowlevel functions + * please consult the newlib libc manual + ****************************************************************************** + * @attention + * + * Copyright (c) 2024 STMicroelectronics. + * All rights reserved. + * + * This software is licensed under terms that can be found in the LICENSE file + * in the root directory of this software component. + * If no LICENSE file comes with this software, it is provided AS-IS. + * + ****************************************************************************** + */ + +/* Includes */ +#include +#include + +/** + * Pointer to the current high watermark of the heap usage + */ +static uint8_t *__sbrk_heap_end = NULL; + +/** + * @brief _sbrk() allocates memory to the newlib heap and is used by malloc + * and others from the C library + * + * @verbatim + * ############################################################################ + * # .data # .bss # newlib heap # MSP stack # + * # # # # Reserved by _Min_Stack_Size # + * ############################################################################ + * ^-- RAM start ^-- _end _estack, RAM end --^ + * @endverbatim + * + * This implementation starts allocating at the '_end' linker symbol + * The '_Min_Stack_Size' linker symbol reserves a memory for the MSP stack + * The implementation considers '_estack' linker symbol to be RAM end + * NOTE: If the MSP stack, at any point during execution, grows larger than the + * reserved size, please increase the '_Min_Stack_Size'. + * + * @param incr Memory size + * @return Pointer to allocated memory + */ +void *_sbrk(ptrdiff_t incr) +{ + extern uint8_t _end; /* Symbol defined in the linker script */ + extern uint8_t _estack; /* Symbol defined in the linker script */ + extern uint32_t _Min_Stack_Size; /* Symbol defined in the linker script */ + const uint32_t stack_limit = (uint32_t)&_estack - (uint32_t)&_Min_Stack_Size; + const uint8_t *max_heap = (uint8_t *)stack_limit; + uint8_t *prev_heap_end; + + /* Initialize heap end at first call */ + if (NULL == __sbrk_heap_end) + { + __sbrk_heap_end = &_end; + } + + /* Protect heap from growing into the reserved MSP stack */ + if (__sbrk_heap_end + incr > max_heap) + { + errno = ENOMEM; + return (void *)-1; + } + + prev_heap_end = __sbrk_heap_end; + __sbrk_heap_end += incr; + + return (void *)prev_heap_end; +} diff --git a/Software/Drivers/STM32F0xx_HAL_Driver/Inc/Legacy/stm32_hal_legacy.h b/Software/Drivers/STM32F0xx_HAL_Driver/Inc/Legacy/stm32_hal_legacy.h index 1d04707..d415548 100644 --- a/Software/Drivers/STM32F0xx_HAL_Driver/Inc/Legacy/stm32_hal_legacy.h +++ b/Software/Drivers/STM32F0xx_HAL_Driver/Inc/Legacy/stm32_hal_legacy.h @@ -7,7 +7,7 @@ ****************************************************************************** * @attention * - * Copyright (c) 2023 STMicroelectronics. + * Copyright (c) 2021 STMicroelectronics. * All rights reserved. * * This software is licensed under terms that can be found in the LICENSE file @@ -37,16 +37,12 @@ extern "C" { #define AES_CLEARFLAG_CCF CRYP_CLEARFLAG_CCF #define AES_CLEARFLAG_RDERR CRYP_CLEARFLAG_RDERR #define AES_CLEARFLAG_WRERR CRYP_CLEARFLAG_WRERR -#if defined(STM32U5) || defined(STM32H7) || defined(STM32MP1) +#if defined(STM32H7) || defined(STM32MP1) #define CRYP_DATATYPE_32B CRYP_NO_SWAP #define CRYP_DATATYPE_16B CRYP_HALFWORD_SWAP #define CRYP_DATATYPE_8B CRYP_BYTE_SWAP #define CRYP_DATATYPE_1B CRYP_BIT_SWAP -#if defined(STM32U5) -#define CRYP_CCF_CLEAR CRYP_CLEAR_CCF -#define CRYP_ERR_CLEAR CRYP_CLEAR_RWEIF -#endif /* STM32U5 */ -#endif /* STM32U5 || STM32H7 || STM32MP1 */ +#endif /* STM32H7 || STM32MP1 */ /** * @} */ @@ -279,7 +275,7 @@ extern "C" { #define DAC_WAVEGENERATION_NOISE DAC_WAVE_NOISE #define DAC_WAVEGENERATION_TRIANGLE DAC_WAVE_TRIANGLE -#if defined(STM32G4) || defined(STM32L5) || defined(STM32H7) || defined (STM32U5) +#if defined(STM32G4) || defined(STM32H7) || defined (STM32U5) #define DAC_CHIPCONNECT_DISABLE DAC_CHIPCONNECT_EXTERNAL #define DAC_CHIPCONNECT_ENABLE DAC_CHIPCONNECT_INTERNAL #endif @@ -552,6 +548,16 @@ extern "C" { #define OB_SRAM134_RST_ERASE OB_SRAM_RST_ERASE #define OB_SRAM134_RST_NOT_ERASE OB_SRAM_RST_NOT_ERASE #endif /* STM32U5 */ +#if defined(STM32U0) +#define OB_USER_nRST_STOP OB_USER_NRST_STOP +#define OB_USER_nRST_STDBY OB_USER_NRST_STDBY +#define OB_USER_nRST_SHDW OB_USER_NRST_SHDW +#define OB_USER_nBOOT_SEL OB_USER_NBOOT_SEL +#define OB_USER_nBOOT0 OB_USER_NBOOT0 +#define OB_USER_nBOOT1 OB_USER_NBOOT1 +#define OB_nBOOT0_RESET OB_NBOOT0_RESET +#define OB_nBOOT0_SET OB_NBOOT0_SET +#endif /* STM32U0 */ /** * @} @@ -1243,10 +1249,10 @@ extern "C" { #define RTC_TAMPERPIN_PA0 RTC_TAMPERPIN_POS1 #define RTC_TAMPERPIN_PI8 RTC_TAMPERPIN_POS1 -#if defined(STM32H5) +#if defined(STM32H5) || defined(STM32H7RS) #define TAMP_SECRETDEVICE_ERASE_NONE TAMP_DEVICESECRETS_ERASE_NONE #define TAMP_SECRETDEVICE_ERASE_BKP_SRAM TAMP_DEVICESECRETS_ERASE_BKPSRAM -#endif /* STM32H5 */ +#endif /* STM32H5 || STM32H7RS */ #if defined(STM32WBA) #define TAMP_SECRETDEVICE_ERASE_NONE TAMP_DEVICESECRETS_ERASE_NONE @@ -1258,10 +1264,10 @@ extern "C" { #define TAMP_SECRETDEVICE_ERASE_ALL TAMP_DEVICESECRETS_ERASE_ALL #endif /* STM32WBA */ -#if defined(STM32H5) || defined(STM32WBA) +#if defined(STM32H5) || defined(STM32WBA) || defined(STM32H7RS) #define TAMP_SECRETDEVICE_ERASE_DISABLE TAMP_DEVICESECRETS_ERASE_NONE #define TAMP_SECRETDEVICE_ERASE_ENABLE TAMP_SECRETDEVICE_ERASE_ALL -#endif /* STM32H5 || STM32WBA */ +#endif /* STM32H5 || STM32WBA || STM32H7RS */ #if defined(STM32F7) #define RTC_TAMPCR_TAMPXE RTC_TAMPER_ENABLE_BITS_MASK @@ -1599,6 +1605,8 @@ extern "C" { #define ETH_MAC_SMALL_FIFO_RW_ACTIVE 0x00000006U /* MAC small FIFO read / write controllers active */ #define ETH_MAC_MII_RECEIVE_PROTOCOL_ACTIVE 0x00000001U /* MAC MII receive protocol engine active */ +#define ETH_TxPacketConfig ETH_TxPacketConfigTypeDef /* Transmit Packet Configuration structure definition */ + /** * @} */ @@ -1991,12 +1999,12 @@ extern "C" { /** @defgroup HAL_RTC_Aliased_Functions HAL RTC Aliased Functions maintained for legacy purpose * @{ */ -#if defined(STM32H5) || defined(STM32WBA) +#if defined(STM32H5) || defined(STM32WBA) || defined(STM32H7RS) #define HAL_RTCEx_SetBoothardwareKey HAL_RTCEx_LockBootHardwareKey #define HAL_RTCEx_BKUPBlock_Enable HAL_RTCEx_BKUPBlock #define HAL_RTCEx_BKUPBlock_Disable HAL_RTCEx_BKUPUnblock #define HAL_RTCEx_Erase_SecretDev_Conf HAL_RTCEx_ConfigEraseDeviceSecrets -#endif /* STM32H5 || STM32WBA */ +#endif /* STM32H5 || STM32WBA || STM32H7RS */ /** * @} @@ -2311,8 +2319,8 @@ extern "C" { #define __HAL_COMP_EXTI_CLEAR_FLAG(__FLAG__) (((__FLAG__) == COMP_EXTI_LINE_COMP2) ? __HAL_COMP_COMP2_EXTI_CLEAR_FLAG() : \ ((__FLAG__) == COMP_EXTI_LINE_COMP4) ? __HAL_COMP_COMP4_EXTI_CLEAR_FLAG() : \ __HAL_COMP_COMP6_EXTI_CLEAR_FLAG()) -# endif -# if defined(STM32F302xE) || defined(STM32F302xC) +#endif +#if defined(STM32F302xE) || defined(STM32F302xC) #define __HAL_COMP_EXTI_RISING_IT_ENABLE(__EXTILINE__) (((__EXTILINE__) == COMP_EXTI_LINE_COMP1) ? __HAL_COMP_COMP1_EXTI_ENABLE_RISING_EDGE() : \ ((__EXTILINE__) == COMP_EXTI_LINE_COMP2) ? __HAL_COMP_COMP2_EXTI_ENABLE_RISING_EDGE() : \ ((__EXTILINE__) == COMP_EXTI_LINE_COMP4) ? __HAL_COMP_COMP4_EXTI_ENABLE_RISING_EDGE() : \ @@ -2345,8 +2353,8 @@ extern "C" { ((__FLAG__) == COMP_EXTI_LINE_COMP2) ? __HAL_COMP_COMP2_EXTI_CLEAR_FLAG() : \ ((__FLAG__) == COMP_EXTI_LINE_COMP4) ? __HAL_COMP_COMP4_EXTI_CLEAR_FLAG() : \ __HAL_COMP_COMP6_EXTI_CLEAR_FLAG()) -# endif -# if defined(STM32F303xE) || defined(STM32F398xx) || defined(STM32F303xC) || defined(STM32F358xx) +#endif +#if defined(STM32F303xE) || defined(STM32F398xx) || defined(STM32F303xC) || defined(STM32F358xx) #define __HAL_COMP_EXTI_RISING_IT_ENABLE(__EXTILINE__) (((__EXTILINE__) == COMP_EXTI_LINE_COMP1) ? __HAL_COMP_COMP1_EXTI_ENABLE_RISING_EDGE() : \ ((__EXTILINE__) == COMP_EXTI_LINE_COMP2) ? __HAL_COMP_COMP2_EXTI_ENABLE_RISING_EDGE() : \ ((__EXTILINE__) == COMP_EXTI_LINE_COMP3) ? __HAL_COMP_COMP3_EXTI_ENABLE_RISING_EDGE() : \ @@ -2403,8 +2411,8 @@ extern "C" { ((__FLAG__) == COMP_EXTI_LINE_COMP5) ? __HAL_COMP_COMP5_EXTI_CLEAR_FLAG() : \ ((__FLAG__) == COMP_EXTI_LINE_COMP6) ? __HAL_COMP_COMP6_EXTI_CLEAR_FLAG() : \ __HAL_COMP_COMP7_EXTI_CLEAR_FLAG()) -# endif -# if defined(STM32F373xC) ||defined(STM32F378xx) +#endif +#if defined(STM32F373xC) ||defined(STM32F378xx) #define __HAL_COMP_EXTI_RISING_IT_ENABLE(__EXTILINE__) (((__EXTILINE__) == COMP_EXTI_LINE_COMP1) ? __HAL_COMP_COMP1_EXTI_ENABLE_RISING_EDGE() : \ __HAL_COMP_COMP2_EXTI_ENABLE_RISING_EDGE()) #define __HAL_COMP_EXTI_RISING_IT_DISABLE(__EXTILINE__) (((__EXTILINE__) == COMP_EXTI_LINE_COMP1) ? __HAL_COMP_COMP1_EXTI_DISABLE_RISING_EDGE() : \ @@ -2421,7 +2429,7 @@ extern "C" { __HAL_COMP_COMP2_EXTI_GET_FLAG()) #define __HAL_COMP_EXTI_CLEAR_FLAG(__FLAG__) (((__FLAG__) == COMP_EXTI_LINE_COMP1) ? __HAL_COMP_COMP1_EXTI_CLEAR_FLAG() : \ __HAL_COMP_COMP2_EXTI_CLEAR_FLAG()) -# endif +#endif #else #define __HAL_COMP_EXTI_RISING_IT_ENABLE(__EXTILINE__) (((__EXTILINE__) == COMP_EXTI_LINE_COMP1) ? __HAL_COMP_COMP1_EXTI_ENABLE_RISING_EDGE() : \ __HAL_COMP_COMP2_EXTI_ENABLE_RISING_EDGE()) @@ -2723,6 +2731,12 @@ extern "C" { #define __APB1_RELEASE_RESET __HAL_RCC_APB1_RELEASE_RESET #define __APB2_FORCE_RESET __HAL_RCC_APB2_FORCE_RESET #define __APB2_RELEASE_RESET __HAL_RCC_APB2_RELEASE_RESET +#if defined(STM32C0) +#define __HAL_RCC_APB1_FORCE_RESET __HAL_RCC_APB1_GRP1_FORCE_RESET +#define __HAL_RCC_APB1_RELEASE_RESET __HAL_RCC_APB1_GRP1_RELEASE_RESET +#define __HAL_RCC_APB2_FORCE_RESET __HAL_RCC_APB1_GRP2_FORCE_RESET +#define __HAL_RCC_APB2_RELEASE_RESET __HAL_RCC_APB1_GRP2_RELEASE_RESET +#endif /* STM32C0 */ #define __BKP_CLK_DISABLE __HAL_RCC_BKP_CLK_DISABLE #define __BKP_CLK_ENABLE __HAL_RCC_BKP_CLK_ENABLE #define __BKP_FORCE_RESET __HAL_RCC_BKP_FORCE_RESET @@ -3646,8 +3660,12 @@ extern "C" { #define RCC_MCOSOURCE_PLLCLK_NODIV RCC_MCO1SOURCE_PLLCLK #define RCC_MCOSOURCE_PLLCLK_DIV2 RCC_MCO1SOURCE_PLLCLK_DIV2 +#if defined(STM32U0) +#define RCC_SYSCLKSOURCE_STATUS_PLLR RCC_SYSCLKSOURCE_STATUS_PLLCLK +#endif + #if defined(STM32L4) || defined(STM32WB) || defined(STM32G0) || defined(STM32G4) || defined(STM32L5) || \ - defined(STM32WL) || defined(STM32C0) + defined(STM32WL) || defined(STM32C0) || defined(STM32H7RS) || defined(STM32U0) #define RCC_RTCCLKSOURCE_NO_CLK RCC_RTCCLKSOURCE_NONE #else #define RCC_RTCCLKSOURCE_NONE RCC_RTCCLKSOURCE_NO_CLK @@ -3749,8 +3767,10 @@ extern "C" { #define __HAL_RCC_GET_DFSDM_SOURCE __HAL_RCC_GET_DFSDM1_SOURCE #define RCC_DFSDM1CLKSOURCE_PCLK RCC_DFSDM1CLKSOURCE_PCLK2 #define RCC_SWPMI1CLKSOURCE_PCLK RCC_SWPMI1CLKSOURCE_PCLK1 +#if !defined(STM32U0) #define RCC_LPTIM1CLKSOURCE_PCLK RCC_LPTIM1CLKSOURCE_PCLK1 #define RCC_LPTIM2CLKSOURCE_PCLK RCC_LPTIM2CLKSOURCE_PCLK1 +#endif #define RCC_DFSDM1AUDIOCLKSOURCE_I2SAPB1 RCC_DFSDM1AUDIOCLKSOURCE_I2S1 #define RCC_DFSDM1AUDIOCLKSOURCE_I2SAPB2 RCC_DFSDM1AUDIOCLKSOURCE_I2S2 @@ -3896,7 +3916,8 @@ extern "C" { */ #if defined (STM32G0) || defined (STM32L5) || defined (STM32L412xx) || defined (STM32L422xx) || \ defined (STM32L4P5xx)|| defined (STM32L4Q5xx) || defined (STM32G4) || defined (STM32WL) || defined (STM32U5) || \ - defined (STM32WBA) || defined (STM32H5) || defined (STM32C0) + defined (STM32WBA) || defined (STM32H5) || \ + defined (STM32C0) || defined (STM32H7RS) || defined (STM32U0) #else #define __HAL_RTC_CLEAR_FLAG __HAL_RTC_EXTI_CLEAR_FLAG #endif @@ -3931,6 +3952,13 @@ extern "C" { __HAL_RTC_TAMPER_TIMESTAMP_EXTI_GENERATE_SWIT())) #endif /* STM32F1 */ +#if defined (STM32F0) || defined (STM32F2) || defined (STM32F3) || defined (STM32F4) || defined (STM32F7) || \ + defined (STM32H7) || \ + defined (STM32L0) || defined (STM32L1) || \ + defined (STM32WB) +#define __HAL_RTC_TAMPER_GET_IT __HAL_RTC_TAMPER_GET_FLAG +#endif + #define IS_ALARM IS_RTC_ALARM #define IS_ALARM_MASK IS_RTC_ALARM_MASK #define IS_TAMPER IS_RTC_TAMPER @@ -4212,6 +4240,9 @@ extern "C" { #define __HAL_TIM_GetCompare __HAL_TIM_GET_COMPARE #define TIM_BREAKINPUTSOURCE_DFSDM TIM_BREAKINPUTSOURCE_DFSDM1 + +#define TIM_OCMODE_ASSYMETRIC_PWM1 TIM_OCMODE_ASYMMETRIC_PWM1 +#define TIM_OCMODE_ASSYMETRIC_PWM2 TIM_OCMODE_ASYMMETRIC_PWM2 /** * @} */ diff --git a/Software/Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_can.h b/Software/Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_can.h index f417660..5b92bb0 100644 --- a/Software/Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_can.h +++ b/Software/Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_can.h @@ -204,7 +204,11 @@ typedef struct /** * @brief CAN handle Structure definition */ +#if USE_HAL_CAN_REGISTER_CALLBACKS == 1 typedef struct __CAN_HandleTypeDef +#else +typedef struct +#endif /* USE_HAL_CAN_REGISTER_CALLBACKS */ { CAN_TypeDef *Instance; /*!< Register base address */ diff --git a/Software/Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_crc.h b/Software/Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_crc.h index 35edcd1..511e80b 100644 --- a/Software/Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_crc.h +++ b/Software/Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_crc.h @@ -332,7 +332,7 @@ uint32_t HAL_CRC_Calculate(CRC_HandleTypeDef *hcrc, uint32_t pBuffer[], uint32_t /** @defgroup CRC_Exported_Functions_Group3 Peripheral State functions * @{ */ -HAL_CRC_StateTypeDef HAL_CRC_GetState(CRC_HandleTypeDef *hcrc); +HAL_CRC_StateTypeDef HAL_CRC_GetState(const CRC_HandleTypeDef *hcrc); /** * @} */ diff --git a/Software/Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_gpio.h b/Software/Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_gpio.h index ff828e3..bf179b7 100644 --- a/Software/Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_gpio.h +++ b/Software/Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_gpio.h @@ -236,8 +236,8 @@ typedef enum */ #define IS_GPIO_PIN_ACTION(ACTION) (((ACTION) == GPIO_PIN_RESET) || ((ACTION) == GPIO_PIN_SET)) -#define IS_GPIO_PIN(__PIN__) (((((uint32_t)__PIN__) & GPIO_PIN_MASK) != 0x00U) &&\ - ((((uint32_t)__PIN__) & ~GPIO_PIN_MASK) == 0x00U)) +#define IS_GPIO_PIN(__PIN__) (((((uint32_t)(__PIN__)) & GPIO_PIN_MASK) != 0x00U) &&\ + ((((uint32_t)(__PIN__)) & ~GPIO_PIN_MASK) == 0x00U)) #define IS_GPIO_MODE(__MODE__) (((__MODE__) == GPIO_MODE_INPUT) ||\ ((__MODE__) == GPIO_MODE_OUTPUT_PP) ||\ diff --git a/Software/Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_i2c.h b/Software/Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_i2c.h index c55bc9e..bdb34ed 100644 --- a/Software/Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_i2c.h +++ b/Software/Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_i2c.h @@ -118,8 +118,6 @@ typedef enum HAL_I2C_STATE_BUSY_RX_LISTEN = 0x2AU, /*!< Address Listen Mode and Data Reception process is ongoing */ HAL_I2C_STATE_ABORT = 0x60U, /*!< Abort user request ongoing */ - HAL_I2C_STATE_TIMEOUT = 0xA0U, /*!< Timeout state */ - HAL_I2C_STATE_ERROR = 0xE0U /*!< Error */ } HAL_I2C_StateTypeDef; diff --git a/Software/Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_pcd.h b/Software/Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_pcd.h index a612f43..77c2d26 100644 --- a/Software/Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_pcd.h +++ b/Software/Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_pcd.h @@ -339,7 +339,7 @@ HAL_StatusTypeDef HAL_PCD_EP_Flush(PCD_HandleTypeDef *hpcd, uint8_t ep_addr); HAL_StatusTypeDef HAL_PCD_EP_Abort(PCD_HandleTypeDef *hpcd, uint8_t ep_addr); HAL_StatusTypeDef HAL_PCD_ActivateRemoteWakeup(PCD_HandleTypeDef *hpcd); HAL_StatusTypeDef HAL_PCD_DeActivateRemoteWakeup(PCD_HandleTypeDef *hpcd); -uint32_t HAL_PCD_EP_GetRxCount(PCD_HandleTypeDef *hpcd, uint8_t ep_addr); +uint32_t HAL_PCD_EP_GetRxCount(PCD_HandleTypeDef const *hpcd, uint8_t ep_addr); /** * @} */ @@ -348,7 +348,7 @@ uint32_t HAL_PCD_EP_GetRxCount(PCD_HandleTypeDef *hpcd, uint8_t ep_addr /** @addtogroup PCD_Exported_Functions_Group4 Peripheral State functions * @{ */ -PCD_StateTypeDef HAL_PCD_GetState(PCD_HandleTypeDef *hpcd); +PCD_StateTypeDef HAL_PCD_GetState(PCD_HandleTypeDef const *hpcd); /** * @} */ @@ -806,20 +806,17 @@ PCD_StateTypeDef HAL_PCD_GetState(PCD_HandleTypeDef *hpcd); \ *(pdwReg) &= 0x3FFU; \ \ - if ((wCount) > 62U) \ + if ((wCount) == 0U) \ { \ - PCD_CALC_BLK32((pdwReg), (wCount), wNBlocks); \ + *(pdwReg) |= USB_CNTRX_BLSIZE; \ + } \ + else if ((wCount) <= 62U) \ + { \ + PCD_CALC_BLK2((pdwReg), (wCount), wNBlocks); \ } \ else \ { \ - if ((wCount) == 0U) \ - { \ - *(pdwReg) |= USB_CNTRX_BLSIZE; \ - } \ - else \ - { \ - PCD_CALC_BLK2((pdwReg), (wCount), wNBlocks); \ - } \ + PCD_CALC_BLK32((pdwReg), (wCount), wNBlocks); \ } \ } while(0) /* PCD_SET_EP_CNT_RX_REG */ diff --git a/Software/Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_rtc.h b/Software/Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_rtc.h index 42fbce1..1810167 100644 --- a/Software/Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_rtc.h +++ b/Software/Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_rtc.h @@ -785,7 +785,7 @@ HAL_RTCStateTypeDef HAL_RTC_GetState(RTC_HandleTypeDef *hrtc); #define RTC_TIMEOUT_VALUE 1000U -#define RTC_EXTI_LINE_ALARM_EVENT EXTI_IMR_MR17 /*!< External interrupt line 17 Connected to the RTC Alarm event */ +#define RTC_EXTI_LINE_ALARM_EVENT EXTI_IMR_MR17 /*!< External interrupt line 17 connected to the RTC Alarm event */ /** * @} */ diff --git a/Software/Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_rtc_ex.h b/Software/Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_rtc_ex.h index 460c9d6..467b637 100644 --- a/Software/Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_rtc_ex.h +++ b/Software/Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_rtc_ex.h @@ -623,19 +623,6 @@ typedef struct */ #define __HAL_RTC_TAMPER_DISABLE_IT(__HANDLE__, __INTERRUPT__) ((__HANDLE__)->Instance->TAFCR &= ~(__INTERRUPT__)) -/** - * @brief Check whether the specified RTC Tamper interrupt has occurred or not. - * @param __HANDLE__ specifies the RTC handle. - * @param __INTERRUPT__ specifies the RTC Tamper interrupt to check. - * This parameter can be: - * @arg RTC_IT_TAMP1: Tamper 1 interrupt - * @arg RTC_IT_TAMP2: Tamper 2 interrupt - * @arg RTC_IT_TAMP3: Tamper 3 interrupt - * @note RTC_IT_TAMP3 is not applicable to all devices. - * @retval None - */ -#define __HAL_RTC_TAMPER_GET_IT(__HANDLE__, __INTERRUPT__) (((((__HANDLE__)->Instance->ISR) & ((__INTERRUPT__) >> 4U)) != 0U) ? 1U : 0U) - /** * @brief Check whether the specified RTC Tamper interrupt has been enabled or not. * @param __HANDLE__ specifies the RTC handle. @@ -653,8 +640,9 @@ typedef struct * This parameter can be: * @arg RTC_FLAG_TAMP1F: Tamper 1 interrupt flag * @arg RTC_FLAG_TAMP2F: Tamper 2 interrupt flag - * @arg RTC_FLAG_TAMP3F: Tamper 3 interrupt flag - * @note RTC_FLAG_TAMP3F is not applicable to all devices. + * @arg RTC_FLAG_TAMP3F: Tamper 3 interrupt flag (*) + * + * (*) value not applicable to all devices. * @retval None */ #define __HAL_RTC_TAMPER_GET_FLAG(__HANDLE__, __FLAG__) (((((__HANDLE__)->Instance->ISR) & (__FLAG__)) != 0U)? 1U : 0U) @@ -666,8 +654,9 @@ typedef struct * This parameter can be: * @arg RTC_FLAG_TAMP1F: Tamper 1 interrupt flag * @arg RTC_FLAG_TAMP2F: Tamper 2 interrupt flag - * @arg RTC_FLAG_TAMP3F: Tamper 3 interrupt flag - * @note RTC_FLAG_TAMP3F is not applicable to all devices. + * @arg RTC_FLAG_TAMP3F: Tamper 3 interrupt flag (*) + * + * (*) value not applicable to all devices. * @retval None */ #define __HAL_RTC_TAMPER_CLEAR_FLAG(__HANDLE__, __FLAG__) ((__HANDLE__)->Instance->ISR) = (~((__FLAG__) | RTC_ISR_INIT)|((__HANDLE__)->Instance->ISR & RTC_ISR_INIT)) @@ -696,13 +685,13 @@ typedef struct * @brief Enable event on the RTC Tamper and Timestamp associated EXTI line. * @retval None. */ -#define __HAL_RTC_TAMPER_TIMESTAMP_EXTI_ENABLE_EVENT() (EXTI->EMR |= RTC_EXTI_LINE_TAMPER_TIMESTAMP_EVENT) +#define __HAL_RTC_TAMPER_TIMESTAMP_EXTI_ENABLE_EVENT() (EXTI->EMR |= RTC_EXTI_LINE_TAMPER_TIMESTAMP_EVENT) /** * @brief Disable event on the RTC Tamper and Timestamp associated EXTI line. * @retval None. */ -#define __HAL_RTC_TAMPER_TIMESTAMP_EXTI_DISABLE_EVENT() (EXTI->EMR &= ~RTC_EXTI_LINE_TAMPER_TIMESTAMP_EVENT) +#define __HAL_RTC_TAMPER_TIMESTAMP_EXTI_DISABLE_EVENT() (EXTI->EMR &= ~RTC_EXTI_LINE_TAMPER_TIMESTAMP_EVENT) /** * @brief Enable falling edge trigger on the RTC Tamper and Timestamp associated EXTI line. diff --git a/Software/Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_smbus.h b/Software/Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_smbus.h index a42c2bd..40e8873 100644 --- a/Software/Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_smbus.h +++ b/Software/Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_smbus.h @@ -100,8 +100,6 @@ typedef struct #define HAL_SMBUS_STATE_MASTER_BUSY_RX (0x00000022U) /*!< Master Data Reception process is ongoing */ #define HAL_SMBUS_STATE_SLAVE_BUSY_TX (0x00000032U) /*!< Slave Data Transmission process is ongoing */ #define HAL_SMBUS_STATE_SLAVE_BUSY_RX (0x00000042U) /*!< Slave Data Reception process is ongoing */ -#define HAL_SMBUS_STATE_TIMEOUT (0x00000003U) /*!< Timeout state */ -#define HAL_SMBUS_STATE_ERROR (0x00000004U) /*!< Reception process is ongoing */ #define HAL_SMBUS_STATE_LISTEN (0x00000008U) /*!< Address Listen Mode is ongoing */ /** * @} diff --git a/Software/Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_spi_ex.h b/Software/Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_spi_ex.h index ca842a1..5a1e0d1 100644 --- a/Software/Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_spi_ex.h +++ b/Software/Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_spi_ex.h @@ -48,7 +48,7 @@ extern "C" { /** @addtogroup SPIEx_Exported_Functions_Group1 * @{ */ -HAL_StatusTypeDef HAL_SPIEx_FlushRxFifo(SPI_HandleTypeDef *hspi); +HAL_StatusTypeDef HAL_SPIEx_FlushRxFifo(const SPI_HandleTypeDef *hspi); /** * @} */ diff --git a/Software/Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_tim.h b/Software/Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_tim.h index 95a30eb..d82e4d9 100644 --- a/Software/Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_tim.h +++ b/Software/Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_tim.h @@ -385,29 +385,28 @@ typedef struct */ typedef enum { - HAL_TIM_BASE_MSPINIT_CB_ID = 0x00U /*!< TIM Base MspInit Callback ID */ - , HAL_TIM_BASE_MSPDEINIT_CB_ID = 0x01U /*!< TIM Base MspDeInit Callback ID */ - , HAL_TIM_IC_MSPINIT_CB_ID = 0x02U /*!< TIM IC MspInit Callback ID */ - , HAL_TIM_IC_MSPDEINIT_CB_ID = 0x03U /*!< TIM IC MspDeInit Callback ID */ - , HAL_TIM_OC_MSPINIT_CB_ID = 0x04U /*!< TIM OC MspInit Callback ID */ - , HAL_TIM_OC_MSPDEINIT_CB_ID = 0x05U /*!< TIM OC MspDeInit Callback ID */ - , HAL_TIM_PWM_MSPINIT_CB_ID = 0x06U /*!< TIM PWM MspInit Callback ID */ - , HAL_TIM_PWM_MSPDEINIT_CB_ID = 0x07U /*!< TIM PWM MspDeInit Callback ID */ - , HAL_TIM_ONE_PULSE_MSPINIT_CB_ID = 0x08U /*!< TIM One Pulse MspInit Callback ID */ - , HAL_TIM_ONE_PULSE_MSPDEINIT_CB_ID = 0x09U /*!< TIM One Pulse MspDeInit Callback ID */ - , HAL_TIM_ENCODER_MSPINIT_CB_ID = 0x0AU /*!< TIM Encoder MspInit Callback ID */ - , HAL_TIM_ENCODER_MSPDEINIT_CB_ID = 0x0BU /*!< TIM Encoder MspDeInit Callback ID */ - , HAL_TIM_HALL_SENSOR_MSPINIT_CB_ID = 0x0CU /*!< TIM Hall Sensor MspDeInit Callback ID */ - , HAL_TIM_HALL_SENSOR_MSPDEINIT_CB_ID = 0x0DU /*!< TIM Hall Sensor MspDeInit Callback ID */ + HAL_TIM_BASE_MSPINIT_CB_ID = 0x00U /*!< TIM Base MspInit Callback ID */ + , HAL_TIM_BASE_MSPDEINIT_CB_ID = 0x01U /*!< TIM Base MspDeInit Callback ID */ + , HAL_TIM_IC_MSPINIT_CB_ID = 0x02U /*!< TIM IC MspInit Callback ID */ + , HAL_TIM_IC_MSPDEINIT_CB_ID = 0x03U /*!< TIM IC MspDeInit Callback ID */ + , HAL_TIM_OC_MSPINIT_CB_ID = 0x04U /*!< TIM OC MspInit Callback ID */ + , HAL_TIM_OC_MSPDEINIT_CB_ID = 0x05U /*!< TIM OC MspDeInit Callback ID */ + , HAL_TIM_PWM_MSPINIT_CB_ID = 0x06U /*!< TIM PWM MspInit Callback ID */ + , HAL_TIM_PWM_MSPDEINIT_CB_ID = 0x07U /*!< TIM PWM MspDeInit Callback ID */ + , HAL_TIM_ONE_PULSE_MSPINIT_CB_ID = 0x08U /*!< TIM One Pulse MspInit Callback ID */ + , HAL_TIM_ONE_PULSE_MSPDEINIT_CB_ID = 0x09U /*!< TIM One Pulse MspDeInit Callback ID */ + , HAL_TIM_ENCODER_MSPINIT_CB_ID = 0x0AU /*!< TIM Encoder MspInit Callback ID */ + , HAL_TIM_ENCODER_MSPDEINIT_CB_ID = 0x0BU /*!< TIM Encoder MspDeInit Callback ID */ + , HAL_TIM_HALL_SENSOR_MSPINIT_CB_ID = 0x0CU /*!< TIM Hall Sensor MspDeInit Callback ID */ + , HAL_TIM_HALL_SENSOR_MSPDEINIT_CB_ID = 0x0DU /*!< TIM Hall Sensor MspDeInit Callback ID */ , HAL_TIM_PERIOD_ELAPSED_CB_ID = 0x0EU /*!< TIM Period Elapsed Callback ID */ , HAL_TIM_PERIOD_ELAPSED_HALF_CB_ID = 0x0FU /*!< TIM Period Elapsed half complete Callback ID */ , HAL_TIM_TRIGGER_CB_ID = 0x10U /*!< TIM Trigger Callback ID */ , HAL_TIM_TRIGGER_HALF_CB_ID = 0x11U /*!< TIM Trigger half complete Callback ID */ - , HAL_TIM_IC_CAPTURE_CB_ID = 0x12U /*!< TIM Input Capture Callback ID */ , HAL_TIM_IC_CAPTURE_HALF_CB_ID = 0x13U /*!< TIM Input Capture half complete Callback ID */ , HAL_TIM_OC_DELAY_ELAPSED_CB_ID = 0x14U /*!< TIM Output Compare Delay Elapsed Callback ID */ - , HAL_TIM_PWM_PULSE_FINISHED_CB_ID = 0x15U /*!< TIM PWM Pulse Finished Callback ID */ + , HAL_TIM_PWM_PULSE_FINISHED_CB_ID = 0x15U /*!< TIM PWM Pulse Finished Callback ID */ , HAL_TIM_PWM_PULSE_FINISHED_HALF_CB_ID = 0x16U /*!< TIM PWM Pulse Finished half complete Callback ID */ , HAL_TIM_ERROR_CB_ID = 0x17U /*!< TIM Error Callback ID */ , HAL_TIM_COMMUTATION_CB_ID = 0x18U /*!< TIM Commutation Callback ID */ @@ -1656,8 +1655,9 @@ typedef void (*pTIM_CallbackTypeDef)(TIM_HandleTypeDef *htim); /*!< pointer to #define IS_TIM_OPM_CHANNELS(__CHANNEL__) (((__CHANNEL__) == TIM_CHANNEL_1) || \ ((__CHANNEL__) == TIM_CHANNEL_2)) -#define IS_TIM_PERIOD(__HANDLE__, __PERIOD__) \ - ((IS_TIM_32B_COUNTER_INSTANCE(((__HANDLE__)->Instance)) == 0U) ? (((__PERIOD__) > 0U) && ((__PERIOD__) <= 0x0000FFFFU)) : ((__PERIOD__) > 0U)) +#define IS_TIM_PERIOD(__HANDLE__, __PERIOD__) ((IS_TIM_32B_COUNTER_INSTANCE(((__HANDLE__)->Instance)) == 0U) ? \ + (((__PERIOD__) > 0U) && ((__PERIOD__) <= 0x0000FFFFU)) : \ + ((__PERIOD__) > 0U)) #define IS_TIM_COMPLEMENTARY_CHANNELS(__CHANNEL__) (((__CHANNEL__) == TIM_CHANNEL_1) || \ ((__CHANNEL__) == TIM_CHANNEL_2) || \ @@ -1710,7 +1710,6 @@ typedef void (*pTIM_CallbackTypeDef)(TIM_HandleTypeDef *htim); /*!< pointer to #define IS_TIM_BREAK_FILTER(__BRKFILTER__) ((__BRKFILTER__) <= 0xFUL) - #define IS_TIM_BREAK_STATE(__STATE__) (((__STATE__) == TIM_BREAK_ENABLE) || \ ((__STATE__) == TIM_BREAK_DISABLE)) @@ -2048,7 +2047,8 @@ HAL_StatusTypeDef HAL_TIM_ConfigTI1Input(TIM_HandleTypeDef *htim, uint32_t TI1_S HAL_StatusTypeDef HAL_TIM_SlaveConfigSynchro(TIM_HandleTypeDef *htim, const TIM_SlaveConfigTypeDef *sSlaveConfig); HAL_StatusTypeDef HAL_TIM_SlaveConfigSynchro_IT(TIM_HandleTypeDef *htim, const TIM_SlaveConfigTypeDef *sSlaveConfig); HAL_StatusTypeDef HAL_TIM_DMABurst_WriteStart(TIM_HandleTypeDef *htim, uint32_t BurstBaseAddress, - uint32_t BurstRequestSrc, const uint32_t *BurstBuffer, uint32_t BurstLength); + uint32_t BurstRequestSrc, const uint32_t *BurstBuffer, + uint32_t BurstLength); HAL_StatusTypeDef HAL_TIM_DMABurst_MultiWriteStart(TIM_HandleTypeDef *htim, uint32_t BurstBaseAddress, uint32_t BurstRequestSrc, const uint32_t *BurstBuffer, uint32_t BurstLength, uint32_t DataLength); diff --git a/Software/Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_uart_ex.h b/Software/Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_uart_ex.h index fef655c..159a9a1 100644 --- a/Software/Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_uart_ex.h +++ b/Software/Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_uart_ex.h @@ -145,7 +145,7 @@ HAL_StatusTypeDef HAL_UARTEx_ReceiveToIdle(UART_HandleTypeDef *huart, uint8_t *p HAL_StatusTypeDef HAL_UARTEx_ReceiveToIdle_IT(UART_HandleTypeDef *huart, uint8_t *pData, uint16_t Size); HAL_StatusTypeDef HAL_UARTEx_ReceiveToIdle_DMA(UART_HandleTypeDef *huart, uint8_t *pData, uint16_t Size); -HAL_UART_RxEventTypeTypeDef HAL_UARTEx_GetRxEventType(UART_HandleTypeDef *huart); +HAL_UART_RxEventTypeTypeDef HAL_UARTEx_GetRxEventType(const UART_HandleTypeDef *huart); /** diff --git a/Software/Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_usart.h b/Software/Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_usart.h index 9a4070b..6e172ff 100644 --- a/Software/Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_usart.h +++ b/Software/Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_usart.h @@ -463,7 +463,6 @@ typedef void (*pUSART_CallbackTypeDef)(USART_HandleTypeDef *husart); /*!< poin #define __HAL_USART_CLEAR_IDLEFLAG(__HANDLE__) __HAL_USART_CLEAR_FLAG((__HANDLE__), USART_CLEAR_IDLEF) - /** @brief Enable the specified USART interrupt. * @param __HANDLE__ specifies the USART Handle. * @param __INTERRUPT__ specifies the USART interrupt source to enable. diff --git a/Software/Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_usart_ex.h b/Software/Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_usart_ex.h index 7f655f4..94f2541 100644 --- a/Software/Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_usart_ex.h +++ b/Software/Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_usart_ex.h @@ -46,10 +46,10 @@ extern "C" { */ #if defined(USART_CR1_M0)&& defined(USART_CR1_M1) #define USART_WORDLENGTH_7B (USART_CR1_M1) /*!< 7-bit long USART frame */ -#define USART_WORDLENGTH_8B (0x00000000U) /*!< 8-bit long USART frame */ +#define USART_WORDLENGTH_8B (0x00000000U) /*!< 8-bit long USART frame */ #define USART_WORDLENGTH_9B (USART_CR1_M0) /*!< 9-bit long USART frame */ #elif defined(USART_CR1_M) -#define USART_WORDLENGTH_8B (0x00000000U) /*!< 8-bit long USART frame */ +#define USART_WORDLENGTH_8B (0x00000000U) /*!< 8-bit long USART frame */ #define USART_WORDLENGTH_9B (USART_CR1_M) /*!< 9-bit long USART frame */ #endif /* USART_CR1_M0 && USART_CR1_M */ /** diff --git a/Software/Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_wwdg.h b/Software/Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_wwdg.h index a2caf24..bb90963 100644 --- a/Software/Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_wwdg.h +++ b/Software/Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_wwdg.h @@ -183,7 +183,7 @@ typedef void (*pWWDG_CallbackTypeDef)(WWDG_HandleTypeDef *hppp); /*!< pointer t /** * @brief Enable the WWDG early wakeup interrupt. - * @param __HANDLE__ WWDG handle + * @param __HANDLE__: WWDG handle * @param __INTERRUPT__ specifies the interrupt to enable. * This parameter can be one of the following values: * @arg WWDG_IT_EWI: Early wakeup interrupt @@ -296,3 +296,4 @@ void HAL_WWDG_EarlyWakeupCallback(WWDG_HandleTypeDef *hwwdg); #endif #endif /* STM32F0xx_HAL_WWDG_H */ + diff --git a/Software/Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_ll_adc.h b/Software/Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_ll_adc.h index 7ee95ff..15230f7 100644 --- a/Software/Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_ll_adc.h +++ b/Software/Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_ll_adc.h @@ -2928,8 +2928,7 @@ __STATIC_INLINE uint32_t LL_ADC_REG_IsStopConversionOngoing(ADC_TypeDef *ADCx) /** * @brief Get ADC group regular conversion data, range fit for * all ADC configurations: all ADC resolutions and - * all oversampling increased data width (for devices - * with feature oversampling). + * features extending data width (oversampling, data shift,...). * @rmtoll DR DATA LL_ADC_REG_ReadConversionData32 * @param ADCx ADC instance * @retval Value between Min_Data=0x00000000 and Max_Data=0xFFFFFFFF diff --git a/Software/Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_ll_crc.h b/Software/Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_ll_crc.h index 9b69877..077abac 100644 --- a/Software/Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_ll_crc.h +++ b/Software/Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_ll_crc.h @@ -189,7 +189,7 @@ __STATIC_INLINE void LL_CRC_SetPolynomialSize(CRC_TypeDef *CRCx, uint32_t PolySi * @arg @ref LL_CRC_POLYLENGTH_8B * @arg @ref LL_CRC_POLYLENGTH_7B */ -__STATIC_INLINE uint32_t LL_CRC_GetPolynomialSize(CRC_TypeDef *CRCx) +__STATIC_INLINE uint32_t LL_CRC_GetPolynomialSize(const CRC_TypeDef *CRCx) { return (uint32_t)(READ_BIT(CRCx->CR, CRC_CR_POLYSIZE)); } @@ -221,7 +221,7 @@ __STATIC_INLINE void LL_CRC_SetInputDataReverseMode(CRC_TypeDef *CRCx, uint32_t * @arg @ref LL_CRC_INDATA_REVERSE_HALFWORD * @arg @ref LL_CRC_INDATA_REVERSE_WORD */ -__STATIC_INLINE uint32_t LL_CRC_GetInputDataReverseMode(CRC_TypeDef *CRCx) +__STATIC_INLINE uint32_t LL_CRC_GetInputDataReverseMode(const CRC_TypeDef *CRCx) { return (uint32_t)(READ_BIT(CRCx->CR, CRC_CR_REV_IN)); } @@ -248,7 +248,7 @@ __STATIC_INLINE void LL_CRC_SetOutputDataReverseMode(CRC_TypeDef *CRCx, uint32_t * @arg @ref LL_CRC_OUTDATA_REVERSE_NONE * @arg @ref LL_CRC_OUTDATA_REVERSE_BIT */ -__STATIC_INLINE uint32_t LL_CRC_GetOutputDataReverseMode(CRC_TypeDef *CRCx) +__STATIC_INLINE uint32_t LL_CRC_GetOutputDataReverseMode(const CRC_TypeDef *CRCx) { return (uint32_t)(READ_BIT(CRCx->CR, CRC_CR_REV_OUT)); } @@ -276,7 +276,7 @@ __STATIC_INLINE void LL_CRC_SetInitialData(CRC_TypeDef *CRCx, uint32_t InitCrc) * @param CRCx CRC Instance * @retval Value programmed in Programmable initial CRC value register */ -__STATIC_INLINE uint32_t LL_CRC_GetInitialData(CRC_TypeDef *CRCx) +__STATIC_INLINE uint32_t LL_CRC_GetInitialData(const CRC_TypeDef *CRCx) { return (uint32_t)(READ_REG(CRCx->INIT)); } @@ -308,7 +308,7 @@ __STATIC_INLINE void LL_CRC_SetPolynomialCoef(CRC_TypeDef *CRCx, uint32_t Polyno * @param CRCx CRC Instance * @retval Value programmed in Programmable Polynomial value register */ -__STATIC_INLINE uint32_t LL_CRC_GetPolynomialCoef(CRC_TypeDef *CRCx) +__STATIC_INLINE uint32_t LL_CRC_GetPolynomialCoef(const CRC_TypeDef *CRCx) { return (uint32_t)(READ_REG(CRCx->POL)); } @@ -367,7 +367,7 @@ __STATIC_INLINE void LL_CRC_FeedData8(CRC_TypeDef *CRCx, uint8_t InData) * @param CRCx CRC Instance * @retval Current CRC calculation result as stored in CRC_DR register (32 bits). */ -__STATIC_INLINE uint32_t LL_CRC_ReadData32(CRC_TypeDef *CRCx) +__STATIC_INLINE uint32_t LL_CRC_ReadData32(const CRC_TypeDef *CRCx) { return (uint32_t)(READ_REG(CRCx->DR)); } @@ -380,7 +380,7 @@ __STATIC_INLINE uint32_t LL_CRC_ReadData32(CRC_TypeDef *CRCx) * @param CRCx CRC Instance * @retval Current CRC calculation result as stored in CRC_DR register (16 bits). */ -__STATIC_INLINE uint16_t LL_CRC_ReadData16(CRC_TypeDef *CRCx) +__STATIC_INLINE uint16_t LL_CRC_ReadData16(const CRC_TypeDef *CRCx) { return (uint16_t)READ_REG(CRCx->DR); } @@ -392,7 +392,7 @@ __STATIC_INLINE uint16_t LL_CRC_ReadData16(CRC_TypeDef *CRCx) * @param CRCx CRC Instance * @retval Current CRC calculation result as stored in CRC_DR register (8 bits). */ -__STATIC_INLINE uint8_t LL_CRC_ReadData8(CRC_TypeDef *CRCx) +__STATIC_INLINE uint8_t LL_CRC_ReadData8(const CRC_TypeDef *CRCx) { return (uint8_t)READ_REG(CRCx->DR); } @@ -404,7 +404,7 @@ __STATIC_INLINE uint8_t LL_CRC_ReadData8(CRC_TypeDef *CRCx) * @param CRCx CRC Instance * @retval Current CRC calculation result as stored in CRC_DR register (7 bits). */ -__STATIC_INLINE uint8_t LL_CRC_ReadData7(CRC_TypeDef *CRCx) +__STATIC_INLINE uint8_t LL_CRC_ReadData7(const CRC_TypeDef *CRCx) { return (uint8_t)(READ_REG(CRCx->DR) & 0x7FU); } diff --git a/Software/Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_ll_i2c.h b/Software/Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_ll_i2c.h index e9a7952..5703a91 100644 --- a/Software/Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_ll_i2c.h +++ b/Software/Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_ll_i2c.h @@ -2135,11 +2135,18 @@ __STATIC_INLINE uint32_t LL_I2C_GetSlaveAddr(const I2C_TypeDef *I2Cx) __STATIC_INLINE void LL_I2C_HandleTransfer(I2C_TypeDef *I2Cx, uint32_t SlaveAddr, uint32_t SlaveAddrSize, uint32_t TransferSize, uint32_t EndMode, uint32_t Request) { + /* Declaration of tmp to prevent undefined behavior of volatile usage */ + uint32_t tmp = ((uint32_t)(((uint32_t)SlaveAddr & I2C_CR2_SADD) | \ + ((uint32_t)SlaveAddrSize & I2C_CR2_ADD10) | \ + (((uint32_t)TransferSize << I2C_CR2_NBYTES_Pos) & I2C_CR2_NBYTES) | \ + (uint32_t)EndMode | (uint32_t)Request) & (~0x80000000U)); + + /* update CR2 register */ MODIFY_REG(I2Cx->CR2, I2C_CR2_SADD | I2C_CR2_ADD10 | (I2C_CR2_RD_WRN & (uint32_t)(Request >> (31U - I2C_CR2_RD_WRN_Pos))) | I2C_CR2_START | I2C_CR2_STOP | I2C_CR2_RELOAD | I2C_CR2_NBYTES | I2C_CR2_AUTOEND | I2C_CR2_HEAD10R, - SlaveAddr | SlaveAddrSize | (TransferSize << I2C_CR2_NBYTES_Pos) | EndMode | Request); + tmp); } /** diff --git a/Software/Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_ll_iwdg.h b/Software/Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_ll_iwdg.h index 901482d..24cd238 100644 --- a/Software/Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_ll_iwdg.h +++ b/Software/Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_ll_iwdg.h @@ -208,7 +208,7 @@ __STATIC_INLINE void LL_IWDG_SetPrescaler(IWDG_TypeDef *IWDGx, uint32_t Prescale * @arg @ref LL_IWDG_PRESCALER_128 * @arg @ref LL_IWDG_PRESCALER_256 */ -__STATIC_INLINE uint32_t LL_IWDG_GetPrescaler(IWDG_TypeDef *IWDGx) +__STATIC_INLINE uint32_t LL_IWDG_GetPrescaler(const IWDG_TypeDef *IWDGx) { return (READ_REG(IWDGx->PR)); } @@ -231,7 +231,7 @@ __STATIC_INLINE void LL_IWDG_SetReloadCounter(IWDG_TypeDef *IWDGx, uint32_t Coun * @param IWDGx IWDG Instance * @retval Value between Min_Data=0 and Max_Data=0x0FFF */ -__STATIC_INLINE uint32_t LL_IWDG_GetReloadCounter(IWDG_TypeDef *IWDGx) +__STATIC_INLINE uint32_t LL_IWDG_GetReloadCounter(const IWDG_TypeDef *IWDGx) { return (READ_REG(IWDGx->RLR)); } @@ -254,7 +254,7 @@ __STATIC_INLINE void LL_IWDG_SetWindow(IWDG_TypeDef *IWDGx, uint32_t Window) * @param IWDGx IWDG Instance * @retval Value between Min_Data=0 and Max_Data=0x0FFF */ -__STATIC_INLINE uint32_t LL_IWDG_GetWindow(IWDG_TypeDef *IWDGx) +__STATIC_INLINE uint32_t LL_IWDG_GetWindow(const IWDG_TypeDef *IWDGx) { return (READ_REG(IWDGx->WINR)); } @@ -273,7 +273,7 @@ __STATIC_INLINE uint32_t LL_IWDG_GetWindow(IWDG_TypeDef *IWDGx) * @param IWDGx IWDG Instance * @retval State of bit (1 or 0). */ -__STATIC_INLINE uint32_t LL_IWDG_IsActiveFlag_PVU(IWDG_TypeDef *IWDGx) +__STATIC_INLINE uint32_t LL_IWDG_IsActiveFlag_PVU(const IWDG_TypeDef *IWDGx) { return ((READ_BIT(IWDGx->SR, IWDG_SR_PVU) == (IWDG_SR_PVU)) ? 1UL : 0UL); } @@ -284,7 +284,7 @@ __STATIC_INLINE uint32_t LL_IWDG_IsActiveFlag_PVU(IWDG_TypeDef *IWDGx) * @param IWDGx IWDG Instance * @retval State of bit (1 or 0). */ -__STATIC_INLINE uint32_t LL_IWDG_IsActiveFlag_RVU(IWDG_TypeDef *IWDGx) +__STATIC_INLINE uint32_t LL_IWDG_IsActiveFlag_RVU(const IWDG_TypeDef *IWDGx) { return ((READ_BIT(IWDGx->SR, IWDG_SR_RVU) == (IWDG_SR_RVU)) ? 1UL : 0UL); } @@ -295,7 +295,7 @@ __STATIC_INLINE uint32_t LL_IWDG_IsActiveFlag_RVU(IWDG_TypeDef *IWDGx) * @param IWDGx IWDG Instance * @retval State of bit (1 or 0). */ -__STATIC_INLINE uint32_t LL_IWDG_IsActiveFlag_WVU(IWDG_TypeDef *IWDGx) +__STATIC_INLINE uint32_t LL_IWDG_IsActiveFlag_WVU(const IWDG_TypeDef *IWDGx) { return ((READ_BIT(IWDGx->SR, IWDG_SR_WVU) == (IWDG_SR_WVU)) ? 1UL : 0UL); } @@ -308,7 +308,7 @@ __STATIC_INLINE uint32_t LL_IWDG_IsActiveFlag_WVU(IWDG_TypeDef *IWDGx) * @param IWDGx IWDG Instance * @retval State of bits (1 or 0). */ -__STATIC_INLINE uint32_t LL_IWDG_IsReady(IWDG_TypeDef *IWDGx) +__STATIC_INLINE uint32_t LL_IWDG_IsReady(const IWDG_TypeDef *IWDGx) { return ((READ_BIT(IWDGx->SR, IWDG_SR_PVU | IWDG_SR_RVU | IWDG_SR_WVU) == 0U) ? 1UL : 0UL); } diff --git a/Software/Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_ll_rtc.h b/Software/Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_ll_rtc.h index 68c1312..443fc04 100644 --- a/Software/Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_ll_rtc.h +++ b/Software/Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_ll_rtc.h @@ -377,8 +377,8 @@ typedef struct /** @defgroup RTC_LL_EC_TIMESTAMP_EDGE TIMESTAMP EDGE * @{ */ -#define LL_RTC_TIMESTAMP_EDGE_RISING 0x00000000U /*!< RTC_TS input rising edge generates a time-stamp event */ -#define LL_RTC_TIMESTAMP_EDGE_FALLING RTC_CR_TSEDGE /*!< RTC_TS input falling edge generates a time-stamp even */ +#define LL_RTC_TIMESTAMP_EDGE_RISING 0x00000000U /*!< RTC_TS input rising edge generates a time-stamp event */ +#define LL_RTC_TIMESTAMP_EDGE_FALLING RTC_CR_TSEDGE /*!< RTC_TS input falling edge generates a time-stamp event */ /** * @} */ @@ -1037,7 +1037,7 @@ __STATIC_INLINE void LL_RTC_TIME_SetFormat(RTC_TypeDef *RTCx, uint32_t TimeForma /** * @brief Get time format (AM or PM notation) - * @note if shadow mode is disabled (BYPSHAD=0), need to check if RSF flag is set + * @note if RTC shadow registers are not bypassed (BYPSHAD=0), need to check if RSF flag is set * before reading this bit * @note Read either RTC_SSR or RTC_TR locks the values in the higher-order calendar * shadow registers until RTC_DR is read (LL_RTC_ReadReg(RTC, DR)). @@ -1071,7 +1071,7 @@ __STATIC_INLINE void LL_RTC_TIME_SetHour(RTC_TypeDef *RTCx, uint32_t Hours) /** * @brief Get Hours in BCD format - * @note if shadow mode is disabled (BYPSHAD=0), need to check if RSF flag is set + * @note if RTC shadow registers are not bypassed (BYPSHAD=0), need to check if RSF flag is set * before reading this bit * @note Read either RTC_SSR or RTC_TR locks the values in the higher-order calendar * shadow registers until RTC_DR is read (LL_RTC_ReadReg(RTC, DR)). @@ -1106,7 +1106,7 @@ __STATIC_INLINE void LL_RTC_TIME_SetMinute(RTC_TypeDef *RTCx, uint32_t Minutes) /** * @brief Get Minutes in BCD format - * @note if shadow mode is disabled (BYPSHAD=0), need to check if RSF flag is set + * @note if RTC shadow registers are not bypassed (BYPSHAD=0), need to check if RSF flag is set * before reading this bit * @note Read either RTC_SSR or RTC_TR locks the values in the higher-order calendar * shadow registers until RTC_DR is read (LL_RTC_ReadReg(RTC, DR)). @@ -1141,7 +1141,7 @@ __STATIC_INLINE void LL_RTC_TIME_SetSecond(RTC_TypeDef *RTCx, uint32_t Seconds) /** * @brief Get Seconds in BCD format - * @note if shadow mode is disabled (BYPSHAD=0), need to check if RSF flag is set + * @note if RTC shadow registers are not bypassed (BYPSHAD=0), need to check if RSF flag is set * before reading this bit * @note Read either RTC_SSR or RTC_TR locks the values in the higher-order calendar * shadow registers until RTC_DR is read (LL_RTC_ReadReg(RTC, DR)). @@ -1191,7 +1191,7 @@ __STATIC_INLINE void LL_RTC_TIME_Config(RTC_TypeDef *RTCx, uint32_t Format12_24, /** * @brief Get time (hour, minute and second) in BCD format - * @note if shadow mode is disabled (BYPSHAD=0), need to check if RSF flag is set + * @note if RTC shadow registers are not bypassed (BYPSHAD=0), need to check if RSF flag is set * before reading this bit * @note Read either RTC_SSR or RTC_TR locks the values in the higher-order calendar * shadow registers until RTC_DR is read (LL_RTC_ReadReg(RTC, DR)). @@ -1333,7 +1333,7 @@ __STATIC_INLINE void LL_RTC_DATE_SetYear(RTC_TypeDef *RTCx, uint32_t Year) /** * @brief Get Year in BCD format - * @note if shadow mode is disabled (BYPSHAD=0), need to check if RSF flag is set + * @note if RTC shadow registers are not bypassed (BYPSHAD=0), need to check if RSF flag is set * before reading this bit * @note helper macro __LL_RTC_CONVERT_BCD2BIN is available to convert Year from BCD to Binary format * @rmtoll DR YT LL_RTC_DATE_GetYear\n @@ -1367,7 +1367,7 @@ __STATIC_INLINE void LL_RTC_DATE_SetWeekDay(RTC_TypeDef *RTCx, uint32_t WeekDay) /** * @brief Get Week day - * @note if shadow mode is disabled (BYPSHAD=0), need to check if RSF flag is set + * @note if RTC shadow registers are not bypassed (BYPSHAD=0), need to check if RSF flag is set * before reading this bit * @rmtoll DR WDU LL_RTC_DATE_GetWeekDay * @param RTCx RTC Instance @@ -1414,7 +1414,7 @@ __STATIC_INLINE void LL_RTC_DATE_SetMonth(RTC_TypeDef *RTCx, uint32_t Month) /** * @brief Get Month in BCD format - * @note if shadow mode is disabled (BYPSHAD=0), need to check if RSF flag is set + * @note if RTC shadow registers are not bypassed (BYPSHAD=0), need to check if RSF flag is set * before reading this bit * @note helper macro __LL_RTC_CONVERT_BCD2BIN is available to convert Month from BCD to Binary format * @rmtoll DR MT LL_RTC_DATE_GetMonth\n @@ -1456,7 +1456,7 @@ __STATIC_INLINE void LL_RTC_DATE_SetDay(RTC_TypeDef *RTCx, uint32_t Day) /** * @brief Get Day in BCD format - * @note if shadow mode is disabled (BYPSHAD=0), need to check if RSF flag is set + * @note if RTC shadow registers are not bypassed (BYPSHAD=0), need to check if RSF flag is set * before reading this bit * @note helper macro __LL_RTC_CONVERT_BCD2BIN is available to convert Day from BCD to Binary format * @rmtoll DR DT LL_RTC_DATE_GetDay\n @@ -1518,7 +1518,7 @@ __STATIC_INLINE void LL_RTC_DATE_Config(RTC_TypeDef *RTCx, uint32_t WeekDay, uin /** * @brief Get date (WeekDay, Day, Month and Year) in BCD format - * @note if shadow mode is disabled (BYPSHAD=0), need to check if RSF flag is set + * @note if RTC shadow registers are not bypassed (BYPSHAD=0), need to check if RSF flag is set * before reading this bit * @note helper macros __LL_RTC_GET_WEEKDAY, __LL_RTC_GET_YEAR, __LL_RTC_GET_MONTH, * and __LL_RTC_GET_DAY are available to get independently each parameter. diff --git a/Software/Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_ll_tim.h b/Software/Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_ll_tim.h index b2220b2..c55b222 100644 --- a/Software/Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_ll_tim.h +++ b/Software/Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_ll_tim.h @@ -559,10 +559,10 @@ typedef struct /** @defgroup TIM_LL_EC_COUNTERMODE Counter Mode * @{ */ -#define LL_TIM_COUNTERMODE_UP 0x00000000U /*!CR2, TIM_CR2_CCPC); } +/** + * @brief Indicates whether the capture/compare control bits (CCxE, CCxNE and OCxM) preload is enabled. + * @rmtoll CR2 CCPC LL_TIM_CC_IsEnabledPreload + * @param TIMx Timer instance + * @retval State of bit (1 or 0). + */ +__STATIC_INLINE uint32_t LL_TIM_CC_IsEnabledPreload(const TIM_TypeDef *TIMx) +{ + return ((READ_BIT(TIMx->CR2, TIM_CR2_CCPC) == (TIM_CR2_CCPC)) ? 1UL : 0UL); +} + /** * @brief Set the updated source of the capture/compare control bits (CCxE, CCxNE and OCxM). * @note Macro IS_TIM_COMMUTATION_EVENT_INSTANCE(TIMx) can be used to check diff --git a/Software/Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_ll_usb.h b/Software/Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_ll_usb.h index 71c3c8d..d9cfc3e 100644 --- a/Software/Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_ll_usb.h +++ b/Software/Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_ll_usb.h @@ -53,26 +53,26 @@ typedef enum */ typedef struct { - uint32_t dev_endpoints; /*!< Device Endpoints number. + uint8_t dev_endpoints; /*!< Device Endpoints number. This parameter depends on the used USB core. This parameter must be a number between Min_Data = 1 and Max_Data = 15 */ - uint32_t speed; /*!< USB Core speed. - This parameter can be any value of @ref PCD_Speed/HCD_Speed - (HCD_SPEED_xxx, HCD_SPEED_xxx) */ + uint8_t speed; /*!< USB Core speed. + This parameter can be any value of @ref PCD_Speed/HCD_Speed + (HCD_SPEED_xxx, HCD_SPEED_xxx) */ - uint32_t ep0_mps; /*!< Set the Endpoint 0 Max Packet size. */ + uint8_t ep0_mps; /*!< Set the Endpoint 0 Max Packet size. */ - uint32_t phy_itface; /*!< Select the used PHY interface. - This parameter can be any value of @ref PCD_PHY_Module/HCD_PHY_Module */ + uint8_t phy_itface; /*!< Select the used PHY interface. + This parameter can be any value of @ref PCD_PHY_Module/HCD_PHY_Module */ - uint32_t Sof_enable; /*!< Enable or disable the output of the SOF signal. */ + uint8_t Sof_enable; /*!< Enable or disable the output of the SOF signal. */ - uint32_t low_power_enable; /*!< Enable or disable the low Power Mode. */ + uint8_t low_power_enable; /*!< Enable or disable the low Power Mode. */ - uint32_t lpm_enable; /*!< Enable or disable Link Power Management. */ + uint8_t lpm_enable; /*!< Enable or disable Link Power Management. */ - uint32_t battery_charging_enable; /*!< Enable or disable Battery charging. */ + uint8_t battery_charging_enable; /*!< Enable or disable Battery charging. */ } USB_CfgTypeDef; typedef struct @@ -192,6 +192,9 @@ HAL_StatusTypeDef USB_EnableGlobalInt(USB_TypeDef *USBx); HAL_StatusTypeDef USB_DisableGlobalInt(USB_TypeDef *USBx); HAL_StatusTypeDef USB_SetCurrentMode(USB_TypeDef *USBx, USB_ModeTypeDef mode); +HAL_StatusTypeDef USB_FlushRxFifo(USB_TypeDef const *USBx); +HAL_StatusTypeDef USB_FlushTxFifo(USB_TypeDef const *USBx, uint32_t num); + #if defined (HAL_PCD_MODULE_ENABLED) HAL_StatusTypeDef USB_ActivateEndpoint(USB_TypeDef *USBx, USB_EPTypeDef *ep); HAL_StatusTypeDef USB_DeactivateEndpoint(USB_TypeDef *USBx, USB_EPTypeDef *ep); @@ -205,14 +208,14 @@ HAL_StatusTypeDef USB_SetDevAddress(USB_TypeDef *USBx, uint8_t address); HAL_StatusTypeDef USB_DevConnect(USB_TypeDef *USBx); HAL_StatusTypeDef USB_DevDisconnect(USB_TypeDef *USBx); HAL_StatusTypeDef USB_StopDevice(USB_TypeDef *USBx); -uint32_t USB_ReadInterrupts(USB_TypeDef *USBx); +uint32_t USB_ReadInterrupts(USB_TypeDef const *USBx); HAL_StatusTypeDef USB_ActivateRemoteWakeup(USB_TypeDef *USBx); HAL_StatusTypeDef USB_DeActivateRemoteWakeup(USB_TypeDef *USBx); -void USB_WritePMA(USB_TypeDef *USBx, uint8_t *pbUsrBuf, +void USB_WritePMA(USB_TypeDef const *USBx, uint8_t *pbUsrBuf, uint16_t wPMABufAddr, uint16_t wNBytes); -void USB_ReadPMA(USB_TypeDef *USBx, uint8_t *pbUsrBuf, +void USB_ReadPMA(USB_TypeDef const *USBx, uint8_t *pbUsrBuf, uint16_t wPMABufAddr, uint16_t wNBytes); /** diff --git a/Software/Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_ll_utils.h b/Software/Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_ll_utils.h index 2a6091b..ec69ddb 100644 --- a/Software/Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_ll_utils.h +++ b/Software/Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_ll_utils.h @@ -213,7 +213,7 @@ __STATIC_INLINE uint32_t LL_GetFlashSize(void) * @param HCLKFrequency HCLK frequency in Hz (can be calculated thanks to RCC helper macro) * @note When a RTOS is used, it is recommended to avoid changing the SysTick * configuration by calling this function, for a delay use rather osDelay RTOS service. - * @param Ticks Number of ticks + * @param Ticks Frequency of Ticks (Hz) * @retval None */ __STATIC_INLINE void LL_InitTick(uint32_t HCLKFrequency, uint32_t Ticks) diff --git a/Software/Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_ll_wwdg.h b/Software/Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_ll_wwdg.h index 1898017..357959d 100644 --- a/Software/Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_ll_wwdg.h +++ b/Software/Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_ll_wwdg.h @@ -131,7 +131,7 @@ __STATIC_INLINE void LL_WWDG_Enable(WWDG_TypeDef *WWDGx) * @param WWDGx WWDG Instance * @retval State of bit (1 or 0). */ -__STATIC_INLINE uint32_t LL_WWDG_IsEnabled(WWDG_TypeDef *WWDGx) +__STATIC_INLINE uint32_t LL_WWDG_IsEnabled(const WWDG_TypeDef *WWDGx) { return ((READ_BIT(WWDGx->CR, WWDG_CR_WDGA) == (WWDG_CR_WDGA)) ? 1UL : 0UL); } @@ -158,7 +158,7 @@ __STATIC_INLINE void LL_WWDG_SetCounter(WWDG_TypeDef *WWDGx, uint32_t Counter) * @param WWDGx WWDG Instance * @retval 7 bit Watchdog Counter value */ -__STATIC_INLINE uint32_t LL_WWDG_GetCounter(WWDG_TypeDef *WWDGx) +__STATIC_INLINE uint32_t LL_WWDG_GetCounter(const WWDG_TypeDef *WWDGx) { return (READ_BIT(WWDGx->CR, WWDG_CR_T)); } @@ -191,7 +191,7 @@ __STATIC_INLINE void LL_WWDG_SetPrescaler(WWDG_TypeDef *WWDGx, uint32_t Prescale * @arg @ref LL_WWDG_PRESCALER_4 * @arg @ref LL_WWDG_PRESCALER_8 */ -__STATIC_INLINE uint32_t LL_WWDG_GetPrescaler(WWDG_TypeDef *WWDGx) +__STATIC_INLINE uint32_t LL_WWDG_GetPrescaler(const WWDG_TypeDef *WWDGx) { return (READ_BIT(WWDGx->CFR, WWDG_CFR_WDGTB)); } @@ -223,7 +223,7 @@ __STATIC_INLINE void LL_WWDG_SetWindow(WWDG_TypeDef *WWDGx, uint32_t Window) * @param WWDGx WWDG Instance * @retval 7 bit Watchdog Window value */ -__STATIC_INLINE uint32_t LL_WWDG_GetWindow(WWDG_TypeDef *WWDGx) +__STATIC_INLINE uint32_t LL_WWDG_GetWindow(const WWDG_TypeDef *WWDGx) { return (READ_BIT(WWDGx->CFR, WWDG_CFR_W)); } @@ -244,7 +244,7 @@ __STATIC_INLINE uint32_t LL_WWDG_GetWindow(WWDG_TypeDef *WWDGx) * @param WWDGx WWDG Instance * @retval State of bit (1 or 0). */ -__STATIC_INLINE uint32_t LL_WWDG_IsActiveFlag_EWKUP(WWDG_TypeDef *WWDGx) +__STATIC_INLINE uint32_t LL_WWDG_IsActiveFlag_EWKUP(const WWDG_TypeDef *WWDGx) { return ((READ_BIT(WWDGx->SR, WWDG_SR_EWIF) == (WWDG_SR_EWIF)) ? 1UL : 0UL); } @@ -286,7 +286,7 @@ __STATIC_INLINE void LL_WWDG_EnableIT_EWKUP(WWDG_TypeDef *WWDGx) * @param WWDGx WWDG Instance * @retval State of bit (1 or 0). */ -__STATIC_INLINE uint32_t LL_WWDG_IsEnabledIT_EWKUP(WWDG_TypeDef *WWDGx) +__STATIC_INLINE uint32_t LL_WWDG_IsEnabledIT_EWKUP(const WWDG_TypeDef *WWDGx) { return ((READ_BIT(WWDGx->CFR, WWDG_CFR_EWI) == (WWDG_CFR_EWI)) ? 1UL : 0UL); } diff --git a/Software/Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal.c b/Software/Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal.c index fdeb28a..78efc1f 100644 --- a/Software/Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal.c +++ b/Software/Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal.c @@ -56,7 +56,7 @@ */ #define __STM32F0xx_HAL_VERSION_MAIN (0x01U) /*!< [31:24] main version */ #define __STM32F0xx_HAL_VERSION_SUB1 (0x07U) /*!< [23:16] sub1 version */ -#define __STM32F0xx_HAL_VERSION_SUB2 (0x07U) /*!< [15:8] sub2 version */ +#define __STM32F0xx_HAL_VERSION_SUB2 (0x08U) /*!< [15:8] sub2 version */ #define __STM32F0xx_HAL_VERSION_RC (0x00U) /*!< [7:0] release candidate */ #define __STM32F0xx_HAL_VERSION ((__STM32F0xx_HAL_VERSION_MAIN << 24U)\ |(__STM32F0xx_HAL_VERSION_SUB1 << 16U)\ diff --git a/Software/Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c b/Software/Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c index 1d19e16..dec211e 100644 --- a/Software/Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c +++ b/Software/Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c @@ -33,7 +33,7 @@ (++) Enable the CAN interface clock using __HAL_RCC_CANx_CLK_ENABLE() (++) Configure CAN pins (+++) Enable the clock for the CAN GPIOs - (+++) Configure CAN pins as alternate function open-drain + (+++) Configure CAN pins as alternate function (++) In case of using interrupts (e.g. HAL_CAN_ActivateNotification()) (+++) Configure the CAN interrupt priority using HAL_NVIC_SetPriority() @@ -235,6 +235,7 @@ * @{ */ #define CAN_TIMEOUT_VALUE 10U +#define CAN_WAKEUP_TIMEOUT_COUNTER 1000000U /** * @} */ @@ -248,8 +249,8 @@ */ /** @defgroup CAN_Exported_Functions_Group1 Initialization and de-initialization functions - * @brief Initialization and Configuration functions - * + * @brief Initialization and Configuration functions + * @verbatim ============================================================================== ##### Initialization and de-initialization functions ##### @@ -328,7 +329,7 @@ HAL_StatusTypeDef HAL_CAN_Init(CAN_HandleTypeDef *hcan) /* Init the low level hardware: CLOCK, NVIC */ HAL_CAN_MspInit(hcan); } -#endif /* (USE_HAL_CAN_REGISTER_CALLBACKS) */ +#endif /* USE_HAL_CAN_REGISTER_CALLBACKS */ /* Request initialisation */ SET_BIT(hcan->Instance->MCR, CAN_MCR_INRQ); @@ -482,7 +483,7 @@ HAL_StatusTypeDef HAL_CAN_DeInit(CAN_HandleTypeDef *hcan) #else /* DeInit the low level hardware: CLOCK, NVIC */ HAL_CAN_MspDeInit(hcan); -#endif /* (USE_HAL_CAN_REGISTER_CALLBACKS) */ +#endif /* USE_HAL_CAN_REGISTER_CALLBACKS */ /* Reset the CAN peripheral */ SET_BIT(hcan->Instance->MCR, CAN_MCR_RESET); @@ -814,8 +815,8 @@ HAL_StatusTypeDef HAL_CAN_UnRegisterCallback(CAN_HandleTypeDef *hcan, HAL_CAN_Ca */ /** @defgroup CAN_Exported_Functions_Group2 Configuration functions - * @brief Configuration functions. - * + * @brief Configuration functions. + * @verbatim ============================================================================== ##### Configuration functions ##### @@ -954,8 +955,8 @@ HAL_StatusTypeDef HAL_CAN_ConfigFilter(CAN_HandleTypeDef *hcan, const CAN_Filter */ /** @defgroup CAN_Exported_Functions_Group3 Control functions - * @brief Control functions - * + * @brief Control functions + * @verbatim ============================================================================== ##### Control functions ##### @@ -1127,7 +1128,6 @@ HAL_StatusTypeDef HAL_CAN_RequestSleep(CAN_HandleTypeDef *hcan) HAL_StatusTypeDef HAL_CAN_WakeUp(CAN_HandleTypeDef *hcan) { __IO uint32_t count = 0; - uint32_t timeout = 1000000U; HAL_CAN_StateTypeDef state = hcan->State; if ((state == HAL_CAN_STATE_READY) || @@ -1143,15 +1143,14 @@ HAL_StatusTypeDef HAL_CAN_WakeUp(CAN_HandleTypeDef *hcan) count++; /* Check if timeout is reached */ - if (count > timeout) + if (count > CAN_WAKEUP_TIMEOUT_COUNTER) { /* Update error code */ hcan->ErrorCode |= HAL_CAN_ERROR_TIMEOUT; return HAL_ERROR; } - } - while ((hcan->Instance->MSR & CAN_MSR_SLAK) != 0U); + } while ((hcan->Instance->MSR & CAN_MSR_SLAK) != 0U); /* Return function status */ return HAL_OK; @@ -1604,8 +1603,8 @@ uint32_t HAL_CAN_GetRxFifoFillLevel(const CAN_HandleTypeDef *hcan, uint32_t RxFi */ /** @defgroup CAN_Exported_Functions_Group4 Interrupts management - * @brief Interrupts management - * + * @brief Interrupts management + * @verbatim ============================================================================== ##### Interrupts management ##### @@ -2070,8 +2069,8 @@ void HAL_CAN_IRQHandler(CAN_HandleTypeDef *hcan) */ /** @defgroup CAN_Exported_Functions_Group5 Callback functions - * @brief CAN Callback functions - * + * @brief CAN Callback functions + * @verbatim ============================================================================== ##### Callback functions ##### @@ -2320,8 +2319,8 @@ __weak void HAL_CAN_ErrorCallback(CAN_HandleTypeDef *hcan) */ /** @defgroup CAN_Exported_Functions_Group6 Peripheral State and Error functions - * @brief CAN Peripheral State functions - * + * @brief CAN Peripheral State functions + * @verbatim ============================================================================== ##### Peripheral State and Error functions ##### diff --git a/Software/Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_cortex.c b/Software/Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_cortex.c index 2569e81..02262ec 100644 --- a/Software/Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_cortex.c +++ b/Software/Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_cortex.c @@ -133,10 +133,13 @@ * @retval None */ void HAL_NVIC_SetPriority(IRQn_Type IRQn, uint32_t PreemptPriority, uint32_t SubPriority) -{ +{ /* Check the parameters */ assert_param(IS_NVIC_PREEMPTION_PRIORITY(PreemptPriority)); NVIC_SetPriority(IRQn,PreemptPriority); + + /* Prevent unused argument(s) compilation warning */ + UNUSED(SubPriority); } /** diff --git a/Software/Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_crc.c b/Software/Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_crc.c index e9d6a49..fd4ca2e 100644 --- a/Software/Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_crc.c +++ b/Software/Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_crc.c @@ -405,7 +405,7 @@ uint32_t HAL_CRC_Calculate(CRC_HandleTypeDef *hcrc, uint32_t pBuffer[], uint32_t * @param hcrc CRC handle * @retval HAL state */ -HAL_CRC_StateTypeDef HAL_CRC_GetState(CRC_HandleTypeDef *hcrc) +HAL_CRC_StateTypeDef HAL_CRC_GetState(const CRC_HandleTypeDef *hcrc) { /* Return CRC handle state */ return hcrc->State; diff --git a/Software/Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_crc_ex.c b/Software/Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_crc_ex.c index 063ddd5..d688a61 100644 --- a/Software/Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_crc_ex.c +++ b/Software/Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_crc_ex.c @@ -212,8 +212,6 @@ HAL_StatusTypeDef HAL_CRCEx_Output_Data_Reverse(CRC_HandleTypeDef *hcrc, uint32_ } - - /** * @} */ diff --git a/Software/Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_exti.c b/Software/Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_exti.c index 5247854..7a4c3f6 100644 --- a/Software/Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_exti.c +++ b/Software/Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_exti.c @@ -64,7 +64,7 @@ (++) Provide exiting handle as parameter. (++) Provide pointer on EXTI_ConfigTypeDef structure as second parameter. - (#) Clear Exti configuration of a dedicated line using HAL_EXTI_GetConfigLine(). + (#) Clear Exti configuration of a dedicated line using HAL_EXTI_ClearConfigLine(). (++) Provide exiting handle as parameter. (#) Register callback to treat Exti interrupts using HAL_EXTI_RegisterCallback(). @@ -75,7 +75,7 @@ (#) Get interrupt pending bit using HAL_EXTI_GetPending(). - (#) Clear interrupt pending bit using HAL_EXTI_GetPending(). + (#) Clear interrupt pending bit using HAL_EXTI_ClearPending(). (#) Generate software interrupt using HAL_EXTI_GenerateSWI(). diff --git a/Software/Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_gpio.c b/Software/Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_gpio.c index aa3a188..9c94691 100644 --- a/Software/Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_gpio.c +++ b/Software/Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_gpio.c @@ -456,7 +456,7 @@ void HAL_GPIO_TogglePin(GPIO_TypeDef* GPIOx, uint16_t GPIO_Pin) * until the next reset. * @param GPIOx where x can be (A..F) to select the GPIO peripheral for STM32F0 family * @param GPIO_Pin specifies the port bits to be locked. -* This parameter can be any combination of GPIO_Pin_x where x can be (0..15). +* This parameter can be any combination of GPIO_PIN_x where x can be (0..15). * @retval None */ HAL_StatusTypeDef HAL_GPIO_LockPin(GPIO_TypeDef* GPIOx, uint16_t GPIO_Pin) diff --git a/Software/Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c b/Software/Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c index 6a90c5f..47cd5d3 100644 --- a/Software/Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c +++ b/Software/Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c @@ -90,7 +90,7 @@ add their own code by customization of function pointer HAL_I2C_SlaveRxCpltCallback() (+) In case of transfer Error, HAL_I2C_ErrorCallback() function is executed and users can add their own code by customization of function pointer HAL_I2C_ErrorCallback() - (+) Abort a master I2C process communication with Interrupt using HAL_I2C_Master_Abort_IT() + (+) Abort a master or memory I2C process communication with Interrupt using HAL_I2C_Master_Abort_IT() (+) End of abort process, HAL_I2C_AbortCpltCallback() is executed and users can add their own code by customization of function pointer HAL_I2C_AbortCpltCallback() (+) Discard a slave I2C process communication using __HAL_I2C_GENERATE_NACK() macro. @@ -156,7 +156,7 @@ HAL_I2C_Master_Seq_Receive_IT() or using HAL_I2C_Master_Seq_Receive_DMA() (+++) At reception end of current frame transfer, HAL_I2C_MasterRxCpltCallback() is executed and users can add their own code by customization of function pointer HAL_I2C_MasterRxCpltCallback() - (++) Abort a master IT or DMA I2C process communication with Interrupt using HAL_I2C_Master_Abort_IT() + (++) Abort a master or memory IT or DMA I2C process communication with Interrupt using HAL_I2C_Master_Abort_IT() (+++) End of abort process, HAL_I2C_AbortCpltCallback() is executed and users can add their own code by customization of function pointer HAL_I2C_AbortCpltCallback() (++) Enable/disable the Address listen mode in slave I2C mode using HAL_I2C_EnableListen_IT() @@ -214,7 +214,7 @@ add their own code by customization of function pointer HAL_I2C_SlaveRxCpltCallback() (+) In case of transfer Error, HAL_I2C_ErrorCallback() function is executed and users can add their own code by customization of function pointer HAL_I2C_ErrorCallback() - (+) Abort a master I2C process communication with Interrupt using HAL_I2C_Master_Abort_IT() + (+) Abort a master or memory I2C process communication with Interrupt using HAL_I2C_Master_Abort_IT() (+) End of abort process, HAL_I2C_AbortCpltCallback() is executed and users can add their own code by customization of function pointer HAL_I2C_AbortCpltCallback() (+) Discard a slave I2C process communication using __HAL_I2C_GENERATE_NACK() macro. @@ -608,7 +608,12 @@ HAL_StatusTypeDef HAL_I2C_Init(I2C_HandleTypeDef *hi2c) /* Configure I2Cx: Addressing Master mode */ if (hi2c->Init.AddressingMode == I2C_ADDRESSINGMODE_10BIT) { - hi2c->Instance->CR2 = (I2C_CR2_ADD10); + SET_BIT(hi2c->Instance->CR2, I2C_CR2_ADD10); + } + else + { + /* Clear the I2C ADD10 bit */ + CLEAR_BIT(hi2c->Instance->CR2, I2C_CR2_ADD10); } /* Enable the AUTOEND by default, and enable NACK (should be disable only during Slave process */ hi2c->Instance->CR2 |= (I2C_CR2_AUTOEND | I2C_CR2_NACK); @@ -1115,6 +1120,7 @@ HAL_StatusTypeDef HAL_I2C_Master_Transmit(I2C_HandleTypeDef *hi2c, uint16_t DevA uint16_t Size, uint32_t Timeout) { uint32_t tickstart; + uint32_t xfermode; if (hi2c->State == HAL_I2C_STATE_READY) { @@ -1138,18 +1144,39 @@ HAL_StatusTypeDef HAL_I2C_Master_Transmit(I2C_HandleTypeDef *hi2c, uint16_t DevA hi2c->XferCount = Size; hi2c->XferISR = NULL; - /* Send Slave Address */ - /* Set NBYTES to write and reload if hi2c->XferCount > MAX_NBYTE_SIZE and generate RESTART */ if (hi2c->XferCount > MAX_NBYTE_SIZE) { hi2c->XferSize = MAX_NBYTE_SIZE; - I2C_TransferConfig(hi2c, DevAddress, (uint8_t)hi2c->XferSize, I2C_RELOAD_MODE, - I2C_GENERATE_START_WRITE); + xfermode = I2C_RELOAD_MODE; } else { hi2c->XferSize = hi2c->XferCount; - I2C_TransferConfig(hi2c, DevAddress, (uint8_t)hi2c->XferSize, I2C_AUTOEND_MODE, + xfermode = I2C_AUTOEND_MODE; + } + + if (hi2c->XferSize > 0U) + { + /* Preload TX register */ + /* Write data to TXDR */ + hi2c->Instance->TXDR = *hi2c->pBuffPtr; + + /* Increment Buffer pointer */ + hi2c->pBuffPtr++; + + hi2c->XferCount--; + hi2c->XferSize--; + + /* Send Slave Address */ + /* Set NBYTES to write and reload if hi2c->XferCount > MAX_NBYTE_SIZE and generate RESTART */ + I2C_TransferConfig(hi2c, DevAddress, (uint8_t)(hi2c->XferSize + 1U), xfermode, + I2C_GENERATE_START_WRITE); + } + else + { + /* Send Slave Address */ + /* Set NBYTES to write and reload if hi2c->XferCount > MAX_NBYTE_SIZE and generate RESTART */ + I2C_TransferConfig(hi2c, DevAddress, (uint8_t)hi2c->XferSize, xfermode, I2C_GENERATE_START_WRITE); } @@ -1261,7 +1288,7 @@ HAL_StatusTypeDef HAL_I2C_Master_Receive(I2C_HandleTypeDef *hi2c, uint16_t DevAd /* Set NBYTES to write and reload if hi2c->XferCount > MAX_NBYTE_SIZE and generate RESTART */ if (hi2c->XferCount > MAX_NBYTE_SIZE) { - hi2c->XferSize = MAX_NBYTE_SIZE; + hi2c->XferSize = 1U; I2C_TransferConfig(hi2c, DevAddress, (uint8_t)hi2c->XferSize, I2C_RELOAD_MODE, I2C_GENERATE_START_READ); } @@ -1352,6 +1379,8 @@ HAL_StatusTypeDef HAL_I2C_Slave_Transmit(I2C_HandleTypeDef *hi2c, uint8_t *pData uint32_t Timeout) { uint32_t tickstart; + uint16_t tmpXferCount; + HAL_StatusTypeDef error; if (hi2c->State == HAL_I2C_STATE_READY) { @@ -1378,14 +1407,6 @@ HAL_StatusTypeDef HAL_I2C_Slave_Transmit(I2C_HandleTypeDef *hi2c, uint8_t *pData /* Enable Address Acknowledge */ hi2c->Instance->CR2 &= ~I2C_CR2_NACK; - /* Wait until ADDR flag is set */ - if (I2C_WaitOnFlagUntilTimeout(hi2c, I2C_FLAG_ADDR, RESET, Timeout, tickstart) != HAL_OK) - { - /* Disable Address Acknowledge */ - hi2c->Instance->CR2 |= I2C_CR2_NACK; - return HAL_ERROR; - } - /* Preload TX data if no stretch enable */ if (hi2c->Init.NoStretchMode == I2C_NOSTRETCH_ENABLE) { @@ -1399,6 +1420,18 @@ HAL_StatusTypeDef HAL_I2C_Slave_Transmit(I2C_HandleTypeDef *hi2c, uint8_t *pData hi2c->XferCount--; } + /* Wait until ADDR flag is set */ + if (I2C_WaitOnFlagUntilTimeout(hi2c, I2C_FLAG_ADDR, RESET, Timeout, tickstart) != HAL_OK) + { + /* Disable Address Acknowledge */ + hi2c->Instance->CR2 |= I2C_CR2_NACK; + + /* Flush TX register */ + I2C_Flush_TXDR(hi2c); + + return HAL_ERROR; + } + /* Clear ADDR flag */ __HAL_I2C_CLEAR_FLAG(hi2c, I2C_FLAG_ADDR); @@ -1410,6 +1443,10 @@ HAL_StatusTypeDef HAL_I2C_Slave_Transmit(I2C_HandleTypeDef *hi2c, uint8_t *pData { /* Disable Address Acknowledge */ hi2c->Instance->CR2 |= I2C_CR2_NACK; + + /* Flush TX register */ + I2C_Flush_TXDR(hi2c); + return HAL_ERROR; } @@ -1422,6 +1459,10 @@ HAL_StatusTypeDef HAL_I2C_Slave_Transmit(I2C_HandleTypeDef *hi2c, uint8_t *pData { /* Disable Address Acknowledge */ hi2c->Instance->CR2 |= I2C_CR2_NACK; + + /* Flush TX register */ + I2C_Flush_TXDR(hi2c); + return HAL_ERROR; } @@ -1445,31 +1486,48 @@ HAL_StatusTypeDef HAL_I2C_Slave_Transmit(I2C_HandleTypeDef *hi2c, uint8_t *pData } /* Wait until AF flag is set */ - if (I2C_WaitOnFlagUntilTimeout(hi2c, I2C_FLAG_AF, RESET, Timeout, tickstart) != HAL_OK) + error = I2C_WaitOnFlagUntilTimeout(hi2c, I2C_FLAG_AF, RESET, Timeout, tickstart); + + if (error != HAL_OK) { - /* Disable Address Acknowledge */ - hi2c->Instance->CR2 |= I2C_CR2_NACK; - return HAL_ERROR; + /* Check that I2C transfer finished */ + /* if yes, normal use case, a NACK is sent by the MASTER when Transfer is finished */ + /* Mean XferCount == 0 */ + + tmpXferCount = hi2c->XferCount; + if ((hi2c->ErrorCode == HAL_I2C_ERROR_AF) && (tmpXferCount == 0U)) + { + /* Reset ErrorCode to NONE */ + hi2c->ErrorCode = HAL_I2C_ERROR_NONE; + } + else + { + /* Disable Address Acknowledge */ + hi2c->Instance->CR2 |= I2C_CR2_NACK; + return HAL_ERROR; + } } - - /* Flush TX register */ - I2C_Flush_TXDR(hi2c); - - /* Clear AF flag */ - __HAL_I2C_CLEAR_FLAG(hi2c, I2C_FLAG_AF); - - /* Wait until STOP flag is set */ - if (I2C_WaitOnSTOPFlagUntilTimeout(hi2c, Timeout, tickstart) != HAL_OK) + else { - /* Disable Address Acknowledge */ - hi2c->Instance->CR2 |= I2C_CR2_NACK; + /* Flush TX register */ + I2C_Flush_TXDR(hi2c); - return HAL_ERROR; + /* Clear AF flag */ + __HAL_I2C_CLEAR_FLAG(hi2c, I2C_FLAG_AF); + + /* Wait until STOP flag is set */ + if (I2C_WaitOnSTOPFlagUntilTimeout(hi2c, Timeout, tickstart) != HAL_OK) + { + /* Disable Address Acknowledge */ + hi2c->Instance->CR2 |= I2C_CR2_NACK; + + return HAL_ERROR; + } + + /* Clear STOP flag */ + __HAL_I2C_CLEAR_FLAG(hi2c, I2C_FLAG_STOPF); } - /* Clear STOP flag */ - __HAL_I2C_CLEAR_FLAG(hi2c, I2C_FLAG_STOPF); - /* Wait until BUSY flag is reset */ if (I2C_WaitOnFlagUntilTimeout(hi2c, I2C_FLAG_BUSY, SET, Timeout, tickstart) != HAL_OK) { @@ -1672,7 +1730,26 @@ HAL_StatusTypeDef HAL_I2C_Master_Transmit_IT(I2C_HandleTypeDef *hi2c, uint16_t D /* Send Slave Address */ /* Set NBYTES to write and reload if hi2c->XferCount > MAX_NBYTE_SIZE */ - I2C_TransferConfig(hi2c, DevAddress, (uint8_t)hi2c->XferSize, xfermode, I2C_GENERATE_START_WRITE); + if (hi2c->XferSize > 0U) + { + /* Preload TX register */ + /* Write data to TXDR */ + hi2c->Instance->TXDR = *hi2c->pBuffPtr; + + /* Increment Buffer pointer */ + hi2c->pBuffPtr++; + + hi2c->XferCount--; + hi2c->XferSize--; + + I2C_TransferConfig(hi2c, DevAddress, (uint8_t)(hi2c->XferSize + 1U), xfermode, + I2C_GENERATE_START_WRITE); + } + else + { + I2C_TransferConfig(hi2c, DevAddress, (uint8_t)hi2c->XferSize, xfermode, + I2C_GENERATE_START_WRITE); + } /* Process Unlocked */ __HAL_UNLOCK(hi2c); @@ -1732,7 +1809,7 @@ HAL_StatusTypeDef HAL_I2C_Master_Receive_IT(I2C_HandleTypeDef *hi2c, uint16_t De if (hi2c->XferCount > MAX_NBYTE_SIZE) { - hi2c->XferSize = MAX_NBYTE_SIZE; + hi2c->XferSize = 1U; xfermode = I2C_RELOAD_MODE; } else @@ -1895,6 +1972,7 @@ HAL_StatusTypeDef HAL_I2C_Master_Transmit_DMA(I2C_HandleTypeDef *hi2c, uint16_t { uint32_t xfermode; HAL_StatusTypeDef dmaxferstatus; + uint32_t sizetoxfer = 0U; if (hi2c->State == HAL_I2C_STATE_READY) { @@ -1927,6 +2005,20 @@ HAL_StatusTypeDef HAL_I2C_Master_Transmit_DMA(I2C_HandleTypeDef *hi2c, uint16_t xfermode = I2C_AUTOEND_MODE; } + if (hi2c->XferSize > 0U) + { + /* Preload TX register */ + /* Write data to TXDR */ + hi2c->Instance->TXDR = *hi2c->pBuffPtr; + + /* Increment Buffer pointer */ + hi2c->pBuffPtr++; + + sizetoxfer = hi2c->XferSize; + hi2c->XferCount--; + hi2c->XferSize--; + } + if (hi2c->XferSize > 0U) { if (hi2c->hdmatx != NULL) @@ -1942,8 +2034,8 @@ HAL_StatusTypeDef HAL_I2C_Master_Transmit_DMA(I2C_HandleTypeDef *hi2c, uint16_t hi2c->hdmatx->XferAbortCallback = NULL; /* Enable the DMA channel */ - dmaxferstatus = HAL_DMA_Start_IT(hi2c->hdmatx, (uint32_t)pData, (uint32_t)&hi2c->Instance->TXDR, - hi2c->XferSize); + dmaxferstatus = HAL_DMA_Start_IT(hi2c->hdmatx, (uint32_t)hi2c->pBuffPtr, + (uint32_t)&hi2c->Instance->TXDR, hi2c->XferSize); } else { @@ -1964,7 +2056,8 @@ HAL_StatusTypeDef HAL_I2C_Master_Transmit_DMA(I2C_HandleTypeDef *hi2c, uint16_t { /* Send Slave Address */ /* Set NBYTES to write and reload if hi2c->XferCount > MAX_NBYTE_SIZE and generate RESTART */ - I2C_TransferConfig(hi2c, DevAddress, (uint8_t)hi2c->XferSize, xfermode, I2C_GENERATE_START_WRITE); + I2C_TransferConfig(hi2c, DevAddress, (uint8_t)(hi2c->XferSize + 1U), + xfermode, I2C_GENERATE_START_WRITE); /* Update XferCount value */ hi2c->XferCount -= hi2c->XferSize; @@ -2003,7 +2096,7 @@ HAL_StatusTypeDef HAL_I2C_Master_Transmit_DMA(I2C_HandleTypeDef *hi2c, uint16_t /* Send Slave Address */ /* Set NBYTES to write and generate START condition */ - I2C_TransferConfig(hi2c, DevAddress, (uint8_t)hi2c->XferSize, I2C_AUTOEND_MODE, + I2C_TransferConfig(hi2c, DevAddress, (uint8_t)sizetoxfer, I2C_AUTOEND_MODE, I2C_GENERATE_START_WRITE); /* Process Unlocked */ @@ -2065,7 +2158,7 @@ HAL_StatusTypeDef HAL_I2C_Master_Receive_DMA(I2C_HandleTypeDef *hi2c, uint16_t D if (hi2c->XferCount > MAX_NBYTE_SIZE) { - hi2c->XferSize = MAX_NBYTE_SIZE; + hi2c->XferSize = 1U; xfermode = I2C_RELOAD_MODE; } else @@ -2159,11 +2252,11 @@ HAL_StatusTypeDef HAL_I2C_Master_Receive_DMA(I2C_HandleTypeDef *hi2c, uint16_t D /* Note : The I2C interrupts must be enabled after unlocking current process to avoid the risk of I2C interrupt handle execution before current process unlock */ - /* Enable ERR, TC, STOP, NACK, TXI interrupt */ + /* Enable ERR, TC, STOP, NACK, RXI interrupt */ /* possible to enable all of these */ /* I2C_IT_ERRI | I2C_IT_TCI | I2C_IT_STOPI | I2C_IT_NACKI | I2C_IT_ADDRI | I2C_IT_RXI | I2C_IT_TXI */ - I2C_Enable_IRQ(hi2c, I2C_XFER_TX_IT); + I2C_Enable_IRQ(hi2c, I2C_XFER_RX_IT); } return HAL_OK; @@ -2612,7 +2705,7 @@ HAL_StatusTypeDef HAL_I2C_Mem_Read(I2C_HandleTypeDef *hi2c, uint16_t DevAddress, /* Set NBYTES to write and reload if hi2c->XferCount > MAX_NBYTE_SIZE and generate RESTART */ if (hi2c->XferCount > MAX_NBYTE_SIZE) { - hi2c->XferSize = MAX_NBYTE_SIZE; + hi2c->XferSize = 1U; I2C_TransferConfig(hi2c, DevAddress, (uint8_t)hi2c->XferSize, I2C_RELOAD_MODE, I2C_GENERATE_START_READ); } @@ -2650,7 +2743,7 @@ HAL_StatusTypeDef HAL_I2C_Mem_Read(I2C_HandleTypeDef *hi2c, uint16_t DevAddress, if (hi2c->XferCount > MAX_NBYTE_SIZE) { - hi2c->XferSize = MAX_NBYTE_SIZE; + hi2c->XferSize = 1U; I2C_TransferConfig(hi2c, DevAddress, (uint8_t) hi2c->XferSize, I2C_RELOAD_MODE, I2C_NO_STARTSTOP); } @@ -2728,6 +2821,7 @@ HAL_StatusTypeDef HAL_I2C_Mem_Write_IT(I2C_HandleTypeDef *hi2c, uint16_t DevAddr hi2c->ErrorCode = HAL_I2C_ERROR_NONE; /* Prepare transfer parameters */ + hi2c->XferSize = 0U; hi2c->pBuffPtr = pData; hi2c->XferCount = Size; hi2c->XferOptions = I2C_NO_OPTION_FRAME; @@ -2849,11 +2943,11 @@ HAL_StatusTypeDef HAL_I2C_Mem_Read_IT(I2C_HandleTypeDef *hi2c, uint16_t DevAddre to avoid the risk of I2C interrupt handle execution before current process unlock */ - /* Enable ERR, TC, STOP, NACK, RXI interrupt */ + /* Enable ERR, TC, STOP, NACK, TXI interrupt */ /* possible to enable all of these */ /* I2C_IT_ERRI | I2C_IT_TCI | I2C_IT_STOPI | I2C_IT_NACKI | I2C_IT_ADDRI | I2C_IT_RXI | I2C_IT_TXI */ - I2C_Enable_IRQ(hi2c, (I2C_XFER_TX_IT | I2C_XFER_RX_IT)); + I2C_Enable_IRQ(hi2c, I2C_XFER_TX_IT); return HAL_OK; } @@ -3259,22 +3353,6 @@ HAL_StatusTypeDef HAL_I2C_IsDeviceReady(I2C_HandleTypeDef *hi2c, uint16_t DevAdd __HAL_I2C_CLEAR_FLAG(hi2c, I2C_FLAG_STOPF); } - /* Check if the maximum allowed number of trials has been reached */ - if (I2C_Trials == Trials) - { - /* Generate Stop */ - hi2c->Instance->CR2 |= I2C_CR2_STOP; - - /* Wait until STOPF flag is reset */ - if (I2C_WaitOnFlagUntilTimeout(hi2c, I2C_FLAG_STOPF, RESET, Timeout, tickstart) != HAL_OK) - { - return HAL_ERROR; - } - - /* Clear STOP Flag */ - __HAL_I2C_CLEAR_FLAG(hi2c, I2C_FLAG_STOPF); - } - /* Increment Trials */ I2C_Trials++; } while (I2C_Trials < Trials); @@ -3313,6 +3391,7 @@ HAL_StatusTypeDef HAL_I2C_Master_Seq_Transmit_IT(I2C_HandleTypeDef *hi2c, uint16 { uint32_t xfermode; uint32_t xferrequest = I2C_GENERATE_START_WRITE; + uint32_t sizetoxfer = 0U; /* Check the parameters */ assert_param(IS_I2C_TRANSFER_OPTIONS_REQUEST(XferOptions)); @@ -3344,6 +3423,21 @@ HAL_StatusTypeDef HAL_I2C_Master_Seq_Transmit_IT(I2C_HandleTypeDef *hi2c, uint16 xfermode = hi2c->XferOptions; } + if ((hi2c->XferSize > 0U) && ((XferOptions == I2C_FIRST_FRAME) || \ + (XferOptions == I2C_FIRST_AND_LAST_FRAME))) + { + /* Preload TX register */ + /* Write data to TXDR */ + hi2c->Instance->TXDR = *hi2c->pBuffPtr; + + /* Increment Buffer pointer */ + hi2c->pBuffPtr++; + + sizetoxfer = hi2c->XferSize; + hi2c->XferCount--; + hi2c->XferSize--; + } + /* If transfer direction not change and there is no request to start another frame, do not generate Restart Condition */ /* Mean Previous state is same as current state */ @@ -3365,7 +3459,14 @@ HAL_StatusTypeDef HAL_I2C_Master_Seq_Transmit_IT(I2C_HandleTypeDef *hi2c, uint16 } /* Send Slave Address and set NBYTES to write */ - I2C_TransferConfig(hi2c, DevAddress, (uint8_t)hi2c->XferSize, xfermode, xferrequest); + if ((XferOptions == I2C_FIRST_FRAME) || (XferOptions == I2C_FIRST_AND_LAST_FRAME)) + { + I2C_TransferConfig(hi2c, DevAddress, (uint8_t)sizetoxfer, xfermode, xferrequest); + } + else + { + I2C_TransferConfig(hi2c, DevAddress, (uint8_t)hi2c->XferSize, xfermode, xferrequest); + } /* Process Unlocked */ __HAL_UNLOCK(hi2c); @@ -3405,6 +3506,7 @@ HAL_StatusTypeDef HAL_I2C_Master_Seq_Transmit_DMA(I2C_HandleTypeDef *hi2c, uint1 uint32_t xfermode; uint32_t xferrequest = I2C_GENERATE_START_WRITE; HAL_StatusTypeDef dmaxferstatus; + uint32_t sizetoxfer = 0U; /* Check the parameters */ assert_param(IS_I2C_TRANSFER_OPTIONS_REQUEST(XferOptions)); @@ -3436,6 +3538,21 @@ HAL_StatusTypeDef HAL_I2C_Master_Seq_Transmit_DMA(I2C_HandleTypeDef *hi2c, uint1 xfermode = hi2c->XferOptions; } + if ((hi2c->XferSize > 0U) && ((XferOptions == I2C_FIRST_FRAME) || \ + (XferOptions == I2C_FIRST_AND_LAST_FRAME))) + { + /* Preload TX register */ + /* Write data to TXDR */ + hi2c->Instance->TXDR = *hi2c->pBuffPtr; + + /* Increment Buffer pointer */ + hi2c->pBuffPtr++; + + sizetoxfer = hi2c->XferSize; + hi2c->XferCount--; + hi2c->XferSize--; + } + /* If transfer direction not change and there is no request to start another frame, do not generate Restart Condition */ /* Mean Previous state is same as current state */ @@ -3471,8 +3588,8 @@ HAL_StatusTypeDef HAL_I2C_Master_Seq_Transmit_DMA(I2C_HandleTypeDef *hi2c, uint1 hi2c->hdmatx->XferAbortCallback = NULL; /* Enable the DMA channel */ - dmaxferstatus = HAL_DMA_Start_IT(hi2c->hdmatx, (uint32_t)pData, (uint32_t)&hi2c->Instance->TXDR, - hi2c->XferSize); + dmaxferstatus = HAL_DMA_Start_IT(hi2c->hdmatx, (uint32_t)hi2c->pBuffPtr, + (uint32_t)&hi2c->Instance->TXDR, hi2c->XferSize); } else { @@ -3492,7 +3609,14 @@ HAL_StatusTypeDef HAL_I2C_Master_Seq_Transmit_DMA(I2C_HandleTypeDef *hi2c, uint1 if (dmaxferstatus == HAL_OK) { /* Send Slave Address and set NBYTES to write */ - I2C_TransferConfig(hi2c, DevAddress, (uint8_t)hi2c->XferSize, xfermode, xferrequest); + if ((XferOptions == I2C_FIRST_FRAME) || (XferOptions == I2C_FIRST_AND_LAST_FRAME)) + { + I2C_TransferConfig(hi2c, DevAddress, (uint8_t)sizetoxfer, xfermode, xferrequest); + } + else + { + I2C_TransferConfig(hi2c, DevAddress, (uint8_t)hi2c->XferSize, xfermode, xferrequest); + } /* Update XferCount value */ hi2c->XferCount -= hi2c->XferSize; @@ -3531,8 +3655,14 @@ HAL_StatusTypeDef HAL_I2C_Master_Seq_Transmit_DMA(I2C_HandleTypeDef *hi2c, uint1 /* Send Slave Address */ /* Set NBYTES to write and generate START condition */ - I2C_TransferConfig(hi2c, DevAddress, (uint8_t)hi2c->XferSize, I2C_AUTOEND_MODE, - I2C_GENERATE_START_WRITE); + if ((XferOptions == I2C_FIRST_FRAME) || (XferOptions == I2C_FIRST_AND_LAST_FRAME)) + { + I2C_TransferConfig(hi2c, DevAddress, (uint8_t)sizetoxfer, xfermode, xferrequest); + } + else + { + I2C_TransferConfig(hi2c, DevAddress, (uint8_t)hi2c->XferSize, xfermode, xferrequest); + } /* Process Unlocked */ __HAL_UNLOCK(hi2c); @@ -3795,11 +3925,11 @@ HAL_StatusTypeDef HAL_I2C_Master_Seq_Receive_DMA(I2C_HandleTypeDef *hi2c, uint16 /* Note : The I2C interrupts must be enabled after unlocking current process to avoid the risk of I2C interrupt handle execution before current process unlock */ - /* Enable ERR, TC, STOP, NACK, TXI interrupt */ + /* Enable ERR, TC, STOP, NACK, RXI interrupt */ /* possible to enable all of these */ /* I2C_IT_ERRI | I2C_IT_TCI | I2C_IT_STOPI | I2C_IT_NACKI | I2C_IT_ADDRI | I2C_IT_RXI | I2C_IT_TXI */ - I2C_Enable_IRQ(hi2c, I2C_XFER_TX_IT); + I2C_Enable_IRQ(hi2c, I2C_XFER_RX_IT); } return HAL_OK; @@ -4434,7 +4564,7 @@ HAL_StatusTypeDef HAL_I2C_DisableListen_IT(I2C_HandleTypeDef *hi2c) } /** - * @brief Abort a master I2C IT or DMA process communication with Interrupt. + * @brief Abort a master or memory I2C IT or DMA process communication with Interrupt. * @param hi2c Pointer to a I2C_HandleTypeDef structure that contains * the configuration information for the specified I2C. * @param DevAddress Target device address: The device 7 bits address value @@ -4443,7 +4573,9 @@ HAL_StatusTypeDef HAL_I2C_DisableListen_IT(I2C_HandleTypeDef *hi2c) */ HAL_StatusTypeDef HAL_I2C_Master_Abort_IT(I2C_HandleTypeDef *hi2c, uint16_t DevAddress) { - if (hi2c->Mode == HAL_I2C_MODE_MASTER) + HAL_I2C_ModeTypeDef tmp_mode = hi2c->Mode; + + if ((tmp_mode == HAL_I2C_MODE_MASTER) || (tmp_mode == HAL_I2C_MODE_MEM)) { /* Process Locked */ __HAL_LOCK(hi2c); @@ -4842,17 +4974,22 @@ static HAL_StatusTypeDef I2C_Master_ISR_IT(struct __I2C_HandleTypeDef *hi2c, uin hi2c->XferSize--; hi2c->XferCount--; } - else if ((I2C_CHECK_FLAG(tmpITFlags, I2C_FLAG_TXIS) != RESET) && \ - (I2C_CHECK_IT_SOURCE(ITSources, I2C_IT_TXI) != RESET)) + else if ((I2C_CHECK_FLAG(tmpITFlags, I2C_FLAG_TC) == RESET) && \ + ((I2C_CHECK_FLAG(tmpITFlags, I2C_FLAG_TXIS) != RESET) && \ + (I2C_CHECK_IT_SOURCE(ITSources, I2C_IT_TXI) != RESET))) { /* Write data to TXDR */ - hi2c->Instance->TXDR = *hi2c->pBuffPtr; + if (hi2c->XferCount != 0U) + { + /* Write data to TXDR */ + hi2c->Instance->TXDR = *hi2c->pBuffPtr; - /* Increment Buffer pointer */ - hi2c->pBuffPtr++; + /* Increment Buffer pointer */ + hi2c->pBuffPtr++; - hi2c->XferSize--; - hi2c->XferCount--; + hi2c->XferSize--; + hi2c->XferCount--; + } } else if ((I2C_CHECK_FLAG(tmpITFlags, I2C_FLAG_TCR) != RESET) && \ (I2C_CHECK_IT_SOURCE(ITSources, I2C_IT_TCI) != RESET)) @@ -4863,7 +5000,15 @@ static HAL_StatusTypeDef I2C_Master_ISR_IT(struct __I2C_HandleTypeDef *hi2c, uin if (hi2c->XferCount > MAX_NBYTE_SIZE) { - hi2c->XferSize = MAX_NBYTE_SIZE; + /* Errata workaround 170323 */ + if (I2C_GET_DIR(hi2c) == I2C_DIRECTION_RECEIVE) + { + hi2c->XferSize = 1U; + } + else + { + hi2c->XferSize = MAX_NBYTE_SIZE; + } I2C_TransferConfig(hi2c, devaddress, (uint8_t)hi2c->XferSize, I2C_RELOAD_MODE, I2C_NO_STARTSTOP); } else @@ -5018,7 +5163,15 @@ static HAL_StatusTypeDef I2C_Mem_ISR_IT(struct __I2C_HandleTypeDef *hi2c, uint32 { if (hi2c->XferCount > MAX_NBYTE_SIZE) { - hi2c->XferSize = MAX_NBYTE_SIZE; + /* Errata workaround 170323 */ + if (I2C_GET_DIR(hi2c) == I2C_DIRECTION_RECEIVE) + { + hi2c->XferSize = 1U; + } + else + { + hi2c->XferSize = MAX_NBYTE_SIZE; + } I2C_TransferConfig(hi2c, (uint16_t)hi2c->Devaddress, (uint8_t)hi2c->XferSize, I2C_RELOAD_MODE, I2C_NO_STARTSTOP); } @@ -5039,6 +5192,12 @@ static HAL_StatusTypeDef I2C_Mem_ISR_IT(struct __I2C_HandleTypeDef *hi2c, uint32 else if ((I2C_CHECK_FLAG(tmpITFlags, I2C_FLAG_TC) != RESET) && \ (I2C_CHECK_IT_SOURCE(ITSources, I2C_IT_TCI) != RESET)) { + /* Disable Interrupt related to address step */ + I2C_Disable_IRQ(hi2c, I2C_XFER_TX_IT); + + /* Enable ERR, TC, STOP, NACK and RXI interrupts */ + I2C_Enable_IRQ(hi2c, I2C_XFER_RX_IT); + if (hi2c->State == HAL_I2C_STATE_BUSY_RX) { direction = I2C_GENERATE_START_READ; @@ -5046,7 +5205,15 @@ static HAL_StatusTypeDef I2C_Mem_ISR_IT(struct __I2C_HandleTypeDef *hi2c, uint32 if (hi2c->XferCount > MAX_NBYTE_SIZE) { - hi2c->XferSize = MAX_NBYTE_SIZE; + /* Errata workaround 170323 */ + if (I2C_GET_DIR(hi2c) == I2C_DIRECTION_RECEIVE) + { + hi2c->XferSize = 1U; + } + else + { + hi2c->XferSize = MAX_NBYTE_SIZE; + } /* Set NBYTES to write and reload if hi2c->XferCount > MAX_NBYTE_SIZE and generate RESTART */ I2C_TransferConfig(hi2c, (uint16_t)hi2c->Devaddress, (uint8_t)hi2c->XferSize, @@ -5103,9 +5270,8 @@ static HAL_StatusTypeDef I2C_Slave_ISR_IT(struct __I2C_HandleTypeDef *hi2c, uint /* Call I2C Slave complete process */ I2C_ITSlaveCplt(hi2c, tmpITFlags); } - - if ((I2C_CHECK_FLAG(tmpITFlags, I2C_FLAG_AF) != RESET) && \ - (I2C_CHECK_IT_SOURCE(ITSources, I2C_IT_NACKI) != RESET)) + else if ((I2C_CHECK_FLAG(tmpITFlags, I2C_FLAG_AF) != RESET) && \ + (I2C_CHECK_IT_SOURCE(ITSources, I2C_IT_NACKI) != RESET)) { /* Check that I2C transfer finished */ /* if yes, normal use case, a NACK is sent by the MASTER when Transfer is finished */ @@ -5268,7 +5434,15 @@ static HAL_StatusTypeDef I2C_Master_ISR_DMA(struct __I2C_HandleTypeDef *hi2c, ui /* Prepare the new XferSize to transfer */ if (hi2c->XferCount > MAX_NBYTE_SIZE) { - hi2c->XferSize = MAX_NBYTE_SIZE; + /* Errata workaround 170323 */ + if (I2C_GET_DIR(hi2c) == I2C_DIRECTION_RECEIVE) + { + hi2c->XferSize = 1U; + } + else + { + hi2c->XferSize = MAX_NBYTE_SIZE; + } xfermode = I2C_RELOAD_MODE; } else @@ -5405,6 +5579,9 @@ static HAL_StatusTypeDef I2C_Mem_ISR_DMA(struct __I2C_HandleTypeDef *hi2c, uint3 else if ((I2C_CHECK_FLAG(ITFlags, I2C_FLAG_TCR) != RESET) && \ (I2C_CHECK_IT_SOURCE(ITSources, I2C_IT_TCI) != RESET)) { + /* Disable Interrupt related to address step */ + I2C_Disable_IRQ(hi2c, I2C_XFER_TX_IT); + /* Enable only Error interrupt */ I2C_Enable_IRQ(hi2c, I2C_XFER_ERROR_IT); @@ -5413,7 +5590,15 @@ static HAL_StatusTypeDef I2C_Mem_ISR_DMA(struct __I2C_HandleTypeDef *hi2c, uint3 /* Prepare the new XferSize to transfer */ if (hi2c->XferCount > MAX_NBYTE_SIZE) { - hi2c->XferSize = MAX_NBYTE_SIZE; + /* Errata workaround 170323 */ + if (I2C_GET_DIR(hi2c) == I2C_DIRECTION_RECEIVE) + { + hi2c->XferSize = 1U; + } + else + { + hi2c->XferSize = MAX_NBYTE_SIZE; + } I2C_TransferConfig(hi2c, (uint16_t)hi2c->Devaddress, (uint8_t)hi2c->XferSize, I2C_RELOAD_MODE, I2C_NO_STARTSTOP); } @@ -5447,6 +5632,12 @@ static HAL_StatusTypeDef I2C_Mem_ISR_DMA(struct __I2C_HandleTypeDef *hi2c, uint3 else if ((I2C_CHECK_FLAG(ITFlags, I2C_FLAG_TC) != RESET) && \ (I2C_CHECK_IT_SOURCE(ITSources, I2C_IT_TCI) != RESET)) { + /* Disable Interrupt related to address step */ + I2C_Disable_IRQ(hi2c, I2C_XFER_TX_IT); + + /* Enable only Error and NACK interrupt for data transfer */ + I2C_Enable_IRQ(hi2c, I2C_XFER_ERROR_IT); + if (hi2c->State == HAL_I2C_STATE_BUSY_RX) { direction = I2C_GENERATE_START_READ; @@ -5454,7 +5645,15 @@ static HAL_StatusTypeDef I2C_Mem_ISR_DMA(struct __I2C_HandleTypeDef *hi2c, uint3 if (hi2c->XferCount > MAX_NBYTE_SIZE) { - hi2c->XferSize = MAX_NBYTE_SIZE; + /* Errata workaround 170323 */ + if (I2C_GET_DIR(hi2c) == I2C_DIRECTION_RECEIVE) + { + hi2c->XferSize = 1U; + } + else + { + hi2c->XferSize = MAX_NBYTE_SIZE; + } /* Set NBYTES to write and reload if hi2c->XferCount > MAX_NBYTE_SIZE and generate RESTART */ I2C_TransferConfig(hi2c, (uint16_t)hi2c->Devaddress, (uint8_t)hi2c->XferSize, @@ -5524,9 +5723,8 @@ static HAL_StatusTypeDef I2C_Slave_ISR_DMA(struct __I2C_HandleTypeDef *hi2c, uin /* Call I2C Slave complete process */ I2C_ITSlaveCplt(hi2c, ITFlags); } - - if ((I2C_CHECK_FLAG(ITFlags, I2C_FLAG_AF) != RESET) && \ - (I2C_CHECK_IT_SOURCE(ITSources, I2C_IT_NACKI) != RESET)) + else if ((I2C_CHECK_FLAG(ITFlags, I2C_FLAG_AF) != RESET) && \ + (I2C_CHECK_IT_SOURCE(ITSources, I2C_IT_NACKI) != RESET)) { /* Check that I2C transfer finished */ /* if yes, normal use case, a NACK is sent by the MASTER when Transfer is finished */ @@ -6125,6 +6323,7 @@ static void I2C_ITSlaveCplt(I2C_HandleTypeDef *hi2c, uint32_t ITFlags) { uint32_t tmpcr1value = READ_REG(hi2c->Instance->CR1); uint32_t tmpITFlags = ITFlags; + uint32_t tmpoptions = hi2c->XferOptions; HAL_I2C_StateTypeDef tmpstate = hi2c->State; /* Clear STOP Flag */ @@ -6141,6 +6340,11 @@ static void I2C_ITSlaveCplt(I2C_HandleTypeDef *hi2c, uint32_t ITFlags) I2C_Disable_IRQ(hi2c, I2C_XFER_LISTEN_IT | I2C_XFER_RX_IT); hi2c->PreviousState = I2C_STATE_SLAVE_BUSY_RX; } + else if (tmpstate == HAL_I2C_STATE_LISTEN) + { + I2C_Disable_IRQ(hi2c, I2C_XFER_LISTEN_IT | I2C_XFER_TX_IT | I2C_XFER_RX_IT); + hi2c->PreviousState = I2C_STATE_NONE; + } else { /* Do nothing */ @@ -6207,6 +6411,57 @@ static void I2C_ITSlaveCplt(I2C_HandleTypeDef *hi2c, uint32_t ITFlags) hi2c->ErrorCode |= HAL_I2C_ERROR_AF; } + if ((I2C_CHECK_FLAG(tmpITFlags, I2C_FLAG_AF) != RESET) && \ + (I2C_CHECK_IT_SOURCE(tmpcr1value, I2C_IT_NACKI) != RESET)) + { + /* Check that I2C transfer finished */ + /* if yes, normal use case, a NACK is sent by the MASTER when Transfer is finished */ + /* Mean XferCount == 0*/ + /* So clear Flag NACKF only */ + if (hi2c->XferCount == 0U) + { + if ((hi2c->State == HAL_I2C_STATE_LISTEN) && (tmpoptions == I2C_FIRST_AND_LAST_FRAME)) + /* Same action must be done for (tmpoptions == I2C_LAST_FRAME) which removed for + Warning[Pa134]: left and right operands are identical */ + { + /* Call I2C Listen complete process */ + I2C_ITListenCplt(hi2c, tmpITFlags); + } + else if ((hi2c->State == HAL_I2C_STATE_BUSY_TX_LISTEN) && (tmpoptions != I2C_NO_OPTION_FRAME)) + { + /* Clear NACK Flag */ + __HAL_I2C_CLEAR_FLAG(hi2c, I2C_FLAG_AF); + + /* Flush TX register */ + I2C_Flush_TXDR(hi2c); + + /* Last Byte is Transmitted */ + /* Call I2C Slave Sequential complete process */ + I2C_ITSlaveSeqCplt(hi2c); + } + else + { + /* Clear NACK Flag */ + __HAL_I2C_CLEAR_FLAG(hi2c, I2C_FLAG_AF); + } + } + else + { + /* if no, error use case, a Non-Acknowledge of last Data is generated by the MASTER*/ + /* Clear NACK Flag */ + __HAL_I2C_CLEAR_FLAG(hi2c, I2C_FLAG_AF); + + /* Set ErrorCode corresponding to a Non-Acknowledge */ + hi2c->ErrorCode |= HAL_I2C_ERROR_AF; + + if ((tmpoptions == I2C_FIRST_FRAME) || (tmpoptions == I2C_NEXT_FRAME)) + { + /* Call the corresponding callback to inform upper layer of End of Transfer */ + I2C_ITError(hi2c, hi2c->ErrorCode); + } + } + } + hi2c->Mode = HAL_I2C_MODE_NONE; hi2c->XferISR = NULL; @@ -6624,7 +6879,15 @@ static void I2C_DMAMasterReceiveCplt(DMA_HandleTypeDef *hdma) /* Set the XferSize to transfer */ if (hi2c->XferCount > MAX_NBYTE_SIZE) { - hi2c->XferSize = MAX_NBYTE_SIZE; + /* Errata workaround 170323 */ + if (I2C_GET_DIR(hi2c) == I2C_DIRECTION_RECEIVE) + { + hi2c->XferSize = 1U; + } + else + { + hi2c->XferSize = MAX_NBYTE_SIZE; + } } else { @@ -6735,6 +6998,12 @@ static HAL_StatusTypeDef I2C_WaitOnFlagUntilTimeout(I2C_HandleTypeDef *hi2c, uin { while (__HAL_I2C_GET_FLAG(hi2c, Flag) == Status) { + /* Check if an error is detected */ + if (I2C_IsErrorOccurred(hi2c, Timeout, Tickstart) != HAL_OK) + { + return HAL_ERROR; + } + /* Check for the Timeout */ if (Timeout != HAL_MAX_DELAY) { @@ -6846,16 +7115,18 @@ static HAL_StatusTypeDef I2C_WaitOnSTOPFlagUntilTimeout(I2C_HandleTypeDef *hi2c, static HAL_StatusTypeDef I2C_WaitOnRXNEFlagUntilTimeout(I2C_HandleTypeDef *hi2c, uint32_t Timeout, uint32_t Tickstart) { - while (__HAL_I2C_GET_FLAG(hi2c, I2C_FLAG_RXNE) == RESET) + HAL_StatusTypeDef status = HAL_OK; + + while ((__HAL_I2C_GET_FLAG(hi2c, I2C_FLAG_RXNE) == RESET) && (status == HAL_OK)) { /* Check if an error is detected */ if (I2C_IsErrorOccurred(hi2c, Timeout, Tickstart) != HAL_OK) { - return HAL_ERROR; + status = HAL_ERROR; } /* Check if a STOPF is detected */ - if (__HAL_I2C_GET_FLAG(hi2c, I2C_FLAG_STOPF) == SET) + if ((__HAL_I2C_GET_FLAG(hi2c, I2C_FLAG_STOPF) == SET) && (status == HAL_OK)) { /* Check if an RXNE is pending */ /* Store Last receive data if any */ @@ -6863,19 +7134,14 @@ static HAL_StatusTypeDef I2C_WaitOnRXNEFlagUntilTimeout(I2C_HandleTypeDef *hi2c, { /* Return HAL_OK */ /* The Reading of data from RXDR will be done in caller function */ - return HAL_OK; + status = HAL_OK; } - else + + /* Check a no-acknowledge have been detected */ + if (__HAL_I2C_GET_FLAG(hi2c, I2C_FLAG_AF) == SET) { - if (__HAL_I2C_GET_FLAG(hi2c, I2C_FLAG_AF) == SET) - { - __HAL_I2C_CLEAR_FLAG(hi2c, I2C_FLAG_AF); - hi2c->ErrorCode = HAL_I2C_ERROR_AF; - } - else - { - hi2c->ErrorCode = HAL_I2C_ERROR_NONE; - } + __HAL_I2C_CLEAR_FLAG(hi2c, I2C_FLAG_AF); + hi2c->ErrorCode = HAL_I2C_ERROR_AF; /* Clear STOP Flag */ __HAL_I2C_CLEAR_FLAG(hi2c, I2C_FLAG_STOPF); @@ -6889,12 +7155,16 @@ static HAL_StatusTypeDef I2C_WaitOnRXNEFlagUntilTimeout(I2C_HandleTypeDef *hi2c, /* Process Unlocked */ __HAL_UNLOCK(hi2c); - return HAL_ERROR; + status = HAL_ERROR; + } + else + { + hi2c->ErrorCode = HAL_I2C_ERROR_NONE; } } /* Check for the Timeout */ - if (((HAL_GetTick() - Tickstart) > Timeout) || (Timeout == 0U)) + if ((((HAL_GetTick() - Tickstart) > Timeout) || (Timeout == 0U)) && (status == HAL_OK)) { if ((__HAL_I2C_GET_FLAG(hi2c, I2C_FLAG_RXNE) == RESET)) { @@ -6904,11 +7174,11 @@ static HAL_StatusTypeDef I2C_WaitOnRXNEFlagUntilTimeout(I2C_HandleTypeDef *hi2c, /* Process Unlocked */ __HAL_UNLOCK(hi2c); - return HAL_ERROR; + status = HAL_ERROR; } } } - return HAL_OK; + return status; } /** @@ -7103,13 +7373,13 @@ static void I2C_Enable_IRQ(I2C_HandleTypeDef *hi2c, uint16_t InterruptRequest) if ((InterruptRequest & I2C_XFER_TX_IT) == I2C_XFER_TX_IT) { - /* Enable ERR, TC, STOP, NACK and RXI interrupts */ + /* Enable ERR, TC, STOP, NACK and TXI interrupts */ tmpisr |= I2C_IT_ERRI | I2C_IT_TCI | I2C_IT_STOPI | I2C_IT_NACKI | I2C_IT_TXI; } if ((InterruptRequest & I2C_XFER_RX_IT) == I2C_XFER_RX_IT) { - /* Enable ERR, TC, STOP, NACK and TXI interrupts */ + /* Enable ERR, TC, STOP, NACK and RXI interrupts */ tmpisr |= I2C_IT_ERRI | I2C_IT_TCI | I2C_IT_STOPI | I2C_IT_NACKI | I2C_IT_RXI; } @@ -7136,13 +7406,13 @@ static void I2C_Enable_IRQ(I2C_HandleTypeDef *hi2c, uint16_t InterruptRequest) if ((InterruptRequest & I2C_XFER_TX_IT) == I2C_XFER_TX_IT) { - /* Enable ERR, TC, STOP, NACK and RXI interrupts */ + /* Enable ERR, TC, STOP, NACK and TXI interrupts */ tmpisr |= I2C_IT_ERRI | I2C_IT_TCI | I2C_IT_STOPI | I2C_IT_NACKI | I2C_IT_TXI; } if ((InterruptRequest & I2C_XFER_RX_IT) == I2C_XFER_RX_IT) { - /* Enable ERR, TC, STOP, NACK and TXI interrupts */ + /* Enable ERR, TC, STOP, NACK and RXI interrupts */ tmpisr |= I2C_IT_ERRI | I2C_IT_TCI | I2C_IT_STOPI | I2C_IT_NACKI | I2C_IT_RXI; } @@ -7158,7 +7428,7 @@ static void I2C_Enable_IRQ(I2C_HandleTypeDef *hi2c, uint16_t InterruptRequest) tmpisr |= (I2C_IT_STOPI | I2C_IT_TCI); } - if ((hi2c->XferISR != I2C_Mem_ISR_DMA) && (InterruptRequest == I2C_XFER_RELOAD_IT)) + if (InterruptRequest == I2C_XFER_RELOAD_IT) { /* Enable TC interrupts */ tmpisr |= I2C_IT_TCI; diff --git a/Software/Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2s.c b/Software/Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2s.c index 2202b85..e04da03 100644 --- a/Software/Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2s.c +++ b/Software/Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2s.c @@ -755,15 +755,14 @@ HAL_StatusTypeDef HAL_I2S_Transmit(I2S_HandleTypeDef *hi2s, uint16_t *pData, uin return HAL_ERROR; } - /* Process Locked */ - __HAL_LOCK(hi2s); - if (hi2s->State != HAL_I2S_STATE_READY) { - __HAL_UNLOCK(hi2s); return HAL_BUSY; } + /* Process Locked */ + __HAL_LOCK(hi2s); + /* Set state and reset error code */ hi2s->State = HAL_I2S_STATE_BUSY_TX; hi2s->ErrorCode = HAL_I2S_ERROR_NONE; @@ -874,15 +873,14 @@ HAL_StatusTypeDef HAL_I2S_Receive(I2S_HandleTypeDef *hi2s, uint16_t *pData, uint return HAL_ERROR; } - /* Process Locked */ - __HAL_LOCK(hi2s); - if (hi2s->State != HAL_I2S_STATE_READY) { - __HAL_UNLOCK(hi2s); return HAL_BUSY; } + /* Process Locked */ + __HAL_LOCK(hi2s); + /* Set state and reset error code */ hi2s->State = HAL_I2S_STATE_BUSY_RX; hi2s->ErrorCode = HAL_I2S_ERROR_NONE; @@ -972,15 +970,14 @@ HAL_StatusTypeDef HAL_I2S_Transmit_IT(I2S_HandleTypeDef *hi2s, uint16_t *pData, return HAL_ERROR; } - /* Process Locked */ - __HAL_LOCK(hi2s); - if (hi2s->State != HAL_I2S_STATE_READY) { - __HAL_UNLOCK(hi2s); return HAL_BUSY; } + /* Process Locked */ + __HAL_LOCK(hi2s); + /* Set state and reset error code */ hi2s->State = HAL_I2S_STATE_BUSY_TX; hi2s->ErrorCode = HAL_I2S_ERROR_NONE; @@ -999,6 +996,8 @@ HAL_StatusTypeDef HAL_I2S_Transmit_IT(I2S_HandleTypeDef *hi2s, uint16_t *pData, hi2s->TxXferCount = Size; } + __HAL_UNLOCK(hi2s); + /* Enable TXE and ERR interrupt */ __HAL_I2S_ENABLE_IT(hi2s, (I2S_IT_TXE | I2S_IT_ERR)); @@ -1009,7 +1008,6 @@ HAL_StatusTypeDef HAL_I2S_Transmit_IT(I2S_HandleTypeDef *hi2s, uint16_t *pData, __HAL_I2S_ENABLE(hi2s); } - __HAL_UNLOCK(hi2s); return HAL_OK; } @@ -1038,15 +1036,14 @@ HAL_StatusTypeDef HAL_I2S_Receive_IT(I2S_HandleTypeDef *hi2s, uint16_t *pData, u return HAL_ERROR; } - /* Process Locked */ - __HAL_LOCK(hi2s); - if (hi2s->State != HAL_I2S_STATE_READY) { - __HAL_UNLOCK(hi2s); return HAL_BUSY; } + /* Process Locked */ + __HAL_LOCK(hi2s); + /* Set state and reset error code */ hi2s->State = HAL_I2S_STATE_BUSY_RX; hi2s->ErrorCode = HAL_I2S_ERROR_NONE; @@ -1065,6 +1062,8 @@ HAL_StatusTypeDef HAL_I2S_Receive_IT(I2S_HandleTypeDef *hi2s, uint16_t *pData, u hi2s->RxXferCount = Size; } + __HAL_UNLOCK(hi2s); + /* Enable RXNE and ERR interrupt */ __HAL_I2S_ENABLE_IT(hi2s, (I2S_IT_RXNE | I2S_IT_ERR)); @@ -1075,7 +1074,6 @@ HAL_StatusTypeDef HAL_I2S_Receive_IT(I2S_HandleTypeDef *hi2s, uint16_t *pData, u __HAL_I2S_ENABLE(hi2s); } - __HAL_UNLOCK(hi2s); return HAL_OK; } @@ -1102,15 +1100,14 @@ HAL_StatusTypeDef HAL_I2S_Transmit_DMA(I2S_HandleTypeDef *hi2s, uint16_t *pData, return HAL_ERROR; } - /* Process Locked */ - __HAL_LOCK(hi2s); - if (hi2s->State != HAL_I2S_STATE_READY) { - __HAL_UNLOCK(hi2s); return HAL_BUSY; } + /* Process Locked */ + __HAL_LOCK(hi2s); + /* Set state and reset error code */ hi2s->State = HAL_I2S_STATE_BUSY_TX; hi2s->ErrorCode = HAL_I2S_ERROR_NONE; @@ -1152,12 +1149,7 @@ HAL_StatusTypeDef HAL_I2S_Transmit_DMA(I2S_HandleTypeDef *hi2s, uint16_t *pData, return HAL_ERROR; } - /* Check if the I2S is already enabled */ - if (HAL_IS_BIT_CLR(hi2s->Instance->I2SCFGR, SPI_I2SCFGR_I2SE)) - { - /* Enable I2S peripheral */ - __HAL_I2S_ENABLE(hi2s); - } + __HAL_UNLOCK(hi2s); /* Check if the I2S Tx request is already enabled */ if (HAL_IS_BIT_CLR(hi2s->Instance->CR2, SPI_CR2_TXDMAEN)) @@ -1166,7 +1158,13 @@ HAL_StatusTypeDef HAL_I2S_Transmit_DMA(I2S_HandleTypeDef *hi2s, uint16_t *pData, SET_BIT(hi2s->Instance->CR2, SPI_CR2_TXDMAEN); } - __HAL_UNLOCK(hi2s); + /* Check if the I2S is already enabled */ + if (HAL_IS_BIT_CLR(hi2s->Instance->I2SCFGR, SPI_I2SCFGR_I2SE)) + { + /* Enable I2S peripheral */ + __HAL_I2S_ENABLE(hi2s); + } + return HAL_OK; } @@ -1193,15 +1191,14 @@ HAL_StatusTypeDef HAL_I2S_Receive_DMA(I2S_HandleTypeDef *hi2s, uint16_t *pData, return HAL_ERROR; } - /* Process Locked */ - __HAL_LOCK(hi2s); - if (hi2s->State != HAL_I2S_STATE_READY) { - __HAL_UNLOCK(hi2s); return HAL_BUSY; } + /* Process Locked */ + __HAL_LOCK(hi2s); + /* Set state and reset error code */ hi2s->State = HAL_I2S_STATE_BUSY_RX; hi2s->ErrorCode = HAL_I2S_ERROR_NONE; @@ -1249,12 +1246,7 @@ HAL_StatusTypeDef HAL_I2S_Receive_DMA(I2S_HandleTypeDef *hi2s, uint16_t *pData, return HAL_ERROR; } - /* Check if the I2S is already enabled */ - if (HAL_IS_BIT_CLR(hi2s->Instance->I2SCFGR, SPI_I2SCFGR_I2SE)) - { - /* Enable I2S peripheral */ - __HAL_I2S_ENABLE(hi2s); - } + __HAL_UNLOCK(hi2s); /* Check if the I2S Rx request is already enabled */ if (HAL_IS_BIT_CLR(hi2s->Instance->CR2, SPI_CR2_RXDMAEN)) @@ -1263,7 +1255,13 @@ HAL_StatusTypeDef HAL_I2S_Receive_DMA(I2S_HandleTypeDef *hi2s, uint16_t *pData, SET_BIT(hi2s->Instance->CR2, SPI_CR2_RXDMAEN); } - __HAL_UNLOCK(hi2s); + /* Check if the I2S is already enabled */ + if (HAL_IS_BIT_CLR(hi2s->Instance->I2SCFGR, SPI_I2SCFGR_I2SE)) + { + /* Enable I2S peripheral */ + __HAL_I2S_ENABLE(hi2s); + } + return HAL_OK; } diff --git a/Software/Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_irda.c b/Software/Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_irda.c index c840fd8..eac683c 100644 --- a/Software/Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_irda.c +++ b/Software/Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_irda.c @@ -142,7 +142,7 @@ [..] Use function HAL_IRDA_UnRegisterCallback() to reset a callback to the default - weak (surcharged) function. + weak function. HAL_IRDA_UnRegisterCallback() takes as parameters the HAL peripheral handle, and the Callback ID. This function allows to reset following callbacks: @@ -159,10 +159,10 @@ [..] By default, after the HAL_IRDA_Init() and when the state is HAL_IRDA_STATE_RESET - all callbacks are set to the corresponding weak (surcharged) functions: + all callbacks are set to the corresponding weak functions: examples HAL_IRDA_TxCpltCallback(), HAL_IRDA_RxHalfCpltCallback(). Exception done for MspInit and MspDeInit functions that are respectively - reset to the legacy weak (surcharged) functions in the HAL_IRDA_Init() + reset to the legacy weak functions in the HAL_IRDA_Init() and HAL_IRDA_DeInit() only when these callbacks are null (not registered beforehand). If not, MspInit or MspDeInit are not null, the HAL_IRDA_Init() and HAL_IRDA_DeInit() keep and use the user MspInit/MspDeInit callbacks (registered beforehand). @@ -179,7 +179,7 @@ [..] When The compilation define USE_HAL_IRDA_REGISTER_CALLBACKS is set to 0 or not defined, the callback registration feature is not available - and weak (surcharged) callbacks are used. + and weak callbacks are used. @endverbatim ****************************************************************************** @@ -471,7 +471,7 @@ __weak void HAL_IRDA_MspDeInit(IRDA_HandleTypeDef *hirda) #if (USE_HAL_IRDA_REGISTER_CALLBACKS == 1) /** * @brief Register a User IRDA Callback - * To be used instead of the weak predefined callback + * To be used to override the weak predefined callback * @note The HAL_IRDA_RegisterCallback() may be called before HAL_IRDA_Init() in HAL_IRDA_STATE_RESET * to register callbacks for HAL_IRDA_MSPINIT_CB_ID and HAL_IRDA_MSPDEINIT_CB_ID * @param hirda irda handle diff --git a/Software/Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pcd.c b/Software/Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pcd.c index 289c86f..270cde1 100644 --- a/Software/Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pcd.c +++ b/Software/Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pcd.c @@ -1481,7 +1481,7 @@ HAL_StatusTypeDef HAL_PCD_EP_Receive(PCD_HandleTypeDef *hpcd, uint8_t ep_addr, u * @param ep_addr endpoint address * @retval Data Size */ -uint32_t HAL_PCD_EP_GetRxCount(PCD_HandleTypeDef *hpcd, uint8_t ep_addr) +uint32_t HAL_PCD_EP_GetRxCount(PCD_HandleTypeDef const *hpcd, uint8_t ep_addr) { return hpcd->OUT_ep[ep_addr & EP_ADDR_MSK].xfer_count; } @@ -1621,9 +1621,18 @@ HAL_StatusTypeDef HAL_PCD_EP_Abort(PCD_HandleTypeDef *hpcd, uint8_t ep_addr) */ HAL_StatusTypeDef HAL_PCD_EP_Flush(PCD_HandleTypeDef *hpcd, uint8_t ep_addr) { - /* Prevent unused argument(s) compilation warning */ - UNUSED(hpcd); - UNUSED(ep_addr); + __HAL_LOCK(hpcd); + + if ((ep_addr & 0x80U) == 0x80U) + { + (void)USB_FlushTxFifo(hpcd->Instance, (uint32_t)ep_addr & EP_ADDR_MSK); + } + else + { + (void)USB_FlushRxFifo(hpcd->Instance); + } + + __HAL_UNLOCK(hpcd); return HAL_OK; } @@ -1672,7 +1681,7 @@ HAL_StatusTypeDef HAL_PCD_DeActivateRemoteWakeup(PCD_HandleTypeDef *hpcd) * @param hpcd PCD handle * @retval HAL state */ -PCD_StateTypeDef HAL_PCD_GetState(PCD_HandleTypeDef *hpcd) +PCD_StateTypeDef HAL_PCD_GetState(PCD_HandleTypeDef const *hpcd) { return hpcd->State; } diff --git a/Software/Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c b/Software/Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c index 08ef73e..9900d89 100644 --- a/Software/Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c +++ b/Software/Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c @@ -1021,7 +1021,10 @@ void HAL_RCC_MCOConfig(uint32_t RCC_MCOx, uint32_t RCC_MCOSource, uint32_t RCC_M assert_param(IS_RCC_MCO(RCC_MCOx)); assert_param(IS_RCC_MCODIV(RCC_MCODiv)); assert_param(IS_RCC_MCO1SOURCE(RCC_MCOSource)); - + + /* Prevent unused argument(s) compilation warning */ + UNUSED(RCC_MCOx); + /* Configure the MCO1 pin in alternate function mode */ gpio.Mode = GPIO_MODE_AF_PP; gpio.Speed = GPIO_SPEED_FREQ_HIGH; diff --git a/Software/Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rtc.c b/Software/Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rtc.c index 5c2cd69..64c444c 100644 --- a/Software/Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rtc.c +++ b/Software/Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rtc.c @@ -6,8 +6,8 @@ * This file provides firmware functions to manage the following * functionalities of the Real-Time Clock (RTC) peripheral: * + Initialization and de-initialization functions - * + RTC Calendar (Time and Date) configuration functions - * + RTC Alarm (Alarm A) configuration functions + * + Calendar (Time and Date) configuration functions + * + Alarm (Alarm A) configuration functions * + Peripheral Control functions * + Peripheral State functions * @@ -63,7 +63,7 @@ ##### Backup Domain Access ##### ================================================================== - [..] After reset, the backup domain (RTC registers, RTC backup data registers + [..] After reset, the backup domain (RTC registers and RTC backup data registers) is protected against possible unwanted write accesses. [..] To enable access to the RTC Domain and RTC registers, proceed as follows: (+) Enable the Power Controller (PWR) APB1 interface clock using the @@ -106,8 +106,8 @@ ================================================================== [..] The MCU can be woken up from a low power mode by an RTC alternate function. - [..] The RTC alternate functions are the RTC alarm (Alarm A), RTC wakeup, - RTC tamper event detection and RTC timestamp event detection. + [..] The RTC alternate functions are the RTC alarm (Alarm A), + RTC wakeup, RTC tamper event detection and RTC timestamp event detection. These RTC alternate functions can wake up the system from the Stop and Standby low power modes. [..] The system can also wake up from low power modes without depending @@ -121,6 +121,12 @@ *** Callback registration *** ============================================= [..] + When the compilation define USE_HAL_RTC_REGISTER_CALLBACKS is set to 0 or + not defined, the callback registration feature is not available and all + callbacks are set to the corresponding weak functions. + This is the recommended configuration in order to optimize memory/code + consumption footprint/performances. + [..] The compilation define USE_HAL_RTC_REGISTER_CALLBACKS when set to 1 allows the user to configure dynamically the driver callbacks. Use Function HAL_RTC_RegisterCallback() to register an interrupt callback. @@ -128,12 +134,14 @@ Function HAL_RTC_RegisterCallback() allows to register following callbacks: (+) AlarmAEventCallback : RTC Alarm A Event callback. (+) TimeStampEventCallback : RTC Timestamp Event callback. - (+) WakeUpTimerEventCallback : RTC WakeUpTimer Event callback. + (+) WakeUpTimerEventCallback : RTC WakeUpTimer Event callback. (*) (+) Tamper1EventCallback : RTC Tamper 1 Event callback. (+) Tamper2EventCallback : RTC Tamper 2 Event callback. - (+) Tamper3EventCallback : RTC Tamper 3 Event callback. + (+) Tamper3EventCallback : RTC Tamper 3 Event callback. (*) (+) MspInitCallback : RTC MspInit callback. (+) MspDeInitCallback : RTC MspDeInit callback. + + (*) value not applicable to all devices. [..] This function takes as parameters the HAL peripheral handle, the Callback ID and a pointer to the user callback function. @@ -145,34 +153,32 @@ This function allows to reset following callbacks: (+) AlarmAEventCallback : RTC Alarm A Event callback. (+) TimeStampEventCallback : RTC Timestamp Event callback. - (+) WakeUpTimerEventCallback : RTC WakeUpTimer Event callback. + (+) WakeUpTimerEventCallback : RTC WakeUpTimer Event callback. (*) (+) Tamper1EventCallback : RTC Tamper 1 Event callback. (+) Tamper2EventCallback : RTC Tamper 2 Event callback. - (+) Tamper3EventCallback : RTC Tamper 3 Event callback. + (+) Tamper3EventCallback : RTC Tamper 3 Event callback. (*) (+) MspInitCallback : RTC MspInit callback. (+) MspDeInitCallback : RTC MspDeInit callback. + + (*) value not applicable to all devices. [..] By default, after the HAL_RTC_Init() and when the state is HAL_RTC_STATE_RESET, all callbacks are set to the corresponding weak functions: - examples AlarmAEventCallback(), WakeUpTimerEventCallback(). + examples AlarmAEventCallback(), TimeStampEventCallback(). Exception done for MspInit() and MspDeInit() callbacks that are reset to the - legacy weak function in the HAL_RTC_Init()/HAL_RTC_DeInit() only - when these callbacks are null (not registered beforehand). + legacy weak function in the HAL_RTC_Init()/HAL_RTC_DeInit() only when these + callbacks are null (not registered beforehand). If not, MspInit() or MspDeInit() are not null, HAL_RTC_Init()/HAL_RTC_DeInit() keep and use the user MspInit()/MspDeInit() callbacks (registered beforehand). [..] Callbacks can be registered/unregistered in HAL_RTC_STATE_READY state only. - Exception done MspInit()/MspDeInit() that can be registered/unregistered + Exception done for MspInit() and MspDeInit() that can be registered/unregistered in HAL_RTC_STATE_READY or HAL_RTC_STATE_RESET state. Thus registered (user) MspInit()/MspDeInit() callbacks can be used during the Init/DeInit. - In that case first register the MspInit()/MspDeInit() user callbacks - using HAL_RTC_RegisterCallback() before calling HAL_RTC_DeInit() - or HAL_RTC_Init() functions. - [..] - When The compilation define USE_HAL_RTC_REGISTER_CALLBACKS is set to 0 or - not defined, the callback registration feature is not available and all - callbacks are set to the corresponding weak functions. + In that case first register the MspInit()/MspDeInit() user callbacks using + HAL_RTC_RegisterCallback() before calling HAL_RTC_DeInit() or HAL_RTC_Init() + functions. @endverbatim ****************************************************************************** @@ -434,13 +440,14 @@ HAL_StatusTypeDef HAL_RTC_DeInit(RTC_HandleTypeDef *hrtc) * This parameter can be one of the following values: * @arg @ref HAL_RTC_ALARM_A_EVENT_CB_ID Alarm A Event Callback ID * @arg @ref HAL_RTC_TIMESTAMP_EVENT_CB_ID Timestamp Event Callback ID - * @arg @ref HAL_RTC_WAKEUPTIMER_EVENT_CB_ID Wakeup Timer Event Callback ID - * @arg @ref HAL_RTC_TAMPER1_EVENT_CB_ID Tamper 1 Callback ID - * @arg @ref HAL_RTC_TAMPER2_EVENT_CB_ID Tamper 2 Callback ID - * @arg @ref HAL_RTC_TAMPER3_EVENT_CB_ID Tamper 3 Callback ID - * @arg @ref HAL_RTC_MSPINIT_CB_ID Msp Init callback ID - * @arg @ref HAL_RTC_MSPDEINIT_CB_ID Msp DeInit callback ID - * @note HAL_RTC_TAMPER3_EVENT_CB_ID is not applicable to all devices. + * @arg @ref HAL_RTC_WAKEUPTIMER_EVENT_CB_ID Wakeup Timer Event Callback ID (*) + * @arg @ref HAL_RTC_TAMPER1_EVENT_CB_ID Tamper 1 Event Callback ID + * @arg @ref HAL_RTC_TAMPER2_EVENT_CB_ID Tamper 2 Event Callback ID + * @arg @ref HAL_RTC_TAMPER3_EVENT_CB_ID Tamper 3 Event Callback ID (*) + * @arg @ref HAL_RTC_MSPINIT_CB_ID MSP Init callback ID + * @arg @ref HAL_RTC_MSPDEINIT_CB_ID MSP DeInit callback ID + * + * (*) value not applicable to all devices. * @param pCallback pointer to the Callback function * @retval HAL status */ @@ -541,13 +548,14 @@ HAL_StatusTypeDef HAL_RTC_RegisterCallback(RTC_HandleTypeDef *hrtc, HAL_RTC_Call * This parameter can be one of the following values: * @arg @ref HAL_RTC_ALARM_A_EVENT_CB_ID Alarm A Event Callback ID * @arg @ref HAL_RTC_TIMESTAMP_EVENT_CB_ID Timestamp Event Callback ID - * @arg @ref HAL_RTC_WAKEUPTIMER_EVENT_CB_ID Wakeup Timer Event Callback ID - * @arg @ref HAL_RTC_TAMPER1_EVENT_CB_ID Tamper 1 Callback ID - * @arg @ref HAL_RTC_TAMPER2_EVENT_CB_ID Tamper 2 Callback ID - * @arg @ref HAL_RTC_TAMPER3_EVENT_CB_ID Tamper 3 Callback ID - * @arg @ref HAL_RTC_MSPINIT_CB_ID Msp Init callback ID - * @arg @ref HAL_RTC_MSPDEINIT_CB_ID Msp DeInit callback ID - * @note HAL_RTC_TAMPER3_EVENT_CB_ID is not applicable to all devices. + * @arg @ref HAL_RTC_WAKEUPTIMER_EVENT_CB_ID Wakeup Timer Event Callback ID (*) + * @arg @ref HAL_RTC_TAMPER1_EVENT_CB_ID Tamper 1 Event Callback ID + * @arg @ref HAL_RTC_TAMPER2_EVENT_CB_ID Tamper 2 Event Callback ID + * @arg @ref HAL_RTC_TAMPER3_EVENT_CB_ID Tamper 3 Event Callback ID (*) + * @arg @ref HAL_RTC_MSPINIT_CB_ID MSP Init callback ID + * @arg @ref HAL_RTC_MSPDEINIT_CB_ID MSP DeInit callback ID + * + * (*) value not applicable to all devices. * @retval HAL status */ HAL_StatusTypeDef HAL_RTC_UnRegisterCallback(RTC_HandleTypeDef *hrtc, HAL_RTC_CallbackIDTypeDef CallbackID) @@ -1052,7 +1060,7 @@ HAL_StatusTypeDef HAL_RTC_SetAlarm(RTC_HandleTypeDef *hrtc, RTC_AlarmTypeDef *sA tmpreg = (((uint32_t)RTC_ByteToBcd2(sAlarm->AlarmTime.Hours) << RTC_ALRMAR_HU_Pos) | \ ((uint32_t)RTC_ByteToBcd2(sAlarm->AlarmTime.Minutes) << RTC_ALRMAR_MNU_Pos) | \ ((uint32_t)RTC_ByteToBcd2(sAlarm->AlarmTime.Seconds)) | \ - ((uint32_t)(sAlarm->AlarmTime.TimeFormat) << RTC_TR_PM_Pos) | \ + ((uint32_t)(sAlarm->AlarmTime.TimeFormat) << RTC_ALRMAR_PM_Pos) | \ ((uint32_t)RTC_ByteToBcd2(sAlarm->AlarmDateWeekDay) << RTC_ALRMAR_DU_Pos) | \ ((uint32_t)sAlarm->AlarmDateWeekDaySel) | \ ((uint32_t)sAlarm->AlarmMask)); @@ -1085,7 +1093,7 @@ HAL_StatusTypeDef HAL_RTC_SetAlarm(RTC_HandleTypeDef *hrtc, RTC_AlarmTypeDef *sA tmpreg = (((uint32_t)(sAlarm->AlarmTime.Hours) << RTC_ALRMAR_HU_Pos) | \ ((uint32_t)(sAlarm->AlarmTime.Minutes) << RTC_ALRMAR_MNU_Pos) | \ ((uint32_t) sAlarm->AlarmTime.Seconds) | \ - ((uint32_t)(sAlarm->AlarmTime.TimeFormat) << RTC_TR_PM_Pos) | \ + ((uint32_t)(sAlarm->AlarmTime.TimeFormat) << RTC_ALRMAR_PM_Pos) | \ ((uint32_t)(sAlarm->AlarmDateWeekDay) << RTC_ALRMAR_DU_Pos) | \ ((uint32_t) sAlarm->AlarmDateWeekDaySel) | \ ((uint32_t) sAlarm->AlarmMask)); @@ -1098,13 +1106,13 @@ HAL_StatusTypeDef HAL_RTC_SetAlarm(RTC_HandleTypeDef *hrtc, RTC_AlarmTypeDef *sA /* Disable the write protection for RTC registers */ __HAL_RTC_WRITEPROTECTION_DISABLE(hrtc); - /* Disable the Alarm A */ + /* Disable Alarm A */ __HAL_RTC_ALARMA_DISABLE(hrtc); /* In case interrupt mode is used, the interrupt source must be disabled */ __HAL_RTC_ALARM_DISABLE_IT(hrtc, RTC_IT_ALRA); - /* Clear the Alarm flag */ + /* Clear Alarm A flag */ __HAL_RTC_ALARM_CLEAR_FLAG(hrtc, RTC_FLAG_ALRAF); /* Get tick */ @@ -1127,10 +1135,11 @@ HAL_StatusTypeDef HAL_RTC_SetAlarm(RTC_HandleTypeDef *hrtc, RTC_AlarmTypeDef *sA } } + /* Configure Alarm A register */ hrtc->Instance->ALRMAR = (uint32_t)tmpreg; - /* Configure the Alarm A Subseconds register */ + /* Configure Alarm A Subseconds register */ hrtc->Instance->ALRMASSR = subsecondtmpreg; - /* Configure the Alarm state: Enable Alarm */ + /* Enable Alarm A */ __HAL_RTC_ALARMA_ENABLE(hrtc); /* Enable the write protection for RTC registers */ @@ -1208,7 +1217,7 @@ HAL_StatusTypeDef HAL_RTC_SetAlarm_IT(RTC_HandleTypeDef *hrtc, RTC_AlarmTypeDef tmpreg = (((uint32_t)RTC_ByteToBcd2(sAlarm->AlarmTime.Hours) << RTC_ALRMAR_HU_Pos) | \ ((uint32_t)RTC_ByteToBcd2(sAlarm->AlarmTime.Minutes) << RTC_ALRMAR_MNU_Pos) | \ ((uint32_t)RTC_ByteToBcd2(sAlarm->AlarmTime.Seconds)) | \ - ((uint32_t)(sAlarm->AlarmTime.TimeFormat) << RTC_TR_PM_Pos) | \ + ((uint32_t)(sAlarm->AlarmTime.TimeFormat) << RTC_ALRMAR_PM_Pos) | \ ((uint32_t)RTC_ByteToBcd2(sAlarm->AlarmDateWeekDay) << RTC_ALRMAR_DU_Pos) | \ ((uint32_t)sAlarm->AlarmDateWeekDaySel) | \ ((uint32_t)sAlarm->AlarmMask)); @@ -1241,7 +1250,7 @@ HAL_StatusTypeDef HAL_RTC_SetAlarm_IT(RTC_HandleTypeDef *hrtc, RTC_AlarmTypeDef tmpreg = (((uint32_t)(sAlarm->AlarmTime.Hours) << RTC_ALRMAR_HU_Pos) | \ ((uint32_t)(sAlarm->AlarmTime.Minutes) << RTC_ALRMAR_MNU_Pos) | \ ((uint32_t) sAlarm->AlarmTime.Seconds) | \ - ((uint32_t)(sAlarm->AlarmTime.TimeFormat) << RTC_TR_PM_Pos) | \ + ((uint32_t)(sAlarm->AlarmTime.TimeFormat) << RTC_ALRMAR_PM_Pos) | \ ((uint32_t)(sAlarm->AlarmDateWeekDay) << RTC_ALRMAR_DU_Pos) | \ ((uint32_t) sAlarm->AlarmDateWeekDaySel) | \ ((uint32_t) sAlarm->AlarmMask)); @@ -1254,10 +1263,10 @@ HAL_StatusTypeDef HAL_RTC_SetAlarm_IT(RTC_HandleTypeDef *hrtc, RTC_AlarmTypeDef /* Disable the write protection for RTC registers */ __HAL_RTC_WRITEPROTECTION_DISABLE(hrtc); - /* Disable the Alarm A */ + /* Disable Alarm A */ __HAL_RTC_ALARMA_DISABLE(hrtc); - /* Clear the Alarm flag */ + /* Clear Alarm A flag */ __HAL_RTC_ALARM_CLEAR_FLAG(hrtc, RTC_FLAG_ALRAF); /* Wait till RTC ALRAWF flag is set and if timeout is reached exit */ @@ -1278,15 +1287,16 @@ HAL_StatusTypeDef HAL_RTC_SetAlarm_IT(RTC_HandleTypeDef *hrtc, RTC_AlarmTypeDef } } while (__HAL_RTC_ALARM_GET_FLAG(hrtc, RTC_FLAG_ALRAWF) == 0U); + /* Configure Alarm A register */ hrtc->Instance->ALRMAR = (uint32_t)tmpreg; - /* Configure the Alarm A Subseconds register */ + /* Configure Alarm A Subseconds register */ hrtc->Instance->ALRMASSR = subsecondtmpreg; - /* Configure the Alarm state: Enable Alarm */ + /* Enable Alarm A */ __HAL_RTC_ALARMA_ENABLE(hrtc); - /* Configure the Alarm interrupt */ + /* Enable Alarm A interrupt */ __HAL_RTC_ALARM_ENABLE_IT(hrtc, RTC_IT_ALRA); - /* RTC Alarm Interrupt Configuration: EXTI configuration */ + /* Enable and configure the EXTI line associated to the RTC Alarm interrupt */ __HAL_RTC_ALARM_EXTI_ENABLE_IT(); __HAL_RTC_ALARM_EXTI_ENABLE_RISING_EDGE(); @@ -1335,7 +1345,7 @@ HAL_StatusTypeDef HAL_RTC_DeactivateAlarm(RTC_HandleTypeDef *hrtc, uint32_t Alar /* Get tick */ tickstart = HAL_GetTick(); - /* Wait till RTC ALRxWF flag is set and if timeout is reached exit */ + /* Wait till RTC ALRAWF flag is set and if timeout is reached exit */ while (__HAL_RTC_ALARM_GET_FLAG(hrtc, RTC_FLAG_ALRAWF) == 0U) { if ((HAL_GetTick() - tickstart) > RTC_TIMEOUT_VALUE) @@ -1420,7 +1430,7 @@ HAL_StatusTypeDef HAL_RTC_GetAlarm(RTC_HandleTypeDef *hrtc, RTC_AlarmTypeDef *sA */ void HAL_RTC_AlarmIRQHandler(RTC_HandleTypeDef *hrtc) { - /* Clear the EXTI's line Flag for RTC Alarm */ + /* Clear the EXTI flag associated to the RTC Alarm interrupt */ __HAL_RTC_ALARM_EXTI_CLEAR_FLAG(); /* Get the Alarm A interrupt source enable status */ diff --git a/Software/Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rtc_ex.c b/Software/Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rtc_ex.c index 265f3fa..a62dd2e 100644 --- a/Software/Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rtc_ex.c +++ b/Software/Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rtc_ex.c @@ -56,7 +56,7 @@ *** Tamper configuration *** ============================ [..] - (+) To Enable the RTC Tamper and configure the Tamper filter count, trigger + (+) To enable the RTC Tamper and configure the Tamper filter count, trigger Edge or Level according to the Tamper filter value (if equal to 0 Edge else Level), sampling frequency, precharge or discharge and Pull-UP use the HAL_RTCEx_SetTamper() function. @@ -90,9 +90,9 @@ This cycle is maintained by a 20-bit counter clocked by RTCCLK. (+) The smooth calibration register (RTC_CALR) specifies the number of RTCCLK clock cycles to be masked during the 32-second cycle. - (+) The RTC Smooth Digital Calibration value and the corresponding calibration - cycle period (32s, 16s, or 8s) can be calibrated using the - HAL_RTCEx_SetSmoothCalib() function. + (+) To configure the RTC Smooth Digital Calibration value and the corresponding + calibration cycle period (32s,16s and 8s) use the HAL_RTCEx_SetSmoothCalib() + function. @endverbatim ****************************************************************************** @@ -271,7 +271,7 @@ HAL_StatusTypeDef HAL_RTCEx_SetTimeStamp_IT(RTC_HandleTypeDef *hrtc, uint32_t RT /* Enable the write protection for RTC registers */ __HAL_RTC_WRITEPROTECTION_ENABLE(hrtc); - /* RTC Timestamp Interrupt Configuration: EXTI configuration */ + /* Enable and configure the EXTI line associated to the RTC Timestamp and Tamper interrupts */ __HAL_RTC_TAMPER_TIMESTAMP_EXTI_ENABLE_IT(); __HAL_RTC_TAMPER_TIMESTAMP_EXTI_ENABLE_RISING_EDGE(); @@ -302,7 +302,7 @@ HAL_StatusTypeDef HAL_RTCEx_DeactivateTimeStamp(RTC_HandleTypeDef *hrtc) /* Disable the write protection for RTC registers */ __HAL_RTC_WRITEPROTECTION_DISABLE(hrtc); - /* In case of interrupt mode is used, the interrupt source must disabled */ + /* In case interrupt mode is used, the interrupt source must disabled */ __HAL_RTC_TIMESTAMP_DISABLE_IT(hrtc, RTC_IT_TS); /* Get the RTC_CR register and clear the bits to be configured */ @@ -519,7 +519,7 @@ HAL_StatusTypeDef HAL_RTCEx_SetTamper_IT(RTC_HandleTypeDef *hrtc, RTC_TamperType /* Copy desired configuration into configuration register */ hrtc->Instance->TAFCR = tmpreg; - /* RTC Tamper Interrupt Configuration: EXTI configuration */ + /* Enable and configure the EXTI line associated to the RTC Timestamp and Tamper interrupts */ __HAL_RTC_TAMPER_TIMESTAMP_EXTI_ENABLE_IT(); __HAL_RTC_TAMPER_TIMESTAMP_EXTI_ENABLE_RISING_EDGE(); @@ -540,8 +540,9 @@ HAL_StatusTypeDef HAL_RTCEx_SetTamper_IT(RTC_HandleTypeDef *hrtc, RTC_TamperType * This parameter can be any combination of the following values: * @arg RTC_TAMPER_1: Tamper 1 * @arg RTC_TAMPER_2: Tamper 2 - * @arg RTC_TAMPER_3: Tamper 3 - * @note RTC_TAMPER_3 is not applicable to all devices. + * @arg RTC_TAMPER_3: Tamper 3 (*) + * + * (*) value not applicable to all devices. * @retval HAL status */ HAL_StatusTypeDef HAL_RTCEx_DeactivateTamper(RTC_HandleTypeDef *hrtc, uint32_t Tamper) @@ -572,7 +573,7 @@ HAL_StatusTypeDef HAL_RTCEx_DeactivateTamper(RTC_HandleTypeDef *hrtc, uint32_t T */ void HAL_RTCEx_TamperTimeStampIRQHandler(RTC_HandleTypeDef *hrtc) { - /* Clear the EXTI's Flag for RTC Timestamp and Tamper */ + /* Clear the EXTI flag associated to the RTC Timestamp and Tamper interrupts */ __HAL_RTC_TAMPER_TIMESTAMP_EXTI_CLEAR_FLAG(); /* Get the Timestamp interrupt source enable status */ @@ -1067,7 +1068,7 @@ HAL_StatusTypeDef HAL_RTCEx_SetWakeUpTimer_IT(RTC_HandleTypeDef *hrtc, uint32_t /* Configure the Wakeup Timer counter */ hrtc->Instance->WUTR = (uint32_t)WakeUpCounter; - /* RTC wakeup timer Interrupt Configuration: EXTI configuration */ + /* Enable and configure the EXTI line associated to the RTC Wakeup Timer interrupt */ __HAL_RTC_WAKEUPTIMER_EXTI_ENABLE_IT(); __HAL_RTC_WAKEUPTIMER_EXTI_ENABLE_RISING_EDGE(); @@ -1109,7 +1110,7 @@ HAL_StatusTypeDef HAL_RTCEx_DeactivateWakeUpTimer(RTC_HandleTypeDef *hrtc) /* Disable the Wakeup Timer */ __HAL_RTC_WAKEUPTIMER_DISABLE(hrtc); - /* In case of interrupt mode is used, the interrupt source must disabled */ + /* In case interrupt mode is used, the interrupt source must disabled */ __HAL_RTC_WAKEUPTIMER_DISABLE_IT(hrtc, RTC_IT_WUT); /* Get tick */ @@ -1163,7 +1164,7 @@ uint32_t HAL_RTCEx_GetWakeUpTimer(RTC_HandleTypeDef *hrtc) */ void HAL_RTCEx_WakeUpTimerIRQHandler(RTC_HandleTypeDef *hrtc) { - /* Clear the EXTI's line Flag for RTC WakeUpTimer */ + /* Clear the EXTI flag associated to the RTC Wakeup Timer interrupt */ __HAL_RTC_WAKEUPTIMER_EXTI_CLEAR_FLAG(); /* Get the Wakeup timer interrupt source enable status */ @@ -1286,7 +1287,7 @@ void HAL_RTCEx_BKUPWrite(RTC_HandleTypeDef *hrtc, uint32_t BackupRegister, uint3 /* Check the parameters */ assert_param(IS_RTC_BKP(BackupRegister)); - tmp = (uint32_t) & (hrtc->Instance->BKP0R); + tmp = (uint32_t) &(hrtc->Instance->BKP0R); tmp += (BackupRegister * 4U); /* Write the specified register */ @@ -1309,7 +1310,7 @@ uint32_t HAL_RTCEx_BKUPRead(RTC_HandleTypeDef *hrtc, uint32_t BackupRegister) /* Check the parameters */ assert_param(IS_RTC_BKP(BackupRegister)); - tmp = (uint32_t) & (hrtc->Instance->BKP0R); + tmp = (uint32_t) &(hrtc->Instance->BKP0R); tmp += (BackupRegister * 4U); /* Read the specified register */ diff --git a/Software/Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_smartcard.c b/Software/Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_smartcard.c index 4bbe054..1480f31 100644 --- a/Software/Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_smartcard.c +++ b/Software/Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_smartcard.c @@ -134,7 +134,7 @@ [..] Use function HAL_SMARTCARD_UnRegisterCallback() to reset a callback to the default - weak (surcharged) function. + weak function. HAL_SMARTCARD_UnRegisterCallback() takes as parameters the HAL peripheral handle, and the Callback ID. This function allows to reset following callbacks: @@ -149,10 +149,10 @@ [..] By default, after the HAL_SMARTCARD_Init() and when the state is HAL_SMARTCARD_STATE_RESET - all callbacks are set to the corresponding weak (surcharged) functions: + all callbacks are set to the corresponding weak functions: examples HAL_SMARTCARD_TxCpltCallback(), HAL_SMARTCARD_RxCpltCallback(). Exception done for MspInit and MspDeInit functions that are respectively - reset to the legacy weak (surcharged) functions in the HAL_SMARTCARD_Init() + reset to the legacy weak functions in the HAL_SMARTCARD_Init() and HAL_SMARTCARD_DeInit() only when these callbacks are null (not registered beforehand). If not, MspInit or MspDeInit are not null, the HAL_SMARTCARD_Init() and HAL_SMARTCARD_DeInit() keep and use the user MspInit/MspDeInit callbacks (registered beforehand). @@ -169,7 +169,7 @@ [..] When The compilation define USE_HAL_SMARTCARD_REGISTER_CALLBACKS is set to 0 or not defined, the callback registration feature is not available - and weak (surcharged) callbacks are used. + and weak callbacks are used. @endverbatim @@ -461,7 +461,7 @@ __weak void HAL_SMARTCARD_MspDeInit(SMARTCARD_HandleTypeDef *hsmartcard) #if (USE_HAL_SMARTCARD_REGISTER_CALLBACKS == 1) /** * @brief Register a User SMARTCARD Callback - * To be used instead of the weak predefined callback + * To be used to override the weak predefined callback * @note The HAL_SMARTCARD_RegisterCallback() may be called before HAL_SMARTCARD_Init() * in HAL_SMARTCARD_STATE_RESET to register callbacks for HAL_SMARTCARD_MSPINIT_CB_ID * and HAL_SMARTCARD_MSPDEINIT_CB_ID @@ -2283,7 +2283,7 @@ static HAL_StatusTypeDef SMARTCARD_SetConfig(SMARTCARD_HandleTypeDef *hsmartcard assert_param(IS_SMARTCARD_TIMEOUT_VALUE(hsmartcard->Init.TimeOutValue)); tmpreg |= (uint32_t) hsmartcard->Init.TimeOutValue; } - MODIFY_REG(hsmartcard->Instance->RTOR, (USART_RTOR_RTO | USART_RTOR_BLEN), tmpreg); + WRITE_REG(hsmartcard->Instance->RTOR, tmpreg); /*-------------------------- USART BRR Configuration -----------------------*/ SMARTCARD_GETCLOCKSOURCE(hsmartcard, clocksource); diff --git a/Software/Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_smbus.c b/Software/Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_smbus.c index 19418d7..877e8ef 100644 --- a/Software/Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_smbus.c +++ b/Software/Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_smbus.c @@ -926,6 +926,7 @@ HAL_StatusTypeDef HAL_SMBUS_Master_Transmit_IT(SMBUS_HandleTypeDef *hsmbus, uint uint8_t *pData, uint16_t Size, uint32_t XferOptions) { uint32_t tmp; + uint32_t sizetoxfer; /* Check the parameters */ assert_param(IS_SMBUS_TRANSFER_OPTIONS_REQUEST(XferOptions)); @@ -958,11 +959,35 @@ HAL_StatusTypeDef HAL_SMBUS_Master_Transmit_IT(SMBUS_HandleTypeDef *hsmbus, uint hsmbus->XferSize = Size; } + sizetoxfer = hsmbus->XferSize; + if ((sizetoxfer > 0U) && ((XferOptions == SMBUS_FIRST_FRAME) || + (XferOptions == SMBUS_FIRST_AND_LAST_FRAME_NO_PEC) || + (XferOptions == SMBUS_FIRST_FRAME_WITH_PEC) || + (XferOptions == SMBUS_FIRST_AND_LAST_FRAME_WITH_PEC))) + { + if (hsmbus->pBuffPtr != NULL) + { + /* Preload TX register */ + /* Write data to TXDR */ + hsmbus->Instance->TXDR = *hsmbus->pBuffPtr; + + /* Increment Buffer pointer */ + hsmbus->pBuffPtr++; + + hsmbus->XferCount--; + hsmbus->XferSize--; + } + else + { + return HAL_ERROR; + } + } + /* Send Slave Address */ /* Set NBYTES to write and reload if size > MAX_NBYTE_SIZE and generate RESTART */ - if ((hsmbus->XferSize < hsmbus->XferCount) && (hsmbus->XferSize == MAX_NBYTE_SIZE)) + if ((sizetoxfer < hsmbus->XferCount) && (sizetoxfer == MAX_NBYTE_SIZE)) { - SMBUS_TransferConfig(hsmbus, DevAddress, (uint8_t)hsmbus->XferSize, + SMBUS_TransferConfig(hsmbus, DevAddress, (uint8_t)sizetoxfer, SMBUS_RELOAD_MODE | (hsmbus->XferOptions & SMBUS_SENDPEC_MODE), SMBUS_GENERATE_START_WRITE); } @@ -977,7 +1002,7 @@ HAL_StatusTypeDef HAL_SMBUS_Master_Transmit_IT(SMBUS_HandleTypeDef *hsmbus, uint if ((hsmbus->PreviousState == HAL_SMBUS_STATE_MASTER_BUSY_TX) && \ (IS_SMBUS_TRANSFER_OTHER_OPTIONS_REQUEST(tmp) == 0)) { - SMBUS_TransferConfig(hsmbus, DevAddress, (uint8_t)hsmbus->XferSize, hsmbus->XferOptions, + SMBUS_TransferConfig(hsmbus, DevAddress, (uint8_t)sizetoxfer, hsmbus->XferOptions, SMBUS_NO_STARTSTOP); } /* Else transfer direction change, so generate Restart with new transfer direction */ @@ -987,7 +1012,7 @@ HAL_StatusTypeDef HAL_SMBUS_Master_Transmit_IT(SMBUS_HandleTypeDef *hsmbus, uint SMBUS_ConvertOtherXferOptions(hsmbus); /* Handle Transfer */ - SMBUS_TransferConfig(hsmbus, DevAddress, (uint8_t)hsmbus->XferSize, + SMBUS_TransferConfig(hsmbus, DevAddress, (uint8_t)sizetoxfer, hsmbus->XferOptions, SMBUS_GENERATE_START_WRITE); } @@ -996,8 +1021,15 @@ HAL_StatusTypeDef HAL_SMBUS_Master_Transmit_IT(SMBUS_HandleTypeDef *hsmbus, uint /* PEC byte is automatically sent by HW block, no need to manage it in Transmit process */ if (SMBUS_GET_PEC_MODE(hsmbus) != 0UL) { - hsmbus->XferSize--; - hsmbus->XferCount--; + if (hsmbus->XferSize > 0U) + { + hsmbus->XferSize--; + hsmbus->XferCount--; + } + else + { + return HAL_ERROR; + } } } @@ -2587,8 +2619,11 @@ static void SMBUS_ITErrorHandler(SMBUS_HandleTypeDef *hsmbus) __HAL_SMBUS_CLEAR_FLAG(hsmbus, SMBUS_FLAG_PECERR); } - /* Flush TX register */ - SMBUS_Flush_TXDR(hsmbus); + if (hsmbus->ErrorCode != HAL_SMBUS_ERROR_NONE) + { + /* Flush TX register */ + SMBUS_Flush_TXDR(hsmbus); + } /* Store current volatile hsmbus->ErrorCode, misra rule */ tmperror = hsmbus->ErrorCode; diff --git a/Software/Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_spi.c b/Software/Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_spi.c index 889eba4..19accd1 100644 --- a/Software/Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_spi.c +++ b/Software/Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_spi.c @@ -1337,6 +1337,20 @@ HAL_StatusTypeDef HAL_SPI_TransmitReceive(SPI_HandleTypeDef *hspi, uint8_t *pTxD hspi->Instance->DR = *((uint16_t *)hspi->pTxBuffPtr); hspi->pTxBuffPtr += sizeof(uint16_t); hspi->TxXferCount--; + +#if (USE_SPI_CRC != 0U) + /* Enable CRC Transmission */ + if ((hspi->TxXferCount == 0U) && (hspi->Init.CRCCalculation == SPI_CRCCALCULATION_ENABLE)) + { + /* Set NSS Soft to received correctly the CRC on slave mode with NSS pulse activated */ + if ((READ_BIT(spi_cr1, SPI_CR1_MSTR) == 0U) && (READ_BIT(spi_cr2, SPI_CR2_NSSP) == SPI_CR2_NSSP)) + { + SET_BIT(hspi->Instance->CR1, SPI_CR1_SSM); + } + SET_BIT(hspi->Instance->CR1, SPI_CR1_CRCNEXT); + } +#endif /* USE_SPI_CRC */ + } while ((hspi->TxXferCount > 0U) || (hspi->RxXferCount > 0U)) { @@ -1388,6 +1402,19 @@ HAL_StatusTypeDef HAL_SPI_TransmitReceive(SPI_HandleTypeDef *hspi, uint8_t *pTxD *((__IO uint8_t *)&hspi->Instance->DR) = (*hspi->pTxBuffPtr); hspi->pTxBuffPtr += sizeof(uint8_t); hspi->TxXferCount--; + +#if (USE_SPI_CRC != 0U) + /* Enable CRC Transmission */ + if ((hspi->TxXferCount == 0U) && (hspi->Init.CRCCalculation == SPI_CRCCALCULATION_ENABLE)) + { + /* Set NSS Soft to received correctly the CRC on slave mode with NSS pulse activated */ + if ((READ_BIT(spi_cr1, SPI_CR1_MSTR) == 0U) && (READ_BIT(spi_cr2, SPI_CR2_NSSP) == SPI_CR2_NSSP)) + { + SET_BIT(hspi->Instance->CR1, SPI_CR1_SSM); + } + SET_BIT(hspi->Instance->CR1, SPI_CR1_CRCNEXT); + } +#endif /* USE_SPI_CRC */ } while ((hspi->TxXferCount > 0U) || (hspi->RxXferCount > 0U)) { @@ -1525,8 +1552,6 @@ HAL_StatusTypeDef HAL_SPI_Transmit_IT(SPI_HandleTypeDef *hspi, uint8_t *pData, u /* Check Direction parameter */ assert_param(IS_SPI_DIRECTION_2LINES_OR_1LINE(hspi->Init.Direction)); - /* Process Locked */ - __HAL_LOCK(hspi); if ((pData == NULL) || (Size == 0U)) { @@ -1540,6 +1565,9 @@ HAL_StatusTypeDef HAL_SPI_Transmit_IT(SPI_HandleTypeDef *hspi, uint8_t *pData, u goto error; } + /* Process Locked */ + __HAL_LOCK(hspi); + /* Set the transaction information */ hspi->State = HAL_SPI_STATE_BUSY_TX; hspi->ErrorCode = HAL_SPI_ERROR_NONE; @@ -1579,10 +1607,6 @@ HAL_StatusTypeDef HAL_SPI_Transmit_IT(SPI_HandleTypeDef *hspi, uint8_t *pData, u } #endif /* USE_SPI_CRC */ - /* Enable TXE and ERR interrupt */ - __HAL_SPI_ENABLE_IT(hspi, (SPI_IT_TXE | SPI_IT_ERR)); - - /* Check if the SPI is already enabled */ if ((hspi->Instance->CR1 & SPI_CR1_SPE) != SPI_CR1_SPE) { @@ -1590,8 +1614,12 @@ HAL_StatusTypeDef HAL_SPI_Transmit_IT(SPI_HandleTypeDef *hspi, uint8_t *pData, u __HAL_SPI_ENABLE(hspi); } -error : + /* Process Unlocked */ __HAL_UNLOCK(hspi); + /* Enable TXE and ERR interrupt */ + __HAL_SPI_ENABLE_IT(hspi, (SPI_IT_TXE | SPI_IT_ERR)); + +error : return errorcode; } @@ -1621,8 +1649,6 @@ HAL_StatusTypeDef HAL_SPI_Receive_IT(SPI_HandleTypeDef *hspi, uint8_t *pData, ui return HAL_SPI_TransmitReceive_IT(hspi, pData, pData, Size); } - /* Process Locked */ - __HAL_LOCK(hspi); if ((pData == NULL) || (Size == 0U)) { @@ -1630,6 +1656,9 @@ HAL_StatusTypeDef HAL_SPI_Receive_IT(SPI_HandleTypeDef *hspi, uint8_t *pData, ui goto error; } + /* Process Locked */ + __HAL_LOCK(hspi); + /* Set the transaction information */ hspi->State = HAL_SPI_STATE_BUSY_RX; hspi->ErrorCode = HAL_SPI_ERROR_NONE; @@ -1682,9 +1711,6 @@ HAL_StatusTypeDef HAL_SPI_Receive_IT(SPI_HandleTypeDef *hspi, uint8_t *pData, ui } #endif /* USE_SPI_CRC */ - /* Enable TXE and ERR interrupt */ - __HAL_SPI_ENABLE_IT(hspi, (SPI_IT_RXNE | SPI_IT_ERR)); - /* Note : The SPI must be enabled after unlocking current process to avoid the risk of SPI interrupt handle execution before current process unlock */ @@ -1696,9 +1722,12 @@ HAL_StatusTypeDef HAL_SPI_Receive_IT(SPI_HandleTypeDef *hspi, uint8_t *pData, ui __HAL_SPI_ENABLE(hspi); } -error : /* Process Unlocked */ __HAL_UNLOCK(hspi); + /* Enable RXNE and ERR interrupt */ + __HAL_SPI_ENABLE_IT(hspi, (SPI_IT_RXNE | SPI_IT_ERR)); + +error : return errorcode; } @@ -1720,9 +1749,6 @@ HAL_StatusTypeDef HAL_SPI_TransmitReceive_IT(SPI_HandleTypeDef *hspi, uint8_t *p /* Check Direction parameter */ assert_param(IS_SPI_DIRECTION_2LINES(hspi->Init.Direction)); - /* Process locked */ - __HAL_LOCK(hspi); - /* Init temporary variables */ tmp_state = hspi->State; tmp_mode = hspi->Init.Mode; @@ -1740,6 +1766,9 @@ HAL_StatusTypeDef HAL_SPI_TransmitReceive_IT(SPI_HandleTypeDef *hspi, uint8_t *p goto error; } + /* Process locked */ + __HAL_LOCK(hspi); + /* Don't overwrite in case of HAL_SPI_STATE_BUSY_RX */ if (hspi->State != HAL_SPI_STATE_BUSY_RX) { @@ -1796,8 +1825,6 @@ HAL_StatusTypeDef HAL_SPI_TransmitReceive_IT(SPI_HandleTypeDef *hspi, uint8_t *p SET_BIT(hspi->Instance->CR2, SPI_RXFIFO_THRESHOLD); } - /* Enable TXE, RXNE and ERR interrupt */ - __HAL_SPI_ENABLE_IT(hspi, (SPI_IT_TXE | SPI_IT_RXNE | SPI_IT_ERR)); /* Check if the SPI is already enabled */ if ((hspi->Instance->CR1 & SPI_CR1_SPE) != SPI_CR1_SPE) @@ -1806,9 +1833,12 @@ HAL_StatusTypeDef HAL_SPI_TransmitReceive_IT(SPI_HandleTypeDef *hspi, uint8_t *p __HAL_SPI_ENABLE(hspi); } -error : /* Process Unlocked */ __HAL_UNLOCK(hspi); + /* Enable TXE, RXNE and ERR interrupt */ + __HAL_SPI_ENABLE_IT(hspi, (SPI_IT_TXE | SPI_IT_RXNE | SPI_IT_ERR)); + +error : return errorcode; } @@ -1950,13 +1980,13 @@ HAL_StatusTypeDef HAL_SPI_Receive_DMA(SPI_HandleTypeDef *hspi, uint8_t *pData, u /* Check rx dma handle */ assert_param(IS_SPI_DMA_HANDLE(hspi->hdmarx)); - + if (hspi->State != HAL_SPI_STATE_READY) { errorcode = HAL_BUSY; goto error; } - + if ((hspi->Init.Direction == SPI_DIRECTION_2LINES) && (hspi->Init.Mode == SPI_MODE_MASTER)) { hspi->State = HAL_SPI_STATE_BUSY_RX; diff --git a/Software/Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_spi_ex.c b/Software/Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_spi_ex.c index f13ecea..dda4a31 100644 --- a/Software/Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_spi_ex.c +++ b/Software/Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_spi_ex.c @@ -76,7 +76,7 @@ * the configuration information for the specified SPI module. * @retval HAL status */ -HAL_StatusTypeDef HAL_SPIEx_FlushRxFifo(SPI_HandleTypeDef *hspi) +HAL_StatusTypeDef HAL_SPIEx_FlushRxFifo(const SPI_HandleTypeDef *hspi) { __IO uint32_t tmpreg; uint8_t count = 0U; diff --git a/Software/Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c b/Software/Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c index e9828d1..44e40a7 100644 --- a/Software/Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c +++ b/Software/Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c @@ -3822,13 +3822,16 @@ HAL_StatusTypeDef HAL_TIM_Encoder_Stop_DMA(TIM_HandleTypeDef *htim, uint32_t Cha */ void HAL_TIM_IRQHandler(TIM_HandleTypeDef *htim) { + uint32_t itsource = htim->Instance->DIER; + uint32_t itflag = htim->Instance->SR; + /* Capture compare 1 event */ - if (__HAL_TIM_GET_FLAG(htim, TIM_FLAG_CC1) != RESET) + if ((itflag & (TIM_FLAG_CC1)) == (TIM_FLAG_CC1)) { - if (__HAL_TIM_GET_IT_SOURCE(htim, TIM_IT_CC1) != RESET) + if ((itsource & (TIM_IT_CC1)) == (TIM_IT_CC1)) { { - __HAL_TIM_CLEAR_IT(htim, TIM_IT_CC1); + __HAL_TIM_CLEAR_FLAG(htim, TIM_FLAG_CC1); htim->Channel = HAL_TIM_ACTIVE_CHANNEL_1; /* Input capture event */ @@ -3856,11 +3859,11 @@ void HAL_TIM_IRQHandler(TIM_HandleTypeDef *htim) } } /* Capture compare 2 event */ - if (__HAL_TIM_GET_FLAG(htim, TIM_FLAG_CC2) != RESET) + if ((itflag & (TIM_FLAG_CC2)) == (TIM_FLAG_CC2)) { - if (__HAL_TIM_GET_IT_SOURCE(htim, TIM_IT_CC2) != RESET) + if ((itsource & (TIM_IT_CC2)) == (TIM_IT_CC2)) { - __HAL_TIM_CLEAR_IT(htim, TIM_IT_CC2); + __HAL_TIM_CLEAR_FLAG(htim, TIM_FLAG_CC2); htim->Channel = HAL_TIM_ACTIVE_CHANNEL_2; /* Input capture event */ if ((htim->Instance->CCMR1 & TIM_CCMR1_CC2S) != 0x00U) @@ -3886,11 +3889,11 @@ void HAL_TIM_IRQHandler(TIM_HandleTypeDef *htim) } } /* Capture compare 3 event */ - if (__HAL_TIM_GET_FLAG(htim, TIM_FLAG_CC3) != RESET) + if ((itflag & (TIM_FLAG_CC3)) == (TIM_FLAG_CC3)) { - if (__HAL_TIM_GET_IT_SOURCE(htim, TIM_IT_CC3) != RESET) + if ((itsource & (TIM_IT_CC3)) == (TIM_IT_CC3)) { - __HAL_TIM_CLEAR_IT(htim, TIM_IT_CC3); + __HAL_TIM_CLEAR_FLAG(htim, TIM_FLAG_CC3); htim->Channel = HAL_TIM_ACTIVE_CHANNEL_3; /* Input capture event */ if ((htim->Instance->CCMR2 & TIM_CCMR2_CC3S) != 0x00U) @@ -3916,11 +3919,11 @@ void HAL_TIM_IRQHandler(TIM_HandleTypeDef *htim) } } /* Capture compare 4 event */ - if (__HAL_TIM_GET_FLAG(htim, TIM_FLAG_CC4) != RESET) + if ((itflag & (TIM_FLAG_CC4)) == (TIM_FLAG_CC4)) { - if (__HAL_TIM_GET_IT_SOURCE(htim, TIM_IT_CC4) != RESET) + if ((itsource & (TIM_IT_CC4)) == (TIM_IT_CC4)) { - __HAL_TIM_CLEAR_IT(htim, TIM_IT_CC4); + __HAL_TIM_CLEAR_FLAG(htim, TIM_FLAG_CC4); htim->Channel = HAL_TIM_ACTIVE_CHANNEL_4; /* Input capture event */ if ((htim->Instance->CCMR2 & TIM_CCMR2_CC4S) != 0x00U) @@ -3946,11 +3949,11 @@ void HAL_TIM_IRQHandler(TIM_HandleTypeDef *htim) } } /* TIM Update event */ - if (__HAL_TIM_GET_FLAG(htim, TIM_FLAG_UPDATE) != RESET) + if ((itflag & (TIM_FLAG_UPDATE)) == (TIM_FLAG_UPDATE)) { - if (__HAL_TIM_GET_IT_SOURCE(htim, TIM_IT_UPDATE) != RESET) + if ((itsource & (TIM_IT_UPDATE)) == (TIM_IT_UPDATE)) { - __HAL_TIM_CLEAR_IT(htim, TIM_IT_UPDATE); + __HAL_TIM_CLEAR_FLAG(htim, TIM_FLAG_UPDATE); #if (USE_HAL_TIM_REGISTER_CALLBACKS == 1) htim->PeriodElapsedCallback(htim); #else @@ -3959,11 +3962,11 @@ void HAL_TIM_IRQHandler(TIM_HandleTypeDef *htim) } } /* TIM Break input event */ - if (__HAL_TIM_GET_FLAG(htim, TIM_FLAG_BREAK) != RESET) + if ((itflag & (TIM_FLAG_BREAK)) == (TIM_FLAG_BREAK)) { - if (__HAL_TIM_GET_IT_SOURCE(htim, TIM_IT_BREAK) != RESET) + if ((itsource & (TIM_IT_BREAK)) == (TIM_IT_BREAK)) { - __HAL_TIM_CLEAR_IT(htim, TIM_IT_BREAK); + __HAL_TIM_CLEAR_FLAG(htim, TIM_FLAG_BREAK); #if (USE_HAL_TIM_REGISTER_CALLBACKS == 1) htim->BreakCallback(htim); #else @@ -3972,11 +3975,11 @@ void HAL_TIM_IRQHandler(TIM_HandleTypeDef *htim) } } /* TIM Trigger detection event */ - if (__HAL_TIM_GET_FLAG(htim, TIM_FLAG_TRIGGER) != RESET) + if ((itflag & (TIM_FLAG_TRIGGER)) == (TIM_FLAG_TRIGGER)) { - if (__HAL_TIM_GET_IT_SOURCE(htim, TIM_IT_TRIGGER) != RESET) + if ((itsource & (TIM_IT_TRIGGER)) == (TIM_IT_TRIGGER)) { - __HAL_TIM_CLEAR_IT(htim, TIM_IT_TRIGGER); + __HAL_TIM_CLEAR_FLAG(htim, TIM_FLAG_TRIGGER); #if (USE_HAL_TIM_REGISTER_CALLBACKS == 1) htim->TriggerCallback(htim); #else @@ -3985,11 +3988,11 @@ void HAL_TIM_IRQHandler(TIM_HandleTypeDef *htim) } } /* TIM commutation event */ - if (__HAL_TIM_GET_FLAG(htim, TIM_FLAG_COM) != RESET) + if ((itflag & (TIM_FLAG_COM)) == (TIM_FLAG_COM)) { - if (__HAL_TIM_GET_IT_SOURCE(htim, TIM_IT_COM) != RESET) + if ((itsource & (TIM_IT_COM)) == (TIM_IT_COM)) { - __HAL_TIM_CLEAR_IT(htim, TIM_FLAG_COM); + __HAL_TIM_CLEAR_FLAG(htim, TIM_FLAG_COM); #if (USE_HAL_TIM_REGISTER_CALLBACKS == 1) htim->CommutationCallback(htim); #else @@ -4476,7 +4479,8 @@ HAL_StatusTypeDef HAL_TIM_OnePulse_ConfigChannel(TIM_HandleTypeDef *htim, TIM_O * @retval HAL status */ HAL_StatusTypeDef HAL_TIM_DMABurst_WriteStart(TIM_HandleTypeDef *htim, uint32_t BurstBaseAddress, - uint32_t BurstRequestSrc, const uint32_t *BurstBuffer, uint32_t BurstLength) + uint32_t BurstRequestSrc, const uint32_t *BurstBuffer, + uint32_t BurstLength) { HAL_StatusTypeDef status; @@ -6819,6 +6823,13 @@ void TIM_Base_SetConfig(TIM_TypeDef *TIMx, const TIM_Base_InitTypeDef *Structure /* Generate an update event to reload the Prescaler and the repetition counter (only for advanced timer) value immediately */ TIMx->EGR = TIM_EGR_UG; + + /* Check if the update flag is set after the Update Generation, if so clear the UIF flag */ + if (HAL_IS_BIT_SET(TIMx->SR, TIM_FLAG_UPDATE)) + { + /* Clear the update flag */ + CLEAR_BIT(TIMx->SR, TIM_FLAG_UPDATE); + } } /** @@ -6833,11 +6844,12 @@ static void TIM_OC1_SetConfig(TIM_TypeDef *TIMx, const TIM_OC_InitTypeDef *OC_Co uint32_t tmpccer; uint32_t tmpcr2; + /* Get the TIMx CCER register value */ + tmpccer = TIMx->CCER; + /* Disable the Channel 1: Reset the CC1E Bit */ TIMx->CCER &= ~TIM_CCER_CC1E; - /* Get the TIMx CCER register value */ - tmpccer = TIMx->CCER; /* Get the TIMx CR2 register value */ tmpcr2 = TIMx->CR2; @@ -6908,11 +6920,12 @@ void TIM_OC2_SetConfig(TIM_TypeDef *TIMx, const TIM_OC_InitTypeDef *OC_Config) uint32_t tmpccer; uint32_t tmpcr2; + /* Get the TIMx CCER register value */ + tmpccer = TIMx->CCER; + /* Disable the Channel 2: Reset the CC2E Bit */ TIMx->CCER &= ~TIM_CCER_CC2E; - /* Get the TIMx CCER register value */ - tmpccer = TIMx->CCER; /* Get the TIMx CR2 register value */ tmpcr2 = TIMx->CR2; @@ -6941,7 +6954,6 @@ void TIM_OC2_SetConfig(TIM_TypeDef *TIMx, const TIM_OC_InitTypeDef *OC_Config) tmpccer |= (OC_Config->OCNPolarity << 4U); /* Reset the Output N State */ tmpccer &= ~TIM_CCER_CC2NE; - } if (IS_TIM_BREAK_INSTANCE(TIMx)) @@ -6984,11 +6996,12 @@ static void TIM_OC3_SetConfig(TIM_TypeDef *TIMx, const TIM_OC_InitTypeDef *OC_Co uint32_t tmpccer; uint32_t tmpcr2; + /* Get the TIMx CCER register value */ + tmpccer = TIMx->CCER; + /* Disable the Channel 3: Reset the CC2E Bit */ TIMx->CCER &= ~TIM_CCER_CC3E; - /* Get the TIMx CCER register value */ - tmpccer = TIMx->CCER; /* Get the TIMx CR2 register value */ tmpcr2 = TIMx->CR2; @@ -7058,11 +7071,12 @@ static void TIM_OC4_SetConfig(TIM_TypeDef *TIMx, const TIM_OC_InitTypeDef *OC_Co uint32_t tmpccer; uint32_t tmpcr2; + /* Get the TIMx CCER register value */ + tmpccer = TIMx->CCER; + /* Disable the Channel 4: Reset the CC4E Bit */ TIMx->CCER &= ~TIM_CCER_CC4E; - /* Get the TIMx CCER register value */ - tmpccer = TIMx->CCER; /* Get the TIMx CR2 register value */ tmpcr2 = TIMx->CR2; @@ -7253,9 +7267,9 @@ void TIM_TI1_SetConfig(TIM_TypeDef *TIMx, uint32_t TIM_ICPolarity, uint32_t TIM_ uint32_t tmpccer; /* Disable the Channel 1: Reset the CC1E Bit */ + tmpccer = TIMx->CCER; TIMx->CCER &= ~TIM_CCER_CC1E; tmpccmr1 = TIMx->CCMR1; - tmpccer = TIMx->CCER; /* Select the Input */ if (IS_TIM_CC2_INSTANCE(TIMx) != RESET) @@ -7343,9 +7357,9 @@ static void TIM_TI2_SetConfig(TIM_TypeDef *TIMx, uint32_t TIM_ICPolarity, uint32 uint32_t tmpccer; /* Disable the Channel 2: Reset the CC2E Bit */ + tmpccer = TIMx->CCER; TIMx->CCER &= ~TIM_CCER_CC2E; tmpccmr1 = TIMx->CCMR1; - tmpccer = TIMx->CCER; /* Select the Input */ tmpccmr1 &= ~TIM_CCMR1_CC2S; @@ -7382,9 +7396,9 @@ static void TIM_TI2_ConfigInputStage(TIM_TypeDef *TIMx, uint32_t TIM_ICPolarity, uint32_t tmpccer; /* Disable the Channel 2: Reset the CC2E Bit */ + tmpccer = TIMx->CCER; TIMx->CCER &= ~TIM_CCER_CC2E; tmpccmr1 = TIMx->CCMR1; - tmpccer = TIMx->CCER; /* Set the filter */ tmpccmr1 &= ~TIM_CCMR1_IC2F; @@ -7426,9 +7440,9 @@ static void TIM_TI3_SetConfig(TIM_TypeDef *TIMx, uint32_t TIM_ICPolarity, uint32 uint32_t tmpccer; /* Disable the Channel 3: Reset the CC3E Bit */ + tmpccer = TIMx->CCER; TIMx->CCER &= ~TIM_CCER_CC3E; tmpccmr2 = TIMx->CCMR2; - tmpccer = TIMx->CCER; /* Select the Input */ tmpccmr2 &= ~TIM_CCMR2_CC3S; @@ -7474,9 +7488,9 @@ static void TIM_TI4_SetConfig(TIM_TypeDef *TIMx, uint32_t TIM_ICPolarity, uint32 uint32_t tmpccer; /* Disable the Channel 4: Reset the CC4E Bit */ + tmpccer = TIMx->CCER; TIMx->CCER &= ~TIM_CCER_CC4E; tmpccmr2 = TIMx->CCMR2; - tmpccer = TIMx->CCER; /* Select the Input */ tmpccmr2 &= ~TIM_CCMR2_CC4S; diff --git a/Software/Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c b/Software/Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c index 1a3d770..6964b56 100644 --- a/Software/Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c +++ b/Software/Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c @@ -836,7 +836,7 @@ HAL_StatusTypeDef HAL_TIMEx_OCN_Stop_IT(TIM_HandleTypeDef *htim, uint32_t Channe /* Disable the TIM Break interrupt (only if no more channel is active) */ tmpccer = htim->Instance->CCER; - if ((tmpccer & (TIM_CCER_CC1NE | TIM_CCER_CC2NE | TIM_CCER_CC3NE)) == (uint32_t)RESET) + if ((tmpccer & TIM_CCER_CCxNE_MASK) == (uint32_t)RESET) { __HAL_TIM_DISABLE_IT(htim, TIM_IT_BREAK); } @@ -1082,17 +1082,6 @@ HAL_StatusTypeDef HAL_TIMEx_OCN_Stop_DMA(TIM_HandleTypeDef *htim, uint32_t Chann (+) Stop the Complementary PWM and disable interrupts. (+) Start the Complementary PWM and enable DMA transfers. (+) Stop the Complementary PWM and disable DMA transfers. - (+) Start the Complementary Input Capture measurement. - (+) Stop the Complementary Input Capture. - (+) Start the Complementary Input Capture and enable interrupts. - (+) Stop the Complementary Input Capture and disable interrupts. - (+) Start the Complementary Input Capture and enable DMA transfers. - (+) Stop the Complementary Input Capture and disable DMA transfers. - (+) Start the Complementary One Pulse generation. - (+) Stop the Complementary One Pulse. - (+) Start the Complementary One Pulse and enable interrupts. - (+) Stop the Complementary One Pulse and disable interrupts. - @endverbatim * @{ */ @@ -1318,7 +1307,7 @@ HAL_StatusTypeDef HAL_TIMEx_PWMN_Stop_IT(TIM_HandleTypeDef *htim, uint32_t Chann /* Disable the TIM Break interrupt (only if no more channel is active) */ tmpccer = htim->Instance->CCER; - if ((tmpccer & (TIM_CCER_CC1NE | TIM_CCER_CC2NE | TIM_CCER_CC3NE)) == (uint32_t)RESET) + if ((tmpccer & TIM_CCER_CCxNE_MASK) == (uint32_t)RESET) { __HAL_TIM_DISABLE_IT(htim, TIM_IT_BREAK); } @@ -2113,7 +2102,7 @@ HAL_StatusTypeDef HAL_TIMEx_RemapConfig(TIM_HandleTypeDef *htim, uint32_t Remap) */ /** - * @brief Hall commutation changed callback in non-blocking mode + * @brief Commutation callback in non-blocking mode * @param htim TIM handle * @retval None */ @@ -2127,7 +2116,7 @@ __weak void HAL_TIMEx_CommutCallback(TIM_HandleTypeDef *htim) */ } /** - * @brief Hall commutation changed half complete callback in non-blocking mode + * @brief Commutation half complete callback in non-blocking mode * @param htim TIM handle * @retval None */ @@ -2142,7 +2131,7 @@ __weak void HAL_TIMEx_CommutHalfCpltCallback(TIM_HandleTypeDef *htim) } /** - * @brief Hall Break detection callback in non-blocking mode + * @brief Break detection callback in non-blocking mode * @param htim TIM handle * @retval None */ @@ -2293,15 +2282,6 @@ static void TIM_DMADelayPulseNCplt(DMA_HandleTypeDef *hdma) TIM_CHANNEL_N_STATE_SET(htim, TIM_CHANNEL_3, HAL_TIM_CHANNEL_STATE_READY); } } - else if (hdma == htim->hdma[TIM_DMA_ID_CC4]) - { - htim->Channel = HAL_TIM_ACTIVE_CHANNEL_4; - - if (hdma->Init.Mode == DMA_NORMAL) - { - TIM_CHANNEL_N_STATE_SET(htim, TIM_CHANNEL_4, HAL_TIM_CHANNEL_STATE_READY); - } - } else { /* nothing to do */ @@ -2370,13 +2350,13 @@ static void TIM_CCxNChannelCmd(TIM_TypeDef *TIMx, uint32_t Channel, uint32_t Cha { uint32_t tmp; - tmp = TIM_CCER_CC1NE << (Channel & 0x1FU); /* 0x1FU = 31 bits max shift */ + tmp = TIM_CCER_CC1NE << (Channel & 0xFU); /* 0xFU = 15 bits max shift */ /* Reset the CCxNE Bit */ TIMx->CCER &= ~tmp; /* Set or reset the CCxNE Bit */ - TIMx->CCER |= (uint32_t)(ChannelNState << (Channel & 0x1FU)); /* 0x1FU = 31 bits max shift */ + TIMx->CCER |= (uint32_t)(ChannelNState << (Channel & 0xFU)); /* 0xFU = 15 bits max shift */ } /** * @} diff --git a/Software/Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_timebase_rtc_alarm_template.c b/Software/Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_timebase_rtc_alarm_template.c index f312a3b..3a2b19e 100644 --- a/Software/Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_timebase_rtc_alarm_template.c +++ b/Software/Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_timebase_rtc_alarm_template.c @@ -103,19 +103,19 @@ HAL_StatusTypeDef HAL_InitTick (uint32_t TickPriority) HAL_StatusTypeDef status; #ifdef RTC_CLOCK_SOURCE_LSE - /* Configue LSE as RTC clock soucre */ + /* Configure LSE as RTC clock source */ RCC_OscInitStruct.OscillatorType = RCC_OSCILLATORTYPE_LSE; RCC_OscInitStruct.PLL.PLLState = RCC_PLL_NONE; RCC_OscInitStruct.LSEState = RCC_LSE_ON; PeriphClkInitStruct.RTCClockSelection = RCC_RTCCLKSOURCE_LSE; #elif defined (RTC_CLOCK_SOURCE_LSI) - /* Configue LSI as RTC clock soucre */ + /* Configure LSI as RTC clock source */ RCC_OscInitStruct.OscillatorType = RCC_OSCILLATORTYPE_LSI; RCC_OscInitStruct.PLL.PLLState = RCC_PLL_NONE; RCC_OscInitStruct.LSIState = RCC_LSI_ON; PeriphClkInitStruct.RTCClockSelection = RCC_RTCCLKSOURCE_LSI; #elif defined (RTC_CLOCK_SOURCE_HSE) - /* Configue HSE as RTC clock soucre */ + /* Configure HSE as RTC clock source */ RCC_OscInitStruct.OscillatorType = RCC_OSCILLATORTYPE_HSE; RCC_OscInitStruct.PLL.PLLState = RCC_PLL_NONE; RCC_OscInitStruct.HSEState = RCC_HSE_ON; diff --git a/Software/Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_timebase_rtc_wakeup_template.c b/Software/Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_timebase_rtc_wakeup_template.c index 230d75d..a219256 100644 --- a/Software/Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_timebase_rtc_wakeup_template.c +++ b/Software/Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_timebase_rtc_wakeup_template.c @@ -110,19 +110,19 @@ HAL_StatusTypeDef HAL_InitTick(uint32_t TickPriority) HAL_StatusTypeDef status; #ifdef RTC_CLOCK_SOURCE_LSE - /* Configue LSE as RTC clock soucre */ + /* Configure LSE as RTC clock source */ RCC_OscInitStruct.OscillatorType = RCC_OSCILLATORTYPE_LSE; RCC_OscInitStruct.PLL.PLLState = RCC_PLL_NONE; RCC_OscInitStruct.LSEState = RCC_LSE_ON; PeriphClkInitStruct.RTCClockSelection = RCC_RTCCLKSOURCE_LSE; #elif defined (RTC_CLOCK_SOURCE_LSI) - /* Configue LSI as RTC clock soucre */ + /* Configure LSI as RTC clock source */ RCC_OscInitStruct.OscillatorType = RCC_OSCILLATORTYPE_LSI; RCC_OscInitStruct.PLL.PLLState = RCC_PLL_NONE; RCC_OscInitStruct.LSIState = RCC_LSI_ON; PeriphClkInitStruct.RTCClockSelection = RCC_RTCCLKSOURCE_LSI; #elif defined (RTC_CLOCK_SOURCE_HSE) - /* Configue HSE as RTC clock soucre */ + /* Configure HSE as RTC clock source */ RCC_OscInitStruct.OscillatorType = RCC_OSCILLATORTYPE_HSE; RCC_OscInitStruct.PLL.PLLState = RCC_PLL_NONE; RCC_OscInitStruct.HSEState = RCC_HSE_ON; diff --git a/Software/Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_uart.c b/Software/Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_uart.c index 1e59c23..b727a98 100644 --- a/Software/Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_uart.c +++ b/Software/Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_uart.c @@ -105,7 +105,7 @@ [..] Use function HAL_UART_UnRegisterCallback() to reset a callback to the default - weak (surcharged) function. + weak function. HAL_UART_UnRegisterCallback() takes as parameters the HAL peripheral handle, and the Callback ID. This function allows to reset following callbacks: @@ -127,10 +127,10 @@ [..] By default, after the HAL_UART_Init() and when the state is HAL_UART_STATE_RESET - all callbacks are set to the corresponding weak (surcharged) functions: + all callbacks are set to the corresponding weak functions: examples HAL_UART_TxCpltCallback(), HAL_UART_RxHalfCpltCallback(). Exception done for MspInit and MspDeInit functions that are respectively - reset to the legacy weak (surcharged) functions in the HAL_UART_Init() + reset to the legacy weak functions in the HAL_UART_Init() and HAL_UART_DeInit() only when these callbacks are null (not registered beforehand). If not, MspInit or MspDeInit are not null, the HAL_UART_Init() and HAL_UART_DeInit() keep and use the user MspInit/MspDeInit callbacks (registered beforehand). @@ -147,7 +147,7 @@ [..] When The compilation define USE_HAL_UART_REGISTER_CALLBACKS is set to 0 or not defined, the callback registration feature is not available - and weak (surcharged) callbacks are used. + and weak callbacks are used. @endverbatim @@ -191,8 +191,8 @@ /** @addtogroup UART_Private_Functions * @{ */ -static void UART_EndTxTransfer(UART_HandleTypeDef *huart); static void UART_EndRxTransfer(UART_HandleTypeDef *huart); +static void UART_EndTxTransfer(UART_HandleTypeDef *huart); static void UART_DMATransmitCplt(DMA_HandleTypeDef *hdma); static void UART_DMAReceiveCplt(DMA_HandleTypeDef *hdma); static void UART_DMARxHalfCplt(DMA_HandleTypeDef *hdma); @@ -330,17 +330,19 @@ HAL_StatusTypeDef HAL_UART_Init(UART_HandleTypeDef *huart) __HAL_UART_DISABLE(huart); + /* Perform advanced settings configuration */ + /* For some items, configuration requires to be done prior TE and RE bits are set */ + if (huart->AdvancedInit.AdvFeatureInit != UART_ADVFEATURE_NO_INIT) + { + UART_AdvFeatureConfig(huart); + } + /* Set the UART Communication parameters */ if (UART_SetConfig(huart) == HAL_ERROR) { return HAL_ERROR; } - if (huart->AdvancedInit.AdvFeatureInit != UART_ADVFEATURE_NO_INIT) - { - UART_AdvFeatureConfig(huart); - } - /* In asynchronous mode, the following bits must be kept cleared: - LINEN (if LIN is supported) and CLKEN bits in the USART_CR2 register, - SCEN (if Smartcard is supported), HDSEL and IREN (if IrDA is supported) bits in the USART_CR3 register.*/ @@ -411,17 +413,19 @@ HAL_StatusTypeDef HAL_HalfDuplex_Init(UART_HandleTypeDef *huart) __HAL_UART_DISABLE(huart); + /* Perform advanced settings configuration */ + /* For some items, configuration requires to be done prior TE and RE bits are set */ + if (huart->AdvancedInit.AdvFeatureInit != UART_ADVFEATURE_NO_INIT) + { + UART_AdvFeatureConfig(huart); + } + /* Set the UART Communication parameters */ if (UART_SetConfig(huart) == HAL_ERROR) { return HAL_ERROR; } - if (huart->AdvancedInit.AdvFeatureInit != UART_ADVFEATURE_NO_INIT) - { - UART_AdvFeatureConfig(huart); - } - /* In half-duplex mode, the following bits must be kept cleared: - LINEN (if LIN is supported) and CLKEN bits in the USART_CR2 register, - SCEN (if Smartcard is supported) and IREN (if IrDA is supported) bits in the USART_CR3 register.*/ @@ -512,17 +516,19 @@ HAL_StatusTypeDef HAL_LIN_Init(UART_HandleTypeDef *huart, uint32_t BreakDetectLe __HAL_UART_DISABLE(huart); + /* Perform advanced settings configuration */ + /* For some items, configuration requires to be done prior TE and RE bits are set */ + if (huart->AdvancedInit.AdvFeatureInit != UART_ADVFEATURE_NO_INIT) + { + UART_AdvFeatureConfig(huart); + } + /* Set the UART Communication parameters */ if (UART_SetConfig(huart) == HAL_ERROR) { return HAL_ERROR; } - if (huart->AdvancedInit.AdvFeatureInit != UART_ADVFEATURE_NO_INIT) - { - UART_AdvFeatureConfig(huart); - } - /* In LIN mode, the following bits must be kept cleared: - LINEN and CLKEN bits in the USART_CR2 register, - SCEN(if Smartcard is supported) and IREN(if IrDA is supported) bits in the USART_CR3 register.*/ @@ -609,17 +615,19 @@ HAL_StatusTypeDef HAL_MultiProcessor_Init(UART_HandleTypeDef *huart, uint8_t Add __HAL_UART_DISABLE(huart); + /* Perform advanced settings configuration */ + /* For some items, configuration requires to be done prior TE and RE bits are set */ + if (huart->AdvancedInit.AdvFeatureInit != UART_ADVFEATURE_NO_INIT) + { + UART_AdvFeatureConfig(huart); + } + /* Set the UART Communication parameters */ if (UART_SetConfig(huart) == HAL_ERROR) { return HAL_ERROR; } - if (huart->AdvancedInit.AdvFeatureInit != UART_ADVFEATURE_NO_INIT) - { - UART_AdvFeatureConfig(huart); - } - /* In multiprocessor mode, the following bits must be kept cleared: - LINEN (if LIN is supported) and CLKEN bits in the USART_CR2 register, - SCEN (if Smartcard is supported), HDSEL and IREN (if IrDA is supported) bits in the USART_CR3 register. */ @@ -738,7 +746,7 @@ __weak void HAL_UART_MspDeInit(UART_HandleTypeDef *huart) #if (USE_HAL_UART_REGISTER_CALLBACKS == 1) /** * @brief Register a User UART Callback - * To be used instead of the weak predefined callback + * To be used to override the weak predefined callback * @note The HAL_UART_RegisterCallback() may be called before HAL_UART_Init(), HAL_HalfDuplex_Init(), * HAL_LIN_Init(), HAL_MultiProcessor_Init() or HAL_RS485Ex_Init() in HAL_UART_STATE_RESET to register * callbacks for HAL_UART_MSPINIT_CB_ID and HAL_UART_MSPDEINIT_CB_ID @@ -994,10 +1002,7 @@ HAL_StatusTypeDef HAL_UART_RegisterRxEventCallback(UART_HandleTypeDef *huart, pU return HAL_ERROR; } - /* Process locked */ - __HAL_LOCK(huart); - - if (huart->gState == HAL_UART_STATE_READY) + if (huart->RxState == HAL_UART_STATE_READY) { huart->RxEventCallback = pCallback; } @@ -1008,9 +1013,6 @@ HAL_StatusTypeDef HAL_UART_RegisterRxEventCallback(UART_HandleTypeDef *huart, pU status = HAL_ERROR; } - /* Release Lock */ - __HAL_UNLOCK(huart); - return status; } @@ -1024,10 +1026,7 @@ HAL_StatusTypeDef HAL_UART_UnRegisterRxEventCallback(UART_HandleTypeDef *huart) { HAL_StatusTypeDef status = HAL_OK; - /* Process locked */ - __HAL_LOCK(huart); - - if (huart->gState == HAL_UART_STATE_READY) + if (huart->RxState == HAL_UART_STATE_READY) { huart->RxEventCallback = HAL_UARTEx_RxEventCallback; /* Legacy weak UART Rx Event Callback */ } @@ -1038,8 +1037,6 @@ HAL_StatusTypeDef HAL_UART_UnRegisterRxEventCallback(UART_HandleTypeDef *huart) status = HAL_ERROR; } - /* Release Lock */ - __HAL_UNLOCK(huart); return status; } @@ -3180,6 +3177,13 @@ void UART_AdvFeatureConfig(UART_HandleTypeDef *huart) /* Check whether the set of advanced features to configure is properly set */ assert_param(IS_UART_ADVFEATURE_INIT(huart->AdvancedInit.AdvFeatureInit)); + /* if required, configure RX/TX pins swap */ + if (HAL_IS_BIT_SET(huart->AdvancedInit.AdvFeatureInit, UART_ADVFEATURE_SWAP_INIT)) + { + assert_param(IS_UART_ADVFEATURE_SWAP(huart->AdvancedInit.Swap)); + MODIFY_REG(huart->Instance->CR2, USART_CR2_SWAP, huart->AdvancedInit.Swap); + } + /* if required, configure TX pin active level inversion */ if (HAL_IS_BIT_SET(huart->AdvancedInit.AdvFeatureInit, UART_ADVFEATURE_TXINVERT_INIT)) { @@ -3201,13 +3205,6 @@ void UART_AdvFeatureConfig(UART_HandleTypeDef *huart) MODIFY_REG(huart->Instance->CR2, USART_CR2_DATAINV, huart->AdvancedInit.DataInvert); } - /* if required, configure RX/TX pins swap */ - if (HAL_IS_BIT_SET(huart->AdvancedInit.AdvFeatureInit, UART_ADVFEATURE_SWAP_INIT)) - { - assert_param(IS_UART_ADVFEATURE_SWAP(huart->AdvancedInit.Swap)); - MODIFY_REG(huart->Instance->CR2, USART_CR2_SWAP, huart->AdvancedInit.Swap); - } - /* if required, configure RX overrun detection disabling */ if (HAL_IS_BIT_SET(huart->AdvancedInit.AdvFeatureInit, UART_ADVFEATURE_RXOVERRUNDISABLE_INIT)) { @@ -3333,24 +3330,24 @@ HAL_StatusTypeDef UART_WaitOnFlagUntilTimeout(UART_HandleTypeDef *huart, uint32_ return HAL_TIMEOUT; } - if (READ_BIT(huart->Instance->CR1, USART_CR1_RE) != 0U) + if ((READ_BIT(huart->Instance->CR1, USART_CR1_RE) != 0U) && (Flag != UART_FLAG_TXE) && (Flag != UART_FLAG_TC)) { if (__HAL_UART_GET_FLAG(huart, UART_FLAG_ORE) == SET) { - /* Clear Overrun Error flag*/ - __HAL_UART_CLEAR_FLAG(huart, UART_CLEAR_OREF); + /* Clear Overrun Error flag*/ + __HAL_UART_CLEAR_FLAG(huart, UART_CLEAR_OREF); - /* Blocking error : transfer is aborted - Set the UART state ready to be able to start again the process, - Disable Rx Interrupts if ongoing */ - UART_EndRxTransfer(huart); + /* Blocking error : transfer is aborted + Set the UART state ready to be able to start again the process, + Disable Rx Interrupts if ongoing */ + UART_EndRxTransfer(huart); - huart->ErrorCode = HAL_UART_ERROR_ORE; + huart->ErrorCode = HAL_UART_ERROR_ORE; - /* Process Unlocked */ - __HAL_UNLOCK(huart); + /* Process Unlocked */ + __HAL_UNLOCK(huart); - return HAL_ERROR; + return HAL_ERROR; } if (__HAL_UART_GET_FLAG(huart, UART_FLAG_RTOF) == SET) { diff --git a/Software/Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_uart_ex.c b/Software/Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_uart_ex.c index 6e91067..e120002 100644 --- a/Software/Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_uart_ex.c +++ b/Software/Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_uart_ex.c @@ -195,17 +195,19 @@ HAL_StatusTypeDef HAL_RS485Ex_Init(UART_HandleTypeDef *huart, uint32_t Polarity, /* Disable the Peripheral */ __HAL_UART_DISABLE(huart); + /* Perform advanced settings configuration */ + /* For some items, configuration requires to be done prior TE and RE bits are set */ + if (huart->AdvancedInit.AdvFeatureInit != UART_ADVFEATURE_NO_INIT) + { + UART_AdvFeatureConfig(huart); + } + /* Set the UART Communication parameters */ if (UART_SetConfig(huart) == HAL_ERROR) { return HAL_ERROR; } - if (huart->AdvancedInit.AdvFeatureInit != UART_ADVFEATURE_NO_INIT) - { - UART_AdvFeatureConfig(huart); - } - /* Enable the Driver Enable mode by setting the DEM bit in the CR3 register */ SET_BIT(huart->Instance->CR3, USART_CR3_DEM); @@ -634,7 +636,7 @@ HAL_StatusTypeDef HAL_UARTEx_ReceiveToIdle(UART_HandleTypeDef *huart, uint8_t *p */ HAL_StatusTypeDef HAL_UARTEx_ReceiveToIdle_IT(UART_HandleTypeDef *huart, uint8_t *pData, uint16_t Size) { - HAL_StatusTypeDef status; + HAL_StatusTypeDef status = HAL_OK; /* Check that a Rx process is not already ongoing */ if (huart->RxState == HAL_UART_STATE_READY) @@ -659,24 +661,20 @@ HAL_StatusTypeDef HAL_UARTEx_ReceiveToIdle_IT(UART_HandleTypeDef *huart, uint8_t huart->ReceptionType = HAL_UART_RECEPTION_TOIDLE; huart->RxEventType = HAL_UART_RXEVENT_TC; - status = UART_Start_Receive_IT(huart, pData, Size); + (void)UART_Start_Receive_IT(huart, pData, Size); - /* Check Rx process has been successfully started */ - if (status == HAL_OK) + if (huart->ReceptionType == HAL_UART_RECEPTION_TOIDLE) { - if (huart->ReceptionType == HAL_UART_RECEPTION_TOIDLE) - { - __HAL_UART_CLEAR_FLAG(huart, UART_CLEAR_IDLEF); - ATOMIC_SET_BIT(huart->Instance->CR1, USART_CR1_IDLEIE); - } - else - { - /* In case of errors already pending when reception is started, - Interrupts may have already been raised and lead to reception abortion. - (Overrun error for instance). - In such case Reception Type has been reset to HAL_UART_RECEPTION_STANDARD. */ - status = HAL_ERROR; - } + __HAL_UART_CLEAR_FLAG(huart, UART_CLEAR_IDLEF); + ATOMIC_SET_BIT(huart->Instance->CR1, USART_CR1_IDLEIE); + } + else + { + /* In case of errors already pending when reception is started, + Interrupts may have already been raised and lead to reception abortion. + (Overrun error for instance). + In such case Reception Type has been reset to HAL_UART_RECEPTION_STANDARD. */ + status = HAL_ERROR; } return status; @@ -788,7 +786,7 @@ HAL_StatusTypeDef HAL_UARTEx_ReceiveToIdle_DMA(UART_HandleTypeDef *huart, uint8_ * @param huart UART handle. * @retval Rx Event Type (return vale will be a value of @ref UART_RxEvent_Type_Values) */ -HAL_UART_RxEventTypeTypeDef HAL_UARTEx_GetRxEventType(UART_HandleTypeDef *huart) +HAL_UART_RxEventTypeTypeDef HAL_UARTEx_GetRxEventType(const UART_HandleTypeDef *huart) { /* Return Rx Event type value, as stored in UART handle */ return (huart->RxEventType); diff --git a/Software/Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_usart.c b/Software/Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_usart.c index e0a4c41..732e93d 100644 --- a/Software/Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_usart.c +++ b/Software/Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_usart.c @@ -89,7 +89,7 @@ [..] Use function HAL_USART_UnRegisterCallback() to reset a callback to the default - weak (surcharged) function. + weak function. HAL_USART_UnRegisterCallback() takes as parameters the HAL peripheral handle, and the Callback ID. This function allows to reset following callbacks: @@ -105,10 +105,10 @@ [..] By default, after the HAL_USART_Init() and when the state is HAL_USART_STATE_RESET - all callbacks are set to the corresponding weak (surcharged) functions: + all callbacks are set to the corresponding weak functions: examples HAL_USART_TxCpltCallback(), HAL_USART_RxHalfCpltCallback(). Exception done for MspInit and MspDeInit functions that are respectively - reset to the legacy weak (surcharged) functions in the HAL_USART_Init() + reset to the legacy weak functions in the HAL_USART_Init() and HAL_USART_DeInit() only when these callbacks are null (not registered beforehand). If not, MspInit or MspDeInit are not null, the HAL_USART_Init() and HAL_USART_DeInit() keep and use the user MspInit/MspDeInit callbacks (registered beforehand). @@ -125,7 +125,7 @@ [..] When The compilation define USE_HAL_USART_REGISTER_CALLBACKS is set to 0 or not defined, the callback registration feature is not available - and weak (surcharged) callbacks are used. + and weak callbacks are used. @endverbatim @@ -140,7 +140,7 @@ */ /** @defgroup USART USART - * @brief HAL USART Synchronous module driver + * @brief HAL USART Synchronous SPI module driver * @{ */ @@ -212,8 +212,8 @@ static void USART_RxISR_16BIT(USART_HandleTypeDef *husart); =============================================================================== [..] This subsection provides a set of functions allowing to initialize the USART - in asynchronous and in synchronous modes. - (+) For the asynchronous mode only these parameters can be configured: + in synchronous SPI master mode. + (+) For the synchronous SPI mode only these parameters can be configured: (++) Baud Rate (++) Word Length (++) Stop Bit @@ -225,7 +225,7 @@ static void USART_RxISR_16BIT(USART_HandleTypeDef *husart); (++) Receiver/transmitter modes [..] - The HAL_USART_Init() function follows the USART synchronous configuration + The HAL_USART_Init() function follows the USART synchronous SPI configuration procedure (details for the procedure are available in reference manual). @endverbatim @@ -314,7 +314,7 @@ HAL_StatusTypeDef HAL_USART_Init(USART_HandleTypeDef *husart) return HAL_ERROR; } - /* In Synchronous mode, the following bits must be kept cleared: + /* In Synchronous SPI mode, the following bits must be kept cleared: - LINEN bit (if LIN is supported) in the USART_CR2 register - SCEN (if Smartcard is supported), HDSEL and IREN (if IrDA is supported) bits in the USART_CR3 register. */ @@ -418,7 +418,7 @@ __weak void HAL_USART_MspDeInit(USART_HandleTypeDef *husart) #if (USE_HAL_USART_REGISTER_CALLBACKS == 1) /** * @brief Register a User USART Callback - * To be used instead of the weak predefined callback + * To be used to override the weak predefined callback * @note The HAL_USART_RegisterCallback() may be called before HAL_USART_Init() in HAL_USART_STATE_RESET * to register callbacks for HAL_USART_MSPINIT_CB_ID and HAL_USART_MSPDEINIT_CB_ID * @param husart usart handle @@ -651,10 +651,10 @@ HAL_StatusTypeDef HAL_USART_UnRegisterCallback(USART_HandleTypeDef *husart, HAL_ =============================================================================== ##### IO operation functions ##### =============================================================================== - [..] This subsection provides a set of functions allowing to manage the USART synchronous + [..] This subsection provides a set of functions allowing to manage the USART synchronous SPI data transfers. - [..] The USART supports master mode only: it cannot receive or send data related to an input + [..] The USART Synchronous SPI supports master mode only: it cannot receive or send data related to an input clock (SCLK is always an output). [..] @@ -2890,7 +2890,7 @@ static HAL_StatusTypeDef USART_SetConfig(USART_HandleTypeDef *husart) /* Clear and configure the USART Clock, CPOL, CPHA, LBCL and STOP bits: * set CPOL bit according to husart->Init.CLKPolarity value * set CPHA bit according to husart->Init.CLKPhase value - * set LBCL bit according to husart->Init.CLKLastBit value (used in SPI master mode only) + * set LBCL bit according to husart->Init.CLKLastBit value (used in USART Synchronous SPI master mode only) * set STOP[13:12] bits according to husart->Init.StopBits value */ tmpreg = (uint32_t)(USART_CLOCK_ENABLE); tmpreg |= (uint32_t)husart->Init.CLKLastBit; diff --git a/Software/Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_wwdg.c b/Software/Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_wwdg.c index e28cd9d..5859ed8 100644 --- a/Software/Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_wwdg.c +++ b/Software/Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_wwdg.c @@ -122,7 +122,6 @@ (+) __HAL_WWDG_ENABLE_IT: Enable the WWDG early wakeup interrupt @endverbatim - ****************************************************************************** */ /* Includes ------------------------------------------------------------------*/ @@ -418,3 +417,4 @@ __weak void HAL_WWDG_EarlyWakeupCallback(WWDG_HandleTypeDef *hwwdg) /** * @} */ + diff --git a/Software/Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_ll_adc.c b/Software/Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_ll_adc.c index 2297925..534e226 100644 --- a/Software/Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_ll_adc.c +++ b/Software/Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_ll_adc.c @@ -208,11 +208,6 @@ ErrorStatus LL_ADC_DeInit(ADC_TypeDef *ADCx) /* Disable ADC instance if not already disabled. */ if(LL_ADC_IsEnabled(ADCx) == 1U) { - /* Set ADC group regular trigger source to SW start to ensure to not */ - /* have an external trigger event occurring during the conversion stop */ - /* ADC disable process. */ - LL_ADC_REG_SetTriggerSource(ADCx, LL_ADC_REG_TRIG_SOFTWARE); - /* Stop potential ADC conversion on going on ADC group regular. */ if(LL_ADC_REG_IsConversionOngoing(ADCx) != 0U) { @@ -224,27 +219,29 @@ ErrorStatus LL_ADC_DeInit(ADC_TypeDef *ADCx) /* Wait for ADC conversions are effectively stopped */ timeout_cpu_cycles = ADC_TIMEOUT_STOP_CONVERSION_CPU_CYCLES; - while (LL_ADC_REG_IsStopConversionOngoing(ADCx) == 1U) + while (LL_ADC_REG_IsStopConversionOngoing(ADCx) == 1UL) { - if(timeout_cpu_cycles-- == 0U) + timeout_cpu_cycles--; + if (timeout_cpu_cycles == 0UL) { /* Time-out error */ status = ERROR; + break; } } + } - /* Disable the ADC instance */ - LL_ADC_Disable(ADCx); - - /* Wait for ADC instance is effectively disabled */ - timeout_cpu_cycles = ADC_TIMEOUT_DISABLE_CPU_CYCLES; - while (LL_ADC_IsDisableOngoing(ADCx) == 1U) + /* Disable the ADC instance */ + LL_ADC_Disable(ADCx); + + /* Wait for ADC instance is effectively disabled */ + timeout_cpu_cycles = ADC_TIMEOUT_DISABLE_CPU_CYCLES; + while (LL_ADC_IsDisableOngoing(ADCx) == 1U) + { + if(timeout_cpu_cycles-- == 0U) { - if(timeout_cpu_cycles-- == 0U) - { - /* Time-out error */ - status = ERROR; - } + /* Time-out error */ + status = ERROR; } } diff --git a/Software/Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_ll_tim.c b/Software/Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_ll_tim.c index 2fc8921..1384de2 100644 --- a/Software/Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_ll_tim.c +++ b/Software/Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_ll_tim.c @@ -690,7 +690,6 @@ ErrorStatus LL_TIM_BDTR_Init(TIM_TypeDef *TIMx, const LL_TIM_BDTR_InitTypeDef *T MODIFY_REG(tmpbdtr, TIM_BDTR_BKE, TIM_BDTRInitStruct->BreakState); MODIFY_REG(tmpbdtr, TIM_BDTR_BKP, TIM_BDTRInitStruct->BreakPolarity); MODIFY_REG(tmpbdtr, TIM_BDTR_AOE, TIM_BDTRInitStruct->AutomaticOutput); - MODIFY_REG(tmpbdtr, TIM_BDTR_MOE, TIM_BDTRInitStruct->AutomaticOutput); /* Set TIMx_BDTR */ LL_TIM_WriteReg(TIMx, BDTR, tmpbdtr); @@ -728,8 +727,6 @@ static ErrorStatus OC1Config(TIM_TypeDef *TIMx, const LL_TIM_OC_InitTypeDef *TIM assert_param(IS_LL_TIM_OCMODE(TIM_OCInitStruct->OCMode)); assert_param(IS_LL_TIM_OCSTATE(TIM_OCInitStruct->OCState)); assert_param(IS_LL_TIM_OCPOLARITY(TIM_OCInitStruct->OCPolarity)); - assert_param(IS_LL_TIM_OCSTATE(TIM_OCInitStruct->OCNState)); - assert_param(IS_LL_TIM_OCPOLARITY(TIM_OCInitStruct->OCNPolarity)); /* Disable the Channel 1: Reset the CC1E Bit */ CLEAR_BIT(TIMx->CCER, TIM_CCER_CC1E); @@ -757,8 +754,10 @@ static ErrorStatus OC1Config(TIM_TypeDef *TIMx, const LL_TIM_OC_InitTypeDef *TIM if (IS_TIM_BREAK_INSTANCE(TIMx)) { - assert_param(IS_LL_TIM_OCIDLESTATE(TIM_OCInitStruct->OCNIdleState)); assert_param(IS_LL_TIM_OCIDLESTATE(TIM_OCInitStruct->OCIdleState)); + assert_param(IS_LL_TIM_OCSTATE(TIM_OCInitStruct->OCNState)); + assert_param(IS_LL_TIM_OCPOLARITY(TIM_OCInitStruct->OCNPolarity)); + assert_param(IS_LL_TIM_OCIDLESTATE(TIM_OCInitStruct->OCNIdleState)); /* Set the complementary output Polarity */ MODIFY_REG(tmpccer, TIM_CCER_CC1NP, TIM_OCInitStruct->OCNPolarity << 2U); @@ -807,8 +806,6 @@ static ErrorStatus OC2Config(TIM_TypeDef *TIMx, const LL_TIM_OC_InitTypeDef *TIM assert_param(IS_LL_TIM_OCMODE(TIM_OCInitStruct->OCMode)); assert_param(IS_LL_TIM_OCSTATE(TIM_OCInitStruct->OCState)); assert_param(IS_LL_TIM_OCPOLARITY(TIM_OCInitStruct->OCPolarity)); - assert_param(IS_LL_TIM_OCSTATE(TIM_OCInitStruct->OCNState)); - assert_param(IS_LL_TIM_OCPOLARITY(TIM_OCInitStruct->OCNPolarity)); /* Disable the Channel 2: Reset the CC2E Bit */ CLEAR_BIT(TIMx->CCER, TIM_CCER_CC2E); @@ -836,8 +833,10 @@ static ErrorStatus OC2Config(TIM_TypeDef *TIMx, const LL_TIM_OC_InitTypeDef *TIM if (IS_TIM_BREAK_INSTANCE(TIMx)) { - assert_param(IS_LL_TIM_OCIDLESTATE(TIM_OCInitStruct->OCNIdleState)); assert_param(IS_LL_TIM_OCIDLESTATE(TIM_OCInitStruct->OCIdleState)); + assert_param(IS_LL_TIM_OCSTATE(TIM_OCInitStruct->OCNState)); + assert_param(IS_LL_TIM_OCPOLARITY(TIM_OCInitStruct->OCNPolarity)); + assert_param(IS_LL_TIM_OCIDLESTATE(TIM_OCInitStruct->OCNIdleState)); /* Set the complementary output Polarity */ MODIFY_REG(tmpccer, TIM_CCER_CC2NP, TIM_OCInitStruct->OCNPolarity << 6U); @@ -886,8 +885,6 @@ static ErrorStatus OC3Config(TIM_TypeDef *TIMx, const LL_TIM_OC_InitTypeDef *TIM assert_param(IS_LL_TIM_OCMODE(TIM_OCInitStruct->OCMode)); assert_param(IS_LL_TIM_OCSTATE(TIM_OCInitStruct->OCState)); assert_param(IS_LL_TIM_OCPOLARITY(TIM_OCInitStruct->OCPolarity)); - assert_param(IS_LL_TIM_OCSTATE(TIM_OCInitStruct->OCNState)); - assert_param(IS_LL_TIM_OCPOLARITY(TIM_OCInitStruct->OCNPolarity)); /* Disable the Channel 3: Reset the CC3E Bit */ CLEAR_BIT(TIMx->CCER, TIM_CCER_CC3E); @@ -915,8 +912,10 @@ static ErrorStatus OC3Config(TIM_TypeDef *TIMx, const LL_TIM_OC_InitTypeDef *TIM if (IS_TIM_BREAK_INSTANCE(TIMx)) { - assert_param(IS_LL_TIM_OCIDLESTATE(TIM_OCInitStruct->OCNIdleState)); assert_param(IS_LL_TIM_OCIDLESTATE(TIM_OCInitStruct->OCIdleState)); + assert_param(IS_LL_TIM_OCSTATE(TIM_OCInitStruct->OCNState)); + assert_param(IS_LL_TIM_OCPOLARITY(TIM_OCInitStruct->OCNPolarity)); + assert_param(IS_LL_TIM_OCIDLESTATE(TIM_OCInitStruct->OCNIdleState)); /* Set the complementary output Polarity */ MODIFY_REG(tmpccer, TIM_CCER_CC3NP, TIM_OCInitStruct->OCNPolarity << 10U); @@ -965,8 +964,6 @@ static ErrorStatus OC4Config(TIM_TypeDef *TIMx, const LL_TIM_OC_InitTypeDef *TIM assert_param(IS_LL_TIM_OCMODE(TIM_OCInitStruct->OCMode)); assert_param(IS_LL_TIM_OCSTATE(TIM_OCInitStruct->OCState)); assert_param(IS_LL_TIM_OCPOLARITY(TIM_OCInitStruct->OCPolarity)); - assert_param(IS_LL_TIM_OCPOLARITY(TIM_OCInitStruct->OCNPolarity)); - assert_param(IS_LL_TIM_OCSTATE(TIM_OCInitStruct->OCNState)); /* Disable the Channel 4: Reset the CC4E Bit */ CLEAR_BIT(TIMx->CCER, TIM_CCER_CC4E); @@ -994,7 +991,6 @@ static ErrorStatus OC4Config(TIM_TypeDef *TIMx, const LL_TIM_OC_InitTypeDef *TIM if (IS_TIM_BREAK_INSTANCE(TIMx)) { - assert_param(IS_LL_TIM_OCIDLESTATE(TIM_OCInitStruct->OCNIdleState)); assert_param(IS_LL_TIM_OCIDLESTATE(TIM_OCInitStruct->OCIdleState)); /* Set the Output Idle state */ @@ -1016,7 +1012,6 @@ static ErrorStatus OC4Config(TIM_TypeDef *TIMx, const LL_TIM_OC_InitTypeDef *TIM return SUCCESS; } - /** * @brief Configure the TIMx input channel 1. * @param TIMx Timer Instance @@ -1141,7 +1136,7 @@ static ErrorStatus IC4Config(TIM_TypeDef *TIMx, const LL_TIM_IC_InitTypeDef *TIM (TIM_CCMR2_CC4S | TIM_CCMR2_IC4F | TIM_CCMR2_IC4PSC), (TIM_ICInitStruct->ICActiveInput | TIM_ICInitStruct->ICFilter | TIM_ICInitStruct->ICPrescaler) >> 8U); - /* Select the Polarity and set the CC2E Bit */ + /* Select the Polarity and set the CC4E Bit */ MODIFY_REG(TIMx->CCER, (TIM_CCER_CC4P | TIM_CCER_CC4NP), ((TIM_ICInitStruct->ICPolarity << 12U) | TIM_CCER_CC4E)); diff --git a/Software/Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_ll_usb.c b/Software/Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_ll_usb.c index bd6c05a..28e30da 100644 --- a/Software/Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_ll_usb.c +++ b/Software/Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_ll_usb.c @@ -172,6 +172,47 @@ HAL_StatusTypeDef USB_DevInit(USB_TypeDef *USBx, USB_CfgTypeDef cfg) return HAL_OK; } +/** + * @brief USB_FlushTxFifo : Flush a Tx FIFO + * @param USBx : Selected device + * @param num : FIFO number + * This parameter can be a value from 1 to 15 + 15 means Flush all Tx FIFOs + * @retval HAL status + */ +HAL_StatusTypeDef USB_FlushTxFifo(USB_TypeDef const *USBx, uint32_t num) +{ + /* Prevent unused argument(s) compilation warning */ + UNUSED(USBx); + UNUSED(num); + + /* NOTE : - This function is not required by USB Device FS peripheral, it is used + only by USB OTG FS peripheral. + - This function is added to ensure compatibility across platforms. + */ + + return HAL_OK; +} + +/** + * @brief USB_FlushRxFifo : Flush Rx FIFO + * @param USBx : Selected device + * @retval HAL status + */ +HAL_StatusTypeDef USB_FlushRxFifo(USB_TypeDef const *USBx) +{ + /* Prevent unused argument(s) compilation warning */ + UNUSED(USBx); + + /* NOTE : - This function is not required by USB Device FS peripheral, it is used + only by USB OTG FS peripheral. + - This function is added to ensure compatibility across platforms. + */ + + return HAL_OK; +} + + #if defined (HAL_PCD_MODULE_ENABLED) /** * @brief Activate and configure an endpoint @@ -751,7 +792,7 @@ HAL_StatusTypeDef USB_DevDisconnect(USB_TypeDef *USBx) * @param USBx Selected device * @retval USB Global Interrupt status */ -uint32_t USB_ReadInterrupts(USB_TypeDef *USBx) +uint32_t USB_ReadInterrupts(USB_TypeDef const *USBx) { uint32_t tmpreg; @@ -791,7 +832,7 @@ HAL_StatusTypeDef USB_DeActivateRemoteWakeup(USB_TypeDef *USBx) * @param wNBytes no. of bytes to be copied. * @retval None */ -void USB_WritePMA(USB_TypeDef *USBx, uint8_t *pbUsrBuf, uint16_t wPMABufAddr, uint16_t wNBytes) +void USB_WritePMA(USB_TypeDef const *USBx, uint8_t *pbUsrBuf, uint16_t wPMABufAddr, uint16_t wNBytes) { uint32_t n = ((uint32_t)wNBytes + 1U) >> 1; uint32_t BaseAddr = (uint32_t)USBx; @@ -826,7 +867,7 @@ void USB_WritePMA(USB_TypeDef *USBx, uint8_t *pbUsrBuf, uint16_t wPMABufAddr, ui * @param wNBytes no. of bytes to be copied. * @retval None */ -void USB_ReadPMA(USB_TypeDef *USBx, uint8_t *pbUsrBuf, uint16_t wPMABufAddr, uint16_t wNBytes) +void USB_ReadPMA(USB_TypeDef const *USBx, uint8_t *pbUsrBuf, uint16_t wPMABufAddr, uint16_t wNBytes) { uint32_t n = (uint32_t)wNBytes >> 1; uint32_t BaseAddr = (uint32_t)USBx; diff --git a/Software/Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_ll_utils.c b/Software/Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_ll_utils.c index f02cf9d..fff97a0 100644 --- a/Software/Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_ll_utils.c +++ b/Software/Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_ll_utils.c @@ -249,28 +249,25 @@ ErrorStatus LL_SetFlashLatency(uint32_t Frequency) /* else SYSCLK < 24MHz default LL_FLASH_LATENCY_0 0WS */ latency = LL_FLASH_LATENCY_0; } - if (status != ERROR) - { - LL_FLASH_SetLatency(latency); + LL_FLASH_SetLatency(latency); - /* Check that the new number of wait states is taken into account to access the Flash - memory by reading the FLASH_ACR register */ - timeout = 2; - do - { + /* Check that the new number of wait states is taken into account to access the Flash + memory by reading the FLASH_ACR register */ + timeout = 2; + do + { /* Wait for Flash latency to be updated */ getlatency = LL_FLASH_GetLatency(); timeout--; - } while ((getlatency != latency) && (timeout > 0)); + } while ((getlatency != latency) && (timeout > 0)); - if(getlatency != latency) - { - status = ERROR; - } - else - { - status = SUCCESS; - } + if(getlatency != latency) + { + status = ERROR; + } + else + { + /* No thing to do */ } } diff --git a/Software/Makefile b/Software/Makefile index 338317c..a49176f 100644 --- a/Software/Makefile +++ b/Software/Makefile @@ -1,5 +1,5 @@ ########################################################################################################################## -# File automatically-generated by tool: [projectgenerator] version: [4.2.0-B44] date: [Sun May 12 14:37:49 CEST 2024] +# File automatically-generated by tool: [projectgenerator] version: [4.3.0-B58] date: [Sun Nov 03 12:56:00 CET 2024] ########################################################################################################################## # ------------------------------------------------ @@ -57,7 +57,9 @@ Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_exti.c \ Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c \ Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c \ Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c \ -Core/Src/system_stm32f0xx.c +Core/Src/system_stm32f0xx.c \ +Core/Src/sysmem.c \ +Core/Src/syscalls.c # ASM sources ASM_SOURCES = \ diff --git a/Software/SLS.ioc b/Software/SLS.ioc index 9c59f4c..7c0b712 100644 --- a/Software/SLS.ioc +++ b/Software/SLS.ioc @@ -2,10 +2,15 @@ CAD.formats= CAD.pinconfig= CAD.provider= -CAN.CalculateBaudRate=166666 -CAN.CalculateTimeBit=6000 -CAN.CalculateTimeQuantum=2000.0 -CAN.IPParameters=CalculateTimeQuantum,CalculateTimeBit,CalculateBaudRate +CAN.ABOM=ENABLE +CAN.BS1=CAN_BS1_13TQ +CAN.BS2=CAN_BS2_2TQ +CAN.CalculateBaudRate=500000 +CAN.CalculateTimeBit=2000 +CAN.CalculateTimeQuantum=125.0 +CAN.IPParameters=CalculateTimeQuantum,CalculateTimeBit,CalculateBaudRate,Prescaler,BS1,BS2,ABOM,NART +CAN.NART=ENABLE +CAN.Prescaler=2 File.Version=6 GPIO.groupedBy=Group By Peripherals KeepUserPlacement=false @@ -37,8 +42,9 @@ Mcu.PinsNb=13 Mcu.ThirdPartyNb=0 Mcu.UserConstants= Mcu.UserName=STM32F042K6Tx -MxCube.Version=6.10.0 -MxDb.Version=DB.6.0.100 +MxCube.Version=6.11.1 +MxDb.Version=DB.6.0.111 +NVIC.ADC1_IRQn=true\:0\:0\:false\:false\:true\:true\:true\:true NVIC.ForceEnableDMAVector=true NVIC.HardFault_IRQn=true\:0\:0\:false\:false\:true\:false\:false\:false NVIC.NonMaskableInt_IRQn=true\:0\:0\:false\:false\:true\:false\:false\:false @@ -74,7 +80,7 @@ ProjectManager.CustomerFirmwarePackage= ProjectManager.DefaultFWLocation=true ProjectManager.DeletePrevious=true ProjectManager.DeviceId=STM32F042K6Tx -ProjectManager.FirmwarePackage=STM32Cube FW_F0 V1.11.4 +ProjectManager.FirmwarePackage=STM32Cube FW_F0 V1.11.5 ProjectManager.FreePins=false ProjectManager.HalAssertFull=false ProjectManager.HeapSize=0x200 @@ -96,14 +102,28 @@ ProjectManager.UAScriptAfterPath= ProjectManager.UAScriptBeforePath= ProjectManager.UnderRoot=false ProjectManager.functionlistsort=1-SystemClock_Config-RCC-false-HAL-false,2-MX_GPIO_Init-GPIO-false-HAL-true,3-MX_ADC_Init-ADC-false-HAL-true,4-MX_CAN_Init-CAN-false-HAL-true,5-MX_TIM2_Init-TIM2-false-HAL-true +RCC.AHBFreq_Value=16000000 +RCC.APB1Freq_Value=16000000 +RCC.APB1TimFreq_Value=16000000 RCC.CECFreq_Value=32786.88524590164 +RCC.FCLKCortexFreq_Value=16000000 RCC.FamilyName=M +RCC.HCLKFreq_Value=16000000 +RCC.HSE_VALUE=12000000 RCC.HSICECFreq_Value=32786.88524590164 -RCC.IPParameters=CECFreq_Value,FamilyName,HSICECFreq_Value,PLLCLKFreq_Value,PLLMCOFreq_Value,TimSysFreq_Value,VCOOutput2Freq_Value +RCC.I2SFreq_Value=16000000 +RCC.IPParameters=AHBFreq_Value,APB1Freq_Value,APB1TimFreq_Value,CECFreq_Value,FCLKCortexFreq_Value,FamilyName,HCLKFreq_Value,HSE_VALUE,HSICECFreq_Value,I2SFreq_Value,MCOFreq_Value,PLLCLKFreq_Value,PLLDivider,PLLMCOFreq_Value,PLLMUL,PLLSourceVirtual,SYSCLKFreq_VALUE,SYSCLKSource,TimSysFreq_Value,USART1Freq_Value,VCOOutput2Freq_Value +RCC.MCOFreq_Value=16000000 RCC.PLLCLKFreq_Value=16000000 +RCC.PLLDivider=RCC_PREDIV_DIV3 RCC.PLLMCOFreq_Value=16000000 -RCC.TimSysFreq_Value=8000000 -RCC.VCOOutput2Freq_Value=8000000 +RCC.PLLMUL=RCC_PLL_MUL4 +RCC.PLLSourceVirtual=RCC_PLLSOURCE_HSE +RCC.SYSCLKFreq_VALUE=16000000 +RCC.SYSCLKSource=RCC_SYSCLKSOURCE_PLLCLK +RCC.TimSysFreq_Value=16000000 +RCC.USART1Freq_Value=16000000 +RCC.VCOOutput2Freq_Value=4000000 SH.S_TIM2_CH1_ETR.0=TIM2_CH1,PWM Generation1 CH1 SH.S_TIM2_CH1_ETR.ConfNb=1 SH.S_TIM2_CH2.0=TIM2_CH2,PWM Generation2 CH2 diff --git a/Software/STM32-for-VSCode.config.yaml b/Software/STM32-for-VSCode.config.yaml new file mode 100644 index 0000000..2d645a7 --- /dev/null +++ b/Software/STM32-for-VSCode.config.yaml @@ -0,0 +1,109 @@ +# Configuration file for the STM32 for VSCode extension +# Arrays can be inputted in two ways. One is: [entry_1, entry_2, ..., entry_final] +# or by adding an indented list below the variable name e.g.: +# VARIABLE: +# - entry_1 +# - entry_2 + +# The project name +target: SLS +# Can be C or C++ +language: C + +optimization: Og + +# MCU settings +targetMCU: stm32f0x +cpu: cortex-m0 # type of cpu e.g. cortex-m4 +fpu: # Defines how floating points are defined. Can be left empty. +floatAbi: +ldscript: STM32F042K6Tx_FLASH.ld # linker script + +# Compiler definitions. The -D prefix for the compiler will be automatically added. +cDefinitions: [] +cxxDefinitions: [] +asDefinitions: [] + +# Compiler definition files. you can add a single files or an array of files for different definitions. +# The file is expected to have a definition each new line. +# This allows to include for example a .definition file which can be ignored in git and can contain +# This can be convenient for passing along secrets at compile time, or generating a file for per device setup. +cDefinitionsFile: +cxxDefinitionsFile: +asDefinitionsFile: + +# Compiler flags +cFlags: + - -Wall + - -fdata-sections + - -ffunction-sections + +cxxFlags: [] +assemblyFlags: + - -Wall + - -fdata-sections + - -ffunction-sections + +linkerFlags: + - -Wl,--print-memory-usage + + +# libraries to be included. The -l prefix to the library will be automatically added. +libraries: + - c + - m + +# Library directories. Folders can be added here that contain custom libraries. +libraryDirectories: [] + +# Files or folders that will be excluded from compilation. +# Glob patterns (https://www.wikiwand.com/en/Glob_(programming)) can be used. +# Do mind that double stars are reserved in yaml +# these should be escaped with a: \ or the name should be in double quotes e.g. "**.test.**" +excludes: + - "**/Examples/**" + - "**/examples/**" + - "**/Example/**" + - "**/example/**" + - "**_template.*" + + +# Include directories (directories containing .h or .hpp files) +# If a CubeMX makefile is present it will automatically include the include directories from that makefile. +includeDirectories: + - Inc/** + - Core/Inc/** + - Core/Lib/** + - Src/** + - Core/Src/** + - Core/Lib/** + + +# Files that should be included in the compilation. +# If a CubeMX makefile is present it will automatically include the c and cpp/cxx files from that makefile. +# Glob patterns (https://www.wikiwand.com/en/Glob_(programming)) can be used. +# Do mind that double stars are reserved in yaml +# these should be escaped with a: \ or the name should be in double quotes e.g. "HARDWARE_DRIVER*.c" +sourceFiles: + - Src/** + - Core/Src/** + - Core/Lib/** + + +# When no makefile is present it will show a warning pop-up. +# However when compilation without the CubeMX Makefile is desired, this can be turned of. +suppressMakefileWarning: false + +# Custom makefile rules +# Here custom makefile rules can be added to the STM32Make.make file +# an example of how this can be used is commented out below. +customMakefileRules: +# - command: sayhello +# rule: echo "hello" +# dependsOn: $(BUILD_DIR)/$(TARGET).elf # can be left out + +# Additional flags which will be used when invoking the make command +makeFlags: +# - -O # use this option when the output of make is mixed up only works for make version 4.0 and upwards +# - --silent # use this option to silence the output of the build + \ No newline at end of file diff --git a/Software/STM32Make.make b/Software/STM32Make.make new file mode 100644 index 0000000..81cdc30 --- /dev/null +++ b/Software/STM32Make.make @@ -0,0 +1,257 @@ +########################################################################################################################## +# File automatically-generated by STM32forVSCode +########################################################################################################################## + +# ------------------------------------------------ +# Generic Makefile (based on gcc) +# +# ChangeLog : +# 2017-02-10 - Several enhancements + project update mode +# 2015-07-22 - first version +# ------------------------------------------------ + +###################################### +# target +###################################### +TARGET = SLS + + +###################################### +# building variables +###################################### +# debug build? +DEBUG = 1 +# optimization +OPT = -Og + + +####################################### +# paths +####################################### +# Build path +BUILD_DIR = build + +###################################### +# source +###################################### +# C sources +C_SOURCES = \ +Core/Src/main.c \ +Core/Src/stm32f0xx_hal_msp.c \ +Core/Src/stm32f0xx_it.c \ +Core/Src/system_stm32f0xx.c \ +Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal.c \ +Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c \ +Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc_ex.c \ +Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c \ +Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_cortex.c \ +Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c \ +Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_exti.c \ +Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash.c \ +Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c \ +Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_gpio.c \ +Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c \ +Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c_ex.c \ +Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pwr.c \ +Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pwr_ex.c \ +Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c \ +Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c \ +Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c \ +Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c + + +CPP_SOURCES = \ + + +# ASM sources +ASM_SOURCES = \ +startup_stm32f042x6.s + + + +####################################### +# binaries +####################################### +PREFIX = arm-none-eabi- +POSTFIX = " +# The gcc compiler bin path can be either defined in make command via GCC_PATH variable (> make GCC_PATH=xxx) +# either it can be added to the PATH environment variable. +GCC_PATH="/home/chiangni/.config/VSCodium/User/globalStorage/bmd.stm32-for-vscode/@xpack-dev-tools/arm-none-eabi-gcc/13.2.1-1.1.1/.content/bin +ifdef GCC_PATH +CXX = $(GCC_PATH)/$(PREFIX)g++$(POSTFIX) +CC = $(GCC_PATH)/$(PREFIX)gcc$(POSTFIX) +AS = $(GCC_PATH)/$(PREFIX)gcc$(POSTFIX) -x assembler-with-cpp +CP = $(GCC_PATH)/$(PREFIX)objcopy$(POSTFIX) +SZ = $(GCC_PATH)/$(PREFIX)size$(POSTFIX) +else +CXX = $(PREFIX)g++ +CC = $(PREFIX)gcc +AS = $(PREFIX)gcc -x assembler-with-cpp +CP = $(PREFIX)objcopy +SZ = $(PREFIX)size +endif +HEX = $(CP) -O ihex +BIN = $(CP) -O binary -S + +####################################### +# CFLAGS +####################################### +# cpu +CPU = -mcpu=cortex-m0 + +# fpu +FPU = + +# float-abi +FLOAT-ABI = + +# mcu +MCU = $(CPU) -mthumb $(FPU) $(FLOAT-ABI) + +# macros for gcc +# AS defines +AS_DEFS = + +# C defines +C_DEFS = \ +-DSTM32F042x6 \ +-DUSE_HAL_DRIVER + + +# CXX defines +CXX_DEFS = \ +-DSTM32F042x6 \ +-DUSE_HAL_DRIVER + + +# AS includes +AS_INCLUDES = \ + +# C includes +C_INCLUDES = \ +-ICore/Inc \ +-IDrivers/CMSIS/Device/ST/STM32F0xx/Include \ +-IDrivers/CMSIS/Include \ +-IDrivers/STM32F0xx_HAL_Driver/Inc \ +-IDrivers/STM32F0xx_HAL_Driver/Inc/Legacy + + + +# compile gcc flags +ASFLAGS = $(MCU) $(AS_DEFS) $(AS_INCLUDES) $(OPT) -Wall -fdata-sections -ffunction-sections + +CFLAGS = $(MCU) $(C_DEFS) $(C_INCLUDES) $(OPT) -Wall -fdata-sections -ffunction-sections + +CXXFLAGS = $(MCU) $(CXX_DEFS) $(C_INCLUDES) $(OPT) -Wall -fdata-sections -ffunction-sections -feliminate-unused-debug-types + +ifeq ($(DEBUG), 1) +CFLAGS += -g -gdwarf -ggdb +CXXFLAGS += -g -gdwarf -ggdb +endif + +# Add additional flags +CFLAGS += -Wall -fdata-sections -ffunction-sections +ASFLAGS += -Wall -fdata-sections -ffunction-sections +CXXFLAGS += + +# Generate dependency information +CFLAGS += -MMD -MP -MF"$(@:%.o=%.d)" +CXXFLAGS += -MMD -MP -MF"$(@:%.o=%.d)" + +####################################### +# LDFLAGS +####################################### +# link script +LDSCRIPT = STM32F042K6Tx_FLASH.ld + +# libraries +LIBS = -lc -lm -lnosys +LIBDIR = \ + + +# Additional LD Flags from config file +ADDITIONALLDFLAGS = -Wl,--print-memory-usage -specs=nano.specs + +LDFLAGS = $(MCU) $(ADDITIONALLDFLAGS) -T$(LDSCRIPT) $(LIBDIR) $(LIBS) -Wl,-Map=$(BUILD_DIR)/$(TARGET).map,--cref -Wl,--gc-sections + +# default action: build all +all: $(BUILD_DIR)/$(TARGET).elf $(BUILD_DIR)/$(TARGET).hex $(BUILD_DIR)/$(TARGET).bin + + +####################################### +# build the application +####################################### +# list of cpp program objects +OBJECTS = $(addprefix $(BUILD_DIR)/,$(notdir $(CPP_SOURCES:.cpp=.o))) +vpath %.cpp $(sort $(dir $(CPP_SOURCES))) + +# list of C objects +OBJECTS += $(addprefix $(BUILD_DIR)/,$(notdir $(C_SOURCES:.c=.o))) +vpath %.c $(sort $(dir $(C_SOURCES))) + +# list of ASM program objects +UPPER_CASE_ASM_SOURCES = $(filter %.S,$(ASM_SOURCES)) +LOWER_CASE_ASM_SOURCES = $(filter %.s,$(ASM_SOURCES)) + +OBJECTS += $(addprefix $(BUILD_DIR)/,$(notdir $(UPPER_CASE_ASM_SOURCES:.S=.o))) +OBJECTS += $(addprefix $(BUILD_DIR)/,$(notdir $(LOWER_CASE_ASM_SOURCES:.s=.o))) +vpath %.s $(sort $(dir $(ASM_SOURCES))) + +$(BUILD_DIR)/%.o: %.cpp STM32Make.make | $(BUILD_DIR) + $(CXX) -c $(CXXFLAGS) -Wa,-a,-ad,-alms=$(BUILD_DIR)/$(notdir $(<:.cpp=.lst)) $< -o $@ + +$(BUILD_DIR)/%.o: %.cxx STM32Make.make | $(BUILD_DIR) + $(CXX) -c $(CXXFLAGS) -Wa,-a,-ad,-alms=$(BUILD_DIR)/$(notdir $(<:.cxx=.lst)) $< -o $@ + +$(BUILD_DIR)/%.o: %.c STM32Make.make | $(BUILD_DIR) + $(CC) -c $(CFLAGS) -Wa,-a,-ad,-alms=$(BUILD_DIR)/$(notdir $(<:.c=.lst)) $< -o $@ + +$(BUILD_DIR)/%.o: %.s STM32Make.make | $(BUILD_DIR) + $(AS) -c $(CFLAGS) $< -o $@ + +$(BUILD_DIR)/%.o: %.S STM32Make.make | $(BUILD_DIR) + $(AS) -c $(CFLAGS) $< -o $@ + +$(BUILD_DIR)/$(TARGET).elf: $(OBJECTS) STM32Make.make + $(CC) $(OBJECTS) $(LDFLAGS) -o $@ + $(SZ) $@ + +$(BUILD_DIR)/%.hex: $(BUILD_DIR)/%.elf | $(BUILD_DIR) + $(HEX) $< $@ + +$(BUILD_DIR)/%.bin: $(BUILD_DIR)/%.elf | $(BUILD_DIR) + $(BIN) $< $@ + +$(BUILD_DIR): + mkdir $@ + +####################################### +# flash +####################################### +flash: $(BUILD_DIR)/$(TARGET).elf + "/home/chiangni/Documents/STM32/OpenOCD/xpacks/@xpack-dev-tools/openocd/.content/bin/openocd" -f ./openocd.cfg -c "program $(BUILD_DIR)/$(TARGET).elf verify reset exit" + +####################################### +# erase +####################################### +erase: $(BUILD_DIR)/$(TARGET).elf + "/home/chiangni/Documents/STM32/OpenOCD/xpacks/@xpack-dev-tools/openocd/.content/bin/openocd" -f ./openocd.cfg -c "init; reset halt; stm32f0x mass_erase 0; exit" + +####################################### +# clean up +####################################### +clean: + -rm -fR $(BUILD_DIR) + +####################################### +# custom makefile rules +####################################### + + + +####################################### +# dependencies +####################################### +-include $(wildcard $(BUILD_DIR)/*.d) + +# *** EOF *** \ No newline at end of file diff --git a/Software/build/SLS.bin b/Software/build/SLS.bin new file mode 100644 index 0000000..f0bcb0d Binary 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/home/chiangni/.config/VSCodium/User/globalStorage/bmd.stm32-for-vscode/@xpack-dev-tools/arm-none-eabi-gcc/13.2.1-1.1.1/.content/bin/../lib/gcc/arm-none-eabi/13.2.1/../../../../arm-none-eabi/lib/thumb/v6-m/nofp/libnosys.a +START GROUP +LOAD /home/chiangni/.config/VSCodium/User/globalStorage/bmd.stm32-for-vscode/@xpack-dev-tools/arm-none-eabi-gcc/13.2.1-1.1.1/.content/bin/../lib/gcc/arm-none-eabi/13.2.1/thumb/v6-m/nofp/libgcc.a +LOAD /home/chiangni/.config/VSCodium/User/globalStorage/bmd.stm32-for-vscode/@xpack-dev-tools/arm-none-eabi-gcc/13.2.1-1.1.1/.content/bin/../lib/gcc/arm-none-eabi/13.2.1/../../../../arm-none-eabi/lib/thumb/v6-m/nofp/libc_nano.a +END GROUP +START GROUP +LOAD /home/chiangni/.config/VSCodium/User/globalStorage/bmd.stm32-for-vscode/@xpack-dev-tools/arm-none-eabi-gcc/13.2.1-1.1.1/.content/bin/../lib/gcc/arm-none-eabi/13.2.1/thumb/v6-m/nofp/libgcc.a +LOAD /home/chiangni/.config/VSCodium/User/globalStorage/bmd.stm32-for-vscode/@xpack-dev-tools/arm-none-eabi-gcc/13.2.1-1.1.1/.content/bin/../lib/gcc/arm-none-eabi/13.2.1/../../../../arm-none-eabi/lib/thumb/v6-m/nofp/libc_nano.a +END GROUP +LOAD /home/chiangni/.config/VSCodium/User/globalStorage/bmd.stm32-for-vscode/@xpack-dev-tools/arm-none-eabi-gcc/13.2.1-1.1.1/.content/bin/../lib/gcc/arm-none-eabi/13.2.1/thumb/v6-m/nofp/crtend.o +LOAD /home/chiangni/.config/VSCodium/User/globalStorage/bmd.stm32-for-vscode/@xpack-dev-tools/arm-none-eabi-gcc/13.2.1-1.1.1/.content/bin/../lib/gcc/arm-none-eabi/13.2.1/thumb/v6-m/nofp/crtn.o + 0x20001800 _estack = (ORIGIN (RAM) + LENGTH (RAM)) + 0x00000200 _Min_Heap_Size = 0x200 + 0x00000400 _Min_Stack_Size = 0x400 + +.isr_vector 0x08000000 0xc0 + 0x08000000 . = ALIGN (0x4) + *(.isr_vector) + .isr_vector 0x08000000 0xc0 build/startup_stm32f042x6.o + 0x08000000 g_pfnVectors + 0x080000c0 . = ALIGN (0x4) + +.text 0x080000c0 0x1a00 + 0x080000c0 . = ALIGN (0x4) + *(.text) + .text 0x080000c0 0x114 /home/chiangni/.config/VSCodium/User/globalStorage/bmd.stm32-for-vscode/@xpack-dev-tools/arm-none-eabi-gcc/13.2.1-1.1.1/.content/bin/../lib/gcc/arm-none-eabi/13.2.1/thumb/v6-m/nofp/libgcc.a(_udivsi3.o) + 0x080000c0 __udivsi3 + 0x080000c0 __aeabi_uidiv + 0x080001cc __aeabi_uidivmod + .text 0x080001d4 0x4 /home/chiangni/.config/VSCodium/User/globalStorage/bmd.stm32-for-vscode/@xpack-dev-tools/arm-none-eabi-gcc/13.2.1-1.1.1/.content/bin/../lib/gcc/arm-none-eabi/13.2.1/thumb/v6-m/nofp/libgcc.a(_dvmd_tls.o) + 0x080001d4 __aeabi_ldiv0 + 0x080001d4 __aeabi_idiv0 + *(.text*) + .text.__do_global_dtors_aux + 0x080001d8 0x28 /home/chiangni/.config/VSCodium/User/globalStorage/bmd.stm32-for-vscode/@xpack-dev-tools/arm-none-eabi-gcc/13.2.1-1.1.1/.content/bin/../lib/gcc/arm-none-eabi/13.2.1/thumb/v6-m/nofp/crtbegin.o + .text.frame_dummy + 0x08000200 0x20 /home/chiangni/.config/VSCodium/User/globalStorage/bmd.stm32-for-vscode/@xpack-dev-tools/arm-none-eabi-gcc/13.2.1-1.1.1/.content/bin/../lib/gcc/arm-none-eabi/13.2.1/thumb/v6-m/nofp/crtbegin.o + .text.MX_GPIO_Init + 0x08000220 0x44 build/main.o + .text.Error_Handler + 0x08000264 0x4 build/main.o + 0x08000264 Error_Handler + .text.MX_ADC_Init + 0x08000268 0x88 build/main.o + .text.MX_CAN_Init + 0x080002f0 0x38 build/main.o + .text.MX_TIM2_Init + 0x08000328 0xd0 build/main.o + .text.SystemClock_Config + 0x080003f8 0x56 build/main.o + 0x080003f8 SystemClock_Config + .text.main 0x0800044e 0x1c build/main.o + 0x0800044e main + *fill* 0x0800046a 0x2 + .text.HAL_MspInit + 0x0800046c 0x30 build/stm32f0xx_hal_msp.o + 0x0800046c HAL_MspInit + .text.HAL_ADC_MspInit + 0x0800049c 0x5c build/stm32f0xx_hal_msp.o + 0x0800049c HAL_ADC_MspInit + .text.HAL_CAN_MspInit + 0x080004f8 0x68 build/stm32f0xx_hal_msp.o + 0x080004f8 HAL_CAN_MspInit + .text.HAL_TIM_Base_MspInit + 0x08000560 0x28 build/stm32f0xx_hal_msp.o + 0x08000560 HAL_TIM_Base_MspInit + .text.HAL_TIM_MspPostInit + 0x08000588 0x78 build/stm32f0xx_hal_msp.o + 0x08000588 HAL_TIM_MspPostInit + .text.NMI_Handler + 0x08000600 0x2 build/stm32f0xx_it.o + 0x08000600 NMI_Handler + .text.HardFault_Handler + 0x08000602 0x2 build/stm32f0xx_it.o + 0x08000602 HardFault_Handler + .text.SVC_Handler + 0x08000604 0x2 build/stm32f0xx_it.o + 0x08000604 SVC_Handler + .text.PendSV_Handler + 0x08000606 0x2 build/stm32f0xx_it.o + 0x08000606 PendSV_Handler + .text.SysTick_Handler + 0x08000608 0x8 build/stm32f0xx_it.o + 0x08000608 SysTick_Handler + .text.SystemInit + 0x08000610 0x2 build/system_stm32f0xx.o + 0x08000610 SystemInit + *fill* 0x08000612 0x2 + .text.HAL_InitTick + 0x08000614 0x50 build/stm32f0xx_hal.o + 0x08000614 HAL_InitTick + .text.HAL_Init + 0x08000664 0x20 build/stm32f0xx_hal.o + 0x08000664 HAL_Init + .text.HAL_IncTick + 0x08000684 0x18 build/stm32f0xx_hal.o + 0x08000684 HAL_IncTick + .text.HAL_GetTick + 0x0800069c 0xc build/stm32f0xx_hal.o + 0x0800069c HAL_GetTick + .text.HAL_ADC_Init + 0x080006a8 0x184 build/stm32f0xx_hal_adc.o + 0x080006a8 HAL_ADC_Init + .text.HAL_ADC_ConfigChannel + 0x0800082c 0x138 build/stm32f0xx_hal_adc.o + 0x0800082c HAL_ADC_ConfigChannel + .text.HAL_CAN_Init + 0x08000964 0x14e build/stm32f0xx_hal_can.o + 0x08000964 HAL_CAN_Init + *fill* 0x08000ab2 0x2 + .text.__NVIC_SetPriority + 0x08000ab4 0x60 build/stm32f0xx_hal_cortex.o + .text.SysTick_Config + 0x08000b14 0x38 build/stm32f0xx_hal_cortex.o + .text.HAL_NVIC_SetPriority + 0x08000b4c 0x8 build/stm32f0xx_hal_cortex.o + 0x08000b4c HAL_NVIC_SetPriority + .text.HAL_SYSTICK_Config + 0x08000b54 0x8 build/stm32f0xx_hal_cortex.o + 0x08000b54 HAL_SYSTICK_Config + .text.HAL_GPIO_Init + 0x08000b5c 0x17c build/stm32f0xx_hal_gpio.o + 0x08000b5c HAL_GPIO_Init + .text.HAL_RCC_OscConfig + 0x08000cd8 0x544 build/stm32f0xx_hal_rcc.o + 0x08000cd8 HAL_RCC_OscConfig + .text.HAL_RCC_GetSysClockFreq + 0x0800121c 0x78 build/stm32f0xx_hal_rcc.o + 0x0800121c HAL_RCC_GetSysClockFreq + .text.HAL_RCC_ClockConfig + 0x08001294 0x144 build/stm32f0xx_hal_rcc.o + 0x08001294 HAL_RCC_ClockConfig + .text.TIM_OC1_SetConfig + 0x080013d8 0x7c build/stm32f0xx_hal_tim.o + .text.TIM_OC3_SetConfig + 0x08001454 0x80 build/stm32f0xx_hal_tim.o + .text.TIM_OC4_SetConfig + 0x080014d4 0x68 build/stm32f0xx_hal_tim.o + .text.TIM_TI1_ConfigInputStage + 0x0800153c 0x22 build/stm32f0xx_hal_tim.o + *fill* 0x0800155e 0x2 + .text.TIM_TI2_ConfigInputStage + 0x08001560 0x28 build/stm32f0xx_hal_tim.o + .text.TIM_ITRx_SetConfig + 0x08001588 0x10 build/stm32f0xx_hal_tim.o + .text.HAL_TIM_PWM_MspInit + 0x08001598 0x2 build/stm32f0xx_hal_tim.o + 0x08001598 HAL_TIM_PWM_MspInit + *fill* 0x0800159a 0x2 + .text.TIM_Base_SetConfig + 0x0800159c 0x94 build/stm32f0xx_hal_tim.o + 0x0800159c TIM_Base_SetConfig + .text.HAL_TIM_Base_Init + 0x08001630 0x58 build/stm32f0xx_hal_tim.o + 0x08001630 HAL_TIM_Base_Init + .text.HAL_TIM_PWM_Init + 0x08001688 0x58 build/stm32f0xx_hal_tim.o + 0x08001688 HAL_TIM_PWM_Init + .text.TIM_OC2_SetConfig + 0x080016e0 0x78 build/stm32f0xx_hal_tim.o + 0x080016e0 TIM_OC2_SetConfig + .text.HAL_TIM_PWM_ConfigChannel + 0x08001758 0xf0 build/stm32f0xx_hal_tim.o + 0x08001758 HAL_TIM_PWM_ConfigChannel + .text.TIM_ETR_SetConfig + 0x08001848 0x18 build/stm32f0xx_hal_tim.o + 0x08001848 TIM_ETR_SetConfig + .text.HAL_TIM_ConfigClockSource + 0x08001860 0x108 build/stm32f0xx_hal_tim.o + 0x08001860 HAL_TIM_ConfigClockSource + .text.HAL_TIMEx_MasterConfigSynchronization + 0x08001968 0x64 build/stm32f0xx_hal_tim_ex.o + 0x08001968 HAL_TIMEx_MasterConfigSynchronization + .text.Reset_Handler + 0x080019cc 0x80 build/startup_stm32f042x6.o + 0x080019cc Reset_Handler + .text.Default_Handler + 0x08001a4c 0x2 build/startup_stm32f042x6.o + 0x08001a4c TIM1_CC_IRQHandler + 0x08001a4c TSC_IRQHandler + 0x08001a4c I2C1_IRQHandler + 0x08001a4c RCC_CRS_IRQHandler + 0x08001a4c SPI1_IRQHandler + 0x08001a4c EXTI2_3_IRQHandler + 0x08001a4c ADC1_IRQHandler + 0x08001a4c TIM17_IRQHandler + 0x08001a4c CEC_CAN_IRQHandler + 0x08001a4c RTC_IRQHandler + 0x08001a4c PVD_VDDIO2_IRQHandler + 0x08001a4c TIM16_IRQHandler + 0x08001a4c TIM3_IRQHandler + 0x08001a4c EXTI4_15_IRQHandler + 0x08001a4c DMA1_Channel1_IRQHandler + 0x08001a4c Default_Handler + 0x08001a4c TIM14_IRQHandler + 0x08001a4c DMA1_Channel4_5_IRQHandler + 0x08001a4c EXTI0_1_IRQHandler + 0x08001a4c USB_IRQHandler + 0x08001a4c SPI2_IRQHandler + 0x08001a4c WWDG_IRQHandler + 0x08001a4c TIM2_IRQHandler + 0x08001a4c DMA1_Channel2_3_IRQHandler + 0x08001a4c USART2_IRQHandler + 0x08001a4c FLASH_IRQHandler + 0x08001a4c USART1_IRQHandler + 0x08001a4c TIM1_BRK_UP_TRG_COM_IRQHandler + .text.memset 0x08001a4e 0x10 /home/chiangni/.config/VSCodium/User/globalStorage/bmd.stm32-for-vscode/@xpack-dev-tools/arm-none-eabi-gcc/13.2.1-1.1.1/.content/bin/../lib/gcc/arm-none-eabi/13.2.1/../../../../arm-none-eabi/lib/thumb/v6-m/nofp/libc_nano.a(libc_a-memset.o) + 0x08001a4e memset + *fill* 0x08001a5e 0x2 + .text.__libc_init_array + 0x08001a60 0x48 /home/chiangni/.config/VSCodium/User/globalStorage/bmd.stm32-for-vscode/@xpack-dev-tools/arm-none-eabi-gcc/13.2.1-1.1.1/.content/bin/../lib/gcc/arm-none-eabi/13.2.1/../../../../arm-none-eabi/lib/thumb/v6-m/nofp/libc_nano.a(libc_a-init.o) + 0x08001a60 __libc_init_array + *(.glue_7) + .glue_7 0x08001aa8 0x0 linker stubs + *(.glue_7t) + .glue_7t 0x08001aa8 0x0 linker stubs + *(.eh_frame) + .eh_frame 0x08001aa8 0x0 /home/chiangni/.config/VSCodium/User/globalStorage/bmd.stm32-for-vscode/@xpack-dev-tools/arm-none-eabi-gcc/13.2.1-1.1.1/.content/bin/../lib/gcc/arm-none-eabi/13.2.1/thumb/v6-m/nofp/crtbegin.o + *(.init) + .init 0x08001aa8 0x4 /home/chiangni/.config/VSCodium/User/globalStorage/bmd.stm32-for-vscode/@xpack-dev-tools/arm-none-eabi-gcc/13.2.1-1.1.1/.content/bin/../lib/gcc/arm-none-eabi/13.2.1/thumb/v6-m/nofp/crti.o + 0x08001aa8 _init + .init 0x08001aac 0x8 /home/chiangni/.config/VSCodium/User/globalStorage/bmd.stm32-for-vscode/@xpack-dev-tools/arm-none-eabi-gcc/13.2.1-1.1.1/.content/bin/../lib/gcc/arm-none-eabi/13.2.1/thumb/v6-m/nofp/crtn.o + *(.fini) + .fini 0x08001ab4 0x4 /home/chiangni/.config/VSCodium/User/globalStorage/bmd.stm32-for-vscode/@xpack-dev-tools/arm-none-eabi-gcc/13.2.1-1.1.1/.content/bin/../lib/gcc/arm-none-eabi/13.2.1/thumb/v6-m/nofp/crti.o + 0x08001ab4 _fini + .fini 0x08001ab8 0x8 /home/chiangni/.config/VSCodium/User/globalStorage/bmd.stm32-for-vscode/@xpack-dev-tools/arm-none-eabi-gcc/13.2.1-1.1.1/.content/bin/../lib/gcc/arm-none-eabi/13.2.1/thumb/v6-m/nofp/crtn.o + 0x08001ac0 . = ALIGN (0x4) + 0x08001ac0 _etext = . + +.vfp11_veneer 0x08001ac0 0x0 + .vfp11_veneer 0x08001ac0 0x0 linker stubs + +.v4_bx 0x08001ac0 0x0 + .v4_bx 0x08001ac0 0x0 linker stubs + +.iplt 0x08001ac0 0x0 + .iplt 0x08001ac0 0x0 /home/chiangni/.config/VSCodium/User/globalStorage/bmd.stm32-for-vscode/@xpack-dev-tools/arm-none-eabi-gcc/13.2.1-1.1.1/.content/bin/../lib/gcc/arm-none-eabi/13.2.1/thumb/v6-m/nofp/crtbegin.o + +.rodata 0x08001ac0 0x30 + 0x08001ac0 . = ALIGN (0x4) + *(.rodata) + *(.rodata*) + .rodata.AHBPrescTable + 0x08001ac0 0x10 build/system_stm32f0xx.o + 0x08001ac0 AHBPrescTable + .rodata.aPredivFactorTable.0 + 0x08001ad0 0x10 build/stm32f0xx_hal_rcc.o + .rodata.aPLLMULFactorTable.1 + 0x08001ae0 0x10 build/stm32f0xx_hal_rcc.o + 0x08001af0 . = ALIGN (0x4) + +.rel.dyn 0x08001af0 0x0 + .rel.iplt 0x08001af0 0x0 /home/chiangni/.config/VSCodium/User/globalStorage/bmd.stm32-for-vscode/@xpack-dev-tools/arm-none-eabi-gcc/13.2.1-1.1.1/.content/bin/../lib/gcc/arm-none-eabi/13.2.1/thumb/v6-m/nofp/crtbegin.o + +.ARM.extab + *(.ARM.extab* .gnu.linkonce.armextab.*) + +.ARM 0x08001af0 0x0 + 0x08001af0 __exidx_start = . + *(.ARM.exidx*) + 0x08001af0 __exidx_end = . + +.preinit_array 0x08001af0 0x0 + 0x08001af0 PROVIDE (__preinit_array_start = .) + *(.preinit_array*) + 0x08001af0 PROVIDE (__preinit_array_end = .) + +.init_array 0x08001af0 0x4 + 0x08001af0 PROVIDE (__init_array_start = .) + *(SORT_BY_NAME(.init_array.*)) + *(.init_array*) + .init_array 0x08001af0 0x4 /home/chiangni/.config/VSCodium/User/globalStorage/bmd.stm32-for-vscode/@xpack-dev-tools/arm-none-eabi-gcc/13.2.1-1.1.1/.content/bin/../lib/gcc/arm-none-eabi/13.2.1/thumb/v6-m/nofp/crtbegin.o + 0x08001af4 PROVIDE (__init_array_end = .) + +.fini_array 0x08001af4 0x4 + 0x08001af4 PROVIDE (__fini_array_start = .) + *(SORT_BY_NAME(.fini_array.*)) + *(.fini_array*) + .fini_array 0x08001af4 0x4 /home/chiangni/.config/VSCodium/User/globalStorage/bmd.stm32-for-vscode/@xpack-dev-tools/arm-none-eabi-gcc/13.2.1-1.1.1/.content/bin/../lib/gcc/arm-none-eabi/13.2.1/thumb/v6-m/nofp/crtbegin.o + 0x08001af8 PROVIDE (__fini_array_end = .) + 0x08001af8 _sidata = LOADADDR (.data) + +.data 0x20000000 0xc load address 0x08001af8 + 0x20000000 . = ALIGN (0x4) + 0x20000000 _sdata = . + *(.data) + *(.data*) + .data.SystemCoreClock + 0x20000000 0x4 build/system_stm32f0xx.o + 0x20000000 SystemCoreClock + .data.uwTickFreq + 0x20000004 0x1 build/stm32f0xx_hal.o + 0x20000004 uwTickFreq + *fill* 0x20000005 0x3 + .data.uwTickPrio + 0x20000008 0x4 build/stm32f0xx_hal.o + 0x20000008 uwTickPrio + 0x2000000c . = ALIGN (0x4) + 0x2000000c _edata = . + +.igot.plt 0x2000000c 0x0 load address 0x08001b04 + .igot.plt 0x2000000c 0x0 /home/chiangni/.config/VSCodium/User/globalStorage/bmd.stm32-for-vscode/@xpack-dev-tools/arm-none-eabi-gcc/13.2.1-1.1.1/.content/bin/../lib/gcc/arm-none-eabi/13.2.1/thumb/v6-m/nofp/crtbegin.o + 0x2000000c . = ALIGN (0x4) + +.bss 0x2000000c 0xd0 load address 0x08001b04 + 0x2000000c _sbss = . + 0x2000000c __bss_start__ = _sbss + *(.bss) + *(.bss*) + .bss.completed.1 + 0x2000000c 0x1 /home/chiangni/.config/VSCodium/User/globalStorage/bmd.stm32-for-vscode/@xpack-dev-tools/arm-none-eabi-gcc/13.2.1-1.1.1/.content/bin/../lib/gcc/arm-none-eabi/13.2.1/thumb/v6-m/nofp/crtbegin.o + *fill* 0x2000000d 0x3 + .bss.object.0 0x20000010 0x18 /home/chiangni/.config/VSCodium/User/globalStorage/bmd.stm32-for-vscode/@xpack-dev-tools/arm-none-eabi-gcc/13.2.1-1.1.1/.content/bin/../lib/gcc/arm-none-eabi/13.2.1/thumb/v6-m/nofp/crtbegin.o + .bss.htim2 0x20000028 0x48 build/main.o + 0x20000028 htim2 + .bss.hcan 0x20000070 0x28 build/main.o + 0x20000070 hcan + .bss.hadc 0x20000098 0x40 build/main.o + 0x20000098 hadc + .bss.uwTick 0x200000d8 0x4 build/stm32f0xx_hal.o + 0x200000d8 uwTick + *(COMMON) + 0x200000dc . = ALIGN (0x4) + 0x200000dc _ebss = . + 0x200000dc __bss_end__ = _ebss + +._user_heap_stack + 0x200000dc 0x604 load address 0x08001b04 + 0x200000e0 . = ALIGN (0x8) + *fill* 0x200000dc 0x4 + 0x200000e0 PROVIDE (end = .) + [!provide] PROVIDE (_end = .) + 0x200002e0 . = (. + _Min_Heap_Size) + *fill* 0x200000e0 0x200 + 0x200006e0 . = (. + _Min_Stack_Size) + *fill* 0x200002e0 0x400 + 0x200006e0 . = ALIGN (0x8) + +/DISCARD/ + libc.a(*) + libm.a(*) + libgcc.a(*) + +.ARM.attributes + 0x00000000 0x28 + *(.ARM.attributes) + .ARM.attributes + 0x00000000 0x1e /home/chiangni/.config/VSCodium/User/globalStorage/bmd.stm32-for-vscode/@xpack-dev-tools/arm-none-eabi-gcc/13.2.1-1.1.1/.content/bin/../lib/gcc/arm-none-eabi/13.2.1/thumb/v6-m/nofp/crti.o + .ARM.attributes + 0x0000001e 0x2c /home/chiangni/.config/VSCodium/User/globalStorage/bmd.stm32-for-vscode/@xpack-dev-tools/arm-none-eabi-gcc/13.2.1-1.1.1/.content/bin/../lib/gcc/arm-none-eabi/13.2.1/thumb/v6-m/nofp/crtbegin.o + .ARM.attributes + 0x0000004a 0x2c build/main.o + .ARM.attributes + 0x00000076 0x2c build/stm32f0xx_hal_msp.o + .ARM.attributes + 0x000000a2 0x2c build/stm32f0xx_it.o + .ARM.attributes + 0x000000ce 0x2c build/system_stm32f0xx.o + .ARM.attributes + 0x000000fa 0x2c build/stm32f0xx_hal.o + .ARM.attributes + 0x00000126 0x2c build/stm32f0xx_hal_adc.o + .ARM.attributes + 0x00000152 0x2c build/stm32f0xx_hal_can.o + .ARM.attributes + 0x0000017e 0x2c build/stm32f0xx_hal_cortex.o + .ARM.attributes + 0x000001aa 0x2c build/stm32f0xx_hal_gpio.o + .ARM.attributes + 0x000001d6 0x2c build/stm32f0xx_hal_rcc.o + .ARM.attributes + 0x00000202 0x2c build/stm32f0xx_hal_tim.o + .ARM.attributes + 0x0000022e 0x2c build/stm32f0xx_hal_tim_ex.o + .ARM.attributes + 0x0000025a 0x21 build/startup_stm32f042x6.o + .ARM.attributes + 0x0000027b 0x2c /home/chiangni/.config/VSCodium/User/globalStorage/bmd.stm32-for-vscode/@xpack-dev-tools/arm-none-eabi-gcc/13.2.1-1.1.1/.content/bin/../lib/gcc/arm-none-eabi/13.2.1/../../../../arm-none-eabi/lib/thumb/v6-m/nofp/libc_nano.a(libc_a-memset.o) + .ARM.attributes + 0x000002a7 0x2c /home/chiangni/.config/VSCodium/User/globalStorage/bmd.stm32-for-vscode/@xpack-dev-tools/arm-none-eabi-gcc/13.2.1-1.1.1/.content/bin/../lib/gcc/arm-none-eabi/13.2.1/../../../../arm-none-eabi/lib/thumb/v6-m/nofp/libc_nano.a(libc_a-init.o) + .ARM.attributes + 0x000002d3 0x1e /home/chiangni/.config/VSCodium/User/globalStorage/bmd.stm32-for-vscode/@xpack-dev-tools/arm-none-eabi-gcc/13.2.1-1.1.1/.content/bin/../lib/gcc/arm-none-eabi/13.2.1/thumb/v6-m/nofp/libgcc.a(_udivsi3.o) + .ARM.attributes + 0x000002f1 0x1e /home/chiangni/.config/VSCodium/User/globalStorage/bmd.stm32-for-vscode/@xpack-dev-tools/arm-none-eabi-gcc/13.2.1-1.1.1/.content/bin/../lib/gcc/arm-none-eabi/13.2.1/thumb/v6-m/nofp/libgcc.a(_dvmd_tls.o) + .ARM.attributes + 0x0000030f 0x1e /home/chiangni/.config/VSCodium/User/globalStorage/bmd.stm32-for-vscode/@xpack-dev-tools/arm-none-eabi-gcc/13.2.1-1.1.1/.content/bin/../lib/gcc/arm-none-eabi/13.2.1/thumb/v6-m/nofp/crtn.o +OUTPUT(build/SLS.elf elf32-littlearm) +LOAD linker stubs +LOAD /home/chiangni/.config/VSCodium/User/globalStorage/bmd.stm32-for-vscode/@xpack-dev-tools/arm-none-eabi-gcc/13.2.1-1.1.1/.content/bin/../lib/gcc/arm-none-eabi/13.2.1/../../../../arm-none-eabi/lib/thumb/v6-m/nofp/libc.a +LOAD /home/chiangni/.config/VSCodium/User/globalStorage/bmd.stm32-for-vscode/@xpack-dev-tools/arm-none-eabi-gcc/13.2.1-1.1.1/.content/bin/../lib/gcc/arm-none-eabi/13.2.1/../../../../arm-none-eabi/lib/thumb/v6-m/nofp/libm.a +LOAD /home/chiangni/.config/VSCodium/User/globalStorage/bmd.stm32-for-vscode/@xpack-dev-tools/arm-none-eabi-gcc/13.2.1-1.1.1/.content/bin/../lib/gcc/arm-none-eabi/13.2.1/thumb/v6-m/nofp/libgcc.a + +.comment 0x00000000 0x39 + .comment 0x00000000 0x39 /home/chiangni/.config/VSCodium/User/globalStorage/bmd.stm32-for-vscode/@xpack-dev-tools/arm-none-eabi-gcc/13.2.1-1.1.1/.content/bin/../lib/gcc/arm-none-eabi/13.2.1/thumb/v6-m/nofp/crtbegin.o + 0x3a (size before relaxing) + .comment 0x00000039 0x3a build/main.o + .comment 0x00000039 0x3a build/stm32f0xx_hal_msp.o + .comment 0x00000039 0x3a build/stm32f0xx_it.o + .comment 0x00000039 0x3a build/system_stm32f0xx.o + .comment 0x00000039 0x3a build/stm32f0xx_hal.o + .comment 0x00000039 0x3a build/stm32f0xx_hal_adc.o + .comment 0x00000039 0x3a build/stm32f0xx_hal_can.o + .comment 0x00000039 0x3a build/stm32f0xx_hal_cortex.o + .comment 0x00000039 0x3a build/stm32f0xx_hal_gpio.o + .comment 0x00000039 0x3a build/stm32f0xx_hal_rcc.o + .comment 0x00000039 0x3a build/stm32f0xx_hal_tim.o + .comment 0x00000039 0x3a build/stm32f0xx_hal_tim_ex.o + .comment 0x00000039 0x3a /home/chiangni/.config/VSCodium/User/globalStorage/bmd.stm32-for-vscode/@xpack-dev-tools/arm-none-eabi-gcc/13.2.1-1.1.1/.content/bin/../lib/gcc/arm-none-eabi/13.2.1/../../../../arm-none-eabi/lib/thumb/v6-m/nofp/libc_nano.a(libc_a-memset.o) + .comment 0x00000039 0x3a /home/chiangni/.config/VSCodium/User/globalStorage/bmd.stm32-for-vscode/@xpack-dev-tools/arm-none-eabi-gcc/13.2.1-1.1.1/.content/bin/../lib/gcc/arm-none-eabi/13.2.1/../../../../arm-none-eabi/lib/thumb/v6-m/nofp/libc_nano.a(libc_a-init.o) + +.debug_info 0x00000000 0xbed7 + .debug_info 0x00000000 0x14a0 build/main.o + .debug_info 0x000014a0 0x10f4 build/stm32f0xx_hal_msp.o + .debug_info 0x00002594 0xdd build/stm32f0xx_it.o + .debug_info 0x00002671 0x276 build/system_stm32f0xx.o + .debug_info 0x000028e7 0x740 build/stm32f0xx_hal.o + .debug_info 0x00003027 0xf50 build/stm32f0xx_hal_adc.o + .debug_info 0x00003f77 0x116f build/stm32f0xx_hal_can.o + .debug_info 0x000050e6 0x7e7 build/stm32f0xx_hal_cortex.o + .debug_info 0x000058cd 0x5de build/stm32f0xx_hal_gpio.o + .debug_info 0x00005eab 0xa6b build/stm32f0xx_hal_rcc.o + .debug_info 0x00006916 0x3b86 build/stm32f0xx_hal_tim.o + .debug_info 0x0000a49c 0x1a0b build/stm32f0xx_hal_tim_ex.o + .debug_info 0x0000bea7 0x30 build/startup_stm32f042x6.o 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build/startup_stm32f042x6.o + +.debug_frame 0x00000000 0x1b6c + .debug_frame 0x00000000 0xb0 build/main.o + .debug_frame 0x000000b0 0xcc build/stm32f0xx_hal_msp.o + .debug_frame 0x0000017c 0x68 build/stm32f0xx_it.o + .debug_frame 0x000001e4 0x38 build/system_stm32f0xx.o + .debug_frame 0x0000021c 0x1ac build/stm32f0xx_hal.o + .debug_frame 0x000003c8 0x2a4 build/stm32f0xx_hal_adc.o + .debug_frame 0x0000066c 0x2c8 build/stm32f0xx_hal_can.o + .debug_frame 0x00000934 0x144 build/stm32f0xx_hal_cortex.o + .debug_frame 0x00000a78 0xc0 build/stm32f0xx_hal_gpio.o + .debug_frame 0x00000b38 0x138 build/stm32f0xx_hal_rcc.o + .debug_frame 0x00000c70 0xadc build/stm32f0xx_hal_tim.o + .debug_frame 0x0000174c 0x420 build/stm32f0xx_hal_tim_ex.o + +.debug_loclists + 0x00000000 0x7834 + .debug_loclists + 0x00000000 0x105 build/stm32f0xx_hal_msp.o + .debug_loclists + 0x00000105 0x105 build/system_stm32f0xx.o + .debug_loclists + 0x0000020a 0xe1 build/stm32f0xx_hal.o + .debug_loclists + 0x000002eb 0x9c7 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+HAL_ADC_LevelOutOfWindowCallback build/stm32f0xx_hal_adc.o +HAL_ADC_MspDeInit build/stm32f0xx_hal_msp.o +HAL_ADC_MspInit build/stm32f0xx_hal_msp.o +HAL_ADC_PollForConversion build/stm32f0xx_hal_adc.o +HAL_ADC_PollForEvent build/stm32f0xx_hal_adc.o +HAL_ADC_Start build/stm32f0xx_hal_adc.o +HAL_ADC_Start_DMA build/stm32f0xx_hal_adc.o +HAL_ADC_Start_IT build/stm32f0xx_hal_adc.o +HAL_ADC_Stop build/stm32f0xx_hal_adc.o +HAL_ADC_Stop_DMA build/stm32f0xx_hal_adc.o +HAL_ADC_Stop_IT build/stm32f0xx_hal_adc.o +HAL_CAN_AbortTxRequest build/stm32f0xx_hal_can.o +HAL_CAN_ActivateNotification build/stm32f0xx_hal_can.o +HAL_CAN_AddTxMessage build/stm32f0xx_hal_can.o +HAL_CAN_ConfigFilter build/stm32f0xx_hal_can.o +HAL_CAN_DeInit build/stm32f0xx_hal_can.o +HAL_CAN_DeactivateNotification build/stm32f0xx_hal_can.o +HAL_CAN_ErrorCallback build/stm32f0xx_hal_can.o +HAL_CAN_GetError build/stm32f0xx_hal_can.o +HAL_CAN_GetRxFifoFillLevel build/stm32f0xx_hal_can.o +HAL_CAN_GetRxMessage build/stm32f0xx_hal_can.o +HAL_CAN_GetState build/stm32f0xx_hal_can.o +HAL_CAN_GetTxMailboxesFreeLevel build/stm32f0xx_hal_can.o +HAL_CAN_GetTxTimestamp build/stm32f0xx_hal_can.o +HAL_CAN_IRQHandler build/stm32f0xx_hal_can.o +HAL_CAN_Init build/stm32f0xx_hal_can.o + build/main.o +HAL_CAN_IsSleepActive build/stm32f0xx_hal_can.o +HAL_CAN_IsTxMessagePending build/stm32f0xx_hal_can.o +HAL_CAN_MspDeInit build/stm32f0xx_hal_msp.o +HAL_CAN_MspInit build/stm32f0xx_hal_msp.o +HAL_CAN_RequestSleep build/stm32f0xx_hal_can.o +HAL_CAN_ResetError build/stm32f0xx_hal_can.o +HAL_CAN_RxFifo0FullCallback build/stm32f0xx_hal_can.o +HAL_CAN_RxFifo0MsgPendingCallback build/stm32f0xx_hal_can.o +HAL_CAN_RxFifo1FullCallback build/stm32f0xx_hal_can.o +HAL_CAN_RxFifo1MsgPendingCallback build/stm32f0xx_hal_can.o +HAL_CAN_SleepCallback build/stm32f0xx_hal_can.o +HAL_CAN_Start build/stm32f0xx_hal_can.o +HAL_CAN_Stop build/stm32f0xx_hal_can.o +HAL_CAN_TxMailbox0AbortCallback build/stm32f0xx_hal_can.o +HAL_CAN_TxMailbox0CompleteCallback build/stm32f0xx_hal_can.o +HAL_CAN_TxMailbox1AbortCallback build/stm32f0xx_hal_can.o +HAL_CAN_TxMailbox1CompleteCallback build/stm32f0xx_hal_can.o +HAL_CAN_TxMailbox2AbortCallback build/stm32f0xx_hal_can.o +HAL_CAN_TxMailbox2CompleteCallback build/stm32f0xx_hal_can.o +HAL_CAN_WakeUp build/stm32f0xx_hal_can.o +HAL_CAN_WakeUpFromRxMsgCallback build/stm32f0xx_hal_can.o +HAL_DBGMCU_DisableDBGStandbyMode build/stm32f0xx_hal.o +HAL_DBGMCU_DisableDBGStopMode build/stm32f0xx_hal.o +HAL_DBGMCU_EnableDBGStandbyMode build/stm32f0xx_hal.o +HAL_DBGMCU_EnableDBGStopMode build/stm32f0xx_hal.o +HAL_DMA_Abort build/stm32f0xx_hal_dma.o + build/stm32f0xx_hal_adc.o +HAL_DMA_Abort_IT build/stm32f0xx_hal_dma.o + build/stm32f0xx_hal_tim_ex.o + build/stm32f0xx_hal_tim.o + build/stm32f0xx_hal_i2c.o +HAL_DMA_DeInit build/stm32f0xx_hal_dma.o +HAL_DMA_GetError build/stm32f0xx_hal_dma.o +HAL_DMA_GetState build/stm32f0xx_hal_dma.o + build/stm32f0xx_hal_i2c.o +HAL_DMA_IRQHandler build/stm32f0xx_hal_dma.o +HAL_DMA_Init build/stm32f0xx_hal_dma.o +HAL_DMA_PollForTransfer build/stm32f0xx_hal_dma.o +HAL_DMA_RegisterCallback build/stm32f0xx_hal_dma.o +HAL_DMA_Start build/stm32f0xx_hal_dma.o +HAL_DMA_Start_IT build/stm32f0xx_hal_dma.o + build/stm32f0xx_hal_tim_ex.o + build/stm32f0xx_hal_tim.o + build/stm32f0xx_hal_i2c.o + build/stm32f0xx_hal_adc.o +HAL_DMA_UnRegisterCallback build/stm32f0xx_hal_dma.o +HAL_DeInit build/stm32f0xx_hal.o +HAL_Delay build/stm32f0xx_hal.o +HAL_EXTI_ClearConfigLine build/stm32f0xx_hal_exti.o +HAL_EXTI_ClearPending build/stm32f0xx_hal_exti.o +HAL_EXTI_GenerateSWI build/stm32f0xx_hal_exti.o +HAL_EXTI_GetConfigLine build/stm32f0xx_hal_exti.o +HAL_EXTI_GetHandle build/stm32f0xx_hal_exti.o +HAL_EXTI_GetPending build/stm32f0xx_hal_exti.o +HAL_EXTI_IRQHandler build/stm32f0xx_hal_exti.o +HAL_EXTI_RegisterCallback build/stm32f0xx_hal_exti.o +HAL_EXTI_SetConfigLine build/stm32f0xx_hal_exti.o +HAL_FLASHEx_Erase build/stm32f0xx_hal_flash_ex.o +HAL_FLASHEx_Erase_IT build/stm32f0xx_hal_flash_ex.o +HAL_FLASHEx_OBErase build/stm32f0xx_hal_flash_ex.o +HAL_FLASHEx_OBGetConfig build/stm32f0xx_hal_flash_ex.o +HAL_FLASHEx_OBGetUserData build/stm32f0xx_hal_flash_ex.o +HAL_FLASHEx_OBProgram build/stm32f0xx_hal_flash_ex.o +HAL_FLASH_EndOfOperationCallback build/stm32f0xx_hal_flash.o +HAL_FLASH_GetError build/stm32f0xx_hal_flash.o +HAL_FLASH_IRQHandler build/stm32f0xx_hal_flash.o +HAL_FLASH_Lock build/stm32f0xx_hal_flash.o +HAL_FLASH_OB_Launch build/stm32f0xx_hal_flash.o +HAL_FLASH_OB_Lock build/stm32f0xx_hal_flash.o +HAL_FLASH_OB_Unlock build/stm32f0xx_hal_flash.o +HAL_FLASH_OperationErrorCallback build/stm32f0xx_hal_flash.o +HAL_FLASH_Program build/stm32f0xx_hal_flash.o +HAL_FLASH_Program_IT build/stm32f0xx_hal_flash.o +HAL_FLASH_Unlock build/stm32f0xx_hal_flash.o +HAL_GPIO_DeInit build/stm32f0xx_hal_gpio.o + build/stm32f0xx_hal_msp.o +HAL_GPIO_EXTI_Callback build/stm32f0xx_hal_gpio.o +HAL_GPIO_EXTI_IRQHandler build/stm32f0xx_hal_gpio.o +HAL_GPIO_Init build/stm32f0xx_hal_gpio.o + build/stm32f0xx_hal_rcc.o + build/stm32f0xx_hal_msp.o +HAL_GPIO_LockPin build/stm32f0xx_hal_gpio.o +HAL_GPIO_ReadPin build/stm32f0xx_hal_gpio.o +HAL_GPIO_TogglePin build/stm32f0xx_hal_gpio.o +HAL_GPIO_WritePin build/stm32f0xx_hal_gpio.o +HAL_GetDEVID build/stm32f0xx_hal.o +HAL_GetHalVersion build/stm32f0xx_hal.o +HAL_GetREVID build/stm32f0xx_hal.o +HAL_GetTick build/stm32f0xx_hal.o + build/stm32f0xx_hal_rcc_ex.o + build/stm32f0xx_hal_rcc.o + build/stm32f0xx_hal_i2c.o + build/stm32f0xx_hal_flash.o + build/stm32f0xx_hal_dma.o + build/stm32f0xx_hal_can.o + build/stm32f0xx_hal_adc_ex.o + build/stm32f0xx_hal_adc.o +HAL_GetTickFreq build/stm32f0xx_hal.o +HAL_GetTickPrio build/stm32f0xx_hal.o +HAL_GetUIDw0 build/stm32f0xx_hal.o +HAL_GetUIDw1 build/stm32f0xx_hal.o +HAL_GetUIDw2 build/stm32f0xx_hal.o +HAL_I2CEx_ConfigAnalogFilter build/stm32f0xx_hal_i2c_ex.o +HAL_I2CEx_ConfigDigitalFilter build/stm32f0xx_hal_i2c_ex.o +HAL_I2CEx_DisableFastModePlus build/stm32f0xx_hal_i2c_ex.o +HAL_I2CEx_DisableWakeUp build/stm32f0xx_hal_i2c_ex.o +HAL_I2CEx_EnableFastModePlus build/stm32f0xx_hal_i2c_ex.o +HAL_I2CEx_EnableWakeUp build/stm32f0xx_hal_i2c_ex.o +HAL_I2C_AbortCpltCallback build/stm32f0xx_hal_i2c.o +HAL_I2C_AddrCallback build/stm32f0xx_hal_i2c.o +HAL_I2C_DeInit build/stm32f0xx_hal_i2c.o +HAL_I2C_DisableListen_IT build/stm32f0xx_hal_i2c.o +HAL_I2C_ER_IRQHandler build/stm32f0xx_hal_i2c.o +HAL_I2C_EV_IRQHandler build/stm32f0xx_hal_i2c.o +HAL_I2C_EnableListen_IT build/stm32f0xx_hal_i2c.o +HAL_I2C_ErrorCallback build/stm32f0xx_hal_i2c.o +HAL_I2C_GetError build/stm32f0xx_hal_i2c.o +HAL_I2C_GetMode build/stm32f0xx_hal_i2c.o +HAL_I2C_GetState build/stm32f0xx_hal_i2c.o +HAL_I2C_Init build/stm32f0xx_hal_i2c.o +HAL_I2C_IsDeviceReady build/stm32f0xx_hal_i2c.o +HAL_I2C_ListenCpltCallback build/stm32f0xx_hal_i2c.o +HAL_I2C_MasterRxCpltCallback build/stm32f0xx_hal_i2c.o +HAL_I2C_MasterTxCpltCallback build/stm32f0xx_hal_i2c.o +HAL_I2C_Master_Abort_IT build/stm32f0xx_hal_i2c.o +HAL_I2C_Master_Receive build/stm32f0xx_hal_i2c.o +HAL_I2C_Master_Receive_DMA build/stm32f0xx_hal_i2c.o +HAL_I2C_Master_Receive_IT build/stm32f0xx_hal_i2c.o +HAL_I2C_Master_Seq_Receive_DMA build/stm32f0xx_hal_i2c.o +HAL_I2C_Master_Seq_Receive_IT build/stm32f0xx_hal_i2c.o +HAL_I2C_Master_Seq_Transmit_DMA build/stm32f0xx_hal_i2c.o +HAL_I2C_Master_Seq_Transmit_IT build/stm32f0xx_hal_i2c.o +HAL_I2C_Master_Transmit build/stm32f0xx_hal_i2c.o +HAL_I2C_Master_Transmit_DMA build/stm32f0xx_hal_i2c.o +HAL_I2C_Master_Transmit_IT build/stm32f0xx_hal_i2c.o +HAL_I2C_MemRxCpltCallback build/stm32f0xx_hal_i2c.o +HAL_I2C_MemTxCpltCallback build/stm32f0xx_hal_i2c.o +HAL_I2C_Mem_Read build/stm32f0xx_hal_i2c.o +HAL_I2C_Mem_Read_DMA build/stm32f0xx_hal_i2c.o +HAL_I2C_Mem_Read_IT build/stm32f0xx_hal_i2c.o +HAL_I2C_Mem_Write build/stm32f0xx_hal_i2c.o +HAL_I2C_Mem_Write_DMA build/stm32f0xx_hal_i2c.o +HAL_I2C_Mem_Write_IT build/stm32f0xx_hal_i2c.o +HAL_I2C_MspDeInit build/stm32f0xx_hal_i2c.o +HAL_I2C_MspInit build/stm32f0xx_hal_i2c.o +HAL_I2C_SlaveRxCpltCallback build/stm32f0xx_hal_i2c.o +HAL_I2C_SlaveTxCpltCallback build/stm32f0xx_hal_i2c.o +HAL_I2C_Slave_Receive build/stm32f0xx_hal_i2c.o +HAL_I2C_Slave_Receive_DMA build/stm32f0xx_hal_i2c.o +HAL_I2C_Slave_Receive_IT build/stm32f0xx_hal_i2c.o +HAL_I2C_Slave_Seq_Receive_DMA build/stm32f0xx_hal_i2c.o +HAL_I2C_Slave_Seq_Receive_IT build/stm32f0xx_hal_i2c.o +HAL_I2C_Slave_Seq_Transmit_DMA build/stm32f0xx_hal_i2c.o +HAL_I2C_Slave_Seq_Transmit_IT build/stm32f0xx_hal_i2c.o +HAL_I2C_Slave_Transmit build/stm32f0xx_hal_i2c.o +HAL_I2C_Slave_Transmit_DMA build/stm32f0xx_hal_i2c.o +HAL_I2C_Slave_Transmit_IT build/stm32f0xx_hal_i2c.o +HAL_IncTick build/stm32f0xx_hal.o + build/stm32f0xx_it.o +HAL_Init build/stm32f0xx_hal.o + build/main.o +HAL_InitTick build/stm32f0xx_hal.o + build/stm32f0xx_hal_rcc.o +HAL_MspDeInit build/stm32f0xx_hal.o +HAL_MspInit build/stm32f0xx_hal_msp.o +HAL_NVIC_ClearPendingIRQ build/stm32f0xx_hal_cortex.o +HAL_NVIC_DisableIRQ build/stm32f0xx_hal_cortex.o +HAL_NVIC_EnableIRQ build/stm32f0xx_hal_cortex.o +HAL_NVIC_GetPendingIRQ build/stm32f0xx_hal_cortex.o +HAL_NVIC_GetPriority build/stm32f0xx_hal_cortex.o +HAL_NVIC_SetPendingIRQ build/stm32f0xx_hal_cortex.o +HAL_NVIC_SetPriority build/stm32f0xx_hal_cortex.o + build/stm32f0xx_hal.o +HAL_NVIC_SystemReset build/stm32f0xx_hal_cortex.o +HAL_PWREx_DisableVddio2Monitor build/stm32f0xx_hal_pwr_ex.o +HAL_PWREx_EnableVddio2Monitor build/stm32f0xx_hal_pwr_ex.o +HAL_PWREx_Vddio2MonitorCallback build/stm32f0xx_hal_pwr_ex.o +HAL_PWREx_Vddio2Monitor_IRQHandler build/stm32f0xx_hal_pwr_ex.o +HAL_PWR_ConfigPVD build/stm32f0xx_hal_pwr_ex.o +HAL_PWR_DeInit build/stm32f0xx_hal_pwr.o +HAL_PWR_DisableBkUpAccess build/stm32f0xx_hal_pwr.o +HAL_PWR_DisablePVD build/stm32f0xx_hal_pwr_ex.o +HAL_PWR_DisableSEVOnPend build/stm32f0xx_hal_pwr.o +HAL_PWR_DisableSleepOnExit build/stm32f0xx_hal_pwr.o +HAL_PWR_DisableWakeUpPin build/stm32f0xx_hal_pwr.o +HAL_PWR_EnableBkUpAccess build/stm32f0xx_hal_pwr.o +HAL_PWR_EnablePVD build/stm32f0xx_hal_pwr_ex.o +HAL_PWR_EnableSEVOnPend build/stm32f0xx_hal_pwr.o +HAL_PWR_EnableSleepOnExit build/stm32f0xx_hal_pwr.o +HAL_PWR_EnableWakeUpPin build/stm32f0xx_hal_pwr.o +HAL_PWR_EnterSLEEPMode build/stm32f0xx_hal_pwr.o +HAL_PWR_EnterSTANDBYMode build/stm32f0xx_hal_pwr.o +HAL_PWR_EnterSTOPMode build/stm32f0xx_hal_pwr.o +HAL_PWR_PVDCallback build/stm32f0xx_hal_pwr_ex.o +HAL_PWR_PVD_IRQHandler build/stm32f0xx_hal_pwr_ex.o +HAL_RCCEx_CRSConfig build/stm32f0xx_hal_rcc_ex.o +HAL_RCCEx_CRSGetSynchronizationInfo build/stm32f0xx_hal_rcc_ex.o +HAL_RCCEx_CRSSoftwareSynchronizationGenerate build/stm32f0xx_hal_rcc_ex.o +HAL_RCCEx_CRSWaitSynchronization build/stm32f0xx_hal_rcc_ex.o +HAL_RCCEx_CRS_ErrorCallback build/stm32f0xx_hal_rcc_ex.o +HAL_RCCEx_CRS_ExpectedSyncCallback build/stm32f0xx_hal_rcc_ex.o +HAL_RCCEx_CRS_IRQHandler build/stm32f0xx_hal_rcc_ex.o +HAL_RCCEx_CRS_SyncOkCallback build/stm32f0xx_hal_rcc_ex.o +HAL_RCCEx_CRS_SyncWarnCallback build/stm32f0xx_hal_rcc_ex.o +HAL_RCCEx_GetPeriphCLKConfig build/stm32f0xx_hal_rcc_ex.o +HAL_RCCEx_GetPeriphCLKFreq build/stm32f0xx_hal_rcc_ex.o +HAL_RCCEx_PeriphCLKConfig build/stm32f0xx_hal_rcc_ex.o +HAL_RCC_CSSCallback build/stm32f0xx_hal_rcc.o +HAL_RCC_ClockConfig build/stm32f0xx_hal_rcc.o + build/main.o +HAL_RCC_DeInit build/stm32f0xx_hal_rcc.o +HAL_RCC_DisableCSS build/stm32f0xx_hal_rcc.o +HAL_RCC_EnableCSS build/stm32f0xx_hal_rcc.o +HAL_RCC_GetClockConfig build/stm32f0xx_hal_rcc.o +HAL_RCC_GetHCLKFreq build/stm32f0xx_hal_rcc.o +HAL_RCC_GetOscConfig build/stm32f0xx_hal_rcc.o +HAL_RCC_GetPCLK1Freq build/stm32f0xx_hal_rcc.o + build/stm32f0xx_hal_rcc_ex.o +HAL_RCC_GetSysClockFreq build/stm32f0xx_hal_rcc.o + build/stm32f0xx_hal_rcc_ex.o +HAL_RCC_MCOConfig build/stm32f0xx_hal_rcc.o +HAL_RCC_NMI_IRQHandler build/stm32f0xx_hal_rcc.o +HAL_RCC_OscConfig build/stm32f0xx_hal_rcc.o + build/main.o +HAL_ResumeTick build/stm32f0xx_hal.o +HAL_SYSTICK_CLKSourceConfig build/stm32f0xx_hal_cortex.o +HAL_SYSTICK_Callback build/stm32f0xx_hal_cortex.o +HAL_SYSTICK_Config build/stm32f0xx_hal_cortex.o + build/stm32f0xx_hal.o +HAL_SYSTICK_IRQHandler build/stm32f0xx_hal_cortex.o +HAL_SetTickFreq build/stm32f0xx_hal.o +HAL_SuspendTick build/stm32f0xx_hal.o +HAL_TIMEx_BreakCallback build/stm32f0xx_hal_tim_ex.o + build/stm32f0xx_hal_tim.o +HAL_TIMEx_CommutCallback build/stm32f0xx_hal_tim_ex.o + build/stm32f0xx_hal_tim.o +HAL_TIMEx_CommutHalfCpltCallback build/stm32f0xx_hal_tim_ex.o +HAL_TIMEx_ConfigBreakDeadTime build/stm32f0xx_hal_tim_ex.o +HAL_TIMEx_ConfigCommutEvent build/stm32f0xx_hal_tim_ex.o +HAL_TIMEx_ConfigCommutEvent_DMA build/stm32f0xx_hal_tim_ex.o +HAL_TIMEx_ConfigCommutEvent_IT build/stm32f0xx_hal_tim_ex.o +HAL_TIMEx_GetChannelNState build/stm32f0xx_hal_tim_ex.o +HAL_TIMEx_HallSensor_DeInit build/stm32f0xx_hal_tim_ex.o +HAL_TIMEx_HallSensor_GetState build/stm32f0xx_hal_tim_ex.o +HAL_TIMEx_HallSensor_Init build/stm32f0xx_hal_tim_ex.o +HAL_TIMEx_HallSensor_MspDeInit build/stm32f0xx_hal_tim_ex.o +HAL_TIMEx_HallSensor_MspInit build/stm32f0xx_hal_tim_ex.o +HAL_TIMEx_HallSensor_Start build/stm32f0xx_hal_tim_ex.o +HAL_TIMEx_HallSensor_Start_DMA build/stm32f0xx_hal_tim_ex.o +HAL_TIMEx_HallSensor_Start_IT build/stm32f0xx_hal_tim_ex.o +HAL_TIMEx_HallSensor_Stop build/stm32f0xx_hal_tim_ex.o +HAL_TIMEx_HallSensor_Stop_DMA build/stm32f0xx_hal_tim_ex.o +HAL_TIMEx_HallSensor_Stop_IT build/stm32f0xx_hal_tim_ex.o +HAL_TIMEx_MasterConfigSynchronization build/stm32f0xx_hal_tim_ex.o + build/main.o +HAL_TIMEx_OCN_Start build/stm32f0xx_hal_tim_ex.o +HAL_TIMEx_OCN_Start_DMA build/stm32f0xx_hal_tim_ex.o +HAL_TIMEx_OCN_Start_IT build/stm32f0xx_hal_tim_ex.o +HAL_TIMEx_OCN_Stop build/stm32f0xx_hal_tim_ex.o +HAL_TIMEx_OCN_Stop_DMA build/stm32f0xx_hal_tim_ex.o +HAL_TIMEx_OCN_Stop_IT build/stm32f0xx_hal_tim_ex.o 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/home/chiangni/.config/VSCodium/User/globalStorage/bmd.stm32-for-vscode/@xpack-dev-tools/arm-none-eabi-gcc/13.2.1-1.1.1/.content/bin/../lib/gcc/arm-none-eabi/13.2.1/../../../../arm-none-eabi/lib/thumb/v6-m/nofp/libc_nano.a(libc_a-writer.o) + /home/chiangni/.config/VSCodium/User/globalStorage/bmd.stm32-for-vscode/@xpack-dev-tools/arm-none-eabi-gcc/13.2.1-1.1.1/.content/bin/../lib/gcc/arm-none-eabi/13.2.1/../../../../arm-none-eabi/lib/thumb/v6-m/nofp/libc_nano.a(libc_a-readr.o) + /home/chiangni/.config/VSCodium/User/globalStorage/bmd.stm32-for-vscode/@xpack-dev-tools/arm-none-eabi-gcc/13.2.1-1.1.1/.content/bin/../lib/gcc/arm-none-eabi/13.2.1/../../../../arm-none-eabi/lib/thumb/v6-m/nofp/libc_nano.a(libc_a-lseekr.o) + /home/chiangni/.config/VSCodium/User/globalStorage/bmd.stm32-for-vscode/@xpack-dev-tools/arm-none-eabi-gcc/13.2.1-1.1.1/.content/bin/../lib/gcc/arm-none-eabi/13.2.1/../../../../arm-none-eabi/lib/thumb/v6-m/nofp/libc_nano.a(libc_a-closer.o) +exit /home/chiangni/.config/VSCodium/User/globalStorage/bmd.stm32-for-vscode/@xpack-dev-tools/arm-none-eabi-gcc/13.2.1-1.1.1/.content/bin/../lib/gcc/arm-none-eabi/13.2.1/../../../../arm-none-eabi/lib/thumb/v6-m/nofp/libc_nano.a(libc_a-exit.o) + /home/chiangni/.config/VSCodium/User/globalStorage/bmd.stm32-for-vscode/@xpack-dev-tools/arm-none-eabi-gcc/13.2.1-1.1.1/.content/bin/../lib/gcc/arm-none-eabi/13.2.1/../../../../arm-none-eabi/lib/thumb/v6-m/nofp/crt0.o +fflush /home/chiangni/.config/VSCodium/User/globalStorage/bmd.stm32-for-vscode/@xpack-dev-tools/arm-none-eabi-gcc/13.2.1-1.1.1/.content/bin/../lib/gcc/arm-none-eabi/13.2.1/../../../../arm-none-eabi/lib/thumb/v6-m/nofp/libc_nano.a(libc_a-fflush.o) +g_pfnVectors build/startup_stm32f042x6.o +hadc build/main.o +hardware_init_hook /home/chiangni/.config/VSCodium/User/globalStorage/bmd.stm32-for-vscode/@xpack-dev-tools/arm-none-eabi-gcc/13.2.1-1.1.1/.content/bin/../lib/gcc/arm-none-eabi/13.2.1/../../../../arm-none-eabi/lib/thumb/v6-m/nofp/crt0.o +hcan build/main.o +htim2 build/main.o +main build/main.o + build/startup_stm32f042x6.o + /home/chiangni/.config/VSCodium/User/globalStorage/bmd.stm32-for-vscode/@xpack-dev-tools/arm-none-eabi-gcc/13.2.1-1.1.1/.content/bin/../lib/gcc/arm-none-eabi/13.2.1/../../../../arm-none-eabi/lib/thumb/v6-m/nofp/crt0.o +malloc /home/chiangni/.config/VSCodium/User/globalStorage/bmd.stm32-for-vscode/@xpack-dev-tools/arm-none-eabi-gcc/13.2.1-1.1.1/.content/bin/../lib/gcc/arm-none-eabi/13.2.1/../../../../arm-none-eabi/lib/thumb/v6-m/nofp/libc_nano.a(libc_a-__atexit.o) +memset /home/chiangni/.config/VSCodium/User/globalStorage/bmd.stm32-for-vscode/@xpack-dev-tools/arm-none-eabi-gcc/13.2.1-1.1.1/.content/bin/../lib/gcc/arm-none-eabi/13.2.1/../../../../arm-none-eabi/lib/thumb/v6-m/nofp/libc_nano.a(libc_a-memset.o) + /home/chiangni/.config/VSCodium/User/globalStorage/bmd.stm32-for-vscode/@xpack-dev-tools/arm-none-eabi-gcc/13.2.1-1.1.1/.content/bin/../lib/gcc/arm-none-eabi/13.2.1/../../../../arm-none-eabi/lib/thumb/v6-m/nofp/libc_nano.a(libc_a-findfp.o) + build/stm32f0xx_hal_msp.o + build/main.o + /home/chiangni/.config/VSCodium/User/globalStorage/bmd.stm32-for-vscode/@xpack-dev-tools/arm-none-eabi-gcc/13.2.1-1.1.1/.content/bin/../lib/gcc/arm-none-eabi/13.2.1/../../../../arm-none-eabi/lib/thumb/v6-m/nofp/crt0.o +pFlash build/stm32f0xx_hal_flash.o + build/stm32f0xx_hal_flash_ex.o +software_init_hook /home/chiangni/.config/VSCodium/User/globalStorage/bmd.stm32-for-vscode/@xpack-dev-tools/arm-none-eabi-gcc/13.2.1-1.1.1/.content/bin/../lib/gcc/arm-none-eabi/13.2.1/../../../../arm-none-eabi/lib/thumb/v6-m/nofp/crt0.o +uwTick build/stm32f0xx_hal.o +uwTickFreq build/stm32f0xx_hal.o +uwTickPrio build/stm32f0xx_hal.o + build/stm32f0xx_hal_rcc.o diff --git a/Software/build/main.d b/Software/build/main.d new file mode 100644 index 0000000..e7f60e5 --- /dev/null +++ b/Software/build/main.d @@ -0,0 +1,60 @@ +build/main.o: Core/Src/main.c Core/Inc/main.h \ + Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal.h \ + Core/Inc/stm32f0xx_hal_conf.h \ + Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_rcc.h \ + Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_def.h \ + Drivers/CMSIS/Device/ST/STM32F0xx/Include/stm32f0xx.h \ + Drivers/CMSIS/Device/ST/STM32F0xx/Include/stm32f042x6.h \ + Drivers/CMSIS/Include/core_cm0.h Drivers/CMSIS/Include/cmsis_version.h \ + Drivers/CMSIS/Include/cmsis_compiler.h Drivers/CMSIS/Include/cmsis_gcc.h \ + Drivers/CMSIS/Device/ST/STM32F0xx/Include/system_stm32f0xx.h \ + Drivers/STM32F0xx_HAL_Driver/Inc/Legacy/stm32_hal_legacy.h \ + Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_rcc_ex.h \ + Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_gpio.h \ + Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_gpio_ex.h \ + Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_exti.h \ + Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_dma.h \ + Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_dma_ex.h \ + Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_cortex.h \ + Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_adc.h \ + Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_adc_ex.h \ + Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_can.h \ + Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_flash.h \ + Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_flash_ex.h \ + Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_i2c.h \ + Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_i2c_ex.h \ + Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_pwr.h \ + Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_pwr_ex.h \ + Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_tim.h \ + Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_tim_ex.h +Core/Inc/main.h: +Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal.h: +Core/Inc/stm32f0xx_hal_conf.h: +Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_rcc.h: +Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_def.h: +Drivers/CMSIS/Device/ST/STM32F0xx/Include/stm32f0xx.h: +Drivers/CMSIS/Device/ST/STM32F0xx/Include/stm32f042x6.h: +Drivers/CMSIS/Include/core_cm0.h: +Drivers/CMSIS/Include/cmsis_version.h: +Drivers/CMSIS/Include/cmsis_compiler.h: +Drivers/CMSIS/Include/cmsis_gcc.h: +Drivers/CMSIS/Device/ST/STM32F0xx/Include/system_stm32f0xx.h: +Drivers/STM32F0xx_HAL_Driver/Inc/Legacy/stm32_hal_legacy.h: +Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_rcc_ex.h: +Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_gpio.h: +Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_gpio_ex.h: +Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_exti.h: +Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_dma.h: +Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_dma_ex.h: +Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_cortex.h: +Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_adc.h: +Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_adc_ex.h: +Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_can.h: +Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_flash.h: +Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_flash_ex.h: +Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_i2c.h: +Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_i2c_ex.h: +Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_pwr.h: +Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_pwr_ex.h: +Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_tim.h: +Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_tim_ex.h: diff --git a/Software/build/main.lst b/Software/build/main.lst new file mode 100644 index 0000000..7c67dd9 --- /dev/null +++ b/Software/build/main.lst @@ -0,0 +1,1519 @@ +ARM GAS /tmp/ccOqAezw.s page 1 + + + 1 .cpu cortex-m0 + 2 .arch armv6s-m + 3 .fpu softvfp + 4 .eabi_attribute 20, 1 + 5 .eabi_attribute 21, 1 + 6 .eabi_attribute 23, 3 + 7 .eabi_attribute 24, 1 + 8 .eabi_attribute 25, 1 + 9 .eabi_attribute 26, 1 + 10 .eabi_attribute 30, 1 + 11 .eabi_attribute 34, 0 + 12 .eabi_attribute 18, 4 + 13 .file "main.c" + 14 .text + 15 .Ltext0: + 16 .cfi_sections .debug_frame + 17 .file 1 "Core/Src/main.c" + 18 .section .text.MX_GPIO_Init,"ax",%progbits + 19 .align 1 + 20 .syntax unified + 21 .code 16 + 22 .thumb_func + 24 MX_GPIO_Init: + 25 .LFB45: + 1:Core/Src/main.c **** /* USER CODE BEGIN Header */ + 2:Core/Src/main.c **** /** + 3:Core/Src/main.c **** ****************************************************************************** + 4:Core/Src/main.c **** * @file : main.c + 5:Core/Src/main.c **** * @brief : Main program body + 6:Core/Src/main.c **** ****************************************************************************** + 7:Core/Src/main.c **** * @attention + 8:Core/Src/main.c **** * + 9:Core/Src/main.c **** * Copyright (c) 2024 STMicroelectronics. + 10:Core/Src/main.c **** * All rights reserved. + 11:Core/Src/main.c **** * + 12:Core/Src/main.c **** * This software is licensed under terms that can be found in the LICENSE file + 13:Core/Src/main.c **** * in the root directory of this software component. + 14:Core/Src/main.c **** * If no LICENSE file comes with this software, it is provided AS-IS. + 15:Core/Src/main.c **** * + 16:Core/Src/main.c **** ****************************************************************************** + 17:Core/Src/main.c **** */ + 18:Core/Src/main.c **** /* USER CODE END Header */ + 19:Core/Src/main.c **** /* Includes ------------------------------------------------------------------*/ + 20:Core/Src/main.c **** #include "main.h" + 21:Core/Src/main.c **** + 22:Core/Src/main.c **** /* Private includes ----------------------------------------------------------*/ + 23:Core/Src/main.c **** /* USER CODE BEGIN Includes */ + 24:Core/Src/main.c **** + 25:Core/Src/main.c **** /* USER CODE END Includes */ + 26:Core/Src/main.c **** + 27:Core/Src/main.c **** /* Private typedef -----------------------------------------------------------*/ + 28:Core/Src/main.c **** /* USER CODE BEGIN PTD */ + 29:Core/Src/main.c **** + 30:Core/Src/main.c **** /* USER CODE END PTD */ + 31:Core/Src/main.c **** + 32:Core/Src/main.c **** /* Private define ------------------------------------------------------------*/ + 33:Core/Src/main.c **** /* USER CODE BEGIN PD */ + ARM GAS /tmp/ccOqAezw.s page 2 + + + 34:Core/Src/main.c **** + 35:Core/Src/main.c **** /* USER CODE END PD */ + 36:Core/Src/main.c **** + 37:Core/Src/main.c **** /* Private macro -------------------------------------------------------------*/ + 38:Core/Src/main.c **** /* USER CODE BEGIN PM */ + 39:Core/Src/main.c **** + 40:Core/Src/main.c **** /* USER CODE END PM */ + 41:Core/Src/main.c **** + 42:Core/Src/main.c **** /* Private variables ---------------------------------------------------------*/ + 43:Core/Src/main.c **** ADC_HandleTypeDef hadc; + 44:Core/Src/main.c **** + 45:Core/Src/main.c **** CAN_HandleTypeDef hcan; + 46:Core/Src/main.c **** + 47:Core/Src/main.c **** TIM_HandleTypeDef htim2; + 48:Core/Src/main.c **** + 49:Core/Src/main.c **** /* USER CODE BEGIN PV */ + 50:Core/Src/main.c **** + 51:Core/Src/main.c **** /* USER CODE END PV */ + 52:Core/Src/main.c **** + 53:Core/Src/main.c **** /* Private function prototypes -----------------------------------------------*/ + 54:Core/Src/main.c **** void SystemClock_Config(void); + 55:Core/Src/main.c **** static void MX_GPIO_Init(void); + 56:Core/Src/main.c **** static void MX_ADC_Init(void); + 57:Core/Src/main.c **** static void MX_CAN_Init(void); + 58:Core/Src/main.c **** static void MX_TIM2_Init(void); + 59:Core/Src/main.c **** /* USER CODE BEGIN PFP */ + 60:Core/Src/main.c **** + 61:Core/Src/main.c **** /* USER CODE END PFP */ + 62:Core/Src/main.c **** + 63:Core/Src/main.c **** /* Private user code ---------------------------------------------------------*/ + 64:Core/Src/main.c **** /* USER CODE BEGIN 0 */ + 65:Core/Src/main.c **** + 66:Core/Src/main.c **** /* USER CODE END 0 */ + 67:Core/Src/main.c **** + 68:Core/Src/main.c **** /** + 69:Core/Src/main.c **** * @brief The application entry point. + 70:Core/Src/main.c **** * @retval int + 71:Core/Src/main.c **** */ + 72:Core/Src/main.c **** int main(void) + 73:Core/Src/main.c **** { + 74:Core/Src/main.c **** /* USER CODE BEGIN 1 */ + 75:Core/Src/main.c **** + 76:Core/Src/main.c **** /* USER CODE END 1 */ + 77:Core/Src/main.c **** + 78:Core/Src/main.c **** /* MCU Configuration--------------------------------------------------------*/ + 79:Core/Src/main.c **** + 80:Core/Src/main.c **** /* Reset of all peripherals, Initializes the Flash interface and the Systick. */ + 81:Core/Src/main.c **** HAL_Init(); + 82:Core/Src/main.c **** + 83:Core/Src/main.c **** /* USER CODE BEGIN Init */ + 84:Core/Src/main.c **** + 85:Core/Src/main.c **** /* USER CODE END Init */ + 86:Core/Src/main.c **** + 87:Core/Src/main.c **** /* Configure the system clock */ + 88:Core/Src/main.c **** SystemClock_Config(); + 89:Core/Src/main.c **** + 90:Core/Src/main.c **** /* USER CODE BEGIN SysInit */ + ARM GAS /tmp/ccOqAezw.s page 3 + + + 91:Core/Src/main.c **** + 92:Core/Src/main.c **** /* USER CODE END SysInit */ + 93:Core/Src/main.c **** + 94:Core/Src/main.c **** /* Initialize all configured peripherals */ + 95:Core/Src/main.c **** MX_GPIO_Init(); + 96:Core/Src/main.c **** MX_ADC_Init(); + 97:Core/Src/main.c **** MX_CAN_Init(); + 98:Core/Src/main.c **** MX_TIM2_Init(); + 99:Core/Src/main.c **** /* USER CODE BEGIN 2 */ + 100:Core/Src/main.c **** + 101:Core/Src/main.c **** /* USER CODE END 2 */ + 102:Core/Src/main.c **** + 103:Core/Src/main.c **** /* Infinite loop */ + 104:Core/Src/main.c **** /* USER CODE BEGIN WHILE */ + 105:Core/Src/main.c **** while (1) + 106:Core/Src/main.c **** { + 107:Core/Src/main.c **** /* USER CODE END WHILE */ + 108:Core/Src/main.c **** + 109:Core/Src/main.c **** /* USER CODE BEGIN 3 */ + 110:Core/Src/main.c **** } + 111:Core/Src/main.c **** /* USER CODE END 3 */ + 112:Core/Src/main.c **** } + 113:Core/Src/main.c **** + 114:Core/Src/main.c **** /** + 115:Core/Src/main.c **** * @brief System Clock Configuration + 116:Core/Src/main.c **** * @retval None + 117:Core/Src/main.c **** */ + 118:Core/Src/main.c **** void SystemClock_Config(void) + 119:Core/Src/main.c **** { + 120:Core/Src/main.c **** RCC_OscInitTypeDef RCC_OscInitStruct = {0}; + 121:Core/Src/main.c **** RCC_ClkInitTypeDef RCC_ClkInitStruct = {0}; + 122:Core/Src/main.c **** + 123:Core/Src/main.c **** /** Initializes the RCC Oscillators according to the specified parameters + 124:Core/Src/main.c **** * in the RCC_OscInitTypeDef structure. + 125:Core/Src/main.c **** */ + 126:Core/Src/main.c **** RCC_OscInitStruct.OscillatorType = RCC_OSCILLATORTYPE_HSI|RCC_OSCILLATORTYPE_HSI14; + 127:Core/Src/main.c **** RCC_OscInitStruct.HSIState = RCC_HSI_ON; + 128:Core/Src/main.c **** RCC_OscInitStruct.HSI14State = RCC_HSI14_ON; + 129:Core/Src/main.c **** RCC_OscInitStruct.HSICalibrationValue = RCC_HSICALIBRATION_DEFAULT; + 130:Core/Src/main.c **** RCC_OscInitStruct.HSI14CalibrationValue = 16; + 131:Core/Src/main.c **** RCC_OscInitStruct.PLL.PLLState = RCC_PLL_NONE; + 132:Core/Src/main.c **** if (HAL_RCC_OscConfig(&RCC_OscInitStruct) != HAL_OK) + 133:Core/Src/main.c **** { + 134:Core/Src/main.c **** Error_Handler(); + 135:Core/Src/main.c **** } + 136:Core/Src/main.c **** + 137:Core/Src/main.c **** /** Initializes the CPU, AHB and APB buses clocks + 138:Core/Src/main.c **** */ + 139:Core/Src/main.c **** RCC_ClkInitStruct.ClockType = RCC_CLOCKTYPE_HCLK|RCC_CLOCKTYPE_SYSCLK + 140:Core/Src/main.c **** |RCC_CLOCKTYPE_PCLK1; + 141:Core/Src/main.c **** RCC_ClkInitStruct.SYSCLKSource = RCC_SYSCLKSOURCE_HSI; + 142:Core/Src/main.c **** RCC_ClkInitStruct.AHBCLKDivider = RCC_SYSCLK_DIV1; + 143:Core/Src/main.c **** RCC_ClkInitStruct.APB1CLKDivider = RCC_HCLK_DIV1; + 144:Core/Src/main.c **** + 145:Core/Src/main.c **** if (HAL_RCC_ClockConfig(&RCC_ClkInitStruct, FLASH_LATENCY_0) != HAL_OK) + 146:Core/Src/main.c **** { + 147:Core/Src/main.c **** Error_Handler(); + ARM GAS /tmp/ccOqAezw.s page 4 + + + 148:Core/Src/main.c **** } + 149:Core/Src/main.c **** } + 150:Core/Src/main.c **** + 151:Core/Src/main.c **** /** + 152:Core/Src/main.c **** * @brief ADC Initialization Function + 153:Core/Src/main.c **** * @param None + 154:Core/Src/main.c **** * @retval None + 155:Core/Src/main.c **** */ + 156:Core/Src/main.c **** static void MX_ADC_Init(void) + 157:Core/Src/main.c **** { + 158:Core/Src/main.c **** + 159:Core/Src/main.c **** /* USER CODE BEGIN ADC_Init 0 */ + 160:Core/Src/main.c **** + 161:Core/Src/main.c **** /* USER CODE END ADC_Init 0 */ + 162:Core/Src/main.c **** + 163:Core/Src/main.c **** ADC_ChannelConfTypeDef sConfig = {0}; + 164:Core/Src/main.c **** + 165:Core/Src/main.c **** /* USER CODE BEGIN ADC_Init 1 */ + 166:Core/Src/main.c **** + 167:Core/Src/main.c **** /* USER CODE END ADC_Init 1 */ + 168:Core/Src/main.c **** + 169:Core/Src/main.c **** /** Configure the global features of the ADC (Clock, Resolution, Data Alignment and number of con + 170:Core/Src/main.c **** */ + 171:Core/Src/main.c **** hadc.Instance = ADC1; + 172:Core/Src/main.c **** hadc.Init.ClockPrescaler = ADC_CLOCK_ASYNC_DIV1; + 173:Core/Src/main.c **** hadc.Init.Resolution = ADC_RESOLUTION_12B; + 174:Core/Src/main.c **** hadc.Init.DataAlign = ADC_DATAALIGN_RIGHT; + 175:Core/Src/main.c **** hadc.Init.ScanConvMode = ADC_SCAN_DIRECTION_FORWARD; + 176:Core/Src/main.c **** hadc.Init.EOCSelection = ADC_EOC_SINGLE_CONV; + 177:Core/Src/main.c **** hadc.Init.LowPowerAutoWait = DISABLE; + 178:Core/Src/main.c **** hadc.Init.LowPowerAutoPowerOff = DISABLE; + 179:Core/Src/main.c **** hadc.Init.ContinuousConvMode = DISABLE; + 180:Core/Src/main.c **** hadc.Init.DiscontinuousConvMode = DISABLE; + 181:Core/Src/main.c **** hadc.Init.ExternalTrigConv = ADC_SOFTWARE_START; + 182:Core/Src/main.c **** hadc.Init.ExternalTrigConvEdge = ADC_EXTERNALTRIGCONVEDGE_NONE; + 183:Core/Src/main.c **** hadc.Init.DMAContinuousRequests = DISABLE; + 184:Core/Src/main.c **** hadc.Init.Overrun = ADC_OVR_DATA_PRESERVED; + 185:Core/Src/main.c **** if (HAL_ADC_Init(&hadc) != HAL_OK) + 186:Core/Src/main.c **** { + 187:Core/Src/main.c **** Error_Handler(); + 188:Core/Src/main.c **** } + 189:Core/Src/main.c **** + 190:Core/Src/main.c **** /** Configure for the selected ADC regular channel to be converted. + 191:Core/Src/main.c **** */ + 192:Core/Src/main.c **** sConfig.Channel = ADC_CHANNEL_0; + 193:Core/Src/main.c **** sConfig.Rank = ADC_RANK_CHANNEL_NUMBER; + 194:Core/Src/main.c **** sConfig.SamplingTime = ADC_SAMPLETIME_1CYCLE_5; + 195:Core/Src/main.c **** if (HAL_ADC_ConfigChannel(&hadc, &sConfig) != HAL_OK) + 196:Core/Src/main.c **** { + 197:Core/Src/main.c **** Error_Handler(); + 198:Core/Src/main.c **** } + 199:Core/Src/main.c **** + 200:Core/Src/main.c **** /** Configure for the selected ADC regular channel to be converted. + 201:Core/Src/main.c **** */ + 202:Core/Src/main.c **** sConfig.Channel = ADC_CHANNEL_1; + 203:Core/Src/main.c **** if (HAL_ADC_ConfigChannel(&hadc, &sConfig) != HAL_OK) + 204:Core/Src/main.c **** { + ARM GAS /tmp/ccOqAezw.s page 5 + + + 205:Core/Src/main.c **** Error_Handler(); + 206:Core/Src/main.c **** } + 207:Core/Src/main.c **** /* USER CODE BEGIN ADC_Init 2 */ + 208:Core/Src/main.c **** + 209:Core/Src/main.c **** /* USER CODE END ADC_Init 2 */ + 210:Core/Src/main.c **** + 211:Core/Src/main.c **** } + 212:Core/Src/main.c **** + 213:Core/Src/main.c **** /** + 214:Core/Src/main.c **** * @brief CAN Initialization Function + 215:Core/Src/main.c **** * @param None + 216:Core/Src/main.c **** * @retval None + 217:Core/Src/main.c **** */ + 218:Core/Src/main.c **** static void MX_CAN_Init(void) + 219:Core/Src/main.c **** { + 220:Core/Src/main.c **** + 221:Core/Src/main.c **** /* USER CODE BEGIN CAN_Init 0 */ + 222:Core/Src/main.c **** + 223:Core/Src/main.c **** /* USER CODE END CAN_Init 0 */ + 224:Core/Src/main.c **** + 225:Core/Src/main.c **** /* USER CODE BEGIN CAN_Init 1 */ + 226:Core/Src/main.c **** + 227:Core/Src/main.c **** /* USER CODE END CAN_Init 1 */ + 228:Core/Src/main.c **** hcan.Instance = CAN; + 229:Core/Src/main.c **** hcan.Init.Prescaler = 16; + 230:Core/Src/main.c **** hcan.Init.Mode = CAN_MODE_NORMAL; + 231:Core/Src/main.c **** hcan.Init.SyncJumpWidth = CAN_SJW_1TQ; + 232:Core/Src/main.c **** hcan.Init.TimeSeg1 = CAN_BS1_1TQ; + 233:Core/Src/main.c **** hcan.Init.TimeSeg2 = CAN_BS2_1TQ; + 234:Core/Src/main.c **** hcan.Init.TimeTriggeredMode = DISABLE; + 235:Core/Src/main.c **** hcan.Init.AutoBusOff = DISABLE; + 236:Core/Src/main.c **** hcan.Init.AutoWakeUp = DISABLE; + 237:Core/Src/main.c **** hcan.Init.AutoRetransmission = DISABLE; + 238:Core/Src/main.c **** hcan.Init.ReceiveFifoLocked = DISABLE; + 239:Core/Src/main.c **** hcan.Init.TransmitFifoPriority = DISABLE; + 240:Core/Src/main.c **** if (HAL_CAN_Init(&hcan) != HAL_OK) + 241:Core/Src/main.c **** { + 242:Core/Src/main.c **** Error_Handler(); + 243:Core/Src/main.c **** } + 244:Core/Src/main.c **** /* USER CODE BEGIN CAN_Init 2 */ + 245:Core/Src/main.c **** + 246:Core/Src/main.c **** /* USER CODE END CAN_Init 2 */ + 247:Core/Src/main.c **** + 248:Core/Src/main.c **** } + 249:Core/Src/main.c **** + 250:Core/Src/main.c **** /** + 251:Core/Src/main.c **** * @brief TIM2 Initialization Function + 252:Core/Src/main.c **** * @param None + 253:Core/Src/main.c **** * @retval None + 254:Core/Src/main.c **** */ + 255:Core/Src/main.c **** static void MX_TIM2_Init(void) + 256:Core/Src/main.c **** { + 257:Core/Src/main.c **** + 258:Core/Src/main.c **** /* USER CODE BEGIN TIM2_Init 0 */ + 259:Core/Src/main.c **** + 260:Core/Src/main.c **** /* USER CODE END TIM2_Init 0 */ + 261:Core/Src/main.c **** + ARM GAS /tmp/ccOqAezw.s page 6 + + + 262:Core/Src/main.c **** TIM_ClockConfigTypeDef sClockSourceConfig = {0}; + 263:Core/Src/main.c **** TIM_MasterConfigTypeDef sMasterConfig = {0}; + 264:Core/Src/main.c **** TIM_OC_InitTypeDef sConfigOC = {0}; + 265:Core/Src/main.c **** + 266:Core/Src/main.c **** /* USER CODE BEGIN TIM2_Init 1 */ + 267:Core/Src/main.c **** + 268:Core/Src/main.c **** /* USER CODE END TIM2_Init 1 */ + 269:Core/Src/main.c **** htim2.Instance = TIM2; + 270:Core/Src/main.c **** htim2.Init.Prescaler = 0; + 271:Core/Src/main.c **** htim2.Init.CounterMode = TIM_COUNTERMODE_UP; + 272:Core/Src/main.c **** htim2.Init.Period = 4294967295; + 273:Core/Src/main.c **** htim2.Init.ClockDivision = TIM_CLOCKDIVISION_DIV1; + 274:Core/Src/main.c **** htim2.Init.AutoReloadPreload = TIM_AUTORELOAD_PRELOAD_DISABLE; + 275:Core/Src/main.c **** if (HAL_TIM_Base_Init(&htim2) != HAL_OK) + 276:Core/Src/main.c **** { + 277:Core/Src/main.c **** Error_Handler(); + 278:Core/Src/main.c **** } + 279:Core/Src/main.c **** sClockSourceConfig.ClockSource = TIM_CLOCKSOURCE_INTERNAL; + 280:Core/Src/main.c **** if (HAL_TIM_ConfigClockSource(&htim2, &sClockSourceConfig) != HAL_OK) + 281:Core/Src/main.c **** { + 282:Core/Src/main.c **** Error_Handler(); + 283:Core/Src/main.c **** } + 284:Core/Src/main.c **** if (HAL_TIM_PWM_Init(&htim2) != HAL_OK) + 285:Core/Src/main.c **** { + 286:Core/Src/main.c **** Error_Handler(); + 287:Core/Src/main.c **** } + 288:Core/Src/main.c **** sMasterConfig.MasterOutputTrigger = TIM_TRGO_RESET; + 289:Core/Src/main.c **** sMasterConfig.MasterSlaveMode = TIM_MASTERSLAVEMODE_DISABLE; + 290:Core/Src/main.c **** if (HAL_TIMEx_MasterConfigSynchronization(&htim2, &sMasterConfig) != HAL_OK) + 291:Core/Src/main.c **** { + 292:Core/Src/main.c **** Error_Handler(); + 293:Core/Src/main.c **** } + 294:Core/Src/main.c **** sConfigOC.OCMode = TIM_OCMODE_PWM1; + 295:Core/Src/main.c **** sConfigOC.Pulse = 0; + 296:Core/Src/main.c **** sConfigOC.OCPolarity = TIM_OCPOLARITY_HIGH; + 297:Core/Src/main.c **** sConfigOC.OCFastMode = TIM_OCFAST_DISABLE; + 298:Core/Src/main.c **** if (HAL_TIM_PWM_ConfigChannel(&htim2, &sConfigOC, TIM_CHANNEL_1) != HAL_OK) + 299:Core/Src/main.c **** { + 300:Core/Src/main.c **** Error_Handler(); + 301:Core/Src/main.c **** } + 302:Core/Src/main.c **** if (HAL_TIM_PWM_ConfigChannel(&htim2, &sConfigOC, TIM_CHANNEL_2) != HAL_OK) + 303:Core/Src/main.c **** { + 304:Core/Src/main.c **** Error_Handler(); + 305:Core/Src/main.c **** } + 306:Core/Src/main.c **** if (HAL_TIM_PWM_ConfigChannel(&htim2, &sConfigOC, TIM_CHANNEL_3) != HAL_OK) + 307:Core/Src/main.c **** { + 308:Core/Src/main.c **** Error_Handler(); + 309:Core/Src/main.c **** } + 310:Core/Src/main.c **** /* USER CODE BEGIN TIM2_Init 2 */ + 311:Core/Src/main.c **** + 312:Core/Src/main.c **** /* USER CODE END TIM2_Init 2 */ + 313:Core/Src/main.c **** HAL_TIM_MspPostInit(&htim2); + 314:Core/Src/main.c **** + 315:Core/Src/main.c **** } + 316:Core/Src/main.c **** + 317:Core/Src/main.c **** /** + 318:Core/Src/main.c **** * @brief GPIO Initialization Function + ARM GAS /tmp/ccOqAezw.s page 7 + + + 319:Core/Src/main.c **** * @param None + 320:Core/Src/main.c **** * @retval None + 321:Core/Src/main.c **** */ + 322:Core/Src/main.c **** static void MX_GPIO_Init(void) + 323:Core/Src/main.c **** { + 26 .loc 1 323 1 view -0 + 27 .cfi_startproc + 28 @ args = 0, pretend = 0, frame = 16 + 29 @ frame_needed = 0, uses_anonymous_args = 0 + 30 @ link register save eliminated. + 31 0000 84B0 sub sp, sp, #16 + 32 .cfi_def_cfa_offset 16 + 324:Core/Src/main.c **** /* USER CODE BEGIN MX_GPIO_Init_1 */ + 325:Core/Src/main.c **** /* USER CODE END MX_GPIO_Init_1 */ + 326:Core/Src/main.c **** + 327:Core/Src/main.c **** /* GPIO Ports Clock Enable */ + 328:Core/Src/main.c **** __HAL_RCC_GPIOF_CLK_ENABLE(); + 33 .loc 1 328 3 view .LVU1 + 34 .LBB4: + 35 .loc 1 328 3 view .LVU2 + 36 .loc 1 328 3 view .LVU3 + 37 0002 0F4B ldr r3, .L2 + 38 0004 5A69 ldr r2, [r3, #20] + 39 0006 8021 movs r1, #128 + 40 0008 C903 lsls r1, r1, #15 + 41 000a 0A43 orrs r2, r1 + 42 000c 5A61 str r2, [r3, #20] + 43 .loc 1 328 3 view .LVU4 + 44 000e 5A69 ldr r2, [r3, #20] + 45 0010 0A40 ands r2, r1 + 46 0012 0192 str r2, [sp, #4] + 47 .loc 1 328 3 view .LVU5 + 48 0014 019A ldr r2, [sp, #4] + 49 .LBE4: + 50 .loc 1 328 3 view .LVU6 + 329:Core/Src/main.c **** __HAL_RCC_GPIOA_CLK_ENABLE(); + 51 .loc 1 329 3 view .LVU7 + 52 .LBB5: + 53 .loc 1 329 3 view .LVU8 + 54 .loc 1 329 3 view .LVU9 + 55 0016 5A69 ldr r2, [r3, #20] + 56 0018 8021 movs r1, #128 + 57 001a 8902 lsls r1, r1, #10 + 58 001c 0A43 orrs r2, r1 + 59 001e 5A61 str r2, [r3, #20] + 60 .loc 1 329 3 view .LVU10 + 61 0020 5A69 ldr r2, [r3, #20] + 62 0022 0A40 ands r2, r1 + 63 0024 0292 str r2, [sp, #8] + 64 .loc 1 329 3 view .LVU11 + 65 0026 029A ldr r2, [sp, #8] + 66 .LBE5: + 67 .loc 1 329 3 view .LVU12 + 330:Core/Src/main.c **** __HAL_RCC_GPIOB_CLK_ENABLE(); + 68 .loc 1 330 3 view .LVU13 + 69 .LBB6: + 70 .loc 1 330 3 view .LVU14 + ARM GAS /tmp/ccOqAezw.s page 8 + + + 71 .loc 1 330 3 view .LVU15 + 72 0028 5A69 ldr r2, [r3, #20] + 73 002a 8021 movs r1, #128 + 74 002c C902 lsls r1, r1, #11 + 75 002e 0A43 orrs r2, r1 + 76 0030 5A61 str r2, [r3, #20] + 77 .loc 1 330 3 view .LVU16 + 78 0032 5B69 ldr r3, [r3, #20] + 79 0034 0B40 ands r3, r1 + 80 0036 0393 str r3, [sp, #12] + 81 .loc 1 330 3 view .LVU17 + 82 0038 039B ldr r3, [sp, #12] + 83 .LBE6: + 84 .loc 1 330 3 view .LVU18 + 331:Core/Src/main.c **** + 332:Core/Src/main.c **** /* USER CODE BEGIN MX_GPIO_Init_2 */ + 333:Core/Src/main.c **** /* USER CODE END MX_GPIO_Init_2 */ + 334:Core/Src/main.c **** } + 85 .loc 1 334 1 is_stmt 0 view .LVU19 + 86 003a 04B0 add sp, sp, #16 + 87 @ sp needed + 88 003c 7047 bx lr + 89 .L3: + 90 003e C046 .align 2 + 91 .L2: + 92 0040 00100240 .word 1073876992 + 93 .cfi_endproc + 94 .LFE45: + 96 .section .text.Error_Handler,"ax",%progbits + 97 .align 1 + 98 .global Error_Handler + 99 .syntax unified + 100 .code 16 + 101 .thumb_func + 103 Error_Handler: + 104 .LFB46: + 335:Core/Src/main.c **** + 336:Core/Src/main.c **** /* USER CODE BEGIN 4 */ + 337:Core/Src/main.c **** + 338:Core/Src/main.c **** /* USER CODE END 4 */ + 339:Core/Src/main.c **** + 340:Core/Src/main.c **** /** + 341:Core/Src/main.c **** * @brief This function is executed in case of error occurrence. + 342:Core/Src/main.c **** * @retval None + 343:Core/Src/main.c **** */ + 344:Core/Src/main.c **** void Error_Handler(void) + 345:Core/Src/main.c **** { + 105 .loc 1 345 1 is_stmt 1 view -0 + 106 .cfi_startproc + 107 @ Volatile: function does not return. + 108 @ args = 0, pretend = 0, frame = 0 + 109 @ frame_needed = 0, uses_anonymous_args = 0 + 110 @ link register save eliminated. + 346:Core/Src/main.c **** /* USER CODE BEGIN Error_Handler_Debug */ + 347:Core/Src/main.c **** /* User can add his own implementation to report the HAL error return state */ + 348:Core/Src/main.c **** __disable_irq(); + 111 .loc 1 348 3 view .LVU21 + ARM GAS /tmp/ccOqAezw.s page 9 + + + 112 .LBB7: + 113 .LBI7: + 114 .file 2 "Drivers/CMSIS/Include/cmsis_gcc.h" + 1:Drivers/CMSIS/Include/cmsis_gcc.h **** /**************************************************************************//** + 2:Drivers/CMSIS/Include/cmsis_gcc.h **** * @file cmsis_gcc.h + 3:Drivers/CMSIS/Include/cmsis_gcc.h **** * @brief CMSIS compiler GCC header file + 4:Drivers/CMSIS/Include/cmsis_gcc.h **** * @version V5.0.4 + 5:Drivers/CMSIS/Include/cmsis_gcc.h **** * @date 09. April 2018 + 6:Drivers/CMSIS/Include/cmsis_gcc.h **** ******************************************************************************/ + 7:Drivers/CMSIS/Include/cmsis_gcc.h **** /* + 8:Drivers/CMSIS/Include/cmsis_gcc.h **** * Copyright (c) 2009-2018 Arm Limited. All rights reserved. + 9:Drivers/CMSIS/Include/cmsis_gcc.h **** * + 10:Drivers/CMSIS/Include/cmsis_gcc.h **** * SPDX-License-Identifier: Apache-2.0 + 11:Drivers/CMSIS/Include/cmsis_gcc.h **** * + 12:Drivers/CMSIS/Include/cmsis_gcc.h **** * Licensed under the Apache License, Version 2.0 (the License); you may + 13:Drivers/CMSIS/Include/cmsis_gcc.h **** * not use this file except in compliance with the License. + 14:Drivers/CMSIS/Include/cmsis_gcc.h **** * You may obtain a copy of the License at + 15:Drivers/CMSIS/Include/cmsis_gcc.h **** * + 16:Drivers/CMSIS/Include/cmsis_gcc.h **** * www.apache.org/licenses/LICENSE-2.0 + 17:Drivers/CMSIS/Include/cmsis_gcc.h **** * + 18:Drivers/CMSIS/Include/cmsis_gcc.h **** * Unless required by applicable law or agreed to in writing, software + 19:Drivers/CMSIS/Include/cmsis_gcc.h **** * distributed under the License is distributed on an AS IS BASIS, WITHOUT + 20:Drivers/CMSIS/Include/cmsis_gcc.h **** * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. + 21:Drivers/CMSIS/Include/cmsis_gcc.h **** * See the License for the specific language governing permissions and + 22:Drivers/CMSIS/Include/cmsis_gcc.h **** * limitations under the License. + 23:Drivers/CMSIS/Include/cmsis_gcc.h **** */ + 24:Drivers/CMSIS/Include/cmsis_gcc.h **** + 25:Drivers/CMSIS/Include/cmsis_gcc.h **** #ifndef __CMSIS_GCC_H + 26:Drivers/CMSIS/Include/cmsis_gcc.h **** #define __CMSIS_GCC_H + 27:Drivers/CMSIS/Include/cmsis_gcc.h **** + 28:Drivers/CMSIS/Include/cmsis_gcc.h **** /* ignore some GCC warnings */ + 29:Drivers/CMSIS/Include/cmsis_gcc.h **** #pragma GCC diagnostic push + 30:Drivers/CMSIS/Include/cmsis_gcc.h **** #pragma GCC diagnostic ignored "-Wsign-conversion" + 31:Drivers/CMSIS/Include/cmsis_gcc.h **** #pragma GCC diagnostic ignored "-Wconversion" + 32:Drivers/CMSIS/Include/cmsis_gcc.h **** #pragma GCC diagnostic ignored "-Wunused-parameter" + 33:Drivers/CMSIS/Include/cmsis_gcc.h **** + 34:Drivers/CMSIS/Include/cmsis_gcc.h **** /* Fallback for __has_builtin */ + 35:Drivers/CMSIS/Include/cmsis_gcc.h **** #ifndef __has_builtin + 36:Drivers/CMSIS/Include/cmsis_gcc.h **** #define __has_builtin(x) (0) + 37:Drivers/CMSIS/Include/cmsis_gcc.h **** #endif + 38:Drivers/CMSIS/Include/cmsis_gcc.h **** + 39:Drivers/CMSIS/Include/cmsis_gcc.h **** /* CMSIS compiler specific defines */ + 40:Drivers/CMSIS/Include/cmsis_gcc.h **** #ifndef __ASM + 41:Drivers/CMSIS/Include/cmsis_gcc.h **** #define __ASM __asm + 42:Drivers/CMSIS/Include/cmsis_gcc.h **** #endif + 43:Drivers/CMSIS/Include/cmsis_gcc.h **** #ifndef __INLINE + 44:Drivers/CMSIS/Include/cmsis_gcc.h **** #define __INLINE inline + 45:Drivers/CMSIS/Include/cmsis_gcc.h **** #endif + 46:Drivers/CMSIS/Include/cmsis_gcc.h **** #ifndef __STATIC_INLINE + 47:Drivers/CMSIS/Include/cmsis_gcc.h **** #define __STATIC_INLINE static inline + 48:Drivers/CMSIS/Include/cmsis_gcc.h **** #endif + 49:Drivers/CMSIS/Include/cmsis_gcc.h **** #ifndef __STATIC_FORCEINLINE + 50:Drivers/CMSIS/Include/cmsis_gcc.h **** #define __STATIC_FORCEINLINE __attribute__((always_inline)) static inline + 51:Drivers/CMSIS/Include/cmsis_gcc.h **** #endif + 52:Drivers/CMSIS/Include/cmsis_gcc.h **** #ifndef __NO_RETURN + 53:Drivers/CMSIS/Include/cmsis_gcc.h **** #define __NO_RETURN __attribute__((__noreturn__)) + 54:Drivers/CMSIS/Include/cmsis_gcc.h **** #endif + ARM GAS /tmp/ccOqAezw.s page 10 + + + 55:Drivers/CMSIS/Include/cmsis_gcc.h **** #ifndef __USED + 56:Drivers/CMSIS/Include/cmsis_gcc.h **** #define __USED __attribute__((used)) + 57:Drivers/CMSIS/Include/cmsis_gcc.h **** #endif + 58:Drivers/CMSIS/Include/cmsis_gcc.h **** #ifndef __WEAK + 59:Drivers/CMSIS/Include/cmsis_gcc.h **** #define __WEAK __attribute__((weak)) + 60:Drivers/CMSIS/Include/cmsis_gcc.h **** #endif + 61:Drivers/CMSIS/Include/cmsis_gcc.h **** #ifndef __PACKED + 62:Drivers/CMSIS/Include/cmsis_gcc.h **** #define __PACKED __attribute__((packed, aligned(1))) + 63:Drivers/CMSIS/Include/cmsis_gcc.h **** #endif + 64:Drivers/CMSIS/Include/cmsis_gcc.h **** #ifndef __PACKED_STRUCT + 65:Drivers/CMSIS/Include/cmsis_gcc.h **** #define __PACKED_STRUCT struct __attribute__((packed, aligned(1))) + 66:Drivers/CMSIS/Include/cmsis_gcc.h **** #endif + 67:Drivers/CMSIS/Include/cmsis_gcc.h **** #ifndef __PACKED_UNION + 68:Drivers/CMSIS/Include/cmsis_gcc.h **** #define __PACKED_UNION union __attribute__((packed, aligned(1))) + 69:Drivers/CMSIS/Include/cmsis_gcc.h **** #endif + 70:Drivers/CMSIS/Include/cmsis_gcc.h **** #ifndef __UNALIGNED_UINT32 /* deprecated */ + 71:Drivers/CMSIS/Include/cmsis_gcc.h **** #pragma GCC diagnostic push + 72:Drivers/CMSIS/Include/cmsis_gcc.h **** #pragma GCC diagnostic ignored "-Wpacked" + 73:Drivers/CMSIS/Include/cmsis_gcc.h **** #pragma GCC diagnostic ignored "-Wattributes" + 74:Drivers/CMSIS/Include/cmsis_gcc.h **** struct __attribute__((packed)) T_UINT32 { uint32_t v; }; + 75:Drivers/CMSIS/Include/cmsis_gcc.h **** #pragma GCC diagnostic pop + 76:Drivers/CMSIS/Include/cmsis_gcc.h **** #define __UNALIGNED_UINT32(x) (((struct T_UINT32 *)(x))->v) + 77:Drivers/CMSIS/Include/cmsis_gcc.h **** #endif + 78:Drivers/CMSIS/Include/cmsis_gcc.h **** #ifndef __UNALIGNED_UINT16_WRITE + 79:Drivers/CMSIS/Include/cmsis_gcc.h **** #pragma GCC diagnostic push + 80:Drivers/CMSIS/Include/cmsis_gcc.h **** #pragma GCC diagnostic ignored "-Wpacked" + 81:Drivers/CMSIS/Include/cmsis_gcc.h **** #pragma GCC diagnostic ignored "-Wattributes" + 82:Drivers/CMSIS/Include/cmsis_gcc.h **** __PACKED_STRUCT T_UINT16_WRITE { uint16_t v; }; + 83:Drivers/CMSIS/Include/cmsis_gcc.h **** #pragma GCC diagnostic pop + 84:Drivers/CMSIS/Include/cmsis_gcc.h **** #define __UNALIGNED_UINT16_WRITE(addr, val) (void)((((struct T_UINT16_WRITE *)(void *)(addr))- + 85:Drivers/CMSIS/Include/cmsis_gcc.h **** #endif + 86:Drivers/CMSIS/Include/cmsis_gcc.h **** #ifndef __UNALIGNED_UINT16_READ + 87:Drivers/CMSIS/Include/cmsis_gcc.h **** #pragma GCC diagnostic push + 88:Drivers/CMSIS/Include/cmsis_gcc.h **** #pragma GCC diagnostic ignored "-Wpacked" + 89:Drivers/CMSIS/Include/cmsis_gcc.h **** #pragma GCC diagnostic ignored "-Wattributes" + 90:Drivers/CMSIS/Include/cmsis_gcc.h **** __PACKED_STRUCT T_UINT16_READ { uint16_t v; }; + 91:Drivers/CMSIS/Include/cmsis_gcc.h **** #pragma GCC diagnostic pop + 92:Drivers/CMSIS/Include/cmsis_gcc.h **** #define __UNALIGNED_UINT16_READ(addr) (((const struct T_UINT16_READ *)(const void *)(add + 93:Drivers/CMSIS/Include/cmsis_gcc.h **** #endif + 94:Drivers/CMSIS/Include/cmsis_gcc.h **** #ifndef __UNALIGNED_UINT32_WRITE + 95:Drivers/CMSIS/Include/cmsis_gcc.h **** #pragma GCC diagnostic push + 96:Drivers/CMSIS/Include/cmsis_gcc.h **** #pragma GCC diagnostic ignored "-Wpacked" + 97:Drivers/CMSIS/Include/cmsis_gcc.h **** #pragma GCC diagnostic ignored "-Wattributes" + 98:Drivers/CMSIS/Include/cmsis_gcc.h **** __PACKED_STRUCT T_UINT32_WRITE { uint32_t v; }; + 99:Drivers/CMSIS/Include/cmsis_gcc.h **** #pragma GCC diagnostic pop + 100:Drivers/CMSIS/Include/cmsis_gcc.h **** #define __UNALIGNED_UINT32_WRITE(addr, val) (void)((((struct T_UINT32_WRITE *)(void *)(addr))- + 101:Drivers/CMSIS/Include/cmsis_gcc.h **** #endif + 102:Drivers/CMSIS/Include/cmsis_gcc.h **** #ifndef __UNALIGNED_UINT32_READ + 103:Drivers/CMSIS/Include/cmsis_gcc.h **** #pragma GCC diagnostic push + 104:Drivers/CMSIS/Include/cmsis_gcc.h **** #pragma GCC diagnostic ignored "-Wpacked" + 105:Drivers/CMSIS/Include/cmsis_gcc.h **** #pragma GCC diagnostic ignored "-Wattributes" + 106:Drivers/CMSIS/Include/cmsis_gcc.h **** __PACKED_STRUCT T_UINT32_READ { uint32_t v; }; + 107:Drivers/CMSIS/Include/cmsis_gcc.h **** #pragma GCC diagnostic pop + 108:Drivers/CMSIS/Include/cmsis_gcc.h **** #define __UNALIGNED_UINT32_READ(addr) (((const struct T_UINT32_READ *)(const void *)(add + 109:Drivers/CMSIS/Include/cmsis_gcc.h **** #endif + 110:Drivers/CMSIS/Include/cmsis_gcc.h **** #ifndef __ALIGNED + 111:Drivers/CMSIS/Include/cmsis_gcc.h **** #define __ALIGNED(x) __attribute__((aligned(x))) + ARM GAS /tmp/ccOqAezw.s page 11 + + + 112:Drivers/CMSIS/Include/cmsis_gcc.h **** #endif + 113:Drivers/CMSIS/Include/cmsis_gcc.h **** #ifndef __RESTRICT + 114:Drivers/CMSIS/Include/cmsis_gcc.h **** #define __RESTRICT __restrict + 115:Drivers/CMSIS/Include/cmsis_gcc.h **** #endif + 116:Drivers/CMSIS/Include/cmsis_gcc.h **** + 117:Drivers/CMSIS/Include/cmsis_gcc.h **** + 118:Drivers/CMSIS/Include/cmsis_gcc.h **** /* ########################### Core Function Access ########################### */ + 119:Drivers/CMSIS/Include/cmsis_gcc.h **** /** \ingroup CMSIS_Core_FunctionInterface + 120:Drivers/CMSIS/Include/cmsis_gcc.h **** \defgroup CMSIS_Core_RegAccFunctions CMSIS Core Register Access Functions + 121:Drivers/CMSIS/Include/cmsis_gcc.h **** @{ + 122:Drivers/CMSIS/Include/cmsis_gcc.h **** */ + 123:Drivers/CMSIS/Include/cmsis_gcc.h **** + 124:Drivers/CMSIS/Include/cmsis_gcc.h **** /** + 125:Drivers/CMSIS/Include/cmsis_gcc.h **** \brief Enable IRQ Interrupts + 126:Drivers/CMSIS/Include/cmsis_gcc.h **** \details Enables IRQ interrupts by clearing the I-bit in the CPSR. + 127:Drivers/CMSIS/Include/cmsis_gcc.h **** Can only be executed in Privileged modes. + 128:Drivers/CMSIS/Include/cmsis_gcc.h **** */ + 129:Drivers/CMSIS/Include/cmsis_gcc.h **** __STATIC_FORCEINLINE void __enable_irq(void) + 130:Drivers/CMSIS/Include/cmsis_gcc.h **** { + 131:Drivers/CMSIS/Include/cmsis_gcc.h **** __ASM volatile ("cpsie i" : : : "memory"); + 132:Drivers/CMSIS/Include/cmsis_gcc.h **** } + 133:Drivers/CMSIS/Include/cmsis_gcc.h **** + 134:Drivers/CMSIS/Include/cmsis_gcc.h **** + 135:Drivers/CMSIS/Include/cmsis_gcc.h **** /** + 136:Drivers/CMSIS/Include/cmsis_gcc.h **** \brief Disable IRQ Interrupts + 137:Drivers/CMSIS/Include/cmsis_gcc.h **** \details Disables IRQ interrupts by setting the I-bit in the CPSR. + 138:Drivers/CMSIS/Include/cmsis_gcc.h **** Can only be executed in Privileged modes. + 139:Drivers/CMSIS/Include/cmsis_gcc.h **** */ + 140:Drivers/CMSIS/Include/cmsis_gcc.h **** __STATIC_FORCEINLINE void __disable_irq(void) + 115 .loc 2 140 27 view .LVU22 + 116 .LBB8: + 141:Drivers/CMSIS/Include/cmsis_gcc.h **** { + 142:Drivers/CMSIS/Include/cmsis_gcc.h **** __ASM volatile ("cpsid i" : : : "memory"); + 117 .loc 2 142 3 view .LVU23 + 118 .syntax divided + 119 @ 142 "Drivers/CMSIS/Include/cmsis_gcc.h" 1 + 120 0000 72B6 cpsid i + 121 @ 0 "" 2 + 122 .thumb + 123 .syntax unified + 124 .L5: + 125 .LBE8: + 126 .LBE7: + 349:Core/Src/main.c **** while (1) + 127 .loc 1 349 3 view .LVU24 + 350:Core/Src/main.c **** { + 351:Core/Src/main.c **** } + 128 .loc 1 351 3 view .LVU25 + 349:Core/Src/main.c **** while (1) + 129 .loc 1 349 9 view .LVU26 + 130 0002 FEE7 b .L5 + 131 .cfi_endproc + 132 .LFE46: + 134 .section .text.MX_ADC_Init,"ax",%progbits + 135 .align 1 + 136 .syntax unified + 137 .code 16 + ARM GAS /tmp/ccOqAezw.s page 12 + + + 138 .thumb_func + 140 MX_ADC_Init: + 141 .LFB42: + 157:Core/Src/main.c **** + 142 .loc 1 157 1 view -0 + 143 .cfi_startproc + 144 @ args = 0, pretend = 0, frame = 16 + 145 @ frame_needed = 0, uses_anonymous_args = 0 + 146 0000 00B5 push {lr} + 147 .cfi_def_cfa_offset 4 + 148 .cfi_offset 14, -4 + 149 0002 85B0 sub sp, sp, #20 + 150 .cfi_def_cfa_offset 24 + 163:Core/Src/main.c **** + 151 .loc 1 163 3 view .LVU28 + 163:Core/Src/main.c **** + 152 .loc 1 163 26 is_stmt 0 view .LVU29 + 153 0004 0C22 movs r2, #12 + 154 0006 0021 movs r1, #0 + 155 0008 01A8 add r0, sp, #4 + 156 000a FFF7FEFF bl memset + 157 .LVL0: + 171:Core/Src/main.c **** hadc.Init.ClockPrescaler = ADC_CLOCK_ASYNC_DIV1; + 158 .loc 1 171 3 is_stmt 1 view .LVU30 + 171:Core/Src/main.c **** hadc.Init.ClockPrescaler = ADC_CLOCK_ASYNC_DIV1; + 159 .loc 1 171 17 is_stmt 0 view .LVU31 + 160 000e 1C48 ldr r0, .L13 + 161 0010 1C4B ldr r3, .L13+4 + 162 0012 0360 str r3, [r0] + 172:Core/Src/main.c **** hadc.Init.Resolution = ADC_RESOLUTION_12B; + 163 .loc 1 172 3 is_stmt 1 view .LVU32 + 172:Core/Src/main.c **** hadc.Init.Resolution = ADC_RESOLUTION_12B; + 164 .loc 1 172 28 is_stmt 0 view .LVU33 + 165 0014 0023 movs r3, #0 + 166 0016 4360 str r3, [r0, #4] + 173:Core/Src/main.c **** hadc.Init.DataAlign = ADC_DATAALIGN_RIGHT; + 167 .loc 1 173 3 is_stmt 1 view .LVU34 + 173:Core/Src/main.c **** hadc.Init.DataAlign = ADC_DATAALIGN_RIGHT; + 168 .loc 1 173 24 is_stmt 0 view .LVU35 + 169 0018 8360 str r3, [r0, #8] + 174:Core/Src/main.c **** hadc.Init.ScanConvMode = ADC_SCAN_DIRECTION_FORWARD; + 170 .loc 1 174 3 is_stmt 1 view .LVU36 + 174:Core/Src/main.c **** hadc.Init.ScanConvMode = ADC_SCAN_DIRECTION_FORWARD; + 171 .loc 1 174 23 is_stmt 0 view .LVU37 + 172 001a C360 str r3, [r0, #12] + 175:Core/Src/main.c **** hadc.Init.EOCSelection = ADC_EOC_SINGLE_CONV; + 173 .loc 1 175 3 is_stmt 1 view .LVU38 + 175:Core/Src/main.c **** hadc.Init.EOCSelection = ADC_EOC_SINGLE_CONV; + 174 .loc 1 175 26 is_stmt 0 view .LVU39 + 175 001c 0122 movs r2, #1 + 176 001e 0261 str r2, [r0, #16] + 176:Core/Src/main.c **** hadc.Init.LowPowerAutoWait = DISABLE; + 177 .loc 1 176 3 is_stmt 1 view .LVU40 + 176:Core/Src/main.c **** hadc.Init.LowPowerAutoWait = DISABLE; + 178 .loc 1 176 26 is_stmt 0 view .LVU41 + 179 0020 0421 movs r1, #4 + 180 0022 4161 str r1, [r0, #20] + ARM GAS /tmp/ccOqAezw.s page 13 + + + 177:Core/Src/main.c **** hadc.Init.LowPowerAutoPowerOff = DISABLE; + 181 .loc 1 177 3 is_stmt 1 view .LVU42 + 177:Core/Src/main.c **** hadc.Init.LowPowerAutoPowerOff = DISABLE; + 182 .loc 1 177 30 is_stmt 0 view .LVU43 + 183 0024 0376 strb r3, [r0, #24] + 178:Core/Src/main.c **** hadc.Init.ContinuousConvMode = DISABLE; + 184 .loc 1 178 3 is_stmt 1 view .LVU44 + 178:Core/Src/main.c **** hadc.Init.ContinuousConvMode = DISABLE; + 185 .loc 1 178 34 is_stmt 0 view .LVU45 + 186 0026 4376 strb r3, [r0, #25] + 179:Core/Src/main.c **** hadc.Init.DiscontinuousConvMode = DISABLE; + 187 .loc 1 179 3 is_stmt 1 view .LVU46 + 179:Core/Src/main.c **** hadc.Init.DiscontinuousConvMode = DISABLE; + 188 .loc 1 179 32 is_stmt 0 view .LVU47 + 189 0028 8376 strb r3, [r0, #26] + 180:Core/Src/main.c **** hadc.Init.ExternalTrigConv = ADC_SOFTWARE_START; + 190 .loc 1 180 3 is_stmt 1 view .LVU48 + 180:Core/Src/main.c **** hadc.Init.ExternalTrigConv = ADC_SOFTWARE_START; + 191 .loc 1 180 35 is_stmt 0 view .LVU49 + 192 002a C376 strb r3, [r0, #27] + 181:Core/Src/main.c **** hadc.Init.ExternalTrigConvEdge = ADC_EXTERNALTRIGCONVEDGE_NONE; + 193 .loc 1 181 3 is_stmt 1 view .LVU50 + 181:Core/Src/main.c **** hadc.Init.ExternalTrigConvEdge = ADC_EXTERNALTRIGCONVEDGE_NONE; + 194 .loc 1 181 30 is_stmt 0 view .LVU51 + 195 002c C221 movs r1, #194 + 196 002e FF31 adds r1, r1, #255 + 197 0030 C161 str r1, [r0, #28] + 182:Core/Src/main.c **** hadc.Init.DMAContinuousRequests = DISABLE; + 198 .loc 1 182 3 is_stmt 1 view .LVU52 + 182:Core/Src/main.c **** hadc.Init.DMAContinuousRequests = DISABLE; + 199 .loc 1 182 34 is_stmt 0 view .LVU53 + 200 0032 0362 str r3, [r0, #32] + 183:Core/Src/main.c **** hadc.Init.Overrun = ADC_OVR_DATA_PRESERVED; + 201 .loc 1 183 3 is_stmt 1 view .LVU54 + 183:Core/Src/main.c **** hadc.Init.Overrun = ADC_OVR_DATA_PRESERVED; + 202 .loc 1 183 35 is_stmt 0 view .LVU55 + 203 0034 9E39 subs r1, r1, #158 + 204 0036 FF39 subs r1, r1, #255 + 205 0038 4354 strb r3, [r0, r1] + 184:Core/Src/main.c **** if (HAL_ADC_Init(&hadc) != HAL_OK) + 206 .loc 1 184 3 is_stmt 1 view .LVU56 + 184:Core/Src/main.c **** if (HAL_ADC_Init(&hadc) != HAL_OK) + 207 .loc 1 184 21 is_stmt 0 view .LVU57 + 208 003a 8262 str r2, [r0, #40] + 185:Core/Src/main.c **** { + 209 .loc 1 185 3 is_stmt 1 view .LVU58 + 185:Core/Src/main.c **** { + 210 .loc 1 185 7 is_stmt 0 view .LVU59 + 211 003c FFF7FEFF bl HAL_ADC_Init + 212 .LVL1: + 185:Core/Src/main.c **** { + 213 .loc 1 185 6 discriminator 1 view .LVU60 + 214 0040 0028 cmp r0, #0 + 215 0042 17D1 bne .L10 + 192:Core/Src/main.c **** sConfig.Rank = ADC_RANK_CHANNEL_NUMBER; + 216 .loc 1 192 3 is_stmt 1 view .LVU61 + 192:Core/Src/main.c **** sConfig.Rank = ADC_RANK_CHANNEL_NUMBER; + ARM GAS /tmp/ccOqAezw.s page 14 + + + 217 .loc 1 192 19 is_stmt 0 view .LVU62 + 218 0044 0023 movs r3, #0 + 219 0046 0193 str r3, [sp, #4] + 193:Core/Src/main.c **** sConfig.SamplingTime = ADC_SAMPLETIME_1CYCLE_5; + 220 .loc 1 193 3 is_stmt 1 view .LVU63 + 193:Core/Src/main.c **** sConfig.SamplingTime = ADC_SAMPLETIME_1CYCLE_5; + 221 .loc 1 193 16 is_stmt 0 view .LVU64 + 222 0048 8023 movs r3, #128 + 223 004a 5B01 lsls r3, r3, #5 + 224 004c 0293 str r3, [sp, #8] + 194:Core/Src/main.c **** if (HAL_ADC_ConfigChannel(&hadc, &sConfig) != HAL_OK) + 225 .loc 1 194 3 is_stmt 1 view .LVU65 + 194:Core/Src/main.c **** if (HAL_ADC_ConfigChannel(&hadc, &sConfig) != HAL_OK) + 226 .loc 1 194 24 is_stmt 0 view .LVU66 + 227 004e 8023 movs r3, #128 + 228 0050 5B05 lsls r3, r3, #21 + 229 0052 0393 str r3, [sp, #12] + 195:Core/Src/main.c **** { + 230 .loc 1 195 3 is_stmt 1 view .LVU67 + 195:Core/Src/main.c **** { + 231 .loc 1 195 7 is_stmt 0 view .LVU68 + 232 0054 0A48 ldr r0, .L13 + 233 0056 01A9 add r1, sp, #4 + 234 0058 FFF7FEFF bl HAL_ADC_ConfigChannel + 235 .LVL2: + 195:Core/Src/main.c **** { + 236 .loc 1 195 6 discriminator 1 view .LVU69 + 237 005c 0028 cmp r0, #0 + 238 005e 0BD1 bne .L11 + 202:Core/Src/main.c **** if (HAL_ADC_ConfigChannel(&hadc, &sConfig) != HAL_OK) + 239 .loc 1 202 3 is_stmt 1 view .LVU70 + 202:Core/Src/main.c **** if (HAL_ADC_ConfigChannel(&hadc, &sConfig) != HAL_OK) + 240 .loc 1 202 19 is_stmt 0 view .LVU71 + 241 0060 0123 movs r3, #1 + 242 0062 0193 str r3, [sp, #4] + 203:Core/Src/main.c **** { + 243 .loc 1 203 3 is_stmt 1 view .LVU72 + 203:Core/Src/main.c **** { + 244 .loc 1 203 7 is_stmt 0 view .LVU73 + 245 0064 0648 ldr r0, .L13 + 246 0066 01A9 add r1, sp, #4 + 247 0068 FFF7FEFF bl HAL_ADC_ConfigChannel + 248 .LVL3: + 203:Core/Src/main.c **** { + 249 .loc 1 203 6 discriminator 1 view .LVU74 + 250 006c 0028 cmp r0, #0 + 251 006e 05D1 bne .L12 + 211:Core/Src/main.c **** + 252 .loc 1 211 1 view .LVU75 + 253 0070 05B0 add sp, sp, #20 + 254 @ sp needed + 255 0072 00BD pop {pc} + 256 .L10: + 187:Core/Src/main.c **** } + 257 .loc 1 187 5 is_stmt 1 view .LVU76 + 258 0074 FFF7FEFF bl Error_Handler + 259 .LVL4: + ARM GAS /tmp/ccOqAezw.s page 15 + + + 260 .L11: + 197:Core/Src/main.c **** } + 261 .loc 1 197 5 view .LVU77 + 262 0078 FFF7FEFF bl Error_Handler + 263 .LVL5: + 264 .L12: + 205:Core/Src/main.c **** } + 265 .loc 1 205 5 view .LVU78 + 266 007c FFF7FEFF bl Error_Handler + 267 .LVL6: + 268 .L14: + 269 .align 2 + 270 .L13: + 271 0080 00000000 .word hadc + 272 0084 00240140 .word 1073816576 + 273 .cfi_endproc + 274 .LFE42: + 276 .section .text.MX_CAN_Init,"ax",%progbits + 277 .align 1 + 278 .syntax unified + 279 .code 16 + 280 .thumb_func + 282 MX_CAN_Init: + 283 .LFB43: + 219:Core/Src/main.c **** + 284 .loc 1 219 1 view -0 + 285 .cfi_startproc + 286 @ args = 0, pretend = 0, frame = 0 + 287 @ frame_needed = 0, uses_anonymous_args = 0 + 288 0000 10B5 push {r4, lr} + 289 .cfi_def_cfa_offset 8 + 290 .cfi_offset 4, -8 + 291 .cfi_offset 14, -4 + 228:Core/Src/main.c **** hcan.Init.Prescaler = 16; + 292 .loc 1 228 3 view .LVU80 + 228:Core/Src/main.c **** hcan.Init.Prescaler = 16; + 293 .loc 1 228 17 is_stmt 0 view .LVU81 + 294 0002 0B48 ldr r0, .L18 + 295 0004 0B4B ldr r3, .L18+4 + 296 0006 0360 str r3, [r0] + 229:Core/Src/main.c **** hcan.Init.Mode = CAN_MODE_NORMAL; + 297 .loc 1 229 3 is_stmt 1 view .LVU82 + 229:Core/Src/main.c **** hcan.Init.Mode = CAN_MODE_NORMAL; + 298 .loc 1 229 23 is_stmt 0 view .LVU83 + 299 0008 1023 movs r3, #16 + 300 000a 4360 str r3, [r0, #4] + 230:Core/Src/main.c **** hcan.Init.SyncJumpWidth = CAN_SJW_1TQ; + 301 .loc 1 230 3 is_stmt 1 view .LVU84 + 230:Core/Src/main.c **** hcan.Init.SyncJumpWidth = CAN_SJW_1TQ; + 302 .loc 1 230 18 is_stmt 0 view .LVU85 + 303 000c 0023 movs r3, #0 + 304 000e 8360 str r3, [r0, #8] + 231:Core/Src/main.c **** hcan.Init.TimeSeg1 = CAN_BS1_1TQ; + 305 .loc 1 231 3 is_stmt 1 view .LVU86 + 231:Core/Src/main.c **** hcan.Init.TimeSeg1 = CAN_BS1_1TQ; + 306 .loc 1 231 27 is_stmt 0 view .LVU87 + 307 0010 C360 str r3, [r0, #12] + ARM GAS /tmp/ccOqAezw.s page 16 + + + 232:Core/Src/main.c **** hcan.Init.TimeSeg2 = CAN_BS2_1TQ; + 308 .loc 1 232 3 is_stmt 1 view .LVU88 + 232:Core/Src/main.c **** hcan.Init.TimeSeg2 = CAN_BS2_1TQ; + 309 .loc 1 232 22 is_stmt 0 view .LVU89 + 310 0012 0361 str r3, [r0, #16] + 233:Core/Src/main.c **** hcan.Init.TimeTriggeredMode = DISABLE; + 311 .loc 1 233 3 is_stmt 1 view .LVU90 + 233:Core/Src/main.c **** hcan.Init.TimeTriggeredMode = DISABLE; + 312 .loc 1 233 22 is_stmt 0 view .LVU91 + 313 0014 4361 str r3, [r0, #20] + 234:Core/Src/main.c **** hcan.Init.AutoBusOff = DISABLE; + 314 .loc 1 234 3 is_stmt 1 view .LVU92 + 234:Core/Src/main.c **** hcan.Init.AutoBusOff = DISABLE; + 315 .loc 1 234 31 is_stmt 0 view .LVU93 + 316 0016 0376 strb r3, [r0, #24] + 235:Core/Src/main.c **** hcan.Init.AutoWakeUp = DISABLE; + 317 .loc 1 235 3 is_stmt 1 view .LVU94 + 235:Core/Src/main.c **** hcan.Init.AutoWakeUp = DISABLE; + 318 .loc 1 235 24 is_stmt 0 view .LVU95 + 319 0018 4376 strb r3, [r0, #25] + 236:Core/Src/main.c **** hcan.Init.AutoRetransmission = DISABLE; + 320 .loc 1 236 3 is_stmt 1 view .LVU96 + 236:Core/Src/main.c **** hcan.Init.AutoRetransmission = DISABLE; + 321 .loc 1 236 24 is_stmt 0 view .LVU97 + 322 001a 8376 strb r3, [r0, #26] + 237:Core/Src/main.c **** hcan.Init.ReceiveFifoLocked = DISABLE; + 323 .loc 1 237 3 is_stmt 1 view .LVU98 + 237:Core/Src/main.c **** hcan.Init.ReceiveFifoLocked = DISABLE; + 324 .loc 1 237 32 is_stmt 0 view .LVU99 + 325 001c C376 strb r3, [r0, #27] + 238:Core/Src/main.c **** hcan.Init.TransmitFifoPriority = DISABLE; + 326 .loc 1 238 3 is_stmt 1 view .LVU100 + 238:Core/Src/main.c **** hcan.Init.TransmitFifoPriority = DISABLE; + 327 .loc 1 238 31 is_stmt 0 view .LVU101 + 328 001e 0377 strb r3, [r0, #28] + 239:Core/Src/main.c **** if (HAL_CAN_Init(&hcan) != HAL_OK) + 329 .loc 1 239 3 is_stmt 1 view .LVU102 + 239:Core/Src/main.c **** if (HAL_CAN_Init(&hcan) != HAL_OK) + 330 .loc 1 239 34 is_stmt 0 view .LVU103 + 331 0020 4377 strb r3, [r0, #29] + 240:Core/Src/main.c **** { + 332 .loc 1 240 3 is_stmt 1 view .LVU104 + 240:Core/Src/main.c **** { + 333 .loc 1 240 7 is_stmt 0 view .LVU105 + 334 0022 FFF7FEFF bl HAL_CAN_Init + 335 .LVL7: + 240:Core/Src/main.c **** { + 336 .loc 1 240 6 discriminator 1 view .LVU106 + 337 0026 0028 cmp r0, #0 + 338 0028 00D1 bne .L17 + 248:Core/Src/main.c **** + 339 .loc 1 248 1 view .LVU107 + 340 @ sp needed + 341 002a 10BD pop {r4, pc} + 342 .L17: + 242:Core/Src/main.c **** } + 343 .loc 1 242 5 is_stmt 1 view .LVU108 + ARM GAS /tmp/ccOqAezw.s page 17 + + + 344 002c FFF7FEFF bl Error_Handler + 345 .LVL8: + 346 .L19: + 347 .align 2 + 348 .L18: + 349 0030 00000000 .word hcan + 350 0034 00640040 .word 1073767424 + 351 .cfi_endproc + 352 .LFE43: + 354 .section .text.MX_TIM2_Init,"ax",%progbits + 355 .align 1 + 356 .syntax unified + 357 .code 16 + 358 .thumb_func + 360 MX_TIM2_Init: + 361 .LFB44: + 256:Core/Src/main.c **** + 362 .loc 1 256 1 view -0 + 363 .cfi_startproc + 364 @ args = 0, pretend = 0, frame = 56 + 365 @ frame_needed = 0, uses_anonymous_args = 0 + 366 0000 00B5 push {lr} + 367 .cfi_def_cfa_offset 4 + 368 .cfi_offset 14, -4 + 369 0002 8FB0 sub sp, sp, #60 + 370 .cfi_def_cfa_offset 64 + 262:Core/Src/main.c **** TIM_MasterConfigTypeDef sMasterConfig = {0}; + 371 .loc 1 262 3 view .LVU110 + 262:Core/Src/main.c **** TIM_MasterConfigTypeDef sMasterConfig = {0}; + 372 .loc 1 262 26 is_stmt 0 view .LVU111 + 373 0004 1022 movs r2, #16 + 374 0006 0021 movs r1, #0 + 375 0008 0AA8 add r0, sp, #40 + 376 000a FFF7FEFF bl memset + 377 .LVL9: + 263:Core/Src/main.c **** TIM_OC_InitTypeDef sConfigOC = {0}; + 378 .loc 1 263 3 is_stmt 1 view .LVU112 + 263:Core/Src/main.c **** TIM_OC_InitTypeDef sConfigOC = {0}; + 379 .loc 1 263 27 is_stmt 0 view .LVU113 + 380 000e 0822 movs r2, #8 + 381 0010 0021 movs r1, #0 + 382 0012 08A8 add r0, sp, #32 + 383 0014 FFF7FEFF bl memset + 384 .LVL10: + 264:Core/Src/main.c **** + 385 .loc 1 264 3 is_stmt 1 view .LVU114 + 264:Core/Src/main.c **** + 386 .loc 1 264 22 is_stmt 0 view .LVU115 + 387 0018 1C22 movs r2, #28 + 388 001a 0021 movs r1, #0 + 389 001c 01A8 add r0, sp, #4 + 390 001e FFF7FEFF bl memset + 391 .LVL11: + 269:Core/Src/main.c **** htim2.Init.Prescaler = 0; + 392 .loc 1 269 3 is_stmt 1 view .LVU116 + 269:Core/Src/main.c **** htim2.Init.Prescaler = 0; + 393 .loc 1 269 18 is_stmt 0 view .LVU117 + ARM GAS /tmp/ccOqAezw.s page 18 + + + 394 0022 2A48 ldr r0, .L35 + 395 0024 8023 movs r3, #128 + 396 0026 DB05 lsls r3, r3, #23 + 397 0028 0360 str r3, [r0] + 270:Core/Src/main.c **** htim2.Init.CounterMode = TIM_COUNTERMODE_UP; + 398 .loc 1 270 3 is_stmt 1 view .LVU118 + 270:Core/Src/main.c **** htim2.Init.CounterMode = TIM_COUNTERMODE_UP; + 399 .loc 1 270 24 is_stmt 0 view .LVU119 + 400 002a 0023 movs r3, #0 + 401 002c 4360 str r3, [r0, #4] + 271:Core/Src/main.c **** htim2.Init.Period = 4294967295; + 402 .loc 1 271 3 is_stmt 1 view .LVU120 + 271:Core/Src/main.c **** htim2.Init.Period = 4294967295; + 403 .loc 1 271 26 is_stmt 0 view .LVU121 + 404 002e 8360 str r3, [r0, #8] + 272:Core/Src/main.c **** htim2.Init.ClockDivision = TIM_CLOCKDIVISION_DIV1; + 405 .loc 1 272 3 is_stmt 1 view .LVU122 + 272:Core/Src/main.c **** htim2.Init.ClockDivision = TIM_CLOCKDIVISION_DIV1; + 406 .loc 1 272 21 is_stmt 0 view .LVU123 + 407 0030 0122 movs r2, #1 + 408 0032 5242 rsbs r2, r2, #0 + 409 0034 C260 str r2, [r0, #12] + 273:Core/Src/main.c **** htim2.Init.AutoReloadPreload = TIM_AUTORELOAD_PRELOAD_DISABLE; + 410 .loc 1 273 3 is_stmt 1 view .LVU124 + 273:Core/Src/main.c **** htim2.Init.AutoReloadPreload = TIM_AUTORELOAD_PRELOAD_DISABLE; + 411 .loc 1 273 28 is_stmt 0 view .LVU125 + 412 0036 0361 str r3, [r0, #16] + 274:Core/Src/main.c **** if (HAL_TIM_Base_Init(&htim2) != HAL_OK) + 413 .loc 1 274 3 is_stmt 1 view .LVU126 + 274:Core/Src/main.c **** if (HAL_TIM_Base_Init(&htim2) != HAL_OK) + 414 .loc 1 274 32 is_stmt 0 view .LVU127 + 415 0038 8361 str r3, [r0, #24] + 275:Core/Src/main.c **** { + 416 .loc 1 275 3 is_stmt 1 view .LVU128 + 275:Core/Src/main.c **** { + 417 .loc 1 275 7 is_stmt 0 view .LVU129 + 418 003a FFF7FEFF bl HAL_TIM_Base_Init + 419 .LVL12: + 275:Core/Src/main.c **** { + 420 .loc 1 275 6 discriminator 1 view .LVU130 + 421 003e 0028 cmp r0, #0 + 422 0040 36D1 bne .L28 + 279:Core/Src/main.c **** if (HAL_TIM_ConfigClockSource(&htim2, &sClockSourceConfig) != HAL_OK) + 423 .loc 1 279 3 is_stmt 1 view .LVU131 + 279:Core/Src/main.c **** if (HAL_TIM_ConfigClockSource(&htim2, &sClockSourceConfig) != HAL_OK) + 424 .loc 1 279 34 is_stmt 0 view .LVU132 + 425 0042 8023 movs r3, #128 + 426 0044 5B01 lsls r3, r3, #5 + 427 0046 0A93 str r3, [sp, #40] + 280:Core/Src/main.c **** { + 428 .loc 1 280 3 is_stmt 1 view .LVU133 + 280:Core/Src/main.c **** { + 429 .loc 1 280 7 is_stmt 0 view .LVU134 + 430 0048 2048 ldr r0, .L35 + 431 004a 0AA9 add r1, sp, #40 + 432 004c FFF7FEFF bl HAL_TIM_ConfigClockSource + 433 .LVL13: + ARM GAS /tmp/ccOqAezw.s page 19 + + + 280:Core/Src/main.c **** { + 434 .loc 1 280 6 discriminator 1 view .LVU135 + 435 0050 0028 cmp r0, #0 + 436 0052 2FD1 bne .L29 + 284:Core/Src/main.c **** { + 437 .loc 1 284 3 is_stmt 1 view .LVU136 + 284:Core/Src/main.c **** { + 438 .loc 1 284 7 is_stmt 0 view .LVU137 + 439 0054 1D48 ldr r0, .L35 + 440 0056 FFF7FEFF bl HAL_TIM_PWM_Init + 441 .LVL14: + 284:Core/Src/main.c **** { + 442 .loc 1 284 6 discriminator 1 view .LVU138 + 443 005a 0028 cmp r0, #0 + 444 005c 2CD1 bne .L30 + 288:Core/Src/main.c **** sMasterConfig.MasterSlaveMode = TIM_MASTERSLAVEMODE_DISABLE; + 445 .loc 1 288 3 is_stmt 1 view .LVU139 + 288:Core/Src/main.c **** sMasterConfig.MasterSlaveMode = TIM_MASTERSLAVEMODE_DISABLE; + 446 .loc 1 288 37 is_stmt 0 view .LVU140 + 447 005e 0023 movs r3, #0 + 448 0060 0893 str r3, [sp, #32] + 289:Core/Src/main.c **** if (HAL_TIMEx_MasterConfigSynchronization(&htim2, &sMasterConfig) != HAL_OK) + 449 .loc 1 289 3 is_stmt 1 view .LVU141 + 289:Core/Src/main.c **** if (HAL_TIMEx_MasterConfigSynchronization(&htim2, &sMasterConfig) != HAL_OK) + 450 .loc 1 289 33 is_stmt 0 view .LVU142 + 451 0062 0993 str r3, [sp, #36] + 290:Core/Src/main.c **** { + 452 .loc 1 290 3 is_stmt 1 view .LVU143 + 290:Core/Src/main.c **** { + 453 .loc 1 290 7 is_stmt 0 view .LVU144 + 454 0064 1948 ldr r0, .L35 + 455 0066 08A9 add r1, sp, #32 + 456 0068 FFF7FEFF bl HAL_TIMEx_MasterConfigSynchronization + 457 .LVL15: + 290:Core/Src/main.c **** { + 458 .loc 1 290 6 discriminator 1 view .LVU145 + 459 006c 0028 cmp r0, #0 + 460 006e 25D1 bne .L31 + 294:Core/Src/main.c **** sConfigOC.Pulse = 0; + 461 .loc 1 294 3 is_stmt 1 view .LVU146 + 294:Core/Src/main.c **** sConfigOC.Pulse = 0; + 462 .loc 1 294 20 is_stmt 0 view .LVU147 + 463 0070 6023 movs r3, #96 + 464 0072 0193 str r3, [sp, #4] + 295:Core/Src/main.c **** sConfigOC.OCPolarity = TIM_OCPOLARITY_HIGH; + 465 .loc 1 295 3 is_stmt 1 view .LVU148 + 295:Core/Src/main.c **** sConfigOC.OCPolarity = TIM_OCPOLARITY_HIGH; + 466 .loc 1 295 19 is_stmt 0 view .LVU149 + 467 0074 0023 movs r3, #0 + 468 0076 0293 str r3, [sp, #8] + 296:Core/Src/main.c **** sConfigOC.OCFastMode = TIM_OCFAST_DISABLE; + 469 .loc 1 296 3 is_stmt 1 view .LVU150 + 296:Core/Src/main.c **** sConfigOC.OCFastMode = TIM_OCFAST_DISABLE; + 470 .loc 1 296 24 is_stmt 0 view .LVU151 + 471 0078 0393 str r3, [sp, #12] + 297:Core/Src/main.c **** if (HAL_TIM_PWM_ConfigChannel(&htim2, &sConfigOC, TIM_CHANNEL_1) != HAL_OK) + 472 .loc 1 297 3 is_stmt 1 view .LVU152 + ARM GAS /tmp/ccOqAezw.s page 20 + + + 297:Core/Src/main.c **** if (HAL_TIM_PWM_ConfigChannel(&htim2, &sConfigOC, TIM_CHANNEL_1) != HAL_OK) + 473 .loc 1 297 24 is_stmt 0 view .LVU153 + 474 007a 0593 str r3, [sp, #20] + 298:Core/Src/main.c **** { + 475 .loc 1 298 3 is_stmt 1 view .LVU154 + 298:Core/Src/main.c **** { + 476 .loc 1 298 7 is_stmt 0 view .LVU155 + 477 007c 1348 ldr r0, .L35 + 478 007e 0022 movs r2, #0 + 479 0080 01A9 add r1, sp, #4 + 480 0082 FFF7FEFF bl HAL_TIM_PWM_ConfigChannel + 481 .LVL16: + 298:Core/Src/main.c **** { + 482 .loc 1 298 6 discriminator 1 view .LVU156 + 483 0086 0028 cmp r0, #0 + 484 0088 1AD1 bne .L32 + 302:Core/Src/main.c **** { + 485 .loc 1 302 3 is_stmt 1 view .LVU157 + 302:Core/Src/main.c **** { + 486 .loc 1 302 7 is_stmt 0 view .LVU158 + 487 008a 1048 ldr r0, .L35 + 488 008c 0422 movs r2, #4 + 489 008e 01A9 add r1, sp, #4 + 490 0090 FFF7FEFF bl HAL_TIM_PWM_ConfigChannel + 491 .LVL17: + 302:Core/Src/main.c **** { + 492 .loc 1 302 6 discriminator 1 view .LVU159 + 493 0094 0028 cmp r0, #0 + 494 0096 15D1 bne .L33 + 306:Core/Src/main.c **** { + 495 .loc 1 306 3 is_stmt 1 view .LVU160 + 306:Core/Src/main.c **** { + 496 .loc 1 306 7 is_stmt 0 view .LVU161 + 497 0098 0C48 ldr r0, .L35 + 498 009a 0822 movs r2, #8 + 499 009c 01A9 add r1, sp, #4 + 500 009e FFF7FEFF bl HAL_TIM_PWM_ConfigChannel + 501 .LVL18: + 306:Core/Src/main.c **** { + 502 .loc 1 306 6 discriminator 1 view .LVU162 + 503 00a2 0028 cmp r0, #0 + 504 00a4 10D1 bne .L34 + 313:Core/Src/main.c **** + 505 .loc 1 313 3 is_stmt 1 view .LVU163 + 506 00a6 0948 ldr r0, .L35 + 507 00a8 FFF7FEFF bl HAL_TIM_MspPostInit + 508 .LVL19: + 315:Core/Src/main.c **** + 509 .loc 1 315 1 is_stmt 0 view .LVU164 + 510 00ac 0FB0 add sp, sp, #60 + 511 @ sp needed + 512 00ae 00BD pop {pc} + 513 .L28: + 277:Core/Src/main.c **** } + 514 .loc 1 277 5 is_stmt 1 view .LVU165 + 515 00b0 FFF7FEFF bl Error_Handler + 516 .LVL20: + ARM GAS /tmp/ccOqAezw.s page 21 + + + 517 .L29: + 282:Core/Src/main.c **** } + 518 .loc 1 282 5 view .LVU166 + 519 00b4 FFF7FEFF bl Error_Handler + 520 .LVL21: + 521 .L30: + 286:Core/Src/main.c **** } + 522 .loc 1 286 5 view .LVU167 + 523 00b8 FFF7FEFF bl Error_Handler + 524 .LVL22: + 525 .L31: + 292:Core/Src/main.c **** } + 526 .loc 1 292 5 view .LVU168 + 527 00bc FFF7FEFF bl Error_Handler + 528 .LVL23: + 529 .L32: + 300:Core/Src/main.c **** } + 530 .loc 1 300 5 view .LVU169 + 531 00c0 FFF7FEFF bl Error_Handler + 532 .LVL24: + 533 .L33: + 304:Core/Src/main.c **** } + 534 .loc 1 304 5 view .LVU170 + 535 00c4 FFF7FEFF bl Error_Handler + 536 .LVL25: + 537 .L34: + 308:Core/Src/main.c **** } + 538 .loc 1 308 5 view .LVU171 + 539 00c8 FFF7FEFF bl Error_Handler + 540 .LVL26: + 541 .L36: + 542 .align 2 + 543 .L35: + 544 00cc 00000000 .word htim2 + 545 .cfi_endproc + 546 .LFE44: + 548 .section .text.SystemClock_Config,"ax",%progbits + 549 .align 1 + 550 .global SystemClock_Config + 551 .syntax unified + 552 .code 16 + 553 .thumb_func + 555 SystemClock_Config: + 556 .LFB41: + 119:Core/Src/main.c **** RCC_OscInitTypeDef RCC_OscInitStruct = {0}; + 557 .loc 1 119 1 view -0 + 558 .cfi_startproc + 559 @ args = 0, pretend = 0, frame = 72 + 560 @ frame_needed = 0, uses_anonymous_args = 0 + 561 0000 10B5 push {r4, lr} + 562 .cfi_def_cfa_offset 8 + 563 .cfi_offset 4, -8 + 564 .cfi_offset 14, -4 + 565 0002 92B0 sub sp, sp, #72 + 566 .cfi_def_cfa_offset 80 + 120:Core/Src/main.c **** RCC_ClkInitTypeDef RCC_ClkInitStruct = {0}; + 567 .loc 1 120 3 view .LVU173 + ARM GAS /tmp/ccOqAezw.s page 22 + + + 120:Core/Src/main.c **** RCC_ClkInitTypeDef RCC_ClkInitStruct = {0}; + 568 .loc 1 120 22 is_stmt 0 view .LVU174 + 569 0004 3422 movs r2, #52 + 570 0006 0021 movs r1, #0 + 571 0008 05A8 add r0, sp, #20 + 572 000a FFF7FEFF bl memset + 573 .LVL27: + 121:Core/Src/main.c **** + 574 .loc 1 121 3 is_stmt 1 view .LVU175 + 121:Core/Src/main.c **** + 575 .loc 1 121 22 is_stmt 0 view .LVU176 + 576 000e 1024 movs r4, #16 + 577 0010 1022 movs r2, #16 + 578 0012 0021 movs r1, #0 + 579 0014 01A8 add r0, sp, #4 + 580 0016 FFF7FEFF bl memset + 581 .LVL28: + 126:Core/Src/main.c **** RCC_OscInitStruct.HSIState = RCC_HSI_ON; + 582 .loc 1 126 3 is_stmt 1 view .LVU177 + 126:Core/Src/main.c **** RCC_OscInitStruct.HSIState = RCC_HSI_ON; + 583 .loc 1 126 36 is_stmt 0 view .LVU178 + 584 001a 1223 movs r3, #18 + 585 001c 0593 str r3, [sp, #20] + 127:Core/Src/main.c **** RCC_OscInitStruct.HSI14State = RCC_HSI14_ON; + 586 .loc 1 127 3 is_stmt 1 view .LVU179 + 127:Core/Src/main.c **** RCC_OscInitStruct.HSI14State = RCC_HSI14_ON; + 587 .loc 1 127 30 is_stmt 0 view .LVU180 + 588 001e 113B subs r3, r3, #17 + 589 0020 0893 str r3, [sp, #32] + 128:Core/Src/main.c **** RCC_OscInitStruct.HSICalibrationValue = RCC_HSICALIBRATION_DEFAULT; + 590 .loc 1 128 3 is_stmt 1 view .LVU181 + 128:Core/Src/main.c **** RCC_OscInitStruct.HSICalibrationValue = RCC_HSICALIBRATION_DEFAULT; + 591 .loc 1 128 32 is_stmt 0 view .LVU182 + 592 0022 0A93 str r3, [sp, #40] + 129:Core/Src/main.c **** RCC_OscInitStruct.HSI14CalibrationValue = 16; + 593 .loc 1 129 3 is_stmt 1 view .LVU183 + 129:Core/Src/main.c **** RCC_OscInitStruct.HSI14CalibrationValue = 16; + 594 .loc 1 129 41 is_stmt 0 view .LVU184 + 595 0024 0994 str r4, [sp, #36] + 130:Core/Src/main.c **** RCC_OscInitStruct.PLL.PLLState = RCC_PLL_NONE; + 596 .loc 1 130 3 is_stmt 1 view .LVU185 + 130:Core/Src/main.c **** RCC_OscInitStruct.PLL.PLLState = RCC_PLL_NONE; + 597 .loc 1 130 43 is_stmt 0 view .LVU186 + 598 0026 0B94 str r4, [sp, #44] + 131:Core/Src/main.c **** if (HAL_RCC_OscConfig(&RCC_OscInitStruct) != HAL_OK) + 599 .loc 1 131 3 is_stmt 1 view .LVU187 + 132:Core/Src/main.c **** { + 600 .loc 1 132 3 view .LVU188 + 132:Core/Src/main.c **** { + 601 .loc 1 132 7 is_stmt 0 view .LVU189 + 602 0028 05A8 add r0, sp, #20 + 603 002a FFF7FEFF bl HAL_RCC_OscConfig + 604 .LVL29: + 132:Core/Src/main.c **** { + 605 .loc 1 132 6 discriminator 1 view .LVU190 + 606 002e 0028 cmp r0, #0 + 607 0030 0DD1 bne .L40 + ARM GAS /tmp/ccOqAezw.s page 23 + + + 139:Core/Src/main.c **** |RCC_CLOCKTYPE_PCLK1; + 608 .loc 1 139 3 is_stmt 1 view .LVU191 + 139:Core/Src/main.c **** |RCC_CLOCKTYPE_PCLK1; + 609 .loc 1 139 31 is_stmt 0 view .LVU192 + 610 0032 0723 movs r3, #7 + 611 0034 0193 str r3, [sp, #4] + 141:Core/Src/main.c **** RCC_ClkInitStruct.AHBCLKDivider = RCC_SYSCLK_DIV1; + 612 .loc 1 141 3 is_stmt 1 view .LVU193 + 141:Core/Src/main.c **** RCC_ClkInitStruct.AHBCLKDivider = RCC_SYSCLK_DIV1; + 613 .loc 1 141 34 is_stmt 0 view .LVU194 + 614 0036 0023 movs r3, #0 + 615 0038 0293 str r3, [sp, #8] + 142:Core/Src/main.c **** RCC_ClkInitStruct.APB1CLKDivider = RCC_HCLK_DIV1; + 616 .loc 1 142 3 is_stmt 1 view .LVU195 + 142:Core/Src/main.c **** RCC_ClkInitStruct.APB1CLKDivider = RCC_HCLK_DIV1; + 617 .loc 1 142 35 is_stmt 0 view .LVU196 + 618 003a 0393 str r3, [sp, #12] + 143:Core/Src/main.c **** + 619 .loc 1 143 3 is_stmt 1 view .LVU197 + 143:Core/Src/main.c **** + 620 .loc 1 143 36 is_stmt 0 view .LVU198 + 621 003c 0493 str r3, [sp, #16] + 145:Core/Src/main.c **** { + 622 .loc 1 145 3 is_stmt 1 view .LVU199 + 145:Core/Src/main.c **** { + 623 .loc 1 145 7 is_stmt 0 view .LVU200 + 624 003e 0021 movs r1, #0 + 625 0040 01A8 add r0, sp, #4 + 626 0042 FFF7FEFF bl HAL_RCC_ClockConfig + 627 .LVL30: + 145:Core/Src/main.c **** { + 628 .loc 1 145 6 discriminator 1 view .LVU201 + 629 0046 0028 cmp r0, #0 + 630 0048 03D1 bne .L41 + 149:Core/Src/main.c **** + 631 .loc 1 149 1 view .LVU202 + 632 004a 12B0 add sp, sp, #72 + 633 @ sp needed + 634 004c 10BD pop {r4, pc} + 635 .L40: + 134:Core/Src/main.c **** } + 636 .loc 1 134 5 is_stmt 1 view .LVU203 + 637 004e FFF7FEFF bl Error_Handler + 638 .LVL31: + 639 .L41: + 147:Core/Src/main.c **** } + 640 .loc 1 147 5 view .LVU204 + 641 0052 FFF7FEFF bl Error_Handler + 642 .LVL32: + 643 .cfi_endproc + 644 .LFE41: + 646 .section .text.main,"ax",%progbits + 647 .align 1 + 648 .global main + 649 .syntax unified + 650 .code 16 + 651 .thumb_func + ARM GAS /tmp/ccOqAezw.s page 24 + + + 653 main: + 654 .LFB40: + 73:Core/Src/main.c **** /* USER CODE BEGIN 1 */ + 655 .loc 1 73 1 view -0 + 656 .cfi_startproc + 657 @ Volatile: function does not return. + 658 @ args = 0, pretend = 0, frame = 0 + 659 @ frame_needed = 0, uses_anonymous_args = 0 + 660 0000 10B5 push {r4, lr} + 661 .cfi_def_cfa_offset 8 + 662 .cfi_offset 4, -8 + 663 .cfi_offset 14, -4 + 81:Core/Src/main.c **** + 664 .loc 1 81 3 view .LVU206 + 665 0002 FFF7FEFF bl HAL_Init + 666 .LVL33: + 88:Core/Src/main.c **** + 667 .loc 1 88 3 view .LVU207 + 668 0006 FFF7FEFF bl SystemClock_Config + 669 .LVL34: + 95:Core/Src/main.c **** MX_ADC_Init(); + 670 .loc 1 95 3 view .LVU208 + 671 000a FFF7FEFF bl MX_GPIO_Init + 672 .LVL35: + 96:Core/Src/main.c **** MX_CAN_Init(); + 673 .loc 1 96 3 view .LVU209 + 674 000e FFF7FEFF bl MX_ADC_Init + 675 .LVL36: + 97:Core/Src/main.c **** MX_TIM2_Init(); + 676 .loc 1 97 3 view .LVU210 + 677 0012 FFF7FEFF bl MX_CAN_Init + 678 .LVL37: + 98:Core/Src/main.c **** /* USER CODE BEGIN 2 */ + 679 .loc 1 98 3 view .LVU211 + 680 0016 FFF7FEFF bl MX_TIM2_Init + 681 .LVL38: + 682 .L43: + 105:Core/Src/main.c **** { + 683 .loc 1 105 3 view .LVU212 + 110:Core/Src/main.c **** /* USER CODE END 3 */ + 684 .loc 1 110 3 view .LVU213 + 105:Core/Src/main.c **** { + 685 .loc 1 105 9 view .LVU214 + 686 001a FEE7 b .L43 + 687 .cfi_endproc + 688 .LFE40: + 690 .global htim2 + 691 .section .bss.htim2,"aw",%nobits + 692 .align 2 + 695 htim2: + 696 0000 00000000 .space 72 + 696 00000000 + 696 00000000 + 696 00000000 + 696 00000000 + 697 .global hcan + 698 .section .bss.hcan,"aw",%nobits + ARM GAS /tmp/ccOqAezw.s page 25 + + + 699 .align 2 + 702 hcan: + 703 0000 00000000 .space 40 + 703 00000000 + 703 00000000 + 703 00000000 + 703 00000000 + 704 .global hadc + 705 .section .bss.hadc,"aw",%nobits + 706 .align 2 + 709 hadc: + 710 0000 00000000 .space 64 + 710 00000000 + 710 00000000 + 710 00000000 + 710 00000000 + 711 .text + 712 .Letext0: + 713 .file 3 "/home/chiangni/.config/VSCodium/User/globalStorage/bmd.stm32-for-vscode/@xpack-dev-tools/ + 714 .file 4 "/home/chiangni/.config/VSCodium/User/globalStorage/bmd.stm32-for-vscode/@xpack-dev-tools/ + 715 .file 5 "Drivers/CMSIS/Device/ST/STM32F0xx/Include/stm32f042x6.h" + 716 .file 6 "Drivers/CMSIS/Device/ST/STM32F0xx/Include/stm32f0xx.h" + 717 .file 7 "Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_def.h" + 718 .file 8 "Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_rcc.h" + 719 .file 9 "Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_dma.h" + 720 .file 10 "Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_adc.h" + 721 .file 11 "Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_can.h" + 722 .file 12 "Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_tim.h" + 723 .file 13 "Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_tim_ex.h" + 724 .file 14 "Core/Inc/main.h" + 725 .file 15 "Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal.h" + 726 .file 16 "" + ARM GAS /tmp/ccOqAezw.s page 26 + + +DEFINED SYMBOLS + *ABS*:00000000 main.c + /tmp/ccOqAezw.s:19 .text.MX_GPIO_Init:00000000 $t + /tmp/ccOqAezw.s:24 .text.MX_GPIO_Init:00000000 MX_GPIO_Init + /tmp/ccOqAezw.s:92 .text.MX_GPIO_Init:00000040 $d + /tmp/ccOqAezw.s:97 .text.Error_Handler:00000000 $t + /tmp/ccOqAezw.s:103 .text.Error_Handler:00000000 Error_Handler + /tmp/ccOqAezw.s:135 .text.MX_ADC_Init:00000000 $t + /tmp/ccOqAezw.s:140 .text.MX_ADC_Init:00000000 MX_ADC_Init + /tmp/ccOqAezw.s:271 .text.MX_ADC_Init:00000080 $d + /tmp/ccOqAezw.s:709 .bss.hadc:00000000 hadc + /tmp/ccOqAezw.s:277 .text.MX_CAN_Init:00000000 $t + /tmp/ccOqAezw.s:282 .text.MX_CAN_Init:00000000 MX_CAN_Init + /tmp/ccOqAezw.s:349 .text.MX_CAN_Init:00000030 $d + /tmp/ccOqAezw.s:702 .bss.hcan:00000000 hcan + /tmp/ccOqAezw.s:355 .text.MX_TIM2_Init:00000000 $t + /tmp/ccOqAezw.s:360 .text.MX_TIM2_Init:00000000 MX_TIM2_Init + /tmp/ccOqAezw.s:544 .text.MX_TIM2_Init:000000cc $d + /tmp/ccOqAezw.s:695 .bss.htim2:00000000 htim2 + /tmp/ccOqAezw.s:549 .text.SystemClock_Config:00000000 $t + /tmp/ccOqAezw.s:555 .text.SystemClock_Config:00000000 SystemClock_Config + /tmp/ccOqAezw.s:647 .text.main:00000000 $t + /tmp/ccOqAezw.s:653 .text.main:00000000 main + /tmp/ccOqAezw.s:692 .bss.htim2:00000000 $d + /tmp/ccOqAezw.s:699 .bss.hcan:00000000 $d + /tmp/ccOqAezw.s:706 .bss.hadc:00000000 $d + +UNDEFINED SYMBOLS +memset +HAL_ADC_Init +HAL_ADC_ConfigChannel +HAL_CAN_Init +HAL_TIM_Base_Init +HAL_TIM_ConfigClockSource +HAL_TIM_PWM_Init +HAL_TIMEx_MasterConfigSynchronization +HAL_TIM_PWM_ConfigChannel +HAL_TIM_MspPostInit +HAL_RCC_OscConfig +HAL_RCC_ClockConfig +HAL_Init diff --git a/Software/build/main.o b/Software/build/main.o new file mode 100644 index 0000000..6af8b6b Binary files /dev/null and b/Software/build/main.o differ diff --git a/Software/build/startup_stm32f042x6.d b/Software/build/startup_stm32f042x6.d new file mode 100644 index 0000000..435d9ac --- /dev/null +++ b/Software/build/startup_stm32f042x6.d @@ -0,0 +1 @@ +build/startup_stm32f042x6.o: startup_stm32f042x6.s diff --git a/Software/build/startup_stm32f042x6.o b/Software/build/startup_stm32f042x6.o new file mode 100644 index 0000000..5b1568b Binary files /dev/null and b/Software/build/startup_stm32f042x6.o differ diff --git a/Software/build/stm32f0xx_hal.d b/Software/build/stm32f0xx_hal.d new file mode 100644 index 0000000..fddd664 --- /dev/null +++ b/Software/build/stm32f0xx_hal.d @@ -0,0 +1,59 @@ +build/stm32f0xx_hal.o: Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal.c \ + Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal.h \ + Core/Inc/stm32f0xx_hal_conf.h \ + Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_rcc.h \ + Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_def.h \ + Drivers/CMSIS/Device/ST/STM32F0xx/Include/stm32f0xx.h \ + Drivers/CMSIS/Device/ST/STM32F0xx/Include/stm32f042x6.h \ + Drivers/CMSIS/Include/core_cm0.h Drivers/CMSIS/Include/cmsis_version.h \ + Drivers/CMSIS/Include/cmsis_compiler.h Drivers/CMSIS/Include/cmsis_gcc.h \ + Drivers/CMSIS/Device/ST/STM32F0xx/Include/system_stm32f0xx.h \ + Drivers/STM32F0xx_HAL_Driver/Inc/Legacy/stm32_hal_legacy.h \ + Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_rcc_ex.h \ + Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_gpio.h \ + Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_gpio_ex.h \ + Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_exti.h \ + Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_dma.h \ + Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_dma_ex.h \ + Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_cortex.h \ + Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_adc.h \ + Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_adc_ex.h \ + Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_can.h \ + Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_flash.h \ + Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_flash_ex.h \ + Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_i2c.h \ + Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_i2c_ex.h \ + Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_pwr.h \ + Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_pwr_ex.h \ + Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_tim.h \ + Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_tim_ex.h +Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal.h: +Core/Inc/stm32f0xx_hal_conf.h: +Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_rcc.h: +Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_def.h: +Drivers/CMSIS/Device/ST/STM32F0xx/Include/stm32f0xx.h: +Drivers/CMSIS/Device/ST/STM32F0xx/Include/stm32f042x6.h: +Drivers/CMSIS/Include/core_cm0.h: +Drivers/CMSIS/Include/cmsis_version.h: +Drivers/CMSIS/Include/cmsis_compiler.h: +Drivers/CMSIS/Include/cmsis_gcc.h: +Drivers/CMSIS/Device/ST/STM32F0xx/Include/system_stm32f0xx.h: +Drivers/STM32F0xx_HAL_Driver/Inc/Legacy/stm32_hal_legacy.h: +Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_rcc_ex.h: +Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_gpio.h: +Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_gpio_ex.h: +Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_exti.h: +Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_dma.h: +Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_dma_ex.h: +Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_cortex.h: +Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_adc.h: +Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_adc_ex.h: +Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_can.h: +Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_flash.h: +Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_flash_ex.h: +Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_i2c.h: +Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_i2c_ex.h: +Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_pwr.h: +Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_pwr_ex.h: +Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_tim.h: +Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_tim_ex.h: diff --git a/Software/build/stm32f0xx_hal.lst b/Software/build/stm32f0xx_hal.lst new file mode 100644 index 0000000..0051b3e --- /dev/null +++ b/Software/build/stm32f0xx_hal.lst @@ -0,0 +1,1504 @@ +ARM GAS /tmp/ccbMHxuA.s page 1 + + + 1 .cpu cortex-m0 + 2 .arch armv6s-m + 3 .fpu softvfp + 4 .eabi_attribute 20, 1 + 5 .eabi_attribute 21, 1 + 6 .eabi_attribute 23, 3 + 7 .eabi_attribute 24, 1 + 8 .eabi_attribute 25, 1 + 9 .eabi_attribute 26, 1 + 10 .eabi_attribute 30, 1 + 11 .eabi_attribute 34, 0 + 12 .eabi_attribute 18, 4 + 13 .file "stm32f0xx_hal.c" + 14 .text + 15 .Ltext0: + 16 .cfi_sections .debug_frame + 17 .file 1 "Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal.c" + 18 .section .text.HAL_MspInit,"ax",%progbits + 19 .align 1 + 20 .weak HAL_MspInit + 21 .syntax unified + 22 .code 16 + 23 .thumb_func + 25 HAL_MspInit: + 26 .LFB42: + 1:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal.c **** /** + 2:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal.c **** ****************************************************************************** + 3:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal.c **** * @file stm32f0xx_hal.c + 4:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal.c **** * @author MCD Application Team + 5:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal.c **** * @brief HAL module driver. + 6:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal.c **** * This is the common part of the HAL initialization + 7:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal.c **** * + 8:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal.c **** ****************************************************************************** + 9:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal.c **** * @attention + 10:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal.c **** * + 11:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal.c **** * Copyright (c) 2016 STMicroelectronics. + 12:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal.c **** * All rights reserved. + 13:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal.c **** * + 14:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal.c **** * This software is licensed under terms that can be found in the LICENSE file + 15:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal.c **** * in the root directory of this software component. + 16:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal.c **** * If no LICENSE file comes with this software, it is provided AS-IS. + 17:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal.c **** * + 18:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal.c **** ****************************************************************************** + 19:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal.c **** @verbatim + 20:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal.c **** ============================================================================== + 21:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal.c **** ##### How to use this driver ##### + 22:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal.c **** ============================================================================== + 23:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal.c **** [..] + 24:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal.c **** The common HAL driver contains a set of generic and common APIs that can be + 25:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal.c **** used by the PPP peripheral drivers and the user to start using the HAL. + 26:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal.c **** [..] + 27:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal.c **** The HAL contains two APIs categories: + 28:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal.c **** (+) HAL Initialization and de-initialization functions + 29:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal.c **** (+) HAL Control functions + 30:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal.c **** + 31:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal.c **** @endverbatim + 32:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal.c **** ****************************************************************************** + ARM GAS /tmp/ccbMHxuA.s page 2 + + + 33:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal.c **** */ + 34:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal.c **** + 35:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal.c **** /* Includes ------------------------------------------------------------------*/ + 36:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal.c **** #include "stm32f0xx_hal.h" + 37:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal.c **** + 38:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal.c **** /** @addtogroup STM32F0xx_HAL_Driver + 39:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal.c **** * @{ + 40:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal.c **** */ + 41:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal.c **** + 42:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal.c **** /** @defgroup HAL HAL + 43:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal.c **** * @brief HAL module driver. + 44:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal.c **** * @{ + 45:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal.c **** */ + 46:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal.c **** + 47:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal.c **** #ifdef HAL_MODULE_ENABLED + 48:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal.c **** + 49:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal.c **** /* Private typedef -----------------------------------------------------------*/ + 50:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal.c **** /* Private define ------------------------------------------------------------*/ + 51:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal.c **** /** @defgroup HAL_Private_Constants HAL Private Constants + 52:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal.c **** * @{ + 53:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal.c **** */ + 54:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal.c **** /** + 55:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal.c **** * @brief STM32F0xx HAL Driver version number + 56:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal.c **** */ + 57:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal.c **** #define __STM32F0xx_HAL_VERSION_MAIN (0x01U) /*!< [31:24] main version */ + 58:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal.c **** #define __STM32F0xx_HAL_VERSION_SUB1 (0x07U) /*!< [23:16] sub1 version */ + 59:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal.c **** #define __STM32F0xx_HAL_VERSION_SUB2 (0x07U) /*!< [15:8] sub2 version */ + 60:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal.c **** #define __STM32F0xx_HAL_VERSION_RC (0x00U) /*!< [7:0] release candidate */ + 61:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal.c **** #define __STM32F0xx_HAL_VERSION ((__STM32F0xx_HAL_VERSION_MAIN << 24U)\ + 62:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal.c **** |(__STM32F0xx_HAL_VERSION_SUB1 << 16U)\ + 63:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal.c **** |(__STM32F0xx_HAL_VERSION_SUB2 << 8U )\ + 64:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal.c **** |(__STM32F0xx_HAL_VERSION_RC)) + 65:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal.c **** + 66:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal.c **** #define IDCODE_DEVID_MASK (0x00000FFFU) + 67:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal.c **** /** + 68:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal.c **** * @} + 69:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal.c **** */ + 70:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal.c **** + 71:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal.c **** /* Private macro -------------------------------------------------------------*/ + 72:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal.c **** /** @defgroup HAL_Private_Macros HAL Private Macros + 73:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal.c **** * @{ + 74:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal.c **** */ + 75:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal.c **** /** + 76:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal.c **** * @} + 77:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal.c **** */ + 78:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal.c **** + 79:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal.c **** /* Exported variables ---------------------------------------------------------*/ + 80:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal.c **** /** @defgroup HAL_Private_Variables HAL Exported Variables + 81:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal.c **** * @{ + 82:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal.c **** */ + 83:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal.c **** __IO uint32_t uwTick; + 84:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal.c **** uint32_t uwTickPrio = (1UL << __NVIC_PRIO_BITS); /* Invalid PRIO */ + 85:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal.c **** HAL_TickFreqTypeDef uwTickFreq = HAL_TICK_FREQ_DEFAULT; /* 1KHz */ + 86:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal.c **** /** + 87:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal.c **** * @} + 88:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal.c **** */ + 89:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal.c **** /* Private function prototypes -----------------------------------------------*/ + ARM GAS /tmp/ccbMHxuA.s page 3 + + + 90:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal.c **** /* Exported functions ---------------------------------------------------------*/ + 91:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal.c **** + 92:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal.c **** /** @defgroup HAL_Exported_Functions HAL Exported Functions + 93:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal.c **** * @{ + 94:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal.c **** */ + 95:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal.c **** + 96:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal.c **** /** @defgroup HAL_Exported_Functions_Group1 Initialization and de-initialization Functions + 97:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal.c **** * @brief Initialization and de-initialization functions + 98:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal.c **** * + 99:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal.c **** @verbatim + 100:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal.c **** =============================================================================== + 101:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal.c **** ##### Initialization and de-initialization functions ##### + 102:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal.c **** =============================================================================== + 103:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal.c **** [..] This section provides functions allowing to: + 104:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal.c **** (+) Initializes the Flash interface, the NVIC allocation and initial clock + 105:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal.c **** configuration. It initializes the systick also when timeout is needed + 106:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal.c **** and the backup domain when enabled. + 107:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal.c **** (+) de-Initializes common part of the HAL. + 108:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal.c **** (+) Configure The time base source to have 1ms time base with a dedicated + 109:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal.c **** Tick interrupt priority. + 110:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal.c **** (++) SysTick timer is used by default as source of time base, but user + 111:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal.c **** can eventually implement his proper time base source (a general purpose + 112:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal.c **** timer for example or other time source), keeping in mind that Time base + 113:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal.c **** duration should be kept 1ms since PPP_TIMEOUT_VALUEs are defined and + 114:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal.c **** handled in milliseconds basis. + 115:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal.c **** (++) Time base configuration function (HAL_InitTick ()) is called automatically + 116:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal.c **** at the beginning of the program after reset by HAL_Init() or at any time + 117:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal.c **** when clock is configured, by HAL_RCC_ClockConfig(). + 118:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal.c **** (++) Source of time base is configured to generate interrupts at regular + 119:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal.c **** time intervals. Care must be taken if HAL_Delay() is called from a + 120:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal.c **** peripheral ISR process, the Tick interrupt line must have higher priority + 121:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal.c **** (numerically lower) than the peripheral interrupt. Otherwise the caller + 122:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal.c **** ISR process will be blocked. + 123:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal.c **** (++) functions affecting time base configurations are declared as __Weak + 124:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal.c **** to make override possible in case of other implementations in user file. + 125:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal.c **** + 126:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal.c **** @endverbatim + 127:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal.c **** * @{ + 128:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal.c **** */ + 129:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal.c **** + 130:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal.c **** /** + 131:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal.c **** * @brief This function configures the Flash prefetch, + 132:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal.c **** * Configures time base source, NVIC and Low level hardware + 133:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal.c **** * @note This function is called at the beginning of program after reset and before + 134:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal.c **** * the clock configuration + 135:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal.c **** * @note The time base configuration is based on HSI clock when exiting from Reset. + 136:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal.c **** * Once done, time base tick start incrementing. + 137:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal.c **** * In the default implementation,Systick is used as source of time base. + 138:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal.c **** * The tick variable is incremented each 1ms in its ISR. + 139:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal.c **** * @retval HAL status + 140:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal.c **** */ + 141:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal.c **** HAL_StatusTypeDef HAL_Init(void) + 142:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal.c **** { + 143:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal.c **** /* Configure Flash prefetch */ + 144:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal.c **** #if (PREFETCH_ENABLE != 0) + 145:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal.c **** __HAL_FLASH_PREFETCH_BUFFER_ENABLE(); + 146:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal.c **** #endif /* PREFETCH_ENABLE */ + ARM GAS /tmp/ccbMHxuA.s page 4 + + + 147:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal.c **** + 148:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal.c **** /* Use systick as time base source and configure 1ms tick (default clock after Reset is HSI) */ + 149:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal.c **** + 150:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal.c **** HAL_InitTick(TICK_INT_PRIORITY); + 151:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal.c **** + 152:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal.c **** /* Init the low level hardware */ + 153:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal.c **** HAL_MspInit(); + 154:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal.c **** + 155:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal.c **** /* Return function status */ + 156:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal.c **** return HAL_OK; + 157:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal.c **** } + 158:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal.c **** + 159:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal.c **** /** + 160:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal.c **** * @brief This function de-Initialize common part of the HAL and stops the SysTick + 161:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal.c **** * of time base. + 162:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal.c **** * @note This function is optional. + 163:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal.c **** * @retval HAL status + 164:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal.c **** */ + 165:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal.c **** HAL_StatusTypeDef HAL_DeInit(void) + 166:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal.c **** { + 167:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal.c **** /* Reset of all peripherals */ + 168:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal.c **** __HAL_RCC_APB1_FORCE_RESET(); + 169:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal.c **** __HAL_RCC_APB1_RELEASE_RESET(); + 170:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal.c **** + 171:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal.c **** __HAL_RCC_APB2_FORCE_RESET(); + 172:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal.c **** __HAL_RCC_APB2_RELEASE_RESET(); + 173:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal.c **** + 174:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal.c **** __HAL_RCC_AHB_FORCE_RESET(); + 175:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal.c **** __HAL_RCC_AHB_RELEASE_RESET(); + 176:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal.c **** + 177:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal.c **** /* De-Init the low level hardware */ + 178:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal.c **** HAL_MspDeInit(); + 179:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal.c **** + 180:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal.c **** /* Return function status */ + 181:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal.c **** return HAL_OK; + 182:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal.c **** } + 183:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal.c **** + 184:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal.c **** /** + 185:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal.c **** * @brief Initialize the MSP. + 186:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal.c **** * @retval None + 187:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal.c **** */ + 188:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal.c **** __weak void HAL_MspInit(void) + 189:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal.c **** { + 27 .loc 1 189 1 view -0 + 28 .cfi_startproc + 29 @ args = 0, pretend = 0, frame = 0 + 30 @ frame_needed = 0, uses_anonymous_args = 0 + 31 @ link register save eliminated. + 190:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal.c **** /* NOTE : This function should not be modified, when the callback is needed, + 191:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal.c **** the HAL_MspInit could be implemented in the user file + 192:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal.c **** */ + 193:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal.c **** } + 32 .loc 1 193 1 view .LVU1 + 33 @ sp needed + 34 0000 7047 bx lr + 35 .cfi_endproc + 36 .LFE42: + ARM GAS /tmp/ccbMHxuA.s page 5 + + + 38 .section .text.HAL_MspDeInit,"ax",%progbits + 39 .align 1 + 40 .weak HAL_MspDeInit + 41 .syntax unified + 42 .code 16 + 43 .thumb_func + 45 HAL_MspDeInit: + 46 .LFB43: + 194:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal.c **** + 195:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal.c **** /** + 196:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal.c **** * @brief DeInitializes the MSP. + 197:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal.c **** * @retval None + 198:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal.c **** */ + 199:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal.c **** __weak void HAL_MspDeInit(void) + 200:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal.c **** { + 47 .loc 1 200 1 view -0 + 48 .cfi_startproc + 49 @ args = 0, pretend = 0, frame = 0 + 50 @ frame_needed = 0, uses_anonymous_args = 0 + 51 @ link register save eliminated. + 201:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal.c **** /* NOTE : This function should not be modified, when the callback is needed, + 202:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal.c **** the HAL_MspDeInit could be implemented in the user file + 203:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal.c **** */ + 204:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal.c **** } + 52 .loc 1 204 1 view .LVU3 + 53 @ sp needed + 54 0000 7047 bx lr + 55 .cfi_endproc + 56 .LFE43: + 58 .section .text.HAL_DeInit,"ax",%progbits + 59 .align 1 + 60 .global HAL_DeInit + 61 .syntax unified + 62 .code 16 + 63 .thumb_func + 65 HAL_DeInit: + 66 .LFB41: + 166:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal.c **** /* Reset of all peripherals */ + 67 .loc 1 166 1 view -0 + 68 .cfi_startproc + 69 @ args = 0, pretend = 0, frame = 0 + 70 @ frame_needed = 0, uses_anonymous_args = 0 + 71 0000 10B5 push {r4, lr} + 72 .cfi_def_cfa_offset 8 + 73 .cfi_offset 4, -8 + 74 .cfi_offset 14, -4 + 168:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal.c **** __HAL_RCC_APB1_RELEASE_RESET(); + 75 .loc 1 168 3 view .LVU5 + 76 0002 074B ldr r3, .L4 + 77 0004 0121 movs r1, #1 + 78 0006 4942 rsbs r1, r1, #0 + 79 0008 1961 str r1, [r3, #16] + 169:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal.c **** + 80 .loc 1 169 3 view .LVU6 + 81 000a 0022 movs r2, #0 + 82 000c 1A61 str r2, [r3, #16] + 171:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal.c **** __HAL_RCC_APB2_RELEASE_RESET(); + ARM GAS /tmp/ccbMHxuA.s page 6 + + + 83 .loc 1 171 3 view .LVU7 + 84 000e D960 str r1, [r3, #12] + 172:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal.c **** + 85 .loc 1 172 3 view .LVU8 + 86 0010 DA60 str r2, [r3, #12] + 174:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal.c **** __HAL_RCC_AHB_RELEASE_RESET(); + 87 .loc 1 174 3 view .LVU9 + 88 0012 9962 str r1, [r3, #40] + 175:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal.c **** + 89 .loc 1 175 3 view .LVU10 + 90 0014 9A62 str r2, [r3, #40] + 178:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal.c **** + 91 .loc 1 178 3 view .LVU11 + 92 0016 FFF7FEFF bl HAL_MspDeInit + 93 .LVL0: + 181:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal.c **** } + 94 .loc 1 181 3 view .LVU12 + 182:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal.c **** + 95 .loc 1 182 1 is_stmt 0 view .LVU13 + 96 001a 0020 movs r0, #0 + 97 @ sp needed + 98 001c 10BD pop {r4, pc} + 99 .L5: + 100 001e C046 .align 2 + 101 .L4: + 102 0020 00100240 .word 1073876992 + 103 .cfi_endproc + 104 .LFE41: + 106 .global __aeabi_uidiv + 107 .section .text.HAL_InitTick,"ax",%progbits + 108 .align 1 + 109 .weak HAL_InitTick + 110 .syntax unified + 111 .code 16 + 112 .thumb_func + 114 HAL_InitTick: + 115 .LVL1: + 116 .LFB44: + 205:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal.c **** + 206:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal.c **** /** + 207:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal.c **** * @brief This function configures the source of the time base. + 208:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal.c **** * The time source is configured to have 1ms time base with a dedicated + 209:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal.c **** * Tick interrupt priority. + 210:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal.c **** * @note This function is called automatically at the beginning of program after + 211:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal.c **** * reset by HAL_Init() or at any time when clock is reconfigured by HAL_RCC_ClockConfig(). + 212:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal.c **** * @note In the default implementation, SysTick timer is the source of time base. + 213:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal.c **** * It is used to generate interrupts at regular time intervals. + 214:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal.c **** * Care must be taken if HAL_Delay() is called from a peripheral ISR process, + 215:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal.c **** * The SysTick interrupt must have higher priority (numerically lower) + 216:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal.c **** * than the peripheral interrupt. Otherwise the caller ISR process will be blocked. + 217:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal.c **** * The function is declared as __Weak to be overwritten in case of other + 218:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal.c **** * implementation in user file. + 219:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal.c **** * @param TickPriority Tick interrupt priority. + 220:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal.c **** * @retval HAL status + 221:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal.c **** */ + 222:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal.c **** __weak HAL_StatusTypeDef HAL_InitTick(uint32_t TickPriority) + 223:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal.c **** { + ARM GAS /tmp/ccbMHxuA.s page 7 + + + 117 .loc 1 223 1 is_stmt 1 view -0 + 118 .cfi_startproc + 119 @ args = 0, pretend = 0, frame = 0 + 120 @ frame_needed = 0, uses_anonymous_args = 0 + 121 .loc 1 223 1 is_stmt 0 view .LVU15 + 122 0000 10B5 push {r4, lr} + 123 .cfi_def_cfa_offset 8 + 124 .cfi_offset 4, -8 + 125 .cfi_offset 14, -4 + 126 0002 0400 movs r4, r0 + 224:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal.c **** /*Configure the SysTick to have interrupt in 1ms time basis*/ + 225:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal.c **** if (HAL_SYSTICK_Config(SystemCoreClock / (1000U / uwTickFreq)) > 0U) + 127 .loc 1 225 3 is_stmt 1 view .LVU16 + 128 .loc 1 225 51 is_stmt 0 view .LVU17 + 129 0004 0F4B ldr r3, .L11 + 130 0006 1978 ldrb r1, [r3] + 131 0008 FA20 movs r0, #250 + 132 .LVL2: + 133 .loc 1 225 51 view .LVU18 + 134 000a 8000 lsls r0, r0, #2 + 135 000c FFF7FEFF bl __aeabi_uidiv + 136 .LVL3: + 137 0010 0100 movs r1, r0 + 138 .loc 1 225 7 view .LVU19 + 139 0012 0D4B ldr r3, .L11+4 + 140 0014 1868 ldr r0, [r3] + 141 0016 FFF7FEFF bl __aeabi_uidiv + 142 .LVL4: + 143 001a FFF7FEFF bl HAL_SYSTICK_Config + 144 .LVL5: + 145 .loc 1 225 6 discriminator 1 view .LVU20 + 146 001e 0028 cmp r0, #0 + 147 0020 0DD1 bne .L8 + 226:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal.c **** { + 227:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal.c **** return HAL_ERROR; + 228:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal.c **** } + 229:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal.c **** + 230:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal.c **** /* Configure the SysTick IRQ priority */ + 231:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal.c **** if (TickPriority < (1UL << __NVIC_PRIO_BITS)) + 148 .loc 1 231 3 is_stmt 1 view .LVU21 + 149 .loc 1 231 6 is_stmt 0 view .LVU22 + 150 0022 032C cmp r4, #3 + 151 0024 01D9 bls .L10 + 232:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal.c **** { + 233:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal.c **** HAL_NVIC_SetPriority(SysTick_IRQn, TickPriority, 0U); + 234:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal.c **** uwTickPrio = TickPriority; + 235:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal.c **** } + 236:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal.c **** else + 237:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal.c **** { + 238:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal.c **** return HAL_ERROR; + 152 .loc 1 238 12 view .LVU23 + 153 0026 0120 movs r0, #1 + 154 0028 0AE0 b .L7 + 155 .L10: + 233:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal.c **** uwTickPrio = TickPriority; + 156 .loc 1 233 5 is_stmt 1 view .LVU24 + 157 002a 0130 adds r0, r0, #1 + ARM GAS /tmp/ccbMHxuA.s page 8 + + + 158 002c 0022 movs r2, #0 + 159 002e 2100 movs r1, r4 + 160 0030 4042 rsbs r0, r0, #0 + 161 0032 FFF7FEFF bl HAL_NVIC_SetPriority + 162 .LVL6: + 234:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal.c **** } + 163 .loc 1 234 5 view .LVU25 + 234:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal.c **** } + 164 .loc 1 234 16 is_stmt 0 view .LVU26 + 165 0036 054B ldr r3, .L11+8 + 166 0038 1C60 str r4, [r3] + 239:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal.c **** } + 240:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal.c **** + 241:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal.c **** /* Return function status */ + 242:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal.c **** return HAL_OK; + 167 .loc 1 242 3 is_stmt 1 view .LVU27 + 168 .loc 1 242 10 is_stmt 0 view .LVU28 + 169 003a 0020 movs r0, #0 + 170 003c 00E0 b .L7 + 171 .L8: + 227:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal.c **** } + 172 .loc 1 227 12 view .LVU29 + 173 003e 0120 movs r0, #1 + 174 .L7: + 243:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal.c **** } + 175 .loc 1 243 1 view .LVU30 + 176 @ sp needed + 177 .LVL7: + 178 .loc 1 243 1 view .LVU31 + 179 0040 10BD pop {r4, pc} + 180 .L12: + 181 0042 C046 .align 2 + 182 .L11: + 183 0044 00000000 .word uwTickFreq + 184 0048 00000000 .word SystemCoreClock + 185 004c 00000000 .word uwTickPrio + 186 .cfi_endproc + 187 .LFE44: + 189 .section .text.HAL_Init,"ax",%progbits + 190 .align 1 + 191 .global HAL_Init + 192 .syntax unified + 193 .code 16 + 194 .thumb_func + 196 HAL_Init: + 197 .LFB40: + 142:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal.c **** /* Configure Flash prefetch */ + 198 .loc 1 142 1 is_stmt 1 view -0 + 199 .cfi_startproc + 200 @ args = 0, pretend = 0, frame = 0 + 201 @ frame_needed = 0, uses_anonymous_args = 0 + 202 0000 10B5 push {r4, lr} + 203 .cfi_def_cfa_offset 8 + 204 .cfi_offset 4, -8 + 205 .cfi_offset 14, -4 + 145:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal.c **** #endif /* PREFETCH_ENABLE */ + 206 .loc 1 145 3 view .LVU33 + ARM GAS /tmp/ccbMHxuA.s page 9 + + + 207 0002 064A ldr r2, .L14 + 208 0004 1368 ldr r3, [r2] + 209 0006 1021 movs r1, #16 + 210 0008 0B43 orrs r3, r1 + 211 000a 1360 str r3, [r2] + 150:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal.c **** + 212 .loc 1 150 3 view .LVU34 + 213 000c 0320 movs r0, #3 + 214 000e FFF7FEFF bl HAL_InitTick + 215 .LVL8: + 153:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal.c **** + 216 .loc 1 153 3 view .LVU35 + 217 0012 FFF7FEFF bl HAL_MspInit + 218 .LVL9: + 156:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal.c **** } + 219 .loc 1 156 3 view .LVU36 + 157:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal.c **** + 220 .loc 1 157 1 is_stmt 0 view .LVU37 + 221 0016 0020 movs r0, #0 + 222 @ sp needed + 223 0018 10BD pop {r4, pc} + 224 .L15: + 225 001a C046 .align 2 + 226 .L14: + 227 001c 00200240 .word 1073881088 + 228 .cfi_endproc + 229 .LFE40: + 231 .section .text.HAL_IncTick,"ax",%progbits + 232 .align 1 + 233 .weak HAL_IncTick + 234 .syntax unified + 235 .code 16 + 236 .thumb_func + 238 HAL_IncTick: + 239 .LFB45: + 244:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal.c **** + 245:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal.c **** /** + 246:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal.c **** * @} + 247:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal.c **** */ + 248:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal.c **** + 249:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal.c **** /** @defgroup HAL_Exported_Functions_Group2 HAL Control functions + 250:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal.c **** * @brief HAL Control functions + 251:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal.c **** * + 252:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal.c **** @verbatim + 253:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal.c **** =============================================================================== + 254:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal.c **** ##### HAL Control functions ##### + 255:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal.c **** =============================================================================== + 256:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal.c **** [..] This section provides functions allowing to: + 257:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal.c **** (+) Provide a tick value in millisecond + 258:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal.c **** (+) Provide a blocking delay in millisecond + 259:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal.c **** (+) Suspend the time base source interrupt + 260:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal.c **** (+) Resume the time base source interrupt + 261:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal.c **** (+) Get the HAL API driver version + 262:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal.c **** (+) Get the device identifier + 263:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal.c **** (+) Get the device revision identifier + 264:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal.c **** (+) Enable/Disable Debug module during Sleep mode + 265:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal.c **** (+) Enable/Disable Debug module during STOP mode + ARM GAS /tmp/ccbMHxuA.s page 10 + + + 266:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal.c **** (+) Enable/Disable Debug module during STANDBY mode + 267:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal.c **** + 268:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal.c **** @endverbatim + 269:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal.c **** * @{ + 270:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal.c **** */ + 271:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal.c **** + 272:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal.c **** /** + 273:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal.c **** * @brief This function is called to increment a global variable "uwTick" + 274:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal.c **** * used as application time base. + 275:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal.c **** * @note In the default implementation, this variable is incremented each 1ms + 276:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal.c **** * in SysTick ISR. + 277:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal.c **** * @note This function is declared as __weak to be overwritten in case of other + 278:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal.c **** * implementations in user file. + 279:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal.c **** * @retval None + 280:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal.c **** */ + 281:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal.c **** __weak void HAL_IncTick(void) + 282:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal.c **** { + 240 .loc 1 282 1 is_stmt 1 view -0 + 241 .cfi_startproc + 242 @ args = 0, pretend = 0, frame = 0 + 243 @ frame_needed = 0, uses_anonymous_args = 0 + 244 @ link register save eliminated. + 283:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal.c **** uwTick += uwTickFreq; + 245 .loc 1 283 3 view .LVU39 + 246 .loc 1 283 10 is_stmt 0 view .LVU40 + 247 0000 034A ldr r2, .L17 + 248 0002 1168 ldr r1, [r2] + 249 0004 034B ldr r3, .L17+4 + 250 0006 1B78 ldrb r3, [r3] + 251 0008 5B18 adds r3, r3, r1 + 252 000a 1360 str r3, [r2] + 284:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal.c **** } + 253 .loc 1 284 1 view .LVU41 + 254 @ sp needed + 255 000c 7047 bx lr + 256 .L18: + 257 000e C046 .align 2 + 258 .L17: + 259 0010 00000000 .word uwTick + 260 0014 00000000 .word uwTickFreq + 261 .cfi_endproc + 262 .LFE45: + 264 .section .text.HAL_GetTick,"ax",%progbits + 265 .align 1 + 266 .weak HAL_GetTick + 267 .syntax unified + 268 .code 16 + 269 .thumb_func + 271 HAL_GetTick: + 272 .LFB46: + 285:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal.c **** + 286:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal.c **** /** + 287:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal.c **** * @brief Provides a tick value in millisecond. + 288:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal.c **** * @note This function is declared as __weak to be overwritten in case of other + 289:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal.c **** * implementations in user file. + 290:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal.c **** * @retval tick value + 291:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal.c **** */ + ARM GAS /tmp/ccbMHxuA.s page 11 + + + 292:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal.c **** __weak uint32_t HAL_GetTick(void) + 293:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal.c **** { + 273 .loc 1 293 1 is_stmt 1 view -0 + 274 .cfi_startproc + 275 @ args = 0, pretend = 0, frame = 0 + 276 @ frame_needed = 0, uses_anonymous_args = 0 + 277 @ link register save eliminated. + 294:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal.c **** return uwTick; + 278 .loc 1 294 3 view .LVU43 + 279 .loc 1 294 10 is_stmt 0 view .LVU44 + 280 0000 014B ldr r3, .L20 + 281 0002 1868 ldr r0, [r3] + 295:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal.c **** } + 282 .loc 1 295 1 view .LVU45 + 283 @ sp needed + 284 0004 7047 bx lr + 285 .L21: + 286 0006 C046 .align 2 + 287 .L20: + 288 0008 00000000 .word uwTick + 289 .cfi_endproc + 290 .LFE46: + 292 .section .text.HAL_GetTickPrio,"ax",%progbits + 293 .align 1 + 294 .global HAL_GetTickPrio + 295 .syntax unified + 296 .code 16 + 297 .thumb_func + 299 HAL_GetTickPrio: + 300 .LFB47: + 296:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal.c **** + 297:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal.c **** /** + 298:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal.c **** * @brief This function returns a tick priority. + 299:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal.c **** * @retval tick priority + 300:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal.c **** */ + 301:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal.c **** uint32_t HAL_GetTickPrio(void) + 302:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal.c **** { + 301 .loc 1 302 1 is_stmt 1 view -0 + 302 .cfi_startproc + 303 @ args = 0, pretend = 0, frame = 0 + 304 @ frame_needed = 0, uses_anonymous_args = 0 + 305 @ link register save eliminated. + 303:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal.c **** return uwTickPrio; + 306 .loc 1 303 3 view .LVU47 + 307 .loc 1 303 10 is_stmt 0 view .LVU48 + 308 0000 014B ldr r3, .L23 + 309 .loc 1 303 10 discriminator 1 view .LVU49 + 310 0002 1868 ldr r0, [r3] + 304:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal.c **** } + 311 .loc 1 304 1 view .LVU50 + 312 @ sp needed + 313 0004 7047 bx lr + 314 .L24: + 315 0006 C046 .align 2 + 316 .L23: + 317 0008 00000000 .word uwTickPrio + 318 .cfi_endproc + ARM GAS /tmp/ccbMHxuA.s page 12 + + + 319 .LFE47: + 321 .section .text.HAL_SetTickFreq,"ax",%progbits + 322 .align 1 + 323 .global HAL_SetTickFreq + 324 .syntax unified + 325 .code 16 + 326 .thumb_func + 328 HAL_SetTickFreq: + 329 .LVL10: + 330 .LFB48: + 305:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal.c **** + 306:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal.c **** /** + 307:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal.c **** * @brief Set new tick Freq. + 308:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal.c **** * @retval status + 309:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal.c **** */ + 310:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal.c **** HAL_StatusTypeDef HAL_SetTickFreq(HAL_TickFreqTypeDef Freq) + 311:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal.c **** { + 331 .loc 1 311 1 is_stmt 1 view -0 + 332 .cfi_startproc + 333 @ args = 0, pretend = 0, frame = 0 + 334 @ frame_needed = 0, uses_anonymous_args = 0 + 335 .loc 1 311 1 is_stmt 0 view .LVU52 + 336 0000 10B5 push {r4, lr} + 337 .cfi_def_cfa_offset 8 + 338 .cfi_offset 4, -8 + 339 .cfi_offset 14, -4 + 312:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal.c **** HAL_StatusTypeDef status = HAL_OK; + 340 .loc 1 312 3 is_stmt 1 view .LVU53 + 341 .LVL11: + 313:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal.c **** HAL_TickFreqTypeDef prevTickFreq; + 342 .loc 1 313 3 view .LVU54 + 314:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal.c **** + 315:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal.c **** assert_param(IS_TICKFREQ(Freq)); + 343 .loc 1 315 3 view .LVU55 + 316:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal.c **** + 317:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal.c **** if (uwTickFreq != Freq) + 344 .loc 1 317 3 view .LVU56 + 345 .loc 1 317 18 is_stmt 0 view .LVU57 + 346 0002 084B ldr r3, .L29 + 347 0004 1C78 ldrb r4, [r3] + 348 .loc 1 317 6 view .LVU58 + 349 0006 8442 cmp r4, r0 + 350 0008 01D1 bne .L28 + 312:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal.c **** HAL_TickFreqTypeDef prevTickFreq; + 351 .loc 1 312 21 view .LVU59 + 352 000a 0020 movs r0, #0 + 353 .LVL12: + 354 .L26: + 318:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal.c **** { + 319:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal.c **** /* Back up uwTickFreq frequency */ + 320:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal.c **** prevTickFreq = uwTickFreq; + 321:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal.c **** + 322:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal.c **** /* Update uwTickFreq global variable used by HAL_InitTick() */ + 323:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal.c **** uwTickFreq = Freq; + 324:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal.c **** + 325:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal.c **** /* Apply the new tick Freq */ + 326:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal.c **** status = HAL_InitTick(uwTickPrio); + ARM GAS /tmp/ccbMHxuA.s page 13 + + + 327:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal.c **** + 328:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal.c **** if (status != HAL_OK) + 329:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal.c **** { + 330:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal.c **** /* Restore previous tick frequency */ + 331:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal.c **** uwTickFreq = prevTickFreq; + 332:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal.c **** } + 333:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal.c **** } + 334:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal.c **** + 335:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal.c **** return status; + 355 .loc 1 335 3 is_stmt 1 view .LVU60 + 336:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal.c **** } + 356 .loc 1 336 1 is_stmt 0 view .LVU61 + 357 @ sp needed + 358 000c 10BD pop {r4, pc} + 359 .LVL13: + 360 .L28: + 320:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal.c **** + 361 .loc 1 320 5 is_stmt 1 view .LVU62 + 323:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal.c **** + 362 .loc 1 323 5 view .LVU63 + 323:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal.c **** + 363 .loc 1 323 16 is_stmt 0 view .LVU64 + 364 000e 1870 strb r0, [r3] + 326:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal.c **** + 365 .loc 1 326 5 is_stmt 1 view .LVU65 + 326:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal.c **** + 366 .loc 1 326 14 is_stmt 0 view .LVU66 + 367 0010 054B ldr r3, .L29+4 + 368 0012 1868 ldr r0, [r3] + 369 .LVL14: + 326:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal.c **** + 370 .loc 1 326 14 view .LVU67 + 371 0014 FFF7FEFF bl HAL_InitTick + 372 .LVL15: + 328:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal.c **** { + 373 .loc 1 328 5 is_stmt 1 view .LVU68 + 328:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal.c **** { + 374 .loc 1 328 8 is_stmt 0 view .LVU69 + 375 0018 0028 cmp r0, #0 + 376 001a F7D0 beq .L26 + 331:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal.c **** } + 377 .loc 1 331 7 is_stmt 1 view .LVU70 + 331:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal.c **** } + 378 .loc 1 331 18 is_stmt 0 view .LVU71 + 379 001c 014B ldr r3, .L29 + 380 001e 1C70 strb r4, [r3] + 381 0020 F4E7 b .L26 + 382 .L30: + 383 0022 C046 .align 2 + 384 .L29: + 385 0024 00000000 .word uwTickFreq + 386 0028 00000000 .word uwTickPrio + 387 .cfi_endproc + 388 .LFE48: + 390 .section .text.HAL_GetTickFreq,"ax",%progbits + 391 .align 1 + 392 .global HAL_GetTickFreq + ARM GAS /tmp/ccbMHxuA.s page 14 + + + 393 .syntax unified + 394 .code 16 + 395 .thumb_func + 397 HAL_GetTickFreq: + 398 .LFB49: + 337:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal.c **** + 338:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal.c **** /** + 339:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal.c **** * @brief return tick frequency. + 340:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal.c **** * @retval Tick frequency. + 341:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal.c **** * Value of @ref HAL_TickFreqTypeDef. + 342:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal.c **** */ + 343:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal.c **** HAL_TickFreqTypeDef HAL_GetTickFreq(void) + 344:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal.c **** { + 399 .loc 1 344 1 is_stmt 1 view -0 + 400 .cfi_startproc + 401 @ args = 0, pretend = 0, frame = 0 + 402 @ frame_needed = 0, uses_anonymous_args = 0 + 403 @ link register save eliminated. + 345:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal.c **** return uwTickFreq; + 404 .loc 1 345 3 view .LVU73 + 405 .loc 1 345 10 is_stmt 0 view .LVU74 + 406 0000 014B ldr r3, .L32 + 407 .loc 1 345 10 discriminator 1 view .LVU75 + 408 0002 1878 ldrb r0, [r3] + 346:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal.c **** } + 409 .loc 1 346 1 view .LVU76 + 410 @ sp needed + 411 0004 7047 bx lr + 412 .L33: + 413 0006 C046 .align 2 + 414 .L32: + 415 0008 00000000 .word uwTickFreq + 416 .cfi_endproc + 417 .LFE49: + 419 .section .text.HAL_Delay,"ax",%progbits + 420 .align 1 + 421 .weak HAL_Delay + 422 .syntax unified + 423 .code 16 + 424 .thumb_func + 426 HAL_Delay: + 427 .LVL16: + 428 .LFB50: + 347:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal.c **** + 348:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal.c **** /** + 349:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal.c **** * @brief This function provides accurate delay (in milliseconds) based + 350:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal.c **** * on variable incremented. + 351:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal.c **** * @note In the default implementation , SysTick timer is the source of time base. + 352:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal.c **** * It is used to generate interrupts at regular time intervals where uwTick + 353:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal.c **** * is incremented. + 354:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal.c **** * @note ThiS function is declared as __weak to be overwritten in case of other + 355:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal.c **** * implementations in user file. + 356:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal.c **** * @param Delay specifies the delay time length, in milliseconds. + 357:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal.c **** * @retval None + 358:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal.c **** */ + 359:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal.c **** __weak void HAL_Delay(uint32_t Delay) + 360:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal.c **** { + ARM GAS /tmp/ccbMHxuA.s page 15 + + + 429 .loc 1 360 1 is_stmt 1 view -0 + 430 .cfi_startproc + 431 @ args = 0, pretend = 0, frame = 0 + 432 @ frame_needed = 0, uses_anonymous_args = 0 + 433 .loc 1 360 1 is_stmt 0 view .LVU78 + 434 0000 70B5 push {r4, r5, r6, lr} + 435 .cfi_def_cfa_offset 16 + 436 .cfi_offset 4, -16 + 437 .cfi_offset 5, -12 + 438 .cfi_offset 6, -8 + 439 .cfi_offset 14, -4 + 440 0002 0400 movs r4, r0 + 361:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal.c **** uint32_t tickstart = HAL_GetTick(); + 441 .loc 1 361 3 is_stmt 1 view .LVU79 + 442 .loc 1 361 24 is_stmt 0 view .LVU80 + 443 0004 FFF7FEFF bl HAL_GetTick + 444 .LVL17: + 445 .loc 1 361 24 view .LVU81 + 446 0008 0500 movs r5, r0 + 447 .LVL18: + 362:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal.c **** uint32_t wait = Delay; + 448 .loc 1 362 3 is_stmt 1 view .LVU82 + 363:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal.c **** + 364:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal.c **** /* Add a freq to guarantee minimum wait */ + 365:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal.c **** if (wait < HAL_MAX_DELAY) + 449 .loc 1 365 3 view .LVU83 + 450 .loc 1 365 6 is_stmt 0 view .LVU84 + 451 000a 631C adds r3, r4, #1 + 452 000c 02D0 beq .L36 + 366:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal.c **** { + 367:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal.c **** wait += (uint32_t)(uwTickFreq); + 453 .loc 1 367 5 is_stmt 1 view .LVU85 + 454 .loc 1 367 13 is_stmt 0 view .LVU86 + 455 000e 044B ldr r3, .L38 + 456 0010 1B78 ldrb r3, [r3] + 457 .loc 1 367 10 view .LVU87 + 458 0012 E418 adds r4, r4, r3 + 459 .LVL19: + 460 .L36: + 368:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal.c **** } + 369:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal.c **** + 370:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal.c **** while((HAL_GetTick() - tickstart) < wait) + 371:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal.c **** { + 372:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal.c **** } + 461 .loc 1 372 3 is_stmt 1 view .LVU88 + 370:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal.c **** { + 462 .loc 1 370 37 discriminator 1 view .LVU89 + 370:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal.c **** { + 463 .loc 1 370 10 is_stmt 0 discriminator 1 view .LVU90 + 464 0014 FFF7FEFF bl HAL_GetTick + 465 .LVL20: + 370:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal.c **** { + 466 .loc 1 370 24 discriminator 1 view .LVU91 + 467 0018 401B subs r0, r0, r5 + 370:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal.c **** { + 468 .loc 1 370 37 discriminator 1 view .LVU92 + 469 001a A042 cmp r0, r4 + ARM GAS /tmp/ccbMHxuA.s page 16 + + + 470 001c FAD3 bcc .L36 + 373:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal.c **** } + 471 .loc 1 373 1 view .LVU93 + 472 @ sp needed + 473 .LVL21: + 474 .LVL22: + 475 .loc 1 373 1 view .LVU94 + 476 001e 70BD pop {r4, r5, r6, pc} + 477 .L39: + 478 .align 2 + 479 .L38: + 480 0020 00000000 .word uwTickFreq + 481 .cfi_endproc + 482 .LFE50: + 484 .section .text.HAL_SuspendTick,"ax",%progbits + 485 .align 1 + 486 .weak HAL_SuspendTick + 487 .syntax unified + 488 .code 16 + 489 .thumb_func + 491 HAL_SuspendTick: + 492 .LFB51: + 374:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal.c **** + 375:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal.c **** /** + 376:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal.c **** * @brief Suspend Tick increment. + 377:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal.c **** * @note In the default implementation , SysTick timer is the source of time base. It is + 378:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal.c **** * used to generate interrupts at regular time intervals. Once HAL_SuspendTick() + 379:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal.c **** * is called, the the SysTick interrupt will be disabled and so Tick increment + 380:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal.c **** * is suspended. + 381:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal.c **** * @note This function is declared as __weak to be overwritten in case of other + 382:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal.c **** * implementations in user file. + 383:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal.c **** * @retval None + 384:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal.c **** */ + 385:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal.c **** __weak void HAL_SuspendTick(void) + 386:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal.c **** + 387:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal.c **** { + 493 .loc 1 387 1 is_stmt 1 view -0 + 494 .cfi_startproc + 495 @ args = 0, pretend = 0, frame = 0 + 496 @ frame_needed = 0, uses_anonymous_args = 0 + 497 @ link register save eliminated. + 388:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal.c **** /* Disable SysTick Interrupt */ + 389:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal.c **** CLEAR_BIT(SysTick->CTRL,SysTick_CTRL_TICKINT_Msk); + 498 .loc 1 389 3 view .LVU96 + 499 0000 024A ldr r2, .L41 + 500 0002 1368 ldr r3, [r2] + 501 0004 0221 movs r1, #2 + 502 0006 8B43 bics r3, r1 + 503 0008 1360 str r3, [r2] + 390:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal.c **** } + 504 .loc 1 390 1 is_stmt 0 view .LVU97 + 505 @ sp needed + 506 000a 7047 bx lr + 507 .L42: + 508 .align 2 + 509 .L41: + 510 000c 10E000E0 .word -536813552 + ARM GAS /tmp/ccbMHxuA.s page 17 + + + 511 .cfi_endproc + 512 .LFE51: + 514 .section .text.HAL_ResumeTick,"ax",%progbits + 515 .align 1 + 516 .weak HAL_ResumeTick + 517 .syntax unified + 518 .code 16 + 519 .thumb_func + 521 HAL_ResumeTick: + 522 .LFB52: + 391:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal.c **** + 392:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal.c **** /** + 393:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal.c **** * @brief Resume Tick increment. + 394:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal.c **** * @note In the default implementation , SysTick timer is the source of time base. It is + 395:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal.c **** * used to generate interrupts at regular time intervals. Once HAL_ResumeTick() + 396:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal.c **** * is called, the the SysTick interrupt will be enabled and so Tick increment + 397:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal.c **** * is resumed. + 398:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal.c **** * @note This function is declared as __weak to be overwritten in case of other + 399:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal.c **** * implementations in user file. + 400:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal.c **** * @retval None + 401:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal.c **** */ + 402:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal.c **** __weak void HAL_ResumeTick(void) + 403:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal.c **** { + 523 .loc 1 403 1 is_stmt 1 view -0 + 524 .cfi_startproc + 525 @ args = 0, pretend = 0, frame = 0 + 526 @ frame_needed = 0, uses_anonymous_args = 0 + 527 @ link register save eliminated. + 404:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal.c **** /* Enable SysTick Interrupt */ + 405:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal.c **** SET_BIT(SysTick->CTRL,SysTick_CTRL_TICKINT_Msk); + 528 .loc 1 405 3 view .LVU99 + 529 0000 024A ldr r2, .L44 + 530 0002 1368 ldr r3, [r2] + 531 0004 0221 movs r1, #2 + 532 0006 0B43 orrs r3, r1 + 533 0008 1360 str r3, [r2] + 406:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal.c **** } + 534 .loc 1 406 1 is_stmt 0 view .LVU100 + 535 @ sp needed + 536 000a 7047 bx lr + 537 .L45: + 538 .align 2 + 539 .L44: + 540 000c 10E000E0 .word -536813552 + 541 .cfi_endproc + 542 .LFE52: + 544 .section .text.HAL_GetHalVersion,"ax",%progbits + 545 .align 1 + 546 .global HAL_GetHalVersion + 547 .syntax unified + 548 .code 16 + 549 .thumb_func + 551 HAL_GetHalVersion: + 552 .LFB53: + 407:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal.c **** + 408:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal.c **** /** + 409:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal.c **** * @brief This method returns the HAL revision + ARM GAS /tmp/ccbMHxuA.s page 18 + + + 410:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal.c **** * @retval version 0xXYZR (8bits for each decimal, R for RC) + 411:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal.c **** */ + 412:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal.c **** uint32_t HAL_GetHalVersion(void) + 413:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal.c **** { + 553 .loc 1 413 1 is_stmt 1 view -0 + 554 .cfi_startproc + 555 @ args = 0, pretend = 0, frame = 0 + 556 @ frame_needed = 0, uses_anonymous_args = 0 + 557 @ link register save eliminated. + 414:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal.c **** return __STM32F0xx_HAL_VERSION; + 558 .loc 1 414 2 view .LVU102 + 415:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal.c **** } + 559 .loc 1 415 1 is_stmt 0 view .LVU103 + 560 0000 0048 ldr r0, .L47 + 561 @ sp needed + 562 0002 7047 bx lr + 563 .L48: + 564 .align 2 + 565 .L47: + 566 0004 00070701 .word 17237760 + 567 .cfi_endproc + 568 .LFE53: + 570 .section .text.HAL_GetREVID,"ax",%progbits + 571 .align 1 + 572 .global HAL_GetREVID + 573 .syntax unified + 574 .code 16 + 575 .thumb_func + 577 HAL_GetREVID: + 578 .LFB54: + 416:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal.c **** + 417:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal.c **** /** + 418:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal.c **** * @brief Returns the device revision identifier. + 419:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal.c **** * @retval Device revision identifier + 420:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal.c **** */ + 421:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal.c **** uint32_t HAL_GetREVID(void) + 422:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal.c **** { + 579 .loc 1 422 1 is_stmt 1 view -0 + 580 .cfi_startproc + 581 @ args = 0, pretend = 0, frame = 0 + 582 @ frame_needed = 0, uses_anonymous_args = 0 + 583 @ link register save eliminated. + 423:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal.c **** return((DBGMCU->IDCODE) >> 16U); + 584 .loc 1 423 4 view .LVU105 + 585 .loc 1 423 18 is_stmt 0 view .LVU106 + 586 0000 014B ldr r3, .L50 + 587 0002 1868 ldr r0, [r3] + 588 .loc 1 423 28 view .LVU107 + 589 0004 000C lsrs r0, r0, #16 + 424:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal.c **** } + 590 .loc 1 424 1 view .LVU108 + 591 @ sp needed + 592 0006 7047 bx lr + 593 .L51: + 594 .align 2 + 595 .L50: + 596 0008 00580140 .word 1073829888 + ARM GAS /tmp/ccbMHxuA.s page 19 + + + 597 .cfi_endproc + 598 .LFE54: + 600 .section .text.HAL_GetDEVID,"ax",%progbits + 601 .align 1 + 602 .global HAL_GetDEVID + 603 .syntax unified + 604 .code 16 + 605 .thumb_func + 607 HAL_GetDEVID: + 608 .LFB55: + 425:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal.c **** + 426:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal.c **** /** + 427:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal.c **** * @brief Returns the device identifier. + 428:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal.c **** * @retval Device identifier + 429:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal.c **** */ + 430:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal.c **** uint32_t HAL_GetDEVID(void) + 431:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal.c **** { + 609 .loc 1 431 1 is_stmt 1 view -0 + 610 .cfi_startproc + 611 @ args = 0, pretend = 0, frame = 0 + 612 @ frame_needed = 0, uses_anonymous_args = 0 + 613 @ link register save eliminated. + 432:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal.c **** return((DBGMCU->IDCODE) & IDCODE_DEVID_MASK); + 614 .loc 1 432 4 view .LVU110 + 615 .loc 1 432 18 is_stmt 0 view .LVU111 + 616 0000 024B ldr r3, .L53 + 617 0002 1868 ldr r0, [r3] + 618 .loc 1 432 28 view .LVU112 + 619 0004 0005 lsls r0, r0, #20 + 620 0006 000D lsrs r0, r0, #20 + 433:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal.c **** } + 621 .loc 1 433 1 view .LVU113 + 622 @ sp needed + 623 0008 7047 bx lr + 624 .L54: + 625 000a C046 .align 2 + 626 .L53: + 627 000c 00580140 .word 1073829888 + 628 .cfi_endproc + 629 .LFE55: + 631 .section .text.HAL_GetUIDw0,"ax",%progbits + 632 .align 1 + 633 .global HAL_GetUIDw0 + 634 .syntax unified + 635 .code 16 + 636 .thumb_func + 638 HAL_GetUIDw0: + 639 .LFB56: + 434:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal.c **** + 435:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal.c **** /** + 436:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal.c **** * @brief Returns first word of the unique device identifier (UID based on 96 bits) + 437:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal.c **** * @retval Device identifier + 438:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal.c **** */ + 439:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal.c **** uint32_t HAL_GetUIDw0(void) + 440:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal.c **** { + 640 .loc 1 440 1 is_stmt 1 view -0 + 641 .cfi_startproc + ARM GAS /tmp/ccbMHxuA.s page 20 + + + 642 @ args = 0, pretend = 0, frame = 0 + 643 @ frame_needed = 0, uses_anonymous_args = 0 + 644 @ link register save eliminated. + 441:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal.c **** return(READ_REG(*((uint32_t *)UID_BASE))); + 645 .loc 1 441 4 view .LVU115 + 646 .loc 1 441 11 is_stmt 0 view .LVU116 + 647 0000 014B ldr r3, .L56 + 648 .loc 1 441 11 discriminator 1 view .LVU117 + 649 0002 1868 ldr r0, [r3] + 442:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal.c **** } + 650 .loc 1 442 1 view .LVU118 + 651 @ sp needed + 652 0004 7047 bx lr + 653 .L57: + 654 0006 C046 .align 2 + 655 .L56: + 656 0008 ACF7FF1F .word 536868780 + 657 .cfi_endproc + 658 .LFE56: + 660 .section .text.HAL_GetUIDw1,"ax",%progbits + 661 .align 1 + 662 .global HAL_GetUIDw1 + 663 .syntax unified + 664 .code 16 + 665 .thumb_func + 667 HAL_GetUIDw1: + 668 .LFB57: + 443:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal.c **** + 444:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal.c **** /** + 445:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal.c **** * @brief Returns second word of the unique device identifier (UID based on 96 bits) + 446:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal.c **** * @retval Device identifier + 447:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal.c **** */ + 448:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal.c **** uint32_t HAL_GetUIDw1(void) + 449:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal.c **** { + 669 .loc 1 449 1 is_stmt 1 view -0 + 670 .cfi_startproc + 671 @ args = 0, pretend = 0, frame = 0 + 672 @ frame_needed = 0, uses_anonymous_args = 0 + 673 @ link register save eliminated. + 450:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal.c **** return(READ_REG(*((uint32_t *)(UID_BASE + 4U)))); + 674 .loc 1 450 4 view .LVU120 + 675 .loc 1 450 11 is_stmt 0 view .LVU121 + 676 0000 014B ldr r3, .L59 + 677 .loc 1 450 11 discriminator 1 view .LVU122 + 678 0002 1868 ldr r0, [r3] + 451:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal.c **** } + 679 .loc 1 451 1 view .LVU123 + 680 @ sp needed + 681 0004 7047 bx lr + 682 .L60: + 683 0006 C046 .align 2 + 684 .L59: + 685 0008 B0F7FF1F .word 536868784 + 686 .cfi_endproc + 687 .LFE57: + 689 .section .text.HAL_GetUIDw2,"ax",%progbits + 690 .align 1 + ARM GAS /tmp/ccbMHxuA.s page 21 + + + 691 .global HAL_GetUIDw2 + 692 .syntax unified + 693 .code 16 + 694 .thumb_func + 696 HAL_GetUIDw2: + 697 .LFB58: + 452:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal.c **** + 453:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal.c **** /** + 454:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal.c **** * @brief Returns third word of the unique device identifier (UID based on 96 bits) + 455:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal.c **** * @retval Device identifier + 456:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal.c **** */ + 457:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal.c **** uint32_t HAL_GetUIDw2(void) + 458:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal.c **** { + 698 .loc 1 458 1 is_stmt 1 view -0 + 699 .cfi_startproc + 700 @ args = 0, pretend = 0, frame = 0 + 701 @ frame_needed = 0, uses_anonymous_args = 0 + 702 @ link register save eliminated. + 459:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal.c **** return(READ_REG(*((uint32_t *)(UID_BASE + 8U)))); + 703 .loc 1 459 4 view .LVU125 + 704 .loc 1 459 11 is_stmt 0 view .LVU126 + 705 0000 014B ldr r3, .L62 + 706 .loc 1 459 11 discriminator 1 view .LVU127 + 707 0002 1868 ldr r0, [r3] + 460:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal.c **** } + 708 .loc 1 460 1 view .LVU128 + 709 @ sp needed + 710 0004 7047 bx lr + 711 .L63: + 712 0006 C046 .align 2 + 713 .L62: + 714 0008 B4F7FF1F .word 536868788 + 715 .cfi_endproc + 716 .LFE58: + 718 .section .text.HAL_DBGMCU_EnableDBGStopMode,"ax",%progbits + 719 .align 1 + 720 .global HAL_DBGMCU_EnableDBGStopMode + 721 .syntax unified + 722 .code 16 + 723 .thumb_func + 725 HAL_DBGMCU_EnableDBGStopMode: + 726 .LFB59: + 461:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal.c **** + 462:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal.c **** /** + 463:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal.c **** * @brief Enable the Debug Module during STOP mode + 464:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal.c **** * @retval None + 465:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal.c **** */ + 466:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal.c **** void HAL_DBGMCU_EnableDBGStopMode(void) + 467:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal.c **** { + 727 .loc 1 467 1 is_stmt 1 view -0 + 728 .cfi_startproc + 729 @ args = 0, pretend = 0, frame = 0 + 730 @ frame_needed = 0, uses_anonymous_args = 0 + 731 @ link register save eliminated. + 468:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal.c **** SET_BIT(DBGMCU->CR, DBGMCU_CR_DBG_STOP); + 732 .loc 1 468 3 view .LVU130 + 733 0000 024A ldr r2, .L65 + ARM GAS /tmp/ccbMHxuA.s page 22 + + + 734 0002 5368 ldr r3, [r2, #4] + 735 0004 0221 movs r1, #2 + 736 0006 0B43 orrs r3, r1 + 737 0008 5360 str r3, [r2, #4] + 469:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal.c **** } + 738 .loc 1 469 1 is_stmt 0 view .LVU131 + 739 @ sp needed + 740 000a 7047 bx lr + 741 .L66: + 742 .align 2 + 743 .L65: + 744 000c 00580140 .word 1073829888 + 745 .cfi_endproc + 746 .LFE59: + 748 .section .text.HAL_DBGMCU_DisableDBGStopMode,"ax",%progbits + 749 .align 1 + 750 .global HAL_DBGMCU_DisableDBGStopMode + 751 .syntax unified + 752 .code 16 + 753 .thumb_func + 755 HAL_DBGMCU_DisableDBGStopMode: + 756 .LFB60: + 470:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal.c **** + 471:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal.c **** /** + 472:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal.c **** * @brief Disable the Debug Module during STOP mode + 473:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal.c **** * @retval None + 474:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal.c **** */ + 475:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal.c **** void HAL_DBGMCU_DisableDBGStopMode(void) + 476:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal.c **** { + 757 .loc 1 476 1 is_stmt 1 view -0 + 758 .cfi_startproc + 759 @ args = 0, pretend = 0, frame = 0 + 760 @ frame_needed = 0, uses_anonymous_args = 0 + 761 @ link register save eliminated. + 477:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal.c **** CLEAR_BIT(DBGMCU->CR, DBGMCU_CR_DBG_STOP); + 762 .loc 1 477 3 view .LVU133 + 763 0000 024A ldr r2, .L68 + 764 0002 5368 ldr r3, [r2, #4] + 765 0004 0221 movs r1, #2 + 766 0006 8B43 bics r3, r1 + 767 0008 5360 str r3, [r2, #4] + 478:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal.c **** } + 768 .loc 1 478 1 is_stmt 0 view .LVU134 + 769 @ sp needed + 770 000a 7047 bx lr + 771 .L69: + 772 .align 2 + 773 .L68: + 774 000c 00580140 .word 1073829888 + 775 .cfi_endproc + 776 .LFE60: + 778 .section .text.HAL_DBGMCU_EnableDBGStandbyMode,"ax",%progbits + 779 .align 1 + 780 .global HAL_DBGMCU_EnableDBGStandbyMode + 781 .syntax unified + 782 .code 16 + 783 .thumb_func + ARM GAS /tmp/ccbMHxuA.s page 23 + + + 785 HAL_DBGMCU_EnableDBGStandbyMode: + 786 .LFB61: + 479:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal.c **** + 480:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal.c **** /** + 481:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal.c **** * @brief Enable the Debug Module during STANDBY mode + 482:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal.c **** * @retval None + 483:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal.c **** */ + 484:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal.c **** void HAL_DBGMCU_EnableDBGStandbyMode(void) + 485:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal.c **** { + 787 .loc 1 485 1 is_stmt 1 view -0 + 788 .cfi_startproc + 789 @ args = 0, pretend = 0, frame = 0 + 790 @ frame_needed = 0, uses_anonymous_args = 0 + 791 @ link register save eliminated. + 486:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal.c **** SET_BIT(DBGMCU->CR, DBGMCU_CR_DBG_STANDBY); + 792 .loc 1 486 3 view .LVU136 + 793 0000 024A ldr r2, .L71 + 794 0002 5368 ldr r3, [r2, #4] + 795 0004 0421 movs r1, #4 + 796 0006 0B43 orrs r3, r1 + 797 0008 5360 str r3, [r2, #4] + 487:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal.c **** } + 798 .loc 1 487 1 is_stmt 0 view .LVU137 + 799 @ sp needed + 800 000a 7047 bx lr + 801 .L72: + 802 .align 2 + 803 .L71: + 804 000c 00580140 .word 1073829888 + 805 .cfi_endproc + 806 .LFE61: + 808 .section .text.HAL_DBGMCU_DisableDBGStandbyMode,"ax",%progbits + 809 .align 1 + 810 .global HAL_DBGMCU_DisableDBGStandbyMode + 811 .syntax unified + 812 .code 16 + 813 .thumb_func + 815 HAL_DBGMCU_DisableDBGStandbyMode: + 816 .LFB62: + 488:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal.c **** + 489:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal.c **** /** + 490:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal.c **** * @brief Disable the Debug Module during STANDBY mode + 491:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal.c **** * @retval None + 492:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal.c **** */ + 493:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal.c **** void HAL_DBGMCU_DisableDBGStandbyMode(void) + 494:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal.c **** { + 817 .loc 1 494 1 is_stmt 1 view -0 + 818 .cfi_startproc + 819 @ args = 0, pretend = 0, frame = 0 + 820 @ frame_needed = 0, uses_anonymous_args = 0 + 821 @ link register save eliminated. + 495:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal.c **** CLEAR_BIT(DBGMCU->CR, DBGMCU_CR_DBG_STANDBY); + 822 .loc 1 495 3 view .LVU139 + 823 0000 024A ldr r2, .L74 + 824 0002 5368 ldr r3, [r2, #4] + 825 0004 0421 movs r1, #4 + 826 0006 8B43 bics r3, r1 + ARM GAS /tmp/ccbMHxuA.s page 24 + + + 827 0008 5360 str r3, [r2, #4] + 496:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal.c **** } + 828 .loc 1 496 1 is_stmt 0 view .LVU140 + 829 @ sp needed + 830 000a 7047 bx lr + 831 .L75: + 832 .align 2 + 833 .L74: + 834 000c 00580140 .word 1073829888 + 835 .cfi_endproc + 836 .LFE62: + 838 .global uwTickFreq + 839 .section .data.uwTickFreq,"aw" + 842 uwTickFreq: + 843 0000 01 .byte 1 + 844 .global uwTickPrio + 845 .section .data.uwTickPrio,"aw" + 846 .align 2 + 849 uwTickPrio: + 850 0000 04000000 .word 4 + 851 .global uwTick + 852 .section .bss.uwTick,"aw",%nobits + 853 .align 2 + 856 uwTick: + 857 0000 00000000 .space 4 + 858 .text + 859 .Letext0: + 860 .file 2 "Drivers/CMSIS/Device/ST/STM32F0xx/Include/stm32f042x6.h" + 861 .file 3 "/home/chiangni/.config/VSCodium/User/globalStorage/bmd.stm32-for-vscode/@xpack-dev-tools/ + 862 .file 4 "/home/chiangni/.config/VSCodium/User/globalStorage/bmd.stm32-for-vscode/@xpack-dev-tools/ + 863 .file 5 "Drivers/CMSIS/Include/core_cm0.h" + 864 .file 6 "Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_def.h" + 865 .file 7 "Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal.h" + 866 .file 8 "Drivers/CMSIS/Device/ST/STM32F0xx/Include/system_stm32f0xx.h" + 867 .file 9 "Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_cortex.h" + ARM GAS /tmp/ccbMHxuA.s page 25 + + +DEFINED SYMBOLS + *ABS*:00000000 stm32f0xx_hal.c + /tmp/ccbMHxuA.s:19 .text.HAL_MspInit:00000000 $t + /tmp/ccbMHxuA.s:25 .text.HAL_MspInit:00000000 HAL_MspInit + /tmp/ccbMHxuA.s:39 .text.HAL_MspDeInit:00000000 $t + /tmp/ccbMHxuA.s:45 .text.HAL_MspDeInit:00000000 HAL_MspDeInit + /tmp/ccbMHxuA.s:59 .text.HAL_DeInit:00000000 $t + /tmp/ccbMHxuA.s:65 .text.HAL_DeInit:00000000 HAL_DeInit + /tmp/ccbMHxuA.s:102 .text.HAL_DeInit:00000020 $d + /tmp/ccbMHxuA.s:108 .text.HAL_InitTick:00000000 $t + /tmp/ccbMHxuA.s:114 .text.HAL_InitTick:00000000 HAL_InitTick + /tmp/ccbMHxuA.s:183 .text.HAL_InitTick:00000044 $d + /tmp/ccbMHxuA.s:842 .data.uwTickFreq:00000000 uwTickFreq + /tmp/ccbMHxuA.s:849 .data.uwTickPrio:00000000 uwTickPrio + /tmp/ccbMHxuA.s:190 .text.HAL_Init:00000000 $t + /tmp/ccbMHxuA.s:196 .text.HAL_Init:00000000 HAL_Init + /tmp/ccbMHxuA.s:227 .text.HAL_Init:0000001c $d + /tmp/ccbMHxuA.s:232 .text.HAL_IncTick:00000000 $t + /tmp/ccbMHxuA.s:238 .text.HAL_IncTick:00000000 HAL_IncTick + /tmp/ccbMHxuA.s:259 .text.HAL_IncTick:00000010 $d + /tmp/ccbMHxuA.s:856 .bss.uwTick:00000000 uwTick + /tmp/ccbMHxuA.s:265 .text.HAL_GetTick:00000000 $t + /tmp/ccbMHxuA.s:271 .text.HAL_GetTick:00000000 HAL_GetTick + /tmp/ccbMHxuA.s:288 .text.HAL_GetTick:00000008 $d + /tmp/ccbMHxuA.s:293 .text.HAL_GetTickPrio:00000000 $t + /tmp/ccbMHxuA.s:299 .text.HAL_GetTickPrio:00000000 HAL_GetTickPrio + /tmp/ccbMHxuA.s:317 .text.HAL_GetTickPrio:00000008 $d + /tmp/ccbMHxuA.s:322 .text.HAL_SetTickFreq:00000000 $t + /tmp/ccbMHxuA.s:328 .text.HAL_SetTickFreq:00000000 HAL_SetTickFreq + /tmp/ccbMHxuA.s:385 .text.HAL_SetTickFreq:00000024 $d + /tmp/ccbMHxuA.s:391 .text.HAL_GetTickFreq:00000000 $t + /tmp/ccbMHxuA.s:397 .text.HAL_GetTickFreq:00000000 HAL_GetTickFreq + /tmp/ccbMHxuA.s:415 .text.HAL_GetTickFreq:00000008 $d + /tmp/ccbMHxuA.s:420 .text.HAL_Delay:00000000 $t + /tmp/ccbMHxuA.s:426 .text.HAL_Delay:00000000 HAL_Delay + /tmp/ccbMHxuA.s:480 .text.HAL_Delay:00000020 $d + /tmp/ccbMHxuA.s:485 .text.HAL_SuspendTick:00000000 $t + /tmp/ccbMHxuA.s:491 .text.HAL_SuspendTick:00000000 HAL_SuspendTick + /tmp/ccbMHxuA.s:510 .text.HAL_SuspendTick:0000000c $d + /tmp/ccbMHxuA.s:515 .text.HAL_ResumeTick:00000000 $t + /tmp/ccbMHxuA.s:521 .text.HAL_ResumeTick:00000000 HAL_ResumeTick + /tmp/ccbMHxuA.s:540 .text.HAL_ResumeTick:0000000c $d + /tmp/ccbMHxuA.s:545 .text.HAL_GetHalVersion:00000000 $t + /tmp/ccbMHxuA.s:551 .text.HAL_GetHalVersion:00000000 HAL_GetHalVersion + /tmp/ccbMHxuA.s:566 .text.HAL_GetHalVersion:00000004 $d + /tmp/ccbMHxuA.s:571 .text.HAL_GetREVID:00000000 $t + /tmp/ccbMHxuA.s:577 .text.HAL_GetREVID:00000000 HAL_GetREVID + /tmp/ccbMHxuA.s:596 .text.HAL_GetREVID:00000008 $d + /tmp/ccbMHxuA.s:601 .text.HAL_GetDEVID:00000000 $t + /tmp/ccbMHxuA.s:607 .text.HAL_GetDEVID:00000000 HAL_GetDEVID + /tmp/ccbMHxuA.s:627 .text.HAL_GetDEVID:0000000c $d + /tmp/ccbMHxuA.s:632 .text.HAL_GetUIDw0:00000000 $t + /tmp/ccbMHxuA.s:638 .text.HAL_GetUIDw0:00000000 HAL_GetUIDw0 + /tmp/ccbMHxuA.s:656 .text.HAL_GetUIDw0:00000008 $d + /tmp/ccbMHxuA.s:661 .text.HAL_GetUIDw1:00000000 $t + /tmp/ccbMHxuA.s:667 .text.HAL_GetUIDw1:00000000 HAL_GetUIDw1 + /tmp/ccbMHxuA.s:685 .text.HAL_GetUIDw1:00000008 $d + ARM GAS /tmp/ccbMHxuA.s page 26 + + + /tmp/ccbMHxuA.s:690 .text.HAL_GetUIDw2:00000000 $t + /tmp/ccbMHxuA.s:696 .text.HAL_GetUIDw2:00000000 HAL_GetUIDw2 + /tmp/ccbMHxuA.s:714 .text.HAL_GetUIDw2:00000008 $d + /tmp/ccbMHxuA.s:719 .text.HAL_DBGMCU_EnableDBGStopMode:00000000 $t + /tmp/ccbMHxuA.s:725 .text.HAL_DBGMCU_EnableDBGStopMode:00000000 HAL_DBGMCU_EnableDBGStopMode + /tmp/ccbMHxuA.s:744 .text.HAL_DBGMCU_EnableDBGStopMode:0000000c $d + /tmp/ccbMHxuA.s:749 .text.HAL_DBGMCU_DisableDBGStopMode:00000000 $t + /tmp/ccbMHxuA.s:755 .text.HAL_DBGMCU_DisableDBGStopMode:00000000 HAL_DBGMCU_DisableDBGStopMode + /tmp/ccbMHxuA.s:774 .text.HAL_DBGMCU_DisableDBGStopMode:0000000c $d + /tmp/ccbMHxuA.s:779 .text.HAL_DBGMCU_EnableDBGStandbyMode:00000000 $t + /tmp/ccbMHxuA.s:785 .text.HAL_DBGMCU_EnableDBGStandbyMode:00000000 HAL_DBGMCU_EnableDBGStandbyMode + /tmp/ccbMHxuA.s:804 .text.HAL_DBGMCU_EnableDBGStandbyMode:0000000c $d + /tmp/ccbMHxuA.s:809 .text.HAL_DBGMCU_DisableDBGStandbyMode:00000000 $t + /tmp/ccbMHxuA.s:815 .text.HAL_DBGMCU_DisableDBGStandbyMode:00000000 HAL_DBGMCU_DisableDBGStandbyMode + /tmp/ccbMHxuA.s:834 .text.HAL_DBGMCU_DisableDBGStandbyMode:0000000c $d + /tmp/ccbMHxuA.s:846 .data.uwTickPrio:00000000 $d + /tmp/ccbMHxuA.s:853 .bss.uwTick:00000000 $d + +UNDEFINED SYMBOLS +__aeabi_uidiv +HAL_SYSTICK_Config +HAL_NVIC_SetPriority +SystemCoreClock diff --git a/Software/build/stm32f0xx_hal.o b/Software/build/stm32f0xx_hal.o new file mode 100644 index 0000000..2376b3c Binary files /dev/null and b/Software/build/stm32f0xx_hal.o differ diff --git a/Software/build/stm32f0xx_hal_adc.d b/Software/build/stm32f0xx_hal_adc.d new file mode 100644 index 0000000..314fc01 --- /dev/null +++ b/Software/build/stm32f0xx_hal_adc.d @@ -0,0 +1,60 @@ +build/stm32f0xx_hal_adc.o: \ + Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c \ + Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal.h \ + Core/Inc/stm32f0xx_hal_conf.h \ + Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_rcc.h \ + Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_def.h \ + Drivers/CMSIS/Device/ST/STM32F0xx/Include/stm32f0xx.h \ + Drivers/CMSIS/Device/ST/STM32F0xx/Include/stm32f042x6.h \ + Drivers/CMSIS/Include/core_cm0.h Drivers/CMSIS/Include/cmsis_version.h \ + Drivers/CMSIS/Include/cmsis_compiler.h Drivers/CMSIS/Include/cmsis_gcc.h \ + Drivers/CMSIS/Device/ST/STM32F0xx/Include/system_stm32f0xx.h \ + Drivers/STM32F0xx_HAL_Driver/Inc/Legacy/stm32_hal_legacy.h \ + Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_rcc_ex.h \ + Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_gpio.h \ + Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_gpio_ex.h \ + Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_exti.h \ + Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_dma.h \ + Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_dma_ex.h \ + Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_cortex.h \ + Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_adc.h \ + Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_adc_ex.h \ + Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_can.h \ + Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_flash.h \ + Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_flash_ex.h \ + Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_i2c.h \ + Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_i2c_ex.h \ + Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_pwr.h \ + Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_pwr_ex.h \ + Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_tim.h \ + Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_tim_ex.h +Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal.h: +Core/Inc/stm32f0xx_hal_conf.h: +Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_rcc.h: +Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_def.h: +Drivers/CMSIS/Device/ST/STM32F0xx/Include/stm32f0xx.h: +Drivers/CMSIS/Device/ST/STM32F0xx/Include/stm32f042x6.h: +Drivers/CMSIS/Include/core_cm0.h: +Drivers/CMSIS/Include/cmsis_version.h: +Drivers/CMSIS/Include/cmsis_compiler.h: +Drivers/CMSIS/Include/cmsis_gcc.h: +Drivers/CMSIS/Device/ST/STM32F0xx/Include/system_stm32f0xx.h: +Drivers/STM32F0xx_HAL_Driver/Inc/Legacy/stm32_hal_legacy.h: +Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_rcc_ex.h: +Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_gpio.h: +Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_gpio_ex.h: +Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_exti.h: +Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_dma.h: +Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_dma_ex.h: +Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_cortex.h: +Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_adc.h: +Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_adc_ex.h: +Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_can.h: +Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_flash.h: +Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_flash_ex.h: +Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_i2c.h: +Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_i2c_ex.h: +Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_pwr.h: +Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_pwr_ex.h: +Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_tim.h: +Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_tim_ex.h: diff --git a/Software/build/stm32f0xx_hal_adc.lst b/Software/build/stm32f0xx_hal_adc.lst new file mode 100644 index 0000000..855abae --- /dev/null +++ b/Software/build/stm32f0xx_hal_adc.lst @@ -0,0 +1,6963 @@ +ARM GAS /tmp/cc2rPMmj.s page 1 + + + 1 .cpu cortex-m0 + 2 .arch armv6s-m + 3 .fpu softvfp + 4 .eabi_attribute 20, 1 + 5 .eabi_attribute 21, 1 + 6 .eabi_attribute 23, 3 + 7 .eabi_attribute 24, 1 + 8 .eabi_attribute 25, 1 + 9 .eabi_attribute 26, 1 + 10 .eabi_attribute 30, 1 + 11 .eabi_attribute 34, 0 + 12 .eabi_attribute 18, 4 + 13 .file "stm32f0xx_hal_adc.c" + 14 .text + 15 .Ltext0: + 16 .cfi_sections .debug_frame + 17 .file 1 "Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c" + 18 .section .text.ADC_ConversionStop,"ax",%progbits + 19 .align 1 + 20 .syntax unified + 21 .code 16 + 22 .thumb_func + 24 ADC_ConversionStop: + 25 .LVL0: + 26 .LFB64: + 1:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** /** + 2:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** ****************************************************************************** + 3:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** * @file stm32f0xx_hal_adc.c + 4:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** * @author MCD Application Team + 5:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** * @brief This file provides firmware functions to manage the following + 6:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** * functionalities of the Analog to Digital Convertor (ADC) + 7:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** * peripheral: + 8:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** * + Initialization and de-initialization functions + 9:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** * + Peripheral Control functions + 10:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** * + Peripheral State functions + 11:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** * Other functions (extended functions) are available in file + 12:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** * "stm32f0xx_hal_adc_ex.c". + 13:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** * + 14:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** ****************************************************************************** + 15:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** * @attention + 16:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** * + 17:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** * Copyright (c) 2016 STMicroelectronics. + 18:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** * All rights reserved. + 19:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** * + 20:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** * This software is licensed under terms that can be found in the LICENSE file + 21:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** * in the root directory of this software component. + 22:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** * If no LICENSE file comes with this software, it is provided AS-IS. + 23:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** * + 24:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** ****************************************************************************** + 25:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** @verbatim + 26:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** ============================================================================== + 27:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** ##### ADC peripheral features ##### + 28:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** ============================================================================== + 29:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** [..] + 30:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** (+) 12-bit, 10-bit, 8-bit or 6-bit configurable resolution + 31:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** + 32:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** (+) Interrupt generation at the end of regular conversion and in case of + ARM GAS /tmp/cc2rPMmj.s page 2 + + + 33:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** analog watchdog or overrun events. + 34:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** + 35:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** (+) Single and continuous conversion modes. + 36:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** + 37:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** (+) Scan mode for conversion of several channels sequentially. + 38:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** + 39:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** (+) Data alignment with in-built data coherency. + 40:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** + 41:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** (+) Programmable sampling time (common for all channels) + 42:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** + 43:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** (+) ADC conversion of regular group. + 44:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** + 45:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** (+) External trigger (timer or EXTI) with configurable polarity + 46:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** + 47:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** (+) DMA request generation for transfer of conversions data of regular group. + 48:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** + 49:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** (+) ADC calibration + 50:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** + 51:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** (+) ADC supply requirements: 2.4 V to 3.6 V at full speed and down to 1.8 V at + 52:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** slower speed. + 53:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** + 54:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** (+) ADC input range: from Vref- (connected to Vssa) to Vref+ (connected to + 55:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** Vdda or to an external voltage reference). + 56:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** + 57:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** + 58:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** ##### How to use this driver ##### + 59:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** ============================================================================== + 60:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** [..] + 61:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** + 62:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** *** Configuration of top level parameters related to ADC *** + 63:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** ============================================================ + 64:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** [..] + 65:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** + 66:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** (#) Enable the ADC interface + 67:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** (++) As prerequisite, ADC clock must be configured at RCC top level. + 68:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** Caution: On STM32F0, ADC clock frequency max is 14MHz (refer + 69:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** to device datasheet). + 70:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** Therefore, ADC clock prescaler must be configured in + 71:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** function of ADC clock source frequency to remain below + 72:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** this maximum frequency. + 73:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** + 74:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** (++) Two clock settings are mandatory: + 75:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** (+++) ADC clock (core clock, also possibly conversion clock). + 76:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** + 77:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** (+++) ADC clock (conversions clock). + 78:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** Two possible clock sources: synchronous clock derived from APB clock + 79:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** or asynchronous clock derived from ADC dedicated HSI RC oscillator + 80:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** 14MHz. + 81:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** If asynchronous clock is selected, parameter "HSI14State" must be set either: + 82:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** - to "...HSI14State = RCC_HSI14_ADC_CONTROL" to let the ADC control + 83:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** the HSI14 oscillator enable/disable (if not used to supply the main + 84:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** system clock): feature used if ADC mode LowPowerAutoPowerOff is + 85:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** enabled. + 86:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** - to "...HSI14State = RCC_HSI14_ON" to maintain the HSI14 oscillator + 87:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** always enabled: can be used to supply the main system clock. + 88:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** + 89:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** (+++) Example: + ARM GAS /tmp/cc2rPMmj.s page 3 + + + 90:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** Into HAL_ADC_MspInit() (recommended code location) or with + 91:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** other device clock parameters configuration: + 92:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** (+++) __HAL_RCC_ADC1_CLK_ENABLE(); (mandatory) + 93:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** + 94:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** HI14 enable or let under control of ADC: (optional: if asynchronous clock + 95:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** (+++) RCC_OscInitTypeDef RCC_OscInitStructure; + 96:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** (+++) RCC_OscInitStructure.OscillatorType = RCC_OSCILLATORTYPE_HSI14; + 97:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** (+++) RCC_OscInitStructure.HSI14CalibrationValue = RCC_HSI14CALIBRATION_DEFAULT; + 98:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** (+++) RCC_OscInitStructure.HSI14State = RCC_HSI14_ADC_CONTROL; + 99:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** (+++) RCC_OscInitStructure.PLL... (optional if used for system clock) + 100:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** (+++) HAL_RCC_OscConfig(&RCC_OscInitStructure); + 101:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** + 102:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** (++) ADC clock source and clock prescaler are configured at ADC level with + 103:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** parameter "ClockPrescaler" using function HAL_ADC_Init(). + 104:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** + 105:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** (#) ADC pins configuration + 106:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** (++) Enable the clock for the ADC GPIOs + 107:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** using macro __HAL_RCC_GPIOx_CLK_ENABLE() + 108:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** (++) Configure these ADC pins in analog mode + 109:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** using function HAL_GPIO_Init() + 110:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** + 111:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** (#) Optionally, in case of usage of ADC with interruptions: + 112:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** (++) Configure the NVIC for ADC + 113:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** using function HAL_NVIC_EnableIRQ(ADCx_IRQn) + 114:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** (++) Insert the ADC interruption handler function HAL_ADC_IRQHandler() + 115:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** into the function of corresponding ADC interruption vector + 116:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** ADCx_IRQHandler(). + 117:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** + 118:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** (#) Optionally, in case of usage of DMA: + 119:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** (++) Configure the DMA (DMA channel, mode normal or circular, ...) + 120:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** using function HAL_DMA_Init(). + 121:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** (++) Configure the NVIC for DMA + 122:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** using function HAL_NVIC_EnableIRQ(DMAx_Channelx_IRQn) + 123:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** (++) Insert the ADC interruption handler function HAL_ADC_IRQHandler() + 124:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** into the function of corresponding DMA interruption vector + 125:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** DMAx_Channelx_IRQHandler(). + 126:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** + 127:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** *** Configuration of ADC, group regular, channels parameters *** + 128:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** ================================================================ + 129:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** [..] + 130:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** + 131:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** (#) Configure the ADC parameters (resolution, data alignment, ...) + 132:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** and regular group parameters (conversion trigger, sequencer, ...) + 133:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** using function HAL_ADC_Init(). + 134:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** + 135:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** (#) Configure the channels for regular group parameters (channel number, + 136:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** channel rank into sequencer, ..., into regular group) + 137:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** using function HAL_ADC_ConfigChannel(). + 138:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** + 139:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** (#) Optionally, configure the analog watchdog parameters (channels + 140:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** monitored, thresholds, ...) + 141:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** using function HAL_ADC_AnalogWDGConfig(). + 142:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** + 143:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** *** Execution of ADC conversions *** + 144:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** ==================================== + 145:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** [..] + 146:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** + ARM GAS /tmp/cc2rPMmj.s page 4 + + + 147:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** (#) Optionally, perform an automatic ADC calibration to improve the + 148:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** conversion accuracy + 149:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** using function HAL_ADCEx_Calibration_Start(). + 150:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** + 151:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** (#) ADC driver can be used among three modes: polling, interruption, + 152:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** transfer by DMA. + 153:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** + 154:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** (++) ADC conversion by polling: + 155:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** (+++) Activate the ADC peripheral and start conversions + 156:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** using function HAL_ADC_Start() + 157:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** (+++) Wait for ADC conversion completion + 158:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** using function HAL_ADC_PollForConversion() + 159:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** (+++) Retrieve conversion results + 160:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** using function HAL_ADC_GetValue() + 161:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** (+++) Stop conversion and disable the ADC peripheral + 162:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** using function HAL_ADC_Stop() + 163:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** + 164:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** (++) ADC conversion by interruption: + 165:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** (+++) Activate the ADC peripheral and start conversions + 166:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** using function HAL_ADC_Start_IT() + 167:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** (+++) Wait for ADC conversion completion by call of function + 168:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** HAL_ADC_ConvCpltCallback() + 169:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** (this function must be implemented in user program) + 170:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** (+++) Retrieve conversion results + 171:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** using function HAL_ADC_GetValue() + 172:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** (+++) Stop conversion and disable the ADC peripheral + 173:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** using function HAL_ADC_Stop_IT() + 174:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** + 175:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** (++) ADC conversion with transfer by DMA: + 176:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** (+++) Activate the ADC peripheral and start conversions + 177:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** using function HAL_ADC_Start_DMA() + 178:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** (+++) Wait for ADC conversion completion by call of function + 179:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** HAL_ADC_ConvCpltCallback() or HAL_ADC_ConvHalfCpltCallback() + 180:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** (these functions must be implemented in user program) + 181:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** (+++) Conversion results are automatically transferred by DMA into + 182:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** destination variable address. + 183:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** (+++) Stop conversion and disable the ADC peripheral + 184:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** using function HAL_ADC_Stop_DMA() + 185:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** + 186:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** [..] + 187:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** + 188:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** (@) Callback functions must be implemented in user program: + 189:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** (+@) HAL_ADC_ErrorCallback() + 190:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** (+@) HAL_ADC_LevelOutOfWindowCallback() (callback of analog watchdog) + 191:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** (+@) HAL_ADC_ConvCpltCallback() + 192:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** (+@) HAL_ADC_ConvHalfCpltCallback + 193:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** + 194:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** *** Deinitialization of ADC *** + 195:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** ============================================================ + 196:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** [..] + 197:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** + 198:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** (#) Disable the ADC interface + 199:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** (++) ADC clock can be hard reset and disabled at RCC top level. + 200:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** (++) Hard reset of ADC peripherals + 201:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** using macro __ADCx_FORCE_RESET(), __ADCx_RELEASE_RESET(). + 202:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** (++) ADC clock disable + 203:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** using the equivalent macro/functions as configuration step. + ARM GAS /tmp/cc2rPMmj.s page 5 + + + 204:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** (+++) Example: + 205:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** Into HAL_ADC_MspDeInit() (recommended code location) or with + 206:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** other device clock parameters configuration: + 207:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** (+++) RCC_OscInitStructure.OscillatorType = RCC_OSCILLATORTYPE_HSI14; + 208:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** (+++) RCC_OscInitStructure.HSI14State = RCC_HSI14_OFF; (if not used for system clock + 209:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** (+++) HAL_RCC_OscConfig(&RCC_OscInitStructure); + 210:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** + 211:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** (#) ADC pins configuration + 212:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** (++) Disable the clock for the ADC GPIOs + 213:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** using macro __HAL_RCC_GPIOx_CLK_DISABLE() + 214:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** + 215:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** (#) Optionally, in case of usage of ADC with interruptions: + 216:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** (++) Disable the NVIC for ADC + 217:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** using function HAL_NVIC_DisableIRQ(ADCx_IRQn) + 218:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** + 219:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** (#) Optionally, in case of usage of DMA: + 220:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** (++) Deinitialize the DMA + 221:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** using function HAL_DMA_DeInit(). + 222:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** (++) Disable the NVIC for DMA + 223:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** using function HAL_NVIC_DisableIRQ(DMAx_Channelx_IRQn) + 224:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** + 225:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** [..] + 226:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** + 227:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** *** Callback registration *** + 228:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** ============================================= + 229:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** [..] + 230:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** + 231:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** The compilation flag USE_HAL_ADC_REGISTER_CALLBACKS, when set to 1, + 232:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** allows the user to configure dynamically the driver callbacks. + 233:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** Use Functions HAL_ADC_RegisterCallback() + 234:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** to register an interrupt callback. + 235:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** [..] + 236:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** + 237:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** Function HAL_ADC_RegisterCallback() allows to register following callbacks: + 238:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** (+) ConvCpltCallback : ADC conversion complete callback + 239:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** (+) ConvHalfCpltCallback : ADC conversion DMA half-transfer callback + 240:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** (+) LevelOutOfWindowCallback : ADC analog watchdog 1 callback + 241:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** (+) ErrorCallback : ADC error callback + 242:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** (+) MspInitCallback : ADC Msp Init callback + 243:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** (+) MspDeInitCallback : ADC Msp DeInit callback + 244:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** This function takes as parameters the HAL peripheral handle, the Callback ID + 245:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** and a pointer to the user callback function. + 246:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** [..] + 247:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** + 248:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** Use function HAL_ADC_UnRegisterCallback to reset a callback to the default + 249:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** weak function. + 250:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** [..] + 251:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** + 252:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** HAL_ADC_UnRegisterCallback takes as parameters the HAL peripheral handle, + 253:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** and the Callback ID. + 254:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** This function allows to reset following callbacks: + 255:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** (+) ConvCpltCallback : ADC conversion complete callback + 256:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** (+) ConvHalfCpltCallback : ADC conversion DMA half-transfer callback + 257:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** (+) LevelOutOfWindowCallback : ADC analog watchdog 1 callback + 258:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** (+) ErrorCallback : ADC error callback + 259:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** (+) MspInitCallback : ADC Msp Init callback + 260:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** (+) MspDeInitCallback : ADC Msp DeInit callback + ARM GAS /tmp/cc2rPMmj.s page 6 + + + 261:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** [..] + 262:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** + 263:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** By default, after the HAL_ADC_Init() and when the state is HAL_ADC_STATE_RESET + 264:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** all callbacks are set to the corresponding weak functions: + 265:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** examples HAL_ADC_ConvCpltCallback(), HAL_ADC_ErrorCallback(). + 266:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** Exception done for MspInit and MspDeInit functions that are + 267:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** reset to the legacy weak functions in the HAL_ADC_Init()/ HAL_ADC_DeInit() only when + 268:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** these callbacks are null (not registered beforehand). + 269:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** [..] + 270:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** + 271:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** If MspInit or MspDeInit are not null, the HAL_ADC_Init()/ HAL_ADC_DeInit() + 272:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** keep and use the user MspInit/MspDeInit callbacks (registered beforehand) whatever the state. + 273:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** [..] + 274:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** + 275:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** Callbacks can be registered/unregistered in HAL_ADC_STATE_READY state only. + 276:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** Exception done MspInit/MspDeInit functions that can be registered/unregistered + 277:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** in HAL_ADC_STATE_READY or HAL_ADC_STATE_RESET state, + 278:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** thus registered (user) MspInit/DeInit callbacks can be used during the Init/DeInit. + 279:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** [..] + 280:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** + 281:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** Then, the user first registers the MspInit/MspDeInit user callbacks + 282:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** using HAL_ADC_RegisterCallback() before calling HAL_ADC_DeInit() + 283:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** or HAL_ADC_Init() function. + 284:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** [..] + 285:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** + 286:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** When the compilation flag USE_HAL_ADC_REGISTER_CALLBACKS is set to 0 or + 287:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** not defined, the callback registration feature is not available and all callbacks + 288:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** are set to the corresponding weak functions. + 289:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** + 290:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** @endverbatim + 291:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** */ + 292:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** + 293:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** /* Includes ------------------------------------------------------------------*/ + 294:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** #include "stm32f0xx_hal.h" + 295:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** + 296:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** /** @addtogroup STM32F0xx_HAL_Driver + 297:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** * @{ + 298:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** */ + 299:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** + 300:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** /** @defgroup ADC ADC + 301:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** * @brief ADC HAL module driver + 302:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** * @{ + 303:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** */ + 304:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** + 305:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** #ifdef HAL_ADC_MODULE_ENABLED + 306:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** + 307:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** /* Private typedef -----------------------------------------------------------*/ + 308:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** /* Private define ------------------------------------------------------------*/ + 309:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** /** @defgroup ADC_Private_Constants ADC Private Constants + 310:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** * @{ + 311:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** */ + 312:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** + 313:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** /* Fixed timeout values for ADC calibration, enable settling time, disable */ + 314:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** /* settling time. */ + 315:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** /* Values defined to be higher than worst cases: low clock frequency, */ + 316:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** /* maximum prescaler. */ + 317:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** /* Ex of profile low frequency : Clock source at 0.1 MHz, ADC clock */ + ARM GAS /tmp/cc2rPMmj.s page 7 + + + 318:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** /* prescaler 4, sampling time 7.5 ADC clock cycles, resolution 12 bits. */ + 319:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** /* Unit: ms */ + 320:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** #define ADC_ENABLE_TIMEOUT ( 2U) + 321:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** #define ADC_DISABLE_TIMEOUT ( 2U) + 322:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** #define ADC_STOP_CONVERSION_TIMEOUT ( 2U) + 323:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** + 324:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** /* Delay for ADC stabilization time. */ + 325:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** /* Maximum delay is 1us (refer to device datasheet, parameter tSTAB). */ + 326:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** /* Unit: us */ + 327:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** #define ADC_STAB_DELAY_US ( 1U) + 328:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** + 329:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** /* Delay for temperature sensor stabilization time. */ + 330:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** /* Maximum delay is 10us (refer to device datasheet, parameter tSTART). */ + 331:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** /* Unit: us */ + 332:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** #define ADC_TEMPSENSOR_DELAY_US ( 10U) + 333:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** + 334:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** /** + 335:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** * @} + 336:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** */ + 337:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** + 338:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** /* Private macro -------------------------------------------------------------*/ + 339:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** /* Private variables ---------------------------------------------------------*/ + 340:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** /* Private function prototypes -----------------------------------------------*/ + 341:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** /** @defgroup ADC_Private_Functions ADC Private Functions + 342:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** * @{ + 343:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** */ + 344:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** static HAL_StatusTypeDef ADC_Enable(ADC_HandleTypeDef* hadc); + 345:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** static HAL_StatusTypeDef ADC_Disable(ADC_HandleTypeDef* hadc); + 346:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** static HAL_StatusTypeDef ADC_ConversionStop(ADC_HandleTypeDef* hadc); + 347:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** static void ADC_DMAConvCplt(DMA_HandleTypeDef *hdma); + 348:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** static void ADC_DMAHalfConvCplt(DMA_HandleTypeDef *hdma); + 349:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** static void ADC_DMAError(DMA_HandleTypeDef *hdma); + 350:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** /** + 351:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** * @} + 352:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** */ + 353:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** + 354:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** /* Exported functions ---------------------------------------------------------*/ + 355:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** + 356:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** /** @defgroup ADC_Exported_Functions ADC Exported Functions + 357:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** * @{ + 358:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** */ + 359:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** + 360:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** /** @defgroup ADC_Exported_Functions_Group1 Initialization/de-initialization functions + 361:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** * @brief Initialization and Configuration functions + 362:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** * + 363:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** @verbatim + 364:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** =============================================================================== + 365:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** ##### Initialization and de-initialization functions ##### + 366:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** =============================================================================== + 367:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** [..] This section provides functions allowing to: + 368:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** (+) Initialize and configure the ADC. + 369:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** (+) De-initialize the ADC + 370:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** @endverbatim + 371:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** * @{ + 372:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** */ + 373:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** + 374:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** /** + ARM GAS /tmp/cc2rPMmj.s page 8 + + + 375:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** * @brief Initializes the ADC peripheral and regular group according to + 376:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** * parameters specified in structure "ADC_InitTypeDef". + 377:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** * @note As prerequisite, ADC clock must be configured at RCC top level + 378:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** * depending on both possible clock sources: APB clock of HSI clock. + 379:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** * See commented example code below that can be copied and uncommented + 380:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** * into HAL_ADC_MspInit(). + 381:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** * @note Possibility to update parameters on the fly: + 382:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** * This function initializes the ADC MSP (HAL_ADC_MspInit()) only when + 383:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** * coming from ADC state reset. Following calls to this function can + 384:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** * be used to reconfigure some parameters of ADC_InitTypeDef + 385:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** * structure on the fly, without modifying MSP configuration. If ADC + 386:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** * MSP has to be modified again, HAL_ADC_DeInit() must be called + 387:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** * before HAL_ADC_Init(). + 388:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** * The setting of these parameters is conditioned to ADC state. + 389:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** * For parameters constraints, see comments of structure + 390:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** * "ADC_InitTypeDef". + 391:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** * @note This function configures the ADC within 2 scopes: scope of entire + 392:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** * ADC and scope of regular group. For parameters details, see comments + 393:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** * of structure "ADC_InitTypeDef". + 394:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** * @param hadc ADC handle + 395:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** * @retval HAL status + 396:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** */ + 397:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** HAL_StatusTypeDef HAL_ADC_Init(ADC_HandleTypeDef* hadc) + 398:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** { + 399:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** HAL_StatusTypeDef tmp_hal_status = HAL_OK; + 400:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** uint32_t tmpCFGR1 = 0U; + 401:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** + 402:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** /* Check ADC handle */ + 403:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** if(hadc == NULL) + 404:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** { + 405:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** return HAL_ERROR; + 406:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** } + 407:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** + 408:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** /* Check the parameters */ + 409:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** assert_param(IS_ADC_ALL_INSTANCE(hadc->Instance)); + 410:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** assert_param(IS_ADC_CLOCKPRESCALER(hadc->Init.ClockPrescaler)); + 411:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** assert_param(IS_ADC_RESOLUTION(hadc->Init.Resolution)); + 412:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** assert_param(IS_ADC_DATA_ALIGN(hadc->Init.DataAlign)); + 413:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** assert_param(IS_ADC_SCAN_MODE(hadc->Init.ScanConvMode)); + 414:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** assert_param(IS_FUNCTIONAL_STATE(hadc->Init.ContinuousConvMode)); + 415:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** assert_param(IS_FUNCTIONAL_STATE(hadc->Init.DiscontinuousConvMode)); + 416:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** assert_param(IS_ADC_EXTTRIG_EDGE(hadc->Init.ExternalTrigConvEdge)); + 417:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** assert_param(IS_ADC_EXTTRIG(hadc->Init.ExternalTrigConv)); + 418:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** assert_param(IS_FUNCTIONAL_STATE(hadc->Init.DMAContinuousRequests)); + 419:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** assert_param(IS_ADC_EOC_SELECTION(hadc->Init.EOCSelection)); + 420:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** assert_param(IS_ADC_OVERRUN(hadc->Init.Overrun)); + 421:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** assert_param(IS_FUNCTIONAL_STATE(hadc->Init.LowPowerAutoWait)); + 422:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** assert_param(IS_FUNCTIONAL_STATE(hadc->Init.LowPowerAutoPowerOff)); + 423:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** + 424:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** /* As prerequisite, into HAL_ADC_MspInit(), ADC clock must be configured */ + 425:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** /* at RCC top level depending on both possible clock sources: */ + 426:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** /* APB clock or HSI clock. */ + 427:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** /* Refer to header of this file for more details on clock enabling procedure*/ + 428:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** + 429:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** /* Actions performed only if ADC is coming from state reset: */ + 430:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** /* - Initialization of ADC MSP */ + 431:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** /* - ADC voltage regulator enable */ + ARM GAS /tmp/cc2rPMmj.s page 9 + + + 432:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** if (hadc->State == HAL_ADC_STATE_RESET) + 433:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** { + 434:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** /* Initialize ADC error code */ + 435:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** ADC_CLEAR_ERRORCODE(hadc); + 436:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** + 437:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** /* Allocate lock resource and initialize it */ + 438:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** hadc->Lock = HAL_UNLOCKED; + 439:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** + 440:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** #if (USE_HAL_ADC_REGISTER_CALLBACKS == 1) + 441:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** /* Init the ADC Callback settings */ + 442:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** hadc->ConvCpltCallback = HAL_ADC_ConvCpltCallback; /* Legacy weak + 443:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** hadc->ConvHalfCpltCallback = HAL_ADC_ConvHalfCpltCallback; /* Legacy weak + 444:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** hadc->LevelOutOfWindowCallback = HAL_ADC_LevelOutOfWindowCallback; /* Legacy weak + 445:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** hadc->ErrorCallback = HAL_ADC_ErrorCallback; /* Legacy weak + 446:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** + 447:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** if (hadc->MspInitCallback == NULL) + 448:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** { + 449:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** hadc->MspInitCallback = HAL_ADC_MspInit; /* Legacy weak MspInit */ + 450:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** } + 451:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** + 452:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** /* Init the low level hardware */ + 453:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** hadc->MspInitCallback(hadc); + 454:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** #else + 455:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** /* Init the low level hardware */ + 456:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** HAL_ADC_MspInit(hadc); + 457:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** #endif /* USE_HAL_ADC_REGISTER_CALLBACKS */ + 458:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** } + 459:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** + 460:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** /* Configuration of ADC parameters if previous preliminary actions are */ + 461:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** /* correctly completed. */ + 462:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** /* and if there is no conversion on going on regular group (ADC can be */ + 463:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** /* enabled anyway, in case of call of this function to update a parameter */ + 464:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** /* on the fly). */ + 465:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** if (HAL_IS_BIT_CLR(hadc->State, HAL_ADC_STATE_ERROR_INTERNAL) && + 466:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** (tmp_hal_status == HAL_OK) && + 467:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** (ADC_IS_CONVERSION_ONGOING_REGULAR(hadc) == RESET) ) + 468:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** { + 469:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** /* Set ADC state */ + 470:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** ADC_STATE_CLR_SET(hadc->State, + 471:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** HAL_ADC_STATE_REG_BUSY, + 472:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** HAL_ADC_STATE_BUSY_INTERNAL); + 473:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** + 474:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** /* Parameters update conditioned to ADC state: */ + 475:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** /* Parameters that can be updated only when ADC is disabled: */ + 476:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** /* - ADC clock mode */ + 477:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** /* - ADC clock prescaler */ + 478:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** /* - ADC resolution */ + 479:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** if (ADC_IS_ENABLE(hadc) == RESET) + 480:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** { + 481:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** /* Some parameters of this register are not reset, since they are set */ + 482:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** /* by other functions and must be kept in case of usage of this */ + 483:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** /* function on the fly (update of a parameter of ADC_InitTypeDef */ + 484:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** /* without needing to reconfigure all other ADC groups/channels */ + 485:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** /* parameters): */ + 486:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** /* - internal measurement paths: Vbat, temperature sensor, Vref */ + 487:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** /* (set into HAL_ADC_ConfigChannel() ) */ + 488:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** + ARM GAS /tmp/cc2rPMmj.s page 10 + + + 489:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** /* Configuration of ADC resolution */ + 490:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** MODIFY_REG(hadc->Instance->CFGR1, + 491:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** ADC_CFGR1_RES , + 492:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** hadc->Init.Resolution ); + 493:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** + 494:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** /* Configuration of ADC clock mode: clock source AHB or HSI with */ + 495:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** /* selectable prescaler */ + 496:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** MODIFY_REG(hadc->Instance->CFGR2 , + 497:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** ADC_CFGR2_CKMODE , + 498:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** hadc->Init.ClockPrescaler ); + 499:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** } + 500:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** + 501:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** /* Configuration of ADC: */ + 502:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** /* - discontinuous mode */ + 503:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** /* - LowPowerAutoWait mode */ + 504:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** /* - LowPowerAutoPowerOff mode */ + 505:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** /* - continuous conversion mode */ + 506:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** /* - overrun */ + 507:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** /* - external trigger to start conversion */ + 508:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** /* - external trigger polarity */ + 509:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** /* - data alignment */ + 510:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** /* - resolution */ + 511:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** /* - scan direction */ + 512:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** /* - DMA continuous request */ + 513:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** hadc->Instance->CFGR1 &= ~( ADC_CFGR1_DISCEN | + 514:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** ADC_CFGR1_AUTOFF | + 515:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** ADC_CFGR1_AUTDLY | + 516:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** ADC_CFGR1_CONT | + 517:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** ADC_CFGR1_OVRMOD | + 518:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** ADC_CFGR1_EXTSEL | + 519:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** ADC_CFGR1_EXTEN | + 520:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** ADC_CFGR1_ALIGN | + 521:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** ADC_CFGR1_SCANDIR | + 522:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** ADC_CFGR1_DMACFG ); + 523:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** + 524:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** tmpCFGR1 |= (ADC_CFGR1_AUTOWAIT((uint32_t)hadc->Init.LowPowerAutoWait) | + 525:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** ADC_CFGR1_AUTOOFF((uint32_t)hadc->Init.LowPowerAutoPowerOff) | + 526:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** ADC_CFGR1_CONTINUOUS((uint32_t)hadc->Init.ContinuousConvMode) | + 527:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** ADC_CFGR1_OVERRUN(hadc->Init.Overrun) | + 528:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** hadc->Init.DataAlign | + 529:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** ADC_SCANDIR(hadc->Init.ScanConvMode) | + 530:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** ADC_CFGR1_DMACONTREQ((uint32_t)hadc->Init.DMAContinuousRequests) ); + 531:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** + 532:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** /* Enable discontinuous mode only if continuous mode is disabled */ + 533:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** if (hadc->Init.DiscontinuousConvMode == ENABLE) + 534:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** { + 535:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** if (hadc->Init.ContinuousConvMode == DISABLE) + 536:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** { + 537:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** /* Enable the selected ADC group regular discontinuous mode */ + 538:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** tmpCFGR1 |= ADC_CFGR1_DISCEN; + 539:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** } + 540:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** else + 541:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** { + 542:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** /* ADC regular group discontinuous was intended to be enabled, */ + 543:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** /* but ADC regular group modes continuous and sequencer discontinuous */ + 544:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** /* cannot be enabled simultaneously. */ + 545:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** + ARM GAS /tmp/cc2rPMmj.s page 11 + + + 546:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** /* Update ADC state machine to error */ + 547:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** SET_BIT(hadc->State, HAL_ADC_STATE_ERROR_CONFIG); + 548:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** + 549:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** /* Set ADC error code to ADC IP internal error */ + 550:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** SET_BIT(hadc->ErrorCode, HAL_ADC_ERROR_INTERNAL); + 551:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** } + 552:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** } + 553:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** + 554:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** /* Enable external trigger if trigger selection is different of software */ + 555:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** /* start. */ + 556:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** /* Note: This configuration keeps the hardware feature of parameter */ + 557:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** /* ExternalTrigConvEdge "trigger edge none" equivalent to */ + 558:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** /* software start. */ + 559:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** if (hadc->Init.ExternalTrigConv != ADC_SOFTWARE_START) + 560:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** { + 561:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** tmpCFGR1 |= ( hadc->Init.ExternalTrigConv | + 562:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** hadc->Init.ExternalTrigConvEdge ); + 563:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** } + 564:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** + 565:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** /* Update ADC configuration register with previous settings */ + 566:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** hadc->Instance->CFGR1 |= tmpCFGR1; + 567:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** + 568:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** /* Channel sampling time configuration */ + 569:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** /* Management of parameters "SamplingTimeCommon" and "SamplingTime" */ + 570:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** /* (obsolete): sampling time set in this function if parameter */ + 571:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** /* "SamplingTimeCommon" has been set to a valid sampling time. */ + 572:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** /* Otherwise, sampling time is set into ADC channel initialization */ + 573:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** /* structure with parameter "SamplingTime" (obsolete). */ + 574:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** if (IS_ADC_SAMPLE_TIME(hadc->Init.SamplingTimeCommon)) + 575:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** { + 576:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** /* Channel sampling time configuration */ + 577:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** /* Clear the old sample time */ + 578:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** hadc->Instance->SMPR &= ~(ADC_SMPR_SMP); + 579:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** + 580:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** /* Set the new sample time */ + 581:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** hadc->Instance->SMPR |= ADC_SMPR_SET(hadc->Init.SamplingTimeCommon); + 582:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** } + 583:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** + 584:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** /* Check back that ADC registers have effectively been configured to */ + 585:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** /* ensure of no potential problem of ADC core IP clocking. */ + 586:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** /* Check through register CFGR1 (excluding analog watchdog configuration: */ + 587:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** /* set into separate dedicated function, and bits of ADC resolution set */ + 588:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** /* out of temporary variable 'tmpCFGR1'). */ + 589:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** if ((hadc->Instance->CFGR1 & ~(ADC_CFGR1_AWDCH | ADC_CFGR1_AWDEN | ADC_CFGR1_AWDSGL | ADC_CFGR1 + 590:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** == tmpCFGR1) + 591:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** { + 592:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** /* Set ADC error code to none */ + 593:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** ADC_CLEAR_ERRORCODE(hadc); + 594:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** + 595:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** /* Set the ADC state */ + 596:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** ADC_STATE_CLR_SET(hadc->State, + 597:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** HAL_ADC_STATE_BUSY_INTERNAL, + 598:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** HAL_ADC_STATE_READY); + 599:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** } + 600:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** else + 601:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** { + 602:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** /* Update ADC state machine to error */ + ARM GAS /tmp/cc2rPMmj.s page 12 + + + 603:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** ADC_STATE_CLR_SET(hadc->State, + 604:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** HAL_ADC_STATE_BUSY_INTERNAL, + 605:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** HAL_ADC_STATE_ERROR_INTERNAL); + 606:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** + 607:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** /* Set ADC error code to ADC IP internal error */ + 608:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** SET_BIT(hadc->ErrorCode, HAL_ADC_ERROR_INTERNAL); + 609:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** + 610:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** tmp_hal_status = HAL_ERROR; + 611:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** } + 612:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** + 613:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** } + 614:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** else + 615:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** { + 616:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** /* Update ADC state machine to error */ + 617:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** SET_BIT(hadc->State, HAL_ADC_STATE_ERROR_INTERNAL); + 618:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** + 619:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** tmp_hal_status = HAL_ERROR; + 620:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** } + 621:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** + 622:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** /* Return function status */ + 623:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** return tmp_hal_status; + 624:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** } + 625:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** + 626:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** + 627:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** /** + 628:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** * @brief Deinitialize the ADC peripheral registers to their default reset + 629:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** * values, with deinitialization of the ADC MSP. + 630:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** * @note For devices with several ADCs: reset of ADC common registers is done + 631:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** * only if all ADCs sharing the same common group are disabled. + 632:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** * If this is not the case, reset of these common parameters reset is + 633:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** * bypassed without error reporting: it can be the intended behaviour in + 634:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** * case of reset of a single ADC while the other ADCs sharing the same + 635:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** * common group is still running. + 636:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** * @param hadc ADC handle + 637:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** * @retval HAL status + 638:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** */ + 639:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** HAL_StatusTypeDef HAL_ADC_DeInit(ADC_HandleTypeDef* hadc) + 640:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** { + 641:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** HAL_StatusTypeDef tmp_hal_status = HAL_OK; + 642:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** + 643:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** /* Check ADC handle */ + 644:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** if(hadc == NULL) + 645:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** { + 646:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** return HAL_ERROR; + 647:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** } + 648:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** + 649:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** /* Check the parameters */ + 650:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** assert_param(IS_ADC_ALL_INSTANCE(hadc->Instance)); + 651:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** + 652:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** /* Set ADC state */ + 653:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** SET_BIT(hadc->State, HAL_ADC_STATE_BUSY_INTERNAL); + 654:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** + 655:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** /* Stop potential conversion on going, on regular group */ + 656:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** tmp_hal_status = ADC_ConversionStop(hadc); + 657:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** + 658:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** /* Disable ADC peripheral if conversions are effectively stopped */ + 659:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** if (tmp_hal_status == HAL_OK) + ARM GAS /tmp/cc2rPMmj.s page 13 + + + 660:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** { + 661:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** /* Disable the ADC peripheral */ + 662:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** tmp_hal_status = ADC_Disable(hadc); + 663:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** + 664:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** /* Check if ADC is effectively disabled */ + 665:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** if (tmp_hal_status != HAL_ERROR) + 666:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** { + 667:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** /* Change ADC state */ + 668:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** hadc->State = HAL_ADC_STATE_READY; + 669:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** } + 670:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** } + 671:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** + 672:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** + 673:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** /* Configuration of ADC parameters if previous preliminary actions are */ + 674:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** /* correctly completed. */ + 675:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** if (tmp_hal_status != HAL_ERROR) + 676:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** { + 677:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** + 678:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** /* ========== Reset ADC registers ========== */ + 679:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** /* Reset register IER */ + 680:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** __HAL_ADC_DISABLE_IT(hadc, (ADC_IT_AWD | ADC_IT_OVR | + 681:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** ADC_IT_EOS | ADC_IT_EOC | + 682:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** ADC_IT_EOSMP | ADC_IT_RDY ) ); + 683:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** + 684:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** /* Reset register ISR */ + 685:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** __HAL_ADC_CLEAR_FLAG(hadc, (ADC_FLAG_AWD | ADC_FLAG_OVR | + 686:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** ADC_FLAG_EOS | ADC_FLAG_EOC | + 687:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** ADC_FLAG_EOSMP | ADC_FLAG_RDY ) ); + 688:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** + 689:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** /* Reset register CR */ + 690:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** /* Bits ADC_CR_ADCAL, ADC_CR_ADSTP, ADC_CR_ADSTART are in access mode */ + 691:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** /* "read-set": no direct reset applicable. */ + 692:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** + 693:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** /* Reset register CFGR1 */ + 694:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** hadc->Instance->CFGR1 &= ~(ADC_CFGR1_AWDCH | ADC_CFGR1_AWDEN | ADC_CFGR1_AWDSGL | ADC_CFGR1_ + 695:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** ADC_CFGR1_AUTOFF | ADC_CFGR1_WAIT | ADC_CFGR1_CONT | ADC_CFGR1_ + 696:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** ADC_CFGR1_EXTEN | ADC_CFGR1_EXTSEL | ADC_CFGR1_ALIGN | ADC_CFGR1_ + 697:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** ADC_CFGR1_SCANDIR | ADC_CFGR1_DMACFG | ADC_CFGR1_DMAEN + 698:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** + 699:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** /* Reset register CFGR2 */ + 700:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** /* Note: Update of ADC clock mode is conditioned to ADC state disabled: */ + 701:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** /* already done above. */ + 702:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** hadc->Instance->CFGR2 &= ~ADC_CFGR2_CKMODE; + 703:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** + 704:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** /* Reset register SMPR */ + 705:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** hadc->Instance->SMPR &= ~ADC_SMPR_SMP; + 706:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** + 707:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** /* Reset register TR1 */ + 708:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** hadc->Instance->TR &= ~(ADC_TR_HT | ADC_TR_LT); + 709:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** + 710:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** /* Reset register CHSELR */ + 711:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** hadc->Instance->CHSELR &= ~(ADC_CHSELR_CHSEL18 | ADC_CHSELR_CHSEL17 | ADC_CHSELR_CHSEL16 | + 712:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** ADC_CHSELR_CHSEL15 | ADC_CHSELR_CHSEL14 | ADC_CHSELR_CHSEL13 | ADC_ + 713:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** ADC_CHSELR_CHSEL11 | ADC_CHSELR_CHSEL10 | ADC_CHSELR_CHSEL9 | ADC_ + 714:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** ADC_CHSELR_CHSEL7 | ADC_CHSELR_CHSEL6 | ADC_CHSELR_CHSEL5 | ADC_ + 715:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** ADC_CHSELR_CHSEL3 | ADC_CHSELR_CHSEL2 | ADC_CHSELR_CHSEL1 | ADC_ + 716:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** + ARM GAS /tmp/cc2rPMmj.s page 14 + + + 717:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** /* Reset register DR */ + 718:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** /* bits in access mode read only, no direct reset applicable*/ + 719:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** + 720:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** /* Reset register CCR */ + 721:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** ADC->CCR &= ~(ADC_CCR_ALL); + 722:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** + 723:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** /* ========== Hard reset ADC peripheral ========== */ + 724:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** /* Performs a global reset of the entire ADC peripheral: ADC state is */ + 725:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** /* forced to a similar state after device power-on. */ + 726:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** /* If needed, copy-paste and uncomment the following reset code into */ + 727:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** /* function "void HAL_ADC_MspInit(ADC_HandleTypeDef* hadc)": */ + 728:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** /* */ + 729:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** /* __HAL_RCC_ADC1_FORCE_RESET() */ + 730:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** /* __HAL_RCC_ADC1_RELEASE_RESET() */ + 731:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** + 732:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** #if (USE_HAL_ADC_REGISTER_CALLBACKS == 1) + 733:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** if (hadc->MspDeInitCallback == NULL) + 734:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** { + 735:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** hadc->MspDeInitCallback = HAL_ADC_MspDeInit; /* Legacy weak MspDeInit */ + 736:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** } + 737:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** + 738:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** /* DeInit the low level hardware */ + 739:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** hadc->MspDeInitCallback(hadc); + 740:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** #else + 741:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** /* DeInit the low level hardware */ + 742:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** HAL_ADC_MspDeInit(hadc); + 743:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** #endif /* USE_HAL_ADC_REGISTER_CALLBACKS */ + 744:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** + 745:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** /* Set ADC error code to none */ + 746:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** ADC_CLEAR_ERRORCODE(hadc); + 747:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** + 748:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** /* Set ADC state */ + 749:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** hadc->State = HAL_ADC_STATE_RESET; + 750:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** } + 751:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** + 752:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** /* Process unlocked */ + 753:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** __HAL_UNLOCK(hadc); + 754:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** + 755:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** /* Return function status */ + 756:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** return tmp_hal_status; + 757:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** } + 758:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** + 759:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** + 760:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** /** + 761:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** * @brief Initializes the ADC MSP. + 762:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** * @param hadc ADC handle + 763:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** * @retval None + 764:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** */ + 765:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** __weak void HAL_ADC_MspInit(ADC_HandleTypeDef* hadc) + 766:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** { + 767:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** /* Prevent unused argument(s) compilation warning */ + 768:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** UNUSED(hadc); + 769:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** + 770:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** /* NOTE : This function should not be modified. When the callback is needed, + 771:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** function HAL_ADC_MspInit must be implemented in the user file. + 772:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** */ + 773:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** } + ARM GAS /tmp/cc2rPMmj.s page 15 + + + 774:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** + 775:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** /** + 776:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** * @brief DeInitializes the ADC MSP. + 777:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** * @param hadc ADC handle + 778:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** * @retval None + 779:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** */ + 780:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** __weak void HAL_ADC_MspDeInit(ADC_HandleTypeDef* hadc) + 781:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** { + 782:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** /* Prevent unused argument(s) compilation warning */ + 783:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** UNUSED(hadc); + 784:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** + 785:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** /* NOTE : This function should not be modified. When the callback is needed, + 786:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** function HAL_ADC_MspDeInit must be implemented in the user file. + 787:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** */ + 788:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** } + 789:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** + 790:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** #if (USE_HAL_ADC_REGISTER_CALLBACKS == 1) + 791:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** /** + 792:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** * @brief Register a User ADC Callback + 793:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** * To be used instead of the weak predefined callback + 794:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** * @param hadc Pointer to a ADC_HandleTypeDef structure that contains + 795:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** * the configuration information for the specified ADC. + 796:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** * @param CallbackID ID of the callback to be registered + 797:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** * This parameter can be one of the following values: + 798:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** * @arg @ref HAL_ADC_CONVERSION_COMPLETE_CB_ID ADC conversion complete callback ID + 799:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** * @arg @ref HAL_ADC_CONVERSION_HALF_CB_ID ADC conversion complete callback ID + 800:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** * @arg @ref HAL_ADC_LEVEL_OUT_OF_WINDOW_1_CB_ID ADC analog watchdog 1 callback ID + 801:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** * @arg @ref HAL_ADC_ERROR_CB_ID ADC error callback ID + 802:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** * @arg @ref HAL_ADC_INJ_CONVERSION_COMPLETE_CB_ID ADC group injected conversion complet + 803:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** * @arg @ref HAL_ADC_MSPINIT_CB_ID ADC Msp Init callback ID + 804:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** * @arg @ref HAL_ADC_MSPDEINIT_CB_ID ADC Msp DeInit callback ID + 805:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** * @arg @ref HAL_ADC_MSPINIT_CB_ID MspInit callback ID + 806:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** * @arg @ref HAL_ADC_MSPDEINIT_CB_ID MspDeInit callback ID + 807:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** * @param pCallback pointer to the Callback function + 808:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** * @retval HAL status + 809:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** */ + 810:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** HAL_StatusTypeDef HAL_ADC_RegisterCallback(ADC_HandleTypeDef *hadc, HAL_ADC_CallbackIDTypeDef Callb + 811:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** { + 812:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** HAL_StatusTypeDef status = HAL_OK; + 813:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** + 814:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** if (pCallback == NULL) + 815:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** { + 816:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** /* Update the error code */ + 817:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** hadc->ErrorCode |= HAL_ADC_ERROR_INVALID_CALLBACK; + 818:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** + 819:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** return HAL_ERROR; + 820:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** } + 821:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** + 822:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** if ((hadc->State & HAL_ADC_STATE_READY) != 0) + 823:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** { + 824:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** switch (CallbackID) + 825:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** { + 826:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** case HAL_ADC_CONVERSION_COMPLETE_CB_ID : + 827:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** hadc->ConvCpltCallback = pCallback; + 828:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** break; + 829:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** + 830:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** case HAL_ADC_CONVERSION_HALF_CB_ID : + ARM GAS /tmp/cc2rPMmj.s page 16 + + + 831:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** hadc->ConvHalfCpltCallback = pCallback; + 832:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** break; + 833:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** + 834:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** case HAL_ADC_LEVEL_OUT_OF_WINDOW_1_CB_ID : + 835:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** hadc->LevelOutOfWindowCallback = pCallback; + 836:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** break; + 837:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** + 838:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** case HAL_ADC_ERROR_CB_ID : + 839:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** hadc->ErrorCallback = pCallback; + 840:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** break; + 841:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** + 842:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** case HAL_ADC_MSPINIT_CB_ID : + 843:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** hadc->MspInitCallback = pCallback; + 844:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** break; + 845:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** + 846:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** case HAL_ADC_MSPDEINIT_CB_ID : + 847:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** hadc->MspDeInitCallback = pCallback; + 848:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** break; + 849:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** + 850:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** default : + 851:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** /* Update the error code */ + 852:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** hadc->ErrorCode |= HAL_ADC_ERROR_INVALID_CALLBACK; + 853:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** + 854:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** /* Return error status */ + 855:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** status = HAL_ERROR; + 856:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** break; + 857:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** } + 858:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** } + 859:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** else if (HAL_ADC_STATE_RESET == hadc->State) + 860:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** { + 861:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** switch (CallbackID) + 862:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** { + 863:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** case HAL_ADC_MSPINIT_CB_ID : + 864:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** hadc->MspInitCallback = pCallback; + 865:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** break; + 866:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** + 867:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** case HAL_ADC_MSPDEINIT_CB_ID : + 868:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** hadc->MspDeInitCallback = pCallback; + 869:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** break; + 870:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** + 871:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** default : + 872:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** /* Update the error code */ + 873:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** hadc->ErrorCode |= HAL_ADC_ERROR_INVALID_CALLBACK; + 874:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** + 875:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** /* Return error status */ + 876:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** status = HAL_ERROR; + 877:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** break; + 878:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** } + 879:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** } + 880:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** else + 881:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** { + 882:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** /* Update the error code */ + 883:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** hadc->ErrorCode |= HAL_ADC_ERROR_INVALID_CALLBACK; + 884:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** + 885:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** /* Return error status */ + 886:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** status = HAL_ERROR; + 887:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** } + ARM GAS /tmp/cc2rPMmj.s page 17 + + + 888:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** + 889:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** return status; + 890:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** } + 891:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** + 892:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** /** + 893:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** * @brief Unregister a ADC Callback + 894:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** * ADC callback is redirected to the weak predefined callback + 895:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** * @param hadc Pointer to a ADC_HandleTypeDef structure that contains + 896:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** * the configuration information for the specified ADC. + 897:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** * @param CallbackID ID of the callback to be unregistered + 898:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** * This parameter can be one of the following values: + 899:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** * @arg @ref HAL_ADC_CONVERSION_COMPLETE_CB_ID ADC conversion complete callback ID + 900:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** * @arg @ref HAL_ADC_CONVERSION_HALF_CB_ID ADC conversion complete callback ID + 901:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** * @arg @ref HAL_ADC_LEVEL_OUT_OF_WINDOW_1_CB_ID ADC analog watchdog 1 callback ID + 902:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** * @arg @ref HAL_ADC_ERROR_CB_ID ADC error callback ID + 903:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** * @arg @ref HAL_ADC_INJ_CONVERSION_COMPLETE_CB_ID ADC group injected conversion complet + 904:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** * @arg @ref HAL_ADC_MSPINIT_CB_ID ADC Msp Init callback ID + 905:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** * @arg @ref HAL_ADC_MSPDEINIT_CB_ID ADC Msp DeInit callback ID + 906:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** * @arg @ref HAL_ADC_MSPINIT_CB_ID MspInit callback ID + 907:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** * @arg @ref HAL_ADC_MSPDEINIT_CB_ID MspDeInit callback ID + 908:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** * @retval HAL status + 909:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** */ + 910:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** HAL_StatusTypeDef HAL_ADC_UnRegisterCallback(ADC_HandleTypeDef *hadc, HAL_ADC_CallbackIDTypeDef Cal + 911:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** { + 912:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** HAL_StatusTypeDef status = HAL_OK; + 913:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** + 914:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** if ((hadc->State & HAL_ADC_STATE_READY) != 0) + 915:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** { + 916:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** switch (CallbackID) + 917:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** { + 918:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** case HAL_ADC_CONVERSION_COMPLETE_CB_ID : + 919:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** hadc->ConvCpltCallback = HAL_ADC_ConvCpltCallback; + 920:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** break; + 921:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** + 922:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** case HAL_ADC_CONVERSION_HALF_CB_ID : + 923:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** hadc->ConvHalfCpltCallback = HAL_ADC_ConvHalfCpltCallback; + 924:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** break; + 925:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** + 926:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** case HAL_ADC_LEVEL_OUT_OF_WINDOW_1_CB_ID : + 927:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** hadc->LevelOutOfWindowCallback = HAL_ADC_LevelOutOfWindowCallback; + 928:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** break; + 929:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** + 930:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** case HAL_ADC_ERROR_CB_ID : + 931:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** hadc->ErrorCallback = HAL_ADC_ErrorCallback; + 932:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** break; + 933:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** + 934:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** case HAL_ADC_MSPINIT_CB_ID : + 935:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** hadc->MspInitCallback = HAL_ADC_MspInit; /* Legacy weak MspInit */ + 936:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** break; + 937:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** + 938:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** case HAL_ADC_MSPDEINIT_CB_ID : + 939:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** hadc->MspDeInitCallback = HAL_ADC_MspDeInit; /* Legacy weak MspDeInit */ + 940:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** break; + 941:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** + 942:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** default : + 943:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** /* Update the error code */ + 944:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** hadc->ErrorCode |= HAL_ADC_ERROR_INVALID_CALLBACK; + ARM GAS /tmp/cc2rPMmj.s page 18 + + + 945:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** + 946:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** /* Return error status */ + 947:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** status = HAL_ERROR; + 948:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** break; + 949:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** } + 950:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** } + 951:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** else if (HAL_ADC_STATE_RESET == hadc->State) + 952:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** { + 953:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** switch (CallbackID) + 954:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** { + 955:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** case HAL_ADC_MSPINIT_CB_ID : + 956:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** hadc->MspInitCallback = HAL_ADC_MspInit; /* Legacy weak MspInit + 957:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** break; + 958:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** + 959:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** case HAL_ADC_MSPDEINIT_CB_ID : + 960:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** hadc->MspDeInitCallback = HAL_ADC_MspDeInit; /* Legacy weak MspDeInit + 961:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** break; + 962:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** + 963:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** default : + 964:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** /* Update the error code */ + 965:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** hadc->ErrorCode |= HAL_ADC_ERROR_INVALID_CALLBACK; + 966:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** + 967:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** /* Return error status */ + 968:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** status = HAL_ERROR; + 969:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** break; + 970:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** } + 971:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** } + 972:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** else + 973:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** { + 974:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** /* Update the error code */ + 975:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** hadc->ErrorCode |= HAL_ADC_ERROR_INVALID_CALLBACK; + 976:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** + 977:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** /* Return error status */ + 978:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** status = HAL_ERROR; + 979:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** } + 980:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** + 981:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** return status; + 982:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** } + 983:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** + 984:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** #endif /* USE_HAL_ADC_REGISTER_CALLBACKS */ + 985:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** + 986:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** /** + 987:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** * @} + 988:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** */ + 989:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** + 990:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** /** @defgroup ADC_Exported_Functions_Group2 IO operation functions + 991:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** * @brief IO operation functions + 992:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** * + 993:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** @verbatim + 994:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** =============================================================================== + 995:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** ##### IO operation functions ##### + 996:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** =============================================================================== + 997:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** [..] This section provides functions allowing to: + 998:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** (+) Start conversion of regular group. + 999:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** (+) Stop conversion of regular group. +1000:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** (+) Poll for conversion complete on regular group. +1001:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** (+) Poll for conversion event. + ARM GAS /tmp/cc2rPMmj.s page 19 + + +1002:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** (+) Get result of regular channel conversion. +1003:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** (+) Start conversion of regular group and enable interruptions. +1004:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** (+) Stop conversion of regular group and disable interruptions. +1005:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** (+) Handle ADC interrupt request +1006:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** (+) Start conversion of regular group and enable DMA transfer. +1007:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** (+) Stop conversion of regular group and disable ADC DMA transfer. +1008:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** @endverbatim +1009:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** * @{ +1010:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** */ +1011:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** +1012:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** /** +1013:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** * @brief Enables ADC, starts conversion of regular group. +1014:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** * Interruptions enabled in this function: None. +1015:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** * @param hadc ADC handle +1016:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** * @retval HAL status +1017:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** */ +1018:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** HAL_StatusTypeDef HAL_ADC_Start(ADC_HandleTypeDef* hadc) +1019:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** { +1020:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** HAL_StatusTypeDef tmp_hal_status = HAL_OK; +1021:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** +1022:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** /* Check the parameters */ +1023:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** assert_param(IS_ADC_ALL_INSTANCE(hadc->Instance)); +1024:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** +1025:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** /* Perform ADC enable and conversion start if no conversion is on going */ +1026:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** if (ADC_IS_CONVERSION_ONGOING_REGULAR(hadc) == RESET) +1027:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** { +1028:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** /* Process locked */ +1029:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** __HAL_LOCK(hadc); +1030:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** +1031:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** /* Enable the ADC peripheral */ +1032:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** /* If low power mode AutoPowerOff is enabled, power-on/off phases are */ +1033:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** /* performed automatically by hardware. */ +1034:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** if (hadc->Init.LowPowerAutoPowerOff != ENABLE) +1035:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** { +1036:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** tmp_hal_status = ADC_Enable(hadc); +1037:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** } +1038:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** +1039:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** /* Start conversion if ADC is effectively enabled */ +1040:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** if (tmp_hal_status == HAL_OK) +1041:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** { +1042:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** /* Set ADC state */ +1043:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** /* - Clear state bitfield related to regular group conversion results */ +1044:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** /* - Set state bitfield related to regular operation */ +1045:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** ADC_STATE_CLR_SET(hadc->State, +1046:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** HAL_ADC_STATE_READY | HAL_ADC_STATE_REG_EOC | HAL_ADC_STATE_REG_OVR | HAL_A +1047:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** HAL_ADC_STATE_REG_BUSY); +1048:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** +1049:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** /* Reset ADC all error code fields */ +1050:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** ADC_CLEAR_ERRORCODE(hadc); +1051:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** +1052:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** /* Process unlocked */ +1053:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** /* Unlock before starting ADC conversions: in case of potential */ +1054:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** /* interruption, to let the process to ADC IRQ Handler. */ +1055:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** __HAL_UNLOCK(hadc); +1056:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** +1057:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** /* Clear regular group conversion flag and overrun flag */ +1058:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** /* (To ensure of no unknown state from potential previous ADC */ + ARM GAS /tmp/cc2rPMmj.s page 20 + + +1059:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** /* operations) */ +1060:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** __HAL_ADC_CLEAR_FLAG(hadc, (ADC_FLAG_EOC | ADC_FLAG_EOS | ADC_FLAG_OVR)); +1061:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** +1062:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** /* Enable conversion of regular group. */ +1063:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** /* If software start has been selected, conversion starts immediately. */ +1064:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** /* If external trigger has been selected, conversion will start at next */ +1065:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** /* trigger event. */ +1066:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** hadc->Instance->CR |= ADC_CR_ADSTART; +1067:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** } +1068:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** } +1069:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** else +1070:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** { +1071:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** tmp_hal_status = HAL_BUSY; +1072:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** } +1073:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** +1074:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** /* Return function status */ +1075:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** return tmp_hal_status; +1076:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** } +1077:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** +1078:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** /** +1079:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** * @brief Stop ADC conversion of regular group, disable ADC peripheral. +1080:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** * @param hadc ADC handle +1081:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** * @retval HAL status. +1082:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** */ +1083:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** HAL_StatusTypeDef HAL_ADC_Stop(ADC_HandleTypeDef* hadc) +1084:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** { +1085:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** HAL_StatusTypeDef tmp_hal_status = HAL_OK; +1086:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** +1087:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** /* Check the parameters */ +1088:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** assert_param(IS_ADC_ALL_INSTANCE(hadc->Instance)); +1089:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** +1090:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** /* Process locked */ +1091:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** __HAL_LOCK(hadc); +1092:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** +1093:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** /* 1. Stop potential conversion on going, on regular group */ +1094:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** tmp_hal_status = ADC_ConversionStop(hadc); +1095:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** +1096:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** /* Disable ADC peripheral if conversions are effectively stopped */ +1097:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** if (tmp_hal_status == HAL_OK) +1098:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** { +1099:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** /* 2. Disable the ADC peripheral */ +1100:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** tmp_hal_status = ADC_Disable(hadc); +1101:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** +1102:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** /* Check if ADC is effectively disabled */ +1103:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** if (tmp_hal_status == HAL_OK) +1104:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** { +1105:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** /* Set ADC state */ +1106:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** ADC_STATE_CLR_SET(hadc->State, +1107:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** HAL_ADC_STATE_REG_BUSY, +1108:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** HAL_ADC_STATE_READY); +1109:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** } +1110:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** } +1111:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** +1112:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** /* Process unlocked */ +1113:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** __HAL_UNLOCK(hadc); +1114:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** +1115:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** /* Return function status */ + ARM GAS /tmp/cc2rPMmj.s page 21 + + +1116:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** return tmp_hal_status; +1117:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** } +1118:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** +1119:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** /** +1120:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** * @brief Wait for regular group conversion to be completed. +1121:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** * @note ADC conversion flags EOS (end of sequence) and EOC (end of +1122:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** * conversion) are cleared by this function, with an exception: +1123:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** * if low power feature "LowPowerAutoWait" is enabled, flags are +1124:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** * not cleared to not interfere with this feature until data register +1125:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** * is read using function HAL_ADC_GetValue(). +1126:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** * @note This function cannot be used in a particular setup: ADC configured +1127:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** * in DMA mode and polling for end of each conversion (ADC init +1128:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** * parameter "EOCSelection" set to ADC_EOC_SINGLE_CONV). +1129:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** * In this case, DMA resets the flag EOC and polling cannot be +1130:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** * performed on each conversion. Nevertheless, polling can still +1131:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** * be performed on the complete sequence (ADC init +1132:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** * parameter "EOCSelection" set to ADC_EOC_SEQ_CONV). +1133:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** * @param hadc ADC handle +1134:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** * @param Timeout Timeout value in millisecond. +1135:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** * @retval HAL status +1136:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** */ +1137:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** HAL_StatusTypeDef HAL_ADC_PollForConversion(ADC_HandleTypeDef* hadc, uint32_t Timeout) +1138:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** { +1139:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** uint32_t tickstart; +1140:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** uint32_t tmp_Flag_EOC; +1141:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** +1142:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** /* Check the parameters */ +1143:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** assert_param(IS_ADC_ALL_INSTANCE(hadc->Instance)); +1144:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** +1145:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** /* If end of conversion selected to end of sequence */ +1146:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** if (hadc->Init.EOCSelection == ADC_EOC_SEQ_CONV) +1147:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** { +1148:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** tmp_Flag_EOC = ADC_FLAG_EOS; +1149:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** } +1150:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** /* If end of conversion selected to end of each conversion */ +1151:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** else /* ADC_EOC_SINGLE_CONV */ +1152:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** { +1153:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** /* Verification that ADC configuration is compliant with polling for */ +1154:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** /* each conversion: */ +1155:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** /* Particular case is ADC configured in DMA mode and ADC sequencer with */ +1156:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** /* several ranks and polling for end of each conversion. */ +1157:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** /* For code simplicity sake, this particular case is generalized to */ +1158:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** /* ADC configured in DMA mode and and polling for end of each conversion. */ +1159:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** if (HAL_IS_BIT_SET(hadc->Instance->CFGR1, ADC_CFGR1_DMAEN)) +1160:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** { +1161:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** /* Update ADC state machine to error */ +1162:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** SET_BIT(hadc->State, HAL_ADC_STATE_ERROR_CONFIG); +1163:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** +1164:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** /* Process unlocked */ +1165:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** __HAL_UNLOCK(hadc); +1166:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** +1167:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** return HAL_ERROR; +1168:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** } +1169:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** else +1170:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** { +1171:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** tmp_Flag_EOC = (ADC_FLAG_EOC | ADC_FLAG_EOS); +1172:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** } + ARM GAS /tmp/cc2rPMmj.s page 22 + + +1173:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** } +1174:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** +1175:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** /* Get tick count */ +1176:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** tickstart = HAL_GetTick(); +1177:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** +1178:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** /* Wait until End of Conversion flag is raised */ +1179:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** while(HAL_IS_BIT_CLR(hadc->Instance->ISR, tmp_Flag_EOC)) +1180:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** { +1181:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** /* Check if timeout is disabled (set to infinite wait) */ +1182:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** if(Timeout != HAL_MAX_DELAY) +1183:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** { +1184:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** if((Timeout == 0) || ((HAL_GetTick()-tickstart) > Timeout)) +1185:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** { +1186:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** /* New check to avoid false timeout detection in case of preemption */ +1187:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** if(HAL_IS_BIT_CLR(hadc->Instance->ISR, tmp_Flag_EOC)) +1188:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** { +1189:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** /* Update ADC state machine to timeout */ +1190:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** SET_BIT(hadc->State, HAL_ADC_STATE_TIMEOUT); +1191:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** +1192:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** /* Process unlocked */ +1193:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** __HAL_UNLOCK(hadc); +1194:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** +1195:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** return HAL_TIMEOUT; +1196:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** } +1197:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** } +1198:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** } +1199:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** } +1200:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** +1201:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** /* Update ADC state machine */ +1202:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** SET_BIT(hadc->State, HAL_ADC_STATE_REG_EOC); +1203:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** +1204:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** /* Determine whether any further conversion upcoming on group regular */ +1205:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** /* by external trigger, continuous mode or scan sequence on going. */ +1206:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** if(ADC_IS_SOFTWARE_START_REGULAR(hadc) && +1207:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** (hadc->Init.ContinuousConvMode == DISABLE) ) +1208:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** { +1209:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** /* If End of Sequence is reached, disable interrupts */ +1210:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** if( __HAL_ADC_GET_FLAG(hadc, ADC_FLAG_EOS) ) +1211:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** { +1212:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** /* Allowed to modify bits ADC_IT_EOC/ADC_IT_EOS only if bit */ +1213:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** /* ADSTART==0 (no conversion on going) */ +1214:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** if (ADC_IS_CONVERSION_ONGOING_REGULAR(hadc) == RESET) +1215:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** { +1216:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** /* Disable ADC end of single conversion interrupt on group regular */ +1217:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** /* Note: Overrun interrupt was enabled with EOC interrupt in */ +1218:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** /* HAL_Start_IT(), but is not disabled here because can be used */ +1219:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** /* by overrun IRQ process below. */ +1220:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** __HAL_ADC_DISABLE_IT(hadc, ADC_IT_EOC | ADC_IT_EOS); +1221:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** +1222:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** /* Set ADC state */ +1223:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** ADC_STATE_CLR_SET(hadc->State, +1224:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** HAL_ADC_STATE_REG_BUSY, +1225:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** HAL_ADC_STATE_READY); +1226:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** } +1227:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** else +1228:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** { +1229:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** /* Change ADC state to error state */ + ARM GAS /tmp/cc2rPMmj.s page 23 + + +1230:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** SET_BIT(hadc->State, HAL_ADC_STATE_ERROR_CONFIG); +1231:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** +1232:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** /* Set ADC error code to ADC IP internal error */ +1233:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** SET_BIT(hadc->ErrorCode, HAL_ADC_ERROR_INTERNAL); +1234:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** } +1235:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** } +1236:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** } +1237:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** +1238:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** /* Clear end of conversion flag of regular group if low power feature */ +1239:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** /* "LowPowerAutoWait " is disabled, to not interfere with this feature */ +1240:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** /* until data register is read using function HAL_ADC_GetValue(). */ +1241:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** if (hadc->Init.LowPowerAutoWait == DISABLE) +1242:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** { +1243:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** /* Clear regular group conversion flag */ +1244:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** __HAL_ADC_CLEAR_FLAG(hadc, (ADC_FLAG_EOC | ADC_FLAG_EOS)); +1245:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** } +1246:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** +1247:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** /* Return ADC state */ +1248:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** return HAL_OK; +1249:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** } +1250:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** +1251:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** /** +1252:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** * @brief Poll for conversion event. +1253:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** * @param hadc ADC handle +1254:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** * @param EventType the ADC event type. +1255:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** * This parameter can be one of the following values: +1256:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** * @arg ADC_AWD_EVENT: ADC Analog watchdog event +1257:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** * @arg ADC_OVR_EVENT: ADC Overrun event +1258:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** * @param Timeout Timeout value in millisecond. +1259:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** * @retval HAL status +1260:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** */ +1261:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** HAL_StatusTypeDef HAL_ADC_PollForEvent(ADC_HandleTypeDef* hadc, uint32_t EventType, uint32_t Timeou +1262:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** { +1263:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** uint32_t tickstart=0; +1264:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** +1265:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** /* Check the parameters */ +1266:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** assert_param(IS_ADC_ALL_INSTANCE(hadc->Instance)); +1267:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** assert_param(IS_ADC_EVENT_TYPE(EventType)); +1268:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** +1269:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** /* Get tick count */ +1270:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** tickstart = HAL_GetTick(); +1271:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** +1272:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** /* Check selected event flag */ +1273:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** while(__HAL_ADC_GET_FLAG(hadc, EventType) == RESET) +1274:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** { +1275:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** /* Check if timeout is disabled (set to infinite wait) */ +1276:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** if(Timeout != HAL_MAX_DELAY) +1277:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** { +1278:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** if((Timeout == 0U) || ((HAL_GetTick()-tickstart) > Timeout)) +1279:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** { +1280:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** /* New check to avoid false timeout detection in case of preemption */ +1281:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** if(__HAL_ADC_GET_FLAG(hadc, EventType) == RESET) +1282:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** { +1283:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** /* Update ADC state machine to timeout */ +1284:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** SET_BIT(hadc->State, HAL_ADC_STATE_TIMEOUT); +1285:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** +1286:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** /* Process unlocked */ + ARM GAS /tmp/cc2rPMmj.s page 24 + + +1287:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** __HAL_UNLOCK(hadc); +1288:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** +1289:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** return HAL_TIMEOUT; +1290:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** } +1291:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** } +1292:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** } +1293:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** } +1294:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** +1295:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** switch(EventType) +1296:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** { +1297:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** /* Analog watchdog (level out of window) event */ +1298:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** case ADC_AWD_EVENT: +1299:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** /* Set ADC state */ +1300:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** SET_BIT(hadc->State, HAL_ADC_STATE_AWD1); +1301:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** +1302:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** /* Clear ADC analog watchdog flag */ +1303:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** __HAL_ADC_CLEAR_FLAG(hadc, ADC_FLAG_AWD); +1304:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** break; +1305:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** +1306:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** /* Overrun event */ +1307:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** default: /* Case ADC_OVR_EVENT */ +1308:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** /* If overrun is set to overwrite previous data, overrun event is not */ +1309:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** /* considered as an error. */ +1310:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** /* (cf ref manual "Managing conversions without using the DMA and without */ +1311:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** /* overrun ") */ +1312:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** if (hadc->Init.Overrun == ADC_OVR_DATA_PRESERVED) +1313:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** { +1314:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** /* Set ADC state */ +1315:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** SET_BIT(hadc->State, HAL_ADC_STATE_REG_OVR); +1316:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** +1317:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** /* Set ADC error code to overrun */ +1318:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** SET_BIT(hadc->ErrorCode, HAL_ADC_ERROR_OVR); +1319:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** } +1320:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** +1321:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** /* Clear ADC Overrun flag */ +1322:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** __HAL_ADC_CLEAR_FLAG(hadc, ADC_FLAG_OVR); +1323:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** break; +1324:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** } +1325:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** +1326:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** /* Return ADC state */ +1327:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** return HAL_OK; +1328:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** } +1329:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** +1330:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** /** +1331:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** * @brief Enables ADC, starts conversion of regular group with interruption. +1332:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** * Interruptions enabled in this function: +1333:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** * - EOC (end of conversion of regular group) or EOS (end of +1334:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** * sequence of regular group) depending on ADC initialization +1335:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** * parameter "EOCSelection" +1336:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** * - overrun (if available) +1337:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** * Each of these interruptions has its dedicated callback function. +1338:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** * @param hadc ADC handle +1339:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** * @retval HAL status +1340:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** */ +1341:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** HAL_StatusTypeDef HAL_ADC_Start_IT(ADC_HandleTypeDef* hadc) +1342:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** { +1343:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** HAL_StatusTypeDef tmp_hal_status = HAL_OK; + ARM GAS /tmp/cc2rPMmj.s page 25 + + +1344:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** +1345:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** /* Check the parameters */ +1346:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** assert_param(IS_ADC_ALL_INSTANCE(hadc->Instance)); +1347:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** +1348:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** /* Perform ADC enable and conversion start if no conversion is on going */ +1349:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** if (ADC_IS_CONVERSION_ONGOING_REGULAR(hadc) == RESET) +1350:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** { +1351:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** /* Process locked */ +1352:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** __HAL_LOCK(hadc); +1353:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** +1354:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** /* Enable the ADC peripheral */ +1355:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** /* If low power mode AutoPowerOff is enabled, power-on/off phases are */ +1356:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** /* performed automatically by hardware. */ +1357:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** if (hadc->Init.LowPowerAutoPowerOff != ENABLE) +1358:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** { +1359:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** tmp_hal_status = ADC_Enable(hadc); +1360:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** } +1361:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** +1362:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** /* Start conversion if ADC is effectively enabled */ +1363:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** if (tmp_hal_status == HAL_OK) +1364:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** { +1365:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** /* Set ADC state */ +1366:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** /* - Clear state bitfield related to regular group conversion results */ +1367:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** /* - Set state bitfield related to regular operation */ +1368:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** ADC_STATE_CLR_SET(hadc->State, +1369:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** HAL_ADC_STATE_READY | HAL_ADC_STATE_REG_EOC | HAL_ADC_STATE_REG_OVR | HAL_A +1370:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** HAL_ADC_STATE_REG_BUSY); +1371:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** +1372:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** /* Reset ADC all error code fields */ +1373:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** ADC_CLEAR_ERRORCODE(hadc); +1374:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** +1375:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** /* Process unlocked */ +1376:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** /* Unlock before starting ADC conversions: in case of potential */ +1377:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** /* interruption, to let the process to ADC IRQ Handler. */ +1378:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** __HAL_UNLOCK(hadc); +1379:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** +1380:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** /* Clear regular group conversion flag and overrun flag */ +1381:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** /* (To ensure of no unknown state from potential previous ADC */ +1382:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** /* operations) */ +1383:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** __HAL_ADC_CLEAR_FLAG(hadc, (ADC_FLAG_EOC | ADC_FLAG_EOS | ADC_FLAG_OVR)); +1384:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** +1385:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** /* Enable ADC end of conversion interrupt */ +1386:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** /* Enable ADC overrun interrupt */ +1387:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** switch(hadc->Init.EOCSelection) +1388:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** { +1389:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** case ADC_EOC_SEQ_CONV: +1390:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** __HAL_ADC_DISABLE_IT(hadc, ADC_IT_EOC); +1391:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** __HAL_ADC_ENABLE_IT(hadc, (ADC_IT_EOS | ADC_IT_OVR)); +1392:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** break; +1393:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** /* case ADC_EOC_SINGLE_CONV */ +1394:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** default: +1395:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** __HAL_ADC_ENABLE_IT(hadc, (ADC_IT_EOC | ADC_IT_EOS | ADC_IT_OVR)); +1396:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** break; +1397:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** } +1398:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** +1399:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** /* Enable conversion of regular group. */ +1400:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** /* If software start has been selected, conversion starts immediately. */ + ARM GAS /tmp/cc2rPMmj.s page 26 + + +1401:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** /* If external trigger has been selected, conversion will start at next */ +1402:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** /* trigger event. */ +1403:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** hadc->Instance->CR |= ADC_CR_ADSTART; +1404:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** } +1405:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** } +1406:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** else +1407:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** { +1408:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** tmp_hal_status = HAL_BUSY; +1409:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** } +1410:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** +1411:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** /* Return function status */ +1412:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** return tmp_hal_status; +1413:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** } +1414:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** +1415:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** +1416:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** /** +1417:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** * @brief Stop ADC conversion of regular group, disable interruption of +1418:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** * end-of-conversion, disable ADC peripheral. +1419:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** * @param hadc ADC handle +1420:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** * @retval HAL status. +1421:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** */ +1422:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** HAL_StatusTypeDef HAL_ADC_Stop_IT(ADC_HandleTypeDef* hadc) +1423:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** { +1424:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** HAL_StatusTypeDef tmp_hal_status = HAL_OK; +1425:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** +1426:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** /* Check the parameters */ +1427:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** assert_param(IS_ADC_ALL_INSTANCE(hadc->Instance)); +1428:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** +1429:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** /* Process locked */ +1430:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** __HAL_LOCK(hadc); +1431:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** +1432:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** /* 1. Stop potential conversion on going, on regular group */ +1433:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** tmp_hal_status = ADC_ConversionStop(hadc); +1434:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** +1435:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** /* Disable ADC peripheral if conversions are effectively stopped */ +1436:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** if (tmp_hal_status == HAL_OK) +1437:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** { +1438:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** /* Disable ADC end of conversion interrupt for regular group */ +1439:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** /* Disable ADC overrun interrupt */ +1440:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** __HAL_ADC_DISABLE_IT(hadc, (ADC_IT_EOC | ADC_IT_EOS | ADC_IT_OVR)); +1441:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** +1442:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** /* 2. Disable the ADC peripheral */ +1443:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** tmp_hal_status = ADC_Disable(hadc); +1444:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** +1445:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** /* Check if ADC is effectively disabled */ +1446:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** if (tmp_hal_status == HAL_OK) +1447:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** { +1448:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** /* Set ADC state */ +1449:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** ADC_STATE_CLR_SET(hadc->State, +1450:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** HAL_ADC_STATE_REG_BUSY, +1451:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** HAL_ADC_STATE_READY); +1452:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** } +1453:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** } +1454:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** +1455:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** /* Process unlocked */ +1456:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** __HAL_UNLOCK(hadc); +1457:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** + ARM GAS /tmp/cc2rPMmj.s page 27 + + +1458:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** /* Return function status */ +1459:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** return tmp_hal_status; +1460:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** } +1461:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** +1462:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** /** +1463:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** * @brief Enables ADC, starts conversion of regular group and transfers result +1464:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** * through DMA. +1465:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** * Interruptions enabled in this function: +1466:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** * - DMA transfer complete +1467:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** * - DMA half transfer +1468:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** * - overrun +1469:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** * Each of these interruptions has its dedicated callback function. +1470:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** * @param hadc ADC handle +1471:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** * @param pData The destination Buffer address. +1472:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** * @param Length The length of data to be transferred from ADC peripheral to memory. +1473:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** * @retval None +1474:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** */ +1475:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** HAL_StatusTypeDef HAL_ADC_Start_DMA(ADC_HandleTypeDef* hadc, uint32_t* pData, uint32_t Length) +1476:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** { +1477:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** HAL_StatusTypeDef tmp_hal_status = HAL_OK; +1478:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** +1479:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** /* Check the parameters */ +1480:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** assert_param(IS_ADC_ALL_INSTANCE(hadc->Instance)); +1481:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** +1482:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** /* Perform ADC enable and conversion start if no conversion is on going */ +1483:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** if (ADC_IS_CONVERSION_ONGOING_REGULAR(hadc) == RESET) +1484:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** { +1485:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** /* Process locked */ +1486:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** __HAL_LOCK(hadc); +1487:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** +1488:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** /* Enable the ADC peripheral */ +1489:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** /* If low power mode AutoPowerOff is enabled, power-on/off phases are */ +1490:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** /* performed automatically by hardware. */ +1491:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** if (hadc->Init.LowPowerAutoPowerOff != ENABLE) +1492:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** { +1493:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** tmp_hal_status = ADC_Enable(hadc); +1494:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** } +1495:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** +1496:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** /* Start conversion if ADC is effectively enabled */ +1497:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** if (tmp_hal_status == HAL_OK) +1498:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** { +1499:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** /* Set ADC state */ +1500:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** /* - Clear state bitfield related to regular group conversion results */ +1501:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** /* - Set state bitfield related to regular operation */ +1502:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** ADC_STATE_CLR_SET(hadc->State, +1503:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** HAL_ADC_STATE_READY | HAL_ADC_STATE_REG_EOC | HAL_ADC_STATE_REG_OVR | HAL_A +1504:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** HAL_ADC_STATE_REG_BUSY); +1505:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** +1506:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** /* Reset ADC all error code fields */ +1507:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** ADC_CLEAR_ERRORCODE(hadc); +1508:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** +1509:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** /* Process unlocked */ +1510:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** /* Unlock before starting ADC conversions: in case of potential */ +1511:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** /* interruption, to let the process to ADC IRQ Handler. */ +1512:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** __HAL_UNLOCK(hadc); +1513:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** +1514:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** /* Set the DMA transfer complete callback */ + ARM GAS /tmp/cc2rPMmj.s page 28 + + +1515:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** hadc->DMA_Handle->XferCpltCallback = ADC_DMAConvCplt; +1516:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** +1517:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** /* Set the DMA half transfer complete callback */ +1518:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** hadc->DMA_Handle->XferHalfCpltCallback = ADC_DMAHalfConvCplt; +1519:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** +1520:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** /* Set the DMA error callback */ +1521:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** hadc->DMA_Handle->XferErrorCallback = ADC_DMAError; +1522:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** +1523:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** +1524:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** /* Manage ADC and DMA start: ADC overrun interruption, DMA start, ADC */ +1525:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** /* start (in case of SW start): */ +1526:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** +1527:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** /* Clear regular group conversion flag and overrun flag */ +1528:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** /* (To ensure of no unknown state from potential previous ADC */ +1529:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** /* operations) */ +1530:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** __HAL_ADC_CLEAR_FLAG(hadc, (ADC_FLAG_EOC | ADC_FLAG_EOS | ADC_FLAG_OVR)); +1531:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** +1532:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** /* Enable ADC overrun interrupt */ +1533:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** __HAL_ADC_ENABLE_IT(hadc, ADC_IT_OVR); +1534:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** +1535:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** /* Enable ADC DMA mode */ +1536:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** hadc->Instance->CFGR1 |= ADC_CFGR1_DMAEN; +1537:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** +1538:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** /* Start the DMA channel */ +1539:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** HAL_DMA_Start_IT(hadc->DMA_Handle, (uint32_t)&hadc->Instance->DR, (uint32_t)pData, Length); +1540:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** +1541:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** /* Enable conversion of regular group. */ +1542:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** /* If software start has been selected, conversion starts immediately. */ +1543:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** /* If external trigger has been selected, conversion will start at next */ +1544:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** /* trigger event. */ +1545:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** hadc->Instance->CR |= ADC_CR_ADSTART; +1546:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** } +1547:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** } +1548:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** else +1549:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** { +1550:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** tmp_hal_status = HAL_BUSY; +1551:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** } +1552:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** +1553:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** /* Return function status */ +1554:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** return tmp_hal_status; +1555:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** } +1556:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** +1557:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** /** +1558:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** * @brief Stop ADC conversion of regular group, disable ADC DMA transfer, disable +1559:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** * ADC peripheral. +1560:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** * Each of these interruptions has its dedicated callback function. +1561:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** * @param hadc ADC handle +1562:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** * @retval HAL status. +1563:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** */ +1564:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** HAL_StatusTypeDef HAL_ADC_Stop_DMA(ADC_HandleTypeDef* hadc) +1565:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** { +1566:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** HAL_StatusTypeDef tmp_hal_status = HAL_OK; +1567:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** +1568:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** /* Check the parameters */ +1569:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** assert_param(IS_ADC_ALL_INSTANCE(hadc->Instance)); +1570:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** +1571:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** /* Process locked */ + ARM GAS /tmp/cc2rPMmj.s page 29 + + +1572:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** __HAL_LOCK(hadc); +1573:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** +1574:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** /* 1. Stop potential conversion on going, on regular group */ +1575:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** tmp_hal_status = ADC_ConversionStop(hadc); +1576:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** +1577:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** /* Disable ADC peripheral if conversions are effectively stopped */ +1578:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** if (tmp_hal_status == HAL_OK) +1579:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** { +1580:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** /* Disable ADC DMA (ADC DMA configuration ADC_CFGR_DMACFG is kept) */ +1581:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** hadc->Instance->CFGR1 &= ~ADC_CFGR1_DMAEN; +1582:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** +1583:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** /* Disable the DMA channel (in case of DMA in circular mode or stop while */ +1584:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** /* while DMA transfer is on going) */ +1585:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** if (hadc->DMA_Handle->State == HAL_DMA_STATE_BUSY) +1586:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** { +1587:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** tmp_hal_status = HAL_DMA_Abort(hadc->DMA_Handle); +1588:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** +1589:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** /* Check if DMA channel effectively disabled */ +1590:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** if (tmp_hal_status != HAL_OK) +1591:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** { +1592:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** /* Update ADC state machine to error */ +1593:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** SET_BIT(hadc->State, HAL_ADC_STATE_ERROR_DMA); +1594:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** } +1595:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** } +1596:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** +1597:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** /* Disable ADC overrun interrupt */ +1598:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** __HAL_ADC_DISABLE_IT(hadc, ADC_IT_OVR); +1599:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** +1600:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** /* 2. Disable the ADC peripheral */ +1601:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** /* Update "tmp_hal_status" only if DMA channel disabling passed, to keep */ +1602:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** /* in memory a potential failing status. */ +1603:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** if (tmp_hal_status == HAL_OK) +1604:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** { +1605:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** tmp_hal_status = ADC_Disable(hadc); +1606:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** } +1607:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** else +1608:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** { +1609:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** ADC_Disable(hadc); +1610:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** } +1611:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** +1612:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** /* Check if ADC is effectively disabled */ +1613:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** if (tmp_hal_status == HAL_OK) +1614:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** { +1615:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** /* Set ADC state */ +1616:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** ADC_STATE_CLR_SET(hadc->State, +1617:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** HAL_ADC_STATE_REG_BUSY, +1618:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** HAL_ADC_STATE_READY); +1619:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** } +1620:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** +1621:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** } +1622:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** +1623:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** /* Process unlocked */ +1624:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** __HAL_UNLOCK(hadc); +1625:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** +1626:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** /* Return function status */ +1627:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** return tmp_hal_status; +1628:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** } + ARM GAS /tmp/cc2rPMmj.s page 30 + + +1629:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** +1630:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** /** +1631:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** * @brief Get ADC regular group conversion result. +1632:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** * @note Reading register DR automatically clears ADC flag EOC +1633:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** * (ADC group regular end of unitary conversion). +1634:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** * @note This function does not clear ADC flag EOS +1635:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** * (ADC group regular end of sequence conversion). +1636:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** * Occurrence of flag EOS rising: +1637:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** * - If sequencer is composed of 1 rank, flag EOS is equivalent +1638:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** * to flag EOC. +1639:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** * - If sequencer is composed of several ranks, during the scan +1640:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** * sequence flag EOC only is raised, at the end of the scan sequence +1641:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** * both flags EOC and EOS are raised. +1642:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** * To clear this flag, either use function: +1643:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** * in programming model IT: @ref HAL_ADC_IRQHandler(), in programming +1644:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** * model polling: @ref HAL_ADC_PollForConversion() +1645:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** * or @ref __HAL_ADC_CLEAR_FLAG(&hadc, ADC_FLAG_EOS). +1646:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** * @param hadc ADC handle +1647:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** * @retval ADC group regular conversion data +1648:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** */ +1649:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** uint32_t HAL_ADC_GetValue(ADC_HandleTypeDef* hadc) +1650:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** { +1651:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** /* Check the parameters */ +1652:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** assert_param(IS_ADC_ALL_INSTANCE(hadc->Instance)); +1653:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** +1654:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** /* Note: EOC flag is not cleared here by software because automatically */ +1655:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** /* cleared by hardware when reading register DR. */ +1656:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** +1657:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** /* Return ADC converted value */ +1658:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** return hadc->Instance->DR; +1659:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** } +1660:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** +1661:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** /** +1662:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** * @brief Handles ADC interrupt request. +1663:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** * @param hadc ADC handle +1664:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** * @retval None +1665:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** */ +1666:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** void HAL_ADC_IRQHandler(ADC_HandleTypeDef* hadc) +1667:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** { +1668:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** uint32_t tmp_isr = hadc->Instance->ISR; +1669:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** uint32_t tmp_ier = hadc->Instance->IER; +1670:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** +1671:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** /* Check the parameters */ +1672:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** assert_param(IS_ADC_ALL_INSTANCE(hadc->Instance)); +1673:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** assert_param(IS_FUNCTIONAL_STATE(hadc->Init.ContinuousConvMode)); +1674:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** assert_param(IS_ADC_EOC_SELECTION(hadc->Init.EOCSelection)); +1675:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** +1676:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** /* ========== Check End of Conversion flag for regular group ========== */ +1677:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** if( (((tmp_isr & ADC_FLAG_EOC) == ADC_FLAG_EOC) && ((tmp_ier & ADC_IT_EOC) == ADC_IT_EOC)) || +1678:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** (((tmp_isr & ADC_FLAG_EOS) == ADC_FLAG_EOS) && ((tmp_ier & ADC_IT_EOS) == ADC_IT_EOS)) ) +1679:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** { +1680:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** /* Update state machine on conversion status if not in error state */ +1681:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** if (HAL_IS_BIT_CLR(hadc->State, HAL_ADC_STATE_ERROR_INTERNAL)) +1682:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** { +1683:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** /* Set ADC state */ +1684:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** SET_BIT(hadc->State, HAL_ADC_STATE_REG_EOC); +1685:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** } + ARM GAS /tmp/cc2rPMmj.s page 31 + + +1686:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** +1687:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** /* Determine whether any further conversion upcoming on group regular */ +1688:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** /* by external trigger, continuous mode or scan sequence on going. */ +1689:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** if(ADC_IS_SOFTWARE_START_REGULAR(hadc) && +1690:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** (hadc->Init.ContinuousConvMode == DISABLE) ) +1691:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** { +1692:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** /* If End of Sequence is reached, disable interrupts */ +1693:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** if((tmp_isr & ADC_FLAG_EOS) == ADC_FLAG_EOS) +1694:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** { +1695:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** /* Allowed to modify bits ADC_IT_EOC/ADC_IT_EOS only if bit */ +1696:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** /* ADSTART==0 (no conversion on going) */ +1697:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** if (ADC_IS_CONVERSION_ONGOING_REGULAR(hadc) == RESET) +1698:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** { +1699:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** /* Disable ADC end of single conversion interrupt on group regular */ +1700:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** /* Note: Overrun interrupt was enabled with EOC interrupt in */ +1701:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** /* HAL_Start_IT(), but is not disabled here because can be used */ +1702:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** /* by overrun IRQ process below. */ +1703:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** __HAL_ADC_DISABLE_IT(hadc, ADC_IT_EOC | ADC_IT_EOS); +1704:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** +1705:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** /* Set ADC state */ +1706:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** ADC_STATE_CLR_SET(hadc->State, +1707:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** HAL_ADC_STATE_REG_BUSY, +1708:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** HAL_ADC_STATE_READY); +1709:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** } +1710:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** else +1711:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** { +1712:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** /* Change ADC state to error state */ +1713:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** SET_BIT(hadc->State, HAL_ADC_STATE_ERROR_CONFIG); +1714:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** +1715:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** /* Set ADC error code to ADC IP internal error */ +1716:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** SET_BIT(hadc->ErrorCode, HAL_ADC_ERROR_INTERNAL); +1717:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** } +1718:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** } +1719:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** } +1720:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** +1721:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** /* Note: into callback, to determine if conversion has been triggered */ +1722:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** /* from EOC or EOS, possibility to use: */ +1723:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** /* " if( __HAL_ADC_GET_FLAG(&hadc, ADC_FLAG_EOS)) " */ +1724:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** #if (USE_HAL_ADC_REGISTER_CALLBACKS == 1) +1725:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** hadc->ConvCpltCallback(hadc); +1726:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** #else +1727:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** HAL_ADC_ConvCpltCallback(hadc); +1728:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** #endif /* USE_HAL_ADC_REGISTER_CALLBACKS */ +1729:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** +1730:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** +1731:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** /* Clear regular group conversion flag */ +1732:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** /* Note: in case of overrun set to ADC_OVR_DATA_PRESERVED, end of */ +1733:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** /* conversion flags clear induces the release of the preserved data.*/ +1734:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** /* Therefore, if the preserved data value is needed, it must be */ +1735:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** /* read preliminarily into HAL_ADC_ConvCpltCallback(). */ +1736:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** __HAL_ADC_CLEAR_FLAG(hadc, (ADC_FLAG_EOC | ADC_FLAG_EOS) ); +1737:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** } +1738:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** +1739:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** /* ========== Check Analog watchdog flags ========== */ +1740:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** if(((tmp_isr & ADC_FLAG_AWD) == ADC_FLAG_AWD) && ((tmp_ier & ADC_IT_AWD) == ADC_IT_AWD)) +1741:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** { +1742:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** /* Set ADC state */ + ARM GAS /tmp/cc2rPMmj.s page 32 + + +1743:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** SET_BIT(hadc->State, HAL_ADC_STATE_AWD1); +1744:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** +1745:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** #if (USE_HAL_ADC_REGISTER_CALLBACKS == 1) +1746:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** hadc->LevelOutOfWindowCallback(hadc); +1747:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** #else +1748:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** HAL_ADC_LevelOutOfWindowCallback(hadc); +1749:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** #endif /* USE_HAL_ADC_REGISTER_CALLBACKS */ +1750:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** +1751:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** /* Clear ADC Analog watchdog flag */ +1752:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** __HAL_ADC_CLEAR_FLAG(hadc, ADC_FLAG_AWD); +1753:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** +1754:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** } +1755:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** +1756:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** +1757:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** /* ========== Check Overrun flag ========== */ +1758:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** if(((tmp_isr & ADC_FLAG_OVR) == ADC_FLAG_OVR) && ((tmp_ier & ADC_IT_OVR) == ADC_IT_OVR)) +1759:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** { +1760:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** /* If overrun is set to overwrite previous data (default setting), */ +1761:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** /* overrun event is not considered as an error. */ +1762:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** /* (cf ref manual "Managing conversions without using the DMA and without */ +1763:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** /* overrun ") */ +1764:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** /* Exception for usage with DMA overrun event always considered as an */ +1765:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** /* error. */ +1766:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** if ((hadc->Init.Overrun == ADC_OVR_DATA_PRESERVED) || +1767:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** HAL_IS_BIT_SET(hadc->Instance->CFGR1, ADC_CFGR1_DMAEN) ) +1768:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** { +1769:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** /* Set ADC error code to overrun */ +1770:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** SET_BIT(hadc->ErrorCode, HAL_ADC_ERROR_OVR); +1771:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** +1772:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** /* Clear ADC overrun flag */ +1773:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** __HAL_ADC_CLEAR_FLAG(hadc, ADC_FLAG_OVR); +1774:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** +1775:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** #if (USE_HAL_ADC_REGISTER_CALLBACKS == 1) +1776:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** hadc->ErrorCallback(hadc); +1777:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** #else +1778:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** HAL_ADC_ErrorCallback(hadc); +1779:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** #endif /* USE_HAL_ADC_REGISTER_CALLBACKS */ +1780:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** } +1781:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** +1782:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** /* Clear the Overrun flag */ +1783:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** __HAL_ADC_CLEAR_FLAG(hadc, ADC_FLAG_OVR); +1784:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** } +1785:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** +1786:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** } +1787:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** +1788:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** +1789:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** /** +1790:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** * @brief Conversion complete callback in non blocking mode +1791:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** * @param hadc ADC handle +1792:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** * @retval None +1793:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** */ +1794:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** __weak void HAL_ADC_ConvCpltCallback(ADC_HandleTypeDef* hadc) +1795:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** { +1796:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** /* Prevent unused argument(s) compilation warning */ +1797:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** UNUSED(hadc); +1798:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** +1799:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** /* NOTE : This function should not be modified. When the callback is needed, + ARM GAS /tmp/cc2rPMmj.s page 33 + + +1800:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** function HAL_ADC_ConvCpltCallback must be implemented in the user file. +1801:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** */ +1802:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** } +1803:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** +1804:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** /** +1805:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** * @brief Conversion DMA half-transfer callback in non blocking mode +1806:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** * @param hadc ADC handle +1807:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** * @retval None +1808:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** */ +1809:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** __weak void HAL_ADC_ConvHalfCpltCallback(ADC_HandleTypeDef* hadc) +1810:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** { +1811:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** /* Prevent unused argument(s) compilation warning */ +1812:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** UNUSED(hadc); +1813:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** +1814:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** /* NOTE : This function should not be modified. When the callback is needed, +1815:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** function HAL_ADC_ConvHalfCpltCallback must be implemented in the user file. +1816:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** */ +1817:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** } +1818:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** +1819:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** /** +1820:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** * @brief Analog watchdog callback in non blocking mode. +1821:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** * @param hadc ADC handle +1822:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** * @retval None +1823:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** */ +1824:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** __weak void HAL_ADC_LevelOutOfWindowCallback(ADC_HandleTypeDef* hadc) +1825:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** { +1826:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** /* Prevent unused argument(s) compilation warning */ +1827:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** UNUSED(hadc); +1828:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** +1829:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** /* NOTE : This function should not be modified. When the callback is needed, +1830:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** function HAL_ADC_LevelOoutOfWindowCallback must be implemented in the user file. +1831:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** */ +1832:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** } +1833:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** +1834:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** /** +1835:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** * @brief ADC error callback in non blocking mode +1836:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** * (ADC conversion with interruption or transfer by DMA) +1837:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** * @param hadc ADC handle +1838:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** * @retval None +1839:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** */ +1840:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** __weak void HAL_ADC_ErrorCallback(ADC_HandleTypeDef *hadc) +1841:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** { +1842:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** /* Prevent unused argument(s) compilation warning */ +1843:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** UNUSED(hadc); +1844:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** +1845:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** /* NOTE : This function should not be modified. When the callback is needed, +1846:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** function HAL_ADC_ErrorCallback must be implemented in the user file. +1847:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** */ +1848:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** } +1849:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** +1850:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** +1851:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** /** +1852:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** * @} +1853:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** */ +1854:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** +1855:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** /** @defgroup ADC_Exported_Functions_Group3 Peripheral Control functions +1856:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** * @brief Peripheral Control functions + ARM GAS /tmp/cc2rPMmj.s page 34 + + +1857:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** * +1858:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** @verbatim +1859:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** =============================================================================== +1860:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** ##### Peripheral Control functions ##### +1861:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** =============================================================================== +1862:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** [..] This section provides functions allowing to: +1863:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** (+) Configure channels on regular group +1864:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** (+) Configure the analog watchdog +1865:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** +1866:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** @endverbatim +1867:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** * @{ +1868:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** */ +1869:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** +1870:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** /** +1871:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** * @brief Configures the the selected channel to be linked to the regular +1872:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** * group. +1873:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** * @note In case of usage of internal measurement channels: +1874:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** * VrefInt/Vbat/TempSensor. +1875:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** * Sampling time constraints must be respected (sampling time can be +1876:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** * adjusted in function of ADC clock frequency and sampling time +1877:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** * setting). +1878:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** * Refer to device datasheet for timings values, parameters TS_vrefint, +1879:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** * TS_vbat, TS_temp (values rough order: 5us to 17us). +1880:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** * These internal paths can be be disabled using function +1881:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** * HAL_ADC_DeInit(). +1882:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** * @note Possibility to update parameters on the fly: +1883:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** * This function initializes channel into regular group, following +1884:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** * calls to this function can be used to reconfigure some parameters +1885:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** * of structure "ADC_ChannelConfTypeDef" on the fly, without resetting +1886:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** * the ADC. +1887:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** * The setting of these parameters is conditioned to ADC state. +1888:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** * For parameters constraints, see comments of structure +1889:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** * "ADC_ChannelConfTypeDef". +1890:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** * @param hadc ADC handle +1891:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** * @param sConfig Structure of ADC channel for regular group. +1892:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** * @retval HAL status +1893:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** */ +1894:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** HAL_StatusTypeDef HAL_ADC_ConfigChannel(ADC_HandleTypeDef* hadc, ADC_ChannelConfTypeDef* sConfig) +1895:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** { +1896:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** HAL_StatusTypeDef tmp_hal_status = HAL_OK; +1897:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** __IO uint32_t wait_loop_index = 0U; +1898:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** +1899:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** /* Check the parameters */ +1900:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** assert_param(IS_ADC_ALL_INSTANCE(hadc->Instance)); +1901:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** assert_param(IS_ADC_CHANNEL(sConfig->Channel)); +1902:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** assert_param(IS_ADC_RANK(sConfig->Rank)); +1903:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** +1904:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** if (! IS_ADC_SAMPLE_TIME(hadc->Init.SamplingTimeCommon)) +1905:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** { +1906:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** assert_param(IS_ADC_SAMPLE_TIME(sConfig->SamplingTime)); +1907:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** } +1908:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** +1909:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** /* Process locked */ +1910:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** __HAL_LOCK(hadc); +1911:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** +1912:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** /* Parameters update conditioned to ADC state: */ +1913:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** /* Parameters that can be updated when ADC is disabled or enabled without */ + ARM GAS /tmp/cc2rPMmj.s page 35 + + +1914:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** /* conversion on going on regular group: */ +1915:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** /* - Channel number */ +1916:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** /* - Channel sampling time */ +1917:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** /* - Management of internal measurement channels: VrefInt/TempSensor/Vbat */ +1918:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** if (ADC_IS_CONVERSION_ONGOING_REGULAR(hadc) == RESET) +1919:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** { +1920:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** /* Configure channel: depending on rank setting, add it or remove it from */ +1921:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** /* ADC conversion sequencer. */ +1922:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** if (sConfig->Rank != ADC_RANK_NONE) +1923:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** { +1924:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** /* Regular sequence configuration */ +1925:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** /* Set the channel selection register from the selected channel */ +1926:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** hadc->Instance->CHSELR |= ADC_CHSELR_CHANNEL(sConfig->Channel); +1927:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** +1928:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** /* Channel sampling time configuration */ +1929:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** /* Management of parameters "SamplingTimeCommon" and "SamplingTime" */ +1930:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** /* (obsolete): sampling time set in this function with */ +1931:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** /* parameter "SamplingTime" (obsolete) only if not already set into */ +1932:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** /* ADC initialization structure with parameter "SamplingTimeCommon". */ +1933:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** if (! IS_ADC_SAMPLE_TIME(hadc->Init.SamplingTimeCommon)) +1934:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** { +1935:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** /* Modify sampling time if needed (not needed in case of recurrence */ +1936:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** /* for several channels programmed consecutively into the sequencer) */ +1937:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** if (sConfig->SamplingTime != ADC_GET_SAMPLINGTIME(hadc)) +1938:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** { +1939:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** /* Channel sampling time configuration */ +1940:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** /* Clear the old sample time */ +1941:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** hadc->Instance->SMPR &= ~(ADC_SMPR_SMP); +1942:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** +1943:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** /* Set the new sample time */ +1944:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** hadc->Instance->SMPR |= ADC_SMPR_SET(sConfig->SamplingTime); +1945:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** } +1946:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** } +1947:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** +1948:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** /* Management of internal measurement channels: VrefInt/TempSensor/Vbat */ +1949:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** /* internal measurement paths enable: If internal channel selected, */ +1950:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** /* enable dedicated internal buffers and path. */ +1951:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** /* Note: these internal measurement paths can be disabled using */ +1952:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** /* HAL_ADC_DeInit() or removing the channel from sequencer with */ +1953:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** /* channel configuration parameter "Rank". */ +1954:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** if(ADC_IS_CHANNEL_INTERNAL(sConfig->Channel)) +1955:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** { +1956:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** /* If Channel_16 is selected, enable Temp. sensor measurement path. */ +1957:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** /* If Channel_17 is selected, enable VREFINT measurement path. */ +1958:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** /* If Channel_18 is selected, enable VBAT measurement path. */ +1959:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** ADC->CCR |= ADC_CHANNEL_INTERNAL_PATH(sConfig->Channel); +1960:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** +1961:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** /* If Temp. sensor is selected, wait for stabilization delay */ +1962:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** if (sConfig->Channel == ADC_CHANNEL_TEMPSENSOR) +1963:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** { +1964:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** /* Delay for temperature sensor stabilization time */ +1965:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** /* Compute number of CPU cycles to wait for */ +1966:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** wait_loop_index = (ADC_TEMPSENSOR_DELAY_US * (SystemCoreClock / 1000000U)); +1967:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** while(wait_loop_index != 0U) +1968:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** { +1969:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** wait_loop_index--; +1970:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** } + ARM GAS /tmp/cc2rPMmj.s page 36 + + +1971:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** } +1972:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** } +1973:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** } +1974:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** else +1975:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** { +1976:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** /* Regular sequence configuration */ +1977:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** /* Reset the channel selection register from the selected channel */ +1978:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** hadc->Instance->CHSELR &= ~ADC_CHSELR_CHANNEL(sConfig->Channel); +1979:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** +1980:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** /* Management of internal measurement channels: VrefInt/TempSensor/Vbat */ +1981:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** /* internal measurement paths disable: If internal channel selected, */ +1982:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** /* disable dedicated internal buffers and path. */ +1983:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** if(ADC_IS_CHANNEL_INTERNAL(sConfig->Channel)) +1984:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** { +1985:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** /* If Channel_16 is selected, disable Temp. sensor measurement path. */ +1986:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** /* If Channel_17 is selected, disable VREFINT measurement path. */ +1987:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** /* If Channel_18 is selected, disable VBAT measurement path. */ +1988:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** ADC->CCR &= ~ADC_CHANNEL_INTERNAL_PATH(sConfig->Channel); +1989:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** } +1990:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** } +1991:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** +1992:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** } +1993:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** +1994:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** /* If a conversion is on going on regular group, no update on regular */ +1995:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** /* channel could be done on neither of the channel configuration structure */ +1996:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** /* parameters. */ +1997:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** else +1998:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** { +1999:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** /* Update ADC state machine to error */ +2000:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** SET_BIT(hadc->State, HAL_ADC_STATE_ERROR_CONFIG); +2001:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** +2002:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** tmp_hal_status = HAL_ERROR; +2003:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** } +2004:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** +2005:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** /* Process unlocked */ +2006:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** __HAL_UNLOCK(hadc); +2007:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** +2008:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** /* Return function status */ +2009:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** return tmp_hal_status; +2010:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** } +2011:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** +2012:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** +2013:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** /** +2014:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** * @brief Configures the analog watchdog. +2015:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** * @note Possibility to update parameters on the fly: +2016:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** * This function initializes the selected analog watchdog, following +2017:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** * calls to this function can be used to reconfigure some parameters +2018:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** * of structure "ADC_AnalogWDGConfTypeDef" on the fly, without resetting +2019:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** * the ADC. +2020:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** * The setting of these parameters is conditioned to ADC state. +2021:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** * For parameters constraints, see comments of structure +2022:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** * "ADC_AnalogWDGConfTypeDef". +2023:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** * @param hadc ADC handle +2024:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** * @param AnalogWDGConfig Structure of ADC analog watchdog configuration +2025:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** * @retval HAL status +2026:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** */ +2027:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** HAL_StatusTypeDef HAL_ADC_AnalogWDGConfig(ADC_HandleTypeDef* hadc, ADC_AnalogWDGConfTypeDef* Analog + ARM GAS /tmp/cc2rPMmj.s page 37 + + +2028:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** { +2029:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** HAL_StatusTypeDef tmp_hal_status = HAL_OK; +2030:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** +2031:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** uint32_t tmpAWDHighThresholdShifted; +2032:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** uint32_t tmpAWDLowThresholdShifted; +2033:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** +2034:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** /* Check the parameters */ +2035:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** assert_param(IS_ADC_ALL_INSTANCE(hadc->Instance)); +2036:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** assert_param(IS_ADC_ANALOG_WATCHDOG_MODE(AnalogWDGConfig->WatchdogMode)); +2037:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** assert_param(IS_FUNCTIONAL_STATE(AnalogWDGConfig->ITMode)); +2038:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** +2039:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** /* Verify if threshold is within the selected ADC resolution */ +2040:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** assert_param(IS_ADC_RANGE(ADC_GET_RESOLUTION(hadc), AnalogWDGConfig->HighThreshold)); +2041:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** assert_param(IS_ADC_RANGE(ADC_GET_RESOLUTION(hadc), AnalogWDGConfig->LowThreshold)); +2042:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** +2043:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** if(AnalogWDGConfig->WatchdogMode == ADC_ANALOGWATCHDOG_SINGLE_REG) +2044:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** { +2045:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** assert_param(IS_ADC_CHANNEL(AnalogWDGConfig->Channel)); +2046:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** } +2047:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** +2048:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** /* Process locked */ +2049:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** __HAL_LOCK(hadc); +2050:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** +2051:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** /* Parameters update conditioned to ADC state: */ +2052:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** /* Parameters that can be updated when ADC is disabled or enabled without */ +2053:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** /* conversion on going on regular group: */ +2054:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** /* - Analog watchdog channels */ +2055:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** /* - Analog watchdog thresholds */ +2056:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** if (ADC_IS_CONVERSION_ONGOING_REGULAR(hadc) == RESET) +2057:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** { +2058:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** /* Configuration of analog watchdog: */ +2059:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** /* - Set the analog watchdog enable mode: one or overall group of */ +2060:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** /* channels. */ +2061:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** /* - Set the Analog watchdog channel (is not used if watchdog */ +2062:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** /* mode "all channels": ADC_CFGR_AWD1SGL=0). */ +2063:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** hadc->Instance->CFGR1 &= ~( ADC_CFGR1_AWDSGL | +2064:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** ADC_CFGR1_AWDEN | +2065:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** ADC_CFGR1_AWDCH ); +2066:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** +2067:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** hadc->Instance->CFGR1 |= ( AnalogWDGConfig->WatchdogMode | +2068:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** ADC_CFGR_AWDCH(AnalogWDGConfig->Channel) ); +2069:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** +2070:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** /* Shift the offset in function of the selected ADC resolution: Thresholds*/ +2071:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** /* have to be left-aligned on bit 11, the LSB (right bits) are set to 0 */ +2072:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** tmpAWDHighThresholdShifted = ADC_AWD1THRESHOLD_SHIFT_RESOLUTION(hadc, AnalogWDGConfig->HighThre +2073:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** tmpAWDLowThresholdShifted = ADC_AWD1THRESHOLD_SHIFT_RESOLUTION(hadc, AnalogWDGConfig->LowThres +2074:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** +2075:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** /* Set the high and low thresholds */ +2076:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** hadc->Instance->TR &= ~(ADC_TR_HT | ADC_TR_LT); +2077:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** hadc->Instance->TR |= ( ADC_TRX_HIGHTHRESHOLD (tmpAWDHighThresholdShifted) | +2078:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** tmpAWDLowThresholdShifted ); +2079:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** +2080:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** /* Clear the ADC Analog watchdog flag (in case of left enabled by */ +2081:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** /* previous ADC operations) to be ready to use for HAL_ADC_IRQHandler() */ +2082:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** /* or HAL_ADC_PollForEvent(). */ +2083:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** __HAL_ADC_CLEAR_FLAG(hadc, ADC_IT_AWD); +2084:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** + ARM GAS /tmp/cc2rPMmj.s page 38 + + +2085:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** /* Configure ADC Analog watchdog interrupt */ +2086:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** if(AnalogWDGConfig->ITMode == ENABLE) +2087:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** { +2088:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** /* Enable the ADC Analog watchdog interrupt */ +2089:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** __HAL_ADC_ENABLE_IT(hadc, ADC_IT_AWD); +2090:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** } +2091:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** else +2092:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** { +2093:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** /* Disable the ADC Analog watchdog interrupt */ +2094:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** __HAL_ADC_DISABLE_IT(hadc, ADC_IT_AWD); +2095:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** } +2096:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** +2097:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** } +2098:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** /* If a conversion is on going on regular group, no update could be done */ +2099:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** /* on neither of the AWD configuration structure parameters. */ +2100:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** else +2101:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** { +2102:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** /* Update ADC state machine to error */ +2103:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** SET_BIT(hadc->State, HAL_ADC_STATE_ERROR_CONFIG); +2104:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** +2105:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** tmp_hal_status = HAL_ERROR; +2106:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** } +2107:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** +2108:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** +2109:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** /* Process unlocked */ +2110:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** __HAL_UNLOCK(hadc); +2111:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** +2112:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** /* Return function status */ +2113:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** return tmp_hal_status; +2114:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** } +2115:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** +2116:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** +2117:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** /** +2118:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** * @} +2119:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** */ +2120:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** +2121:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** +2122:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** /** @defgroup ADC_Exported_Functions_Group4 Peripheral State functions +2123:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** * @brief Peripheral State functions +2124:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** * +2125:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** @verbatim +2126:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** =============================================================================== +2127:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** ##### Peripheral State and Errors functions ##### +2128:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** =============================================================================== +2129:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** [..] +2130:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** This subsection provides functions to get in run-time the status of the +2131:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** peripheral. +2132:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** (+) Check the ADC state +2133:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** (+) Check the ADC error code +2134:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** +2135:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** @endverbatim +2136:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** * @{ +2137:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** */ +2138:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** +2139:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** /** +2140:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** * @brief Return the ADC state +2141:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** * @note ADC state machine is managed by bitfields, ADC status must be + ARM GAS /tmp/cc2rPMmj.s page 39 + + +2142:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** * compared with states bits. +2143:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** * For example: +2144:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** * " if (HAL_IS_BIT_SET(HAL_ADC_GetState(hadc1), HAL_ADC_STATE_REG_BUSY)) " +2145:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** * " if (HAL_IS_BIT_SET(HAL_ADC_GetState(hadc1), HAL_ADC_STATE_AWD1) ) " +2146:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** * @param hadc ADC handle +2147:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** * @retval HAL state +2148:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** */ +2149:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** uint32_t HAL_ADC_GetState(ADC_HandleTypeDef* hadc) +2150:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** { +2151:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** /* Check the parameters */ +2152:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** assert_param(IS_ADC_ALL_INSTANCE(hadc->Instance)); +2153:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** +2154:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** /* Return ADC state */ +2155:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** return hadc->State; +2156:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** } +2157:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** +2158:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** /** +2159:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** * @brief Return the ADC error code +2160:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** * @param hadc ADC handle +2161:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** * @retval ADC Error Code +2162:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** */ +2163:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** uint32_t HAL_ADC_GetError(ADC_HandleTypeDef *hadc) +2164:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** { +2165:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** return hadc->ErrorCode; +2166:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** } +2167:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** +2168:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** /** +2169:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** * @} +2170:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** */ +2171:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** +2172:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** /** +2173:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** * @} +2174:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** */ +2175:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** +2176:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** /** @defgroup ADC_Private_Functions ADC Private Functions +2177:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** * @{ +2178:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** */ +2179:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** +2180:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** /** +2181:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** * @brief Enable the selected ADC. +2182:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** * @note Prerequisite condition to use this function: ADC must be disabled +2183:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** * and voltage regulator must be enabled (done into HAL_ADC_Init()). +2184:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** * @note If low power mode AutoPowerOff is enabled, power-on/off phases are +2185:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** * performed automatically by hardware. +2186:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** * In this mode, this function is useless and must not be called because +2187:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** * flag ADC_FLAG_RDY is not usable. +2188:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** * Therefore, this function must be called under condition of +2189:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** * "if (hadc->Init.LowPowerAutoPowerOff != ENABLE)". +2190:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** * @param hadc ADC handle +2191:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** * @retval HAL status. +2192:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** */ +2193:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** static HAL_StatusTypeDef ADC_Enable(ADC_HandleTypeDef* hadc) +2194:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** { +2195:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** uint32_t tickstart = 0U; +2196:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** __IO uint32_t wait_loop_index = 0U; +2197:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** +2198:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** /* ADC enable and wait for ADC ready (in case of ADC is disabled or */ + ARM GAS /tmp/cc2rPMmj.s page 40 + + +2199:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** /* enabling phase not yet completed: flag ADC ready not yet set). */ +2200:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** /* Timeout implemented to not be stuck if ADC cannot be enabled (possible */ +2201:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** /* causes: ADC clock not running, ...). */ +2202:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** if (ADC_IS_ENABLE(hadc) == RESET) +2203:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** { +2204:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** /* Check if conditions to enable the ADC are fulfilled */ +2205:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** if (ADC_ENABLING_CONDITIONS(hadc) == RESET) +2206:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** { +2207:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** /* Update ADC state machine to error */ +2208:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** SET_BIT(hadc->State, HAL_ADC_STATE_ERROR_INTERNAL); +2209:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** +2210:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** /* Set ADC error code to ADC IP internal error */ +2211:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** SET_BIT(hadc->ErrorCode, HAL_ADC_ERROR_INTERNAL); +2212:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** +2213:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** return HAL_ERROR; +2214:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** } +2215:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** +2216:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** /* Enable the ADC peripheral */ +2217:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** __HAL_ADC_ENABLE(hadc); +2218:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** +2219:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** /* Delay for ADC stabilization time */ +2220:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** /* Compute number of CPU cycles to wait for */ +2221:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** wait_loop_index = (ADC_STAB_DELAY_US * (SystemCoreClock / 1000000U)); +2222:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** while(wait_loop_index != 0U) +2223:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** { +2224:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** wait_loop_index--; +2225:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** } +2226:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** +2227:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** /* Get tick count */ +2228:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** tickstart = HAL_GetTick(); +2229:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** +2230:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** /* Wait for ADC effectively enabled */ +2231:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** while(__HAL_ADC_GET_FLAG(hadc, ADC_FLAG_RDY) == RESET) +2232:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** { +2233:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** if((HAL_GetTick() - tickstart) > ADC_ENABLE_TIMEOUT) +2234:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** { +2235:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** /* New check to avoid false timeout detection in case of preemption */ +2236:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** if(__HAL_ADC_GET_FLAG(hadc, ADC_FLAG_RDY) == RESET) +2237:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** { +2238:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** /* Update ADC state machine to error */ +2239:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** SET_BIT(hadc->State, HAL_ADC_STATE_ERROR_INTERNAL); +2240:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** +2241:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** /* Set ADC error code to ADC IP internal error */ +2242:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** SET_BIT(hadc->ErrorCode, HAL_ADC_ERROR_INTERNAL); +2243:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** +2244:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** return HAL_ERROR; +2245:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** } +2246:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** } +2247:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** } +2248:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** } +2249:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** +2250:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** /* Return HAL status */ +2251:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** return HAL_OK; +2252:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** } +2253:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** +2254:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** /** +2255:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** * @brief Disable the selected ADC. + ARM GAS /tmp/cc2rPMmj.s page 41 + + +2256:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** * @note Prerequisite condition to use this function: ADC conversions must be +2257:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** * stopped. +2258:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** * @param hadc ADC handle +2259:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** * @retval HAL status. +2260:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** */ +2261:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** static HAL_StatusTypeDef ADC_Disable(ADC_HandleTypeDef* hadc) +2262:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** { +2263:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** uint32_t tickstart = 0U; +2264:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** +2265:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** /* Verification if ADC is not already disabled: */ +2266:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** /* Note: forbidden to disable ADC (set bit ADC_CR_ADDIS) if ADC is already */ +2267:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** /* disabled. */ +2268:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** if (ADC_IS_ENABLE(hadc) != RESET) +2269:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** { +2270:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** /* Check if conditions to disable the ADC are fulfilled */ +2271:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** if (ADC_DISABLING_CONDITIONS(hadc) != RESET) +2272:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** { +2273:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** /* Disable the ADC peripheral */ +2274:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** __HAL_ADC_DISABLE(hadc); +2275:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** } +2276:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** else +2277:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** { +2278:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** /* Update ADC state machine to error */ +2279:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** SET_BIT(hadc->State, HAL_ADC_STATE_ERROR_INTERNAL); +2280:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** +2281:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** /* Set ADC error code to ADC IP internal error */ +2282:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** SET_BIT(hadc->ErrorCode, HAL_ADC_ERROR_INTERNAL); +2283:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** +2284:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** return HAL_ERROR; +2285:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** } +2286:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** +2287:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** /* Wait for ADC effectively disabled */ +2288:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** /* Get tick count */ +2289:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** tickstart = HAL_GetTick(); +2290:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** +2291:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** while(HAL_IS_BIT_SET(hadc->Instance->CR, ADC_CR_ADEN)) +2292:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** { +2293:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** if((HAL_GetTick() - tickstart) > ADC_DISABLE_TIMEOUT) +2294:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** { +2295:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** /* New check to avoid false timeout detection in case of preemption */ +2296:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** if(HAL_IS_BIT_SET(hadc->Instance->CR, ADC_CR_ADEN)) +2297:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** { +2298:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** /* Update ADC state machine to error */ +2299:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** SET_BIT(hadc->State, HAL_ADC_STATE_ERROR_INTERNAL); +2300:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** +2301:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** /* Set ADC error code to ADC IP internal error */ +2302:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** SET_BIT(hadc->ErrorCode, HAL_ADC_ERROR_INTERNAL); +2303:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** +2304:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** return HAL_ERROR; +2305:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** } +2306:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** } +2307:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** } +2308:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** } +2309:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** +2310:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** /* Return HAL status */ +2311:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** return HAL_OK; +2312:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** } + ARM GAS /tmp/cc2rPMmj.s page 42 + + +2313:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** +2314:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** +2315:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** /** +2316:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** * @brief Stop ADC conversion. +2317:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** * @note Prerequisite condition to use this function: ADC conversions must be +2318:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** * stopped to disable the ADC. +2319:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** * @param hadc ADC handle +2320:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** * @retval HAL status. +2321:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** */ +2322:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** static HAL_StatusTypeDef ADC_ConversionStop(ADC_HandleTypeDef* hadc) +2323:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** { + 27 .loc 1 2323 1 view -0 + 28 .cfi_startproc + 29 @ args = 0, pretend = 0, frame = 0 + 30 @ frame_needed = 0, uses_anonymous_args = 0 + 31 .loc 1 2323 1 is_stmt 0 view .LVU1 + 32 0000 70B5 push {r4, r5, r6, lr} + 33 .cfi_def_cfa_offset 16 + 34 .cfi_offset 4, -16 + 35 .cfi_offset 5, -12 + 36 .cfi_offset 6, -8 + 37 .cfi_offset 14, -4 + 38 0002 0400 movs r4, r0 +2324:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** uint32_t tickstart = 0U; + 39 .loc 1 2324 3 is_stmt 1 view .LVU2 + 40 .LVL1: +2325:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** +2326:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** /* Check the parameters */ +2327:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** assert_param(IS_ADC_ALL_INSTANCE(hadc->Instance)); + 41 .loc 1 2327 3 view .LVU3 +2328:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** +2329:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** /* Verification if ADC is not already stopped on regular group to bypass */ +2330:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** /* this function if not needed. */ +2331:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** if (ADC_IS_CONVERSION_ONGOING_REGULAR(hadc)) + 42 .loc 1 2331 3 view .LVU4 + 43 .loc 1 2331 7 is_stmt 0 view .LVU5 + 44 0004 0268 ldr r2, [r0] + 45 0006 9368 ldr r3, [r2, #8] + 46 .loc 1 2331 6 view .LVU6 + 47 0008 5B07 lsls r3, r3, #29 + 48 000a 25D5 bpl .L6 +2332:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** { +2333:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** +2334:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** /* Stop potential conversion on going on regular group */ +2335:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** /* Software is allowed to set ADSTP only when ADSTART=1 and ADDIS=0 */ +2336:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** if (HAL_IS_BIT_SET(hadc->Instance->CR, ADC_CR_ADSTART) && + 49 .loc 1 2336 5 is_stmt 1 view .LVU7 + 50 .loc 1 2336 9 is_stmt 0 view .LVU8 + 51 000c 9368 ldr r3, [r2, #8] + 52 .loc 1 2336 8 view .LVU9 + 53 000e 5B07 lsls r3, r3, #29 + 54 0010 06D5 bpl .L3 +2337:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** HAL_IS_BIT_CLR(hadc->Instance->CR, ADC_CR_ADDIS) ) + 55 .loc 1 2337 9 view .LVU10 + 56 0012 9368 ldr r3, [r2, #8] +2336:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** HAL_IS_BIT_CLR(hadc->Instance->CR, ADC_CR_ADDIS) ) + 57 .loc 1 2336 60 discriminator 1 view .LVU11 + ARM GAS /tmp/cc2rPMmj.s page 43 + + + 58 0014 9B07 lsls r3, r3, #30 + 59 0016 03D4 bmi .L3 +2338:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** { +2339:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** /* Stop conversions on regular group */ +2340:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** hadc->Instance->CR |= ADC_CR_ADSTP; + 60 .loc 1 2340 7 is_stmt 1 view .LVU12 + 61 .loc 1 2340 21 is_stmt 0 view .LVU13 + 62 0018 9368 ldr r3, [r2, #8] + 63 .loc 1 2340 26 view .LVU14 + 64 001a 1021 movs r1, #16 + 65 001c 0B43 orrs r3, r1 + 66 001e 9360 str r3, [r2, #8] + 67 .L3: +2341:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** } +2342:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** +2343:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** /* Wait for conversion effectively stopped */ +2344:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** /* Get tick count */ +2345:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** tickstart = HAL_GetTick(); + 68 .loc 1 2345 5 is_stmt 1 view .LVU15 + 69 .loc 1 2345 17 is_stmt 0 view .LVU16 + 70 0020 FFF7FEFF bl HAL_GetTick + 71 .LVL2: + 72 .loc 1 2345 17 view .LVU17 + 73 0024 0500 movs r5, r0 + 74 .LVL3: +2346:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** +2347:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** while((hadc->Instance->CR & ADC_CR_ADSTART) != RESET) + 75 .loc 1 2347 5 is_stmt 1 view .LVU18 + 76 .L4: + 77 .loc 1 2347 49 view .LVU19 + 78 .loc 1 2347 16 is_stmt 0 view .LVU20 + 79 0026 2368 ldr r3, [r4] + 80 .loc 1 2347 26 view .LVU21 + 81 0028 9B68 ldr r3, [r3, #8] + 82 .loc 1 2347 49 view .LVU22 + 83 002a 5B07 lsls r3, r3, #29 + 84 002c 12D5 bpl .L10 +2348:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** { +2349:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** if((HAL_GetTick() - tickstart) > ADC_STOP_CONVERSION_TIMEOUT) + 85 .loc 1 2349 7 is_stmt 1 view .LVU23 + 86 .loc 1 2349 11 is_stmt 0 view .LVU24 + 87 002e FFF7FEFF bl HAL_GetTick + 88 .LVL4: + 89 .loc 1 2349 25 discriminator 1 view .LVU25 + 90 0032 401B subs r0, r0, r5 + 91 .loc 1 2349 9 discriminator 1 view .LVU26 + 92 0034 0228 cmp r0, #2 + 93 0036 F6D9 bls .L4 +2350:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** { +2351:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** /* New check to avoid false timeout detection in case of preemption */ +2352:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** if((hadc->Instance->CR & ADC_CR_ADSTART) != RESET) + 94 .loc 1 2352 9 is_stmt 1 view .LVU27 + 95 .loc 1 2352 17 is_stmt 0 view .LVU28 + 96 0038 2368 ldr r3, [r4] + 97 .loc 1 2352 27 view .LVU29 + 98 003a 9B68 ldr r3, [r3, #8] + 99 .loc 1 2352 11 view .LVU30 + ARM GAS /tmp/cc2rPMmj.s page 44 + + + 100 003c 5B07 lsls r3, r3, #29 + 101 003e F2D5 bpl .L4 +2353:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** { +2354:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** /* Update ADC state machine to error */ +2355:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** SET_BIT(hadc->State, HAL_ADC_STATE_ERROR_INTERNAL); + 102 .loc 1 2355 11 is_stmt 1 view .LVU31 + 103 0040 A36B ldr r3, [r4, #56] + 104 0042 1022 movs r2, #16 + 105 0044 1343 orrs r3, r2 + 106 0046 A363 str r3, [r4, #56] +2356:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** +2357:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** /* Set ADC error code to ADC IP internal error */ +2358:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** SET_BIT(hadc->ErrorCode, HAL_ADC_ERROR_INTERNAL); + 107 .loc 1 2358 11 view .LVU32 + 108 0048 E36B ldr r3, [r4, #60] + 109 004a 0F3A subs r2, r2, #15 + 110 004c 1343 orrs r3, r2 + 111 004e E363 str r3, [r4, #60] +2359:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** +2360:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** return HAL_ERROR; + 112 .loc 1 2360 11 view .LVU33 + 113 .loc 1 2360 18 is_stmt 0 view .LVU34 + 114 0050 0120 movs r0, #1 + 115 0052 02E0 b .L2 + 116 .L10: +2361:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** } +2362:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** } +2363:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** } +2364:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** } +2365:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** +2366:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** /* Return HAL status */ +2367:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** return HAL_OK; + 117 .loc 1 2367 10 view .LVU35 + 118 0054 0020 movs r0, #0 + 119 0056 00E0 b .L2 + 120 .LVL5: + 121 .L6: + 122 .loc 1 2367 10 view .LVU36 + 123 0058 0020 movs r0, #0 + 124 .LVL6: + 125 .L2: +2368:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** } + 126 .loc 1 2368 1 view .LVU37 + 127 @ sp needed + 128 .LVL7: + 129 .loc 1 2368 1 view .LVU38 + 130 005a 70BD pop {r4, r5, r6, pc} + 131 .cfi_endproc + 132 .LFE64: + 134 .section .text.ADC_Disable,"ax",%progbits + 135 .align 1 + 136 .syntax unified + 137 .code 16 + 138 .thumb_func + 140 ADC_Disable: + 141 .LVL8: + 142 .LFB63: + ARM GAS /tmp/cc2rPMmj.s page 45 + + +2262:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** uint32_t tickstart = 0U; + 143 .loc 1 2262 1 is_stmt 1 view -0 + 144 .cfi_startproc + 145 @ args = 0, pretend = 0, frame = 0 + 146 @ frame_needed = 0, uses_anonymous_args = 0 +2262:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** uint32_t tickstart = 0U; + 147 .loc 1 2262 1 is_stmt 0 view .LVU40 + 148 0000 70B5 push {r4, r5, r6, lr} + 149 .cfi_def_cfa_offset 16 + 150 .cfi_offset 4, -16 + 151 .cfi_offset 5, -12 + 152 .cfi_offset 6, -8 + 153 .cfi_offset 14, -4 + 154 0002 0400 movs r4, r0 +2263:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** + 155 .loc 1 2263 3 is_stmt 1 view .LVU41 + 156 .LVL9: +2268:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** { + 157 .loc 1 2268 3 view .LVU42 +2268:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** { + 158 .loc 1 2268 7 is_stmt 0 view .LVU43 + 159 0004 0268 ldr r2, [r0] + 160 0006 9168 ldr r1, [r2, #8] + 161 0008 0323 movs r3, #3 + 162 000a 0B40 ands r3, r1 + 163 000c 012B cmp r3, #1 + 164 000e 01D0 beq .L21 +2311:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** } + 165 .loc 1 2311 10 view .LVU44 + 166 0010 0020 movs r0, #0 + 167 .LVL10: + 168 .L12: +2312:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** + 169 .loc 1 2312 1 view .LVU45 + 170 @ sp needed + 171 .LVL11: +2312:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** + 172 .loc 1 2312 1 view .LVU46 + 173 0012 70BD pop {r4, r5, r6, pc} + 174 .LVL12: + 175 .L21: +2268:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** { + 176 .loc 1 2268 7 discriminator 1 view .LVU47 + 177 0014 1368 ldr r3, [r2] + 178 0016 DB07 lsls r3, r3, #31 + 179 0018 02D4 bmi .L13 +2268:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** { + 180 .loc 1 2268 7 discriminator 4 view .LVU48 + 181 001a D368 ldr r3, [r2, #12] + 182 001c 1B04 lsls r3, r3, #16 + 183 001e 31D5 bpl .L18 + 184 .L13: +2271:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** { + 185 .loc 1 2271 5 is_stmt 1 view .LVU49 +2271:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** { + 186 .loc 1 2271 9 is_stmt 0 view .LVU50 + 187 0020 9168 ldr r1, [r2, #8] + ARM GAS /tmp/cc2rPMmj.s page 46 + + + 188 0022 0523 movs r3, #5 + 189 0024 0B40 ands r3, r1 +2271:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** { + 190 .loc 1 2271 8 view .LVU51 + 191 0026 012B cmp r3, #1 + 192 0028 09D0 beq .L22 +2279:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** + 193 .loc 1 2279 7 is_stmt 1 view .LVU52 + 194 002a A36B ldr r3, [r4, #56] + 195 002c 1022 movs r2, #16 + 196 002e 1343 orrs r3, r2 + 197 0030 A363 str r3, [r4, #56] +2282:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** + 198 .loc 1 2282 7 view .LVU53 + 199 0032 E36B ldr r3, [r4, #60] + 200 0034 0F3A subs r2, r2, #15 + 201 0036 1343 orrs r3, r2 + 202 0038 E363 str r3, [r4, #60] +2284:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** } + 203 .loc 1 2284 7 view .LVU54 +2284:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** } + 204 .loc 1 2284 14 is_stmt 0 view .LVU55 + 205 003a 0120 movs r0, #1 + 206 .LVL13: +2284:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** } + 207 .loc 1 2284 14 view .LVU56 + 208 003c E9E7 b .L12 + 209 .LVL14: + 210 .L22: +2274:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** } + 211 .loc 1 2274 7 is_stmt 1 view .LVU57 +2274:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** } + 212 .loc 1 2274 7 view .LVU58 + 213 003e 9368 ldr r3, [r2, #8] + 214 0040 0221 movs r1, #2 + 215 0042 0B43 orrs r3, r1 + 216 0044 9360 str r3, [r2, #8] +2274:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** } + 217 .loc 1 2274 7 view .LVU59 + 218 0046 2368 ldr r3, [r4] + 219 0048 0322 movs r2, #3 + 220 004a 1A60 str r2, [r3] +2274:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** } + 221 .loc 1 2274 7 view .LVU60 +2289:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** + 222 .loc 1 2289 5 view .LVU61 +2289:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** + 223 .loc 1 2289 17 is_stmt 0 view .LVU62 + 224 004c FFF7FEFF bl HAL_GetTick + 225 .LVL15: +2289:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** + 226 .loc 1 2289 17 view .LVU63 + 227 0050 0500 movs r5, r0 + 228 .LVL16: +2291:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** { + 229 .loc 1 2291 5 is_stmt 1 view .LVU64 + 230 .L15: + ARM GAS /tmp/cc2rPMmj.s page 47 + + +2291:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** { + 231 .loc 1 2291 11 view .LVU65 + 232 0052 2368 ldr r3, [r4] + 233 0054 9B68 ldr r3, [r3, #8] + 234 0056 DB07 lsls r3, r3, #31 + 235 0058 12D5 bpl .L23 +2293:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** { + 236 .loc 1 2293 7 view .LVU66 +2293:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** { + 237 .loc 1 2293 11 is_stmt 0 view .LVU67 + 238 005a FFF7FEFF bl HAL_GetTick + 239 .LVL17: +2293:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** { + 240 .loc 1 2293 25 discriminator 1 view .LVU68 + 241 005e 401B subs r0, r0, r5 +2293:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** { + 242 .loc 1 2293 9 discriminator 1 view .LVU69 + 243 0060 0228 cmp r0, #2 + 244 0062 F6D9 bls .L15 +2296:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** { + 245 .loc 1 2296 9 is_stmt 1 view .LVU70 +2296:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** { + 246 .loc 1 2296 12 is_stmt 0 view .LVU71 + 247 0064 2368 ldr r3, [r4] + 248 0066 9B68 ldr r3, [r3, #8] +2296:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** { + 249 .loc 1 2296 11 view .LVU72 + 250 0068 DB07 lsls r3, r3, #31 + 251 006a F2D5 bpl .L15 +2299:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** + 252 .loc 1 2299 11 is_stmt 1 view .LVU73 + 253 006c A36B ldr r3, [r4, #56] + 254 006e 1022 movs r2, #16 + 255 0070 1343 orrs r3, r2 + 256 0072 A363 str r3, [r4, #56] +2302:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** + 257 .loc 1 2302 11 view .LVU74 + 258 0074 E36B ldr r3, [r4, #60] + 259 0076 0F3A subs r2, r2, #15 + 260 0078 1343 orrs r3, r2 + 261 007a E363 str r3, [r4, #60] +2304:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** } + 262 .loc 1 2304 11 view .LVU75 +2304:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** } + 263 .loc 1 2304 18 is_stmt 0 view .LVU76 + 264 007c 0120 movs r0, #1 + 265 007e C8E7 b .L12 + 266 .L23: +2311:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** } + 267 .loc 1 2311 10 view .LVU77 + 268 0080 0020 movs r0, #0 + 269 0082 C6E7 b .L12 + 270 .LVL18: + 271 .L18: +2311:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** } + 272 .loc 1 2311 10 view .LVU78 + 273 0084 0020 movs r0, #0 + ARM GAS /tmp/cc2rPMmj.s page 48 + + + 274 .LVL19: +2311:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** } + 275 .loc 1 2311 10 view .LVU79 + 276 0086 C4E7 b .L12 + 277 .cfi_endproc + 278 .LFE63: + 280 .global __aeabi_uidiv + 281 .section .text.ADC_Enable,"ax",%progbits + 282 .align 1 + 283 .syntax unified + 284 .code 16 + 285 .thumb_func + 287 ADC_Enable: + 288 .LVL20: + 289 .LFB62: +2194:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** uint32_t tickstart = 0U; + 290 .loc 1 2194 1 is_stmt 1 view -0 + 291 .cfi_startproc + 292 @ args = 0, pretend = 0, frame = 8 + 293 @ frame_needed = 0, uses_anonymous_args = 0 +2194:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** uint32_t tickstart = 0U; + 294 .loc 1 2194 1 is_stmt 0 view .LVU81 + 295 0000 30B5 push {r4, r5, lr} + 296 .cfi_def_cfa_offset 12 + 297 .cfi_offset 4, -12 + 298 .cfi_offset 5, -8 + 299 .cfi_offset 14, -4 + 300 0002 83B0 sub sp, sp, #12 + 301 .cfi_def_cfa_offset 24 + 302 0004 0400 movs r4, r0 +2195:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** __IO uint32_t wait_loop_index = 0U; + 303 .loc 1 2195 3 is_stmt 1 view .LVU82 + 304 .LVL21: +2196:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** + 305 .loc 1 2196 3 view .LVU83 +2196:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** + 306 .loc 1 2196 17 is_stmt 0 view .LVU84 + 307 0006 0023 movs r3, #0 + 308 0008 0193 str r3, [sp, #4] +2202:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** { + 309 .loc 1 2202 3 is_stmt 1 view .LVU85 +2202:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** { + 310 .loc 1 2202 7 is_stmt 0 view .LVU86 + 311 000a 0368 ldr r3, [r0] + 312 000c 9968 ldr r1, [r3, #8] + 313 000e 0322 movs r2, #3 + 314 0010 0A40 ands r2, r1 + 315 0012 012A cmp r2, #1 + 316 0014 14D0 beq .L35 + 317 .L25: +2205:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** { + 318 .loc 1 2205 5 is_stmt 1 view .LVU87 +2205:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** { + 319 .loc 1 2205 9 is_stmt 0 view .LVU88 + 320 0016 9968 ldr r1, [r3, #8] + 321 0018 224A ldr r2, .L39 +2205:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** { + ARM GAS /tmp/cc2rPMmj.s page 49 + + + 322 .loc 1 2205 8 view .LVU89 + 323 001a 1142 tst r1, r2 + 324 001c 18D1 bne .L36 +2217:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** + 325 .loc 1 2217 5 is_stmt 1 view .LVU90 + 326 001e 9A68 ldr r2, [r3, #8] + 327 0020 0121 movs r1, #1 + 328 0022 0A43 orrs r2, r1 + 329 0024 9A60 str r2, [r3, #8] +2221:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** while(wait_loop_index != 0U) + 330 .loc 1 2221 5 view .LVU91 +2221:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** while(wait_loop_index != 0U) + 331 .loc 1 2221 42 is_stmt 0 view .LVU92 + 332 0026 204B ldr r3, .L39+4 + 333 0028 1868 ldr r0, [r3] + 334 .LVL22: +2221:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** while(wait_loop_index != 0U) + 335 .loc 1 2221 42 view .LVU93 + 336 002a 2049 ldr r1, .L39+8 + 337 002c FFF7FEFF bl __aeabi_uidiv + 338 .LVL23: +2221:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** while(wait_loop_index != 0U) + 339 .loc 1 2221 21 view .LVU94 + 340 0030 0190 str r0, [sp, #4] +2222:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** { + 341 .loc 1 2222 5 is_stmt 1 view .LVU95 + 342 .L28: +2222:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** { + 343 .loc 1 2222 27 view .LVU96 + 344 0032 019B ldr r3, [sp, #4] + 345 0034 002B cmp r3, #0 + 346 0036 15D0 beq .L37 +2224:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** } + 347 .loc 1 2224 7 view .LVU97 +2224:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** } + 348 .loc 1 2224 22 is_stmt 0 view .LVU98 + 349 0038 019B ldr r3, [sp, #4] + 350 003a 013B subs r3, r3, #1 + 351 003c 0193 str r3, [sp, #4] + 352 003e F8E7 b .L28 + 353 .LVL24: + 354 .L35: +2202:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** { + 355 .loc 1 2202 7 discriminator 1 view .LVU99 + 356 0040 1A68 ldr r2, [r3] + 357 0042 D207 lsls r2, r2, #31 + 358 0044 2BD4 bmi .L32 +2202:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** { + 359 .loc 1 2202 7 discriminator 4 view .LVU100 + 360 0046 DA68 ldr r2, [r3, #12] + 361 0048 1204 lsls r2, r2, #16 + 362 004a E4D5 bpl .L25 +2251:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** } + 363 .loc 1 2251 10 view .LVU101 + 364 004c 0020 movs r0, #0 + 365 .LVL25: +2251:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** } + ARM GAS /tmp/cc2rPMmj.s page 50 + + + 366 .loc 1 2251 10 view .LVU102 + 367 004e 24E0 b .L26 + 368 .LVL26: + 369 .L36: +2208:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** + 370 .loc 1 2208 7 is_stmt 1 view .LVU103 + 371 0050 A36B ldr r3, [r4, #56] + 372 0052 1022 movs r2, #16 + 373 0054 1343 orrs r3, r2 + 374 0056 A363 str r3, [r4, #56] +2211:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** + 375 .loc 1 2211 7 view .LVU104 + 376 0058 E36B ldr r3, [r4, #60] + 377 005a 0F3A subs r2, r2, #15 + 378 005c 1343 orrs r3, r2 + 379 005e E363 str r3, [r4, #60] +2213:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** } + 380 .loc 1 2213 7 view .LVU105 +2213:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** } + 381 .loc 1 2213 14 is_stmt 0 view .LVU106 + 382 0060 0120 movs r0, #1 + 383 .LVL27: +2213:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** } + 384 .loc 1 2213 14 view .LVU107 + 385 0062 1AE0 b .L26 + 386 .L37: +2228:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** + 387 .loc 1 2228 5 is_stmt 1 view .LVU108 +2228:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** + 388 .loc 1 2228 17 is_stmt 0 view .LVU109 + 389 0064 FFF7FEFF bl HAL_GetTick + 390 .LVL28: + 391 0068 0500 movs r5, r0 + 392 .LVL29: +2231:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** { + 393 .loc 1 2231 5 is_stmt 1 view .LVU110 + 394 .L30: +2231:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** { + 395 .loc 1 2231 50 view .LVU111 +2231:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** { + 396 .loc 1 2231 11 is_stmt 0 view .LVU112 + 397 006a 2368 ldr r3, [r4] + 398 006c 1B68 ldr r3, [r3] +2231:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** { + 399 .loc 1 2231 50 view .LVU113 + 400 006e DB07 lsls r3, r3, #31 + 401 0070 12D4 bmi .L38 +2233:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** { + 402 .loc 1 2233 7 is_stmt 1 view .LVU114 +2233:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** { + 403 .loc 1 2233 11 is_stmt 0 view .LVU115 + 404 0072 FFF7FEFF bl HAL_GetTick + 405 .LVL30: +2233:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** { + 406 .loc 1 2233 25 discriminator 1 view .LVU116 + 407 0076 401B subs r0, r0, r5 +2233:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** { + ARM GAS /tmp/cc2rPMmj.s page 51 + + + 408 .loc 1 2233 9 discriminator 1 view .LVU117 + 409 0078 0228 cmp r0, #2 + 410 007a F6D9 bls .L30 +2236:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** { + 411 .loc 1 2236 9 is_stmt 1 view .LVU118 +2236:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** { + 412 .loc 1 2236 12 is_stmt 0 view .LVU119 + 413 007c 2368 ldr r3, [r4] + 414 007e 1B68 ldr r3, [r3] +2236:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** { + 415 .loc 1 2236 11 view .LVU120 + 416 0080 DB07 lsls r3, r3, #31 + 417 0082 F2D4 bmi .L30 +2239:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** + 418 .loc 1 2239 11 is_stmt 1 view .LVU121 + 419 0084 A36B ldr r3, [r4, #56] + 420 0086 1022 movs r2, #16 + 421 0088 1343 orrs r3, r2 + 422 008a A363 str r3, [r4, #56] +2242:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** + 423 .loc 1 2242 11 view .LVU122 + 424 008c E36B ldr r3, [r4, #60] + 425 008e 0F3A subs r2, r2, #15 + 426 0090 1343 orrs r3, r2 + 427 0092 E363 str r3, [r4, #60] +2244:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** } + 428 .loc 1 2244 11 view .LVU123 +2244:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** } + 429 .loc 1 2244 18 is_stmt 0 view .LVU124 + 430 0094 0120 movs r0, #1 + 431 0096 00E0 b .L26 + 432 .L38: +2251:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** } + 433 .loc 1 2251 10 view .LVU125 + 434 0098 0020 movs r0, #0 + 435 .LVL31: + 436 .L26: +2252:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** + 437 .loc 1 2252 1 view .LVU126 + 438 009a 03B0 add sp, sp, #12 + 439 @ sp needed + 440 .LVL32: +2252:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** + 441 .loc 1 2252 1 view .LVU127 + 442 009c 30BD pop {r4, r5, pc} + 443 .LVL33: + 444 .L32: +2251:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** } + 445 .loc 1 2251 10 view .LVU128 + 446 009e 0020 movs r0, #0 + 447 .LVL34: +2251:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** } + 448 .loc 1 2251 10 view .LVU129 + 449 00a0 FBE7 b .L26 + 450 .L40: + 451 00a2 C046 .align 2 + 452 .L39: + ARM GAS /tmp/cc2rPMmj.s page 52 + + + 453 00a4 17000080 .word -2147483625 + 454 00a8 00000000 .word SystemCoreClock + 455 00ac 40420F00 .word 1000000 + 456 .cfi_endproc + 457 .LFE62: + 459 .section .text.HAL_ADC_MspInit,"ax",%progbits + 460 .align 1 + 461 .weak HAL_ADC_MspInit + 462 .syntax unified + 463 .code 16 + 464 .thumb_func + 466 HAL_ADC_MspInit: + 467 .LVL35: + 468 .LFB42: + 766:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** /* Prevent unused argument(s) compilation warning */ + 469 .loc 1 766 1 is_stmt 1 view -0 + 470 .cfi_startproc + 471 @ args = 0, pretend = 0, frame = 0 + 472 @ frame_needed = 0, uses_anonymous_args = 0 + 473 @ link register save eliminated. + 768:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** + 474 .loc 1 768 3 view .LVU131 + 773:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** + 475 .loc 1 773 1 is_stmt 0 view .LVU132 + 476 @ sp needed + 477 0000 7047 bx lr + 478 .cfi_endproc + 479 .LFE42: + 481 .section .text.HAL_ADC_Init,"ax",%progbits + 482 .align 1 + 483 .global HAL_ADC_Init + 484 .syntax unified + 485 .code 16 + 486 .thumb_func + 488 HAL_ADC_Init: + 489 .LVL36: + 490 .LFB40: + 398:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** HAL_StatusTypeDef tmp_hal_status = HAL_OK; + 491 .loc 1 398 1 is_stmt 1 view -0 + 492 .cfi_startproc + 493 @ args = 0, pretend = 0, frame = 0 + 494 @ frame_needed = 0, uses_anonymous_args = 0 + 398:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** HAL_StatusTypeDef tmp_hal_status = HAL_OK; + 495 .loc 1 398 1 is_stmt 0 view .LVU134 + 496 0000 70B5 push {r4, r5, r6, lr} + 497 .cfi_def_cfa_offset 16 + 498 .cfi_offset 4, -16 + 499 .cfi_offset 5, -12 + 500 .cfi_offset 6, -8 + 501 .cfi_offset 14, -4 + 502 0002 041E subs r4, r0, #0 + 399:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** uint32_t tmpCFGR1 = 0U; + 503 .loc 1 399 3 is_stmt 1 view .LVU135 + 504 .LVL37: + 400:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** + 505 .loc 1 400 3 view .LVU136 + 403:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** { + ARM GAS /tmp/cc2rPMmj.s page 53 + + + 506 .loc 1 403 3 view .LVU137 + 403:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** { + 507 .loc 1 403 5 is_stmt 0 view .LVU138 + 508 0004 00D1 bne .LCB451 + 509 0006 B4E0 b .L56 @long jump + 510 .LCB451: + 409:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** assert_param(IS_ADC_CLOCKPRESCALER(hadc->Init.ClockPrescaler)); + 511 .loc 1 409 3 is_stmt 1 view .LVU139 + 410:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** assert_param(IS_ADC_RESOLUTION(hadc->Init.Resolution)); + 512 .loc 1 410 3 view .LVU140 + 411:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** assert_param(IS_ADC_DATA_ALIGN(hadc->Init.DataAlign)); + 513 .loc 1 411 3 view .LVU141 + 412:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** assert_param(IS_ADC_SCAN_MODE(hadc->Init.ScanConvMode)); + 514 .loc 1 412 3 view .LVU142 + 413:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** assert_param(IS_FUNCTIONAL_STATE(hadc->Init.ContinuousConvMode)); + 515 .loc 1 413 3 view .LVU143 + 414:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** assert_param(IS_FUNCTIONAL_STATE(hadc->Init.DiscontinuousConvMode)); + 516 .loc 1 414 3 view .LVU144 + 415:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** assert_param(IS_ADC_EXTTRIG_EDGE(hadc->Init.ExternalTrigConvEdge)); + 517 .loc 1 415 3 view .LVU145 + 416:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** assert_param(IS_ADC_EXTTRIG(hadc->Init.ExternalTrigConv)); + 518 .loc 1 416 3 view .LVU146 + 417:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** assert_param(IS_FUNCTIONAL_STATE(hadc->Init.DMAContinuousRequests)); + 519 .loc 1 417 3 view .LVU147 + 418:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** assert_param(IS_ADC_EOC_SELECTION(hadc->Init.EOCSelection)); + 520 .loc 1 418 3 view .LVU148 + 419:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** assert_param(IS_ADC_OVERRUN(hadc->Init.Overrun)); + 521 .loc 1 419 3 view .LVU149 + 420:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** assert_param(IS_FUNCTIONAL_STATE(hadc->Init.LowPowerAutoWait)); + 522 .loc 1 420 3 view .LVU150 + 421:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** assert_param(IS_FUNCTIONAL_STATE(hadc->Init.LowPowerAutoPowerOff)); + 523 .loc 1 421 3 view .LVU151 + 422:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** + 524 .loc 1 422 3 view .LVU152 + 432:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** { + 525 .loc 1 432 3 view .LVU153 + 432:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** { + 526 .loc 1 432 11 is_stmt 0 view .LVU154 + 527 0008 836B ldr r3, [r0, #56] + 432:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** { + 528 .loc 1 432 6 view .LVU155 + 529 000a 002B cmp r3, #0 + 530 000c 00D1 bne .LCB469 + 531 000e 80E0 b .L61 @long jump + 532 .LCB469: + 533 .LVL38: + 534 .L44: + 465:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** (tmp_hal_status == HAL_OK) && + 535 .loc 1 465 3 is_stmt 1 view .LVU156 + 465:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** (tmp_hal_status == HAL_OK) && + 536 .loc 1 465 7 is_stmt 0 view .LVU157 + 537 0010 A36B ldr r3, [r4, #56] + 465:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** (tmp_hal_status == HAL_OK) && + 538 .loc 1 465 6 view .LVU158 + 539 0012 DB06 lsls r3, r3, #27 + 540 0014 00D5 bpl .LCB477 + 541 0016 A6E0 b .L45 @long jump + ARM GAS /tmp/cc2rPMmj.s page 54 + + + 542 .LCB477: + 467:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** { + 543 .loc 1 467 8 view .LVU159 + 544 0018 2368 ldr r3, [r4] + 545 001a 9A68 ldr r2, [r3, #8] + 546 001c 0421 movs r1, #4 + 547 001e 0800 movs r0, r1 + 548 0020 1040 ands r0, r2 + 466:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** (ADC_IS_CONVERSION_ONGOING_REGULAR(hadc) == RESET) ) + 549 .loc 1 466 65 view .LVU160 + 550 0022 1142 tst r1, r2 + 551 0024 00D0 beq .LCB484 + 552 0026 9EE0 b .L45 @long jump + 553 .LCB484: + 470:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** HAL_ADC_STATE_REG_BUSY, + 554 .loc 1 470 5 is_stmt 1 view .LVU161 + 555 0028 A26B ldr r2, [r4, #56] + 556 002a 5349 ldr r1, .L66 + 557 002c 0A40 ands r2, r1 + 558 002e 0631 adds r1, r1, #6 + 559 0030 FF31 adds r1, r1, #255 + 560 0032 0A43 orrs r2, r1 + 561 0034 A263 str r2, [r4, #56] + 479:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** { + 562 .loc 1 479 5 view .LVU162 + 479:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** { + 563 .loc 1 479 9 is_stmt 0 view .LVU163 + 564 0036 9968 ldr r1, [r3, #8] + 565 0038 0322 movs r2, #3 + 566 003a 0A40 ands r2, r1 + 567 003c 012A cmp r2, #1 + 568 003e 6ED0 beq .L62 + 569 .L46: + 490:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** ADC_CFGR1_RES , + 570 .loc 1 490 7 is_stmt 1 view .LVU164 + 571 0040 DA68 ldr r2, [r3, #12] + 572 0042 1821 movs r1, #24 + 573 0044 8A43 bics r2, r1 + 574 0046 A168 ldr r1, [r4, #8] + 575 0048 0A43 orrs r2, r1 + 576 004a DA60 str r2, [r3, #12] + 496:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** ADC_CFGR2_CKMODE , + 577 .loc 1 496 7 view .LVU165 + 578 004c 2268 ldr r2, [r4] + 579 004e 1369 ldr r3, [r2, #16] + 580 0050 9B00 lsls r3, r3, #2 + 581 0052 9B08 lsrs r3, r3, #2 + 582 0054 6168 ldr r1, [r4, #4] + 583 0056 0B43 orrs r3, r1 + 584 0058 1361 str r3, [r2, #16] + 585 .L47: + 513:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** ADC_CFGR1_AUTOFF | + 586 .loc 1 513 5 view .LVU166 + 513:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** ADC_CFGR1_AUTOFF | + 587 .loc 1 513 9 is_stmt 0 view .LVU167 + 588 005a 2268 ldr r2, [r4] + 513:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** ADC_CFGR1_AUTOFF | + ARM GAS /tmp/cc2rPMmj.s page 55 + + + 589 .loc 1 513 19 view .LVU168 + 590 005c D368 ldr r3, [r2, #12] + 513:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** ADC_CFGR1_AUTOFF | + 591 .loc 1 513 27 view .LVU169 + 592 005e 4749 ldr r1, .L66+4 + 593 0060 0B40 ands r3, r1 + 594 0062 D360 str r3, [r2, #12] + 524:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** ADC_CFGR1_AUTOOFF((uint32_t)hadc->Init.LowPowerAutoPowerOff) | + 595 .loc 1 524 5 is_stmt 1 view .LVU170 + 524:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** ADC_CFGR1_AUTOOFF((uint32_t)hadc->Init.LowPowerAutoPowerOff) | + 596 .loc 1 524 18 is_stmt 0 view .LVU171 + 597 0064 237E ldrb r3, [r4, #24] + 598 0066 9B03 lsls r3, r3, #14 + 525:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** ADC_CFGR1_CONTINUOUS((uint32_t)hadc->Init.ContinuousConvMode) | + 599 .loc 1 525 18 view .LVU172 + 600 0068 627E ldrb r2, [r4, #25] + 601 006a D203 lsls r2, r2, #15 + 524:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** ADC_CFGR1_AUTOOFF((uint32_t)hadc->Init.LowPowerAutoPowerOff) | + 602 .loc 1 524 83 view .LVU173 + 603 006c 1343 orrs r3, r2 + 526:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** ADC_CFGR1_OVERRUN(hadc->Init.Overrun) | + 604 .loc 1 526 18 view .LVU174 + 605 006e A17E ldrb r1, [r4, #26] + 606 0070 4A03 lsls r2, r1, #13 + 525:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** ADC_CFGR1_CONTINUOUS((uint32_t)hadc->Init.ContinuousConvMode) | + 607 .loc 1 525 83 view .LVU175 + 608 0072 1343 orrs r3, r2 + 527:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** hadc->Init.DataAlign | + 609 .loc 1 527 18 view .LVU176 + 610 0074 A26A ldr r2, [r4, #40] + 611 0076 012A cmp r2, #1 + 612 0078 58D0 beq .L57 + 527:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** hadc->Init.DataAlign | + 613 .loc 1 527 18 discriminator 1 view .LVU177 + 614 007a 8022 movs r2, #128 + 615 007c 5201 lsls r2, r2, #5 + 616 .L48: + 526:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** ADC_CFGR1_OVERRUN(hadc->Init.Overrun) | + 617 .loc 1 526 83 view .LVU178 + 618 007e 1343 orrs r3, r2 + 528:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** ADC_SCANDIR(hadc->Init.ScanConvMode) | + 619 .loc 1 528 28 view .LVU179 + 620 0080 E268 ldr r2, [r4, #12] + 527:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** hadc->Init.DataAlign | + 621 .loc 1 527 83 view .LVU180 + 622 0082 1343 orrs r3, r2 + 529:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** ADC_CFGR1_DMACONTREQ((uint32_t)hadc->Init.DMAContinuousRequests) ); + 623 .loc 1 529 18 view .LVU181 + 624 0084 2269 ldr r2, [r4, #16] + 625 0086 022A cmp r2, #2 + 626 0088 52D0 beq .L63 + 627 .L49: + 528:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** ADC_SCANDIR(hadc->Init.ScanConvMode) | + 628 .loc 1 528 83 view .LVU182 + 629 008a 0343 orrs r3, r0 + 530:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** + 630 .loc 1 530 18 view .LVU183 + ARM GAS /tmp/cc2rPMmj.s page 56 + + + 631 008c 2422 movs r2, #36 + 632 008e A25C ldrb r2, [r4, r2] + 633 0090 5200 lsls r2, r2, #1 + 529:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** ADC_CFGR1_DMACONTREQ((uint32_t)hadc->Init.DMAContinuousRequests) ); + 634 .loc 1 529 83 view .LVU184 + 635 0092 1343 orrs r3, r2 + 636 .LVL39: + 533:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** { + 637 .loc 1 533 5 is_stmt 1 view .LVU185 + 533:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** { + 638 .loc 1 533 19 is_stmt 0 view .LVU186 + 639 0094 E27E ldrb r2, [r4, #27] + 533:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** { + 640 .loc 1 533 8 view .LVU187 + 641 0096 012A cmp r2, #1 + 642 0098 4CD0 beq .L64 + 643 .L50: + 559:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** { + 644 .loc 1 559 5 is_stmt 1 view .LVU188 + 559:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** { + 645 .loc 1 559 19 is_stmt 0 view .LVU189 + 646 009a E269 ldr r2, [r4, #28] + 559:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** { + 647 .loc 1 559 8 view .LVU190 + 648 009c C221 movs r1, #194 + 649 009e FF31 adds r1, r1, #255 + 650 00a0 8A42 cmp r2, r1 + 651 00a2 02D0 beq .L52 + 561:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** hadc->Init.ExternalTrigConvEdge ); + 652 .loc 1 561 7 is_stmt 1 view .LVU191 + 562:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** } + 653 .loc 1 562 31 is_stmt 0 view .LVU192 + 654 00a4 216A ldr r1, [r4, #32] + 561:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** hadc->Init.ExternalTrigConvEdge ); + 655 .loc 1 561 52 view .LVU193 + 656 00a6 0A43 orrs r2, r1 + 561:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** hadc->Init.ExternalTrigConvEdge ); + 657 .loc 1 561 16 view .LVU194 + 658 00a8 1343 orrs r3, r2 + 659 .LVL40: + 660 .L52: + 566:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** + 661 .loc 1 566 5 is_stmt 1 view .LVU195 + 566:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** + 662 .loc 1 566 9 is_stmt 0 view .LVU196 + 663 00aa 2168 ldr r1, [r4] + 566:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** + 664 .loc 1 566 19 view .LVU197 + 665 00ac CA68 ldr r2, [r1, #12] + 566:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** + 666 .loc 1 566 27 view .LVU198 + 667 00ae 1A43 orrs r2, r3 + 668 00b0 CA60 str r2, [r1, #12] + 574:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** { + 669 .loc 1 574 5 is_stmt 1 view .LVU199 + 574:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** { + 670 .loc 1 574 9 is_stmt 0 view .LVU200 + ARM GAS /tmp/cc2rPMmj.s page 57 + + + 671 00b2 E26A ldr r2, [r4, #44] + 574:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** { + 672 .loc 1 574 8 view .LVU201 + 673 00b4 8021 movs r1, #128 + 674 00b6 4905 lsls r1, r1, #21 + 675 00b8 8A42 cmp r2, r1 + 676 00ba 0DD0 beq .L53 + 574:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** { + 677 .loc 1 574 9 discriminator 1 view .LVU202 + 678 00bc 012A cmp r2, #1 + 679 00be 0BD0 beq .L53 + 574:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** { + 680 .loc 1 574 9 discriminator 2 view .LVU203 + 681 00c0 022A cmp r2, #2 + 682 00c2 09D0 beq .L53 + 574:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** { + 683 .loc 1 574 9 discriminator 3 view .LVU204 + 684 00c4 032A cmp r2, #3 + 685 00c6 07D0 beq .L53 + 574:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** { + 686 .loc 1 574 9 discriminator 4 view .LVU205 + 687 00c8 042A cmp r2, #4 + 688 00ca 05D0 beq .L53 + 574:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** { + 689 .loc 1 574 9 discriminator 5 view .LVU206 + 690 00cc 052A cmp r2, #5 + 691 00ce 03D0 beq .L53 + 574:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** { + 692 .loc 1 574 9 discriminator 6 view .LVU207 + 693 00d0 062A cmp r2, #6 + 694 00d2 01D0 beq .L53 + 574:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** { + 695 .loc 1 574 9 discriminator 7 view .LVU208 + 696 00d4 072A cmp r2, #7 + 697 00d6 0AD1 bne .L54 + 698 .L53: + 578:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** + 699 .loc 1 578 7 is_stmt 1 view .LVU209 + 578:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** + 700 .loc 1 578 11 is_stmt 0 view .LVU210 + 701 00d8 2068 ldr r0, [r4] + 578:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** + 702 .loc 1 578 21 view .LVU211 + 703 00da 4169 ldr r1, [r0, #20] + 578:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** + 704 .loc 1 578 28 view .LVU212 + 705 00dc 0722 movs r2, #7 + 706 00de 9143 bics r1, r2 + 707 00e0 4161 str r1, [r0, #20] + 581:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** } + 708 .loc 1 581 7 is_stmt 1 view .LVU213 + 581:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** } + 709 .loc 1 581 11 is_stmt 0 view .LVU214 + 710 00e2 2068 ldr r0, [r4] + 581:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** } + 711 .loc 1 581 21 view .LVU215 + 712 00e4 4169 ldr r1, [r0, #20] + ARM GAS /tmp/cc2rPMmj.s page 58 + + + 581:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** } + 713 .loc 1 581 31 view .LVU216 + 714 00e6 E56A ldr r5, [r4, #44] + 715 00e8 2A40 ands r2, r5 + 581:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** } + 716 .loc 1 581 28 view .LVU217 + 717 00ea 0A43 orrs r2, r1 + 718 00ec 4261 str r2, [r0, #20] + 719 .L54: + 589:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** == tmpCFGR1) + 720 .loc 1 589 5 is_stmt 1 view .LVU218 + 589:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** == tmpCFGR1) + 721 .loc 1 589 14 is_stmt 0 view .LVU219 + 722 00ee 2268 ldr r2, [r4] + 589:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** == tmpCFGR1) + 723 .loc 1 589 24 view .LVU220 + 724 00f0 D268 ldr r2, [r2, #12] + 589:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** == tmpCFGR1) + 725 .loc 1 589 32 view .LVU221 + 726 00f2 2349 ldr r1, .L66+8 + 727 00f4 0A40 ands r2, r1 + 589:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** == tmpCFGR1) + 728 .loc 1 589 8 view .LVU222 + 729 00f6 9A42 cmp r2, r3 + 730 00f8 2BD0 beq .L65 + 603:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** HAL_ADC_STATE_BUSY_INTERNAL, + 731 .loc 1 603 7 is_stmt 1 view .LVU223 + 732 00fa A36B ldr r3, [r4, #56] + 733 .LVL41: + 603:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** HAL_ADC_STATE_BUSY_INTERNAL, + 734 .loc 1 603 7 is_stmt 0 view .LVU224 + 735 00fc 1222 movs r2, #18 + 736 00fe 9343 bics r3, r2 + 737 0100 023A subs r2, r2, #2 + 738 0102 1343 orrs r3, r2 + 739 0104 A363 str r3, [r4, #56] + 608:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** + 740 .loc 1 608 7 is_stmt 1 view .LVU225 + 741 0106 E36B ldr r3, [r4, #60] + 742 0108 0F3A subs r2, r2, #15 + 743 010a 1343 orrs r3, r2 + 744 010c E363 str r3, [r4, #60] + 610:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** } + 745 .loc 1 610 7 view .LVU226 + 746 .LVL42: + 610:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** } + 747 .loc 1 610 22 is_stmt 0 view .LVU227 + 748 010e 0120 movs r0, #1 + 749 0110 2EE0 b .L43 + 750 .LVL43: + 751 .L61: + 435:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** + 752 .loc 1 435 5 is_stmt 1 view .LVU228 + 753 0112 C363 str r3, [r0, #60] + 438:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** + 754 .loc 1 438 5 view .LVU229 + 438:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** + ARM GAS /tmp/cc2rPMmj.s page 59 + + + 755 .loc 1 438 16 is_stmt 0 view .LVU230 + 756 0114 3422 movs r2, #52 + 757 0116 8354 strb r3, [r0, r2] + 456:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** #endif /* USE_HAL_ADC_REGISTER_CALLBACKS */ + 758 .loc 1 456 5 is_stmt 1 view .LVU231 + 759 0118 FFF7FEFF bl HAL_ADC_MspInit + 760 .LVL44: + 456:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** #endif /* USE_HAL_ADC_REGISTER_CALLBACKS */ + 761 .loc 1 456 5 is_stmt 0 view .LVU232 + 762 011c 78E7 b .L44 + 763 .L62: + 479:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** { + 764 .loc 1 479 9 discriminator 1 view .LVU233 + 765 011e 1A68 ldr r2, [r3] + 766 0120 D207 lsls r2, r2, #31 + 767 0122 9AD4 bmi .L47 + 479:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** { + 768 .loc 1 479 9 discriminator 4 view .LVU234 + 769 0124 DA68 ldr r2, [r3, #12] + 770 0126 1204 lsls r2, r2, #16 + 771 0128 97D4 bmi .L47 + 772 012a 89E7 b .L46 + 773 .L57: + 527:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** hadc->Init.DataAlign | + 774 .loc 1 527 18 discriminator 2 view .LVU235 + 775 012c 0200 movs r2, r0 + 776 012e A6E7 b .L48 + 777 .L63: + 529:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** ADC_CFGR1_DMACONTREQ((uint32_t)hadc->Init.DMAContinuousRequests) ); + 778 .loc 1 529 18 discriminator 1 view .LVU236 + 779 0130 0420 movs r0, #4 + 780 0132 AAE7 b .L49 + 781 .LVL45: + 782 .L64: + 535:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** { + 783 .loc 1 535 7 is_stmt 1 view .LVU237 + 535:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** { + 784 .loc 1 535 10 is_stmt 0 view .LVU238 + 785 0134 0029 cmp r1, #0 + 786 0136 03D1 bne .L51 + 538:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** } + 787 .loc 1 538 9 is_stmt 1 view .LVU239 + 538:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** } + 788 .loc 1 538 18 is_stmt 0 view .LVU240 + 789 0138 8022 movs r2, #128 + 790 013a 5202 lsls r2, r2, #9 + 791 013c 1343 orrs r3, r2 + 792 .LVL46: + 538:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** } + 793 .loc 1 538 18 view .LVU241 + 794 013e ACE7 b .L50 + 795 .L51: + 547:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** + 796 .loc 1 547 9 is_stmt 1 view .LVU242 + 797 0140 A26B ldr r2, [r4, #56] + 798 0142 2021 movs r1, #32 + 799 0144 0A43 orrs r2, r1 + ARM GAS /tmp/cc2rPMmj.s page 60 + + + 800 0146 A263 str r2, [r4, #56] + 550:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** } + 801 .loc 1 550 9 view .LVU243 + 802 0148 E26B ldr r2, [r4, #60] + 803 014a 1F39 subs r1, r1, #31 + 804 014c 0A43 orrs r2, r1 + 805 014e E263 str r2, [r4, #60] + 806 0150 A3E7 b .L50 + 807 .L65: + 593:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** + 808 .loc 1 593 7 view .LVU244 + 809 0152 0023 movs r3, #0 + 810 .LVL47: + 593:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** + 811 .loc 1 593 7 is_stmt 0 view .LVU245 + 812 0154 E363 str r3, [r4, #60] + 596:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** HAL_ADC_STATE_BUSY_INTERNAL, + 813 .loc 1 596 7 is_stmt 1 view .LVU246 + 814 0156 A36B ldr r3, [r4, #56] + 815 0158 0322 movs r2, #3 + 816 015a 9343 bics r3, r2 + 817 015c 023A subs r2, r2, #2 + 818 015e 1343 orrs r3, r2 + 819 0160 A363 str r3, [r4, #56] + 399:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** uint32_t tmpCFGR1 = 0U; + 820 .loc 1 399 21 is_stmt 0 view .LVU247 + 821 0162 0020 movs r0, #0 + 822 0164 04E0 b .L43 + 823 .LVL48: + 824 .L45: + 617:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** + 825 .loc 1 617 5 is_stmt 1 view .LVU248 + 826 0166 A36B ldr r3, [r4, #56] + 827 0168 1022 movs r2, #16 + 828 016a 1343 orrs r3, r2 + 829 016c A363 str r3, [r4, #56] + 619:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** } + 830 .loc 1 619 5 view .LVU249 + 831 .LVL49: + 619:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** } + 832 .loc 1 619 20 is_stmt 0 view .LVU250 + 833 016e 0120 movs r0, #1 + 834 .LVL50: + 835 .L43: + 624:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** + 836 .loc 1 624 1 view .LVU251 + 837 @ sp needed + 838 .LVL51: + 624:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** + 839 .loc 1 624 1 view .LVU252 + 840 0170 70BD pop {r4, r5, r6, pc} + 841 .LVL52: + 842 .L56: + 405:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** } + 843 .loc 1 405 12 view .LVU253 + 844 0172 0120 movs r0, #1 + 845 .LVL53: + ARM GAS /tmp/cc2rPMmj.s page 61 + + + 405:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** } + 846 .loc 1 405 12 view .LVU254 + 847 0174 FCE7 b .L43 + 848 .L67: + 849 0176 C046 .align 2 + 850 .L66: + 851 0178 FDFEFFFF .word -259 + 852 017c 1902FEFF .word -130535 + 853 0180 E7FF3F83 .word -2092957721 + 854 .cfi_endproc + 855 .LFE40: + 857 .section .text.HAL_ADC_MspDeInit,"ax",%progbits + 858 .align 1 + 859 .weak HAL_ADC_MspDeInit + 860 .syntax unified + 861 .code 16 + 862 .thumb_func + 864 HAL_ADC_MspDeInit: + 865 .LVL54: + 866 .LFB43: + 781:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** /* Prevent unused argument(s) compilation warning */ + 867 .loc 1 781 1 is_stmt 1 view -0 + 868 .cfi_startproc + 869 @ args = 0, pretend = 0, frame = 0 + 870 @ frame_needed = 0, uses_anonymous_args = 0 + 871 @ link register save eliminated. + 783:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** + 872 .loc 1 783 3 view .LVU256 + 788:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** + 873 .loc 1 788 1 is_stmt 0 view .LVU257 + 874 @ sp needed + 875 0000 7047 bx lr + 876 .cfi_endproc + 877 .LFE43: + 879 .section .text.HAL_ADC_DeInit,"ax",%progbits + 880 .align 1 + 881 .global HAL_ADC_DeInit + 882 .syntax unified + 883 .code 16 + 884 .thumb_func + 886 HAL_ADC_DeInit: + 887 .LVL55: + 888 .LFB41: + 640:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** HAL_StatusTypeDef tmp_hal_status = HAL_OK; + 889 .loc 1 640 1 is_stmt 1 view -0 + 890 .cfi_startproc + 891 @ args = 0, pretend = 0, frame = 0 + 892 @ frame_needed = 0, uses_anonymous_args = 0 + 640:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** HAL_StatusTypeDef tmp_hal_status = HAL_OK; + 893 .loc 1 640 1 is_stmt 0 view .LVU259 + 894 0000 70B5 push {r4, r5, r6, lr} + 895 .cfi_def_cfa_offset 16 + 896 .cfi_offset 4, -16 + 897 .cfi_offset 5, -12 + 898 .cfi_offset 6, -8 + 899 .cfi_offset 14, -4 + 900 0002 041E subs r4, r0, #0 + ARM GAS /tmp/cc2rPMmj.s page 62 + + + 641:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** + 901 .loc 1 641 3 is_stmt 1 view .LVU260 + 902 .LVL56: + 644:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** { + 903 .loc 1 644 3 view .LVU261 + 644:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** { + 904 .loc 1 644 5 is_stmt 0 view .LVU262 + 905 0004 42D0 beq .L74 + 650:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** + 906 .loc 1 650 3 is_stmt 1 view .LVU263 + 653:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** + 907 .loc 1 653 3 view .LVU264 + 908 0006 836B ldr r3, [r0, #56] + 909 0008 0222 movs r2, #2 + 910 000a 1343 orrs r3, r2 + 911 000c 8363 str r3, [r0, #56] + 656:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** + 912 .loc 1 656 3 view .LVU265 + 656:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** + 913 .loc 1 656 20 is_stmt 0 view .LVU266 + 914 000e FFF7FEFF bl ADC_ConversionStop + 915 .LVL57: + 656:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** + 916 .loc 1 656 20 view .LVU267 + 917 0012 051E subs r5, r0, #0 + 918 .LVL58: + 659:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** { + 919 .loc 1 659 3 is_stmt 1 view .LVU268 + 659:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** { + 920 .loc 1 659 6 is_stmt 0 view .LVU269 + 921 0014 31D0 beq .L75 + 922 .LVL59: + 675:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** { + 923 .loc 1 675 3 is_stmt 1 view .LVU270 + 675:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** { + 924 .loc 1 675 6 is_stmt 0 view .LVU271 + 925 0016 0128 cmp r0, #1 + 926 0018 2AD0 beq .L72 + 927 .L73: + 680:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** ADC_IT_EOS | ADC_IT_EOC | + 928 .loc 1 680 5 is_stmt 1 view .LVU272 + 929 001a 2168 ldr r1, [r4] + 930 001c 4B68 ldr r3, [r1, #4] + 931 001e 9F22 movs r2, #159 + 932 0020 9343 bics r3, r2 + 933 0022 4B60 str r3, [r1, #4] + 685:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** ADC_FLAG_EOS | ADC_FLAG_EOC | + 934 .loc 1 685 5 view .LVU273 + 935 0024 2368 ldr r3, [r4] + 936 0026 1A60 str r2, [r3] + 694:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** ADC_CFGR1_AUTOFF | ADC_CFGR1_WAIT | ADC_CFGR1_CONT | ADC_CFGR1_ + 937 .loc 1 694 5 view .LVU274 + 694:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** ADC_CFGR1_AUTOFF | ADC_CFGR1_WAIT | ADC_CFGR1_CONT | ADC_CFGR1_ + 938 .loc 1 694 9 is_stmt 0 view .LVU275 + 939 0028 2268 ldr r2, [r4] + 694:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** ADC_CFGR1_AUTOFF | ADC_CFGR1_WAIT | ADC_CFGR1_CONT | ADC_CFGR1_ + 940 .loc 1 694 19 view .LVU276 + ARM GAS /tmp/cc2rPMmj.s page 63 + + + 941 002a D368 ldr r3, [r2, #12] + 694:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** ADC_CFGR1_AUTOFF | ADC_CFGR1_WAIT | ADC_CFGR1_CONT | ADC_CFGR1_ + 942 .loc 1 694 27 view .LVU277 + 943 002c 1849 ldr r1, .L76 + 944 002e 0B40 ands r3, r1 + 945 0030 D360 str r3, [r2, #12] + 702:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** + 946 .loc 1 702 5 is_stmt 1 view .LVU278 + 702:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** + 947 .loc 1 702 9 is_stmt 0 view .LVU279 + 948 0032 2268 ldr r2, [r4] + 702:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** + 949 .loc 1 702 19 view .LVU280 + 950 0034 1369 ldr r3, [r2, #16] + 702:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** + 951 .loc 1 702 27 view .LVU281 + 952 0036 9B00 lsls r3, r3, #2 + 953 0038 9B08 lsrs r3, r3, #2 + 954 003a 1361 str r3, [r2, #16] + 705:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** + 955 .loc 1 705 5 is_stmt 1 view .LVU282 + 705:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** + 956 .loc 1 705 9 is_stmt 0 view .LVU283 + 957 003c 2268 ldr r2, [r4] + 705:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** + 958 .loc 1 705 19 view .LVU284 + 959 003e 5369 ldr r3, [r2, #20] + 705:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** + 960 .loc 1 705 26 view .LVU285 + 961 0040 0721 movs r1, #7 + 962 0042 8B43 bics r3, r1 + 963 0044 5361 str r3, [r2, #20] + 708:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** + 964 .loc 1 708 5 is_stmt 1 view .LVU286 + 708:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** + 965 .loc 1 708 9 is_stmt 0 view .LVU287 + 966 0046 2268 ldr r2, [r4] + 708:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** + 967 .loc 1 708 19 view .LVU288 + 968 0048 136A ldr r3, [r2, #32] + 708:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** + 969 .loc 1 708 24 view .LVU289 + 970 004a 1249 ldr r1, .L76+4 + 971 004c 0B40 ands r3, r1 + 972 004e 1362 str r3, [r2, #32] + 711:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** ADC_CHSELR_CHSEL15 | ADC_CHSELR_CHSEL14 | ADC_CHSELR_CHSEL13 | ADC_ + 973 .loc 1 711 5 is_stmt 1 view .LVU290 + 711:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** ADC_CHSELR_CHSEL15 | ADC_CHSELR_CHSEL14 | ADC_CHSELR_CHSEL13 | ADC_ + 974 .loc 1 711 9 is_stmt 0 view .LVU291 + 975 0050 2268 ldr r2, [r4] + 711:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** ADC_CHSELR_CHSEL15 | ADC_CHSELR_CHSEL14 | ADC_CHSELR_CHSEL13 | ADC_ + 976 .loc 1 711 19 view .LVU292 + 977 0052 936A ldr r3, [r2, #40] + 711:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** ADC_CHSELR_CHSEL15 | ADC_CHSELR_CHSEL14 | ADC_CHSELR_CHSEL13 | ADC_ + 978 .loc 1 711 28 view .LVU293 + 979 0054 DB0C lsrs r3, r3, #19 + 980 0056 DB04 lsls r3, r3, #19 + ARM GAS /tmp/cc2rPMmj.s page 64 + + + 981 0058 9362 str r3, [r2, #40] + 721:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** + 982 .loc 1 721 5 is_stmt 1 view .LVU294 + 721:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** + 983 .loc 1 721 8 is_stmt 0 view .LVU295 + 984 005a 0F4A ldr r2, .L76+8 + 985 005c 1368 ldr r3, [r2] + 721:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** + 986 .loc 1 721 14 view .LVU296 + 987 005e 0F49 ldr r1, .L76+12 + 988 0060 0B40 ands r3, r1 + 989 0062 1360 str r3, [r2] + 742:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** #endif /* USE_HAL_ADC_REGISTER_CALLBACKS */ + 990 .loc 1 742 5 is_stmt 1 view .LVU297 + 991 0064 2000 movs r0, r4 + 992 0066 FFF7FEFF bl HAL_ADC_MspDeInit + 993 .LVL60: + 746:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** + 994 .loc 1 746 5 view .LVU298 + 995 006a 0023 movs r3, #0 + 996 006c E363 str r3, [r4, #60] + 749:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** } + 997 .loc 1 749 5 view .LVU299 + 749:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** } + 998 .loc 1 749 17 is_stmt 0 view .LVU300 + 999 006e A363 str r3, [r4, #56] + 1000 .L72: + 753:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** + 1001 .loc 1 753 3 is_stmt 1 view .LVU301 + 753:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** + 1002 .loc 1 753 3 view .LVU302 + 1003 0070 3423 movs r3, #52 + 1004 0072 0022 movs r2, #0 + 1005 0074 E254 strb r2, [r4, r3] + 753:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** + 1006 .loc 1 753 3 view .LVU303 + 756:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** } + 1007 .loc 1 756 3 view .LVU304 + 1008 .L70: + 757:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** + 1009 .loc 1 757 1 is_stmt 0 view .LVU305 + 1010 0076 2800 movs r0, r5 + 1011 @ sp needed + 1012 .LVL61: + 757:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** + 1013 .loc 1 757 1 view .LVU306 + 1014 0078 70BD pop {r4, r5, r6, pc} + 1015 .LVL62: + 1016 .L75: + 662:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** + 1017 .loc 1 662 5 is_stmt 1 view .LVU307 + 662:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** + 1018 .loc 1 662 22 is_stmt 0 view .LVU308 + 1019 007a 2000 movs r0, r4 + 1020 .LVL63: + 662:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** + 1021 .loc 1 662 22 view .LVU309 + ARM GAS /tmp/cc2rPMmj.s page 65 + + + 1022 007c FFF7FEFF bl ADC_Disable + 1023 .LVL64: + 1024 0080 0500 movs r5, r0 + 1025 .LVL65: + 665:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** { + 1026 .loc 1 665 5 is_stmt 1 view .LVU310 + 665:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** { + 1027 .loc 1 665 8 is_stmt 0 view .LVU311 + 1028 0082 0128 cmp r0, #1 + 1029 0084 F4D0 beq .L72 + 668:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** } + 1030 .loc 1 668 7 is_stmt 1 view .LVU312 + 668:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** } + 1031 .loc 1 668 19 is_stmt 0 view .LVU313 + 1032 0086 0123 movs r3, #1 + 1033 0088 A363 str r3, [r4, #56] + 1034 .LVL66: + 675:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** { + 1035 .loc 1 675 3 is_stmt 1 view .LVU314 + 1036 008a C6E7 b .L73 + 1037 .LVL67: + 1038 .L74: + 646:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** } + 1039 .loc 1 646 13 is_stmt 0 view .LVU315 + 1040 008c 0125 movs r5, #1 + 1041 008e F2E7 b .L70 + 1042 .L77: + 1043 .align 2 + 1044 .L76: + 1045 0090 00023E83 .word -2093088256 + 1046 0094 00F000F0 .word -268374016 + 1047 0098 08270140 .word 1073817352 + 1048 009c FFFF3FFE .word -29360129 + 1049 .cfi_endproc + 1050 .LFE41: + 1052 .section .text.HAL_ADC_Start,"ax",%progbits + 1053 .align 1 + 1054 .global HAL_ADC_Start + 1055 .syntax unified + 1056 .code 16 + 1057 .thumb_func + 1059 HAL_ADC_Start: + 1060 .LVL68: + 1061 .LFB44: +1019:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** HAL_StatusTypeDef tmp_hal_status = HAL_OK; + 1062 .loc 1 1019 1 is_stmt 1 view -0 + 1063 .cfi_startproc + 1064 @ args = 0, pretend = 0, frame = 0 + 1065 @ frame_needed = 0, uses_anonymous_args = 0 +1019:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** HAL_StatusTypeDef tmp_hal_status = HAL_OK; + 1066 .loc 1 1019 1 is_stmt 0 view .LVU317 + 1067 0000 10B5 push {r4, lr} + 1068 .cfi_def_cfa_offset 8 + 1069 .cfi_offset 4, -8 + 1070 .cfi_offset 14, -4 + 1071 0002 0400 movs r4, r0 +1020:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** + ARM GAS /tmp/cc2rPMmj.s page 66 + + + 1072 .loc 1 1020 3 is_stmt 1 view .LVU318 + 1073 .LVL69: +1023:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** + 1074 .loc 1 1023 3 view .LVU319 +1026:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** { + 1075 .loc 1 1026 3 view .LVU320 +1026:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** { + 1076 .loc 1 1026 7 is_stmt 0 view .LVU321 + 1077 0004 0368 ldr r3, [r0] + 1078 0006 9B68 ldr r3, [r3, #8] +1026:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** { + 1079 .loc 1 1026 6 view .LVU322 + 1080 0008 5B07 lsls r3, r3, #29 + 1081 000a 23D4 bmi .L81 +1029:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** + 1082 .loc 1 1029 5 is_stmt 1 view .LVU323 +1029:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** + 1083 .loc 1 1029 5 view .LVU324 + 1084 000c 3423 movs r3, #52 + 1085 000e C35C ldrb r3, [r0, r3] + 1086 0010 012B cmp r3, #1 + 1087 0012 21D0 beq .L82 +1029:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** + 1088 .loc 1 1029 5 discriminator 2 view .LVU325 + 1089 0014 3423 movs r3, #52 + 1090 0016 0122 movs r2, #1 + 1091 0018 C254 strb r2, [r0, r3] +1029:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** + 1092 .loc 1 1029 5 discriminator 2 view .LVU326 +1034:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** { + 1093 .loc 1 1034 5 view .LVU327 +1034:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** { + 1094 .loc 1 1034 19 is_stmt 0 view .LVU328 + 1095 001a 437E ldrb r3, [r0, #25] +1034:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** { + 1096 .loc 1 1034 8 view .LVU329 + 1097 001c 012B cmp r3, #1 + 1098 001e 14D1 bne .L84 +1020:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** + 1099 .loc 1 1020 21 view .LVU330 + 1100 0020 0020 movs r0, #0 + 1101 .LVL70: + 1102 .L80: +1045:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** HAL_ADC_STATE_READY | HAL_ADC_STATE_REG_EOC | HAL_ADC_STATE_REG_OVR | HAL_A + 1103 .loc 1 1045 7 is_stmt 1 view .LVU331 + 1104 0022 A26B ldr r2, [r4, #56] + 1105 0024 0D4B ldr r3, .L85 + 1106 0026 1A40 ands r2, r3 + 1107 0028 8023 movs r3, #128 + 1108 002a 5B00 lsls r3, r3, #1 + 1109 002c 1343 orrs r3, r2 + 1110 002e A363 str r3, [r4, #56] +1050:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** + 1111 .loc 1 1050 7 view .LVU332 + 1112 0030 0023 movs r3, #0 + 1113 0032 E363 str r3, [r4, #60] +1055:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** + ARM GAS /tmp/cc2rPMmj.s page 67 + + + 1114 .loc 1 1055 7 view .LVU333 +1055:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** + 1115 .loc 1 1055 7 view .LVU334 + 1116 0034 3422 movs r2, #52 + 1117 0036 A354 strb r3, [r4, r2] +1055:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** + 1118 .loc 1 1055 7 view .LVU335 +1060:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** + 1119 .loc 1 1060 7 view .LVU336 + 1120 0038 2368 ldr r3, [r4] + 1121 003a 183A subs r2, r2, #24 + 1122 003c 1A60 str r2, [r3] +1066:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** } + 1123 .loc 1 1066 7 view .LVU337 +1066:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** } + 1124 .loc 1 1066 11 is_stmt 0 view .LVU338 + 1125 003e 2268 ldr r2, [r4] +1066:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** } + 1126 .loc 1 1066 21 view .LVU339 + 1127 0040 9368 ldr r3, [r2, #8] +1066:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** } + 1128 .loc 1 1066 26 view .LVU340 + 1129 0042 0421 movs r1, #4 + 1130 0044 0B43 orrs r3, r1 + 1131 0046 9360 str r3, [r2, #8] + 1132 .L79: +1076:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** + 1133 .loc 1 1076 1 view .LVU341 + 1134 @ sp needed + 1135 .LVL71: +1076:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** + 1136 .loc 1 1076 1 view .LVU342 + 1137 0048 10BD pop {r4, pc} + 1138 .LVL72: + 1139 .L84: +1036:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** } + 1140 .loc 1 1036 7 is_stmt 1 view .LVU343 +1036:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** } + 1141 .loc 1 1036 24 is_stmt 0 view .LVU344 + 1142 004a FFF7FEFF bl ADC_Enable + 1143 .LVL73: +1040:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** { + 1144 .loc 1 1040 5 is_stmt 1 view .LVU345 +1040:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** { + 1145 .loc 1 1040 8 is_stmt 0 view .LVU346 + 1146 004e 0028 cmp r0, #0 + 1147 0050 FAD1 bne .L79 + 1148 0052 E6E7 b .L80 + 1149 .LVL74: + 1150 .L81: +1071:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** } + 1151 .loc 1 1071 20 view .LVU347 + 1152 0054 0220 movs r0, #2 + 1153 .LVL75: +1071:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** } + 1154 .loc 1 1071 20 view .LVU348 + 1155 0056 F7E7 b .L79 + ARM GAS /tmp/cc2rPMmj.s page 68 + + + 1156 .LVL76: + 1157 .L82: +1029:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** + 1158 .loc 1 1029 5 discriminator 1 view .LVU349 + 1159 0058 0220 movs r0, #2 + 1160 .LVL77: +1029:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** + 1161 .loc 1 1029 5 discriminator 1 view .LVU350 + 1162 005a F5E7 b .L79 + 1163 .L86: + 1164 .align 2 + 1165 .L85: + 1166 005c FEF0FFFF .word -3842 + 1167 .cfi_endproc + 1168 .LFE44: + 1170 .section .text.HAL_ADC_Stop,"ax",%progbits + 1171 .align 1 + 1172 .global HAL_ADC_Stop + 1173 .syntax unified + 1174 .code 16 + 1175 .thumb_func + 1177 HAL_ADC_Stop: + 1178 .LVL78: + 1179 .LFB45: +1084:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** HAL_StatusTypeDef tmp_hal_status = HAL_OK; + 1180 .loc 1 1084 1 is_stmt 1 view -0 + 1181 .cfi_startproc + 1182 @ args = 0, pretend = 0, frame = 0 + 1183 @ frame_needed = 0, uses_anonymous_args = 0 +1084:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** HAL_StatusTypeDef tmp_hal_status = HAL_OK; + 1184 .loc 1 1084 1 is_stmt 0 view .LVU352 + 1185 0000 10B5 push {r4, lr} + 1186 .cfi_def_cfa_offset 8 + 1187 .cfi_offset 4, -8 + 1188 .cfi_offset 14, -4 + 1189 0002 0400 movs r4, r0 +1085:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** + 1190 .loc 1 1085 3 is_stmt 1 view .LVU353 + 1191 .LVL79: +1088:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** + 1192 .loc 1 1088 3 view .LVU354 +1091:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** + 1193 .loc 1 1091 3 view .LVU355 +1091:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** + 1194 .loc 1 1091 3 view .LVU356 + 1195 0004 3423 movs r3, #52 + 1196 0006 C35C ldrb r3, [r0, r3] + 1197 0008 012B cmp r3, #1 + 1198 000a 17D0 beq .L90 +1091:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** + 1199 .loc 1 1091 3 discriminator 2 view .LVU357 + 1200 000c 3423 movs r3, #52 + 1201 000e 0122 movs r2, #1 + 1202 0010 C254 strb r2, [r0, r3] +1091:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** + 1203 .loc 1 1091 3 discriminator 2 view .LVU358 +1094:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** + ARM GAS /tmp/cc2rPMmj.s page 69 + + + 1204 .loc 1 1094 3 view .LVU359 +1094:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** + 1205 .loc 1 1094 20 is_stmt 0 view .LVU360 + 1206 0012 FFF7FEFF bl ADC_ConversionStop + 1207 .LVL80: +1097:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** { + 1208 .loc 1 1097 3 is_stmt 1 view .LVU361 +1097:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** { + 1209 .loc 1 1097 6 is_stmt 0 view .LVU362 + 1210 0016 0028 cmp r0, #0 + 1211 0018 03D0 beq .L91 + 1212 .LVL81: + 1213 .L89: +1113:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** + 1214 .loc 1 1113 3 is_stmt 1 view .LVU363 +1113:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** + 1215 .loc 1 1113 3 view .LVU364 + 1216 001a 3423 movs r3, #52 + 1217 001c 0022 movs r2, #0 + 1218 001e E254 strb r2, [r4, r3] +1113:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** + 1219 .loc 1 1113 3 view .LVU365 +1116:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** } + 1220 .loc 1 1116 3 view .LVU366 + 1221 .LVL82: + 1222 .L88: +1117:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** + 1223 .loc 1 1117 1 is_stmt 0 view .LVU367 + 1224 @ sp needed + 1225 .LVL83: +1117:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** + 1226 .loc 1 1117 1 view .LVU368 + 1227 0020 10BD pop {r4, pc} + 1228 .LVL84: + 1229 .L91: +1100:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** + 1230 .loc 1 1100 5 is_stmt 1 view .LVU369 +1100:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** + 1231 .loc 1 1100 22 is_stmt 0 view .LVU370 + 1232 0022 2000 movs r0, r4 + 1233 .LVL85: +1100:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** + 1234 .loc 1 1100 22 view .LVU371 + 1235 0024 FFF7FEFF bl ADC_Disable + 1236 .LVL86: +1103:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** { + 1237 .loc 1 1103 5 is_stmt 1 view .LVU372 +1103:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** { + 1238 .loc 1 1103 8 is_stmt 0 view .LVU373 + 1239 0028 0028 cmp r0, #0 + 1240 002a F6D1 bne .L89 +1106:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** HAL_ADC_STATE_REG_BUSY, + 1241 .loc 1 1106 7 is_stmt 1 view .LVU374 + 1242 002c A36B ldr r3, [r4, #56] + 1243 002e 044A ldr r2, .L92 + 1244 0030 1340 ands r3, r2 + 1245 0032 0432 adds r2, r2, #4 + ARM GAS /tmp/cc2rPMmj.s page 70 + + + 1246 0034 FF32 adds r2, r2, #255 + 1247 0036 1343 orrs r3, r2 + 1248 0038 A363 str r3, [r4, #56] + 1249 003a EEE7 b .L89 + 1250 .LVL87: + 1251 .L90: +1091:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** + 1252 .loc 1 1091 3 is_stmt 0 discriminator 1 view .LVU375 + 1253 003c 0220 movs r0, #2 + 1254 .LVL88: +1091:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** + 1255 .loc 1 1091 3 discriminator 1 view .LVU376 + 1256 003e EFE7 b .L88 + 1257 .L93: + 1258 .align 2 + 1259 .L92: + 1260 0040 FEFEFFFF .word -258 + 1261 .cfi_endproc + 1262 .LFE45: + 1264 .section .text.HAL_ADC_PollForConversion,"ax",%progbits + 1265 .align 1 + 1266 .global HAL_ADC_PollForConversion + 1267 .syntax unified + 1268 .code 16 + 1269 .thumb_func + 1271 HAL_ADC_PollForConversion: + 1272 .LVL89: + 1273 .LFB46: +1138:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** uint32_t tickstart; + 1274 .loc 1 1138 1 is_stmt 1 view -0 + 1275 .cfi_startproc + 1276 @ args = 0, pretend = 0, frame = 0 + 1277 @ frame_needed = 0, uses_anonymous_args = 0 +1138:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** uint32_t tickstart; + 1278 .loc 1 1138 1 is_stmt 0 view .LVU378 + 1279 0000 F8B5 push {r3, r4, r5, r6, r7, lr} + 1280 .cfi_def_cfa_offset 24 + 1281 .cfi_offset 3, -24 + 1282 .cfi_offset 4, -20 + 1283 .cfi_offset 5, -16 + 1284 .cfi_offset 6, -12 + 1285 .cfi_offset 7, -8 + 1286 .cfi_offset 14, -4 + 1287 0002 0400 movs r4, r0 + 1288 0004 0E00 movs r6, r1 +1139:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** uint32_t tmp_Flag_EOC; + 1289 .loc 1 1139 3 is_stmt 1 view .LVU379 +1140:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** + 1290 .loc 1 1140 3 view .LVU380 +1143:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** + 1291 .loc 1 1143 3 view .LVU381 +1146:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** { + 1292 .loc 1 1146 3 view .LVU382 +1146:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** { + 1293 .loc 1 1146 17 is_stmt 0 view .LVU383 + 1294 0006 4769 ldr r7, [r0, #20] +1146:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** { + ARM GAS /tmp/cc2rPMmj.s page 71 + + + 1295 .loc 1 1146 6 view .LVU384 + 1296 0008 082F cmp r7, #8 + 1297 000a 04D0 beq .L95 +1159:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** { + 1298 .loc 1 1159 5 is_stmt 1 view .LVU385 +1159:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** { + 1299 .loc 1 1159 9 is_stmt 0 view .LVU386 + 1300 000c 0368 ldr r3, [r0] + 1301 000e DB68 ldr r3, [r3, #12] +1159:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** { + 1302 .loc 1 1159 8 view .LVU387 + 1303 0010 DB07 lsls r3, r3, #31 + 1304 0012 18D4 bmi .L108 +1171:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** } + 1305 .loc 1 1171 20 view .LVU388 + 1306 0014 0C27 movs r7, #12 + 1307 .L95: + 1308 .LVL90: +1176:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** + 1309 .loc 1 1176 3 is_stmt 1 view .LVU389 +1176:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** + 1310 .loc 1 1176 15 is_stmt 0 view .LVU390 + 1311 0016 FFF7FEFF bl HAL_GetTick + 1312 .LVL91: +1176:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** + 1313 .loc 1 1176 15 view .LVU391 + 1314 001a 0500 movs r5, r0 + 1315 .LVL92: +1179:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** { + 1316 .loc 1 1179 3 is_stmt 1 view .LVU392 + 1317 .L98: +1179:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** { + 1318 .loc 1 1179 9 view .LVU393 + 1319 001c 2368 ldr r3, [r4] + 1320 001e 1A68 ldr r2, [r3] + 1321 0020 1742 tst r7, r2 + 1322 0022 1FD1 bne .L109 +1182:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** { + 1323 .loc 1 1182 5 view .LVU394 +1182:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** { + 1324 .loc 1 1182 7 is_stmt 0 view .LVU395 + 1325 0024 731C adds r3, r6, #1 + 1326 0026 F9D0 beq .L98 +1184:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** { + 1327 .loc 1 1184 7 is_stmt 1 view .LVU396 +1184:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** { + 1328 .loc 1 1184 9 is_stmt 0 view .LVU397 + 1329 0028 002E cmp r6, #0 + 1330 002a 15D1 bne .L110 + 1331 .L99: +1187:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** { + 1332 .loc 1 1187 9 is_stmt 1 view .LVU398 +1187:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** { + 1333 .loc 1 1187 12 is_stmt 0 view .LVU399 + 1334 002c 2368 ldr r3, [r4] + 1335 002e 1B68 ldr r3, [r3] +1187:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** { + ARM GAS /tmp/cc2rPMmj.s page 72 + + + 1336 .loc 1 1187 11 view .LVU400 + 1337 0030 1F42 tst r7, r3 + 1338 0032 F3D1 bne .L98 +1190:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** + 1339 .loc 1 1190 11 is_stmt 1 view .LVU401 + 1340 0034 A36B ldr r3, [r4, #56] + 1341 0036 0422 movs r2, #4 + 1342 0038 1343 orrs r3, r2 + 1343 003a A363 str r3, [r4, #56] +1193:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** + 1344 .loc 1 1193 11 view .LVU402 +1193:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** + 1345 .loc 1 1193 11 view .LVU403 + 1346 003c 3423 movs r3, #52 + 1347 003e 0022 movs r2, #0 + 1348 0040 E254 strb r2, [r4, r3] +1193:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** + 1349 .loc 1 1193 11 view .LVU404 +1195:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** } + 1350 .loc 1 1195 11 view .LVU405 +1195:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** } + 1351 .loc 1 1195 18 is_stmt 0 view .LVU406 + 1352 0042 0320 movs r0, #3 + 1353 0044 32E0 b .L96 + 1354 .LVL93: + 1355 .L108: +1162:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** + 1356 .loc 1 1162 7 is_stmt 1 view .LVU407 + 1357 0046 836B ldr r3, [r0, #56] + 1358 0048 2022 movs r2, #32 + 1359 004a 1343 orrs r3, r2 + 1360 004c 8363 str r3, [r0, #56] +1165:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** + 1361 .loc 1 1165 7 view .LVU408 +1165:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** + 1362 .loc 1 1165 7 view .LVU409 + 1363 004e 3423 movs r3, #52 + 1364 0050 0022 movs r2, #0 + 1365 0052 C254 strb r2, [r0, r3] +1165:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** + 1366 .loc 1 1165 7 view .LVU410 +1167:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** } + 1367 .loc 1 1167 7 view .LVU411 +1167:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** } + 1368 .loc 1 1167 14 is_stmt 0 view .LVU412 + 1369 0054 0120 movs r0, #1 + 1370 .LVL94: +1167:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** } + 1371 .loc 1 1167 14 view .LVU413 + 1372 0056 29E0 b .L96 + 1373 .LVL95: + 1374 .L110: +1184:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** { + 1375 .loc 1 1184 30 discriminator 1 view .LVU414 + 1376 0058 FFF7FEFF bl HAL_GetTick + 1377 .LVL96: +1184:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** { + ARM GAS /tmp/cc2rPMmj.s page 73 + + + 1378 .loc 1 1184 43 discriminator 1 view .LVU415 + 1379 005c 401B subs r0, r0, r5 +1184:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** { + 1380 .loc 1 1184 25 discriminator 1 view .LVU416 + 1381 005e B042 cmp r0, r6 + 1382 0060 DCD9 bls .L98 + 1383 0062 E3E7 b .L99 + 1384 .L109: +1202:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** + 1385 .loc 1 1202 3 is_stmt 1 view .LVU417 + 1386 0064 A16B ldr r1, [r4, #56] + 1387 0066 8022 movs r2, #128 + 1388 0068 9200 lsls r2, r2, #2 + 1389 006a 0A43 orrs r2, r1 + 1390 006c A263 str r2, [r4, #56] +1206:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** (hadc->Init.ContinuousConvMode == DISABLE) ) + 1391 .loc 1 1206 3 view .LVU418 +1206:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** (hadc->Init.ContinuousConvMode == DISABLE) ) + 1392 .loc 1 1206 6 is_stmt 0 view .LVU419 + 1393 006e D968 ldr r1, [r3, #12] + 1394 0070 C022 movs r2, #192 + 1395 0072 1201 lsls r2, r2, #4 +1206:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** (hadc->Init.ContinuousConvMode == DISABLE) ) + 1396 .loc 1 1206 5 view .LVU420 + 1397 0074 1142 tst r1, r2 + 1398 0076 13D1 bne .L102 +1207:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** { + 1399 .loc 1 1207 17 view .LVU421 + 1400 0078 A27E ldrb r2, [r4, #26] +1206:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** (hadc->Init.ContinuousConvMode == DISABLE) ) + 1401 .loc 1 1206 49 discriminator 1 view .LVU422 + 1402 007a 002A cmp r2, #0 + 1403 007c 10D1 bne .L102 +1210:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** { + 1404 .loc 1 1210 5 is_stmt 1 view .LVU423 +1210:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** { + 1405 .loc 1 1210 9 is_stmt 0 view .LVU424 + 1406 007e 1A68 ldr r2, [r3] +1210:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** { + 1407 .loc 1 1210 7 view .LVU425 + 1408 0080 1207 lsls r2, r2, #28 + 1409 0082 0DD5 bpl .L102 +1214:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** { + 1410 .loc 1 1214 7 is_stmt 1 view .LVU426 +1214:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** { + 1411 .loc 1 1214 11 is_stmt 0 view .LVU427 + 1412 0084 9A68 ldr r2, [r3, #8] +1214:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** { + 1413 .loc 1 1214 10 view .LVU428 + 1414 0086 5207 lsls r2, r2, #29 + 1415 0088 11D4 bmi .L103 +1220:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** + 1416 .loc 1 1220 9 is_stmt 1 view .LVU429 + 1417 008a 5A68 ldr r2, [r3, #4] + 1418 008c 0C21 movs r1, #12 + 1419 008e 8A43 bics r2, r1 + 1420 0090 5A60 str r2, [r3, #4] + ARM GAS /tmp/cc2rPMmj.s page 74 + + +1223:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** HAL_ADC_STATE_REG_BUSY, + 1421 .loc 1 1223 9 view .LVU430 + 1422 0092 A36B ldr r3, [r4, #56] + 1423 0094 0B4A ldr r2, .L111 + 1424 0096 1340 ands r3, r2 + 1425 0098 0432 adds r2, r2, #4 + 1426 009a FF32 adds r2, r2, #255 + 1427 009c 1343 orrs r3, r2 + 1428 009e A363 str r3, [r4, #56] + 1429 .L102: +1241:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** { + 1430 .loc 1 1241 3 view .LVU431 +1241:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** { + 1431 .loc 1 1241 17 is_stmt 0 view .LVU432 + 1432 00a0 207E ldrb r0, [r4, #24] +1241:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** { + 1433 .loc 1 1241 6 view .LVU433 + 1434 00a2 0028 cmp r0, #0 + 1435 00a4 0CD1 bne .L105 +1244:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** } + 1436 .loc 1 1244 5 is_stmt 1 view .LVU434 + 1437 00a6 2368 ldr r3, [r4] + 1438 00a8 0C22 movs r2, #12 + 1439 00aa 1A60 str r2, [r3] + 1440 .LVL97: + 1441 .L96: +1249:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** + 1442 .loc 1 1249 1 is_stmt 0 view .LVU435 + 1443 @ sp needed + 1444 .LVL98: + 1445 .LVL99: +1249:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** + 1446 .loc 1 1249 1 view .LVU436 + 1447 00ac F8BD pop {r3, r4, r5, r6, r7, pc} + 1448 .LVL100: + 1449 .L103: +1230:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** + 1450 .loc 1 1230 9 is_stmt 1 view .LVU437 + 1451 00ae A36B ldr r3, [r4, #56] + 1452 00b0 2022 movs r2, #32 + 1453 00b2 1343 orrs r3, r2 + 1454 00b4 A363 str r3, [r4, #56] +1233:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** } + 1455 .loc 1 1233 9 view .LVU438 + 1456 00b6 E36B ldr r3, [r4, #60] + 1457 00b8 1F3A subs r2, r2, #31 + 1458 00ba 1343 orrs r3, r2 + 1459 00bc E363 str r3, [r4, #60] + 1460 00be EFE7 b .L102 + 1461 .L105: +1248:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** } + 1462 .loc 1 1248 10 is_stmt 0 view .LVU439 + 1463 00c0 0020 movs r0, #0 + 1464 00c2 F3E7 b .L96 + 1465 .L112: + 1466 .align 2 + 1467 .L111: + ARM GAS /tmp/cc2rPMmj.s page 75 + + + 1468 00c4 FEFEFFFF .word -258 + 1469 .cfi_endproc + 1470 .LFE46: + 1472 .section .text.HAL_ADC_PollForEvent,"ax",%progbits + 1473 .align 1 + 1474 .global HAL_ADC_PollForEvent + 1475 .syntax unified + 1476 .code 16 + 1477 .thumb_func + 1479 HAL_ADC_PollForEvent: + 1480 .LVL101: + 1481 .LFB47: +1262:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** uint32_t tickstart=0; + 1482 .loc 1 1262 1 is_stmt 1 view -0 + 1483 .cfi_startproc + 1484 @ args = 0, pretend = 0, frame = 0 + 1485 @ frame_needed = 0, uses_anonymous_args = 0 +1262:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** uint32_t tickstart=0; + 1486 .loc 1 1262 1 is_stmt 0 view .LVU441 + 1487 0000 F8B5 push {r3, r4, r5, r6, r7, lr} + 1488 .cfi_def_cfa_offset 24 + 1489 .cfi_offset 3, -24 + 1490 .cfi_offset 4, -20 + 1491 .cfi_offset 5, -16 + 1492 .cfi_offset 6, -12 + 1493 .cfi_offset 7, -8 + 1494 .cfi_offset 14, -4 + 1495 0002 0600 movs r6, r0 + 1496 0004 0C00 movs r4, r1 + 1497 0006 1700 movs r7, r2 +1263:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** + 1498 .loc 1 1263 3 is_stmt 1 view .LVU442 + 1499 .LVL102: +1266:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** assert_param(IS_ADC_EVENT_TYPE(EventType)); + 1500 .loc 1 1266 3 view .LVU443 +1267:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** + 1501 .loc 1 1267 3 view .LVU444 +1270:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** + 1502 .loc 1 1270 3 view .LVU445 +1270:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** + 1503 .loc 1 1270 15 is_stmt 0 view .LVU446 + 1504 0008 FFF7FEFF bl HAL_GetTick + 1505 .LVL103: +1270:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** + 1506 .loc 1 1270 15 view .LVU447 + 1507 000c 0500 movs r5, r0 + 1508 .LVL104: +1273:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** { + 1509 .loc 1 1273 3 is_stmt 1 view .LVU448 + 1510 .L115: +1273:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** { + 1511 .loc 1 1273 45 view .LVU449 +1273:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** { + 1512 .loc 1 1273 9 is_stmt 0 view .LVU450 + 1513 000e 3168 ldr r1, [r6] + 1514 0010 0B68 ldr r3, [r1] + 1515 0012 2340 ands r3, r4 + ARM GAS /tmp/cc2rPMmj.s page 76 + + +1273:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** { + 1516 .loc 1 1273 45 view .LVU451 + 1517 0014 A342 cmp r3, r4 + 1518 0016 17D0 beq .L123 +1276:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** { + 1519 .loc 1 1276 5 is_stmt 1 view .LVU452 +1276:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** { + 1520 .loc 1 1276 7 is_stmt 0 view .LVU453 + 1521 0018 7B1C adds r3, r7, #1 + 1522 001a F8D0 beq .L115 +1278:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** { + 1523 .loc 1 1278 7 is_stmt 1 view .LVU454 +1278:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** { + 1524 .loc 1 1278 9 is_stmt 0 view .LVU455 + 1525 001c 002F cmp r7, #0 + 1526 001e 0DD1 bne .L124 + 1527 .L116: +1281:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** { + 1528 .loc 1 1281 9 is_stmt 1 view .LVU456 +1281:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** { + 1529 .loc 1 1281 12 is_stmt 0 view .LVU457 + 1530 0020 3368 ldr r3, [r6] + 1531 0022 1B68 ldr r3, [r3] + 1532 0024 2340 ands r3, r4 +1281:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** { + 1533 .loc 1 1281 11 view .LVU458 + 1534 0026 A342 cmp r3, r4 + 1535 0028 F1D0 beq .L115 +1284:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** + 1536 .loc 1 1284 11 is_stmt 1 view .LVU459 + 1537 002a B36B ldr r3, [r6, #56] + 1538 002c 0422 movs r2, #4 + 1539 002e 1343 orrs r3, r2 + 1540 0030 B363 str r3, [r6, #56] +1287:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** + 1541 .loc 1 1287 11 view .LVU460 +1287:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** + 1542 .loc 1 1287 11 view .LVU461 + 1543 0032 3423 movs r3, #52 + 1544 0034 0022 movs r2, #0 + 1545 0036 F254 strb r2, [r6, r3] +1287:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** + 1546 .loc 1 1287 11 view .LVU462 +1289:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** } + 1547 .loc 1 1289 11 view .LVU463 +1289:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** } + 1548 .loc 1 1289 18 is_stmt 0 view .LVU464 + 1549 0038 0320 movs r0, #3 + 1550 003a 0DE0 b .L118 + 1551 .L124: +1278:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** { + 1552 .loc 1 1278 31 discriminator 1 view .LVU465 + 1553 003c FFF7FEFF bl HAL_GetTick + 1554 .LVL105: +1278:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** { + 1555 .loc 1 1278 44 discriminator 1 view .LVU466 + 1556 0040 401B subs r0, r0, r5 + ARM GAS /tmp/cc2rPMmj.s page 77 + + +1278:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** { + 1557 .loc 1 1278 26 discriminator 1 view .LVU467 + 1558 0042 B842 cmp r0, r7 + 1559 0044 E3D9 bls .L115 + 1560 0046 EBE7 b .L116 + 1561 .L123: +1295:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** { + 1562 .loc 1 1295 3 is_stmt 1 view .LVU468 + 1563 0048 802C cmp r4, #128 + 1564 004a 06D0 beq .L125 +1312:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** { + 1565 .loc 1 1312 5 view .LVU469 +1312:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** { + 1566 .loc 1 1312 19 is_stmt 0 view .LVU470 + 1567 004c B36A ldr r3, [r6, #40] +1312:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** { + 1568 .loc 1 1312 8 view .LVU471 + 1569 004e 012B cmp r3, #1 + 1570 0050 0CD0 beq .L126 + 1571 .L121: +1322:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** break; + 1572 .loc 1 1322 5 is_stmt 1 view .LVU472 + 1573 0052 1023 movs r3, #16 + 1574 0054 0B60 str r3, [r1] +1323:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** } + 1575 .loc 1 1323 5 view .LVU473 +1327:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** } + 1576 .loc 1 1327 10 is_stmt 0 view .LVU474 + 1577 0056 0020 movs r0, #0 + 1578 .L118: +1328:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** + 1579 .loc 1 1328 1 view .LVU475 + 1580 @ sp needed + 1581 .LVL106: + 1582 .LVL107: + 1583 .LVL108: + 1584 .LVL109: +1328:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** + 1585 .loc 1 1328 1 view .LVU476 + 1586 0058 F8BD pop {r3, r4, r5, r6, r7, pc} + 1587 .LVL110: + 1588 .L125: +1300:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** + 1589 .loc 1 1300 5 is_stmt 1 view .LVU477 + 1590 005a B26B ldr r2, [r6, #56] + 1591 005c 8023 movs r3, #128 + 1592 005e 5B02 lsls r3, r3, #9 + 1593 0060 1343 orrs r3, r2 + 1594 0062 B363 str r3, [r6, #56] +1303:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** break; + 1595 .loc 1 1303 5 view .LVU478 + 1596 0064 8023 movs r3, #128 + 1597 0066 0B60 str r3, [r1] +1304:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** + 1598 .loc 1 1304 5 view .LVU479 +1327:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** } + 1599 .loc 1 1327 10 is_stmt 0 view .LVU480 + ARM GAS /tmp/cc2rPMmj.s page 78 + + + 1600 0068 0020 movs r0, #0 +1304:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** + 1601 .loc 1 1304 5 view .LVU481 + 1602 006a F5E7 b .L118 + 1603 .L126: +1315:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** + 1604 .loc 1 1315 7 is_stmt 1 view .LVU482 + 1605 006c B26B ldr r2, [r6, #56] + 1606 006e 8023 movs r3, #128 + 1607 0070 DB00 lsls r3, r3, #3 + 1608 0072 1343 orrs r3, r2 + 1609 0074 B363 str r3, [r6, #56] +1318:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** } + 1610 .loc 1 1318 7 view .LVU483 + 1611 0076 F36B ldr r3, [r6, #60] + 1612 0078 0222 movs r2, #2 + 1613 007a 1343 orrs r3, r2 + 1614 007c F363 str r3, [r6, #60] + 1615 007e E8E7 b .L121 + 1616 .cfi_endproc + 1617 .LFE47: + 1619 .section .text.HAL_ADC_Start_IT,"ax",%progbits + 1620 .align 1 + 1621 .global HAL_ADC_Start_IT + 1622 .syntax unified + 1623 .code 16 + 1624 .thumb_func + 1626 HAL_ADC_Start_IT: + 1627 .LVL111: + 1628 .LFB48: +1342:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** HAL_StatusTypeDef tmp_hal_status = HAL_OK; + 1629 .loc 1 1342 1 view -0 + 1630 .cfi_startproc + 1631 @ args = 0, pretend = 0, frame = 0 + 1632 @ frame_needed = 0, uses_anonymous_args = 0 +1342:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** HAL_StatusTypeDef tmp_hal_status = HAL_OK; + 1633 .loc 1 1342 1 is_stmt 0 view .LVU485 + 1634 0000 10B5 push {r4, lr} + 1635 .cfi_def_cfa_offset 8 + 1636 .cfi_offset 4, -8 + 1637 .cfi_offset 14, -4 + 1638 0002 0400 movs r4, r0 +1343:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** + 1639 .loc 1 1343 3 is_stmt 1 view .LVU486 + 1640 .LVL112: +1346:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** + 1641 .loc 1 1346 3 view .LVU487 +1349:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** { + 1642 .loc 1 1349 3 view .LVU488 +1349:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** { + 1643 .loc 1 1349 7 is_stmt 0 view .LVU489 + 1644 0004 0368 ldr r3, [r0] + 1645 0006 9B68 ldr r3, [r3, #8] +1349:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** { + 1646 .loc 1 1349 6 view .LVU490 + 1647 0008 5B07 lsls r3, r3, #29 + 1648 000a 36D4 bmi .L132 + ARM GAS /tmp/cc2rPMmj.s page 79 + + +1352:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** + 1649 .loc 1 1352 5 is_stmt 1 view .LVU491 +1352:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** + 1650 .loc 1 1352 5 view .LVU492 + 1651 000c 3423 movs r3, #52 + 1652 000e C35C ldrb r3, [r0, r3] + 1653 0010 012B cmp r3, #1 + 1654 0012 34D0 beq .L133 +1352:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** + 1655 .loc 1 1352 5 discriminator 2 view .LVU493 + 1656 0014 3423 movs r3, #52 + 1657 0016 0122 movs r2, #1 + 1658 0018 C254 strb r2, [r0, r3] +1352:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** + 1659 .loc 1 1352 5 discriminator 2 view .LVU494 +1357:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** { + 1660 .loc 1 1357 5 view .LVU495 +1357:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** { + 1661 .loc 1 1357 19 is_stmt 0 view .LVU496 + 1662 001a 437E ldrb r3, [r0, #25] +1357:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** { + 1663 .loc 1 1357 8 view .LVU497 + 1664 001c 012B cmp r3, #1 + 1665 001e 1CD1 bne .L135 +1343:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** + 1666 .loc 1 1343 21 view .LVU498 + 1667 0020 0020 movs r0, #0 + 1668 .LVL113: + 1669 .L129: +1368:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** HAL_ADC_STATE_READY | HAL_ADC_STATE_REG_EOC | HAL_ADC_STATE_REG_OVR | HAL_A + 1670 .loc 1 1368 7 is_stmt 1 view .LVU499 + 1671 0022 A26B ldr r2, [r4, #56] + 1672 0024 174B ldr r3, .L137 + 1673 0026 1A40 ands r2, r3 + 1674 0028 8023 movs r3, #128 + 1675 002a 5B00 lsls r3, r3, #1 + 1676 002c 1343 orrs r3, r2 + 1677 002e A363 str r3, [r4, #56] +1373:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** + 1678 .loc 1 1373 7 view .LVU500 + 1679 0030 0023 movs r3, #0 + 1680 0032 E363 str r3, [r4, #60] +1378:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** + 1681 .loc 1 1378 7 view .LVU501 +1378:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** + 1682 .loc 1 1378 7 view .LVU502 + 1683 0034 3422 movs r2, #52 + 1684 0036 A354 strb r3, [r4, r2] +1378:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** + 1685 .loc 1 1378 7 view .LVU503 +1383:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** + 1686 .loc 1 1383 7 view .LVU504 + 1687 0038 2368 ldr r3, [r4] + 1688 003a 183A subs r2, r2, #24 + 1689 003c 1A60 str r2, [r3] +1387:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** { + 1690 .loc 1 1387 7 view .LVU505 + ARM GAS /tmp/cc2rPMmj.s page 80 + + +1387:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** { + 1691 .loc 1 1387 24 is_stmt 0 view .LVU506 + 1692 003e 6369 ldr r3, [r4, #20] +1387:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** { + 1693 .loc 1 1387 7 view .LVU507 + 1694 0040 082B cmp r3, #8 + 1695 0042 0FD0 beq .L136 +1395:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** break; + 1696 .loc 1 1395 11 is_stmt 1 view .LVU508 + 1697 0044 2268 ldr r2, [r4] + 1698 0046 5368 ldr r3, [r2, #4] + 1699 0048 1C21 movs r1, #28 + 1700 004a 0B43 orrs r3, r1 + 1701 004c 5360 str r3, [r2, #4] +1396:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** } + 1702 .loc 1 1396 11 view .LVU509 + 1703 .L131: +1403:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** } + 1704 .loc 1 1403 7 view .LVU510 +1403:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** } + 1705 .loc 1 1403 11 is_stmt 0 view .LVU511 + 1706 004e 2268 ldr r2, [r4] +1403:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** } + 1707 .loc 1 1403 21 view .LVU512 + 1708 0050 9368 ldr r3, [r2, #8] +1403:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** } + 1709 .loc 1 1403 26 view .LVU513 + 1710 0052 0421 movs r1, #4 + 1711 0054 0B43 orrs r3, r1 + 1712 0056 9360 str r3, [r2, #8] + 1713 .L128: +1413:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** + 1714 .loc 1 1413 1 view .LVU514 + 1715 @ sp needed + 1716 .LVL114: +1413:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** + 1717 .loc 1 1413 1 view .LVU515 + 1718 0058 10BD pop {r4, pc} + 1719 .LVL115: + 1720 .L135: +1359:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** } + 1721 .loc 1 1359 7 is_stmt 1 view .LVU516 +1359:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** } + 1722 .loc 1 1359 24 is_stmt 0 view .LVU517 + 1723 005a FFF7FEFF bl ADC_Enable + 1724 .LVL116: +1363:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** { + 1725 .loc 1 1363 5 is_stmt 1 view .LVU518 +1363:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** { + 1726 .loc 1 1363 8 is_stmt 0 view .LVU519 + 1727 005e 0028 cmp r0, #0 + 1728 0060 FAD1 bne .L128 + 1729 0062 DEE7 b .L129 + 1730 .LVL117: + 1731 .L136: +1390:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** __HAL_ADC_ENABLE_IT(hadc, (ADC_IT_EOS | ADC_IT_OVR)); + 1732 .loc 1 1390 11 is_stmt 1 view .LVU520 + ARM GAS /tmp/cc2rPMmj.s page 81 + + + 1733 0064 2268 ldr r2, [r4] + 1734 0066 5368 ldr r3, [r2, #4] + 1735 0068 0421 movs r1, #4 + 1736 006a 8B43 bics r3, r1 + 1737 006c 5360 str r3, [r2, #4] +1391:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** break; + 1738 .loc 1 1391 11 view .LVU521 + 1739 006e 2268 ldr r2, [r4] + 1740 0070 5368 ldr r3, [r2, #4] + 1741 0072 1431 adds r1, r1, #20 + 1742 0074 0B43 orrs r3, r1 + 1743 0076 5360 str r3, [r2, #4] +1392:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** /* case ADC_EOC_SINGLE_CONV */ + 1744 .loc 1 1392 11 view .LVU522 + 1745 0078 E9E7 b .L131 + 1746 .LVL118: + 1747 .L132: +1408:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** } + 1748 .loc 1 1408 20 is_stmt 0 view .LVU523 + 1749 007a 0220 movs r0, #2 + 1750 .LVL119: +1408:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** } + 1751 .loc 1 1408 20 view .LVU524 + 1752 007c ECE7 b .L128 + 1753 .LVL120: + 1754 .L133: +1352:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** + 1755 .loc 1 1352 5 discriminator 1 view .LVU525 + 1756 007e 0220 movs r0, #2 + 1757 .LVL121: +1352:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** + 1758 .loc 1 1352 5 discriminator 1 view .LVU526 + 1759 0080 EAE7 b .L128 + 1760 .L138: + 1761 0082 C046 .align 2 + 1762 .L137: + 1763 0084 FEF0FFFF .word -3842 + 1764 .cfi_endproc + 1765 .LFE48: + 1767 .section .text.HAL_ADC_Stop_IT,"ax",%progbits + 1768 .align 1 + 1769 .global HAL_ADC_Stop_IT + 1770 .syntax unified + 1771 .code 16 + 1772 .thumb_func + 1774 HAL_ADC_Stop_IT: + 1775 .LVL122: + 1776 .LFB49: +1423:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** HAL_StatusTypeDef tmp_hal_status = HAL_OK; + 1777 .loc 1 1423 1 is_stmt 1 view -0 + 1778 .cfi_startproc + 1779 @ args = 0, pretend = 0, frame = 0 + 1780 @ frame_needed = 0, uses_anonymous_args = 0 +1423:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** HAL_StatusTypeDef tmp_hal_status = HAL_OK; + 1781 .loc 1 1423 1 is_stmt 0 view .LVU528 + 1782 0000 10B5 push {r4, lr} + 1783 .cfi_def_cfa_offset 8 + ARM GAS /tmp/cc2rPMmj.s page 82 + + + 1784 .cfi_offset 4, -8 + 1785 .cfi_offset 14, -4 + 1786 0002 0400 movs r4, r0 +1424:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** + 1787 .loc 1 1424 3 is_stmt 1 view .LVU529 + 1788 .LVL123: +1427:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** + 1789 .loc 1 1427 3 view .LVU530 +1430:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** + 1790 .loc 1 1430 3 view .LVU531 +1430:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** + 1791 .loc 1 1430 3 view .LVU532 + 1792 0004 3423 movs r3, #52 + 1793 0006 C35C ldrb r3, [r0, r3] + 1794 0008 012B cmp r3, #1 + 1795 000a 1CD0 beq .L142 +1430:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** + 1796 .loc 1 1430 3 discriminator 2 view .LVU533 + 1797 000c 3423 movs r3, #52 + 1798 000e 0122 movs r2, #1 + 1799 0010 C254 strb r2, [r0, r3] +1430:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** + 1800 .loc 1 1430 3 discriminator 2 view .LVU534 +1433:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** + 1801 .loc 1 1433 3 view .LVU535 +1433:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** + 1802 .loc 1 1433 20 is_stmt 0 view .LVU536 + 1803 0012 FFF7FEFF bl ADC_ConversionStop + 1804 .LVL124: +1436:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** { + 1805 .loc 1 1436 3 is_stmt 1 view .LVU537 +1436:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** { + 1806 .loc 1 1436 6 is_stmt 0 view .LVU538 + 1807 0016 0028 cmp r0, #0 + 1808 0018 03D0 beq .L143 + 1809 .LVL125: + 1810 .L141: +1456:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** + 1811 .loc 1 1456 3 is_stmt 1 view .LVU539 +1456:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** + 1812 .loc 1 1456 3 view .LVU540 + 1813 001a 3423 movs r3, #52 + 1814 001c 0022 movs r2, #0 + 1815 001e E254 strb r2, [r4, r3] +1456:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** + 1816 .loc 1 1456 3 view .LVU541 +1459:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** } + 1817 .loc 1 1459 3 view .LVU542 + 1818 .LVL126: + 1819 .L140: +1460:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** + 1820 .loc 1 1460 1 is_stmt 0 view .LVU543 + 1821 @ sp needed + 1822 .LVL127: +1460:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** + 1823 .loc 1 1460 1 view .LVU544 + 1824 0020 10BD pop {r4, pc} + ARM GAS /tmp/cc2rPMmj.s page 83 + + + 1825 .LVL128: + 1826 .L143: +1440:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** + 1827 .loc 1 1440 5 is_stmt 1 view .LVU545 + 1828 0022 2268 ldr r2, [r4] + 1829 0024 5368 ldr r3, [r2, #4] + 1830 0026 1C21 movs r1, #28 + 1831 0028 8B43 bics r3, r1 + 1832 002a 5360 str r3, [r2, #4] +1443:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** + 1833 .loc 1 1443 5 view .LVU546 +1443:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** + 1834 .loc 1 1443 22 is_stmt 0 view .LVU547 + 1835 002c 2000 movs r0, r4 + 1836 .LVL129: +1443:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** + 1837 .loc 1 1443 22 view .LVU548 + 1838 002e FFF7FEFF bl ADC_Disable + 1839 .LVL130: +1446:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** { + 1840 .loc 1 1446 5 is_stmt 1 view .LVU549 +1446:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** { + 1841 .loc 1 1446 8 is_stmt 0 view .LVU550 + 1842 0032 0028 cmp r0, #0 + 1843 0034 F1D1 bne .L141 +1449:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** HAL_ADC_STATE_REG_BUSY, + 1844 .loc 1 1449 7 is_stmt 1 view .LVU551 + 1845 0036 A36B ldr r3, [r4, #56] + 1846 0038 044A ldr r2, .L144 + 1847 003a 1340 ands r3, r2 + 1848 003c 0432 adds r2, r2, #4 + 1849 003e FF32 adds r2, r2, #255 + 1850 0040 1343 orrs r3, r2 + 1851 0042 A363 str r3, [r4, #56] + 1852 0044 E9E7 b .L141 + 1853 .LVL131: + 1854 .L142: +1430:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** + 1855 .loc 1 1430 3 is_stmt 0 discriminator 1 view .LVU552 + 1856 0046 0220 movs r0, #2 + 1857 .LVL132: +1430:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** + 1858 .loc 1 1430 3 discriminator 1 view .LVU553 + 1859 0048 EAE7 b .L140 + 1860 .L145: + 1861 004a C046 .align 2 + 1862 .L144: + 1863 004c FEFEFFFF .word -258 + 1864 .cfi_endproc + 1865 .LFE49: + 1867 .section .text.HAL_ADC_Start_DMA,"ax",%progbits + 1868 .align 1 + 1869 .global HAL_ADC_Start_DMA + 1870 .syntax unified + 1871 .code 16 + 1872 .thumb_func + 1874 HAL_ADC_Start_DMA: + ARM GAS /tmp/cc2rPMmj.s page 84 + + + 1875 .LVL133: + 1876 .LFB50: +1476:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** HAL_StatusTypeDef tmp_hal_status = HAL_OK; + 1877 .loc 1 1476 1 is_stmt 1 view -0 + 1878 .cfi_startproc + 1879 @ args = 0, pretend = 0, frame = 0 + 1880 @ frame_needed = 0, uses_anonymous_args = 0 +1476:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** HAL_StatusTypeDef tmp_hal_status = HAL_OK; + 1881 .loc 1 1476 1 is_stmt 0 view .LVU555 + 1882 0000 F8B5 push {r3, r4, r5, r6, r7, lr} + 1883 .cfi_def_cfa_offset 24 + 1884 .cfi_offset 3, -24 + 1885 .cfi_offset 4, -20 + 1886 .cfi_offset 5, -16 + 1887 .cfi_offset 6, -12 + 1888 .cfi_offset 7, -8 + 1889 .cfi_offset 14, -4 + 1890 0002 0400 movs r4, r0 + 1891 0004 0D00 movs r5, r1 + 1892 0006 1600 movs r6, r2 +1477:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** + 1893 .loc 1 1477 3 is_stmt 1 view .LVU556 + 1894 .LVL134: +1480:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** + 1895 .loc 1 1480 3 view .LVU557 +1483:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** { + 1896 .loc 1 1483 3 view .LVU558 +1483:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** { + 1897 .loc 1 1483 7 is_stmt 0 view .LVU559 + 1898 0008 0368 ldr r3, [r0] + 1899 000a 9B68 ldr r3, [r3, #8] +1483:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** { + 1900 .loc 1 1483 6 view .LVU560 + 1901 000c 5B07 lsls r3, r3, #29 + 1902 000e 3ED4 bmi .L149 +1486:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** + 1903 .loc 1 1486 5 is_stmt 1 view .LVU561 +1486:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** + 1904 .loc 1 1486 5 view .LVU562 + 1905 0010 3423 movs r3, #52 + 1906 0012 C35C ldrb r3, [r0, r3] + 1907 0014 012B cmp r3, #1 + 1908 0016 3CD0 beq .L150 +1486:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** + 1909 .loc 1 1486 5 discriminator 2 view .LVU563 + 1910 0018 3423 movs r3, #52 + 1911 001a 0122 movs r2, #1 + 1912 .LVL135: +1486:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** + 1913 .loc 1 1486 5 is_stmt 0 discriminator 2 view .LVU564 + 1914 001c C254 strb r2, [r0, r3] +1486:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** + 1915 .loc 1 1486 5 is_stmt 1 discriminator 2 view .LVU565 +1491:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** { + 1916 .loc 1 1491 5 view .LVU566 +1491:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** { + 1917 .loc 1 1491 19 is_stmt 0 view .LVU567 + ARM GAS /tmp/cc2rPMmj.s page 85 + + + 1918 001e 437E ldrb r3, [r0, #25] +1491:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** { + 1919 .loc 1 1491 8 view .LVU568 + 1920 0020 012B cmp r3, #1 + 1921 0022 04D0 beq .L151 +1493:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** } + 1922 .loc 1 1493 7 is_stmt 1 view .LVU569 +1493:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** } + 1923 .loc 1 1493 24 is_stmt 0 view .LVU570 + 1924 0024 FFF7FEFF bl ADC_Enable + 1925 .LVL136: +1493:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** } + 1926 .loc 1 1493 24 view .LVU571 + 1927 0028 071E subs r7, r0, #0 + 1928 .LVL137: +1497:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** { + 1929 .loc 1 1497 5 is_stmt 1 view .LVU572 +1497:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** { + 1930 .loc 1 1497 8 is_stmt 0 view .LVU573 + 1931 002a 2ED1 bne .L147 + 1932 002c 00E0 b .L148 + 1933 .LVL138: + 1934 .L151: +1477:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** + 1935 .loc 1 1477 21 view .LVU574 + 1936 002e 0027 movs r7, #0 + 1937 .LVL139: + 1938 .L148: +1502:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** HAL_ADC_STATE_READY | HAL_ADC_STATE_REG_EOC | HAL_ADC_STATE_REG_OVR | HAL_A + 1939 .loc 1 1502 7 is_stmt 1 view .LVU575 + 1940 0030 A26B ldr r2, [r4, #56] + 1941 0032 194B ldr r3, .L152 + 1942 0034 1A40 ands r2, r3 + 1943 0036 8023 movs r3, #128 + 1944 0038 5B00 lsls r3, r3, #1 + 1945 003a 1343 orrs r3, r2 + 1946 003c A363 str r3, [r4, #56] +1507:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** + 1947 .loc 1 1507 7 view .LVU576 + 1948 003e 0023 movs r3, #0 + 1949 0040 E363 str r3, [r4, #60] +1512:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** + 1950 .loc 1 1512 7 view .LVU577 +1512:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** + 1951 .loc 1 1512 7 view .LVU578 + 1952 0042 3422 movs r2, #52 + 1953 0044 A354 strb r3, [r4, r2] +1512:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** + 1954 .loc 1 1512 7 view .LVU579 +1515:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** + 1955 .loc 1 1515 7 view .LVU580 +1515:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** + 1956 .loc 1 1515 11 is_stmt 0 view .LVU581 + 1957 0046 236B ldr r3, [r4, #48] +1515:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** + 1958 .loc 1 1515 42 view .LVU582 + 1959 0048 144A ldr r2, .L152+4 + ARM GAS /tmp/cc2rPMmj.s page 86 + + + 1960 004a 9A62 str r2, [r3, #40] +1518:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** + 1961 .loc 1 1518 7 is_stmt 1 view .LVU583 +1518:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** + 1962 .loc 1 1518 11 is_stmt 0 view .LVU584 + 1963 004c 236B ldr r3, [r4, #48] +1518:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** + 1964 .loc 1 1518 46 view .LVU585 + 1965 004e 144A ldr r2, .L152+8 + 1966 0050 DA62 str r2, [r3, #44] +1521:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** + 1967 .loc 1 1521 7 is_stmt 1 view .LVU586 +1521:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** + 1968 .loc 1 1521 11 is_stmt 0 view .LVU587 + 1969 0052 236B ldr r3, [r4, #48] +1521:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** + 1970 .loc 1 1521 43 view .LVU588 + 1971 0054 134A ldr r2, .L152+12 + 1972 0056 1A63 str r2, [r3, #48] +1530:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** + 1973 .loc 1 1530 7 is_stmt 1 view .LVU589 + 1974 0058 2368 ldr r3, [r4] + 1975 005a 1C22 movs r2, #28 + 1976 005c 1A60 str r2, [r3] +1533:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** + 1977 .loc 1 1533 7 view .LVU590 + 1978 005e 2268 ldr r2, [r4] + 1979 0060 5368 ldr r3, [r2, #4] + 1980 0062 1021 movs r1, #16 + 1981 0064 0B43 orrs r3, r1 + 1982 0066 5360 str r3, [r2, #4] +1536:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** + 1983 .loc 1 1536 7 view .LVU591 +1536:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** + 1984 .loc 1 1536 11 is_stmt 0 view .LVU592 + 1985 0068 2268 ldr r2, [r4] +1536:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** + 1986 .loc 1 1536 21 view .LVU593 + 1987 006a D368 ldr r3, [r2, #12] +1536:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** + 1988 .loc 1 1536 29 view .LVU594 + 1989 006c 0F39 subs r1, r1, #15 + 1990 006e 0B43 orrs r3, r1 + 1991 0070 D360 str r3, [r2, #12] +1539:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** + 1992 .loc 1 1539 7 is_stmt 1 view .LVU595 +1539:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** + 1993 .loc 1 1539 57 is_stmt 0 view .LVU596 + 1994 0072 2168 ldr r1, [r4] +1539:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** + 1995 .loc 1 1539 52 view .LVU597 + 1996 0074 4031 adds r1, r1, #64 +1539:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** + 1997 .loc 1 1539 7 view .LVU598 + 1998 0076 206B ldr r0, [r4, #48] + 1999 0078 3300 movs r3, r6 + 2000 007a 2A00 movs r2, r5 + ARM GAS /tmp/cc2rPMmj.s page 87 + + + 2001 007c FFF7FEFF bl HAL_DMA_Start_IT + 2002 .LVL140: +1545:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** } + 2003 .loc 1 1545 7 is_stmt 1 view .LVU599 +1545:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** } + 2004 .loc 1 1545 11 is_stmt 0 view .LVU600 + 2005 0080 2268 ldr r2, [r4] +1545:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** } + 2006 .loc 1 1545 21 view .LVU601 + 2007 0082 9368 ldr r3, [r2, #8] +1545:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** } + 2008 .loc 1 1545 26 view .LVU602 + 2009 0084 0421 movs r1, #4 + 2010 0086 0B43 orrs r3, r1 + 2011 0088 9360 str r3, [r2, #8] + 2012 .L147: +1555:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** + 2013 .loc 1 1555 1 view .LVU603 + 2014 008a 3800 movs r0, r7 + 2015 @ sp needed + 2016 .LVL141: + 2017 .LVL142: + 2018 .LVL143: +1555:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** + 2019 .loc 1 1555 1 view .LVU604 + 2020 008c F8BD pop {r3, r4, r5, r6, r7, pc} + 2021 .LVL144: + 2022 .L149: +1550:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** } + 2023 .loc 1 1550 20 view .LVU605 + 2024 008e 0227 movs r7, #2 + 2025 0090 FBE7 b .L147 + 2026 .L150: +1486:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** + 2027 .loc 1 1486 5 discriminator 1 view .LVU606 + 2028 0092 0227 movs r7, #2 + 2029 0094 F9E7 b .L147 + 2030 .L153: + 2031 0096 C046 .align 2 + 2032 .L152: + 2033 0098 FEF0FFFF .word -3842 + 2034 009c 00000000 .word ADC_DMAConvCplt + 2035 00a0 00000000 .word ADC_DMAHalfConvCplt + 2036 00a4 00000000 .word ADC_DMAError + 2037 .cfi_endproc + 2038 .LFE50: + 2040 .section .text.HAL_ADC_Stop_DMA,"ax",%progbits + 2041 .align 1 + 2042 .global HAL_ADC_Stop_DMA + 2043 .syntax unified + 2044 .code 16 + 2045 .thumb_func + 2047 HAL_ADC_Stop_DMA: + 2048 .LVL145: + 2049 .LFB51: +1565:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** HAL_StatusTypeDef tmp_hal_status = HAL_OK; + 2050 .loc 1 1565 1 is_stmt 1 view -0 + ARM GAS /tmp/cc2rPMmj.s page 88 + + + 2051 .cfi_startproc + 2052 @ args = 0, pretend = 0, frame = 0 + 2053 @ frame_needed = 0, uses_anonymous_args = 0 +1565:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** HAL_StatusTypeDef tmp_hal_status = HAL_OK; + 2054 .loc 1 1565 1 is_stmt 0 view .LVU608 + 2055 0000 70B5 push {r4, r5, r6, lr} + 2056 .cfi_def_cfa_offset 16 + 2057 .cfi_offset 4, -16 + 2058 .cfi_offset 5, -12 + 2059 .cfi_offset 6, -8 + 2060 .cfi_offset 14, -4 + 2061 0002 0400 movs r4, r0 +1566:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** + 2062 .loc 1 1566 3 is_stmt 1 view .LVU609 + 2063 .LVL146: +1569:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** + 2064 .loc 1 1569 3 view .LVU610 +1572:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** + 2065 .loc 1 1572 3 view .LVU611 +1572:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** + 2066 .loc 1 1572 3 view .LVU612 + 2067 0004 3423 movs r3, #52 + 2068 0006 C35C ldrb r3, [r0, r3] + 2069 0008 012B cmp r3, #1 + 2070 000a 36D0 beq .L160 +1572:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** + 2071 .loc 1 1572 3 discriminator 2 view .LVU613 + 2072 000c 3423 movs r3, #52 + 2073 000e 0122 movs r2, #1 + 2074 0010 C254 strb r2, [r0, r3] +1572:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** + 2075 .loc 1 1572 3 discriminator 2 view .LVU614 +1575:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** + 2076 .loc 1 1575 3 view .LVU615 +1575:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** + 2077 .loc 1 1575 20 is_stmt 0 view .LVU616 + 2078 0012 FFF7FEFF bl ADC_ConversionStop + 2079 .LVL147: +1575:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** + 2080 .loc 1 1575 20 view .LVU617 + 2081 0016 051E subs r5, r0, #0 + 2082 .LVL148: +1578:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** { + 2083 .loc 1 1578 3 is_stmt 1 view .LVU618 +1578:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** { + 2084 .loc 1 1578 6 is_stmt 0 view .LVU619 + 2085 0018 1DD1 bne .L156 +1581:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** + 2086 .loc 1 1581 5 is_stmt 1 view .LVU620 +1581:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** + 2087 .loc 1 1581 9 is_stmt 0 view .LVU621 + 2088 001a 2268 ldr r2, [r4] +1581:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** + 2089 .loc 1 1581 19 view .LVU622 + 2090 001c D368 ldr r3, [r2, #12] +1581:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** + 2091 .loc 1 1581 27 view .LVU623 + ARM GAS /tmp/cc2rPMmj.s page 89 + + + 2092 001e 0121 movs r1, #1 + 2093 0020 8B43 bics r3, r1 + 2094 0022 D360 str r3, [r2, #12] +1585:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** { + 2095 .loc 1 1585 5 is_stmt 1 view .LVU624 +1585:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** { + 2096 .loc 1 1585 13 is_stmt 0 view .LVU625 + 2097 0024 206B ldr r0, [r4, #48] + 2098 .LVL149: +1585:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** { + 2099 .loc 1 1585 25 view .LVU626 + 2100 0026 2123 movs r3, #33 + 2101 0028 C35C ldrb r3, [r0, r3] +1585:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** { + 2102 .loc 1 1585 8 view .LVU627 + 2103 002a 022B cmp r3, #2 + 2104 002c 18D0 beq .L161 + 2105 .LVL150: + 2106 .L157: +1598:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** + 2107 .loc 1 1598 5 is_stmt 1 view .LVU628 + 2108 002e 2268 ldr r2, [r4] + 2109 0030 5368 ldr r3, [r2, #4] + 2110 0032 1021 movs r1, #16 + 2111 0034 8B43 bics r3, r1 + 2112 0036 5360 str r3, [r2, #4] +1603:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** { + 2113 .loc 1 1603 5 view .LVU629 +1603:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** { + 2114 .loc 1 1603 8 is_stmt 0 view .LVU630 + 2115 0038 002D cmp r5, #0 + 2116 003a 1AD1 bne .L158 +1605:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** } + 2117 .loc 1 1605 7 is_stmt 1 view .LVU631 +1605:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** } + 2118 .loc 1 1605 24 is_stmt 0 view .LVU632 + 2119 003c 2000 movs r0, r4 + 2120 003e FFF7FEFF bl ADC_Disable + 2121 .LVL151: + 2122 0042 0500 movs r5, r0 + 2123 .LVL152: + 2124 .L159: +1613:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** { + 2125 .loc 1 1613 5 is_stmt 1 view .LVU633 +1613:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** { + 2126 .loc 1 1613 8 is_stmt 0 view .LVU634 + 2127 0044 002D cmp r5, #0 + 2128 0046 06D1 bne .L156 +1616:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** HAL_ADC_STATE_REG_BUSY, + 2129 .loc 1 1616 7 is_stmt 1 view .LVU635 + 2130 0048 A36B ldr r3, [r4, #56] + 2131 004a 0D4A ldr r2, .L162 + 2132 004c 1340 ands r3, r2 + 2133 004e 0432 adds r2, r2, #4 + 2134 0050 FF32 adds r2, r2, #255 + 2135 0052 1343 orrs r3, r2 + 2136 0054 A363 str r3, [r4, #56] + ARM GAS /tmp/cc2rPMmj.s page 90 + + + 2137 .LVL153: + 2138 .L156: +1624:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** + 2139 .loc 1 1624 3 view .LVU636 +1624:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** + 2140 .loc 1 1624 3 view .LVU637 + 2141 0056 3423 movs r3, #52 + 2142 0058 0022 movs r2, #0 + 2143 005a E254 strb r2, [r4, r3] +1624:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** + 2144 .loc 1 1624 3 view .LVU638 +1627:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** } + 2145 .loc 1 1627 3 view .LVU639 + 2146 .LVL154: + 2147 .L155: +1628:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** + 2148 .loc 1 1628 1 is_stmt 0 view .LVU640 + 2149 005c 2800 movs r0, r5 + 2150 @ sp needed + 2151 .LVL155: +1628:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** + 2152 .loc 1 1628 1 view .LVU641 + 2153 005e 70BD pop {r4, r5, r6, pc} + 2154 .LVL156: + 2155 .L161: +1587:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** + 2156 .loc 1 1587 7 is_stmt 1 view .LVU642 +1587:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** + 2157 .loc 1 1587 24 is_stmt 0 view .LVU643 + 2158 0060 FFF7FEFF bl HAL_DMA_Abort + 2159 .LVL157: + 2160 0064 051E subs r5, r0, #0 + 2161 .LVL158: +1590:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** { + 2162 .loc 1 1590 7 is_stmt 1 view .LVU644 +1590:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** { + 2163 .loc 1 1590 10 is_stmt 0 view .LVU645 + 2164 0066 E2D0 beq .L157 +1593:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** } + 2165 .loc 1 1593 9 is_stmt 1 view .LVU646 + 2166 0068 A36B ldr r3, [r4, #56] + 2167 006a 4022 movs r2, #64 + 2168 006c 1343 orrs r3, r2 + 2169 006e A363 str r3, [r4, #56] + 2170 0070 DDE7 b .L157 + 2171 .LVL159: + 2172 .L158: +1609:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** } + 2173 .loc 1 1609 7 view .LVU647 + 2174 0072 2000 movs r0, r4 + 2175 0074 FFF7FEFF bl ADC_Disable + 2176 .LVL160: + 2177 0078 E4E7 b .L159 + 2178 .LVL161: + 2179 .L160: +1572:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** + 2180 .loc 1 1572 3 is_stmt 0 discriminator 1 view .LVU648 + ARM GAS /tmp/cc2rPMmj.s page 91 + + + 2181 007a 0225 movs r5, #2 + 2182 007c EEE7 b .L155 + 2183 .L163: + 2184 007e C046 .align 2 + 2185 .L162: + 2186 0080 FEFEFFFF .word -258 + 2187 .cfi_endproc + 2188 .LFE51: + 2190 .section .text.HAL_ADC_GetValue,"ax",%progbits + 2191 .align 1 + 2192 .global HAL_ADC_GetValue + 2193 .syntax unified + 2194 .code 16 + 2195 .thumb_func + 2197 HAL_ADC_GetValue: + 2198 .LVL162: + 2199 .LFB52: +1650:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** /* Check the parameters */ + 2200 .loc 1 1650 1 is_stmt 1 view -0 + 2201 .cfi_startproc + 2202 @ args = 0, pretend = 0, frame = 0 + 2203 @ frame_needed = 0, uses_anonymous_args = 0 + 2204 @ link register save eliminated. +1652:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** + 2205 .loc 1 1652 3 view .LVU650 +1658:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** } + 2206 .loc 1 1658 3 view .LVU651 +1658:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** } + 2207 .loc 1 1658 14 is_stmt 0 view .LVU652 + 2208 0000 0368 ldr r3, [r0] +1658:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** } + 2209 .loc 1 1658 24 view .LVU653 + 2210 0002 186C ldr r0, [r3, #64] + 2211 .LVL163: +1659:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** + 2212 .loc 1 1659 1 view .LVU654 + 2213 @ sp needed + 2214 0004 7047 bx lr + 2215 .cfi_endproc + 2216 .LFE52: + 2218 .section .text.HAL_ADC_ConvCpltCallback,"ax",%progbits + 2219 .align 1 + 2220 .weak HAL_ADC_ConvCpltCallback + 2221 .syntax unified + 2222 .code 16 + 2223 .thumb_func + 2225 HAL_ADC_ConvCpltCallback: + 2226 .LVL164: + 2227 .LFB54: +1795:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** /* Prevent unused argument(s) compilation warning */ + 2228 .loc 1 1795 1 is_stmt 1 view -0 + 2229 .cfi_startproc + 2230 @ args = 0, pretend = 0, frame = 0 + 2231 @ frame_needed = 0, uses_anonymous_args = 0 + 2232 @ link register save eliminated. +1797:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** + 2233 .loc 1 1797 3 view .LVU656 + ARM GAS /tmp/cc2rPMmj.s page 92 + + +1802:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** + 2234 .loc 1 1802 1 is_stmt 0 view .LVU657 + 2235 @ sp needed + 2236 0000 7047 bx lr + 2237 .cfi_endproc + 2238 .LFE54: + 2240 .section .text.ADC_DMAConvCplt,"ax",%progbits + 2241 .align 1 + 2242 .syntax unified + 2243 .code 16 + 2244 .thumb_func + 2246 ADC_DMAConvCplt: + 2247 .LVL165: + 2248 .LFB65: +2369:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** +2370:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** +2371:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** /** +2372:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** * @brief DMA transfer complete callback. +2373:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** * @param hdma pointer to DMA handle. +2374:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** * @retval None +2375:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** */ +2376:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** static void ADC_DMAConvCplt(DMA_HandleTypeDef *hdma) +2377:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** { + 2249 .loc 1 2377 1 is_stmt 1 view -0 + 2250 .cfi_startproc + 2251 @ args = 0, pretend = 0, frame = 0 + 2252 @ frame_needed = 0, uses_anonymous_args = 0 + 2253 .loc 1 2377 1 is_stmt 0 view .LVU659 + 2254 0000 10B5 push {r4, lr} + 2255 .cfi_def_cfa_offset 8 + 2256 .cfi_offset 4, -8 + 2257 .cfi_offset 14, -4 +2378:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** /* Retrieve ADC handle corresponding to current DMA handle */ +2379:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** ADC_HandleTypeDef* hadc = ( ADC_HandleTypeDef* )((DMA_HandleTypeDef* )hdma)->Parent; + 2258 .loc 1 2379 3 is_stmt 1 view .LVU660 + 2259 .loc 1 2379 22 is_stmt 0 view .LVU661 + 2260 0002 436A ldr r3, [r0, #36] + 2261 .LVL166: +2380:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** +2381:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** /* Update state machine on conversion status if not in error state */ +2382:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** if (HAL_IS_BIT_CLR(hadc->State, HAL_ADC_STATE_ERROR_INTERNAL | HAL_ADC_STATE_ERROR_DMA)) + 2262 .loc 1 2382 3 is_stmt 1 view .LVU662 + 2263 .loc 1 2382 7 is_stmt 0 view .LVU663 + 2264 0004 9A6B ldr r2, [r3, #56] + 2265 0006 5021 movs r1, #80 + 2266 .loc 1 2382 6 view .LVU664 + 2267 0008 1142 tst r1, r2 + 2268 000a 2BD1 bne .L167 +2383:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** { +2384:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** /* Set ADC state */ +2385:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** SET_BIT(hadc->State, HAL_ADC_STATE_REG_EOC); + 2269 .loc 1 2385 5 is_stmt 1 view .LVU665 + 2270 000c 996B ldr r1, [r3, #56] + 2271 000e 8022 movs r2, #128 + 2272 0010 9200 lsls r2, r2, #2 + 2273 0012 0A43 orrs r2, r1 + 2274 0014 9A63 str r2, [r3, #56] + ARM GAS /tmp/cc2rPMmj.s page 93 + + +2386:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** +2387:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** /* Determine whether any further conversion upcoming on group regular */ +2388:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** /* by external trigger, continuous mode or scan sequence on going. */ +2389:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** if(ADC_IS_SOFTWARE_START_REGULAR(hadc) && + 2275 .loc 1 2389 5 view .LVU666 + 2276 .loc 1 2389 8 is_stmt 0 view .LVU667 + 2277 0016 1A68 ldr r2, [r3] + 2278 0018 D068 ldr r0, [r2, #12] + 2279 .LVL167: + 2280 .loc 1 2389 8 view .LVU668 + 2281 001a C021 movs r1, #192 + 2282 001c 0901 lsls r1, r1, #4 + 2283 .loc 1 2389 7 view .LVU669 + 2284 001e 0842 tst r0, r1 + 2285 0020 13D1 bne .L168 +2390:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** (hadc->Init.ContinuousConvMode == DISABLE) ) + 2286 .loc 1 2390 19 view .LVU670 + 2287 0022 997E ldrb r1, [r3, #26] +2389:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** (hadc->Init.ContinuousConvMode == DISABLE) ) + 2288 .loc 1 2389 51 discriminator 1 view .LVU671 + 2289 0024 0029 cmp r1, #0 + 2290 0026 10D1 bne .L168 +2391:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** { +2392:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** /* If End of Sequence is reached, disable interrupts */ +2393:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** if( __HAL_ADC_GET_FLAG(hadc, ADC_FLAG_EOS) ) + 2291 .loc 1 2393 7 is_stmt 1 view .LVU672 + 2292 .loc 1 2393 11 is_stmt 0 view .LVU673 + 2293 0028 1168 ldr r1, [r2] + 2294 .loc 1 2393 9 view .LVU674 + 2295 002a 0907 lsls r1, r1, #28 + 2296 002c 0DD5 bpl .L168 +2394:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** { +2395:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** /* Allowed to modify bits ADC_IT_EOC/ADC_IT_EOS only if bit */ +2396:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** /* ADSTART==0 (no conversion on going) */ +2397:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** if (ADC_IS_CONVERSION_ONGOING_REGULAR(hadc) == RESET) + 2297 .loc 1 2397 9 is_stmt 1 view .LVU675 + 2298 .loc 1 2397 13 is_stmt 0 view .LVU676 + 2299 002e 9168 ldr r1, [r2, #8] + 2300 .loc 1 2397 12 view .LVU677 + 2301 0030 4907 lsls r1, r1, #29 + 2302 0032 0ED4 bmi .L169 +2398:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** { +2399:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** /* Disable ADC end of single conversion interrupt on group regular */ +2400:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** /* Note: Overrun interrupt was enabled with EOC interrupt in */ +2401:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** /* HAL_Start_IT(), but is not disabled here because can be used */ +2402:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** /* by overrun IRQ process below. */ +2403:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** __HAL_ADC_DISABLE_IT(hadc, ADC_IT_EOC | ADC_IT_EOS); + 2303 .loc 1 2403 11 is_stmt 1 view .LVU678 + 2304 0034 5168 ldr r1, [r2, #4] + 2305 0036 0C20 movs r0, #12 + 2306 0038 8143 bics r1, r0 + 2307 003a 5160 str r1, [r2, #4] +2404:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** +2405:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** /* Set ADC state */ +2406:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** ADC_STATE_CLR_SET(hadc->State, + 2308 .loc 1 2406 11 view .LVU679 + 2309 003c 9A6B ldr r2, [r3, #56] + ARM GAS /tmp/cc2rPMmj.s page 94 + + + 2310 003e 0B49 ldr r1, .L172 + 2311 0040 0A40 ands r2, r1 + 2312 0042 0431 adds r1, r1, #4 + 2313 0044 FF31 adds r1, r1, #255 + 2314 0046 0A43 orrs r2, r1 + 2315 0048 9A63 str r2, [r3, #56] + 2316 .L168: +2407:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** HAL_ADC_STATE_REG_BUSY, +2408:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** HAL_ADC_STATE_READY); +2409:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** } +2410:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** else +2411:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** { +2412:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** /* Change ADC state to error state */ +2413:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** SET_BIT(hadc->State, HAL_ADC_STATE_ERROR_CONFIG); +2414:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** +2415:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** /* Set ADC error code to ADC IP internal error */ +2416:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** SET_BIT(hadc->ErrorCode, HAL_ADC_ERROR_INTERNAL); +2417:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** } +2418:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** } +2419:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** } +2420:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** +2421:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** /* Conversion complete callback */ +2422:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** #if (USE_HAL_ADC_REGISTER_CALLBACKS == 1) +2423:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** hadc->ConvCpltCallback(hadc); +2424:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** #else +2425:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** HAL_ADC_ConvCpltCallback(hadc); + 2317 .loc 1 2425 5 view .LVU680 + 2318 004a 1800 movs r0, r3 + 2319 004c FFF7FEFF bl HAL_ADC_ConvCpltCallback + 2320 .LVL168: + 2321 .L166: +2426:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** #endif /* USE_HAL_ADC_REGISTER_CALLBACKS */ +2427:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** } +2428:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** else +2429:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** { +2430:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** /* Call DMA error callback */ +2431:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** hadc->DMA_Handle->XferErrorCallback(hdma); +2432:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** } +2433:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** +2434:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** } + 2322 .loc 1 2434 1 is_stmt 0 view .LVU681 + 2323 @ sp needed + 2324 0050 10BD pop {r4, pc} + 2325 .LVL169: + 2326 .L169: +2413:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** + 2327 .loc 1 2413 11 is_stmt 1 view .LVU682 + 2328 0052 9A6B ldr r2, [r3, #56] + 2329 0054 2021 movs r1, #32 + 2330 0056 0A43 orrs r2, r1 + 2331 0058 9A63 str r2, [r3, #56] +2416:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** } + 2332 .loc 1 2416 11 view .LVU683 + 2333 005a DA6B ldr r2, [r3, #60] + 2334 005c 1F39 subs r1, r1, #31 + 2335 005e 0A43 orrs r2, r1 + 2336 0060 DA63 str r2, [r3, #60] + ARM GAS /tmp/cc2rPMmj.s page 95 + + + 2337 0062 F2E7 b .L168 + 2338 .LVL170: + 2339 .L167: +2431:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** } + 2340 .loc 1 2431 5 view .LVU684 +2431:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** } + 2341 .loc 1 2431 9 is_stmt 0 view .LVU685 + 2342 0064 1B6B ldr r3, [r3, #48] + 2343 .LVL171: +2431:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** } + 2344 .loc 1 2431 21 view .LVU686 + 2345 0066 1B6B ldr r3, [r3, #48] +2431:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** } + 2346 .loc 1 2431 5 view .LVU687 + 2347 0068 9847 blx r3 + 2348 .LVL172: + 2349 .loc 1 2434 1 view .LVU688 + 2350 006a F1E7 b .L166 + 2351 .L173: + 2352 .align 2 + 2353 .L172: + 2354 006c FEFEFFFF .word -258 + 2355 .cfi_endproc + 2356 .LFE65: + 2358 .section .text.HAL_ADC_ConvHalfCpltCallback,"ax",%progbits + 2359 .align 1 + 2360 .weak HAL_ADC_ConvHalfCpltCallback + 2361 .syntax unified + 2362 .code 16 + 2363 .thumb_func + 2365 HAL_ADC_ConvHalfCpltCallback: + 2366 .LVL173: + 2367 .LFB55: +1810:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** /* Prevent unused argument(s) compilation warning */ + 2368 .loc 1 1810 1 is_stmt 1 view -0 + 2369 .cfi_startproc + 2370 @ args = 0, pretend = 0, frame = 0 + 2371 @ frame_needed = 0, uses_anonymous_args = 0 + 2372 @ link register save eliminated. +1812:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** + 2373 .loc 1 1812 3 view .LVU690 +1817:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** + 2374 .loc 1 1817 1 is_stmt 0 view .LVU691 + 2375 @ sp needed + 2376 0000 7047 bx lr + 2377 .cfi_endproc + 2378 .LFE55: + 2380 .section .text.ADC_DMAHalfConvCplt,"ax",%progbits + 2381 .align 1 + 2382 .syntax unified + 2383 .code 16 + 2384 .thumb_func + 2386 ADC_DMAHalfConvCplt: + 2387 .LVL174: + 2388 .LFB66: +2435:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** +2436:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** /** + ARM GAS /tmp/cc2rPMmj.s page 96 + + +2437:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** * @brief DMA half transfer complete callback. +2438:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** * @param hdma pointer to DMA handle. +2439:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** * @retval None +2440:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** */ +2441:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** static void ADC_DMAHalfConvCplt(DMA_HandleTypeDef *hdma) +2442:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** { + 2389 .loc 1 2442 1 is_stmt 1 view -0 + 2390 .cfi_startproc + 2391 @ args = 0, pretend = 0, frame = 0 + 2392 @ frame_needed = 0, uses_anonymous_args = 0 + 2393 .loc 1 2442 1 is_stmt 0 view .LVU693 + 2394 0000 10B5 push {r4, lr} + 2395 .cfi_def_cfa_offset 8 + 2396 .cfi_offset 4, -8 + 2397 .cfi_offset 14, -4 +2443:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** /* Retrieve ADC handle corresponding to current DMA handle */ +2444:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** ADC_HandleTypeDef* hadc = ( ADC_HandleTypeDef* )((DMA_HandleTypeDef* )hdma)->Parent; + 2398 .loc 1 2444 3 is_stmt 1 view .LVU694 + 2399 .loc 1 2444 22 is_stmt 0 view .LVU695 + 2400 0002 406A ldr r0, [r0, #36] + 2401 .LVL175: +2445:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** +2446:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** /* Half conversion callback */ +2447:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** #if (USE_HAL_ADC_REGISTER_CALLBACKS == 1) +2448:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** hadc->ConvHalfCpltCallback(hadc); +2449:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** #else +2450:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** HAL_ADC_ConvHalfCpltCallback(hadc); + 2402 .loc 1 2450 3 is_stmt 1 view .LVU696 + 2403 0004 FFF7FEFF bl HAL_ADC_ConvHalfCpltCallback + 2404 .LVL176: +2451:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** #endif /* USE_HAL_ADC_REGISTER_CALLBACKS */ +2452:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** } + 2405 .loc 1 2452 1 is_stmt 0 view .LVU697 + 2406 @ sp needed + 2407 0008 10BD pop {r4, pc} + 2408 .cfi_endproc + 2409 .LFE66: + 2411 .section .text.HAL_ADC_LevelOutOfWindowCallback,"ax",%progbits + 2412 .align 1 + 2413 .weak HAL_ADC_LevelOutOfWindowCallback + 2414 .syntax unified + 2415 .code 16 + 2416 .thumb_func + 2418 HAL_ADC_LevelOutOfWindowCallback: + 2419 .LVL177: + 2420 .LFB56: +1825:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** /* Prevent unused argument(s) compilation warning */ + 2421 .loc 1 1825 1 is_stmt 1 view -0 + 2422 .cfi_startproc + 2423 @ args = 0, pretend = 0, frame = 0 + 2424 @ frame_needed = 0, uses_anonymous_args = 0 + 2425 @ link register save eliminated. +1827:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** + 2426 .loc 1 1827 3 view .LVU699 +1832:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** + 2427 .loc 1 1832 1 is_stmt 0 view .LVU700 + 2428 @ sp needed + ARM GAS /tmp/cc2rPMmj.s page 97 + + + 2429 0000 7047 bx lr + 2430 .cfi_endproc + 2431 .LFE56: + 2433 .section .text.HAL_ADC_ErrorCallback,"ax",%progbits + 2434 .align 1 + 2435 .weak HAL_ADC_ErrorCallback + 2436 .syntax unified + 2437 .code 16 + 2438 .thumb_func + 2440 HAL_ADC_ErrorCallback: + 2441 .LVL178: + 2442 .LFB57: +1841:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** /* Prevent unused argument(s) compilation warning */ + 2443 .loc 1 1841 1 is_stmt 1 view -0 + 2444 .cfi_startproc + 2445 @ args = 0, pretend = 0, frame = 0 + 2446 @ frame_needed = 0, uses_anonymous_args = 0 + 2447 @ link register save eliminated. +1843:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** + 2448 .loc 1 1843 3 view .LVU702 +1848:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** + 2449 .loc 1 1848 1 is_stmt 0 view .LVU703 + 2450 @ sp needed + 2451 0000 7047 bx lr + 2452 .cfi_endproc + 2453 .LFE57: + 2455 .section .text.ADC_DMAError,"ax",%progbits + 2456 .align 1 + 2457 .syntax unified + 2458 .code 16 + 2459 .thumb_func + 2461 ADC_DMAError: + 2462 .LVL179: + 2463 .LFB67: +2453:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** +2454:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** /** +2455:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** * @brief DMA error callback +2456:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** * @param hdma pointer to DMA handle. +2457:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** * @retval None +2458:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** */ +2459:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** static void ADC_DMAError(DMA_HandleTypeDef *hdma) +2460:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** { + 2464 .loc 1 2460 1 is_stmt 1 view -0 + 2465 .cfi_startproc + 2466 @ args = 0, pretend = 0, frame = 0 + 2467 @ frame_needed = 0, uses_anonymous_args = 0 + 2468 .loc 1 2460 1 is_stmt 0 view .LVU705 + 2469 0000 10B5 push {r4, lr} + 2470 .cfi_def_cfa_offset 8 + 2471 .cfi_offset 4, -8 + 2472 .cfi_offset 14, -4 +2461:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** /* Retrieve ADC handle corresponding to current DMA handle */ +2462:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** ADC_HandleTypeDef* hadc = ( ADC_HandleTypeDef* )((DMA_HandleTypeDef* )hdma)->Parent; + 2473 .loc 1 2462 3 is_stmt 1 view .LVU706 + 2474 .loc 1 2462 22 is_stmt 0 view .LVU707 + 2475 0002 406A ldr r0, [r0, #36] + 2476 .LVL180: + ARM GAS /tmp/cc2rPMmj.s page 98 + + +2463:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** +2464:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** /* Set ADC state */ +2465:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** SET_BIT(hadc->State, HAL_ADC_STATE_ERROR_DMA); + 2477 .loc 1 2465 3 is_stmt 1 view .LVU708 + 2478 0004 836B ldr r3, [r0, #56] + 2479 0006 4022 movs r2, #64 + 2480 0008 1343 orrs r3, r2 + 2481 000a 8363 str r3, [r0, #56] +2466:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** +2467:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** /* Set ADC error code to DMA error */ +2468:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** SET_BIT(hadc->ErrorCode, HAL_ADC_ERROR_DMA); + 2482 .loc 1 2468 3 view .LVU709 + 2483 000c C36B ldr r3, [r0, #60] + 2484 000e 3C3A subs r2, r2, #60 + 2485 0010 1343 orrs r3, r2 + 2486 0012 C363 str r3, [r0, #60] +2469:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** +2470:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** /* Error callback */ +2471:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** #if (USE_HAL_ADC_REGISTER_CALLBACKS == 1) +2472:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** hadc->ErrorCallback(hadc); +2473:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** #else +2474:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** HAL_ADC_ErrorCallback(hadc); + 2487 .loc 1 2474 3 view .LVU710 + 2488 0014 FFF7FEFF bl HAL_ADC_ErrorCallback + 2489 .LVL181: +2475:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** #endif /* USE_HAL_ADC_REGISTER_CALLBACKS */ +2476:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** } + 2490 .loc 1 2476 1 is_stmt 0 view .LVU711 + 2491 @ sp needed + 2492 0018 10BD pop {r4, pc} + 2493 .cfi_endproc + 2494 .LFE67: + 2496 .section .text.HAL_ADC_IRQHandler,"ax",%progbits + 2497 .align 1 + 2498 .global HAL_ADC_IRQHandler + 2499 .syntax unified + 2500 .code 16 + 2501 .thumb_func + 2503 HAL_ADC_IRQHandler: + 2504 .LVL182: + 2505 .LFB53: +1667:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** uint32_t tmp_isr = hadc->Instance->ISR; + 2506 .loc 1 1667 1 is_stmt 1 view -0 + 2507 .cfi_startproc + 2508 @ args = 0, pretend = 0, frame = 0 + 2509 @ frame_needed = 0, uses_anonymous_args = 0 +1667:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** uint32_t tmp_isr = hadc->Instance->ISR; + 2510 .loc 1 1667 1 is_stmt 0 view .LVU713 + 2511 0000 70B5 push {r4, r5, r6, lr} + 2512 .cfi_def_cfa_offset 16 + 2513 .cfi_offset 4, -16 + 2514 .cfi_offset 5, -12 + 2515 .cfi_offset 6, -8 + 2516 .cfi_offset 14, -4 + 2517 0002 0400 movs r4, r0 +1668:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** uint32_t tmp_ier = hadc->Instance->IER; + 2518 .loc 1 1668 3 is_stmt 1 view .LVU714 + ARM GAS /tmp/cc2rPMmj.s page 99 + + +1668:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** uint32_t tmp_ier = hadc->Instance->IER; + 2519 .loc 1 1668 26 is_stmt 0 view .LVU715 + 2520 0004 0368 ldr r3, [r0] +1668:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** uint32_t tmp_ier = hadc->Instance->IER; + 2521 .loc 1 1668 12 view .LVU716 + 2522 0006 1D68 ldr r5, [r3] + 2523 .LVL183: +1669:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** + 2524 .loc 1 1669 3 is_stmt 1 view .LVU717 +1669:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** + 2525 .loc 1 1669 12 is_stmt 0 view .LVU718 + 2526 0008 5E68 ldr r6, [r3, #4] + 2527 .LVL184: +1672:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** assert_param(IS_FUNCTIONAL_STATE(hadc->Init.ContinuousConvMode)); + 2528 .loc 1 1672 3 is_stmt 1 view .LVU719 +1673:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** assert_param(IS_ADC_EOC_SELECTION(hadc->Init.EOCSelection)); + 2529 .loc 1 1673 3 view .LVU720 +1674:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** + 2530 .loc 1 1674 3 view .LVU721 +1677:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** (((tmp_isr & ADC_FLAG_EOS) == ADC_FLAG_EOS) && ((tmp_ier & ADC_IT_EOS) == ADC_IT_EOS)) ) + 2531 .loc 1 1677 3 view .LVU722 +1677:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** (((tmp_isr & ADC_FLAG_EOS) == ADC_FLAG_EOS) && ((tmp_ier & ADC_IT_EOS) == ADC_IT_EOS)) ) + 2532 .loc 1 1677 5 is_stmt 0 view .LVU723 + 2533 000a 6A07 lsls r2, r5, #29 + 2534 000c 01D5 bpl .L180 +1677:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** (((tmp_isr & ADC_FLAG_EOS) == ADC_FLAG_EOS) && ((tmp_ier & ADC_IT_EOS) == ADC_IT_EOS)) ) + 2535 .loc 1 1677 51 discriminator 1 view .LVU724 + 2536 000e 7207 lsls r2, r6, #29 + 2537 0010 03D4 bmi .L181 + 2538 .L180: +1677:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** (((tmp_isr & ADC_FLAG_EOS) == ADC_FLAG_EOS) && ((tmp_ier & ADC_IT_EOS) == ADC_IT_EOS)) ) + 2539 .loc 1 1677 94 discriminator 3 view .LVU725 + 2540 0012 2A07 lsls r2, r5, #28 + 2541 0014 27D5 bpl .L182 +1678:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** { + 2542 .loc 1 1678 51 view .LVU726 + 2543 0016 3207 lsls r2, r6, #28 + 2544 0018 25D5 bpl .L182 + 2545 .L181: +1681:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** { + 2546 .loc 1 1681 5 is_stmt 1 view .LVU727 +1681:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** { + 2547 .loc 1 1681 9 is_stmt 0 view .LVU728 + 2548 001a A26B ldr r2, [r4, #56] +1681:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** { + 2549 .loc 1 1681 8 view .LVU729 + 2550 001c D206 lsls r2, r2, #27 + 2551 001e 04D4 bmi .L183 +1684:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** } + 2552 .loc 1 1684 7 is_stmt 1 view .LVU730 + 2553 0020 A16B ldr r1, [r4, #56] + 2554 0022 8022 movs r2, #128 + 2555 0024 9200 lsls r2, r2, #2 + 2556 0026 0A43 orrs r2, r1 + 2557 0028 A263 str r2, [r4, #56] + 2558 .L183: +1689:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** (hadc->Init.ContinuousConvMode == DISABLE) ) + ARM GAS /tmp/cc2rPMmj.s page 100 + + + 2559 .loc 1 1689 5 view .LVU731 +1689:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** (hadc->Init.ContinuousConvMode == DISABLE) ) + 2560 .loc 1 1689 8 is_stmt 0 view .LVU732 + 2561 002a D968 ldr r1, [r3, #12] + 2562 002c C022 movs r2, #192 + 2563 002e 1201 lsls r2, r2, #4 +1689:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** (hadc->Init.ContinuousConvMode == DISABLE) ) + 2564 .loc 1 1689 7 view .LVU733 + 2565 0030 1142 tst r1, r2 + 2566 0032 12D1 bne .L184 +1690:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** { + 2567 .loc 1 1690 19 view .LVU734 + 2568 0034 A27E ldrb r2, [r4, #26] +1689:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** (hadc->Init.ContinuousConvMode == DISABLE) ) + 2569 .loc 1 1689 51 discriminator 1 view .LVU735 + 2570 0036 002A cmp r2, #0 + 2571 0038 0FD1 bne .L184 +1693:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** { + 2572 .loc 1 1693 7 is_stmt 1 view .LVU736 +1693:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** { + 2573 .loc 1 1693 9 is_stmt 0 view .LVU737 + 2574 003a 2A07 lsls r2, r5, #28 + 2575 003c 0DD5 bpl .L184 +1697:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** { + 2576 .loc 1 1697 9 is_stmt 1 view .LVU738 +1697:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** { + 2577 .loc 1 1697 13 is_stmt 0 view .LVU739 + 2578 003e 9A68 ldr r2, [r3, #8] +1697:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** { + 2579 .loc 1 1697 12 view .LVU740 + 2580 0040 5207 lsls r2, r2, #29 + 2581 0042 2DD4 bmi .L185 +1703:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** + 2582 .loc 1 1703 11 is_stmt 1 view .LVU741 + 2583 0044 5A68 ldr r2, [r3, #4] + 2584 0046 0C21 movs r1, #12 + 2585 0048 8A43 bics r2, r1 + 2586 004a 5A60 str r2, [r3, #4] +1706:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** HAL_ADC_STATE_REG_BUSY, + 2587 .loc 1 1706 11 view .LVU742 + 2588 004c A36B ldr r3, [r4, #56] + 2589 004e 1F4A ldr r2, .L202 + 2590 0050 1340 ands r3, r2 + 2591 0052 0432 adds r2, r2, #4 + 2592 0054 FF32 adds r2, r2, #255 + 2593 0056 1343 orrs r3, r2 + 2594 0058 A363 str r3, [r4, #56] + 2595 .L184: +1727:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** #endif /* USE_HAL_ADC_REGISTER_CALLBACKS */ + 2596 .loc 1 1727 5 view .LVU743 + 2597 005a 2000 movs r0, r4 + 2598 .LVL185: +1727:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** #endif /* USE_HAL_ADC_REGISTER_CALLBACKS */ + 2599 .loc 1 1727 5 is_stmt 0 view .LVU744 + 2600 005c FFF7FEFF bl HAL_ADC_ConvCpltCallback + 2601 .LVL186: +1736:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** } + ARM GAS /tmp/cc2rPMmj.s page 101 + + + 2602 .loc 1 1736 5 is_stmt 1 view .LVU745 + 2603 0060 2368 ldr r3, [r4] + 2604 0062 0C22 movs r2, #12 + 2605 0064 1A60 str r2, [r3] + 2606 .L182: +1740:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** { + 2607 .loc 1 1740 3 view .LVU746 +1740:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** { + 2608 .loc 1 1740 5 is_stmt 0 view .LVU747 + 2609 0066 2B06 lsls r3, r5, #24 + 2610 0068 01D5 bpl .L186 +1740:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** { + 2611 .loc 1 1740 49 discriminator 1 view .LVU748 + 2612 006a 3306 lsls r3, r6, #24 + 2613 006c 21D4 bmi .L201 + 2614 .L186: +1758:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** { + 2615 .loc 1 1758 3 is_stmt 1 view .LVU749 +1758:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** { + 2616 .loc 1 1758 5 is_stmt 0 view .LVU750 + 2617 006e ED06 lsls r5, r5, #27 + 2618 0070 15D5 bpl .L179 + 2619 .LVL187: +1758:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** { + 2620 .loc 1 1758 49 discriminator 1 view .LVU751 + 2621 0072 F606 lsls r6, r6, #27 + 2622 0074 13D5 bpl .L179 + 2623 .LVL188: +1766:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** HAL_IS_BIT_SET(hadc->Instance->CFGR1, ADC_CFGR1_DMAEN) ) + 2624 .loc 1 1766 5 is_stmt 1 view .LVU752 +1766:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** HAL_IS_BIT_SET(hadc->Instance->CFGR1, ADC_CFGR1_DMAEN) ) + 2625 .loc 1 1766 20 is_stmt 0 view .LVU753 + 2626 0076 A36A ldr r3, [r4, #40] +1766:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** HAL_IS_BIT_SET(hadc->Instance->CFGR1, ADC_CFGR1_DMAEN) ) + 2627 .loc 1 1766 8 view .LVU754 + 2628 0078 012B cmp r3, #1 + 2629 007a 03D0 beq .L188 +1767:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** { + 2630 .loc 1 1767 9 view .LVU755 + 2631 007c 2368 ldr r3, [r4] + 2632 007e DB68 ldr r3, [r3, #12] +1766:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** HAL_IS_BIT_SET(hadc->Instance->CFGR1, ADC_CFGR1_DMAEN) ) + 2633 .loc 1 1766 67 discriminator 1 view .LVU756 + 2634 0080 DB07 lsls r3, r3, #31 + 2635 0082 09D5 bpl .L189 + 2636 .L188: +1770:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** + 2637 .loc 1 1770 7 is_stmt 1 view .LVU757 + 2638 0084 E36B ldr r3, [r4, #60] + 2639 0086 0222 movs r2, #2 + 2640 0088 1343 orrs r3, r2 + 2641 008a E363 str r3, [r4, #60] +1773:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** + 2642 .loc 1 1773 7 view .LVU758 + 2643 008c 2368 ldr r3, [r4] + 2644 008e 0E32 adds r2, r2, #14 + 2645 0090 1A60 str r2, [r3] + ARM GAS /tmp/cc2rPMmj.s page 102 + + +1778:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** #endif /* USE_HAL_ADC_REGISTER_CALLBACKS */ + 2646 .loc 1 1778 7 view .LVU759 + 2647 0092 2000 movs r0, r4 + 2648 0094 FFF7FEFF bl HAL_ADC_ErrorCallback + 2649 .LVL189: + 2650 .L189: +1783:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** } + 2651 .loc 1 1783 5 view .LVU760 + 2652 0098 2368 ldr r3, [r4] + 2653 009a 1022 movs r2, #16 + 2654 009c 1A60 str r2, [r3] + 2655 .L179: +1786:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** + 2656 .loc 1 1786 1 is_stmt 0 view .LVU761 + 2657 @ sp needed + 2658 .LVL190: +1786:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** + 2659 .loc 1 1786 1 view .LVU762 + 2660 009e 70BD pop {r4, r5, r6, pc} + 2661 .LVL191: + 2662 .L185: +1713:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** + 2663 .loc 1 1713 11 is_stmt 1 view .LVU763 + 2664 00a0 A36B ldr r3, [r4, #56] + 2665 00a2 2022 movs r2, #32 + 2666 00a4 1343 orrs r3, r2 + 2667 00a6 A363 str r3, [r4, #56] +1716:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** } + 2668 .loc 1 1716 11 view .LVU764 + 2669 00a8 E36B ldr r3, [r4, #60] + 2670 00aa 1F3A subs r2, r2, #31 + 2671 00ac 1343 orrs r3, r2 + 2672 00ae E363 str r3, [r4, #60] + 2673 00b0 D3E7 b .L184 + 2674 .LVL192: + 2675 .L201: +1743:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** + 2676 .loc 1 1743 7 view .LVU765 + 2677 00b2 A26B ldr r2, [r4, #56] + 2678 00b4 8023 movs r3, #128 + 2679 00b6 5B02 lsls r3, r3, #9 + 2680 00b8 1343 orrs r3, r2 + 2681 00ba A363 str r3, [r4, #56] +1748:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** #endif /* USE_HAL_ADC_REGISTER_CALLBACKS */ + 2682 .loc 1 1748 5 view .LVU766 + 2683 00bc 2000 movs r0, r4 + 2684 00be FFF7FEFF bl HAL_ADC_LevelOutOfWindowCallback + 2685 .LVL193: +1752:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** + 2686 .loc 1 1752 5 view .LVU767 + 2687 00c2 2368 ldr r3, [r4] + 2688 00c4 8022 movs r2, #128 + 2689 00c6 1A60 str r2, [r3] + 2690 00c8 D1E7 b .L186 + 2691 .L203: + 2692 00ca C046 .align 2 + 2693 .L202: + ARM GAS /tmp/cc2rPMmj.s page 103 + + + 2694 00cc FEFEFFFF .word -258 + 2695 .cfi_endproc + 2696 .LFE53: + 2698 .section .text.HAL_ADC_ConfigChannel,"ax",%progbits + 2699 .align 1 + 2700 .global HAL_ADC_ConfigChannel + 2701 .syntax unified + 2702 .code 16 + 2703 .thumb_func + 2705 HAL_ADC_ConfigChannel: + 2706 .LVL194: + 2707 .LFB58: +1895:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** HAL_StatusTypeDef tmp_hal_status = HAL_OK; + 2708 .loc 1 1895 1 view -0 + 2709 .cfi_startproc + 2710 @ args = 0, pretend = 0, frame = 8 + 2711 @ frame_needed = 0, uses_anonymous_args = 0 +1895:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** HAL_StatusTypeDef tmp_hal_status = HAL_OK; + 2712 .loc 1 1895 1 is_stmt 0 view .LVU769 + 2713 0000 30B5 push {r4, r5, lr} + 2714 .cfi_def_cfa_offset 12 + 2715 .cfi_offset 4, -12 + 2716 .cfi_offset 5, -8 + 2717 .cfi_offset 14, -4 + 2718 0002 83B0 sub sp, sp, #12 + 2719 .cfi_def_cfa_offset 24 + 2720 0004 0400 movs r4, r0 +1896:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** __IO uint32_t wait_loop_index = 0U; + 2721 .loc 1 1896 3 is_stmt 1 view .LVU770 + 2722 .LVL195: +1897:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** + 2723 .loc 1 1897 3 view .LVU771 +1897:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** + 2724 .loc 1 1897 17 is_stmt 0 view .LVU772 + 2725 0006 0023 movs r3, #0 + 2726 0008 0193 str r3, [sp, #4] +1900:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** assert_param(IS_ADC_CHANNEL(sConfig->Channel)); + 2727 .loc 1 1900 3 is_stmt 1 view .LVU773 +1901:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** assert_param(IS_ADC_RANK(sConfig->Rank)); + 2728 .loc 1 1901 3 view .LVU774 +1902:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** + 2729 .loc 1 1902 3 view .LVU775 +1904:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** { + 2730 .loc 1 1904 3 view .LVU776 +1906:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** } + 2731 .loc 1 1906 5 view .LVU777 +1910:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** + 2732 .loc 1 1910 3 view .LVU778 +1910:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** + 2733 .loc 1 1910 3 view .LVU779 + 2734 000a 3433 adds r3, r3, #52 + 2735 000c C35C ldrb r3, [r0, r3] + 2736 000e 012B cmp r3, #1 + 2737 0010 00D1 bne .LCB2528 + 2738 0012 81E0 b .L216 @long jump + 2739 .LCB2528: +1910:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** + ARM GAS /tmp/cc2rPMmj.s page 104 + + + 2740 .loc 1 1910 3 discriminator 2 view .LVU780 + 2741 0014 3423 movs r3, #52 + 2742 0016 0122 movs r2, #1 + 2743 0018 C254 strb r2, [r0, r3] +1910:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** + 2744 .loc 1 1910 3 discriminator 2 view .LVU781 +1918:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** { + 2745 .loc 1 1918 3 view .LVU782 +1918:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** { + 2746 .loc 1 1918 7 is_stmt 0 view .LVU783 + 2747 001a 0268 ldr r2, [r0] + 2748 001c 9368 ldr r3, [r2, #8] +1918:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** { + 2749 .loc 1 1918 6 view .LVU784 + 2750 001e 5B07 lsls r3, r3, #29 + 2751 0020 6CD4 bmi .L206 +1922:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** { + 2752 .loc 1 1922 5 is_stmt 1 view .LVU785 +1922:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** { + 2753 .loc 1 1922 16 is_stmt 0 view .LVU786 + 2754 0022 4868 ldr r0, [r1, #4] + 2755 .LVL196: +1922:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** { + 2756 .loc 1 1922 8 view .LVU787 + 2757 0024 3D4B ldr r3, .L227 + 2758 0026 9842 cmp r0, r3 + 2759 0028 4DD0 beq .L207 +1926:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** + 2760 .loc 1 1926 7 is_stmt 1 view .LVU788 +1926:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** + 2761 .loc 1 1926 21 is_stmt 0 view .LVU789 + 2762 002a 936A ldr r3, [r2, #40] +1926:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** + 2763 .loc 1 1926 33 view .LVU790 + 2764 002c 0D68 ldr r5, [r1] + 2765 002e 0120 movs r0, #1 + 2766 0030 A840 lsls r0, r0, r5 +1926:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** + 2767 .loc 1 1926 30 view .LVU791 + 2768 0032 0343 orrs r3, r0 + 2769 0034 9362 str r3, [r2, #40] +1933:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** { + 2770 .loc 1 1933 7 is_stmt 1 view .LVU792 +1933:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** { + 2771 .loc 1 1933 13 is_stmt 0 view .LVU793 + 2772 0036 E36A ldr r3, [r4, #44] + 2773 0038 072B cmp r3, #7 + 2774 003a 27D8 bhi .L208 + 2775 003c 002B cmp r3, #0 + 2776 003e 10D1 bne .L209 + 2777 .L210: +1937:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** { + 2778 .loc 1 1937 9 is_stmt 1 view .LVU794 +1937:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** { + 2779 .loc 1 1937 20 is_stmt 0 view .LVU795 + 2780 0040 8868 ldr r0, [r1, #8] +1937:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** { + ARM GAS /tmp/cc2rPMmj.s page 105 + + + 2781 .loc 1 1937 38 view .LVU796 + 2782 0042 2268 ldr r2, [r4] + 2783 0044 5569 ldr r5, [r2, #20] + 2784 0046 0723 movs r3, #7 + 2785 0048 2B40 ands r3, r5 +1937:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** { + 2786 .loc 1 1937 12 view .LVU797 + 2787 004a 9842 cmp r0, r3 + 2788 004c 09D0 beq .L209 +1941:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** + 2789 .loc 1 1941 11 is_stmt 1 view .LVU798 +1941:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** + 2790 .loc 1 1941 25 is_stmt 0 view .LVU799 + 2791 004e 5069 ldr r0, [r2, #20] +1941:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** + 2792 .loc 1 1941 32 view .LVU800 + 2793 0050 0723 movs r3, #7 + 2794 0052 9843 bics r0, r3 + 2795 0054 5061 str r0, [r2, #20] +1944:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** } + 2796 .loc 1 1944 11 is_stmt 1 view .LVU801 +1944:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** } + 2797 .loc 1 1944 15 is_stmt 0 view .LVU802 + 2798 0056 2068 ldr r0, [r4] +1944:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** } + 2799 .loc 1 1944 25 view .LVU803 + 2800 0058 4269 ldr r2, [r0, #20] +1944:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** } + 2801 .loc 1 1944 35 view .LVU804 + 2802 005a 8D68 ldr r5, [r1, #8] + 2803 005c 2B40 ands r3, r5 +1944:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** } + 2804 .loc 1 1944 32 view .LVU805 + 2805 005e 1343 orrs r3, r2 + 2806 0060 4361 str r3, [r0, #20] + 2807 .L209: +1954:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** { + 2808 .loc 1 1954 7 is_stmt 1 view .LVU806 +1954:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** { + 2809 .loc 1 1954 10 is_stmt 0 view .LVU807 + 2810 0062 0B68 ldr r3, [r1] + 2811 0064 1A00 movs r2, r3 + 2812 0066 103A subs r2, r2, #16 +1954:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** { + 2813 .loc 1 1954 9 view .LVU808 + 2814 0068 022A cmp r2, #2 + 2815 006a 51D8 bhi .L217 +1959:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** + 2816 .loc 1 1959 9 is_stmt 1 view .LVU809 +1959:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** + 2817 .loc 1 1959 12 is_stmt 0 view .LVU810 + 2818 006c 2C4A ldr r2, .L227+4 + 2819 006e 1268 ldr r2, [r2] +1959:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** + 2820 .loc 1 1959 21 view .LVU811 + 2821 0070 102B cmp r3, #16 + 2822 0072 13D0 beq .L218 + ARM GAS /tmp/cc2rPMmj.s page 106 + + +1959:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** + 2823 .loc 1 1959 21 discriminator 1 view .LVU812 + 2824 0074 112B cmp r3, #17 + 2825 0076 0ED0 beq .L224 +1959:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** + 2826 .loc 1 1959 21 discriminator 4 view .LVU813 + 2827 0078 8023 movs r3, #128 + 2828 007a 5B04 lsls r3, r3, #17 + 2829 .L212: +1959:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** + 2830 .loc 1 1959 18 discriminator 8 view .LVU814 + 2831 007c 1343 orrs r3, r2 + 2832 007e 284A ldr r2, .L227+4 + 2833 0080 1360 str r3, [r2] +1962:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** { + 2834 .loc 1 1962 9 is_stmt 1 view .LVU815 +1962:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** { + 2835 .loc 1 1962 20 is_stmt 0 view .LVU816 + 2836 0082 0B68 ldr r3, [r1] +1962:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** { + 2837 .loc 1 1962 12 view .LVU817 + 2838 0084 102B cmp r3, #16 + 2839 0086 0CD0 beq .L225 +1896:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** __IO uint32_t wait_loop_index = 0U; + 2840 .loc 1 1896 21 view .LVU818 + 2841 0088 0020 movs r0, #0 + 2842 008a 3CE0 b .L211 + 2843 .L208: +1896:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** __IO uint32_t wait_loop_index = 0U; + 2844 .loc 1 1896 21 view .LVU819 + 2845 008c 8022 movs r2, #128 + 2846 008e 5205 lsls r2, r2, #21 + 2847 0090 9342 cmp r3, r2 + 2848 0092 E6D0 beq .L209 + 2849 0094 D4E7 b .L210 + 2850 .L224: +1959:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** + 2851 .loc 1 1959 21 discriminator 3 view .LVU820 + 2852 0096 8023 movs r3, #128 + 2853 0098 DB03 lsls r3, r3, #15 + 2854 009a EFE7 b .L212 + 2855 .L218: +1959:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** + 2856 .loc 1 1959 21 discriminator 2 view .LVU821 + 2857 009c 8023 movs r3, #128 + 2858 009e 1B04 lsls r3, r3, #16 + 2859 00a0 ECE7 b .L212 + 2860 .L225: +1966:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** while(wait_loop_index != 0U) + 2861 .loc 1 1966 11 is_stmt 1 view .LVU822 +1966:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** while(wait_loop_index != 0U) + 2862 .loc 1 1966 73 is_stmt 0 view .LVU823 + 2863 00a2 204B ldr r3, .L227+8 + 2864 00a4 1868 ldr r0, [r3] + 2865 00a6 2049 ldr r1, .L227+12 + 2866 .LVL197: +1966:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** while(wait_loop_index != 0U) + ARM GAS /tmp/cc2rPMmj.s page 107 + + + 2867 .loc 1 1966 73 view .LVU824 + 2868 00a8 FFF7FEFF bl __aeabi_uidiv + 2869 .LVL198: +1966:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** while(wait_loop_index != 0U) + 2870 .loc 1 1966 54 view .LVU825 + 2871 00ac 8300 lsls r3, r0, #2 + 2872 00ae 1B18 adds r3, r3, r0 + 2873 00b0 5B00 lsls r3, r3, #1 +1966:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** while(wait_loop_index != 0U) + 2874 .loc 1 1966 27 view .LVU826 + 2875 00b2 0193 str r3, [sp, #4] +1967:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** { + 2876 .loc 1 1967 11 is_stmt 1 view .LVU827 +1967:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** { + 2877 .loc 1 1967 16 is_stmt 0 view .LVU828 + 2878 00b4 02E0 b .L213 + 2879 .L214: +1969:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** } + 2880 .loc 1 1969 13 is_stmt 1 view .LVU829 +1969:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** } + 2881 .loc 1 1969 28 is_stmt 0 view .LVU830 + 2882 00b6 019B ldr r3, [sp, #4] + 2883 00b8 013B subs r3, r3, #1 + 2884 00ba 0193 str r3, [sp, #4] + 2885 .L213: +1967:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** { + 2886 .loc 1 1967 33 is_stmt 1 view .LVU831 + 2887 00bc 019B ldr r3, [sp, #4] + 2888 00be 002B cmp r3, #0 + 2889 00c0 F9D1 bne .L214 +1896:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** __IO uint32_t wait_loop_index = 0U; + 2890 .loc 1 1896 21 is_stmt 0 view .LVU832 + 2891 00c2 0020 movs r0, #0 + 2892 00c4 1FE0 b .L211 + 2893 .LVL199: + 2894 .L207: +1978:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** + 2895 .loc 1 1978 7 is_stmt 1 view .LVU833 +1978:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** + 2896 .loc 1 1978 21 is_stmt 0 view .LVU834 + 2897 00c6 936A ldr r3, [r2, #40] +1978:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** + 2898 .loc 1 1978 34 view .LVU835 + 2899 00c8 0D68 ldr r5, [r1] + 2900 00ca 0120 movs r0, #1 + 2901 00cc A840 lsls r0, r0, r5 +1978:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** + 2902 .loc 1 1978 30 view .LVU836 + 2903 00ce 8343 bics r3, r0 + 2904 00d0 9362 str r3, [r2, #40] +1983:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** { + 2905 .loc 1 1983 7 is_stmt 1 view .LVU837 +1983:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** { + 2906 .loc 1 1983 10 is_stmt 0 view .LVU838 + 2907 00d2 0B68 ldr r3, [r1] + 2908 00d4 1A00 movs r2, r3 + 2909 00d6 103A subs r2, r2, #16 + ARM GAS /tmp/cc2rPMmj.s page 108 + + +1983:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** { + 2910 .loc 1 1983 9 view .LVU839 + 2911 00d8 022A cmp r2, #2 + 2912 00da 1BD8 bhi .L221 +1988:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** } + 2913 .loc 1 1988 9 is_stmt 1 view .LVU840 +1988:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** } + 2914 .loc 1 1988 12 is_stmt 0 view .LVU841 + 2915 00dc 104A ldr r2, .L227+4 + 2916 00de 1268 ldr r2, [r2] +1988:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** } + 2917 .loc 1 1988 21 view .LVU842 + 2918 00e0 102B cmp r3, #16 + 2919 00e2 09D0 beq .L222 +1988:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** } + 2920 .loc 1 1988 21 discriminator 1 view .LVU843 + 2921 00e4 112B cmp r3, #17 + 2922 00e6 05D0 beq .L226 +1988:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** } + 2923 .loc 1 1988 21 discriminator 4 view .LVU844 + 2924 00e8 104B ldr r3, .L227+16 + 2925 .L215: +1988:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** } + 2926 .loc 1 1988 18 discriminator 8 view .LVU845 + 2927 00ea 1340 ands r3, r2 + 2928 00ec 0C4A ldr r2, .L227+4 + 2929 00ee 1360 str r3, [r2] +1896:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** __IO uint32_t wait_loop_index = 0U; + 2930 .loc 1 1896 21 view .LVU846 + 2931 00f0 0020 movs r0, #0 + 2932 00f2 08E0 b .L211 + 2933 .L226: +1988:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** } + 2934 .loc 1 1988 21 discriminator 3 view .LVU847 + 2935 00f4 0E4B ldr r3, .L227+20 + 2936 00f6 F8E7 b .L215 + 2937 .L222: +1988:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** } + 2938 .loc 1 1988 21 discriminator 2 view .LVU848 + 2939 00f8 0E4B ldr r3, .L227+24 + 2940 00fa F6E7 b .L215 + 2941 .LVL200: + 2942 .L206: +2000:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** + 2943 .loc 1 2000 5 is_stmt 1 view .LVU849 + 2944 00fc 836B ldr r3, [r0, #56] + 2945 00fe 2022 movs r2, #32 + 2946 0100 1343 orrs r3, r2 + 2947 0102 8363 str r3, [r0, #56] +2002:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** } + 2948 .loc 1 2002 5 view .LVU850 + 2949 .LVL201: +2002:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** } + 2950 .loc 1 2002 20 is_stmt 0 view .LVU851 + 2951 0104 0120 movs r0, #1 + 2952 .LVL202: + 2953 .L211: + ARM GAS /tmp/cc2rPMmj.s page 109 + + +2006:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** + 2954 .loc 1 2006 3 is_stmt 1 view .LVU852 +2006:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** + 2955 .loc 1 2006 3 view .LVU853 + 2956 0106 3423 movs r3, #52 + 2957 0108 0022 movs r2, #0 + 2958 010a E254 strb r2, [r4, r3] +2006:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** + 2959 .loc 1 2006 3 view .LVU854 +2009:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** } + 2960 .loc 1 2009 3 view .LVU855 + 2961 .LVL203: + 2962 .L205: +2010:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** + 2963 .loc 1 2010 1 is_stmt 0 view .LVU856 + 2964 010c 03B0 add sp, sp, #12 + 2965 @ sp needed + 2966 .LVL204: +2010:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** + 2967 .loc 1 2010 1 view .LVU857 + 2968 010e 30BD pop {r4, r5, pc} + 2969 .LVL205: + 2970 .L217: +1896:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** __IO uint32_t wait_loop_index = 0U; + 2971 .loc 1 1896 21 view .LVU858 + 2972 0110 0020 movs r0, #0 + 2973 0112 F8E7 b .L211 + 2974 .L221: +1896:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** __IO uint32_t wait_loop_index = 0U; + 2975 .loc 1 1896 21 view .LVU859 + 2976 0114 0020 movs r0, #0 + 2977 0116 F6E7 b .L211 + 2978 .LVL206: + 2979 .L216: +1910:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** + 2980 .loc 1 1910 3 discriminator 1 view .LVU860 + 2981 0118 0220 movs r0, #2 + 2982 .LVL207: +1910:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** + 2983 .loc 1 1910 3 discriminator 1 view .LVU861 + 2984 011a F7E7 b .L205 + 2985 .L228: + 2986 .align 2 + 2987 .L227: + 2988 011c 01100000 .word 4097 + 2989 0120 08270140 .word 1073817352 + 2990 0124 00000000 .word SystemCoreClock + 2991 0128 40420F00 .word 1000000 + 2992 012c FFFFFFFE .word -16777217 + 2993 0130 FFFFBFFF .word -4194305 + 2994 0134 FFFF7FFF .word -8388609 + 2995 .cfi_endproc + 2996 .LFE58: + 2998 .section .text.HAL_ADC_AnalogWDGConfig,"ax",%progbits + 2999 .align 1 + 3000 .global HAL_ADC_AnalogWDGConfig + 3001 .syntax unified + ARM GAS /tmp/cc2rPMmj.s page 110 + + + 3002 .code 16 + 3003 .thumb_func + 3005 HAL_ADC_AnalogWDGConfig: + 3006 .LVL208: + 3007 .LFB59: +2028:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** HAL_StatusTypeDef tmp_hal_status = HAL_OK; + 3008 .loc 1 2028 1 is_stmt 1 view -0 + 3009 .cfi_startproc + 3010 @ args = 0, pretend = 0, frame = 0 + 3011 @ frame_needed = 0, uses_anonymous_args = 0 +2028:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** HAL_StatusTypeDef tmp_hal_status = HAL_OK; + 3012 .loc 1 2028 1 is_stmt 0 view .LVU863 + 3013 0000 70B5 push {r4, r5, r6, lr} + 3014 .cfi_def_cfa_offset 16 + 3015 .cfi_offset 4, -16 + 3016 .cfi_offset 5, -12 + 3017 .cfi_offset 6, -8 + 3018 .cfi_offset 14, -4 + 3019 0002 0300 movs r3, r0 +2029:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** + 3020 .loc 1 2029 3 is_stmt 1 view .LVU864 + 3021 .LVL209: +2031:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** uint32_t tmpAWDLowThresholdShifted; + 3022 .loc 1 2031 3 view .LVU865 +2032:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** + 3023 .loc 1 2032 3 view .LVU866 +2035:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** assert_param(IS_ADC_ANALOG_WATCHDOG_MODE(AnalogWDGConfig->WatchdogMode)); + 3024 .loc 1 2035 3 view .LVU867 +2036:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** assert_param(IS_FUNCTIONAL_STATE(AnalogWDGConfig->ITMode)); + 3025 .loc 1 2036 3 view .LVU868 +2037:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** + 3026 .loc 1 2037 3 view .LVU869 +2040:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** assert_param(IS_ADC_RANGE(ADC_GET_RESOLUTION(hadc), AnalogWDGConfig->LowThreshold)); + 3027 .loc 1 2040 3 view .LVU870 +2041:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** + 3028 .loc 1 2041 3 view .LVU871 +2043:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** { + 3029 .loc 1 2043 3 view .LVU872 +2045:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** } + 3030 .loc 1 2045 5 view .LVU873 +2049:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** + 3031 .loc 1 2049 3 view .LVU874 +2049:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** + 3032 .loc 1 2049 3 view .LVU875 + 3033 0004 3422 movs r2, #52 + 3034 0006 825C ldrb r2, [r0, r2] + 3035 0008 012A cmp r2, #1 + 3036 000a 47D0 beq .L234 +2049:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** + 3037 .loc 1 2049 3 discriminator 2 view .LVU876 + 3038 000c 3422 movs r2, #52 + 3039 000e 0120 movs r0, #1 + 3040 .LVL210: +2049:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** + 3041 .loc 1 2049 3 is_stmt 0 discriminator 2 view .LVU877 + 3042 0010 9854 strb r0, [r3, r2] +2049:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** + ARM GAS /tmp/cc2rPMmj.s page 111 + + + 3043 .loc 1 2049 3 is_stmt 1 discriminator 2 view .LVU878 +2056:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** { + 3044 .loc 1 2056 3 view .LVU879 +2056:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** { + 3045 .loc 1 2056 7 is_stmt 0 view .LVU880 + 3046 0012 1868 ldr r0, [r3] + 3047 0014 8268 ldr r2, [r0, #8] +2056:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** { + 3048 .loc 1 2056 6 view .LVU881 + 3049 0016 5207 lsls r2, r2, #29 + 3050 0018 37D4 bmi .L231 +2063:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** ADC_CFGR1_AWDEN | + 3051 .loc 1 2063 5 is_stmt 1 view .LVU882 +2063:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** ADC_CFGR1_AWDEN | + 3052 .loc 1 2063 19 is_stmt 0 view .LVU883 + 3053 001a C268 ldr r2, [r0, #12] +2063:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** ADC_CFGR1_AWDEN | + 3054 .loc 1 2063 27 view .LVU884 + 3055 001c 204C ldr r4, .L236 + 3056 001e 2240 ands r2, r4 + 3057 0020 C260 str r2, [r0, #12] +2067:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** ADC_CFGR_AWDCH(AnalogWDGConfig->Channel) ); + 3058 .loc 1 2067 5 is_stmt 1 view .LVU885 +2067:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** ADC_CFGR_AWDCH(AnalogWDGConfig->Channel) ); + 3059 .loc 1 2067 9 is_stmt 0 view .LVU886 + 3060 0022 1D68 ldr r5, [r3] +2067:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** ADC_CFGR_AWDCH(AnalogWDGConfig->Channel) ); + 3061 .loc 1 2067 19 view .LVU887 + 3062 0024 EA68 ldr r2, [r5, #12] +2067:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** ADC_CFGR_AWDCH(AnalogWDGConfig->Channel) ); + 3063 .loc 1 2067 47 view .LVU888 + 3064 0026 0868 ldr r0, [r1] +2068:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** + 3065 .loc 1 2068 32 view .LVU889 + 3066 0028 4C68 ldr r4, [r1, #4] + 3067 002a A406 lsls r4, r4, #26 +2067:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** ADC_CFGR_AWDCH(AnalogWDGConfig->Channel) ); + 3068 .loc 1 2067 73 view .LVU890 + 3069 002c 2043 orrs r0, r4 +2067:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** ADC_CFGR_AWDCH(AnalogWDGConfig->Channel) ); + 3070 .loc 1 2067 27 view .LVU891 + 3071 002e 0243 orrs r2, r0 + 3072 0030 EA60 str r2, [r5, #12] +2072:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** tmpAWDLowThresholdShifted = ADC_AWD1THRESHOLD_SHIFT_RESOLUTION(hadc, AnalogWDGConfig->LowThres + 3073 .loc 1 2072 5 is_stmt 1 view .LVU892 +2072:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** tmpAWDLowThresholdShifted = ADC_AWD1THRESHOLD_SHIFT_RESOLUTION(hadc, AnalogWDGConfig->LowThres + 3074 .loc 1 2072 34 is_stmt 0 view .LVU893 + 3075 0032 CD68 ldr r5, [r1, #12] + 3076 0034 1C68 ldr r4, [r3] + 3077 0036 E268 ldr r2, [r4, #12] + 3078 0038 D208 lsrs r2, r2, #3 + 3079 003a 0320 movs r0, #3 + 3080 003c 0240 ands r2, r0 + 3081 003e 5200 lsls r2, r2, #1 +2072:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** tmpAWDLowThresholdShifted = ADC_AWD1THRESHOLD_SHIFT_RESOLUTION(hadc, AnalogWDGConfig->LowThres + 3082 .loc 1 2072 32 view .LVU894 + 3083 0040 9540 lsls r5, r5, r2 + ARM GAS /tmp/cc2rPMmj.s page 112 + + + 3084 0042 2A00 movs r2, r5 + 3085 .LVL211: +2073:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** + 3086 .loc 1 2073 5 is_stmt 1 view .LVU895 +2073:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** + 3087 .loc 1 2073 34 is_stmt 0 view .LVU896 + 3088 0044 0D69 ldr r5, [r1, #16] + 3089 0046 E668 ldr r6, [r4, #12] + 3090 0048 F608 lsrs r6, r6, #3 + 3091 004a 3040 ands r0, r6 + 3092 004c 4000 lsls r0, r0, #1 +2073:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** + 3093 .loc 1 2073 32 view .LVU897 + 3094 004e 8540 lsls r5, r5, r0 + 3095 .LVL212: +2076:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** hadc->Instance->TR |= ( ADC_TRX_HIGHTHRESHOLD (tmpAWDHighThresholdShifted) | + 3096 .loc 1 2076 5 is_stmt 1 view .LVU898 +2076:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** hadc->Instance->TR |= ( ADC_TRX_HIGHTHRESHOLD (tmpAWDHighThresholdShifted) | + 3097 .loc 1 2076 19 is_stmt 0 view .LVU899 + 3098 0050 206A ldr r0, [r4, #32] +2076:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** hadc->Instance->TR |= ( ADC_TRX_HIGHTHRESHOLD (tmpAWDHighThresholdShifted) | + 3099 .loc 1 2076 24 view .LVU900 + 3100 0052 144E ldr r6, .L236+4 + 3101 0054 3040 ands r0, r6 + 3102 0056 2062 str r0, [r4, #32] +2077:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** tmpAWDLowThresholdShifted ); + 3103 .loc 1 2077 5 is_stmt 1 view .LVU901 +2077:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** tmpAWDLowThresholdShifted ); + 3104 .loc 1 2077 9 is_stmt 0 view .LVU902 + 3105 0058 1C68 ldr r4, [r3] +2077:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** tmpAWDLowThresholdShifted ); + 3106 .loc 1 2077 19 view .LVU903 + 3107 005a 206A ldr r0, [r4, #32] +2077:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** tmpAWDLowThresholdShifted ); + 3108 .loc 1 2077 30 view .LVU904 + 3109 005c 1204 lsls r2, r2, #16 + 3110 .LVL213: +2077:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** tmpAWDLowThresholdShifted ); + 3111 .loc 1 2077 81 view .LVU905 + 3112 005e 2A43 orrs r2, r5 +2077:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** tmpAWDLowThresholdShifted ); + 3113 .loc 1 2077 24 view .LVU906 + 3114 0060 0243 orrs r2, r0 + 3115 0062 2262 str r2, [r4, #32] +2083:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** + 3116 .loc 1 2083 5 is_stmt 1 view .LVU907 + 3117 0064 1A68 ldr r2, [r3] + 3118 0066 8020 movs r0, #128 + 3119 0068 1060 str r0, [r2] +2086:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** { + 3120 .loc 1 2086 5 view .LVU908 +2086:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** { + 3121 .loc 1 2086 23 is_stmt 0 view .LVU909 + 3122 006a 0A7A ldrb r2, [r1, #8] +2086:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** { + 3123 .loc 1 2086 7 view .LVU910 + 3124 006c 012A cmp r2, #1 + ARM GAS /tmp/cc2rPMmj.s page 113 + + + 3125 006e 06D0 beq .L235 +2094:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** } + 3126 .loc 1 2094 7 is_stmt 1 view .LVU911 + 3127 0070 1968 ldr r1, [r3] + 3128 .LVL214: +2094:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** } + 3129 .loc 1 2094 7 is_stmt 0 view .LVU912 + 3130 0072 4A68 ldr r2, [r1, #4] + 3131 0074 8020 movs r0, #128 + 3132 0076 8243 bics r2, r0 + 3133 0078 4A60 str r2, [r1, #4] +2029:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** + 3134 .loc 1 2029 21 view .LVU913 + 3135 007a 0020 movs r0, #0 + 3136 007c 0AE0 b .L233 + 3137 .LVL215: + 3138 .L235: +2089:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** } + 3139 .loc 1 2089 7 is_stmt 1 view .LVU914 + 3140 007e 1968 ldr r1, [r3] + 3141 .LVL216: +2089:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** } + 3142 .loc 1 2089 7 is_stmt 0 view .LVU915 + 3143 0080 4A68 ldr r2, [r1, #4] + 3144 0082 0243 orrs r2, r0 + 3145 0084 4A60 str r2, [r1, #4] +2029:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** + 3146 .loc 1 2029 21 view .LVU916 + 3147 0086 0020 movs r0, #0 + 3148 0088 04E0 b .L233 + 3149 .LVL217: + 3150 .L231: +2103:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** + 3151 .loc 1 2103 5 is_stmt 1 view .LVU917 + 3152 008a 9A6B ldr r2, [r3, #56] + 3153 008c 2021 movs r1, #32 + 3154 .LVL218: +2103:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** + 3155 .loc 1 2103 5 is_stmt 0 view .LVU918 + 3156 008e 0A43 orrs r2, r1 + 3157 0090 9A63 str r2, [r3, #56] +2105:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** } + 3158 .loc 1 2105 5 is_stmt 1 view .LVU919 + 3159 .LVL219: +2105:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** } + 3160 .loc 1 2105 20 is_stmt 0 view .LVU920 + 3161 0092 0120 movs r0, #1 + 3162 .LVL220: + 3163 .L233: +2110:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** + 3164 .loc 1 2110 3 is_stmt 1 view .LVU921 +2110:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** + 3165 .loc 1 2110 3 view .LVU922 + 3166 0094 3422 movs r2, #52 + 3167 0096 0021 movs r1, #0 + 3168 0098 9954 strb r1, [r3, r2] +2110:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** + ARM GAS /tmp/cc2rPMmj.s page 114 + + + 3169 .loc 1 2110 3 view .LVU923 +2113:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** } + 3170 .loc 1 2113 3 view .LVU924 + 3171 .LVL221: + 3172 .L230: +2114:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** + 3173 .loc 1 2114 1 is_stmt 0 view .LVU925 + 3174 @ sp needed + 3175 009a 70BD pop {r4, r5, r6, pc} + 3176 .LVL222: + 3177 .L234: +2049:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** + 3178 .loc 1 2049 3 discriminator 1 view .LVU926 + 3179 009c 0220 movs r0, #2 + 3180 .LVL223: +2049:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** + 3181 .loc 1 2049 3 discriminator 1 view .LVU927 + 3182 009e FCE7 b .L230 + 3183 .L237: + 3184 .align 2 + 3185 .L236: + 3186 00a0 FFFF3F83 .word -2092957697 + 3187 00a4 00F000F0 .word -268374016 + 3188 .cfi_endproc + 3189 .LFE59: + 3191 .section .text.HAL_ADC_GetState,"ax",%progbits + 3192 .align 1 + 3193 .global HAL_ADC_GetState + 3194 .syntax unified + 3195 .code 16 + 3196 .thumb_func + 3198 HAL_ADC_GetState: + 3199 .LVL224: + 3200 .LFB60: +2150:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** /* Check the parameters */ + 3201 .loc 1 2150 1 is_stmt 1 view -0 + 3202 .cfi_startproc + 3203 @ args = 0, pretend = 0, frame = 0 + 3204 @ frame_needed = 0, uses_anonymous_args = 0 + 3205 @ link register save eliminated. +2152:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** + 3206 .loc 1 2152 3 view .LVU929 +2155:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** } + 3207 .loc 1 2155 3 view .LVU930 +2155:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** } + 3208 .loc 1 2155 14 is_stmt 0 view .LVU931 + 3209 0000 806B ldr r0, [r0, #56] + 3210 .LVL225: +2156:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** + 3211 .loc 1 2156 1 view .LVU932 + 3212 @ sp needed + 3213 0002 7047 bx lr + 3214 .cfi_endproc + 3215 .LFE60: + 3217 .section .text.HAL_ADC_GetError,"ax",%progbits + 3218 .align 1 + 3219 .global HAL_ADC_GetError + ARM GAS /tmp/cc2rPMmj.s page 115 + + + 3220 .syntax unified + 3221 .code 16 + 3222 .thumb_func + 3224 HAL_ADC_GetError: + 3225 .LVL226: + 3226 .LFB61: +2164:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** return hadc->ErrorCode; + 3227 .loc 1 2164 1 is_stmt 1 view -0 + 3228 .cfi_startproc + 3229 @ args = 0, pretend = 0, frame = 0 + 3230 @ frame_needed = 0, uses_anonymous_args = 0 + 3231 @ link register save eliminated. +2165:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** } + 3232 .loc 1 2165 3 view .LVU934 +2165:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** } + 3233 .loc 1 2165 14 is_stmt 0 view .LVU935 + 3234 0000 C06B ldr r0, [r0, #60] + 3235 .LVL227: +2166:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** + 3236 .loc 1 2166 1 view .LVU936 + 3237 @ sp needed + 3238 0002 7047 bx lr + 3239 .cfi_endproc + 3240 .LFE61: + 3242 .text + 3243 .Letext0: + 3244 .file 2 "/home/chiangni/.config/VSCodium/User/globalStorage/bmd.stm32-for-vscode/@xpack-dev-tools/ + 3245 .file 3 "/home/chiangni/.config/VSCodium/User/globalStorage/bmd.stm32-for-vscode/@xpack-dev-tools/ + 3246 .file 4 "Drivers/CMSIS/Device/ST/STM32F0xx/Include/stm32f042x6.h" + 3247 .file 5 "Drivers/CMSIS/Device/ST/STM32F0xx/Include/stm32f0xx.h" + 3248 .file 6 "Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_def.h" + 3249 .file 7 "Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_dma.h" + 3250 .file 8 "Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_adc.h" + 3251 .file 9 "Drivers/CMSIS/Device/ST/STM32F0xx/Include/system_stm32f0xx.h" + 3252 .file 10 "Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal.h" + ARM GAS /tmp/cc2rPMmj.s page 116 + + +DEFINED SYMBOLS + *ABS*:00000000 stm32f0xx_hal_adc.c + /tmp/cc2rPMmj.s:19 .text.ADC_ConversionStop:00000000 $t + /tmp/cc2rPMmj.s:24 .text.ADC_ConversionStop:00000000 ADC_ConversionStop + /tmp/cc2rPMmj.s:135 .text.ADC_Disable:00000000 $t + /tmp/cc2rPMmj.s:140 .text.ADC_Disable:00000000 ADC_Disable + /tmp/cc2rPMmj.s:282 .text.ADC_Enable:00000000 $t + /tmp/cc2rPMmj.s:287 .text.ADC_Enable:00000000 ADC_Enable + /tmp/cc2rPMmj.s:453 .text.ADC_Enable:000000a4 $d + /tmp/cc2rPMmj.s:460 .text.HAL_ADC_MspInit:00000000 $t + /tmp/cc2rPMmj.s:466 .text.HAL_ADC_MspInit:00000000 HAL_ADC_MspInit + /tmp/cc2rPMmj.s:482 .text.HAL_ADC_Init:00000000 $t + /tmp/cc2rPMmj.s:488 .text.HAL_ADC_Init:00000000 HAL_ADC_Init + /tmp/cc2rPMmj.s:851 .text.HAL_ADC_Init:00000178 $d + /tmp/cc2rPMmj.s:858 .text.HAL_ADC_MspDeInit:00000000 $t + /tmp/cc2rPMmj.s:864 .text.HAL_ADC_MspDeInit:00000000 HAL_ADC_MspDeInit + /tmp/cc2rPMmj.s:880 .text.HAL_ADC_DeInit:00000000 $t + /tmp/cc2rPMmj.s:886 .text.HAL_ADC_DeInit:00000000 HAL_ADC_DeInit + /tmp/cc2rPMmj.s:1045 .text.HAL_ADC_DeInit:00000090 $d + /tmp/cc2rPMmj.s:1053 .text.HAL_ADC_Start:00000000 $t + /tmp/cc2rPMmj.s:1059 .text.HAL_ADC_Start:00000000 HAL_ADC_Start + /tmp/cc2rPMmj.s:1166 .text.HAL_ADC_Start:0000005c $d + /tmp/cc2rPMmj.s:1171 .text.HAL_ADC_Stop:00000000 $t + /tmp/cc2rPMmj.s:1177 .text.HAL_ADC_Stop:00000000 HAL_ADC_Stop + /tmp/cc2rPMmj.s:1260 .text.HAL_ADC_Stop:00000040 $d + /tmp/cc2rPMmj.s:1265 .text.HAL_ADC_PollForConversion:00000000 $t + /tmp/cc2rPMmj.s:1271 .text.HAL_ADC_PollForConversion:00000000 HAL_ADC_PollForConversion + /tmp/cc2rPMmj.s:1468 .text.HAL_ADC_PollForConversion:000000c4 $d + /tmp/cc2rPMmj.s:1473 .text.HAL_ADC_PollForEvent:00000000 $t + /tmp/cc2rPMmj.s:1479 .text.HAL_ADC_PollForEvent:00000000 HAL_ADC_PollForEvent + /tmp/cc2rPMmj.s:1620 .text.HAL_ADC_Start_IT:00000000 $t + /tmp/cc2rPMmj.s:1626 .text.HAL_ADC_Start_IT:00000000 HAL_ADC_Start_IT + /tmp/cc2rPMmj.s:1763 .text.HAL_ADC_Start_IT:00000084 $d + /tmp/cc2rPMmj.s:1768 .text.HAL_ADC_Stop_IT:00000000 $t + /tmp/cc2rPMmj.s:1774 .text.HAL_ADC_Stop_IT:00000000 HAL_ADC_Stop_IT + /tmp/cc2rPMmj.s:1863 .text.HAL_ADC_Stop_IT:0000004c $d + /tmp/cc2rPMmj.s:1868 .text.HAL_ADC_Start_DMA:00000000 $t + /tmp/cc2rPMmj.s:1874 .text.HAL_ADC_Start_DMA:00000000 HAL_ADC_Start_DMA + /tmp/cc2rPMmj.s:2033 .text.HAL_ADC_Start_DMA:00000098 $d + /tmp/cc2rPMmj.s:2246 .text.ADC_DMAConvCplt:00000000 ADC_DMAConvCplt + /tmp/cc2rPMmj.s:2386 .text.ADC_DMAHalfConvCplt:00000000 ADC_DMAHalfConvCplt + /tmp/cc2rPMmj.s:2461 .text.ADC_DMAError:00000000 ADC_DMAError + /tmp/cc2rPMmj.s:2041 .text.HAL_ADC_Stop_DMA:00000000 $t + /tmp/cc2rPMmj.s:2047 .text.HAL_ADC_Stop_DMA:00000000 HAL_ADC_Stop_DMA + /tmp/cc2rPMmj.s:2186 .text.HAL_ADC_Stop_DMA:00000080 $d + /tmp/cc2rPMmj.s:2191 .text.HAL_ADC_GetValue:00000000 $t + /tmp/cc2rPMmj.s:2197 .text.HAL_ADC_GetValue:00000000 HAL_ADC_GetValue + /tmp/cc2rPMmj.s:2219 .text.HAL_ADC_ConvCpltCallback:00000000 $t + /tmp/cc2rPMmj.s:2225 .text.HAL_ADC_ConvCpltCallback:00000000 HAL_ADC_ConvCpltCallback + /tmp/cc2rPMmj.s:2241 .text.ADC_DMAConvCplt:00000000 $t + /tmp/cc2rPMmj.s:2354 .text.ADC_DMAConvCplt:0000006c $d + /tmp/cc2rPMmj.s:2359 .text.HAL_ADC_ConvHalfCpltCallback:00000000 $t + /tmp/cc2rPMmj.s:2365 .text.HAL_ADC_ConvHalfCpltCallback:00000000 HAL_ADC_ConvHalfCpltCallback + /tmp/cc2rPMmj.s:2381 .text.ADC_DMAHalfConvCplt:00000000 $t + /tmp/cc2rPMmj.s:2412 .text.HAL_ADC_LevelOutOfWindowCallback:00000000 $t + /tmp/cc2rPMmj.s:2418 .text.HAL_ADC_LevelOutOfWindowCallback:00000000 HAL_ADC_LevelOutOfWindowCallback + /tmp/cc2rPMmj.s:2434 .text.HAL_ADC_ErrorCallback:00000000 $t + ARM GAS /tmp/cc2rPMmj.s page 117 + + + /tmp/cc2rPMmj.s:2440 .text.HAL_ADC_ErrorCallback:00000000 HAL_ADC_ErrorCallback + /tmp/cc2rPMmj.s:2456 .text.ADC_DMAError:00000000 $t + /tmp/cc2rPMmj.s:2497 .text.HAL_ADC_IRQHandler:00000000 $t + /tmp/cc2rPMmj.s:2503 .text.HAL_ADC_IRQHandler:00000000 HAL_ADC_IRQHandler + /tmp/cc2rPMmj.s:2694 .text.HAL_ADC_IRQHandler:000000cc $d + /tmp/cc2rPMmj.s:2699 .text.HAL_ADC_ConfigChannel:00000000 $t + /tmp/cc2rPMmj.s:2705 .text.HAL_ADC_ConfigChannel:00000000 HAL_ADC_ConfigChannel + /tmp/cc2rPMmj.s:2988 .text.HAL_ADC_ConfigChannel:0000011c $d + /tmp/cc2rPMmj.s:2999 .text.HAL_ADC_AnalogWDGConfig:00000000 $t + /tmp/cc2rPMmj.s:3005 .text.HAL_ADC_AnalogWDGConfig:00000000 HAL_ADC_AnalogWDGConfig + /tmp/cc2rPMmj.s:3186 .text.HAL_ADC_AnalogWDGConfig:000000a0 $d + /tmp/cc2rPMmj.s:3192 .text.HAL_ADC_GetState:00000000 $t + /tmp/cc2rPMmj.s:3198 .text.HAL_ADC_GetState:00000000 HAL_ADC_GetState + /tmp/cc2rPMmj.s:3218 .text.HAL_ADC_GetError:00000000 $t + /tmp/cc2rPMmj.s:3224 .text.HAL_ADC_GetError:00000000 HAL_ADC_GetError + +UNDEFINED SYMBOLS +HAL_GetTick +__aeabi_uidiv +SystemCoreClock +HAL_DMA_Start_IT +HAL_DMA_Abort diff --git a/Software/build/stm32f0xx_hal_adc.o b/Software/build/stm32f0xx_hal_adc.o new file mode 100644 index 0000000..401e62f Binary files /dev/null and b/Software/build/stm32f0xx_hal_adc.o differ diff --git a/Software/build/stm32f0xx_hal_adc_ex.d b/Software/build/stm32f0xx_hal_adc_ex.d new file mode 100644 index 0000000..3b995e4 --- /dev/null +++ b/Software/build/stm32f0xx_hal_adc_ex.d @@ -0,0 +1,60 @@ +build/stm32f0xx_hal_adc_ex.o: \ + Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc_ex.c \ + Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal.h \ + Core/Inc/stm32f0xx_hal_conf.h \ + Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_rcc.h \ + Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_def.h \ + Drivers/CMSIS/Device/ST/STM32F0xx/Include/stm32f0xx.h \ + Drivers/CMSIS/Device/ST/STM32F0xx/Include/stm32f042x6.h \ + Drivers/CMSIS/Include/core_cm0.h Drivers/CMSIS/Include/cmsis_version.h \ + Drivers/CMSIS/Include/cmsis_compiler.h Drivers/CMSIS/Include/cmsis_gcc.h \ + Drivers/CMSIS/Device/ST/STM32F0xx/Include/system_stm32f0xx.h \ + Drivers/STM32F0xx_HAL_Driver/Inc/Legacy/stm32_hal_legacy.h \ + Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_rcc_ex.h \ + Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_gpio.h \ + Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_gpio_ex.h \ + Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_exti.h \ + Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_dma.h \ + Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_dma_ex.h \ + Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_cortex.h \ + Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_adc.h \ + Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_adc_ex.h \ + Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_can.h \ + Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_flash.h \ + Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_flash_ex.h \ + Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_i2c.h \ + Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_i2c_ex.h \ + Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_pwr.h \ + Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_pwr_ex.h \ + Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_tim.h \ + Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_tim_ex.h +Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal.h: +Core/Inc/stm32f0xx_hal_conf.h: +Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_rcc.h: +Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_def.h: +Drivers/CMSIS/Device/ST/STM32F0xx/Include/stm32f0xx.h: +Drivers/CMSIS/Device/ST/STM32F0xx/Include/stm32f042x6.h: +Drivers/CMSIS/Include/core_cm0.h: +Drivers/CMSIS/Include/cmsis_version.h: +Drivers/CMSIS/Include/cmsis_compiler.h: +Drivers/CMSIS/Include/cmsis_gcc.h: +Drivers/CMSIS/Device/ST/STM32F0xx/Include/system_stm32f0xx.h: +Drivers/STM32F0xx_HAL_Driver/Inc/Legacy/stm32_hal_legacy.h: +Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_rcc_ex.h: +Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_gpio.h: +Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_gpio_ex.h: +Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_exti.h: +Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_dma.h: +Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_dma_ex.h: +Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_cortex.h: +Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_adc.h: +Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_adc_ex.h: +Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_can.h: +Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_flash.h: +Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_flash_ex.h: +Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_i2c.h: +Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_i2c_ex.h: +Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_pwr.h: +Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_pwr_ex.h: +Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_tim.h: +Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_tim_ex.h: diff --git a/Software/build/stm32f0xx_hal_adc_ex.lst b/Software/build/stm32f0xx_hal_adc_ex.lst new file mode 100644 index 0000000..7604dda --- /dev/null +++ b/Software/build/stm32f0xx_hal_adc_ex.lst @@ -0,0 +1,424 @@ +ARM GAS /tmp/ccDXVDeO.s page 1 + + + 1 .cpu cortex-m0 + 2 .arch armv6s-m + 3 .fpu softvfp + 4 .eabi_attribute 20, 1 + 5 .eabi_attribute 21, 1 + 6 .eabi_attribute 23, 3 + 7 .eabi_attribute 24, 1 + 8 .eabi_attribute 25, 1 + 9 .eabi_attribute 26, 1 + 10 .eabi_attribute 30, 1 + 11 .eabi_attribute 34, 0 + 12 .eabi_attribute 18, 4 + 13 .file "stm32f0xx_hal_adc_ex.c" + 14 .text + 15 .Ltext0: + 16 .cfi_sections .debug_frame + 17 .file 1 "Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc_ex.c" + 18 .section .text.HAL_ADCEx_Calibration_Start,"ax",%progbits + 19 .align 1 + 20 .global HAL_ADCEx_Calibration_Start + 21 .syntax unified + 22 .code 16 + 23 .thumb_func + 25 HAL_ADCEx_Calibration_Start: + 26 .LVL0: + 27 .LFB40: + 1:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc_ex.c **** /** + 2:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc_ex.c **** ****************************************************************************** + 3:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc_ex.c **** * @file stm32f0xx_hal_adc_ex.c + 4:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc_ex.c **** * @author MCD Application Team + 5:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc_ex.c **** * @brief This file provides firmware functions to manage the following + 6:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc_ex.c **** * functionalities of the Analog to Digital Convertor (ADC) + 7:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc_ex.c **** * peripheral: + 8:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc_ex.c **** * + Peripheral Control functions + 9:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc_ex.c **** * Other functions (generic functions) are available in file + 10:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc_ex.c **** * "stm32f0xx_hal_adc.c". + 11:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc_ex.c **** * + 12:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc_ex.c **** ****************************************************************************** + 13:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc_ex.c **** * @attention + 14:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc_ex.c **** * + 15:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc_ex.c **** * Copyright (c) 2016 STMicroelectronics. + 16:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc_ex.c **** * All rights reserved. + 17:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc_ex.c **** * + 18:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc_ex.c **** * This software is licensed under terms that can be found in the LICENSE file + 19:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc_ex.c **** * in the root directory of this software component. + 20:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc_ex.c **** * If no LICENSE file comes with this software, it is provided AS-IS. + 21:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc_ex.c **** * + 22:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc_ex.c **** ****************************************************************************** + 23:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc_ex.c **** @verbatim + 24:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc_ex.c **** [..] + 25:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc_ex.c **** (@) Sections "ADC peripheral features" and "How to use this driver" are + 26:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc_ex.c **** available in file of generic functions "stm32l1xx_hal_adc.c". + 27:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc_ex.c **** [..] + 28:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc_ex.c **** @endverbatim + 29:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc_ex.c **** */ + 30:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc_ex.c **** + 31:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc_ex.c **** /* Includes ------------------------------------------------------------------*/ + ARM GAS /tmp/ccDXVDeO.s page 2 + + + 32:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc_ex.c **** #include "stm32f0xx_hal.h" + 33:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc_ex.c **** + 34:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc_ex.c **** /** @addtogroup STM32F0xx_HAL_Driver + 35:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc_ex.c **** * @{ + 36:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc_ex.c **** */ + 37:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc_ex.c **** + 38:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc_ex.c **** /** @defgroup ADCEx ADCEx + 39:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc_ex.c **** * @brief ADC HAL module driver + 40:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc_ex.c **** * @{ + 41:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc_ex.c **** */ + 42:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc_ex.c **** + 43:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc_ex.c **** #ifdef HAL_ADC_MODULE_ENABLED + 44:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc_ex.c **** + 45:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc_ex.c **** /* Private typedef -----------------------------------------------------------*/ + 46:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc_ex.c **** /* Private define ------------------------------------------------------------*/ + 47:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc_ex.c **** /** @defgroup ADCEx_Private_Constants ADCEx Private Constants + 48:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc_ex.c **** * @{ + 49:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc_ex.c **** */ + 50:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc_ex.c **** + 51:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc_ex.c **** /* Fixed timeout values for ADC calibration, enable settling time, disable */ + 52:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc_ex.c **** /* settling time. */ + 53:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc_ex.c **** /* Values defined to be higher than worst cases: low clock frequency, */ + 54:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc_ex.c **** /* maximum prescaler. */ + 55:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc_ex.c **** /* Ex of profile low frequency : Clock source at 0.1 MHz, ADC clock */ + 56:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc_ex.c **** /* prescaler 4. */ + 57:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc_ex.c **** /* Unit: ms */ + 58:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc_ex.c **** #define ADC_DISABLE_TIMEOUT 2 + 59:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc_ex.c **** #define ADC_CALIBRATION_TIMEOUT 2U + 60:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc_ex.c **** /** + 61:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc_ex.c **** * @} + 62:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc_ex.c **** */ + 63:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc_ex.c **** + 64:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc_ex.c **** /* Private macros -------------------------------------------------------------*/ + 65:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc_ex.c **** /* Private variables ---------------------------------------------------------*/ + 66:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc_ex.c **** /* Private function prototypes -----------------------------------------------*/ + 67:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc_ex.c **** /* Private functions ---------------------------------------------------------*/ + 68:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc_ex.c **** + 69:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc_ex.c **** /** @defgroup ADCEx_Exported_Functions ADCEx Exported Functions + 70:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc_ex.c **** * @{ + 71:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc_ex.c **** */ + 72:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc_ex.c **** + 73:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc_ex.c **** /** @defgroup ADCEx_Exported_Functions_Group1 Extended Initialization/de-initialization functions + 74:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc_ex.c **** * @brief Extended Initialization and Configuration functions + 75:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc_ex.c **** * + 76:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc_ex.c **** @verbatim + 77:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc_ex.c **** =============================================================================== + 78:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc_ex.c **** ##### IO operation functions ##### + 79:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc_ex.c **** =============================================================================== + 80:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc_ex.c **** [..] This section provides functions allowing to: + 81:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc_ex.c **** (+) Perform the ADC calibration. + 82:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc_ex.c **** @endverbatim + 83:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc_ex.c **** * @{ + 84:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc_ex.c **** */ + 85:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc_ex.c **** + 86:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc_ex.c **** /** + 87:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc_ex.c **** * @brief Perform an ADC automatic self-calibration + 88:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc_ex.c **** * Calibration prerequisite: ADC must be disabled (execute this + ARM GAS /tmp/ccDXVDeO.s page 3 + + + 89:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc_ex.c **** * function before HAL_ADC_Start() or after HAL_ADC_Stop() ). + 90:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc_ex.c **** * @note Calibration factor can be read after calibration, using function + 91:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc_ex.c **** * HAL_ADC_GetValue() (value on 7 bits: from DR[6;0]). + 92:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc_ex.c **** * @param hadc ADC handle + 93:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc_ex.c **** * @retval HAL status + 94:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc_ex.c **** */ + 95:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc_ex.c **** HAL_StatusTypeDef HAL_ADCEx_Calibration_Start(ADC_HandleTypeDef* hadc) + 96:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc_ex.c **** { + 28 .loc 1 96 1 view -0 + 29 .cfi_startproc + 30 @ args = 0, pretend = 0, frame = 0 + 31 @ frame_needed = 0, uses_anonymous_args = 0 + 32 .loc 1 96 1 is_stmt 0 view .LVU1 + 33 0000 70B5 push {r4, r5, r6, lr} + 34 .cfi_def_cfa_offset 16 + 35 .cfi_offset 4, -16 + 36 .cfi_offset 5, -12 + 37 .cfi_offset 6, -8 + 38 .cfi_offset 14, -4 + 39 0002 0400 movs r4, r0 + 97:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc_ex.c **** HAL_StatusTypeDef tmp_hal_status = HAL_OK; + 40 .loc 1 97 3 is_stmt 1 view .LVU2 + 41 .LVL1: + 98:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc_ex.c **** uint32_t tickstart = 0U; + 42 .loc 1 98 3 view .LVU3 + 99:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc_ex.c **** uint32_t backup_setting_adc_dma_transfer = 0; /* Note: Variable not declared as volatile because + 43 .loc 1 99 3 view .LVU4 + 100:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc_ex.c **** + 101:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc_ex.c **** /* Check the parameters */ + 102:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc_ex.c **** assert_param(IS_ADC_ALL_INSTANCE(hadc->Instance)); + 44 .loc 1 102 3 view .LVU5 + 103:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc_ex.c **** + 104:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc_ex.c **** /* Process locked */ + 105:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc_ex.c **** __HAL_LOCK(hadc); + 45 .loc 1 105 3 view .LVU6 + 46 .loc 1 105 3 view .LVU7 + 47 0004 3423 movs r3, #52 + 48 0006 C35C ldrb r3, [r0, r3] + 49 0008 012B cmp r3, #1 + 50 000a 50D0 beq .L8 + 51 .loc 1 105 3 discriminator 2 view .LVU8 + 52 000c 3423 movs r3, #52 + 53 000e 0122 movs r2, #1 + 54 0010 C254 strb r2, [r0, r3] + 55 .loc 1 105 3 discriminator 2 view .LVU9 + 106:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc_ex.c **** + 107:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc_ex.c **** /* Calibration prerequisite: ADC must be disabled. */ + 108:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc_ex.c **** if (ADC_IS_ENABLE(hadc) == RESET) + 56 .loc 1 108 3 view .LVU10 + 57 .loc 1 108 7 is_stmt 0 view .LVU11 + 58 0012 0368 ldr r3, [r0] + 59 0014 9968 ldr r1, [r3, #8] + 60 0016 0232 adds r2, r2, #2 + 61 0018 0A40 ands r2, r1 + 62 001a 012A cmp r2, #1 + 63 001c 05D1 bne .L3 + 64 .loc 1 108 7 discriminator 1 view .LVU12 + ARM GAS /tmp/ccDXVDeO.s page 4 + + + 65 001e 1A68 ldr r2, [r3] + 66 0020 D207 lsls r2, r2, #31 + 67 0022 3ED4 bmi .L4 + 68 .loc 1 108 7 discriminator 4 view .LVU13 + 69 0024 DA68 ldr r2, [r3, #12] + 70 0026 1204 lsls r2, r2, #16 + 71 0028 3BD4 bmi .L4 + 72 .L3: + 109:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc_ex.c **** { + 110:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc_ex.c **** /* Set ADC state */ + 111:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc_ex.c **** ADC_STATE_CLR_SET(hadc->State, + 73 .loc 1 111 5 is_stmt 1 view .LVU14 + 74 002a A26B ldr r2, [r4, #56] + 75 002c 2149 ldr r1, .L12 + 76 002e 0A40 ands r2, r1 + 77 0030 0631 adds r1, r1, #6 + 78 0032 FF31 adds r1, r1, #255 + 79 0034 0A43 orrs r2, r1 + 80 0036 A263 str r2, [r4, #56] + 112:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc_ex.c **** HAL_ADC_STATE_REG_BUSY, + 113:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc_ex.c **** HAL_ADC_STATE_BUSY_INTERNAL); + 114:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc_ex.c **** + 115:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc_ex.c **** /* Disable ADC DMA transfer request during calibration */ + 116:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc_ex.c **** /* Note: Specificity of this STM32 series: Calibration factor is */ + 117:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc_ex.c **** /* available in data register and also transferred by DMA. */ + 118:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc_ex.c **** /* To not insert ADC calibration factor among ADC conversion data */ + 119:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc_ex.c **** /* in array variable, DMA transfer must be disabled during */ + 120:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc_ex.c **** /* calibration. */ + 121:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc_ex.c **** backup_setting_adc_dma_transfer = READ_BIT(hadc->Instance->CFGR1, ADC_CFGR1_DMAEN | ADC_CFGR1_D + 81 .loc 1 121 5 view .LVU15 + 82 .loc 1 121 39 is_stmt 0 view .LVU16 + 83 0038 DE68 ldr r6, [r3, #12] + 84 .loc 1 121 37 view .LVU17 + 85 003a 0131 adds r1, r1, #1 + 86 003c 0E40 ands r6, r1 + 87 .LVL2: + 122:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc_ex.c **** CLEAR_BIT(hadc->Instance->CFGR1, ADC_CFGR1_DMAEN | ADC_CFGR1_DMACFG); + 88 .loc 1 122 5 is_stmt 1 view .LVU18 + 89 003e DA68 ldr r2, [r3, #12] + 90 0040 8A43 bics r2, r1 + 91 0042 DA60 str r2, [r3, #12] + 123:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc_ex.c **** + 124:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc_ex.c **** /* Start ADC calibration */ + 125:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc_ex.c **** hadc->Instance->CR |= ADC_CR_ADCAL; + 92 .loc 1 125 5 view .LVU19 + 93 .loc 1 125 9 is_stmt 0 view .LVU20 + 94 0044 2268 ldr r2, [r4] + 95 .loc 1 125 19 view .LVU21 + 96 0046 9168 ldr r1, [r2, #8] + 97 .loc 1 125 24 view .LVU22 + 98 0048 8023 movs r3, #128 + 99 004a 1B06 lsls r3, r3, #24 + 100 004c 0B43 orrs r3, r1 + 101 004e 9360 str r3, [r2, #8] + 126:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc_ex.c **** + 127:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc_ex.c **** tickstart = HAL_GetTick(); + 102 .loc 1 127 5 is_stmt 1 view .LVU23 + ARM GAS /tmp/ccDXVDeO.s page 5 + + + 103 .loc 1 127 17 is_stmt 0 view .LVU24 + 104 0050 FFF7FEFF bl HAL_GetTick + 105 .LVL3: + 106 .loc 1 127 17 view .LVU25 + 107 0054 0500 movs r5, r0 + 108 .LVL4: + 128:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc_ex.c **** + 129:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc_ex.c **** /* Wait for calibration completion */ + 130:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc_ex.c **** while(HAL_IS_BIT_SET(hadc->Instance->CR, ADC_CR_ADCAL)) + 109 .loc 1 130 5 is_stmt 1 view .LVU26 + 110 .L5: + 111 .loc 1 130 11 view .LVU27 + 112 0056 2368 ldr r3, [r4] + 113 0058 9A68 ldr r2, [r3, #8] + 114 005a 002A cmp r2, #0 + 115 005c 13DA bge .L11 + 131:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc_ex.c **** { + 132:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc_ex.c **** if((HAL_GetTick() - tickstart) > ADC_CALIBRATION_TIMEOUT) + 116 .loc 1 132 7 view .LVU28 + 117 .loc 1 132 11 is_stmt 0 view .LVU29 + 118 005e FFF7FEFF bl HAL_GetTick + 119 .LVL5: + 120 .loc 1 132 25 discriminator 1 view .LVU30 + 121 0062 401B subs r0, r0, r5 + 122 .loc 1 132 9 discriminator 1 view .LVU31 + 123 0064 0228 cmp r0, #2 + 124 0066 F6D9 bls .L5 + 133:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc_ex.c **** { + 134:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc_ex.c **** /* New check to avoid false timeout detection in case of preemption */ + 135:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc_ex.c **** if(HAL_IS_BIT_SET(hadc->Instance->CR, ADC_CR_ADCAL)) + 125 .loc 1 135 9 is_stmt 1 view .LVU32 + 126 .loc 1 135 12 is_stmt 0 view .LVU33 + 127 0068 2368 ldr r3, [r4] + 128 006a 9B68 ldr r3, [r3, #8] + 129 .loc 1 135 11 view .LVU34 + 130 006c 002B cmp r3, #0 + 131 006e F2DA bge .L5 + 136:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc_ex.c **** { + 137:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc_ex.c **** /* Update ADC state machine to error */ + 138:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc_ex.c **** ADC_STATE_CLR_SET(hadc->State, + 132 .loc 1 138 11 is_stmt 1 view .LVU35 + 133 0070 A36B ldr r3, [r4, #56] + 134 0072 1222 movs r2, #18 + 135 0074 9343 bics r3, r2 + 136 0076 023A subs r2, r2, #2 + 137 0078 1343 orrs r3, r2 + 138 007a A363 str r3, [r4, #56] + 139:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc_ex.c **** HAL_ADC_STATE_BUSY_INTERNAL, + 140:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc_ex.c **** HAL_ADC_STATE_ERROR_INTERNAL); + 141:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc_ex.c **** + 142:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc_ex.c **** /* Process unlocked */ + 143:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc_ex.c **** __HAL_UNLOCK(hadc); + 139 .loc 1 143 11 view .LVU36 + 140 .loc 1 143 11 view .LVU37 + 141 007c 3423 movs r3, #52 + 142 007e 0022 movs r2, #0 + 143 0080 E254 strb r2, [r4, r3] + ARM GAS /tmp/ccDXVDeO.s page 6 + + + 144 .loc 1 143 11 view .LVU38 + 144:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc_ex.c **** + 145:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc_ex.c **** return HAL_ERROR; + 145 .loc 1 145 11 view .LVU39 + 146 .loc 1 145 18 is_stmt 0 view .LVU40 + 147 0082 0120 movs r0, #1 + 148 0084 0CE0 b .L2 + 149 .L11: + 146:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc_ex.c **** } + 147:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc_ex.c **** } + 148:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc_ex.c **** } + 149:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc_ex.c **** + 150:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc_ex.c **** /* Restore ADC DMA transfer request after calibration */ + 151:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc_ex.c **** SET_BIT(hadc->Instance->CFGR1, backup_setting_adc_dma_transfer); + 150 .loc 1 151 5 is_stmt 1 view .LVU41 + 151 0086 DA68 ldr r2, [r3, #12] + 152 0088 3243 orrs r2, r6 + 153 008a DA60 str r2, [r3, #12] + 152:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc_ex.c **** + 153:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc_ex.c **** /* Set ADC state */ + 154:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc_ex.c **** ADC_STATE_CLR_SET(hadc->State, + 154 .loc 1 154 5 view .LVU42 + 155 008c A36B ldr r3, [r4, #56] + 156 008e 0322 movs r2, #3 + 157 0090 9343 bics r3, r2 + 158 0092 023A subs r2, r2, #2 + 159 0094 1343 orrs r3, r2 + 160 0096 A363 str r3, [r4, #56] + 97:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc_ex.c **** uint32_t tickstart = 0U; + 161 .loc 1 97 21 is_stmt 0 view .LVU43 + 162 0098 0020 movs r0, #0 + 163 .LVL6: + 164 .L7: + 155:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc_ex.c **** HAL_ADC_STATE_BUSY_INTERNAL, + 156:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc_ex.c **** HAL_ADC_STATE_READY); + 157:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc_ex.c **** } + 158:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc_ex.c **** else + 159:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc_ex.c **** { + 160:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc_ex.c **** /* Update ADC state machine to error */ + 161:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc_ex.c **** SET_BIT(hadc->State, HAL_ADC_STATE_ERROR_CONFIG); + 162:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc_ex.c **** + 163:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc_ex.c **** tmp_hal_status = HAL_ERROR; + 164:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc_ex.c **** } + 165:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc_ex.c **** + 166:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc_ex.c **** /* Process unlocked */ + 167:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc_ex.c **** __HAL_UNLOCK(hadc); + 165 .loc 1 167 3 is_stmt 1 view .LVU44 + 166 .loc 1 167 3 view .LVU45 + 167 009a 3423 movs r3, #52 + 168 009c 0022 movs r2, #0 + 169 009e E254 strb r2, [r4, r3] + 170 .loc 1 167 3 view .LVU46 + 168:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc_ex.c **** + 169:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc_ex.c **** /* Return function status */ + 170:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc_ex.c **** return tmp_hal_status; + 171 .loc 1 170 3 view .LVU47 + 172 .LVL7: + ARM GAS /tmp/ccDXVDeO.s page 7 + + + 173 .L2: + 171:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc_ex.c **** } + 174 .loc 1 171 1 is_stmt 0 view .LVU48 + 175 @ sp needed + 176 .LVL8: + 177 .loc 1 171 1 view .LVU49 + 178 00a0 70BD pop {r4, r5, r6, pc} + 179 .LVL9: + 180 .L4: + 161:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc_ex.c **** + 181 .loc 1 161 5 is_stmt 1 view .LVU50 + 182 00a2 A36B ldr r3, [r4, #56] + 183 00a4 2022 movs r2, #32 + 184 00a6 1343 orrs r3, r2 + 185 00a8 A363 str r3, [r4, #56] + 163:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc_ex.c **** } + 186 .loc 1 163 5 view .LVU51 + 187 .LVL10: + 163:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc_ex.c **** } + 188 .loc 1 163 20 is_stmt 0 view .LVU52 + 189 00aa 0120 movs r0, #1 + 190 .LVL11: + 163:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc_ex.c **** } + 191 .loc 1 163 20 view .LVU53 + 192 00ac F5E7 b .L7 + 193 .LVL12: + 194 .L8: + 105:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc_ex.c **** + 195 .loc 1 105 3 discriminator 1 view .LVU54 + 196 00ae 0220 movs r0, #2 + 197 .LVL13: + 105:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc_ex.c **** + 198 .loc 1 105 3 discriminator 1 view .LVU55 + 199 00b0 F6E7 b .L2 + 200 .L13: + 201 00b2 C046 .align 2 + 202 .L12: + 203 00b4 FDFEFFFF .word -259 + 204 .cfi_endproc + 205 .LFE40: + 207 .text + 208 .Letext0: + 209 .file 2 "/home/chiangni/.config/VSCodium/User/globalStorage/bmd.stm32-for-vscode/@xpack-dev-tools/ + 210 .file 3 "/home/chiangni/.config/VSCodium/User/globalStorage/bmd.stm32-for-vscode/@xpack-dev-tools/ + 211 .file 4 "Drivers/CMSIS/Device/ST/STM32F0xx/Include/stm32f042x6.h" + 212 .file 5 "Drivers/CMSIS/Device/ST/STM32F0xx/Include/stm32f0xx.h" + 213 .file 6 "Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_def.h" + 214 .file 7 "Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_dma.h" + 215 .file 8 "Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_adc.h" + 216 .file 9 "Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal.h" + ARM GAS /tmp/ccDXVDeO.s page 8 + + +DEFINED SYMBOLS + *ABS*:00000000 stm32f0xx_hal_adc_ex.c + /tmp/ccDXVDeO.s:19 .text.HAL_ADCEx_Calibration_Start:00000000 $t + /tmp/ccDXVDeO.s:25 .text.HAL_ADCEx_Calibration_Start:00000000 HAL_ADCEx_Calibration_Start + /tmp/ccDXVDeO.s:203 .text.HAL_ADCEx_Calibration_Start:000000b4 $d + +UNDEFINED SYMBOLS +HAL_GetTick diff --git a/Software/build/stm32f0xx_hal_adc_ex.o b/Software/build/stm32f0xx_hal_adc_ex.o new file mode 100644 index 0000000..8925146 Binary files /dev/null and b/Software/build/stm32f0xx_hal_adc_ex.o differ diff --git a/Software/build/stm32f0xx_hal_can.d b/Software/build/stm32f0xx_hal_can.d new file mode 100644 index 0000000..3befb9f --- /dev/null +++ b/Software/build/stm32f0xx_hal_can.d @@ -0,0 +1,60 @@ +build/stm32f0xx_hal_can.o: \ + Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c \ + Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal.h \ + Core/Inc/stm32f0xx_hal_conf.h \ + Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_rcc.h \ + Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_def.h \ + Drivers/CMSIS/Device/ST/STM32F0xx/Include/stm32f0xx.h \ + Drivers/CMSIS/Device/ST/STM32F0xx/Include/stm32f042x6.h \ + Drivers/CMSIS/Include/core_cm0.h Drivers/CMSIS/Include/cmsis_version.h \ + Drivers/CMSIS/Include/cmsis_compiler.h Drivers/CMSIS/Include/cmsis_gcc.h \ + Drivers/CMSIS/Device/ST/STM32F0xx/Include/system_stm32f0xx.h \ + Drivers/STM32F0xx_HAL_Driver/Inc/Legacy/stm32_hal_legacy.h \ + Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_rcc_ex.h \ + Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_gpio.h \ + Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_gpio_ex.h \ + Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_exti.h \ + Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_dma.h \ + Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_dma_ex.h \ + Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_cortex.h \ + Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_adc.h \ + Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_adc_ex.h \ + Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_can.h \ + Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_flash.h \ + Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_flash_ex.h \ + Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_i2c.h \ + Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_i2c_ex.h \ + Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_pwr.h \ + Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_pwr_ex.h \ + Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_tim.h \ + Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_tim_ex.h +Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal.h: +Core/Inc/stm32f0xx_hal_conf.h: +Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_rcc.h: +Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_def.h: +Drivers/CMSIS/Device/ST/STM32F0xx/Include/stm32f0xx.h: +Drivers/CMSIS/Device/ST/STM32F0xx/Include/stm32f042x6.h: +Drivers/CMSIS/Include/core_cm0.h: +Drivers/CMSIS/Include/cmsis_version.h: +Drivers/CMSIS/Include/cmsis_compiler.h: +Drivers/CMSIS/Include/cmsis_gcc.h: +Drivers/CMSIS/Device/ST/STM32F0xx/Include/system_stm32f0xx.h: +Drivers/STM32F0xx_HAL_Driver/Inc/Legacy/stm32_hal_legacy.h: +Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_rcc_ex.h: +Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_gpio.h: +Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_gpio_ex.h: +Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_exti.h: +Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_dma.h: +Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_dma_ex.h: +Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_cortex.h: +Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_adc.h: +Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_adc_ex.h: +Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_can.h: +Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_flash.h: +Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_flash_ex.h: +Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_i2c.h: +Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_i2c_ex.h: +Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_pwr.h: +Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_pwr_ex.h: +Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_tim.h: +Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_tim_ex.h: diff --git a/Software/build/stm32f0xx_hal_can.lst b/Software/build/stm32f0xx_hal_can.lst new file mode 100644 index 0000000..58c98cd --- /dev/null +++ b/Software/build/stm32f0xx_hal_can.lst @@ -0,0 +1,6705 @@ +ARM GAS /tmp/ccftcnYc.s page 1 + + + 1 .cpu cortex-m0 + 2 .arch armv6s-m + 3 .fpu softvfp + 4 .eabi_attribute 20, 1 + 5 .eabi_attribute 21, 1 + 6 .eabi_attribute 23, 3 + 7 .eabi_attribute 24, 1 + 8 .eabi_attribute 25, 1 + 9 .eabi_attribute 26, 1 + 10 .eabi_attribute 30, 1 + 11 .eabi_attribute 34, 0 + 12 .eabi_attribute 18, 4 + 13 .file "stm32f0xx_hal_can.c" + 14 .text + 15 .Ltext0: + 16 .cfi_sections .debug_frame + 17 .file 1 "Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c" + 18 .section .text.HAL_CAN_MspInit,"ax",%progbits + 19 .align 1 + 20 .weak HAL_CAN_MspInit + 21 .syntax unified + 22 .code 16 + 23 .thumb_func + 25 HAL_CAN_MspInit: + 26 .LVL0: + 27 .LFB42: + 1:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** /** + 2:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** ****************************************************************************** + 3:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** * @file stm32f0xx_hal_can.c + 4:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** * @author MCD Application Team + 5:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** * @brief CAN HAL module driver. + 6:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** * This file provides firmware functions to manage the following + 7:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** * functionalities of the Controller Area Network (CAN) peripheral: + 8:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** * + Initialization and de-initialization functions + 9:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** * + Configuration functions + 10:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** * + Control functions + 11:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** * + Interrupts management + 12:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** * + Callbacks functions + 13:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** * + Peripheral State and Error functions + 14:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** * + 15:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** ****************************************************************************** + 16:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** * @attention + 17:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** * + 18:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** * Copyright (c) 2016 STMicroelectronics. + 19:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** * All rights reserved. + 20:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** * + 21:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** * This software is licensed under terms that can be found in the LICENSE file + 22:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** * in the root directory of this software component. + 23:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** * If no LICENSE file comes with this software, it is provided AS-IS. + 24:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** * + 25:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** ****************************************************************************** + 26:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** @verbatim + 27:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** ============================================================================== + 28:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** ##### How to use this driver ##### + 29:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** ============================================================================== + 30:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** [..] + 31:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** (#) Initialize the CAN low level resources by implementing the + ARM GAS /tmp/ccftcnYc.s page 2 + + + 32:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** HAL_CAN_MspInit(): + 33:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** (++) Enable the CAN interface clock using __HAL_RCC_CANx_CLK_ENABLE() + 34:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** (++) Configure CAN pins + 35:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** (+++) Enable the clock for the CAN GPIOs + 36:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** (+++) Configure CAN pins as alternate function open-drain + 37:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** (++) In case of using interrupts (e.g. HAL_CAN_ActivateNotification()) + 38:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** (+++) Configure the CAN interrupt priority using + 39:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** HAL_NVIC_SetPriority() + 40:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** (+++) Enable the CAN IRQ handler using HAL_NVIC_EnableIRQ() + 41:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** (+++) In CAN IRQ handler, call HAL_CAN_IRQHandler() + 42:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** + 43:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** (#) Initialize the CAN peripheral using HAL_CAN_Init() function. This + 44:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** function resorts to HAL_CAN_MspInit() for low-level initialization. + 45:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** + 46:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** (#) Configure the reception filters using the following configuration + 47:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** functions: + 48:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** (++) HAL_CAN_ConfigFilter() + 49:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** + 50:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** (#) Start the CAN module using HAL_CAN_Start() function. At this level + 51:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** the node is active on the bus: it receive messages, and can send + 52:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** messages. + 53:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** + 54:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** (#) To manage messages transmission, the following Tx control functions + 55:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** can be used: + 56:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** (++) HAL_CAN_AddTxMessage() to request transmission of a new + 57:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** message. + 58:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** (++) HAL_CAN_AbortTxRequest() to abort transmission of a pending + 59:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** message. + 60:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** (++) HAL_CAN_GetTxMailboxesFreeLevel() to get the number of free Tx + 61:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** mailboxes. + 62:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** (++) HAL_CAN_IsTxMessagePending() to check if a message is pending + 63:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** in a Tx mailbox. + 64:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** (++) HAL_CAN_GetTxTimestamp() to get the timestamp of Tx message + 65:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** sent, if time triggered communication mode is enabled. + 66:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** + 67:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** (#) When a message is received into the CAN Rx FIFOs, it can be retrieved + 68:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** using the HAL_CAN_GetRxMessage() function. The function + 69:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** HAL_CAN_GetRxFifoFillLevel() allows to know how many Rx message are + 70:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** stored in the Rx Fifo. + 71:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** + 72:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** (#) Calling the HAL_CAN_Stop() function stops the CAN module. + 73:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** + 74:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** (#) The deinitialization is achieved with HAL_CAN_DeInit() function. + 75:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** + 76:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** + 77:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** *** Polling mode operation *** + 78:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** ============================== + 79:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** [..] + 80:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** (#) Reception: + 81:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** (++) Monitor reception of message using HAL_CAN_GetRxFifoFillLevel() + 82:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** until at least one message is received. + 83:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** (++) Then get the message using HAL_CAN_GetRxMessage(). + 84:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** + 85:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** (#) Transmission: + 86:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** (++) Monitor the Tx mailboxes availability until at least one Tx + 87:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** mailbox is free, using HAL_CAN_GetTxMailboxesFreeLevel(). + 88:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** (++) Then request transmission of a message using + ARM GAS /tmp/ccftcnYc.s page 3 + + + 89:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** HAL_CAN_AddTxMessage(). + 90:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** + 91:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** + 92:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** *** Interrupt mode operation *** + 93:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** ================================ + 94:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** [..] + 95:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** (#) Notifications are activated using HAL_CAN_ActivateNotification() + 96:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** function. Then, the process can be controlled through the + 97:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** available user callbacks: HAL_CAN_xxxCallback(), using same APIs + 98:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** HAL_CAN_GetRxMessage() and HAL_CAN_AddTxMessage(). + 99:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** + 100:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** (#) Notifications can be deactivated using + 101:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** HAL_CAN_DeactivateNotification() function. + 102:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** + 103:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** (#) Special care should be taken for CAN_IT_RX_FIFO0_MSG_PENDING and + 104:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** CAN_IT_RX_FIFO1_MSG_PENDING notifications. These notifications trig + 105:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** the callbacks HAL_CAN_RxFIFO0MsgPendingCallback() and + 106:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** HAL_CAN_RxFIFO1MsgPendingCallback(). User has two possible options + 107:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** here. + 108:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** (++) Directly get the Rx message in the callback, using + 109:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** HAL_CAN_GetRxMessage(). + 110:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** (++) Or deactivate the notification in the callback without + 111:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** getting the Rx message. The Rx message can then be got later + 112:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** using HAL_CAN_GetRxMessage(). Once the Rx message have been + 113:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** read, the notification can be activated again. + 114:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** + 115:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** + 116:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** *** Sleep mode *** + 117:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** ================== + 118:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** [..] + 119:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** (#) The CAN peripheral can be put in sleep mode (low power), using + 120:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** HAL_CAN_RequestSleep(). The sleep mode will be entered as soon as the + 121:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** current CAN activity (transmission or reception of a CAN frame) will + 122:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** be completed. + 123:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** + 124:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** (#) A notification can be activated to be informed when the sleep mode + 125:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** will be entered. + 126:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** + 127:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** (#) It can be checked if the sleep mode is entered using + 128:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** HAL_CAN_IsSleepActive(). + 129:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** Note that the CAN state (accessible from the API HAL_CAN_GetState()) + 130:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** is HAL_CAN_STATE_SLEEP_PENDING as soon as the sleep mode request is + 131:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** submitted (the sleep mode is not yet entered), and become + 132:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** HAL_CAN_STATE_SLEEP_ACTIVE when the sleep mode is effective. + 133:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** + 134:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** (#) The wake-up from sleep mode can be triggered by two ways: + 135:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** (++) Using HAL_CAN_WakeUp(). When returning from this function, + 136:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** the sleep mode is exited (if return status is HAL_OK). + 137:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** (++) When a start of Rx CAN frame is detected by the CAN peripheral, + 138:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** if automatic wake up mode is enabled. + 139:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** + 140:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** *** Callback registration *** + 141:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** ============================================= + 142:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** + 143:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** The compilation define USE_HAL_CAN_REGISTER_CALLBACKS when set to 1 + 144:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** allows the user to configure dynamically the driver callbacks. + 145:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** Use Function HAL_CAN_RegisterCallback() to register an interrupt callback. + ARM GAS /tmp/ccftcnYc.s page 4 + + + 146:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** + 147:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** Function HAL_CAN_RegisterCallback() allows to register following callbacks: + 148:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** (+) TxMailbox0CompleteCallback : Tx Mailbox 0 Complete Callback. + 149:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** (+) TxMailbox1CompleteCallback : Tx Mailbox 1 Complete Callback. + 150:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** (+) TxMailbox2CompleteCallback : Tx Mailbox 2 Complete Callback. + 151:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** (+) TxMailbox0AbortCallback : Tx Mailbox 0 Abort Callback. + 152:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** (+) TxMailbox1AbortCallback : Tx Mailbox 1 Abort Callback. + 153:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** (+) TxMailbox2AbortCallback : Tx Mailbox 2 Abort Callback. + 154:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** (+) RxFifo0MsgPendingCallback : Rx Fifo 0 Message Pending Callback. + 155:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** (+) RxFifo0FullCallback : Rx Fifo 0 Full Callback. + 156:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** (+) RxFifo1MsgPendingCallback : Rx Fifo 1 Message Pending Callback. + 157:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** (+) RxFifo1FullCallback : Rx Fifo 1 Full Callback. + 158:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** (+) SleepCallback : Sleep Callback. + 159:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** (+) WakeUpFromRxMsgCallback : Wake Up From Rx Message Callback. + 160:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** (+) ErrorCallback : Error Callback. + 161:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** (+) MspInitCallback : CAN MspInit. + 162:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** (+) MspDeInitCallback : CAN MspDeInit. + 163:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** This function takes as parameters the HAL peripheral handle, the Callback ID + 164:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** and a pointer to the user callback function. + 165:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** + 166:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** Use function HAL_CAN_UnRegisterCallback() to reset a callback to the default + 167:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** weak function. + 168:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** HAL_CAN_UnRegisterCallback takes as parameters the HAL peripheral handle, + 169:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** and the Callback ID. + 170:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** This function allows to reset following callbacks: + 171:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** (+) TxMailbox0CompleteCallback : Tx Mailbox 0 Complete Callback. + 172:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** (+) TxMailbox1CompleteCallback : Tx Mailbox 1 Complete Callback. + 173:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** (+) TxMailbox2CompleteCallback : Tx Mailbox 2 Complete Callback. + 174:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** (+) TxMailbox0AbortCallback : Tx Mailbox 0 Abort Callback. + 175:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** (+) TxMailbox1AbortCallback : Tx Mailbox 1 Abort Callback. + 176:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** (+) TxMailbox2AbortCallback : Tx Mailbox 2 Abort Callback. + 177:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** (+) RxFifo0MsgPendingCallback : Rx Fifo 0 Message Pending Callback. + 178:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** (+) RxFifo0FullCallback : Rx Fifo 0 Full Callback. + 179:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** (+) RxFifo1MsgPendingCallback : Rx Fifo 1 Message Pending Callback. + 180:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** (+) RxFifo1FullCallback : Rx Fifo 1 Full Callback. + 181:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** (+) SleepCallback : Sleep Callback. + 182:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** (+) WakeUpFromRxMsgCallback : Wake Up From Rx Message Callback. + 183:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** (+) ErrorCallback : Error Callback. + 184:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** (+) MspInitCallback : CAN MspInit. + 185:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** (+) MspDeInitCallback : CAN MspDeInit. + 186:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** + 187:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** By default, after the HAL_CAN_Init() and when the state is HAL_CAN_STATE_RESET, + 188:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** all callbacks are set to the corresponding weak functions: + 189:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** example HAL_CAN_ErrorCallback(). + 190:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** Exception done for MspInit and MspDeInit functions that are + 191:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** reset to the legacy weak function in the HAL_CAN_Init()/ HAL_CAN_DeInit() only when + 192:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** these callbacks are null (not registered beforehand). + 193:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** if not, MspInit or MspDeInit are not null, the HAL_CAN_Init()/ HAL_CAN_DeInit() + 194:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** keep and use the user MspInit/MspDeInit callbacks (registered beforehand) + 195:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** + 196:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** Callbacks can be registered/unregistered in HAL_CAN_STATE_READY state only. + 197:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** Exception done MspInit/MspDeInit that can be registered/unregistered + 198:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** in HAL_CAN_STATE_READY or HAL_CAN_STATE_RESET state, + 199:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** thus registered (user) MspInit/DeInit callbacks can be used during the Init/DeInit. + 200:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** In that case first register the MspInit/MspDeInit user callbacks + 201:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** using HAL_CAN_RegisterCallback() before calling HAL_CAN_DeInit() + 202:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** or HAL_CAN_Init() function. + ARM GAS /tmp/ccftcnYc.s page 5 + + + 203:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** + 204:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** When The compilation define USE_HAL_CAN_REGISTER_CALLBACKS is set to 0 or + 205:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** not defined, the callback registration feature is not available and all callbacks + 206:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** are set to the corresponding weak functions. + 207:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** + 208:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** @endverbatim + 209:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** ****************************************************************************** + 210:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** */ + 211:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** + 212:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** /* Includes ------------------------------------------------------------------*/ + 213:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** #include "stm32f0xx_hal.h" + 214:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** + 215:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** /** @addtogroup STM32F0xx_HAL_Driver + 216:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** * @{ + 217:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** */ + 218:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** + 219:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** #if defined(CAN) + 220:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** + 221:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** /** @defgroup CAN CAN + 222:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** * @brief CAN driver modules + 223:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** * @{ + 224:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** */ + 225:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** + 226:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** #ifdef HAL_CAN_MODULE_ENABLED + 227:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** + 228:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** #ifdef HAL_CAN_LEGACY_MODULE_ENABLED + 229:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** #error "The CAN driver cannot be used with its legacy, Please enable only one CAN module at once" + 230:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** #endif /* HAL_CAN_LEGACY_MODULE_ENABLED */ + 231:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** + 232:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** /* Private typedef -----------------------------------------------------------*/ + 233:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** /* Private define ------------------------------------------------------------*/ + 234:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** /** @defgroup CAN_Private_Constants CAN Private Constants + 235:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** * @{ + 236:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** */ + 237:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** #define CAN_TIMEOUT_VALUE 10U + 238:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** /** + 239:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** * @} + 240:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** */ + 241:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** /* Private macro -------------------------------------------------------------*/ + 242:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** /* Private variables ---------------------------------------------------------*/ + 243:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** /* Private function prototypes -----------------------------------------------*/ + 244:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** /* Exported functions --------------------------------------------------------*/ + 245:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** + 246:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** /** @defgroup CAN_Exported_Functions CAN Exported Functions + 247:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** * @{ + 248:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** */ + 249:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** + 250:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** /** @defgroup CAN_Exported_Functions_Group1 Initialization and de-initialization functions + 251:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** * @brief Initialization and Configuration functions + 252:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** * + 253:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** @verbatim + 254:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** ============================================================================== + 255:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** ##### Initialization and de-initialization functions ##### + 256:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** ============================================================================== + 257:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** [..] This section provides functions allowing to: + 258:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** (+) HAL_CAN_Init : Initialize and configure the CAN. + 259:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** (+) HAL_CAN_DeInit : De-initialize the CAN. + ARM GAS /tmp/ccftcnYc.s page 6 + + + 260:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** (+) HAL_CAN_MspInit : Initialize the CAN MSP. + 261:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** (+) HAL_CAN_MspDeInit : DeInitialize the CAN MSP. + 262:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** + 263:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** @endverbatim + 264:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** * @{ + 265:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** */ + 266:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** + 267:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** /** + 268:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** * @brief Initializes the CAN peripheral according to the specified + 269:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** * parameters in the CAN_InitStruct. + 270:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** * @param hcan pointer to a CAN_HandleTypeDef structure that contains + 271:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** * the configuration information for the specified CAN. + 272:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** * @retval HAL status + 273:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** */ + 274:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** HAL_StatusTypeDef HAL_CAN_Init(CAN_HandleTypeDef *hcan) + 275:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** { + 276:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** uint32_t tickstart; + 277:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** + 278:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** /* Check CAN handle */ + 279:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** if (hcan == NULL) + 280:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** { + 281:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** return HAL_ERROR; + 282:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** } + 283:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** + 284:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** /* Check the parameters */ + 285:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** assert_param(IS_CAN_ALL_INSTANCE(hcan->Instance)); + 286:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** assert_param(IS_FUNCTIONAL_STATE(hcan->Init.TimeTriggeredMode)); + 287:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** assert_param(IS_FUNCTIONAL_STATE(hcan->Init.AutoBusOff)); + 288:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** assert_param(IS_FUNCTIONAL_STATE(hcan->Init.AutoWakeUp)); + 289:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** assert_param(IS_FUNCTIONAL_STATE(hcan->Init.AutoRetransmission)); + 290:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** assert_param(IS_FUNCTIONAL_STATE(hcan->Init.ReceiveFifoLocked)); + 291:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** assert_param(IS_FUNCTIONAL_STATE(hcan->Init.TransmitFifoPriority)); + 292:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** assert_param(IS_CAN_MODE(hcan->Init.Mode)); + 293:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** assert_param(IS_CAN_SJW(hcan->Init.SyncJumpWidth)); + 294:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** assert_param(IS_CAN_BS1(hcan->Init.TimeSeg1)); + 295:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** assert_param(IS_CAN_BS2(hcan->Init.TimeSeg2)); + 296:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** assert_param(IS_CAN_PRESCALER(hcan->Init.Prescaler)); + 297:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** + 298:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** #if USE_HAL_CAN_REGISTER_CALLBACKS == 1 + 299:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** if (hcan->State == HAL_CAN_STATE_RESET) + 300:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** { + 301:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** /* Reset callbacks to legacy functions */ + 302:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** hcan->RxFifo0MsgPendingCallback = HAL_CAN_RxFifo0MsgPendingCallback; /* Legacy weak RxFifo0M + 303:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** hcan->RxFifo0FullCallback = HAL_CAN_RxFifo0FullCallback; /* Legacy weak RxFifo0F + 304:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** hcan->RxFifo1MsgPendingCallback = HAL_CAN_RxFifo1MsgPendingCallback; /* Legacy weak RxFifo1M + 305:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** hcan->RxFifo1FullCallback = HAL_CAN_RxFifo1FullCallback; /* Legacy weak RxFifo1F + 306:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** hcan->TxMailbox0CompleteCallback = HAL_CAN_TxMailbox0CompleteCallback; /* Legacy weak TxMailbo + 307:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** hcan->TxMailbox1CompleteCallback = HAL_CAN_TxMailbox1CompleteCallback; /* Legacy weak TxMailbo + 308:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** hcan->TxMailbox2CompleteCallback = HAL_CAN_TxMailbox2CompleteCallback; /* Legacy weak TxMailbo + 309:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** hcan->TxMailbox0AbortCallback = HAL_CAN_TxMailbox0AbortCallback; /* Legacy weak TxMailbo + 310:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** hcan->TxMailbox1AbortCallback = HAL_CAN_TxMailbox1AbortCallback; /* Legacy weak TxMailbo + 311:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** hcan->TxMailbox2AbortCallback = HAL_CAN_TxMailbox2AbortCallback; /* Legacy weak TxMailbo + 312:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** hcan->SleepCallback = HAL_CAN_SleepCallback; /* Legacy weak SleepCal + 313:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** hcan->WakeUpFromRxMsgCallback = HAL_CAN_WakeUpFromRxMsgCallback; /* Legacy weak WakeUpFr + 314:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** hcan->ErrorCallback = HAL_CAN_ErrorCallback; /* Legacy weak ErrorCal + 315:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** + 316:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** if (hcan->MspInitCallback == NULL) + ARM GAS /tmp/ccftcnYc.s page 7 + + + 317:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** { + 318:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** hcan->MspInitCallback = HAL_CAN_MspInit; /* Legacy weak MspInit */ + 319:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** } + 320:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** + 321:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** /* Init the low level hardware: CLOCK, NVIC */ + 322:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** hcan->MspInitCallback(hcan); + 323:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** } + 324:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** + 325:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** #else + 326:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** if (hcan->State == HAL_CAN_STATE_RESET) + 327:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** { + 328:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** /* Init the low level hardware: CLOCK, NVIC */ + 329:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** HAL_CAN_MspInit(hcan); + 330:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** } + 331:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** #endif /* (USE_HAL_CAN_REGISTER_CALLBACKS) */ + 332:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** + 333:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** /* Request initialisation */ + 334:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** SET_BIT(hcan->Instance->MCR, CAN_MCR_INRQ); + 335:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** + 336:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** /* Get tick */ + 337:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** tickstart = HAL_GetTick(); + 338:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** + 339:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** /* Wait initialisation acknowledge */ + 340:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** while ((hcan->Instance->MSR & CAN_MSR_INAK) == 0U) + 341:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** { + 342:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** if ((HAL_GetTick() - tickstart) > CAN_TIMEOUT_VALUE) + 343:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** { + 344:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** /* Update error code */ + 345:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** hcan->ErrorCode |= HAL_CAN_ERROR_TIMEOUT; + 346:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** + 347:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** /* Change CAN state */ + 348:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** hcan->State = HAL_CAN_STATE_ERROR; + 349:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** + 350:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** return HAL_ERROR; + 351:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** } + 352:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** } + 353:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** + 354:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** /* Exit from sleep mode */ + 355:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** CLEAR_BIT(hcan->Instance->MCR, CAN_MCR_SLEEP); + 356:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** + 357:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** /* Get tick */ + 358:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** tickstart = HAL_GetTick(); + 359:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** + 360:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** /* Check Sleep mode leave acknowledge */ + 361:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** while ((hcan->Instance->MSR & CAN_MSR_SLAK) != 0U) + 362:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** { + 363:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** if ((HAL_GetTick() - tickstart) > CAN_TIMEOUT_VALUE) + 364:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** { + 365:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** /* Update error code */ + 366:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** hcan->ErrorCode |= HAL_CAN_ERROR_TIMEOUT; + 367:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** + 368:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** /* Change CAN state */ + 369:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** hcan->State = HAL_CAN_STATE_ERROR; + 370:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** + 371:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** return HAL_ERROR; + 372:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** } + 373:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** } + ARM GAS /tmp/ccftcnYc.s page 8 + + + 374:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** + 375:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** /* Set the time triggered communication mode */ + 376:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** if (hcan->Init.TimeTriggeredMode == ENABLE) + 377:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** { + 378:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** SET_BIT(hcan->Instance->MCR, CAN_MCR_TTCM); + 379:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** } + 380:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** else + 381:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** { + 382:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** CLEAR_BIT(hcan->Instance->MCR, CAN_MCR_TTCM); + 383:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** } + 384:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** + 385:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** /* Set the automatic bus-off management */ + 386:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** if (hcan->Init.AutoBusOff == ENABLE) + 387:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** { + 388:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** SET_BIT(hcan->Instance->MCR, CAN_MCR_ABOM); + 389:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** } + 390:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** else + 391:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** { + 392:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** CLEAR_BIT(hcan->Instance->MCR, CAN_MCR_ABOM); + 393:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** } + 394:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** + 395:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** /* Set the automatic wake-up mode */ + 396:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** if (hcan->Init.AutoWakeUp == ENABLE) + 397:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** { + 398:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** SET_BIT(hcan->Instance->MCR, CAN_MCR_AWUM); + 399:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** } + 400:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** else + 401:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** { + 402:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** CLEAR_BIT(hcan->Instance->MCR, CAN_MCR_AWUM); + 403:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** } + 404:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** + 405:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** /* Set the automatic retransmission */ + 406:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** if (hcan->Init.AutoRetransmission == ENABLE) + 407:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** { + 408:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** CLEAR_BIT(hcan->Instance->MCR, CAN_MCR_NART); + 409:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** } + 410:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** else + 411:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** { + 412:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** SET_BIT(hcan->Instance->MCR, CAN_MCR_NART); + 413:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** } + 414:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** + 415:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** /* Set the receive FIFO locked mode */ + 416:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** if (hcan->Init.ReceiveFifoLocked == ENABLE) + 417:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** { + 418:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** SET_BIT(hcan->Instance->MCR, CAN_MCR_RFLM); + 419:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** } + 420:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** else + 421:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** { + 422:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** CLEAR_BIT(hcan->Instance->MCR, CAN_MCR_RFLM); + 423:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** } + 424:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** + 425:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** /* Set the transmit FIFO priority */ + 426:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** if (hcan->Init.TransmitFifoPriority == ENABLE) + 427:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** { + 428:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** SET_BIT(hcan->Instance->MCR, CAN_MCR_TXFP); + 429:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** } + 430:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** else + ARM GAS /tmp/ccftcnYc.s page 9 + + + 431:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** { + 432:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** CLEAR_BIT(hcan->Instance->MCR, CAN_MCR_TXFP); + 433:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** } + 434:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** + 435:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** /* Set the bit timing register */ + 436:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** WRITE_REG(hcan->Instance->BTR, (uint32_t)(hcan->Init.Mode | + 437:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** hcan->Init.SyncJumpWidth | + 438:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** hcan->Init.TimeSeg1 | + 439:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** hcan->Init.TimeSeg2 | + 440:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** (hcan->Init.Prescaler - 1U))); + 441:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** + 442:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** /* Initialize the error code */ + 443:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** hcan->ErrorCode = HAL_CAN_ERROR_NONE; + 444:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** + 445:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** /* Initialize the CAN state */ + 446:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** hcan->State = HAL_CAN_STATE_READY; + 447:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** + 448:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** /* Return function status */ + 449:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** return HAL_OK; + 450:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** } + 451:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** + 452:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** /** + 453:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** * @brief Deinitializes the CAN peripheral registers to their default + 454:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** * reset values. + 455:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** * @param hcan pointer to a CAN_HandleTypeDef structure that contains + 456:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** * the configuration information for the specified CAN. + 457:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** * @retval HAL status + 458:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** */ + 459:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** HAL_StatusTypeDef HAL_CAN_DeInit(CAN_HandleTypeDef *hcan) + 460:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** { + 461:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** /* Check CAN handle */ + 462:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** if (hcan == NULL) + 463:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** { + 464:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** return HAL_ERROR; + 465:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** } + 466:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** + 467:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** /* Check the parameters */ + 468:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** assert_param(IS_CAN_ALL_INSTANCE(hcan->Instance)); + 469:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** + 470:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** /* Stop the CAN module */ + 471:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** (void)HAL_CAN_Stop(hcan); + 472:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** + 473:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** #if USE_HAL_CAN_REGISTER_CALLBACKS == 1 + 474:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** if (hcan->MspDeInitCallback == NULL) + 475:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** { + 476:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** hcan->MspDeInitCallback = HAL_CAN_MspDeInit; /* Legacy weak MspDeInit */ + 477:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** } + 478:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** + 479:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** /* DeInit the low level hardware: CLOCK, NVIC */ + 480:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** hcan->MspDeInitCallback(hcan); + 481:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** + 482:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** #else + 483:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** /* DeInit the low level hardware: CLOCK, NVIC */ + 484:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** HAL_CAN_MspDeInit(hcan); + 485:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** #endif /* (USE_HAL_CAN_REGISTER_CALLBACKS) */ + 486:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** + 487:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** /* Reset the CAN peripheral */ + ARM GAS /tmp/ccftcnYc.s page 10 + + + 488:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** SET_BIT(hcan->Instance->MCR, CAN_MCR_RESET); + 489:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** + 490:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** /* Reset the CAN ErrorCode */ + 491:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** hcan->ErrorCode = HAL_CAN_ERROR_NONE; + 492:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** + 493:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** /* Change CAN state */ + 494:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** hcan->State = HAL_CAN_STATE_RESET; + 495:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** + 496:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** /* Return function status */ + 497:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** return HAL_OK; + 498:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** } + 499:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** + 500:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** /** + 501:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** * @brief Initializes the CAN MSP. + 502:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** * @param hcan pointer to a CAN_HandleTypeDef structure that contains + 503:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** * the configuration information for the specified CAN. + 504:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** * @retval None + 505:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** */ + 506:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** __weak void HAL_CAN_MspInit(CAN_HandleTypeDef *hcan) + 507:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** { + 28 .loc 1 507 1 view -0 + 29 .cfi_startproc + 30 @ args = 0, pretend = 0, frame = 0 + 31 @ frame_needed = 0, uses_anonymous_args = 0 + 32 @ link register save eliminated. + 508:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** /* Prevent unused argument(s) compilation warning */ + 509:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** UNUSED(hcan); + 33 .loc 1 509 3 view .LVU1 + 510:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** + 511:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** /* NOTE : This function Should not be modified, when the callback is needed, + 512:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** the HAL_CAN_MspInit could be implemented in the user file + 513:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** */ + 514:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** } + 34 .loc 1 514 1 is_stmt 0 view .LVU2 + 35 @ sp needed + 36 0000 7047 bx lr + 37 .cfi_endproc + 38 .LFE42: + 40 .section .text.HAL_CAN_Init,"ax",%progbits + 41 .align 1 + 42 .global HAL_CAN_Init + 43 .syntax unified + 44 .code 16 + 45 .thumb_func + 47 HAL_CAN_Init: + 48 .LVL1: + 49 .LFB40: + 275:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** uint32_t tickstart; + 50 .loc 1 275 1 is_stmt 1 view -0 + 51 .cfi_startproc + 52 @ args = 0, pretend = 0, frame = 0 + 53 @ frame_needed = 0, uses_anonymous_args = 0 + 275:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** uint32_t tickstart; + 54 .loc 1 275 1 is_stmt 0 view .LVU4 + 55 0000 70B5 push {r4, r5, r6, lr} + 56 .cfi_def_cfa_offset 16 + 57 .cfi_offset 4, -16 + ARM GAS /tmp/ccftcnYc.s page 11 + + + 58 .cfi_offset 5, -12 + 59 .cfi_offset 6, -8 + 60 .cfi_offset 14, -4 + 61 0002 041E subs r4, r0, #0 + 276:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** + 62 .loc 1 276 3 is_stmt 1 view .LVU5 + 279:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** { + 63 .loc 1 279 3 view .LVU6 + 279:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** { + 64 .loc 1 279 6 is_stmt 0 view .LVU7 + 65 0004 00D1 bne .LCB27 + 66 0006 A0E0 b .L21 @long jump + 67 .LCB27: + 285:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** assert_param(IS_FUNCTIONAL_STATE(hcan->Init.TimeTriggeredMode)); + 68 .loc 1 285 3 is_stmt 1 view .LVU8 + 286:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** assert_param(IS_FUNCTIONAL_STATE(hcan->Init.AutoBusOff)); + 69 .loc 1 286 3 view .LVU9 + 287:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** assert_param(IS_FUNCTIONAL_STATE(hcan->Init.AutoWakeUp)); + 70 .loc 1 287 3 view .LVU10 + 288:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** assert_param(IS_FUNCTIONAL_STATE(hcan->Init.AutoRetransmission)); + 71 .loc 1 288 3 view .LVU11 + 289:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** assert_param(IS_FUNCTIONAL_STATE(hcan->Init.ReceiveFifoLocked)); + 72 .loc 1 289 3 view .LVU12 + 290:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** assert_param(IS_FUNCTIONAL_STATE(hcan->Init.TransmitFifoPriority)); + 73 .loc 1 290 3 view .LVU13 + 291:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** assert_param(IS_CAN_MODE(hcan->Init.Mode)); + 74 .loc 1 291 3 view .LVU14 + 292:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** assert_param(IS_CAN_SJW(hcan->Init.SyncJumpWidth)); + 75 .loc 1 292 3 view .LVU15 + 293:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** assert_param(IS_CAN_BS1(hcan->Init.TimeSeg1)); + 76 .loc 1 293 3 view .LVU16 + 294:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** assert_param(IS_CAN_BS2(hcan->Init.TimeSeg2)); + 77 .loc 1 294 3 view .LVU17 + 295:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** assert_param(IS_CAN_PRESCALER(hcan->Init.Prescaler)); + 78 .loc 1 295 3 view .LVU18 + 296:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** + 79 .loc 1 296 3 view .LVU19 + 326:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** { + 80 .loc 1 326 3 view .LVU20 + 326:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** { + 81 .loc 1 326 11 is_stmt 0 view .LVU21 + 82 0008 2023 movs r3, #32 + 83 000a C35C ldrb r3, [r0, r3] + 326:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** { + 84 .loc 1 326 6 view .LVU22 + 85 000c 002B cmp r3, #0 + 86 000e 1AD0 beq .L22 + 87 .LVL2: + 88 .L4: + 334:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** + 89 .loc 1 334 3 is_stmt 1 view .LVU23 + 90 0010 2268 ldr r2, [r4] + 91 0012 1368 ldr r3, [r2] + 92 0014 0121 movs r1, #1 + 93 0016 0B43 orrs r3, r1 + 94 0018 1360 str r3, [r2] + 337:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** + ARM GAS /tmp/ccftcnYc.s page 12 + + + 95 .loc 1 337 3 view .LVU24 + 337:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** + 96 .loc 1 337 15 is_stmt 0 view .LVU25 + 97 001a FFF7FEFF bl HAL_GetTick + 98 .LVL3: + 99 001e 0500 movs r5, r0 + 100 .LVL4: + 340:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** { + 101 .loc 1 340 3 is_stmt 1 view .LVU26 + 102 .L5: + 340:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** { + 103 .loc 1 340 47 view .LVU27 + 340:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** { + 104 .loc 1 340 15 is_stmt 0 view .LVU28 + 105 0020 2268 ldr r2, [r4] + 340:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** { + 106 .loc 1 340 25 view .LVU29 + 107 0022 5368 ldr r3, [r2, #4] + 340:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** { + 108 .loc 1 340 47 view .LVU30 + 109 0024 DB07 lsls r3, r3, #31 + 110 0026 11D4 bmi .L23 + 342:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** { + 111 .loc 1 342 5 is_stmt 1 view .LVU31 + 342:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** { + 112 .loc 1 342 10 is_stmt 0 view .LVU32 + 113 0028 FFF7FEFF bl HAL_GetTick + 114 .LVL5: + 342:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** { + 115 .loc 1 342 24 discriminator 1 view .LVU33 + 116 002c 401B subs r0, r0, r5 + 342:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** { + 117 .loc 1 342 8 discriminator 1 view .LVU34 + 118 002e 0A28 cmp r0, #10 + 119 0030 F6D9 bls .L5 + 345:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** + 120 .loc 1 345 7 is_stmt 1 view .LVU35 + 345:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** + 121 .loc 1 345 11 is_stmt 0 view .LVU36 + 122 0032 626A ldr r2, [r4, #36] + 345:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** + 123 .loc 1 345 23 view .LVU37 + 124 0034 8023 movs r3, #128 + 125 0036 9B02 lsls r3, r3, #10 + 126 0038 1343 orrs r3, r2 + 127 003a 6362 str r3, [r4, #36] + 348:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** + 128 .loc 1 348 7 is_stmt 1 view .LVU38 + 348:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** + 129 .loc 1 348 19 is_stmt 0 view .LVU39 + 130 003c 2023 movs r3, #32 + 131 003e 0522 movs r2, #5 + 132 0040 E254 strb r2, [r4, r3] + 350:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** } + 133 .loc 1 350 7 is_stmt 1 view .LVU40 + 350:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** } + 134 .loc 1 350 14 is_stmt 0 view .LVU41 + ARM GAS /tmp/ccftcnYc.s page 13 + + + 135 0042 0120 movs r0, #1 + 136 .LVL6: + 137 .L3: + 450:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** + 138 .loc 1 450 1 view .LVU42 + 139 @ sp needed + 140 .LVL7: + 450:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** + 141 .loc 1 450 1 view .LVU43 + 142 0044 70BD pop {r4, r5, r6, pc} + 143 .LVL8: + 144 .L22: + 329:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** } + 145 .loc 1 329 5 is_stmt 1 view .LVU44 + 146 0046 FFF7FEFF bl HAL_CAN_MspInit + 147 .LVL9: + 329:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** } + 148 .loc 1 329 5 is_stmt 0 view .LVU45 + 149 004a E1E7 b .L4 + 150 .LVL10: + 151 .L23: + 355:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** + 152 .loc 1 355 3 is_stmt 1 view .LVU46 + 153 004c 1368 ldr r3, [r2] + 154 004e 0221 movs r1, #2 + 155 0050 8B43 bics r3, r1 + 156 0052 1360 str r3, [r2] + 358:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** + 157 .loc 1 358 3 view .LVU47 + 358:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** + 158 .loc 1 358 15 is_stmt 0 view .LVU48 + 159 0054 FFF7FEFF bl HAL_GetTick + 160 .LVL11: + 161 0058 0500 movs r5, r0 + 162 .LVL12: + 361:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** { + 163 .loc 1 361 3 is_stmt 1 view .LVU49 + 164 .L7: + 361:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** { + 165 .loc 1 361 47 view .LVU50 + 361:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** { + 166 .loc 1 361 15 is_stmt 0 view .LVU51 + 167 005a 2268 ldr r2, [r4] + 361:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** { + 168 .loc 1 361 25 view .LVU52 + 169 005c 5368 ldr r3, [r2, #4] + 361:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** { + 170 .loc 1 361 47 view .LVU53 + 171 005e 9B07 lsls r3, r3, #30 + 172 0060 0ED5 bpl .L24 + 363:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** { + 173 .loc 1 363 5 is_stmt 1 view .LVU54 + 363:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** { + 174 .loc 1 363 10 is_stmt 0 view .LVU55 + 175 0062 FFF7FEFF bl HAL_GetTick + 176 .LVL13: + 363:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** { + ARM GAS /tmp/ccftcnYc.s page 14 + + + 177 .loc 1 363 24 discriminator 1 view .LVU56 + 178 0066 401B subs r0, r0, r5 + 363:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** { + 179 .loc 1 363 8 discriminator 1 view .LVU57 + 180 0068 0A28 cmp r0, #10 + 181 006a F6D9 bls .L7 + 366:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** + 182 .loc 1 366 7 is_stmt 1 view .LVU58 + 366:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** + 183 .loc 1 366 11 is_stmt 0 view .LVU59 + 184 006c 626A ldr r2, [r4, #36] + 366:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** + 185 .loc 1 366 23 view .LVU60 + 186 006e 8023 movs r3, #128 + 187 0070 9B02 lsls r3, r3, #10 + 188 0072 1343 orrs r3, r2 + 189 0074 6362 str r3, [r4, #36] + 369:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** + 190 .loc 1 369 7 is_stmt 1 view .LVU61 + 369:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** + 191 .loc 1 369 19 is_stmt 0 view .LVU62 + 192 0076 2023 movs r3, #32 + 193 0078 0522 movs r2, #5 + 194 007a E254 strb r2, [r4, r3] + 371:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** } + 195 .loc 1 371 7 is_stmt 1 view .LVU63 + 371:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** } + 196 .loc 1 371 14 is_stmt 0 view .LVU64 + 197 007c 0120 movs r0, #1 + 198 007e E1E7 b .L3 + 199 .L24: + 376:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** { + 200 .loc 1 376 3 is_stmt 1 view .LVU65 + 376:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** { + 201 .loc 1 376 17 is_stmt 0 view .LVU66 + 202 0080 237E ldrb r3, [r4, #24] + 376:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** { + 203 .loc 1 376 6 view .LVU67 + 204 0082 012B cmp r3, #1 + 205 0084 3ED0 beq .L25 + 382:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** } + 206 .loc 1 382 5 is_stmt 1 view .LVU68 + 207 0086 1368 ldr r3, [r2] + 208 0088 8021 movs r1, #128 + 209 008a 8B43 bics r3, r1 + 210 008c 1360 str r3, [r2] + 211 .L10: + 386:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** { + 212 .loc 1 386 3 view .LVU69 + 386:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** { + 213 .loc 1 386 17 is_stmt 0 view .LVU70 + 214 008e 637E ldrb r3, [r4, #25] + 386:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** { + 215 .loc 1 386 6 view .LVU71 + 216 0090 012B cmp r3, #1 + 217 0092 3CD0 beq .L26 + 392:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** } + ARM GAS /tmp/ccftcnYc.s page 15 + + + 218 .loc 1 392 5 is_stmt 1 view .LVU72 + 219 0094 2268 ldr r2, [r4] + 220 0096 1368 ldr r3, [r2] + 221 0098 4021 movs r1, #64 + 222 009a 8B43 bics r3, r1 + 223 009c 1360 str r3, [r2] + 224 .L12: + 396:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** { + 225 .loc 1 396 3 view .LVU73 + 396:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** { + 226 .loc 1 396 17 is_stmt 0 view .LVU74 + 227 009e A37E ldrb r3, [r4, #26] + 396:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** { + 228 .loc 1 396 6 view .LVU75 + 229 00a0 012B cmp r3, #1 + 230 00a2 3AD0 beq .L27 + 402:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** } + 231 .loc 1 402 5 is_stmt 1 view .LVU76 + 232 00a4 2268 ldr r2, [r4] + 233 00a6 1368 ldr r3, [r2] + 234 00a8 2021 movs r1, #32 + 235 00aa 8B43 bics r3, r1 + 236 00ac 1360 str r3, [r2] + 237 .L14: + 406:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** { + 238 .loc 1 406 3 view .LVU77 + 406:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** { + 239 .loc 1 406 17 is_stmt 0 view .LVU78 + 240 00ae E37E ldrb r3, [r4, #27] + 406:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** { + 241 .loc 1 406 6 view .LVU79 + 242 00b0 012B cmp r3, #1 + 243 00b2 38D0 beq .L28 + 412:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** } + 244 .loc 1 412 5 is_stmt 1 view .LVU80 + 245 00b4 2268 ldr r2, [r4] + 246 00b6 1368 ldr r3, [r2] + 247 00b8 1021 movs r1, #16 + 248 00ba 0B43 orrs r3, r1 + 249 00bc 1360 str r3, [r2] + 250 .L16: + 416:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** { + 251 .loc 1 416 3 view .LVU81 + 416:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** { + 252 .loc 1 416 17 is_stmt 0 view .LVU82 + 253 00be 237F ldrb r3, [r4, #28] + 416:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** { + 254 .loc 1 416 6 view .LVU83 + 255 00c0 012B cmp r3, #1 + 256 00c2 36D0 beq .L29 + 422:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** } + 257 .loc 1 422 5 is_stmt 1 view .LVU84 + 258 00c4 2268 ldr r2, [r4] + 259 00c6 1368 ldr r3, [r2] + 260 00c8 0821 movs r1, #8 + 261 00ca 8B43 bics r3, r1 + 262 00cc 1360 str r3, [r2] + ARM GAS /tmp/ccftcnYc.s page 16 + + + 263 .L18: + 426:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** { + 264 .loc 1 426 3 view .LVU85 + 426:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** { + 265 .loc 1 426 17 is_stmt 0 view .LVU86 + 266 00ce 637F ldrb r3, [r4, #29] + 426:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** { + 267 .loc 1 426 6 view .LVU87 + 268 00d0 012B cmp r3, #1 + 269 00d2 34D0 beq .L30 + 432:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** } + 270 .loc 1 432 5 is_stmt 1 view .LVU88 + 271 00d4 2268 ldr r2, [r4] + 272 00d6 1368 ldr r3, [r2] + 273 00d8 0421 movs r1, #4 + 274 00da 8B43 bics r3, r1 + 275 00dc 1360 str r3, [r2] + 276 .L20: + 436:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** hcan->Init.SyncJumpWidth | + 277 .loc 1 436 3 view .LVU89 + 278 00de A368 ldr r3, [r4, #8] + 279 00e0 E268 ldr r2, [r4, #12] + 280 00e2 1343 orrs r3, r2 + 281 00e4 2269 ldr r2, [r4, #16] + 282 00e6 1343 orrs r3, r2 + 283 00e8 6269 ldr r2, [r4, #20] + 284 00ea 1343 orrs r3, r2 + 285 00ec 6268 ldr r2, [r4, #4] + 286 00ee 013A subs r2, r2, #1 + 287 00f0 2168 ldr r1, [r4] + 288 00f2 1343 orrs r3, r2 + 289 00f4 CB61 str r3, [r1, #28] + 443:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** + 290 .loc 1 443 3 view .LVU90 + 443:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** + 291 .loc 1 443 19 is_stmt 0 view .LVU91 + 292 00f6 0023 movs r3, #0 + 293 00f8 6362 str r3, [r4, #36] + 446:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** + 294 .loc 1 446 3 is_stmt 1 view .LVU92 + 446:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** + 295 .loc 1 446 15 is_stmt 0 view .LVU93 + 296 00fa 2033 adds r3, r3, #32 + 297 00fc 0122 movs r2, #1 + 298 00fe E254 strb r2, [r4, r3] + 449:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** } + 299 .loc 1 449 3 is_stmt 1 view .LVU94 + 449:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** } + 300 .loc 1 449 10 is_stmt 0 view .LVU95 + 301 0100 0020 movs r0, #0 + 302 0102 9FE7 b .L3 + 303 .L25: + 378:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** } + 304 .loc 1 378 5 is_stmt 1 view .LVU96 + 305 0104 1368 ldr r3, [r2] + 306 0106 8021 movs r1, #128 + 307 0108 0B43 orrs r3, r1 + ARM GAS /tmp/ccftcnYc.s page 17 + + + 308 010a 1360 str r3, [r2] + 309 010c BFE7 b .L10 + 310 .L26: + 388:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** } + 311 .loc 1 388 5 view .LVU97 + 312 010e 2268 ldr r2, [r4] + 313 0110 1368 ldr r3, [r2] + 314 0112 4021 movs r1, #64 + 315 0114 0B43 orrs r3, r1 + 316 0116 1360 str r3, [r2] + 317 0118 C1E7 b .L12 + 318 .L27: + 398:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** } + 319 .loc 1 398 5 view .LVU98 + 320 011a 2268 ldr r2, [r4] + 321 011c 1368 ldr r3, [r2] + 322 011e 2021 movs r1, #32 + 323 0120 0B43 orrs r3, r1 + 324 0122 1360 str r3, [r2] + 325 0124 C3E7 b .L14 + 326 .L28: + 408:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** } + 327 .loc 1 408 5 view .LVU99 + 328 0126 2268 ldr r2, [r4] + 329 0128 1368 ldr r3, [r2] + 330 012a 1021 movs r1, #16 + 331 012c 8B43 bics r3, r1 + 332 012e 1360 str r3, [r2] + 333 0130 C5E7 b .L16 + 334 .L29: + 418:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** } + 335 .loc 1 418 5 view .LVU100 + 336 0132 2268 ldr r2, [r4] + 337 0134 1368 ldr r3, [r2] + 338 0136 0821 movs r1, #8 + 339 0138 0B43 orrs r3, r1 + 340 013a 1360 str r3, [r2] + 341 013c C7E7 b .L18 + 342 .L30: + 428:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** } + 343 .loc 1 428 5 view .LVU101 + 344 013e 2268 ldr r2, [r4] + 345 0140 1368 ldr r3, [r2] + 346 0142 0421 movs r1, #4 + 347 0144 0B43 orrs r3, r1 + 348 0146 1360 str r3, [r2] + 349 0148 C9E7 b .L20 + 350 .LVL14: + 351 .L21: + 281:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** } + 352 .loc 1 281 12 is_stmt 0 view .LVU102 + 353 014a 0120 movs r0, #1 + 354 .LVL15: + 281:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** } + 355 .loc 1 281 12 view .LVU103 + 356 014c 7AE7 b .L3 + 357 .cfi_endproc + ARM GAS /tmp/ccftcnYc.s page 18 + + + 358 .LFE40: + 360 .section .text.HAL_CAN_MspDeInit,"ax",%progbits + 361 .align 1 + 362 .weak HAL_CAN_MspDeInit + 363 .syntax unified + 364 .code 16 + 365 .thumb_func + 367 HAL_CAN_MspDeInit: + 368 .LVL16: + 369 .LFB43: + 515:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** + 516:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** /** + 517:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** * @brief DeInitializes the CAN MSP. + 518:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** * @param hcan pointer to a CAN_HandleTypeDef structure that contains + 519:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** * the configuration information for the specified CAN. + 520:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** * @retval None + 521:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** */ + 522:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** __weak void HAL_CAN_MspDeInit(CAN_HandleTypeDef *hcan) + 523:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** { + 370 .loc 1 523 1 is_stmt 1 view -0 + 371 .cfi_startproc + 372 @ args = 0, pretend = 0, frame = 0 + 373 @ frame_needed = 0, uses_anonymous_args = 0 + 374 @ link register save eliminated. + 524:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** /* Prevent unused argument(s) compilation warning */ + 525:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** UNUSED(hcan); + 375 .loc 1 525 3 view .LVU105 + 526:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** + 527:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** /* NOTE : This function Should not be modified, when the callback is needed, + 528:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** the HAL_CAN_MspDeInit could be implemented in the user file + 529:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** */ + 530:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** } + 376 .loc 1 530 1 is_stmt 0 view .LVU106 + 377 @ sp needed + 378 0000 7047 bx lr + 379 .cfi_endproc + 380 .LFE43: + 382 .section .text.HAL_CAN_ConfigFilter,"ax",%progbits + 383 .align 1 + 384 .global HAL_CAN_ConfigFilter + 385 .syntax unified + 386 .code 16 + 387 .thumb_func + 389 HAL_CAN_ConfigFilter: + 390 .LVL17: + 391 .LFB44: + 531:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** + 532:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** #if USE_HAL_CAN_REGISTER_CALLBACKS == 1 + 533:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** /** + 534:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** * @brief Register a CAN CallBack. + 535:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** * To be used instead of the weak predefined callback + 536:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** * @param hcan pointer to a CAN_HandleTypeDef structure that contains + 537:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** * the configuration information for CAN module + 538:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** * @param CallbackID ID of the callback to be registered + 539:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** * This parameter can be one of the following values: + 540:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** * @arg @ref HAL_CAN_TX_MAILBOX0_COMPLETE_CB_ID Tx Mailbox 0 Complete callback ID + 541:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** * @arg @ref HAL_CAN_TX_MAILBOX1_COMPLETE_CB_ID Tx Mailbox 1 Complete callback ID + ARM GAS /tmp/ccftcnYc.s page 19 + + + 542:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** * @arg @ref HAL_CAN_TX_MAILBOX2_COMPLETE_CB_ID Tx Mailbox 2 Complete callback ID + 543:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** * @arg @ref HAL_CAN_TX_MAILBOX0_ABORT_CB_ID Tx Mailbox 0 Abort callback ID + 544:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** * @arg @ref HAL_CAN_TX_MAILBOX1_ABORT_CB_ID Tx Mailbox 1 Abort callback ID + 545:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** * @arg @ref HAL_CAN_TX_MAILBOX2_ABORT_CB_ID Tx Mailbox 2 Abort callback ID + 546:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** * @arg @ref HAL_CAN_RX_FIFO0_MSG_PENDING_CB_ID Rx Fifo 0 message pending callback ID + 547:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** * @arg @ref HAL_CAN_RX_FIFO0_FULL_CB_ID Rx Fifo 0 full callback ID + 548:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** * @arg @ref HAL_CAN_RX_FIFO1_MSG_PENDING_CB_ID Rx Fifo 1 message pending callback ID + 549:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** * @arg @ref HAL_CAN_RX_FIFO1_FULL_CB_ID Rx Fifo 1 full callback ID + 550:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** * @arg @ref HAL_CAN_SLEEP_CB_ID Sleep callback ID + 551:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** * @arg @ref HAL_CAN_WAKEUP_FROM_RX_MSG_CB_ID Wake Up from Rx message callback ID + 552:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** * @arg @ref HAL_CAN_ERROR_CB_ID Error callback ID + 553:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** * @arg @ref HAL_CAN_MSPINIT_CB_ID MspInit callback ID + 554:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** * @arg @ref HAL_CAN_MSPDEINIT_CB_ID MspDeInit callback ID + 555:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** * @param pCallback pointer to the Callback function + 556:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** * @retval HAL status + 557:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** */ + 558:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** HAL_StatusTypeDef HAL_CAN_RegisterCallback(CAN_HandleTypeDef *hcan, HAL_CAN_CallbackIDTypeDef Callb + 559:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** void (* pCallback)(CAN_HandleTypeDef *_hcan)) + 560:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** { + 561:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** HAL_StatusTypeDef status = HAL_OK; + 562:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** + 563:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** if (pCallback == NULL) + 564:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** { + 565:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** /* Update the error code */ + 566:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** hcan->ErrorCode |= HAL_CAN_ERROR_INVALID_CALLBACK; + 567:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** + 568:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** return HAL_ERROR; + 569:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** } + 570:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** + 571:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** if (hcan->State == HAL_CAN_STATE_READY) + 572:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** { + 573:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** switch (CallbackID) + 574:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** { + 575:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** case HAL_CAN_TX_MAILBOX0_COMPLETE_CB_ID : + 576:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** hcan->TxMailbox0CompleteCallback = pCallback; + 577:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** break; + 578:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** + 579:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** case HAL_CAN_TX_MAILBOX1_COMPLETE_CB_ID : + 580:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** hcan->TxMailbox1CompleteCallback = pCallback; + 581:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** break; + 582:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** + 583:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** case HAL_CAN_TX_MAILBOX2_COMPLETE_CB_ID : + 584:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** hcan->TxMailbox2CompleteCallback = pCallback; + 585:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** break; + 586:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** + 587:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** case HAL_CAN_TX_MAILBOX0_ABORT_CB_ID : + 588:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** hcan->TxMailbox0AbortCallback = pCallback; + 589:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** break; + 590:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** + 591:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** case HAL_CAN_TX_MAILBOX1_ABORT_CB_ID : + 592:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** hcan->TxMailbox1AbortCallback = pCallback; + 593:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** break; + 594:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** + 595:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** case HAL_CAN_TX_MAILBOX2_ABORT_CB_ID : + 596:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** hcan->TxMailbox2AbortCallback = pCallback; + 597:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** break; + 598:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** + ARM GAS /tmp/ccftcnYc.s page 20 + + + 599:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** case HAL_CAN_RX_FIFO0_MSG_PENDING_CB_ID : + 600:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** hcan->RxFifo0MsgPendingCallback = pCallback; + 601:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** break; + 602:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** + 603:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** case HAL_CAN_RX_FIFO0_FULL_CB_ID : + 604:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** hcan->RxFifo0FullCallback = pCallback; + 605:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** break; + 606:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** + 607:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** case HAL_CAN_RX_FIFO1_MSG_PENDING_CB_ID : + 608:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** hcan->RxFifo1MsgPendingCallback = pCallback; + 609:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** break; + 610:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** + 611:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** case HAL_CAN_RX_FIFO1_FULL_CB_ID : + 612:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** hcan->RxFifo1FullCallback = pCallback; + 613:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** break; + 614:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** + 615:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** case HAL_CAN_SLEEP_CB_ID : + 616:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** hcan->SleepCallback = pCallback; + 617:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** break; + 618:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** + 619:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** case HAL_CAN_WAKEUP_FROM_RX_MSG_CB_ID : + 620:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** hcan->WakeUpFromRxMsgCallback = pCallback; + 621:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** break; + 622:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** + 623:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** case HAL_CAN_ERROR_CB_ID : + 624:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** hcan->ErrorCallback = pCallback; + 625:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** break; + 626:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** + 627:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** case HAL_CAN_MSPINIT_CB_ID : + 628:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** hcan->MspInitCallback = pCallback; + 629:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** break; + 630:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** + 631:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** case HAL_CAN_MSPDEINIT_CB_ID : + 632:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** hcan->MspDeInitCallback = pCallback; + 633:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** break; + 634:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** + 635:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** default : + 636:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** /* Update the error code */ + 637:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** hcan->ErrorCode |= HAL_CAN_ERROR_INVALID_CALLBACK; + 638:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** + 639:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** /* Return error status */ + 640:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** status = HAL_ERROR; + 641:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** break; + 642:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** } + 643:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** } + 644:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** else if (hcan->State == HAL_CAN_STATE_RESET) + 645:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** { + 646:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** switch (CallbackID) + 647:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** { + 648:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** case HAL_CAN_MSPINIT_CB_ID : + 649:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** hcan->MspInitCallback = pCallback; + 650:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** break; + 651:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** + 652:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** case HAL_CAN_MSPDEINIT_CB_ID : + 653:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** hcan->MspDeInitCallback = pCallback; + 654:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** break; + 655:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** + ARM GAS /tmp/ccftcnYc.s page 21 + + + 656:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** default : + 657:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** /* Update the error code */ + 658:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** hcan->ErrorCode |= HAL_CAN_ERROR_INVALID_CALLBACK; + 659:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** + 660:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** /* Return error status */ + 661:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** status = HAL_ERROR; + 662:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** break; + 663:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** } + 664:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** } + 665:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** else + 666:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** { + 667:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** /* Update the error code */ + 668:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** hcan->ErrorCode |= HAL_CAN_ERROR_INVALID_CALLBACK; + 669:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** + 670:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** /* Return error status */ + 671:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** status = HAL_ERROR; + 672:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** } + 673:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** + 674:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** return status; + 675:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** } + 676:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** + 677:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** /** + 678:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** * @brief Unregister a CAN CallBack. + 679:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** * CAN callback is redirected to the weak predefined callback + 680:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** * @param hcan pointer to a CAN_HandleTypeDef structure that contains + 681:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** * the configuration information for CAN module + 682:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** * @param CallbackID ID of the callback to be unregistered + 683:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** * This parameter can be one of the following values: + 684:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** * @arg @ref HAL_CAN_TX_MAILBOX0_COMPLETE_CB_ID Tx Mailbox 0 Complete callback ID + 685:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** * @arg @ref HAL_CAN_TX_MAILBOX1_COMPLETE_CB_ID Tx Mailbox 1 Complete callback ID + 686:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** * @arg @ref HAL_CAN_TX_MAILBOX2_COMPLETE_CB_ID Tx Mailbox 2 Complete callback ID + 687:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** * @arg @ref HAL_CAN_TX_MAILBOX0_ABORT_CB_ID Tx Mailbox 0 Abort callback ID + 688:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** * @arg @ref HAL_CAN_TX_MAILBOX1_ABORT_CB_ID Tx Mailbox 1 Abort callback ID + 689:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** * @arg @ref HAL_CAN_TX_MAILBOX2_ABORT_CB_ID Tx Mailbox 2 Abort callback ID + 690:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** * @arg @ref HAL_CAN_RX_FIFO0_MSG_PENDING_CB_ID Rx Fifo 0 message pending callback ID + 691:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** * @arg @ref HAL_CAN_RX_FIFO0_FULL_CB_ID Rx Fifo 0 full callback ID + 692:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** * @arg @ref HAL_CAN_RX_FIFO1_MSG_PENDING_CB_ID Rx Fifo 1 message pending callback ID + 693:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** * @arg @ref HAL_CAN_RX_FIFO1_FULL_CB_ID Rx Fifo 1 full callback ID + 694:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** * @arg @ref HAL_CAN_SLEEP_CB_ID Sleep callback ID + 695:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** * @arg @ref HAL_CAN_WAKEUP_FROM_RX_MSG_CB_ID Wake Up from Rx message callback ID + 696:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** * @arg @ref HAL_CAN_ERROR_CB_ID Error callback ID + 697:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** * @arg @ref HAL_CAN_MSPINIT_CB_ID MspInit callback ID + 698:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** * @arg @ref HAL_CAN_MSPDEINIT_CB_ID MspDeInit callback ID + 699:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** * @retval HAL status + 700:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** */ + 701:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** HAL_StatusTypeDef HAL_CAN_UnRegisterCallback(CAN_HandleTypeDef *hcan, HAL_CAN_CallbackIDTypeDef Cal + 702:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** { + 703:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** HAL_StatusTypeDef status = HAL_OK; + 704:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** + 705:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** if (hcan->State == HAL_CAN_STATE_READY) + 706:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** { + 707:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** switch (CallbackID) + 708:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** { + 709:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** case HAL_CAN_TX_MAILBOX0_COMPLETE_CB_ID : + 710:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** hcan->TxMailbox0CompleteCallback = HAL_CAN_TxMailbox0CompleteCallback; + 711:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** break; + 712:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** + ARM GAS /tmp/ccftcnYc.s page 22 + + + 713:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** case HAL_CAN_TX_MAILBOX1_COMPLETE_CB_ID : + 714:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** hcan->TxMailbox1CompleteCallback = HAL_CAN_TxMailbox1CompleteCallback; + 715:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** break; + 716:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** + 717:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** case HAL_CAN_TX_MAILBOX2_COMPLETE_CB_ID : + 718:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** hcan->TxMailbox2CompleteCallback = HAL_CAN_TxMailbox2CompleteCallback; + 719:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** break; + 720:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** + 721:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** case HAL_CAN_TX_MAILBOX0_ABORT_CB_ID : + 722:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** hcan->TxMailbox0AbortCallback = HAL_CAN_TxMailbox0AbortCallback; + 723:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** break; + 724:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** + 725:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** case HAL_CAN_TX_MAILBOX1_ABORT_CB_ID : + 726:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** hcan->TxMailbox1AbortCallback = HAL_CAN_TxMailbox1AbortCallback; + 727:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** break; + 728:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** + 729:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** case HAL_CAN_TX_MAILBOX2_ABORT_CB_ID : + 730:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** hcan->TxMailbox2AbortCallback = HAL_CAN_TxMailbox2AbortCallback; + 731:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** break; + 732:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** + 733:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** case HAL_CAN_RX_FIFO0_MSG_PENDING_CB_ID : + 734:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** hcan->RxFifo0MsgPendingCallback = HAL_CAN_RxFifo0MsgPendingCallback; + 735:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** break; + 736:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** + 737:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** case HAL_CAN_RX_FIFO0_FULL_CB_ID : + 738:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** hcan->RxFifo0FullCallback = HAL_CAN_RxFifo0FullCallback; + 739:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** break; + 740:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** + 741:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** case HAL_CAN_RX_FIFO1_MSG_PENDING_CB_ID : + 742:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** hcan->RxFifo1MsgPendingCallback = HAL_CAN_RxFifo1MsgPendingCallback; + 743:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** break; + 744:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** + 745:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** case HAL_CAN_RX_FIFO1_FULL_CB_ID : + 746:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** hcan->RxFifo1FullCallback = HAL_CAN_RxFifo1FullCallback; + 747:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** break; + 748:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** + 749:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** case HAL_CAN_SLEEP_CB_ID : + 750:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** hcan->SleepCallback = HAL_CAN_SleepCallback; + 751:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** break; + 752:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** + 753:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** case HAL_CAN_WAKEUP_FROM_RX_MSG_CB_ID : + 754:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** hcan->WakeUpFromRxMsgCallback = HAL_CAN_WakeUpFromRxMsgCallback; + 755:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** break; + 756:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** + 757:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** case HAL_CAN_ERROR_CB_ID : + 758:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** hcan->ErrorCallback = HAL_CAN_ErrorCallback; + 759:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** break; + 760:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** + 761:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** case HAL_CAN_MSPINIT_CB_ID : + 762:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** hcan->MspInitCallback = HAL_CAN_MspInit; + 763:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** break; + 764:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** + 765:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** case HAL_CAN_MSPDEINIT_CB_ID : + 766:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** hcan->MspDeInitCallback = HAL_CAN_MspDeInit; + 767:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** break; + 768:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** + 769:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** default : + ARM GAS /tmp/ccftcnYc.s page 23 + + + 770:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** /* Update the error code */ + 771:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** hcan->ErrorCode |= HAL_CAN_ERROR_INVALID_CALLBACK; + 772:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** + 773:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** /* Return error status */ + 774:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** status = HAL_ERROR; + 775:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** break; + 776:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** } + 777:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** } + 778:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** else if (hcan->State == HAL_CAN_STATE_RESET) + 779:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** { + 780:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** switch (CallbackID) + 781:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** { + 782:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** case HAL_CAN_MSPINIT_CB_ID : + 783:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** hcan->MspInitCallback = HAL_CAN_MspInit; + 784:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** break; + 785:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** + 786:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** case HAL_CAN_MSPDEINIT_CB_ID : + 787:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** hcan->MspDeInitCallback = HAL_CAN_MspDeInit; + 788:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** break; + 789:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** + 790:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** default : + 791:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** /* Update the error code */ + 792:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** hcan->ErrorCode |= HAL_CAN_ERROR_INVALID_CALLBACK; + 793:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** + 794:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** /* Return error status */ + 795:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** status = HAL_ERROR; + 796:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** break; + 797:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** } + 798:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** } + 799:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** else + 800:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** { + 801:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** /* Update the error code */ + 802:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** hcan->ErrorCode |= HAL_CAN_ERROR_INVALID_CALLBACK; + 803:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** + 804:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** /* Return error status */ + 805:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** status = HAL_ERROR; + 806:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** } + 807:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** + 808:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** return status; + 809:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** } + 810:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** #endif /* USE_HAL_CAN_REGISTER_CALLBACKS */ + 811:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** + 812:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** /** + 813:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** * @} + 814:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** */ + 815:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** + 816:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** /** @defgroup CAN_Exported_Functions_Group2 Configuration functions + 817:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** * @brief Configuration functions. + 818:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** * + 819:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** @verbatim + 820:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** ============================================================================== + 821:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** ##### Configuration functions ##### + 822:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** ============================================================================== + 823:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** [..] This section provides functions allowing to: + 824:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** (+) HAL_CAN_ConfigFilter : Configure the CAN reception filters + 825:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** + 826:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** @endverbatim + ARM GAS /tmp/ccftcnYc.s page 24 + + + 827:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** * @{ + 828:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** */ + 829:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** + 830:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** /** + 831:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** * @brief Configures the CAN reception filter according to the specified + 832:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** * parameters in the CAN_FilterInitStruct. + 833:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** * @param hcan pointer to a CAN_HandleTypeDef structure that contains + 834:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** * the configuration information for the specified CAN. + 835:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** * @param sFilterConfig pointer to a CAN_FilterTypeDef structure that + 836:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** * contains the filter configuration information. + 837:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** * @retval None + 838:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** */ + 839:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** HAL_StatusTypeDef HAL_CAN_ConfigFilter(CAN_HandleTypeDef *hcan, const CAN_FilterTypeDef *sFilterCon + 840:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** { + 392 .loc 1 840 1 is_stmt 1 view -0 + 393 .cfi_startproc + 394 @ args = 0, pretend = 0, frame = 0 + 395 @ frame_needed = 0, uses_anonymous_args = 0 + 396 .loc 1 840 1 is_stmt 0 view .LVU108 + 397 0000 70B5 push {r4, r5, r6, lr} + 398 .cfi_def_cfa_offset 16 + 399 .cfi_offset 4, -16 + 400 .cfi_offset 5, -12 + 401 .cfi_offset 6, -8 + 402 .cfi_offset 14, -4 + 841:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** uint32_t filternbrbitpos; + 403 .loc 1 841 3 is_stmt 1 view .LVU109 + 842:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** CAN_TypeDef *can_ip = hcan->Instance; + 404 .loc 1 842 3 view .LVU110 + 405 .loc 1 842 16 is_stmt 0 view .LVU111 + 406 0002 0268 ldr r2, [r0] + 407 .LVL18: + 843:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** HAL_CAN_StateTypeDef state = hcan->State; + 408 .loc 1 843 3 is_stmt 1 view .LVU112 + 409 .loc 1 843 24 is_stmt 0 view .LVU113 + 410 0004 2023 movs r3, #32 + 411 0006 C35C ldrb r3, [r0, r3] + 412 .LVL19: + 844:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** + 845:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** if ((state == HAL_CAN_STATE_READY) || + 413 .loc 1 845 3 is_stmt 1 view .LVU114 + 414 .loc 1 845 38 is_stmt 0 view .LVU115 + 415 0008 013B subs r3, r3, #1 + 416 .LVL20: + 417 .loc 1 845 38 view .LVU116 + 418 000a DBB2 uxtb r3, r3 + 419 .LVL21: + 420 .loc 1 845 6 view .LVU117 + 421 000c 012B cmp r3, #1 + 422 000e 06D9 bls .L42 + 846:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** (state == HAL_CAN_STATE_LISTENING)) + 847:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** { + 848:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** /* Check the parameters */ + 849:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** assert_param(IS_CAN_FILTER_ID_HALFWORD(sFilterConfig->FilterIdHigh)); + 850:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** assert_param(IS_CAN_FILTER_ID_HALFWORD(sFilterConfig->FilterIdLow)); + 851:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** assert_param(IS_CAN_FILTER_ID_HALFWORD(sFilterConfig->FilterMaskIdHigh)); + 852:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** assert_param(IS_CAN_FILTER_ID_HALFWORD(sFilterConfig->FilterMaskIdLow)); + ARM GAS /tmp/ccftcnYc.s page 25 + + + 853:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** assert_param(IS_CAN_FILTER_MODE(sFilterConfig->FilterMode)); + 854:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** assert_param(IS_CAN_FILTER_SCALE(sFilterConfig->FilterScale)); + 855:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** assert_param(IS_CAN_FILTER_FIFO(sFilterConfig->FilterFIFOAssignment)); + 856:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** assert_param(IS_CAN_FILTER_ACTIVATION(sFilterConfig->FilterActivation)); + 857:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** + 858:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** /* CAN is single instance with 14 dedicated filters banks */ + 859:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** + 860:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** /* Check the parameters */ + 861:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** assert_param(IS_CAN_FILTER_BANK_SINGLE(sFilterConfig->FilterBank)); + 862:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** + 863:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** /* Initialisation mode for the filter */ + 864:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** SET_BIT(can_ip->FMR, CAN_FMR_FINIT); + 865:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** + 866:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** /* Convert filter number into bit position */ + 867:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** filternbrbitpos = (uint32_t)1 << (sFilterConfig->FilterBank & 0x1FU); + 868:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** + 869:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** /* Filter Deactivation */ + 870:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** CLEAR_BIT(can_ip->FA1R, filternbrbitpos); + 871:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** + 872:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** /* Filter Scale */ + 873:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** if (sFilterConfig->FilterScale == CAN_FILTERSCALE_16BIT) + 874:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** { + 875:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** /* 16-bit scale for the filter */ + 876:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** CLEAR_BIT(can_ip->FS1R, filternbrbitpos); + 877:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** + 878:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** /* First 16-bit identifier and First 16-bit mask */ + 879:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** /* Or First 16-bit identifier and Second 16-bit identifier */ + 880:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** can_ip->sFilterRegister[sFilterConfig->FilterBank].FR1 = + 881:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** ((0x0000FFFFU & (uint32_t)sFilterConfig->FilterMaskIdLow) << 16U) | + 882:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** (0x0000FFFFU & (uint32_t)sFilterConfig->FilterIdLow); + 883:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** + 884:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** /* Second 16-bit identifier and Second 16-bit mask */ + 885:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** /* Or Third 16-bit identifier and Fourth 16-bit identifier */ + 886:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** can_ip->sFilterRegister[sFilterConfig->FilterBank].FR2 = + 887:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** ((0x0000FFFFU & (uint32_t)sFilterConfig->FilterMaskIdHigh) << 16U) | + 888:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** (0x0000FFFFU & (uint32_t)sFilterConfig->FilterIdHigh); + 889:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** } + 890:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** + 891:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** if (sFilterConfig->FilterScale == CAN_FILTERSCALE_32BIT) + 892:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** { + 893:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** /* 32-bit scale for the filter */ + 894:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** SET_BIT(can_ip->FS1R, filternbrbitpos); + 895:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** + 896:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** /* 32-bit identifier or First 32-bit identifier */ + 897:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** can_ip->sFilterRegister[sFilterConfig->FilterBank].FR1 = + 898:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** ((0x0000FFFFU & (uint32_t)sFilterConfig->FilterIdHigh) << 16U) | + 899:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** (0x0000FFFFU & (uint32_t)sFilterConfig->FilterIdLow); + 900:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** + 901:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** /* 32-bit mask or Second 32-bit identifier */ + 902:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** can_ip->sFilterRegister[sFilterConfig->FilterBank].FR2 = + 903:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** ((0x0000FFFFU & (uint32_t)sFilterConfig->FilterMaskIdHigh) << 16U) | + 904:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** (0x0000FFFFU & (uint32_t)sFilterConfig->FilterMaskIdLow); + 905:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** } + 906:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** + 907:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** /* Filter Mode */ + 908:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** if (sFilterConfig->FilterMode == CAN_FILTERMODE_IDMASK) + 909:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** { + ARM GAS /tmp/ccftcnYc.s page 26 + + + 910:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** /* Id/Mask mode for the filter*/ + 911:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** CLEAR_BIT(can_ip->FM1R, filternbrbitpos); + 912:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** } + 913:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** else /* CAN_FilterInitStruct->CAN_FilterMode == CAN_FilterMode_IdList */ + 914:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** { + 915:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** /* Identifier list mode for the filter*/ + 916:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** SET_BIT(can_ip->FM1R, filternbrbitpos); + 917:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** } + 918:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** + 919:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** /* Filter FIFO assignment */ + 920:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** if (sFilterConfig->FilterFIFOAssignment == CAN_FILTER_FIFO0) + 921:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** { + 922:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** /* FIFO 0 assignation for the filter */ + 923:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** CLEAR_BIT(can_ip->FFA1R, filternbrbitpos); + 924:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** } + 925:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** else + 926:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** { + 927:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** /* FIFO 1 assignation for the filter */ + 928:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** SET_BIT(can_ip->FFA1R, filternbrbitpos); + 929:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** } + 930:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** + 931:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** /* Filter activation */ + 932:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** if (sFilterConfig->FilterActivation == CAN_FILTER_ENABLE) + 933:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** { + 934:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** SET_BIT(can_ip->FA1R, filternbrbitpos); + 935:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** } + 936:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** + 937:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** /* Leave the initialisation mode for the filter */ + 938:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** CLEAR_BIT(can_ip->FMR, CAN_FMR_FINIT); + 939:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** + 940:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** /* Return function status */ + 941:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** return HAL_OK; + 942:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** } + 943:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** else + 944:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** { + 945:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** /* Update error code */ + 946:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** hcan->ErrorCode |= HAL_CAN_ERROR_NOT_INITIALIZED; + 423 .loc 1 946 5 is_stmt 1 view .LVU118 + 424 .loc 1 946 9 is_stmt 0 view .LVU119 + 425 0010 426A ldr r2, [r0, #36] + 426 .LVL22: + 427 .loc 1 946 21 view .LVU120 + 428 0012 8023 movs r3, #128 + 429 0014 DB02 lsls r3, r3, #11 + 430 0016 1343 orrs r3, r2 + 431 0018 4362 str r3, [r0, #36] + 947:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** + 948:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** return HAL_ERROR; + 432 .loc 1 948 5 is_stmt 1 view .LVU121 + 433 .loc 1 948 12 is_stmt 0 view .LVU122 + 434 001a 0120 movs r0, #1 + 435 .LVL23: + 436 .L41: + 949:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** } + 950:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** } + 437 .loc 1 950 1 view .LVU123 + 438 @ sp needed + ARM GAS /tmp/ccftcnYc.s page 27 + + + 439 001c 70BD pop {r4, r5, r6, pc} + 440 .LVL24: + 441 .L42: + 849:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** assert_param(IS_CAN_FILTER_ID_HALFWORD(sFilterConfig->FilterIdLow)); + 442 .loc 1 849 5 is_stmt 1 view .LVU124 + 850:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** assert_param(IS_CAN_FILTER_ID_HALFWORD(sFilterConfig->FilterMaskIdHigh)); + 443 .loc 1 850 5 view .LVU125 + 851:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** assert_param(IS_CAN_FILTER_ID_HALFWORD(sFilterConfig->FilterMaskIdLow)); + 444 .loc 1 851 5 view .LVU126 + 852:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** assert_param(IS_CAN_FILTER_MODE(sFilterConfig->FilterMode)); + 445 .loc 1 852 5 view .LVU127 + 853:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** assert_param(IS_CAN_FILTER_SCALE(sFilterConfig->FilterScale)); + 446 .loc 1 853 5 view .LVU128 + 854:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** assert_param(IS_CAN_FILTER_FIFO(sFilterConfig->FilterFIFOAssignment)); + 447 .loc 1 854 5 view .LVU129 + 855:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** assert_param(IS_CAN_FILTER_ACTIVATION(sFilterConfig->FilterActivation)); + 448 .loc 1 855 5 view .LVU130 + 856:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** + 449 .loc 1 856 5 view .LVU131 + 861:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** + 450 .loc 1 861 5 view .LVU132 + 864:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** + 451 .loc 1 864 5 view .LVU133 + 452 001e 8024 movs r4, #128 + 453 0020 A400 lsls r4, r4, #2 + 454 0022 1059 ldr r0, [r2, r4] + 455 .LVL25: + 864:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** + 456 .loc 1 864 5 is_stmt 0 view .LVU134 + 457 0024 0123 movs r3, #1 + 458 0026 1843 orrs r0, r3 + 459 0028 1051 str r0, [r2, r4] + 867:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** + 460 .loc 1 867 5 is_stmt 1 view .LVU135 + 867:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** + 461 .loc 1 867 52 is_stmt 0 view .LVU136 + 462 002a 4C69 ldr r4, [r1, #20] + 867:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** + 463 .loc 1 867 65 view .LVU137 + 464 002c 1F20 movs r0, #31 + 465 002e 2040 ands r0, r4 + 867:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** + 466 .loc 1 867 21 view .LVU138 + 467 0030 8340 lsls r3, r3, r0 + 468 .LVL26: + 870:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** + 469 .loc 1 870 5 is_stmt 1 view .LVU139 + 470 0032 8724 movs r4, #135 + 471 0034 A400 lsls r4, r4, #2 + 472 0036 1059 ldr r0, [r2, r4] + 473 0038 DD43 mvns r5, r3 + 474 003a 9843 bics r0, r3 + 475 003c 1051 str r0, [r2, r4] + 873:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** { + 476 .loc 1 873 5 view .LVU140 + 873:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** { + 477 .loc 1 873 22 is_stmt 0 view .LVU141 + ARM GAS /tmp/ccftcnYc.s page 28 + + + 478 003e C869 ldr r0, [r1, #28] + 873:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** { + 479 .loc 1 873 8 view .LVU142 + 480 0040 0028 cmp r0, #0 + 481 0042 18D1 bne .L34 + 876:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** + 482 .loc 1 876 7 is_stmt 1 view .LVU143 + 483 0044 103C subs r4, r4, #16 + 484 0046 1059 ldr r0, [r2, r4] + 485 0048 2840 ands r0, r5 + 486 004a 1051 str r0, [r2, r4] + 880:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** ((0x0000FFFFU & (uint32_t)sFilterConfig->FilterMaskIdLow) << 16U) | + 487 .loc 1 880 7 view .LVU144 + 881:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** (0x0000FFFFU & (uint32_t)sFilterConfig->FilterIdLow); + 488 .loc 1 881 48 is_stmt 0 view .LVU145 + 489 004c CC68 ldr r4, [r1, #12] + 881:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** (0x0000FFFFU & (uint32_t)sFilterConfig->FilterIdLow); + 490 .loc 1 881 67 view .LVU146 + 491 004e 2404 lsls r4, r4, #16 + 882:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** + 492 .loc 1 882 47 view .LVU147 + 493 0050 4E68 ldr r6, [r1, #4] + 882:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** + 494 .loc 1 882 22 view .LVU148 + 495 0052 3604 lsls r6, r6, #16 + 496 0054 360C lsrs r6, r6, #16 + 880:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** ((0x0000FFFFU & (uint32_t)sFilterConfig->FilterMaskIdLow) << 16U) | + 497 .loc 1 880 44 view .LVU149 + 498 0056 4869 ldr r0, [r1, #20] + 881:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** (0x0000FFFFU & (uint32_t)sFilterConfig->FilterIdLow); + 499 .loc 1 881 75 view .LVU150 + 500 0058 3443 orrs r4, r6 + 880:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** ((0x0000FFFFU & (uint32_t)sFilterConfig->FilterMaskIdLow) << 16U) | + 501 .loc 1 880 62 view .LVU151 + 502 005a 4830 adds r0, r0, #72 + 503 005c C000 lsls r0, r0, #3 + 504 005e 8450 str r4, [r0, r2] + 886:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** ((0x0000FFFFU & (uint32_t)sFilterConfig->FilterMaskIdHigh) << 16U) | + 505 .loc 1 886 7 is_stmt 1 view .LVU152 + 887:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** (0x0000FFFFU & (uint32_t)sFilterConfig->FilterIdHigh); + 506 .loc 1 887 48 is_stmt 0 view .LVU153 + 507 0060 8C68 ldr r4, [r1, #8] + 887:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** (0x0000FFFFU & (uint32_t)sFilterConfig->FilterIdHigh); + 508 .loc 1 887 68 view .LVU154 + 509 0062 2404 lsls r4, r4, #16 + 888:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** } + 510 .loc 1 888 47 view .LVU155 + 511 0064 0E68 ldr r6, [r1] + 888:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** } + 512 .loc 1 888 22 view .LVU156 + 513 0066 3604 lsls r6, r6, #16 + 514 0068 360C lsrs r6, r6, #16 + 886:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** ((0x0000FFFFU & (uint32_t)sFilterConfig->FilterMaskIdHigh) << 16U) | + 515 .loc 1 886 44 view .LVU157 + 516 006a 4869 ldr r0, [r1, #20] + 887:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** (0x0000FFFFU & (uint32_t)sFilterConfig->FilterIdHigh); + 517 .loc 1 887 76 view .LVU158 + ARM GAS /tmp/ccftcnYc.s page 29 + + + 518 006c 3443 orrs r4, r6 + 886:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** ((0x0000FFFFU & (uint32_t)sFilterConfig->FilterMaskIdHigh) << 16U) | + 519 .loc 1 886 62 view .LVU159 + 520 006e 4830 adds r0, r0, #72 + 521 0070 C000 lsls r0, r0, #3 + 522 0072 1018 adds r0, r2, r0 + 523 0074 4460 str r4, [r0, #4] + 524 .L34: + 891:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** { + 525 .loc 1 891 5 is_stmt 1 view .LVU160 + 891:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** { + 526 .loc 1 891 22 is_stmt 0 view .LVU161 + 527 0076 C869 ldr r0, [r1, #28] + 891:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** { + 528 .loc 1 891 8 view .LVU162 + 529 0078 0128 cmp r0, #1 + 530 007a 1AD0 beq .L43 + 531 .L35: + 908:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** { + 532 .loc 1 908 5 is_stmt 1 view .LVU163 + 908:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** { + 533 .loc 1 908 22 is_stmt 0 view .LVU164 + 534 007c 8869 ldr r0, [r1, #24] + 908:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** { + 535 .loc 1 908 8 view .LVU165 + 536 007e 0028 cmp r0, #0 + 537 0080 32D1 bne .L36 + 911:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** } + 538 .loc 1 911 7 is_stmt 1 view .LVU166 + 539 0082 8124 movs r4, #129 + 540 0084 A400 lsls r4, r4, #2 + 541 0086 1059 ldr r0, [r2, r4] + 542 0088 2840 ands r0, r5 + 543 008a 1051 str r0, [r2, r4] + 544 .L37: + 920:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** { + 545 .loc 1 920 5 view .LVU167 + 920:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** { + 546 .loc 1 920 22 is_stmt 0 view .LVU168 + 547 008c 0869 ldr r0, [r1, #16] + 920:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** { + 548 .loc 1 920 8 view .LVU169 + 549 008e 0028 cmp r0, #0 + 550 0090 30D1 bne .L38 + 923:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** } + 551 .loc 1 923 7 is_stmt 1 view .LVU170 + 552 0092 8524 movs r4, #133 + 553 0094 A400 lsls r4, r4, #2 + 554 0096 1059 ldr r0, [r2, r4] + 555 0098 2840 ands r0, r5 + 556 009a 1051 str r0, [r2, r4] + 557 .L39: + 932:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** { + 558 .loc 1 932 5 view .LVU171 + 932:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** { + 559 .loc 1 932 22 is_stmt 0 view .LVU172 + 560 009c 096A ldr r1, [r1, #32] + ARM GAS /tmp/ccftcnYc.s page 30 + + + 561 .LVL27: + 932:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** { + 562 .loc 1 932 8 view .LVU173 + 563 009e 0129 cmp r1, #1 + 564 00a0 2ED0 beq .L44 + 565 .LVL28: + 566 .L40: + 938:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** + 567 .loc 1 938 5 is_stmt 1 view .LVU174 + 568 00a2 8021 movs r1, #128 + 569 00a4 8900 lsls r1, r1, #2 + 570 00a6 5358 ldr r3, [r2, r1] + 571 00a8 0120 movs r0, #1 + 572 00aa 8343 bics r3, r0 + 573 00ac 5350 str r3, [r2, r1] + 941:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** } + 574 .loc 1 941 5 view .LVU175 + 941:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** } + 575 .loc 1 941 12 is_stmt 0 view .LVU176 + 576 00ae 0020 movs r0, #0 + 577 00b0 B4E7 b .L41 + 578 .LVL29: + 579 .L43: + 894:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** + 580 .loc 1 894 7 is_stmt 1 view .LVU177 + 581 00b2 8324 movs r4, #131 + 582 00b4 A400 lsls r4, r4, #2 + 583 00b6 1059 ldr r0, [r2, r4] + 584 00b8 1843 orrs r0, r3 + 585 00ba 1051 str r0, [r2, r4] + 897:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** ((0x0000FFFFU & (uint32_t)sFilterConfig->FilterIdHigh) << 16U) | + 586 .loc 1 897 7 view .LVU178 + 898:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** (0x0000FFFFU & (uint32_t)sFilterConfig->FilterIdLow); + 587 .loc 1 898 48 is_stmt 0 view .LVU179 + 588 00bc 0C68 ldr r4, [r1] + 898:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** (0x0000FFFFU & (uint32_t)sFilterConfig->FilterIdLow); + 589 .loc 1 898 64 view .LVU180 + 590 00be 2404 lsls r4, r4, #16 + 899:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** + 591 .loc 1 899 47 view .LVU181 + 592 00c0 4E68 ldr r6, [r1, #4] + 899:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** + 593 .loc 1 899 22 view .LVU182 + 594 00c2 3604 lsls r6, r6, #16 + 595 00c4 360C lsrs r6, r6, #16 + 897:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** ((0x0000FFFFU & (uint32_t)sFilterConfig->FilterIdHigh) << 16U) | + 596 .loc 1 897 44 view .LVU183 + 597 00c6 4869 ldr r0, [r1, #20] + 898:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** (0x0000FFFFU & (uint32_t)sFilterConfig->FilterIdLow); + 598 .loc 1 898 72 view .LVU184 + 599 00c8 3443 orrs r4, r6 + 897:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** ((0x0000FFFFU & (uint32_t)sFilterConfig->FilterIdHigh) << 16U) | + 600 .loc 1 897 62 view .LVU185 + 601 00ca 4830 adds r0, r0, #72 + 602 00cc C000 lsls r0, r0, #3 + 603 00ce 8450 str r4, [r0, r2] + 902:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** ((0x0000FFFFU & (uint32_t)sFilterConfig->FilterMaskIdHigh) << 16U) | + ARM GAS /tmp/ccftcnYc.s page 31 + + + 604 .loc 1 902 7 is_stmt 1 view .LVU186 + 903:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** (0x0000FFFFU & (uint32_t)sFilterConfig->FilterMaskIdLow); + 605 .loc 1 903 48 is_stmt 0 view .LVU187 + 606 00d0 8C68 ldr r4, [r1, #8] + 903:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** (0x0000FFFFU & (uint32_t)sFilterConfig->FilterMaskIdLow); + 607 .loc 1 903 68 view .LVU188 + 608 00d2 2404 lsls r4, r4, #16 + 904:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** } + 609 .loc 1 904 47 view .LVU189 + 610 00d4 CE68 ldr r6, [r1, #12] + 904:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** } + 611 .loc 1 904 22 view .LVU190 + 612 00d6 3604 lsls r6, r6, #16 + 613 00d8 360C lsrs r6, r6, #16 + 902:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** ((0x0000FFFFU & (uint32_t)sFilterConfig->FilterMaskIdHigh) << 16U) | + 614 .loc 1 902 44 view .LVU191 + 615 00da 4869 ldr r0, [r1, #20] + 903:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** (0x0000FFFFU & (uint32_t)sFilterConfig->FilterMaskIdLow); + 616 .loc 1 903 76 view .LVU192 + 617 00dc 3443 orrs r4, r6 + 902:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** ((0x0000FFFFU & (uint32_t)sFilterConfig->FilterMaskIdHigh) << 16U) | + 618 .loc 1 902 62 view .LVU193 + 619 00de 4830 adds r0, r0, #72 + 620 00e0 C000 lsls r0, r0, #3 + 621 00e2 1018 adds r0, r2, r0 + 622 00e4 4460 str r4, [r0, #4] + 623 00e6 C9E7 b .L35 + 624 .L36: + 916:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** } + 625 .loc 1 916 7 is_stmt 1 view .LVU194 + 626 00e8 8124 movs r4, #129 + 627 00ea A400 lsls r4, r4, #2 + 628 00ec 1059 ldr r0, [r2, r4] + 629 00ee 1843 orrs r0, r3 + 630 00f0 1051 str r0, [r2, r4] + 631 00f2 CBE7 b .L37 + 632 .L38: + 928:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** } + 633 .loc 1 928 7 view .LVU195 + 634 00f4 8524 movs r4, #133 + 635 00f6 A400 lsls r4, r4, #2 + 636 00f8 1059 ldr r0, [r2, r4] + 637 00fa 1843 orrs r0, r3 + 638 00fc 1051 str r0, [r2, r4] + 639 00fe CDE7 b .L39 + 640 .LVL30: + 641 .L44: + 934:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** } + 642 .loc 1 934 7 view .LVU196 + 643 0100 8720 movs r0, #135 + 644 0102 8000 lsls r0, r0, #2 + 645 0104 1158 ldr r1, [r2, r0] + 646 0106 0B43 orrs r3, r1 + 647 .LVL31: + 934:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** } + 648 .loc 1 934 7 is_stmt 0 view .LVU197 + 649 0108 1350 str r3, [r2, r0] + ARM GAS /tmp/ccftcnYc.s page 32 + + + 650 010a CAE7 b .L40 + 651 .cfi_endproc + 652 .LFE44: + 654 .section .text.HAL_CAN_Start,"ax",%progbits + 655 .align 1 + 656 .global HAL_CAN_Start + 657 .syntax unified + 658 .code 16 + 659 .thumb_func + 661 HAL_CAN_Start: + 662 .LVL32: + 663 .LFB45: + 951:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** + 952:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** /** + 953:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** * @} + 954:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** */ + 955:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** + 956:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** /** @defgroup CAN_Exported_Functions_Group3 Control functions + 957:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** * @brief Control functions + 958:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** * + 959:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** @verbatim + 960:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** ============================================================================== + 961:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** ##### Control functions ##### + 962:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** ============================================================================== + 963:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** [..] This section provides functions allowing to: + 964:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** (+) HAL_CAN_Start : Start the CAN module + 965:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** (+) HAL_CAN_Stop : Stop the CAN module + 966:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** (+) HAL_CAN_RequestSleep : Request sleep mode entry. + 967:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** (+) HAL_CAN_WakeUp : Wake up from sleep mode. + 968:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** (+) HAL_CAN_IsSleepActive : Check is sleep mode is active. + 969:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** (+) HAL_CAN_AddTxMessage : Add a message to the Tx mailboxes + 970:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** and activate the corresponding + 971:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** transmission request + 972:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** (+) HAL_CAN_AbortTxRequest : Abort transmission request + 973:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** (+) HAL_CAN_GetTxMailboxesFreeLevel : Return Tx mailboxes free level + 974:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** (+) HAL_CAN_IsTxMessagePending : Check if a transmission request is + 975:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** pending on the selected Tx mailbox + 976:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** (+) HAL_CAN_GetRxMessage : Get a CAN frame from the Rx FIFO + 977:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** (+) HAL_CAN_GetRxFifoFillLevel : Return Rx FIFO fill level + 978:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** + 979:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** @endverbatim + 980:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** * @{ + 981:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** */ + 982:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** + 983:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** /** + 984:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** * @brief Start the CAN module. + 985:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** * @param hcan pointer to an CAN_HandleTypeDef structure that contains + 986:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** * the configuration information for the specified CAN. + 987:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** * @retval HAL status + 988:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** */ + 989:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** HAL_StatusTypeDef HAL_CAN_Start(CAN_HandleTypeDef *hcan) + 990:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** { + 664 .loc 1 990 1 is_stmt 1 view -0 + 665 .cfi_startproc + 666 @ args = 0, pretend = 0, frame = 0 + 667 @ frame_needed = 0, uses_anonymous_args = 0 + 668 .loc 1 990 1 is_stmt 0 view .LVU199 + ARM GAS /tmp/ccftcnYc.s page 33 + + + 669 0000 70B5 push {r4, r5, r6, lr} + 670 .cfi_def_cfa_offset 16 + 671 .cfi_offset 4, -16 + 672 .cfi_offset 5, -12 + 673 .cfi_offset 6, -8 + 674 .cfi_offset 14, -4 + 675 0002 0400 movs r4, r0 + 991:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** uint32_t tickstart; + 676 .loc 1 991 3 is_stmt 1 view .LVU200 + 992:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** + 993:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** if (hcan->State == HAL_CAN_STATE_READY) + 677 .loc 1 993 3 view .LVU201 + 678 .loc 1 993 11 is_stmt 0 view .LVU202 + 679 0004 2023 movs r3, #32 + 680 0006 C35C ldrb r3, [r0, r3] + 681 0008 DEB2 uxtb r6, r3 + 682 .loc 1 993 6 view .LVU203 + 683 000a 012B cmp r3, #1 + 684 000c 07D0 beq .L50 + 994:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** { + 995:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** /* Change CAN peripheral state */ + 996:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** hcan->State = HAL_CAN_STATE_LISTENING; + 997:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** + 998:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** /* Request leave initialisation */ + 999:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** CLEAR_BIT(hcan->Instance->MCR, CAN_MCR_INRQ); +1000:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** +1001:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** /* Get tick */ +1002:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** tickstart = HAL_GetTick(); +1003:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** +1004:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** /* Wait the acknowledge */ +1005:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** while ((hcan->Instance->MSR & CAN_MSR_INAK) != 0U) +1006:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** { +1007:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** /* Check for the Timeout */ +1008:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** if ((HAL_GetTick() - tickstart) > CAN_TIMEOUT_VALUE) +1009:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** { +1010:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** /* Update error code */ +1011:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** hcan->ErrorCode |= HAL_CAN_ERROR_TIMEOUT; +1012:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** +1013:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** /* Change CAN state */ +1014:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** hcan->State = HAL_CAN_STATE_ERROR; +1015:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** +1016:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** return HAL_ERROR; +1017:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** } +1018:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** } +1019:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** +1020:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** /* Reset the CAN ErrorCode */ +1021:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** hcan->ErrorCode = HAL_CAN_ERROR_NONE; +1022:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** +1023:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** /* Return function status */ +1024:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** return HAL_OK; +1025:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** } +1026:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** else +1027:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** { +1028:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** /* Update error code */ +1029:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** hcan->ErrorCode |= HAL_CAN_ERROR_NOT_READY; + 685 .loc 1 1029 5 is_stmt 1 view .LVU204 + 686 .loc 1 1029 9 is_stmt 0 view .LVU205 + ARM GAS /tmp/ccftcnYc.s page 34 + + + 687 000e 426A ldr r2, [r0, #36] + 688 .loc 1 1029 21 view .LVU206 + 689 0010 8023 movs r3, #128 + 690 0012 1B03 lsls r3, r3, #12 + 691 0014 1343 orrs r3, r2 + 692 0016 4362 str r3, [r0, #36] +1030:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** +1031:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** return HAL_ERROR; + 693 .loc 1 1031 5 is_stmt 1 view .LVU207 + 694 .loc 1 1031 12 is_stmt 0 view .LVU208 + 695 0018 0126 movs r6, #1 + 696 .LVL33: + 697 .L48: +1032:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** } +1033:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** } + 698 .loc 1 1033 1 view .LVU209 + 699 001a 3000 movs r0, r6 + 700 @ sp needed + 701 .LVL34: + 702 .loc 1 1033 1 view .LVU210 + 703 001c 70BD pop {r4, r5, r6, pc} + 704 .LVL35: + 705 .L50: + 996:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** + 706 .loc 1 996 5 is_stmt 1 view .LVU211 + 996:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** + 707 .loc 1 996 17 is_stmt 0 view .LVU212 + 708 001e 1F33 adds r3, r3, #31 + 709 0020 0222 movs r2, #2 + 710 0022 C254 strb r2, [r0, r3] + 999:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** + 711 .loc 1 999 5 is_stmt 1 view .LVU213 + 712 0024 0268 ldr r2, [r0] + 713 0026 1368 ldr r3, [r2] + 714 0028 0121 movs r1, #1 + 715 002a 8B43 bics r3, r1 + 716 002c 1360 str r3, [r2] +1002:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** + 717 .loc 1 1002 5 view .LVU214 +1002:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** + 718 .loc 1 1002 17 is_stmt 0 view .LVU215 + 719 002e FFF7FEFF bl HAL_GetTick + 720 .LVL36: +1002:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** + 721 .loc 1 1002 17 view .LVU216 + 722 0032 0500 movs r5, r0 + 723 .LVL37: +1005:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** { + 724 .loc 1 1005 5 is_stmt 1 view .LVU217 + 725 .L47: +1005:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** { + 726 .loc 1 1005 49 view .LVU218 +1005:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** { + 727 .loc 1 1005 17 is_stmt 0 view .LVU219 + 728 0034 2368 ldr r3, [r4] +1005:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** { + 729 .loc 1 1005 27 view .LVU220 + ARM GAS /tmp/ccftcnYc.s page 35 + + + 730 0036 5B68 ldr r3, [r3, #4] +1005:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** { + 731 .loc 1 1005 49 view .LVU221 + 732 0038 DB07 lsls r3, r3, #31 + 733 003a 0DD5 bpl .L51 +1008:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** { + 734 .loc 1 1008 7 is_stmt 1 view .LVU222 +1008:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** { + 735 .loc 1 1008 12 is_stmt 0 view .LVU223 + 736 003c FFF7FEFF bl HAL_GetTick + 737 .LVL38: +1008:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** { + 738 .loc 1 1008 26 discriminator 1 view .LVU224 + 739 0040 401B subs r0, r0, r5 +1008:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** { + 740 .loc 1 1008 10 discriminator 1 view .LVU225 + 741 0042 0A28 cmp r0, #10 + 742 0044 F6D9 bls .L47 +1011:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** + 743 .loc 1 1011 9 is_stmt 1 view .LVU226 +1011:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** + 744 .loc 1 1011 13 is_stmt 0 view .LVU227 + 745 0046 626A ldr r2, [r4, #36] +1011:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** + 746 .loc 1 1011 25 view .LVU228 + 747 0048 8023 movs r3, #128 + 748 004a 9B02 lsls r3, r3, #10 + 749 004c 1343 orrs r3, r2 + 750 004e 6362 str r3, [r4, #36] +1014:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** + 751 .loc 1 1014 9 is_stmt 1 view .LVU229 +1014:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** + 752 .loc 1 1014 21 is_stmt 0 view .LVU230 + 753 0050 2023 movs r3, #32 + 754 0052 0522 movs r2, #5 + 755 0054 E254 strb r2, [r4, r3] +1016:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** } + 756 .loc 1 1016 9 is_stmt 1 view .LVU231 +1016:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** } + 757 .loc 1 1016 16 is_stmt 0 view .LVU232 + 758 0056 E0E7 b .L48 + 759 .L51: +1021:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** + 760 .loc 1 1021 5 is_stmt 1 view .LVU233 +1021:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** + 761 .loc 1 1021 21 is_stmt 0 view .LVU234 + 762 0058 0023 movs r3, #0 + 763 005a 6362 str r3, [r4, #36] +1024:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** } + 764 .loc 1 1024 5 is_stmt 1 view .LVU235 +1024:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** } + 765 .loc 1 1024 12 is_stmt 0 view .LVU236 + 766 005c 0026 movs r6, #0 + 767 005e DCE7 b .L48 + 768 .cfi_endproc + 769 .LFE45: + 771 .section .text.HAL_CAN_Stop,"ax",%progbits + ARM GAS /tmp/ccftcnYc.s page 36 + + + 772 .align 1 + 773 .global HAL_CAN_Stop + 774 .syntax unified + 775 .code 16 + 776 .thumb_func + 778 HAL_CAN_Stop: + 779 .LVL39: + 780 .LFB46: +1034:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** +1035:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** /** +1036:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** * @brief Stop the CAN module and enable access to configuration registers. +1037:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** * @param hcan pointer to an CAN_HandleTypeDef structure that contains +1038:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** * the configuration information for the specified CAN. +1039:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** * @retval HAL status +1040:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** */ +1041:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** HAL_StatusTypeDef HAL_CAN_Stop(CAN_HandleTypeDef *hcan) +1042:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** { + 781 .loc 1 1042 1 is_stmt 1 view -0 + 782 .cfi_startproc + 783 @ args = 0, pretend = 0, frame = 0 + 784 @ frame_needed = 0, uses_anonymous_args = 0 + 785 .loc 1 1042 1 is_stmt 0 view .LVU238 + 786 0000 70B5 push {r4, r5, r6, lr} + 787 .cfi_def_cfa_offset 16 + 788 .cfi_offset 4, -16 + 789 .cfi_offset 5, -12 + 790 .cfi_offset 6, -8 + 791 .cfi_offset 14, -4 + 792 0002 0400 movs r4, r0 +1043:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** uint32_t tickstart; + 793 .loc 1 1043 3 is_stmt 1 view .LVU239 +1044:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** +1045:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** if (hcan->State == HAL_CAN_STATE_LISTENING) + 794 .loc 1 1045 3 view .LVU240 + 795 .loc 1 1045 11 is_stmt 0 view .LVU241 + 796 0004 2023 movs r3, #32 + 797 0006 C35C ldrb r3, [r0, r3] + 798 .loc 1 1045 6 view .LVU242 + 799 0008 022B cmp r3, #2 + 800 000a 06D0 beq .L57 +1046:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** { +1047:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** /* Request initialisation */ +1048:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** SET_BIT(hcan->Instance->MCR, CAN_MCR_INRQ); +1049:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** +1050:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** /* Get tick */ +1051:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** tickstart = HAL_GetTick(); +1052:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** +1053:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** /* Wait the acknowledge */ +1054:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** while ((hcan->Instance->MSR & CAN_MSR_INAK) == 0U) +1055:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** { +1056:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** /* Check for the Timeout */ +1057:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** if ((HAL_GetTick() - tickstart) > CAN_TIMEOUT_VALUE) +1058:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** { +1059:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** /* Update error code */ +1060:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** hcan->ErrorCode |= HAL_CAN_ERROR_TIMEOUT; +1061:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** +1062:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** /* Change CAN state */ + ARM GAS /tmp/ccftcnYc.s page 37 + + +1063:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** hcan->State = HAL_CAN_STATE_ERROR; +1064:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** +1065:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** return HAL_ERROR; +1066:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** } +1067:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** } +1068:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** +1069:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** /* Exit from sleep mode */ +1070:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** CLEAR_BIT(hcan->Instance->MCR, CAN_MCR_SLEEP); +1071:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** +1072:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** /* Change CAN peripheral state */ +1073:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** hcan->State = HAL_CAN_STATE_READY; +1074:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** +1075:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** /* Return function status */ +1076:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** return HAL_OK; +1077:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** } +1078:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** else +1079:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** { +1080:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** /* Update error code */ +1081:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** hcan->ErrorCode |= HAL_CAN_ERROR_NOT_STARTED; + 801 .loc 1 1081 5 is_stmt 1 view .LVU243 + 802 .loc 1 1081 9 is_stmt 0 view .LVU244 + 803 000c 426A ldr r2, [r0, #36] + 804 .loc 1 1081 21 view .LVU245 + 805 000e 8023 movs r3, #128 + 806 0010 5B03 lsls r3, r3, #13 + 807 0012 1343 orrs r3, r2 + 808 0014 4362 str r3, [r0, #36] +1082:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** +1083:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** return HAL_ERROR; + 809 .loc 1 1083 5 is_stmt 1 view .LVU246 + 810 .loc 1 1083 12 is_stmt 0 view .LVU247 + 811 0016 0120 movs r0, #1 + 812 .LVL40: + 813 .L55: +1084:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** } +1085:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** } + 814 .loc 1 1085 1 view .LVU248 + 815 @ sp needed + 816 .LVL41: + 817 .loc 1 1085 1 view .LVU249 + 818 0018 70BD pop {r4, r5, r6, pc} + 819 .LVL42: + 820 .L57: +1048:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** + 821 .loc 1 1048 5 is_stmt 1 view .LVU250 + 822 001a 0268 ldr r2, [r0] + 823 001c 1368 ldr r3, [r2] + 824 001e 0121 movs r1, #1 + 825 0020 0B43 orrs r3, r1 + 826 0022 1360 str r3, [r2] +1051:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** + 827 .loc 1 1051 5 view .LVU251 +1051:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** + 828 .loc 1 1051 17 is_stmt 0 view .LVU252 + 829 0024 FFF7FEFF bl HAL_GetTick + 830 .LVL43: +1051:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** + ARM GAS /tmp/ccftcnYc.s page 38 + + + 831 .loc 1 1051 17 view .LVU253 + 832 0028 0500 movs r5, r0 + 833 .LVL44: +1054:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** { + 834 .loc 1 1054 5 is_stmt 1 view .LVU254 + 835 .L54: +1054:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** { + 836 .loc 1 1054 49 view .LVU255 +1054:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** { + 837 .loc 1 1054 17 is_stmt 0 view .LVU256 + 838 002a 2268 ldr r2, [r4] +1054:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** { + 839 .loc 1 1054 27 view .LVU257 + 840 002c 5368 ldr r3, [r2, #4] +1054:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** { + 841 .loc 1 1054 49 view .LVU258 + 842 002e DB07 lsls r3, r3, #31 + 843 0030 0ED4 bmi .L58 +1057:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** { + 844 .loc 1 1057 7 is_stmt 1 view .LVU259 +1057:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** { + 845 .loc 1 1057 12 is_stmt 0 view .LVU260 + 846 0032 FFF7FEFF bl HAL_GetTick + 847 .LVL45: +1057:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** { + 848 .loc 1 1057 26 discriminator 1 view .LVU261 + 849 0036 401B subs r0, r0, r5 +1057:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** { + 850 .loc 1 1057 10 discriminator 1 view .LVU262 + 851 0038 0A28 cmp r0, #10 + 852 003a F6D9 bls .L54 +1060:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** + 853 .loc 1 1060 9 is_stmt 1 view .LVU263 +1060:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** + 854 .loc 1 1060 13 is_stmt 0 view .LVU264 + 855 003c 626A ldr r2, [r4, #36] +1060:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** + 856 .loc 1 1060 25 view .LVU265 + 857 003e 8023 movs r3, #128 + 858 0040 9B02 lsls r3, r3, #10 + 859 0042 1343 orrs r3, r2 + 860 0044 6362 str r3, [r4, #36] +1063:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** + 861 .loc 1 1063 9 is_stmt 1 view .LVU266 +1063:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** + 862 .loc 1 1063 21 is_stmt 0 view .LVU267 + 863 0046 2023 movs r3, #32 + 864 0048 0522 movs r2, #5 + 865 004a E254 strb r2, [r4, r3] +1065:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** } + 866 .loc 1 1065 9 is_stmt 1 view .LVU268 +1065:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** } + 867 .loc 1 1065 16 is_stmt 0 view .LVU269 + 868 004c 0120 movs r0, #1 + 869 004e E3E7 b .L55 + 870 .L58: +1070:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** + ARM GAS /tmp/ccftcnYc.s page 39 + + + 871 .loc 1 1070 5 is_stmt 1 view .LVU270 + 872 0050 1368 ldr r3, [r2] + 873 0052 0221 movs r1, #2 + 874 0054 8B43 bics r3, r1 + 875 0056 1360 str r3, [r2] +1073:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** + 876 .loc 1 1073 5 view .LVU271 +1073:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** + 877 .loc 1 1073 17 is_stmt 0 view .LVU272 + 878 0058 2023 movs r3, #32 + 879 005a 0122 movs r2, #1 + 880 005c E254 strb r2, [r4, r3] +1076:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** } + 881 .loc 1 1076 5 is_stmt 1 view .LVU273 +1076:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** } + 882 .loc 1 1076 12 is_stmt 0 view .LVU274 + 883 005e 0020 movs r0, #0 + 884 0060 DAE7 b .L55 + 885 .cfi_endproc + 886 .LFE46: + 888 .section .text.HAL_CAN_DeInit,"ax",%progbits + 889 .align 1 + 890 .global HAL_CAN_DeInit + 891 .syntax unified + 892 .code 16 + 893 .thumb_func + 895 HAL_CAN_DeInit: + 896 .LVL46: + 897 .LFB41: + 460:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** /* Check CAN handle */ + 898 .loc 1 460 1 is_stmt 1 view -0 + 899 .cfi_startproc + 900 @ args = 0, pretend = 0, frame = 0 + 901 @ frame_needed = 0, uses_anonymous_args = 0 + 460:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** /* Check CAN handle */ + 902 .loc 1 460 1 is_stmt 0 view .LVU276 + 903 0000 10B5 push {r4, lr} + 904 .cfi_def_cfa_offset 8 + 905 .cfi_offset 4, -8 + 906 .cfi_offset 14, -4 + 907 0002 041E subs r4, r0, #0 + 462:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** { + 908 .loc 1 462 3 is_stmt 1 view .LVU277 + 462:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** { + 909 .loc 1 462 6 is_stmt 0 view .LVU278 + 910 0004 10D0 beq .L61 + 468:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** + 911 .loc 1 468 3 is_stmt 1 view .LVU279 + 471:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** + 912 .loc 1 471 3 view .LVU280 + 471:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** + 913 .loc 1 471 9 is_stmt 0 view .LVU281 + 914 0006 FFF7FEFF bl HAL_CAN_Stop + 915 .LVL47: + 484:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** #endif /* (USE_HAL_CAN_REGISTER_CALLBACKS) */ + 916 .loc 1 484 3 is_stmt 1 view .LVU282 + 917 000a 2000 movs r0, r4 + ARM GAS /tmp/ccftcnYc.s page 40 + + + 918 000c FFF7FEFF bl HAL_CAN_MspDeInit + 919 .LVL48: + 488:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** + 920 .loc 1 488 3 view .LVU283 + 921 0010 2268 ldr r2, [r4] + 922 0012 1168 ldr r1, [r2] + 923 0014 8023 movs r3, #128 + 924 0016 1B02 lsls r3, r3, #8 + 925 0018 0B43 orrs r3, r1 + 926 001a 1360 str r3, [r2] + 491:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** + 927 .loc 1 491 3 view .LVU284 + 491:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** + 928 .loc 1 491 19 is_stmt 0 view .LVU285 + 929 001c 0023 movs r3, #0 + 930 001e 6362 str r3, [r4, #36] + 494:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** + 931 .loc 1 494 3 is_stmt 1 view .LVU286 + 494:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** + 932 .loc 1 494 15 is_stmt 0 view .LVU287 + 933 0020 2022 movs r2, #32 + 934 0022 A354 strb r3, [r4, r2] + 497:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** } + 935 .loc 1 497 3 is_stmt 1 view .LVU288 + 497:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** } + 936 .loc 1 497 10 is_stmt 0 view .LVU289 + 937 0024 0020 movs r0, #0 + 938 .L60: + 498:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** + 939 .loc 1 498 1 view .LVU290 + 940 @ sp needed + 941 .LVL49: + 498:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** + 942 .loc 1 498 1 view .LVU291 + 943 0026 10BD pop {r4, pc} + 944 .LVL50: + 945 .L61: + 464:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** } + 946 .loc 1 464 12 view .LVU292 + 947 0028 0120 movs r0, #1 + 948 .LVL51: + 464:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** } + 949 .loc 1 464 12 view .LVU293 + 950 002a FCE7 b .L60 + 951 .cfi_endproc + 952 .LFE41: + 954 .section .text.HAL_CAN_RequestSleep,"ax",%progbits + 955 .align 1 + 956 .global HAL_CAN_RequestSleep + 957 .syntax unified + 958 .code 16 + 959 .thumb_func + 961 HAL_CAN_RequestSleep: + 962 .LVL52: + 963 .LFB47: +1086:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** +1087:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** /** + ARM GAS /tmp/ccftcnYc.s page 41 + + +1088:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** * @brief Request the sleep mode (low power) entry. +1089:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** * When returning from this function, Sleep mode will be entered +1090:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** * as soon as the current CAN activity (transmission or reception +1091:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** * of a CAN frame) has been completed. +1092:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** * @param hcan pointer to a CAN_HandleTypeDef structure that contains +1093:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** * the configuration information for the specified CAN. +1094:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** * @retval HAL status. +1095:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** */ +1096:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** HAL_StatusTypeDef HAL_CAN_RequestSleep(CAN_HandleTypeDef *hcan) +1097:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** { + 964 .loc 1 1097 1 is_stmt 1 view -0 + 965 .cfi_startproc + 966 @ args = 0, pretend = 0, frame = 0 + 967 @ frame_needed = 0, uses_anonymous_args = 0 + 968 @ link register save eliminated. +1098:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** HAL_CAN_StateTypeDef state = hcan->State; + 969 .loc 1 1098 3 view .LVU295 + 970 .loc 1 1098 24 is_stmt 0 view .LVU296 + 971 0000 2023 movs r3, #32 + 972 0002 C35C ldrb r3, [r0, r3] + 973 .LVL53: +1099:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** +1100:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** if ((state == HAL_CAN_STATE_READY) || + 974 .loc 1 1100 3 is_stmt 1 view .LVU297 + 975 .loc 1 1100 38 is_stmt 0 view .LVU298 + 976 0004 013B subs r3, r3, #1 + 977 .LVL54: + 978 .loc 1 1100 38 view .LVU299 + 979 0006 DBB2 uxtb r3, r3 + 980 .LVL55: + 981 .loc 1 1100 6 view .LVU300 + 982 0008 012B cmp r3, #1 + 983 000a 06D9 bls .L65 +1101:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** (state == HAL_CAN_STATE_LISTENING)) +1102:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** { +1103:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** /* Request Sleep mode */ +1104:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** SET_BIT(hcan->Instance->MCR, CAN_MCR_SLEEP); +1105:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** +1106:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** /* Return function status */ +1107:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** return HAL_OK; +1108:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** } +1109:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** else +1110:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** { +1111:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** /* Update error code */ +1112:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** hcan->ErrorCode |= HAL_CAN_ERROR_NOT_INITIALIZED; + 984 .loc 1 1112 5 is_stmt 1 view .LVU301 + 985 .loc 1 1112 9 is_stmt 0 view .LVU302 + 986 000c 426A ldr r2, [r0, #36] + 987 .loc 1 1112 21 view .LVU303 + 988 000e 8023 movs r3, #128 + 989 0010 DB02 lsls r3, r3, #11 + 990 0012 1343 orrs r3, r2 + 991 0014 4362 str r3, [r0, #36] +1113:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** +1114:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** /* Return function status */ +1115:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** return HAL_ERROR; + 992 .loc 1 1115 5 is_stmt 1 view .LVU304 + ARM GAS /tmp/ccftcnYc.s page 42 + + + 993 .loc 1 1115 12 is_stmt 0 view .LVU305 + 994 0016 0120 movs r0, #1 + 995 .LVL56: + 996 .L64: +1116:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** } +1117:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** } + 997 .loc 1 1117 1 view .LVU306 + 998 @ sp needed + 999 0018 7047 bx lr + 1000 .LVL57: + 1001 .L65: +1104:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** + 1002 .loc 1 1104 5 is_stmt 1 view .LVU307 + 1003 001a 0268 ldr r2, [r0] + 1004 001c 1368 ldr r3, [r2] + 1005 001e 0221 movs r1, #2 + 1006 0020 0B43 orrs r3, r1 + 1007 0022 1360 str r3, [r2] +1107:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** } + 1008 .loc 1 1107 5 view .LVU308 +1107:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** } + 1009 .loc 1 1107 12 is_stmt 0 view .LVU309 + 1010 0024 0020 movs r0, #0 + 1011 .LVL58: +1107:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** } + 1012 .loc 1 1107 12 view .LVU310 + 1013 0026 F7E7 b .L64 + 1014 .cfi_endproc + 1015 .LFE47: + 1017 .section .text.HAL_CAN_WakeUp,"ax",%progbits + 1018 .align 1 + 1019 .global HAL_CAN_WakeUp + 1020 .syntax unified + 1021 .code 16 + 1022 .thumb_func + 1024 HAL_CAN_WakeUp: + 1025 .LVL59: + 1026 .LFB48: +1118:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** +1119:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** /** +1120:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** * @brief Wake up from sleep mode. +1121:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** * When returning with HAL_OK status from this function, Sleep mode +1122:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** * is exited. +1123:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** * @param hcan pointer to a CAN_HandleTypeDef structure that contains +1124:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** * the configuration information for the specified CAN. +1125:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** * @retval HAL status. +1126:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** */ +1127:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** HAL_StatusTypeDef HAL_CAN_WakeUp(CAN_HandleTypeDef *hcan) +1128:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** { + 1027 .loc 1 1128 1 is_stmt 1 view -0 + 1028 .cfi_startproc + 1029 @ args = 0, pretend = 0, frame = 8 + 1030 @ frame_needed = 0, uses_anonymous_args = 0 + 1031 @ link register save eliminated. + 1032 .loc 1 1128 1 is_stmt 0 view .LVU312 + 1033 0000 82B0 sub sp, sp, #8 + 1034 .cfi_def_cfa_offset 8 + ARM GAS /tmp/ccftcnYc.s page 43 + + +1129:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** __IO uint32_t count = 0; + 1035 .loc 1 1129 3 is_stmt 1 view .LVU313 + 1036 .loc 1 1129 17 is_stmt 0 view .LVU314 + 1037 0002 0023 movs r3, #0 + 1038 0004 0193 str r3, [sp, #4] +1130:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** uint32_t timeout = 1000000U; + 1039 .loc 1 1130 3 is_stmt 1 view .LVU315 + 1040 .LVL60: +1131:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** HAL_CAN_StateTypeDef state = hcan->State; + 1041 .loc 1 1131 3 view .LVU316 + 1042 .loc 1 1131 24 is_stmt 0 view .LVU317 + 1043 0006 2033 adds r3, r3, #32 + 1044 0008 C35C ldrb r3, [r0, r3] + 1045 .LVL61: +1132:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** +1133:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** if ((state == HAL_CAN_STATE_READY) || + 1046 .loc 1 1133 3 is_stmt 1 view .LVU318 + 1047 .loc 1 1133 38 is_stmt 0 view .LVU319 + 1048 000a 013B subs r3, r3, #1 + 1049 .LVL62: + 1050 .loc 1 1133 38 view .LVU320 + 1051 000c DBB2 uxtb r3, r3 + 1052 .LVL63: + 1053 .loc 1 1133 6 view .LVU321 + 1054 000e 012B cmp r3, #1 + 1055 0010 18D8 bhi .L67 +1134:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** (state == HAL_CAN_STATE_LISTENING)) +1135:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** { +1136:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** /* Wake up request */ +1137:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** CLEAR_BIT(hcan->Instance->MCR, CAN_MCR_SLEEP); + 1056 .loc 1 1137 5 is_stmt 1 view .LVU322 + 1057 0012 0268 ldr r2, [r0] + 1058 0014 1368 ldr r3, [r2] + 1059 0016 0221 movs r1, #2 + 1060 0018 8B43 bics r3, r1 + 1061 001a 1360 str r3, [r2] + 1062 .L70: +1138:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** +1139:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** /* Wait sleep mode is exited */ +1140:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** do + 1063 .loc 1 1140 5 view .LVU323 +1141:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** { +1142:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** /* Increment counter */ +1143:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** count++; + 1064 .loc 1 1143 7 view .LVU324 + 1065 .loc 1 1143 12 is_stmt 0 view .LVU325 + 1066 001c 019B ldr r3, [sp, #4] + 1067 001e 0133 adds r3, r3, #1 + 1068 0020 0193 str r3, [sp, #4] +1144:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** +1145:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** /* Check if timeout is reached */ +1146:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** if (count > timeout) + 1069 .loc 1 1146 7 is_stmt 1 view .LVU326 + 1070 .loc 1 1146 17 is_stmt 0 view .LVU327 + 1071 0022 019A ldr r2, [sp, #4] + 1072 .loc 1 1146 10 view .LVU328 + 1073 0024 0B4B ldr r3, .L73 + ARM GAS /tmp/ccftcnYc.s page 44 + + + 1074 0026 9A42 cmp r2, r3 + 1075 0028 05D8 bhi .L72 +1147:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** { +1148:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** /* Update error code */ +1149:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** hcan->ErrorCode |= HAL_CAN_ERROR_TIMEOUT; +1150:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** +1151:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** return HAL_ERROR; +1152:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** } +1153:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** } +1154:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** while ((hcan->Instance->MSR & CAN_MSR_SLAK) != 0U); + 1076 .loc 1 1154 49 is_stmt 1 view .LVU329 + 1077 .loc 1 1154 17 is_stmt 0 view .LVU330 + 1078 002a 0368 ldr r3, [r0] + 1079 .loc 1 1154 27 view .LVU331 + 1080 002c 5B68 ldr r3, [r3, #4] + 1081 .loc 1 1154 49 view .LVU332 + 1082 002e 9B07 lsls r3, r3, #30 + 1083 0030 F4D4 bmi .L70 +1155:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** +1156:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** /* Return function status */ +1157:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** return HAL_OK; + 1084 .loc 1 1157 12 view .LVU333 + 1085 0032 0020 movs r0, #0 + 1086 .LVL64: + 1087 .loc 1 1157 12 view .LVU334 + 1088 0034 0CE0 b .L69 + 1089 .LVL65: + 1090 .L72: +1149:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** + 1091 .loc 1 1149 9 is_stmt 1 view .LVU335 +1149:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** + 1092 .loc 1 1149 13 is_stmt 0 view .LVU336 + 1093 0036 426A ldr r2, [r0, #36] +1149:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** + 1094 .loc 1 1149 25 view .LVU337 + 1095 0038 8023 movs r3, #128 + 1096 003a 9B02 lsls r3, r3, #10 + 1097 003c 1343 orrs r3, r2 + 1098 003e 4362 str r3, [r0, #36] +1151:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** } + 1099 .loc 1 1151 9 is_stmt 1 view .LVU338 +1151:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** } + 1100 .loc 1 1151 16 is_stmt 0 view .LVU339 + 1101 0040 0120 movs r0, #1 + 1102 .LVL66: +1151:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** } + 1103 .loc 1 1151 16 view .LVU340 + 1104 0042 05E0 b .L69 + 1105 .LVL67: + 1106 .L67: +1158:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** } +1159:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** else +1160:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** { +1161:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** /* Update error code */ +1162:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** hcan->ErrorCode |= HAL_CAN_ERROR_NOT_INITIALIZED; + 1107 .loc 1 1162 5 is_stmt 1 view .LVU341 + 1108 .loc 1 1162 9 is_stmt 0 view .LVU342 + ARM GAS /tmp/ccftcnYc.s page 45 + + + 1109 0044 426A ldr r2, [r0, #36] + 1110 .loc 1 1162 21 view .LVU343 + 1111 0046 8023 movs r3, #128 + 1112 0048 DB02 lsls r3, r3, #11 + 1113 004a 1343 orrs r3, r2 + 1114 004c 4362 str r3, [r0, #36] +1163:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** +1164:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** return HAL_ERROR; + 1115 .loc 1 1164 5 is_stmt 1 view .LVU344 + 1116 .loc 1 1164 12 is_stmt 0 view .LVU345 + 1117 004e 0120 movs r0, #1 + 1118 .LVL68: + 1119 .L69: +1165:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** } +1166:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** } + 1120 .loc 1 1166 1 view .LVU346 + 1121 0050 02B0 add sp, sp, #8 + 1122 @ sp needed + 1123 0052 7047 bx lr + 1124 .L74: + 1125 .align 2 + 1126 .L73: + 1127 0054 40420F00 .word 1000000 + 1128 .cfi_endproc + 1129 .LFE48: + 1131 .section .text.HAL_CAN_IsSleepActive,"ax",%progbits + 1132 .align 1 + 1133 .global HAL_CAN_IsSleepActive + 1134 .syntax unified + 1135 .code 16 + 1136 .thumb_func + 1138 HAL_CAN_IsSleepActive: + 1139 .LVL69: + 1140 .LFB49: +1167:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** +1168:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** /** +1169:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** * @brief Check is sleep mode is active. +1170:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** * @param hcan pointer to a CAN_HandleTypeDef structure that contains +1171:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** * the configuration information for the specified CAN. +1172:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** * @retval Status +1173:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** * - 0 : Sleep mode is not active. +1174:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** * - 1 : Sleep mode is active. +1175:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** */ +1176:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** uint32_t HAL_CAN_IsSleepActive(const CAN_HandleTypeDef *hcan) +1177:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** { + 1141 .loc 1 1177 1 is_stmt 1 view -0 + 1142 .cfi_startproc + 1143 @ args = 0, pretend = 0, frame = 0 + 1144 @ frame_needed = 0, uses_anonymous_args = 0 + 1145 @ link register save eliminated. +1178:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** uint32_t status = 0U; + 1146 .loc 1 1178 3 view .LVU348 +1179:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** HAL_CAN_StateTypeDef state = hcan->State; + 1147 .loc 1 1179 3 view .LVU349 + 1148 .loc 1 1179 24 is_stmt 0 view .LVU350 + 1149 0000 2023 movs r3, #32 + 1150 0002 C35C ldrb r3, [r0, r3] + ARM GAS /tmp/ccftcnYc.s page 46 + + + 1151 .LVL70: +1180:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** +1181:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** if ((state == HAL_CAN_STATE_READY) || + 1152 .loc 1 1181 3 is_stmt 1 view .LVU351 + 1153 .loc 1 1181 38 is_stmt 0 view .LVU352 + 1154 0004 013B subs r3, r3, #1 + 1155 .LVL71: + 1156 .loc 1 1181 38 view .LVU353 + 1157 0006 DBB2 uxtb r3, r3 + 1158 .LVL72: + 1159 .loc 1 1181 6 view .LVU354 + 1160 0008 012B cmp r3, #1 + 1161 000a 01D9 bls .L79 +1178:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** HAL_CAN_StateTypeDef state = hcan->State; + 1162 .loc 1 1178 12 view .LVU355 + 1163 000c 0020 movs r0, #0 + 1164 .LVL73: + 1165 .L75: +1182:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** (state == HAL_CAN_STATE_LISTENING)) +1183:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** { +1184:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** /* Check Sleep mode */ +1185:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** if ((hcan->Instance->MSR & CAN_MSR_SLAK) != 0U) +1186:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** { +1187:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** status = 1U; +1188:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** } +1189:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** } +1190:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** +1191:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** /* Return function status */ +1192:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** return status; +1193:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** } + 1166 .loc 1 1193 1 view .LVU356 + 1167 @ sp needed + 1168 000e 7047 bx lr + 1169 .LVL74: + 1170 .L79: +1185:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** { + 1171 .loc 1 1185 5 is_stmt 1 view .LVU357 +1185:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** { + 1172 .loc 1 1185 14 is_stmt 0 view .LVU358 + 1173 0010 0368 ldr r3, [r0] +1185:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** { + 1174 .loc 1 1185 24 view .LVU359 + 1175 0012 5B68 ldr r3, [r3, #4] +1185:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** { + 1176 .loc 1 1185 30 view .LVU360 + 1177 0014 0222 movs r2, #2 + 1178 0016 1000 movs r0, r2 + 1179 .LVL75: +1185:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** { + 1180 .loc 1 1185 30 view .LVU361 + 1181 0018 1840 ands r0, r3 +1185:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** { + 1182 .loc 1 1185 8 view .LVU362 + 1183 001a 1A42 tst r2, r3 + 1184 001c F7D0 beq .L75 +1187:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** } + 1185 .loc 1 1187 14 view .LVU363 + ARM GAS /tmp/ccftcnYc.s page 47 + + + 1186 001e 0120 movs r0, #1 + 1187 .LVL76: +1192:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** } + 1188 .loc 1 1192 3 is_stmt 1 view .LVU364 +1192:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** } + 1189 .loc 1 1192 10 is_stmt 0 view .LVU365 + 1190 0020 F5E7 b .L75 + 1191 .cfi_endproc + 1192 .LFE49: + 1194 .section .text.HAL_CAN_AddTxMessage,"ax",%progbits + 1195 .align 1 + 1196 .global HAL_CAN_AddTxMessage + 1197 .syntax unified + 1198 .code 16 + 1199 .thumb_func + 1201 HAL_CAN_AddTxMessage: + 1202 .LVL77: + 1203 .LFB50: +1194:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** +1195:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** /** +1196:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** * @brief Add a message to the first free Tx mailbox and activate the +1197:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** * corresponding transmission request. +1198:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** * @param hcan pointer to a CAN_HandleTypeDef structure that contains +1199:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** * the configuration information for the specified CAN. +1200:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** * @param pHeader pointer to a CAN_TxHeaderTypeDef structure. +1201:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** * @param aData array containing the payload of the Tx frame. +1202:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** * @param pTxMailbox pointer to a variable where the function will return +1203:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** * the TxMailbox used to store the Tx message. +1204:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** * This parameter can be a value of @arg CAN_Tx_Mailboxes. +1205:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** * @retval HAL status +1206:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** */ +1207:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** HAL_StatusTypeDef HAL_CAN_AddTxMessage(CAN_HandleTypeDef *hcan, const CAN_TxHeaderTypeDef *pHeader, +1208:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** const uint8_t aData[], uint32_t *pTxMailbox) +1209:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** { + 1204 .loc 1 1209 1 is_stmt 1 view -0 + 1205 .cfi_startproc + 1206 @ args = 0, pretend = 0, frame = 0 + 1207 @ frame_needed = 0, uses_anonymous_args = 0 + 1208 .loc 1 1209 1 is_stmt 0 view .LVU367 + 1209 0000 70B5 push {r4, r5, r6, lr} + 1210 .cfi_def_cfa_offset 16 + 1211 .cfi_offset 4, -16 + 1212 .cfi_offset 5, -12 + 1213 .cfi_offset 6, -8 + 1214 .cfi_offset 14, -4 +1210:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** uint32_t transmitmailbox; + 1215 .loc 1 1210 3 is_stmt 1 view .LVU368 +1211:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** HAL_CAN_StateTypeDef state = hcan->State; + 1216 .loc 1 1211 3 view .LVU369 + 1217 .loc 1 1211 24 is_stmt 0 view .LVU370 + 1218 0002 2024 movs r4, #32 + 1219 0004 045D ldrb r4, [r0, r4] + 1220 .LVL78: +1212:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** uint32_t tsr = READ_REG(hcan->Instance->TSR); + 1221 .loc 1 1212 3 is_stmt 1 view .LVU371 + 1222 .loc 1 1212 18 is_stmt 0 view .LVU372 + 1223 0006 0568 ldr r5, [r0] + ARM GAS /tmp/ccftcnYc.s page 48 + + + 1224 .loc 1 1212 12 view .LVU373 + 1225 0008 AD68 ldr r5, [r5, #8] + 1226 .LVL79: +1213:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** +1214:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** /* Check the parameters */ +1215:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** assert_param(IS_CAN_IDTYPE(pHeader->IDE)); + 1227 .loc 1 1215 3 is_stmt 1 view .LVU374 +1216:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** assert_param(IS_CAN_RTR(pHeader->RTR)); + 1228 .loc 1 1216 3 view .LVU375 +1217:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** assert_param(IS_CAN_DLC(pHeader->DLC)); + 1229 .loc 1 1217 3 view .LVU376 +1218:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** if (pHeader->IDE == CAN_ID_STD) + 1230 .loc 1 1218 3 view .LVU377 +1219:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** { +1220:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** assert_param(IS_CAN_STDID(pHeader->StdId)); + 1231 .loc 1 1220 5 view .LVU378 +1221:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** } +1222:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** else +1223:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** { +1224:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** assert_param(IS_CAN_EXTID(pHeader->ExtId)); + 1232 .loc 1 1224 5 view .LVU379 +1225:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** } +1226:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** assert_param(IS_FUNCTIONAL_STATE(pHeader->TransmitGlobalTime)); + 1233 .loc 1 1226 3 view .LVU380 +1227:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** +1228:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** if ((state == HAL_CAN_STATE_READY) || + 1234 .loc 1 1228 3 view .LVU381 + 1235 .loc 1 1228 38 is_stmt 0 view .LVU382 + 1236 000a 013C subs r4, r4, #1 + 1237 .LVL80: + 1238 .loc 1 1228 38 view .LVU383 + 1239 000c E4B2 uxtb r4, r4 + 1240 .LVL81: + 1241 .loc 1 1228 6 view .LVU384 + 1242 000e 012C cmp r4, #1 + 1243 0010 61D8 bhi .L81 +1229:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** (state == HAL_CAN_STATE_LISTENING)) +1230:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** { +1231:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** /* Check that all the Tx mailboxes are not full */ +1232:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** if (((tsr & CAN_TSR_TME0) != 0U) || + 1244 .loc 1 1232 5 is_stmt 1 view .LVU385 +1233:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** ((tsr & CAN_TSR_TME1) != 0U) || + 1245 .loc 1 1233 38 is_stmt 0 view .LVU386 + 1246 0012 E024 movs r4, #224 + 1247 0014 6405 lsls r4, r4, #21 +1232:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** ((tsr & CAN_TSR_TME1) != 0U) || + 1248 .loc 1 1232 8 view .LVU387 + 1249 0016 2542 tst r5, r4 + 1250 0018 56D0 beq .L82 +1234:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** ((tsr & CAN_TSR_TME2) != 0U)) +1235:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** { +1236:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** /* Select an empty transmit mailbox */ +1237:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** transmitmailbox = (tsr & CAN_TSR_CODE) >> CAN_TSR_CODE_Pos; + 1251 .loc 1 1237 7 is_stmt 1 view .LVU388 + 1252 .loc 1 1237 46 is_stmt 0 view .LVU389 + 1253 001a 2D0E lsrs r5, r5, #24 + 1254 .LVL82: + ARM GAS /tmp/ccftcnYc.s page 49 + + + 1255 .loc 1 1237 23 view .LVU390 + 1256 001c 0324 movs r4, #3 + 1257 001e 2C40 ands r4, r5 + 1258 .LVL83: +1238:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** +1239:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** /* Store the Tx mailbox */ +1240:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** *pTxMailbox = (uint32_t)1 << transmitmailbox; + 1259 .loc 1 1240 7 is_stmt 1 view .LVU391 + 1260 .loc 1 1240 33 is_stmt 0 view .LVU392 + 1261 0020 0125 movs r5, #1 + 1262 0022 A540 lsls r5, r5, r4 + 1263 .loc 1 1240 19 view .LVU393 + 1264 0024 1D60 str r5, [r3] +1241:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** +1242:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** /* Set up the Id */ +1243:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** if (pHeader->IDE == CAN_ID_STD) + 1265 .loc 1 1243 7 is_stmt 1 view .LVU394 + 1266 .loc 1 1243 18 is_stmt 0 view .LVU395 + 1267 0026 8B68 ldr r3, [r1, #8] + 1268 .LVL84: + 1269 .loc 1 1243 10 view .LVU396 + 1270 0028 002B cmp r3, #0 + 1271 002a 3AD1 bne .L83 +1244:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** { +1245:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** hcan->Instance->sTxMailBox[transmitmailbox].TIR = ((pHeader->StdId << CAN_TI0R_STID_Pos) | + 1272 .loc 1 1245 9 is_stmt 1 view .LVU397 + 1273 .loc 1 1245 68 is_stmt 0 view .LVU398 + 1274 002c 0B68 ldr r3, [r1] + 1275 .loc 1 1245 76 view .LVU399 + 1276 002e 5B05 lsls r3, r3, #21 +1246:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** pHeader->RTR); + 1277 .loc 1 1246 67 view .LVU400 + 1278 0030 CD68 ldr r5, [r1, #12] +1245:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** pHeader->RTR); + 1279 .loc 1 1245 13 view .LVU401 + 1280 0032 0668 ldr r6, [r0] +1245:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** pHeader->RTR); + 1281 .loc 1 1245 98 view .LVU402 + 1282 0034 2B43 orrs r3, r5 +1245:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** pHeader->RTR); + 1283 .loc 1 1245 57 view .LVU403 + 1284 0036 2500 movs r5, r4 + 1285 0038 1835 adds r5, r5, #24 + 1286 003a 2D01 lsls r5, r5, #4 + 1287 003c AB51 str r3, [r5, r6] + 1288 .L84: +1247:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** } +1248:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** else +1249:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** { +1250:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** hcan->Instance->sTxMailBox[transmitmailbox].TIR = ((pHeader->ExtId << CAN_TI0R_EXID_Pos) | +1251:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** pHeader->IDE | +1252:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** pHeader->RTR); +1253:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** } +1254:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** +1255:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** /* Set up the DLC */ +1256:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** hcan->Instance->sTxMailBox[transmitmailbox].TDTR = (pHeader->DLC); + 1289 .loc 1 1256 7 is_stmt 1 view .LVU404 + ARM GAS /tmp/ccftcnYc.s page 50 + + + 1290 .loc 1 1256 11 is_stmt 0 view .LVU405 + 1291 003e 0368 ldr r3, [r0] + 1292 .loc 1 1256 66 view .LVU406 + 1293 0040 0E69 ldr r6, [r1, #16] + 1294 .loc 1 1256 56 view .LVU407 + 1295 0042 2500 movs r5, r4 + 1296 0044 1835 adds r5, r5, #24 + 1297 0046 2D01 lsls r5, r5, #4 + 1298 0048 5B19 adds r3, r3, r5 + 1299 004a 5E60 str r6, [r3, #4] +1257:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** +1258:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** /* Set up the Transmit Global Time mode */ +1259:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** if (pHeader->TransmitGlobalTime == ENABLE) + 1300 .loc 1 1259 7 is_stmt 1 view .LVU408 + 1301 .loc 1 1259 18 is_stmt 0 view .LVU409 + 1302 004c 0B7D ldrb r3, [r1, #20] + 1303 .loc 1 1259 10 view .LVU410 + 1304 004e 012B cmp r3, #1 + 1305 0050 32D0 beq .L87 + 1306 .LVL85: + 1307 .L85: +1260:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** { +1261:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** SET_BIT(hcan->Instance->sTxMailBox[transmitmailbox].TDTR, CAN_TDT0R_TGT); +1262:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** } +1263:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** +1264:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** /* Set up the data field */ +1265:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** WRITE_REG(hcan->Instance->sTxMailBox[transmitmailbox].TDHR, + 1308 .loc 1 1265 7 is_stmt 1 view .LVU411 + 1309 0052 D379 ldrb r3, [r2, #7] + 1310 0054 1B06 lsls r3, r3, #24 + 1311 0056 9179 ldrb r1, [r2, #6] + 1312 0058 0904 lsls r1, r1, #16 + 1313 005a 0B43 orrs r3, r1 + 1314 005c 5179 ldrb r1, [r2, #5] + 1315 005e 0902 lsls r1, r1, #8 + 1316 0060 0B43 orrs r3, r1 + 1317 0062 1579 ldrb r5, [r2, #4] + 1318 0064 0168 ldr r1, [r0] + 1319 0066 2B43 orrs r3, r5 + 1320 0068 2501 lsls r5, r4, #4 + 1321 006a 4919 adds r1, r1, r5 + 1322 006c 8D31 adds r1, r1, #141 + 1323 006e FF31 adds r1, r1, #255 + 1324 0070 0B60 str r3, [r1] +1266:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** ((uint32_t)aData[7] << CAN_TDH0R_DATA7_Pos) | +1267:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** ((uint32_t)aData[6] << CAN_TDH0R_DATA6_Pos) | +1268:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** ((uint32_t)aData[5] << CAN_TDH0R_DATA5_Pos) | +1269:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** ((uint32_t)aData[4] << CAN_TDH0R_DATA4_Pos)); +1270:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** WRITE_REG(hcan->Instance->sTxMailBox[transmitmailbox].TDLR, + 1325 .loc 1 1270 7 view .LVU412 + 1326 0072 D378 ldrb r3, [r2, #3] + 1327 0074 1B06 lsls r3, r3, #24 + 1328 0076 9178 ldrb r1, [r2, #2] + 1329 0078 0904 lsls r1, r1, #16 + 1330 007a 0B43 orrs r3, r1 + 1331 007c 5178 ldrb r1, [r2, #1] + 1332 007e 0902 lsls r1, r1, #8 + ARM GAS /tmp/ccftcnYc.s page 51 + + + 1333 0080 0B43 orrs r3, r1 + 1334 0082 1178 ldrb r1, [r2] + 1335 0084 0268 ldr r2, [r0] + 1336 .LVL86: + 1337 .loc 1 1270 7 is_stmt 0 view .LVU413 + 1338 0086 0B43 orrs r3, r1 + 1339 0088 5219 adds r2, r2, r5 + 1340 008a 8932 adds r2, r2, #137 + 1341 008c FF32 adds r2, r2, #255 + 1342 008e 1360 str r3, [r2] +1271:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** ((uint32_t)aData[3] << CAN_TDL0R_DATA3_Pos) | +1272:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** ((uint32_t)aData[2] << CAN_TDL0R_DATA2_Pos) | +1273:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** ((uint32_t)aData[1] << CAN_TDL0R_DATA1_Pos) | +1274:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** ((uint32_t)aData[0] << CAN_TDL0R_DATA0_Pos)); +1275:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** +1276:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** /* Request transmission */ +1277:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** SET_BIT(hcan->Instance->sTxMailBox[transmitmailbox].TIR, CAN_TI0R_TXRQ); + 1343 .loc 1 1277 7 is_stmt 1 view .LVU414 + 1344 0090 0268 ldr r2, [r0] + 1345 0092 1834 adds r4, r4, #24 + 1346 .LVL87: + 1347 .loc 1 1277 7 is_stmt 0 view .LVU415 + 1348 0094 2401 lsls r4, r4, #4 + 1349 .LVL88: + 1350 .loc 1 1277 7 view .LVU416 + 1351 0096 A358 ldr r3, [r4, r2] + 1352 0098 0121 movs r1, #1 + 1353 009a 0B43 orrs r3, r1 + 1354 009c A350 str r3, [r4, r2] +1278:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** +1279:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** /* Return function status */ +1280:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** return HAL_OK; + 1355 .loc 1 1280 7 is_stmt 1 view .LVU417 + 1356 .loc 1 1280 14 is_stmt 0 view .LVU418 + 1357 009e 0020 movs r0, #0 + 1358 .LVL89: + 1359 .loc 1 1280 14 view .LVU419 + 1360 00a0 1FE0 b .L86 + 1361 .LVL90: + 1362 .L83: +1250:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** pHeader->IDE | + 1363 .loc 1 1250 9 is_stmt 1 view .LVU420 +1250:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** pHeader->IDE | + 1364 .loc 1 1250 68 is_stmt 0 view .LVU421 + 1365 00a2 4D68 ldr r5, [r1, #4] +1250:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** pHeader->IDE | + 1366 .loc 1 1250 76 view .LVU422 + 1367 00a4 ED00 lsls r5, r5, #3 +1250:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** pHeader->IDE | + 1368 .loc 1 1250 98 view .LVU423 + 1369 00a6 2B43 orrs r3, r5 +1252:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** } + 1370 .loc 1 1252 67 view .LVU424 + 1371 00a8 CD68 ldr r5, [r1, #12] +1250:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** pHeader->IDE | + 1372 .loc 1 1250 13 view .LVU425 + 1373 00aa 0668 ldr r6, [r0] + ARM GAS /tmp/ccftcnYc.s page 52 + + +1251:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** pHeader->RTR); + 1374 .loc 1 1251 73 view .LVU426 + 1375 00ac 2B43 orrs r3, r5 +1250:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** pHeader->IDE | + 1376 .loc 1 1250 57 view .LVU427 + 1377 00ae 2500 movs r5, r4 + 1378 00b0 1835 adds r5, r5, #24 + 1379 00b2 2D01 lsls r5, r5, #4 + 1380 00b4 AB51 str r3, [r5, r6] + 1381 00b6 C2E7 b .L84 + 1382 .L87: +1261:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** } + 1383 .loc 1 1261 9 is_stmt 1 view .LVU428 + 1384 00b8 0368 ldr r3, [r0] + 1385 00ba 5B19 adds r3, r3, r5 + 1386 00bc 5D68 ldr r5, [r3, #4] + 1387 00be 8021 movs r1, #128 + 1388 .LVL91: +1261:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** } + 1389 .loc 1 1261 9 is_stmt 0 view .LVU429 + 1390 00c0 4900 lsls r1, r1, #1 + 1391 00c2 2943 orrs r1, r5 + 1392 00c4 5960 str r1, [r3, #4] + 1393 00c6 C4E7 b .L85 + 1394 .LVL92: + 1395 .L82: +1281:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** } +1282:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** else +1283:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** { +1284:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** /* Update error code */ +1285:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** hcan->ErrorCode |= HAL_CAN_ERROR_PARAM; + 1396 .loc 1 1285 7 is_stmt 1 view .LVU430 + 1397 .loc 1 1285 11 is_stmt 0 view .LVU431 + 1398 00c8 426A ldr r2, [r0, #36] + 1399 .LVL93: + 1400 .loc 1 1285 23 view .LVU432 + 1401 00ca 8023 movs r3, #128 + 1402 .LVL94: + 1403 .loc 1 1285 23 view .LVU433 + 1404 00cc 9B03 lsls r3, r3, #14 + 1405 00ce 1343 orrs r3, r2 + 1406 00d0 4362 str r3, [r0, #36] +1286:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** +1287:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** return HAL_ERROR; + 1407 .loc 1 1287 7 is_stmt 1 view .LVU434 + 1408 .loc 1 1287 14 is_stmt 0 view .LVU435 + 1409 00d2 0120 movs r0, #1 + 1410 .LVL95: + 1411 .loc 1 1287 14 view .LVU436 + 1412 00d4 05E0 b .L86 + 1413 .LVL96: + 1414 .L81: +1288:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** } +1289:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** } +1290:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** else +1291:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** { +1292:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** /* Update error code */ + ARM GAS /tmp/ccftcnYc.s page 53 + + +1293:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** hcan->ErrorCode |= HAL_CAN_ERROR_NOT_INITIALIZED; + 1415 .loc 1 1293 5 is_stmt 1 view .LVU437 + 1416 .loc 1 1293 9 is_stmt 0 view .LVU438 + 1417 00d6 426A ldr r2, [r0, #36] + 1418 .LVL97: + 1419 .loc 1 1293 21 view .LVU439 + 1420 00d8 8023 movs r3, #128 + 1421 .LVL98: + 1422 .loc 1 1293 21 view .LVU440 + 1423 00da DB02 lsls r3, r3, #11 + 1424 00dc 1343 orrs r3, r2 + 1425 00de 4362 str r3, [r0, #36] +1294:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** +1295:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** return HAL_ERROR; + 1426 .loc 1 1295 5 is_stmt 1 view .LVU441 + 1427 .loc 1 1295 12 is_stmt 0 view .LVU442 + 1428 00e0 0120 movs r0, #1 + 1429 .LVL99: + 1430 .L86: +1296:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** } +1297:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** } + 1431 .loc 1 1297 1 view .LVU443 + 1432 @ sp needed + 1433 00e2 70BD pop {r4, r5, r6, pc} + 1434 .cfi_endproc + 1435 .LFE50: + 1437 .section .text.HAL_CAN_AbortTxRequest,"ax",%progbits + 1438 .align 1 + 1439 .global HAL_CAN_AbortTxRequest + 1440 .syntax unified + 1441 .code 16 + 1442 .thumb_func + 1444 HAL_CAN_AbortTxRequest: + 1445 .LVL100: + 1446 .LFB51: +1298:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** +1299:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** /** +1300:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** * @brief Abort transmission requests +1301:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** * @param hcan pointer to an CAN_HandleTypeDef structure that contains +1302:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** * the configuration information for the specified CAN. +1303:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** * @param TxMailboxes List of the Tx Mailboxes to abort. +1304:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** * This parameter can be any combination of @arg CAN_Tx_Mailboxes. +1305:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** * @retval HAL status +1306:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** */ +1307:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** HAL_StatusTypeDef HAL_CAN_AbortTxRequest(CAN_HandleTypeDef *hcan, uint32_t TxMailboxes) +1308:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** { + 1447 .loc 1 1308 1 is_stmt 1 view -0 + 1448 .cfi_startproc + 1449 @ args = 0, pretend = 0, frame = 0 + 1450 @ frame_needed = 0, uses_anonymous_args = 0 + 1451 .loc 1 1308 1 is_stmt 0 view .LVU445 + 1452 0000 10B5 push {r4, lr} + 1453 .cfi_def_cfa_offset 8 + 1454 .cfi_offset 4, -8 + 1455 .cfi_offset 14, -4 +1309:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** HAL_CAN_StateTypeDef state = hcan->State; + 1456 .loc 1 1309 3 is_stmt 1 view .LVU446 + ARM GAS /tmp/ccftcnYc.s page 54 + + + 1457 .loc 1 1309 24 is_stmt 0 view .LVU447 + 1458 0002 2023 movs r3, #32 + 1459 0004 C35C ldrb r3, [r0, r3] + 1460 .LVL101: +1310:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** +1311:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** /* Check function parameters */ +1312:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** assert_param(IS_CAN_TX_MAILBOX_LIST(TxMailboxes)); + 1461 .loc 1 1312 3 is_stmt 1 view .LVU448 +1313:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** +1314:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** if ((state == HAL_CAN_STATE_READY) || + 1462 .loc 1 1314 3 view .LVU449 + 1463 .loc 1 1314 38 is_stmt 0 view .LVU450 + 1464 0006 013B subs r3, r3, #1 + 1465 .LVL102: + 1466 .loc 1 1314 38 view .LVU451 + 1467 0008 DBB2 uxtb r3, r3 + 1468 .LVL103: + 1469 .loc 1 1314 6 view .LVU452 + 1470 000a 012B cmp r3, #1 + 1471 000c 06D9 bls .L97 +1315:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** (state == HAL_CAN_STATE_LISTENING)) +1316:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** { +1317:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** /* Check Tx Mailbox 0 */ +1318:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** if ((TxMailboxes & CAN_TX_MAILBOX0) != 0U) +1319:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** { +1320:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** /* Add cancellation request for Tx Mailbox 0 */ +1321:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** SET_BIT(hcan->Instance->TSR, CAN_TSR_ABRQ0); +1322:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** } +1323:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** +1324:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** /* Check Tx Mailbox 1 */ +1325:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** if ((TxMailboxes & CAN_TX_MAILBOX1) != 0U) +1326:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** { +1327:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** /* Add cancellation request for Tx Mailbox 1 */ +1328:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** SET_BIT(hcan->Instance->TSR, CAN_TSR_ABRQ1); +1329:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** } +1330:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** +1331:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** /* Check Tx Mailbox 2 */ +1332:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** if ((TxMailboxes & CAN_TX_MAILBOX2) != 0U) +1333:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** { +1334:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** /* Add cancellation request for Tx Mailbox 2 */ +1335:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** SET_BIT(hcan->Instance->TSR, CAN_TSR_ABRQ2); +1336:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** } +1337:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** +1338:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** /* Return function status */ +1339:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** return HAL_OK; +1340:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** } +1341:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** else +1342:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** { +1343:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** /* Update error code */ +1344:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** hcan->ErrorCode |= HAL_CAN_ERROR_NOT_INITIALIZED; + 1472 .loc 1 1344 5 is_stmt 1 view .LVU453 + 1473 .loc 1 1344 9 is_stmt 0 view .LVU454 + 1474 000e 426A ldr r2, [r0, #36] + 1475 .loc 1 1344 21 view .LVU455 + 1476 0010 8023 movs r3, #128 + 1477 0012 DB02 lsls r3, r3, #11 + 1478 0014 1343 orrs r3, r2 + ARM GAS /tmp/ccftcnYc.s page 55 + + + 1479 0016 4362 str r3, [r0, #36] +1345:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** +1346:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** return HAL_ERROR; + 1480 .loc 1 1346 5 is_stmt 1 view .LVU456 + 1481 .loc 1 1346 12 is_stmt 0 view .LVU457 + 1482 0018 0120 movs r0, #1 + 1483 .LVL104: + 1484 .L93: +1347:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** } +1348:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** } + 1485 .loc 1 1348 1 view .LVU458 + 1486 @ sp needed + 1487 001a 10BD pop {r4, pc} + 1488 .LVL105: + 1489 .L97: +1318:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** { + 1490 .loc 1 1318 5 is_stmt 1 view .LVU459 +1318:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** { + 1491 .loc 1 1318 8 is_stmt 0 view .LVU460 + 1492 001c CB07 lsls r3, r1, #31 + 1493 001e 04D5 bpl .L90 +1321:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** } + 1494 .loc 1 1321 7 is_stmt 1 view .LVU461 + 1495 0020 0268 ldr r2, [r0] + 1496 0022 9368 ldr r3, [r2, #8] + 1497 0024 8024 movs r4, #128 + 1498 0026 2343 orrs r3, r4 + 1499 0028 9360 str r3, [r2, #8] + 1500 .L90: +1325:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** { + 1501 .loc 1 1325 5 view .LVU462 +1325:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** { + 1502 .loc 1 1325 8 is_stmt 0 view .LVU463 + 1503 002a 8B07 lsls r3, r1, #30 + 1504 002c 05D5 bpl .L91 +1328:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** } + 1505 .loc 1 1328 7 is_stmt 1 view .LVU464 + 1506 002e 0268 ldr r2, [r0] + 1507 0030 9468 ldr r4, [r2, #8] + 1508 0032 8023 movs r3, #128 + 1509 0034 1B02 lsls r3, r3, #8 + 1510 0036 2343 orrs r3, r4 + 1511 0038 9360 str r3, [r2, #8] + 1512 .L91: +1332:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** { + 1513 .loc 1 1332 5 view .LVU465 +1332:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** { + 1514 .loc 1 1332 8 is_stmt 0 view .LVU466 + 1515 003a 4907 lsls r1, r1, #29 + 1516 003c 05D5 bpl .L92 + 1517 .LVL106: +1335:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** } + 1518 .loc 1 1335 7 is_stmt 1 view .LVU467 + 1519 003e 0268 ldr r2, [r0] + 1520 0040 9168 ldr r1, [r2, #8] + 1521 0042 8023 movs r3, #128 + 1522 0044 1B04 lsls r3, r3, #16 + ARM GAS /tmp/ccftcnYc.s page 56 + + + 1523 0046 0B43 orrs r3, r1 + 1524 0048 9360 str r3, [r2, #8] + 1525 .L92: +1339:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** } + 1526 .loc 1 1339 5 view .LVU468 +1339:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** } + 1527 .loc 1 1339 12 is_stmt 0 view .LVU469 + 1528 004a 0020 movs r0, #0 + 1529 .LVL107: +1339:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** } + 1530 .loc 1 1339 12 view .LVU470 + 1531 004c E5E7 b .L93 + 1532 .cfi_endproc + 1533 .LFE51: + 1535 .section .text.HAL_CAN_GetTxMailboxesFreeLevel,"ax",%progbits + 1536 .align 1 + 1537 .global HAL_CAN_GetTxMailboxesFreeLevel + 1538 .syntax unified + 1539 .code 16 + 1540 .thumb_func + 1542 HAL_CAN_GetTxMailboxesFreeLevel: + 1543 .LVL108: + 1544 .LFB52: +1349:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** +1350:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** /** +1351:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** * @brief Return Tx Mailboxes free level: number of free Tx Mailboxes. +1352:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** * @param hcan pointer to a CAN_HandleTypeDef structure that contains +1353:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** * the configuration information for the specified CAN. +1354:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** * @retval Number of free Tx Mailboxes. +1355:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** */ +1356:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** uint32_t HAL_CAN_GetTxMailboxesFreeLevel(const CAN_HandleTypeDef *hcan) +1357:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** { + 1545 .loc 1 1357 1 is_stmt 1 view -0 + 1546 .cfi_startproc + 1547 @ args = 0, pretend = 0, frame = 0 + 1548 @ frame_needed = 0, uses_anonymous_args = 0 + 1549 @ link register save eliminated. +1358:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** uint32_t freelevel = 0U; + 1550 .loc 1 1358 3 view .LVU472 +1359:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** HAL_CAN_StateTypeDef state = hcan->State; + 1551 .loc 1 1359 3 view .LVU473 + 1552 .loc 1 1359 24 is_stmt 0 view .LVU474 + 1553 0000 2023 movs r3, #32 + 1554 0002 C35C ldrb r3, [r0, r3] + 1555 .LVL109: +1360:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** +1361:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** if ((state == HAL_CAN_STATE_READY) || + 1556 .loc 1 1361 3 is_stmt 1 view .LVU475 + 1557 .loc 1 1361 38 is_stmt 0 view .LVU476 + 1558 0004 013B subs r3, r3, #1 + 1559 .LVL110: + 1560 .loc 1 1361 38 view .LVU477 + 1561 0006 DBB2 uxtb r3, r3 + 1562 .LVL111: + 1563 .loc 1 1361 6 view .LVU478 + 1564 0008 012B cmp r3, #1 + 1565 000a 01D9 bls .L106 + ARM GAS /tmp/ccftcnYc.s page 57 + + +1358:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** HAL_CAN_StateTypeDef state = hcan->State; + 1566 .loc 1 1358 12 view .LVU479 + 1567 000c 0020 movs r0, #0 + 1568 .LVL112: +1362:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** (state == HAL_CAN_STATE_LISTENING)) +1363:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** { +1364:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** /* Check Tx Mailbox 0 status */ +1365:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** if ((hcan->Instance->TSR & CAN_TSR_TME0) != 0U) +1366:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** { +1367:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** freelevel++; +1368:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** } +1369:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** +1370:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** /* Check Tx Mailbox 1 status */ +1371:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** if ((hcan->Instance->TSR & CAN_TSR_TME1) != 0U) +1372:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** { +1373:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** freelevel++; +1374:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** } +1375:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** +1376:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** /* Check Tx Mailbox 2 status */ +1377:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** if ((hcan->Instance->TSR & CAN_TSR_TME2) != 0U) +1378:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** { +1379:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** freelevel++; +1380:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** } +1381:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** } +1382:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** +1383:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** /* Return Tx Mailboxes free level */ +1384:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** return freelevel; + 1569 .loc 1 1384 3 is_stmt 1 view .LVU480 + 1570 .L98: +1385:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** } + 1571 .loc 1 1385 1 is_stmt 0 view .LVU481 + 1572 @ sp needed + 1573 000e 7047 bx lr + 1574 .LVL113: + 1575 .L106: +1365:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** { + 1576 .loc 1 1365 5 is_stmt 1 view .LVU482 +1365:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** { + 1577 .loc 1 1365 14 is_stmt 0 view .LVU483 + 1578 0010 0368 ldr r3, [r0] +1365:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** { + 1579 .loc 1 1365 24 view .LVU484 + 1580 0012 9968 ldr r1, [r3, #8] +1365:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** { + 1581 .loc 1 1365 30 view .LVU485 + 1582 0014 8022 movs r2, #128 + 1583 0016 D204 lsls r2, r2, #19 + 1584 0018 0800 movs r0, r1 + 1585 .LVL114: +1365:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** { + 1586 .loc 1 1365 30 view .LVU486 + 1587 001a 1040 ands r0, r2 +1365:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** { + 1588 .loc 1 1365 8 view .LVU487 + 1589 001c 1142 tst r1, r2 + 1590 001e 00D0 beq .L100 +1367:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** } + ARM GAS /tmp/ccftcnYc.s page 58 + + + 1591 .loc 1 1367 16 view .LVU488 + 1592 0020 0120 movs r0, #1 + 1593 .L100: + 1594 .LVL115: +1371:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** { + 1595 .loc 1 1371 5 is_stmt 1 view .LVU489 +1371:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** { + 1596 .loc 1 1371 24 is_stmt 0 view .LVU490 + 1597 0022 9A68 ldr r2, [r3, #8] +1371:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** { + 1598 .loc 1 1371 8 view .LVU491 + 1599 0024 1201 lsls r2, r2, #4 + 1600 0026 00D5 bpl .L101 +1373:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** } + 1601 .loc 1 1373 7 is_stmt 1 view .LVU492 +1373:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** } + 1602 .loc 1 1373 16 is_stmt 0 view .LVU493 + 1603 0028 0130 adds r0, r0, #1 + 1604 .LVL116: + 1605 .L101: +1377:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** { + 1606 .loc 1 1377 5 is_stmt 1 view .LVU494 +1377:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** { + 1607 .loc 1 1377 24 is_stmt 0 view .LVU495 + 1608 002a 9B68 ldr r3, [r3, #8] +1377:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** { + 1609 .loc 1 1377 8 view .LVU496 + 1610 002c DB00 lsls r3, r3, #3 + 1611 002e EED5 bpl .L98 +1379:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** } + 1612 .loc 1 1379 7 is_stmt 1 view .LVU497 +1379:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** } + 1613 .loc 1 1379 16 is_stmt 0 view .LVU498 + 1614 0030 0130 adds r0, r0, #1 + 1615 .LVL117: +1379:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** } + 1616 .loc 1 1379 16 view .LVU499 + 1617 0032 ECE7 b .L98 + 1618 .cfi_endproc + 1619 .LFE52: + 1621 .section .text.HAL_CAN_IsTxMessagePending,"ax",%progbits + 1622 .align 1 + 1623 .global HAL_CAN_IsTxMessagePending + 1624 .syntax unified + 1625 .code 16 + 1626 .thumb_func + 1628 HAL_CAN_IsTxMessagePending: + 1629 .LVL118: + 1630 .LFB53: +1386:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** +1387:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** /** +1388:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** * @brief Check if a transmission request is pending on the selected Tx +1389:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** * Mailboxes. +1390:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** * @param hcan pointer to an CAN_HandleTypeDef structure that contains +1391:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** * the configuration information for the specified CAN. +1392:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** * @param TxMailboxes List of Tx Mailboxes to check. +1393:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** * This parameter can be any combination of @arg CAN_Tx_Mailboxes. + ARM GAS /tmp/ccftcnYc.s page 59 + + +1394:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** * @retval Status +1395:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** * - 0 : No pending transmission request on any selected Tx Mailboxes. +1396:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** * - 1 : Pending transmission request on at least one of the selected +1397:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** * Tx Mailbox. +1398:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** */ +1399:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** uint32_t HAL_CAN_IsTxMessagePending(const CAN_HandleTypeDef *hcan, uint32_t TxMailboxes) +1400:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** { + 1631 .loc 1 1400 1 is_stmt 1 view -0 + 1632 .cfi_startproc + 1633 @ args = 0, pretend = 0, frame = 0 + 1634 @ frame_needed = 0, uses_anonymous_args = 0 + 1635 @ link register save eliminated. +1401:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** uint32_t status = 0U; + 1636 .loc 1 1401 3 view .LVU501 +1402:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** HAL_CAN_StateTypeDef state = hcan->State; + 1637 .loc 1 1402 3 view .LVU502 + 1638 .loc 1 1402 24 is_stmt 0 view .LVU503 + 1639 0000 2023 movs r3, #32 + 1640 0002 C35C ldrb r3, [r0, r3] + 1641 .LVL119: +1403:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** +1404:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** /* Check function parameters */ +1405:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** assert_param(IS_CAN_TX_MAILBOX_LIST(TxMailboxes)); + 1642 .loc 1 1405 3 is_stmt 1 view .LVU504 +1406:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** +1407:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** if ((state == HAL_CAN_STATE_READY) || + 1643 .loc 1 1407 3 view .LVU505 + 1644 .loc 1 1407 38 is_stmt 0 view .LVU506 + 1645 0004 013B subs r3, r3, #1 + 1646 .LVL120: + 1647 .loc 1 1407 38 view .LVU507 + 1648 0006 DBB2 uxtb r3, r3 + 1649 .LVL121: + 1650 .loc 1 1407 6 view .LVU508 + 1651 0008 012B cmp r3, #1 + 1652 000a 01D9 bls .L111 +1401:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** HAL_CAN_StateTypeDef state = hcan->State; + 1653 .loc 1 1401 12 view .LVU509 + 1654 000c 0020 movs r0, #0 + 1655 .LVL122: + 1656 .L107: +1408:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** (state == HAL_CAN_STATE_LISTENING)) +1409:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** { +1410:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** /* Check pending transmission request on the selected Tx Mailboxes */ +1411:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** if ((hcan->Instance->TSR & (TxMailboxes << CAN_TSR_TME0_Pos)) != (TxMailboxes << CAN_TSR_TME0_P +1412:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** { +1413:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** status = 1U; +1414:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** } +1415:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** } +1416:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** +1417:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** /* Return status */ +1418:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** return status; +1419:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** } + 1657 .loc 1 1419 1 view .LVU510 + 1658 @ sp needed + 1659 000e 7047 bx lr + 1660 .LVL123: + ARM GAS /tmp/ccftcnYc.s page 60 + + + 1661 .L111: +1411:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** { + 1662 .loc 1 1411 5 is_stmt 1 view .LVU511 +1411:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** { + 1663 .loc 1 1411 14 is_stmt 0 view .LVU512 + 1664 0010 0368 ldr r3, [r0] +1411:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** { + 1665 .loc 1 1411 24 view .LVU513 + 1666 0012 9B68 ldr r3, [r3, #8] +1411:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** { + 1667 .loc 1 1411 45 view .LVU514 + 1668 0014 8906 lsls r1, r1, #26 + 1669 .LVL124: +1411:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** { + 1670 .loc 1 1411 30 view .LVU515 + 1671 0016 0B40 ands r3, r1 +1411:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** { + 1672 .loc 1 1411 8 view .LVU516 + 1673 0018 9942 cmp r1, r3 + 1674 001a 01D0 beq .L112 +1413:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** } + 1675 .loc 1 1413 14 view .LVU517 + 1676 001c 0120 movs r0, #1 + 1677 .LVL125: +1418:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** } + 1678 .loc 1 1418 3 is_stmt 1 view .LVU518 +1418:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** } + 1679 .loc 1 1418 10 is_stmt 0 view .LVU519 + 1680 001e F6E7 b .L107 + 1681 .LVL126: + 1682 .L112: +1401:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** HAL_CAN_StateTypeDef state = hcan->State; + 1683 .loc 1 1401 12 view .LVU520 + 1684 0020 0020 movs r0, #0 + 1685 .LVL127: +1401:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** HAL_CAN_StateTypeDef state = hcan->State; + 1686 .loc 1 1401 12 view .LVU521 + 1687 0022 F4E7 b .L107 + 1688 .cfi_endproc + 1689 .LFE53: + 1691 .section .text.HAL_CAN_GetTxTimestamp,"ax",%progbits + 1692 .align 1 + 1693 .global HAL_CAN_GetTxTimestamp + 1694 .syntax unified + 1695 .code 16 + 1696 .thumb_func + 1698 HAL_CAN_GetTxTimestamp: + 1699 .LVL128: + 1700 .LFB54: +1420:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** +1421:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** /** +1422:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** * @brief Return timestamp of Tx message sent, if time triggered communication +1423:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** mode is enabled. +1424:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** * @param hcan pointer to a CAN_HandleTypeDef structure that contains +1425:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** * the configuration information for the specified CAN. +1426:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** * @param TxMailbox Tx Mailbox where the timestamp of message sent will be +1427:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** * read. + ARM GAS /tmp/ccftcnYc.s page 61 + + +1428:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** * This parameter can be one value of @arg CAN_Tx_Mailboxes. +1429:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** * @retval Timestamp of message sent from Tx Mailbox. +1430:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** */ +1431:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** uint32_t HAL_CAN_GetTxTimestamp(const CAN_HandleTypeDef *hcan, uint32_t TxMailbox) +1432:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** { + 1701 .loc 1 1432 1 is_stmt 1 view -0 + 1702 .cfi_startproc + 1703 @ args = 0, pretend = 0, frame = 0 + 1704 @ frame_needed = 0, uses_anonymous_args = 0 + 1705 @ link register save eliminated. +1433:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** uint32_t timestamp = 0U; + 1706 .loc 1 1433 3 view .LVU523 +1434:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** uint32_t transmitmailbox; + 1707 .loc 1 1434 3 view .LVU524 +1435:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** HAL_CAN_StateTypeDef state = hcan->State; + 1708 .loc 1 1435 3 view .LVU525 + 1709 .loc 1 1435 24 is_stmt 0 view .LVU526 + 1710 0000 2023 movs r3, #32 + 1711 0002 C35C ldrb r3, [r0, r3] + 1712 .LVL129: +1436:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** +1437:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** /* Check function parameters */ +1438:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** assert_param(IS_CAN_TX_MAILBOX(TxMailbox)); + 1713 .loc 1 1438 3 is_stmt 1 view .LVU527 +1439:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** +1440:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** if ((state == HAL_CAN_STATE_READY) || + 1714 .loc 1 1440 3 view .LVU528 + 1715 .loc 1 1440 38 is_stmt 0 view .LVU529 + 1716 0004 013B subs r3, r3, #1 + 1717 .LVL130: + 1718 .loc 1 1440 38 view .LVU530 + 1719 0006 DBB2 uxtb r3, r3 + 1720 .LVL131: + 1721 .loc 1 1440 6 view .LVU531 + 1722 0008 012B cmp r3, #1 + 1723 000a 01D9 bls .L119 +1433:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** uint32_t transmitmailbox; + 1724 .loc 1 1433 12 view .LVU532 + 1725 000c 0020 movs r0, #0 + 1726 .LVL132: +1441:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** (state == HAL_CAN_STATE_LISTENING)) +1442:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** { +1443:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** /* Select the Tx mailbox */ +1444:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** /* Select the Tx mailbox */ +1445:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** if (TxMailbox == CAN_TX_MAILBOX0) +1446:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** { +1447:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** transmitmailbox = 0U; +1448:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** } +1449:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** else if (TxMailbox == CAN_TX_MAILBOX1) +1450:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** { +1451:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** transmitmailbox = 1U; +1452:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** } +1453:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** else /* (TxMailbox == CAN_TX_MAILBOX2) */ +1454:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** { +1455:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** transmitmailbox = 2U; +1456:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** } +1457:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** + ARM GAS /tmp/ccftcnYc.s page 62 + + +1458:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** /* Get timestamp */ +1459:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** timestamp = (hcan->Instance->sTxMailBox[transmitmailbox].TDTR & CAN_TDT0R_TIME) >> CAN_TDT0R_TI +1460:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** } +1461:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** +1462:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** /* Return the timestamp */ +1463:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** return timestamp; + 1727 .loc 1 1463 3 is_stmt 1 view .LVU533 + 1728 .L113: +1464:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** } + 1729 .loc 1 1464 1 is_stmt 0 view .LVU534 + 1730 @ sp needed + 1731 000e 7047 bx lr + 1732 .LVL133: + 1733 .L119: +1445:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** { + 1734 .loc 1 1445 5 is_stmt 1 view .LVU535 +1445:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** { + 1735 .loc 1 1445 8 is_stmt 0 view .LVU536 + 1736 0010 0129 cmp r1, #1 + 1737 0012 0BD0 beq .L117 +1449:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** { + 1738 .loc 1 1449 10 is_stmt 1 view .LVU537 +1449:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** { + 1739 .loc 1 1449 13 is_stmt 0 view .LVU538 + 1740 0014 0229 cmp r1, #2 + 1741 0016 07D0 beq .L120 +1455:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** } + 1742 .loc 1 1455 23 view .LVU539 + 1743 0018 0223 movs r3, #2 + 1744 .L115: + 1745 .LVL134: +1459:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** } + 1746 .loc 1 1459 5 is_stmt 1 view .LVU540 +1459:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** } + 1747 .loc 1 1459 22 is_stmt 0 view .LVU541 + 1748 001a 0268 ldr r2, [r0] +1459:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** } + 1749 .loc 1 1459 61 view .LVU542 + 1750 001c 1833 adds r3, r3, #24 + 1751 .LVL135: +1459:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** } + 1752 .loc 1 1459 61 view .LVU543 + 1753 001e 1B01 lsls r3, r3, #4 + 1754 .LVL136: +1459:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** } + 1755 .loc 1 1459 61 view .LVU544 + 1756 0020 D318 adds r3, r2, r3 + 1757 0022 5868 ldr r0, [r3, #4] + 1758 .LVL137: +1459:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** } + 1759 .loc 1 1459 85 view .LVU545 + 1760 0024 000C lsrs r0, r0, #16 + 1761 .LVL138: +1459:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** } + 1762 .loc 1 1459 85 view .LVU546 + 1763 0026 F2E7 b .L113 + 1764 .LVL139: + ARM GAS /tmp/ccftcnYc.s page 63 + + + 1765 .L120: +1451:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** } + 1766 .loc 1 1451 23 view .LVU547 + 1767 0028 0123 movs r3, #1 + 1768 002a F6E7 b .L115 + 1769 .L117: +1447:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** } + 1770 .loc 1 1447 23 view .LVU548 + 1771 002c 0023 movs r3, #0 + 1772 002e F4E7 b .L115 + 1773 .cfi_endproc + 1774 .LFE54: + 1776 .section .text.HAL_CAN_GetRxMessage,"ax",%progbits + 1777 .align 1 + 1778 .global HAL_CAN_GetRxMessage + 1779 .syntax unified + 1780 .code 16 + 1781 .thumb_func + 1783 HAL_CAN_GetRxMessage: + 1784 .LVL140: + 1785 .LFB55: +1465:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** +1466:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** /** +1467:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** * @brief Get an CAN frame from the Rx FIFO zone into the message RAM. +1468:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** * @param hcan pointer to an CAN_HandleTypeDef structure that contains +1469:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** * the configuration information for the specified CAN. +1470:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** * @param RxFifo Fifo number of the received message to be read. +1471:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** * This parameter can be a value of @arg CAN_receive_FIFO_number. +1472:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** * @param pHeader pointer to a CAN_RxHeaderTypeDef structure where the header +1473:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** * of the Rx frame will be stored. +1474:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** * @param aData array where the payload of the Rx frame will be stored. +1475:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** * @retval HAL status +1476:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** */ +1477:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** HAL_StatusTypeDef HAL_CAN_GetRxMessage(CAN_HandleTypeDef *hcan, uint32_t RxFifo, +1478:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** CAN_RxHeaderTypeDef *pHeader, uint8_t aData[]) +1479:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** { + 1786 .loc 1 1479 1 is_stmt 1 view -0 + 1787 .cfi_startproc + 1788 @ args = 0, pretend = 0, frame = 0 + 1789 @ frame_needed = 0, uses_anonymous_args = 0 + 1790 .loc 1 1479 1 is_stmt 0 view .LVU550 + 1791 0000 70B5 push {r4, r5, r6, lr} + 1792 .cfi_def_cfa_offset 16 + 1793 .cfi_offset 4, -16 + 1794 .cfi_offset 5, -12 + 1795 .cfi_offset 6, -8 + 1796 .cfi_offset 14, -4 +1480:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** HAL_CAN_StateTypeDef state = hcan->State; + 1797 .loc 1 1480 3 is_stmt 1 view .LVU551 + 1798 .loc 1 1480 24 is_stmt 0 view .LVU552 + 1799 0002 2024 movs r4, #32 + 1800 0004 045D ldrb r4, [r0, r4] + 1801 .LVL141: +1481:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** +1482:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** assert_param(IS_CAN_RX_FIFO(RxFifo)); + 1802 .loc 1 1482 3 is_stmt 1 view .LVU553 +1483:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** + ARM GAS /tmp/ccftcnYc.s page 64 + + +1484:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** if ((state == HAL_CAN_STATE_READY) || + 1803 .loc 1 1484 3 view .LVU554 + 1804 .loc 1 1484 38 is_stmt 0 view .LVU555 + 1805 0006 013C subs r4, r4, #1 + 1806 .LVL142: + 1807 .loc 1 1484 38 view .LVU556 + 1808 0008 E4B2 uxtb r4, r4 + 1809 .LVL143: + 1810 .loc 1 1484 6 view .LVU557 + 1811 000a 012C cmp r4, #1 + 1812 000c 00D9 bls .LCB1587 + 1813 000e 9CE0 b .L122 @long jump + 1814 .LCB1587: +1485:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** (state == HAL_CAN_STATE_LISTENING)) +1486:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** { +1487:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** /* Check the Rx FIFO */ +1488:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** if (RxFifo == CAN_RX_FIFO0) /* Rx element is assigned to Rx FIFO 0 */ + 1815 .loc 1 1488 5 is_stmt 1 view .LVU558 + 1816 .loc 1 1488 8 is_stmt 0 view .LVU559 + 1817 0010 0029 cmp r1, #0 + 1818 0012 0AD1 bne .L123 +1489:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** { +1490:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** /* Check that the Rx FIFO 0 is not empty */ +1491:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** if ((hcan->Instance->RF0R & CAN_RF0R_FMP0) == 0U) + 1819 .loc 1 1491 7 is_stmt 1 view .LVU560 + 1820 .loc 1 1491 16 is_stmt 0 view .LVU561 + 1821 0014 0468 ldr r4, [r0] + 1822 .loc 1 1491 26 view .LVU562 + 1823 0016 E468 ldr r4, [r4, #12] + 1824 .loc 1 1491 10 view .LVU563 + 1825 0018 A407 lsls r4, r4, #30 + 1826 001a 11D1 bne .L124 +1492:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** { +1493:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** /* Update error code */ +1494:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** hcan->ErrorCode |= HAL_CAN_ERROR_PARAM; + 1827 .loc 1 1494 9 is_stmt 1 view .LVU564 + 1828 .loc 1 1494 13 is_stmt 0 view .LVU565 + 1829 001c 426A ldr r2, [r0, #36] + 1830 .LVL144: + 1831 .loc 1 1494 25 view .LVU566 + 1832 001e 8023 movs r3, #128 + 1833 .LVL145: + 1834 .loc 1 1494 25 view .LVU567 + 1835 0020 9B03 lsls r3, r3, #14 + 1836 0022 1343 orrs r3, r2 + 1837 0024 4362 str r3, [r0, #36] +1495:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** +1496:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** return HAL_ERROR; + 1838 .loc 1 1496 9 is_stmt 1 view .LVU568 + 1839 .loc 1 1496 16 is_stmt 0 view .LVU569 + 1840 0026 0120 movs r0, #1 + 1841 .LVL146: + 1842 .loc 1 1496 16 view .LVU570 + 1843 0028 95E0 b .L125 + 1844 .LVL147: + 1845 .L123: +1497:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** } + ARM GAS /tmp/ccftcnYc.s page 65 + + +1498:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** } +1499:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** else /* Rx element is assigned to Rx FIFO 1 */ +1500:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** { +1501:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** /* Check that the Rx FIFO 1 is not empty */ +1502:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** if ((hcan->Instance->RF1R & CAN_RF1R_FMP1) == 0U) + 1846 .loc 1 1502 7 is_stmt 1 view .LVU571 + 1847 .loc 1 1502 16 is_stmt 0 view .LVU572 + 1848 002a 0468 ldr r4, [r0] + 1849 .loc 1 1502 26 view .LVU573 + 1850 002c 2469 ldr r4, [r4, #16] + 1851 .loc 1 1502 10 view .LVU574 + 1852 002e A407 lsls r4, r4, #30 + 1853 0030 06D1 bne .L124 +1503:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** { +1504:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** /* Update error code */ +1505:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** hcan->ErrorCode |= HAL_CAN_ERROR_PARAM; + 1854 .loc 1 1505 9 is_stmt 1 view .LVU575 + 1855 .loc 1 1505 13 is_stmt 0 view .LVU576 + 1856 0032 426A ldr r2, [r0, #36] + 1857 .LVL148: + 1858 .loc 1 1505 25 view .LVU577 + 1859 0034 8023 movs r3, #128 + 1860 .LVL149: + 1861 .loc 1 1505 25 view .LVU578 + 1862 0036 9B03 lsls r3, r3, #14 + 1863 0038 1343 orrs r3, r2 + 1864 003a 4362 str r3, [r0, #36] +1506:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** +1507:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** return HAL_ERROR; + 1865 .loc 1 1507 9 is_stmt 1 view .LVU579 + 1866 .loc 1 1507 16 is_stmt 0 view .LVU580 + 1867 003c 0120 movs r0, #1 + 1868 .LVL150: + 1869 .loc 1 1507 16 view .LVU581 + 1870 003e 8AE0 b .L125 + 1871 .LVL151: + 1872 .L124: +1508:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** } +1509:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** } +1510:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** +1511:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** /* Get the header */ +1512:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** pHeader->IDE = CAN_RI0R_IDE & hcan->Instance->sFIFOMailBox[RxFifo].RIR; + 1873 .loc 1 1512 5 is_stmt 1 view .LVU582 + 1874 .loc 1 1512 39 is_stmt 0 view .LVU583 + 1875 0040 0568 ldr r5, [r0] + 1876 .loc 1 1512 71 view .LVU584 + 1877 0042 0C00 movs r4, r1 + 1878 0044 1B34 adds r4, r4, #27 + 1879 0046 2401 lsls r4, r4, #4 + 1880 0048 6559 ldr r5, [r4, r5] + 1881 .loc 1 1512 33 view .LVU585 + 1882 004a 0424 movs r4, #4 + 1883 004c 2C40 ands r4, r5 + 1884 .loc 1 1512 18 view .LVU586 + 1885 004e 9460 str r4, [r2, #8] +1513:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** if (pHeader->IDE == CAN_ID_STD) + 1886 .loc 1 1513 5 is_stmt 1 view .LVU587 + ARM GAS /tmp/ccftcnYc.s page 66 + + + 1887 .loc 1 1513 8 is_stmt 0 view .LVU588 + 1888 0050 64D1 bne .L126 +1514:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** { +1515:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** pHeader->StdId = (CAN_RI0R_STID & hcan->Instance->sFIFOMailBox[RxFifo].RIR) >> CAN_TI0R_STID_ + 1889 .loc 1 1515 7 is_stmt 1 view .LVU589 + 1890 .loc 1 1515 45 is_stmt 0 view .LVU590 + 1891 0052 0568 ldr r5, [r0] + 1892 .loc 1 1515 77 view .LVU591 + 1893 0054 0C00 movs r4, r1 + 1894 0056 1B34 adds r4, r4, #27 + 1895 0058 2401 lsls r4, r4, #4 + 1896 005a 6459 ldr r4, [r4, r5] + 1897 .loc 1 1515 83 view .LVU592 + 1898 005c 640D lsrs r4, r4, #21 + 1899 .loc 1 1515 22 view .LVU593 + 1900 005e 1460 str r4, [r2] + 1901 .L127: +1516:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** } +1517:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** else +1518:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** { +1519:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** pHeader->ExtId = ((CAN_RI0R_EXID | CAN_RI0R_STID) & +1520:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** hcan->Instance->sFIFOMailBox[RxFifo].RIR) >> CAN_RI0R_EXID_Pos; +1521:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** } +1522:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** pHeader->RTR = (CAN_RI0R_RTR & hcan->Instance->sFIFOMailBox[RxFifo].RIR); + 1902 .loc 1 1522 5 is_stmt 1 view .LVU594 + 1903 .loc 1 1522 40 is_stmt 0 view .LVU595 + 1904 0060 0568 ldr r5, [r0] + 1905 .loc 1 1522 72 view .LVU596 + 1906 0062 0C00 movs r4, r1 + 1907 0064 1B34 adds r4, r4, #27 + 1908 0066 2401 lsls r4, r4, #4 + 1909 0068 6659 ldr r6, [r4, r5] + 1910 .loc 1 1522 34 view .LVU597 + 1911 006a 0225 movs r5, #2 + 1912 006c 3540 ands r5, r6 + 1913 .loc 1 1522 18 view .LVU598 + 1914 006e D560 str r5, [r2, #12] +1523:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** if (((CAN_RDT0R_DLC & hcan->Instance->sFIFOMailBox[RxFifo].RDTR) >> CAN_RDT0R_DLC_Pos) >= 8U) + 1915 .loc 1 1523 5 is_stmt 1 view .LVU599 + 1916 .loc 1 1523 31 is_stmt 0 view .LVU600 + 1917 0070 0568 ldr r5, [r0] + 1918 .loc 1 1523 63 view .LVU601 + 1919 0072 2C19 adds r4, r5, r4 + 1920 0074 6468 ldr r4, [r4, #4] + 1921 .loc 1 1523 8 view .LVU602 + 1922 0076 2407 lsls r4, r4, #28 + 1923 0078 58D5 bpl .L128 +1524:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** { +1525:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** /* Truncate DLC to 8 if received field is over range */ +1526:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** pHeader->DLC = 8U; + 1924 .loc 1 1526 7 is_stmt 1 view .LVU603 + 1925 .loc 1 1526 20 is_stmt 0 view .LVU604 + 1926 007a 0824 movs r4, #8 + 1927 007c 1461 str r4, [r2, #16] + 1928 .L129: +1527:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** } +1528:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** else + ARM GAS /tmp/ccftcnYc.s page 67 + + +1529:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** { +1530:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** pHeader->DLC = (CAN_RDT0R_DLC & hcan->Instance->sFIFOMailBox[RxFifo].RDTR) >> CAN_RDT0R_DLC_P +1531:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** } +1532:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** pHeader->FilterMatchIndex = (CAN_RDT0R_FMI & hcan->Instance->sFIFOMailBox[RxFifo].RDTR) >> CAN_ + 1929 .loc 1 1532 5 is_stmt 1 view .LVU605 + 1930 .loc 1 1532 54 is_stmt 0 view .LVU606 + 1931 007e 0568 ldr r5, [r0] + 1932 .loc 1 1532 86 view .LVU607 + 1933 0080 0C00 movs r4, r1 + 1934 0082 1B34 adds r4, r4, #27 + 1935 0084 2401 lsls r4, r4, #4 + 1936 0086 2D19 adds r5, r5, r4 + 1937 0088 6E68 ldr r6, [r5, #4] + 1938 .loc 1 1532 93 view .LVU608 + 1939 008a 360A lsrs r6, r6, #8 + 1940 008c FF25 movs r5, #255 + 1941 008e 3540 ands r5, r6 + 1942 .loc 1 1532 31 view .LVU609 + 1943 0090 9561 str r5, [r2, #24] +1533:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** pHeader->Timestamp = (CAN_RDT0R_TIME & hcan->Instance->sFIFOMailBox[RxFifo].RDTR) >> CAN_RDT0R_ + 1944 .loc 1 1533 5 is_stmt 1 view .LVU610 + 1945 .loc 1 1533 48 is_stmt 0 view .LVU611 + 1946 0092 0568 ldr r5, [r0] + 1947 .loc 1 1533 80 view .LVU612 + 1948 0094 2C19 adds r4, r5, r4 + 1949 0096 6468 ldr r4, [r4, #4] + 1950 .loc 1 1533 87 view .LVU613 + 1951 0098 240C lsrs r4, r4, #16 + 1952 .loc 1 1533 24 view .LVU614 + 1953 009a 5461 str r4, [r2, #20] +1534:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** +1535:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** /* Get the data */ +1536:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** aData[0] = (uint8_t)((CAN_RDL0R_DATA0 & hcan->Instance->sFIFOMailBox[RxFifo].RDLR) >> CAN_RDL0R + 1954 .loc 1 1536 5 is_stmt 1 view .LVU615 + 1955 .loc 1 1536 49 is_stmt 0 view .LVU616 + 1956 009c 0468 ldr r4, [r0] + 1957 .loc 1 1536 81 view .LVU617 + 1958 009e 0A01 lsls r2, r1, #4 + 1959 .LVL152: + 1960 .loc 1 1536 81 view .LVU618 + 1961 00a0 A418 adds r4, r4, r2 + 1962 00a2 B934 adds r4, r4, #185 + 1963 00a4 FF34 adds r4, r4, #255 + 1964 00a6 2468 ldr r4, [r4] + 1965 .loc 1 1536 14 view .LVU619 + 1966 00a8 1C70 strb r4, [r3] +1537:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** aData[1] = (uint8_t)((CAN_RDL0R_DATA1 & hcan->Instance->sFIFOMailBox[RxFifo].RDLR) >> CAN_RDL0R + 1967 .loc 1 1537 5 is_stmt 1 view .LVU620 + 1968 .loc 1 1537 49 is_stmt 0 view .LVU621 + 1969 00aa 0468 ldr r4, [r0] + 1970 .loc 1 1537 81 view .LVU622 + 1971 00ac A418 adds r4, r4, r2 + 1972 00ae B934 adds r4, r4, #185 + 1973 00b0 FF34 adds r4, r4, #255 + 1974 00b2 2468 ldr r4, [r4] + 1975 .loc 1 1537 88 view .LVU623 + 1976 00b4 240A lsrs r4, r4, #8 + ARM GAS /tmp/ccftcnYc.s page 68 + + + 1977 .loc 1 1537 14 view .LVU624 + 1978 00b6 5C70 strb r4, [r3, #1] +1538:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** aData[2] = (uint8_t)((CAN_RDL0R_DATA2 & hcan->Instance->sFIFOMailBox[RxFifo].RDLR) >> CAN_RDL0R + 1979 .loc 1 1538 5 is_stmt 1 view .LVU625 + 1980 .loc 1 1538 49 is_stmt 0 view .LVU626 + 1981 00b8 0468 ldr r4, [r0] + 1982 .loc 1 1538 81 view .LVU627 + 1983 00ba A418 adds r4, r4, r2 + 1984 00bc B934 adds r4, r4, #185 + 1985 00be FF34 adds r4, r4, #255 + 1986 00c0 2468 ldr r4, [r4] + 1987 .loc 1 1538 88 view .LVU628 + 1988 00c2 240C lsrs r4, r4, #16 + 1989 .loc 1 1538 14 view .LVU629 + 1990 00c4 9C70 strb r4, [r3, #2] +1539:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** aData[3] = (uint8_t)((CAN_RDL0R_DATA3 & hcan->Instance->sFIFOMailBox[RxFifo].RDLR) >> CAN_RDL0R + 1991 .loc 1 1539 5 is_stmt 1 view .LVU630 + 1992 .loc 1 1539 49 is_stmt 0 view .LVU631 + 1993 00c6 0468 ldr r4, [r0] + 1994 .loc 1 1539 81 view .LVU632 + 1995 00c8 A418 adds r4, r4, r2 + 1996 00ca B934 adds r4, r4, #185 + 1997 00cc FF34 adds r4, r4, #255 + 1998 00ce 2468 ldr r4, [r4] + 1999 .loc 1 1539 16 view .LVU633 + 2000 00d0 240E lsrs r4, r4, #24 + 2001 .loc 1 1539 14 view .LVU634 + 2002 00d2 DC70 strb r4, [r3, #3] +1540:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** aData[4] = (uint8_t)((CAN_RDH0R_DATA4 & hcan->Instance->sFIFOMailBox[RxFifo].RDHR) >> CAN_RDH0R + 2003 .loc 1 1540 5 is_stmt 1 view .LVU635 + 2004 .loc 1 1540 49 is_stmt 0 view .LVU636 + 2005 00d4 0468 ldr r4, [r0] + 2006 .loc 1 1540 81 view .LVU637 + 2007 00d6 A418 adds r4, r4, r2 + 2008 00d8 BD34 adds r4, r4, #189 + 2009 00da FF34 adds r4, r4, #255 + 2010 00dc 2468 ldr r4, [r4] + 2011 .loc 1 1540 14 view .LVU638 + 2012 00de 1C71 strb r4, [r3, #4] +1541:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** aData[5] = (uint8_t)((CAN_RDH0R_DATA5 & hcan->Instance->sFIFOMailBox[RxFifo].RDHR) >> CAN_RDH0R + 2013 .loc 1 1541 5 is_stmt 1 view .LVU639 + 2014 .loc 1 1541 49 is_stmt 0 view .LVU640 + 2015 00e0 0468 ldr r4, [r0] + 2016 .loc 1 1541 81 view .LVU641 + 2017 00e2 A418 adds r4, r4, r2 + 2018 00e4 BD34 adds r4, r4, #189 + 2019 00e6 FF34 adds r4, r4, #255 + 2020 00e8 2468 ldr r4, [r4] + 2021 .loc 1 1541 88 view .LVU642 + 2022 00ea 240A lsrs r4, r4, #8 + 2023 .loc 1 1541 14 view .LVU643 + 2024 00ec 5C71 strb r4, [r3, #5] +1542:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** aData[6] = (uint8_t)((CAN_RDH0R_DATA6 & hcan->Instance->sFIFOMailBox[RxFifo].RDHR) >> CAN_RDH0R + 2025 .loc 1 1542 5 is_stmt 1 view .LVU644 + 2026 .loc 1 1542 49 is_stmt 0 view .LVU645 + 2027 00ee 0468 ldr r4, [r0] + 2028 .loc 1 1542 81 view .LVU646 + ARM GAS /tmp/ccftcnYc.s page 69 + + + 2029 00f0 A418 adds r4, r4, r2 + 2030 00f2 BD34 adds r4, r4, #189 + 2031 00f4 FF34 adds r4, r4, #255 + 2032 00f6 2468 ldr r4, [r4] + 2033 .loc 1 1542 88 view .LVU647 + 2034 00f8 240C lsrs r4, r4, #16 + 2035 .loc 1 1542 14 view .LVU648 + 2036 00fa 9C71 strb r4, [r3, #6] +1543:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** aData[7] = (uint8_t)((CAN_RDH0R_DATA7 & hcan->Instance->sFIFOMailBox[RxFifo].RDHR) >> CAN_RDH0R + 2037 .loc 1 1543 5 is_stmt 1 view .LVU649 + 2038 .loc 1 1543 49 is_stmt 0 view .LVU650 + 2039 00fc 0468 ldr r4, [r0] + 2040 .loc 1 1543 81 view .LVU651 + 2041 00fe A218 adds r2, r4, r2 + 2042 0100 BD32 adds r2, r2, #189 + 2043 0102 FF32 adds r2, r2, #255 + 2044 0104 1268 ldr r2, [r2] + 2045 .loc 1 1543 16 view .LVU652 + 2046 0106 120E lsrs r2, r2, #24 + 2047 .loc 1 1543 14 view .LVU653 + 2048 0108 DA71 strb r2, [r3, #7] +1544:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** +1545:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** /* Release the FIFO */ +1546:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** if (RxFifo == CAN_RX_FIFO0) /* Rx element is assigned to Rx FIFO 0 */ + 2049 .loc 1 1546 5 is_stmt 1 view .LVU654 + 2050 .loc 1 1546 8 is_stmt 0 view .LVU655 + 2051 010a 0029 cmp r1, #0 + 2052 010c 17D1 bne .L130 +1547:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** { +1548:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** /* Release RX FIFO 0 */ +1549:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** SET_BIT(hcan->Instance->RF0R, CAN_RF0R_RFOM0); + 2053 .loc 1 1549 7 is_stmt 1 view .LVU656 + 2054 010e 0268 ldr r2, [r0] + 2055 0110 D368 ldr r3, [r2, #12] + 2056 .LVL153: + 2057 .loc 1 1549 7 is_stmt 0 view .LVU657 + 2058 0112 2031 adds r1, r1, #32 + 2059 .LVL154: + 2060 .loc 1 1549 7 view .LVU658 + 2061 0114 0B43 orrs r3, r1 + 2062 0116 D360 str r3, [r2, #12] + 2063 .LVL155: + 2064 .L131: +1550:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** } +1551:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** else /* Rx element is assigned to Rx FIFO 1 */ +1552:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** { +1553:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** /* Release RX FIFO 1 */ +1554:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** SET_BIT(hcan->Instance->RF1R, CAN_RF1R_RFOM1); +1555:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** } +1556:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** +1557:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** /* Return function status */ +1558:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** return HAL_OK; + 2065 .loc 1 1558 5 is_stmt 1 view .LVU659 + 2066 .loc 1 1558 12 is_stmt 0 view .LVU660 + 2067 0118 0020 movs r0, #0 + 2068 .LVL156: + 2069 .loc 1 1558 12 view .LVU661 + ARM GAS /tmp/ccftcnYc.s page 70 + + + 2070 011a 1CE0 b .L125 + 2071 .LVL157: + 2072 .L126: +1519:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** hcan->Instance->sFIFOMailBox[RxFifo].RIR) >> CAN_RI0R_EXID_Pos; + 2073 .loc 1 1519 7 is_stmt 1 view .LVU662 +1520:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** } + 2074 .loc 1 1520 29 is_stmt 0 view .LVU663 + 2075 011c 0568 ldr r5, [r0] +1520:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** } + 2076 .loc 1 1520 61 view .LVU664 + 2077 011e 0C00 movs r4, r1 + 2078 0120 1B34 adds r4, r4, #27 + 2079 0122 2401 lsls r4, r4, #4 + 2080 0124 6459 ldr r4, [r4, r5] +1520:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** } + 2081 .loc 1 1520 67 view .LVU665 + 2082 0126 E408 lsrs r4, r4, #3 +1519:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** hcan->Instance->sFIFOMailBox[RxFifo].RIR) >> CAN_RI0R_EXID_Pos; + 2083 .loc 1 1519 22 view .LVU666 + 2084 0128 5460 str r4, [r2, #4] + 2085 012a 99E7 b .L127 + 2086 .L128: +1530:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** } + 2087 .loc 1 1530 7 is_stmt 1 view .LVU667 +1530:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** } + 2088 .loc 1 1530 75 is_stmt 0 view .LVU668 + 2089 012c 0C00 movs r4, r1 + 2090 012e 1B34 adds r4, r4, #27 + 2091 0130 2401 lsls r4, r4, #4 + 2092 0132 2D19 adds r5, r5, r4 + 2093 0134 6D68 ldr r5, [r5, #4] +1530:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** } + 2094 .loc 1 1530 82 view .LVU669 + 2095 0136 0F24 movs r4, #15 + 2096 0138 2C40 ands r4, r5 +1530:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** } + 2097 .loc 1 1530 20 view .LVU670 + 2098 013a 1461 str r4, [r2, #16] + 2099 013c 9FE7 b .L129 + 2100 .LVL158: + 2101 .L130: +1554:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** } + 2102 .loc 1 1554 7 is_stmt 1 view .LVU671 + 2103 013e 0268 ldr r2, [r0] + 2104 0140 1369 ldr r3, [r2, #16] + 2105 .LVL159: +1554:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** } + 2106 .loc 1 1554 7 is_stmt 0 view .LVU672 + 2107 0142 2021 movs r1, #32 + 2108 .LVL160: +1554:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** } + 2109 .loc 1 1554 7 view .LVU673 + 2110 0144 0B43 orrs r3, r1 + 2111 0146 1361 str r3, [r2, #16] + 2112 0148 E6E7 b .L131 + 2113 .LVL161: + 2114 .L122: + ARM GAS /tmp/ccftcnYc.s page 71 + + +1559:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** } +1560:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** else +1561:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** { +1562:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** /* Update error code */ +1563:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** hcan->ErrorCode |= HAL_CAN_ERROR_NOT_INITIALIZED; + 2115 .loc 1 1563 5 is_stmt 1 view .LVU674 + 2116 .loc 1 1563 9 is_stmt 0 view .LVU675 + 2117 014a 426A ldr r2, [r0, #36] + 2118 .LVL162: + 2119 .loc 1 1563 21 view .LVU676 + 2120 014c 8023 movs r3, #128 + 2121 .LVL163: + 2122 .loc 1 1563 21 view .LVU677 + 2123 014e DB02 lsls r3, r3, #11 + 2124 0150 1343 orrs r3, r2 + 2125 0152 4362 str r3, [r0, #36] +1564:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** +1565:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** return HAL_ERROR; + 2126 .loc 1 1565 5 is_stmt 1 view .LVU678 + 2127 .loc 1 1565 12 is_stmt 0 view .LVU679 + 2128 0154 0120 movs r0, #1 + 2129 .LVL164: + 2130 .L125: +1566:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** } +1567:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** } + 2131 .loc 1 1567 1 view .LVU680 + 2132 @ sp needed + 2133 0156 70BD pop {r4, r5, r6, pc} + 2134 .cfi_endproc + 2135 .LFE55: + 2137 .section .text.HAL_CAN_GetRxFifoFillLevel,"ax",%progbits + 2138 .align 1 + 2139 .global HAL_CAN_GetRxFifoFillLevel + 2140 .syntax unified + 2141 .code 16 + 2142 .thumb_func + 2144 HAL_CAN_GetRxFifoFillLevel: + 2145 .LVL165: + 2146 .LFB56: +1568:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** +1569:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** /** +1570:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** * @brief Return Rx FIFO fill level. +1571:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** * @param hcan pointer to an CAN_HandleTypeDef structure that contains +1572:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** * the configuration information for the specified CAN. +1573:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** * @param RxFifo Rx FIFO. +1574:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** * This parameter can be a value of @arg CAN_receive_FIFO_number. +1575:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** * @retval Number of messages available in Rx FIFO. +1576:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** */ +1577:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** uint32_t HAL_CAN_GetRxFifoFillLevel(const CAN_HandleTypeDef *hcan, uint32_t RxFifo) +1578:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** { + 2147 .loc 1 1578 1 is_stmt 1 view -0 + 2148 .cfi_startproc + 2149 @ args = 0, pretend = 0, frame = 0 + 2150 @ frame_needed = 0, uses_anonymous_args = 0 + 2151 @ link register save eliminated. +1579:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** uint32_t filllevel = 0U; + 2152 .loc 1 1579 3 view .LVU682 + ARM GAS /tmp/ccftcnYc.s page 72 + + +1580:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** HAL_CAN_StateTypeDef state = hcan->State; + 2153 .loc 1 1580 3 view .LVU683 + 2154 .loc 1 1580 24 is_stmt 0 view .LVU684 + 2155 0000 2023 movs r3, #32 + 2156 0002 C35C ldrb r3, [r0, r3] + 2157 .LVL166: +1581:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** +1582:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** /* Check function parameters */ +1583:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** assert_param(IS_CAN_RX_FIFO(RxFifo)); + 2158 .loc 1 1583 3 is_stmt 1 view .LVU685 +1584:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** +1585:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** if ((state == HAL_CAN_STATE_READY) || + 2159 .loc 1 1585 3 view .LVU686 + 2160 .loc 1 1585 38 is_stmt 0 view .LVU687 + 2161 0004 013B subs r3, r3, #1 + 2162 .LVL167: + 2163 .loc 1 1585 38 view .LVU688 + 2164 0006 DBB2 uxtb r3, r3 + 2165 .LVL168: + 2166 .loc 1 1585 6 view .LVU689 + 2167 0008 012B cmp r3, #1 + 2168 000a 01D9 bls .L138 +1579:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** HAL_CAN_StateTypeDef state = hcan->State; + 2169 .loc 1 1579 12 view .LVU690 + 2170 000c 0020 movs r0, #0 + 2171 .LVL169: +1586:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** (state == HAL_CAN_STATE_LISTENING)) +1587:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** { +1588:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** if (RxFifo == CAN_RX_FIFO0) +1589:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** { +1590:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** filllevel = hcan->Instance->RF0R & CAN_RF0R_FMP0; +1591:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** } +1592:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** else /* RxFifo == CAN_RX_FIFO1 */ +1593:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** { +1594:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** filllevel = hcan->Instance->RF1R & CAN_RF1R_FMP1; +1595:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** } +1596:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** } +1597:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** +1598:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** /* Return Rx FIFO fill level */ +1599:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** return filllevel; + 2172 .loc 1 1599 3 is_stmt 1 view .LVU691 + 2173 .L134: +1600:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** } + 2174 .loc 1 1600 1 is_stmt 0 view .LVU692 + 2175 @ sp needed + 2176 000e 7047 bx lr + 2177 .LVL170: + 2178 .L138: +1588:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** { + 2179 .loc 1 1588 5 is_stmt 1 view .LVU693 +1588:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** { + 2180 .loc 1 1588 8 is_stmt 0 view .LVU694 + 2181 0010 0029 cmp r1, #0 + 2182 0012 04D1 bne .L136 +1590:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** } + 2183 .loc 1 1590 7 is_stmt 1 view .LVU695 +1590:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** } + ARM GAS /tmp/ccftcnYc.s page 73 + + + 2184 .loc 1 1590 23 is_stmt 0 view .LVU696 + 2185 0014 0368 ldr r3, [r0] +1590:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** } + 2186 .loc 1 1590 33 view .LVU697 + 2187 0016 DB68 ldr r3, [r3, #12] +1590:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** } + 2188 .loc 1 1590 17 view .LVU698 + 2189 0018 0320 movs r0, #3 + 2190 .LVL171: +1590:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** } + 2191 .loc 1 1590 17 view .LVU699 + 2192 001a 1840 ands r0, r3 + 2193 .LVL172: +1590:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** } + 2194 .loc 1 1590 17 view .LVU700 + 2195 001c F7E7 b .L134 + 2196 .LVL173: + 2197 .L136: +1594:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** } + 2198 .loc 1 1594 7 is_stmt 1 view .LVU701 +1594:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** } + 2199 .loc 1 1594 23 is_stmt 0 view .LVU702 + 2200 001e 0368 ldr r3, [r0] +1594:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** } + 2201 .loc 1 1594 33 view .LVU703 + 2202 0020 1B69 ldr r3, [r3, #16] +1594:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** } + 2203 .loc 1 1594 17 view .LVU704 + 2204 0022 0320 movs r0, #3 + 2205 .LVL174: +1594:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** } + 2206 .loc 1 1594 17 view .LVU705 + 2207 0024 1840 ands r0, r3 + 2208 .LVL175: +1594:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** } + 2209 .loc 1 1594 17 view .LVU706 + 2210 0026 F2E7 b .L134 + 2211 .cfi_endproc + 2212 .LFE56: + 2214 .section .text.HAL_CAN_ActivateNotification,"ax",%progbits + 2215 .align 1 + 2216 .global HAL_CAN_ActivateNotification + 2217 .syntax unified + 2218 .code 16 + 2219 .thumb_func + 2221 HAL_CAN_ActivateNotification: + 2222 .LVL176: + 2223 .LFB57: +1601:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** +1602:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** /** +1603:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** * @} +1604:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** */ +1605:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** +1606:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** /** @defgroup CAN_Exported_Functions_Group4 Interrupts management +1607:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** * @brief Interrupts management +1608:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** * +1609:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** @verbatim + ARM GAS /tmp/ccftcnYc.s page 74 + + +1610:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** ============================================================================== +1611:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** ##### Interrupts management ##### +1612:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** ============================================================================== +1613:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** [..] This section provides functions allowing to: +1614:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** (+) HAL_CAN_ActivateNotification : Enable interrupts +1615:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** (+) HAL_CAN_DeactivateNotification : Disable interrupts +1616:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** (+) HAL_CAN_IRQHandler : Handles CAN interrupt request +1617:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** +1618:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** @endverbatim +1619:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** * @{ +1620:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** */ +1621:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** +1622:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** /** +1623:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** * @brief Enable interrupts. +1624:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** * @param hcan pointer to an CAN_HandleTypeDef structure that contains +1625:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** * the configuration information for the specified CAN. +1626:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** * @param ActiveITs indicates which interrupts will be enabled. +1627:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** * This parameter can be any combination of @arg CAN_Interrupts. +1628:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** * @retval HAL status +1629:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** */ +1630:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** HAL_StatusTypeDef HAL_CAN_ActivateNotification(CAN_HandleTypeDef *hcan, uint32_t ActiveITs) +1631:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** { + 2224 .loc 1 1631 1 is_stmt 1 view -0 + 2225 .cfi_startproc + 2226 @ args = 0, pretend = 0, frame = 0 + 2227 @ frame_needed = 0, uses_anonymous_args = 0 + 2228 @ link register save eliminated. +1632:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** HAL_CAN_StateTypeDef state = hcan->State; + 2229 .loc 1 1632 3 view .LVU708 + 2230 .loc 1 1632 24 is_stmt 0 view .LVU709 + 2231 0000 2023 movs r3, #32 + 2232 0002 C35C ldrb r3, [r0, r3] + 2233 .LVL177: +1633:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** +1634:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** /* Check function parameters */ +1635:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** assert_param(IS_CAN_IT(ActiveITs)); + 2234 .loc 1 1635 3 is_stmt 1 view .LVU710 +1636:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** +1637:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** if ((state == HAL_CAN_STATE_READY) || + 2235 .loc 1 1637 3 view .LVU711 + 2236 .loc 1 1637 38 is_stmt 0 view .LVU712 + 2237 0004 013B subs r3, r3, #1 + 2238 .LVL178: + 2239 .loc 1 1637 38 view .LVU713 + 2240 0006 DBB2 uxtb r3, r3 + 2241 .LVL179: + 2242 .loc 1 1637 6 view .LVU714 + 2243 0008 012B cmp r3, #1 + 2244 000a 06D9 bls .L142 +1638:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** (state == HAL_CAN_STATE_LISTENING)) +1639:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** { +1640:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** /* Enable the selected interrupts */ +1641:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** __HAL_CAN_ENABLE_IT(hcan, ActiveITs); +1642:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** +1643:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** /* Return function status */ +1644:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** return HAL_OK; +1645:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** } + ARM GAS /tmp/ccftcnYc.s page 75 + + +1646:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** else +1647:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** { +1648:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** /* Update error code */ +1649:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** hcan->ErrorCode |= HAL_CAN_ERROR_NOT_INITIALIZED; + 2245 .loc 1 1649 5 is_stmt 1 view .LVU715 + 2246 .loc 1 1649 9 is_stmt 0 view .LVU716 + 2247 000c 426A ldr r2, [r0, #36] + 2248 .loc 1 1649 21 view .LVU717 + 2249 000e 8023 movs r3, #128 + 2250 0010 DB02 lsls r3, r3, #11 + 2251 0012 1343 orrs r3, r2 + 2252 0014 4362 str r3, [r0, #36] +1650:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** +1651:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** return HAL_ERROR; + 2253 .loc 1 1651 5 is_stmt 1 view .LVU718 + 2254 .loc 1 1651 12 is_stmt 0 view .LVU719 + 2255 0016 0120 movs r0, #1 + 2256 .LVL180: + 2257 .L141: +1652:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** } +1653:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** } + 2258 .loc 1 1653 1 view .LVU720 + 2259 @ sp needed + 2260 0018 7047 bx lr + 2261 .LVL181: + 2262 .L142: +1641:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** + 2263 .loc 1 1641 5 is_stmt 1 view .LVU721 + 2264 001a 0268 ldr r2, [r0] + 2265 001c 5369 ldr r3, [r2, #20] + 2266 001e 0B43 orrs r3, r1 + 2267 0020 5361 str r3, [r2, #20] +1644:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** } + 2268 .loc 1 1644 5 view .LVU722 +1644:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** } + 2269 .loc 1 1644 12 is_stmt 0 view .LVU723 + 2270 0022 0020 movs r0, #0 + 2271 .LVL182: +1644:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** } + 2272 .loc 1 1644 12 view .LVU724 + 2273 0024 F8E7 b .L141 + 2274 .cfi_endproc + 2275 .LFE57: + 2277 .section .text.HAL_CAN_DeactivateNotification,"ax",%progbits + 2278 .align 1 + 2279 .global HAL_CAN_DeactivateNotification + 2280 .syntax unified + 2281 .code 16 + 2282 .thumb_func + 2284 HAL_CAN_DeactivateNotification: + 2285 .LVL183: + 2286 .LFB58: +1654:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** +1655:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** /** +1656:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** * @brief Disable interrupts. +1657:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** * @param hcan pointer to an CAN_HandleTypeDef structure that contains +1658:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** * the configuration information for the specified CAN. + ARM GAS /tmp/ccftcnYc.s page 76 + + +1659:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** * @param InactiveITs indicates which interrupts will be disabled. +1660:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** * This parameter can be any combination of @arg CAN_Interrupts. +1661:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** * @retval HAL status +1662:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** */ +1663:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** HAL_StatusTypeDef HAL_CAN_DeactivateNotification(CAN_HandleTypeDef *hcan, uint32_t InactiveITs) +1664:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** { + 2287 .loc 1 1664 1 is_stmt 1 view -0 + 2288 .cfi_startproc + 2289 @ args = 0, pretend = 0, frame = 0 + 2290 @ frame_needed = 0, uses_anonymous_args = 0 + 2291 @ link register save eliminated. +1665:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** HAL_CAN_StateTypeDef state = hcan->State; + 2292 .loc 1 1665 3 view .LVU726 + 2293 .loc 1 1665 24 is_stmt 0 view .LVU727 + 2294 0000 2023 movs r3, #32 + 2295 0002 C35C ldrb r3, [r0, r3] + 2296 .LVL184: +1666:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** +1667:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** /* Check function parameters */ +1668:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** assert_param(IS_CAN_IT(InactiveITs)); + 2297 .loc 1 1668 3 is_stmt 1 view .LVU728 +1669:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** +1670:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** if ((state == HAL_CAN_STATE_READY) || + 2298 .loc 1 1670 3 view .LVU729 + 2299 .loc 1 1670 38 is_stmt 0 view .LVU730 + 2300 0004 013B subs r3, r3, #1 + 2301 .LVL185: + 2302 .loc 1 1670 38 view .LVU731 + 2303 0006 DBB2 uxtb r3, r3 + 2304 .LVL186: + 2305 .loc 1 1670 6 view .LVU732 + 2306 0008 012B cmp r3, #1 + 2307 000a 06D9 bls .L146 +1671:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** (state == HAL_CAN_STATE_LISTENING)) +1672:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** { +1673:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** /* Disable the selected interrupts */ +1674:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** __HAL_CAN_DISABLE_IT(hcan, InactiveITs); +1675:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** +1676:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** /* Return function status */ +1677:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** return HAL_OK; +1678:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** } +1679:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** else +1680:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** { +1681:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** /* Update error code */ +1682:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** hcan->ErrorCode |= HAL_CAN_ERROR_NOT_INITIALIZED; + 2308 .loc 1 1682 5 is_stmt 1 view .LVU733 + 2309 .loc 1 1682 9 is_stmt 0 view .LVU734 + 2310 000c 426A ldr r2, [r0, #36] + 2311 .loc 1 1682 21 view .LVU735 + 2312 000e 8023 movs r3, #128 + 2313 0010 DB02 lsls r3, r3, #11 + 2314 0012 1343 orrs r3, r2 + 2315 0014 4362 str r3, [r0, #36] +1683:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** +1684:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** return HAL_ERROR; + 2316 .loc 1 1684 5 is_stmt 1 view .LVU736 + 2317 .loc 1 1684 12 is_stmt 0 view .LVU737 + ARM GAS /tmp/ccftcnYc.s page 77 + + + 2318 0016 0120 movs r0, #1 + 2319 .LVL187: + 2320 .L145: +1685:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** } +1686:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** } + 2321 .loc 1 1686 1 view .LVU738 + 2322 @ sp needed + 2323 0018 7047 bx lr + 2324 .LVL188: + 2325 .L146: +1674:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** + 2326 .loc 1 1674 5 is_stmt 1 view .LVU739 + 2327 001a 0268 ldr r2, [r0] + 2328 001c 5369 ldr r3, [r2, #20] + 2329 001e 8B43 bics r3, r1 + 2330 0020 5361 str r3, [r2, #20] +1677:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** } + 2331 .loc 1 1677 5 view .LVU740 +1677:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** } + 2332 .loc 1 1677 12 is_stmt 0 view .LVU741 + 2333 0022 0020 movs r0, #0 + 2334 .LVL189: +1677:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** } + 2335 .loc 1 1677 12 view .LVU742 + 2336 0024 F8E7 b .L145 + 2337 .cfi_endproc + 2338 .LFE58: + 2340 .section .text.HAL_CAN_TxMailbox0CompleteCallback,"ax",%progbits + 2341 .align 1 + 2342 .weak HAL_CAN_TxMailbox0CompleteCallback + 2343 .syntax unified + 2344 .code 16 + 2345 .thumb_func + 2347 HAL_CAN_TxMailbox0CompleteCallback: + 2348 .LVL190: + 2349 .LFB60: +1687:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** +1688:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** /** +1689:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** * @brief Handles CAN interrupt request +1690:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** * @param hcan pointer to a CAN_HandleTypeDef structure that contains +1691:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** * the configuration information for the specified CAN. +1692:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** * @retval None +1693:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** */ +1694:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** void HAL_CAN_IRQHandler(CAN_HandleTypeDef *hcan) +1695:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** { +1696:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** uint32_t errorcode = HAL_CAN_ERROR_NONE; +1697:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** uint32_t interrupts = READ_REG(hcan->Instance->IER); +1698:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** uint32_t msrflags = READ_REG(hcan->Instance->MSR); +1699:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** uint32_t tsrflags = READ_REG(hcan->Instance->TSR); +1700:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** uint32_t rf0rflags = READ_REG(hcan->Instance->RF0R); +1701:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** uint32_t rf1rflags = READ_REG(hcan->Instance->RF1R); +1702:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** uint32_t esrflags = READ_REG(hcan->Instance->ESR); +1703:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** +1704:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** /* Transmit Mailbox empty interrupt management *****************************/ +1705:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** if ((interrupts & CAN_IT_TX_MAILBOX_EMPTY) != 0U) +1706:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** { +1707:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** /* Transmit Mailbox 0 management *****************************************/ + ARM GAS /tmp/ccftcnYc.s page 78 + + +1708:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** if ((tsrflags & CAN_TSR_RQCP0) != 0U) +1709:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** { +1710:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** /* Clear the Transmission Complete flag (and TXOK0,ALST0,TERR0 bits) */ +1711:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** __HAL_CAN_CLEAR_FLAG(hcan, CAN_FLAG_RQCP0); +1712:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** +1713:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** if ((tsrflags & CAN_TSR_TXOK0) != 0U) +1714:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** { +1715:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** /* Transmission Mailbox 0 complete callback */ +1716:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** #if USE_HAL_CAN_REGISTER_CALLBACKS == 1 +1717:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** /* Call registered callback*/ +1718:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** hcan->TxMailbox0CompleteCallback(hcan); +1719:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** #else +1720:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** /* Call weak (surcharged) callback */ +1721:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** HAL_CAN_TxMailbox0CompleteCallback(hcan); +1722:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** #endif /* USE_HAL_CAN_REGISTER_CALLBACKS */ +1723:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** } +1724:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** else +1725:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** { +1726:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** if ((tsrflags & CAN_TSR_ALST0) != 0U) +1727:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** { +1728:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** /* Update error code */ +1729:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** errorcode |= HAL_CAN_ERROR_TX_ALST0; +1730:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** } +1731:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** else if ((tsrflags & CAN_TSR_TERR0) != 0U) +1732:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** { +1733:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** /* Update error code */ +1734:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** errorcode |= HAL_CAN_ERROR_TX_TERR0; +1735:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** } +1736:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** else +1737:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** { +1738:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** /* Transmission Mailbox 0 abort callback */ +1739:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** #if USE_HAL_CAN_REGISTER_CALLBACKS == 1 +1740:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** /* Call registered callback*/ +1741:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** hcan->TxMailbox0AbortCallback(hcan); +1742:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** #else +1743:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** /* Call weak (surcharged) callback */ +1744:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** HAL_CAN_TxMailbox0AbortCallback(hcan); +1745:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** #endif /* USE_HAL_CAN_REGISTER_CALLBACKS */ +1746:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** } +1747:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** } +1748:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** } +1749:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** +1750:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** /* Transmit Mailbox 1 management *****************************************/ +1751:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** if ((tsrflags & CAN_TSR_RQCP1) != 0U) +1752:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** { +1753:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** /* Clear the Transmission Complete flag (and TXOK1,ALST1,TERR1 bits) */ +1754:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** __HAL_CAN_CLEAR_FLAG(hcan, CAN_FLAG_RQCP1); +1755:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** +1756:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** if ((tsrflags & CAN_TSR_TXOK1) != 0U) +1757:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** { +1758:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** /* Transmission Mailbox 1 complete callback */ +1759:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** #if USE_HAL_CAN_REGISTER_CALLBACKS == 1 +1760:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** /* Call registered callback*/ +1761:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** hcan->TxMailbox1CompleteCallback(hcan); +1762:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** #else +1763:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** /* Call weak (surcharged) callback */ +1764:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** HAL_CAN_TxMailbox1CompleteCallback(hcan); + ARM GAS /tmp/ccftcnYc.s page 79 + + +1765:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** #endif /* USE_HAL_CAN_REGISTER_CALLBACKS */ +1766:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** } +1767:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** else +1768:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** { +1769:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** if ((tsrflags & CAN_TSR_ALST1) != 0U) +1770:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** { +1771:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** /* Update error code */ +1772:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** errorcode |= HAL_CAN_ERROR_TX_ALST1; +1773:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** } +1774:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** else if ((tsrflags & CAN_TSR_TERR1) != 0U) +1775:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** { +1776:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** /* Update error code */ +1777:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** errorcode |= HAL_CAN_ERROR_TX_TERR1; +1778:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** } +1779:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** else +1780:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** { +1781:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** /* Transmission Mailbox 1 abort callback */ +1782:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** #if USE_HAL_CAN_REGISTER_CALLBACKS == 1 +1783:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** /* Call registered callback*/ +1784:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** hcan->TxMailbox1AbortCallback(hcan); +1785:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** #else +1786:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** /* Call weak (surcharged) callback */ +1787:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** HAL_CAN_TxMailbox1AbortCallback(hcan); +1788:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** #endif /* USE_HAL_CAN_REGISTER_CALLBACKS */ +1789:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** } +1790:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** } +1791:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** } +1792:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** +1793:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** /* Transmit Mailbox 2 management *****************************************/ +1794:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** if ((tsrflags & CAN_TSR_RQCP2) != 0U) +1795:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** { +1796:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** /* Clear the Transmission Complete flag (and TXOK2,ALST2,TERR2 bits) */ +1797:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** __HAL_CAN_CLEAR_FLAG(hcan, CAN_FLAG_RQCP2); +1798:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** +1799:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** if ((tsrflags & CAN_TSR_TXOK2) != 0U) +1800:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** { +1801:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** /* Transmission Mailbox 2 complete callback */ +1802:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** #if USE_HAL_CAN_REGISTER_CALLBACKS == 1 +1803:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** /* Call registered callback*/ +1804:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** hcan->TxMailbox2CompleteCallback(hcan); +1805:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** #else +1806:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** /* Call weak (surcharged) callback */ +1807:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** HAL_CAN_TxMailbox2CompleteCallback(hcan); +1808:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** #endif /* USE_HAL_CAN_REGISTER_CALLBACKS */ +1809:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** } +1810:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** else +1811:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** { +1812:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** if ((tsrflags & CAN_TSR_ALST2) != 0U) +1813:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** { +1814:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** /* Update error code */ +1815:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** errorcode |= HAL_CAN_ERROR_TX_ALST2; +1816:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** } +1817:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** else if ((tsrflags & CAN_TSR_TERR2) != 0U) +1818:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** { +1819:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** /* Update error code */ +1820:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** errorcode |= HAL_CAN_ERROR_TX_TERR2; +1821:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** } + ARM GAS /tmp/ccftcnYc.s page 80 + + +1822:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** else +1823:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** { +1824:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** /* Transmission Mailbox 2 abort callback */ +1825:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** #if USE_HAL_CAN_REGISTER_CALLBACKS == 1 +1826:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** /* Call registered callback*/ +1827:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** hcan->TxMailbox2AbortCallback(hcan); +1828:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** #else +1829:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** /* Call weak (surcharged) callback */ +1830:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** HAL_CAN_TxMailbox2AbortCallback(hcan); +1831:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** #endif /* USE_HAL_CAN_REGISTER_CALLBACKS */ +1832:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** } +1833:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** } +1834:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** } +1835:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** } +1836:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** +1837:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** /* Receive FIFO 0 overrun interrupt management *****************************/ +1838:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** if ((interrupts & CAN_IT_RX_FIFO0_OVERRUN) != 0U) +1839:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** { +1840:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** if ((rf0rflags & CAN_RF0R_FOVR0) != 0U) +1841:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** { +1842:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** /* Set CAN error code to Rx Fifo 0 overrun error */ +1843:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** errorcode |= HAL_CAN_ERROR_RX_FOV0; +1844:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** +1845:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** /* Clear FIFO0 Overrun Flag */ +1846:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** __HAL_CAN_CLEAR_FLAG(hcan, CAN_FLAG_FOV0); +1847:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** } +1848:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** } +1849:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** +1850:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** /* Receive FIFO 0 full interrupt management ********************************/ +1851:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** if ((interrupts & CAN_IT_RX_FIFO0_FULL) != 0U) +1852:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** { +1853:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** if ((rf0rflags & CAN_RF0R_FULL0) != 0U) +1854:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** { +1855:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** /* Clear FIFO 0 full Flag */ +1856:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** __HAL_CAN_CLEAR_FLAG(hcan, CAN_FLAG_FF0); +1857:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** +1858:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** /* Receive FIFO 0 full Callback */ +1859:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** #if USE_HAL_CAN_REGISTER_CALLBACKS == 1 +1860:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** /* Call registered callback*/ +1861:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** hcan->RxFifo0FullCallback(hcan); +1862:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** #else +1863:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** /* Call weak (surcharged) callback */ +1864:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** HAL_CAN_RxFifo0FullCallback(hcan); +1865:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** #endif /* USE_HAL_CAN_REGISTER_CALLBACKS */ +1866:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** } +1867:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** } +1868:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** +1869:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** /* Receive FIFO 0 message pending interrupt management *********************/ +1870:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** if ((interrupts & CAN_IT_RX_FIFO0_MSG_PENDING) != 0U) +1871:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** { +1872:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** /* Check if message is still pending */ +1873:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** if ((hcan->Instance->RF0R & CAN_RF0R_FMP0) != 0U) +1874:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** { +1875:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** /* Receive FIFO 0 message pending Callback */ +1876:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** #if USE_HAL_CAN_REGISTER_CALLBACKS == 1 +1877:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** /* Call registered callback*/ +1878:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** hcan->RxFifo0MsgPendingCallback(hcan); + ARM GAS /tmp/ccftcnYc.s page 81 + + +1879:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** #else +1880:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** /* Call weak (surcharged) callback */ +1881:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** HAL_CAN_RxFifo0MsgPendingCallback(hcan); +1882:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** #endif /* USE_HAL_CAN_REGISTER_CALLBACKS */ +1883:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** } +1884:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** } +1885:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** +1886:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** /* Receive FIFO 1 overrun interrupt management *****************************/ +1887:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** if ((interrupts & CAN_IT_RX_FIFO1_OVERRUN) != 0U) +1888:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** { +1889:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** if ((rf1rflags & CAN_RF1R_FOVR1) != 0U) +1890:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** { +1891:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** /* Set CAN error code to Rx Fifo 1 overrun error */ +1892:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** errorcode |= HAL_CAN_ERROR_RX_FOV1; +1893:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** +1894:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** /* Clear FIFO1 Overrun Flag */ +1895:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** __HAL_CAN_CLEAR_FLAG(hcan, CAN_FLAG_FOV1); +1896:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** } +1897:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** } +1898:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** +1899:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** /* Receive FIFO 1 full interrupt management ********************************/ +1900:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** if ((interrupts & CAN_IT_RX_FIFO1_FULL) != 0U) +1901:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** { +1902:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** if ((rf1rflags & CAN_RF1R_FULL1) != 0U) +1903:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** { +1904:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** /* Clear FIFO 1 full Flag */ +1905:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** __HAL_CAN_CLEAR_FLAG(hcan, CAN_FLAG_FF1); +1906:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** +1907:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** /* Receive FIFO 1 full Callback */ +1908:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** #if USE_HAL_CAN_REGISTER_CALLBACKS == 1 +1909:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** /* Call registered callback*/ +1910:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** hcan->RxFifo1FullCallback(hcan); +1911:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** #else +1912:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** /* Call weak (surcharged) callback */ +1913:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** HAL_CAN_RxFifo1FullCallback(hcan); +1914:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** #endif /* USE_HAL_CAN_REGISTER_CALLBACKS */ +1915:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** } +1916:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** } +1917:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** +1918:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** /* Receive FIFO 1 message pending interrupt management *********************/ +1919:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** if ((interrupts & CAN_IT_RX_FIFO1_MSG_PENDING) != 0U) +1920:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** { +1921:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** /* Check if message is still pending */ +1922:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** if ((hcan->Instance->RF1R & CAN_RF1R_FMP1) != 0U) +1923:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** { +1924:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** /* Receive FIFO 1 message pending Callback */ +1925:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** #if USE_HAL_CAN_REGISTER_CALLBACKS == 1 +1926:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** /* Call registered callback*/ +1927:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** hcan->RxFifo1MsgPendingCallback(hcan); +1928:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** #else +1929:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** /* Call weak (surcharged) callback */ +1930:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** HAL_CAN_RxFifo1MsgPendingCallback(hcan); +1931:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** #endif /* USE_HAL_CAN_REGISTER_CALLBACKS */ +1932:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** } +1933:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** } +1934:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** +1935:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** /* Sleep interrupt management *********************************************/ + ARM GAS /tmp/ccftcnYc.s page 82 + + +1936:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** if ((interrupts & CAN_IT_SLEEP_ACK) != 0U) +1937:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** { +1938:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** if ((msrflags & CAN_MSR_SLAKI) != 0U) +1939:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** { +1940:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** /* Clear Sleep interrupt Flag */ +1941:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** __HAL_CAN_CLEAR_FLAG(hcan, CAN_FLAG_SLAKI); +1942:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** +1943:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** /* Sleep Callback */ +1944:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** #if USE_HAL_CAN_REGISTER_CALLBACKS == 1 +1945:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** /* Call registered callback*/ +1946:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** hcan->SleepCallback(hcan); +1947:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** #else +1948:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** /* Call weak (surcharged) callback */ +1949:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** HAL_CAN_SleepCallback(hcan); +1950:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** #endif /* USE_HAL_CAN_REGISTER_CALLBACKS */ +1951:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** } +1952:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** } +1953:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** +1954:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** /* WakeUp interrupt management *********************************************/ +1955:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** if ((interrupts & CAN_IT_WAKEUP) != 0U) +1956:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** { +1957:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** if ((msrflags & CAN_MSR_WKUI) != 0U) +1958:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** { +1959:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** /* Clear WakeUp Flag */ +1960:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** __HAL_CAN_CLEAR_FLAG(hcan, CAN_FLAG_WKU); +1961:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** +1962:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** /* WakeUp Callback */ +1963:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** #if USE_HAL_CAN_REGISTER_CALLBACKS == 1 +1964:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** /* Call registered callback*/ +1965:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** hcan->WakeUpFromRxMsgCallback(hcan); +1966:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** #else +1967:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** /* Call weak (surcharged) callback */ +1968:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** HAL_CAN_WakeUpFromRxMsgCallback(hcan); +1969:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** #endif /* USE_HAL_CAN_REGISTER_CALLBACKS */ +1970:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** } +1971:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** } +1972:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** +1973:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** /* Error interrupts management *********************************************/ +1974:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** if ((interrupts & CAN_IT_ERROR) != 0U) +1975:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** { +1976:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** if ((msrflags & CAN_MSR_ERRI) != 0U) +1977:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** { +1978:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** /* Check Error Warning Flag */ +1979:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** if (((interrupts & CAN_IT_ERROR_WARNING) != 0U) && +1980:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** ((esrflags & CAN_ESR_EWGF) != 0U)) +1981:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** { +1982:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** /* Set CAN error code to Error Warning */ +1983:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** errorcode |= HAL_CAN_ERROR_EWG; +1984:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** +1985:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** /* No need for clear of Error Warning Flag as read-only */ +1986:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** } +1987:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** +1988:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** /* Check Error Passive Flag */ +1989:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** if (((interrupts & CAN_IT_ERROR_PASSIVE) != 0U) && +1990:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** ((esrflags & CAN_ESR_EPVF) != 0U)) +1991:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** { +1992:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** /* Set CAN error code to Error Passive */ + ARM GAS /tmp/ccftcnYc.s page 83 + + +1993:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** errorcode |= HAL_CAN_ERROR_EPV; +1994:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** +1995:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** /* No need for clear of Error Passive Flag as read-only */ +1996:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** } +1997:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** +1998:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** /* Check Bus-off Flag */ +1999:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** if (((interrupts & CAN_IT_BUSOFF) != 0U) && +2000:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** ((esrflags & CAN_ESR_BOFF) != 0U)) +2001:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** { +2002:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** /* Set CAN error code to Bus-Off */ +2003:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** errorcode |= HAL_CAN_ERROR_BOF; +2004:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** +2005:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** /* No need for clear of Error Bus-Off as read-only */ +2006:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** } +2007:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** +2008:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** /* Check Last Error Code Flag */ +2009:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** if (((interrupts & CAN_IT_LAST_ERROR_CODE) != 0U) && +2010:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** ((esrflags & CAN_ESR_LEC) != 0U)) +2011:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** { +2012:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** switch (esrflags & CAN_ESR_LEC) +2013:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** { +2014:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** case (CAN_ESR_LEC_0): +2015:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** /* Set CAN error code to Stuff error */ +2016:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** errorcode |= HAL_CAN_ERROR_STF; +2017:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** break; +2018:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** case (CAN_ESR_LEC_1): +2019:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** /* Set CAN error code to Form error */ +2020:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** errorcode |= HAL_CAN_ERROR_FOR; +2021:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** break; +2022:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** case (CAN_ESR_LEC_1 | CAN_ESR_LEC_0): +2023:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** /* Set CAN error code to Acknowledgement error */ +2024:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** errorcode |= HAL_CAN_ERROR_ACK; +2025:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** break; +2026:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** case (CAN_ESR_LEC_2): +2027:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** /* Set CAN error code to Bit recessive error */ +2028:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** errorcode |= HAL_CAN_ERROR_BR; +2029:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** break; +2030:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** case (CAN_ESR_LEC_2 | CAN_ESR_LEC_0): +2031:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** /* Set CAN error code to Bit Dominant error */ +2032:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** errorcode |= HAL_CAN_ERROR_BD; +2033:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** break; +2034:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** case (CAN_ESR_LEC_2 | CAN_ESR_LEC_1): +2035:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** /* Set CAN error code to CRC error */ +2036:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** errorcode |= HAL_CAN_ERROR_CRC; +2037:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** break; +2038:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** default: +2039:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** break; +2040:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** } +2041:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** +2042:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** /* Clear Last error code Flag */ +2043:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** CLEAR_BIT(hcan->Instance->ESR, CAN_ESR_LEC); +2044:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** } +2045:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** } +2046:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** +2047:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** /* Clear ERRI Flag */ +2048:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** __HAL_CAN_CLEAR_FLAG(hcan, CAN_FLAG_ERRI); +2049:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** } + ARM GAS /tmp/ccftcnYc.s page 84 + + +2050:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** +2051:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** /* Call the Error call Back in case of Errors */ +2052:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** if (errorcode != HAL_CAN_ERROR_NONE) +2053:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** { +2054:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** /* Update error code in handle */ +2055:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** hcan->ErrorCode |= errorcode; +2056:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** +2057:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** /* Call Error callback function */ +2058:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** #if USE_HAL_CAN_REGISTER_CALLBACKS == 1 +2059:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** /* Call registered callback*/ +2060:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** hcan->ErrorCallback(hcan); +2061:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** #else +2062:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** /* Call weak (surcharged) callback */ +2063:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** HAL_CAN_ErrorCallback(hcan); +2064:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** #endif /* USE_HAL_CAN_REGISTER_CALLBACKS */ +2065:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** } +2066:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** } +2067:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** +2068:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** /** +2069:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** * @} +2070:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** */ +2071:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** +2072:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** /** @defgroup CAN_Exported_Functions_Group5 Callback functions +2073:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** * @brief CAN Callback functions +2074:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** * +2075:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** @verbatim +2076:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** ============================================================================== +2077:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** ##### Callback functions ##### +2078:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** ============================================================================== +2079:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** [..] +2080:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** This subsection provides the following callback functions: +2081:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** (+) HAL_CAN_TxMailbox0CompleteCallback +2082:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** (+) HAL_CAN_TxMailbox1CompleteCallback +2083:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** (+) HAL_CAN_TxMailbox2CompleteCallback +2084:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** (+) HAL_CAN_TxMailbox0AbortCallback +2085:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** (+) HAL_CAN_TxMailbox1AbortCallback +2086:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** (+) HAL_CAN_TxMailbox2AbortCallback +2087:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** (+) HAL_CAN_RxFifo0MsgPendingCallback +2088:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** (+) HAL_CAN_RxFifo0FullCallback +2089:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** (+) HAL_CAN_RxFifo1MsgPendingCallback +2090:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** (+) HAL_CAN_RxFifo1FullCallback +2091:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** (+) HAL_CAN_SleepCallback +2092:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** (+) HAL_CAN_WakeUpFromRxMsgCallback +2093:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** (+) HAL_CAN_ErrorCallback +2094:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** +2095:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** @endverbatim +2096:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** * @{ +2097:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** */ +2098:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** +2099:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** /** +2100:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** * @brief Transmission Mailbox 0 complete callback. +2101:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** * @param hcan pointer to a CAN_HandleTypeDef structure that contains +2102:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** * the configuration information for the specified CAN. +2103:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** * @retval None +2104:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** */ +2105:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** __weak void HAL_CAN_TxMailbox0CompleteCallback(CAN_HandleTypeDef *hcan) +2106:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** { + ARM GAS /tmp/ccftcnYc.s page 85 + + + 2350 .loc 1 2106 1 is_stmt 1 view -0 + 2351 .cfi_startproc + 2352 @ args = 0, pretend = 0, frame = 0 + 2353 @ frame_needed = 0, uses_anonymous_args = 0 + 2354 @ link register save eliminated. +2107:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** /* Prevent unused argument(s) compilation warning */ +2108:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** UNUSED(hcan); + 2355 .loc 1 2108 3 view .LVU744 +2109:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** +2110:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** /* NOTE : This function Should not be modified, when the callback is needed, +2111:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** the HAL_CAN_TxMailbox0CompleteCallback could be implemented in the +2112:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** user file +2113:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** */ +2114:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** } + 2356 .loc 1 2114 1 is_stmt 0 view .LVU745 + 2357 @ sp needed + 2358 0000 7047 bx lr + 2359 .cfi_endproc + 2360 .LFE60: + 2362 .section .text.HAL_CAN_TxMailbox1CompleteCallback,"ax",%progbits + 2363 .align 1 + 2364 .weak HAL_CAN_TxMailbox1CompleteCallback + 2365 .syntax unified + 2366 .code 16 + 2367 .thumb_func + 2369 HAL_CAN_TxMailbox1CompleteCallback: + 2370 .LVL191: + 2371 .LFB61: +2115:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** +2116:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** /** +2117:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** * @brief Transmission Mailbox 1 complete callback. +2118:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** * @param hcan pointer to a CAN_HandleTypeDef structure that contains +2119:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** * the configuration information for the specified CAN. +2120:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** * @retval None +2121:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** */ +2122:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** __weak void HAL_CAN_TxMailbox1CompleteCallback(CAN_HandleTypeDef *hcan) +2123:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** { + 2372 .loc 1 2123 1 is_stmt 1 view -0 + 2373 .cfi_startproc + 2374 @ args = 0, pretend = 0, frame = 0 + 2375 @ frame_needed = 0, uses_anonymous_args = 0 + 2376 @ link register save eliminated. +2124:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** /* Prevent unused argument(s) compilation warning */ +2125:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** UNUSED(hcan); + 2377 .loc 1 2125 3 view .LVU747 +2126:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** +2127:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** /* NOTE : This function Should not be modified, when the callback is needed, +2128:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** the HAL_CAN_TxMailbox1CompleteCallback could be implemented in the +2129:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** user file +2130:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** */ +2131:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** } + 2378 .loc 1 2131 1 is_stmt 0 view .LVU748 + 2379 @ sp needed + 2380 0000 7047 bx lr + 2381 .cfi_endproc + 2382 .LFE61: + 2384 .section .text.HAL_CAN_TxMailbox2CompleteCallback,"ax",%progbits + ARM GAS /tmp/ccftcnYc.s page 86 + + + 2385 .align 1 + 2386 .weak HAL_CAN_TxMailbox2CompleteCallback + 2387 .syntax unified + 2388 .code 16 + 2389 .thumb_func + 2391 HAL_CAN_TxMailbox2CompleteCallback: + 2392 .LVL192: + 2393 .LFB62: +2132:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** +2133:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** /** +2134:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** * @brief Transmission Mailbox 2 complete callback. +2135:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** * @param hcan pointer to a CAN_HandleTypeDef structure that contains +2136:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** * the configuration information for the specified CAN. +2137:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** * @retval None +2138:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** */ +2139:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** __weak void HAL_CAN_TxMailbox2CompleteCallback(CAN_HandleTypeDef *hcan) +2140:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** { + 2394 .loc 1 2140 1 is_stmt 1 view -0 + 2395 .cfi_startproc + 2396 @ args = 0, pretend = 0, frame = 0 + 2397 @ frame_needed = 0, uses_anonymous_args = 0 + 2398 @ link register save eliminated. +2141:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** /* Prevent unused argument(s) compilation warning */ +2142:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** UNUSED(hcan); + 2399 .loc 1 2142 3 view .LVU750 +2143:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** +2144:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** /* NOTE : This function Should not be modified, when the callback is needed, +2145:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** the HAL_CAN_TxMailbox2CompleteCallback could be implemented in the +2146:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** user file +2147:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** */ +2148:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** } + 2400 .loc 1 2148 1 is_stmt 0 view .LVU751 + 2401 @ sp needed + 2402 0000 7047 bx lr + 2403 .cfi_endproc + 2404 .LFE62: + 2406 .section .text.HAL_CAN_TxMailbox0AbortCallback,"ax",%progbits + 2407 .align 1 + 2408 .weak HAL_CAN_TxMailbox0AbortCallback + 2409 .syntax unified + 2410 .code 16 + 2411 .thumb_func + 2413 HAL_CAN_TxMailbox0AbortCallback: + 2414 .LVL193: + 2415 .LFB63: +2149:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** +2150:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** /** +2151:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** * @brief Transmission Mailbox 0 Cancellation callback. +2152:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** * @param hcan pointer to an CAN_HandleTypeDef structure that contains +2153:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** * the configuration information for the specified CAN. +2154:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** * @retval None +2155:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** */ +2156:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** __weak void HAL_CAN_TxMailbox0AbortCallback(CAN_HandleTypeDef *hcan) +2157:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** { + 2416 .loc 1 2157 1 is_stmt 1 view -0 + 2417 .cfi_startproc + 2418 @ args = 0, pretend = 0, frame = 0 + ARM GAS /tmp/ccftcnYc.s page 87 + + + 2419 @ frame_needed = 0, uses_anonymous_args = 0 + 2420 @ link register save eliminated. +2158:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** /* Prevent unused argument(s) compilation warning */ +2159:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** UNUSED(hcan); + 2421 .loc 1 2159 3 view .LVU753 +2160:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** +2161:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** /* NOTE : This function Should not be modified, when the callback is needed, +2162:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** the HAL_CAN_TxMailbox0AbortCallback could be implemented in the +2163:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** user file +2164:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** */ +2165:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** } + 2422 .loc 1 2165 1 is_stmt 0 view .LVU754 + 2423 @ sp needed + 2424 0000 7047 bx lr + 2425 .cfi_endproc + 2426 .LFE63: + 2428 .section .text.HAL_CAN_TxMailbox1AbortCallback,"ax",%progbits + 2429 .align 1 + 2430 .weak HAL_CAN_TxMailbox1AbortCallback + 2431 .syntax unified + 2432 .code 16 + 2433 .thumb_func + 2435 HAL_CAN_TxMailbox1AbortCallback: + 2436 .LVL194: + 2437 .LFB64: +2166:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** +2167:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** /** +2168:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** * @brief Transmission Mailbox 1 Cancellation callback. +2169:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** * @param hcan pointer to an CAN_HandleTypeDef structure that contains +2170:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** * the configuration information for the specified CAN. +2171:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** * @retval None +2172:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** */ +2173:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** __weak void HAL_CAN_TxMailbox1AbortCallback(CAN_HandleTypeDef *hcan) +2174:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** { + 2438 .loc 1 2174 1 is_stmt 1 view -0 + 2439 .cfi_startproc + 2440 @ args = 0, pretend = 0, frame = 0 + 2441 @ frame_needed = 0, uses_anonymous_args = 0 + 2442 @ link register save eliminated. +2175:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** /* Prevent unused argument(s) compilation warning */ +2176:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** UNUSED(hcan); + 2443 .loc 1 2176 3 view .LVU756 +2177:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** +2178:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** /* NOTE : This function Should not be modified, when the callback is needed, +2179:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** the HAL_CAN_TxMailbox1AbortCallback could be implemented in the +2180:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** user file +2181:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** */ +2182:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** } + 2444 .loc 1 2182 1 is_stmt 0 view .LVU757 + 2445 @ sp needed + 2446 0000 7047 bx lr + 2447 .cfi_endproc + 2448 .LFE64: + 2450 .section .text.HAL_CAN_TxMailbox2AbortCallback,"ax",%progbits + 2451 .align 1 + 2452 .weak HAL_CAN_TxMailbox2AbortCallback + 2453 .syntax unified + ARM GAS /tmp/ccftcnYc.s page 88 + + + 2454 .code 16 + 2455 .thumb_func + 2457 HAL_CAN_TxMailbox2AbortCallback: + 2458 .LVL195: + 2459 .LFB65: +2183:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** +2184:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** /** +2185:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** * @brief Transmission Mailbox 2 Cancellation callback. +2186:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** * @param hcan pointer to an CAN_HandleTypeDef structure that contains +2187:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** * the configuration information for the specified CAN. +2188:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** * @retval None +2189:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** */ +2190:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** __weak void HAL_CAN_TxMailbox2AbortCallback(CAN_HandleTypeDef *hcan) +2191:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** { + 2460 .loc 1 2191 1 is_stmt 1 view -0 + 2461 .cfi_startproc + 2462 @ args = 0, pretend = 0, frame = 0 + 2463 @ frame_needed = 0, uses_anonymous_args = 0 + 2464 @ link register save eliminated. +2192:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** /* Prevent unused argument(s) compilation warning */ +2193:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** UNUSED(hcan); + 2465 .loc 1 2193 3 view .LVU759 +2194:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** +2195:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** /* NOTE : This function Should not be modified, when the callback is needed, +2196:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** the HAL_CAN_TxMailbox2AbortCallback could be implemented in the +2197:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** user file +2198:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** */ +2199:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** } + 2466 .loc 1 2199 1 is_stmt 0 view .LVU760 + 2467 @ sp needed + 2468 0000 7047 bx lr + 2469 .cfi_endproc + 2470 .LFE65: + 2472 .section .text.HAL_CAN_RxFifo0MsgPendingCallback,"ax",%progbits + 2473 .align 1 + 2474 .weak HAL_CAN_RxFifo0MsgPendingCallback + 2475 .syntax unified + 2476 .code 16 + 2477 .thumb_func + 2479 HAL_CAN_RxFifo0MsgPendingCallback: + 2480 .LVL196: + 2481 .LFB66: +2200:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** +2201:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** /** +2202:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** * @brief Rx FIFO 0 message pending callback. +2203:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** * @param hcan pointer to a CAN_HandleTypeDef structure that contains +2204:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** * the configuration information for the specified CAN. +2205:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** * @retval None +2206:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** */ +2207:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** __weak void HAL_CAN_RxFifo0MsgPendingCallback(CAN_HandleTypeDef *hcan) +2208:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** { + 2482 .loc 1 2208 1 is_stmt 1 view -0 + 2483 .cfi_startproc + 2484 @ args = 0, pretend = 0, frame = 0 + 2485 @ frame_needed = 0, uses_anonymous_args = 0 + 2486 @ link register save eliminated. +2209:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** /* Prevent unused argument(s) compilation warning */ + ARM GAS /tmp/ccftcnYc.s page 89 + + +2210:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** UNUSED(hcan); + 2487 .loc 1 2210 3 view .LVU762 +2211:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** +2212:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** /* NOTE : This function Should not be modified, when the callback is needed, +2213:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** the HAL_CAN_RxFifo0MsgPendingCallback could be implemented in the +2214:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** user file +2215:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** */ +2216:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** } + 2488 .loc 1 2216 1 is_stmt 0 view .LVU763 + 2489 @ sp needed + 2490 0000 7047 bx lr + 2491 .cfi_endproc + 2492 .LFE66: + 2494 .section .text.HAL_CAN_RxFifo0FullCallback,"ax",%progbits + 2495 .align 1 + 2496 .weak HAL_CAN_RxFifo0FullCallback + 2497 .syntax unified + 2498 .code 16 + 2499 .thumb_func + 2501 HAL_CAN_RxFifo0FullCallback: + 2502 .LVL197: + 2503 .LFB67: +2217:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** +2218:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** /** +2219:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** * @brief Rx FIFO 0 full callback. +2220:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** * @param hcan pointer to a CAN_HandleTypeDef structure that contains +2221:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** * the configuration information for the specified CAN. +2222:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** * @retval None +2223:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** */ +2224:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** __weak void HAL_CAN_RxFifo0FullCallback(CAN_HandleTypeDef *hcan) +2225:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** { + 2504 .loc 1 2225 1 is_stmt 1 view -0 + 2505 .cfi_startproc + 2506 @ args = 0, pretend = 0, frame = 0 + 2507 @ frame_needed = 0, uses_anonymous_args = 0 + 2508 @ link register save eliminated. +2226:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** /* Prevent unused argument(s) compilation warning */ +2227:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** UNUSED(hcan); + 2509 .loc 1 2227 3 view .LVU765 +2228:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** +2229:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** /* NOTE : This function Should not be modified, when the callback is needed, +2230:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** the HAL_CAN_RxFifo0FullCallback could be implemented in the user +2231:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** file +2232:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** */ +2233:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** } + 2510 .loc 1 2233 1 is_stmt 0 view .LVU766 + 2511 @ sp needed + 2512 0000 7047 bx lr + 2513 .cfi_endproc + 2514 .LFE67: + 2516 .section .text.HAL_CAN_RxFifo1MsgPendingCallback,"ax",%progbits + 2517 .align 1 + 2518 .weak HAL_CAN_RxFifo1MsgPendingCallback + 2519 .syntax unified + 2520 .code 16 + 2521 .thumb_func + 2523 HAL_CAN_RxFifo1MsgPendingCallback: + ARM GAS /tmp/ccftcnYc.s page 90 + + + 2524 .LVL198: + 2525 .LFB68: +2234:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** +2235:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** /** +2236:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** * @brief Rx FIFO 1 message pending callback. +2237:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** * @param hcan pointer to a CAN_HandleTypeDef structure that contains +2238:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** * the configuration information for the specified CAN. +2239:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** * @retval None +2240:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** */ +2241:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** __weak void HAL_CAN_RxFifo1MsgPendingCallback(CAN_HandleTypeDef *hcan) +2242:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** { + 2526 .loc 1 2242 1 is_stmt 1 view -0 + 2527 .cfi_startproc + 2528 @ args = 0, pretend = 0, frame = 0 + 2529 @ frame_needed = 0, uses_anonymous_args = 0 + 2530 @ link register save eliminated. +2243:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** /* Prevent unused argument(s) compilation warning */ +2244:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** UNUSED(hcan); + 2531 .loc 1 2244 3 view .LVU768 +2245:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** +2246:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** /* NOTE : This function Should not be modified, when the callback is needed, +2247:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** the HAL_CAN_RxFifo1MsgPendingCallback could be implemented in the +2248:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** user file +2249:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** */ +2250:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** } + 2532 .loc 1 2250 1 is_stmt 0 view .LVU769 + 2533 @ sp needed + 2534 0000 7047 bx lr + 2535 .cfi_endproc + 2536 .LFE68: + 2538 .section .text.HAL_CAN_RxFifo1FullCallback,"ax",%progbits + 2539 .align 1 + 2540 .weak HAL_CAN_RxFifo1FullCallback + 2541 .syntax unified + 2542 .code 16 + 2543 .thumb_func + 2545 HAL_CAN_RxFifo1FullCallback: + 2546 .LVL199: + 2547 .LFB69: +2251:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** +2252:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** /** +2253:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** * @brief Rx FIFO 1 full callback. +2254:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** * @param hcan pointer to a CAN_HandleTypeDef structure that contains +2255:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** * the configuration information for the specified CAN. +2256:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** * @retval None +2257:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** */ +2258:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** __weak void HAL_CAN_RxFifo1FullCallback(CAN_HandleTypeDef *hcan) +2259:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** { + 2548 .loc 1 2259 1 is_stmt 1 view -0 + 2549 .cfi_startproc + 2550 @ args = 0, pretend = 0, frame = 0 + 2551 @ frame_needed = 0, uses_anonymous_args = 0 + 2552 @ link register save eliminated. +2260:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** /* Prevent unused argument(s) compilation warning */ +2261:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** UNUSED(hcan); + 2553 .loc 1 2261 3 view .LVU771 +2262:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** + ARM GAS /tmp/ccftcnYc.s page 91 + + +2263:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** /* NOTE : This function Should not be modified, when the callback is needed, +2264:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** the HAL_CAN_RxFifo1FullCallback could be implemented in the user +2265:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** file +2266:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** */ +2267:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** } + 2554 .loc 1 2267 1 is_stmt 0 view .LVU772 + 2555 @ sp needed + 2556 0000 7047 bx lr + 2557 .cfi_endproc + 2558 .LFE69: + 2560 .section .text.HAL_CAN_SleepCallback,"ax",%progbits + 2561 .align 1 + 2562 .weak HAL_CAN_SleepCallback + 2563 .syntax unified + 2564 .code 16 + 2565 .thumb_func + 2567 HAL_CAN_SleepCallback: + 2568 .LVL200: + 2569 .LFB70: +2268:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** +2269:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** /** +2270:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** * @brief Sleep callback. +2271:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** * @param hcan pointer to a CAN_HandleTypeDef structure that contains +2272:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** * the configuration information for the specified CAN. +2273:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** * @retval None +2274:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** */ +2275:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** __weak void HAL_CAN_SleepCallback(CAN_HandleTypeDef *hcan) +2276:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** { + 2570 .loc 1 2276 1 is_stmt 1 view -0 + 2571 .cfi_startproc + 2572 @ args = 0, pretend = 0, frame = 0 + 2573 @ frame_needed = 0, uses_anonymous_args = 0 + 2574 @ link register save eliminated. +2277:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** /* Prevent unused argument(s) compilation warning */ +2278:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** UNUSED(hcan); + 2575 .loc 1 2278 3 view .LVU774 +2279:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** +2280:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** /* NOTE : This function Should not be modified, when the callback is needed, +2281:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** the HAL_CAN_SleepCallback could be implemented in the user file +2282:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** */ +2283:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** } + 2576 .loc 1 2283 1 is_stmt 0 view .LVU775 + 2577 @ sp needed + 2578 0000 7047 bx lr + 2579 .cfi_endproc + 2580 .LFE70: + 2582 .section .text.HAL_CAN_WakeUpFromRxMsgCallback,"ax",%progbits + 2583 .align 1 + 2584 .weak HAL_CAN_WakeUpFromRxMsgCallback + 2585 .syntax unified + 2586 .code 16 + 2587 .thumb_func + 2589 HAL_CAN_WakeUpFromRxMsgCallback: + 2590 .LVL201: + 2591 .LFB71: +2284:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** +2285:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** /** + ARM GAS /tmp/ccftcnYc.s page 92 + + +2286:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** * @brief WakeUp from Rx message callback. +2287:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** * @param hcan pointer to a CAN_HandleTypeDef structure that contains +2288:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** * the configuration information for the specified CAN. +2289:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** * @retval None +2290:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** */ +2291:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** __weak void HAL_CAN_WakeUpFromRxMsgCallback(CAN_HandleTypeDef *hcan) +2292:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** { + 2592 .loc 1 2292 1 is_stmt 1 view -0 + 2593 .cfi_startproc + 2594 @ args = 0, pretend = 0, frame = 0 + 2595 @ frame_needed = 0, uses_anonymous_args = 0 + 2596 @ link register save eliminated. +2293:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** /* Prevent unused argument(s) compilation warning */ +2294:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** UNUSED(hcan); + 2597 .loc 1 2294 3 view .LVU777 +2295:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** +2296:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** /* NOTE : This function Should not be modified, when the callback is needed, +2297:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** the HAL_CAN_WakeUpFromRxMsgCallback could be implemented in the +2298:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** user file +2299:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** */ +2300:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** } + 2598 .loc 1 2300 1 is_stmt 0 view .LVU778 + 2599 @ sp needed + 2600 0000 7047 bx lr + 2601 .cfi_endproc + 2602 .LFE71: + 2604 .section .text.HAL_CAN_ErrorCallback,"ax",%progbits + 2605 .align 1 + 2606 .weak HAL_CAN_ErrorCallback + 2607 .syntax unified + 2608 .code 16 + 2609 .thumb_func + 2611 HAL_CAN_ErrorCallback: + 2612 .LVL202: + 2613 .LFB72: +2301:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** +2302:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** /** +2303:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** * @brief Error CAN callback. +2304:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** * @param hcan pointer to a CAN_HandleTypeDef structure that contains +2305:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** * the configuration information for the specified CAN. +2306:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** * @retval None +2307:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** */ +2308:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** __weak void HAL_CAN_ErrorCallback(CAN_HandleTypeDef *hcan) +2309:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** { + 2614 .loc 1 2309 1 is_stmt 1 view -0 + 2615 .cfi_startproc + 2616 @ args = 0, pretend = 0, frame = 0 + 2617 @ frame_needed = 0, uses_anonymous_args = 0 + 2618 @ link register save eliminated. +2310:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** /* Prevent unused argument(s) compilation warning */ +2311:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** UNUSED(hcan); + 2619 .loc 1 2311 3 view .LVU780 +2312:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** +2313:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** /* NOTE : This function Should not be modified, when the callback is needed, +2314:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** the HAL_CAN_ErrorCallback could be implemented in the user file +2315:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** */ +2316:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** } + ARM GAS /tmp/ccftcnYc.s page 93 + + + 2620 .loc 1 2316 1 is_stmt 0 view .LVU781 + 2621 @ sp needed + 2622 0000 7047 bx lr + 2623 .cfi_endproc + 2624 .LFE72: + 2626 .section .text.HAL_CAN_IRQHandler,"ax",%progbits + 2627 .align 1 + 2628 .global HAL_CAN_IRQHandler + 2629 .syntax unified + 2630 .code 16 + 2631 .thumb_func + 2633 HAL_CAN_IRQHandler: + 2634 .LVL203: + 2635 .LFB59: +1695:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** uint32_t errorcode = HAL_CAN_ERROR_NONE; + 2636 .loc 1 1695 1 is_stmt 1 view -0 + 2637 .cfi_startproc + 2638 @ args = 0, pretend = 0, frame = 0 + 2639 @ frame_needed = 0, uses_anonymous_args = 0 +1695:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** uint32_t errorcode = HAL_CAN_ERROR_NONE; + 2640 .loc 1 1695 1 is_stmt 0 view .LVU783 + 2641 0000 F8B5 push {r3, r4, r5, r6, r7, lr} + 2642 .cfi_def_cfa_offset 24 + 2643 .cfi_offset 3, -24 + 2644 .cfi_offset 4, -20 + 2645 .cfi_offset 5, -16 + 2646 .cfi_offset 6, -12 + 2647 .cfi_offset 7, -8 + 2648 .cfi_offset 14, -4 + 2649 0002 DE46 mov lr, fp + 2650 0004 5746 mov r7, r10 + 2651 0006 4E46 mov r6, r9 + 2652 0008 4546 mov r5, r8 + 2653 000a E0B5 push {r5, r6, r7, lr} + 2654 .cfi_def_cfa_offset 40 + 2655 .cfi_offset 8, -40 + 2656 .cfi_offset 9, -36 + 2657 .cfi_offset 10, -32 + 2658 .cfi_offset 11, -28 + 2659 000c 0500 movs r5, r0 +1696:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** uint32_t interrupts = READ_REG(hcan->Instance->IER); + 2660 .loc 1 1696 3 is_stmt 1 view .LVU784 + 2661 .LVL204: +1697:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** uint32_t msrflags = READ_REG(hcan->Instance->MSR); + 2662 .loc 1 1697 3 view .LVU785 +1697:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** uint32_t msrflags = READ_REG(hcan->Instance->MSR); + 2663 .loc 1 1697 25 is_stmt 0 view .LVU786 + 2664 000e 0368 ldr r3, [r0] +1697:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** uint32_t msrflags = READ_REG(hcan->Instance->MSR); + 2665 .loc 1 1697 12 view .LVU787 + 2666 0010 5C69 ldr r4, [r3, #20] + 2667 .LVL205: +1698:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** uint32_t tsrflags = READ_REG(hcan->Instance->TSR); + 2668 .loc 1 1698 3 is_stmt 1 view .LVU788 +1698:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** uint32_t tsrflags = READ_REG(hcan->Instance->TSR); + 2669 .loc 1 1698 12 is_stmt 0 view .LVU789 + 2670 0012 5A68 ldr r2, [r3, #4] + ARM GAS /tmp/ccftcnYc.s page 94 + + + 2671 0014 9046 mov r8, r2 + 2672 .LVL206: +1699:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** uint32_t rf0rflags = READ_REG(hcan->Instance->RF0R); + 2673 .loc 1 1699 3 is_stmt 1 view .LVU790 +1699:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** uint32_t rf0rflags = READ_REG(hcan->Instance->RF0R); + 2674 .loc 1 1699 12 is_stmt 0 view .LVU791 + 2675 0016 9F68 ldr r7, [r3, #8] + 2676 .LVL207: +1700:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** uint32_t rf1rflags = READ_REG(hcan->Instance->RF1R); + 2677 .loc 1 1700 3 is_stmt 1 view .LVU792 +1700:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** uint32_t rf1rflags = READ_REG(hcan->Instance->RF1R); + 2678 .loc 1 1700 12 is_stmt 0 view .LVU793 + 2679 0018 DA68 ldr r2, [r3, #12] + 2680 .LVL208: +1700:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** uint32_t rf1rflags = READ_REG(hcan->Instance->RF1R); + 2681 .loc 1 1700 12 view .LVU794 + 2682 001a 9246 mov r10, r2 + 2683 .LVL209: +1701:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** uint32_t esrflags = READ_REG(hcan->Instance->ESR); + 2684 .loc 1 1701 3 is_stmt 1 view .LVU795 +1701:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** uint32_t esrflags = READ_REG(hcan->Instance->ESR); + 2685 .loc 1 1701 12 is_stmt 0 view .LVU796 + 2686 001c 1A69 ldr r2, [r3, #16] + 2687 .LVL210: +1701:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** uint32_t esrflags = READ_REG(hcan->Instance->ESR); + 2688 .loc 1 1701 12 view .LVU797 + 2689 001e 9146 mov r9, r2 + 2690 .LVL211: +1702:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** + 2691 .loc 1 1702 3 is_stmt 1 view .LVU798 +1702:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** + 2692 .loc 1 1702 12 is_stmt 0 view .LVU799 + 2693 0020 9A69 ldr r2, [r3, #24] + 2694 .LVL212: +1702:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** + 2695 .loc 1 1702 12 view .LVU800 + 2696 0022 9346 mov fp, r2 + 2697 .LVL213: +1705:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** { + 2698 .loc 1 1705 3 is_stmt 1 view .LVU801 +1705:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** { + 2699 .loc 1 1705 19 is_stmt 0 view .LVU802 + 2700 0024 0122 movs r2, #1 + 2701 .LVL214: +1705:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** { + 2702 .loc 1 1705 19 view .LVU803 + 2703 0026 1600 movs r6, r2 + 2704 0028 2640 ands r6, r4 +1705:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** { + 2705 .loc 1 1705 6 view .LVU804 + 2706 002a 2242 tst r2, r4 + 2707 002c 37D0 beq .L161 +1708:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** { + 2708 .loc 1 1708 5 is_stmt 1 view .LVU805 +1708:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** { + 2709 .loc 1 1708 19 is_stmt 0 view .LVU806 + 2710 002e 1600 movs r6, r2 + ARM GAS /tmp/ccftcnYc.s page 95 + + + 2711 0030 3E40 ands r6, r7 +1708:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** { + 2712 .loc 1 1708 8 view .LVU807 + 2713 0032 3A42 tst r2, r7 + 2714 0034 15D0 beq .L162 +1711:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** + 2715 .loc 1 1711 7 is_stmt 1 view .LVU808 + 2716 0036 9A60 str r2, [r3, #8] +1713:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** { + 2717 .loc 1 1713 7 view .LVU809 +1713:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** { + 2718 .loc 1 1713 10 is_stmt 0 view .LVU810 + 2719 0038 BB07 lsls r3, r7, #30 + 2720 003a 09D4 bmi .L222 +1726:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** { + 2721 .loc 1 1726 9 is_stmt 1 view .LVU811 +1726:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** { + 2722 .loc 1 1726 12 is_stmt 0 view .LVU812 + 2723 003c 7B07 lsls r3, r7, #29 + 2724 003e 0ED4 bmi .L193 +1731:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** { + 2725 .loc 1 1731 14 is_stmt 1 view .LVU813 +1731:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** { + 2726 .loc 1 1731 28 is_stmt 0 view .LVU814 + 2727 0040 0823 movs r3, #8 + 2728 0042 1E00 movs r6, r3 + 2729 0044 3E40 ands r6, r7 +1731:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** { + 2730 .loc 1 1731 17 view .LVU815 + 2731 0046 3B42 tst r3, r7 + 2732 0048 06D0 beq .L223 +1734:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** } + 2733 .loc 1 1734 21 view .LVU816 + 2734 004a 8026 movs r6, #128 + 2735 004c 7601 lsls r6, r6, #5 + 2736 004e 08E0 b .L162 + 2737 .L222: +1721:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** #endif /* USE_HAL_CAN_REGISTER_CALLBACKS */ + 2738 .loc 1 1721 9 is_stmt 1 view .LVU817 + 2739 0050 FFF7FEFF bl HAL_CAN_TxMailbox0CompleteCallback + 2740 .LVL215: +1696:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** uint32_t interrupts = READ_REG(hcan->Instance->IER); + 2741 .loc 1 1696 12 is_stmt 0 view .LVU818 + 2742 0054 0026 movs r6, #0 + 2743 0056 04E0 b .L162 + 2744 .LVL216: + 2745 .L223: +1744:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** #endif /* USE_HAL_CAN_REGISTER_CALLBACKS */ + 2746 .loc 1 1744 11 is_stmt 1 view .LVU819 + 2747 0058 FFF7FEFF bl HAL_CAN_TxMailbox0AbortCallback + 2748 .LVL217: +1744:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** #endif /* USE_HAL_CAN_REGISTER_CALLBACKS */ + 2749 .loc 1 1744 11 is_stmt 0 view .LVU820 + 2750 005c 01E0 b .L162 + 2751 .LVL218: + 2752 .L193: +1729:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** } + ARM GAS /tmp/ccftcnYc.s page 96 + + + 2753 .loc 1 1729 21 view .LVU821 + 2754 005e 8026 movs r6, #128 + 2755 0060 3601 lsls r6, r6, #4 + 2756 .LVL219: + 2757 .L162: +1751:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** { + 2758 .loc 1 1751 5 is_stmt 1 view .LVU822 +1751:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** { + 2759 .loc 1 1751 8 is_stmt 0 view .LVU823 + 2760 0062 FB05 lsls r3, r7, #23 + 2761 0064 0CD5 bpl .L164 +1754:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** + 2762 .loc 1 1754 7 is_stmt 1 view .LVU824 + 2763 0066 2B68 ldr r3, [r5] + 2764 0068 8022 movs r2, #128 + 2765 006a 5200 lsls r2, r2, #1 + 2766 006c 9A60 str r2, [r3, #8] +1756:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** { + 2767 .loc 1 1756 7 view .LVU825 +1756:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** { + 2768 .loc 1 1756 10 is_stmt 0 view .LVU826 + 2769 006e BB05 lsls r3, r7, #22 + 2770 0070 00D5 bpl .LCB2318 + 2771 0072 8DE0 b .L224 @long jump + 2772 .LCB2318: +1769:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** { + 2773 .loc 1 1769 9 is_stmt 1 view .LVU827 +1769:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** { + 2774 .loc 1 1769 12 is_stmt 0 view .LVU828 + 2775 0074 7B05 lsls r3, r7, #21 + 2776 0076 00D4 bmi .LCB2323 + 2777 0078 8EE0 b .L166 @long jump + 2778 .LCB2323: +1772:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** } + 2779 .loc 1 1772 11 is_stmt 1 view .LVU829 +1772:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** } + 2780 .loc 1 1772 21 is_stmt 0 view .LVU830 + 2781 007a 8023 movs r3, #128 + 2782 007c 9B01 lsls r3, r3, #6 + 2783 007e 1E43 orrs r6, r3 + 2784 .LVL220: + 2785 .L164: +1794:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** { + 2786 .loc 1 1794 5 is_stmt 1 view .LVU831 +1794:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** { + 2787 .loc 1 1794 8 is_stmt 0 view .LVU832 + 2788 0080 FB03 lsls r3, r7, #15 + 2789 0082 0CD5 bpl .L161 +1797:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** + 2790 .loc 1 1797 7 is_stmt 1 view .LVU833 + 2791 0084 2B68 ldr r3, [r5] + 2792 0086 8022 movs r2, #128 + 2793 0088 5202 lsls r2, r2, #9 + 2794 008a 9A60 str r2, [r3, #8] +1799:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** { + 2795 .loc 1 1799 7 view .LVU834 +1799:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** { + ARM GAS /tmp/ccftcnYc.s page 97 + + + 2796 .loc 1 1799 10 is_stmt 0 view .LVU835 + 2797 008c BB03 lsls r3, r7, #14 + 2798 008e 00D5 bpl .LCB2350 + 2799 0090 8CE0 b .L225 @long jump + 2800 .LCB2350: +1812:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** { + 2801 .loc 1 1812 9 is_stmt 1 view .LVU836 +1812:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** { + 2802 .loc 1 1812 12 is_stmt 0 view .LVU837 + 2803 0092 7B03 lsls r3, r7, #13 + 2804 0094 00D4 bmi .LCB2355 + 2805 0096 8DE0 b .L169 @long jump + 2806 .LCB2355: +1815:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** } + 2807 .loc 1 1815 11 is_stmt 1 view .LVU838 +1815:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** } + 2808 .loc 1 1815 21 is_stmt 0 view .LVU839 + 2809 0098 8023 movs r3, #128 + 2810 009a 1B02 lsls r3, r3, #8 + 2811 009c 1E43 orrs r6, r3 + 2812 .LVL221: + 2813 .L161: +1838:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** { + 2814 .loc 1 1838 3 is_stmt 1 view .LVU840 +1838:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** { + 2815 .loc 1 1838 6 is_stmt 0 view .LVU841 + 2816 009e 2307 lsls r3, r4, #28 + 2817 00a0 08D5 bpl .L171 +1840:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** { + 2818 .loc 1 1840 5 is_stmt 1 view .LVU842 +1840:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** { + 2819 .loc 1 1840 8 is_stmt 0 view .LVU843 + 2820 00a2 5346 mov r3, r10 + 2821 00a4 DB06 lsls r3, r3, #27 + 2822 00a6 05D5 bpl .L171 +1843:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** + 2823 .loc 1 1843 7 is_stmt 1 view .LVU844 +1843:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** + 2824 .loc 1 1843 17 is_stmt 0 view .LVU845 + 2825 00a8 8023 movs r3, #128 + 2826 00aa 9B00 lsls r3, r3, #2 + 2827 00ac 1E43 orrs r6, r3 + 2828 .LVL222: +1846:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** } + 2829 .loc 1 1846 7 is_stmt 1 view .LVU846 + 2830 00ae 2B68 ldr r3, [r5] + 2831 00b0 1022 movs r2, #16 + 2832 00b2 DA60 str r2, [r3, #12] + 2833 .L171: +1851:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** { + 2834 .loc 1 1851 3 view .LVU847 +1851:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** { + 2835 .loc 1 1851 6 is_stmt 0 view .LVU848 + 2836 00b4 6307 lsls r3, r4, #29 + 2837 00b6 03D5 bpl .L172 +1853:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** { + 2838 .loc 1 1853 5 is_stmt 1 view .LVU849 + ARM GAS /tmp/ccftcnYc.s page 98 + + +1853:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** { + 2839 .loc 1 1853 8 is_stmt 0 view .LVU850 + 2840 00b8 5346 mov r3, r10 + 2841 00ba 1B07 lsls r3, r3, #28 + 2842 00bc 00D5 bpl .LCB2406 + 2843 00be 83E0 b .L226 @long jump + 2844 .LCB2406: + 2845 .L172: +1870:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** { + 2846 .loc 1 1870 3 is_stmt 1 view .LVU851 +1870:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** { + 2847 .loc 1 1870 6 is_stmt 0 view .LVU852 + 2848 00c0 A307 lsls r3, r4, #30 + 2849 00c2 04D5 bpl .L173 +1873:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** { + 2850 .loc 1 1873 5 is_stmt 1 view .LVU853 +1873:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** { + 2851 .loc 1 1873 14 is_stmt 0 view .LVU854 + 2852 00c4 2B68 ldr r3, [r5] +1873:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** { + 2853 .loc 1 1873 24 view .LVU855 + 2854 00c6 DB68 ldr r3, [r3, #12] +1873:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** { + 2855 .loc 1 1873 8 view .LVU856 + 2856 00c8 9B07 lsls r3, r3, #30 + 2857 00ca 00D0 beq .LCB2420 + 2858 00cc 83E0 b .L227 @long jump + 2859 .LCB2420: + 2860 .L173: +1887:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** { + 2861 .loc 1 1887 3 is_stmt 1 view .LVU857 +1887:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** { + 2862 .loc 1 1887 6 is_stmt 0 view .LVU858 + 2863 00ce 6306 lsls r3, r4, #25 + 2864 00d0 08D5 bpl .L174 +1889:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** { + 2865 .loc 1 1889 5 is_stmt 1 view .LVU859 +1889:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** { + 2866 .loc 1 1889 8 is_stmt 0 view .LVU860 + 2867 00d2 4B46 mov r3, r9 + 2868 00d4 DB06 lsls r3, r3, #27 + 2869 00d6 05D5 bpl .L174 +1892:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** + 2870 .loc 1 1892 7 is_stmt 1 view .LVU861 +1892:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** + 2871 .loc 1 1892 17 is_stmt 0 view .LVU862 + 2872 00d8 8023 movs r3, #128 + 2873 00da DB00 lsls r3, r3, #3 + 2874 00dc 1E43 orrs r6, r3 + 2875 .LVL223: +1895:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** } + 2876 .loc 1 1895 7 is_stmt 1 view .LVU863 + 2877 00de 2B68 ldr r3, [r5] + 2878 00e0 1022 movs r2, #16 + 2879 00e2 1A61 str r2, [r3, #16] + 2880 .L174: +1900:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** { + ARM GAS /tmp/ccftcnYc.s page 99 + + + 2881 .loc 1 1900 3 view .LVU864 +1900:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** { + 2882 .loc 1 1900 6 is_stmt 0 view .LVU865 + 2883 00e4 A306 lsls r3, r4, #26 + 2884 00e6 03D5 bpl .L175 +1902:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** { + 2885 .loc 1 1902 5 is_stmt 1 view .LVU866 +1902:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** { + 2886 .loc 1 1902 8 is_stmt 0 view .LVU867 + 2887 00e8 4B46 mov r3, r9 + 2888 00ea 1B07 lsls r3, r3, #28 + 2889 00ec 00D5 bpl .LCB2461 + 2890 00ee 76E0 b .L228 @long jump + 2891 .LCB2461: + 2892 .L175: +1919:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** { + 2893 .loc 1 1919 3 is_stmt 1 view .LVU868 +1919:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** { + 2894 .loc 1 1919 6 is_stmt 0 view .LVU869 + 2895 00f0 E306 lsls r3, r4, #27 + 2896 00f2 04D5 bpl .L176 +1922:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** { + 2897 .loc 1 1922 5 is_stmt 1 view .LVU870 +1922:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** { + 2898 .loc 1 1922 14 is_stmt 0 view .LVU871 + 2899 00f4 2B68 ldr r3, [r5] +1922:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** { + 2900 .loc 1 1922 24 view .LVU872 + 2901 00f6 1B69 ldr r3, [r3, #16] +1922:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** { + 2902 .loc 1 1922 8 view .LVU873 + 2903 00f8 9B07 lsls r3, r3, #30 + 2904 00fa 00D0 beq .LCB2475 + 2905 00fc 76E0 b .L229 @long jump + 2906 .LCB2475: + 2907 .L176: +1936:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** { + 2908 .loc 1 1936 3 is_stmt 1 view .LVU874 +1936:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** { + 2909 .loc 1 1936 6 is_stmt 0 view .LVU875 + 2910 00fe A303 lsls r3, r4, #14 + 2911 0100 03D5 bpl .L177 +1938:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** { + 2912 .loc 1 1938 5 is_stmt 1 view .LVU876 +1938:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** { + 2913 .loc 1 1938 8 is_stmt 0 view .LVU877 + 2914 0102 4346 mov r3, r8 + 2915 0104 DB06 lsls r3, r3, #27 + 2916 0106 00D5 bpl .LCB2488 + 2917 0108 74E0 b .L230 @long jump + 2918 .LCB2488: + 2919 .L177: +1955:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** { + 2920 .loc 1 1955 3 is_stmt 1 view .LVU878 +1955:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** { + 2921 .loc 1 1955 6 is_stmt 0 view .LVU879 + 2922 010a E303 lsls r3, r4, #15 + ARM GAS /tmp/ccftcnYc.s page 100 + + + 2923 010c 03D5 bpl .L178 +1957:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** { + 2924 .loc 1 1957 5 is_stmt 1 view .LVU880 +1957:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** { + 2925 .loc 1 1957 8 is_stmt 0 view .LVU881 + 2926 010e 4346 mov r3, r8 + 2927 0110 1B07 lsls r3, r3, #28 + 2928 0112 00D5 bpl .LCB2501 + 2929 0114 75E0 b .L231 @long jump + 2930 .LCB2501: + 2931 .L178: +1974:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** { + 2932 .loc 1 1974 3 is_stmt 1 view .LVU882 +1974:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** { + 2933 .loc 1 1974 6 is_stmt 0 view .LVU883 + 2934 0116 2304 lsls r3, r4, #16 + 2935 0118 32D5 bpl .L179 +1976:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** { + 2936 .loc 1 1976 5 is_stmt 1 view .LVU884 +1976:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** { + 2937 .loc 1 1976 8 is_stmt 0 view .LVU885 + 2938 011a 4346 mov r3, r8 + 2939 011c 5B07 lsls r3, r3, #29 + 2940 011e 2CD5 bpl .L180 +1979:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** ((esrflags & CAN_ESR_EWGF) != 0U)) + 2941 .loc 1 1979 7 is_stmt 1 view .LVU886 +1979:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** ((esrflags & CAN_ESR_EWGF) != 0U)) + 2942 .loc 1 1979 10 is_stmt 0 view .LVU887 + 2943 0120 E305 lsls r3, r4, #23 + 2944 0122 04D5 bpl .L181 +1979:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** ((esrflags & CAN_ESR_EWGF) != 0U)) + 2945 .loc 1 1979 55 discriminator 1 view .LVU888 + 2946 0124 5B46 mov r3, fp + 2947 0126 DB07 lsls r3, r3, #31 + 2948 0128 01D5 bpl .L181 +1983:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** + 2949 .loc 1 1983 9 is_stmt 1 view .LVU889 +1983:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** + 2950 .loc 1 1983 19 is_stmt 0 view .LVU890 + 2951 012a 0123 movs r3, #1 + 2952 012c 1E43 orrs r6, r3 + 2953 .LVL224: + 2954 .L181: +1989:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** ((esrflags & CAN_ESR_EPVF) != 0U)) + 2955 .loc 1 1989 7 is_stmt 1 view .LVU891 +1989:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** ((esrflags & CAN_ESR_EPVF) != 0U)) + 2956 .loc 1 1989 10 is_stmt 0 view .LVU892 + 2957 012e A305 lsls r3, r4, #22 + 2958 0130 04D5 bpl .L182 +1989:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** ((esrflags & CAN_ESR_EPVF) != 0U)) + 2959 .loc 1 1989 55 discriminator 1 view .LVU893 + 2960 0132 5B46 mov r3, fp + 2961 0134 9B07 lsls r3, r3, #30 + 2962 0136 01D5 bpl .L182 +1993:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** + 2963 .loc 1 1993 9 is_stmt 1 view .LVU894 +1993:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** + ARM GAS /tmp/ccftcnYc.s page 101 + + + 2964 .loc 1 1993 19 is_stmt 0 view .LVU895 + 2965 0138 0223 movs r3, #2 + 2966 013a 1E43 orrs r6, r3 + 2967 .LVL225: + 2968 .L182: +1999:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** ((esrflags & CAN_ESR_BOFF) != 0U)) + 2969 .loc 1 1999 7 is_stmt 1 view .LVU896 +1999:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** ((esrflags & CAN_ESR_BOFF) != 0U)) + 2970 .loc 1 1999 10 is_stmt 0 view .LVU897 + 2971 013c 6305 lsls r3, r4, #21 + 2972 013e 04D5 bpl .L183 +1999:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** ((esrflags & CAN_ESR_BOFF) != 0U)) + 2973 .loc 1 1999 48 discriminator 1 view .LVU898 + 2974 0140 5B46 mov r3, fp + 2975 0142 5B07 lsls r3, r3, #29 + 2976 0144 01D5 bpl .L183 +2003:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** + 2977 .loc 1 2003 9 is_stmt 1 view .LVU899 +2003:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** + 2978 .loc 1 2003 19 is_stmt 0 view .LVU900 + 2979 0146 0423 movs r3, #4 + 2980 0148 1E43 orrs r6, r3 + 2981 .LVL226: + 2982 .L183: +2009:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** ((esrflags & CAN_ESR_LEC) != 0U)) + 2983 .loc 1 2009 7 is_stmt 1 view .LVU901 +2009:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** ((esrflags & CAN_ESR_LEC) != 0U)) + 2984 .loc 1 2009 10 is_stmt 0 view .LVU902 + 2985 014a 2405 lsls r4, r4, #20 + 2986 014c 15D5 bpl .L180 + 2987 .LVL227: +2010:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** { + 2988 .loc 1 2010 22 view .LVU903 + 2989 014e 7023 movs r3, #112 + 2990 0150 5A46 mov r2, fp + 2991 0152 1A40 ands r2, r3 +2009:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** ((esrflags & CAN_ESR_LEC) != 0U)) + 2992 .loc 1 2009 57 discriminator 1 view .LVU904 + 2993 0154 5946 mov r1, fp + 2994 0156 0B42 tst r3, r1 + 2995 0158 0FD0 beq .L180 + 2996 .LVL228: +2012:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** { + 2997 .loc 1 2012 9 is_stmt 1 view .LVU905 + 2998 015a 402A cmp r2, #64 + 2999 015c 66D0 beq .L184 + 3000 015e 57D8 bhi .L185 + 3001 0160 202A cmp r2, #32 + 3002 0162 5DD0 beq .L186 + 3003 0164 302A cmp r2, #48 + 3004 0166 5ED0 beq .L187 + 3005 0168 102A cmp r2, #16 + 3006 016a 01D1 bne .L189 +2016:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** break; + 3007 .loc 1 2016 13 view .LVU906 +2016:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** break; + 3008 .loc 1 2016 23 is_stmt 0 view .LVU907 + ARM GAS /tmp/ccftcnYc.s page 102 + + + 3009 016c 0823 movs r3, #8 + 3010 016e 1E43 orrs r6, r3 + 3011 .LVL229: +2017:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** case (CAN_ESR_LEC_1): + 3012 .loc 1 2017 13 is_stmt 1 view .LVU908 + 3013 .L189: +2043:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** } + 3014 .loc 1 2043 9 view .LVU909 + 3015 0170 2A68 ldr r2, [r5] + 3016 0172 9369 ldr r3, [r2, #24] + 3017 0174 7021 movs r1, #112 + 3018 .LVL230: +2043:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** } + 3019 .loc 1 2043 9 is_stmt 0 view .LVU910 + 3020 0176 8B43 bics r3, r1 + 3021 0178 9361 str r3, [r2, #24] + 3022 .L180: +2048:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** } + 3023 .loc 1 2048 5 is_stmt 1 view .LVU911 + 3024 017a 2B68 ldr r3, [r5] + 3025 017c 0422 movs r2, #4 + 3026 017e 5A60 str r2, [r3, #4] + 3027 .L179: +2052:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** { + 3028 .loc 1 2052 3 view .LVU912 +2052:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** { + 3029 .loc 1 2052 6 is_stmt 0 view .LVU913 + 3030 0180 002E cmp r6, #0 + 3031 0182 59D1 bne .L232 + 3032 .L160: +2066:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** + 3033 .loc 1 2066 1 view .LVU914 + 3034 @ sp needed + 3035 .LVL231: + 3036 .LVL232: + 3037 .LVL233: + 3038 .LVL234: + 3039 .LVL235: + 3040 .LVL236: +2066:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** + 3041 .loc 1 2066 1 view .LVU915 + 3042 0184 F0BC pop {r4, r5, r6, r7} + 3043 0186 BB46 mov fp, r7 + 3044 0188 B246 mov r10, r6 + 3045 018a A946 mov r9, r5 + 3046 018c A046 mov r8, r4 + 3047 018e F8BD pop {r3, r4, r5, r6, r7, pc} + 3048 .LVL237: + 3049 .L224: +1764:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** #endif /* USE_HAL_CAN_REGISTER_CALLBACKS */ + 3050 .loc 1 1764 9 is_stmt 1 view .LVU916 + 3051 0190 2800 movs r0, r5 + 3052 0192 FFF7FEFF bl HAL_CAN_TxMailbox1CompleteCallback + 3053 .LVL238: + 3054 0196 73E7 b .L164 + 3055 .L166: +1774:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** { + ARM GAS /tmp/ccftcnYc.s page 103 + + + 3056 .loc 1 1774 14 view .LVU917 +1774:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** { + 3057 .loc 1 1774 17 is_stmt 0 view .LVU918 + 3058 0198 3B05 lsls r3, r7, #20 + 3059 019a 03D5 bpl .L167 +1777:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** } + 3060 .loc 1 1777 11 is_stmt 1 view .LVU919 +1777:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** } + 3061 .loc 1 1777 21 is_stmt 0 view .LVU920 + 3062 019c 8023 movs r3, #128 + 3063 019e DB01 lsls r3, r3, #7 + 3064 01a0 1E43 orrs r6, r3 + 3065 .LVL239: +1777:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** } + 3066 .loc 1 1777 21 view .LVU921 + 3067 01a2 6DE7 b .L164 + 3068 .L167: +1787:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** #endif /* USE_HAL_CAN_REGISTER_CALLBACKS */ + 3069 .loc 1 1787 11 is_stmt 1 view .LVU922 + 3070 01a4 2800 movs r0, r5 + 3071 01a6 FFF7FEFF bl HAL_CAN_TxMailbox1AbortCallback + 3072 .LVL240: + 3073 01aa 69E7 b .L164 + 3074 .L225: +1807:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** #endif /* USE_HAL_CAN_REGISTER_CALLBACKS */ + 3075 .loc 1 1807 9 view .LVU923 + 3076 01ac 2800 movs r0, r5 + 3077 01ae FFF7FEFF bl HAL_CAN_TxMailbox2CompleteCallback + 3078 .LVL241: + 3079 01b2 74E7 b .L161 + 3080 .L169: +1817:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** { + 3081 .loc 1 1817 14 view .LVU924 +1817:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** { + 3082 .loc 1 1817 17 is_stmt 0 view .LVU925 + 3083 01b4 3F03 lsls r7, r7, #12 + 3084 01b6 03D5 bpl .L170 + 3085 .LVL242: +1820:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** } + 3086 .loc 1 1820 11 is_stmt 1 view .LVU926 +1820:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** } + 3087 .loc 1 1820 21 is_stmt 0 view .LVU927 + 3088 01b8 8023 movs r3, #128 + 3089 01ba 5B02 lsls r3, r3, #9 + 3090 01bc 1E43 orrs r6, r3 + 3091 .LVL243: +1820:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** } + 3092 .loc 1 1820 21 view .LVU928 + 3093 01be 6EE7 b .L161 + 3094 .L170: +1830:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** #endif /* USE_HAL_CAN_REGISTER_CALLBACKS */ + 3095 .loc 1 1830 11 is_stmt 1 view .LVU929 + 3096 01c0 2800 movs r0, r5 + 3097 01c2 FFF7FEFF bl HAL_CAN_TxMailbox2AbortCallback + 3098 .LVL244: + 3099 01c6 6AE7 b .L161 + 3100 .L226: + ARM GAS /tmp/ccftcnYc.s page 104 + + +1856:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** + 3101 .loc 1 1856 7 view .LVU930 + 3102 01c8 2B68 ldr r3, [r5] + 3103 01ca 0822 movs r2, #8 + 3104 01cc DA60 str r2, [r3, #12] +1864:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** #endif /* USE_HAL_CAN_REGISTER_CALLBACKS */ + 3105 .loc 1 1864 7 view .LVU931 + 3106 01ce 2800 movs r0, r5 + 3107 01d0 FFF7FEFF bl HAL_CAN_RxFifo0FullCallback + 3108 .LVL245: + 3109 01d4 74E7 b .L172 + 3110 .L227: +1881:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** #endif /* USE_HAL_CAN_REGISTER_CALLBACKS */ + 3111 .loc 1 1881 7 view .LVU932 + 3112 01d6 2800 movs r0, r5 + 3113 01d8 FFF7FEFF bl HAL_CAN_RxFifo0MsgPendingCallback + 3114 .LVL246: + 3115 01dc 77E7 b .L173 + 3116 .L228: +1905:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** + 3117 .loc 1 1905 7 view .LVU933 + 3118 01de 2B68 ldr r3, [r5] + 3119 01e0 0822 movs r2, #8 + 3120 01e2 1A61 str r2, [r3, #16] +1913:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** #endif /* USE_HAL_CAN_REGISTER_CALLBACKS */ + 3121 .loc 1 1913 7 view .LVU934 + 3122 01e4 2800 movs r0, r5 + 3123 01e6 FFF7FEFF bl HAL_CAN_RxFifo1FullCallback + 3124 .LVL247: + 3125 01ea 81E7 b .L175 + 3126 .L229: +1930:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** #endif /* USE_HAL_CAN_REGISTER_CALLBACKS */ + 3127 .loc 1 1930 7 view .LVU935 + 3128 01ec 2800 movs r0, r5 + 3129 01ee FFF7FEFF bl HAL_CAN_RxFifo1MsgPendingCallback + 3130 .LVL248: + 3131 01f2 84E7 b .L176 + 3132 .L230: +1941:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** + 3133 .loc 1 1941 7 view .LVU936 + 3134 01f4 2B68 ldr r3, [r5] + 3135 01f6 1022 movs r2, #16 + 3136 01f8 5A60 str r2, [r3, #4] +1949:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** #endif /* USE_HAL_CAN_REGISTER_CALLBACKS */ + 3137 .loc 1 1949 7 view .LVU937 + 3138 01fa 2800 movs r0, r5 + 3139 01fc FFF7FEFF bl HAL_CAN_SleepCallback + 3140 .LVL249: + 3141 0200 83E7 b .L177 + 3142 .L231: +1960:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** + 3143 .loc 1 1960 7 view .LVU938 + 3144 0202 2B68 ldr r3, [r5] + 3145 0204 0822 movs r2, #8 + 3146 0206 5A60 str r2, [r3, #4] +1968:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** #endif /* USE_HAL_CAN_REGISTER_CALLBACKS */ + 3147 .loc 1 1968 7 view .LVU939 + ARM GAS /tmp/ccftcnYc.s page 105 + + + 3148 0208 2800 movs r0, r5 + 3149 020a FFF7FEFF bl HAL_CAN_WakeUpFromRxMsgCallback + 3150 .LVL250: + 3151 020e 82E7 b .L178 + 3152 .LVL251: + 3153 .L185: +2012:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** { + 3154 .loc 1 2012 9 is_stmt 0 view .LVU940 + 3155 0210 502A cmp r2, #80 + 3156 0212 0ED0 beq .L190 + 3157 0214 602A cmp r2, #96 + 3158 0216 ABD1 bne .L189 +2036:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** break; + 3159 .loc 1 2036 13 is_stmt 1 view .LVU941 +2036:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** break; + 3160 .loc 1 2036 23 is_stmt 0 view .LVU942 + 3161 0218 8023 movs r3, #128 + 3162 021a 5B00 lsls r3, r3, #1 + 3163 021c 1E43 orrs r6, r3 + 3164 .LVL252: +2037:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** default: + 3165 .loc 1 2037 13 is_stmt 1 view .LVU943 + 3166 021e A7E7 b .L189 + 3167 .L186: +2020:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** break; + 3168 .loc 1 2020 13 view .LVU944 +2020:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** break; + 3169 .loc 1 2020 23 is_stmt 0 view .LVU945 + 3170 0220 1023 movs r3, #16 + 3171 0222 1E43 orrs r6, r3 + 3172 .LVL253: +2021:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** case (CAN_ESR_LEC_1 | CAN_ESR_LEC_0): + 3173 .loc 1 2021 13 is_stmt 1 view .LVU946 + 3174 0224 A4E7 b .L189 + 3175 .L187: +2024:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** break; + 3176 .loc 1 2024 13 view .LVU947 +2024:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** break; + 3177 .loc 1 2024 23 is_stmt 0 view .LVU948 + 3178 0226 2023 movs r3, #32 + 3179 0228 1E43 orrs r6, r3 + 3180 .LVL254: +2025:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** case (CAN_ESR_LEC_2): + 3181 .loc 1 2025 13 is_stmt 1 view .LVU949 + 3182 022a A1E7 b .L189 + 3183 .L184: +2028:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** break; + 3184 .loc 1 2028 13 view .LVU950 +2028:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** break; + 3185 .loc 1 2028 23 is_stmt 0 view .LVU951 + 3186 022c 4023 movs r3, #64 + 3187 022e 1E43 orrs r6, r3 + 3188 .LVL255: +2029:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** case (CAN_ESR_LEC_2 | CAN_ESR_LEC_0): + 3189 .loc 1 2029 13 is_stmt 1 view .LVU952 + 3190 0230 9EE7 b .L189 + 3191 .L190: + ARM GAS /tmp/ccftcnYc.s page 106 + + +2032:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** break; + 3192 .loc 1 2032 13 view .LVU953 +2032:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** break; + 3193 .loc 1 2032 23 is_stmt 0 view .LVU954 + 3194 0232 8023 movs r3, #128 + 3195 0234 1E43 orrs r6, r3 + 3196 .LVL256: +2033:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** case (CAN_ESR_LEC_2 | CAN_ESR_LEC_1): + 3197 .loc 1 2033 13 is_stmt 1 view .LVU955 + 3198 0236 9BE7 b .L189 + 3199 .LVL257: + 3200 .L232: +2055:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** + 3201 .loc 1 2055 5 view .LVU956 +2055:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** + 3202 .loc 1 2055 9 is_stmt 0 view .LVU957 + 3203 0238 6B6A ldr r3, [r5, #36] +2055:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** + 3204 .loc 1 2055 21 view .LVU958 + 3205 023a 3343 orrs r3, r6 + 3206 023c 6B62 str r3, [r5, #36] +2063:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** #endif /* USE_HAL_CAN_REGISTER_CALLBACKS */ + 3207 .loc 1 2063 5 is_stmt 1 view .LVU959 + 3208 023e 2800 movs r0, r5 + 3209 0240 FFF7FEFF bl HAL_CAN_ErrorCallback + 3210 .LVL258: +2066:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** + 3211 .loc 1 2066 1 is_stmt 0 view .LVU960 + 3212 0244 9EE7 b .L160 + 3213 .cfi_endproc + 3214 .LFE59: + 3216 .section .text.HAL_CAN_GetState,"ax",%progbits + 3217 .align 1 + 3218 .global HAL_CAN_GetState + 3219 .syntax unified + 3220 .code 16 + 3221 .thumb_func + 3223 HAL_CAN_GetState: + 3224 .LVL259: + 3225 .LFB73: +2317:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** +2318:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** /** +2319:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** * @} +2320:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** */ +2321:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** +2322:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** /** @defgroup CAN_Exported_Functions_Group6 Peripheral State and Error functions +2323:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** * @brief CAN Peripheral State functions +2324:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** * +2325:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** @verbatim +2326:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** ============================================================================== +2327:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** ##### Peripheral State and Error functions ##### +2328:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** ============================================================================== +2329:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** [..] +2330:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** This subsection provides functions allowing to : +2331:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** (+) HAL_CAN_GetState() : Return the CAN state. +2332:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** (+) HAL_CAN_GetError() : Return the CAN error codes if any. +2333:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** (+) HAL_CAN_ResetError(): Reset the CAN error codes if any. + ARM GAS /tmp/ccftcnYc.s page 107 + + +2334:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** +2335:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** @endverbatim +2336:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** * @{ +2337:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** */ +2338:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** +2339:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** /** +2340:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** * @brief Return the CAN state. +2341:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** * @param hcan pointer to a CAN_HandleTypeDef structure that contains +2342:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** * the configuration information for the specified CAN. +2343:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** * @retval HAL state +2344:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** */ +2345:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** HAL_CAN_StateTypeDef HAL_CAN_GetState(const CAN_HandleTypeDef *hcan) +2346:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** { + 3226 .loc 1 2346 1 is_stmt 1 view -0 + 3227 .cfi_startproc + 3228 @ args = 0, pretend = 0, frame = 0 + 3229 @ frame_needed = 0, uses_anonymous_args = 0 + 3230 @ link register save eliminated. + 3231 .loc 1 2346 1 is_stmt 0 view .LVU962 + 3232 0000 0200 movs r2, r0 +2347:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** HAL_CAN_StateTypeDef state = hcan->State; + 3233 .loc 1 2347 3 is_stmt 1 view .LVU963 + 3234 .loc 1 2347 24 is_stmt 0 view .LVU964 + 3235 0002 2023 movs r3, #32 + 3236 0004 C35C ldrb r3, [r0, r3] + 3237 0006 D8B2 uxtb r0, r3 + 3238 .LVL260: +2348:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** +2349:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** if ((state == HAL_CAN_STATE_READY) || + 3239 .loc 1 2349 3 is_stmt 1 view .LVU965 + 3240 .loc 1 2349 38 is_stmt 0 view .LVU966 + 3241 0008 013B subs r3, r3, #1 + 3242 000a DBB2 uxtb r3, r3 + 3243 .loc 1 2349 6 view .LVU967 + 3244 000c 012B cmp r3, #1 + 3245 000e 00D9 bls .L238 + 3246 .LVL261: + 3247 .L234: +2350:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** (state == HAL_CAN_STATE_LISTENING)) +2351:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** { +2352:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** /* Check sleep mode acknowledge flag */ +2353:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** if ((hcan->Instance->MSR & CAN_MSR_SLAK) != 0U) +2354:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** { +2355:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** /* Sleep mode is active */ +2356:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** state = HAL_CAN_STATE_SLEEP_ACTIVE; +2357:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** } +2358:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** /* Check sleep mode request flag */ +2359:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** else if ((hcan->Instance->MCR & CAN_MCR_SLEEP) != 0U) +2360:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** { +2361:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** /* Sleep mode request is pending */ +2362:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** state = HAL_CAN_STATE_SLEEP_PENDING; +2363:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** } +2364:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** else +2365:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** { +2366:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** /* Neither sleep mode request nor sleep mode acknowledge */ +2367:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** } + 3248 .loc 1 2367 5 is_stmt 1 view .LVU968 + ARM GAS /tmp/ccftcnYc.s page 108 + + +2368:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** } +2369:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** +2370:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** /* Return CAN state */ +2371:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** return state; + 3249 .loc 1 2371 3 view .LVU969 +2372:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** } + 3250 .loc 1 2372 1 is_stmt 0 view .LVU970 + 3251 @ sp needed + 3252 0010 7047 bx lr + 3253 .LVL262: + 3254 .L238: +2353:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** { + 3255 .loc 1 2353 5 is_stmt 1 view .LVU971 +2353:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** { + 3256 .loc 1 2353 14 is_stmt 0 view .LVU972 + 3257 0012 1268 ldr r2, [r2] + 3258 .LVL263: +2353:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** { + 3259 .loc 1 2353 24 view .LVU973 + 3260 0014 5368 ldr r3, [r2, #4] +2353:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** { + 3261 .loc 1 2353 8 view .LVU974 + 3262 0016 9B07 lsls r3, r3, #30 + 3263 0018 04D4 bmi .L235 +2359:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** { + 3264 .loc 1 2359 10 is_stmt 1 view .LVU975 +2359:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** { + 3265 .loc 1 2359 29 is_stmt 0 view .LVU976 + 3266 001a 1368 ldr r3, [r2] +2359:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** { + 3267 .loc 1 2359 13 view .LVU977 + 3268 001c 9B07 lsls r3, r3, #30 + 3269 001e F7D5 bpl .L234 +2362:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** } + 3270 .loc 1 2362 13 view .LVU978 + 3271 0020 0320 movs r0, #3 + 3272 .LVL264: +2362:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** } + 3273 .loc 1 2362 13 view .LVU979 + 3274 0022 F5E7 b .L234 + 3275 .LVL265: + 3276 .L235: +2356:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** } + 3277 .loc 1 2356 13 view .LVU980 + 3278 0024 0420 movs r0, #4 + 3279 .LVL266: +2356:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** } + 3280 .loc 1 2356 13 view .LVU981 + 3281 0026 F3E7 b .L234 + 3282 .cfi_endproc + 3283 .LFE73: + 3285 .section .text.HAL_CAN_GetError,"ax",%progbits + 3286 .align 1 + 3287 .global HAL_CAN_GetError + 3288 .syntax unified + 3289 .code 16 + 3290 .thumb_func + ARM GAS /tmp/ccftcnYc.s page 109 + + + 3292 HAL_CAN_GetError: + 3293 .LVL267: + 3294 .LFB74: +2373:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** +2374:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** /** +2375:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** * @brief Return the CAN error code. +2376:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** * @param hcan pointer to a CAN_HandleTypeDef structure that contains +2377:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** * the configuration information for the specified CAN. +2378:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** * @retval CAN Error Code +2379:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** */ +2380:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** uint32_t HAL_CAN_GetError(const CAN_HandleTypeDef *hcan) +2381:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** { + 3295 .loc 1 2381 1 is_stmt 1 view -0 + 3296 .cfi_startproc + 3297 @ args = 0, pretend = 0, frame = 0 + 3298 @ frame_needed = 0, uses_anonymous_args = 0 + 3299 @ link register save eliminated. +2382:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** /* Return CAN error code */ +2383:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** return hcan->ErrorCode; + 3300 .loc 1 2383 3 view .LVU983 + 3301 .loc 1 2383 14 is_stmt 0 view .LVU984 + 3302 0000 406A ldr r0, [r0, #36] + 3303 .LVL268: +2384:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** } + 3304 .loc 1 2384 1 view .LVU985 + 3305 @ sp needed + 3306 0002 7047 bx lr + 3307 .cfi_endproc + 3308 .LFE74: + 3310 .section .text.HAL_CAN_ResetError,"ax",%progbits + 3311 .align 1 + 3312 .global HAL_CAN_ResetError + 3313 .syntax unified + 3314 .code 16 + 3315 .thumb_func + 3317 HAL_CAN_ResetError: + 3318 .LVL269: + 3319 .LFB75: +2385:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** +2386:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** /** +2387:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** * @brief Reset the CAN error code. +2388:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** * @param hcan pointer to a CAN_HandleTypeDef structure that contains +2389:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** * the configuration information for the specified CAN. +2390:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** * @retval HAL status +2391:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** */ +2392:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** HAL_StatusTypeDef HAL_CAN_ResetError(CAN_HandleTypeDef *hcan) +2393:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** { + 3320 .loc 1 2393 1 is_stmt 1 view -0 + 3321 .cfi_startproc + 3322 @ args = 0, pretend = 0, frame = 0 + 3323 @ frame_needed = 0, uses_anonymous_args = 0 + 3324 @ link register save eliminated. +2394:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** HAL_StatusTypeDef status = HAL_OK; + 3325 .loc 1 2394 3 view .LVU987 +2395:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** HAL_CAN_StateTypeDef state = hcan->State; + 3326 .loc 1 2395 3 view .LVU988 + 3327 .loc 1 2395 24 is_stmt 0 view .LVU989 + ARM GAS /tmp/ccftcnYc.s page 110 + + + 3328 0000 2023 movs r3, #32 + 3329 0002 C35C ldrb r3, [r0, r3] + 3330 .LVL270: +2396:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** +2397:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** if ((state == HAL_CAN_STATE_READY) || + 3331 .loc 1 2397 3 is_stmt 1 view .LVU990 + 3332 .loc 1 2397 38 is_stmt 0 view .LVU991 + 3333 0004 013B subs r3, r3, #1 + 3334 .LVL271: + 3335 .loc 1 2397 38 view .LVU992 + 3336 0006 DBB2 uxtb r3, r3 + 3337 .LVL272: + 3338 .loc 1 2397 6 view .LVU993 + 3339 0008 012B cmp r3, #1 + 3340 000a 06D9 bls .L243 +2398:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** (state == HAL_CAN_STATE_LISTENING)) +2399:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** { +2400:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** /* Reset CAN error code */ +2401:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** hcan->ErrorCode = 0U; +2402:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** } +2403:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** else +2404:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** { +2405:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** /* Update error code */ +2406:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** hcan->ErrorCode |= HAL_CAN_ERROR_NOT_INITIALIZED; + 3341 .loc 1 2406 5 is_stmt 1 view .LVU994 + 3342 .loc 1 2406 9 is_stmt 0 view .LVU995 + 3343 000c 426A ldr r2, [r0, #36] + 3344 .loc 1 2406 21 view .LVU996 + 3345 000e 8023 movs r3, #128 + 3346 0010 DB02 lsls r3, r3, #11 + 3347 0012 1343 orrs r3, r2 + 3348 0014 4362 str r3, [r0, #36] +2407:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** +2408:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** status = HAL_ERROR; + 3349 .loc 1 2408 5 is_stmt 1 view .LVU997 + 3350 .LVL273: + 3351 .loc 1 2408 12 is_stmt 0 view .LVU998 + 3352 0016 0120 movs r0, #1 + 3353 .LVL274: + 3354 .L242: +2409:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** } +2410:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** +2411:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** /* Return the status */ +2412:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** return status; + 3355 .loc 1 2412 3 is_stmt 1 view .LVU999 +2413:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** } + 3356 .loc 1 2413 1 is_stmt 0 view .LVU1000 + 3357 @ sp needed + 3358 0018 7047 bx lr + 3359 .LVL275: + 3360 .L243: +2401:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** } + 3361 .loc 1 2401 5 is_stmt 1 view .LVU1001 +2401:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** } + 3362 .loc 1 2401 21 is_stmt 0 view .LVU1002 + 3363 001a 0023 movs r3, #0 + 3364 001c 4362 str r3, [r0, #36] + ARM GAS /tmp/ccftcnYc.s page 111 + + +2394:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** HAL_CAN_StateTypeDef state = hcan->State; + 3365 .loc 1 2394 21 view .LVU1003 + 3366 001e 0020 movs r0, #0 + 3367 .LVL276: +2394:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c **** HAL_CAN_StateTypeDef state = hcan->State; + 3368 .loc 1 2394 21 view .LVU1004 + 3369 0020 FAE7 b .L242 + 3370 .cfi_endproc + 3371 .LFE75: + 3373 .text + 3374 .Letext0: + 3375 .file 2 "/home/chiangni/.config/VSCodium/User/globalStorage/bmd.stm32-for-vscode/@xpack-dev-tools/ + 3376 .file 3 "/home/chiangni/.config/VSCodium/User/globalStorage/bmd.stm32-for-vscode/@xpack-dev-tools/ + 3377 .file 4 "Drivers/CMSIS/Device/ST/STM32F0xx/Include/stm32f042x6.h" + 3378 .file 5 "Drivers/CMSIS/Device/ST/STM32F0xx/Include/stm32f0xx.h" + 3379 .file 6 "Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_def.h" + 3380 .file 7 "Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_can.h" + 3381 .file 8 "Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal.h" + ARM GAS /tmp/ccftcnYc.s page 112 + + +DEFINED SYMBOLS + *ABS*:00000000 stm32f0xx_hal_can.c + /tmp/ccftcnYc.s:19 .text.HAL_CAN_MspInit:00000000 $t + /tmp/ccftcnYc.s:25 .text.HAL_CAN_MspInit:00000000 HAL_CAN_MspInit + /tmp/ccftcnYc.s:41 .text.HAL_CAN_Init:00000000 $t + /tmp/ccftcnYc.s:47 .text.HAL_CAN_Init:00000000 HAL_CAN_Init + /tmp/ccftcnYc.s:361 .text.HAL_CAN_MspDeInit:00000000 $t + /tmp/ccftcnYc.s:367 .text.HAL_CAN_MspDeInit:00000000 HAL_CAN_MspDeInit + /tmp/ccftcnYc.s:383 .text.HAL_CAN_ConfigFilter:00000000 $t + /tmp/ccftcnYc.s:389 .text.HAL_CAN_ConfigFilter:00000000 HAL_CAN_ConfigFilter + /tmp/ccftcnYc.s:655 .text.HAL_CAN_Start:00000000 $t + /tmp/ccftcnYc.s:661 .text.HAL_CAN_Start:00000000 HAL_CAN_Start + /tmp/ccftcnYc.s:772 .text.HAL_CAN_Stop:00000000 $t + /tmp/ccftcnYc.s:778 .text.HAL_CAN_Stop:00000000 HAL_CAN_Stop + /tmp/ccftcnYc.s:889 .text.HAL_CAN_DeInit:00000000 $t + /tmp/ccftcnYc.s:895 .text.HAL_CAN_DeInit:00000000 HAL_CAN_DeInit + /tmp/ccftcnYc.s:955 .text.HAL_CAN_RequestSleep:00000000 $t + /tmp/ccftcnYc.s:961 .text.HAL_CAN_RequestSleep:00000000 HAL_CAN_RequestSleep + /tmp/ccftcnYc.s:1018 .text.HAL_CAN_WakeUp:00000000 $t + /tmp/ccftcnYc.s:1024 .text.HAL_CAN_WakeUp:00000000 HAL_CAN_WakeUp + /tmp/ccftcnYc.s:1127 .text.HAL_CAN_WakeUp:00000054 $d + /tmp/ccftcnYc.s:1132 .text.HAL_CAN_IsSleepActive:00000000 $t + /tmp/ccftcnYc.s:1138 .text.HAL_CAN_IsSleepActive:00000000 HAL_CAN_IsSleepActive + /tmp/ccftcnYc.s:1195 .text.HAL_CAN_AddTxMessage:00000000 $t + /tmp/ccftcnYc.s:1201 .text.HAL_CAN_AddTxMessage:00000000 HAL_CAN_AddTxMessage + /tmp/ccftcnYc.s:1438 .text.HAL_CAN_AbortTxRequest:00000000 $t + /tmp/ccftcnYc.s:1444 .text.HAL_CAN_AbortTxRequest:00000000 HAL_CAN_AbortTxRequest + /tmp/ccftcnYc.s:1536 .text.HAL_CAN_GetTxMailboxesFreeLevel:00000000 $t + /tmp/ccftcnYc.s:1542 .text.HAL_CAN_GetTxMailboxesFreeLevel:00000000 HAL_CAN_GetTxMailboxesFreeLevel + /tmp/ccftcnYc.s:1622 .text.HAL_CAN_IsTxMessagePending:00000000 $t + /tmp/ccftcnYc.s:1628 .text.HAL_CAN_IsTxMessagePending:00000000 HAL_CAN_IsTxMessagePending + /tmp/ccftcnYc.s:1692 .text.HAL_CAN_GetTxTimestamp:00000000 $t + /tmp/ccftcnYc.s:1698 .text.HAL_CAN_GetTxTimestamp:00000000 HAL_CAN_GetTxTimestamp + /tmp/ccftcnYc.s:1777 .text.HAL_CAN_GetRxMessage:00000000 $t + /tmp/ccftcnYc.s:1783 .text.HAL_CAN_GetRxMessage:00000000 HAL_CAN_GetRxMessage + /tmp/ccftcnYc.s:2138 .text.HAL_CAN_GetRxFifoFillLevel:00000000 $t + /tmp/ccftcnYc.s:2144 .text.HAL_CAN_GetRxFifoFillLevel:00000000 HAL_CAN_GetRxFifoFillLevel + /tmp/ccftcnYc.s:2215 .text.HAL_CAN_ActivateNotification:00000000 $t + /tmp/ccftcnYc.s:2221 .text.HAL_CAN_ActivateNotification:00000000 HAL_CAN_ActivateNotification + /tmp/ccftcnYc.s:2278 .text.HAL_CAN_DeactivateNotification:00000000 $t + /tmp/ccftcnYc.s:2284 .text.HAL_CAN_DeactivateNotification:00000000 HAL_CAN_DeactivateNotification + /tmp/ccftcnYc.s:2341 .text.HAL_CAN_TxMailbox0CompleteCallback:00000000 $t + /tmp/ccftcnYc.s:2347 .text.HAL_CAN_TxMailbox0CompleteCallback:00000000 HAL_CAN_TxMailbox0CompleteCallback + /tmp/ccftcnYc.s:2363 .text.HAL_CAN_TxMailbox1CompleteCallback:00000000 $t + /tmp/ccftcnYc.s:2369 .text.HAL_CAN_TxMailbox1CompleteCallback:00000000 HAL_CAN_TxMailbox1CompleteCallback + /tmp/ccftcnYc.s:2385 .text.HAL_CAN_TxMailbox2CompleteCallback:00000000 $t + /tmp/ccftcnYc.s:2391 .text.HAL_CAN_TxMailbox2CompleteCallback:00000000 HAL_CAN_TxMailbox2CompleteCallback + /tmp/ccftcnYc.s:2407 .text.HAL_CAN_TxMailbox0AbortCallback:00000000 $t + /tmp/ccftcnYc.s:2413 .text.HAL_CAN_TxMailbox0AbortCallback:00000000 HAL_CAN_TxMailbox0AbortCallback + /tmp/ccftcnYc.s:2429 .text.HAL_CAN_TxMailbox1AbortCallback:00000000 $t + /tmp/ccftcnYc.s:2435 .text.HAL_CAN_TxMailbox1AbortCallback:00000000 HAL_CAN_TxMailbox1AbortCallback + /tmp/ccftcnYc.s:2451 .text.HAL_CAN_TxMailbox2AbortCallback:00000000 $t + /tmp/ccftcnYc.s:2457 .text.HAL_CAN_TxMailbox2AbortCallback:00000000 HAL_CAN_TxMailbox2AbortCallback + /tmp/ccftcnYc.s:2473 .text.HAL_CAN_RxFifo0MsgPendingCallback:00000000 $t + /tmp/ccftcnYc.s:2479 .text.HAL_CAN_RxFifo0MsgPendingCallback:00000000 HAL_CAN_RxFifo0MsgPendingCallback + /tmp/ccftcnYc.s:2495 .text.HAL_CAN_RxFifo0FullCallback:00000000 $t + /tmp/ccftcnYc.s:2501 .text.HAL_CAN_RxFifo0FullCallback:00000000 HAL_CAN_RxFifo0FullCallback + ARM GAS /tmp/ccftcnYc.s page 113 + + + /tmp/ccftcnYc.s:2517 .text.HAL_CAN_RxFifo1MsgPendingCallback:00000000 $t + /tmp/ccftcnYc.s:2523 .text.HAL_CAN_RxFifo1MsgPendingCallback:00000000 HAL_CAN_RxFifo1MsgPendingCallback + /tmp/ccftcnYc.s:2539 .text.HAL_CAN_RxFifo1FullCallback:00000000 $t + /tmp/ccftcnYc.s:2545 .text.HAL_CAN_RxFifo1FullCallback:00000000 HAL_CAN_RxFifo1FullCallback + /tmp/ccftcnYc.s:2561 .text.HAL_CAN_SleepCallback:00000000 $t + /tmp/ccftcnYc.s:2567 .text.HAL_CAN_SleepCallback:00000000 HAL_CAN_SleepCallback + /tmp/ccftcnYc.s:2583 .text.HAL_CAN_WakeUpFromRxMsgCallback:00000000 $t + /tmp/ccftcnYc.s:2589 .text.HAL_CAN_WakeUpFromRxMsgCallback:00000000 HAL_CAN_WakeUpFromRxMsgCallback + /tmp/ccftcnYc.s:2605 .text.HAL_CAN_ErrorCallback:00000000 $t + /tmp/ccftcnYc.s:2611 .text.HAL_CAN_ErrorCallback:00000000 HAL_CAN_ErrorCallback + /tmp/ccftcnYc.s:2627 .text.HAL_CAN_IRQHandler:00000000 $t + /tmp/ccftcnYc.s:2633 .text.HAL_CAN_IRQHandler:00000000 HAL_CAN_IRQHandler + /tmp/ccftcnYc.s:3217 .text.HAL_CAN_GetState:00000000 $t + /tmp/ccftcnYc.s:3223 .text.HAL_CAN_GetState:00000000 HAL_CAN_GetState + /tmp/ccftcnYc.s:3286 .text.HAL_CAN_GetError:00000000 $t + /tmp/ccftcnYc.s:3292 .text.HAL_CAN_GetError:00000000 HAL_CAN_GetError + /tmp/ccftcnYc.s:3311 .text.HAL_CAN_ResetError:00000000 $t + /tmp/ccftcnYc.s:3317 .text.HAL_CAN_ResetError:00000000 HAL_CAN_ResetError + +UNDEFINED SYMBOLS +HAL_GetTick diff --git a/Software/build/stm32f0xx_hal_can.o b/Software/build/stm32f0xx_hal_can.o new file mode 100644 index 0000000..ee14ce7 Binary files /dev/null and b/Software/build/stm32f0xx_hal_can.o differ diff --git a/Software/build/stm32f0xx_hal_cortex.d b/Software/build/stm32f0xx_hal_cortex.d new file mode 100644 index 0000000..6745aa8 --- /dev/null +++ b/Software/build/stm32f0xx_hal_cortex.d @@ -0,0 +1,60 @@ +build/stm32f0xx_hal_cortex.o: \ + Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_cortex.c \ + Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal.h \ + Core/Inc/stm32f0xx_hal_conf.h \ + Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_rcc.h \ + Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_def.h \ + Drivers/CMSIS/Device/ST/STM32F0xx/Include/stm32f0xx.h \ + Drivers/CMSIS/Device/ST/STM32F0xx/Include/stm32f042x6.h \ + Drivers/CMSIS/Include/core_cm0.h Drivers/CMSIS/Include/cmsis_version.h \ + Drivers/CMSIS/Include/cmsis_compiler.h Drivers/CMSIS/Include/cmsis_gcc.h \ + Drivers/CMSIS/Device/ST/STM32F0xx/Include/system_stm32f0xx.h \ + Drivers/STM32F0xx_HAL_Driver/Inc/Legacy/stm32_hal_legacy.h \ + Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_rcc_ex.h \ + Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_gpio.h \ + Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_gpio_ex.h \ + Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_exti.h \ + Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_dma.h \ + Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_dma_ex.h \ + Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_cortex.h \ + Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_adc.h \ + Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_adc_ex.h \ + Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_can.h \ + Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_flash.h \ + Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_flash_ex.h \ + Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_i2c.h \ + Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_i2c_ex.h \ + Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_pwr.h \ + Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_pwr_ex.h \ + Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_tim.h \ + Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_tim_ex.h +Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal.h: +Core/Inc/stm32f0xx_hal_conf.h: +Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_rcc.h: +Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_def.h: +Drivers/CMSIS/Device/ST/STM32F0xx/Include/stm32f0xx.h: +Drivers/CMSIS/Device/ST/STM32F0xx/Include/stm32f042x6.h: +Drivers/CMSIS/Include/core_cm0.h: +Drivers/CMSIS/Include/cmsis_version.h: +Drivers/CMSIS/Include/cmsis_compiler.h: +Drivers/CMSIS/Include/cmsis_gcc.h: +Drivers/CMSIS/Device/ST/STM32F0xx/Include/system_stm32f0xx.h: +Drivers/STM32F0xx_HAL_Driver/Inc/Legacy/stm32_hal_legacy.h: +Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_rcc_ex.h: +Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_gpio.h: +Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_gpio_ex.h: +Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_exti.h: +Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_dma.h: +Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_dma_ex.h: +Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_cortex.h: +Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_adc.h: +Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_adc_ex.h: +Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_can.h: +Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_flash.h: +Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_flash_ex.h: +Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_i2c.h: +Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_i2c_ex.h: +Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_pwr.h: +Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_pwr_ex.h: +Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_tim.h: +Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_tim_ex.h: diff --git a/Software/build/stm32f0xx_hal_cortex.lst b/Software/build/stm32f0xx_hal_cortex.lst new file mode 100644 index 0000000..023f159 --- /dev/null +++ b/Software/build/stm32f0xx_hal_cortex.lst @@ -0,0 +1,3264 @@ +ARM GAS /tmp/ccDOWgYG.s page 1 + + + 1 .cpu cortex-m0 + 2 .arch armv6s-m + 3 .fpu softvfp + 4 .eabi_attribute 20, 1 + 5 .eabi_attribute 21, 1 + 6 .eabi_attribute 23, 3 + 7 .eabi_attribute 24, 1 + 8 .eabi_attribute 25, 1 + 9 .eabi_attribute 26, 1 + 10 .eabi_attribute 30, 1 + 11 .eabi_attribute 34, 0 + 12 .eabi_attribute 18, 4 + 13 .file "stm32f0xx_hal_cortex.c" + 14 .text + 15 .Ltext0: + 16 .cfi_sections .debug_frame + 17 .file 1 "Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_cortex.c" + 18 .section .text.__NVIC_SetPriority,"ax",%progbits + 19 .align 1 + 20 .syntax unified + 21 .code 16 + 22 .thumb_func + 24 __NVIC_SetPriority: + 25 .LVL0: + 26 .LFB31: + 27 .file 2 "Drivers/CMSIS/Include/core_cm0.h" + 1:Drivers/CMSIS/Include/core_cm0.h **** /**************************************************************************//** + 2:Drivers/CMSIS/Include/core_cm0.h **** * @file core_cm0.h + 3:Drivers/CMSIS/Include/core_cm0.h **** * @brief CMSIS Cortex-M0 Core Peripheral Access Layer Header File + 4:Drivers/CMSIS/Include/core_cm0.h **** * @version V5.0.5 + 5:Drivers/CMSIS/Include/core_cm0.h **** * @date 28. May 2018 + 6:Drivers/CMSIS/Include/core_cm0.h **** ******************************************************************************/ + 7:Drivers/CMSIS/Include/core_cm0.h **** /* + 8:Drivers/CMSIS/Include/core_cm0.h **** * Copyright (c) 2009-2018 Arm Limited. All rights reserved. + 9:Drivers/CMSIS/Include/core_cm0.h **** * + 10:Drivers/CMSIS/Include/core_cm0.h **** * SPDX-License-Identifier: Apache-2.0 + 11:Drivers/CMSIS/Include/core_cm0.h **** * + 12:Drivers/CMSIS/Include/core_cm0.h **** * Licensed under the Apache License, Version 2.0 (the License); you may + 13:Drivers/CMSIS/Include/core_cm0.h **** * not use this file except in compliance with the License. + 14:Drivers/CMSIS/Include/core_cm0.h **** * You may obtain a copy of the License at + 15:Drivers/CMSIS/Include/core_cm0.h **** * + 16:Drivers/CMSIS/Include/core_cm0.h **** * www.apache.org/licenses/LICENSE-2.0 + 17:Drivers/CMSIS/Include/core_cm0.h **** * + 18:Drivers/CMSIS/Include/core_cm0.h **** * Unless required by applicable law or agreed to in writing, software + 19:Drivers/CMSIS/Include/core_cm0.h **** * distributed under the License is distributed on an AS IS BASIS, WITHOUT + 20:Drivers/CMSIS/Include/core_cm0.h **** * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. + 21:Drivers/CMSIS/Include/core_cm0.h **** * See the License for the specific language governing permissions and + 22:Drivers/CMSIS/Include/core_cm0.h **** * limitations under the License. + 23:Drivers/CMSIS/Include/core_cm0.h **** */ + 24:Drivers/CMSIS/Include/core_cm0.h **** + 25:Drivers/CMSIS/Include/core_cm0.h **** #if defined ( __ICCARM__ ) + 26:Drivers/CMSIS/Include/core_cm0.h **** #pragma system_include /* treat file as system include file for MISRA check */ + 27:Drivers/CMSIS/Include/core_cm0.h **** #elif defined (__clang__) + 28:Drivers/CMSIS/Include/core_cm0.h **** #pragma clang system_header /* treat file as system include file */ + 29:Drivers/CMSIS/Include/core_cm0.h **** #endif + 30:Drivers/CMSIS/Include/core_cm0.h **** + 31:Drivers/CMSIS/Include/core_cm0.h **** #ifndef __CORE_CM0_H_GENERIC + ARM GAS /tmp/ccDOWgYG.s page 2 + + + 32:Drivers/CMSIS/Include/core_cm0.h **** #define __CORE_CM0_H_GENERIC + 33:Drivers/CMSIS/Include/core_cm0.h **** + 34:Drivers/CMSIS/Include/core_cm0.h **** #include + 35:Drivers/CMSIS/Include/core_cm0.h **** + 36:Drivers/CMSIS/Include/core_cm0.h **** #ifdef __cplusplus + 37:Drivers/CMSIS/Include/core_cm0.h **** extern "C" { + 38:Drivers/CMSIS/Include/core_cm0.h **** #endif + 39:Drivers/CMSIS/Include/core_cm0.h **** + 40:Drivers/CMSIS/Include/core_cm0.h **** /** + 41:Drivers/CMSIS/Include/core_cm0.h **** \page CMSIS_MISRA_Exceptions MISRA-C:2004 Compliance Exceptions + 42:Drivers/CMSIS/Include/core_cm0.h **** CMSIS violates the following MISRA-C:2004 rules: + 43:Drivers/CMSIS/Include/core_cm0.h **** + 44:Drivers/CMSIS/Include/core_cm0.h **** \li Required Rule 8.5, object/function definition in header file.
+ 45:Drivers/CMSIS/Include/core_cm0.h **** Function definitions in header files are used to allow 'inlining'. + 46:Drivers/CMSIS/Include/core_cm0.h **** + 47:Drivers/CMSIS/Include/core_cm0.h **** \li Required Rule 18.4, declaration of union type or object of union type: '{...}'.
+ 48:Drivers/CMSIS/Include/core_cm0.h **** Unions are used for effective representation of core registers. + 49:Drivers/CMSIS/Include/core_cm0.h **** + 50:Drivers/CMSIS/Include/core_cm0.h **** \li Advisory Rule 19.7, Function-like macro defined.
+ 51:Drivers/CMSIS/Include/core_cm0.h **** Function-like macros are used to allow more efficient code. + 52:Drivers/CMSIS/Include/core_cm0.h **** */ + 53:Drivers/CMSIS/Include/core_cm0.h **** + 54:Drivers/CMSIS/Include/core_cm0.h **** + 55:Drivers/CMSIS/Include/core_cm0.h **** /******************************************************************************* + 56:Drivers/CMSIS/Include/core_cm0.h **** * CMSIS definitions + 57:Drivers/CMSIS/Include/core_cm0.h **** ******************************************************************************/ + 58:Drivers/CMSIS/Include/core_cm0.h **** /** + 59:Drivers/CMSIS/Include/core_cm0.h **** \ingroup Cortex_M0 + 60:Drivers/CMSIS/Include/core_cm0.h **** @{ + 61:Drivers/CMSIS/Include/core_cm0.h **** */ + 62:Drivers/CMSIS/Include/core_cm0.h **** + 63:Drivers/CMSIS/Include/core_cm0.h **** #include "cmsis_version.h" + 64:Drivers/CMSIS/Include/core_cm0.h **** + 65:Drivers/CMSIS/Include/core_cm0.h **** /* CMSIS CM0 definitions */ + 66:Drivers/CMSIS/Include/core_cm0.h **** #define __CM0_CMSIS_VERSION_MAIN (__CM_CMSIS_VERSION_MAIN) /*!< \deprecated [31:16] C + 67:Drivers/CMSIS/Include/core_cm0.h **** #define __CM0_CMSIS_VERSION_SUB (__CM_CMSIS_VERSION_SUB) /*!< \deprecated [15:0] C + 68:Drivers/CMSIS/Include/core_cm0.h **** #define __CM0_CMSIS_VERSION ((__CM0_CMSIS_VERSION_MAIN << 16U) | \ + 69:Drivers/CMSIS/Include/core_cm0.h **** __CM0_CMSIS_VERSION_SUB ) /*!< \deprecated CMSIS HAL + 70:Drivers/CMSIS/Include/core_cm0.h **** + 71:Drivers/CMSIS/Include/core_cm0.h **** #define __CORTEX_M (0U) /*!< Cortex-M Core */ + 72:Drivers/CMSIS/Include/core_cm0.h **** + 73:Drivers/CMSIS/Include/core_cm0.h **** /** __FPU_USED indicates whether an FPU is used or not. + 74:Drivers/CMSIS/Include/core_cm0.h **** This core does not support an FPU at all + 75:Drivers/CMSIS/Include/core_cm0.h **** */ + 76:Drivers/CMSIS/Include/core_cm0.h **** #define __FPU_USED 0U + 77:Drivers/CMSIS/Include/core_cm0.h **** + 78:Drivers/CMSIS/Include/core_cm0.h **** #if defined ( __CC_ARM ) + 79:Drivers/CMSIS/Include/core_cm0.h **** #if defined __TARGET_FPU_VFP + 80:Drivers/CMSIS/Include/core_cm0.h **** #error "Compiler generates FPU instructions for a device without an FPU (check __FPU_PRESENT)" + 81:Drivers/CMSIS/Include/core_cm0.h **** #endif + 82:Drivers/CMSIS/Include/core_cm0.h **** + 83:Drivers/CMSIS/Include/core_cm0.h **** #elif defined (__ARMCC_VERSION) && (__ARMCC_VERSION >= 6010050) + 84:Drivers/CMSIS/Include/core_cm0.h **** #if defined __ARM_PCS_VFP + 85:Drivers/CMSIS/Include/core_cm0.h **** #error "Compiler generates FPU instructions for a device without an FPU (check __FPU_PRESENT)" + 86:Drivers/CMSIS/Include/core_cm0.h **** #endif + 87:Drivers/CMSIS/Include/core_cm0.h **** + 88:Drivers/CMSIS/Include/core_cm0.h **** #elif defined ( __GNUC__ ) + ARM GAS /tmp/ccDOWgYG.s page 3 + + + 89:Drivers/CMSIS/Include/core_cm0.h **** #if defined (__VFP_FP__) && !defined(__SOFTFP__) + 90:Drivers/CMSIS/Include/core_cm0.h **** #error "Compiler generates FPU instructions for a device without an FPU (check __FPU_PRESENT)" + 91:Drivers/CMSIS/Include/core_cm0.h **** #endif + 92:Drivers/CMSIS/Include/core_cm0.h **** + 93:Drivers/CMSIS/Include/core_cm0.h **** #elif defined ( __ICCARM__ ) + 94:Drivers/CMSIS/Include/core_cm0.h **** #if defined __ARMVFP__ + 95:Drivers/CMSIS/Include/core_cm0.h **** #error "Compiler generates FPU instructions for a device without an FPU (check __FPU_PRESENT)" + 96:Drivers/CMSIS/Include/core_cm0.h **** #endif + 97:Drivers/CMSIS/Include/core_cm0.h **** + 98:Drivers/CMSIS/Include/core_cm0.h **** #elif defined ( __TI_ARM__ ) + 99:Drivers/CMSIS/Include/core_cm0.h **** #if defined __TI_VFP_SUPPORT__ + 100:Drivers/CMSIS/Include/core_cm0.h **** #error "Compiler generates FPU instructions for a device without an FPU (check __FPU_PRESENT)" + 101:Drivers/CMSIS/Include/core_cm0.h **** #endif + 102:Drivers/CMSIS/Include/core_cm0.h **** + 103:Drivers/CMSIS/Include/core_cm0.h **** #elif defined ( __TASKING__ ) + 104:Drivers/CMSIS/Include/core_cm0.h **** #if defined __FPU_VFP__ + 105:Drivers/CMSIS/Include/core_cm0.h **** #error "Compiler generates FPU instructions for a device without an FPU (check __FPU_PRESENT)" + 106:Drivers/CMSIS/Include/core_cm0.h **** #endif + 107:Drivers/CMSIS/Include/core_cm0.h **** + 108:Drivers/CMSIS/Include/core_cm0.h **** #elif defined ( __CSMC__ ) + 109:Drivers/CMSIS/Include/core_cm0.h **** #if ( __CSMC__ & 0x400U) + 110:Drivers/CMSIS/Include/core_cm0.h **** #error "Compiler generates FPU instructions for a device without an FPU (check __FPU_PRESENT)" + 111:Drivers/CMSIS/Include/core_cm0.h **** #endif + 112:Drivers/CMSIS/Include/core_cm0.h **** + 113:Drivers/CMSIS/Include/core_cm0.h **** #endif + 114:Drivers/CMSIS/Include/core_cm0.h **** + 115:Drivers/CMSIS/Include/core_cm0.h **** #include "cmsis_compiler.h" /* CMSIS compiler specific defines */ + 116:Drivers/CMSIS/Include/core_cm0.h **** + 117:Drivers/CMSIS/Include/core_cm0.h **** + 118:Drivers/CMSIS/Include/core_cm0.h **** #ifdef __cplusplus + 119:Drivers/CMSIS/Include/core_cm0.h **** } + 120:Drivers/CMSIS/Include/core_cm0.h **** #endif + 121:Drivers/CMSIS/Include/core_cm0.h **** + 122:Drivers/CMSIS/Include/core_cm0.h **** #endif /* __CORE_CM0_H_GENERIC */ + 123:Drivers/CMSIS/Include/core_cm0.h **** + 124:Drivers/CMSIS/Include/core_cm0.h **** #ifndef __CMSIS_GENERIC + 125:Drivers/CMSIS/Include/core_cm0.h **** + 126:Drivers/CMSIS/Include/core_cm0.h **** #ifndef __CORE_CM0_H_DEPENDANT + 127:Drivers/CMSIS/Include/core_cm0.h **** #define __CORE_CM0_H_DEPENDANT + 128:Drivers/CMSIS/Include/core_cm0.h **** + 129:Drivers/CMSIS/Include/core_cm0.h **** #ifdef __cplusplus + 130:Drivers/CMSIS/Include/core_cm0.h **** extern "C" { + 131:Drivers/CMSIS/Include/core_cm0.h **** #endif + 132:Drivers/CMSIS/Include/core_cm0.h **** + 133:Drivers/CMSIS/Include/core_cm0.h **** /* check device defines and use defaults */ + 134:Drivers/CMSIS/Include/core_cm0.h **** #if defined __CHECK_DEVICE_DEFINES + 135:Drivers/CMSIS/Include/core_cm0.h **** #ifndef __CM0_REV + 136:Drivers/CMSIS/Include/core_cm0.h **** #define __CM0_REV 0x0000U + 137:Drivers/CMSIS/Include/core_cm0.h **** #warning "__CM0_REV not defined in device header file; using default!" + 138:Drivers/CMSIS/Include/core_cm0.h **** #endif + 139:Drivers/CMSIS/Include/core_cm0.h **** + 140:Drivers/CMSIS/Include/core_cm0.h **** #ifndef __NVIC_PRIO_BITS + 141:Drivers/CMSIS/Include/core_cm0.h **** #define __NVIC_PRIO_BITS 2U + 142:Drivers/CMSIS/Include/core_cm0.h **** #warning "__NVIC_PRIO_BITS not defined in device header file; using default!" + 143:Drivers/CMSIS/Include/core_cm0.h **** #endif + 144:Drivers/CMSIS/Include/core_cm0.h **** + 145:Drivers/CMSIS/Include/core_cm0.h **** #ifndef __Vendor_SysTickConfig + ARM GAS /tmp/ccDOWgYG.s page 4 + + + 146:Drivers/CMSIS/Include/core_cm0.h **** #define __Vendor_SysTickConfig 0U + 147:Drivers/CMSIS/Include/core_cm0.h **** #warning "__Vendor_SysTickConfig not defined in device header file; using default!" + 148:Drivers/CMSIS/Include/core_cm0.h **** #endif + 149:Drivers/CMSIS/Include/core_cm0.h **** #endif + 150:Drivers/CMSIS/Include/core_cm0.h **** + 151:Drivers/CMSIS/Include/core_cm0.h **** /* IO definitions (access restrictions to peripheral registers) */ + 152:Drivers/CMSIS/Include/core_cm0.h **** /** + 153:Drivers/CMSIS/Include/core_cm0.h **** \defgroup CMSIS_glob_defs CMSIS Global Defines + 154:Drivers/CMSIS/Include/core_cm0.h **** + 155:Drivers/CMSIS/Include/core_cm0.h **** IO Type Qualifiers are used + 156:Drivers/CMSIS/Include/core_cm0.h **** \li to specify the access to peripheral variables. + 157:Drivers/CMSIS/Include/core_cm0.h **** \li for automatic generation of peripheral register debug information. + 158:Drivers/CMSIS/Include/core_cm0.h **** */ + 159:Drivers/CMSIS/Include/core_cm0.h **** #ifdef __cplusplus + 160:Drivers/CMSIS/Include/core_cm0.h **** #define __I volatile /*!< Defines 'read only' permissions */ + 161:Drivers/CMSIS/Include/core_cm0.h **** #else + 162:Drivers/CMSIS/Include/core_cm0.h **** #define __I volatile const /*!< Defines 'read only' permissions */ + 163:Drivers/CMSIS/Include/core_cm0.h **** #endif + 164:Drivers/CMSIS/Include/core_cm0.h **** #define __O volatile /*!< Defines 'write only' permissions */ + 165:Drivers/CMSIS/Include/core_cm0.h **** #define __IO volatile /*!< Defines 'read / write' permissions */ + 166:Drivers/CMSIS/Include/core_cm0.h **** + 167:Drivers/CMSIS/Include/core_cm0.h **** /* following defines should be used for structure members */ + 168:Drivers/CMSIS/Include/core_cm0.h **** #define __IM volatile const /*! Defines 'read only' structure member permissions */ + 169:Drivers/CMSIS/Include/core_cm0.h **** #define __OM volatile /*! Defines 'write only' structure member permissions */ + 170:Drivers/CMSIS/Include/core_cm0.h **** #define __IOM volatile /*! Defines 'read / write' structure member permissions */ + 171:Drivers/CMSIS/Include/core_cm0.h **** + 172:Drivers/CMSIS/Include/core_cm0.h **** /*@} end of group Cortex_M0 */ + 173:Drivers/CMSIS/Include/core_cm0.h **** + 174:Drivers/CMSIS/Include/core_cm0.h **** + 175:Drivers/CMSIS/Include/core_cm0.h **** + 176:Drivers/CMSIS/Include/core_cm0.h **** /******************************************************************************* + 177:Drivers/CMSIS/Include/core_cm0.h **** * Register Abstraction + 178:Drivers/CMSIS/Include/core_cm0.h **** Core Register contain: + 179:Drivers/CMSIS/Include/core_cm0.h **** - Core Register + 180:Drivers/CMSIS/Include/core_cm0.h **** - Core NVIC Register + 181:Drivers/CMSIS/Include/core_cm0.h **** - Core SCB Register + 182:Drivers/CMSIS/Include/core_cm0.h **** - Core SysTick Register + 183:Drivers/CMSIS/Include/core_cm0.h **** ******************************************************************************/ + 184:Drivers/CMSIS/Include/core_cm0.h **** /** + 185:Drivers/CMSIS/Include/core_cm0.h **** \defgroup CMSIS_core_register Defines and Type Definitions + 186:Drivers/CMSIS/Include/core_cm0.h **** \brief Type definitions and defines for Cortex-M processor based devices. + 187:Drivers/CMSIS/Include/core_cm0.h **** */ + 188:Drivers/CMSIS/Include/core_cm0.h **** + 189:Drivers/CMSIS/Include/core_cm0.h **** /** + 190:Drivers/CMSIS/Include/core_cm0.h **** \ingroup CMSIS_core_register + 191:Drivers/CMSIS/Include/core_cm0.h **** \defgroup CMSIS_CORE Status and Control Registers + 192:Drivers/CMSIS/Include/core_cm0.h **** \brief Core Register type definitions. + 193:Drivers/CMSIS/Include/core_cm0.h **** @{ + 194:Drivers/CMSIS/Include/core_cm0.h **** */ + 195:Drivers/CMSIS/Include/core_cm0.h **** + 196:Drivers/CMSIS/Include/core_cm0.h **** /** + 197:Drivers/CMSIS/Include/core_cm0.h **** \brief Union type to access the Application Program Status Register (APSR). + 198:Drivers/CMSIS/Include/core_cm0.h **** */ + 199:Drivers/CMSIS/Include/core_cm0.h **** typedef union + 200:Drivers/CMSIS/Include/core_cm0.h **** { + 201:Drivers/CMSIS/Include/core_cm0.h **** struct + 202:Drivers/CMSIS/Include/core_cm0.h **** { + ARM GAS /tmp/ccDOWgYG.s page 5 + + + 203:Drivers/CMSIS/Include/core_cm0.h **** uint32_t _reserved0:28; /*!< bit: 0..27 Reserved */ + 204:Drivers/CMSIS/Include/core_cm0.h **** uint32_t V:1; /*!< bit: 28 Overflow condition code flag */ + 205:Drivers/CMSIS/Include/core_cm0.h **** uint32_t C:1; /*!< bit: 29 Carry condition code flag */ + 206:Drivers/CMSIS/Include/core_cm0.h **** uint32_t Z:1; /*!< bit: 30 Zero condition code flag */ + 207:Drivers/CMSIS/Include/core_cm0.h **** uint32_t N:1; /*!< bit: 31 Negative condition code flag */ + 208:Drivers/CMSIS/Include/core_cm0.h **** } b; /*!< Structure used for bit access */ + 209:Drivers/CMSIS/Include/core_cm0.h **** uint32_t w; /*!< Type used for word access */ + 210:Drivers/CMSIS/Include/core_cm0.h **** } APSR_Type; + 211:Drivers/CMSIS/Include/core_cm0.h **** + 212:Drivers/CMSIS/Include/core_cm0.h **** /* APSR Register Definitions */ + 213:Drivers/CMSIS/Include/core_cm0.h **** #define APSR_N_Pos 31U /*!< APSR + 214:Drivers/CMSIS/Include/core_cm0.h **** #define APSR_N_Msk (1UL << APSR_N_Pos) /*!< APSR + 215:Drivers/CMSIS/Include/core_cm0.h **** + 216:Drivers/CMSIS/Include/core_cm0.h **** #define APSR_Z_Pos 30U /*!< APSR + 217:Drivers/CMSIS/Include/core_cm0.h **** #define APSR_Z_Msk (1UL << APSR_Z_Pos) /*!< APSR + 218:Drivers/CMSIS/Include/core_cm0.h **** + 219:Drivers/CMSIS/Include/core_cm0.h **** #define APSR_C_Pos 29U /*!< APSR + 220:Drivers/CMSIS/Include/core_cm0.h **** #define APSR_C_Msk (1UL << APSR_C_Pos) /*!< APSR + 221:Drivers/CMSIS/Include/core_cm0.h **** + 222:Drivers/CMSIS/Include/core_cm0.h **** #define APSR_V_Pos 28U /*!< APSR + 223:Drivers/CMSIS/Include/core_cm0.h **** #define APSR_V_Msk (1UL << APSR_V_Pos) /*!< APSR + 224:Drivers/CMSIS/Include/core_cm0.h **** + 225:Drivers/CMSIS/Include/core_cm0.h **** + 226:Drivers/CMSIS/Include/core_cm0.h **** /** + 227:Drivers/CMSIS/Include/core_cm0.h **** \brief Union type to access the Interrupt Program Status Register (IPSR). + 228:Drivers/CMSIS/Include/core_cm0.h **** */ + 229:Drivers/CMSIS/Include/core_cm0.h **** typedef union + 230:Drivers/CMSIS/Include/core_cm0.h **** { + 231:Drivers/CMSIS/Include/core_cm0.h **** struct + 232:Drivers/CMSIS/Include/core_cm0.h **** { + 233:Drivers/CMSIS/Include/core_cm0.h **** uint32_t ISR:9; /*!< bit: 0.. 8 Exception number */ + 234:Drivers/CMSIS/Include/core_cm0.h **** uint32_t _reserved0:23; /*!< bit: 9..31 Reserved */ + 235:Drivers/CMSIS/Include/core_cm0.h **** } b; /*!< Structure used for bit access */ + 236:Drivers/CMSIS/Include/core_cm0.h **** uint32_t w; /*!< Type used for word access */ + 237:Drivers/CMSIS/Include/core_cm0.h **** } IPSR_Type; + 238:Drivers/CMSIS/Include/core_cm0.h **** + 239:Drivers/CMSIS/Include/core_cm0.h **** /* IPSR Register Definitions */ + 240:Drivers/CMSIS/Include/core_cm0.h **** #define IPSR_ISR_Pos 0U /*!< IPSR + 241:Drivers/CMSIS/Include/core_cm0.h **** #define IPSR_ISR_Msk (0x1FFUL /*<< IPSR_ISR_Pos*/) /*!< IPSR + 242:Drivers/CMSIS/Include/core_cm0.h **** + 243:Drivers/CMSIS/Include/core_cm0.h **** + 244:Drivers/CMSIS/Include/core_cm0.h **** /** + 245:Drivers/CMSIS/Include/core_cm0.h **** \brief Union type to access the Special-Purpose Program Status Registers (xPSR). + 246:Drivers/CMSIS/Include/core_cm0.h **** */ + 247:Drivers/CMSIS/Include/core_cm0.h **** typedef union + 248:Drivers/CMSIS/Include/core_cm0.h **** { + 249:Drivers/CMSIS/Include/core_cm0.h **** struct + 250:Drivers/CMSIS/Include/core_cm0.h **** { + 251:Drivers/CMSIS/Include/core_cm0.h **** uint32_t ISR:9; /*!< bit: 0.. 8 Exception number */ + 252:Drivers/CMSIS/Include/core_cm0.h **** uint32_t _reserved0:15; /*!< bit: 9..23 Reserved */ + 253:Drivers/CMSIS/Include/core_cm0.h **** uint32_t T:1; /*!< bit: 24 Thumb bit (read 0) */ + 254:Drivers/CMSIS/Include/core_cm0.h **** uint32_t _reserved1:3; /*!< bit: 25..27 Reserved */ + 255:Drivers/CMSIS/Include/core_cm0.h **** uint32_t V:1; /*!< bit: 28 Overflow condition code flag */ + 256:Drivers/CMSIS/Include/core_cm0.h **** uint32_t C:1; /*!< bit: 29 Carry condition code flag */ + 257:Drivers/CMSIS/Include/core_cm0.h **** uint32_t Z:1; /*!< bit: 30 Zero condition code flag */ + 258:Drivers/CMSIS/Include/core_cm0.h **** uint32_t N:1; /*!< bit: 31 Negative condition code flag */ + 259:Drivers/CMSIS/Include/core_cm0.h **** } b; /*!< Structure used for bit access */ + ARM GAS /tmp/ccDOWgYG.s page 6 + + + 260:Drivers/CMSIS/Include/core_cm0.h **** uint32_t w; /*!< Type used for word access */ + 261:Drivers/CMSIS/Include/core_cm0.h **** } xPSR_Type; + 262:Drivers/CMSIS/Include/core_cm0.h **** + 263:Drivers/CMSIS/Include/core_cm0.h **** /* xPSR Register Definitions */ + 264:Drivers/CMSIS/Include/core_cm0.h **** #define xPSR_N_Pos 31U /*!< xPSR + 265:Drivers/CMSIS/Include/core_cm0.h **** #define xPSR_N_Msk (1UL << xPSR_N_Pos) /*!< xPSR + 266:Drivers/CMSIS/Include/core_cm0.h **** + 267:Drivers/CMSIS/Include/core_cm0.h **** #define xPSR_Z_Pos 30U /*!< xPSR + 268:Drivers/CMSIS/Include/core_cm0.h **** #define xPSR_Z_Msk (1UL << xPSR_Z_Pos) /*!< xPSR + 269:Drivers/CMSIS/Include/core_cm0.h **** + 270:Drivers/CMSIS/Include/core_cm0.h **** #define xPSR_C_Pos 29U /*!< xPSR + 271:Drivers/CMSIS/Include/core_cm0.h **** #define xPSR_C_Msk (1UL << xPSR_C_Pos) /*!< xPSR + 272:Drivers/CMSIS/Include/core_cm0.h **** + 273:Drivers/CMSIS/Include/core_cm0.h **** #define xPSR_V_Pos 28U /*!< xPSR + 274:Drivers/CMSIS/Include/core_cm0.h **** #define xPSR_V_Msk (1UL << xPSR_V_Pos) /*!< xPSR + 275:Drivers/CMSIS/Include/core_cm0.h **** + 276:Drivers/CMSIS/Include/core_cm0.h **** #define xPSR_T_Pos 24U /*!< xPSR + 277:Drivers/CMSIS/Include/core_cm0.h **** #define xPSR_T_Msk (1UL << xPSR_T_Pos) /*!< xPSR + 278:Drivers/CMSIS/Include/core_cm0.h **** + 279:Drivers/CMSIS/Include/core_cm0.h **** #define xPSR_ISR_Pos 0U /*!< xPSR + 280:Drivers/CMSIS/Include/core_cm0.h **** #define xPSR_ISR_Msk (0x1FFUL /*<< xPSR_ISR_Pos*/) /*!< xPSR + 281:Drivers/CMSIS/Include/core_cm0.h **** + 282:Drivers/CMSIS/Include/core_cm0.h **** + 283:Drivers/CMSIS/Include/core_cm0.h **** /** + 284:Drivers/CMSIS/Include/core_cm0.h **** \brief Union type to access the Control Registers (CONTROL). + 285:Drivers/CMSIS/Include/core_cm0.h **** */ + 286:Drivers/CMSIS/Include/core_cm0.h **** typedef union + 287:Drivers/CMSIS/Include/core_cm0.h **** { + 288:Drivers/CMSIS/Include/core_cm0.h **** struct + 289:Drivers/CMSIS/Include/core_cm0.h **** { + 290:Drivers/CMSIS/Include/core_cm0.h **** uint32_t _reserved0:1; /*!< bit: 0 Reserved */ + 291:Drivers/CMSIS/Include/core_cm0.h **** uint32_t SPSEL:1; /*!< bit: 1 Stack to be used */ + 292:Drivers/CMSIS/Include/core_cm0.h **** uint32_t _reserved1:30; /*!< bit: 2..31 Reserved */ + 293:Drivers/CMSIS/Include/core_cm0.h **** } b; /*!< Structure used for bit access */ + 294:Drivers/CMSIS/Include/core_cm0.h **** uint32_t w; /*!< Type used for word access */ + 295:Drivers/CMSIS/Include/core_cm0.h **** } CONTROL_Type; + 296:Drivers/CMSIS/Include/core_cm0.h **** + 297:Drivers/CMSIS/Include/core_cm0.h **** /* CONTROL Register Definitions */ + 298:Drivers/CMSIS/Include/core_cm0.h **** #define CONTROL_SPSEL_Pos 1U /*!< CONT + 299:Drivers/CMSIS/Include/core_cm0.h **** #define CONTROL_SPSEL_Msk (1UL << CONTROL_SPSEL_Pos) /*!< CONT + 300:Drivers/CMSIS/Include/core_cm0.h **** + 301:Drivers/CMSIS/Include/core_cm0.h **** /*@} end of group CMSIS_CORE */ + 302:Drivers/CMSIS/Include/core_cm0.h **** + 303:Drivers/CMSIS/Include/core_cm0.h **** + 304:Drivers/CMSIS/Include/core_cm0.h **** /** + 305:Drivers/CMSIS/Include/core_cm0.h **** \ingroup CMSIS_core_register + 306:Drivers/CMSIS/Include/core_cm0.h **** \defgroup CMSIS_NVIC Nested Vectored Interrupt Controller (NVIC) + 307:Drivers/CMSIS/Include/core_cm0.h **** \brief Type definitions for the NVIC Registers + 308:Drivers/CMSIS/Include/core_cm0.h **** @{ + 309:Drivers/CMSIS/Include/core_cm0.h **** */ + 310:Drivers/CMSIS/Include/core_cm0.h **** + 311:Drivers/CMSIS/Include/core_cm0.h **** /** + 312:Drivers/CMSIS/Include/core_cm0.h **** \brief Structure type to access the Nested Vectored Interrupt Controller (NVIC). + 313:Drivers/CMSIS/Include/core_cm0.h **** */ + 314:Drivers/CMSIS/Include/core_cm0.h **** typedef struct + 315:Drivers/CMSIS/Include/core_cm0.h **** { + 316:Drivers/CMSIS/Include/core_cm0.h **** __IOM uint32_t ISER[1U]; /*!< Offset: 0x000 (R/W) Interrupt Set Enable Register */ + ARM GAS /tmp/ccDOWgYG.s page 7 + + + 317:Drivers/CMSIS/Include/core_cm0.h **** uint32_t RESERVED0[31U]; + 318:Drivers/CMSIS/Include/core_cm0.h **** __IOM uint32_t ICER[1U]; /*!< Offset: 0x080 (R/W) Interrupt Clear Enable Register + 319:Drivers/CMSIS/Include/core_cm0.h **** uint32_t RSERVED1[31U]; + 320:Drivers/CMSIS/Include/core_cm0.h **** __IOM uint32_t ISPR[1U]; /*!< Offset: 0x100 (R/W) Interrupt Set Pending Register * + 321:Drivers/CMSIS/Include/core_cm0.h **** uint32_t RESERVED2[31U]; + 322:Drivers/CMSIS/Include/core_cm0.h **** __IOM uint32_t ICPR[1U]; /*!< Offset: 0x180 (R/W) Interrupt Clear Pending Register + 323:Drivers/CMSIS/Include/core_cm0.h **** uint32_t RESERVED3[31U]; + 324:Drivers/CMSIS/Include/core_cm0.h **** uint32_t RESERVED4[64U]; + 325:Drivers/CMSIS/Include/core_cm0.h **** __IOM uint32_t IP[8U]; /*!< Offset: 0x300 (R/W) Interrupt Priority Register */ + 326:Drivers/CMSIS/Include/core_cm0.h **** } NVIC_Type; + 327:Drivers/CMSIS/Include/core_cm0.h **** + 328:Drivers/CMSIS/Include/core_cm0.h **** /*@} end of group CMSIS_NVIC */ + 329:Drivers/CMSIS/Include/core_cm0.h **** + 330:Drivers/CMSIS/Include/core_cm0.h **** + 331:Drivers/CMSIS/Include/core_cm0.h **** /** + 332:Drivers/CMSIS/Include/core_cm0.h **** \ingroup CMSIS_core_register + 333:Drivers/CMSIS/Include/core_cm0.h **** \defgroup CMSIS_SCB System Control Block (SCB) + 334:Drivers/CMSIS/Include/core_cm0.h **** \brief Type definitions for the System Control Block Registers + 335:Drivers/CMSIS/Include/core_cm0.h **** @{ + 336:Drivers/CMSIS/Include/core_cm0.h **** */ + 337:Drivers/CMSIS/Include/core_cm0.h **** + 338:Drivers/CMSIS/Include/core_cm0.h **** /** + 339:Drivers/CMSIS/Include/core_cm0.h **** \brief Structure type to access the System Control Block (SCB). + 340:Drivers/CMSIS/Include/core_cm0.h **** */ + 341:Drivers/CMSIS/Include/core_cm0.h **** typedef struct + 342:Drivers/CMSIS/Include/core_cm0.h **** { + 343:Drivers/CMSIS/Include/core_cm0.h **** __IM uint32_t CPUID; /*!< Offset: 0x000 (R/ ) CPUID Base Register */ + 344:Drivers/CMSIS/Include/core_cm0.h **** __IOM uint32_t ICSR; /*!< Offset: 0x004 (R/W) Interrupt Control and State Regi + 345:Drivers/CMSIS/Include/core_cm0.h **** uint32_t RESERVED0; + 346:Drivers/CMSIS/Include/core_cm0.h **** __IOM uint32_t AIRCR; /*!< Offset: 0x00C (R/W) Application Interrupt and Reset + 347:Drivers/CMSIS/Include/core_cm0.h **** __IOM uint32_t SCR; /*!< Offset: 0x010 (R/W) System Control Register */ + 348:Drivers/CMSIS/Include/core_cm0.h **** __IOM uint32_t CCR; /*!< Offset: 0x014 (R/W) Configuration Control Register * + 349:Drivers/CMSIS/Include/core_cm0.h **** uint32_t RESERVED1; + 350:Drivers/CMSIS/Include/core_cm0.h **** __IOM uint32_t SHP[2U]; /*!< Offset: 0x01C (R/W) System Handlers Priority Registe + 351:Drivers/CMSIS/Include/core_cm0.h **** __IOM uint32_t SHCSR; /*!< Offset: 0x024 (R/W) System Handler Control and State + 352:Drivers/CMSIS/Include/core_cm0.h **** } SCB_Type; + 353:Drivers/CMSIS/Include/core_cm0.h **** + 354:Drivers/CMSIS/Include/core_cm0.h **** /* SCB CPUID Register Definitions */ + 355:Drivers/CMSIS/Include/core_cm0.h **** #define SCB_CPUID_IMPLEMENTER_Pos 24U /*!< SCB + 356:Drivers/CMSIS/Include/core_cm0.h **** #define SCB_CPUID_IMPLEMENTER_Msk (0xFFUL << SCB_CPUID_IMPLEMENTER_Pos) /*!< SCB + 357:Drivers/CMSIS/Include/core_cm0.h **** + 358:Drivers/CMSIS/Include/core_cm0.h **** #define SCB_CPUID_VARIANT_Pos 20U /*!< SCB + 359:Drivers/CMSIS/Include/core_cm0.h **** #define SCB_CPUID_VARIANT_Msk (0xFUL << SCB_CPUID_VARIANT_Pos) /*!< SCB + 360:Drivers/CMSIS/Include/core_cm0.h **** + 361:Drivers/CMSIS/Include/core_cm0.h **** #define SCB_CPUID_ARCHITECTURE_Pos 16U /*!< SCB + 362:Drivers/CMSIS/Include/core_cm0.h **** #define SCB_CPUID_ARCHITECTURE_Msk (0xFUL << SCB_CPUID_ARCHITECTURE_Pos) /*!< SCB + 363:Drivers/CMSIS/Include/core_cm0.h **** + 364:Drivers/CMSIS/Include/core_cm0.h **** #define SCB_CPUID_PARTNO_Pos 4U /*!< SCB + 365:Drivers/CMSIS/Include/core_cm0.h **** #define SCB_CPUID_PARTNO_Msk (0xFFFUL << SCB_CPUID_PARTNO_Pos) /*!< SCB + 366:Drivers/CMSIS/Include/core_cm0.h **** + 367:Drivers/CMSIS/Include/core_cm0.h **** #define SCB_CPUID_REVISION_Pos 0U /*!< SCB + 368:Drivers/CMSIS/Include/core_cm0.h **** #define SCB_CPUID_REVISION_Msk (0xFUL /*<< SCB_CPUID_REVISION_Pos*/) /*!< SCB + 369:Drivers/CMSIS/Include/core_cm0.h **** + 370:Drivers/CMSIS/Include/core_cm0.h **** /* SCB Interrupt Control State Register Definitions */ + 371:Drivers/CMSIS/Include/core_cm0.h **** #define SCB_ICSR_NMIPENDSET_Pos 31U /*!< SCB + 372:Drivers/CMSIS/Include/core_cm0.h **** #define SCB_ICSR_NMIPENDSET_Msk (1UL << SCB_ICSR_NMIPENDSET_Pos) /*!< SCB + 373:Drivers/CMSIS/Include/core_cm0.h **** + ARM GAS /tmp/ccDOWgYG.s page 8 + + + 374:Drivers/CMSIS/Include/core_cm0.h **** #define SCB_ICSR_PENDSVSET_Pos 28U /*!< SCB + 375:Drivers/CMSIS/Include/core_cm0.h **** #define SCB_ICSR_PENDSVSET_Msk (1UL << SCB_ICSR_PENDSVSET_Pos) /*!< SCB + 376:Drivers/CMSIS/Include/core_cm0.h **** + 377:Drivers/CMSIS/Include/core_cm0.h **** #define SCB_ICSR_PENDSVCLR_Pos 27U /*!< SCB + 378:Drivers/CMSIS/Include/core_cm0.h **** #define SCB_ICSR_PENDSVCLR_Msk (1UL << SCB_ICSR_PENDSVCLR_Pos) /*!< SCB + 379:Drivers/CMSIS/Include/core_cm0.h **** + 380:Drivers/CMSIS/Include/core_cm0.h **** #define SCB_ICSR_PENDSTSET_Pos 26U /*!< SCB + 381:Drivers/CMSIS/Include/core_cm0.h **** #define SCB_ICSR_PENDSTSET_Msk (1UL << SCB_ICSR_PENDSTSET_Pos) /*!< SCB + 382:Drivers/CMSIS/Include/core_cm0.h **** + 383:Drivers/CMSIS/Include/core_cm0.h **** #define SCB_ICSR_PENDSTCLR_Pos 25U /*!< SCB + 384:Drivers/CMSIS/Include/core_cm0.h **** #define SCB_ICSR_PENDSTCLR_Msk (1UL << SCB_ICSR_PENDSTCLR_Pos) /*!< SCB + 385:Drivers/CMSIS/Include/core_cm0.h **** + 386:Drivers/CMSIS/Include/core_cm0.h **** #define SCB_ICSR_ISRPREEMPT_Pos 23U /*!< SCB + 387:Drivers/CMSIS/Include/core_cm0.h **** #define SCB_ICSR_ISRPREEMPT_Msk (1UL << SCB_ICSR_ISRPREEMPT_Pos) /*!< SCB + 388:Drivers/CMSIS/Include/core_cm0.h **** + 389:Drivers/CMSIS/Include/core_cm0.h **** #define SCB_ICSR_ISRPENDING_Pos 22U /*!< SCB + 390:Drivers/CMSIS/Include/core_cm0.h **** #define SCB_ICSR_ISRPENDING_Msk (1UL << SCB_ICSR_ISRPENDING_Pos) /*!< SCB + 391:Drivers/CMSIS/Include/core_cm0.h **** + 392:Drivers/CMSIS/Include/core_cm0.h **** #define SCB_ICSR_VECTPENDING_Pos 12U /*!< SCB + 393:Drivers/CMSIS/Include/core_cm0.h **** #define SCB_ICSR_VECTPENDING_Msk (0x1FFUL << SCB_ICSR_VECTPENDING_Pos) /*!< SCB + 394:Drivers/CMSIS/Include/core_cm0.h **** + 395:Drivers/CMSIS/Include/core_cm0.h **** #define SCB_ICSR_VECTACTIVE_Pos 0U /*!< SCB + 396:Drivers/CMSIS/Include/core_cm0.h **** #define SCB_ICSR_VECTACTIVE_Msk (0x1FFUL /*<< SCB_ICSR_VECTACTIVE_Pos*/) /*!< SCB + 397:Drivers/CMSIS/Include/core_cm0.h **** + 398:Drivers/CMSIS/Include/core_cm0.h **** /* SCB Application Interrupt and Reset Control Register Definitions */ + 399:Drivers/CMSIS/Include/core_cm0.h **** #define SCB_AIRCR_VECTKEY_Pos 16U /*!< SCB + 400:Drivers/CMSIS/Include/core_cm0.h **** #define SCB_AIRCR_VECTKEY_Msk (0xFFFFUL << SCB_AIRCR_VECTKEY_Pos) /*!< SCB + 401:Drivers/CMSIS/Include/core_cm0.h **** + 402:Drivers/CMSIS/Include/core_cm0.h **** #define SCB_AIRCR_VECTKEYSTAT_Pos 16U /*!< SCB + 403:Drivers/CMSIS/Include/core_cm0.h **** #define SCB_AIRCR_VECTKEYSTAT_Msk (0xFFFFUL << SCB_AIRCR_VECTKEYSTAT_Pos) /*!< SCB + 404:Drivers/CMSIS/Include/core_cm0.h **** + 405:Drivers/CMSIS/Include/core_cm0.h **** #define SCB_AIRCR_ENDIANESS_Pos 15U /*!< SCB + 406:Drivers/CMSIS/Include/core_cm0.h **** #define SCB_AIRCR_ENDIANESS_Msk (1UL << SCB_AIRCR_ENDIANESS_Pos) /*!< SCB + 407:Drivers/CMSIS/Include/core_cm0.h **** + 408:Drivers/CMSIS/Include/core_cm0.h **** #define SCB_AIRCR_SYSRESETREQ_Pos 2U /*!< SCB + 409:Drivers/CMSIS/Include/core_cm0.h **** #define SCB_AIRCR_SYSRESETREQ_Msk (1UL << SCB_AIRCR_SYSRESETREQ_Pos) /*!< SCB + 410:Drivers/CMSIS/Include/core_cm0.h **** + 411:Drivers/CMSIS/Include/core_cm0.h **** #define SCB_AIRCR_VECTCLRACTIVE_Pos 1U /*!< SCB + 412:Drivers/CMSIS/Include/core_cm0.h **** #define SCB_AIRCR_VECTCLRACTIVE_Msk (1UL << SCB_AIRCR_VECTCLRACTIVE_Pos) /*!< SCB + 413:Drivers/CMSIS/Include/core_cm0.h **** + 414:Drivers/CMSIS/Include/core_cm0.h **** /* SCB System Control Register Definitions */ + 415:Drivers/CMSIS/Include/core_cm0.h **** #define SCB_SCR_SEVONPEND_Pos 4U /*!< SCB + 416:Drivers/CMSIS/Include/core_cm0.h **** #define SCB_SCR_SEVONPEND_Msk (1UL << SCB_SCR_SEVONPEND_Pos) /*!< SCB + 417:Drivers/CMSIS/Include/core_cm0.h **** + 418:Drivers/CMSIS/Include/core_cm0.h **** #define SCB_SCR_SLEEPDEEP_Pos 2U /*!< SCB + 419:Drivers/CMSIS/Include/core_cm0.h **** #define SCB_SCR_SLEEPDEEP_Msk (1UL << SCB_SCR_SLEEPDEEP_Pos) /*!< SCB + 420:Drivers/CMSIS/Include/core_cm0.h **** + 421:Drivers/CMSIS/Include/core_cm0.h **** #define SCB_SCR_SLEEPONEXIT_Pos 1U /*!< SCB + 422:Drivers/CMSIS/Include/core_cm0.h **** #define SCB_SCR_SLEEPONEXIT_Msk (1UL << SCB_SCR_SLEEPONEXIT_Pos) /*!< SCB + 423:Drivers/CMSIS/Include/core_cm0.h **** + 424:Drivers/CMSIS/Include/core_cm0.h **** /* SCB Configuration Control Register Definitions */ + 425:Drivers/CMSIS/Include/core_cm0.h **** #define SCB_CCR_STKALIGN_Pos 9U /*!< SCB + 426:Drivers/CMSIS/Include/core_cm0.h **** #define SCB_CCR_STKALIGN_Msk (1UL << SCB_CCR_STKALIGN_Pos) /*!< SCB + 427:Drivers/CMSIS/Include/core_cm0.h **** + 428:Drivers/CMSIS/Include/core_cm0.h **** #define SCB_CCR_UNALIGN_TRP_Pos 3U /*!< SCB + 429:Drivers/CMSIS/Include/core_cm0.h **** #define SCB_CCR_UNALIGN_TRP_Msk (1UL << SCB_CCR_UNALIGN_TRP_Pos) /*!< SCB + 430:Drivers/CMSIS/Include/core_cm0.h **** + ARM GAS /tmp/ccDOWgYG.s page 9 + + + 431:Drivers/CMSIS/Include/core_cm0.h **** /* SCB System Handler Control and State Register Definitions */ + 432:Drivers/CMSIS/Include/core_cm0.h **** #define SCB_SHCSR_SVCALLPENDED_Pos 15U /*!< SCB + 433:Drivers/CMSIS/Include/core_cm0.h **** #define SCB_SHCSR_SVCALLPENDED_Msk (1UL << SCB_SHCSR_SVCALLPENDED_Pos) /*!< SCB + 434:Drivers/CMSIS/Include/core_cm0.h **** + 435:Drivers/CMSIS/Include/core_cm0.h **** /*@} end of group CMSIS_SCB */ + 436:Drivers/CMSIS/Include/core_cm0.h **** + 437:Drivers/CMSIS/Include/core_cm0.h **** + 438:Drivers/CMSIS/Include/core_cm0.h **** /** + 439:Drivers/CMSIS/Include/core_cm0.h **** \ingroup CMSIS_core_register + 440:Drivers/CMSIS/Include/core_cm0.h **** \defgroup CMSIS_SysTick System Tick Timer (SysTick) + 441:Drivers/CMSIS/Include/core_cm0.h **** \brief Type definitions for the System Timer Registers. + 442:Drivers/CMSIS/Include/core_cm0.h **** @{ + 443:Drivers/CMSIS/Include/core_cm0.h **** */ + 444:Drivers/CMSIS/Include/core_cm0.h **** + 445:Drivers/CMSIS/Include/core_cm0.h **** /** + 446:Drivers/CMSIS/Include/core_cm0.h **** \brief Structure type to access the System Timer (SysTick). + 447:Drivers/CMSIS/Include/core_cm0.h **** */ + 448:Drivers/CMSIS/Include/core_cm0.h **** typedef struct + 449:Drivers/CMSIS/Include/core_cm0.h **** { + 450:Drivers/CMSIS/Include/core_cm0.h **** __IOM uint32_t CTRL; /*!< Offset: 0x000 (R/W) SysTick Control and Status Regis + 451:Drivers/CMSIS/Include/core_cm0.h **** __IOM uint32_t LOAD; /*!< Offset: 0x004 (R/W) SysTick Reload Value Register */ + 452:Drivers/CMSIS/Include/core_cm0.h **** __IOM uint32_t VAL; /*!< Offset: 0x008 (R/W) SysTick Current Value Register * + 453:Drivers/CMSIS/Include/core_cm0.h **** __IM uint32_t CALIB; /*!< Offset: 0x00C (R/ ) SysTick Calibration Register */ + 454:Drivers/CMSIS/Include/core_cm0.h **** } SysTick_Type; + 455:Drivers/CMSIS/Include/core_cm0.h **** + 456:Drivers/CMSIS/Include/core_cm0.h **** /* SysTick Control / Status Register Definitions */ + 457:Drivers/CMSIS/Include/core_cm0.h **** #define SysTick_CTRL_COUNTFLAG_Pos 16U /*!< SysT + 458:Drivers/CMSIS/Include/core_cm0.h **** #define SysTick_CTRL_COUNTFLAG_Msk (1UL << SysTick_CTRL_COUNTFLAG_Pos) /*!< SysT + 459:Drivers/CMSIS/Include/core_cm0.h **** + 460:Drivers/CMSIS/Include/core_cm0.h **** #define SysTick_CTRL_CLKSOURCE_Pos 2U /*!< SysT + 461:Drivers/CMSIS/Include/core_cm0.h **** #define SysTick_CTRL_CLKSOURCE_Msk (1UL << SysTick_CTRL_CLKSOURCE_Pos) /*!< SysT + 462:Drivers/CMSIS/Include/core_cm0.h **** + 463:Drivers/CMSIS/Include/core_cm0.h **** #define SysTick_CTRL_TICKINT_Pos 1U /*!< SysT + 464:Drivers/CMSIS/Include/core_cm0.h **** #define SysTick_CTRL_TICKINT_Msk (1UL << SysTick_CTRL_TICKINT_Pos) /*!< SysT + 465:Drivers/CMSIS/Include/core_cm0.h **** + 466:Drivers/CMSIS/Include/core_cm0.h **** #define SysTick_CTRL_ENABLE_Pos 0U /*!< SysT + 467:Drivers/CMSIS/Include/core_cm0.h **** #define SysTick_CTRL_ENABLE_Msk (1UL /*<< SysTick_CTRL_ENABLE_Pos*/) /*!< SysT + 468:Drivers/CMSIS/Include/core_cm0.h **** + 469:Drivers/CMSIS/Include/core_cm0.h **** /* SysTick Reload Register Definitions */ + 470:Drivers/CMSIS/Include/core_cm0.h **** #define SysTick_LOAD_RELOAD_Pos 0U /*!< SysT + 471:Drivers/CMSIS/Include/core_cm0.h **** #define SysTick_LOAD_RELOAD_Msk (0xFFFFFFUL /*<< SysTick_LOAD_RELOAD_Pos*/) /*!< SysT + 472:Drivers/CMSIS/Include/core_cm0.h **** + 473:Drivers/CMSIS/Include/core_cm0.h **** /* SysTick Current Register Definitions */ + 474:Drivers/CMSIS/Include/core_cm0.h **** #define SysTick_VAL_CURRENT_Pos 0U /*!< SysT + 475:Drivers/CMSIS/Include/core_cm0.h **** #define SysTick_VAL_CURRENT_Msk (0xFFFFFFUL /*<< SysTick_VAL_CURRENT_Pos*/) /*!< SysT + 476:Drivers/CMSIS/Include/core_cm0.h **** + 477:Drivers/CMSIS/Include/core_cm0.h **** /* SysTick Calibration Register Definitions */ + 478:Drivers/CMSIS/Include/core_cm0.h **** #define SysTick_CALIB_NOREF_Pos 31U /*!< SysT + 479:Drivers/CMSIS/Include/core_cm0.h **** #define SysTick_CALIB_NOREF_Msk (1UL << SysTick_CALIB_NOREF_Pos) /*!< SysT + 480:Drivers/CMSIS/Include/core_cm0.h **** + 481:Drivers/CMSIS/Include/core_cm0.h **** #define SysTick_CALIB_SKEW_Pos 30U /*!< SysT + 482:Drivers/CMSIS/Include/core_cm0.h **** #define SysTick_CALIB_SKEW_Msk (1UL << SysTick_CALIB_SKEW_Pos) /*!< SysT + 483:Drivers/CMSIS/Include/core_cm0.h **** + 484:Drivers/CMSIS/Include/core_cm0.h **** #define SysTick_CALIB_TENMS_Pos 0U /*!< SysT + 485:Drivers/CMSIS/Include/core_cm0.h **** #define SysTick_CALIB_TENMS_Msk (0xFFFFFFUL /*<< SysTick_CALIB_TENMS_Pos*/) /*!< SysT + 486:Drivers/CMSIS/Include/core_cm0.h **** + 487:Drivers/CMSIS/Include/core_cm0.h **** /*@} end of group CMSIS_SysTick */ + ARM GAS /tmp/ccDOWgYG.s page 10 + + + 488:Drivers/CMSIS/Include/core_cm0.h **** + 489:Drivers/CMSIS/Include/core_cm0.h **** + 490:Drivers/CMSIS/Include/core_cm0.h **** /** + 491:Drivers/CMSIS/Include/core_cm0.h **** \ingroup CMSIS_core_register + 492:Drivers/CMSIS/Include/core_cm0.h **** \defgroup CMSIS_CoreDebug Core Debug Registers (CoreDebug) + 493:Drivers/CMSIS/Include/core_cm0.h **** \brief Cortex-M0 Core Debug Registers (DCB registers, SHCSR, and DFSR) are only accessible ove + 494:Drivers/CMSIS/Include/core_cm0.h **** Therefore they are not covered by the Cortex-M0 header file. + 495:Drivers/CMSIS/Include/core_cm0.h **** @{ + 496:Drivers/CMSIS/Include/core_cm0.h **** */ + 497:Drivers/CMSIS/Include/core_cm0.h **** /*@} end of group CMSIS_CoreDebug */ + 498:Drivers/CMSIS/Include/core_cm0.h **** + 499:Drivers/CMSIS/Include/core_cm0.h **** + 500:Drivers/CMSIS/Include/core_cm0.h **** /** + 501:Drivers/CMSIS/Include/core_cm0.h **** \ingroup CMSIS_core_register + 502:Drivers/CMSIS/Include/core_cm0.h **** \defgroup CMSIS_core_bitfield Core register bit field macros + 503:Drivers/CMSIS/Include/core_cm0.h **** \brief Macros for use with bit field definitions (xxx_Pos, xxx_Msk). + 504:Drivers/CMSIS/Include/core_cm0.h **** @{ + 505:Drivers/CMSIS/Include/core_cm0.h **** */ + 506:Drivers/CMSIS/Include/core_cm0.h **** + 507:Drivers/CMSIS/Include/core_cm0.h **** /** + 508:Drivers/CMSIS/Include/core_cm0.h **** \brief Mask and shift a bit field value for use in a register bit range. + 509:Drivers/CMSIS/Include/core_cm0.h **** \param[in] field Name of the register bit field. + 510:Drivers/CMSIS/Include/core_cm0.h **** \param[in] value Value of the bit field. This parameter is interpreted as an uint32_t type. + 511:Drivers/CMSIS/Include/core_cm0.h **** \return Masked and shifted value. + 512:Drivers/CMSIS/Include/core_cm0.h **** */ + 513:Drivers/CMSIS/Include/core_cm0.h **** #define _VAL2FLD(field, value) (((uint32_t)(value) << field ## _Pos) & field ## _Msk) + 514:Drivers/CMSIS/Include/core_cm0.h **** + 515:Drivers/CMSIS/Include/core_cm0.h **** /** + 516:Drivers/CMSIS/Include/core_cm0.h **** \brief Mask and shift a register value to extract a bit filed value. + 517:Drivers/CMSIS/Include/core_cm0.h **** \param[in] field Name of the register bit field. + 518:Drivers/CMSIS/Include/core_cm0.h **** \param[in] value Value of register. This parameter is interpreted as an uint32_t type. + 519:Drivers/CMSIS/Include/core_cm0.h **** \return Masked and shifted bit field value. + 520:Drivers/CMSIS/Include/core_cm0.h **** */ + 521:Drivers/CMSIS/Include/core_cm0.h **** #define _FLD2VAL(field, value) (((uint32_t)(value) & field ## _Msk) >> field ## _Pos) + 522:Drivers/CMSIS/Include/core_cm0.h **** + 523:Drivers/CMSIS/Include/core_cm0.h **** /*@} end of group CMSIS_core_bitfield */ + 524:Drivers/CMSIS/Include/core_cm0.h **** + 525:Drivers/CMSIS/Include/core_cm0.h **** + 526:Drivers/CMSIS/Include/core_cm0.h **** /** + 527:Drivers/CMSIS/Include/core_cm0.h **** \ingroup CMSIS_core_register + 528:Drivers/CMSIS/Include/core_cm0.h **** \defgroup CMSIS_core_base Core Definitions + 529:Drivers/CMSIS/Include/core_cm0.h **** \brief Definitions for base addresses, unions, and structures. + 530:Drivers/CMSIS/Include/core_cm0.h **** @{ + 531:Drivers/CMSIS/Include/core_cm0.h **** */ + 532:Drivers/CMSIS/Include/core_cm0.h **** + 533:Drivers/CMSIS/Include/core_cm0.h **** /* Memory mapping of Core Hardware */ + 534:Drivers/CMSIS/Include/core_cm0.h **** #define SCS_BASE (0xE000E000UL) /*!< System Control Space Bas + 535:Drivers/CMSIS/Include/core_cm0.h **** #define SysTick_BASE (SCS_BASE + 0x0010UL) /*!< SysTick Base Address */ + 536:Drivers/CMSIS/Include/core_cm0.h **** #define NVIC_BASE (SCS_BASE + 0x0100UL) /*!< NVIC Base Address */ + 537:Drivers/CMSIS/Include/core_cm0.h **** #define SCB_BASE (SCS_BASE + 0x0D00UL) /*!< System Control Block Bas + 538:Drivers/CMSIS/Include/core_cm0.h **** + 539:Drivers/CMSIS/Include/core_cm0.h **** #define SCB ((SCB_Type *) SCB_BASE ) /*!< SCB configuration struct + 540:Drivers/CMSIS/Include/core_cm0.h **** #define SysTick ((SysTick_Type *) SysTick_BASE ) /*!< SysTick configuration st + 541:Drivers/CMSIS/Include/core_cm0.h **** #define NVIC ((NVIC_Type *) NVIC_BASE ) /*!< NVIC configuration struc + 542:Drivers/CMSIS/Include/core_cm0.h **** + 543:Drivers/CMSIS/Include/core_cm0.h **** + 544:Drivers/CMSIS/Include/core_cm0.h **** /*@} */ + ARM GAS /tmp/ccDOWgYG.s page 11 + + + 545:Drivers/CMSIS/Include/core_cm0.h **** + 546:Drivers/CMSIS/Include/core_cm0.h **** + 547:Drivers/CMSIS/Include/core_cm0.h **** + 548:Drivers/CMSIS/Include/core_cm0.h **** /******************************************************************************* + 549:Drivers/CMSIS/Include/core_cm0.h **** * Hardware Abstraction Layer + 550:Drivers/CMSIS/Include/core_cm0.h **** Core Function Interface contains: + 551:Drivers/CMSIS/Include/core_cm0.h **** - Core NVIC Functions + 552:Drivers/CMSIS/Include/core_cm0.h **** - Core SysTick Functions + 553:Drivers/CMSIS/Include/core_cm0.h **** - Core Register Access Functions + 554:Drivers/CMSIS/Include/core_cm0.h **** ******************************************************************************/ + 555:Drivers/CMSIS/Include/core_cm0.h **** /** + 556:Drivers/CMSIS/Include/core_cm0.h **** \defgroup CMSIS_Core_FunctionInterface Functions and Instructions Reference + 557:Drivers/CMSIS/Include/core_cm0.h **** */ + 558:Drivers/CMSIS/Include/core_cm0.h **** + 559:Drivers/CMSIS/Include/core_cm0.h **** + 560:Drivers/CMSIS/Include/core_cm0.h **** + 561:Drivers/CMSIS/Include/core_cm0.h **** /* ########################## NVIC functions #################################### */ + 562:Drivers/CMSIS/Include/core_cm0.h **** /** + 563:Drivers/CMSIS/Include/core_cm0.h **** \ingroup CMSIS_Core_FunctionInterface + 564:Drivers/CMSIS/Include/core_cm0.h **** \defgroup CMSIS_Core_NVICFunctions NVIC Functions + 565:Drivers/CMSIS/Include/core_cm0.h **** \brief Functions that manage interrupts and exceptions via the NVIC. + 566:Drivers/CMSIS/Include/core_cm0.h **** @{ + 567:Drivers/CMSIS/Include/core_cm0.h **** */ + 568:Drivers/CMSIS/Include/core_cm0.h **** + 569:Drivers/CMSIS/Include/core_cm0.h **** #ifdef CMSIS_NVIC_VIRTUAL + 570:Drivers/CMSIS/Include/core_cm0.h **** #ifndef CMSIS_NVIC_VIRTUAL_HEADER_FILE + 571:Drivers/CMSIS/Include/core_cm0.h **** #define CMSIS_NVIC_VIRTUAL_HEADER_FILE "cmsis_nvic_virtual.h" + 572:Drivers/CMSIS/Include/core_cm0.h **** #endif + 573:Drivers/CMSIS/Include/core_cm0.h **** #include CMSIS_NVIC_VIRTUAL_HEADER_FILE + 574:Drivers/CMSIS/Include/core_cm0.h **** #else + 575:Drivers/CMSIS/Include/core_cm0.h **** #define NVIC_SetPriorityGrouping __NVIC_SetPriorityGrouping + 576:Drivers/CMSIS/Include/core_cm0.h **** #define NVIC_GetPriorityGrouping __NVIC_GetPriorityGrouping + 577:Drivers/CMSIS/Include/core_cm0.h **** #define NVIC_EnableIRQ __NVIC_EnableIRQ + 578:Drivers/CMSIS/Include/core_cm0.h **** #define NVIC_GetEnableIRQ __NVIC_GetEnableIRQ + 579:Drivers/CMSIS/Include/core_cm0.h **** #define NVIC_DisableIRQ __NVIC_DisableIRQ + 580:Drivers/CMSIS/Include/core_cm0.h **** #define NVIC_GetPendingIRQ __NVIC_GetPendingIRQ + 581:Drivers/CMSIS/Include/core_cm0.h **** #define NVIC_SetPendingIRQ __NVIC_SetPendingIRQ + 582:Drivers/CMSIS/Include/core_cm0.h **** #define NVIC_ClearPendingIRQ __NVIC_ClearPendingIRQ + 583:Drivers/CMSIS/Include/core_cm0.h **** /*#define NVIC_GetActive __NVIC_GetActive not available for Cortex-M0 */ + 584:Drivers/CMSIS/Include/core_cm0.h **** #define NVIC_SetPriority __NVIC_SetPriority + 585:Drivers/CMSIS/Include/core_cm0.h **** #define NVIC_GetPriority __NVIC_GetPriority + 586:Drivers/CMSIS/Include/core_cm0.h **** #define NVIC_SystemReset __NVIC_SystemReset + 587:Drivers/CMSIS/Include/core_cm0.h **** #endif /* CMSIS_NVIC_VIRTUAL */ + 588:Drivers/CMSIS/Include/core_cm0.h **** + 589:Drivers/CMSIS/Include/core_cm0.h **** #ifdef CMSIS_VECTAB_VIRTUAL + 590:Drivers/CMSIS/Include/core_cm0.h **** #ifndef CMSIS_VECTAB_VIRTUAL_HEADER_FILE + 591:Drivers/CMSIS/Include/core_cm0.h **** #define CMSIS_VECTAB_VIRTUAL_HEADER_FILE "cmsis_vectab_virtual.h" + 592:Drivers/CMSIS/Include/core_cm0.h **** #endif + 593:Drivers/CMSIS/Include/core_cm0.h **** #include CMSIS_VECTAB_VIRTUAL_HEADER_FILE + 594:Drivers/CMSIS/Include/core_cm0.h **** #else + 595:Drivers/CMSIS/Include/core_cm0.h **** #define NVIC_SetVector __NVIC_SetVector + 596:Drivers/CMSIS/Include/core_cm0.h **** #define NVIC_GetVector __NVIC_GetVector + 597:Drivers/CMSIS/Include/core_cm0.h **** #endif /* (CMSIS_VECTAB_VIRTUAL) */ + 598:Drivers/CMSIS/Include/core_cm0.h **** + 599:Drivers/CMSIS/Include/core_cm0.h **** #define NVIC_USER_IRQ_OFFSET 16 + 600:Drivers/CMSIS/Include/core_cm0.h **** + 601:Drivers/CMSIS/Include/core_cm0.h **** + ARM GAS /tmp/ccDOWgYG.s page 12 + + + 602:Drivers/CMSIS/Include/core_cm0.h **** /* The following EXC_RETURN values are saved the LR on exception entry */ + 603:Drivers/CMSIS/Include/core_cm0.h **** #define EXC_RETURN_HANDLER (0xFFFFFFF1UL) /* return to Handler mode, uses MSP after ret + 604:Drivers/CMSIS/Include/core_cm0.h **** #define EXC_RETURN_THREAD_MSP (0xFFFFFFF9UL) /* return to Thread mode, uses MSP after retu + 605:Drivers/CMSIS/Include/core_cm0.h **** #define EXC_RETURN_THREAD_PSP (0xFFFFFFFDUL) /* return to Thread mode, uses PSP after retu + 606:Drivers/CMSIS/Include/core_cm0.h **** + 607:Drivers/CMSIS/Include/core_cm0.h **** + 608:Drivers/CMSIS/Include/core_cm0.h **** /* Interrupt Priorities are WORD accessible only under Armv6-M */ + 609:Drivers/CMSIS/Include/core_cm0.h **** /* The following MACROS handle generation of the register offset and byte masks */ + 610:Drivers/CMSIS/Include/core_cm0.h **** #define _BIT_SHIFT(IRQn) ( ((((uint32_t)(int32_t)(IRQn)) ) & 0x03UL) * 8UL) + 611:Drivers/CMSIS/Include/core_cm0.h **** #define _SHP_IDX(IRQn) ( (((((uint32_t)(int32_t)(IRQn)) & 0x0FUL)-8UL) >> 2UL) ) + 612:Drivers/CMSIS/Include/core_cm0.h **** #define _IP_IDX(IRQn) ( (((uint32_t)(int32_t)(IRQn)) >> 2UL) ) + 613:Drivers/CMSIS/Include/core_cm0.h **** + 614:Drivers/CMSIS/Include/core_cm0.h **** #define __NVIC_SetPriorityGrouping(X) (void)(X) + 615:Drivers/CMSIS/Include/core_cm0.h **** #define __NVIC_GetPriorityGrouping() (0U) + 616:Drivers/CMSIS/Include/core_cm0.h **** + 617:Drivers/CMSIS/Include/core_cm0.h **** /** + 618:Drivers/CMSIS/Include/core_cm0.h **** \brief Enable Interrupt + 619:Drivers/CMSIS/Include/core_cm0.h **** \details Enables a device specific interrupt in the NVIC interrupt controller. + 620:Drivers/CMSIS/Include/core_cm0.h **** \param [in] IRQn Device specific interrupt number. + 621:Drivers/CMSIS/Include/core_cm0.h **** \note IRQn must not be negative. + 622:Drivers/CMSIS/Include/core_cm0.h **** */ + 623:Drivers/CMSIS/Include/core_cm0.h **** __STATIC_INLINE void __NVIC_EnableIRQ(IRQn_Type IRQn) + 624:Drivers/CMSIS/Include/core_cm0.h **** { + 625:Drivers/CMSIS/Include/core_cm0.h **** if ((int32_t)(IRQn) >= 0) + 626:Drivers/CMSIS/Include/core_cm0.h **** { + 627:Drivers/CMSIS/Include/core_cm0.h **** NVIC->ISER[0U] = (uint32_t)(1UL << (((uint32_t)IRQn) & 0x1FUL)); + 628:Drivers/CMSIS/Include/core_cm0.h **** } + 629:Drivers/CMSIS/Include/core_cm0.h **** } + 630:Drivers/CMSIS/Include/core_cm0.h **** + 631:Drivers/CMSIS/Include/core_cm0.h **** + 632:Drivers/CMSIS/Include/core_cm0.h **** /** + 633:Drivers/CMSIS/Include/core_cm0.h **** \brief Get Interrupt Enable status + 634:Drivers/CMSIS/Include/core_cm0.h **** \details Returns a device specific interrupt enable status from the NVIC interrupt controller. + 635:Drivers/CMSIS/Include/core_cm0.h **** \param [in] IRQn Device specific interrupt number. + 636:Drivers/CMSIS/Include/core_cm0.h **** \return 0 Interrupt is not enabled. + 637:Drivers/CMSIS/Include/core_cm0.h **** \return 1 Interrupt is enabled. + 638:Drivers/CMSIS/Include/core_cm0.h **** \note IRQn must not be negative. + 639:Drivers/CMSIS/Include/core_cm0.h **** */ + 640:Drivers/CMSIS/Include/core_cm0.h **** __STATIC_INLINE uint32_t __NVIC_GetEnableIRQ(IRQn_Type IRQn) + 641:Drivers/CMSIS/Include/core_cm0.h **** { + 642:Drivers/CMSIS/Include/core_cm0.h **** if ((int32_t)(IRQn) >= 0) + 643:Drivers/CMSIS/Include/core_cm0.h **** { + 644:Drivers/CMSIS/Include/core_cm0.h **** return((uint32_t)(((NVIC->ISER[0U] & (1UL << (((uint32_t)IRQn) & 0x1FUL))) != 0UL) ? 1UL : 0UL) + 645:Drivers/CMSIS/Include/core_cm0.h **** } + 646:Drivers/CMSIS/Include/core_cm0.h **** else + 647:Drivers/CMSIS/Include/core_cm0.h **** { + 648:Drivers/CMSIS/Include/core_cm0.h **** return(0U); + 649:Drivers/CMSIS/Include/core_cm0.h **** } + 650:Drivers/CMSIS/Include/core_cm0.h **** } + 651:Drivers/CMSIS/Include/core_cm0.h **** + 652:Drivers/CMSIS/Include/core_cm0.h **** + 653:Drivers/CMSIS/Include/core_cm0.h **** /** + 654:Drivers/CMSIS/Include/core_cm0.h **** \brief Disable Interrupt + 655:Drivers/CMSIS/Include/core_cm0.h **** \details Disables a device specific interrupt in the NVIC interrupt controller. + 656:Drivers/CMSIS/Include/core_cm0.h **** \param [in] IRQn Device specific interrupt number. + 657:Drivers/CMSIS/Include/core_cm0.h **** \note IRQn must not be negative. + 658:Drivers/CMSIS/Include/core_cm0.h **** */ + ARM GAS /tmp/ccDOWgYG.s page 13 + + + 659:Drivers/CMSIS/Include/core_cm0.h **** __STATIC_INLINE void __NVIC_DisableIRQ(IRQn_Type IRQn) + 660:Drivers/CMSIS/Include/core_cm0.h **** { + 661:Drivers/CMSIS/Include/core_cm0.h **** if ((int32_t)(IRQn) >= 0) + 662:Drivers/CMSIS/Include/core_cm0.h **** { + 663:Drivers/CMSIS/Include/core_cm0.h **** NVIC->ICER[0U] = (uint32_t)(1UL << (((uint32_t)IRQn) & 0x1FUL)); + 664:Drivers/CMSIS/Include/core_cm0.h **** __DSB(); + 665:Drivers/CMSIS/Include/core_cm0.h **** __ISB(); + 666:Drivers/CMSIS/Include/core_cm0.h **** } + 667:Drivers/CMSIS/Include/core_cm0.h **** } + 668:Drivers/CMSIS/Include/core_cm0.h **** + 669:Drivers/CMSIS/Include/core_cm0.h **** + 670:Drivers/CMSIS/Include/core_cm0.h **** /** + 671:Drivers/CMSIS/Include/core_cm0.h **** \brief Get Pending Interrupt + 672:Drivers/CMSIS/Include/core_cm0.h **** \details Reads the NVIC pending register and returns the pending bit for the specified device spe + 673:Drivers/CMSIS/Include/core_cm0.h **** \param [in] IRQn Device specific interrupt number. + 674:Drivers/CMSIS/Include/core_cm0.h **** \return 0 Interrupt status is not pending. + 675:Drivers/CMSIS/Include/core_cm0.h **** \return 1 Interrupt status is pending. + 676:Drivers/CMSIS/Include/core_cm0.h **** \note IRQn must not be negative. + 677:Drivers/CMSIS/Include/core_cm0.h **** */ + 678:Drivers/CMSIS/Include/core_cm0.h **** __STATIC_INLINE uint32_t __NVIC_GetPendingIRQ(IRQn_Type IRQn) + 679:Drivers/CMSIS/Include/core_cm0.h **** { + 680:Drivers/CMSIS/Include/core_cm0.h **** if ((int32_t)(IRQn) >= 0) + 681:Drivers/CMSIS/Include/core_cm0.h **** { + 682:Drivers/CMSIS/Include/core_cm0.h **** return((uint32_t)(((NVIC->ISPR[0U] & (1UL << (((uint32_t)IRQn) & 0x1FUL))) != 0UL) ? 1UL : 0UL) + 683:Drivers/CMSIS/Include/core_cm0.h **** } + 684:Drivers/CMSIS/Include/core_cm0.h **** else + 685:Drivers/CMSIS/Include/core_cm0.h **** { + 686:Drivers/CMSIS/Include/core_cm0.h **** return(0U); + 687:Drivers/CMSIS/Include/core_cm0.h **** } + 688:Drivers/CMSIS/Include/core_cm0.h **** } + 689:Drivers/CMSIS/Include/core_cm0.h **** + 690:Drivers/CMSIS/Include/core_cm0.h **** + 691:Drivers/CMSIS/Include/core_cm0.h **** /** + 692:Drivers/CMSIS/Include/core_cm0.h **** \brief Set Pending Interrupt + 693:Drivers/CMSIS/Include/core_cm0.h **** \details Sets the pending bit of a device specific interrupt in the NVIC pending register. + 694:Drivers/CMSIS/Include/core_cm0.h **** \param [in] IRQn Device specific interrupt number. + 695:Drivers/CMSIS/Include/core_cm0.h **** \note IRQn must not be negative. + 696:Drivers/CMSIS/Include/core_cm0.h **** */ + 697:Drivers/CMSIS/Include/core_cm0.h **** __STATIC_INLINE void __NVIC_SetPendingIRQ(IRQn_Type IRQn) + 698:Drivers/CMSIS/Include/core_cm0.h **** { + 699:Drivers/CMSIS/Include/core_cm0.h **** if ((int32_t)(IRQn) >= 0) + 700:Drivers/CMSIS/Include/core_cm0.h **** { + 701:Drivers/CMSIS/Include/core_cm0.h **** NVIC->ISPR[0U] = (uint32_t)(1UL << (((uint32_t)IRQn) & 0x1FUL)); + 702:Drivers/CMSIS/Include/core_cm0.h **** } + 703:Drivers/CMSIS/Include/core_cm0.h **** } + 704:Drivers/CMSIS/Include/core_cm0.h **** + 705:Drivers/CMSIS/Include/core_cm0.h **** + 706:Drivers/CMSIS/Include/core_cm0.h **** /** + 707:Drivers/CMSIS/Include/core_cm0.h **** \brief Clear Pending Interrupt + 708:Drivers/CMSIS/Include/core_cm0.h **** \details Clears the pending bit of a device specific interrupt in the NVIC pending register. + 709:Drivers/CMSIS/Include/core_cm0.h **** \param [in] IRQn Device specific interrupt number. + 710:Drivers/CMSIS/Include/core_cm0.h **** \note IRQn must not be negative. + 711:Drivers/CMSIS/Include/core_cm0.h **** */ + 712:Drivers/CMSIS/Include/core_cm0.h **** __STATIC_INLINE void __NVIC_ClearPendingIRQ(IRQn_Type IRQn) + 713:Drivers/CMSIS/Include/core_cm0.h **** { + 714:Drivers/CMSIS/Include/core_cm0.h **** if ((int32_t)(IRQn) >= 0) + 715:Drivers/CMSIS/Include/core_cm0.h **** { + ARM GAS /tmp/ccDOWgYG.s page 14 + + + 716:Drivers/CMSIS/Include/core_cm0.h **** NVIC->ICPR[0U] = (uint32_t)(1UL << (((uint32_t)IRQn) & 0x1FUL)); + 717:Drivers/CMSIS/Include/core_cm0.h **** } + 718:Drivers/CMSIS/Include/core_cm0.h **** } + 719:Drivers/CMSIS/Include/core_cm0.h **** + 720:Drivers/CMSIS/Include/core_cm0.h **** + 721:Drivers/CMSIS/Include/core_cm0.h **** /** + 722:Drivers/CMSIS/Include/core_cm0.h **** \brief Set Interrupt Priority + 723:Drivers/CMSIS/Include/core_cm0.h **** \details Sets the priority of a device specific interrupt or a processor exception. + 724:Drivers/CMSIS/Include/core_cm0.h **** The interrupt number can be positive to specify a device specific interrupt, + 725:Drivers/CMSIS/Include/core_cm0.h **** or negative to specify a processor exception. + 726:Drivers/CMSIS/Include/core_cm0.h **** \param [in] IRQn Interrupt number. + 727:Drivers/CMSIS/Include/core_cm0.h **** \param [in] priority Priority to set. + 728:Drivers/CMSIS/Include/core_cm0.h **** \note The priority cannot be set for every processor exception. + 729:Drivers/CMSIS/Include/core_cm0.h **** */ + 730:Drivers/CMSIS/Include/core_cm0.h **** __STATIC_INLINE void __NVIC_SetPriority(IRQn_Type IRQn, uint32_t priority) + 731:Drivers/CMSIS/Include/core_cm0.h **** { + 28 .loc 2 731 1 view -0 + 29 .cfi_startproc + 30 @ args = 0, pretend = 0, frame = 0 + 31 @ frame_needed = 0, uses_anonymous_args = 0 + 32 .loc 2 731 1 is_stmt 0 view .LVU1 + 33 0000 70B5 push {r4, r5, r6, lr} + 34 .cfi_def_cfa_offset 16 + 35 .cfi_offset 4, -16 + 36 .cfi_offset 5, -12 + 37 .cfi_offset 6, -8 + 38 .cfi_offset 14, -4 + 732:Drivers/CMSIS/Include/core_cm0.h **** if ((int32_t)(IRQn) >= 0) + 39 .loc 2 732 3 is_stmt 1 view .LVU2 + 40 .loc 2 732 6 is_stmt 0 view .LVU3 + 41 0002 0028 cmp r0, #0 + 42 0004 11DB blt .L2 + 733:Drivers/CMSIS/Include/core_cm0.h **** { + 734:Drivers/CMSIS/Include/core_cm0.h **** NVIC->IP[_IP_IDX(IRQn)] = ((uint32_t)(NVIC->IP[_IP_IDX(IRQn)] & ~(0xFFUL << _BIT_SHIFT(IRQn)) + 43 .loc 2 734 5 is_stmt 1 view .LVU4 + 44 .loc 2 734 53 is_stmt 0 view .LVU5 + 45 0006 8308 lsrs r3, r0, #2 + 46 .loc 2 734 52 view .LVU6 + 47 0008 134D ldr r5, .L4 + 48 000a C033 adds r3, r3, #192 + 49 000c 9B00 lsls r3, r3, #2 + 50 000e 5C59 ldr r4, [r3, r5] + 51 .loc 2 734 83 view .LVU7 + 52 0010 0322 movs r2, #3 + 53 0012 1040 ands r0, r2 + 54 .LVL1: + 55 .loc 2 734 83 view .LVU8 + 56 0014 C000 lsls r0, r0, #3 + 57 .loc 2 734 80 view .LVU9 + 58 0016 FC32 adds r2, r2, #252 + 59 0018 1600 movs r6, r2 + 60 001a 8640 lsls r6, r6, r0 + 61 .loc 2 734 33 view .LVU10 + 62 001c B443 bics r4, r6 + 735:Drivers/CMSIS/Include/core_cm0.h **** (((priority << (8U - __NVIC_PRIO_BITS)) & (uint32_t)0xFFUL) << _BIT_SHIFT(IRQn))); + 63 .loc 2 735 20 view .LVU11 + 64 001e 8901 lsls r1, r1, #6 + ARM GAS /tmp/ccDOWgYG.s page 15 + + + 65 .LVL2: + 66 .loc 2 735 48 view .LVU12 + 67 0020 0A40 ands r2, r1 + 68 .loc 2 735 68 view .LVU13 + 69 0022 8240 lsls r2, r2, r0 + 734:Drivers/CMSIS/Include/core_cm0.h **** (((priority << (8U - __NVIC_PRIO_BITS)) & (uint32_t)0xFFUL) << _BIT_SHIFT(IRQn))); + 70 .loc 2 734 102 view .LVU14 + 71 0024 2243 orrs r2, r4 + 734:Drivers/CMSIS/Include/core_cm0.h **** (((priority << (8U - __NVIC_PRIO_BITS)) & (uint32_t)0xFFUL) << _BIT_SHIFT(IRQn))); + 72 .loc 2 734 30 view .LVU15 + 73 0026 5A51 str r2, [r3, r5] + 74 .L1: + 736:Drivers/CMSIS/Include/core_cm0.h **** } + 737:Drivers/CMSIS/Include/core_cm0.h **** else + 738:Drivers/CMSIS/Include/core_cm0.h **** { + 739:Drivers/CMSIS/Include/core_cm0.h **** SCB->SHP[_SHP_IDX(IRQn)] = ((uint32_t)(SCB->SHP[_SHP_IDX(IRQn)] & ~(0xFFUL << _BIT_SHIFT(IRQn)) + 740:Drivers/CMSIS/Include/core_cm0.h **** (((priority << (8U - __NVIC_PRIO_BITS)) & (uint32_t)0xFFUL) << _BIT_SHIFT(IRQn))); + 741:Drivers/CMSIS/Include/core_cm0.h **** } + 742:Drivers/CMSIS/Include/core_cm0.h **** } + 75 .loc 2 742 1 view .LVU16 + 76 @ sp needed + 77 0028 70BD pop {r4, r5, r6, pc} + 78 .LVL3: + 79 .L2: + 739:Drivers/CMSIS/Include/core_cm0.h **** (((priority << (8U - __NVIC_PRIO_BITS)) & (uint32_t)0xFFUL) << _BIT_SHIFT(IRQn))); + 80 .loc 2 739 5 is_stmt 1 view .LVU17 + 739:Drivers/CMSIS/Include/core_cm0.h **** (((priority << (8U - __NVIC_PRIO_BITS)) & (uint32_t)0xFFUL) << _BIT_SHIFT(IRQn))); + 81 .loc 2 739 53 is_stmt 0 view .LVU18 + 82 002a 0F23 movs r3, #15 + 83 002c 0340 ands r3, r0 + 84 002e 083B subs r3, r3, #8 + 85 0030 9B08 lsrs r3, r3, #2 + 739:Drivers/CMSIS/Include/core_cm0.h **** (((priority << (8U - __NVIC_PRIO_BITS)) & (uint32_t)0xFFUL) << _BIT_SHIFT(IRQn))); + 86 .loc 2 739 52 view .LVU19 + 87 0032 0633 adds r3, r3, #6 + 88 0034 9B00 lsls r3, r3, #2 + 89 0036 094A ldr r2, .L4+4 + 90 0038 9446 mov ip, r2 + 91 003a 6344 add r3, r3, ip + 92 003c 5C68 ldr r4, [r3, #4] + 739:Drivers/CMSIS/Include/core_cm0.h **** (((priority << (8U - __NVIC_PRIO_BITS)) & (uint32_t)0xFFUL) << _BIT_SHIFT(IRQn))); + 93 .loc 2 739 83 view .LVU20 + 94 003e 0322 movs r2, #3 + 95 0040 1040 ands r0, r2 + 96 .LVL4: + 739:Drivers/CMSIS/Include/core_cm0.h **** (((priority << (8U - __NVIC_PRIO_BITS)) & (uint32_t)0xFFUL) << _BIT_SHIFT(IRQn))); + 97 .loc 2 739 83 view .LVU21 + 98 0042 C000 lsls r0, r0, #3 + 739:Drivers/CMSIS/Include/core_cm0.h **** (((priority << (8U - __NVIC_PRIO_BITS)) & (uint32_t)0xFFUL) << _BIT_SHIFT(IRQn))); + 99 .loc 2 739 80 view .LVU22 + 100 0044 FC32 adds r2, r2, #252 + 101 0046 1500 movs r5, r2 + 102 0048 8540 lsls r5, r5, r0 + 739:Drivers/CMSIS/Include/core_cm0.h **** (((priority << (8U - __NVIC_PRIO_BITS)) & (uint32_t)0xFFUL) << _BIT_SHIFT(IRQn))); + 103 .loc 2 739 33 view .LVU23 + 104 004a AC43 bics r4, r5 + 740:Drivers/CMSIS/Include/core_cm0.h **** } + ARM GAS /tmp/ccDOWgYG.s page 16 + + + 105 .loc 2 740 20 view .LVU24 + 106 004c 8901 lsls r1, r1, #6 + 107 .LVL5: + 740:Drivers/CMSIS/Include/core_cm0.h **** } + 108 .loc 2 740 48 view .LVU25 + 109 004e 0A40 ands r2, r1 + 740:Drivers/CMSIS/Include/core_cm0.h **** } + 110 .loc 2 740 68 view .LVU26 + 111 0050 8240 lsls r2, r2, r0 + 739:Drivers/CMSIS/Include/core_cm0.h **** (((priority << (8U - __NVIC_PRIO_BITS)) & (uint32_t)0xFFUL) << _BIT_SHIFT(IRQn))); + 112 .loc 2 739 102 view .LVU27 + 113 0052 2243 orrs r2, r4 + 739:Drivers/CMSIS/Include/core_cm0.h **** (((priority << (8U - __NVIC_PRIO_BITS)) & (uint32_t)0xFFUL) << _BIT_SHIFT(IRQn))); + 114 .loc 2 739 30 view .LVU28 + 115 0054 5A60 str r2, [r3, #4] + 116 .loc 2 742 1 view .LVU29 + 117 0056 E7E7 b .L1 + 118 .L5: + 119 .align 2 + 120 .L4: + 121 0058 00E100E0 .word -536813312 + 122 005c 00ED00E0 .word -536810240 + 123 .cfi_endproc + 124 .LFE31: + 126 .section .text.__NVIC_GetPriority,"ax",%progbits + 127 .align 1 + 128 .syntax unified + 129 .code 16 + 130 .thumb_func + 132 __NVIC_GetPriority: + 133 .LVL6: + 134 .LFB32: + 743:Drivers/CMSIS/Include/core_cm0.h **** + 744:Drivers/CMSIS/Include/core_cm0.h **** + 745:Drivers/CMSIS/Include/core_cm0.h **** /** + 746:Drivers/CMSIS/Include/core_cm0.h **** \brief Get Interrupt Priority + 747:Drivers/CMSIS/Include/core_cm0.h **** \details Reads the priority of a device specific interrupt or a processor exception. + 748:Drivers/CMSIS/Include/core_cm0.h **** The interrupt number can be positive to specify a device specific interrupt, + 749:Drivers/CMSIS/Include/core_cm0.h **** or negative to specify a processor exception. + 750:Drivers/CMSIS/Include/core_cm0.h **** \param [in] IRQn Interrupt number. + 751:Drivers/CMSIS/Include/core_cm0.h **** \return Interrupt Priority. + 752:Drivers/CMSIS/Include/core_cm0.h **** Value is aligned automatically to the implemented priority bits of the microc + 753:Drivers/CMSIS/Include/core_cm0.h **** */ + 754:Drivers/CMSIS/Include/core_cm0.h **** __STATIC_INLINE uint32_t __NVIC_GetPriority(IRQn_Type IRQn) + 755:Drivers/CMSIS/Include/core_cm0.h **** { + 135 .loc 2 755 1 is_stmt 1 view -0 + 136 .cfi_startproc + 137 @ args = 0, pretend = 0, frame = 0 + 138 @ frame_needed = 0, uses_anonymous_args = 0 + 139 @ link register save eliminated. + 756:Drivers/CMSIS/Include/core_cm0.h **** + 757:Drivers/CMSIS/Include/core_cm0.h **** if ((int32_t)(IRQn) >= 0) + 140 .loc 2 757 3 view .LVU31 + 141 .loc 2 757 6 is_stmt 0 view .LVU32 + 142 0000 0028 cmp r0, #0 + 143 0002 0CDB blt .L7 + 758:Drivers/CMSIS/Include/core_cm0.h **** { + ARM GAS /tmp/ccDOWgYG.s page 17 + + + 759:Drivers/CMSIS/Include/core_cm0.h **** return((uint32_t)(((NVIC->IP[ _IP_IDX(IRQn)] >> _BIT_SHIFT(IRQn) ) & (uint32_t)0xFFUL) >> (8U - + 144 .loc 2 759 5 is_stmt 1 view .LVU33 + 145 .loc 2 759 35 is_stmt 0 view .LVU34 + 146 0004 8308 lsrs r3, r0, #2 + 147 .loc 2 759 33 view .LVU35 + 148 0006 C033 adds r3, r3, #192 + 149 0008 9B00 lsls r3, r3, #2 + 150 000a 0E4A ldr r2, .L9 + 151 000c 9B58 ldr r3, [r3, r2] + 152 .loc 2 759 53 view .LVU36 + 153 000e 0322 movs r2, #3 + 154 0010 0240 ands r2, r0 + 155 0012 D200 lsls r2, r2, #3 + 156 .loc 2 759 50 view .LVU37 + 157 0014 D340 lsrs r3, r3, r2 + 158 .loc 2 759 12 view .LVU38 + 159 0016 9B09 lsrs r3, r3, #6 + 160 0018 0320 movs r0, #3 + 161 .LVL7: + 162 .loc 2 759 12 view .LVU39 + 163 001a 1840 ands r0, r3 + 164 .L6: + 760:Drivers/CMSIS/Include/core_cm0.h **** } + 761:Drivers/CMSIS/Include/core_cm0.h **** else + 762:Drivers/CMSIS/Include/core_cm0.h **** { + 763:Drivers/CMSIS/Include/core_cm0.h **** return((uint32_t)(((SCB->SHP[_SHP_IDX(IRQn)] >> _BIT_SHIFT(IRQn) ) & (uint32_t)0xFFUL) >> (8U - + 764:Drivers/CMSIS/Include/core_cm0.h **** } + 765:Drivers/CMSIS/Include/core_cm0.h **** } + 165 .loc 2 765 1 view .LVU40 + 166 @ sp needed + 167 001c 7047 bx lr + 168 .LVL8: + 169 .L7: + 763:Drivers/CMSIS/Include/core_cm0.h **** } + 170 .loc 2 763 5 is_stmt 1 view .LVU41 + 763:Drivers/CMSIS/Include/core_cm0.h **** } + 171 .loc 2 763 34 is_stmt 0 view .LVU42 + 172 001e 0F23 movs r3, #15 + 173 0020 0340 ands r3, r0 + 174 0022 083B subs r3, r3, #8 + 175 0024 9B08 lsrs r3, r3, #2 + 763:Drivers/CMSIS/Include/core_cm0.h **** } + 176 .loc 2 763 33 view .LVU43 + 177 0026 0633 adds r3, r3, #6 + 178 0028 9B00 lsls r3, r3, #2 + 179 002a 074A ldr r2, .L9+4 + 180 002c 9446 mov ip, r2 + 181 002e 6344 add r3, r3, ip + 182 0030 5B68 ldr r3, [r3, #4] + 763:Drivers/CMSIS/Include/core_cm0.h **** } + 183 .loc 2 763 53 view .LVU44 + 184 0032 0322 movs r2, #3 + 185 0034 0240 ands r2, r0 + 186 0036 D200 lsls r2, r2, #3 + 763:Drivers/CMSIS/Include/core_cm0.h **** } + 187 .loc 2 763 50 view .LVU45 + 188 0038 D340 lsrs r3, r3, r2 + ARM GAS /tmp/ccDOWgYG.s page 18 + + + 763:Drivers/CMSIS/Include/core_cm0.h **** } + 189 .loc 2 763 12 view .LVU46 + 190 003a 9B09 lsrs r3, r3, #6 + 191 003c 0320 movs r0, #3 + 192 .LVL9: + 763:Drivers/CMSIS/Include/core_cm0.h **** } + 193 .loc 2 763 12 view .LVU47 + 194 003e 1840 ands r0, r3 + 195 0040 ECE7 b .L6 + 196 .L10: + 197 0042 C046 .align 2 + 198 .L9: + 199 0044 00E100E0 .word -536813312 + 200 0048 00ED00E0 .word -536810240 + 201 .cfi_endproc + 202 .LFE32: + 204 .section .text.__NVIC_SystemReset,"ax",%progbits + 205 .align 1 + 206 .syntax unified + 207 .code 16 + 208 .thumb_func + 210 __NVIC_SystemReset: + 211 .LFB37: + 766:Drivers/CMSIS/Include/core_cm0.h **** + 767:Drivers/CMSIS/Include/core_cm0.h **** + 768:Drivers/CMSIS/Include/core_cm0.h **** /** + 769:Drivers/CMSIS/Include/core_cm0.h **** \brief Encode Priority + 770:Drivers/CMSIS/Include/core_cm0.h **** \details Encodes the priority for an interrupt with the given priority group, + 771:Drivers/CMSIS/Include/core_cm0.h **** preemptive priority value, and subpriority value. + 772:Drivers/CMSIS/Include/core_cm0.h **** In case of a conflict between priority grouping and available + 773:Drivers/CMSIS/Include/core_cm0.h **** priority bits (__NVIC_PRIO_BITS), the smallest possible priority group is set. + 774:Drivers/CMSIS/Include/core_cm0.h **** \param [in] PriorityGroup Used priority group. + 775:Drivers/CMSIS/Include/core_cm0.h **** \param [in] PreemptPriority Preemptive priority value (starting from 0). + 776:Drivers/CMSIS/Include/core_cm0.h **** \param [in] SubPriority Subpriority value (starting from 0). + 777:Drivers/CMSIS/Include/core_cm0.h **** \return Encoded priority. Value can be used in the function \ref NVIC_SetP + 778:Drivers/CMSIS/Include/core_cm0.h **** */ + 779:Drivers/CMSIS/Include/core_cm0.h **** __STATIC_INLINE uint32_t NVIC_EncodePriority (uint32_t PriorityGroup, uint32_t PreemptPriority, uin + 780:Drivers/CMSIS/Include/core_cm0.h **** { + 781:Drivers/CMSIS/Include/core_cm0.h **** uint32_t PriorityGroupTmp = (PriorityGroup & (uint32_t)0x07UL); /* only values 0..7 are used + 782:Drivers/CMSIS/Include/core_cm0.h **** uint32_t PreemptPriorityBits; + 783:Drivers/CMSIS/Include/core_cm0.h **** uint32_t SubPriorityBits; + 784:Drivers/CMSIS/Include/core_cm0.h **** + 785:Drivers/CMSIS/Include/core_cm0.h **** PreemptPriorityBits = ((7UL - PriorityGroupTmp) > (uint32_t)(__NVIC_PRIO_BITS)) ? (uint32_t)(__NV + 786:Drivers/CMSIS/Include/core_cm0.h **** SubPriorityBits = ((PriorityGroupTmp + (uint32_t)(__NVIC_PRIO_BITS)) < (uint32_t)7UL) ? (uint + 787:Drivers/CMSIS/Include/core_cm0.h **** + 788:Drivers/CMSIS/Include/core_cm0.h **** return ( + 789:Drivers/CMSIS/Include/core_cm0.h **** ((PreemptPriority & (uint32_t)((1UL << (PreemptPriorityBits)) - 1UL)) << SubPriorityBits + 790:Drivers/CMSIS/Include/core_cm0.h **** ((SubPriority & (uint32_t)((1UL << (SubPriorityBits )) - 1UL))) + 791:Drivers/CMSIS/Include/core_cm0.h **** ); + 792:Drivers/CMSIS/Include/core_cm0.h **** } + 793:Drivers/CMSIS/Include/core_cm0.h **** + 794:Drivers/CMSIS/Include/core_cm0.h **** + 795:Drivers/CMSIS/Include/core_cm0.h **** /** + 796:Drivers/CMSIS/Include/core_cm0.h **** \brief Decode Priority + 797:Drivers/CMSIS/Include/core_cm0.h **** \details Decodes an interrupt priority value with a given priority group to + 798:Drivers/CMSIS/Include/core_cm0.h **** preemptive priority value and subpriority value. + 799:Drivers/CMSIS/Include/core_cm0.h **** In case of a conflict between priority grouping and available + ARM GAS /tmp/ccDOWgYG.s page 19 + + + 800:Drivers/CMSIS/Include/core_cm0.h **** priority bits (__NVIC_PRIO_BITS) the smallest possible priority group is set. + 801:Drivers/CMSIS/Include/core_cm0.h **** \param [in] Priority Priority value, which can be retrieved with the function \ref NVIC + 802:Drivers/CMSIS/Include/core_cm0.h **** \param [in] PriorityGroup Used priority group. + 803:Drivers/CMSIS/Include/core_cm0.h **** \param [out] pPreemptPriority Preemptive priority value (starting from 0). + 804:Drivers/CMSIS/Include/core_cm0.h **** \param [out] pSubPriority Subpriority value (starting from 0). + 805:Drivers/CMSIS/Include/core_cm0.h **** */ + 806:Drivers/CMSIS/Include/core_cm0.h **** __STATIC_INLINE void NVIC_DecodePriority (uint32_t Priority, uint32_t PriorityGroup, uint32_t* cons + 807:Drivers/CMSIS/Include/core_cm0.h **** { + 808:Drivers/CMSIS/Include/core_cm0.h **** uint32_t PriorityGroupTmp = (PriorityGroup & (uint32_t)0x07UL); /* only values 0..7 are used + 809:Drivers/CMSIS/Include/core_cm0.h **** uint32_t PreemptPriorityBits; + 810:Drivers/CMSIS/Include/core_cm0.h **** uint32_t SubPriorityBits; + 811:Drivers/CMSIS/Include/core_cm0.h **** + 812:Drivers/CMSIS/Include/core_cm0.h **** PreemptPriorityBits = ((7UL - PriorityGroupTmp) > (uint32_t)(__NVIC_PRIO_BITS)) ? (uint32_t)(__NV + 813:Drivers/CMSIS/Include/core_cm0.h **** SubPriorityBits = ((PriorityGroupTmp + (uint32_t)(__NVIC_PRIO_BITS)) < (uint32_t)7UL) ? (uint + 814:Drivers/CMSIS/Include/core_cm0.h **** + 815:Drivers/CMSIS/Include/core_cm0.h **** *pPreemptPriority = (Priority >> SubPriorityBits) & (uint32_t)((1UL << (PreemptPriorityBits)) - 1 + 816:Drivers/CMSIS/Include/core_cm0.h **** *pSubPriority = (Priority ) & (uint32_t)((1UL << (SubPriorityBits )) - 1 + 817:Drivers/CMSIS/Include/core_cm0.h **** } + 818:Drivers/CMSIS/Include/core_cm0.h **** + 819:Drivers/CMSIS/Include/core_cm0.h **** + 820:Drivers/CMSIS/Include/core_cm0.h **** + 821:Drivers/CMSIS/Include/core_cm0.h **** /** + 822:Drivers/CMSIS/Include/core_cm0.h **** \brief Set Interrupt Vector + 823:Drivers/CMSIS/Include/core_cm0.h **** \details Sets an interrupt vector in SRAM based interrupt vector table. + 824:Drivers/CMSIS/Include/core_cm0.h **** The interrupt number can be positive to specify a device specific interrupt, + 825:Drivers/CMSIS/Include/core_cm0.h **** or negative to specify a processor exception. + 826:Drivers/CMSIS/Include/core_cm0.h **** Address 0 must be mapped to SRAM. + 827:Drivers/CMSIS/Include/core_cm0.h **** \param [in] IRQn Interrupt number + 828:Drivers/CMSIS/Include/core_cm0.h **** \param [in] vector Address of interrupt handler function + 829:Drivers/CMSIS/Include/core_cm0.h **** */ + 830:Drivers/CMSIS/Include/core_cm0.h **** __STATIC_INLINE void __NVIC_SetVector(IRQn_Type IRQn, uint32_t vector) + 831:Drivers/CMSIS/Include/core_cm0.h **** { + 832:Drivers/CMSIS/Include/core_cm0.h **** uint32_t *vectors = (uint32_t *)0x0U; + 833:Drivers/CMSIS/Include/core_cm0.h **** vectors[(int32_t)IRQn + NVIC_USER_IRQ_OFFSET] = vector; + 834:Drivers/CMSIS/Include/core_cm0.h **** } + 835:Drivers/CMSIS/Include/core_cm0.h **** + 836:Drivers/CMSIS/Include/core_cm0.h **** + 837:Drivers/CMSIS/Include/core_cm0.h **** /** + 838:Drivers/CMSIS/Include/core_cm0.h **** \brief Get Interrupt Vector + 839:Drivers/CMSIS/Include/core_cm0.h **** \details Reads an interrupt vector from interrupt vector table. + 840:Drivers/CMSIS/Include/core_cm0.h **** The interrupt number can be positive to specify a device specific interrupt, + 841:Drivers/CMSIS/Include/core_cm0.h **** or negative to specify a processor exception. + 842:Drivers/CMSIS/Include/core_cm0.h **** \param [in] IRQn Interrupt number. + 843:Drivers/CMSIS/Include/core_cm0.h **** \return Address of interrupt handler function + 844:Drivers/CMSIS/Include/core_cm0.h **** */ + 845:Drivers/CMSIS/Include/core_cm0.h **** __STATIC_INLINE uint32_t __NVIC_GetVector(IRQn_Type IRQn) + 846:Drivers/CMSIS/Include/core_cm0.h **** { + 847:Drivers/CMSIS/Include/core_cm0.h **** uint32_t *vectors = (uint32_t *)0x0U; + 848:Drivers/CMSIS/Include/core_cm0.h **** return vectors[(int32_t)IRQn + NVIC_USER_IRQ_OFFSET]; + 849:Drivers/CMSIS/Include/core_cm0.h **** } + 850:Drivers/CMSIS/Include/core_cm0.h **** + 851:Drivers/CMSIS/Include/core_cm0.h **** + 852:Drivers/CMSIS/Include/core_cm0.h **** /** + 853:Drivers/CMSIS/Include/core_cm0.h **** \brief System Reset + 854:Drivers/CMSIS/Include/core_cm0.h **** \details Initiates a system reset request to reset the MCU. + 855:Drivers/CMSIS/Include/core_cm0.h **** */ + 856:Drivers/CMSIS/Include/core_cm0.h **** __NO_RETURN __STATIC_INLINE void __NVIC_SystemReset(void) + ARM GAS /tmp/ccDOWgYG.s page 20 + + + 857:Drivers/CMSIS/Include/core_cm0.h **** { + 212 .loc 2 857 1 is_stmt 1 view -0 + 213 .cfi_startproc + 214 @ Volatile: function does not return. + 215 @ args = 0, pretend = 0, frame = 0 + 216 @ frame_needed = 0, uses_anonymous_args = 0 + 217 @ link register save eliminated. + 858:Drivers/CMSIS/Include/core_cm0.h **** __DSB(); /* Ensure all outstanding memor + 218 .loc 2 858 3 view .LVU49 + 219 .LBB26: + 220 .LBI26: + 221 .file 3 "Drivers/CMSIS/Include/cmsis_gcc.h" + 1:Drivers/CMSIS/Include/cmsis_gcc.h **** /**************************************************************************//** + 2:Drivers/CMSIS/Include/cmsis_gcc.h **** * @file cmsis_gcc.h + 3:Drivers/CMSIS/Include/cmsis_gcc.h **** * @brief CMSIS compiler GCC header file + 4:Drivers/CMSIS/Include/cmsis_gcc.h **** * @version V5.0.4 + 5:Drivers/CMSIS/Include/cmsis_gcc.h **** * @date 09. April 2018 + 6:Drivers/CMSIS/Include/cmsis_gcc.h **** ******************************************************************************/ + 7:Drivers/CMSIS/Include/cmsis_gcc.h **** /* + 8:Drivers/CMSIS/Include/cmsis_gcc.h **** * Copyright (c) 2009-2018 Arm Limited. All rights reserved. + 9:Drivers/CMSIS/Include/cmsis_gcc.h **** * + 10:Drivers/CMSIS/Include/cmsis_gcc.h **** * SPDX-License-Identifier: Apache-2.0 + 11:Drivers/CMSIS/Include/cmsis_gcc.h **** * + 12:Drivers/CMSIS/Include/cmsis_gcc.h **** * Licensed under the Apache License, Version 2.0 (the License); you may + 13:Drivers/CMSIS/Include/cmsis_gcc.h **** * not use this file except in compliance with the License. + 14:Drivers/CMSIS/Include/cmsis_gcc.h **** * You may obtain a copy of the License at + 15:Drivers/CMSIS/Include/cmsis_gcc.h **** * + 16:Drivers/CMSIS/Include/cmsis_gcc.h **** * www.apache.org/licenses/LICENSE-2.0 + 17:Drivers/CMSIS/Include/cmsis_gcc.h **** * + 18:Drivers/CMSIS/Include/cmsis_gcc.h **** * Unless required by applicable law or agreed to in writing, software + 19:Drivers/CMSIS/Include/cmsis_gcc.h **** * distributed under the License is distributed on an AS IS BASIS, WITHOUT + 20:Drivers/CMSIS/Include/cmsis_gcc.h **** * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. + 21:Drivers/CMSIS/Include/cmsis_gcc.h **** * See the License for the specific language governing permissions and + 22:Drivers/CMSIS/Include/cmsis_gcc.h **** * limitations under the License. + 23:Drivers/CMSIS/Include/cmsis_gcc.h **** */ + 24:Drivers/CMSIS/Include/cmsis_gcc.h **** + 25:Drivers/CMSIS/Include/cmsis_gcc.h **** #ifndef __CMSIS_GCC_H + 26:Drivers/CMSIS/Include/cmsis_gcc.h **** #define __CMSIS_GCC_H + 27:Drivers/CMSIS/Include/cmsis_gcc.h **** + 28:Drivers/CMSIS/Include/cmsis_gcc.h **** /* ignore some GCC warnings */ + 29:Drivers/CMSIS/Include/cmsis_gcc.h **** #pragma GCC diagnostic push + 30:Drivers/CMSIS/Include/cmsis_gcc.h **** #pragma GCC diagnostic ignored "-Wsign-conversion" + 31:Drivers/CMSIS/Include/cmsis_gcc.h **** #pragma GCC diagnostic ignored "-Wconversion" + 32:Drivers/CMSIS/Include/cmsis_gcc.h **** #pragma GCC diagnostic ignored "-Wunused-parameter" + 33:Drivers/CMSIS/Include/cmsis_gcc.h **** + 34:Drivers/CMSIS/Include/cmsis_gcc.h **** /* Fallback for __has_builtin */ + 35:Drivers/CMSIS/Include/cmsis_gcc.h **** #ifndef __has_builtin + 36:Drivers/CMSIS/Include/cmsis_gcc.h **** #define __has_builtin(x) (0) + 37:Drivers/CMSIS/Include/cmsis_gcc.h **** #endif + 38:Drivers/CMSIS/Include/cmsis_gcc.h **** + 39:Drivers/CMSIS/Include/cmsis_gcc.h **** /* CMSIS compiler specific defines */ + 40:Drivers/CMSIS/Include/cmsis_gcc.h **** #ifndef __ASM + 41:Drivers/CMSIS/Include/cmsis_gcc.h **** #define __ASM __asm + 42:Drivers/CMSIS/Include/cmsis_gcc.h **** #endif + 43:Drivers/CMSIS/Include/cmsis_gcc.h **** #ifndef __INLINE + 44:Drivers/CMSIS/Include/cmsis_gcc.h **** #define __INLINE inline + 45:Drivers/CMSIS/Include/cmsis_gcc.h **** #endif + ARM GAS /tmp/ccDOWgYG.s page 21 + + + 46:Drivers/CMSIS/Include/cmsis_gcc.h **** #ifndef __STATIC_INLINE + 47:Drivers/CMSIS/Include/cmsis_gcc.h **** #define __STATIC_INLINE static inline + 48:Drivers/CMSIS/Include/cmsis_gcc.h **** #endif + 49:Drivers/CMSIS/Include/cmsis_gcc.h **** #ifndef __STATIC_FORCEINLINE + 50:Drivers/CMSIS/Include/cmsis_gcc.h **** #define __STATIC_FORCEINLINE __attribute__((always_inline)) static inline + 51:Drivers/CMSIS/Include/cmsis_gcc.h **** #endif + 52:Drivers/CMSIS/Include/cmsis_gcc.h **** #ifndef __NO_RETURN + 53:Drivers/CMSIS/Include/cmsis_gcc.h **** #define __NO_RETURN __attribute__((__noreturn__)) + 54:Drivers/CMSIS/Include/cmsis_gcc.h **** #endif + 55:Drivers/CMSIS/Include/cmsis_gcc.h **** #ifndef __USED + 56:Drivers/CMSIS/Include/cmsis_gcc.h **** #define __USED __attribute__((used)) + 57:Drivers/CMSIS/Include/cmsis_gcc.h **** #endif + 58:Drivers/CMSIS/Include/cmsis_gcc.h **** #ifndef __WEAK + 59:Drivers/CMSIS/Include/cmsis_gcc.h **** #define __WEAK __attribute__((weak)) + 60:Drivers/CMSIS/Include/cmsis_gcc.h **** #endif + 61:Drivers/CMSIS/Include/cmsis_gcc.h **** #ifndef __PACKED + 62:Drivers/CMSIS/Include/cmsis_gcc.h **** #define __PACKED __attribute__((packed, aligned(1))) + 63:Drivers/CMSIS/Include/cmsis_gcc.h **** #endif + 64:Drivers/CMSIS/Include/cmsis_gcc.h **** #ifndef __PACKED_STRUCT + 65:Drivers/CMSIS/Include/cmsis_gcc.h **** #define __PACKED_STRUCT struct __attribute__((packed, aligned(1))) + 66:Drivers/CMSIS/Include/cmsis_gcc.h **** #endif + 67:Drivers/CMSIS/Include/cmsis_gcc.h **** #ifndef __PACKED_UNION + 68:Drivers/CMSIS/Include/cmsis_gcc.h **** #define __PACKED_UNION union __attribute__((packed, aligned(1))) + 69:Drivers/CMSIS/Include/cmsis_gcc.h **** #endif + 70:Drivers/CMSIS/Include/cmsis_gcc.h **** #ifndef __UNALIGNED_UINT32 /* deprecated */ + 71:Drivers/CMSIS/Include/cmsis_gcc.h **** #pragma GCC diagnostic push + 72:Drivers/CMSIS/Include/cmsis_gcc.h **** #pragma GCC diagnostic ignored "-Wpacked" + 73:Drivers/CMSIS/Include/cmsis_gcc.h **** #pragma GCC diagnostic ignored "-Wattributes" + 74:Drivers/CMSIS/Include/cmsis_gcc.h **** struct __attribute__((packed)) T_UINT32 { uint32_t v; }; + 75:Drivers/CMSIS/Include/cmsis_gcc.h **** #pragma GCC diagnostic pop + 76:Drivers/CMSIS/Include/cmsis_gcc.h **** #define __UNALIGNED_UINT32(x) (((struct T_UINT32 *)(x))->v) + 77:Drivers/CMSIS/Include/cmsis_gcc.h **** #endif + 78:Drivers/CMSIS/Include/cmsis_gcc.h **** #ifndef __UNALIGNED_UINT16_WRITE + 79:Drivers/CMSIS/Include/cmsis_gcc.h **** #pragma GCC diagnostic push + 80:Drivers/CMSIS/Include/cmsis_gcc.h **** #pragma GCC diagnostic ignored "-Wpacked" + 81:Drivers/CMSIS/Include/cmsis_gcc.h **** #pragma GCC diagnostic ignored "-Wattributes" + 82:Drivers/CMSIS/Include/cmsis_gcc.h **** __PACKED_STRUCT T_UINT16_WRITE { uint16_t v; }; + 83:Drivers/CMSIS/Include/cmsis_gcc.h **** #pragma GCC diagnostic pop + 84:Drivers/CMSIS/Include/cmsis_gcc.h **** #define __UNALIGNED_UINT16_WRITE(addr, val) (void)((((struct T_UINT16_WRITE *)(void *)(addr))- + 85:Drivers/CMSIS/Include/cmsis_gcc.h **** #endif + 86:Drivers/CMSIS/Include/cmsis_gcc.h **** #ifndef __UNALIGNED_UINT16_READ + 87:Drivers/CMSIS/Include/cmsis_gcc.h **** #pragma GCC diagnostic push + 88:Drivers/CMSIS/Include/cmsis_gcc.h **** #pragma GCC diagnostic ignored "-Wpacked" + 89:Drivers/CMSIS/Include/cmsis_gcc.h **** #pragma GCC diagnostic ignored "-Wattributes" + 90:Drivers/CMSIS/Include/cmsis_gcc.h **** __PACKED_STRUCT T_UINT16_READ { uint16_t v; }; + 91:Drivers/CMSIS/Include/cmsis_gcc.h **** #pragma GCC diagnostic pop + 92:Drivers/CMSIS/Include/cmsis_gcc.h **** #define __UNALIGNED_UINT16_READ(addr) (((const struct T_UINT16_READ *)(const void *)(add + 93:Drivers/CMSIS/Include/cmsis_gcc.h **** #endif + 94:Drivers/CMSIS/Include/cmsis_gcc.h **** #ifndef __UNALIGNED_UINT32_WRITE + 95:Drivers/CMSIS/Include/cmsis_gcc.h **** #pragma GCC diagnostic push + 96:Drivers/CMSIS/Include/cmsis_gcc.h **** #pragma GCC diagnostic ignored "-Wpacked" + 97:Drivers/CMSIS/Include/cmsis_gcc.h **** #pragma GCC diagnostic ignored "-Wattributes" + 98:Drivers/CMSIS/Include/cmsis_gcc.h **** __PACKED_STRUCT T_UINT32_WRITE { uint32_t v; }; + 99:Drivers/CMSIS/Include/cmsis_gcc.h **** #pragma GCC diagnostic pop + 100:Drivers/CMSIS/Include/cmsis_gcc.h **** #define __UNALIGNED_UINT32_WRITE(addr, val) (void)((((struct T_UINT32_WRITE *)(void *)(addr))- + 101:Drivers/CMSIS/Include/cmsis_gcc.h **** #endif + 102:Drivers/CMSIS/Include/cmsis_gcc.h **** #ifndef __UNALIGNED_UINT32_READ + ARM GAS /tmp/ccDOWgYG.s page 22 + + + 103:Drivers/CMSIS/Include/cmsis_gcc.h **** #pragma GCC diagnostic push + 104:Drivers/CMSIS/Include/cmsis_gcc.h **** #pragma GCC diagnostic ignored "-Wpacked" + 105:Drivers/CMSIS/Include/cmsis_gcc.h **** #pragma GCC diagnostic ignored "-Wattributes" + 106:Drivers/CMSIS/Include/cmsis_gcc.h **** __PACKED_STRUCT T_UINT32_READ { uint32_t v; }; + 107:Drivers/CMSIS/Include/cmsis_gcc.h **** #pragma GCC diagnostic pop + 108:Drivers/CMSIS/Include/cmsis_gcc.h **** #define __UNALIGNED_UINT32_READ(addr) (((const struct T_UINT32_READ *)(const void *)(add + 109:Drivers/CMSIS/Include/cmsis_gcc.h **** #endif + 110:Drivers/CMSIS/Include/cmsis_gcc.h **** #ifndef __ALIGNED + 111:Drivers/CMSIS/Include/cmsis_gcc.h **** #define __ALIGNED(x) __attribute__((aligned(x))) + 112:Drivers/CMSIS/Include/cmsis_gcc.h **** #endif + 113:Drivers/CMSIS/Include/cmsis_gcc.h **** #ifndef __RESTRICT + 114:Drivers/CMSIS/Include/cmsis_gcc.h **** #define __RESTRICT __restrict + 115:Drivers/CMSIS/Include/cmsis_gcc.h **** #endif + 116:Drivers/CMSIS/Include/cmsis_gcc.h **** + 117:Drivers/CMSIS/Include/cmsis_gcc.h **** + 118:Drivers/CMSIS/Include/cmsis_gcc.h **** /* ########################### Core Function Access ########################### */ + 119:Drivers/CMSIS/Include/cmsis_gcc.h **** /** \ingroup CMSIS_Core_FunctionInterface + 120:Drivers/CMSIS/Include/cmsis_gcc.h **** \defgroup CMSIS_Core_RegAccFunctions CMSIS Core Register Access Functions + 121:Drivers/CMSIS/Include/cmsis_gcc.h **** @{ + 122:Drivers/CMSIS/Include/cmsis_gcc.h **** */ + 123:Drivers/CMSIS/Include/cmsis_gcc.h **** + 124:Drivers/CMSIS/Include/cmsis_gcc.h **** /** + 125:Drivers/CMSIS/Include/cmsis_gcc.h **** \brief Enable IRQ Interrupts + 126:Drivers/CMSIS/Include/cmsis_gcc.h **** \details Enables IRQ interrupts by clearing the I-bit in the CPSR. + 127:Drivers/CMSIS/Include/cmsis_gcc.h **** Can only be executed in Privileged modes. + 128:Drivers/CMSIS/Include/cmsis_gcc.h **** */ + 129:Drivers/CMSIS/Include/cmsis_gcc.h **** __STATIC_FORCEINLINE void __enable_irq(void) + 130:Drivers/CMSIS/Include/cmsis_gcc.h **** { + 131:Drivers/CMSIS/Include/cmsis_gcc.h **** __ASM volatile ("cpsie i" : : : "memory"); + 132:Drivers/CMSIS/Include/cmsis_gcc.h **** } + 133:Drivers/CMSIS/Include/cmsis_gcc.h **** + 134:Drivers/CMSIS/Include/cmsis_gcc.h **** + 135:Drivers/CMSIS/Include/cmsis_gcc.h **** /** + 136:Drivers/CMSIS/Include/cmsis_gcc.h **** \brief Disable IRQ Interrupts + 137:Drivers/CMSIS/Include/cmsis_gcc.h **** \details Disables IRQ interrupts by setting the I-bit in the CPSR. + 138:Drivers/CMSIS/Include/cmsis_gcc.h **** Can only be executed in Privileged modes. + 139:Drivers/CMSIS/Include/cmsis_gcc.h **** */ + 140:Drivers/CMSIS/Include/cmsis_gcc.h **** __STATIC_FORCEINLINE void __disable_irq(void) + 141:Drivers/CMSIS/Include/cmsis_gcc.h **** { + 142:Drivers/CMSIS/Include/cmsis_gcc.h **** __ASM volatile ("cpsid i" : : : "memory"); + 143:Drivers/CMSIS/Include/cmsis_gcc.h **** } + 144:Drivers/CMSIS/Include/cmsis_gcc.h **** + 145:Drivers/CMSIS/Include/cmsis_gcc.h **** + 146:Drivers/CMSIS/Include/cmsis_gcc.h **** /** + 147:Drivers/CMSIS/Include/cmsis_gcc.h **** \brief Get Control Register + 148:Drivers/CMSIS/Include/cmsis_gcc.h **** \details Returns the content of the Control Register. + 149:Drivers/CMSIS/Include/cmsis_gcc.h **** \return Control Register value + 150:Drivers/CMSIS/Include/cmsis_gcc.h **** */ + 151:Drivers/CMSIS/Include/cmsis_gcc.h **** __STATIC_FORCEINLINE uint32_t __get_CONTROL(void) + 152:Drivers/CMSIS/Include/cmsis_gcc.h **** { + 153:Drivers/CMSIS/Include/cmsis_gcc.h **** uint32_t result; + 154:Drivers/CMSIS/Include/cmsis_gcc.h **** + 155:Drivers/CMSIS/Include/cmsis_gcc.h **** __ASM volatile ("MRS %0, control" : "=r" (result) ); + 156:Drivers/CMSIS/Include/cmsis_gcc.h **** return(result); + 157:Drivers/CMSIS/Include/cmsis_gcc.h **** } + 158:Drivers/CMSIS/Include/cmsis_gcc.h **** + 159:Drivers/CMSIS/Include/cmsis_gcc.h **** + ARM GAS /tmp/ccDOWgYG.s page 23 + + + 160:Drivers/CMSIS/Include/cmsis_gcc.h **** #if (defined (__ARM_FEATURE_CMSE ) && (__ARM_FEATURE_CMSE == 3)) + 161:Drivers/CMSIS/Include/cmsis_gcc.h **** /** + 162:Drivers/CMSIS/Include/cmsis_gcc.h **** \brief Get Control Register (non-secure) + 163:Drivers/CMSIS/Include/cmsis_gcc.h **** \details Returns the content of the non-secure Control Register when in secure mode. + 164:Drivers/CMSIS/Include/cmsis_gcc.h **** \return non-secure Control Register value + 165:Drivers/CMSIS/Include/cmsis_gcc.h **** */ + 166:Drivers/CMSIS/Include/cmsis_gcc.h **** __STATIC_FORCEINLINE uint32_t __TZ_get_CONTROL_NS(void) + 167:Drivers/CMSIS/Include/cmsis_gcc.h **** { + 168:Drivers/CMSIS/Include/cmsis_gcc.h **** uint32_t result; + 169:Drivers/CMSIS/Include/cmsis_gcc.h **** + 170:Drivers/CMSIS/Include/cmsis_gcc.h **** __ASM volatile ("MRS %0, control_ns" : "=r" (result) ); + 171:Drivers/CMSIS/Include/cmsis_gcc.h **** return(result); + 172:Drivers/CMSIS/Include/cmsis_gcc.h **** } + 173:Drivers/CMSIS/Include/cmsis_gcc.h **** #endif + 174:Drivers/CMSIS/Include/cmsis_gcc.h **** + 175:Drivers/CMSIS/Include/cmsis_gcc.h **** + 176:Drivers/CMSIS/Include/cmsis_gcc.h **** /** + 177:Drivers/CMSIS/Include/cmsis_gcc.h **** \brief Set Control Register + 178:Drivers/CMSIS/Include/cmsis_gcc.h **** \details Writes the given value to the Control Register. + 179:Drivers/CMSIS/Include/cmsis_gcc.h **** \param [in] control Control Register value to set + 180:Drivers/CMSIS/Include/cmsis_gcc.h **** */ + 181:Drivers/CMSIS/Include/cmsis_gcc.h **** __STATIC_FORCEINLINE void __set_CONTROL(uint32_t control) + 182:Drivers/CMSIS/Include/cmsis_gcc.h **** { + 183:Drivers/CMSIS/Include/cmsis_gcc.h **** __ASM volatile ("MSR control, %0" : : "r" (control) : "memory"); + 184:Drivers/CMSIS/Include/cmsis_gcc.h **** } + 185:Drivers/CMSIS/Include/cmsis_gcc.h **** + 186:Drivers/CMSIS/Include/cmsis_gcc.h **** + 187:Drivers/CMSIS/Include/cmsis_gcc.h **** #if (defined (__ARM_FEATURE_CMSE ) && (__ARM_FEATURE_CMSE == 3)) + 188:Drivers/CMSIS/Include/cmsis_gcc.h **** /** + 189:Drivers/CMSIS/Include/cmsis_gcc.h **** \brief Set Control Register (non-secure) + 190:Drivers/CMSIS/Include/cmsis_gcc.h **** \details Writes the given value to the non-secure Control Register when in secure state. + 191:Drivers/CMSIS/Include/cmsis_gcc.h **** \param [in] control Control Register value to set + 192:Drivers/CMSIS/Include/cmsis_gcc.h **** */ + 193:Drivers/CMSIS/Include/cmsis_gcc.h **** __STATIC_FORCEINLINE void __TZ_set_CONTROL_NS(uint32_t control) + 194:Drivers/CMSIS/Include/cmsis_gcc.h **** { + 195:Drivers/CMSIS/Include/cmsis_gcc.h **** __ASM volatile ("MSR control_ns, %0" : : "r" (control) : "memory"); + 196:Drivers/CMSIS/Include/cmsis_gcc.h **** } + 197:Drivers/CMSIS/Include/cmsis_gcc.h **** #endif + 198:Drivers/CMSIS/Include/cmsis_gcc.h **** + 199:Drivers/CMSIS/Include/cmsis_gcc.h **** + 200:Drivers/CMSIS/Include/cmsis_gcc.h **** /** + 201:Drivers/CMSIS/Include/cmsis_gcc.h **** \brief Get IPSR Register + 202:Drivers/CMSIS/Include/cmsis_gcc.h **** \details Returns the content of the IPSR Register. + 203:Drivers/CMSIS/Include/cmsis_gcc.h **** \return IPSR Register value + 204:Drivers/CMSIS/Include/cmsis_gcc.h **** */ + 205:Drivers/CMSIS/Include/cmsis_gcc.h **** __STATIC_FORCEINLINE uint32_t __get_IPSR(void) + 206:Drivers/CMSIS/Include/cmsis_gcc.h **** { + 207:Drivers/CMSIS/Include/cmsis_gcc.h **** uint32_t result; + 208:Drivers/CMSIS/Include/cmsis_gcc.h **** + 209:Drivers/CMSIS/Include/cmsis_gcc.h **** __ASM volatile ("MRS %0, ipsr" : "=r" (result) ); + 210:Drivers/CMSIS/Include/cmsis_gcc.h **** return(result); + 211:Drivers/CMSIS/Include/cmsis_gcc.h **** } + 212:Drivers/CMSIS/Include/cmsis_gcc.h **** + 213:Drivers/CMSIS/Include/cmsis_gcc.h **** + 214:Drivers/CMSIS/Include/cmsis_gcc.h **** /** + 215:Drivers/CMSIS/Include/cmsis_gcc.h **** \brief Get APSR Register + 216:Drivers/CMSIS/Include/cmsis_gcc.h **** \details Returns the content of the APSR Register. + ARM GAS /tmp/ccDOWgYG.s page 24 + + + 217:Drivers/CMSIS/Include/cmsis_gcc.h **** \return APSR Register value + 218:Drivers/CMSIS/Include/cmsis_gcc.h **** */ + 219:Drivers/CMSIS/Include/cmsis_gcc.h **** __STATIC_FORCEINLINE uint32_t __get_APSR(void) + 220:Drivers/CMSIS/Include/cmsis_gcc.h **** { + 221:Drivers/CMSIS/Include/cmsis_gcc.h **** uint32_t result; + 222:Drivers/CMSIS/Include/cmsis_gcc.h **** + 223:Drivers/CMSIS/Include/cmsis_gcc.h **** __ASM volatile ("MRS %0, apsr" : "=r" (result) ); + 224:Drivers/CMSIS/Include/cmsis_gcc.h **** return(result); + 225:Drivers/CMSIS/Include/cmsis_gcc.h **** } + 226:Drivers/CMSIS/Include/cmsis_gcc.h **** + 227:Drivers/CMSIS/Include/cmsis_gcc.h **** + 228:Drivers/CMSIS/Include/cmsis_gcc.h **** /** + 229:Drivers/CMSIS/Include/cmsis_gcc.h **** \brief Get xPSR Register + 230:Drivers/CMSIS/Include/cmsis_gcc.h **** \details Returns the content of the xPSR Register. + 231:Drivers/CMSIS/Include/cmsis_gcc.h **** \return xPSR Register value + 232:Drivers/CMSIS/Include/cmsis_gcc.h **** */ + 233:Drivers/CMSIS/Include/cmsis_gcc.h **** __STATIC_FORCEINLINE uint32_t __get_xPSR(void) + 234:Drivers/CMSIS/Include/cmsis_gcc.h **** { + 235:Drivers/CMSIS/Include/cmsis_gcc.h **** uint32_t result; + 236:Drivers/CMSIS/Include/cmsis_gcc.h **** + 237:Drivers/CMSIS/Include/cmsis_gcc.h **** __ASM volatile ("MRS %0, xpsr" : "=r" (result) ); + 238:Drivers/CMSIS/Include/cmsis_gcc.h **** return(result); + 239:Drivers/CMSIS/Include/cmsis_gcc.h **** } + 240:Drivers/CMSIS/Include/cmsis_gcc.h **** + 241:Drivers/CMSIS/Include/cmsis_gcc.h **** + 242:Drivers/CMSIS/Include/cmsis_gcc.h **** /** + 243:Drivers/CMSIS/Include/cmsis_gcc.h **** \brief Get Process Stack Pointer + 244:Drivers/CMSIS/Include/cmsis_gcc.h **** \details Returns the current value of the Process Stack Pointer (PSP). + 245:Drivers/CMSIS/Include/cmsis_gcc.h **** \return PSP Register value + 246:Drivers/CMSIS/Include/cmsis_gcc.h **** */ + 247:Drivers/CMSIS/Include/cmsis_gcc.h **** __STATIC_FORCEINLINE uint32_t __get_PSP(void) + 248:Drivers/CMSIS/Include/cmsis_gcc.h **** { + 249:Drivers/CMSIS/Include/cmsis_gcc.h **** uint32_t result; + 250:Drivers/CMSIS/Include/cmsis_gcc.h **** + 251:Drivers/CMSIS/Include/cmsis_gcc.h **** __ASM volatile ("MRS %0, psp" : "=r" (result) ); + 252:Drivers/CMSIS/Include/cmsis_gcc.h **** return(result); + 253:Drivers/CMSIS/Include/cmsis_gcc.h **** } + 254:Drivers/CMSIS/Include/cmsis_gcc.h **** + 255:Drivers/CMSIS/Include/cmsis_gcc.h **** + 256:Drivers/CMSIS/Include/cmsis_gcc.h **** #if (defined (__ARM_FEATURE_CMSE ) && (__ARM_FEATURE_CMSE == 3)) + 257:Drivers/CMSIS/Include/cmsis_gcc.h **** /** + 258:Drivers/CMSIS/Include/cmsis_gcc.h **** \brief Get Process Stack Pointer (non-secure) + 259:Drivers/CMSIS/Include/cmsis_gcc.h **** \details Returns the current value of the non-secure Process Stack Pointer (PSP) when in secure s + 260:Drivers/CMSIS/Include/cmsis_gcc.h **** \return PSP Register value + 261:Drivers/CMSIS/Include/cmsis_gcc.h **** */ + 262:Drivers/CMSIS/Include/cmsis_gcc.h **** __STATIC_FORCEINLINE uint32_t __TZ_get_PSP_NS(void) + 263:Drivers/CMSIS/Include/cmsis_gcc.h **** { + 264:Drivers/CMSIS/Include/cmsis_gcc.h **** uint32_t result; + 265:Drivers/CMSIS/Include/cmsis_gcc.h **** + 266:Drivers/CMSIS/Include/cmsis_gcc.h **** __ASM volatile ("MRS %0, psp_ns" : "=r" (result) ); + 267:Drivers/CMSIS/Include/cmsis_gcc.h **** return(result); + 268:Drivers/CMSIS/Include/cmsis_gcc.h **** } + 269:Drivers/CMSIS/Include/cmsis_gcc.h **** #endif + 270:Drivers/CMSIS/Include/cmsis_gcc.h **** + 271:Drivers/CMSIS/Include/cmsis_gcc.h **** + 272:Drivers/CMSIS/Include/cmsis_gcc.h **** /** + 273:Drivers/CMSIS/Include/cmsis_gcc.h **** \brief Set Process Stack Pointer + ARM GAS /tmp/ccDOWgYG.s page 25 + + + 274:Drivers/CMSIS/Include/cmsis_gcc.h **** \details Assigns the given value to the Process Stack Pointer (PSP). + 275:Drivers/CMSIS/Include/cmsis_gcc.h **** \param [in] topOfProcStack Process Stack Pointer value to set + 276:Drivers/CMSIS/Include/cmsis_gcc.h **** */ + 277:Drivers/CMSIS/Include/cmsis_gcc.h **** __STATIC_FORCEINLINE void __set_PSP(uint32_t topOfProcStack) + 278:Drivers/CMSIS/Include/cmsis_gcc.h **** { + 279:Drivers/CMSIS/Include/cmsis_gcc.h **** __ASM volatile ("MSR psp, %0" : : "r" (topOfProcStack) : ); + 280:Drivers/CMSIS/Include/cmsis_gcc.h **** } + 281:Drivers/CMSIS/Include/cmsis_gcc.h **** + 282:Drivers/CMSIS/Include/cmsis_gcc.h **** + 283:Drivers/CMSIS/Include/cmsis_gcc.h **** #if (defined (__ARM_FEATURE_CMSE ) && (__ARM_FEATURE_CMSE == 3)) + 284:Drivers/CMSIS/Include/cmsis_gcc.h **** /** + 285:Drivers/CMSIS/Include/cmsis_gcc.h **** \brief Set Process Stack Pointer (non-secure) + 286:Drivers/CMSIS/Include/cmsis_gcc.h **** \details Assigns the given value to the non-secure Process Stack Pointer (PSP) when in secure sta + 287:Drivers/CMSIS/Include/cmsis_gcc.h **** \param [in] topOfProcStack Process Stack Pointer value to set + 288:Drivers/CMSIS/Include/cmsis_gcc.h **** */ + 289:Drivers/CMSIS/Include/cmsis_gcc.h **** __STATIC_FORCEINLINE void __TZ_set_PSP_NS(uint32_t topOfProcStack) + 290:Drivers/CMSIS/Include/cmsis_gcc.h **** { + 291:Drivers/CMSIS/Include/cmsis_gcc.h **** __ASM volatile ("MSR psp_ns, %0" : : "r" (topOfProcStack) : ); + 292:Drivers/CMSIS/Include/cmsis_gcc.h **** } + 293:Drivers/CMSIS/Include/cmsis_gcc.h **** #endif + 294:Drivers/CMSIS/Include/cmsis_gcc.h **** + 295:Drivers/CMSIS/Include/cmsis_gcc.h **** + 296:Drivers/CMSIS/Include/cmsis_gcc.h **** /** + 297:Drivers/CMSIS/Include/cmsis_gcc.h **** \brief Get Main Stack Pointer + 298:Drivers/CMSIS/Include/cmsis_gcc.h **** \details Returns the current value of the Main Stack Pointer (MSP). + 299:Drivers/CMSIS/Include/cmsis_gcc.h **** \return MSP Register value + 300:Drivers/CMSIS/Include/cmsis_gcc.h **** */ + 301:Drivers/CMSIS/Include/cmsis_gcc.h **** __STATIC_FORCEINLINE uint32_t __get_MSP(void) + 302:Drivers/CMSIS/Include/cmsis_gcc.h **** { + 303:Drivers/CMSIS/Include/cmsis_gcc.h **** uint32_t result; + 304:Drivers/CMSIS/Include/cmsis_gcc.h **** + 305:Drivers/CMSIS/Include/cmsis_gcc.h **** __ASM volatile ("MRS %0, msp" : "=r" (result) ); + 306:Drivers/CMSIS/Include/cmsis_gcc.h **** return(result); + 307:Drivers/CMSIS/Include/cmsis_gcc.h **** } + 308:Drivers/CMSIS/Include/cmsis_gcc.h **** + 309:Drivers/CMSIS/Include/cmsis_gcc.h **** + 310:Drivers/CMSIS/Include/cmsis_gcc.h **** #if (defined (__ARM_FEATURE_CMSE ) && (__ARM_FEATURE_CMSE == 3)) + 311:Drivers/CMSIS/Include/cmsis_gcc.h **** /** + 312:Drivers/CMSIS/Include/cmsis_gcc.h **** \brief Get Main Stack Pointer (non-secure) + 313:Drivers/CMSIS/Include/cmsis_gcc.h **** \details Returns the current value of the non-secure Main Stack Pointer (MSP) when in secure stat + 314:Drivers/CMSIS/Include/cmsis_gcc.h **** \return MSP Register value + 315:Drivers/CMSIS/Include/cmsis_gcc.h **** */ + 316:Drivers/CMSIS/Include/cmsis_gcc.h **** __STATIC_FORCEINLINE uint32_t __TZ_get_MSP_NS(void) + 317:Drivers/CMSIS/Include/cmsis_gcc.h **** { + 318:Drivers/CMSIS/Include/cmsis_gcc.h **** uint32_t result; + 319:Drivers/CMSIS/Include/cmsis_gcc.h **** + 320:Drivers/CMSIS/Include/cmsis_gcc.h **** __ASM volatile ("MRS %0, msp_ns" : "=r" (result) ); + 321:Drivers/CMSIS/Include/cmsis_gcc.h **** return(result); + 322:Drivers/CMSIS/Include/cmsis_gcc.h **** } + 323:Drivers/CMSIS/Include/cmsis_gcc.h **** #endif + 324:Drivers/CMSIS/Include/cmsis_gcc.h **** + 325:Drivers/CMSIS/Include/cmsis_gcc.h **** + 326:Drivers/CMSIS/Include/cmsis_gcc.h **** /** + 327:Drivers/CMSIS/Include/cmsis_gcc.h **** \brief Set Main Stack Pointer + 328:Drivers/CMSIS/Include/cmsis_gcc.h **** \details Assigns the given value to the Main Stack Pointer (MSP). + 329:Drivers/CMSIS/Include/cmsis_gcc.h **** \param [in] topOfMainStack Main Stack Pointer value to set + 330:Drivers/CMSIS/Include/cmsis_gcc.h **** */ + ARM GAS /tmp/ccDOWgYG.s page 26 + + + 331:Drivers/CMSIS/Include/cmsis_gcc.h **** __STATIC_FORCEINLINE void __set_MSP(uint32_t topOfMainStack) + 332:Drivers/CMSIS/Include/cmsis_gcc.h **** { + 333:Drivers/CMSIS/Include/cmsis_gcc.h **** __ASM volatile ("MSR msp, %0" : : "r" (topOfMainStack) : ); + 334:Drivers/CMSIS/Include/cmsis_gcc.h **** } + 335:Drivers/CMSIS/Include/cmsis_gcc.h **** + 336:Drivers/CMSIS/Include/cmsis_gcc.h **** + 337:Drivers/CMSIS/Include/cmsis_gcc.h **** #if (defined (__ARM_FEATURE_CMSE ) && (__ARM_FEATURE_CMSE == 3)) + 338:Drivers/CMSIS/Include/cmsis_gcc.h **** /** + 339:Drivers/CMSIS/Include/cmsis_gcc.h **** \brief Set Main Stack Pointer (non-secure) + 340:Drivers/CMSIS/Include/cmsis_gcc.h **** \details Assigns the given value to the non-secure Main Stack Pointer (MSP) when in secure state. + 341:Drivers/CMSIS/Include/cmsis_gcc.h **** \param [in] topOfMainStack Main Stack Pointer value to set + 342:Drivers/CMSIS/Include/cmsis_gcc.h **** */ + 343:Drivers/CMSIS/Include/cmsis_gcc.h **** __STATIC_FORCEINLINE void __TZ_set_MSP_NS(uint32_t topOfMainStack) + 344:Drivers/CMSIS/Include/cmsis_gcc.h **** { + 345:Drivers/CMSIS/Include/cmsis_gcc.h **** __ASM volatile ("MSR msp_ns, %0" : : "r" (topOfMainStack) : ); + 346:Drivers/CMSIS/Include/cmsis_gcc.h **** } + 347:Drivers/CMSIS/Include/cmsis_gcc.h **** #endif + 348:Drivers/CMSIS/Include/cmsis_gcc.h **** + 349:Drivers/CMSIS/Include/cmsis_gcc.h **** + 350:Drivers/CMSIS/Include/cmsis_gcc.h **** #if (defined (__ARM_FEATURE_CMSE ) && (__ARM_FEATURE_CMSE == 3)) + 351:Drivers/CMSIS/Include/cmsis_gcc.h **** /** + 352:Drivers/CMSIS/Include/cmsis_gcc.h **** \brief Get Stack Pointer (non-secure) + 353:Drivers/CMSIS/Include/cmsis_gcc.h **** \details Returns the current value of the non-secure Stack Pointer (SP) when in secure state. + 354:Drivers/CMSIS/Include/cmsis_gcc.h **** \return SP Register value + 355:Drivers/CMSIS/Include/cmsis_gcc.h **** */ + 356:Drivers/CMSIS/Include/cmsis_gcc.h **** __STATIC_FORCEINLINE uint32_t __TZ_get_SP_NS(void) + 357:Drivers/CMSIS/Include/cmsis_gcc.h **** { + 358:Drivers/CMSIS/Include/cmsis_gcc.h **** uint32_t result; + 359:Drivers/CMSIS/Include/cmsis_gcc.h **** + 360:Drivers/CMSIS/Include/cmsis_gcc.h **** __ASM volatile ("MRS %0, sp_ns" : "=r" (result) ); + 361:Drivers/CMSIS/Include/cmsis_gcc.h **** return(result); + 362:Drivers/CMSIS/Include/cmsis_gcc.h **** } + 363:Drivers/CMSIS/Include/cmsis_gcc.h **** + 364:Drivers/CMSIS/Include/cmsis_gcc.h **** + 365:Drivers/CMSIS/Include/cmsis_gcc.h **** /** + 366:Drivers/CMSIS/Include/cmsis_gcc.h **** \brief Set Stack Pointer (non-secure) + 367:Drivers/CMSIS/Include/cmsis_gcc.h **** \details Assigns the given value to the non-secure Stack Pointer (SP) when in secure state. + 368:Drivers/CMSIS/Include/cmsis_gcc.h **** \param [in] topOfStack Stack Pointer value to set + 369:Drivers/CMSIS/Include/cmsis_gcc.h **** */ + 370:Drivers/CMSIS/Include/cmsis_gcc.h **** __STATIC_FORCEINLINE void __TZ_set_SP_NS(uint32_t topOfStack) + 371:Drivers/CMSIS/Include/cmsis_gcc.h **** { + 372:Drivers/CMSIS/Include/cmsis_gcc.h **** __ASM volatile ("MSR sp_ns, %0" : : "r" (topOfStack) : ); + 373:Drivers/CMSIS/Include/cmsis_gcc.h **** } + 374:Drivers/CMSIS/Include/cmsis_gcc.h **** #endif + 375:Drivers/CMSIS/Include/cmsis_gcc.h **** + 376:Drivers/CMSIS/Include/cmsis_gcc.h **** + 377:Drivers/CMSIS/Include/cmsis_gcc.h **** /** + 378:Drivers/CMSIS/Include/cmsis_gcc.h **** \brief Get Priority Mask + 379:Drivers/CMSIS/Include/cmsis_gcc.h **** \details Returns the current state of the priority mask bit from the Priority Mask Register. + 380:Drivers/CMSIS/Include/cmsis_gcc.h **** \return Priority Mask value + 381:Drivers/CMSIS/Include/cmsis_gcc.h **** */ + 382:Drivers/CMSIS/Include/cmsis_gcc.h **** __STATIC_FORCEINLINE uint32_t __get_PRIMASK(void) + 383:Drivers/CMSIS/Include/cmsis_gcc.h **** { + 384:Drivers/CMSIS/Include/cmsis_gcc.h **** uint32_t result; + 385:Drivers/CMSIS/Include/cmsis_gcc.h **** + 386:Drivers/CMSIS/Include/cmsis_gcc.h **** __ASM volatile ("MRS %0, primask" : "=r" (result) :: "memory"); + 387:Drivers/CMSIS/Include/cmsis_gcc.h **** return(result); + ARM GAS /tmp/ccDOWgYG.s page 27 + + + 388:Drivers/CMSIS/Include/cmsis_gcc.h **** } + 389:Drivers/CMSIS/Include/cmsis_gcc.h **** + 390:Drivers/CMSIS/Include/cmsis_gcc.h **** + 391:Drivers/CMSIS/Include/cmsis_gcc.h **** #if (defined (__ARM_FEATURE_CMSE ) && (__ARM_FEATURE_CMSE == 3)) + 392:Drivers/CMSIS/Include/cmsis_gcc.h **** /** + 393:Drivers/CMSIS/Include/cmsis_gcc.h **** \brief Get Priority Mask (non-secure) + 394:Drivers/CMSIS/Include/cmsis_gcc.h **** \details Returns the current state of the non-secure priority mask bit from the Priority Mask Reg + 395:Drivers/CMSIS/Include/cmsis_gcc.h **** \return Priority Mask value + 396:Drivers/CMSIS/Include/cmsis_gcc.h **** */ + 397:Drivers/CMSIS/Include/cmsis_gcc.h **** __STATIC_FORCEINLINE uint32_t __TZ_get_PRIMASK_NS(void) + 398:Drivers/CMSIS/Include/cmsis_gcc.h **** { + 399:Drivers/CMSIS/Include/cmsis_gcc.h **** uint32_t result; + 400:Drivers/CMSIS/Include/cmsis_gcc.h **** + 401:Drivers/CMSIS/Include/cmsis_gcc.h **** __ASM volatile ("MRS %0, primask_ns" : "=r" (result) :: "memory"); + 402:Drivers/CMSIS/Include/cmsis_gcc.h **** return(result); + 403:Drivers/CMSIS/Include/cmsis_gcc.h **** } + 404:Drivers/CMSIS/Include/cmsis_gcc.h **** #endif + 405:Drivers/CMSIS/Include/cmsis_gcc.h **** + 406:Drivers/CMSIS/Include/cmsis_gcc.h **** + 407:Drivers/CMSIS/Include/cmsis_gcc.h **** /** + 408:Drivers/CMSIS/Include/cmsis_gcc.h **** \brief Set Priority Mask + 409:Drivers/CMSIS/Include/cmsis_gcc.h **** \details Assigns the given value to the Priority Mask Register. + 410:Drivers/CMSIS/Include/cmsis_gcc.h **** \param [in] priMask Priority Mask + 411:Drivers/CMSIS/Include/cmsis_gcc.h **** */ + 412:Drivers/CMSIS/Include/cmsis_gcc.h **** __STATIC_FORCEINLINE void __set_PRIMASK(uint32_t priMask) + 413:Drivers/CMSIS/Include/cmsis_gcc.h **** { + 414:Drivers/CMSIS/Include/cmsis_gcc.h **** __ASM volatile ("MSR primask, %0" : : "r" (priMask) : "memory"); + 415:Drivers/CMSIS/Include/cmsis_gcc.h **** } + 416:Drivers/CMSIS/Include/cmsis_gcc.h **** + 417:Drivers/CMSIS/Include/cmsis_gcc.h **** + 418:Drivers/CMSIS/Include/cmsis_gcc.h **** #if (defined (__ARM_FEATURE_CMSE ) && (__ARM_FEATURE_CMSE == 3)) + 419:Drivers/CMSIS/Include/cmsis_gcc.h **** /** + 420:Drivers/CMSIS/Include/cmsis_gcc.h **** \brief Set Priority Mask (non-secure) + 421:Drivers/CMSIS/Include/cmsis_gcc.h **** \details Assigns the given value to the non-secure Priority Mask Register when in secure state. + 422:Drivers/CMSIS/Include/cmsis_gcc.h **** \param [in] priMask Priority Mask + 423:Drivers/CMSIS/Include/cmsis_gcc.h **** */ + 424:Drivers/CMSIS/Include/cmsis_gcc.h **** __STATIC_FORCEINLINE void __TZ_set_PRIMASK_NS(uint32_t priMask) + 425:Drivers/CMSIS/Include/cmsis_gcc.h **** { + 426:Drivers/CMSIS/Include/cmsis_gcc.h **** __ASM volatile ("MSR primask_ns, %0" : : "r" (priMask) : "memory"); + 427:Drivers/CMSIS/Include/cmsis_gcc.h **** } + 428:Drivers/CMSIS/Include/cmsis_gcc.h **** #endif + 429:Drivers/CMSIS/Include/cmsis_gcc.h **** + 430:Drivers/CMSIS/Include/cmsis_gcc.h **** + 431:Drivers/CMSIS/Include/cmsis_gcc.h **** #if ((defined (__ARM_ARCH_7M__ ) && (__ARM_ARCH_7M__ == 1)) || \ + 432:Drivers/CMSIS/Include/cmsis_gcc.h **** (defined (__ARM_ARCH_7EM__ ) && (__ARM_ARCH_7EM__ == 1)) || \ + 433:Drivers/CMSIS/Include/cmsis_gcc.h **** (defined (__ARM_ARCH_8M_MAIN__ ) && (__ARM_ARCH_8M_MAIN__ == 1)) ) + 434:Drivers/CMSIS/Include/cmsis_gcc.h **** /** + 435:Drivers/CMSIS/Include/cmsis_gcc.h **** \brief Enable FIQ + 436:Drivers/CMSIS/Include/cmsis_gcc.h **** \details Enables FIQ interrupts by clearing the F-bit in the CPSR. + 437:Drivers/CMSIS/Include/cmsis_gcc.h **** Can only be executed in Privileged modes. + 438:Drivers/CMSIS/Include/cmsis_gcc.h **** */ + 439:Drivers/CMSIS/Include/cmsis_gcc.h **** __STATIC_FORCEINLINE void __enable_fault_irq(void) + 440:Drivers/CMSIS/Include/cmsis_gcc.h **** { + 441:Drivers/CMSIS/Include/cmsis_gcc.h **** __ASM volatile ("cpsie f" : : : "memory"); + 442:Drivers/CMSIS/Include/cmsis_gcc.h **** } + 443:Drivers/CMSIS/Include/cmsis_gcc.h **** + 444:Drivers/CMSIS/Include/cmsis_gcc.h **** + ARM GAS /tmp/ccDOWgYG.s page 28 + + + 445:Drivers/CMSIS/Include/cmsis_gcc.h **** /** + 446:Drivers/CMSIS/Include/cmsis_gcc.h **** \brief Disable FIQ + 447:Drivers/CMSIS/Include/cmsis_gcc.h **** \details Disables FIQ interrupts by setting the F-bit in the CPSR. + 448:Drivers/CMSIS/Include/cmsis_gcc.h **** Can only be executed in Privileged modes. + 449:Drivers/CMSIS/Include/cmsis_gcc.h **** */ + 450:Drivers/CMSIS/Include/cmsis_gcc.h **** __STATIC_FORCEINLINE void __disable_fault_irq(void) + 451:Drivers/CMSIS/Include/cmsis_gcc.h **** { + 452:Drivers/CMSIS/Include/cmsis_gcc.h **** __ASM volatile ("cpsid f" : : : "memory"); + 453:Drivers/CMSIS/Include/cmsis_gcc.h **** } + 454:Drivers/CMSIS/Include/cmsis_gcc.h **** + 455:Drivers/CMSIS/Include/cmsis_gcc.h **** + 456:Drivers/CMSIS/Include/cmsis_gcc.h **** /** + 457:Drivers/CMSIS/Include/cmsis_gcc.h **** \brief Get Base Priority + 458:Drivers/CMSIS/Include/cmsis_gcc.h **** \details Returns the current value of the Base Priority register. + 459:Drivers/CMSIS/Include/cmsis_gcc.h **** \return Base Priority register value + 460:Drivers/CMSIS/Include/cmsis_gcc.h **** */ + 461:Drivers/CMSIS/Include/cmsis_gcc.h **** __STATIC_FORCEINLINE uint32_t __get_BASEPRI(void) + 462:Drivers/CMSIS/Include/cmsis_gcc.h **** { + 463:Drivers/CMSIS/Include/cmsis_gcc.h **** uint32_t result; + 464:Drivers/CMSIS/Include/cmsis_gcc.h **** + 465:Drivers/CMSIS/Include/cmsis_gcc.h **** __ASM volatile ("MRS %0, basepri" : "=r" (result) ); + 466:Drivers/CMSIS/Include/cmsis_gcc.h **** return(result); + 467:Drivers/CMSIS/Include/cmsis_gcc.h **** } + 468:Drivers/CMSIS/Include/cmsis_gcc.h **** + 469:Drivers/CMSIS/Include/cmsis_gcc.h **** + 470:Drivers/CMSIS/Include/cmsis_gcc.h **** #if (defined (__ARM_FEATURE_CMSE ) && (__ARM_FEATURE_CMSE == 3)) + 471:Drivers/CMSIS/Include/cmsis_gcc.h **** /** + 472:Drivers/CMSIS/Include/cmsis_gcc.h **** \brief Get Base Priority (non-secure) + 473:Drivers/CMSIS/Include/cmsis_gcc.h **** \details Returns the current value of the non-secure Base Priority register when in secure state. + 474:Drivers/CMSIS/Include/cmsis_gcc.h **** \return Base Priority register value + 475:Drivers/CMSIS/Include/cmsis_gcc.h **** */ + 476:Drivers/CMSIS/Include/cmsis_gcc.h **** __STATIC_FORCEINLINE uint32_t __TZ_get_BASEPRI_NS(void) + 477:Drivers/CMSIS/Include/cmsis_gcc.h **** { + 478:Drivers/CMSIS/Include/cmsis_gcc.h **** uint32_t result; + 479:Drivers/CMSIS/Include/cmsis_gcc.h **** + 480:Drivers/CMSIS/Include/cmsis_gcc.h **** __ASM volatile ("MRS %0, basepri_ns" : "=r" (result) ); + 481:Drivers/CMSIS/Include/cmsis_gcc.h **** return(result); + 482:Drivers/CMSIS/Include/cmsis_gcc.h **** } + 483:Drivers/CMSIS/Include/cmsis_gcc.h **** #endif + 484:Drivers/CMSIS/Include/cmsis_gcc.h **** + 485:Drivers/CMSIS/Include/cmsis_gcc.h **** + 486:Drivers/CMSIS/Include/cmsis_gcc.h **** /** + 487:Drivers/CMSIS/Include/cmsis_gcc.h **** \brief Set Base Priority + 488:Drivers/CMSIS/Include/cmsis_gcc.h **** \details Assigns the given value to the Base Priority register. + 489:Drivers/CMSIS/Include/cmsis_gcc.h **** \param [in] basePri Base Priority value to set + 490:Drivers/CMSIS/Include/cmsis_gcc.h **** */ + 491:Drivers/CMSIS/Include/cmsis_gcc.h **** __STATIC_FORCEINLINE void __set_BASEPRI(uint32_t basePri) + 492:Drivers/CMSIS/Include/cmsis_gcc.h **** { + 493:Drivers/CMSIS/Include/cmsis_gcc.h **** __ASM volatile ("MSR basepri, %0" : : "r" (basePri) : "memory"); + 494:Drivers/CMSIS/Include/cmsis_gcc.h **** } + 495:Drivers/CMSIS/Include/cmsis_gcc.h **** + 496:Drivers/CMSIS/Include/cmsis_gcc.h **** + 497:Drivers/CMSIS/Include/cmsis_gcc.h **** #if (defined (__ARM_FEATURE_CMSE ) && (__ARM_FEATURE_CMSE == 3)) + 498:Drivers/CMSIS/Include/cmsis_gcc.h **** /** + 499:Drivers/CMSIS/Include/cmsis_gcc.h **** \brief Set Base Priority (non-secure) + 500:Drivers/CMSIS/Include/cmsis_gcc.h **** \details Assigns the given value to the non-secure Base Priority register when in secure state. + 501:Drivers/CMSIS/Include/cmsis_gcc.h **** \param [in] basePri Base Priority value to set + ARM GAS /tmp/ccDOWgYG.s page 29 + + + 502:Drivers/CMSIS/Include/cmsis_gcc.h **** */ + 503:Drivers/CMSIS/Include/cmsis_gcc.h **** __STATIC_FORCEINLINE void __TZ_set_BASEPRI_NS(uint32_t basePri) + 504:Drivers/CMSIS/Include/cmsis_gcc.h **** { + 505:Drivers/CMSIS/Include/cmsis_gcc.h **** __ASM volatile ("MSR basepri_ns, %0" : : "r" (basePri) : "memory"); + 506:Drivers/CMSIS/Include/cmsis_gcc.h **** } + 507:Drivers/CMSIS/Include/cmsis_gcc.h **** #endif + 508:Drivers/CMSIS/Include/cmsis_gcc.h **** + 509:Drivers/CMSIS/Include/cmsis_gcc.h **** + 510:Drivers/CMSIS/Include/cmsis_gcc.h **** /** + 511:Drivers/CMSIS/Include/cmsis_gcc.h **** \brief Set Base Priority with condition + 512:Drivers/CMSIS/Include/cmsis_gcc.h **** \details Assigns the given value to the Base Priority register only if BASEPRI masking is disable + 513:Drivers/CMSIS/Include/cmsis_gcc.h **** or the new value increases the BASEPRI priority level. + 514:Drivers/CMSIS/Include/cmsis_gcc.h **** \param [in] basePri Base Priority value to set + 515:Drivers/CMSIS/Include/cmsis_gcc.h **** */ + 516:Drivers/CMSIS/Include/cmsis_gcc.h **** __STATIC_FORCEINLINE void __set_BASEPRI_MAX(uint32_t basePri) + 517:Drivers/CMSIS/Include/cmsis_gcc.h **** { + 518:Drivers/CMSIS/Include/cmsis_gcc.h **** __ASM volatile ("MSR basepri_max, %0" : : "r" (basePri) : "memory"); + 519:Drivers/CMSIS/Include/cmsis_gcc.h **** } + 520:Drivers/CMSIS/Include/cmsis_gcc.h **** + 521:Drivers/CMSIS/Include/cmsis_gcc.h **** + 522:Drivers/CMSIS/Include/cmsis_gcc.h **** /** + 523:Drivers/CMSIS/Include/cmsis_gcc.h **** \brief Get Fault Mask + 524:Drivers/CMSIS/Include/cmsis_gcc.h **** \details Returns the current value of the Fault Mask register. + 525:Drivers/CMSIS/Include/cmsis_gcc.h **** \return Fault Mask register value + 526:Drivers/CMSIS/Include/cmsis_gcc.h **** */ + 527:Drivers/CMSIS/Include/cmsis_gcc.h **** __STATIC_FORCEINLINE uint32_t __get_FAULTMASK(void) + 528:Drivers/CMSIS/Include/cmsis_gcc.h **** { + 529:Drivers/CMSIS/Include/cmsis_gcc.h **** uint32_t result; + 530:Drivers/CMSIS/Include/cmsis_gcc.h **** + 531:Drivers/CMSIS/Include/cmsis_gcc.h **** __ASM volatile ("MRS %0, faultmask" : "=r" (result) ); + 532:Drivers/CMSIS/Include/cmsis_gcc.h **** return(result); + 533:Drivers/CMSIS/Include/cmsis_gcc.h **** } + 534:Drivers/CMSIS/Include/cmsis_gcc.h **** + 535:Drivers/CMSIS/Include/cmsis_gcc.h **** + 536:Drivers/CMSIS/Include/cmsis_gcc.h **** #if (defined (__ARM_FEATURE_CMSE ) && (__ARM_FEATURE_CMSE == 3)) + 537:Drivers/CMSIS/Include/cmsis_gcc.h **** /** + 538:Drivers/CMSIS/Include/cmsis_gcc.h **** \brief Get Fault Mask (non-secure) + 539:Drivers/CMSIS/Include/cmsis_gcc.h **** \details Returns the current value of the non-secure Fault Mask register when in secure state. + 540:Drivers/CMSIS/Include/cmsis_gcc.h **** \return Fault Mask register value + 541:Drivers/CMSIS/Include/cmsis_gcc.h **** */ + 542:Drivers/CMSIS/Include/cmsis_gcc.h **** __STATIC_FORCEINLINE uint32_t __TZ_get_FAULTMASK_NS(void) + 543:Drivers/CMSIS/Include/cmsis_gcc.h **** { + 544:Drivers/CMSIS/Include/cmsis_gcc.h **** uint32_t result; + 545:Drivers/CMSIS/Include/cmsis_gcc.h **** + 546:Drivers/CMSIS/Include/cmsis_gcc.h **** __ASM volatile ("MRS %0, faultmask_ns" : "=r" (result) ); + 547:Drivers/CMSIS/Include/cmsis_gcc.h **** return(result); + 548:Drivers/CMSIS/Include/cmsis_gcc.h **** } + 549:Drivers/CMSIS/Include/cmsis_gcc.h **** #endif + 550:Drivers/CMSIS/Include/cmsis_gcc.h **** + 551:Drivers/CMSIS/Include/cmsis_gcc.h **** + 552:Drivers/CMSIS/Include/cmsis_gcc.h **** /** + 553:Drivers/CMSIS/Include/cmsis_gcc.h **** \brief Set Fault Mask + 554:Drivers/CMSIS/Include/cmsis_gcc.h **** \details Assigns the given value to the Fault Mask register. + 555:Drivers/CMSIS/Include/cmsis_gcc.h **** \param [in] faultMask Fault Mask value to set + 556:Drivers/CMSIS/Include/cmsis_gcc.h **** */ + 557:Drivers/CMSIS/Include/cmsis_gcc.h **** __STATIC_FORCEINLINE void __set_FAULTMASK(uint32_t faultMask) + 558:Drivers/CMSIS/Include/cmsis_gcc.h **** { + ARM GAS /tmp/ccDOWgYG.s page 30 + + + 559:Drivers/CMSIS/Include/cmsis_gcc.h **** __ASM volatile ("MSR faultmask, %0" : : "r" (faultMask) : "memory"); + 560:Drivers/CMSIS/Include/cmsis_gcc.h **** } + 561:Drivers/CMSIS/Include/cmsis_gcc.h **** + 562:Drivers/CMSIS/Include/cmsis_gcc.h **** + 563:Drivers/CMSIS/Include/cmsis_gcc.h **** #if (defined (__ARM_FEATURE_CMSE ) && (__ARM_FEATURE_CMSE == 3)) + 564:Drivers/CMSIS/Include/cmsis_gcc.h **** /** + 565:Drivers/CMSIS/Include/cmsis_gcc.h **** \brief Set Fault Mask (non-secure) + 566:Drivers/CMSIS/Include/cmsis_gcc.h **** \details Assigns the given value to the non-secure Fault Mask register when in secure state. + 567:Drivers/CMSIS/Include/cmsis_gcc.h **** \param [in] faultMask Fault Mask value to set + 568:Drivers/CMSIS/Include/cmsis_gcc.h **** */ + 569:Drivers/CMSIS/Include/cmsis_gcc.h **** __STATIC_FORCEINLINE void __TZ_set_FAULTMASK_NS(uint32_t faultMask) + 570:Drivers/CMSIS/Include/cmsis_gcc.h **** { + 571:Drivers/CMSIS/Include/cmsis_gcc.h **** __ASM volatile ("MSR faultmask_ns, %0" : : "r" (faultMask) : "memory"); + 572:Drivers/CMSIS/Include/cmsis_gcc.h **** } + 573:Drivers/CMSIS/Include/cmsis_gcc.h **** #endif + 574:Drivers/CMSIS/Include/cmsis_gcc.h **** + 575:Drivers/CMSIS/Include/cmsis_gcc.h **** #endif /* ((defined (__ARM_ARCH_7M__ ) && (__ARM_ARCH_7M__ == 1)) || \ + 576:Drivers/CMSIS/Include/cmsis_gcc.h **** (defined (__ARM_ARCH_7EM__ ) && (__ARM_ARCH_7EM__ == 1)) || \ + 577:Drivers/CMSIS/Include/cmsis_gcc.h **** (defined (__ARM_ARCH_8M_MAIN__ ) && (__ARM_ARCH_8M_MAIN__ == 1)) ) */ + 578:Drivers/CMSIS/Include/cmsis_gcc.h **** + 579:Drivers/CMSIS/Include/cmsis_gcc.h **** + 580:Drivers/CMSIS/Include/cmsis_gcc.h **** #if ((defined (__ARM_ARCH_8M_MAIN__ ) && (__ARM_ARCH_8M_MAIN__ == 1)) || \ + 581:Drivers/CMSIS/Include/cmsis_gcc.h **** (defined (__ARM_ARCH_8M_BASE__ ) && (__ARM_ARCH_8M_BASE__ == 1)) ) + 582:Drivers/CMSIS/Include/cmsis_gcc.h **** + 583:Drivers/CMSIS/Include/cmsis_gcc.h **** /** + 584:Drivers/CMSIS/Include/cmsis_gcc.h **** \brief Get Process Stack Pointer Limit + 585:Drivers/CMSIS/Include/cmsis_gcc.h **** Devices without ARMv8-M Main Extensions (i.e. Cortex-M23) lack the non-secure + 586:Drivers/CMSIS/Include/cmsis_gcc.h **** Stack Pointer Limit register hence zero is returned always in non-secure + 587:Drivers/CMSIS/Include/cmsis_gcc.h **** mode. + 588:Drivers/CMSIS/Include/cmsis_gcc.h **** + 589:Drivers/CMSIS/Include/cmsis_gcc.h **** \details Returns the current value of the Process Stack Pointer Limit (PSPLIM). + 590:Drivers/CMSIS/Include/cmsis_gcc.h **** \return PSPLIM Register value + 591:Drivers/CMSIS/Include/cmsis_gcc.h **** */ + 592:Drivers/CMSIS/Include/cmsis_gcc.h **** __STATIC_FORCEINLINE uint32_t __get_PSPLIM(void) + 593:Drivers/CMSIS/Include/cmsis_gcc.h **** { + 594:Drivers/CMSIS/Include/cmsis_gcc.h **** #if (!(defined (__ARM_ARCH_8M_MAIN__ ) && (__ARM_ARCH_8M_MAIN__ == 1)) && \ + 595:Drivers/CMSIS/Include/cmsis_gcc.h **** (!defined (__ARM_FEATURE_CMSE) || (__ARM_FEATURE_CMSE < 3))) + 596:Drivers/CMSIS/Include/cmsis_gcc.h **** // without main extensions, the non-secure PSPLIM is RAZ/WI + 597:Drivers/CMSIS/Include/cmsis_gcc.h **** return 0U; + 598:Drivers/CMSIS/Include/cmsis_gcc.h **** #else + 599:Drivers/CMSIS/Include/cmsis_gcc.h **** uint32_t result; + 600:Drivers/CMSIS/Include/cmsis_gcc.h **** __ASM volatile ("MRS %0, psplim" : "=r" (result) ); + 601:Drivers/CMSIS/Include/cmsis_gcc.h **** return result; + 602:Drivers/CMSIS/Include/cmsis_gcc.h **** #endif + 603:Drivers/CMSIS/Include/cmsis_gcc.h **** } + 604:Drivers/CMSIS/Include/cmsis_gcc.h **** + 605:Drivers/CMSIS/Include/cmsis_gcc.h **** #if (defined (__ARM_FEATURE_CMSE) && (__ARM_FEATURE_CMSE == 3)) + 606:Drivers/CMSIS/Include/cmsis_gcc.h **** /** + 607:Drivers/CMSIS/Include/cmsis_gcc.h **** \brief Get Process Stack Pointer Limit (non-secure) + 608:Drivers/CMSIS/Include/cmsis_gcc.h **** Devices without ARMv8-M Main Extensions (i.e. Cortex-M23) lack the non-secure + 609:Drivers/CMSIS/Include/cmsis_gcc.h **** Stack Pointer Limit register hence zero is returned always. + 610:Drivers/CMSIS/Include/cmsis_gcc.h **** + 611:Drivers/CMSIS/Include/cmsis_gcc.h **** \details Returns the current value of the non-secure Process Stack Pointer Limit (PSPLIM) when in + 612:Drivers/CMSIS/Include/cmsis_gcc.h **** \return PSPLIM Register value + 613:Drivers/CMSIS/Include/cmsis_gcc.h **** */ + 614:Drivers/CMSIS/Include/cmsis_gcc.h **** __STATIC_FORCEINLINE uint32_t __TZ_get_PSPLIM_NS(void) + 615:Drivers/CMSIS/Include/cmsis_gcc.h **** { + ARM GAS /tmp/ccDOWgYG.s page 31 + + + 616:Drivers/CMSIS/Include/cmsis_gcc.h **** #if (!(defined (__ARM_ARCH_8M_MAIN__ ) && (__ARM_ARCH_8M_MAIN__ == 1))) + 617:Drivers/CMSIS/Include/cmsis_gcc.h **** // without main extensions, the non-secure PSPLIM is RAZ/WI + 618:Drivers/CMSIS/Include/cmsis_gcc.h **** return 0U; + 619:Drivers/CMSIS/Include/cmsis_gcc.h **** #else + 620:Drivers/CMSIS/Include/cmsis_gcc.h **** uint32_t result; + 621:Drivers/CMSIS/Include/cmsis_gcc.h **** __ASM volatile ("MRS %0, psplim_ns" : "=r" (result) ); + 622:Drivers/CMSIS/Include/cmsis_gcc.h **** return result; + 623:Drivers/CMSIS/Include/cmsis_gcc.h **** #endif + 624:Drivers/CMSIS/Include/cmsis_gcc.h **** } + 625:Drivers/CMSIS/Include/cmsis_gcc.h **** #endif + 626:Drivers/CMSIS/Include/cmsis_gcc.h **** + 627:Drivers/CMSIS/Include/cmsis_gcc.h **** + 628:Drivers/CMSIS/Include/cmsis_gcc.h **** /** + 629:Drivers/CMSIS/Include/cmsis_gcc.h **** \brief Set Process Stack Pointer Limit + 630:Drivers/CMSIS/Include/cmsis_gcc.h **** Devices without ARMv8-M Main Extensions (i.e. Cortex-M23) lack the non-secure + 631:Drivers/CMSIS/Include/cmsis_gcc.h **** Stack Pointer Limit register hence the write is silently ignored in non-secure + 632:Drivers/CMSIS/Include/cmsis_gcc.h **** mode. + 633:Drivers/CMSIS/Include/cmsis_gcc.h **** + 634:Drivers/CMSIS/Include/cmsis_gcc.h **** \details Assigns the given value to the Process Stack Pointer Limit (PSPLIM). + 635:Drivers/CMSIS/Include/cmsis_gcc.h **** \param [in] ProcStackPtrLimit Process Stack Pointer Limit value to set + 636:Drivers/CMSIS/Include/cmsis_gcc.h **** */ + 637:Drivers/CMSIS/Include/cmsis_gcc.h **** __STATIC_FORCEINLINE void __set_PSPLIM(uint32_t ProcStackPtrLimit) + 638:Drivers/CMSIS/Include/cmsis_gcc.h **** { + 639:Drivers/CMSIS/Include/cmsis_gcc.h **** #if (!(defined (__ARM_ARCH_8M_MAIN__ ) && (__ARM_ARCH_8M_MAIN__ == 1)) && \ + 640:Drivers/CMSIS/Include/cmsis_gcc.h **** (!defined (__ARM_FEATURE_CMSE) || (__ARM_FEATURE_CMSE < 3))) + 641:Drivers/CMSIS/Include/cmsis_gcc.h **** // without main extensions, the non-secure PSPLIM is RAZ/WI + 642:Drivers/CMSIS/Include/cmsis_gcc.h **** (void)ProcStackPtrLimit; + 643:Drivers/CMSIS/Include/cmsis_gcc.h **** #else + 644:Drivers/CMSIS/Include/cmsis_gcc.h **** __ASM volatile ("MSR psplim, %0" : : "r" (ProcStackPtrLimit)); + 645:Drivers/CMSIS/Include/cmsis_gcc.h **** #endif + 646:Drivers/CMSIS/Include/cmsis_gcc.h **** } + 647:Drivers/CMSIS/Include/cmsis_gcc.h **** + 648:Drivers/CMSIS/Include/cmsis_gcc.h **** + 649:Drivers/CMSIS/Include/cmsis_gcc.h **** #if (defined (__ARM_FEATURE_CMSE ) && (__ARM_FEATURE_CMSE == 3)) + 650:Drivers/CMSIS/Include/cmsis_gcc.h **** /** + 651:Drivers/CMSIS/Include/cmsis_gcc.h **** \brief Set Process Stack Pointer (non-secure) + 652:Drivers/CMSIS/Include/cmsis_gcc.h **** Devices without ARMv8-M Main Extensions (i.e. Cortex-M23) lack the non-secure + 653:Drivers/CMSIS/Include/cmsis_gcc.h **** Stack Pointer Limit register hence the write is silently ignored. + 654:Drivers/CMSIS/Include/cmsis_gcc.h **** + 655:Drivers/CMSIS/Include/cmsis_gcc.h **** \details Assigns the given value to the non-secure Process Stack Pointer Limit (PSPLIM) when in s + 656:Drivers/CMSIS/Include/cmsis_gcc.h **** \param [in] ProcStackPtrLimit Process Stack Pointer Limit value to set + 657:Drivers/CMSIS/Include/cmsis_gcc.h **** */ + 658:Drivers/CMSIS/Include/cmsis_gcc.h **** __STATIC_FORCEINLINE void __TZ_set_PSPLIM_NS(uint32_t ProcStackPtrLimit) + 659:Drivers/CMSIS/Include/cmsis_gcc.h **** { + 660:Drivers/CMSIS/Include/cmsis_gcc.h **** #if (!(defined (__ARM_ARCH_8M_MAIN__ ) && (__ARM_ARCH_8M_MAIN__ == 1))) + 661:Drivers/CMSIS/Include/cmsis_gcc.h **** // without main extensions, the non-secure PSPLIM is RAZ/WI + 662:Drivers/CMSIS/Include/cmsis_gcc.h **** (void)ProcStackPtrLimit; + 663:Drivers/CMSIS/Include/cmsis_gcc.h **** #else + 664:Drivers/CMSIS/Include/cmsis_gcc.h **** __ASM volatile ("MSR psplim_ns, %0\n" : : "r" (ProcStackPtrLimit)); + 665:Drivers/CMSIS/Include/cmsis_gcc.h **** #endif + 666:Drivers/CMSIS/Include/cmsis_gcc.h **** } + 667:Drivers/CMSIS/Include/cmsis_gcc.h **** #endif + 668:Drivers/CMSIS/Include/cmsis_gcc.h **** + 669:Drivers/CMSIS/Include/cmsis_gcc.h **** + 670:Drivers/CMSIS/Include/cmsis_gcc.h **** /** + 671:Drivers/CMSIS/Include/cmsis_gcc.h **** \brief Get Main Stack Pointer Limit + 672:Drivers/CMSIS/Include/cmsis_gcc.h **** Devices without ARMv8-M Main Extensions (i.e. Cortex-M23) lack the non-secure + ARM GAS /tmp/ccDOWgYG.s page 32 + + + 673:Drivers/CMSIS/Include/cmsis_gcc.h **** Stack Pointer Limit register hence zero is returned always in non-secure + 674:Drivers/CMSIS/Include/cmsis_gcc.h **** mode. + 675:Drivers/CMSIS/Include/cmsis_gcc.h **** + 676:Drivers/CMSIS/Include/cmsis_gcc.h **** \details Returns the current value of the Main Stack Pointer Limit (MSPLIM). + 677:Drivers/CMSIS/Include/cmsis_gcc.h **** \return MSPLIM Register value + 678:Drivers/CMSIS/Include/cmsis_gcc.h **** */ + 679:Drivers/CMSIS/Include/cmsis_gcc.h **** __STATIC_FORCEINLINE uint32_t __get_MSPLIM(void) + 680:Drivers/CMSIS/Include/cmsis_gcc.h **** { + 681:Drivers/CMSIS/Include/cmsis_gcc.h **** #if (!(defined (__ARM_ARCH_8M_MAIN__ ) && (__ARM_ARCH_8M_MAIN__ == 1)) && \ + 682:Drivers/CMSIS/Include/cmsis_gcc.h **** (!defined (__ARM_FEATURE_CMSE) || (__ARM_FEATURE_CMSE < 3))) + 683:Drivers/CMSIS/Include/cmsis_gcc.h **** // without main extensions, the non-secure MSPLIM is RAZ/WI + 684:Drivers/CMSIS/Include/cmsis_gcc.h **** return 0U; + 685:Drivers/CMSIS/Include/cmsis_gcc.h **** #else + 686:Drivers/CMSIS/Include/cmsis_gcc.h **** uint32_t result; + 687:Drivers/CMSIS/Include/cmsis_gcc.h **** __ASM volatile ("MRS %0, msplim" : "=r" (result) ); + 688:Drivers/CMSIS/Include/cmsis_gcc.h **** return result; + 689:Drivers/CMSIS/Include/cmsis_gcc.h **** #endif + 690:Drivers/CMSIS/Include/cmsis_gcc.h **** } + 691:Drivers/CMSIS/Include/cmsis_gcc.h **** + 692:Drivers/CMSIS/Include/cmsis_gcc.h **** + 693:Drivers/CMSIS/Include/cmsis_gcc.h **** #if (defined (__ARM_FEATURE_CMSE ) && (__ARM_FEATURE_CMSE == 3)) + 694:Drivers/CMSIS/Include/cmsis_gcc.h **** /** + 695:Drivers/CMSIS/Include/cmsis_gcc.h **** \brief Get Main Stack Pointer Limit (non-secure) + 696:Drivers/CMSIS/Include/cmsis_gcc.h **** Devices without ARMv8-M Main Extensions (i.e. Cortex-M23) lack the non-secure + 697:Drivers/CMSIS/Include/cmsis_gcc.h **** Stack Pointer Limit register hence zero is returned always. + 698:Drivers/CMSIS/Include/cmsis_gcc.h **** + 699:Drivers/CMSIS/Include/cmsis_gcc.h **** \details Returns the current value of the non-secure Main Stack Pointer Limit(MSPLIM) when in sec + 700:Drivers/CMSIS/Include/cmsis_gcc.h **** \return MSPLIM Register value + 701:Drivers/CMSIS/Include/cmsis_gcc.h **** */ + 702:Drivers/CMSIS/Include/cmsis_gcc.h **** __STATIC_FORCEINLINE uint32_t __TZ_get_MSPLIM_NS(void) + 703:Drivers/CMSIS/Include/cmsis_gcc.h **** { + 704:Drivers/CMSIS/Include/cmsis_gcc.h **** #if (!(defined (__ARM_ARCH_8M_MAIN__ ) && (__ARM_ARCH_8M_MAIN__ == 1))) + 705:Drivers/CMSIS/Include/cmsis_gcc.h **** // without main extensions, the non-secure MSPLIM is RAZ/WI + 706:Drivers/CMSIS/Include/cmsis_gcc.h **** return 0U; + 707:Drivers/CMSIS/Include/cmsis_gcc.h **** #else + 708:Drivers/CMSIS/Include/cmsis_gcc.h **** uint32_t result; + 709:Drivers/CMSIS/Include/cmsis_gcc.h **** __ASM volatile ("MRS %0, msplim_ns" : "=r" (result) ); + 710:Drivers/CMSIS/Include/cmsis_gcc.h **** return result; + 711:Drivers/CMSIS/Include/cmsis_gcc.h **** #endif + 712:Drivers/CMSIS/Include/cmsis_gcc.h **** } + 713:Drivers/CMSIS/Include/cmsis_gcc.h **** #endif + 714:Drivers/CMSIS/Include/cmsis_gcc.h **** + 715:Drivers/CMSIS/Include/cmsis_gcc.h **** + 716:Drivers/CMSIS/Include/cmsis_gcc.h **** /** + 717:Drivers/CMSIS/Include/cmsis_gcc.h **** \brief Set Main Stack Pointer Limit + 718:Drivers/CMSIS/Include/cmsis_gcc.h **** Devices without ARMv8-M Main Extensions (i.e. Cortex-M23) lack the non-secure + 719:Drivers/CMSIS/Include/cmsis_gcc.h **** Stack Pointer Limit register hence the write is silently ignored in non-secure + 720:Drivers/CMSIS/Include/cmsis_gcc.h **** mode. + 721:Drivers/CMSIS/Include/cmsis_gcc.h **** + 722:Drivers/CMSIS/Include/cmsis_gcc.h **** \details Assigns the given value to the Main Stack Pointer Limit (MSPLIM). + 723:Drivers/CMSIS/Include/cmsis_gcc.h **** \param [in] MainStackPtrLimit Main Stack Pointer Limit value to set + 724:Drivers/CMSIS/Include/cmsis_gcc.h **** */ + 725:Drivers/CMSIS/Include/cmsis_gcc.h **** __STATIC_FORCEINLINE void __set_MSPLIM(uint32_t MainStackPtrLimit) + 726:Drivers/CMSIS/Include/cmsis_gcc.h **** { + 727:Drivers/CMSIS/Include/cmsis_gcc.h **** #if (!(defined (__ARM_ARCH_8M_MAIN__ ) && (__ARM_ARCH_8M_MAIN__ == 1)) && \ + 728:Drivers/CMSIS/Include/cmsis_gcc.h **** (!defined (__ARM_FEATURE_CMSE) || (__ARM_FEATURE_CMSE < 3))) + 729:Drivers/CMSIS/Include/cmsis_gcc.h **** // without main extensions, the non-secure MSPLIM is RAZ/WI + ARM GAS /tmp/ccDOWgYG.s page 33 + + + 730:Drivers/CMSIS/Include/cmsis_gcc.h **** (void)MainStackPtrLimit; + 731:Drivers/CMSIS/Include/cmsis_gcc.h **** #else + 732:Drivers/CMSIS/Include/cmsis_gcc.h **** __ASM volatile ("MSR msplim, %0" : : "r" (MainStackPtrLimit)); + 733:Drivers/CMSIS/Include/cmsis_gcc.h **** #endif + 734:Drivers/CMSIS/Include/cmsis_gcc.h **** } + 735:Drivers/CMSIS/Include/cmsis_gcc.h **** + 736:Drivers/CMSIS/Include/cmsis_gcc.h **** + 737:Drivers/CMSIS/Include/cmsis_gcc.h **** #if (defined (__ARM_FEATURE_CMSE ) && (__ARM_FEATURE_CMSE == 3)) + 738:Drivers/CMSIS/Include/cmsis_gcc.h **** /** + 739:Drivers/CMSIS/Include/cmsis_gcc.h **** \brief Set Main Stack Pointer Limit (non-secure) + 740:Drivers/CMSIS/Include/cmsis_gcc.h **** Devices without ARMv8-M Main Extensions (i.e. Cortex-M23) lack the non-secure + 741:Drivers/CMSIS/Include/cmsis_gcc.h **** Stack Pointer Limit register hence the write is silently ignored. + 742:Drivers/CMSIS/Include/cmsis_gcc.h **** + 743:Drivers/CMSIS/Include/cmsis_gcc.h **** \details Assigns the given value to the non-secure Main Stack Pointer Limit (MSPLIM) when in secu + 744:Drivers/CMSIS/Include/cmsis_gcc.h **** \param [in] MainStackPtrLimit Main Stack Pointer value to set + 745:Drivers/CMSIS/Include/cmsis_gcc.h **** */ + 746:Drivers/CMSIS/Include/cmsis_gcc.h **** __STATIC_FORCEINLINE void __TZ_set_MSPLIM_NS(uint32_t MainStackPtrLimit) + 747:Drivers/CMSIS/Include/cmsis_gcc.h **** { + 748:Drivers/CMSIS/Include/cmsis_gcc.h **** #if (!(defined (__ARM_ARCH_8M_MAIN__ ) && (__ARM_ARCH_8M_MAIN__ == 1))) + 749:Drivers/CMSIS/Include/cmsis_gcc.h **** // without main extensions, the non-secure MSPLIM is RAZ/WI + 750:Drivers/CMSIS/Include/cmsis_gcc.h **** (void)MainStackPtrLimit; + 751:Drivers/CMSIS/Include/cmsis_gcc.h **** #else + 752:Drivers/CMSIS/Include/cmsis_gcc.h **** __ASM volatile ("MSR msplim_ns, %0" : : "r" (MainStackPtrLimit)); + 753:Drivers/CMSIS/Include/cmsis_gcc.h **** #endif + 754:Drivers/CMSIS/Include/cmsis_gcc.h **** } + 755:Drivers/CMSIS/Include/cmsis_gcc.h **** #endif + 756:Drivers/CMSIS/Include/cmsis_gcc.h **** + 757:Drivers/CMSIS/Include/cmsis_gcc.h **** #endif /* ((defined (__ARM_ARCH_8M_MAIN__ ) && (__ARM_ARCH_8M_MAIN__ == 1)) || \ + 758:Drivers/CMSIS/Include/cmsis_gcc.h **** (defined (__ARM_ARCH_8M_BASE__ ) && (__ARM_ARCH_8M_BASE__ == 1)) ) */ + 759:Drivers/CMSIS/Include/cmsis_gcc.h **** + 760:Drivers/CMSIS/Include/cmsis_gcc.h **** + 761:Drivers/CMSIS/Include/cmsis_gcc.h **** /** + 762:Drivers/CMSIS/Include/cmsis_gcc.h **** \brief Get FPSCR + 763:Drivers/CMSIS/Include/cmsis_gcc.h **** \details Returns the current value of the Floating Point Status/Control register. + 764:Drivers/CMSIS/Include/cmsis_gcc.h **** \return Floating Point Status/Control register value + 765:Drivers/CMSIS/Include/cmsis_gcc.h **** */ + 766:Drivers/CMSIS/Include/cmsis_gcc.h **** __STATIC_FORCEINLINE uint32_t __get_FPSCR(void) + 767:Drivers/CMSIS/Include/cmsis_gcc.h **** { + 768:Drivers/CMSIS/Include/cmsis_gcc.h **** #if ((defined (__FPU_PRESENT) && (__FPU_PRESENT == 1U)) && \ + 769:Drivers/CMSIS/Include/cmsis_gcc.h **** (defined (__FPU_USED ) && (__FPU_USED == 1U)) ) + 770:Drivers/CMSIS/Include/cmsis_gcc.h **** #if __has_builtin(__builtin_arm_get_fpscr) + 771:Drivers/CMSIS/Include/cmsis_gcc.h **** // Re-enable using built-in when GCC has been fixed + 772:Drivers/CMSIS/Include/cmsis_gcc.h **** // || (__GNUC__ > 7) || (__GNUC__ == 7 && __GNUC_MINOR__ >= 2) + 773:Drivers/CMSIS/Include/cmsis_gcc.h **** /* see https://gcc.gnu.org/ml/gcc-patches/2017-04/msg00443.html */ + 774:Drivers/CMSIS/Include/cmsis_gcc.h **** return __builtin_arm_get_fpscr(); + 775:Drivers/CMSIS/Include/cmsis_gcc.h **** #else + 776:Drivers/CMSIS/Include/cmsis_gcc.h **** uint32_t result; + 777:Drivers/CMSIS/Include/cmsis_gcc.h **** + 778:Drivers/CMSIS/Include/cmsis_gcc.h **** __ASM volatile ("VMRS %0, fpscr" : "=r" (result) ); + 779:Drivers/CMSIS/Include/cmsis_gcc.h **** return(result); + 780:Drivers/CMSIS/Include/cmsis_gcc.h **** #endif + 781:Drivers/CMSIS/Include/cmsis_gcc.h **** #else + 782:Drivers/CMSIS/Include/cmsis_gcc.h **** return(0U); + 783:Drivers/CMSIS/Include/cmsis_gcc.h **** #endif + 784:Drivers/CMSIS/Include/cmsis_gcc.h **** } + 785:Drivers/CMSIS/Include/cmsis_gcc.h **** + 786:Drivers/CMSIS/Include/cmsis_gcc.h **** + ARM GAS /tmp/ccDOWgYG.s page 34 + + + 787:Drivers/CMSIS/Include/cmsis_gcc.h **** /** + 788:Drivers/CMSIS/Include/cmsis_gcc.h **** \brief Set FPSCR + 789:Drivers/CMSIS/Include/cmsis_gcc.h **** \details Assigns the given value to the Floating Point Status/Control register. + 790:Drivers/CMSIS/Include/cmsis_gcc.h **** \param [in] fpscr Floating Point Status/Control value to set + 791:Drivers/CMSIS/Include/cmsis_gcc.h **** */ + 792:Drivers/CMSIS/Include/cmsis_gcc.h **** __STATIC_FORCEINLINE void __set_FPSCR(uint32_t fpscr) + 793:Drivers/CMSIS/Include/cmsis_gcc.h **** { + 794:Drivers/CMSIS/Include/cmsis_gcc.h **** #if ((defined (__FPU_PRESENT) && (__FPU_PRESENT == 1U)) && \ + 795:Drivers/CMSIS/Include/cmsis_gcc.h **** (defined (__FPU_USED ) && (__FPU_USED == 1U)) ) + 796:Drivers/CMSIS/Include/cmsis_gcc.h **** #if __has_builtin(__builtin_arm_set_fpscr) + 797:Drivers/CMSIS/Include/cmsis_gcc.h **** // Re-enable using built-in when GCC has been fixed + 798:Drivers/CMSIS/Include/cmsis_gcc.h **** // || (__GNUC__ > 7) || (__GNUC__ == 7 && __GNUC_MINOR__ >= 2) + 799:Drivers/CMSIS/Include/cmsis_gcc.h **** /* see https://gcc.gnu.org/ml/gcc-patches/2017-04/msg00443.html */ + 800:Drivers/CMSIS/Include/cmsis_gcc.h **** __builtin_arm_set_fpscr(fpscr); + 801:Drivers/CMSIS/Include/cmsis_gcc.h **** #else + 802:Drivers/CMSIS/Include/cmsis_gcc.h **** __ASM volatile ("VMSR fpscr, %0" : : "r" (fpscr) : "vfpcc", "memory"); + 803:Drivers/CMSIS/Include/cmsis_gcc.h **** #endif + 804:Drivers/CMSIS/Include/cmsis_gcc.h **** #else + 805:Drivers/CMSIS/Include/cmsis_gcc.h **** (void)fpscr; + 806:Drivers/CMSIS/Include/cmsis_gcc.h **** #endif + 807:Drivers/CMSIS/Include/cmsis_gcc.h **** } + 808:Drivers/CMSIS/Include/cmsis_gcc.h **** + 809:Drivers/CMSIS/Include/cmsis_gcc.h **** + 810:Drivers/CMSIS/Include/cmsis_gcc.h **** /*@} end of CMSIS_Core_RegAccFunctions */ + 811:Drivers/CMSIS/Include/cmsis_gcc.h **** + 812:Drivers/CMSIS/Include/cmsis_gcc.h **** + 813:Drivers/CMSIS/Include/cmsis_gcc.h **** /* ########################## Core Instruction Access ######################### */ + 814:Drivers/CMSIS/Include/cmsis_gcc.h **** /** \defgroup CMSIS_Core_InstructionInterface CMSIS Core Instruction Interface + 815:Drivers/CMSIS/Include/cmsis_gcc.h **** Access to dedicated instructions + 816:Drivers/CMSIS/Include/cmsis_gcc.h **** @{ + 817:Drivers/CMSIS/Include/cmsis_gcc.h **** */ + 818:Drivers/CMSIS/Include/cmsis_gcc.h **** + 819:Drivers/CMSIS/Include/cmsis_gcc.h **** /* Define macros for porting to both thumb1 and thumb2. + 820:Drivers/CMSIS/Include/cmsis_gcc.h **** * For thumb1, use low register (r0-r7), specified by constraint "l" + 821:Drivers/CMSIS/Include/cmsis_gcc.h **** * Otherwise, use general registers, specified by constraint "r" */ + 822:Drivers/CMSIS/Include/cmsis_gcc.h **** #if defined (__thumb__) && !defined (__thumb2__) + 823:Drivers/CMSIS/Include/cmsis_gcc.h **** #define __CMSIS_GCC_OUT_REG(r) "=l" (r) + 824:Drivers/CMSIS/Include/cmsis_gcc.h **** #define __CMSIS_GCC_RW_REG(r) "+l" (r) + 825:Drivers/CMSIS/Include/cmsis_gcc.h **** #define __CMSIS_GCC_USE_REG(r) "l" (r) + 826:Drivers/CMSIS/Include/cmsis_gcc.h **** #else + 827:Drivers/CMSIS/Include/cmsis_gcc.h **** #define __CMSIS_GCC_OUT_REG(r) "=r" (r) + 828:Drivers/CMSIS/Include/cmsis_gcc.h **** #define __CMSIS_GCC_RW_REG(r) "+r" (r) + 829:Drivers/CMSIS/Include/cmsis_gcc.h **** #define __CMSIS_GCC_USE_REG(r) "r" (r) + 830:Drivers/CMSIS/Include/cmsis_gcc.h **** #endif + 831:Drivers/CMSIS/Include/cmsis_gcc.h **** + 832:Drivers/CMSIS/Include/cmsis_gcc.h **** /** + 833:Drivers/CMSIS/Include/cmsis_gcc.h **** \brief No Operation + 834:Drivers/CMSIS/Include/cmsis_gcc.h **** \details No Operation does nothing. This instruction can be used for code alignment purposes. + 835:Drivers/CMSIS/Include/cmsis_gcc.h **** */ + 836:Drivers/CMSIS/Include/cmsis_gcc.h **** #define __NOP() __ASM volatile ("nop") + 837:Drivers/CMSIS/Include/cmsis_gcc.h **** + 838:Drivers/CMSIS/Include/cmsis_gcc.h **** /** + 839:Drivers/CMSIS/Include/cmsis_gcc.h **** \brief Wait For Interrupt + 840:Drivers/CMSIS/Include/cmsis_gcc.h **** \details Wait For Interrupt is a hint instruction that suspends execution until one of a number o + 841:Drivers/CMSIS/Include/cmsis_gcc.h **** */ + 842:Drivers/CMSIS/Include/cmsis_gcc.h **** #define __WFI() __ASM volatile ("wfi") + 843:Drivers/CMSIS/Include/cmsis_gcc.h **** + ARM GAS /tmp/ccDOWgYG.s page 35 + + + 844:Drivers/CMSIS/Include/cmsis_gcc.h **** + 845:Drivers/CMSIS/Include/cmsis_gcc.h **** /** + 846:Drivers/CMSIS/Include/cmsis_gcc.h **** \brief Wait For Event + 847:Drivers/CMSIS/Include/cmsis_gcc.h **** \details Wait For Event is a hint instruction that permits the processor to enter + 848:Drivers/CMSIS/Include/cmsis_gcc.h **** a low-power state until one of a number of events occurs. + 849:Drivers/CMSIS/Include/cmsis_gcc.h **** */ + 850:Drivers/CMSIS/Include/cmsis_gcc.h **** #define __WFE() __ASM volatile ("wfe") + 851:Drivers/CMSIS/Include/cmsis_gcc.h **** + 852:Drivers/CMSIS/Include/cmsis_gcc.h **** + 853:Drivers/CMSIS/Include/cmsis_gcc.h **** /** + 854:Drivers/CMSIS/Include/cmsis_gcc.h **** \brief Send Event + 855:Drivers/CMSIS/Include/cmsis_gcc.h **** \details Send Event is a hint instruction. It causes an event to be signaled to the CPU. + 856:Drivers/CMSIS/Include/cmsis_gcc.h **** */ + 857:Drivers/CMSIS/Include/cmsis_gcc.h **** #define __SEV() __ASM volatile ("sev") + 858:Drivers/CMSIS/Include/cmsis_gcc.h **** + 859:Drivers/CMSIS/Include/cmsis_gcc.h **** + 860:Drivers/CMSIS/Include/cmsis_gcc.h **** /** + 861:Drivers/CMSIS/Include/cmsis_gcc.h **** \brief Instruction Synchronization Barrier + 862:Drivers/CMSIS/Include/cmsis_gcc.h **** \details Instruction Synchronization Barrier flushes the pipeline in the processor, + 863:Drivers/CMSIS/Include/cmsis_gcc.h **** so that all instructions following the ISB are fetched from cache or memory, + 864:Drivers/CMSIS/Include/cmsis_gcc.h **** after the instruction has been completed. + 865:Drivers/CMSIS/Include/cmsis_gcc.h **** */ + 866:Drivers/CMSIS/Include/cmsis_gcc.h **** __STATIC_FORCEINLINE void __ISB(void) + 867:Drivers/CMSIS/Include/cmsis_gcc.h **** { + 868:Drivers/CMSIS/Include/cmsis_gcc.h **** __ASM volatile ("isb 0xF":::"memory"); + 869:Drivers/CMSIS/Include/cmsis_gcc.h **** } + 870:Drivers/CMSIS/Include/cmsis_gcc.h **** + 871:Drivers/CMSIS/Include/cmsis_gcc.h **** + 872:Drivers/CMSIS/Include/cmsis_gcc.h **** /** + 873:Drivers/CMSIS/Include/cmsis_gcc.h **** \brief Data Synchronization Barrier + 874:Drivers/CMSIS/Include/cmsis_gcc.h **** \details Acts as a special kind of Data Memory Barrier. + 875:Drivers/CMSIS/Include/cmsis_gcc.h **** It completes when all explicit memory accesses before this instruction complete. + 876:Drivers/CMSIS/Include/cmsis_gcc.h **** */ + 877:Drivers/CMSIS/Include/cmsis_gcc.h **** __STATIC_FORCEINLINE void __DSB(void) + 222 .loc 3 877 27 view .LVU50 + 223 .LBB27: + 878:Drivers/CMSIS/Include/cmsis_gcc.h **** { + 879:Drivers/CMSIS/Include/cmsis_gcc.h **** __ASM volatile ("dsb 0xF":::"memory"); + 224 .loc 3 879 3 view .LVU51 + 225 .syntax divided + 226 @ 879 "Drivers/CMSIS/Include/cmsis_gcc.h" 1 + 227 0000 BFF34F8F dsb 0xF + 228 @ 0 "" 2 + 229 .thumb + 230 .syntax unified + 231 .LBE27: + 232 .LBE26: + 859:Drivers/CMSIS/Include/core_cm0.h **** buffered write are completed + 860:Drivers/CMSIS/Include/core_cm0.h **** SCB->AIRCR = ((0x5FAUL << SCB_AIRCR_VECTKEY_Pos) | + 233 .loc 2 860 3 view .LVU52 + 234 .loc 2 860 15 is_stmt 0 view .LVU53 + 235 0004 034B ldr r3, .L13 + 236 0006 044A ldr r2, .L13+4 + 237 0008 DA60 str r2, [r3, #12] + 861:Drivers/CMSIS/Include/core_cm0.h **** SCB_AIRCR_SYSRESETREQ_Msk); + 862:Drivers/CMSIS/Include/core_cm0.h **** __DSB(); /* Ensure completion of memory + 238 .loc 2 862 3 is_stmt 1 view .LVU54 + ARM GAS /tmp/ccDOWgYG.s page 36 + + + 239 .LBB28: + 240 .LBI28: + 877:Drivers/CMSIS/Include/cmsis_gcc.h **** { + 241 .loc 3 877 27 view .LVU55 + 242 .LBB29: + 243 .loc 3 879 3 view .LVU56 + 244 .syntax divided + 245 @ 879 "Drivers/CMSIS/Include/cmsis_gcc.h" 1 + 246 000a BFF34F8F dsb 0xF + 247 @ 0 "" 2 + 248 .thumb + 249 .syntax unified + 250 .L12: + 251 .LBE29: + 252 .LBE28: + 863:Drivers/CMSIS/Include/core_cm0.h **** + 864:Drivers/CMSIS/Include/core_cm0.h **** for(;;) /* wait until reset */ + 253 .loc 2 864 3 view .LVU57 + 865:Drivers/CMSIS/Include/core_cm0.h **** { + 866:Drivers/CMSIS/Include/core_cm0.h **** __NOP(); + 254 .loc 2 866 5 discriminator 1 view .LVU58 + 255 .syntax divided + 256 @ 866 "Drivers/CMSIS/Include/core_cm0.h" 1 + 257 000e C046 nop + 258 @ 0 "" 2 + 864:Drivers/CMSIS/Include/core_cm0.h **** { + 259 .loc 2 864 3 view .LVU59 + 260 .thumb + 261 .syntax unified + 262 0010 FDE7 b .L12 + 263 .L14: + 264 0012 C046 .align 2 + 265 .L13: + 266 0014 00ED00E0 .word -536810240 + 267 0018 0400FA05 .word 100270084 + 268 .cfi_endproc + 269 .LFE37: + 271 .section .text.SysTick_Config,"ax",%progbits + 272 .align 1 + 273 .syntax unified + 274 .code 16 + 275 .thumb_func + 277 SysTick_Config: + 278 .LVL10: + 279 .LFB39: + 867:Drivers/CMSIS/Include/core_cm0.h **** } + 868:Drivers/CMSIS/Include/core_cm0.h **** } + 869:Drivers/CMSIS/Include/core_cm0.h **** + 870:Drivers/CMSIS/Include/core_cm0.h **** /*@} end of CMSIS_Core_NVICFunctions */ + 871:Drivers/CMSIS/Include/core_cm0.h **** + 872:Drivers/CMSIS/Include/core_cm0.h **** + 873:Drivers/CMSIS/Include/core_cm0.h **** /* ########################## FPU functions #################################### */ + 874:Drivers/CMSIS/Include/core_cm0.h **** /** + 875:Drivers/CMSIS/Include/core_cm0.h **** \ingroup CMSIS_Core_FunctionInterface + 876:Drivers/CMSIS/Include/core_cm0.h **** \defgroup CMSIS_Core_FpuFunctions FPU Functions + 877:Drivers/CMSIS/Include/core_cm0.h **** \brief Function that provides FPU type. + 878:Drivers/CMSIS/Include/core_cm0.h **** @{ + ARM GAS /tmp/ccDOWgYG.s page 37 + + + 879:Drivers/CMSIS/Include/core_cm0.h **** */ + 880:Drivers/CMSIS/Include/core_cm0.h **** + 881:Drivers/CMSIS/Include/core_cm0.h **** /** + 882:Drivers/CMSIS/Include/core_cm0.h **** \brief get FPU type + 883:Drivers/CMSIS/Include/core_cm0.h **** \details returns the FPU type + 884:Drivers/CMSIS/Include/core_cm0.h **** \returns + 885:Drivers/CMSIS/Include/core_cm0.h **** - \b 0: No FPU + 886:Drivers/CMSIS/Include/core_cm0.h **** - \b 1: Single precision FPU + 887:Drivers/CMSIS/Include/core_cm0.h **** - \b 2: Double + Single precision FPU + 888:Drivers/CMSIS/Include/core_cm0.h **** */ + 889:Drivers/CMSIS/Include/core_cm0.h **** __STATIC_INLINE uint32_t SCB_GetFPUType(void) + 890:Drivers/CMSIS/Include/core_cm0.h **** { + 891:Drivers/CMSIS/Include/core_cm0.h **** return 0U; /* No FPU */ + 892:Drivers/CMSIS/Include/core_cm0.h **** } + 893:Drivers/CMSIS/Include/core_cm0.h **** + 894:Drivers/CMSIS/Include/core_cm0.h **** + 895:Drivers/CMSIS/Include/core_cm0.h **** /*@} end of CMSIS_Core_FpuFunctions */ + 896:Drivers/CMSIS/Include/core_cm0.h **** + 897:Drivers/CMSIS/Include/core_cm0.h **** + 898:Drivers/CMSIS/Include/core_cm0.h **** + 899:Drivers/CMSIS/Include/core_cm0.h **** /* ################################## SysTick function ######################################## + 900:Drivers/CMSIS/Include/core_cm0.h **** /** + 901:Drivers/CMSIS/Include/core_cm0.h **** \ingroup CMSIS_Core_FunctionInterface + 902:Drivers/CMSIS/Include/core_cm0.h **** \defgroup CMSIS_Core_SysTickFunctions SysTick Functions + 903:Drivers/CMSIS/Include/core_cm0.h **** \brief Functions that configure the System. + 904:Drivers/CMSIS/Include/core_cm0.h **** @{ + 905:Drivers/CMSIS/Include/core_cm0.h **** */ + 906:Drivers/CMSIS/Include/core_cm0.h **** + 907:Drivers/CMSIS/Include/core_cm0.h **** #if defined (__Vendor_SysTickConfig) && (__Vendor_SysTickConfig == 0U) + 908:Drivers/CMSIS/Include/core_cm0.h **** + 909:Drivers/CMSIS/Include/core_cm0.h **** /** + 910:Drivers/CMSIS/Include/core_cm0.h **** \brief System Tick Configuration + 911:Drivers/CMSIS/Include/core_cm0.h **** \details Initializes the System Timer and its interrupt, and starts the System Tick Timer. + 912:Drivers/CMSIS/Include/core_cm0.h **** Counter is in free running mode to generate periodic interrupts. + 913:Drivers/CMSIS/Include/core_cm0.h **** \param [in] ticks Number of ticks between two interrupts. + 914:Drivers/CMSIS/Include/core_cm0.h **** \return 0 Function succeeded. + 915:Drivers/CMSIS/Include/core_cm0.h **** \return 1 Function failed. + 916:Drivers/CMSIS/Include/core_cm0.h **** \note When the variable __Vendor_SysTickConfig is set to 1, then the + 917:Drivers/CMSIS/Include/core_cm0.h **** function SysTick_Config is not included. In this case, the file device. + 918:Drivers/CMSIS/Include/core_cm0.h **** must contain a vendor-specific implementation of this function. + 919:Drivers/CMSIS/Include/core_cm0.h **** */ + 920:Drivers/CMSIS/Include/core_cm0.h **** __STATIC_INLINE uint32_t SysTick_Config(uint32_t ticks) + 921:Drivers/CMSIS/Include/core_cm0.h **** { + 280 .loc 2 921 1 view -0 + 281 .cfi_startproc + 282 @ args = 0, pretend = 0, frame = 0 + 283 @ frame_needed = 0, uses_anonymous_args = 0 + 284 @ link register save eliminated. + 922:Drivers/CMSIS/Include/core_cm0.h **** if ((ticks - 1UL) > SysTick_LOAD_RELOAD_Msk) + 285 .loc 2 922 3 view .LVU61 + 286 .loc 2 922 14 is_stmt 0 view .LVU62 + 287 0000 0138 subs r0, r0, #1 + 288 .LVL11: + 289 .loc 2 922 6 view .LVU63 + 290 0002 8023 movs r3, #128 + 291 0004 5B04 lsls r3, r3, #17 + 292 0006 9842 cmp r0, r3 + ARM GAS /tmp/ccDOWgYG.s page 38 + + + 293 0008 0FD2 bcs .L17 + 923:Drivers/CMSIS/Include/core_cm0.h **** { + 924:Drivers/CMSIS/Include/core_cm0.h **** return (1UL); /* Reload value impossible */ + 925:Drivers/CMSIS/Include/core_cm0.h **** } + 926:Drivers/CMSIS/Include/core_cm0.h **** + 927:Drivers/CMSIS/Include/core_cm0.h **** SysTick->LOAD = (uint32_t)(ticks - 1UL); /* set reload register */ + 294 .loc 2 927 3 is_stmt 1 view .LVU64 + 295 .loc 2 927 18 is_stmt 0 view .LVU65 + 296 000a 094A ldr r2, .L18 + 297 000c 5060 str r0, [r2, #4] + 928:Drivers/CMSIS/Include/core_cm0.h **** NVIC_SetPriority (SysTick_IRQn, (1UL << __NVIC_PRIO_BITS) - 1UL); /* set Priority for Systick Int + 298 .loc 2 928 3 is_stmt 1 view .LVU66 + 299 .LVL12: + 300 .LBB30: + 301 .LBI30: + 730:Drivers/CMSIS/Include/core_cm0.h **** { + 302 .loc 2 730 22 view .LVU67 + 303 .LBB31: + 732:Drivers/CMSIS/Include/core_cm0.h **** { + 304 .loc 2 732 3 view .LVU68 + 739:Drivers/CMSIS/Include/core_cm0.h **** (((priority << (8U - __NVIC_PRIO_BITS)) & (uint32_t)0xFFUL) << _BIT_SHIFT(IRQn))); + 305 .loc 2 739 5 view .LVU69 + 739:Drivers/CMSIS/Include/core_cm0.h **** (((priority << (8U - __NVIC_PRIO_BITS)) & (uint32_t)0xFFUL) << _BIT_SHIFT(IRQn))); + 306 .loc 2 739 52 is_stmt 0 view .LVU70 + 307 000e 0948 ldr r0, .L18+4 + 308 .LVL13: + 739:Drivers/CMSIS/Include/core_cm0.h **** (((priority << (8U - __NVIC_PRIO_BITS)) & (uint32_t)0xFFUL) << _BIT_SHIFT(IRQn))); + 309 .loc 2 739 52 view .LVU71 + 310 0010 036A ldr r3, [r0, #32] + 739:Drivers/CMSIS/Include/core_cm0.h **** (((priority << (8U - __NVIC_PRIO_BITS)) & (uint32_t)0xFFUL) << _BIT_SHIFT(IRQn))); + 311 .loc 2 739 33 view .LVU72 + 312 0012 1B02 lsls r3, r3, #8 + 313 0014 1B0A lsrs r3, r3, #8 + 739:Drivers/CMSIS/Include/core_cm0.h **** (((priority << (8U - __NVIC_PRIO_BITS)) & (uint32_t)0xFFUL) << _BIT_SHIFT(IRQn))); + 314 .loc 2 739 102 view .LVU73 + 315 0016 C021 movs r1, #192 + 316 0018 0906 lsls r1, r1, #24 + 317 001a 0B43 orrs r3, r1 + 739:Drivers/CMSIS/Include/core_cm0.h **** (((priority << (8U - __NVIC_PRIO_BITS)) & (uint32_t)0xFFUL) << _BIT_SHIFT(IRQn))); + 318 .loc 2 739 30 view .LVU74 + 319 001c 0362 str r3, [r0, #32] + 320 .LVL14: + 739:Drivers/CMSIS/Include/core_cm0.h **** (((priority << (8U - __NVIC_PRIO_BITS)) & (uint32_t)0xFFUL) << _BIT_SHIFT(IRQn))); + 321 .loc 2 739 30 view .LVU75 + 322 .LBE31: + 323 .LBE30: + 929:Drivers/CMSIS/Include/core_cm0.h **** SysTick->VAL = 0UL; /* Load the SysTick Counter Val + 324 .loc 2 929 3 is_stmt 1 view .LVU76 + 325 .loc 2 929 18 is_stmt 0 view .LVU77 + 326 001e 0023 movs r3, #0 + 327 0020 9360 str r3, [r2, #8] + 930:Drivers/CMSIS/Include/core_cm0.h **** SysTick->CTRL = SysTick_CTRL_CLKSOURCE_Msk | + 328 .loc 2 930 3 is_stmt 1 view .LVU78 + 329 .loc 2 930 18 is_stmt 0 view .LVU79 + 330 0022 0733 adds r3, r3, #7 + 331 0024 1360 str r3, [r2] + 931:Drivers/CMSIS/Include/core_cm0.h **** SysTick_CTRL_TICKINT_Msk | + ARM GAS /tmp/ccDOWgYG.s page 39 + + + 932:Drivers/CMSIS/Include/core_cm0.h **** SysTick_CTRL_ENABLE_Msk; /* Enable SysTick IRQ and SysTi + 933:Drivers/CMSIS/Include/core_cm0.h **** return (0UL); /* Function successful */ + 332 .loc 2 933 3 is_stmt 1 view .LVU80 + 333 .loc 2 933 10 is_stmt 0 view .LVU81 + 334 0026 0020 movs r0, #0 + 335 .L15: + 934:Drivers/CMSIS/Include/core_cm0.h **** } + 336 .loc 2 934 1 view .LVU82 + 337 @ sp needed + 338 0028 7047 bx lr + 339 .L17: + 924:Drivers/CMSIS/Include/core_cm0.h **** } + 340 .loc 2 924 12 view .LVU83 + 341 002a 0120 movs r0, #1 + 342 002c FCE7 b .L15 + 343 .L19: + 344 002e C046 .align 2 + 345 .L18: + 346 0030 10E000E0 .word -536813552 + 347 0034 00ED00E0 .word -536810240 + 348 .cfi_endproc + 349 .LFE39: + 351 .section .text.HAL_NVIC_SetPriority,"ax",%progbits + 352 .align 1 + 353 .global HAL_NVIC_SetPriority + 354 .syntax unified + 355 .code 16 + 356 .thumb_func + 358 HAL_NVIC_SetPriority: + 359 .LVL15: + 360 .LFB40: + 1:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_cortex.c **** /** + 2:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_cortex.c **** ****************************************************************************** + 3:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_cortex.c **** * @file stm32f0xx_hal_cortex.c + 4:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_cortex.c **** * @author MCD Application Team + 5:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_cortex.c **** * @brief CORTEX HAL module driver. + 6:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_cortex.c **** * This file provides firmware functions to manage the following + 7:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_cortex.c **** * functionalities of the CORTEX: + 8:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_cortex.c **** * + Initialization and de-initialization functions + 9:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_cortex.c **** * + Peripheral Control functions + 10:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_cortex.c **** * + 11:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_cortex.c **** * @verbatim + 12:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_cortex.c **** ============================================================================== + 13:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_cortex.c **** ##### How to use this driver ##### + 14:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_cortex.c **** ============================================================================== + 15:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_cortex.c **** + 16:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_cortex.c **** [..] + 17:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_cortex.c **** *** How to configure Interrupts using CORTEX HAL driver *** + 18:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_cortex.c **** =========================================================== + 19:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_cortex.c **** [..] + 20:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_cortex.c **** This section provides functions allowing to configure the NVIC interrupts (IRQ). + 21:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_cortex.c **** The Cortex-M0 exceptions are managed by CMSIS functions. + 22:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_cortex.c **** (#) Enable and Configure the priority of the selected IRQ Channels. + 23:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_cortex.c **** The priority can be 0..3. + 24:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_cortex.c **** + 25:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_cortex.c **** -@- Lower priority values gives higher priority. + 26:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_cortex.c **** -@- Priority Order: + ARM GAS /tmp/ccDOWgYG.s page 40 + + + 27:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_cortex.c **** (#@) Lowest priority. + 28:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_cortex.c **** (#@) Lowest hardware priority (IRQn position). + 29:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_cortex.c **** + 30:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_cortex.c **** (#) Configure the priority of the selected IRQ Channels using HAL_NVIC_SetPriority() + 31:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_cortex.c **** + 32:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_cortex.c **** (#) Enable the selected IRQ Channels using HAL_NVIC_EnableIRQ() + 33:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_cortex.c **** + 34:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_cortex.c **** -@- Negative value of IRQn_Type are not allowed. + 35:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_cortex.c **** + 36:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_cortex.c **** + 37:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_cortex.c **** [..] + 38:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_cortex.c **** *** How to configure Systick using CORTEX HAL driver *** + 39:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_cortex.c **** ======================================================== + 40:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_cortex.c **** [..] + 41:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_cortex.c **** Setup SysTick Timer for time base. + 42:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_cortex.c **** + 43:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_cortex.c **** (+) The HAL_SYSTICK_Config()function calls the SysTick_Config() function which + 44:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_cortex.c **** is a CMSIS function that: + 45:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_cortex.c **** (++) Configures the SysTick Reload register with value passed as function parameter. + 46:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_cortex.c **** (++) Configures the SysTick IRQ priority to the lowest value (0x03). + 47:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_cortex.c **** (++) Resets the SysTick Counter register. + 48:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_cortex.c **** (++) Configures the SysTick Counter clock source to be Core Clock Source (HCLK). + 49:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_cortex.c **** (++) Enables the SysTick Interrupt. + 50:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_cortex.c **** (++) Starts the SysTick Counter. + 51:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_cortex.c **** + 52:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_cortex.c **** (+) You can change the SysTick Clock source to be HCLK_Div8 by calling the macro + 53:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_cortex.c **** HAL_SYSTICK_CLKSourceConfig(SYSTICK_CLKSOURCE_HCLK_DIV8) just after the + 54:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_cortex.c **** HAL_SYSTICK_Config() function call. The HAL_SYSTICK_CLKSourceConfig() macro is defined + 55:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_cortex.c **** inside the stm32f0xx_hal_cortex.h file. + 56:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_cortex.c **** + 57:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_cortex.c **** (+) You can change the SysTick IRQ priority by calling the + 58:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_cortex.c **** HAL_NVIC_SetPriority(SysTick_IRQn,...) function just after the HAL_SYSTICK_Config() function + 59:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_cortex.c **** call. The HAL_NVIC_SetPriority() call the NVIC_SetPriority() function which is a CMSIS funct + 60:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_cortex.c **** + 61:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_cortex.c **** (+) To adjust the SysTick time base, use the following formula: + 62:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_cortex.c **** + 63:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_cortex.c **** Reload Value = SysTick Counter Clock (Hz) x Desired Time base (s) + 64:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_cortex.c **** (++) Reload Value is the parameter to be passed for HAL_SYSTICK_Config() function + 65:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_cortex.c **** (++) Reload Value should not exceed 0xFFFFFF + 66:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_cortex.c **** + 67:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_cortex.c **** @endverbatim + 68:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_cortex.c **** ****************************************************************************** + 69:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_cortex.c **** * @attention + 70:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_cortex.c **** * + 71:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_cortex.c **** * Copyright (c) 2016 STMicroelectronics. + 72:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_cortex.c **** * All rights reserved. + 73:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_cortex.c **** * + 74:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_cortex.c **** * This software is licensed under terms that can be found in the LICENSE file in + 75:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_cortex.c **** * the root directory of this software component. + 76:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_cortex.c **** * If no LICENSE file comes with this software, it is provided AS-IS. + 77:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_cortex.c **** * + 78:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_cortex.c **** ****************************************************************************** + 79:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_cortex.c **** */ + 80:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_cortex.c **** + 81:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_cortex.c **** /* Includes ------------------------------------------------------------------*/ + 82:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_cortex.c **** #include "stm32f0xx_hal.h" + 83:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_cortex.c **** + ARM GAS /tmp/ccDOWgYG.s page 41 + + + 84:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_cortex.c **** /** @addtogroup STM32F0xx_HAL_Driver + 85:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_cortex.c **** * @{ + 86:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_cortex.c **** */ + 87:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_cortex.c **** + 88:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_cortex.c **** /** @defgroup CORTEX CORTEX + 89:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_cortex.c **** * @brief CORTEX CORTEX HAL module driver + 90:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_cortex.c **** * @{ + 91:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_cortex.c **** */ + 92:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_cortex.c **** + 93:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_cortex.c **** #ifdef HAL_CORTEX_MODULE_ENABLED + 94:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_cortex.c **** + 95:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_cortex.c **** /* Private typedef -----------------------------------------------------------*/ + 96:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_cortex.c **** /* Private define ------------------------------------------------------------*/ + 97:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_cortex.c **** /* Private macro -------------------------------------------------------------*/ + 98:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_cortex.c **** /* Private variables ---------------------------------------------------------*/ + 99:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_cortex.c **** /* Private function prototypes -----------------------------------------------*/ + 100:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_cortex.c **** /* Exported functions ---------------------------------------------------------*/ + 101:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_cortex.c **** + 102:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_cortex.c **** /** @defgroup CORTEX_Exported_Functions CORTEX Exported Functions + 103:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_cortex.c **** * @{ + 104:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_cortex.c **** */ + 105:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_cortex.c **** + 106:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_cortex.c **** + 107:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_cortex.c **** /** @defgroup CORTEX_Exported_Functions_Group1 Initialization and de-initialization functions + 108:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_cortex.c **** * @brief Initialization and Configuration functions + 109:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_cortex.c **** * + 110:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_cortex.c **** @verbatim + 111:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_cortex.c **** ============================================================================== + 112:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_cortex.c **** ##### Initialization and de-initialization functions ##### + 113:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_cortex.c **** ============================================================================== + 114:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_cortex.c **** [..] + 115:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_cortex.c **** This section provides the CORTEX HAL driver functions allowing to configure Interrupts + 116:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_cortex.c **** Systick functionalities + 117:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_cortex.c **** + 118:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_cortex.c **** @endverbatim + 119:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_cortex.c **** * @{ + 120:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_cortex.c **** */ + 121:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_cortex.c **** + 122:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_cortex.c **** /** + 123:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_cortex.c **** * @brief Sets the priority of an interrupt. + 124:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_cortex.c **** * @param IRQn External interrupt number . + 125:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_cortex.c **** * This parameter can be an enumerator of IRQn_Type enumeration + 126:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_cortex.c **** * (For the complete STM32 Devices IRQ Channels list, please refer to stm32f0xx.h file) + 127:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_cortex.c **** * @param PreemptPriority The preemption priority for the IRQn channel. + 128:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_cortex.c **** * This parameter can be a value between 0 and 3. + 129:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_cortex.c **** * A lower priority value indicates a higher priority + 130:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_cortex.c **** * @param SubPriority the subpriority level for the IRQ channel. + 131:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_cortex.c **** * with stm32f0xx devices, this parameter is a dummy value and it is ignored, because + 132:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_cortex.c **** * no subpriority supported in Cortex M0 based products. + 133:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_cortex.c **** * @retval None + 134:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_cortex.c **** */ + 135:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_cortex.c **** void HAL_NVIC_SetPriority(IRQn_Type IRQn, uint32_t PreemptPriority, uint32_t SubPriority) + 136:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_cortex.c **** { + 361 .loc 1 136 1 is_stmt 1 view -0 + 362 .cfi_startproc + 363 @ args = 0, pretend = 0, frame = 0 + 364 @ frame_needed = 0, uses_anonymous_args = 0 + ARM GAS /tmp/ccDOWgYG.s page 42 + + + 365 .loc 1 136 1 is_stmt 0 view .LVU85 + 366 0000 10B5 push {r4, lr} + 367 .cfi_def_cfa_offset 8 + 368 .cfi_offset 4, -8 + 369 .cfi_offset 14, -4 + 137:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_cortex.c **** /* Check the parameters */ + 138:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_cortex.c **** assert_param(IS_NVIC_PREEMPTION_PRIORITY(PreemptPriority)); + 370 .loc 1 138 3 is_stmt 1 view .LVU86 + 139:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_cortex.c **** NVIC_SetPriority(IRQn,PreemptPriority); + 371 .loc 1 139 3 view .LVU87 + 372 0002 FFF7FEFF bl __NVIC_SetPriority + 373 .LVL16: + 140:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_cortex.c **** } + 374 .loc 1 140 1 is_stmt 0 view .LVU88 + 375 @ sp needed + 376 0006 10BD pop {r4, pc} + 377 .cfi_endproc + 378 .LFE40: + 380 .section .text.HAL_NVIC_EnableIRQ,"ax",%progbits + 381 .align 1 + 382 .global HAL_NVIC_EnableIRQ + 383 .syntax unified + 384 .code 16 + 385 .thumb_func + 387 HAL_NVIC_EnableIRQ: + 388 .LVL17: + 389 .LFB41: + 141:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_cortex.c **** + 142:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_cortex.c **** /** + 143:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_cortex.c **** * @brief Enables a device specific interrupt in the NVIC interrupt controller. + 144:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_cortex.c **** * @note To configure interrupts priority correctly, the NVIC_PriorityGroupConfig() + 145:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_cortex.c **** * function should be called before. + 146:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_cortex.c **** * @param IRQn External interrupt number. + 147:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_cortex.c **** * This parameter can be an enumerator of IRQn_Type enumeration + 148:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_cortex.c **** * (For the complete STM32 Devices IRQ Channels list, please refer to the appropriate CMSI + 149:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_cortex.c **** * @retval None + 150:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_cortex.c **** */ + 151:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_cortex.c **** void HAL_NVIC_EnableIRQ(IRQn_Type IRQn) + 152:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_cortex.c **** { + 390 .loc 1 152 1 is_stmt 1 view -0 + 391 .cfi_startproc + 392 @ args = 0, pretend = 0, frame = 0 + 393 @ frame_needed = 0, uses_anonymous_args = 0 + 394 @ link register save eliminated. + 153:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_cortex.c **** /* Check the parameters */ + 154:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_cortex.c **** assert_param(IS_NVIC_DEVICE_IRQ(IRQn)); + 395 .loc 1 154 3 view .LVU90 + 155:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_cortex.c **** + 156:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_cortex.c **** /* Enable interrupt */ + 157:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_cortex.c **** NVIC_EnableIRQ(IRQn); + 396 .loc 1 157 3 view .LVU91 + 397 .LBB32: + 398 .LBI32: + 623:Drivers/CMSIS/Include/core_cm0.h **** { + 399 .loc 2 623 22 view .LVU92 + 400 .LBB33: + 625:Drivers/CMSIS/Include/core_cm0.h **** { + ARM GAS /tmp/ccDOWgYG.s page 43 + + + 401 .loc 2 625 3 view .LVU93 + 625:Drivers/CMSIS/Include/core_cm0.h **** { + 402 .loc 2 625 6 is_stmt 0 view .LVU94 + 403 0000 0028 cmp r0, #0 + 404 0002 05DB blt .L21 + 627:Drivers/CMSIS/Include/core_cm0.h **** } + 405 .loc 2 627 5 is_stmt 1 view .LVU95 + 627:Drivers/CMSIS/Include/core_cm0.h **** } + 406 .loc 2 627 58 is_stmt 0 view .LVU96 + 407 0004 1F22 movs r2, #31 + 408 0006 0240 ands r2, r0 + 627:Drivers/CMSIS/Include/core_cm0.h **** } + 409 .loc 2 627 22 view .LVU97 + 410 0008 0123 movs r3, #1 + 411 000a 9340 lsls r3, r3, r2 + 627:Drivers/CMSIS/Include/core_cm0.h **** } + 412 .loc 2 627 20 view .LVU98 + 413 000c 014A ldr r2, .L23 + 414 000e 1360 str r3, [r2] + 415 .LVL18: + 416 .L21: + 627:Drivers/CMSIS/Include/core_cm0.h **** } + 417 .loc 2 627 20 view .LVU99 + 418 .LBE33: + 419 .LBE32: + 158:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_cortex.c **** } + 420 .loc 1 158 1 view .LVU100 + 421 @ sp needed + 422 0010 7047 bx lr + 423 .L24: + 424 0012 C046 .align 2 + 425 .L23: + 426 0014 00E100E0 .word -536813312 + 427 .cfi_endproc + 428 .LFE41: + 430 .section .text.HAL_NVIC_DisableIRQ,"ax",%progbits + 431 .align 1 + 432 .global HAL_NVIC_DisableIRQ + 433 .syntax unified + 434 .code 16 + 435 .thumb_func + 437 HAL_NVIC_DisableIRQ: + 438 .LVL19: + 439 .LFB42: + 159:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_cortex.c **** + 160:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_cortex.c **** /** + 161:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_cortex.c **** * @brief Disables a device specific interrupt in the NVIC interrupt controller. + 162:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_cortex.c **** * @param IRQn External interrupt number. + 163:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_cortex.c **** * This parameter can be an enumerator of IRQn_Type enumeration + 164:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_cortex.c **** * (For the complete STM32 Devices IRQ Channels list, please refer to the appropriate CMSI + 165:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_cortex.c **** * @retval None + 166:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_cortex.c **** */ + 167:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_cortex.c **** void HAL_NVIC_DisableIRQ(IRQn_Type IRQn) + 168:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_cortex.c **** { + 440 .loc 1 168 1 is_stmt 1 view -0 + 441 .cfi_startproc + 442 @ args = 0, pretend = 0, frame = 0 + ARM GAS /tmp/ccDOWgYG.s page 44 + + + 443 @ frame_needed = 0, uses_anonymous_args = 0 + 444 @ link register save eliminated. + 169:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_cortex.c **** /* Check the parameters */ + 170:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_cortex.c **** assert_param(IS_NVIC_DEVICE_IRQ(IRQn)); + 445 .loc 1 170 3 view .LVU102 + 171:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_cortex.c **** + 172:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_cortex.c **** /* Disable interrupt */ + 173:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_cortex.c **** NVIC_DisableIRQ(IRQn); + 446 .loc 1 173 3 view .LVU103 + 447 .LBB34: + 448 .LBI34: + 659:Drivers/CMSIS/Include/core_cm0.h **** { + 449 .loc 2 659 22 view .LVU104 + 450 .LBB35: + 661:Drivers/CMSIS/Include/core_cm0.h **** { + 451 .loc 2 661 3 view .LVU105 + 661:Drivers/CMSIS/Include/core_cm0.h **** { + 452 .loc 2 661 6 is_stmt 0 view .LVU106 + 453 0000 0028 cmp r0, #0 + 454 0002 0ADB blt .L25 + 663:Drivers/CMSIS/Include/core_cm0.h **** __DSB(); + 455 .loc 2 663 5 is_stmt 1 view .LVU107 + 663:Drivers/CMSIS/Include/core_cm0.h **** __DSB(); + 456 .loc 2 663 58 is_stmt 0 view .LVU108 + 457 0004 1F22 movs r2, #31 + 458 0006 0240 ands r2, r0 + 663:Drivers/CMSIS/Include/core_cm0.h **** __DSB(); + 459 .loc 2 663 22 view .LVU109 + 460 0008 0123 movs r3, #1 + 461 000a 9340 lsls r3, r3, r2 + 663:Drivers/CMSIS/Include/core_cm0.h **** __DSB(); + 462 .loc 2 663 20 view .LVU110 + 463 000c 0349 ldr r1, .L27 + 464 000e 8022 movs r2, #128 + 465 0010 8B50 str r3, [r1, r2] + 664:Drivers/CMSIS/Include/core_cm0.h **** __ISB(); + 466 .loc 2 664 5 is_stmt 1 view .LVU111 + 467 .LBB36: + 468 .LBI36: + 877:Drivers/CMSIS/Include/cmsis_gcc.h **** { + 469 .loc 3 877 27 view .LVU112 + 470 .LBB37: + 471 .loc 3 879 3 view .LVU113 + 472 .syntax divided + 473 @ 879 "Drivers/CMSIS/Include/cmsis_gcc.h" 1 + 474 0012 BFF34F8F dsb 0xF + 475 @ 0 "" 2 + 476 .thumb + 477 .syntax unified + 478 .LBE37: + 479 .LBE36: + 665:Drivers/CMSIS/Include/core_cm0.h **** } + 480 .loc 2 665 5 view .LVU114 + 481 .LBB38: + 482 .LBI38: + 866:Drivers/CMSIS/Include/cmsis_gcc.h **** { + 483 .loc 3 866 27 view .LVU115 + ARM GAS /tmp/ccDOWgYG.s page 45 + + + 484 .LBB39: + 868:Drivers/CMSIS/Include/cmsis_gcc.h **** } + 485 .loc 3 868 3 view .LVU116 + 486 .syntax divided + 487 @ 868 "Drivers/CMSIS/Include/cmsis_gcc.h" 1 + 488 0016 BFF36F8F isb 0xF + 489 @ 0 "" 2 + 490 .LVL20: + 491 .thumb + 492 .syntax unified + 493 .L25: + 868:Drivers/CMSIS/Include/cmsis_gcc.h **** } + 494 .loc 3 868 3 is_stmt 0 view .LVU117 + 495 .LBE39: + 496 .LBE38: + 497 .LBE35: + 498 .LBE34: + 174:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_cortex.c **** } + 499 .loc 1 174 1 view .LVU118 + 500 @ sp needed + 501 001a 7047 bx lr + 502 .L28: + 503 .align 2 + 504 .L27: + 505 001c 00E100E0 .word -536813312 + 506 .cfi_endproc + 507 .LFE42: + 509 .section .text.HAL_NVIC_SystemReset,"ax",%progbits + 510 .align 1 + 511 .global HAL_NVIC_SystemReset + 512 .syntax unified + 513 .code 16 + 514 .thumb_func + 516 HAL_NVIC_SystemReset: + 517 .LFB43: + 175:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_cortex.c **** + 176:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_cortex.c **** /** + 177:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_cortex.c **** * @brief Initiates a system reset request to reset the MCU. + 178:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_cortex.c **** * @retval None + 179:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_cortex.c **** */ + 180:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_cortex.c **** void HAL_NVIC_SystemReset(void) + 181:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_cortex.c **** { + 518 .loc 1 181 1 is_stmt 1 view -0 + 519 .cfi_startproc + 520 @ Volatile: function does not return. + 521 @ args = 0, pretend = 0, frame = 0 + 522 @ frame_needed = 0, uses_anonymous_args = 0 + 523 0000 10B5 push {r4, lr} + 524 .cfi_def_cfa_offset 8 + 525 .cfi_offset 4, -8 + 526 .cfi_offset 14, -4 + 182:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_cortex.c **** /* System Reset */ + 183:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_cortex.c **** NVIC_SystemReset(); + 527 .loc 1 183 3 view .LVU120 + 528 0002 FFF7FEFF bl __NVIC_SystemReset + 529 .LVL21: + 530 .cfi_endproc + ARM GAS /tmp/ccDOWgYG.s page 46 + + + 531 .LFE43: + 533 .section .text.HAL_SYSTICK_Config,"ax",%progbits + 534 .align 1 + 535 .global HAL_SYSTICK_Config + 536 .syntax unified + 537 .code 16 + 538 .thumb_func + 540 HAL_SYSTICK_Config: + 541 .LVL22: + 542 .LFB44: + 184:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_cortex.c **** } + 185:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_cortex.c **** + 186:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_cortex.c **** /** + 187:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_cortex.c **** * @brief Initializes the System Timer and its interrupt, and starts the System Tick Timer. + 188:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_cortex.c **** * Counter is in free running mode to generate periodic interrupts. + 189:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_cortex.c **** * @param TicksNumb Specifies the ticks Number of ticks between two interrupts. + 190:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_cortex.c **** * @retval status: - 0 Function succeeded. + 191:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_cortex.c **** * - 1 Function failed. + 192:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_cortex.c **** */ + 193:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_cortex.c **** uint32_t HAL_SYSTICK_Config(uint32_t TicksNumb) + 194:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_cortex.c **** { + 543 .loc 1 194 1 view -0 + 544 .cfi_startproc + 545 @ args = 0, pretend = 0, frame = 0 + 546 @ frame_needed = 0, uses_anonymous_args = 0 + 547 .loc 1 194 1 is_stmt 0 view .LVU122 + 548 0000 10B5 push {r4, lr} + 549 .cfi_def_cfa_offset 8 + 550 .cfi_offset 4, -8 + 551 .cfi_offset 14, -4 + 195:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_cortex.c **** return SysTick_Config(TicksNumb); + 552 .loc 1 195 4 is_stmt 1 view .LVU123 + 553 .loc 1 195 11 is_stmt 0 view .LVU124 + 554 0002 FFF7FEFF bl SysTick_Config + 555 .LVL23: + 196:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_cortex.c **** } + 556 .loc 1 196 1 view .LVU125 + 557 @ sp needed + 558 0006 10BD pop {r4, pc} + 559 .cfi_endproc + 560 .LFE44: + 562 .section .text.HAL_NVIC_GetPriority,"ax",%progbits + 563 .align 1 + 564 .global HAL_NVIC_GetPriority + 565 .syntax unified + 566 .code 16 + 567 .thumb_func + 569 HAL_NVIC_GetPriority: + 570 .LVL24: + 571 .LFB45: + 197:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_cortex.c **** /** + 198:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_cortex.c **** * @} + 199:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_cortex.c **** */ + 200:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_cortex.c **** + 201:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_cortex.c **** /** @defgroup CORTEX_Exported_Functions_Group2 Peripheral Control functions + 202:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_cortex.c **** * @brief Cortex control functions + 203:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_cortex.c **** * + ARM GAS /tmp/ccDOWgYG.s page 47 + + + 204:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_cortex.c **** @verbatim + 205:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_cortex.c **** ============================================================================== + 206:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_cortex.c **** ##### Peripheral Control functions ##### + 207:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_cortex.c **** ============================================================================== + 208:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_cortex.c **** [..] + 209:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_cortex.c **** This subsection provides a set of functions allowing to control the CORTEX + 210:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_cortex.c **** (NVIC, SYSTICK) functionalities. + 211:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_cortex.c **** + 212:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_cortex.c **** + 213:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_cortex.c **** @endverbatim + 214:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_cortex.c **** * @{ + 215:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_cortex.c **** */ + 216:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_cortex.c **** + 217:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_cortex.c **** + 218:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_cortex.c **** /** + 219:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_cortex.c **** * @brief Gets the priority of an interrupt. + 220:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_cortex.c **** * @param IRQn External interrupt number. + 221:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_cortex.c **** * This parameter can be an enumerator of IRQn_Type enumeration + 222:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_cortex.c **** * (For the complete STM32 Devices IRQ Channels list, please refer to the appropriate CMSI + 223:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_cortex.c **** * @retval None + 224:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_cortex.c **** */ + 225:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_cortex.c **** uint32_t HAL_NVIC_GetPriority(IRQn_Type IRQn) + 226:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_cortex.c **** { + 572 .loc 1 226 1 is_stmt 1 view -0 + 573 .cfi_startproc + 574 @ args = 0, pretend = 0, frame = 0 + 575 @ frame_needed = 0, uses_anonymous_args = 0 + 576 .loc 1 226 1 is_stmt 0 view .LVU127 + 577 0000 10B5 push {r4, lr} + 578 .cfi_def_cfa_offset 8 + 579 .cfi_offset 4, -8 + 580 .cfi_offset 14, -4 + 227:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_cortex.c **** /* Get priority for Cortex-M system or device specific interrupts */ + 228:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_cortex.c **** return NVIC_GetPriority(IRQn); + 581 .loc 1 228 3 is_stmt 1 view .LVU128 + 582 .loc 1 228 10 is_stmt 0 view .LVU129 + 583 0002 FFF7FEFF bl __NVIC_GetPriority + 584 .LVL25: + 229:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_cortex.c **** } + 585 .loc 1 229 1 view .LVU130 + 586 @ sp needed + 587 0006 10BD pop {r4, pc} + 588 .cfi_endproc + 589 .LFE45: + 591 .section .text.HAL_NVIC_SetPendingIRQ,"ax",%progbits + 592 .align 1 + 593 .global HAL_NVIC_SetPendingIRQ + 594 .syntax unified + 595 .code 16 + 596 .thumb_func + 598 HAL_NVIC_SetPendingIRQ: + 599 .LVL26: + 600 .LFB46: + 230:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_cortex.c **** + 231:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_cortex.c **** /** + 232:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_cortex.c **** * @brief Sets Pending bit of an external interrupt. + 233:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_cortex.c **** * @param IRQn External interrupt number + ARM GAS /tmp/ccDOWgYG.s page 48 + + + 234:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_cortex.c **** * This parameter can be an enumerator of IRQn_Type enumeration + 235:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_cortex.c **** * (For the complete STM32 Devices IRQ Channels list, please refer to the appropriate CMSI + 236:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_cortex.c **** * @retval None + 237:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_cortex.c **** */ + 238:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_cortex.c **** void HAL_NVIC_SetPendingIRQ(IRQn_Type IRQn) + 239:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_cortex.c **** { + 601 .loc 1 239 1 is_stmt 1 view -0 + 602 .cfi_startproc + 603 @ args = 0, pretend = 0, frame = 0 + 604 @ frame_needed = 0, uses_anonymous_args = 0 + 605 @ link register save eliminated. + 240:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_cortex.c **** /* Check the parameters */ + 241:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_cortex.c **** assert_param(IS_NVIC_DEVICE_IRQ(IRQn)); + 606 .loc 1 241 3 view .LVU132 + 242:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_cortex.c **** + 243:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_cortex.c **** /* Set interrupt pending */ + 244:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_cortex.c **** NVIC_SetPendingIRQ(IRQn); + 607 .loc 1 244 3 view .LVU133 + 608 .LBB40: + 609 .LBI40: + 697:Drivers/CMSIS/Include/core_cm0.h **** { + 610 .loc 2 697 22 view .LVU134 + 611 .LBB41: + 699:Drivers/CMSIS/Include/core_cm0.h **** { + 612 .loc 2 699 3 view .LVU135 + 699:Drivers/CMSIS/Include/core_cm0.h **** { + 613 .loc 2 699 6 is_stmt 0 view .LVU136 + 614 0000 0028 cmp r0, #0 + 615 0002 07DB blt .L32 + 701:Drivers/CMSIS/Include/core_cm0.h **** } + 616 .loc 2 701 5 is_stmt 1 view .LVU137 + 701:Drivers/CMSIS/Include/core_cm0.h **** } + 617 .loc 2 701 58 is_stmt 0 view .LVU138 + 618 0004 1F22 movs r2, #31 + 619 0006 0240 ands r2, r0 + 701:Drivers/CMSIS/Include/core_cm0.h **** } + 620 .loc 2 701 22 view .LVU139 + 621 0008 0123 movs r3, #1 + 622 000a 9340 lsls r3, r3, r2 + 701:Drivers/CMSIS/Include/core_cm0.h **** } + 623 .loc 2 701 20 view .LVU140 + 624 000c 0249 ldr r1, .L34 + 625 000e 8022 movs r2, #128 + 626 0010 5200 lsls r2, r2, #1 + 627 0012 8B50 str r3, [r1, r2] + 628 .LVL27: + 629 .L32: + 701:Drivers/CMSIS/Include/core_cm0.h **** } + 630 .loc 2 701 20 view .LVU141 + 631 .LBE41: + 632 .LBE40: + 245:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_cortex.c **** } + 633 .loc 1 245 1 view .LVU142 + 634 @ sp needed + 635 0014 7047 bx lr + 636 .L35: + 637 0016 C046 .align 2 + ARM GAS /tmp/ccDOWgYG.s page 49 + + + 638 .L34: + 639 0018 00E100E0 .word -536813312 + 640 .cfi_endproc + 641 .LFE46: + 643 .section .text.HAL_NVIC_GetPendingIRQ,"ax",%progbits + 644 .align 1 + 645 .global HAL_NVIC_GetPendingIRQ + 646 .syntax unified + 647 .code 16 + 648 .thumb_func + 650 HAL_NVIC_GetPendingIRQ: + 651 .LVL28: + 652 .LFB47: + 246:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_cortex.c **** + 247:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_cortex.c **** /** + 248:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_cortex.c **** * @brief Gets Pending Interrupt (reads the pending register in the NVIC + 249:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_cortex.c **** * and returns the pending bit for the specified interrupt). + 250:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_cortex.c **** * @param IRQn External interrupt number. + 251:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_cortex.c **** * This parameter can be an enumerator of IRQn_Type enumeration + 252:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_cortex.c **** * (For the complete STM32 Devices IRQ Channels list, please refer to the appropriate CMSI + 253:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_cortex.c **** * @retval status: - 0 Interrupt status is not pending. + 254:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_cortex.c **** * - 1 Interrupt status is pending. + 255:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_cortex.c **** */ + 256:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_cortex.c **** uint32_t HAL_NVIC_GetPendingIRQ(IRQn_Type IRQn) + 257:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_cortex.c **** { + 653 .loc 1 257 1 is_stmt 1 view -0 + 654 .cfi_startproc + 655 @ args = 0, pretend = 0, frame = 0 + 656 @ frame_needed = 0, uses_anonymous_args = 0 + 657 @ link register save eliminated. + 258:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_cortex.c **** /* Check the parameters */ + 259:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_cortex.c **** assert_param(IS_NVIC_DEVICE_IRQ(IRQn)); + 658 .loc 1 259 3 view .LVU144 + 260:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_cortex.c **** + 261:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_cortex.c **** /* Return 1 if pending else 0 */ + 262:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_cortex.c **** return NVIC_GetPendingIRQ(IRQn); + 659 .loc 1 262 3 view .LVU145 + 660 .LBB42: + 661 .LBI42: + 678:Drivers/CMSIS/Include/core_cm0.h **** { + 662 .loc 2 678 26 view .LVU146 + 663 .LBB43: + 680:Drivers/CMSIS/Include/core_cm0.h **** { + 664 .loc 2 680 3 view .LVU147 + 680:Drivers/CMSIS/Include/core_cm0.h **** { + 665 .loc 2 680 6 is_stmt 0 view .LVU148 + 666 0000 0028 cmp r0, #0 + 667 0002 09DB blt .L38 + 682:Drivers/CMSIS/Include/core_cm0.h **** } + 668 .loc 2 682 5 is_stmt 1 view .LVU149 + 682:Drivers/CMSIS/Include/core_cm0.h **** } + 669 .loc 2 682 35 is_stmt 0 view .LVU150 + 670 0004 054A ldr r2, .L39 + 671 0006 8023 movs r3, #128 + 672 0008 5B00 lsls r3, r3, #1 + 673 000a D358 ldr r3, [r2, r3] + 682:Drivers/CMSIS/Include/core_cm0.h **** } + ARM GAS /tmp/ccDOWgYG.s page 50 + + + 674 .loc 2 682 68 view .LVU151 + 675 000c 1F22 movs r2, #31 + 676 000e 0240 ands r2, r0 + 682:Drivers/CMSIS/Include/core_cm0.h **** } + 677 .loc 2 682 80 view .LVU152 + 678 0010 D340 lsrs r3, r3, r2 + 682:Drivers/CMSIS/Include/core_cm0.h **** } + 679 .loc 2 682 12 view .LVU153 + 680 0012 0120 movs r0, #1 + 681 .LVL29: + 682:Drivers/CMSIS/Include/core_cm0.h **** } + 682 .loc 2 682 12 view .LVU154 + 683 0014 1840 ands r0, r3 + 684 .LVL30: + 685 .L36: + 682:Drivers/CMSIS/Include/core_cm0.h **** } + 686 .loc 2 682 12 view .LVU155 + 687 .LBE43: + 688 .LBE42: + 263:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_cortex.c **** } + 689 .loc 1 263 1 view .LVU156 + 690 @ sp needed + 691 0016 7047 bx lr + 692 .LVL31: + 693 .L38: + 694 .LBB45: + 695 .LBB44: + 686:Drivers/CMSIS/Include/core_cm0.h **** } + 696 .loc 2 686 11 view .LVU157 + 697 0018 0020 movs r0, #0 + 698 .LVL32: + 686:Drivers/CMSIS/Include/core_cm0.h **** } + 699 .loc 2 686 11 view .LVU158 + 700 .LBE44: + 701 .LBE45: + 262:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_cortex.c **** } + 702 .loc 1 262 10 view .LVU159 + 703 001a FCE7 b .L36 + 704 .L40: + 705 .align 2 + 706 .L39: + 707 001c 00E100E0 .word -536813312 + 708 .cfi_endproc + 709 .LFE47: + 711 .section .text.HAL_NVIC_ClearPendingIRQ,"ax",%progbits + 712 .align 1 + 713 .global HAL_NVIC_ClearPendingIRQ + 714 .syntax unified + 715 .code 16 + 716 .thumb_func + 718 HAL_NVIC_ClearPendingIRQ: + 719 .LVL33: + 720 .LFB48: + 264:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_cortex.c **** + 265:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_cortex.c **** /** + 266:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_cortex.c **** * @brief Clears the pending bit of an external interrupt. + 267:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_cortex.c **** * @param IRQn External interrupt number. + ARM GAS /tmp/ccDOWgYG.s page 51 + + + 268:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_cortex.c **** * This parameter can be an enumerator of IRQn_Type enumeration + 269:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_cortex.c **** * (For the complete STM32 Devices IRQ Channels list, please refer to the appropriate CMSI + 270:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_cortex.c **** * @retval None + 271:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_cortex.c **** */ + 272:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_cortex.c **** void HAL_NVIC_ClearPendingIRQ(IRQn_Type IRQn) + 273:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_cortex.c **** { + 721 .loc 1 273 1 is_stmt 1 view -0 + 722 .cfi_startproc + 723 @ args = 0, pretend = 0, frame = 0 + 724 @ frame_needed = 0, uses_anonymous_args = 0 + 725 @ link register save eliminated. + 274:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_cortex.c **** /* Check the parameters */ + 275:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_cortex.c **** assert_param(IS_NVIC_DEVICE_IRQ(IRQn)); + 726 .loc 1 275 3 view .LVU161 + 276:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_cortex.c **** + 277:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_cortex.c **** /* Clear pending interrupt */ + 278:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_cortex.c **** NVIC_ClearPendingIRQ(IRQn); + 727 .loc 1 278 3 view .LVU162 + 728 .LBB46: + 729 .LBI46: + 712:Drivers/CMSIS/Include/core_cm0.h **** { + 730 .loc 2 712 22 view .LVU163 + 731 .LBB47: + 714:Drivers/CMSIS/Include/core_cm0.h **** { + 732 .loc 2 714 3 view .LVU164 + 714:Drivers/CMSIS/Include/core_cm0.h **** { + 733 .loc 2 714 6 is_stmt 0 view .LVU165 + 734 0000 0028 cmp r0, #0 + 735 0002 07DB blt .L41 + 716:Drivers/CMSIS/Include/core_cm0.h **** } + 736 .loc 2 716 5 is_stmt 1 view .LVU166 + 716:Drivers/CMSIS/Include/core_cm0.h **** } + 737 .loc 2 716 58 is_stmt 0 view .LVU167 + 738 0004 1F22 movs r2, #31 + 739 0006 0240 ands r2, r0 + 716:Drivers/CMSIS/Include/core_cm0.h **** } + 740 .loc 2 716 22 view .LVU168 + 741 0008 0123 movs r3, #1 + 742 000a 9340 lsls r3, r3, r2 + 716:Drivers/CMSIS/Include/core_cm0.h **** } + 743 .loc 2 716 20 view .LVU169 + 744 000c 0249 ldr r1, .L43 + 745 000e C022 movs r2, #192 + 746 0010 5200 lsls r2, r2, #1 + 747 0012 8B50 str r3, [r1, r2] + 748 .LVL34: + 749 .L41: + 716:Drivers/CMSIS/Include/core_cm0.h **** } + 750 .loc 2 716 20 view .LVU170 + 751 .LBE47: + 752 .LBE46: + 279:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_cortex.c **** } + 753 .loc 1 279 1 view .LVU171 + 754 @ sp needed + 755 0014 7047 bx lr + 756 .L44: + 757 0016 C046 .align 2 + ARM GAS /tmp/ccDOWgYG.s page 52 + + + 758 .L43: + 759 0018 00E100E0 .word -536813312 + 760 .cfi_endproc + 761 .LFE48: + 763 .section .text.HAL_SYSTICK_CLKSourceConfig,"ax",%progbits + 764 .align 1 + 765 .global HAL_SYSTICK_CLKSourceConfig + 766 .syntax unified + 767 .code 16 + 768 .thumb_func + 770 HAL_SYSTICK_CLKSourceConfig: + 771 .LVL35: + 772 .LFB49: + 280:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_cortex.c **** + 281:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_cortex.c **** /** + 282:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_cortex.c **** * @brief Configures the SysTick clock source. + 283:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_cortex.c **** * @param CLKSource specifies the SysTick clock source. + 284:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_cortex.c **** * This parameter can be one of the following values: + 285:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_cortex.c **** * @arg SYSTICK_CLKSOURCE_HCLK_DIV8: AHB clock divided by 8 selected as SysTick clock + 286:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_cortex.c **** * @arg SYSTICK_CLKSOURCE_HCLK: AHB clock selected as SysTick clock source. + 287:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_cortex.c **** * @retval None + 288:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_cortex.c **** */ + 289:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_cortex.c **** void HAL_SYSTICK_CLKSourceConfig(uint32_t CLKSource) + 290:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_cortex.c **** { + 773 .loc 1 290 1 is_stmt 1 view -0 + 774 .cfi_startproc + 775 @ args = 0, pretend = 0, frame = 0 + 776 @ frame_needed = 0, uses_anonymous_args = 0 + 777 @ link register save eliminated. + 291:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_cortex.c **** /* Check the parameters */ + 292:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_cortex.c **** assert_param(IS_SYSTICK_CLK_SOURCE(CLKSource)); + 778 .loc 1 292 3 view .LVU173 + 293:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_cortex.c **** if (CLKSource == SYSTICK_CLKSOURCE_HCLK) + 779 .loc 1 293 3 view .LVU174 + 780 .loc 1 293 6 is_stmt 0 view .LVU175 + 781 0000 0428 cmp r0, #4 + 782 0002 05D0 beq .L48 + 294:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_cortex.c **** { + 295:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_cortex.c **** SysTick->CTRL |= SYSTICK_CLKSOURCE_HCLK; + 296:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_cortex.c **** } + 297:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_cortex.c **** else + 298:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_cortex.c **** { + 299:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_cortex.c **** SysTick->CTRL &= ~SYSTICK_CLKSOURCE_HCLK; + 783 .loc 1 299 5 is_stmt 1 view .LVU176 + 784 .loc 1 299 12 is_stmt 0 view .LVU177 + 785 0004 054A ldr r2, .L49 + 786 0006 1368 ldr r3, [r2] + 787 .loc 1 299 19 view .LVU178 + 788 0008 0421 movs r1, #4 + 789 000a 8B43 bics r3, r1 + 790 000c 1360 str r3, [r2] + 791 .L45: + 300:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_cortex.c **** } + 301:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_cortex.c **** } + 792 .loc 1 301 1 view .LVU179 + 793 @ sp needed + 794 000e 7047 bx lr + ARM GAS /tmp/ccDOWgYG.s page 53 + + + 795 .L48: + 295:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_cortex.c **** } + 796 .loc 1 295 5 is_stmt 1 view .LVU180 + 295:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_cortex.c **** } + 797 .loc 1 295 12 is_stmt 0 view .LVU181 + 798 0010 024A ldr r2, .L49 + 799 0012 1368 ldr r3, [r2] + 295:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_cortex.c **** } + 800 .loc 1 295 19 view .LVU182 + 801 0014 0421 movs r1, #4 + 802 0016 0B43 orrs r3, r1 + 803 0018 1360 str r3, [r2] + 804 001a F8E7 b .L45 + 805 .L50: + 806 .align 2 + 807 .L49: + 808 001c 10E000E0 .word -536813552 + 809 .cfi_endproc + 810 .LFE49: + 812 .section .text.HAL_SYSTICK_Callback,"ax",%progbits + 813 .align 1 + 814 .weak HAL_SYSTICK_Callback + 815 .syntax unified + 816 .code 16 + 817 .thumb_func + 819 HAL_SYSTICK_Callback: + 820 .LFB51: + 302:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_cortex.c **** + 303:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_cortex.c **** /** + 304:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_cortex.c **** * @brief This function handles SYSTICK interrupt request. + 305:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_cortex.c **** * @retval None + 306:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_cortex.c **** */ + 307:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_cortex.c **** void HAL_SYSTICK_IRQHandler(void) + 308:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_cortex.c **** { + 309:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_cortex.c **** HAL_SYSTICK_Callback(); + 310:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_cortex.c **** } + 311:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_cortex.c **** + 312:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_cortex.c **** /** + 313:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_cortex.c **** * @brief SYSTICK callback. + 314:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_cortex.c **** * @retval None + 315:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_cortex.c **** */ + 316:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_cortex.c **** __weak void HAL_SYSTICK_Callback(void) + 317:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_cortex.c **** { + 821 .loc 1 317 1 is_stmt 1 view -0 + 822 .cfi_startproc + 823 @ args = 0, pretend = 0, frame = 0 + 824 @ frame_needed = 0, uses_anonymous_args = 0 + 825 @ link register save eliminated. + 318:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_cortex.c **** /* NOTE : This function Should not be modified, when the callback is needed, + 319:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_cortex.c **** the HAL_SYSTICK_Callback could be implemented in the user file + 320:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_cortex.c **** */ + 321:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_cortex.c **** } + 826 .loc 1 321 1 view .LVU184 + 827 @ sp needed + 828 0000 7047 bx lr + 829 .cfi_endproc + 830 .LFE51: + ARM GAS /tmp/ccDOWgYG.s page 54 + + + 832 .section .text.HAL_SYSTICK_IRQHandler,"ax",%progbits + 833 .align 1 + 834 .global HAL_SYSTICK_IRQHandler + 835 .syntax unified + 836 .code 16 + 837 .thumb_func + 839 HAL_SYSTICK_IRQHandler: + 840 .LFB50: + 308:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_cortex.c **** HAL_SYSTICK_Callback(); + 841 .loc 1 308 1 view -0 + 842 .cfi_startproc + 843 @ args = 0, pretend = 0, frame = 0 + 844 @ frame_needed = 0, uses_anonymous_args = 0 + 845 0000 10B5 push {r4, lr} + 846 .cfi_def_cfa_offset 8 + 847 .cfi_offset 4, -8 + 848 .cfi_offset 14, -4 + 309:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_cortex.c **** } + 849 .loc 1 309 3 view .LVU186 + 850 0002 FFF7FEFF bl HAL_SYSTICK_Callback + 851 .LVL36: + 310:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_cortex.c **** + 852 .loc 1 310 1 is_stmt 0 view .LVU187 + 853 @ sp needed + 854 0006 10BD pop {r4, pc} + 855 .cfi_endproc + 856 .LFE50: + 858 .text + 859 .Letext0: + 860 .file 4 "Drivers/CMSIS/Device/ST/STM32F0xx/Include/stm32f042x6.h" + 861 .file 5 "/home/chiangni/.config/VSCodium/User/globalStorage/bmd.stm32-for-vscode/@xpack-dev-tools/ + 862 .file 6 "/home/chiangni/.config/VSCodium/User/globalStorage/bmd.stm32-for-vscode/@xpack-dev-tools/ + ARM GAS /tmp/ccDOWgYG.s page 55 + + +DEFINED SYMBOLS + *ABS*:00000000 stm32f0xx_hal_cortex.c + /tmp/ccDOWgYG.s:19 .text.__NVIC_SetPriority:00000000 $t + /tmp/ccDOWgYG.s:24 .text.__NVIC_SetPriority:00000000 __NVIC_SetPriority + /tmp/ccDOWgYG.s:121 .text.__NVIC_SetPriority:00000058 $d + /tmp/ccDOWgYG.s:127 .text.__NVIC_GetPriority:00000000 $t + /tmp/ccDOWgYG.s:132 .text.__NVIC_GetPriority:00000000 __NVIC_GetPriority + /tmp/ccDOWgYG.s:199 .text.__NVIC_GetPriority:00000044 $d + /tmp/ccDOWgYG.s:205 .text.__NVIC_SystemReset:00000000 $t + /tmp/ccDOWgYG.s:210 .text.__NVIC_SystemReset:00000000 __NVIC_SystemReset + /tmp/ccDOWgYG.s:266 .text.__NVIC_SystemReset:00000014 $d + /tmp/ccDOWgYG.s:272 .text.SysTick_Config:00000000 $t + /tmp/ccDOWgYG.s:277 .text.SysTick_Config:00000000 SysTick_Config + /tmp/ccDOWgYG.s:346 .text.SysTick_Config:00000030 $d + /tmp/ccDOWgYG.s:352 .text.HAL_NVIC_SetPriority:00000000 $t + /tmp/ccDOWgYG.s:358 .text.HAL_NVIC_SetPriority:00000000 HAL_NVIC_SetPriority + /tmp/ccDOWgYG.s:381 .text.HAL_NVIC_EnableIRQ:00000000 $t + /tmp/ccDOWgYG.s:387 .text.HAL_NVIC_EnableIRQ:00000000 HAL_NVIC_EnableIRQ + /tmp/ccDOWgYG.s:426 .text.HAL_NVIC_EnableIRQ:00000014 $d + /tmp/ccDOWgYG.s:431 .text.HAL_NVIC_DisableIRQ:00000000 $t + /tmp/ccDOWgYG.s:437 .text.HAL_NVIC_DisableIRQ:00000000 HAL_NVIC_DisableIRQ + /tmp/ccDOWgYG.s:505 .text.HAL_NVIC_DisableIRQ:0000001c $d + /tmp/ccDOWgYG.s:510 .text.HAL_NVIC_SystemReset:00000000 $t + /tmp/ccDOWgYG.s:516 .text.HAL_NVIC_SystemReset:00000000 HAL_NVIC_SystemReset + /tmp/ccDOWgYG.s:534 .text.HAL_SYSTICK_Config:00000000 $t + /tmp/ccDOWgYG.s:540 .text.HAL_SYSTICK_Config:00000000 HAL_SYSTICK_Config + /tmp/ccDOWgYG.s:563 .text.HAL_NVIC_GetPriority:00000000 $t + /tmp/ccDOWgYG.s:569 .text.HAL_NVIC_GetPriority:00000000 HAL_NVIC_GetPriority + /tmp/ccDOWgYG.s:592 .text.HAL_NVIC_SetPendingIRQ:00000000 $t + /tmp/ccDOWgYG.s:598 .text.HAL_NVIC_SetPendingIRQ:00000000 HAL_NVIC_SetPendingIRQ + /tmp/ccDOWgYG.s:639 .text.HAL_NVIC_SetPendingIRQ:00000018 $d + /tmp/ccDOWgYG.s:644 .text.HAL_NVIC_GetPendingIRQ:00000000 $t + /tmp/ccDOWgYG.s:650 .text.HAL_NVIC_GetPendingIRQ:00000000 HAL_NVIC_GetPendingIRQ + /tmp/ccDOWgYG.s:707 .text.HAL_NVIC_GetPendingIRQ:0000001c $d + /tmp/ccDOWgYG.s:712 .text.HAL_NVIC_ClearPendingIRQ:00000000 $t + /tmp/ccDOWgYG.s:718 .text.HAL_NVIC_ClearPendingIRQ:00000000 HAL_NVIC_ClearPendingIRQ + /tmp/ccDOWgYG.s:759 .text.HAL_NVIC_ClearPendingIRQ:00000018 $d + /tmp/ccDOWgYG.s:764 .text.HAL_SYSTICK_CLKSourceConfig:00000000 $t + /tmp/ccDOWgYG.s:770 .text.HAL_SYSTICK_CLKSourceConfig:00000000 HAL_SYSTICK_CLKSourceConfig + /tmp/ccDOWgYG.s:808 .text.HAL_SYSTICK_CLKSourceConfig:0000001c $d + /tmp/ccDOWgYG.s:813 .text.HAL_SYSTICK_Callback:00000000 $t + /tmp/ccDOWgYG.s:819 .text.HAL_SYSTICK_Callback:00000000 HAL_SYSTICK_Callback + /tmp/ccDOWgYG.s:833 .text.HAL_SYSTICK_IRQHandler:00000000 $t + /tmp/ccDOWgYG.s:839 .text.HAL_SYSTICK_IRQHandler:00000000 HAL_SYSTICK_IRQHandler + +NO UNDEFINED SYMBOLS diff --git a/Software/build/stm32f0xx_hal_cortex.o b/Software/build/stm32f0xx_hal_cortex.o new file mode 100644 index 0000000..d482180 Binary files /dev/null and b/Software/build/stm32f0xx_hal_cortex.o differ diff --git a/Software/build/stm32f0xx_hal_dma.d b/Software/build/stm32f0xx_hal_dma.d new file mode 100644 index 0000000..5f07018 --- /dev/null +++ b/Software/build/stm32f0xx_hal_dma.d @@ -0,0 +1,60 @@ +build/stm32f0xx_hal_dma.o: \ + Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c \ + Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal.h \ + Core/Inc/stm32f0xx_hal_conf.h \ + Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_rcc.h \ + Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_def.h \ + Drivers/CMSIS/Device/ST/STM32F0xx/Include/stm32f0xx.h \ + Drivers/CMSIS/Device/ST/STM32F0xx/Include/stm32f042x6.h \ + Drivers/CMSIS/Include/core_cm0.h Drivers/CMSIS/Include/cmsis_version.h \ + Drivers/CMSIS/Include/cmsis_compiler.h Drivers/CMSIS/Include/cmsis_gcc.h \ + Drivers/CMSIS/Device/ST/STM32F0xx/Include/system_stm32f0xx.h \ + Drivers/STM32F0xx_HAL_Driver/Inc/Legacy/stm32_hal_legacy.h \ + Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_rcc_ex.h \ + Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_gpio.h \ + Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_gpio_ex.h \ + Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_exti.h \ + Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_dma.h \ + Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_dma_ex.h \ + Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_cortex.h \ + Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_adc.h \ + Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_adc_ex.h \ + Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_can.h \ + Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_flash.h \ + Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_flash_ex.h \ + Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_i2c.h \ + Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_i2c_ex.h \ + Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_pwr.h \ + Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_pwr_ex.h \ + Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_tim.h \ + Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_tim_ex.h +Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal.h: +Core/Inc/stm32f0xx_hal_conf.h: +Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_rcc.h: +Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_def.h: +Drivers/CMSIS/Device/ST/STM32F0xx/Include/stm32f0xx.h: +Drivers/CMSIS/Device/ST/STM32F0xx/Include/stm32f042x6.h: +Drivers/CMSIS/Include/core_cm0.h: +Drivers/CMSIS/Include/cmsis_version.h: +Drivers/CMSIS/Include/cmsis_compiler.h: +Drivers/CMSIS/Include/cmsis_gcc.h: +Drivers/CMSIS/Device/ST/STM32F0xx/Include/system_stm32f0xx.h: +Drivers/STM32F0xx_HAL_Driver/Inc/Legacy/stm32_hal_legacy.h: +Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_rcc_ex.h: +Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_gpio.h: +Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_gpio_ex.h: +Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_exti.h: +Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_dma.h: +Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_dma_ex.h: +Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_cortex.h: +Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_adc.h: +Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_adc_ex.h: +Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_can.h: +Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_flash.h: +Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_flash_ex.h: +Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_i2c.h: +Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_i2c_ex.h: +Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_pwr.h: +Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_pwr_ex.h: +Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_tim.h: +Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_tim_ex.h: diff --git a/Software/build/stm32f0xx_hal_dma.lst b/Software/build/stm32f0xx_hal_dma.lst new file mode 100644 index 0000000..30e6164 --- /dev/null +++ b/Software/build/stm32f0xx_hal_dma.lst @@ -0,0 +1,3197 @@ +ARM GAS /tmp/ccCkUfTP.s page 1 + + + 1 .cpu cortex-m0 + 2 .arch armv6s-m + 3 .fpu softvfp + 4 .eabi_attribute 20, 1 + 5 .eabi_attribute 21, 1 + 6 .eabi_attribute 23, 3 + 7 .eabi_attribute 24, 1 + 8 .eabi_attribute 25, 1 + 9 .eabi_attribute 26, 1 + 10 .eabi_attribute 30, 1 + 11 .eabi_attribute 34, 0 + 12 .eabi_attribute 18, 4 + 13 .file "stm32f0xx_hal_dma.c" + 14 .text + 15 .Ltext0: + 16 .cfi_sections .debug_frame + 17 .file 1 "Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c" + 18 .section .text.DMA_SetConfig,"ax",%progbits + 19 .align 1 + 20 .syntax unified + 21 .code 16 + 22 .thumb_func + 24 DMA_SetConfig: + 25 .LVL0: + 26 .LFB52: + 1:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** /** + 2:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** ****************************************************************************** + 3:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** * @file stm32f0xx_hal_dma.c + 4:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** * @author MCD Application Team + 5:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** * @brief DMA HAL module driver. + 6:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** * + 7:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** * This file provides firmware functions to manage the following + 8:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** * functionalities of the Direct Memory Access (DMA) peripheral: + 9:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** * + Initialization and de-initialization functions + 10:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** * + IO operation functions + 11:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** * + Peripheral State and errors functions + 12:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** @verbatim + 13:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** ============================================================================== + 14:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** ##### How to use this driver ##### + 15:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** ============================================================================== + 16:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** [..] + 17:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** (#) Enable and configure the peripheral to be connected to the DMA Channel + 18:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** (except for internal SRAM / FLASH memories: no initialization is + 19:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** necessary). Please refer to Reference manual for connection between peripherals + 20:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** and DMA requests . + 21:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** + 22:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** (#) For a given Channel, program the required configuration through the following parameters: + 23:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** Transfer Direction, Source and Destination data formats, + 24:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** Circular or Normal mode, Channel Priority level, Source and Destination Increment mode, + 25:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** using HAL_DMA_Init() function. + 26:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** + 27:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** (#) Use HAL_DMA_GetState() function to return the DMA state and HAL_DMA_GetError() in case of er + 28:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** detection. + 29:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** + 30:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** (#) Use HAL_DMA_Abort() function to abort the current transfer + 31:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** + 32:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** -@- In Memory-to-Memory transfer mode, Circular mode is not allowed. + ARM GAS /tmp/ccCkUfTP.s page 2 + + + 33:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** *** Polling mode IO operation *** + 34:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** ================================= + 35:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** [..] + 36:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** (+) Use HAL_DMA_Start() to start DMA transfer after the configuration of Source + 37:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** address and destination address and the Length of data to be transferred + 38:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** (+) Use HAL_DMA_PollForTransfer() to poll for the end of current transfer, in this + 39:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** case a fixed Timeout can be configured by User depending from his application. + 40:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** + 41:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** *** Interrupt mode IO operation *** + 42:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** =================================== + 43:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** [..] + 44:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** (+) Configure the DMA interrupt priority using HAL_NVIC_SetPriority() + 45:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** (+) Enable the DMA IRQ handler using HAL_NVIC_EnableIRQ() + 46:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** (+) Use HAL_DMA_Start_IT() to start DMA transfer after the configuration of + 47:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** Source address and destination address and the Length of data to be transferred. + 48:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** In this case the DMA interrupt is configured + 49:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** (+) Use HAL_DMA_Channel_IRQHandler() called under DMA_IRQHandler() Interrupt subroutine + 50:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** (+) At the end of data transfer HAL_DMA_IRQHandler() function is executed and user can + 51:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** add his own function by customization of function pointer XferCpltCallback and + 52:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** XferErrorCallback (i.e a member of DMA handle structure). + 53:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** + 54:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** *** DMA HAL driver macros list *** + 55:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** ============================================= + 56:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** [..] + 57:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** Below the list of most used macros in DMA HAL driver. + 58:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** + 59:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** [..] + 60:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** (@) You can refer to the DMA HAL driver header file for more useful macros + 61:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** + 62:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** @endverbatim + 63:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** ****************************************************************************** + 64:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** * @attention + 65:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** * + 66:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** * Copyright (c) 2016 STMicroelectronics. + 67:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** * All rights reserved. + 68:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** * + 69:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** * This software is licensed under terms that can be found in the LICENSE file in + 70:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** * the root directory of this software component. + 71:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** * If no LICENSE file comes with this software, it is provided AS-IS. + 72:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** * + 73:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** ****************************************************************************** + 74:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** */ + 75:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** + 76:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** /* Includes ------------------------------------------------------------------*/ + 77:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** #include "stm32f0xx_hal.h" + 78:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** + 79:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** /** @addtogroup STM32F0xx_HAL_Driver + 80:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** * @{ + 81:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** */ + 82:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** + 83:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** + 84:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** /** @defgroup DMA DMA + 85:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** * @brief DMA HAL module driver + 86:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** * @{ + 87:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** */ + 88:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** + 89:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** #ifdef HAL_DMA_MODULE_ENABLED + ARM GAS /tmp/ccCkUfTP.s page 3 + + + 90:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** + 91:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** /* Private typedef -----------------------------------------------------------*/ + 92:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** /* Private define ------------------------------------------------------------*/ + 93:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** /* Private macro -------------------------------------------------------------*/ + 94:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** /* Private variables ---------------------------------------------------------*/ + 95:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** /* Private function prototypes -----------------------------------------------*/ + 96:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** /** @defgroup DMA_Private_Functions DMA Private Functions + 97:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** * @{ + 98:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** */ + 99:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** static void DMA_SetConfig(DMA_HandleTypeDef *hdma, uint32_t SrcAddress, uint32_t DstAddress, uint32 + 100:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** static void DMA_CalcBaseAndBitshift(DMA_HandleTypeDef *hdma); + 101:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** /** + 102:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** * @} + 103:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** */ + 104:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** + 105:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** /* Exported functions ---------------------------------------------------------*/ + 106:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** + 107:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** /** @defgroup DMA_Exported_Functions DMA Exported Functions + 108:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** * @{ + 109:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** */ + 110:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** + 111:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** /** @defgroup DMA_Exported_Functions_Group1 Initialization and de-initialization functions + 112:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** * @brief Initialization and de-initialization functions + 113:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** * + 114:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** @verbatim + 115:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** =============================================================================== + 116:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** ##### Initialization and de-initialization functions ##### + 117:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** =============================================================================== + 118:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** [..] + 119:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** This section provides functions allowing to initialize the DMA Channel source + 120:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** and destination addresses, incrementation and data sizes, transfer direction, + 121:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** circular/normal mode selection, memory-to-memory mode selection and Channel priority value. + 122:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** [..] + 123:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** The HAL_DMA_Init() function follows the DMA configuration procedures as described in + 124:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** reference manual. + 125:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** + 126:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** @endverbatim + 127:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** * @{ + 128:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** */ + 129:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** + 130:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** /** + 131:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** * @brief Initialize the DMA according to the specified + 132:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** * parameters in the DMA_InitTypeDef and initialize the associated handle. + 133:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** * @param hdma Pointer to a DMA_HandleTypeDef structure that contains + 134:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** * the configuration information for the specified DMA Channel. + 135:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** * @retval HAL status + 136:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** */ + 137:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** HAL_StatusTypeDef HAL_DMA_Init(DMA_HandleTypeDef *hdma) + 138:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** { + 139:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** uint32_t tmp = 0U; + 140:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** + 141:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** /* Check the DMA handle allocation */ + 142:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** if (NULL == hdma) + 143:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** { + 144:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** return HAL_ERROR; + 145:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** } + 146:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** + ARM GAS /tmp/ccCkUfTP.s page 4 + + + 147:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** /* Check the parameters */ + 148:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** assert_param(IS_DMA_ALL_INSTANCE(hdma->Instance)); + 149:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** assert_param(IS_DMA_DIRECTION(hdma->Init.Direction)); + 150:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** assert_param(IS_DMA_PERIPHERAL_INC_STATE(hdma->Init.PeriphInc)); + 151:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** assert_param(IS_DMA_MEMORY_INC_STATE(hdma->Init.MemInc)); + 152:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** assert_param(IS_DMA_PERIPHERAL_DATA_SIZE(hdma->Init.PeriphDataAlignment)); + 153:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** assert_param(IS_DMA_MEMORY_DATA_SIZE(hdma->Init.MemDataAlignment)); + 154:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** assert_param(IS_DMA_MODE(hdma->Init.Mode)); + 155:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** assert_param(IS_DMA_PRIORITY(hdma->Init.Priority)); + 156:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** + 157:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** /* Change DMA peripheral state */ + 158:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** hdma->State = HAL_DMA_STATE_BUSY; + 159:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** + 160:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** /* Get the CR register value */ + 161:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** tmp = hdma->Instance->CCR; + 162:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** + 163:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** /* Clear PL, MSIZE, PSIZE, MINC, PINC, CIRC, DIR bits */ + 164:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** tmp &= ((uint32_t)~(DMA_CCR_PL | DMA_CCR_MSIZE | DMA_CCR_PSIZE | \ + 165:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** DMA_CCR_MINC | DMA_CCR_PINC | DMA_CCR_CIRC | \ + 166:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** DMA_CCR_DIR)); + 167:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** + 168:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** /* Prepare the DMA Channel configuration */ + 169:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** tmp |= hdma->Init.Direction | + 170:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** hdma->Init.PeriphInc | hdma->Init.MemInc | + 171:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** hdma->Init.PeriphDataAlignment | hdma->Init.MemDataAlignment | + 172:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** hdma->Init.Mode | hdma->Init.Priority; + 173:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** + 174:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** /* Write to DMA Channel CR register */ + 175:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** hdma->Instance->CCR = tmp; + 176:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** + 177:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** /* Initialize DmaBaseAddress and ChannelIndex parameters used + 178:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** by HAL_DMA_IRQHandler() and HAL_DMA_PollForTransfer() */ + 179:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** DMA_CalcBaseAndBitshift(hdma); + 180:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** + 181:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** /* Initialise the error code */ + 182:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** hdma->ErrorCode = HAL_DMA_ERROR_NONE; + 183:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** + 184:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** /* Initialize the DMA state*/ + 185:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** hdma->State = HAL_DMA_STATE_READY; + 186:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** + 187:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** /* Allocate lock resource and initialize it */ + 188:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** hdma->Lock = HAL_UNLOCKED; + 189:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** + 190:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** return HAL_OK; + 191:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** } + 192:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** + 193:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** /** + 194:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** * @brief DeInitialize the DMA peripheral + 195:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** * @param hdma pointer to a DMA_HandleTypeDef structure that contains + 196:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** * the configuration information for the specified DMA Channel. + 197:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** * @retval HAL status + 198:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** */ + 199:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** HAL_StatusTypeDef HAL_DMA_DeInit(DMA_HandleTypeDef *hdma) + 200:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** { + 201:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** /* Check the DMA handle allocation */ + 202:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** if (NULL == hdma) + 203:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** { + ARM GAS /tmp/ccCkUfTP.s page 5 + + + 204:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** return HAL_ERROR; + 205:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** } + 206:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** + 207:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** /* Check the parameters */ + 208:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** assert_param(IS_DMA_ALL_INSTANCE(hdma->Instance)); + 209:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** + 210:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** /* Disable the selected DMA Channelx */ + 211:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** hdma->Instance->CCR &= ~DMA_CCR_EN; + 212:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** + 213:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** /* Reset DMA Channel control register */ + 214:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** hdma->Instance->CCR = 0U; + 215:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** + 216:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** /* Reset DMA Channel Number of Data to Transfer register */ + 217:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** hdma->Instance->CNDTR = 0U; + 218:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** + 219:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** /* Reset DMA Channel peripheral address register */ + 220:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** hdma->Instance->CPAR = 0U; + 221:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** + 222:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** /* Reset DMA Channel memory address register */ + 223:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** hdma->Instance->CMAR = 0U; + 224:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** + 225:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** /* Get DMA Base Address */ + 226:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** DMA_CalcBaseAndBitshift(hdma); + 227:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** + 228:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** /* Clear all flags */ + 229:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** hdma->DmaBaseAddress->IFCR = DMA_FLAG_GL1 << hdma->ChannelIndex; + 230:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** + 231:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** /* Clean callbacks */ + 232:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** hdma->XferCpltCallback = NULL; + 233:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** hdma->XferHalfCpltCallback = NULL; + 234:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** hdma->XferErrorCallback = NULL; + 235:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** hdma->XferAbortCallback = NULL; + 236:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** + 237:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** /* Reset the error code */ + 238:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** hdma->ErrorCode = HAL_DMA_ERROR_NONE; + 239:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** + 240:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** /* Reset the DMA state */ + 241:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** hdma->State = HAL_DMA_STATE_RESET; + 242:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** + 243:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** /* Release Lock */ + 244:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** __HAL_UNLOCK(hdma); + 245:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** + 246:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** return HAL_OK; + 247:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** } + 248:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** + 249:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** /** + 250:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** * @} + 251:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** */ + 252:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** + 253:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** /** @defgroup DMA_Exported_Functions_Group2 Input and Output operation functions + 254:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** * @brief I/O operation functions + 255:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** * + 256:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** @verbatim + 257:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** =============================================================================== + 258:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** ##### IO operation functions ##### + 259:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** =============================================================================== + 260:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** [..] This section provides functions allowing to: + ARM GAS /tmp/ccCkUfTP.s page 6 + + + 261:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** (+) Configure the source, destination address and data length and Start DMA transfer + 262:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** (+) Configure the source, destination address and data length and + 263:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** Start DMA transfer with interrupt + 264:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** (+) Abort DMA transfer + 265:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** (+) Poll for transfer complete + 266:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** (+) Handle DMA interrupt request + 267:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** + 268:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** @endverbatim + 269:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** * @{ + 270:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** */ + 271:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** + 272:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** /** + 273:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** * @brief Start the DMA Transfer. + 274:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** * @param hdma pointer to a DMA_HandleTypeDef structure that contains + 275:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** * the configuration information for the specified DMA Channel. + 276:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** * @param SrcAddress The source memory Buffer address + 277:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** * @param DstAddress The destination memory Buffer address + 278:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** * @param DataLength The length of data to be transferred from source to destination + 279:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** * @retval HAL status + 280:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** */ + 281:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** HAL_StatusTypeDef HAL_DMA_Start(DMA_HandleTypeDef *hdma, uint32_t SrcAddress, uint32_t DstAddress, + 282:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** { + 283:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** HAL_StatusTypeDef status = HAL_OK; + 284:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** + 285:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** /* Check the parameters */ + 286:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** assert_param(IS_DMA_BUFFER_SIZE(DataLength)); + 287:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** + 288:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** /* Process locked */ + 289:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** __HAL_LOCK(hdma); + 290:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** + 291:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** if (HAL_DMA_STATE_READY == hdma->State) + 292:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** { + 293:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** /* Change DMA peripheral state */ + 294:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** hdma->State = HAL_DMA_STATE_BUSY; + 295:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** + 296:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** hdma->ErrorCode = HAL_DMA_ERROR_NONE; + 297:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** + 298:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** /* Disable the peripheral */ + 299:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** hdma->Instance->CCR &= ~DMA_CCR_EN; + 300:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** + 301:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** /* Configure the source, destination address and the data length */ + 302:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** DMA_SetConfig(hdma, SrcAddress, DstAddress, DataLength); + 303:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** + 304:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** /* Enable the Peripheral */ + 305:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** hdma->Instance->CCR |= DMA_CCR_EN; + 306:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** } + 307:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** else + 308:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** { + 309:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** /* Process Unlocked */ + 310:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** __HAL_UNLOCK(hdma); + 311:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** + 312:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** /* Remain BUSY */ + 313:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** status = HAL_BUSY; + 314:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** } + 315:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** + 316:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** return status; + 317:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** } + ARM GAS /tmp/ccCkUfTP.s page 7 + + + 318:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** + 319:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** /** + 320:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** * @brief Start the DMA Transfer with interrupt enabled. + 321:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** * @param hdma pointer to a DMA_HandleTypeDef structure that contains + 322:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** * the configuration information for the specified DMA Channel. + 323:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** * @param SrcAddress The source memory Buffer address + 324:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** * @param DstAddress The destination memory Buffer address + 325:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** * @param DataLength The length of data to be transferred from source to destination + 326:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** * @retval HAL status + 327:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** */ + 328:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** HAL_StatusTypeDef HAL_DMA_Start_IT(DMA_HandleTypeDef *hdma, uint32_t SrcAddress, uint32_t DstAddres + 329:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** { + 330:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** HAL_StatusTypeDef status = HAL_OK; + 331:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** + 332:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** /* Check the parameters */ + 333:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** assert_param(IS_DMA_BUFFER_SIZE(DataLength)); + 334:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** + 335:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** /* Process locked */ + 336:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** __HAL_LOCK(hdma); + 337:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** + 338:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** if (HAL_DMA_STATE_READY == hdma->State) + 339:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** { + 340:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** /* Change DMA peripheral state */ + 341:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** hdma->State = HAL_DMA_STATE_BUSY; + 342:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** + 343:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** hdma->ErrorCode = HAL_DMA_ERROR_NONE; + 344:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** + 345:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** /* Disable the peripheral */ + 346:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** hdma->Instance->CCR &= ~DMA_CCR_EN; + 347:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** + 348:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** /* Configure the source, destination address and the data length */ + 349:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** DMA_SetConfig(hdma, SrcAddress, DstAddress, DataLength); + 350:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** + 351:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** /* Enable the transfer complete, & transfer error interrupts */ + 352:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** /* Half transfer interrupt is optional: enable it only if associated callback is available */ + 353:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** if (NULL != hdma->XferHalfCpltCallback) + 354:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** { + 355:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** hdma->Instance->CCR |= (DMA_IT_TC | DMA_IT_HT | DMA_IT_TE); + 356:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** } + 357:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** else + 358:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** { + 359:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** hdma->Instance->CCR |= (DMA_IT_TC | DMA_IT_TE); + 360:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** hdma->Instance->CCR &= ~DMA_IT_HT; + 361:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** } + 362:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** + 363:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** /* Enable the Peripheral */ + 364:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** hdma->Instance->CCR |= DMA_CCR_EN; + 365:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** } + 366:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** else + 367:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** { + 368:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** /* Process Unlocked */ + 369:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** __HAL_UNLOCK(hdma); + 370:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** + 371:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** /* Remain BUSY */ + 372:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** status = HAL_BUSY; + 373:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** } + 374:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** + ARM GAS /tmp/ccCkUfTP.s page 8 + + + 375:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** return status; + 376:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** } + 377:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** + 378:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** /** + 379:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** * @brief Abort the DMA Transfer. + 380:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** * @param hdma pointer to a DMA_HandleTypeDef structure that contains + 381:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** * the configuration information for the specified DMA Channel. + 382:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** * @retval HAL status + 383:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** */ + 384:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** HAL_StatusTypeDef HAL_DMA_Abort(DMA_HandleTypeDef *hdma) + 385:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** { + 386:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** if (hdma->State != HAL_DMA_STATE_BUSY) + 387:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** { + 388:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** /* no transfer ongoing */ + 389:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** hdma->ErrorCode = HAL_DMA_ERROR_NO_XFER; + 390:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** + 391:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** /* Process Unlocked */ + 392:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** __HAL_UNLOCK(hdma); + 393:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** + 394:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** return HAL_ERROR; + 395:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** } + 396:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** else + 397:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** { + 398:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** /* Disable DMA IT */ + 399:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** hdma->Instance->CCR &= ~(DMA_IT_TC | DMA_IT_HT | DMA_IT_TE); + 400:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** + 401:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** /* Disable the channel */ + 402:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** hdma->Instance->CCR &= ~DMA_CCR_EN; + 403:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** + 404:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** /* Clear all flags */ + 405:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** hdma->DmaBaseAddress->IFCR = (DMA_FLAG_GL1 << hdma->ChannelIndex); + 406:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** } + 407:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** /* Change the DMA state*/ + 408:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** hdma->State = HAL_DMA_STATE_READY; + 409:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** + 410:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** /* Process Unlocked */ + 411:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** __HAL_UNLOCK(hdma); + 412:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** + 413:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** return HAL_OK; + 414:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** } + 415:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** + 416:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** /** + 417:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** * @brief Abort the DMA Transfer in Interrupt mode. + 418:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** * @param hdma pointer to a DMA_HandleTypeDef structure that contains + 419:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** * the configuration information for the specified DMA Stream. + 420:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** * @retval HAL status + 421:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** */ + 422:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** HAL_StatusTypeDef HAL_DMA_Abort_IT(DMA_HandleTypeDef *hdma) + 423:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** { + 424:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** HAL_StatusTypeDef status = HAL_OK; + 425:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** + 426:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** if (HAL_DMA_STATE_BUSY != hdma->State) + 427:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** { + 428:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** /* no transfer ongoing */ + 429:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** hdma->ErrorCode = HAL_DMA_ERROR_NO_XFER; + 430:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** + 431:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** status = HAL_ERROR; + ARM GAS /tmp/ccCkUfTP.s page 9 + + + 432:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** } + 433:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** else + 434:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** { + 435:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** + 436:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** /* Disable DMA IT */ + 437:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** hdma->Instance->CCR &= ~(DMA_IT_TC | DMA_IT_HT | DMA_IT_TE); + 438:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** + 439:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** /* Disable the channel */ + 440:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** hdma->Instance->CCR &= ~DMA_CCR_EN; + 441:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** + 442:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** /* Clear all flags */ + 443:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** hdma->DmaBaseAddress->IFCR = DMA_FLAG_GL1 << hdma->ChannelIndex; + 444:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** + 445:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** /* Change the DMA state */ + 446:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** hdma->State = HAL_DMA_STATE_READY; + 447:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** + 448:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** /* Process Unlocked */ + 449:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** __HAL_UNLOCK(hdma); + 450:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** + 451:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** /* Call User Abort callback */ + 452:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** if (hdma->XferAbortCallback != NULL) + 453:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** { + 454:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** hdma->XferAbortCallback(hdma); + 455:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** } + 456:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** } + 457:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** return status; + 458:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** } + 459:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** + 460:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** /** + 461:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** * @brief Polling for transfer complete. + 462:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** * @param hdma pointer to a DMA_HandleTypeDef structure that contains + 463:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** * the configuration information for the specified DMA Channel. + 464:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** * @param CompleteLevel Specifies the DMA level complete. + 465:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** * @param Timeout Timeout duration. + 466:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** * @retval HAL status + 467:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** */ + 468:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** HAL_StatusTypeDef HAL_DMA_PollForTransfer(DMA_HandleTypeDef *hdma, uint32_t CompleteLevel, uint32_t + 469:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** { + 470:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** uint32_t temp; + 471:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** uint32_t tickstart = 0U; + 472:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** + 473:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** if (HAL_DMA_STATE_BUSY != hdma->State) + 474:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** { + 475:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** /* no transfer ongoing */ + 476:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** hdma->ErrorCode = HAL_DMA_ERROR_NO_XFER; + 477:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** __HAL_UNLOCK(hdma); + 478:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** return HAL_ERROR; + 479:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** } + 480:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** + 481:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** /* Polling mode not supported in circular mode */ + 482:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** if (RESET != (hdma->Instance->CCR & DMA_CCR_CIRC)) + 483:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** { + 484:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** hdma->ErrorCode = HAL_DMA_ERROR_NOT_SUPPORTED; + 485:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** return HAL_ERROR; + 486:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** } + 487:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** + 488:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** /* Get the level transfer complete flag */ + ARM GAS /tmp/ccCkUfTP.s page 10 + + + 489:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** if (HAL_DMA_FULL_TRANSFER == CompleteLevel) + 490:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** { + 491:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** /* Transfer Complete flag */ + 492:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** temp = DMA_FLAG_TC1 << hdma->ChannelIndex; + 493:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** } + 494:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** else + 495:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** { + 496:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** /* Half Transfer Complete flag */ + 497:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** temp = DMA_FLAG_HT1 << hdma->ChannelIndex; + 498:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** } + 499:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** + 500:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** /* Get tick */ + 501:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** tickstart = HAL_GetTick(); + 502:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** + 503:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** while (RESET == (hdma->DmaBaseAddress->ISR & temp)) + 504:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** { + 505:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** if (RESET != (hdma->DmaBaseAddress->ISR & (DMA_FLAG_TE1 << hdma->ChannelIndex))) + 506:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** { + 507:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** /* When a DMA transfer error occurs */ + 508:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** /* A hardware clear of its EN bits is performed */ + 509:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** /* Clear all flags */ + 510:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** hdma->DmaBaseAddress->IFCR = DMA_FLAG_GL1 << hdma->ChannelIndex; + 511:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** + 512:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** /* Update error code */ + 513:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** hdma->ErrorCode = HAL_DMA_ERROR_TE; + 514:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** + 515:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** /* Change the DMA state */ + 516:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** hdma->State = HAL_DMA_STATE_READY; + 517:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** + 518:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** /* Process Unlocked */ + 519:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** __HAL_UNLOCK(hdma); + 520:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** + 521:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** return HAL_ERROR; + 522:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** } + 523:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** /* Check for the Timeout */ + 524:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** if (Timeout != HAL_MAX_DELAY) + 525:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** { + 526:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** if ((Timeout == 0U) || ((HAL_GetTick() - tickstart) > Timeout)) + 527:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** { + 528:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** /* Update error code */ + 529:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** hdma->ErrorCode = HAL_DMA_ERROR_TIMEOUT; + 530:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** + 531:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** /* Change the DMA state */ + 532:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** hdma->State = HAL_DMA_STATE_READY; + 533:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** + 534:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** /* Process Unlocked */ + 535:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** __HAL_UNLOCK(hdma); + 536:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** + 537:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** return HAL_ERROR; + 538:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** } + 539:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** } + 540:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** } + 541:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** + 542:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** if (HAL_DMA_FULL_TRANSFER == CompleteLevel) + 543:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** { + 544:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** /* Clear the transfer complete flag */ + 545:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** hdma->DmaBaseAddress->IFCR = DMA_FLAG_TC1 << hdma->ChannelIndex; + ARM GAS /tmp/ccCkUfTP.s page 11 + + + 546:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** + 547:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** /* The selected Channelx EN bit is cleared (DMA is disabled and + 548:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** all transfers are complete) */ + 549:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** hdma->State = HAL_DMA_STATE_READY; + 550:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** } + 551:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** else + 552:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** { + 553:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** /* Clear the half transfer complete flag */ + 554:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** hdma->DmaBaseAddress->IFCR = DMA_FLAG_HT1 << hdma->ChannelIndex; + 555:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** } + 556:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** + 557:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** /* Process unlocked */ + 558:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** __HAL_UNLOCK(hdma); + 559:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** + 560:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** return HAL_OK; + 561:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** } + 562:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** + 563:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** /** + 564:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** * @brief Handle DMA interrupt request. + 565:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** * @param hdma pointer to a DMA_HandleTypeDef structure that contains + 566:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** * the configuration information for the specified DMA Channel. + 567:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** * @retval None + 568:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** */ + 569:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** void HAL_DMA_IRQHandler(DMA_HandleTypeDef *hdma) + 570:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** { + 571:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** uint32_t flag_it = hdma->DmaBaseAddress->ISR; + 572:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** uint32_t source_it = hdma->Instance->CCR; + 573:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** + 574:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** /* Half Transfer Complete Interrupt management ******************************/ + 575:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** if ((RESET != (flag_it & (DMA_FLAG_HT1 << hdma->ChannelIndex))) && (RESET != (source_it & DMA_IT_ + 576:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** { + 577:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** /* Disable the half transfer interrupt if the DMA mode is not CIRCULAR */ + 578:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** if ((hdma->Instance->CCR & DMA_CCR_CIRC) == 0U) + 579:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** { + 580:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** /* Disable the half transfer interrupt */ + 581:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** hdma->Instance->CCR &= ~DMA_IT_HT; + 582:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** } + 583:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** + 584:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** /* Clear the half transfer complete flag */ + 585:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** hdma->DmaBaseAddress->IFCR = DMA_FLAG_HT1 << hdma->ChannelIndex; + 586:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** + 587:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** /* DMA peripheral state is not updated in Half Transfer */ + 588:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** /* State is updated only in Transfer Complete case */ + 589:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** + 590:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** if (hdma->XferHalfCpltCallback != NULL) + 591:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** { + 592:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** /* Half transfer callback */ + 593:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** hdma->XferHalfCpltCallback(hdma); + 594:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** } + 595:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** } + 596:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** + 597:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** /* Transfer Complete Interrupt management ***********************************/ + 598:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** else if ((RESET != (flag_it & (DMA_FLAG_TC1 << hdma->ChannelIndex))) && (RESET != (source_it & DM + 599:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** { + 600:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** if ((hdma->Instance->CCR & DMA_CCR_CIRC) == 0U) + 601:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** { + 602:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** /* Disable the transfer complete & transfer error interrupts */ + ARM GAS /tmp/ccCkUfTP.s page 12 + + + 603:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** /* if the DMA mode is not CIRCULAR */ + 604:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** hdma->Instance->CCR &= ~(DMA_IT_TC | DMA_IT_TE); + 605:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** + 606:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** /* Change the DMA state */ + 607:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** hdma->State = HAL_DMA_STATE_READY; + 608:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** } + 609:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** + 610:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** /* Clear the transfer complete flag */ + 611:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** hdma->DmaBaseAddress->IFCR = DMA_FLAG_TC1 << hdma->ChannelIndex; + 612:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** + 613:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** /* Process Unlocked */ + 614:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** __HAL_UNLOCK(hdma); + 615:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** + 616:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** if (hdma->XferCpltCallback != NULL) + 617:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** { + 618:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** /* Transfer complete callback */ + 619:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** hdma->XferCpltCallback(hdma); + 620:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** } + 621:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** } + 622:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** + 623:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** /* Transfer Error Interrupt management ***************************************/ + 624:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** else if ((RESET != (flag_it & (DMA_FLAG_TE1 << hdma->ChannelIndex))) && (RESET != (source_it & DM + 625:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** { + 626:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** /* When a DMA transfer error occurs */ + 627:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** /* A hardware clear of its EN bits is performed */ + 628:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** /* Then, disable all DMA interrupts */ + 629:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** hdma->Instance->CCR &= ~(DMA_IT_TC | DMA_IT_HT | DMA_IT_TE); + 630:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** + 631:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** /* Clear all flags */ + 632:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** hdma->DmaBaseAddress->IFCR = DMA_FLAG_GL1 << hdma->ChannelIndex; + 633:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** + 634:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** /* Update error code */ + 635:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** hdma->ErrorCode = HAL_DMA_ERROR_TE; + 636:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** + 637:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** /* Change the DMA state */ + 638:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** hdma->State = HAL_DMA_STATE_READY; + 639:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** + 640:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** /* Process Unlocked */ + 641:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** __HAL_UNLOCK(hdma); + 642:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** + 643:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** if (hdma->XferErrorCallback != NULL) + 644:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** { + 645:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** /* Transfer error callback */ + 646:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** hdma->XferErrorCallback(hdma); + 647:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** } + 648:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** } + 649:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** } + 650:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** + 651:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** /** + 652:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** * @brief Register callbacks + 653:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** * @param hdma pointer to a DMA_HandleTypeDef structure that contains + 654:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** * the configuration information for the specified DMA Stream. + 655:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** * @param CallbackID User Callback identifier + 656:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** * a HAL_DMA_CallbackIDTypeDef ENUM as parameter. + 657:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** * @param pCallback pointer to private callback function which has pointer to + 658:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** * a DMA_HandleTypeDef structure as parameter. + 659:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** * @retval HAL status + ARM GAS /tmp/ccCkUfTP.s page 13 + + + 660:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** */ + 661:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** HAL_StatusTypeDef HAL_DMA_RegisterCallback(DMA_HandleTypeDef *hdma, HAL_DMA_CallbackIDTypeDef Callb + 662:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** { + 663:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** HAL_StatusTypeDef status = HAL_OK; + 664:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** + 665:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** /* Process locked */ + 666:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** __HAL_LOCK(hdma); + 667:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** + 668:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** if (HAL_DMA_STATE_READY == hdma->State) + 669:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** { + 670:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** switch (CallbackID) + 671:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** { + 672:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** case HAL_DMA_XFER_CPLT_CB_ID: + 673:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** hdma->XferCpltCallback = pCallback; + 674:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** break; + 675:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** + 676:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** case HAL_DMA_XFER_HALFCPLT_CB_ID: + 677:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** hdma->XferHalfCpltCallback = pCallback; + 678:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** break; + 679:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** + 680:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** case HAL_DMA_XFER_ERROR_CB_ID: + 681:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** hdma->XferErrorCallback = pCallback; + 682:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** break; + 683:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** + 684:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** case HAL_DMA_XFER_ABORT_CB_ID: + 685:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** hdma->XferAbortCallback = pCallback; + 686:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** break; + 687:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** + 688:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** default: + 689:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** status = HAL_ERROR; + 690:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** break; + 691:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** } + 692:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** } + 693:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** else + 694:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** { + 695:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** status = HAL_ERROR; + 696:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** } + 697:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** + 698:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** /* Release Lock */ + 699:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** __HAL_UNLOCK(hdma); + 700:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** + 701:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** return status; + 702:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** } + 703:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** + 704:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** /** + 705:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** * @brief UnRegister callbacks + 706:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** * @param hdma pointer to a DMA_HandleTypeDef structure that contains + 707:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** * the configuration information for the specified DMA Stream. + 708:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** * @param CallbackID User Callback identifier + 709:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** * a HAL_DMA_CallbackIDTypeDef ENUM as parameter. + 710:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** * @retval HAL status + 711:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** */ + 712:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** HAL_StatusTypeDef HAL_DMA_UnRegisterCallback(DMA_HandleTypeDef *hdma, HAL_DMA_CallbackIDTypeDef Cal + 713:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** { + 714:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** HAL_StatusTypeDef status = HAL_OK; + 715:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** + 716:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** /* Process locked */ + ARM GAS /tmp/ccCkUfTP.s page 14 + + + 717:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** __HAL_LOCK(hdma); + 718:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** + 719:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** if (HAL_DMA_STATE_READY == hdma->State) + 720:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** { + 721:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** switch (CallbackID) + 722:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** { + 723:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** case HAL_DMA_XFER_CPLT_CB_ID: + 724:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** hdma->XferCpltCallback = NULL; + 725:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** break; + 726:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** + 727:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** case HAL_DMA_XFER_HALFCPLT_CB_ID: + 728:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** hdma->XferHalfCpltCallback = NULL; + 729:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** break; + 730:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** + 731:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** case HAL_DMA_XFER_ERROR_CB_ID: + 732:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** hdma->XferErrorCallback = NULL; + 733:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** break; + 734:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** + 735:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** case HAL_DMA_XFER_ABORT_CB_ID: + 736:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** hdma->XferAbortCallback = NULL; + 737:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** break; + 738:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** + 739:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** case HAL_DMA_XFER_ALL_CB_ID: + 740:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** hdma->XferCpltCallback = NULL; + 741:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** hdma->XferHalfCpltCallback = NULL; + 742:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** hdma->XferErrorCallback = NULL; + 743:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** hdma->XferAbortCallback = NULL; + 744:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** break; + 745:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** + 746:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** default: + 747:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** status = HAL_ERROR; + 748:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** break; + 749:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** } + 750:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** } + 751:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** else + 752:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** { + 753:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** status = HAL_ERROR; + 754:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** } + 755:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** + 756:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** /* Release Lock */ + 757:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** __HAL_UNLOCK(hdma); + 758:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** + 759:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** return status; + 760:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** } + 761:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** + 762:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** /** + 763:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** * @} + 764:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** */ + 765:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** + 766:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** /** @defgroup DMA_Exported_Functions_Group3 Peripheral State functions + 767:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** * @brief Peripheral State functions + 768:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** * + 769:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** @verbatim + 770:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** =============================================================================== + 771:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** ##### State and Errors functions ##### + 772:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** =============================================================================== + 773:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** [..] + ARM GAS /tmp/ccCkUfTP.s page 15 + + + 774:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** This subsection provides functions allowing to + 775:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** (+) Check the DMA state + 776:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** (+) Get error code + 777:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** + 778:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** @endverbatim + 779:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** * @{ + 780:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** */ + 781:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** + 782:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** /** + 783:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** * @brief Returns the DMA state. + 784:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** * @param hdma pointer to a DMA_HandleTypeDef structure that contains + 785:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** * the configuration information for the specified DMA Channel. + 786:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** * @retval HAL state + 787:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** */ + 788:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** HAL_DMA_StateTypeDef HAL_DMA_GetState(DMA_HandleTypeDef *hdma) + 789:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** { + 790:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** return hdma->State; + 791:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** } + 792:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** + 793:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** /** + 794:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** * @brief Return the DMA error code + 795:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** * @param hdma pointer to a DMA_HandleTypeDef structure that contains + 796:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** * the configuration information for the specified DMA Channel. + 797:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** * @retval DMA Error Code + 798:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** */ + 799:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** uint32_t HAL_DMA_GetError(DMA_HandleTypeDef *hdma) + 800:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** { + 801:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** return hdma->ErrorCode; + 802:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** } + 803:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** + 804:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** /** + 805:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** * @} + 806:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** */ + 807:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** + 808:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** /** + 809:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** * @} + 810:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** */ + 811:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** + 812:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** /** @addtogroup DMA_Private_Functions + 813:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** * @{ + 814:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** */ + 815:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** + 816:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** /** + 817:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** * @brief Set the DMA Transfer parameters. + 818:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** * @param hdma pointer to a DMA_HandleTypeDef structure that contains + 819:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** * the configuration information for the specified DMA Channel. + 820:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** * @param SrcAddress The source memory Buffer address + 821:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** * @param DstAddress The destination memory Buffer address + 822:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** * @param DataLength The length of data to be transferred from source to destination + 823:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** * @retval HAL status + 824:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** */ + 825:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** static void DMA_SetConfig(DMA_HandleTypeDef *hdma, uint32_t SrcAddress, uint32_t DstAddress, uint32 + 826:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** { + 27 .loc 1 826 1 view -0 + 28 .cfi_startproc + 29 @ args = 0, pretend = 0, frame = 0 + 30 @ frame_needed = 0, uses_anonymous_args = 0 + ARM GAS /tmp/ccCkUfTP.s page 16 + + + 31 .loc 1 826 1 is_stmt 0 view .LVU1 + 32 0000 70B5 push {r4, r5, r6, lr} + 33 .cfi_def_cfa_offset 16 + 34 .cfi_offset 4, -16 + 35 .cfi_offset 5, -12 + 36 .cfi_offset 6, -8 + 37 .cfi_offset 14, -4 + 827:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** /* Clear all flags */ + 828:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** hdma->DmaBaseAddress->IFCR = (DMA_FLAG_GL1 << hdma->ChannelIndex); + 38 .loc 1 828 3 is_stmt 1 view .LVU2 + 39 .loc 1 828 54 is_stmt 0 view .LVU3 + 40 0002 066C ldr r6, [r0, #64] + 41 .loc 1 828 7 view .LVU4 + 42 0004 C56B ldr r5, [r0, #60] + 43 .loc 1 828 47 view .LVU5 + 44 0006 0124 movs r4, #1 + 45 0008 B440 lsls r4, r4, r6 + 46 .loc 1 828 31 view .LVU6 + 47 000a 6C60 str r4, [r5, #4] + 829:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** + 830:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** /* Configure DMA Channel data length */ + 831:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** hdma->Instance->CNDTR = DataLength; + 48 .loc 1 831 3 is_stmt 1 view .LVU7 + 49 .loc 1 831 7 is_stmt 0 view .LVU8 + 50 000c 0468 ldr r4, [r0] + 51 .loc 1 831 25 view .LVU9 + 52 000e 6360 str r3, [r4, #4] + 832:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** + 833:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** /* Memory to Peripheral */ + 834:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** if ((hdma->Init.Direction) == DMA_MEMORY_TO_PERIPH) + 53 .loc 1 834 3 is_stmt 1 view .LVU10 + 54 .loc 1 834 18 is_stmt 0 view .LVU11 + 55 0010 4368 ldr r3, [r0, #4] + 56 .LVL1: + 57 .loc 1 834 6 view .LVU12 + 58 0012 102B cmp r3, #16 + 59 0014 04D0 beq .L4 + 835:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** { + 836:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** /* Configure DMA Channel destination address */ + 837:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** hdma->Instance->CPAR = DstAddress; + 838:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** + 839:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** /* Configure DMA Channel source address */ + 840:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** hdma->Instance->CMAR = SrcAddress; + 841:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** } + 842:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** /* Peripheral to Memory */ + 843:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** else + 844:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** { + 845:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** /* Configure DMA Channel source address */ + 846:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** hdma->Instance->CPAR = SrcAddress; + 60 .loc 1 846 5 is_stmt 1 view .LVU13 + 61 .loc 1 846 9 is_stmt 0 view .LVU14 + 62 0016 0368 ldr r3, [r0] + 63 .loc 1 846 26 view .LVU15 + 64 0018 9960 str r1, [r3, #8] + 65 .LVL2: + 847:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** + 848:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** /* Configure DMA Channel destination address */ + ARM GAS /tmp/ccCkUfTP.s page 17 + + + 849:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** hdma->Instance->CMAR = DstAddress; + 66 .loc 1 849 5 is_stmt 1 view .LVU16 + 67 .loc 1 849 9 is_stmt 0 view .LVU17 + 68 001a 0368 ldr r3, [r0] + 69 .loc 1 849 26 view .LVU18 + 70 001c DA60 str r2, [r3, #12] + 71 .L1: + 850:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** } + 851:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** } + 72 .loc 1 851 1 view .LVU19 + 73 @ sp needed + 74 001e 70BD pop {r4, r5, r6, pc} + 75 .LVL3: + 76 .L4: + 837:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** + 77 .loc 1 837 5 is_stmt 1 view .LVU20 + 837:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** + 78 .loc 1 837 9 is_stmt 0 view .LVU21 + 79 0020 0368 ldr r3, [r0] + 837:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** + 80 .loc 1 837 26 view .LVU22 + 81 0022 9A60 str r2, [r3, #8] + 82 .LVL4: + 840:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** } + 83 .loc 1 840 5 is_stmt 1 view .LVU23 + 840:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** } + 84 .loc 1 840 9 is_stmt 0 view .LVU24 + 85 0024 0368 ldr r3, [r0] + 840:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** } + 86 .loc 1 840 26 view .LVU25 + 87 0026 D960 str r1, [r3, #12] + 88 0028 F9E7 b .L1 + 89 .cfi_endproc + 90 .LFE52: + 92 .global __aeabi_uidiv + 93 .section .text.DMA_CalcBaseAndBitshift,"ax",%progbits + 94 .align 1 + 95 .syntax unified + 96 .code 16 + 97 .thumb_func + 99 DMA_CalcBaseAndBitshift: + 100 .LVL5: + 101 .LFB53: + 852:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** + 853:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** /** + 854:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** * @brief set the DMA base address and channel index depending on DMA instance + 855:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** * @param hdma pointer to a DMA_HandleTypeDef structure that contains + 856:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** * the configuration information for the specified DMA Stream. + 857:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** * @retval None + 858:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** */ + 859:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** static void DMA_CalcBaseAndBitshift(DMA_HandleTypeDef *hdma) + 860:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** { + 102 .loc 1 860 1 is_stmt 1 view -0 + 103 .cfi_startproc + 104 @ args = 0, pretend = 0, frame = 0 + 105 @ frame_needed = 0, uses_anonymous_args = 0 + 106 .loc 1 860 1 is_stmt 0 view .LVU27 + ARM GAS /tmp/ccCkUfTP.s page 18 + + + 107 0000 10B5 push {r4, lr} + 108 .cfi_def_cfa_offset 8 + 109 .cfi_offset 4, -8 + 110 .cfi_offset 14, -4 + 111 0002 0400 movs r4, r0 + 861:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** #if defined (DMA2) + 862:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** /* calculation of the channel index */ + 863:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** if ((uint32_t)(hdma->Instance) < (uint32_t)(DMA2_Channel1)) + 864:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** { + 865:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** /* DMA1 */ + 866:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** hdma->ChannelIndex = (((uint32_t)hdma->Instance - (uint32_t)DMA1_Channel1) / ((uint32_t)DMA1_Ch + 867:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** hdma->DmaBaseAddress = DMA1; + 868:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** } + 869:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** else + 870:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** { + 871:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** /* DMA2 */ + 872:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** hdma->ChannelIndex = (((uint32_t)hdma->Instance - (uint32_t)DMA2_Channel1) / ((uint32_t)DMA2_Ch + 873:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** hdma->DmaBaseAddress = DMA2; + 874:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** } + 875:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** #else + 876:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** /* calculation of the channel index */ + 877:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** /* DMA1 */ + 878:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** hdma->ChannelIndex = (((uint32_t)hdma->Instance - (uint32_t)DMA1_Channel1) / ((uint32_t)DMA1_Chan + 112 .loc 1 878 3 is_stmt 1 view .LVU28 + 113 .loc 1 878 40 is_stmt 0 view .LVU29 + 114 0004 0068 ldr r0, [r0] + 115 .LVL6: + 116 .loc 1 878 51 view .LVU30 + 117 0006 054B ldr r3, .L6 + 118 0008 9C46 mov ip, r3 + 119 000a 6044 add r0, r0, ip + 120 .loc 1 878 78 view .LVU31 + 121 000c 1421 movs r1, #20 + 122 000e FFF7FEFF bl __aeabi_uidiv + 123 .LVL7: + 124 .loc 1 878 133 view .LVU32 + 125 0012 8000 lsls r0, r0, #2 + 126 .loc 1 878 22 view .LVU33 + 127 0014 2064 str r0, [r4, #64] + 879:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** hdma->DmaBaseAddress = DMA1; + 128 .loc 1 879 3 is_stmt 1 view .LVU34 + 129 .loc 1 879 24 is_stmt 0 view .LVU35 + 130 0016 024B ldr r3, .L6+4 + 131 0018 E363 str r3, [r4, #60] + 880:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** #endif + 881:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** } + 132 .loc 1 881 1 view .LVU36 + 133 @ sp needed + 134 .LVL8: + 135 .loc 1 881 1 view .LVU37 + 136 001a 10BD pop {r4, pc} + 137 .L7: + 138 .align 2 + 139 .L6: + 140 001c F8FFFDBF .word -1073872904 + 141 0020 00000240 .word 1073872896 + 142 .cfi_endproc + ARM GAS /tmp/ccCkUfTP.s page 19 + + + 143 .LFE53: + 145 .section .text.HAL_DMA_Init,"ax",%progbits + 146 .align 1 + 147 .global HAL_DMA_Init + 148 .syntax unified + 149 .code 16 + 150 .thumb_func + 152 HAL_DMA_Init: + 153 .LVL9: + 154 .LFB40: + 138:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** uint32_t tmp = 0U; + 155 .loc 1 138 1 is_stmt 1 view -0 + 156 .cfi_startproc + 157 @ args = 0, pretend = 0, frame = 0 + 158 @ frame_needed = 0, uses_anonymous_args = 0 + 138:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** uint32_t tmp = 0U; + 159 .loc 1 138 1 is_stmt 0 view .LVU39 + 160 0000 70B5 push {r4, r5, r6, lr} + 161 .cfi_def_cfa_offset 16 + 162 .cfi_offset 4, -16 + 163 .cfi_offset 5, -12 + 164 .cfi_offset 6, -8 + 165 .cfi_offset 14, -4 + 166 0002 041E subs r4, r0, #0 + 139:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** + 167 .loc 1 139 3 is_stmt 1 view .LVU40 + 168 .LVL10: + 142:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** { + 169 .loc 1 142 3 view .LVU41 + 142:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** { + 170 .loc 1 142 6 is_stmt 0 view .LVU42 + 171 0004 20D0 beq .L10 + 148:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** assert_param(IS_DMA_DIRECTION(hdma->Init.Direction)); + 172 .loc 1 148 3 is_stmt 1 view .LVU43 + 149:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** assert_param(IS_DMA_PERIPHERAL_INC_STATE(hdma->Init.PeriphInc)); + 173 .loc 1 149 3 view .LVU44 + 150:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** assert_param(IS_DMA_MEMORY_INC_STATE(hdma->Init.MemInc)); + 174 .loc 1 150 3 view .LVU45 + 151:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** assert_param(IS_DMA_PERIPHERAL_DATA_SIZE(hdma->Init.PeriphDataAlignment)); + 175 .loc 1 151 3 view .LVU46 + 152:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** assert_param(IS_DMA_MEMORY_DATA_SIZE(hdma->Init.MemDataAlignment)); + 176 .loc 1 152 3 view .LVU47 + 153:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** assert_param(IS_DMA_MODE(hdma->Init.Mode)); + 177 .loc 1 153 3 view .LVU48 + 154:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** assert_param(IS_DMA_PRIORITY(hdma->Init.Priority)); + 178 .loc 1 154 3 view .LVU49 + 155:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** + 179 .loc 1 155 3 view .LVU50 + 158:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** + 180 .loc 1 158 3 view .LVU51 + 158:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** + 181 .loc 1 158 15 is_stmt 0 view .LVU52 + 182 0006 2125 movs r5, #33 + 183 0008 0223 movs r3, #2 + 184 000a 4355 strb r3, [r0, r5] + 161:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** + 185 .loc 1 161 3 is_stmt 1 view .LVU53 + ARM GAS /tmp/ccCkUfTP.s page 20 + + + 161:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** + 186 .loc 1 161 13 is_stmt 0 view .LVU54 + 187 000c 0168 ldr r1, [r0] + 161:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** + 188 .loc 1 161 7 view .LVU55 + 189 000e 0A68 ldr r2, [r1] + 190 .LVL11: + 164:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** DMA_CCR_MINC | DMA_CCR_PINC | DMA_CCR_CIRC | \ + 191 .loc 1 164 3 is_stmt 1 view .LVU56 + 164:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** DMA_CCR_MINC | DMA_CCR_PINC | DMA_CCR_CIRC | \ + 192 .loc 1 164 7 is_stmt 0 view .LVU57 + 193 0010 0E4B ldr r3, .L11 + 194 0012 1A40 ands r2, r3 + 195 .LVL12: + 169:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** hdma->Init.PeriphInc | hdma->Init.MemInc | + 196 .loc 1 169 3 is_stmt 1 view .LVU58 + 169:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** hdma->Init.PeriphInc | hdma->Init.MemInc | + 197 .loc 1 169 21 is_stmt 0 view .LVU59 + 198 0014 4368 ldr r3, [r0, #4] + 170:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** hdma->Init.PeriphDataAlignment | hdma->Init.MemDataAlignment | + 199 .loc 1 170 21 view .LVU60 + 200 0016 8068 ldr r0, [r0, #8] + 201 .LVL13: + 169:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** hdma->Init.PeriphInc | hdma->Init.MemInc | + 202 .loc 1 169 39 view .LVU61 + 203 0018 0343 orrs r3, r0 + 170:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** hdma->Init.PeriphDataAlignment | hdma->Init.MemDataAlignment | + 204 .loc 1 170 54 view .LVU62 + 205 001a E068 ldr r0, [r4, #12] + 170:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** hdma->Init.PeriphDataAlignment | hdma->Init.MemDataAlignment | + 206 .loc 1 170 42 view .LVU63 + 207 001c 0343 orrs r3, r0 + 171:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** hdma->Init.Mode | hdma->Init.Priority; + 208 .loc 1 171 21 view .LVU64 + 209 001e 2069 ldr r0, [r4, #16] + 170:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** hdma->Init.PeriphDataAlignment | hdma->Init.MemDataAlignment | + 210 .loc 1 170 72 view .LVU65 + 211 0020 0343 orrs r3, r0 + 171:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** hdma->Init.Mode | hdma->Init.Priority; + 212 .loc 1 171 54 view .LVU66 + 213 0022 6069 ldr r0, [r4, #20] + 171:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** hdma->Init.Mode | hdma->Init.Priority; + 214 .loc 1 171 42 view .LVU67 + 215 0024 0343 orrs r3, r0 + 172:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** + 216 .loc 1 172 21 view .LVU68 + 217 0026 A069 ldr r0, [r4, #24] + 171:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** hdma->Init.Mode | hdma->Init.Priority; + 218 .loc 1 171 72 view .LVU69 + 219 0028 0343 orrs r3, r0 + 172:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** + 220 .loc 1 172 54 view .LVU70 + 221 002a E069 ldr r0, [r4, #28] + 172:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** + 222 .loc 1 172 42 view .LVU71 + 223 002c 0343 orrs r3, r0 + 169:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** hdma->Init.PeriphInc | hdma->Init.MemInc | + ARM GAS /tmp/ccCkUfTP.s page 21 + + + 224 .loc 1 169 7 view .LVU72 + 225 002e 1343 orrs r3, r2 + 226 .LVL14: + 175:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** + 227 .loc 1 175 3 is_stmt 1 view .LVU73 + 175:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** + 228 .loc 1 175 23 is_stmt 0 view .LVU74 + 229 0030 0B60 str r3, [r1] + 179:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** + 230 .loc 1 179 3 is_stmt 1 view .LVU75 + 231 0032 2000 movs r0, r4 + 232 0034 FFF7FEFF bl DMA_CalcBaseAndBitshift + 233 .LVL15: + 182:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** + 234 .loc 1 182 3 view .LVU76 + 182:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** + 235 .loc 1 182 19 is_stmt 0 view .LVU77 + 236 0038 0023 movs r3, #0 + 237 003a A363 str r3, [r4, #56] + 185:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** + 238 .loc 1 185 3 is_stmt 1 view .LVU78 + 185:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** + 239 .loc 1 185 15 is_stmt 0 view .LVU79 + 240 003c 0122 movs r2, #1 + 241 003e 6255 strb r2, [r4, r5] + 188:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** + 242 .loc 1 188 3 is_stmt 1 view .LVU80 + 188:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** + 243 .loc 1 188 14 is_stmt 0 view .LVU81 + 244 0040 1F32 adds r2, r2, #31 + 245 0042 A354 strb r3, [r4, r2] + 190:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** } + 246 .loc 1 190 3 is_stmt 1 view .LVU82 + 190:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** } + 247 .loc 1 190 10 is_stmt 0 view .LVU83 + 248 0044 0020 movs r0, #0 + 249 .LVL16: + 250 .L9: + 191:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** + 251 .loc 1 191 1 view .LVU84 + 252 @ sp needed + 253 .LVL17: + 191:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** + 254 .loc 1 191 1 view .LVU85 + 255 0046 70BD pop {r4, r5, r6, pc} + 256 .LVL18: + 257 .L10: + 144:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** } + 258 .loc 1 144 12 view .LVU86 + 259 0048 0120 movs r0, #1 + 260 .LVL19: + 144:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** } + 261 .loc 1 144 12 view .LVU87 + 262 004a FCE7 b .L9 + 263 .L12: + 264 .align 2 + 265 .L11: + ARM GAS /tmp/ccCkUfTP.s page 22 + + + 266 004c 0FC0FFFF .word -16369 + 267 .cfi_endproc + 268 .LFE40: + 270 .section .text.HAL_DMA_DeInit,"ax",%progbits + 271 .align 1 + 272 .global HAL_DMA_DeInit + 273 .syntax unified + 274 .code 16 + 275 .thumb_func + 277 HAL_DMA_DeInit: + 278 .LVL20: + 279 .LFB41: + 200:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** /* Check the DMA handle allocation */ + 280 .loc 1 200 1 is_stmt 1 view -0 + 281 .cfi_startproc + 282 @ args = 0, pretend = 0, frame = 0 + 283 @ frame_needed = 0, uses_anonymous_args = 0 + 200:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** /* Check the DMA handle allocation */ + 284 .loc 1 200 1 is_stmt 0 view .LVU89 + 285 0000 70B5 push {r4, r5, r6, lr} + 286 .cfi_def_cfa_offset 16 + 287 .cfi_offset 4, -16 + 288 .cfi_offset 5, -12 + 289 .cfi_offset 6, -8 + 290 .cfi_offset 14, -4 + 291 0002 041E subs r4, r0, #0 + 202:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** { + 292 .loc 1 202 3 is_stmt 1 view .LVU90 + 202:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** { + 293 .loc 1 202 6 is_stmt 0 view .LVU91 + 294 0004 1ED0 beq .L15 + 208:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** + 295 .loc 1 208 3 is_stmt 1 view .LVU92 + 211:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** + 296 .loc 1 211 3 view .LVU93 + 211:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** + 297 .loc 1 211 7 is_stmt 0 view .LVU94 + 298 0006 0268 ldr r2, [r0] + 211:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** + 299 .loc 1 211 17 view .LVU95 + 300 0008 1368 ldr r3, [r2] + 211:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** + 301 .loc 1 211 23 view .LVU96 + 302 000a 0126 movs r6, #1 + 303 000c B343 bics r3, r6 + 304 000e 1360 str r3, [r2] + 214:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** + 305 .loc 1 214 3 is_stmt 1 view .LVU97 + 214:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** + 306 .loc 1 214 7 is_stmt 0 view .LVU98 + 307 0010 0368 ldr r3, [r0] + 214:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** + 308 .loc 1 214 24 view .LVU99 + 309 0012 0025 movs r5, #0 + 310 0014 1D60 str r5, [r3] + 217:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** + 311 .loc 1 217 3 is_stmt 1 view .LVU100 + ARM GAS /tmp/ccCkUfTP.s page 23 + + + 217:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** + 312 .loc 1 217 7 is_stmt 0 view .LVU101 + 313 0016 0368 ldr r3, [r0] + 217:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** + 314 .loc 1 217 25 view .LVU102 + 315 0018 5D60 str r5, [r3, #4] + 220:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** + 316 .loc 1 220 3 is_stmt 1 view .LVU103 + 220:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** + 317 .loc 1 220 7 is_stmt 0 view .LVU104 + 318 001a 0368 ldr r3, [r0] + 220:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** + 319 .loc 1 220 25 view .LVU105 + 320 001c 9D60 str r5, [r3, #8] + 223:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** + 321 .loc 1 223 3 is_stmt 1 view .LVU106 + 223:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** + 322 .loc 1 223 7 is_stmt 0 view .LVU107 + 323 001e 0368 ldr r3, [r0] + 223:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** + 324 .loc 1 223 24 view .LVU108 + 325 0020 DD60 str r5, [r3, #12] + 226:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** + 326 .loc 1 226 3 is_stmt 1 view .LVU109 + 327 0022 FFF7FEFF bl DMA_CalcBaseAndBitshift + 328 .LVL21: + 229:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** + 329 .loc 1 229 3 view .LVU110 + 229:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** + 330 .loc 1 229 52 is_stmt 0 view .LVU111 + 331 0026 226C ldr r2, [r4, #64] + 229:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** + 332 .loc 1 229 7 view .LVU112 + 333 0028 E36B ldr r3, [r4, #60] + 229:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** + 334 .loc 1 229 45 view .LVU113 + 335 002a 9640 lsls r6, r6, r2 + 229:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** + 336 .loc 1 229 30 view .LVU114 + 337 002c 5E60 str r6, [r3, #4] + 232:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** hdma->XferHalfCpltCallback = NULL; + 338 .loc 1 232 3 is_stmt 1 view .LVU115 + 232:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** hdma->XferHalfCpltCallback = NULL; + 339 .loc 1 232 26 is_stmt 0 view .LVU116 + 340 002e A562 str r5, [r4, #40] + 233:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** hdma->XferErrorCallback = NULL; + 341 .loc 1 233 3 is_stmt 1 view .LVU117 + 233:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** hdma->XferErrorCallback = NULL; + 342 .loc 1 233 30 is_stmt 0 view .LVU118 + 343 0030 E562 str r5, [r4, #44] + 234:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** hdma->XferAbortCallback = NULL; + 344 .loc 1 234 3 is_stmt 1 view .LVU119 + 234:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** hdma->XferAbortCallback = NULL; + 345 .loc 1 234 27 is_stmt 0 view .LVU120 + 346 0032 2563 str r5, [r4, #48] + 235:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** + 347 .loc 1 235 3 is_stmt 1 view .LVU121 + ARM GAS /tmp/ccCkUfTP.s page 24 + + + 235:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** + 348 .loc 1 235 27 is_stmt 0 view .LVU122 + 349 0034 6563 str r5, [r4, #52] + 238:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** + 350 .loc 1 238 3 is_stmt 1 view .LVU123 + 238:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** + 351 .loc 1 238 19 is_stmt 0 view .LVU124 + 352 0036 A563 str r5, [r4, #56] + 241:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** + 353 .loc 1 241 3 is_stmt 1 view .LVU125 + 241:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** + 354 .loc 1 241 15 is_stmt 0 view .LVU126 + 355 0038 2123 movs r3, #33 + 356 003a E554 strb r5, [r4, r3] + 244:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** + 357 .loc 1 244 3 is_stmt 1 view .LVU127 + 244:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** + 358 .loc 1 244 3 view .LVU128 + 359 003c 013B subs r3, r3, #1 + 360 003e E554 strb r5, [r4, r3] + 244:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** + 361 .loc 1 244 3 view .LVU129 + 246:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** } + 362 .loc 1 246 3 view .LVU130 + 246:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** } + 363 .loc 1 246 10 is_stmt 0 view .LVU131 + 364 0040 0020 movs r0, #0 + 365 .L14: + 247:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** + 366 .loc 1 247 1 view .LVU132 + 367 @ sp needed + 368 .LVL22: + 247:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** + 369 .loc 1 247 1 view .LVU133 + 370 0042 70BD pop {r4, r5, r6, pc} + 371 .LVL23: + 372 .L15: + 204:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** } + 373 .loc 1 204 12 view .LVU134 + 374 0044 0120 movs r0, #1 + 375 .LVL24: + 204:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** } + 376 .loc 1 204 12 view .LVU135 + 377 0046 FCE7 b .L14 + 378 .cfi_endproc + 379 .LFE41: + 381 .section .text.HAL_DMA_Start,"ax",%progbits + 382 .align 1 + 383 .global HAL_DMA_Start + 384 .syntax unified + 385 .code 16 + 386 .thumb_func + 388 HAL_DMA_Start: + 389 .LVL25: + 390 .LFB42: + 282:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** HAL_StatusTypeDef status = HAL_OK; + 391 .loc 1 282 1 is_stmt 1 view -0 + ARM GAS /tmp/ccCkUfTP.s page 25 + + + 392 .cfi_startproc + 393 @ args = 0, pretend = 0, frame = 0 + 394 @ frame_needed = 0, uses_anonymous_args = 0 + 282:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** HAL_StatusTypeDef status = HAL_OK; + 395 .loc 1 282 1 is_stmt 0 view .LVU137 + 396 0000 70B5 push {r4, r5, r6, lr} + 397 .cfi_def_cfa_offset 16 + 398 .cfi_offset 4, -16 + 399 .cfi_offset 5, -12 + 400 .cfi_offset 6, -8 + 401 .cfi_offset 14, -4 + 402 0002 0400 movs r4, r0 + 283:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** + 403 .loc 1 283 3 is_stmt 1 view .LVU138 + 404 .LVL26: + 286:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** + 405 .loc 1 286 3 view .LVU139 + 289:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** + 406 .loc 1 289 3 view .LVU140 + 289:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** + 407 .loc 1 289 3 view .LVU141 + 408 0004 2020 movs r0, #32 + 409 .LVL27: + 289:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** + 410 .loc 1 289 3 is_stmt 0 view .LVU142 + 411 0006 205C ldrb r0, [r4, r0] + 412 0008 0128 cmp r0, #1 + 413 000a 1ED0 beq .L19 + 289:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** + 414 .loc 1 289 3 is_stmt 1 discriminator 2 view .LVU143 + 415 000c 2020 movs r0, #32 + 416 000e 0125 movs r5, #1 + 417 0010 2554 strb r5, [r4, r0] + 289:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** + 418 .loc 1 289 3 discriminator 2 view .LVU144 + 291:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** { + 419 .loc 1 291 3 view .LVU145 + 291:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** { + 420 .loc 1 291 34 is_stmt 0 view .LVU146 + 421 0012 0130 adds r0, r0, #1 + 422 0014 205C ldrb r0, [r4, r0] + 291:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** { + 423 .loc 1 291 6 view .LVU147 + 424 0016 0128 cmp r0, #1 + 425 0018 04D0 beq .L20 + 310:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** + 426 .loc 1 310 5 is_stmt 1 view .LVU148 + 310:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** + 427 .loc 1 310 5 view .LVU149 + 428 001a 2023 movs r3, #32 + 429 .LVL28: + 310:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** + 430 .loc 1 310 5 is_stmt 0 view .LVU150 + 431 001c 0022 movs r2, #0 + 432 .LVL29: + 310:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** + 433 .loc 1 310 5 view .LVU151 + ARM GAS /tmp/ccCkUfTP.s page 26 + + + 434 001e E254 strb r2, [r4, r3] + 310:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** + 435 .loc 1 310 5 is_stmt 1 view .LVU152 + 313:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** } + 436 .loc 1 313 5 view .LVU153 + 437 .LVL30: + 313:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** } + 438 .loc 1 313 12 is_stmt 0 view .LVU154 + 439 0020 0220 movs r0, #2 + 440 .LVL31: + 441 .L17: + 317:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** + 442 .loc 1 317 1 view .LVU155 + 443 @ sp needed + 444 .LVL32: + 317:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** + 445 .loc 1 317 1 view .LVU156 + 446 0022 70BD pop {r4, r5, r6, pc} + 447 .LVL33: + 448 .L20: + 294:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** + 449 .loc 1 294 5 is_stmt 1 view .LVU157 + 294:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** + 450 .loc 1 294 17 is_stmt 0 view .LVU158 + 451 0024 2030 adds r0, r0, #32 + 452 0026 0135 adds r5, r5, #1 + 453 0028 2554 strb r5, [r4, r0] + 296:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** + 454 .loc 1 296 5 is_stmt 1 view .LVU159 + 296:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** + 455 .loc 1 296 21 is_stmt 0 view .LVU160 + 456 002a 0020 movs r0, #0 + 457 002c A063 str r0, [r4, #56] + 299:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** + 458 .loc 1 299 5 is_stmt 1 view .LVU161 + 299:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** + 459 .loc 1 299 9 is_stmt 0 view .LVU162 + 460 002e 2668 ldr r6, [r4] + 299:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** + 461 .loc 1 299 19 view .LVU163 + 462 0030 3068 ldr r0, [r6] + 299:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** + 463 .loc 1 299 25 view .LVU164 + 464 0032 013D subs r5, r5, #1 + 465 0034 A843 bics r0, r5 + 466 0036 3060 str r0, [r6] + 302:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** + 467 .loc 1 302 5 is_stmt 1 view .LVU165 + 468 0038 2000 movs r0, r4 + 469 003a FFF7FEFF bl DMA_SetConfig + 470 .LVL34: + 305:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** } + 471 .loc 1 305 5 view .LVU166 + 305:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** } + 472 .loc 1 305 9 is_stmt 0 view .LVU167 + 473 003e 2268 ldr r2, [r4] + 305:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** } + ARM GAS /tmp/ccCkUfTP.s page 27 + + + 474 .loc 1 305 19 view .LVU168 + 475 0040 1368 ldr r3, [r2] + 305:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** } + 476 .loc 1 305 25 view .LVU169 + 477 0042 2B43 orrs r3, r5 + 478 0044 1360 str r3, [r2] + 283:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** + 479 .loc 1 283 21 view .LVU170 + 480 0046 0020 movs r0, #0 + 481 0048 EBE7 b .L17 + 482 .LVL35: + 483 .L19: + 289:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** + 484 .loc 1 289 3 discriminator 1 view .LVU171 + 485 004a 0220 movs r0, #2 + 486 004c E9E7 b .L17 + 487 .cfi_endproc + 488 .LFE42: + 490 .section .text.HAL_DMA_Start_IT,"ax",%progbits + 491 .align 1 + 492 .global HAL_DMA_Start_IT + 493 .syntax unified + 494 .code 16 + 495 .thumb_func + 497 HAL_DMA_Start_IT: + 498 .LVL36: + 499 .LFB43: + 329:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** HAL_StatusTypeDef status = HAL_OK; + 500 .loc 1 329 1 is_stmt 1 view -0 + 501 .cfi_startproc + 502 @ args = 0, pretend = 0, frame = 0 + 503 @ frame_needed = 0, uses_anonymous_args = 0 + 329:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** HAL_StatusTypeDef status = HAL_OK; + 504 .loc 1 329 1 is_stmt 0 view .LVU173 + 505 0000 70B5 push {r4, r5, r6, lr} + 506 .cfi_def_cfa_offset 16 + 507 .cfi_offset 4, -16 + 508 .cfi_offset 5, -12 + 509 .cfi_offset 6, -8 + 510 .cfi_offset 14, -4 + 511 0002 0400 movs r4, r0 + 330:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** + 512 .loc 1 330 3 is_stmt 1 view .LVU174 + 513 .LVL37: + 333:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** + 514 .loc 1 333 3 view .LVU175 + 336:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** + 515 .loc 1 336 3 view .LVU176 + 336:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** + 516 .loc 1 336 3 view .LVU177 + 517 0004 2020 movs r0, #32 + 518 .LVL38: + 336:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** + 519 .loc 1 336 3 is_stmt 0 view .LVU178 + 520 0006 205C ldrb r0, [r4, r0] + 521 0008 0128 cmp r0, #1 + 522 000a 32D0 beq .L26 + ARM GAS /tmp/ccCkUfTP.s page 28 + + + 336:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** + 523 .loc 1 336 3 is_stmt 1 discriminator 2 view .LVU179 + 524 000c 2020 movs r0, #32 + 525 000e 0125 movs r5, #1 + 526 0010 2554 strb r5, [r4, r0] + 336:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** + 527 .loc 1 336 3 discriminator 2 view .LVU180 + 338:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** { + 528 .loc 1 338 3 view .LVU181 + 338:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** { + 529 .loc 1 338 34 is_stmt 0 view .LVU182 + 530 0012 0130 adds r0, r0, #1 + 531 0014 205C ldrb r0, [r4, r0] + 338:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** { + 532 .loc 1 338 6 view .LVU183 + 533 0016 0128 cmp r0, #1 + 534 0018 04D0 beq .L27 + 369:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** + 535 .loc 1 369 5 is_stmt 1 view .LVU184 + 369:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** + 536 .loc 1 369 5 view .LVU185 + 537 001a 2023 movs r3, #32 + 538 .LVL39: + 369:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** + 539 .loc 1 369 5 is_stmt 0 view .LVU186 + 540 001c 0022 movs r2, #0 + 541 .LVL40: + 369:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** + 542 .loc 1 369 5 view .LVU187 + 543 001e E254 strb r2, [r4, r3] + 369:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** + 544 .loc 1 369 5 is_stmt 1 view .LVU188 + 372:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** } + 545 .loc 1 372 5 view .LVU189 + 546 .LVL41: + 372:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** } + 547 .loc 1 372 12 is_stmt 0 view .LVU190 + 548 0020 0220 movs r0, #2 + 549 .LVL42: + 550 .L22: + 376:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** + 551 .loc 1 376 1 view .LVU191 + 552 @ sp needed + 553 .LVL43: + 376:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** + 554 .loc 1 376 1 view .LVU192 + 555 0022 70BD pop {r4, r5, r6, pc} + 556 .LVL44: + 557 .L27: + 341:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** + 558 .loc 1 341 5 is_stmt 1 view .LVU193 + 341:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** + 559 .loc 1 341 17 is_stmt 0 view .LVU194 + 560 0024 2030 adds r0, r0, #32 + 561 0026 0135 adds r5, r5, #1 + 562 0028 2554 strb r5, [r4, r0] + 343:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** + ARM GAS /tmp/ccCkUfTP.s page 29 + + + 563 .loc 1 343 5 is_stmt 1 view .LVU195 + 343:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** + 564 .loc 1 343 21 is_stmt 0 view .LVU196 + 565 002a 0020 movs r0, #0 + 566 002c A063 str r0, [r4, #56] + 346:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** + 567 .loc 1 346 5 is_stmt 1 view .LVU197 + 346:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** + 568 .loc 1 346 9 is_stmt 0 view .LVU198 + 569 002e 2568 ldr r5, [r4] + 346:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** + 570 .loc 1 346 19 view .LVU199 + 571 0030 2868 ldr r0, [r5] + 346:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** + 572 .loc 1 346 25 view .LVU200 + 573 0032 0126 movs r6, #1 + 574 0034 B043 bics r0, r6 + 575 0036 2860 str r0, [r5] + 349:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** + 576 .loc 1 349 5 is_stmt 1 view .LVU201 + 577 0038 2000 movs r0, r4 + 578 003a FFF7FEFF bl DMA_SetConfig + 579 .LVL45: + 353:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** { + 580 .loc 1 353 5 view .LVU202 + 353:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** { + 581 .loc 1 353 21 is_stmt 0 view .LVU203 + 582 003e E36A ldr r3, [r4, #44] + 353:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** { + 583 .loc 1 353 8 view .LVU204 + 584 0040 002B cmp r3, #0 + 585 0042 0BD0 beq .L24 + 355:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** } + 586 .loc 1 355 7 is_stmt 1 view .LVU205 + 355:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** } + 587 .loc 1 355 11 is_stmt 0 view .LVU206 + 588 0044 2268 ldr r2, [r4] + 355:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** } + 589 .loc 1 355 21 view .LVU207 + 590 0046 1368 ldr r3, [r2] + 355:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** } + 591 .loc 1 355 27 view .LVU208 + 592 0048 0E21 movs r1, #14 + 593 004a 0B43 orrs r3, r1 + 594 004c 1360 str r3, [r2] + 595 .L25: + 364:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** } + 596 .loc 1 364 5 is_stmt 1 view .LVU209 + 364:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** } + 597 .loc 1 364 9 is_stmt 0 view .LVU210 + 598 004e 2268 ldr r2, [r4] + 364:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** } + 599 .loc 1 364 19 view .LVU211 + 600 0050 1368 ldr r3, [r2] + 364:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** } + 601 .loc 1 364 25 view .LVU212 + 602 0052 0121 movs r1, #1 + ARM GAS /tmp/ccCkUfTP.s page 30 + + + 603 0054 0B43 orrs r3, r1 + 604 0056 1360 str r3, [r2] + 330:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** + 605 .loc 1 330 21 view .LVU213 + 606 0058 0020 movs r0, #0 + 607 005a E2E7 b .L22 + 608 .L24: + 359:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** hdma->Instance->CCR &= ~DMA_IT_HT; + 609 .loc 1 359 7 is_stmt 1 view .LVU214 + 359:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** hdma->Instance->CCR &= ~DMA_IT_HT; + 610 .loc 1 359 11 is_stmt 0 view .LVU215 + 611 005c 2268 ldr r2, [r4] + 359:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** hdma->Instance->CCR &= ~DMA_IT_HT; + 612 .loc 1 359 21 view .LVU216 + 613 005e 1368 ldr r3, [r2] + 359:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** hdma->Instance->CCR &= ~DMA_IT_HT; + 614 .loc 1 359 27 view .LVU217 + 615 0060 0A21 movs r1, #10 + 616 0062 0B43 orrs r3, r1 + 617 0064 1360 str r3, [r2] + 360:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** } + 618 .loc 1 360 7 is_stmt 1 view .LVU218 + 360:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** } + 619 .loc 1 360 11 is_stmt 0 view .LVU219 + 620 0066 2268 ldr r2, [r4] + 360:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** } + 621 .loc 1 360 21 view .LVU220 + 622 0068 1368 ldr r3, [r2] + 360:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** } + 623 .loc 1 360 27 view .LVU221 + 624 006a 0639 subs r1, r1, #6 + 625 006c 8B43 bics r3, r1 + 626 006e 1360 str r3, [r2] + 627 0070 EDE7 b .L25 + 628 .LVL46: + 629 .L26: + 336:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** + 630 .loc 1 336 3 discriminator 1 view .LVU222 + 631 0072 0220 movs r0, #2 + 632 0074 D5E7 b .L22 + 633 .cfi_endproc + 634 .LFE43: + 636 .section .text.HAL_DMA_Abort,"ax",%progbits + 637 .align 1 + 638 .global HAL_DMA_Abort + 639 .syntax unified + 640 .code 16 + 641 .thumb_func + 643 HAL_DMA_Abort: + 644 .LVL47: + 645 .LFB44: + 385:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** if (hdma->State != HAL_DMA_STATE_BUSY) + 646 .loc 1 385 1 is_stmt 1 view -0 + 647 .cfi_startproc + 648 @ args = 0, pretend = 0, frame = 0 + 649 @ frame_needed = 0, uses_anonymous_args = 0 + 385:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** if (hdma->State != HAL_DMA_STATE_BUSY) + ARM GAS /tmp/ccCkUfTP.s page 31 + + + 650 .loc 1 385 1 is_stmt 0 view .LVU224 + 651 0000 10B5 push {r4, lr} + 652 .cfi_def_cfa_offset 8 + 653 .cfi_offset 4, -8 + 654 .cfi_offset 14, -4 + 386:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** { + 655 .loc 1 386 3 is_stmt 1 view .LVU225 + 386:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** { + 656 .loc 1 386 11 is_stmt 0 view .LVU226 + 657 0002 2123 movs r3, #33 + 658 0004 C35C ldrb r3, [r0, r3] + 386:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** { + 659 .loc 1 386 6 view .LVU227 + 660 0006 022B cmp r3, #2 + 661 0008 06D0 beq .L29 + 389:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** + 662 .loc 1 389 5 is_stmt 1 view .LVU228 + 389:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** + 663 .loc 1 389 21 is_stmt 0 view .LVU229 + 664 000a 0423 movs r3, #4 + 665 000c 8363 str r3, [r0, #56] + 392:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** + 666 .loc 1 392 5 is_stmt 1 view .LVU230 + 392:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** + 667 .loc 1 392 5 view .LVU231 + 668 000e 1C33 adds r3, r3, #28 + 669 0010 0022 movs r2, #0 + 670 0012 C254 strb r2, [r0, r3] + 392:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** + 671 .loc 1 392 5 view .LVU232 + 394:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** } + 672 .loc 1 394 5 view .LVU233 + 394:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** } + 673 .loc 1 394 12 is_stmt 0 view .LVU234 + 674 0014 0120 movs r0, #1 + 675 .LVL48: + 676 .L30: + 414:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** + 677 .loc 1 414 1 view .LVU235 + 678 @ sp needed + 679 0016 10BD pop {r4, pc} + 680 .LVL49: + 681 .L29: + 399:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** + 682 .loc 1 399 5 is_stmt 1 view .LVU236 + 399:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** + 683 .loc 1 399 9 is_stmt 0 view .LVU237 + 684 0018 0268 ldr r2, [r0] + 399:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** + 685 .loc 1 399 19 view .LVU238 + 686 001a 1368 ldr r3, [r2] + 399:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** + 687 .loc 1 399 25 view .LVU239 + 688 001c 0E21 movs r1, #14 + 689 001e 8B43 bics r3, r1 + 690 0020 1360 str r3, [r2] + 402:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** + ARM GAS /tmp/ccCkUfTP.s page 32 + + + 691 .loc 1 402 5 is_stmt 1 view .LVU240 + 402:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** + 692 .loc 1 402 9 is_stmt 0 view .LVU241 + 693 0022 0168 ldr r1, [r0] + 402:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** + 694 .loc 1 402 19 view .LVU242 + 695 0024 0A68 ldr r2, [r1] + 402:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** + 696 .loc 1 402 25 view .LVU243 + 697 0026 0123 movs r3, #1 + 698 0028 9A43 bics r2, r3 + 699 002a 0A60 str r2, [r1] + 405:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** } + 700 .loc 1 405 5 is_stmt 1 view .LVU244 + 405:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** } + 701 .loc 1 405 55 is_stmt 0 view .LVU245 + 702 002c 016C ldr r1, [r0, #64] + 405:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** } + 703 .loc 1 405 9 view .LVU246 + 704 002e C26B ldr r2, [r0, #60] + 405:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** } + 705 .loc 1 405 48 view .LVU247 + 706 0030 1C00 movs r4, r3 + 707 0032 8C40 lsls r4, r4, r1 + 405:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** } + 708 .loc 1 405 32 view .LVU248 + 709 0034 5460 str r4, [r2, #4] + 408:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** + 710 .loc 1 408 3 is_stmt 1 view .LVU249 + 408:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** + 711 .loc 1 408 15 is_stmt 0 view .LVU250 + 712 0036 2122 movs r2, #33 + 713 0038 8354 strb r3, [r0, r2] + 411:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** + 714 .loc 1 411 3 is_stmt 1 view .LVU251 + 411:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** + 715 .loc 1 411 3 view .LVU252 + 716 003a 1F33 adds r3, r3, #31 + 717 003c 0022 movs r2, #0 + 718 003e C254 strb r2, [r0, r3] + 411:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** + 719 .loc 1 411 3 view .LVU253 + 413:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** } + 720 .loc 1 413 3 view .LVU254 + 413:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** } + 721 .loc 1 413 10 is_stmt 0 view .LVU255 + 722 0040 0020 movs r0, #0 + 723 .LVL50: + 413:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** } + 724 .loc 1 413 10 view .LVU256 + 725 0042 E8E7 b .L30 + 726 .cfi_endproc + 727 .LFE44: + 729 .section .text.HAL_DMA_Abort_IT,"ax",%progbits + 730 .align 1 + 731 .global HAL_DMA_Abort_IT + 732 .syntax unified + ARM GAS /tmp/ccCkUfTP.s page 33 + + + 733 .code 16 + 734 .thumb_func + 736 HAL_DMA_Abort_IT: + 737 .LVL51: + 738 .LFB45: + 423:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** HAL_StatusTypeDef status = HAL_OK; + 739 .loc 1 423 1 is_stmt 1 view -0 + 740 .cfi_startproc + 741 @ args = 0, pretend = 0, frame = 0 + 742 @ frame_needed = 0, uses_anonymous_args = 0 + 423:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** HAL_StatusTypeDef status = HAL_OK; + 743 .loc 1 423 1 is_stmt 0 view .LVU258 + 744 0000 10B5 push {r4, lr} + 745 .cfi_def_cfa_offset 8 + 746 .cfi_offset 4, -8 + 747 .cfi_offset 14, -4 + 424:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** + 748 .loc 1 424 3 is_stmt 1 view .LVU259 + 749 .LVL52: + 426:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** { + 750 .loc 1 426 3 view .LVU260 + 426:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** { + 751 .loc 1 426 33 is_stmt 0 view .LVU261 + 752 0002 2123 movs r3, #33 + 753 0004 C35C ldrb r3, [r0, r3] + 426:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** { + 754 .loc 1 426 6 view .LVU262 + 755 0006 022B cmp r3, #2 + 756 0008 03D0 beq .L32 + 429:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** + 757 .loc 1 429 5 is_stmt 1 view .LVU263 + 429:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** + 758 .loc 1 429 21 is_stmt 0 view .LVU264 + 759 000a 0423 movs r3, #4 + 760 000c 8363 str r3, [r0, #56] + 431:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** } + 761 .loc 1 431 5 is_stmt 1 view .LVU265 + 762 .LVL53: + 431:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** } + 763 .loc 1 431 12 is_stmt 0 view .LVU266 + 764 000e 0120 movs r0, #1 + 765 .LVL54: + 766 .L33: + 457:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** } + 767 .loc 1 457 3 is_stmt 1 view .LVU267 + 458:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** + 768 .loc 1 458 1 is_stmt 0 view .LVU268 + 769 @ sp needed + 770 0010 10BD pop {r4, pc} + 771 .LVL55: + 772 .L32: + 437:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** + 773 .loc 1 437 5 is_stmt 1 view .LVU269 + 437:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** + 774 .loc 1 437 9 is_stmt 0 view .LVU270 + 775 0012 0268 ldr r2, [r0] + 437:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** + ARM GAS /tmp/ccCkUfTP.s page 34 + + + 776 .loc 1 437 19 view .LVU271 + 777 0014 1368 ldr r3, [r2] + 437:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** + 778 .loc 1 437 25 view .LVU272 + 779 0016 0E21 movs r1, #14 + 780 0018 8B43 bics r3, r1 + 781 001a 1360 str r3, [r2] + 440:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** + 782 .loc 1 440 5 is_stmt 1 view .LVU273 + 440:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** + 783 .loc 1 440 9 is_stmt 0 view .LVU274 + 784 001c 0168 ldr r1, [r0] + 440:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** + 785 .loc 1 440 19 view .LVU275 + 786 001e 0A68 ldr r2, [r1] + 440:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** + 787 .loc 1 440 25 view .LVU276 + 788 0020 0123 movs r3, #1 + 789 0022 9A43 bics r2, r3 + 790 0024 0A60 str r2, [r1] + 443:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** + 791 .loc 1 443 5 is_stmt 1 view .LVU277 + 443:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** + 792 .loc 1 443 54 is_stmt 0 view .LVU278 + 793 0026 016C ldr r1, [r0, #64] + 443:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** + 794 .loc 1 443 9 view .LVU279 + 795 0028 C26B ldr r2, [r0, #60] + 443:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** + 796 .loc 1 443 47 view .LVU280 + 797 002a 1C00 movs r4, r3 + 798 002c 8C40 lsls r4, r4, r1 + 443:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** + 799 .loc 1 443 32 view .LVU281 + 800 002e 5460 str r4, [r2, #4] + 446:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** + 801 .loc 1 446 5 is_stmt 1 view .LVU282 + 446:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** + 802 .loc 1 446 17 is_stmt 0 view .LVU283 + 803 0030 2122 movs r2, #33 + 804 0032 8354 strb r3, [r0, r2] + 449:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** + 805 .loc 1 449 5 is_stmt 1 view .LVU284 + 449:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** + 806 .loc 1 449 5 view .LVU285 + 807 0034 1F33 adds r3, r3, #31 + 808 0036 0022 movs r2, #0 + 809 0038 C254 strb r2, [r0, r3] + 449:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** + 810 .loc 1 449 5 view .LVU286 + 452:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** { + 811 .loc 1 452 5 view .LVU287 + 452:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** { + 812 .loc 1 452 13 is_stmt 0 view .LVU288 + 813 003a 436B ldr r3, [r0, #52] + 452:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** { + 814 .loc 1 452 8 view .LVU289 + ARM GAS /tmp/ccCkUfTP.s page 35 + + + 815 003c 002B cmp r3, #0 + 816 003e 02D0 beq .L34 + 454:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** } + 817 .loc 1 454 7 is_stmt 1 view .LVU290 + 818 0040 9847 blx r3 + 819 .LVL56: + 424:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** + 820 .loc 1 424 21 is_stmt 0 view .LVU291 + 821 0042 0020 movs r0, #0 + 822 0044 E4E7 b .L33 + 823 .LVL57: + 824 .L34: + 424:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** + 825 .loc 1 424 21 view .LVU292 + 826 0046 0020 movs r0, #0 + 827 .LVL58: + 424:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** + 828 .loc 1 424 21 view .LVU293 + 829 0048 E2E7 b .L33 + 830 .cfi_endproc + 831 .LFE45: + 833 .section .text.HAL_DMA_PollForTransfer,"ax",%progbits + 834 .align 1 + 835 .global HAL_DMA_PollForTransfer + 836 .syntax unified + 837 .code 16 + 838 .thumb_func + 840 HAL_DMA_PollForTransfer: + 841 .LVL59: + 842 .LFB46: + 469:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** uint32_t temp; + 843 .loc 1 469 1 is_stmt 1 view -0 + 844 .cfi_startproc + 845 @ args = 0, pretend = 0, frame = 8 + 846 @ frame_needed = 0, uses_anonymous_args = 0 + 469:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** uint32_t temp; + 847 .loc 1 469 1 is_stmt 0 view .LVU295 + 848 0000 F0B5 push {r4, r5, r6, r7, lr} + 849 .cfi_def_cfa_offset 20 + 850 .cfi_offset 4, -20 + 851 .cfi_offset 5, -16 + 852 .cfi_offset 6, -12 + 853 .cfi_offset 7, -8 + 854 .cfi_offset 14, -4 + 855 0002 83B0 sub sp, sp, #12 + 856 .cfi_def_cfa_offset 32 + 857 0004 0600 movs r6, r0 + 858 0006 0C00 movs r4, r1 + 859 0008 1700 movs r7, r2 + 470:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** uint32_t tickstart = 0U; + 860 .loc 1 470 3 is_stmt 1 view .LVU296 + 471:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** + 861 .loc 1 471 3 view .LVU297 + 862 .LVL60: + 473:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** { + 863 .loc 1 473 3 view .LVU298 + 473:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** { + ARM GAS /tmp/ccCkUfTP.s page 36 + + + 864 .loc 1 473 33 is_stmt 0 view .LVU299 + 865 000a 2123 movs r3, #33 + 866 000c C35C ldrb r3, [r0, r3] + 473:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** { + 867 .loc 1 473 6 view .LVU300 + 868 000e 022B cmp r3, #2 + 869 0010 07D0 beq .L36 + 476:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** __HAL_UNLOCK(hdma); + 870 .loc 1 476 5 is_stmt 1 view .LVU301 + 476:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** __HAL_UNLOCK(hdma); + 871 .loc 1 476 21 is_stmt 0 view .LVU302 + 872 0012 0423 movs r3, #4 + 873 0014 8363 str r3, [r0, #56] + 477:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** return HAL_ERROR; + 874 .loc 1 477 5 is_stmt 1 view .LVU303 + 477:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** return HAL_ERROR; + 875 .loc 1 477 5 view .LVU304 + 876 0016 1C33 adds r3, r3, #28 + 877 0018 0022 movs r2, #0 + 878 .LVL61: + 477:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** return HAL_ERROR; + 879 .loc 1 477 5 is_stmt 0 view .LVU305 + 880 001a C254 strb r2, [r0, r3] + 477:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** return HAL_ERROR; + 881 .loc 1 477 5 is_stmt 1 view .LVU306 + 478:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** } + 882 .loc 1 478 5 view .LVU307 + 478:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** } + 883 .loc 1 478 12 is_stmt 0 view .LVU308 + 884 001c 0120 movs r0, #1 + 885 .LVL62: + 886 .L37: + 561:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** + 887 .loc 1 561 1 view .LVU309 + 888 001e 03B0 add sp, sp, #12 + 889 @ sp needed + 890 .LVL63: + 891 .LVL64: + 892 .LVL65: + 561:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** + 893 .loc 1 561 1 view .LVU310 + 894 0020 F0BD pop {r4, r5, r6, r7, pc} + 895 .LVL66: + 896 .L36: + 482:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** { + 897 .loc 1 482 3 is_stmt 1 view .LVU311 + 482:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** { + 898 .loc 1 482 21 is_stmt 0 view .LVU312 + 899 0022 0368 ldr r3, [r0] + 482:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** { + 900 .loc 1 482 31 view .LVU313 + 901 0024 1B68 ldr r3, [r3] + 482:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** { + 902 .loc 1 482 6 view .LVU314 + 903 0026 9B06 lsls r3, r3, #26 + 904 0028 24D4 bmi .L49 + 489:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** { + ARM GAS /tmp/ccCkUfTP.s page 37 + + + 905 .loc 1 489 3 is_stmt 1 view .LVU315 + 489:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** { + 906 .loc 1 489 6 is_stmt 0 view .LVU316 + 907 002a 0029 cmp r1, #0 + 908 002c 27D1 bne .L39 + 492:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** } + 909 .loc 1 492 5 is_stmt 1 view .LVU317 + 492:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** } + 910 .loc 1 492 32 is_stmt 0 view .LVU318 + 911 002e 036C ldr r3, [r0, #64] + 492:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** } + 912 .loc 1 492 10 view .LVU319 + 913 0030 0225 movs r5, #2 + 914 0032 9D40 lsls r5, r5, r3 + 915 .LVL67: + 916 .L40: + 501:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** + 917 .loc 1 501 3 is_stmt 1 view .LVU320 + 501:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** + 918 .loc 1 501 15 is_stmt 0 view .LVU321 + 919 0034 FFF7FEFF bl HAL_GetTick + 920 .LVL68: + 501:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** + 921 .loc 1 501 15 view .LVU322 + 922 0038 0190 str r0, [sp, #4] + 923 .LVL69: + 503:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** { + 924 .loc 1 503 3 is_stmt 1 view .LVU323 + 925 .L43: + 503:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** { + 926 .loc 1 503 16 view .LVU324 + 503:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** { + 927 .loc 1 503 24 is_stmt 0 view .LVU325 + 928 003a F16B ldr r1, [r6, #60] + 503:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** { + 929 .loc 1 503 40 view .LVU326 + 930 003c 0B68 ldr r3, [r1] + 503:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** { + 931 .loc 1 503 16 view .LVU327 + 932 003e 1D42 tst r5, r3 + 933 0040 2DD1 bne .L50 + 505:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** { + 934 .loc 1 505 5 is_stmt 1 view .LVU328 + 505:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** { + 935 .loc 1 505 39 is_stmt 0 view .LVU329 + 936 0042 0868 ldr r0, [r1] + 505:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** { + 937 .loc 1 505 68 view .LVU330 + 938 0044 326C ldr r2, [r6, #64] + 505:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** { + 939 .loc 1 505 61 view .LVU331 + 940 0046 0823 movs r3, #8 + 941 0048 9340 lsls r3, r3, r2 + 505:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** { + 942 .loc 1 505 8 view .LVU332 + 943 004a 0342 tst r3, r0 + 944 004c 1BD1 bne .L51 + ARM GAS /tmp/ccCkUfTP.s page 38 + + + 524:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** { + 945 .loc 1 524 5 is_stmt 1 view .LVU333 + 524:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** { + 946 .loc 1 524 8 is_stmt 0 view .LVU334 + 947 004e 7B1C adds r3, r7, #1 + 948 0050 F3D0 beq .L43 + 526:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** { + 949 .loc 1 526 7 is_stmt 1 view .LVU335 + 526:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** { + 950 .loc 1 526 10 is_stmt 0 view .LVU336 + 951 0052 002F cmp r7, #0 + 952 0054 05D0 beq .L44 + 526:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** { + 953 .loc 1 526 32 discriminator 1 view .LVU337 + 954 0056 FFF7FEFF bl HAL_GetTick + 955 .LVL70: + 526:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** { + 956 .loc 1 526 46 discriminator 1 view .LVU338 + 957 005a 019B ldr r3, [sp, #4] + 958 005c C01A subs r0, r0, r3 + 526:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** { + 959 .loc 1 526 27 discriminator 1 view .LVU339 + 960 005e B842 cmp r0, r7 + 961 0060 EBD9 bls .L43 + 962 .L44: + 529:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** + 963 .loc 1 529 9 is_stmt 1 view .LVU340 + 529:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** + 964 .loc 1 529 25 is_stmt 0 view .LVU341 + 965 0062 2023 movs r3, #32 + 966 0064 B363 str r3, [r6, #56] + 532:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** + 967 .loc 1 532 9 is_stmt 1 view .LVU342 + 532:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** + 968 .loc 1 532 21 is_stmt 0 view .LVU343 + 969 0066 2122 movs r2, #33 + 970 0068 0121 movs r1, #1 + 971 006a B154 strb r1, [r6, r2] + 535:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** + 972 .loc 1 535 9 is_stmt 1 view .LVU344 + 535:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** + 973 .loc 1 535 9 view .LVU345 + 974 006c 0022 movs r2, #0 + 975 006e F254 strb r2, [r6, r3] + 535:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** + 976 .loc 1 535 9 view .LVU346 + 537:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** } + 977 .loc 1 537 9 view .LVU347 + 537:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** } + 978 .loc 1 537 16 is_stmt 0 view .LVU348 + 979 0070 0120 movs r0, #1 + 980 0072 D4E7 b .L37 + 981 .LVL71: + 982 .L49: + 484:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** return HAL_ERROR; + 983 .loc 1 484 5 is_stmt 1 view .LVU349 + 484:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** return HAL_ERROR; + ARM GAS /tmp/ccCkUfTP.s page 39 + + + 984 .loc 1 484 21 is_stmt 0 view .LVU350 + 985 0074 8023 movs r3, #128 + 986 0076 5B00 lsls r3, r3, #1 + 987 0078 8363 str r3, [r0, #56] + 485:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** } + 988 .loc 1 485 5 is_stmt 1 view .LVU351 + 485:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** } + 989 .loc 1 485 12 is_stmt 0 view .LVU352 + 990 007a 0120 movs r0, #1 + 991 .LVL72: + 485:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** } + 992 .loc 1 485 12 view .LVU353 + 993 007c CFE7 b .L37 + 994 .LVL73: + 995 .L39: + 497:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** } + 996 .loc 1 497 5 is_stmt 1 view .LVU354 + 497:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** } + 997 .loc 1 497 32 is_stmt 0 view .LVU355 + 998 007e 036C ldr r3, [r0, #64] + 497:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** } + 999 .loc 1 497 10 view .LVU356 + 1000 0080 0425 movs r5, #4 + 1001 0082 9D40 lsls r5, r5, r3 + 1002 .LVL74: + 497:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** } + 1003 .loc 1 497 10 view .LVU357 + 1004 0084 D6E7 b .L40 + 1005 .LVL75: + 1006 .L51: + 510:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** + 1007 .loc 1 510 7 is_stmt 1 view .LVU358 + 510:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** + 1008 .loc 1 510 49 is_stmt 0 view .LVU359 + 1009 0086 0123 movs r3, #1 + 1010 0088 1800 movs r0, r3 + 1011 008a 9040 lsls r0, r0, r2 + 510:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** + 1012 .loc 1 510 34 view .LVU360 + 1013 008c 4860 str r0, [r1, #4] + 513:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** + 1014 .loc 1 513 7 is_stmt 1 view .LVU361 + 513:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** + 1015 .loc 1 513 23 is_stmt 0 view .LVU362 + 1016 008e B363 str r3, [r6, #56] + 516:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** + 1017 .loc 1 516 7 is_stmt 1 view .LVU363 + 516:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** + 1018 .loc 1 516 19 is_stmt 0 view .LVU364 + 1019 0090 2122 movs r2, #33 + 1020 0092 B354 strb r3, [r6, r2] + 519:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** + 1021 .loc 1 519 7 is_stmt 1 view .LVU365 + 519:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** + 1022 .loc 1 519 7 view .LVU366 + 1023 0094 1F33 adds r3, r3, #31 + 1024 0096 0022 movs r2, #0 + ARM GAS /tmp/ccCkUfTP.s page 40 + + + 1025 0098 F254 strb r2, [r6, r3] + 519:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** + 1026 .loc 1 519 7 view .LVU367 + 521:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** } + 1027 .loc 1 521 7 view .LVU368 + 521:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** } + 1028 .loc 1 521 14 is_stmt 0 view .LVU369 + 1029 009a 0120 movs r0, #1 + 1030 009c BFE7 b .L37 + 1031 .L50: + 542:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** { + 1032 .loc 1 542 3 is_stmt 1 view .LVU370 + 542:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** { + 1033 .loc 1 542 6 is_stmt 0 view .LVU371 + 1034 009e 002C cmp r4, #0 + 1035 00a0 0BD1 bne .L46 + 545:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** + 1036 .loc 1 545 5 is_stmt 1 view .LVU372 + 545:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** + 1037 .loc 1 545 54 is_stmt 0 view .LVU373 + 1038 00a2 326C ldr r2, [r6, #64] + 545:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** + 1039 .loc 1 545 47 view .LVU374 + 1040 00a4 0223 movs r3, #2 + 1041 00a6 9340 lsls r3, r3, r2 + 545:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** + 1042 .loc 1 545 32 view .LVU375 + 1043 00a8 4B60 str r3, [r1, #4] + 549:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** } + 1044 .loc 1 549 5 is_stmt 1 view .LVU376 + 549:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** } + 1045 .loc 1 549 17 is_stmt 0 view .LVU377 + 1046 00aa 2123 movs r3, #33 + 1047 00ac 0122 movs r2, #1 + 1048 00ae F254 strb r2, [r6, r3] + 1049 .L47: + 558:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** + 1050 .loc 1 558 3 is_stmt 1 view .LVU378 + 558:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** + 1051 .loc 1 558 3 view .LVU379 + 1052 00b0 2023 movs r3, #32 + 1053 00b2 0022 movs r2, #0 + 1054 00b4 F254 strb r2, [r6, r3] + 558:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** + 1055 .loc 1 558 3 view .LVU380 + 560:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** } + 1056 .loc 1 560 3 view .LVU381 + 560:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** } + 1057 .loc 1 560 10 is_stmt 0 view .LVU382 + 1058 00b6 0020 movs r0, #0 + 1059 00b8 B1E7 b .L37 + 1060 .L46: + 554:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** } + 1061 .loc 1 554 5 is_stmt 1 view .LVU383 + 554:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** } + 1062 .loc 1 554 54 is_stmt 0 view .LVU384 + 1063 00ba 326C ldr r2, [r6, #64] + ARM GAS /tmp/ccCkUfTP.s page 41 + + + 554:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** } + 1064 .loc 1 554 47 view .LVU385 + 1065 00bc 0423 movs r3, #4 + 1066 00be 9340 lsls r3, r3, r2 + 554:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** } + 1067 .loc 1 554 32 view .LVU386 + 1068 00c0 4B60 str r3, [r1, #4] + 1069 00c2 F5E7 b .L47 + 1070 .cfi_endproc + 1071 .LFE46: + 1073 .section .text.HAL_DMA_IRQHandler,"ax",%progbits + 1074 .align 1 + 1075 .global HAL_DMA_IRQHandler + 1076 .syntax unified + 1077 .code 16 + 1078 .thumb_func + 1080 HAL_DMA_IRQHandler: + 1081 .LVL76: + 1082 .LFB47: + 570:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** uint32_t flag_it = hdma->DmaBaseAddress->ISR; + 1083 .loc 1 570 1 is_stmt 1 view -0 + 1084 .cfi_startproc + 1085 @ args = 0, pretend = 0, frame = 0 + 1086 @ frame_needed = 0, uses_anonymous_args = 0 + 570:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** uint32_t flag_it = hdma->DmaBaseAddress->ISR; + 1087 .loc 1 570 1 is_stmt 0 view .LVU388 + 1088 0000 70B5 push {r4, r5, r6, lr} + 1089 .cfi_def_cfa_offset 16 + 1090 .cfi_offset 4, -16 + 1091 .cfi_offset 5, -12 + 1092 .cfi_offset 6, -8 + 1093 .cfi_offset 14, -4 + 571:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** uint32_t source_it = hdma->Instance->CCR; + 1094 .loc 1 571 3 is_stmt 1 view .LVU389 + 571:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** uint32_t source_it = hdma->Instance->CCR; + 1095 .loc 1 571 26 is_stmt 0 view .LVU390 + 1096 0002 C36B ldr r3, [r0, #60] + 571:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** uint32_t source_it = hdma->Instance->CCR; + 1097 .loc 1 571 12 view .LVU391 + 1098 0004 1A68 ldr r2, [r3] + 1099 .LVL77: + 572:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** + 1100 .loc 1 572 3 is_stmt 1 view .LVU392 + 572:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** + 1101 .loc 1 572 28 is_stmt 0 view .LVU393 + 1102 0006 0468 ldr r4, [r0] + 572:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** + 1103 .loc 1 572 12 view .LVU394 + 1104 0008 2568 ldr r5, [r4] + 1105 .LVL78: + 575:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** { + 1106 .loc 1 575 3 is_stmt 1 view .LVU395 + 575:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** { + 1107 .loc 1 575 49 is_stmt 0 view .LVU396 + 1108 000a 016C ldr r1, [r0, #64] + 575:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** { + 1109 .loc 1 575 42 view .LVU397 + ARM GAS /tmp/ccCkUfTP.s page 42 + + + 1110 000c 0423 movs r3, #4 + 1111 000e 8B40 lsls r3, r3, r1 + 575:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** { + 1112 .loc 1 575 6 view .LVU398 + 1113 0010 1A42 tst r2, r3 + 1114 0012 12D0 beq .L53 + 575:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** { + 1115 .loc 1 575 67 discriminator 1 view .LVU399 + 1116 0014 6B07 lsls r3, r5, #29 + 1117 0016 10D5 bpl .L53 + 578:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** { + 1118 .loc 1 578 5 is_stmt 1 view .LVU400 + 578:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** { + 1119 .loc 1 578 24 is_stmt 0 view .LVU401 + 1120 0018 2368 ldr r3, [r4] + 578:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** { + 1121 .loc 1 578 8 view .LVU402 + 1122 001a 9B06 lsls r3, r3, #26 + 1123 001c 03D4 bmi .L54 + 581:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** } + 1124 .loc 1 581 7 is_stmt 1 view .LVU403 + 581:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** } + 1125 .loc 1 581 21 is_stmt 0 view .LVU404 + 1126 001e 2368 ldr r3, [r4] + 581:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** } + 1127 .loc 1 581 27 view .LVU405 + 1128 0020 0422 movs r2, #4 + 1129 .LVL79: + 581:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** } + 1130 .loc 1 581 27 view .LVU406 + 1131 0022 9343 bics r3, r2 + 1132 0024 2360 str r3, [r4] + 1133 .L54: + 585:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** + 1134 .loc 1 585 5 is_stmt 1 view .LVU407 + 585:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** + 1135 .loc 1 585 54 is_stmt 0 view .LVU408 + 1136 0026 016C ldr r1, [r0, #64] + 585:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** + 1137 .loc 1 585 9 view .LVU409 + 1138 0028 C26B ldr r2, [r0, #60] + 585:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** + 1139 .loc 1 585 47 view .LVU410 + 1140 002a 0423 movs r3, #4 + 1141 002c 8B40 lsls r3, r3, r1 + 585:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** + 1142 .loc 1 585 32 view .LVU411 + 1143 002e 5360 str r3, [r2, #4] + 590:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** { + 1144 .loc 1 590 5 is_stmt 1 view .LVU412 + 590:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** { + 1145 .loc 1 590 13 is_stmt 0 view .LVU413 + 1146 0030 C36A ldr r3, [r0, #44] + 590:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** { + 1147 .loc 1 590 8 view .LVU414 + 1148 0032 002B cmp r3, #0 + 1149 0034 00D0 beq .L52 + ARM GAS /tmp/ccCkUfTP.s page 43 + + + 593:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** } + 1150 .loc 1 593 7 is_stmt 1 view .LVU415 + 1151 0036 9847 blx r3 + 1152 .LVL80: + 1153 .L52: + 649:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** + 1154 .loc 1 649 1 is_stmt 0 view .LVU416 + 1155 @ sp needed + 1156 0038 70BD pop {r4, r5, r6, pc} + 1157 .LVL81: + 1158 .L53: + 598:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** { + 1159 .loc 1 598 8 is_stmt 1 view .LVU417 + 598:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** { + 1160 .loc 1 598 47 is_stmt 0 view .LVU418 + 1161 003a 0223 movs r3, #2 + 1162 003c 8B40 lsls r3, r3, r1 + 598:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** { + 1163 .loc 1 598 11 view .LVU419 + 1164 003e 1A42 tst r2, r3 + 1165 0040 18D0 beq .L56 + 598:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** { + 1166 .loc 1 598 72 discriminator 1 view .LVU420 + 1167 0042 AB07 lsls r3, r5, #30 + 1168 0044 16D5 bpl .L56 + 600:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** { + 1169 .loc 1 600 5 is_stmt 1 view .LVU421 + 600:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** { + 1170 .loc 1 600 24 is_stmt 0 view .LVU422 + 1171 0046 2368 ldr r3, [r4] + 600:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** { + 1172 .loc 1 600 8 view .LVU423 + 1173 0048 9B06 lsls r3, r3, #26 + 1174 004a 06D4 bmi .L57 + 604:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** + 1175 .loc 1 604 7 is_stmt 1 view .LVU424 + 604:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** + 1176 .loc 1 604 21 is_stmt 0 view .LVU425 + 1177 004c 2368 ldr r3, [r4] + 604:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** + 1178 .loc 1 604 27 view .LVU426 + 1179 004e 0A22 movs r2, #10 + 1180 .LVL82: + 604:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** + 1181 .loc 1 604 27 view .LVU427 + 1182 0050 9343 bics r3, r2 + 1183 0052 2360 str r3, [r4] + 607:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** } + 1184 .loc 1 607 7 is_stmt 1 view .LVU428 + 607:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** } + 1185 .loc 1 607 19 is_stmt 0 view .LVU429 + 1186 0054 2123 movs r3, #33 + 1187 0056 093A subs r2, r2, #9 + 1188 0058 C254 strb r2, [r0, r3] + 1189 .L57: + 611:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** + 1190 .loc 1 611 5 is_stmt 1 view .LVU430 + ARM GAS /tmp/ccCkUfTP.s page 44 + + + 611:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** + 1191 .loc 1 611 54 is_stmt 0 view .LVU431 + 1192 005a 016C ldr r1, [r0, #64] + 611:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** + 1193 .loc 1 611 9 view .LVU432 + 1194 005c C26B ldr r2, [r0, #60] + 611:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** + 1195 .loc 1 611 47 view .LVU433 + 1196 005e 0223 movs r3, #2 + 1197 0060 8B40 lsls r3, r3, r1 + 611:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** + 1198 .loc 1 611 32 view .LVU434 + 1199 0062 5360 str r3, [r2, #4] + 614:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** + 1200 .loc 1 614 5 is_stmt 1 view .LVU435 + 614:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** + 1201 .loc 1 614 5 view .LVU436 + 1202 0064 2023 movs r3, #32 + 1203 0066 0022 movs r2, #0 + 1204 0068 C254 strb r2, [r0, r3] + 614:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** + 1205 .loc 1 614 5 view .LVU437 + 616:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** { + 1206 .loc 1 616 5 view .LVU438 + 616:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** { + 1207 .loc 1 616 13 is_stmt 0 view .LVU439 + 1208 006a 836A ldr r3, [r0, #40] + 616:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** { + 1209 .loc 1 616 8 view .LVU440 + 1210 006c 002B cmp r3, #0 + 1211 006e E3D0 beq .L52 + 619:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** } + 1212 .loc 1 619 7 is_stmt 1 view .LVU441 + 1213 0070 9847 blx r3 + 1214 .LVL83: + 619:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** } + 1215 .loc 1 619 7 is_stmt 0 view .LVU442 + 1216 0072 E1E7 b .L52 + 1217 .LVL84: + 1218 .L56: + 624:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** { + 1219 .loc 1 624 8 is_stmt 1 view .LVU443 + 624:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** { + 1220 .loc 1 624 47 is_stmt 0 view .LVU444 + 1221 0074 0823 movs r3, #8 + 1222 0076 8B40 lsls r3, r3, r1 + 624:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** { + 1223 .loc 1 624 11 view .LVU445 + 1224 0078 1A42 tst r2, r3 + 1225 007a DDD0 beq .L52 + 624:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** { + 1226 .loc 1 624 72 discriminator 1 view .LVU446 + 1227 007c 2D07 lsls r5, r5, #28 + 1228 007e DBD5 bpl .L52 + 1229 .LVL85: + 629:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** + 1230 .loc 1 629 5 is_stmt 1 view .LVU447 + ARM GAS /tmp/ccCkUfTP.s page 45 + + + 629:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** + 1231 .loc 1 629 19 is_stmt 0 view .LVU448 + 1232 0080 2368 ldr r3, [r4] + 629:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** + 1233 .loc 1 629 25 view .LVU449 + 1234 0082 0E22 movs r2, #14 + 1235 .LVL86: + 629:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** + 1236 .loc 1 629 25 view .LVU450 + 1237 0084 9343 bics r3, r2 + 1238 0086 2360 str r3, [r4] + 632:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** + 1239 .loc 1 632 5 is_stmt 1 view .LVU451 + 632:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** + 1240 .loc 1 632 54 is_stmt 0 view .LVU452 + 1241 0088 016C ldr r1, [r0, #64] + 632:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** + 1242 .loc 1 632 9 view .LVU453 + 1243 008a C26B ldr r2, [r0, #60] + 632:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** + 1244 .loc 1 632 47 view .LVU454 + 1245 008c 0123 movs r3, #1 + 1246 008e 1C00 movs r4, r3 + 1247 0090 8C40 lsls r4, r4, r1 + 632:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** + 1248 .loc 1 632 32 view .LVU455 + 1249 0092 5460 str r4, [r2, #4] + 635:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** + 1250 .loc 1 635 5 is_stmt 1 view .LVU456 + 635:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** + 1251 .loc 1 635 21 is_stmt 0 view .LVU457 + 1252 0094 8363 str r3, [r0, #56] + 638:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** + 1253 .loc 1 638 5 is_stmt 1 view .LVU458 + 638:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** + 1254 .loc 1 638 17 is_stmt 0 view .LVU459 + 1255 0096 2122 movs r2, #33 + 1256 0098 8354 strb r3, [r0, r2] + 641:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** + 1257 .loc 1 641 5 is_stmt 1 view .LVU460 + 641:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** + 1258 .loc 1 641 5 view .LVU461 + 1259 009a 1F33 adds r3, r3, #31 + 1260 009c 0022 movs r2, #0 + 1261 009e C254 strb r2, [r0, r3] + 641:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** + 1262 .loc 1 641 5 view .LVU462 + 643:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** { + 1263 .loc 1 643 5 view .LVU463 + 643:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** { + 1264 .loc 1 643 13 is_stmt 0 view .LVU464 + 1265 00a0 036B ldr r3, [r0, #48] + 643:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** { + 1266 .loc 1 643 8 view .LVU465 + 1267 00a2 002B cmp r3, #0 + 1268 00a4 C8D0 beq .L52 + 646:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** } + ARM GAS /tmp/ccCkUfTP.s page 46 + + + 1269 .loc 1 646 7 is_stmt 1 view .LVU466 + 1270 00a6 9847 blx r3 + 1271 .LVL87: + 649:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** + 1272 .loc 1 649 1 is_stmt 0 view .LVU467 + 1273 00a8 C6E7 b .L52 + 1274 .cfi_endproc + 1275 .LFE47: + 1277 .section .text.HAL_DMA_RegisterCallback,"ax",%progbits + 1278 .align 1 + 1279 .global HAL_DMA_RegisterCallback + 1280 .syntax unified + 1281 .code 16 + 1282 .thumb_func + 1284 HAL_DMA_RegisterCallback: + 1285 .LVL88: + 1286 .LFB48: + 662:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** HAL_StatusTypeDef status = HAL_OK; + 1287 .loc 1 662 1 is_stmt 1 view -0 + 1288 .cfi_startproc + 1289 @ args = 0, pretend = 0, frame = 0 + 1290 @ frame_needed = 0, uses_anonymous_args = 0 + 662:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** HAL_StatusTypeDef status = HAL_OK; + 1291 .loc 1 662 1 is_stmt 0 view .LVU469 + 1292 0000 10B5 push {r4, lr} + 1293 .cfi_def_cfa_offset 8 + 1294 .cfi_offset 4, -8 + 1295 .cfi_offset 14, -4 + 1296 0002 0300 movs r3, r0 + 663:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** + 1297 .loc 1 663 3 is_stmt 1 view .LVU470 + 1298 .LVL89: + 666:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** + 1299 .loc 1 666 3 view .LVU471 + 666:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** + 1300 .loc 1 666 3 view .LVU472 + 1301 0004 2020 movs r0, #32 + 1302 .LVL90: + 666:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** + 1303 .loc 1 666 3 is_stmt 0 view .LVU473 + 1304 0006 185C ldrb r0, [r3, r0] + 1305 0008 0128 cmp r0, #1 + 1306 000a 21D0 beq .L71 + 666:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** + 1307 .loc 1 666 3 is_stmt 1 discriminator 2 view .LVU474 + 1308 000c 2020 movs r0, #32 + 1309 000e 0124 movs r4, #1 + 1310 0010 1C54 strb r4, [r3, r0] + 666:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** + 1311 .loc 1 666 3 discriminator 2 view .LVU475 + 668:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** { + 1312 .loc 1 668 3 view .LVU476 + 668:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** { + 1313 .loc 1 668 34 is_stmt 0 view .LVU477 + 1314 0012 0130 adds r0, r0, #1 + 1315 0014 1C5C ldrb r4, [r3, r0] + 1316 0016 E0B2 uxtb r0, r4 + ARM GAS /tmp/ccCkUfTP.s page 47 + + + 668:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** { + 1317 .loc 1 668 6 view .LVU478 + 1318 0018 012C cmp r4, #1 + 1319 001a 04D0 beq .L73 + 695:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** } + 1320 .loc 1 695 12 view .LVU479 + 1321 001c 0120 movs r0, #1 + 1322 .L65: + 1323 .LVL91: + 699:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** + 1324 .loc 1 699 3 is_stmt 1 view .LVU480 + 699:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** + 1325 .loc 1 699 3 view .LVU481 + 1326 001e 2022 movs r2, #32 + 1327 .LVL92: + 699:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** + 1328 .loc 1 699 3 is_stmt 0 view .LVU482 + 1329 0020 0021 movs r1, #0 + 1330 .LVL93: + 699:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** + 1331 .loc 1 699 3 view .LVU483 + 1332 0022 9954 strb r1, [r3, r2] + 699:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** + 1333 .loc 1 699 3 is_stmt 1 view .LVU484 + 701:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** } + 1334 .loc 1 701 3 view .LVU485 + 1335 .LVL94: + 1336 .L64: + 702:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** + 1337 .loc 1 702 1 is_stmt 0 view .LVU486 + 1338 @ sp needed + 1339 0024 10BD pop {r4, pc} + 1340 .LVL95: + 1341 .L73: + 670:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** { + 1342 .loc 1 670 5 is_stmt 1 view .LVU487 + 1343 0026 0229 cmp r1, #2 + 1344 0028 0FD0 beq .L66 + 1345 002a 06D8 bhi .L67 + 1346 002c 0029 cmp r1, #0 + 1347 002e 09D0 beq .L68 + 1348 0030 0129 cmp r1, #1 + 1349 0032 F4D1 bne .L65 + 677:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** break; + 1350 .loc 1 677 9 view .LVU488 + 677:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** break; + 1351 .loc 1 677 36 is_stmt 0 view .LVU489 + 1352 0034 DA62 str r2, [r3, #44] + 678:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** + 1353 .loc 1 678 9 is_stmt 1 view .LVU490 + 663:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** + 1354 .loc 1 663 21 is_stmt 0 view .LVU491 + 1355 0036 0020 movs r0, #0 + 678:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** + 1356 .loc 1 678 9 view .LVU492 + 1357 0038 F1E7 b .L65 + 1358 .L67: + ARM GAS /tmp/ccCkUfTP.s page 48 + + + 670:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** { + 1359 .loc 1 670 5 view .LVU493 + 1360 003a 0329 cmp r1, #3 + 1361 003c EFD1 bne .L65 + 685:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** break; + 1362 .loc 1 685 9 is_stmt 1 view .LVU494 + 685:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** break; + 1363 .loc 1 685 33 is_stmt 0 view .LVU495 + 1364 003e 5A63 str r2, [r3, #52] + 686:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** + 1365 .loc 1 686 9 is_stmt 1 view .LVU496 + 663:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** + 1366 .loc 1 663 21 is_stmt 0 view .LVU497 + 1367 0040 0020 movs r0, #0 + 686:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** + 1368 .loc 1 686 9 view .LVU498 + 1369 0042 ECE7 b .L65 + 1370 .L68: + 673:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** break; + 1371 .loc 1 673 9 is_stmt 1 view .LVU499 + 673:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** break; + 1372 .loc 1 673 32 is_stmt 0 view .LVU500 + 1373 0044 9A62 str r2, [r3, #40] + 674:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** + 1374 .loc 1 674 9 is_stmt 1 view .LVU501 + 663:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** + 1375 .loc 1 663 21 is_stmt 0 view .LVU502 + 1376 0046 0800 movs r0, r1 + 674:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** + 1377 .loc 1 674 9 view .LVU503 + 1378 0048 E9E7 b .L65 + 1379 .L66: + 681:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** break; + 1380 .loc 1 681 9 is_stmt 1 view .LVU504 + 681:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** break; + 1381 .loc 1 681 33 is_stmt 0 view .LVU505 + 1382 004a 1A63 str r2, [r3, #48] + 682:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** + 1383 .loc 1 682 9 is_stmt 1 view .LVU506 + 663:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** + 1384 .loc 1 663 21 is_stmt 0 view .LVU507 + 1385 004c 0020 movs r0, #0 + 682:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** + 1386 .loc 1 682 9 view .LVU508 + 1387 004e E6E7 b .L65 + 1388 .L71: + 666:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** + 1389 .loc 1 666 3 discriminator 1 view .LVU509 + 1390 0050 0220 movs r0, #2 + 1391 0052 E7E7 b .L64 + 1392 .cfi_endproc + 1393 .LFE48: + 1395 .section .text.HAL_DMA_UnRegisterCallback,"ax",%progbits + 1396 .align 1 + 1397 .global HAL_DMA_UnRegisterCallback + 1398 .syntax unified + 1399 .code 16 + ARM GAS /tmp/ccCkUfTP.s page 49 + + + 1400 .thumb_func + 1402 HAL_DMA_UnRegisterCallback: + 1403 .LVL96: + 1404 .LFB49: + 713:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** HAL_StatusTypeDef status = HAL_OK; + 1405 .loc 1 713 1 is_stmt 1 view -0 + 1406 .cfi_startproc + 1407 @ args = 0, pretend = 0, frame = 0 + 1408 @ frame_needed = 0, uses_anonymous_args = 0 + 1409 @ link register save eliminated. + 713:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** HAL_StatusTypeDef status = HAL_OK; + 1410 .loc 1 713 1 is_stmt 0 view .LVU511 + 1411 0000 0300 movs r3, r0 + 714:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** + 1412 .loc 1 714 3 is_stmt 1 view .LVU512 + 1413 .LVL97: + 717:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** + 1414 .loc 1 717 3 view .LVU513 + 717:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** + 1415 .loc 1 717 3 view .LVU514 + 1416 0002 2022 movs r2, #32 + 1417 0004 825C ldrb r2, [r0, r2] + 1418 0006 012A cmp r2, #1 + 1419 0008 29D0 beq .L83 + 717:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** + 1420 .loc 1 717 3 discriminator 2 view .LVU515 + 1421 000a 2022 movs r2, #32 + 1422 000c 0120 movs r0, #1 + 1423 .LVL98: + 717:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** + 1424 .loc 1 717 3 is_stmt 0 discriminator 2 view .LVU516 + 1425 000e 9854 strb r0, [r3, r2] + 717:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** + 1426 .loc 1 717 3 is_stmt 1 discriminator 2 view .LVU517 + 719:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** { + 1427 .loc 1 719 3 view .LVU518 + 719:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** { + 1428 .loc 1 719 34 is_stmt 0 view .LVU519 + 1429 0010 0132 adds r2, r2, #1 + 1430 0012 9A5C ldrb r2, [r3, r2] + 1431 0014 D0B2 uxtb r0, r2 + 719:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** { + 1432 .loc 1 719 6 view .LVU520 + 1433 0016 012A cmp r2, #1 + 1434 0018 04D0 beq .L85 + 753:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** } + 1435 .loc 1 753 12 view .LVU521 + 1436 001a 0120 movs r0, #1 + 1437 .L76: + 1438 .LVL99: + 757:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** + 1439 .loc 1 757 3 is_stmt 1 view .LVU522 + 757:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** + 1440 .loc 1 757 3 view .LVU523 + 1441 001c 2022 movs r2, #32 + 1442 001e 0021 movs r1, #0 + 1443 .LVL100: + ARM GAS /tmp/ccCkUfTP.s page 50 + + + 757:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** + 1444 .loc 1 757 3 is_stmt 0 view .LVU524 + 1445 0020 9954 strb r1, [r3, r2] + 757:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** + 1446 .loc 1 757 3 is_stmt 1 view .LVU525 + 759:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** } + 1447 .loc 1 759 3 view .LVU526 + 1448 .LVL101: + 1449 .L75: + 760:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** + 1450 .loc 1 760 1 is_stmt 0 view .LVU527 + 1451 @ sp needed + 1452 0022 7047 bx lr + 1453 .LVL102: + 1454 .L85: + 721:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** { + 1455 .loc 1 721 5 is_stmt 1 view .LVU528 + 1456 0024 0429 cmp r1, #4 + 1457 0026 F9D8 bhi .L76 + 1458 0028 8A00 lsls r2, r1, #2 + 1459 002a 0E48 ldr r0, .L86 + 1460 002c 8258 ldr r2, [r0, r2] + 1461 002e 9746 mov pc, r2 + 1462 .section .rodata.HAL_DMA_UnRegisterCallback,"a",%progbits + 1463 .align 2 + 1464 .L78: + 1465 0000 30000000 .word .L82 + 1466 0004 38000000 .word .L81 + 1467 0008 40000000 .word .L80 + 1468 000c 48000000 .word .L79 + 1469 0010 50000000 .word .L77 + 1470 .section .text.HAL_DMA_UnRegisterCallback + 1471 .L82: + 724:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** break; + 1472 .loc 1 724 9 view .LVU529 + 724:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** break; + 1473 .loc 1 724 32 is_stmt 0 view .LVU530 + 1474 0030 0022 movs r2, #0 + 1475 0032 9A62 str r2, [r3, #40] + 725:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** + 1476 .loc 1 725 9 is_stmt 1 view .LVU531 + 714:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** + 1477 .loc 1 714 21 is_stmt 0 view .LVU532 + 1478 0034 0800 movs r0, r1 + 725:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** + 1479 .loc 1 725 9 view .LVU533 + 1480 0036 F1E7 b .L76 + 1481 .L81: + 728:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** break; + 1482 .loc 1 728 9 is_stmt 1 view .LVU534 + 728:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** break; + 1483 .loc 1 728 36 is_stmt 0 view .LVU535 + 1484 0038 0022 movs r2, #0 + 1485 003a DA62 str r2, [r3, #44] + 729:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** + 1486 .loc 1 729 9 is_stmt 1 view .LVU536 + 714:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** + ARM GAS /tmp/ccCkUfTP.s page 51 + + + 1487 .loc 1 714 21 is_stmt 0 view .LVU537 + 1488 003c 0020 movs r0, #0 + 729:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** + 1489 .loc 1 729 9 view .LVU538 + 1490 003e EDE7 b .L76 + 1491 .L80: + 732:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** break; + 1492 .loc 1 732 9 is_stmt 1 view .LVU539 + 732:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** break; + 1493 .loc 1 732 33 is_stmt 0 view .LVU540 + 1494 0040 0022 movs r2, #0 + 1495 0042 1A63 str r2, [r3, #48] + 733:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** + 1496 .loc 1 733 9 is_stmt 1 view .LVU541 + 714:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** + 1497 .loc 1 714 21 is_stmt 0 view .LVU542 + 1498 0044 0020 movs r0, #0 + 733:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** + 1499 .loc 1 733 9 view .LVU543 + 1500 0046 E9E7 b .L76 + 1501 .L79: + 736:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** break; + 1502 .loc 1 736 9 is_stmt 1 view .LVU544 + 736:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** break; + 1503 .loc 1 736 33 is_stmt 0 view .LVU545 + 1504 0048 0022 movs r2, #0 + 1505 004a 5A63 str r2, [r3, #52] + 737:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** + 1506 .loc 1 737 9 is_stmt 1 view .LVU546 + 714:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** + 1507 .loc 1 714 21 is_stmt 0 view .LVU547 + 1508 004c 0020 movs r0, #0 + 737:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** + 1509 .loc 1 737 9 view .LVU548 + 1510 004e E5E7 b .L76 + 1511 .L77: + 740:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** hdma->XferHalfCpltCallback = NULL; + 1512 .loc 1 740 9 is_stmt 1 view .LVU549 + 740:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** hdma->XferHalfCpltCallback = NULL; + 1513 .loc 1 740 32 is_stmt 0 view .LVU550 + 1514 0050 0022 movs r2, #0 + 1515 0052 9A62 str r2, [r3, #40] + 741:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** hdma->XferErrorCallback = NULL; + 1516 .loc 1 741 9 is_stmt 1 view .LVU551 + 741:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** hdma->XferErrorCallback = NULL; + 1517 .loc 1 741 36 is_stmt 0 view .LVU552 + 1518 0054 DA62 str r2, [r3, #44] + 742:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** hdma->XferAbortCallback = NULL; + 1519 .loc 1 742 9 is_stmt 1 view .LVU553 + 742:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** hdma->XferAbortCallback = NULL; + 1520 .loc 1 742 33 is_stmt 0 view .LVU554 + 1521 0056 1A63 str r2, [r3, #48] + 743:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** break; + 1522 .loc 1 743 9 is_stmt 1 view .LVU555 + 743:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** break; + 1523 .loc 1 743 33 is_stmt 0 view .LVU556 + 1524 0058 5A63 str r2, [r3, #52] + ARM GAS /tmp/ccCkUfTP.s page 52 + + + 744:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** + 1525 .loc 1 744 9 is_stmt 1 view .LVU557 + 714:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** + 1526 .loc 1 714 21 is_stmt 0 view .LVU558 + 1527 005a 0020 movs r0, #0 + 744:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** + 1528 .loc 1 744 9 view .LVU559 + 1529 005c DEE7 b .L76 + 1530 .LVL103: + 1531 .L83: + 717:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** + 1532 .loc 1 717 3 discriminator 1 view .LVU560 + 1533 005e 0220 movs r0, #2 + 1534 .LVL104: + 717:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** + 1535 .loc 1 717 3 discriminator 1 view .LVU561 + 1536 0060 DFE7 b .L75 + 1537 .L87: + 1538 0062 C046 .align 2 + 1539 .L86: + 1540 0064 00000000 .word .L78 + 1541 .cfi_endproc + 1542 .LFE49: + 1544 .section .text.HAL_DMA_GetState,"ax",%progbits + 1545 .align 1 + 1546 .global HAL_DMA_GetState + 1547 .syntax unified + 1548 .code 16 + 1549 .thumb_func + 1551 HAL_DMA_GetState: + 1552 .LVL105: + 1553 .LFB50: + 789:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** return hdma->State; + 1554 .loc 1 789 1 is_stmt 1 view -0 + 1555 .cfi_startproc + 1556 @ args = 0, pretend = 0, frame = 0 + 1557 @ frame_needed = 0, uses_anonymous_args = 0 + 1558 @ link register save eliminated. + 790:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** } + 1559 .loc 1 790 3 view .LVU563 + 790:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** } + 1560 .loc 1 790 14 is_stmt 0 view .LVU564 + 1561 0000 2123 movs r3, #33 + 1562 0002 C05C ldrb r0, [r0, r3] + 1563 .LVL106: + 790:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** } + 1564 .loc 1 790 14 view .LVU565 + 1565 0004 C0B2 uxtb r0, r0 + 791:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** + 1566 .loc 1 791 1 view .LVU566 + 1567 @ sp needed + 1568 0006 7047 bx lr + 1569 .cfi_endproc + 1570 .LFE50: + 1572 .section .text.HAL_DMA_GetError,"ax",%progbits + 1573 .align 1 + 1574 .global HAL_DMA_GetError + ARM GAS /tmp/ccCkUfTP.s page 53 + + + 1575 .syntax unified + 1576 .code 16 + 1577 .thumb_func + 1579 HAL_DMA_GetError: + 1580 .LVL107: + 1581 .LFB51: + 800:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** return hdma->ErrorCode; + 1582 .loc 1 800 1 is_stmt 1 view -0 + 1583 .cfi_startproc + 1584 @ args = 0, pretend = 0, frame = 0 + 1585 @ frame_needed = 0, uses_anonymous_args = 0 + 1586 @ link register save eliminated. + 801:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** } + 1587 .loc 1 801 3 view .LVU568 + 801:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** } + 1588 .loc 1 801 14 is_stmt 0 view .LVU569 + 1589 0000 806B ldr r0, [r0, #56] + 1590 .LVL108: + 802:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** + 1591 .loc 1 802 1 view .LVU570 + 1592 @ sp needed + 1593 0002 7047 bx lr + 1594 .cfi_endproc + 1595 .LFE51: + 1597 .text + 1598 .Letext0: + 1599 .file 2 "/home/chiangni/.config/VSCodium/User/globalStorage/bmd.stm32-for-vscode/@xpack-dev-tools/ + 1600 .file 3 "/home/chiangni/.config/VSCodium/User/globalStorage/bmd.stm32-for-vscode/@xpack-dev-tools/ + 1601 .file 4 "Drivers/CMSIS/Device/ST/STM32F0xx/Include/stm32f042x6.h" + 1602 .file 5 "Drivers/CMSIS/Device/ST/STM32F0xx/Include/stm32f0xx.h" + 1603 .file 6 "Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_def.h" + 1604 .file 7 "Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_dma.h" + 1605 .file 8 "Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal.h" + ARM GAS /tmp/ccCkUfTP.s page 54 + + +DEFINED SYMBOLS + *ABS*:00000000 stm32f0xx_hal_dma.c + /tmp/ccCkUfTP.s:19 .text.DMA_SetConfig:00000000 $t + /tmp/ccCkUfTP.s:24 .text.DMA_SetConfig:00000000 DMA_SetConfig + /tmp/ccCkUfTP.s:94 .text.DMA_CalcBaseAndBitshift:00000000 $t + /tmp/ccCkUfTP.s:99 .text.DMA_CalcBaseAndBitshift:00000000 DMA_CalcBaseAndBitshift + /tmp/ccCkUfTP.s:140 .text.DMA_CalcBaseAndBitshift:0000001c $d + /tmp/ccCkUfTP.s:146 .text.HAL_DMA_Init:00000000 $t + /tmp/ccCkUfTP.s:152 .text.HAL_DMA_Init:00000000 HAL_DMA_Init + /tmp/ccCkUfTP.s:266 .text.HAL_DMA_Init:0000004c $d + /tmp/ccCkUfTP.s:271 .text.HAL_DMA_DeInit:00000000 $t + /tmp/ccCkUfTP.s:277 .text.HAL_DMA_DeInit:00000000 HAL_DMA_DeInit + /tmp/ccCkUfTP.s:382 .text.HAL_DMA_Start:00000000 $t + /tmp/ccCkUfTP.s:388 .text.HAL_DMA_Start:00000000 HAL_DMA_Start + /tmp/ccCkUfTP.s:491 .text.HAL_DMA_Start_IT:00000000 $t + /tmp/ccCkUfTP.s:497 .text.HAL_DMA_Start_IT:00000000 HAL_DMA_Start_IT + /tmp/ccCkUfTP.s:637 .text.HAL_DMA_Abort:00000000 $t + /tmp/ccCkUfTP.s:643 .text.HAL_DMA_Abort:00000000 HAL_DMA_Abort + /tmp/ccCkUfTP.s:730 .text.HAL_DMA_Abort_IT:00000000 $t + /tmp/ccCkUfTP.s:736 .text.HAL_DMA_Abort_IT:00000000 HAL_DMA_Abort_IT + /tmp/ccCkUfTP.s:834 .text.HAL_DMA_PollForTransfer:00000000 $t + /tmp/ccCkUfTP.s:840 .text.HAL_DMA_PollForTransfer:00000000 HAL_DMA_PollForTransfer + /tmp/ccCkUfTP.s:1074 .text.HAL_DMA_IRQHandler:00000000 $t + /tmp/ccCkUfTP.s:1080 .text.HAL_DMA_IRQHandler:00000000 HAL_DMA_IRQHandler + /tmp/ccCkUfTP.s:1278 .text.HAL_DMA_RegisterCallback:00000000 $t + /tmp/ccCkUfTP.s:1284 .text.HAL_DMA_RegisterCallback:00000000 HAL_DMA_RegisterCallback + /tmp/ccCkUfTP.s:1396 .text.HAL_DMA_UnRegisterCallback:00000000 $t + /tmp/ccCkUfTP.s:1402 .text.HAL_DMA_UnRegisterCallback:00000000 HAL_DMA_UnRegisterCallback + /tmp/ccCkUfTP.s:1463 .rodata.HAL_DMA_UnRegisterCallback:00000000 $d + /tmp/ccCkUfTP.s:1540 .text.HAL_DMA_UnRegisterCallback:00000064 $d + /tmp/ccCkUfTP.s:1545 .text.HAL_DMA_GetState:00000000 $t + /tmp/ccCkUfTP.s:1551 .text.HAL_DMA_GetState:00000000 HAL_DMA_GetState + /tmp/ccCkUfTP.s:1573 .text.HAL_DMA_GetError:00000000 $t + /tmp/ccCkUfTP.s:1579 .text.HAL_DMA_GetError:00000000 HAL_DMA_GetError + +UNDEFINED SYMBOLS +__aeabi_uidiv +HAL_GetTick diff --git a/Software/build/stm32f0xx_hal_dma.o b/Software/build/stm32f0xx_hal_dma.o new file mode 100644 index 0000000..ff19491 Binary files /dev/null and b/Software/build/stm32f0xx_hal_dma.o differ diff --git a/Software/build/stm32f0xx_hal_exti.d b/Software/build/stm32f0xx_hal_exti.d new file mode 100644 index 0000000..09a0cc3 --- /dev/null +++ b/Software/build/stm32f0xx_hal_exti.d @@ -0,0 +1,60 @@ +build/stm32f0xx_hal_exti.o: \ + Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_exti.c \ + Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal.h \ + Core/Inc/stm32f0xx_hal_conf.h \ + Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_rcc.h \ + Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_def.h \ + Drivers/CMSIS/Device/ST/STM32F0xx/Include/stm32f0xx.h \ + Drivers/CMSIS/Device/ST/STM32F0xx/Include/stm32f042x6.h \ + Drivers/CMSIS/Include/core_cm0.h Drivers/CMSIS/Include/cmsis_version.h \ + Drivers/CMSIS/Include/cmsis_compiler.h Drivers/CMSIS/Include/cmsis_gcc.h \ + Drivers/CMSIS/Device/ST/STM32F0xx/Include/system_stm32f0xx.h \ + Drivers/STM32F0xx_HAL_Driver/Inc/Legacy/stm32_hal_legacy.h \ + Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_rcc_ex.h \ + Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_gpio.h \ + Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_gpio_ex.h \ + Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_exti.h \ + Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_dma.h \ + Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_dma_ex.h \ + Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_cortex.h \ + Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_adc.h \ + Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_adc_ex.h \ + Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_can.h \ + Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_flash.h \ + Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_flash_ex.h \ + Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_i2c.h \ + Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_i2c_ex.h \ + Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_pwr.h \ + Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_pwr_ex.h \ + Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_tim.h \ + Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_tim_ex.h +Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal.h: +Core/Inc/stm32f0xx_hal_conf.h: +Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_rcc.h: +Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_def.h: +Drivers/CMSIS/Device/ST/STM32F0xx/Include/stm32f0xx.h: +Drivers/CMSIS/Device/ST/STM32F0xx/Include/stm32f042x6.h: +Drivers/CMSIS/Include/core_cm0.h: +Drivers/CMSIS/Include/cmsis_version.h: +Drivers/CMSIS/Include/cmsis_compiler.h: +Drivers/CMSIS/Include/cmsis_gcc.h: +Drivers/CMSIS/Device/ST/STM32F0xx/Include/system_stm32f0xx.h: +Drivers/STM32F0xx_HAL_Driver/Inc/Legacy/stm32_hal_legacy.h: +Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_rcc_ex.h: +Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_gpio.h: +Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_gpio_ex.h: +Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_exti.h: +Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_dma.h: +Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_dma_ex.h: +Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_cortex.h: +Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_adc.h: +Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_adc_ex.h: +Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_can.h: +Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_flash.h: +Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_flash_ex.h: +Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_i2c.h: +Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_i2c_ex.h: +Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_pwr.h: +Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_pwr_ex.h: +Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_tim.h: +Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_tim_ex.h: diff --git a/Software/build/stm32f0xx_hal_exti.lst b/Software/build/stm32f0xx_hal_exti.lst new file mode 100644 index 0000000..67908c5 --- /dev/null +++ b/Software/build/stm32f0xx_hal_exti.lst @@ -0,0 +1,1584 @@ +ARM GAS /tmp/ccFacv4Y.s page 1 + + + 1 .cpu cortex-m0 + 2 .arch armv6s-m + 3 .fpu softvfp + 4 .eabi_attribute 20, 1 + 5 .eabi_attribute 21, 1 + 6 .eabi_attribute 23, 3 + 7 .eabi_attribute 24, 1 + 8 .eabi_attribute 25, 1 + 9 .eabi_attribute 26, 1 + 10 .eabi_attribute 30, 1 + 11 .eabi_attribute 34, 0 + 12 .eabi_attribute 18, 4 + 13 .file "stm32f0xx_hal_exti.c" + 14 .text + 15 .Ltext0: + 16 .cfi_sections .debug_frame + 17 .file 1 "Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_exti.c" + 18 .section .text.HAL_EXTI_SetConfigLine,"ax",%progbits + 19 .align 1 + 20 .global HAL_EXTI_SetConfigLine + 21 .syntax unified + 22 .code 16 + 23 .thumb_func + 25 HAL_EXTI_SetConfigLine: + 26 .LVL0: + 27 .LFB40: + 1:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_exti.c **** /** + 2:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_exti.c **** ****************************************************************************** + 3:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_exti.c **** * @file stm32f0xx_hal_exti.c + 4:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_exti.c **** * @author MCD Application Team + 5:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_exti.c **** * @brief EXTI HAL module driver. + 6:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_exti.c **** * This file provides firmware functions to manage the following + 7:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_exti.c **** * functionalities of the Extended Interrupts and events controller (EXTI) peripheral: + 8:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_exti.c **** * + Initialization and de-initialization functions + 9:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_exti.c **** * + IO operation functions + 10:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_exti.c **** * + 11:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_exti.c **** ****************************************************************************** + 12:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_exti.c **** * @attention + 13:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_exti.c **** * + 14:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_exti.c **** * Copyright (c) 2019 STMicroelectronics. + 15:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_exti.c **** * All rights reserved. + 16:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_exti.c **** * + 17:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_exti.c **** * This software is licensed under terms that can be found in the LICENSE file + 18:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_exti.c **** * in the root directory of this software component. + 19:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_exti.c **** * If no LICENSE file comes with this software, it is provided AS-IS. + 20:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_exti.c **** * + 21:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_exti.c **** ****************************************************************************** + 22:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_exti.c **** @verbatim + 23:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_exti.c **** ============================================================================== + 24:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_exti.c **** ##### EXTI Peripheral features ##### + 25:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_exti.c **** ============================================================================== + 26:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_exti.c **** [..] + 27:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_exti.c **** (+) Each Exti line can be configured within this driver. + 28:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_exti.c **** + 29:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_exti.c **** (+) Exti line can be configured in 3 different modes + 30:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_exti.c **** (++) Interrupt + 31:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_exti.c **** (++) Event + ARM GAS /tmp/ccFacv4Y.s page 2 + + + 32:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_exti.c **** (++) Both of them + 33:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_exti.c **** + 34:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_exti.c **** (+) Configurable Exti lines can be configured with 3 different triggers + 35:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_exti.c **** (++) Rising + 36:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_exti.c **** (++) Falling + 37:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_exti.c **** (++) Both of them + 38:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_exti.c **** + 39:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_exti.c **** (+) When set in interrupt mode, configurable Exti lines have two different + 40:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_exti.c **** interrupts pending registers which allow to distinguish which transition + 41:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_exti.c **** occurs: + 42:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_exti.c **** (++) Rising edge pending interrupt + 43:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_exti.c **** (++) Falling + 44:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_exti.c **** + 45:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_exti.c **** (+) Exti lines 0 to 15 are linked to gpio pin number 0 to 15. Gpio port can + 46:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_exti.c **** be selected through multiplexer. + 47:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_exti.c **** + 48:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_exti.c **** ##### How to use this driver ##### + 49:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_exti.c **** ============================================================================== + 50:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_exti.c **** [..] + 51:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_exti.c **** + 52:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_exti.c **** (#) Configure the EXTI line using HAL_EXTI_SetConfigLine(). + 53:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_exti.c **** (++) Choose the interrupt line number by setting "Line" member from + 54:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_exti.c **** EXTI_ConfigTypeDef structure. + 55:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_exti.c **** (++) Configure the interrupt and/or event mode using "Mode" member from + 56:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_exti.c **** EXTI_ConfigTypeDef structure. + 57:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_exti.c **** (++) For configurable lines, configure rising and/or falling trigger + 58:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_exti.c **** "Trigger" member from EXTI_ConfigTypeDef structure. + 59:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_exti.c **** (++) For Exti lines linked to gpio, choose gpio port using "GPIOSel" + 60:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_exti.c **** member from GPIO_InitTypeDef structure. + 61:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_exti.c **** + 62:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_exti.c **** (#) Get current Exti configuration of a dedicated line using + 63:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_exti.c **** HAL_EXTI_GetConfigLine(). + 64:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_exti.c **** (++) Provide exiting handle as parameter. + 65:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_exti.c **** (++) Provide pointer on EXTI_ConfigTypeDef structure as second parameter. + 66:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_exti.c **** + 67:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_exti.c **** (#) Clear Exti configuration of a dedicated line using HAL_EXTI_GetConfigLine(). + 68:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_exti.c **** (++) Provide exiting handle as parameter. + 69:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_exti.c **** + 70:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_exti.c **** (#) Register callback to treat Exti interrupts using HAL_EXTI_RegisterCallback(). + 71:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_exti.c **** (++) Provide exiting handle as first parameter. + 72:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_exti.c **** (++) Provide which callback will be registered using one value from + 73:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_exti.c **** EXTI_CallbackIDTypeDef. + 74:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_exti.c **** (++) Provide callback function pointer. + 75:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_exti.c **** + 76:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_exti.c **** (#) Get interrupt pending bit using HAL_EXTI_GetPending(). + 77:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_exti.c **** + 78:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_exti.c **** (#) Clear interrupt pending bit using HAL_EXTI_GetPending(). + 79:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_exti.c **** + 80:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_exti.c **** (#) Generate software interrupt using HAL_EXTI_GenerateSWI(). + 81:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_exti.c **** + 82:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_exti.c **** @endverbatim + 83:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_exti.c **** */ + 84:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_exti.c **** + 85:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_exti.c **** /* Includes ------------------------------------------------------------------*/ + 86:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_exti.c **** #include "stm32f0xx_hal.h" + 87:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_exti.c **** + 88:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_exti.c **** /** @addtogroup STM32F0xx_HAL_Driver + ARM GAS /tmp/ccFacv4Y.s page 3 + + + 89:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_exti.c **** * @{ + 90:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_exti.c **** */ + 91:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_exti.c **** + 92:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_exti.c **** /** @addtogroup EXTI + 93:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_exti.c **** * @{ + 94:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_exti.c **** */ + 95:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_exti.c **** /** MISRA C:2012 deviation rule has been granted for following rule: + 96:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_exti.c **** * Rule-18.1_b - Medium: Array `EXTICR' 1st subscript interval [0,7] may be out + 97:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_exti.c **** * of bounds [0,3] in following API : + 98:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_exti.c **** * HAL_EXTI_SetConfigLine + 99:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_exti.c **** * HAL_EXTI_GetConfigLine + 100:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_exti.c **** * HAL_EXTI_ClearConfigLine + 101:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_exti.c **** */ + 102:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_exti.c **** + 103:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_exti.c **** #ifdef HAL_EXTI_MODULE_ENABLED + 104:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_exti.c **** + 105:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_exti.c **** /* Private typedef -----------------------------------------------------------*/ + 106:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_exti.c **** /* Private defines -----------------------------------------------------------*/ + 107:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_exti.c **** /** @defgroup EXTI_Private_Constants EXTI Private Constants + 108:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_exti.c **** * @{ + 109:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_exti.c **** */ + 110:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_exti.c **** + 111:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_exti.c **** /** + 112:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_exti.c **** * @} + 113:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_exti.c **** */ + 114:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_exti.c **** + 115:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_exti.c **** /* Private macros ------------------------------------------------------------*/ + 116:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_exti.c **** /* Private variables ---------------------------------------------------------*/ + 117:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_exti.c **** /* Private function prototypes -----------------------------------------------*/ + 118:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_exti.c **** /* Exported functions --------------------------------------------------------*/ + 119:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_exti.c **** + 120:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_exti.c **** /** @addtogroup EXTI_Exported_Functions + 121:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_exti.c **** * @{ + 122:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_exti.c **** */ + 123:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_exti.c **** + 124:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_exti.c **** /** @addtogroup EXTI_Exported_Functions_Group1 + 125:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_exti.c **** * @brief Configuration functions + 126:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_exti.c **** * + 127:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_exti.c **** @verbatim + 128:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_exti.c **** =============================================================================== + 129:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_exti.c **** ##### Configuration functions ##### + 130:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_exti.c **** =============================================================================== + 131:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_exti.c **** + 132:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_exti.c **** @endverbatim + 133:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_exti.c **** * @{ + 134:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_exti.c **** */ + 135:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_exti.c **** + 136:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_exti.c **** /** + 137:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_exti.c **** * @brief Set configuration of a dedicated Exti line. + 138:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_exti.c **** * @param hexti Exti handle. + 139:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_exti.c **** * @param pExtiConfig Pointer on EXTI configuration to be set. + 140:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_exti.c **** * @retval HAL Status. + 141:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_exti.c **** */ + 142:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_exti.c **** HAL_StatusTypeDef HAL_EXTI_SetConfigLine(EXTI_HandleTypeDef *hexti, EXTI_ConfigTypeDef *pExtiConfig + 143:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_exti.c **** { + 28 .loc 1 143 1 view -0 + 29 .cfi_startproc + ARM GAS /tmp/ccFacv4Y.s page 4 + + + 30 @ args = 0, pretend = 0, frame = 0 + 31 @ frame_needed = 0, uses_anonymous_args = 0 + 32 .loc 1 143 1 is_stmt 0 view .LVU1 + 33 0000 70B5 push {r4, r5, r6, lr} + 34 .cfi_def_cfa_offset 16 + 35 .cfi_offset 4, -16 + 36 .cfi_offset 5, -12 + 37 .cfi_offset 6, -8 + 38 .cfi_offset 14, -4 + 144:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_exti.c **** uint32_t regval; + 39 .loc 1 144 3 is_stmt 1 view .LVU2 + 145:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_exti.c **** uint32_t linepos; + 40 .loc 1 145 3 view .LVU3 + 146:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_exti.c **** uint32_t maskline; + 41 .loc 1 146 3 view .LVU4 + 147:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_exti.c **** + 148:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_exti.c **** /* Check null pointer */ + 149:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_exti.c **** if ((hexti == NULL) || (pExtiConfig == NULL)) + 42 .loc 1 149 3 view .LVU5 + 43 .loc 1 149 6 is_stmt 0 view .LVU6 + 44 0002 0028 cmp r0, #0 + 45 0004 53D0 beq .L11 + 46 .loc 1 149 23 discriminator 1 view .LVU7 + 47 0006 0029 cmp r1, #0 + 48 0008 53D0 beq .L12 + 150:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_exti.c **** { + 151:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_exti.c **** return HAL_ERROR; + 152:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_exti.c **** } + 153:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_exti.c **** + 154:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_exti.c **** /* Check parameters */ + 155:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_exti.c **** assert_param(IS_EXTI_LINE(pExtiConfig->Line)); + 49 .loc 1 155 3 is_stmt 1 view .LVU8 + 156:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_exti.c **** assert_param(IS_EXTI_MODE(pExtiConfig->Mode)); + 50 .loc 1 156 3 view .LVU9 + 157:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_exti.c **** + 158:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_exti.c **** /* Assign line number to handle */ + 159:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_exti.c **** hexti->Line = pExtiConfig->Line; + 51 .loc 1 159 3 view .LVU10 + 52 .loc 1 159 28 is_stmt 0 view .LVU11 + 53 000a 0C68 ldr r4, [r1] + 54 .loc 1 159 15 view .LVU12 + 55 000c 0460 str r4, [r0] + 160:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_exti.c **** + 161:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_exti.c **** /* Compute line mask */ + 162:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_exti.c **** linepos = (pExtiConfig->Line & EXTI_PIN_MASK); + 56 .loc 1 162 3 is_stmt 1 view .LVU13 + 57 .loc 1 162 11 is_stmt 0 view .LVU14 + 58 000e 1F23 movs r3, #31 + 59 0010 2340 ands r3, r4 + 60 .LVL1: + 163:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_exti.c **** maskline = (1uL << linepos); + 61 .loc 1 163 3 is_stmt 1 view .LVU15 + 62 .loc 1 163 12 is_stmt 0 view .LVU16 + 63 0012 0122 movs r2, #1 + 64 0014 9A40 lsls r2, r2, r3 + 65 .LVL2: + 164:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_exti.c **** + ARM GAS /tmp/ccFacv4Y.s page 5 + + + 165:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_exti.c **** /* Configure triggers for configurable lines */ + 166:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_exti.c **** if ((pExtiConfig->Line & EXTI_CONFIG) != 0x00u) + 66 .loc 1 166 3 is_stmt 1 view .LVU17 + 67 .loc 1 166 6 is_stmt 0 view .LVU18 + 68 0016 A001 lsls r0, r4, #6 + 69 0018 13D5 bpl .L3 + 70 .LVL3: + 167:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_exti.c **** { + 168:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_exti.c **** assert_param(IS_EXTI_TRIGGER(pExtiConfig->Trigger)); + 71 .loc 1 168 5 is_stmt 1 view .LVU19 + 169:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_exti.c **** + 170:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_exti.c **** /* Configure rising trigger */ + 171:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_exti.c **** /* Mask or set line */ + 172:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_exti.c **** if ((pExtiConfig->Trigger & EXTI_TRIGGER_RISING) != 0x00u) + 72 .loc 1 172 5 view .LVU20 + 73 .loc 1 172 21 is_stmt 0 view .LVU21 + 74 001a 8868 ldr r0, [r1, #8] + 75 .loc 1 172 8 view .LVU22 + 76 001c C007 lsls r0, r0, #31 + 77 001e 20D5 bpl .L4 + 173:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_exti.c **** { + 174:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_exti.c **** EXTI->RTSR |= maskline; + 78 .loc 1 174 7 is_stmt 1 view .LVU23 + 79 .loc 1 174 11 is_stmt 0 view .LVU24 + 80 0020 254D ldr r5, .L15 + 81 0022 A868 ldr r0, [r5, #8] + 82 .loc 1 174 18 view .LVU25 + 83 0024 1043 orrs r0, r2 + 84 0026 A860 str r0, [r5, #8] + 85 .L5: + 175:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_exti.c **** } + 176:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_exti.c **** else + 177:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_exti.c **** { + 178:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_exti.c **** EXTI->RTSR &= ~maskline; + 179:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_exti.c **** } + 180:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_exti.c **** + 181:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_exti.c **** /* Configure falling trigger */ + 182:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_exti.c **** /* Mask or set line */ + 183:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_exti.c **** if ((pExtiConfig->Trigger & EXTI_TRIGGER_FALLING) != 0x00u) + 86 .loc 1 183 5 is_stmt 1 view .LVU26 + 87 .loc 1 183 21 is_stmt 0 view .LVU27 + 88 0028 8868 ldr r0, [r1, #8] + 89 .loc 1 183 8 view .LVU28 + 90 002a 8007 lsls r0, r0, #30 + 91 002c 1ED5 bpl .L6 + 184:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_exti.c **** { + 185:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_exti.c **** EXTI->FTSR |= maskline; + 92 .loc 1 185 7 is_stmt 1 view .LVU29 + 93 .loc 1 185 11 is_stmt 0 view .LVU30 + 94 002e 224D ldr r5, .L15 + 95 0030 E868 ldr r0, [r5, #12] + 96 .loc 1 185 18 view .LVU31 + 97 0032 1043 orrs r0, r2 + 98 0034 E860 str r0, [r5, #12] + 99 .L7: + 186:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_exti.c **** } + 187:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_exti.c **** else + ARM GAS /tmp/ccFacv4Y.s page 6 + + + 188:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_exti.c **** { + 189:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_exti.c **** EXTI->FTSR &= ~maskline; + 190:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_exti.c **** } + 191:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_exti.c **** + 192:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_exti.c **** + 193:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_exti.c **** /* Configure gpio port selection in case of gpio exti line */ + 194:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_exti.c **** if ((pExtiConfig->Line & EXTI_GPIO) == EXTI_GPIO) + 100 .loc 1 194 5 is_stmt 1 view .LVU32 + 101 .loc 1 194 21 is_stmt 0 view .LVU33 + 102 0036 0868 ldr r0, [r1] + 103 .loc 1 194 28 view .LVU34 + 104 0038 C025 movs r5, #192 + 105 003a ED04 lsls r5, r5, #19 + 106 003c 2840 ands r0, r5 + 107 .loc 1 194 8 view .LVU35 + 108 003e A842 cmp r0, r5 + 109 0040 19D0 beq .L14 + 110 .LVL4: + 111 .L3: + 195:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_exti.c **** { + 196:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_exti.c **** assert_param(IS_EXTI_GPIO_PORT(pExtiConfig->GPIOSel)); + 197:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_exti.c **** assert_param(IS_EXTI_GPIO_PIN(linepos)); + 198:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_exti.c **** + 199:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_exti.c **** regval = SYSCFG->EXTICR[linepos >> 2u]; + 200:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_exti.c **** regval &= ~(SYSCFG_EXTICR1_EXTI0 << (SYSCFG_EXTICR1_EXTI1_Pos * (linepos & 0x03u))); + 201:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_exti.c **** regval |= (pExtiConfig->GPIOSel << (SYSCFG_EXTICR1_EXTI1_Pos * (linepos & 0x03u))); + 202:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_exti.c **** SYSCFG->EXTICR[linepos >> 2u] = regval; + 203:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_exti.c **** } + 204:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_exti.c **** } + 205:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_exti.c **** + 206:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_exti.c **** /* Configure interrupt mode : read current mode */ + 207:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_exti.c **** /* Mask or set line */ + 208:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_exti.c **** if ((pExtiConfig->Mode & EXTI_MODE_INTERRUPT) != 0x00u) + 112 .loc 1 208 3 is_stmt 1 view .LVU36 + 113 .loc 1 208 19 is_stmt 0 view .LVU37 + 114 0042 4B68 ldr r3, [r1, #4] + 115 .loc 1 208 6 view .LVU38 + 116 0044 DB07 lsls r3, r3, #31 + 117 0046 27D5 bpl .L8 + 209:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_exti.c **** { + 210:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_exti.c **** EXTI->IMR |= maskline; + 118 .loc 1 210 5 is_stmt 1 view .LVU39 + 119 .loc 1 210 9 is_stmt 0 view .LVU40 + 120 0048 1B48 ldr r0, .L15 + 121 004a 0368 ldr r3, [r0] + 122 .loc 1 210 15 view .LVU41 + 123 004c 1343 orrs r3, r2 + 124 004e 0360 str r3, [r0] + 125 .L9: + 211:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_exti.c **** } + 212:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_exti.c **** else + 213:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_exti.c **** { + 214:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_exti.c **** EXTI->IMR &= ~maskline; + 215:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_exti.c **** } + 216:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_exti.c **** + 217:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_exti.c **** /* Configure event mode : read current mode */ + 218:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_exti.c **** /* Mask or set line */ + ARM GAS /tmp/ccFacv4Y.s page 7 + + + 219:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_exti.c **** if ((pExtiConfig->Mode & EXTI_MODE_EVENT) != 0x00u) + 126 .loc 1 219 3 is_stmt 1 view .LVU42 + 127 .loc 1 219 19 is_stmt 0 view .LVU43 + 128 0050 4B68 ldr r3, [r1, #4] + 129 .loc 1 219 6 view .LVU44 + 130 0052 9B07 lsls r3, r3, #30 + 131 0054 25D5 bpl .L10 + 220:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_exti.c **** { + 221:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_exti.c **** EXTI->EMR |= maskline; + 132 .loc 1 221 5 is_stmt 1 view .LVU45 + 133 .loc 1 221 9 is_stmt 0 view .LVU46 + 134 0056 1849 ldr r1, .L15 + 135 .LVL5: + 136 .loc 1 221 9 view .LVU47 + 137 0058 4B68 ldr r3, [r1, #4] + 138 .loc 1 221 15 view .LVU48 + 139 005a 1343 orrs r3, r2 + 140 005c 4B60 str r3, [r1, #4] + 222:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_exti.c **** } + 223:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_exti.c **** else + 224:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_exti.c **** { + 225:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_exti.c **** EXTI->EMR &= ~maskline; + 226:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_exti.c **** } + 227:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_exti.c **** + 228:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_exti.c **** return HAL_OK; + 141 .loc 1 228 10 view .LVU49 + 142 005e 0020 movs r0, #0 + 143 .LVL6: + 144 .L2: + 229:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_exti.c **** } + 145 .loc 1 229 1 view .LVU50 + 146 @ sp needed + 147 0060 70BD pop {r4, r5, r6, pc} + 148 .LVL7: + 149 .L4: + 178:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_exti.c **** } + 150 .loc 1 178 7 is_stmt 1 view .LVU51 + 178:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_exti.c **** } + 151 .loc 1 178 11 is_stmt 0 view .LVU52 + 152 0062 154D ldr r5, .L15 + 153 0064 A868 ldr r0, [r5, #8] + 178:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_exti.c **** } + 154 .loc 1 178 18 view .LVU53 + 155 0066 9043 bics r0, r2 + 156 0068 A860 str r0, [r5, #8] + 157 006a DDE7 b .L5 + 158 .L6: + 189:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_exti.c **** } + 159 .loc 1 189 7 is_stmt 1 view .LVU54 + 189:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_exti.c **** } + 160 .loc 1 189 11 is_stmt 0 view .LVU55 + 161 006c 124D ldr r5, .L15 + 162 006e E868 ldr r0, [r5, #12] + 189:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_exti.c **** } + 163 .loc 1 189 18 view .LVU56 + 164 0070 9043 bics r0, r2 + 165 0072 E860 str r0, [r5, #12] + ARM GAS /tmp/ccFacv4Y.s page 8 + + + 166 0074 DFE7 b .L7 + 167 .L14: + 196:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_exti.c **** assert_param(IS_EXTI_GPIO_PIN(linepos)); + 168 .loc 1 196 7 is_stmt 1 view .LVU57 + 197:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_exti.c **** + 169 .loc 1 197 7 view .LVU58 + 199:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_exti.c **** regval &= ~(SYSCFG_EXTICR1_EXTI0 << (SYSCFG_EXTICR1_EXTI1_Pos * (linepos & 0x03u))); + 170 .loc 1 199 7 view .LVU59 + 199:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_exti.c **** regval &= ~(SYSCFG_EXTICR1_EXTI0 << (SYSCFG_EXTICR1_EXTI1_Pos * (linepos & 0x03u))); + 171 .loc 1 199 39 is_stmt 0 view .LVU60 + 172 0076 9B08 lsrs r3, r3, #2 + 173 .LVL8: + 199:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_exti.c **** regval &= ~(SYSCFG_EXTICR1_EXTI0 << (SYSCFG_EXTICR1_EXTI1_Pos * (linepos & 0x03u))); + 174 .loc 1 199 14 view .LVU61 + 175 0078 104D ldr r5, .L15+4 + 176 007a 0233 adds r3, r3, #2 + 177 007c 9B00 lsls r3, r3, #2 + 178 007e 5E59 ldr r6, [r3, r5] + 179 .LVL9: + 200:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_exti.c **** regval |= (pExtiConfig->GPIOSel << (SYSCFG_EXTICR1_EXTI1_Pos * (linepos & 0x03u))); + 180 .loc 1 200 7 is_stmt 1 view .LVU62 + 200:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_exti.c **** regval |= (pExtiConfig->GPIOSel << (SYSCFG_EXTICR1_EXTI1_Pos * (linepos & 0x03u))); + 181 .loc 1 200 80 is_stmt 0 view .LVU63 + 182 0080 0320 movs r0, #3 + 183 0082 2040 ands r0, r4 + 200:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_exti.c **** regval |= (pExtiConfig->GPIOSel << (SYSCFG_EXTICR1_EXTI1_Pos * (linepos & 0x03u))); + 184 .loc 1 200 69 view .LVU64 + 185 0084 8000 lsls r0, r0, #2 + 200:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_exti.c **** regval |= (pExtiConfig->GPIOSel << (SYSCFG_EXTICR1_EXTI1_Pos * (linepos & 0x03u))); + 186 .loc 1 200 40 view .LVU65 + 187 0086 0F24 movs r4, #15 + 188 .LVL10: + 200:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_exti.c **** regval |= (pExtiConfig->GPIOSel << (SYSCFG_EXTICR1_EXTI1_Pos * (linepos & 0x03u))); + 189 .loc 1 200 40 view .LVU66 + 190 0088 8440 lsls r4, r4, r0 + 200:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_exti.c **** regval |= (pExtiConfig->GPIOSel << (SYSCFG_EXTICR1_EXTI1_Pos * (linepos & 0x03u))); + 191 .loc 1 200 14 view .LVU67 + 192 008a A643 bics r6, r4 + 193 .LVL11: + 201:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_exti.c **** SYSCFG->EXTICR[linepos >> 2u] = regval; + 194 .loc 1 201 7 is_stmt 1 view .LVU68 + 201:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_exti.c **** SYSCFG->EXTICR[linepos >> 2u] = regval; + 195 .loc 1 201 29 is_stmt 0 view .LVU69 + 196 008c CC68 ldr r4, [r1, #12] + 201:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_exti.c **** SYSCFG->EXTICR[linepos >> 2u] = regval; + 197 .loc 1 201 39 view .LVU70 + 198 008e 8440 lsls r4, r4, r0 + 199 0090 2000 movs r0, r4 + 201:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_exti.c **** SYSCFG->EXTICR[linepos >> 2u] = regval; + 200 .loc 1 201 14 view .LVU71 + 201 0092 3043 orrs r0, r6 + 202 .LVL12: + 202:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_exti.c **** } + 203 .loc 1 202 7 is_stmt 1 view .LVU72 + 202:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_exti.c **** } + 204 .loc 1 202 37 is_stmt 0 view .LVU73 + 205 0094 5851 str r0, [r3, r5] + ARM GAS /tmp/ccFacv4Y.s page 9 + + + 206 0096 D4E7 b .L3 + 207 .LVL13: + 208 .L8: + 214:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_exti.c **** } + 209 .loc 1 214 5 is_stmt 1 view .LVU74 + 214:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_exti.c **** } + 210 .loc 1 214 9 is_stmt 0 view .LVU75 + 211 0098 0748 ldr r0, .L15 + 212 009a 0368 ldr r3, [r0] + 214:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_exti.c **** } + 213 .loc 1 214 15 view .LVU76 + 214 009c 9343 bics r3, r2 + 215 009e 0360 str r3, [r0] + 216 00a0 D6E7 b .L9 + 217 .L10: + 225:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_exti.c **** } + 218 .loc 1 225 5 is_stmt 1 view .LVU77 + 225:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_exti.c **** } + 219 .loc 1 225 9 is_stmt 0 view .LVU78 + 220 00a2 0549 ldr r1, .L15 + 221 .LVL14: + 225:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_exti.c **** } + 222 .loc 1 225 9 view .LVU79 + 223 00a4 4B68 ldr r3, [r1, #4] + 225:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_exti.c **** } + 224 .loc 1 225 15 view .LVU80 + 225 00a6 9343 bics r3, r2 + 226 00a8 4B60 str r3, [r1, #4] + 228:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_exti.c **** } + 227 .loc 1 228 10 view .LVU81 + 228 00aa 0020 movs r0, #0 + 229 00ac D8E7 b .L2 + 230 .LVL15: + 231 .L11: + 151:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_exti.c **** } + 232 .loc 1 151 12 view .LVU82 + 233 00ae 0120 movs r0, #1 + 234 .LVL16: + 151:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_exti.c **** } + 235 .loc 1 151 12 view .LVU83 + 236 00b0 D6E7 b .L2 + 237 .LVL17: + 238 .L12: + 151:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_exti.c **** } + 239 .loc 1 151 12 view .LVU84 + 240 00b2 0120 movs r0, #1 + 241 .LVL18: + 151:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_exti.c **** } + 242 .loc 1 151 12 view .LVU85 + 243 00b4 D4E7 b .L2 + 244 .L16: + 245 00b6 C046 .align 2 + 246 .L15: + 247 00b8 00040140 .word 1073808384 + 248 00bc 00000140 .word 1073807360 + 249 .cfi_endproc + 250 .LFE40: + ARM GAS /tmp/ccFacv4Y.s page 10 + + + 252 .section .text.HAL_EXTI_GetConfigLine,"ax",%progbits + 253 .align 1 + 254 .global HAL_EXTI_GetConfigLine + 255 .syntax unified + 256 .code 16 + 257 .thumb_func + 259 HAL_EXTI_GetConfigLine: + 260 .LVL19: + 261 .LFB41: + 230:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_exti.c **** + 231:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_exti.c **** /** + 232:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_exti.c **** * @brief Get configuration of a dedicated Exti line. + 233:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_exti.c **** * @param hexti Exti handle. + 234:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_exti.c **** * @param pExtiConfig Pointer on structure to store Exti configuration. + 235:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_exti.c **** * @retval HAL Status. + 236:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_exti.c **** */ + 237:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_exti.c **** HAL_StatusTypeDef HAL_EXTI_GetConfigLine(EXTI_HandleTypeDef *hexti, EXTI_ConfigTypeDef *pExtiConfig + 238:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_exti.c **** { + 262 .loc 1 238 1 is_stmt 1 view -0 + 263 .cfi_startproc + 264 @ args = 0, pretend = 0, frame = 0 + 265 @ frame_needed = 0, uses_anonymous_args = 0 + 266 .loc 1 238 1 is_stmt 0 view .LVU87 + 267 0000 30B5 push {r4, r5, lr} + 268 .cfi_def_cfa_offset 12 + 269 .cfi_offset 4, -12 + 270 .cfi_offset 5, -8 + 271 .cfi_offset 14, -4 + 239:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_exti.c **** uint32_t regval; + 272 .loc 1 239 3 is_stmt 1 view .LVU88 + 240:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_exti.c **** uint32_t linepos; + 273 .loc 1 240 3 view .LVU89 + 241:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_exti.c **** uint32_t maskline; + 274 .loc 1 241 3 view .LVU90 + 242:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_exti.c **** + 243:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_exti.c **** /* Check null pointer */ + 244:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_exti.c **** if ((hexti == NULL) || (pExtiConfig == NULL)) + 275 .loc 1 244 3 view .LVU91 + 276 .loc 1 244 6 is_stmt 0 view .LVU92 + 277 0002 0028 cmp r0, #0 + 278 0004 41D0 beq .L24 + 279 .loc 1 244 23 discriminator 1 view .LVU93 + 280 0006 0029 cmp r1, #0 + 281 0008 41D0 beq .L25 + 245:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_exti.c **** { + 246:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_exti.c **** return HAL_ERROR; + 247:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_exti.c **** } + 248:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_exti.c **** + 249:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_exti.c **** /* Check the parameter */ + 250:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_exti.c **** assert_param(IS_EXTI_LINE(hexti->Line)); + 282 .loc 1 250 3 is_stmt 1 view .LVU94 + 251:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_exti.c **** + 252:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_exti.c **** /* Store handle line number to configuration structure */ + 253:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_exti.c **** pExtiConfig->Line = hexti->Line; + 283 .loc 1 253 3 view .LVU95 + 284 .loc 1 253 28 is_stmt 0 view .LVU96 + 285 000a 0268 ldr r2, [r0] + ARM GAS /tmp/ccFacv4Y.s page 11 + + + 286 .loc 1 253 21 view .LVU97 + 287 000c 0A60 str r2, [r1] + 254:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_exti.c **** + 255:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_exti.c **** /* Compute line mask */ + 256:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_exti.c **** linepos = (pExtiConfig->Line & EXTI_PIN_MASK); + 288 .loc 1 256 3 is_stmt 1 view .LVU98 + 289 .loc 1 256 11 is_stmt 0 view .LVU99 + 290 000e 1F24 movs r4, #31 + 291 0010 1440 ands r4, r2 + 292 .LVL20: + 257:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_exti.c **** maskline = (1uL << linepos); + 293 .loc 1 257 3 is_stmt 1 view .LVU100 + 294 .loc 1 257 12 is_stmt 0 view .LVU101 + 295 0012 0123 movs r3, #1 + 296 0014 A340 lsls r3, r3, r4 + 297 .LVL21: + 258:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_exti.c **** + 259:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_exti.c **** /* 1] Get core mode : interrupt */ + 260:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_exti.c **** + 261:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_exti.c **** /* Check if selected line is enable */ + 262:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_exti.c **** if ((EXTI->IMR & maskline) != 0x00u) + 298 .loc 1 262 3 is_stmt 1 view .LVU102 + 299 .loc 1 262 12 is_stmt 0 view .LVU103 + 300 0016 2048 ldr r0, .L29 + 301 .LVL22: + 302 .loc 1 262 12 view .LVU104 + 303 0018 0068 ldr r0, [r0] + 304 .loc 1 262 6 view .LVU105 + 305 001a 0342 tst r3, r0 + 306 001c 24D0 beq .L19 + 263:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_exti.c **** { + 264:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_exti.c **** pExtiConfig->Mode = EXTI_MODE_INTERRUPT; + 307 .loc 1 264 5 is_stmt 1 view .LVU106 + 308 .loc 1 264 23 is_stmt 0 view .LVU107 + 309 001e 0120 movs r0, #1 + 310 0020 4860 str r0, [r1, #4] + 311 .L20: + 265:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_exti.c **** } + 266:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_exti.c **** else + 267:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_exti.c **** { + 268:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_exti.c **** pExtiConfig->Mode = EXTI_MODE_NONE; + 269:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_exti.c **** } + 270:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_exti.c **** + 271:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_exti.c **** /* Get event mode */ + 272:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_exti.c **** /* Check if selected line is enable */ + 273:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_exti.c **** if ((EXTI->EMR & maskline) != 0x00u) + 312 .loc 1 273 3 is_stmt 1 view .LVU108 + 313 .loc 1 273 12 is_stmt 0 view .LVU109 + 314 0022 1D48 ldr r0, .L29 + 315 0024 4068 ldr r0, [r0, #4] + 316 .loc 1 273 6 view .LVU110 + 317 0026 0342 tst r3, r0 + 318 0028 03D0 beq .L21 + 274:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_exti.c **** { + 275:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_exti.c **** pExtiConfig->Mode |= EXTI_MODE_EVENT; + 319 .loc 1 275 5 is_stmt 1 view .LVU111 + 320 .loc 1 275 16 is_stmt 0 view .LVU112 + ARM GAS /tmp/ccFacv4Y.s page 12 + + + 321 002a 4868 ldr r0, [r1, #4] + 322 .loc 1 275 23 view .LVU113 + 323 002c 0225 movs r5, #2 + 324 002e 2843 orrs r0, r5 + 325 0030 4860 str r0, [r1, #4] + 326 .L21: + 276:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_exti.c **** } + 277:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_exti.c **** + 278:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_exti.c **** /* Get default Trigger and GPIOSel configuration */ + 279:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_exti.c **** pExtiConfig->Trigger = EXTI_TRIGGER_NONE; + 327 .loc 1 279 3 is_stmt 1 view .LVU114 + 328 .loc 1 279 24 is_stmt 0 view .LVU115 + 329 0032 0020 movs r0, #0 + 330 0034 8860 str r0, [r1, #8] + 280:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_exti.c **** pExtiConfig->GPIOSel = 0x00u; + 331 .loc 1 280 3 is_stmt 1 view .LVU116 + 332 .loc 1 280 24 is_stmt 0 view .LVU117 + 333 0036 C860 str r0, [r1, #12] + 281:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_exti.c **** + 282:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_exti.c **** /* 2] Get trigger for configurable lines : rising */ + 283:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_exti.c **** if ((pExtiConfig->Line & EXTI_CONFIG) != 0x00u) + 334 .loc 1 283 3 is_stmt 1 view .LVU118 + 335 .loc 1 283 6 is_stmt 0 view .LVU119 + 336 0038 9001 lsls r0, r2, #6 + 337 003a 2AD5 bpl .L26 + 284:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_exti.c **** { + 285:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_exti.c **** /* Check if configuration of selected line is enable */ + 286:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_exti.c **** if ((EXTI->RTSR & maskline) != 0x00u) + 338 .loc 1 286 5 is_stmt 1 view .LVU120 + 339 .loc 1 286 14 is_stmt 0 view .LVU121 + 340 003c 1648 ldr r0, .L29 + 341 003e 8068 ldr r0, [r0, #8] + 342 .loc 1 286 8 view .LVU122 + 343 0040 0342 tst r3, r0 + 344 0042 01D0 beq .L22 + 287:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_exti.c **** { + 288:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_exti.c **** pExtiConfig->Trigger = EXTI_TRIGGER_RISING; + 345 .loc 1 288 7 is_stmt 1 view .LVU123 + 346 .loc 1 288 28 is_stmt 0 view .LVU124 + 347 0044 0120 movs r0, #1 + 348 0046 8860 str r0, [r1, #8] + 349 .L22: + 289:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_exti.c **** } + 290:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_exti.c **** + 291:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_exti.c **** /* Get falling configuration */ + 292:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_exti.c **** /* Check if configuration of selected line is enable */ + 293:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_exti.c **** if ((EXTI->FTSR & maskline) != 0x00u) + 350 .loc 1 293 5 is_stmt 1 view .LVU125 + 351 .loc 1 293 14 is_stmt 0 view .LVU126 + 352 0048 1348 ldr r0, .L29 + 353 004a C068 ldr r0, [r0, #12] + 354 .loc 1 293 8 view .LVU127 + 355 004c 0342 tst r3, r0 + 356 004e 03D0 beq .L23 + 294:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_exti.c **** { + 295:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_exti.c **** pExtiConfig->Trigger |= EXTI_TRIGGER_FALLING; + 357 .loc 1 295 7 is_stmt 1 view .LVU128 + ARM GAS /tmp/ccFacv4Y.s page 13 + + + 358 .loc 1 295 18 is_stmt 0 view .LVU129 + 359 0050 8B68 ldr r3, [r1, #8] + 360 .LVL23: + 361 .loc 1 295 28 view .LVU130 + 362 0052 0220 movs r0, #2 + 363 0054 0343 orrs r3, r0 + 364 0056 8B60 str r3, [r1, #8] + 365 .L23: + 296:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_exti.c **** } + 297:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_exti.c **** + 298:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_exti.c **** /* Get Gpio port selection for gpio lines */ + 299:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_exti.c **** if ((pExtiConfig->Line & EXTI_GPIO) == EXTI_GPIO) + 366 .loc 1 299 5 is_stmt 1 view .LVU131 + 367 .loc 1 299 28 is_stmt 0 view .LVU132 + 368 0058 C023 movs r3, #192 + 369 005a DB04 lsls r3, r3, #19 + 370 005c 1000 movs r0, r2 + 371 005e 1840 ands r0, r3 + 372 .loc 1 299 8 view .LVU133 + 373 0060 9842 cmp r0, r3 + 374 0062 04D0 beq .L28 + 300:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_exti.c **** { + 301:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_exti.c **** assert_param(IS_EXTI_GPIO_PIN(linepos)); + 302:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_exti.c **** + 303:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_exti.c **** regval = SYSCFG->EXTICR[linepos >> 2u]; + 304:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_exti.c **** pExtiConfig->GPIOSel = (regval >> (SYSCFG_EXTICR1_EXTI1_Pos * (linepos & 0x03u))) & SYSCFG_EX + 305:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_exti.c **** } + 306:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_exti.c **** } + 307:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_exti.c **** + 308:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_exti.c **** return HAL_OK; + 375 .loc 1 308 10 view .LVU134 + 376 0064 0020 movs r0, #0 + 377 0066 15E0 b .L18 + 378 .LVL24: + 379 .L19: + 268:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_exti.c **** } + 380 .loc 1 268 5 is_stmt 1 view .LVU135 + 268:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_exti.c **** } + 381 .loc 1 268 23 is_stmt 0 view .LVU136 + 382 0068 0020 movs r0, #0 + 383 006a 4860 str r0, [r1, #4] + 384 006c D9E7 b .L20 + 385 .LVL25: + 386 .L28: + 301:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_exti.c **** + 387 .loc 1 301 7 is_stmt 1 view .LVU137 + 303:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_exti.c **** pExtiConfig->GPIOSel = (regval >> (SYSCFG_EXTICR1_EXTI1_Pos * (linepos & 0x03u))) & SYSCFG_EX + 388 .loc 1 303 7 view .LVU138 + 303:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_exti.c **** pExtiConfig->GPIOSel = (regval >> (SYSCFG_EXTICR1_EXTI1_Pos * (linepos & 0x03u))) & SYSCFG_EX + 389 .loc 1 303 39 is_stmt 0 view .LVU139 + 390 006e A308 lsrs r3, r4, #2 + 303:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_exti.c **** pExtiConfig->GPIOSel = (regval >> (SYSCFG_EXTICR1_EXTI1_Pos * (linepos & 0x03u))) & SYSCFG_EX + 391 .loc 1 303 14 view .LVU140 + 392 0070 0233 adds r3, r3, #2 + 393 0072 9B00 lsls r3, r3, #2 + 394 0074 0948 ldr r0, .L29+4 + 395 0076 1858 ldr r0, [r3, r0] + ARM GAS /tmp/ccFacv4Y.s page 14 + + + 396 .LVL26: + 304:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_exti.c **** } + 397 .loc 1 304 7 is_stmt 1 view .LVU141 + 304:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_exti.c **** } + 398 .loc 1 304 78 is_stmt 0 view .LVU142 + 399 0078 0323 movs r3, #3 + 400 007a 1340 ands r3, r2 + 304:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_exti.c **** } + 401 .loc 1 304 67 view .LVU143 + 402 007c 9B00 lsls r3, r3, #2 + 304:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_exti.c **** } + 403 .loc 1 304 38 view .LVU144 + 404 007e D840 lsrs r0, r0, r3 + 405 .LVL27: + 304:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_exti.c **** } + 406 .loc 1 304 89 view .LVU145 + 407 0080 0F23 movs r3, #15 + 408 0082 0340 ands r3, r0 + 304:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_exti.c **** } + 409 .loc 1 304 28 view .LVU146 + 410 0084 CB60 str r3, [r1, #12] + 411 .loc 1 308 10 view .LVU147 + 412 0086 0020 movs r0, #0 + 413 0088 04E0 b .L18 + 414 .LVL28: + 415 .L24: + 246:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_exti.c **** } + 416 .loc 1 246 12 view .LVU148 + 417 008a 0120 movs r0, #1 + 418 .LVL29: + 246:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_exti.c **** } + 419 .loc 1 246 12 view .LVU149 + 420 008c 02E0 b .L18 + 421 .LVL30: + 422 .L25: + 246:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_exti.c **** } + 423 .loc 1 246 12 view .LVU150 + 424 008e 0120 movs r0, #1 + 425 .LVL31: + 246:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_exti.c **** } + 426 .loc 1 246 12 view .LVU151 + 427 0090 00E0 b .L18 + 428 .LVL32: + 429 .L26: + 430 .loc 1 308 10 view .LVU152 + 431 0092 0020 movs r0, #0 + 432 .LVL33: + 433 .L18: + 309:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_exti.c **** } + 434 .loc 1 309 1 view .LVU153 + 435 @ sp needed + 436 0094 30BD pop {r4, r5, pc} + 437 .L30: + 438 0096 C046 .align 2 + 439 .L29: + 440 0098 00040140 .word 1073808384 + 441 009c 00000140 .word 1073807360 + ARM GAS /tmp/ccFacv4Y.s page 15 + + + 442 .cfi_endproc + 443 .LFE41: + 445 .section .text.HAL_EXTI_ClearConfigLine,"ax",%progbits + 446 .align 1 + 447 .global HAL_EXTI_ClearConfigLine + 448 .syntax unified + 449 .code 16 + 450 .thumb_func + 452 HAL_EXTI_ClearConfigLine: + 453 .LVL34: + 454 .LFB42: + 310:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_exti.c **** + 311:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_exti.c **** /** + 312:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_exti.c **** * @brief Clear whole configuration of a dedicated Exti line. + 313:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_exti.c **** * @param hexti Exti handle. + 314:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_exti.c **** * @retval HAL Status. + 315:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_exti.c **** */ + 316:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_exti.c **** HAL_StatusTypeDef HAL_EXTI_ClearConfigLine(EXTI_HandleTypeDef *hexti) + 317:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_exti.c **** { + 455 .loc 1 317 1 is_stmt 1 view -0 + 456 .cfi_startproc + 457 @ args = 0, pretend = 0, frame = 0 + 458 @ frame_needed = 0, uses_anonymous_args = 0 + 459 .loc 1 317 1 is_stmt 0 view .LVU155 + 460 0000 70B5 push {r4, r5, r6, lr} + 461 .cfi_def_cfa_offset 16 + 462 .cfi_offset 4, -16 + 463 .cfi_offset 5, -12 + 464 .cfi_offset 6, -8 + 465 .cfi_offset 14, -4 + 318:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_exti.c **** uint32_t regval; + 466 .loc 1 318 3 is_stmt 1 view .LVU156 + 319:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_exti.c **** uint32_t linepos; + 467 .loc 1 319 3 view .LVU157 + 320:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_exti.c **** uint32_t maskline; + 468 .loc 1 320 3 view .LVU158 + 321:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_exti.c **** + 322:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_exti.c **** /* Check null pointer */ + 323:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_exti.c **** if (hexti == NULL) + 469 .loc 1 323 3 view .LVU159 + 470 .loc 1 323 6 is_stmt 0 view .LVU160 + 471 0002 0028 cmp r0, #0 + 472 0004 2CD0 beq .L33 + 324:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_exti.c **** { + 325:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_exti.c **** return HAL_ERROR; + 326:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_exti.c **** } + 327:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_exti.c **** + 328:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_exti.c **** /* Check the parameter */ + 329:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_exti.c **** assert_param(IS_EXTI_LINE(hexti->Line)); + 473 .loc 1 329 3 is_stmt 1 view .LVU161 + 330:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_exti.c **** + 331:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_exti.c **** /* compute line mask */ + 332:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_exti.c **** linepos = (hexti->Line & EXTI_PIN_MASK); + 474 .loc 1 332 3 view .LVU162 + 475 .loc 1 332 19 is_stmt 0 view .LVU163 + 476 0006 0568 ldr r5, [r0] + 477 .loc 1 332 11 view .LVU164 + ARM GAS /tmp/ccFacv4Y.s page 16 + + + 478 0008 1F22 movs r2, #31 + 479 000a 2A40 ands r2, r5 + 480 .LVL35: + 333:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_exti.c **** maskline = (1uL << linepos); + 481 .loc 1 333 3 is_stmt 1 view .LVU165 + 482 .loc 1 333 12 is_stmt 0 view .LVU166 + 483 000c 0123 movs r3, #1 + 484 000e 9340 lsls r3, r3, r2 + 485 .LVL36: + 334:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_exti.c **** + 335:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_exti.c **** /* 1] Clear interrupt mode */ + 336:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_exti.c **** EXTI->IMR = (EXTI->IMR & ~maskline); + 486 .loc 1 336 3 is_stmt 1 view .LVU167 + 487 .loc 1 336 20 is_stmt 0 view .LVU168 + 488 0010 1549 ldr r1, .L37 + 489 0012 0C68 ldr r4, [r1] + 490 .loc 1 336 28 view .LVU169 + 491 0014 DE43 mvns r6, r3 + 492 .loc 1 336 26 view .LVU170 + 493 0016 9C43 bics r4, r3 + 494 .loc 1 336 13 view .LVU171 + 495 0018 0C60 str r4, [r1] + 337:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_exti.c **** + 338:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_exti.c **** /* 2] Clear event mode */ + 339:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_exti.c **** EXTI->EMR = (EXTI->EMR & ~maskline); + 496 .loc 1 339 3 is_stmt 1 view .LVU172 + 497 .loc 1 339 20 is_stmt 0 view .LVU173 + 498 001a 4C68 ldr r4, [r1, #4] + 499 .loc 1 339 26 view .LVU174 + 500 001c 9C43 bics r4, r3 + 501 .loc 1 339 13 view .LVU175 + 502 001e 4C60 str r4, [r1, #4] + 340:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_exti.c **** + 341:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_exti.c **** /* 3] Clear triggers in case of configurable lines */ + 342:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_exti.c **** if ((hexti->Line & EXTI_CONFIG) != 0x00u) + 503 .loc 1 342 3 is_stmt 1 view .LVU176 + 504 .loc 1 342 13 is_stmt 0 view .LVU177 + 505 0020 0368 ldr r3, [r0] + 506 .LVL37: + 507 .loc 1 342 6 view .LVU178 + 508 0022 9B01 lsls r3, r3, #6 + 509 0024 1ED5 bpl .L34 + 343:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_exti.c **** { + 344:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_exti.c **** EXTI->RTSR = (EXTI->RTSR & ~maskline); + 510 .loc 1 344 5 is_stmt 1 view .LVU179 + 511 .loc 1 344 23 is_stmt 0 view .LVU180 + 512 0026 0B00 movs r3, r1 + 513 0028 8968 ldr r1, [r1, #8] + 514 .loc 1 344 30 view .LVU181 + 515 002a 3140 ands r1, r6 + 516 .loc 1 344 16 view .LVU182 + 517 002c 9960 str r1, [r3, #8] + 345:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_exti.c **** EXTI->FTSR = (EXTI->FTSR & ~maskline); + 518 .loc 1 345 5 is_stmt 1 view .LVU183 + 519 .loc 1 345 23 is_stmt 0 view .LVU184 + 520 002e D968 ldr r1, [r3, #12] + 521 .loc 1 345 30 view .LVU185 + ARM GAS /tmp/ccFacv4Y.s page 17 + + + 522 0030 3140 ands r1, r6 + 523 .loc 1 345 16 view .LVU186 + 524 0032 D960 str r1, [r3, #12] + 346:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_exti.c **** + 347:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_exti.c **** /* Get Gpio port selection for gpio lines */ + 348:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_exti.c **** if ((hexti->Line & EXTI_GPIO) == EXTI_GPIO) + 525 .loc 1 348 5 is_stmt 1 view .LVU187 + 526 .loc 1 348 15 is_stmt 0 view .LVU188 + 527 0034 0368 ldr r3, [r0] + 528 .loc 1 348 22 view .LVU189 + 529 0036 C021 movs r1, #192 + 530 0038 C904 lsls r1, r1, #19 + 531 003a 0B40 ands r3, r1 + 532 .loc 1 348 8 view .LVU190 + 533 003c 8B42 cmp r3, r1 + 534 003e 01D0 beq .L36 + 349:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_exti.c **** { + 350:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_exti.c **** assert_param(IS_EXTI_GPIO_PIN(linepos)); + 351:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_exti.c **** + 352:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_exti.c **** regval = SYSCFG->EXTICR[linepos >> 2u]; + 353:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_exti.c **** regval &= ~(SYSCFG_EXTICR1_EXTI0 << (SYSCFG_EXTICR1_EXTI1_Pos * (linepos & 0x03u))); + 354:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_exti.c **** SYSCFG->EXTICR[linepos >> 2u] = regval; + 355:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_exti.c **** } + 356:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_exti.c **** } + 357:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_exti.c **** + 358:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_exti.c **** return HAL_OK; + 535 .loc 1 358 10 view .LVU191 + 536 0040 0020 movs r0, #0 + 537 .LVL38: + 538 .loc 1 358 10 view .LVU192 + 539 0042 10E0 b .L32 + 540 .LVL39: + 541 .L36: + 350:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_exti.c **** + 542 .loc 1 350 7 is_stmt 1 view .LVU193 + 352:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_exti.c **** regval &= ~(SYSCFG_EXTICR1_EXTI0 << (SYSCFG_EXTICR1_EXTI1_Pos * (linepos & 0x03u))); + 543 .loc 1 352 7 view .LVU194 + 352:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_exti.c **** regval &= ~(SYSCFG_EXTICR1_EXTI0 << (SYSCFG_EXTICR1_EXTI1_Pos * (linepos & 0x03u))); + 544 .loc 1 352 39 is_stmt 0 view .LVU195 + 545 0044 9208 lsrs r2, r2, #2 + 546 .LVL40: + 352:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_exti.c **** regval &= ~(SYSCFG_EXTICR1_EXTI0 << (SYSCFG_EXTICR1_EXTI1_Pos * (linepos & 0x03u))); + 547 .loc 1 352 14 view .LVU196 + 548 0046 094C ldr r4, .L37+4 + 549 0048 0232 adds r2, r2, #2 + 550 004a 9200 lsls r2, r2, #2 + 551 004c 1159 ldr r1, [r2, r4] + 552 .LVL41: + 353:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_exti.c **** SYSCFG->EXTICR[linepos >> 2u] = regval; + 553 .loc 1 353 7 is_stmt 1 view .LVU197 + 353:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_exti.c **** SYSCFG->EXTICR[linepos >> 2u] = regval; + 554 .loc 1 353 80 is_stmt 0 view .LVU198 + 555 004e 0323 movs r3, #3 + 556 0050 2B40 ands r3, r5 + 353:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_exti.c **** SYSCFG->EXTICR[linepos >> 2u] = regval; + 557 .loc 1 353 69 view .LVU199 + 558 0052 9B00 lsls r3, r3, #2 + ARM GAS /tmp/ccFacv4Y.s page 18 + + + 353:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_exti.c **** SYSCFG->EXTICR[linepos >> 2u] = regval; + 559 .loc 1 353 40 view .LVU200 + 560 0054 0F20 movs r0, #15 + 561 .LVL42: + 353:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_exti.c **** SYSCFG->EXTICR[linepos >> 2u] = regval; + 562 .loc 1 353 40 view .LVU201 + 563 0056 9840 lsls r0, r0, r3 + 353:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_exti.c **** SYSCFG->EXTICR[linepos >> 2u] = regval; + 564 .loc 1 353 14 view .LVU202 + 565 0058 8143 bics r1, r0 + 566 .LVL43: + 354:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_exti.c **** } + 567 .loc 1 354 7 is_stmt 1 view .LVU203 + 354:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_exti.c **** } + 568 .loc 1 354 37 is_stmt 0 view .LVU204 + 569 005a 1151 str r1, [r2, r4] + 570 .loc 1 358 10 view .LVU205 + 571 005c 0020 movs r0, #0 + 572 005e 02E0 b .L32 + 573 .LVL44: + 574 .L33: + 325:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_exti.c **** } + 575 .loc 1 325 12 view .LVU206 + 576 0060 0120 movs r0, #1 + 577 .LVL45: + 325:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_exti.c **** } + 578 .loc 1 325 12 view .LVU207 + 579 0062 00E0 b .L32 + 580 .LVL46: + 581 .L34: + 582 .loc 1 358 10 view .LVU208 + 583 0064 0020 movs r0, #0 + 584 .LVL47: + 585 .L32: + 359:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_exti.c **** } + 586 .loc 1 359 1 view .LVU209 + 587 @ sp needed + 588 0066 70BD pop {r4, r5, r6, pc} + 589 .L38: + 590 .align 2 + 591 .L37: + 592 0068 00040140 .word 1073808384 + 593 006c 00000140 .word 1073807360 + 594 .cfi_endproc + 595 .LFE42: + 597 .section .text.HAL_EXTI_RegisterCallback,"ax",%progbits + 598 .align 1 + 599 .global HAL_EXTI_RegisterCallback + 600 .syntax unified + 601 .code 16 + 602 .thumb_func + 604 HAL_EXTI_RegisterCallback: + 605 .LVL48: + 606 .LFB43: + 360:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_exti.c **** + 361:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_exti.c **** /** + 362:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_exti.c **** * @brief Register callback for a dedicated Exti line. + ARM GAS /tmp/ccFacv4Y.s page 19 + + + 363:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_exti.c **** * @param hexti Exti handle. + 364:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_exti.c **** * @param CallbackID User callback identifier. + 365:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_exti.c **** * This parameter can be one of @arg @ref EXTI_CallbackIDTypeDef values. + 366:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_exti.c **** * @param pPendingCbfn function pointer to be stored as callback. + 367:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_exti.c **** * @retval HAL Status. + 368:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_exti.c **** */ + 369:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_exti.c **** HAL_StatusTypeDef HAL_EXTI_RegisterCallback(EXTI_HandleTypeDef *hexti, EXTI_CallbackIDTypeDef Callb + 370:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_exti.c **** { + 607 .loc 1 370 1 is_stmt 1 view -0 + 608 .cfi_startproc + 609 @ args = 0, pretend = 0, frame = 0 + 610 @ frame_needed = 0, uses_anonymous_args = 0 + 611 @ link register save eliminated. + 371:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_exti.c **** HAL_StatusTypeDef status = HAL_OK; + 612 .loc 1 371 3 view .LVU211 + 372:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_exti.c **** + 373:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_exti.c **** switch (CallbackID) + 613 .loc 1 373 3 view .LVU212 + 614 0000 0029 cmp r1, #0 + 615 0002 02D1 bne .L41 + 374:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_exti.c **** { + 375:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_exti.c **** case HAL_EXTI_COMMON_CB_ID: + 376:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_exti.c **** hexti->PendingCallback = pPendingCbfn; + 616 .loc 1 376 7 view .LVU213 + 617 .loc 1 376 30 is_stmt 0 view .LVU214 + 618 0004 4260 str r2, [r0, #4] + 377:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_exti.c **** break; + 619 .loc 1 377 7 is_stmt 1 view .LVU215 + 371:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_exti.c **** + 620 .loc 1 371 21 is_stmt 0 view .LVU216 + 621 0006 0800 movs r0, r1 + 622 .LVL49: + 623 .L40: + 378:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_exti.c **** + 379:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_exti.c **** default: + 380:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_exti.c **** status = HAL_ERROR; + 381:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_exti.c **** break; + 382:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_exti.c **** } + 383:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_exti.c **** + 384:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_exti.c **** return status; + 624 .loc 1 384 3 is_stmt 1 view .LVU217 + 385:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_exti.c **** } + 625 .loc 1 385 1 is_stmt 0 view .LVU218 + 626 @ sp needed + 627 0008 7047 bx lr + 628 .LVL50: + 629 .L41: + 380:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_exti.c **** break; + 630 .loc 1 380 14 view .LVU219 + 631 000a 0120 movs r0, #1 + 632 .LVL51: + 380:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_exti.c **** break; + 633 .loc 1 380 14 view .LVU220 + 634 000c FCE7 b .L40 + 635 .cfi_endproc + 636 .LFE43: + 638 .section .text.HAL_EXTI_GetHandle,"ax",%progbits + ARM GAS /tmp/ccFacv4Y.s page 20 + + + 639 .align 1 + 640 .global HAL_EXTI_GetHandle + 641 .syntax unified + 642 .code 16 + 643 .thumb_func + 645 HAL_EXTI_GetHandle: + 646 .LVL52: + 647 .LFB44: + 386:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_exti.c **** + 387:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_exti.c **** /** + 388:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_exti.c **** * @brief Store line number as handle private field. + 389:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_exti.c **** * @param hexti Exti handle. + 390:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_exti.c **** * @param ExtiLine Exti line number. + 391:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_exti.c **** * This parameter can be from 0 to @ref EXTI_LINE_NB. + 392:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_exti.c **** * @retval HAL Status. + 393:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_exti.c **** */ + 394:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_exti.c **** HAL_StatusTypeDef HAL_EXTI_GetHandle(EXTI_HandleTypeDef *hexti, uint32_t ExtiLine) + 395:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_exti.c **** { + 648 .loc 1 395 1 is_stmt 1 view -0 + 649 .cfi_startproc + 650 @ args = 0, pretend = 0, frame = 0 + 651 @ frame_needed = 0, uses_anonymous_args = 0 + 652 @ link register save eliminated. + 396:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_exti.c **** /* Check the parameters */ + 397:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_exti.c **** assert_param(IS_EXTI_LINE(ExtiLine)); + 653 .loc 1 397 3 view .LVU222 + 398:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_exti.c **** + 399:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_exti.c **** /* Check null pointer */ + 400:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_exti.c **** if (hexti == NULL) + 654 .loc 1 400 3 view .LVU223 + 655 .loc 1 400 6 is_stmt 0 view .LVU224 + 656 0000 0028 cmp r0, #0 + 657 0002 02D0 beq .L44 + 401:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_exti.c **** { + 402:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_exti.c **** return HAL_ERROR; + 403:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_exti.c **** } + 404:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_exti.c **** else + 405:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_exti.c **** { + 406:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_exti.c **** /* Store line number as handle private field */ + 407:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_exti.c **** hexti->Line = ExtiLine; + 658 .loc 1 407 5 is_stmt 1 view .LVU225 + 659 .loc 1 407 17 is_stmt 0 view .LVU226 + 660 0004 0160 str r1, [r0] + 408:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_exti.c **** + 409:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_exti.c **** return HAL_OK; + 661 .loc 1 409 5 is_stmt 1 view .LVU227 + 662 .loc 1 409 12 is_stmt 0 view .LVU228 + 663 0006 0020 movs r0, #0 + 664 .LVL53: + 665 .L43: + 410:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_exti.c **** } + 411:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_exti.c **** } + 666 .loc 1 411 1 view .LVU229 + 667 @ sp needed + 668 0008 7047 bx lr + 669 .LVL54: + 670 .L44: + ARM GAS /tmp/ccFacv4Y.s page 21 + + + 402:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_exti.c **** } + 671 .loc 1 402 12 view .LVU230 + 672 000a 0120 movs r0, #1 + 673 .LVL55: + 402:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_exti.c **** } + 674 .loc 1 402 12 view .LVU231 + 675 000c FCE7 b .L43 + 676 .cfi_endproc + 677 .LFE44: + 679 .section .text.HAL_EXTI_IRQHandler,"ax",%progbits + 680 .align 1 + 681 .global HAL_EXTI_IRQHandler + 682 .syntax unified + 683 .code 16 + 684 .thumb_func + 686 HAL_EXTI_IRQHandler: + 687 .LVL56: + 688 .LFB45: + 412:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_exti.c **** + 413:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_exti.c **** /** + 414:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_exti.c **** * @} + 415:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_exti.c **** */ + 416:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_exti.c **** + 417:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_exti.c **** /** @addtogroup EXTI_Exported_Functions_Group2 + 418:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_exti.c **** * @brief EXTI IO functions. + 419:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_exti.c **** * + 420:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_exti.c **** @verbatim + 421:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_exti.c **** =============================================================================== + 422:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_exti.c **** ##### IO operation functions ##### + 423:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_exti.c **** =============================================================================== + 424:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_exti.c **** + 425:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_exti.c **** @endverbatim + 426:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_exti.c **** * @{ + 427:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_exti.c **** */ + 428:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_exti.c **** + 429:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_exti.c **** /** + 430:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_exti.c **** * @brief Handle EXTI interrupt request. + 431:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_exti.c **** * @param hexti Exti handle. + 432:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_exti.c **** * @retval none. + 433:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_exti.c **** */ + 434:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_exti.c **** void HAL_EXTI_IRQHandler(EXTI_HandleTypeDef *hexti) + 435:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_exti.c **** { + 689 .loc 1 435 1 is_stmt 1 view -0 + 690 .cfi_startproc + 691 @ args = 0, pretend = 0, frame = 0 + 692 @ frame_needed = 0, uses_anonymous_args = 0 + 693 .loc 1 435 1 is_stmt 0 view .LVU233 + 694 0000 10B5 push {r4, lr} + 695 .cfi_def_cfa_offset 8 + 696 .cfi_offset 4, -8 + 697 .cfi_offset 14, -4 + 436:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_exti.c **** uint32_t regval; + 698 .loc 1 436 3 is_stmt 1 view .LVU234 + 437:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_exti.c **** uint32_t maskline; + 699 .loc 1 437 3 view .LVU235 + 438:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_exti.c **** + 439:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_exti.c **** /* Compute line mask */ + ARM GAS /tmp/ccFacv4Y.s page 22 + + + 440:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_exti.c **** maskline = (1uL << (hexti->Line & EXTI_PIN_MASK)); + 700 .loc 1 440 3 view .LVU236 + 701 .loc 1 440 28 is_stmt 0 view .LVU237 + 702 0002 0368 ldr r3, [r0] + 703 .loc 1 440 35 view .LVU238 + 704 0004 1F22 movs r2, #31 + 705 0006 1A40 ands r2, r3 + 706 .loc 1 440 12 view .LVU239 + 707 0008 0123 movs r3, #1 + 708 000a 9340 lsls r3, r3, r2 + 709 .LVL57: + 441:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_exti.c **** + 442:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_exti.c **** /* Get pending bit */ + 443:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_exti.c **** regval = (EXTI->PR & maskline); + 710 .loc 1 443 3 is_stmt 1 view .LVU240 + 711 .loc 1 443 17 is_stmt 0 view .LVU241 + 712 000c 054A ldr r2, .L47 + 713 000e 5269 ldr r2, [r2, #20] + 714 .LVL58: + 444:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_exti.c **** if (regval != 0x00u) + 715 .loc 1 444 3 is_stmt 1 view .LVU242 + 716 .loc 1 444 6 is_stmt 0 view .LVU243 + 717 0010 1342 tst r3, r2 + 718 0012 05D0 beq .L45 + 445:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_exti.c **** { + 446:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_exti.c **** /* Clear pending bit */ + 447:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_exti.c **** EXTI->PR = maskline; + 719 .loc 1 447 5 is_stmt 1 view .LVU244 + 720 .loc 1 447 14 is_stmt 0 view .LVU245 + 721 0014 034A ldr r2, .L47 + 722 .LVL59: + 723 .loc 1 447 14 view .LVU246 + 724 0016 5361 str r3, [r2, #20] + 448:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_exti.c **** + 449:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_exti.c **** /* Call callback */ + 450:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_exti.c **** if (hexti->PendingCallback != NULL) + 725 .loc 1 450 5 is_stmt 1 view .LVU247 + 726 .loc 1 450 14 is_stmt 0 view .LVU248 + 727 0018 4368 ldr r3, [r0, #4] + 728 .LVL60: + 729 .loc 1 450 8 view .LVU249 + 730 001a 002B cmp r3, #0 + 731 001c 00D0 beq .L45 + 451:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_exti.c **** { + 452:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_exti.c **** hexti->PendingCallback(); + 732 .loc 1 452 7 is_stmt 1 view .LVU250 + 733 001e 9847 blx r3 + 734 .LVL61: + 735 .L45: + 453:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_exti.c **** } + 454:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_exti.c **** } + 455:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_exti.c **** } + 736 .loc 1 455 1 is_stmt 0 view .LVU251 + 737 @ sp needed + 738 0020 10BD pop {r4, pc} + 739 .L48: + 740 0022 C046 .align 2 + ARM GAS /tmp/ccFacv4Y.s page 23 + + + 741 .L47: + 742 0024 00040140 .word 1073808384 + 743 .cfi_endproc + 744 .LFE45: + 746 .section .text.HAL_EXTI_GetPending,"ax",%progbits + 747 .align 1 + 748 .global HAL_EXTI_GetPending + 749 .syntax unified + 750 .code 16 + 751 .thumb_func + 753 HAL_EXTI_GetPending: + 754 .LVL62: + 755 .LFB46: + 456:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_exti.c **** + 457:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_exti.c **** /** + 458:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_exti.c **** * @brief Get interrupt pending bit of a dedicated line. + 459:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_exti.c **** * @param hexti Exti handle. + 460:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_exti.c **** * @param Edge Specify which pending edge as to be checked. + 461:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_exti.c **** * This parameter can be one of the following values: + 462:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_exti.c **** * @arg @ref EXTI_TRIGGER_RISING_FALLING + 463:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_exti.c **** * This parameter is kept for compatibility with other series. + 464:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_exti.c **** * @retval 1 if interrupt is pending else 0. + 465:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_exti.c **** */ + 466:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_exti.c **** uint32_t HAL_EXTI_GetPending(EXTI_HandleTypeDef *hexti, uint32_t Edge) + 467:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_exti.c **** { + 756 .loc 1 467 1 is_stmt 1 view -0 + 757 .cfi_startproc + 758 @ args = 0, pretend = 0, frame = 0 + 759 @ frame_needed = 0, uses_anonymous_args = 0 + 760 @ link register save eliminated. + 468:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_exti.c **** uint32_t regval; + 761 .loc 1 468 3 view .LVU253 + 469:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_exti.c **** uint32_t linepos; + 762 .loc 1 469 3 view .LVU254 + 470:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_exti.c **** uint32_t maskline; + 763 .loc 1 470 3 view .LVU255 + 471:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_exti.c **** + 472:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_exti.c **** /* Check parameters */ + 473:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_exti.c **** assert_param(IS_EXTI_LINE(hexti->Line)); + 764 .loc 1 473 3 view .LVU256 + 474:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_exti.c **** assert_param(IS_EXTI_CONFIG_LINE(hexti->Line)); + 765 .loc 1 474 3 view .LVU257 + 475:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_exti.c **** assert_param(IS_EXTI_PENDING_EDGE(Edge)); + 766 .loc 1 475 3 view .LVU258 + 476:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_exti.c **** + 477:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_exti.c **** /* Compute line mask */ + 478:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_exti.c **** linepos = (hexti->Line & EXTI_PIN_MASK); + 767 .loc 1 478 3 view .LVU259 + 768 .loc 1 478 19 is_stmt 0 view .LVU260 + 769 0000 0268 ldr r2, [r0] + 770 .loc 1 478 11 view .LVU261 + 771 0002 1F23 movs r3, #31 + 772 0004 1340 ands r3, r2 + 773 .LVL63: + 479:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_exti.c **** maskline = (1uL << linepos); + 774 .loc 1 479 3 is_stmt 1 view .LVU262 + 775 .loc 1 479 12 is_stmt 0 view .LVU263 + ARM GAS /tmp/ccFacv4Y.s page 24 + + + 776 0006 0120 movs r0, #1 + 777 .LVL64: + 778 .loc 1 479 12 view .LVU264 + 779 0008 9840 lsls r0, r0, r3 + 780 .LVL65: + 480:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_exti.c **** + 481:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_exti.c **** /* return 1 if bit is set else 0 */ + 482:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_exti.c **** regval = ((EXTI->PR & maskline) >> linepos); + 781 .loc 1 482 3 is_stmt 1 view .LVU265 + 782 .loc 1 482 18 is_stmt 0 view .LVU266 + 783 000a 024A ldr r2, .L50 + 784 000c 5269 ldr r2, [r2, #20] + 785 .loc 1 482 23 view .LVU267 + 786 000e 1040 ands r0, r2 + 787 .LVL66: + 788 .loc 1 482 10 view .LVU268 + 789 0010 D840 lsrs r0, r0, r3 + 790 .LVL67: + 483:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_exti.c **** return regval; + 791 .loc 1 483 3 is_stmt 1 view .LVU269 + 484:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_exti.c **** } + 792 .loc 1 484 1 is_stmt 0 view .LVU270 + 793 @ sp needed + 794 0012 7047 bx lr + 795 .L51: + 796 .align 2 + 797 .L50: + 798 0014 00040140 .word 1073808384 + 799 .cfi_endproc + 800 .LFE46: + 802 .section .text.HAL_EXTI_ClearPending,"ax",%progbits + 803 .align 1 + 804 .global HAL_EXTI_ClearPending + 805 .syntax unified + 806 .code 16 + 807 .thumb_func + 809 HAL_EXTI_ClearPending: + 810 .LVL68: + 811 .LFB47: + 485:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_exti.c **** + 486:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_exti.c **** /** + 487:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_exti.c **** * @brief Clear interrupt pending bit of a dedicated line. + 488:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_exti.c **** * @param hexti Exti handle. + 489:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_exti.c **** * @param Edge Specify which pending edge as to be clear. + 490:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_exti.c **** * This parameter can be one of the following values: + 491:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_exti.c **** * @arg @ref EXTI_TRIGGER_RISING_FALLING + 492:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_exti.c **** * This parameter is kept for compatibility with other series. + 493:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_exti.c **** * @retval None. + 494:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_exti.c **** */ + 495:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_exti.c **** void HAL_EXTI_ClearPending(EXTI_HandleTypeDef *hexti, uint32_t Edge) + 496:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_exti.c **** { + 812 .loc 1 496 1 is_stmt 1 view -0 + 813 .cfi_startproc + 814 @ args = 0, pretend = 0, frame = 0 + 815 @ frame_needed = 0, uses_anonymous_args = 0 + 816 @ link register save eliminated. + 497:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_exti.c **** uint32_t maskline; + ARM GAS /tmp/ccFacv4Y.s page 25 + + + 817 .loc 1 497 3 view .LVU272 + 498:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_exti.c **** + 499:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_exti.c **** /* Check parameters */ + 500:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_exti.c **** assert_param(IS_EXTI_LINE(hexti->Line)); + 818 .loc 1 500 3 view .LVU273 + 501:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_exti.c **** assert_param(IS_EXTI_CONFIG_LINE(hexti->Line)); + 819 .loc 1 501 3 view .LVU274 + 502:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_exti.c **** assert_param(IS_EXTI_PENDING_EDGE(Edge)); + 820 .loc 1 502 3 view .LVU275 + 503:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_exti.c **** + 504:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_exti.c **** /* Compute line mask */ + 505:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_exti.c **** maskline = (1uL << (hexti->Line & EXTI_PIN_MASK)); + 821 .loc 1 505 3 view .LVU276 + 822 .loc 1 505 28 is_stmt 0 view .LVU277 + 823 0000 0368 ldr r3, [r0] + 824 .loc 1 505 35 view .LVU278 + 825 0002 1F22 movs r2, #31 + 826 0004 1A40 ands r2, r3 + 827 .loc 1 505 12 view .LVU279 + 828 0006 0123 movs r3, #1 + 829 0008 9340 lsls r3, r3, r2 + 830 .LVL69: + 506:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_exti.c **** + 507:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_exti.c **** /* Clear Pending bit */ + 508:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_exti.c **** EXTI->PR = maskline; + 831 .loc 1 508 3 is_stmt 1 view .LVU280 + 832 .loc 1 508 12 is_stmt 0 view .LVU281 + 833 000a 014A ldr r2, .L53 + 834 000c 5361 str r3, [r2, #20] + 509:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_exti.c **** } + 835 .loc 1 509 1 view .LVU282 + 836 @ sp needed + 837 000e 7047 bx lr + 838 .L54: + 839 .align 2 + 840 .L53: + 841 0010 00040140 .word 1073808384 + 842 .cfi_endproc + 843 .LFE47: + 845 .section .text.HAL_EXTI_GenerateSWI,"ax",%progbits + 846 .align 1 + 847 .global HAL_EXTI_GenerateSWI + 848 .syntax unified + 849 .code 16 + 850 .thumb_func + 852 HAL_EXTI_GenerateSWI: + 853 .LVL70: + 854 .LFB48: + 510:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_exti.c **** + 511:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_exti.c **** /** + 512:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_exti.c **** * @brief Generate a software interrupt for a dedicated line. + 513:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_exti.c **** * @param hexti Exti handle. + 514:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_exti.c **** * @retval None. + 515:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_exti.c **** */ + 516:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_exti.c **** void HAL_EXTI_GenerateSWI(EXTI_HandleTypeDef *hexti) + 517:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_exti.c **** { + 855 .loc 1 517 1 is_stmt 1 view -0 + ARM GAS /tmp/ccFacv4Y.s page 26 + + + 856 .cfi_startproc + 857 @ args = 0, pretend = 0, frame = 0 + 858 @ frame_needed = 0, uses_anonymous_args = 0 + 859 @ link register save eliminated. + 518:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_exti.c **** uint32_t maskline; + 860 .loc 1 518 3 view .LVU284 + 519:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_exti.c **** + 520:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_exti.c **** /* Check parameters */ + 521:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_exti.c **** assert_param(IS_EXTI_LINE(hexti->Line)); + 861 .loc 1 521 3 view .LVU285 + 522:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_exti.c **** assert_param(IS_EXTI_CONFIG_LINE(hexti->Line)); + 862 .loc 1 522 3 view .LVU286 + 523:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_exti.c **** + 524:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_exti.c **** /* Compute line mask */ + 525:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_exti.c **** maskline = (1uL << (hexti->Line & EXTI_PIN_MASK)); + 863 .loc 1 525 3 view .LVU287 + 864 .loc 1 525 28 is_stmt 0 view .LVU288 + 865 0000 0368 ldr r3, [r0] + 866 .loc 1 525 35 view .LVU289 + 867 0002 1F22 movs r2, #31 + 868 0004 1A40 ands r2, r3 + 869 .loc 1 525 12 view .LVU290 + 870 0006 0123 movs r3, #1 + 871 0008 9340 lsls r3, r3, r2 + 872 .LVL71: + 526:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_exti.c **** + 527:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_exti.c **** /* Generate Software interrupt */ + 528:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_exti.c **** EXTI->SWIER = maskline; + 873 .loc 1 528 3 is_stmt 1 view .LVU291 + 874 .loc 1 528 15 is_stmt 0 view .LVU292 + 875 000a 014A ldr r2, .L56 + 876 000c 1361 str r3, [r2, #16] + 529:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_exti.c **** } + 877 .loc 1 529 1 view .LVU293 + 878 @ sp needed + 879 000e 7047 bx lr + 880 .L57: + 881 .align 2 + 882 .L56: + 883 0010 00040140 .word 1073808384 + 884 .cfi_endproc + 885 .LFE48: + 887 .text + 888 .Letext0: + 889 .file 2 "/home/chiangni/.config/VSCodium/User/globalStorage/bmd.stm32-for-vscode/@xpack-dev-tools/ + 890 .file 3 "/home/chiangni/.config/VSCodium/User/globalStorage/bmd.stm32-for-vscode/@xpack-dev-tools/ + 891 .file 4 "Drivers/CMSIS/Device/ST/STM32F0xx/Include/stm32f042x6.h" + 892 .file 5 "Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_def.h" + 893 .file 6 "Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_exti.h" + ARM GAS /tmp/ccFacv4Y.s page 27 + + +DEFINED SYMBOLS + *ABS*:00000000 stm32f0xx_hal_exti.c + /tmp/ccFacv4Y.s:19 .text.HAL_EXTI_SetConfigLine:00000000 $t + /tmp/ccFacv4Y.s:25 .text.HAL_EXTI_SetConfigLine:00000000 HAL_EXTI_SetConfigLine + /tmp/ccFacv4Y.s:247 .text.HAL_EXTI_SetConfigLine:000000b8 $d + /tmp/ccFacv4Y.s:253 .text.HAL_EXTI_GetConfigLine:00000000 $t + /tmp/ccFacv4Y.s:259 .text.HAL_EXTI_GetConfigLine:00000000 HAL_EXTI_GetConfigLine + /tmp/ccFacv4Y.s:440 .text.HAL_EXTI_GetConfigLine:00000098 $d + /tmp/ccFacv4Y.s:446 .text.HAL_EXTI_ClearConfigLine:00000000 $t + /tmp/ccFacv4Y.s:452 .text.HAL_EXTI_ClearConfigLine:00000000 HAL_EXTI_ClearConfigLine + /tmp/ccFacv4Y.s:592 .text.HAL_EXTI_ClearConfigLine:00000068 $d + /tmp/ccFacv4Y.s:598 .text.HAL_EXTI_RegisterCallback:00000000 $t + /tmp/ccFacv4Y.s:604 .text.HAL_EXTI_RegisterCallback:00000000 HAL_EXTI_RegisterCallback + /tmp/ccFacv4Y.s:639 .text.HAL_EXTI_GetHandle:00000000 $t + /tmp/ccFacv4Y.s:645 .text.HAL_EXTI_GetHandle:00000000 HAL_EXTI_GetHandle + /tmp/ccFacv4Y.s:680 .text.HAL_EXTI_IRQHandler:00000000 $t + /tmp/ccFacv4Y.s:686 .text.HAL_EXTI_IRQHandler:00000000 HAL_EXTI_IRQHandler + /tmp/ccFacv4Y.s:742 .text.HAL_EXTI_IRQHandler:00000024 $d + /tmp/ccFacv4Y.s:747 .text.HAL_EXTI_GetPending:00000000 $t + /tmp/ccFacv4Y.s:753 .text.HAL_EXTI_GetPending:00000000 HAL_EXTI_GetPending + /tmp/ccFacv4Y.s:798 .text.HAL_EXTI_GetPending:00000014 $d + /tmp/ccFacv4Y.s:803 .text.HAL_EXTI_ClearPending:00000000 $t + /tmp/ccFacv4Y.s:809 .text.HAL_EXTI_ClearPending:00000000 HAL_EXTI_ClearPending + /tmp/ccFacv4Y.s:841 .text.HAL_EXTI_ClearPending:00000010 $d + /tmp/ccFacv4Y.s:846 .text.HAL_EXTI_GenerateSWI:00000000 $t + /tmp/ccFacv4Y.s:852 .text.HAL_EXTI_GenerateSWI:00000000 HAL_EXTI_GenerateSWI + /tmp/ccFacv4Y.s:883 .text.HAL_EXTI_GenerateSWI:00000010 $d + +NO UNDEFINED SYMBOLS diff --git a/Software/build/stm32f0xx_hal_exti.o b/Software/build/stm32f0xx_hal_exti.o new file mode 100644 index 0000000..965e39e Binary files /dev/null and b/Software/build/stm32f0xx_hal_exti.o differ diff --git a/Software/build/stm32f0xx_hal_flash.d b/Software/build/stm32f0xx_hal_flash.d new file mode 100644 index 0000000..8af504e --- /dev/null +++ b/Software/build/stm32f0xx_hal_flash.d @@ -0,0 +1,60 @@ +build/stm32f0xx_hal_flash.o: \ + Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash.c \ + Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal.h \ + Core/Inc/stm32f0xx_hal_conf.h \ + Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_rcc.h \ + Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_def.h \ + Drivers/CMSIS/Device/ST/STM32F0xx/Include/stm32f0xx.h \ + Drivers/CMSIS/Device/ST/STM32F0xx/Include/stm32f042x6.h \ + Drivers/CMSIS/Include/core_cm0.h Drivers/CMSIS/Include/cmsis_version.h \ + Drivers/CMSIS/Include/cmsis_compiler.h Drivers/CMSIS/Include/cmsis_gcc.h \ + Drivers/CMSIS/Device/ST/STM32F0xx/Include/system_stm32f0xx.h \ + Drivers/STM32F0xx_HAL_Driver/Inc/Legacy/stm32_hal_legacy.h \ + Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_rcc_ex.h \ + Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_gpio.h \ + Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_gpio_ex.h \ + Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_exti.h \ + Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_dma.h \ + Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_dma_ex.h \ + Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_cortex.h \ + Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_adc.h \ + Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_adc_ex.h \ + Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_can.h \ + Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_flash.h \ + Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_flash_ex.h \ + Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_i2c.h \ + Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_i2c_ex.h \ + Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_pwr.h \ + Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_pwr_ex.h \ + Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_tim.h \ + Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_tim_ex.h +Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal.h: +Core/Inc/stm32f0xx_hal_conf.h: +Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_rcc.h: +Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_def.h: +Drivers/CMSIS/Device/ST/STM32F0xx/Include/stm32f0xx.h: +Drivers/CMSIS/Device/ST/STM32F0xx/Include/stm32f042x6.h: +Drivers/CMSIS/Include/core_cm0.h: +Drivers/CMSIS/Include/cmsis_version.h: +Drivers/CMSIS/Include/cmsis_compiler.h: +Drivers/CMSIS/Include/cmsis_gcc.h: +Drivers/CMSIS/Device/ST/STM32F0xx/Include/system_stm32f0xx.h: +Drivers/STM32F0xx_HAL_Driver/Inc/Legacy/stm32_hal_legacy.h: +Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_rcc_ex.h: +Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_gpio.h: +Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_gpio_ex.h: +Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_exti.h: +Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_dma.h: +Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_dma_ex.h: +Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_cortex.h: +Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_adc.h: +Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_adc_ex.h: +Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_can.h: +Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_flash.h: +Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_flash_ex.h: +Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_i2c.h: +Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_i2c_ex.h: +Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_pwr.h: +Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_pwr_ex.h: +Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_tim.h: +Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_tim_ex.h: diff --git a/Software/build/stm32f0xx_hal_flash.lst b/Software/build/stm32f0xx_hal_flash.lst new file mode 100644 index 0000000..ed64bb1 --- /dev/null +++ b/Software/build/stm32f0xx_hal_flash.lst @@ -0,0 +1,2253 @@ +ARM GAS /tmp/ccgY7Mgl.s page 1 + + + 1 .cpu cortex-m0 + 2 .arch armv6s-m + 3 .fpu softvfp + 4 .eabi_attribute 20, 1 + 5 .eabi_attribute 21, 1 + 6 .eabi_attribute 23, 3 + 7 .eabi_attribute 24, 1 + 8 .eabi_attribute 25, 1 + 9 .eabi_attribute 26, 1 + 10 .eabi_attribute 30, 1 + 11 .eabi_attribute 34, 0 + 12 .eabi_attribute 18, 4 + 13 .file "stm32f0xx_hal_flash.c" + 14 .text + 15 .Ltext0: + 16 .cfi_sections .debug_frame + 17 .file 1 "Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash.c" + 18 .section .text.FLASH_Program_HalfWord,"ax",%progbits + 19 .align 1 + 20 .syntax unified + 21 .code 16 + 22 .thumb_func + 24 FLASH_Program_HalfWord: + 25 .LVL0: + 26 .LFB51: + 1:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash.c **** /** + 2:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash.c **** ****************************************************************************** + 3:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash.c **** * @file stm32f0xx_hal_flash.c + 4:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash.c **** * @author MCD Application Team + 5:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash.c **** * @brief FLASH HAL module driver. + 6:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash.c **** * This file provides firmware functions to manage the following + 7:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash.c **** * functionalities of the internal FLASH memory: + 8:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash.c **** * + Program operations functions + 9:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash.c **** * + Memory Control functions + 10:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash.c **** * + Peripheral State functions + 11:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash.c **** * + 12:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash.c **** @verbatim + 13:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash.c **** ============================================================================== + 14:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash.c **** ##### FLASH peripheral features ##### + 15:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash.c **** ============================================================================== + 16:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash.c **** [..] The Flash memory interface manages CPU AHB I-Code and D-Code accesses + 17:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash.c **** to the Flash memory. It implements the erase and program Flash memory operations + 18:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash.c **** and the read and write protection mechanisms. + 19:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash.c **** + 20:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash.c **** [..] The Flash memory interface accelerates code execution with a system of instruction + 21:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash.c **** prefetch. + 22:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash.c **** + 23:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash.c **** [..] The FLASH main features are: + 24:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash.c **** (+) Flash memory read operations + 25:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash.c **** (+) Flash memory program/erase operations + 26:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash.c **** (+) Read / write protections + 27:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash.c **** (+) Prefetch on I-Code + 28:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash.c **** (+) Option Bytes programming + 29:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash.c **** + 30:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash.c **** + 31:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash.c **** ##### How to use this driver ##### + 32:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash.c **** ============================================================================== + ARM GAS /tmp/ccgY7Mgl.s page 2 + + + 33:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash.c **** [..] + 34:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash.c **** This driver provides functions and macros to configure and program the FLASH + 35:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash.c **** memory of all STM32F0xx devices. + 36:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash.c **** + 37:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash.c **** (#) FLASH Memory I/O Programming functions: this group includes all needed + 38:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash.c **** functions to erase and program the main memory: + 39:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash.c **** (++) Lock and Unlock the FLASH interface + 40:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash.c **** (++) Erase function: Erase page, erase all pages + 41:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash.c **** (++) Program functions: half word, word and doubleword + 42:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash.c **** (#) FLASH Option Bytes Programming functions: this group includes all needed + 43:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash.c **** functions to manage the Option Bytes: + 44:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash.c **** (++) Lock and Unlock the Option Bytes + 45:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash.c **** (++) Set/Reset the write protection + 46:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash.c **** (++) Set the Read protection Level + 47:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash.c **** (++) Program the user Option Bytes + 48:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash.c **** (++) Launch the Option Bytes loader + 49:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash.c **** (++) Erase Option Bytes + 50:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash.c **** (++) Program the data Option Bytes + 51:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash.c **** (++) Get the Write protection. + 52:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash.c **** (++) Get the user option bytes. + 53:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash.c **** + 54:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash.c **** (#) Interrupts and flags management functions : this group + 55:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash.c **** includes all needed functions to: + 56:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash.c **** (++) Handle FLASH interrupts + 57:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash.c **** (++) Wait for last FLASH operation according to its status + 58:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash.c **** (++) Get error flag status + 59:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash.c **** + 60:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash.c **** [..] In addition to these function, this driver includes a set of macros allowing + 61:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash.c **** to handle the following operations: + 62:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash.c **** + 63:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash.c **** (+) Set/Get the latency + 64:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash.c **** (+) Enable/Disable the prefetch buffer + 65:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash.c **** (+) Enable/Disable the FLASH interrupts + 66:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash.c **** (+) Monitor the FLASH flags status + 67:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash.c **** + 68:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash.c **** @endverbatim + 69:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash.c **** ****************************************************************************** + 70:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash.c **** * @attention + 71:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash.c **** * + 72:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash.c **** * Copyright (c) 2016 STMicroelectronics. + 73:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash.c **** * All rights reserved. + 74:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash.c **** * + 75:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash.c **** * This software is licensed under terms that can be found in the LICENSE file in + 76:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash.c **** * the root directory of this software component. + 77:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash.c **** * If no LICENSE file comes with this software, it is provided AS-IS. + 78:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash.c **** ****************************************************************************** + 79:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash.c **** */ + 80:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash.c **** + 81:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash.c **** /* Includes ------------------------------------------------------------------*/ + 82:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash.c **** #include "stm32f0xx_hal.h" + 83:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash.c **** + 84:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash.c **** /** @addtogroup STM32F0xx_HAL_Driver + 85:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash.c **** * @{ + 86:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash.c **** */ + 87:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash.c **** + 88:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash.c **** #ifdef HAL_FLASH_MODULE_ENABLED + 89:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash.c **** + ARM GAS /tmp/ccgY7Mgl.s page 3 + + + 90:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash.c **** /** @defgroup FLASH FLASH + 91:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash.c **** * @brief FLASH HAL module driver + 92:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash.c **** * @{ + 93:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash.c **** */ + 94:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash.c **** + 95:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash.c **** /* Private typedef -----------------------------------------------------------*/ + 96:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash.c **** /* Private define ------------------------------------------------------------*/ + 97:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash.c **** /** @defgroup FLASH_Private_Constants FLASH Private Constants + 98:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash.c **** * @{ + 99:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash.c **** */ + 100:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash.c **** /** + 101:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash.c **** * @} + 102:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash.c **** */ + 103:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash.c **** + 104:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash.c **** /* Private macro ---------------------------- ---------------------------------*/ + 105:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash.c **** /** @defgroup FLASH_Private_Macros FLASH Private Macros + 106:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash.c **** * @{ + 107:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash.c **** */ + 108:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash.c **** + 109:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash.c **** /** + 110:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash.c **** * @} + 111:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash.c **** */ + 112:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash.c **** + 113:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash.c **** /* Private variables ---------------------------------------------------------*/ + 114:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash.c **** /** @defgroup FLASH_Private_Variables FLASH Private Variables + 115:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash.c **** * @{ + 116:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash.c **** */ + 117:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash.c **** /* Variables used for Erase pages under interruption*/ + 118:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash.c **** FLASH_ProcessTypeDef pFlash; + 119:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash.c **** /** + 120:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash.c **** * @} + 121:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash.c **** */ + 122:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash.c **** + 123:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash.c **** /* Private function prototypes -----------------------------------------------*/ + 124:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash.c **** /** @defgroup FLASH_Private_Functions FLASH Private Functions + 125:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash.c **** * @{ + 126:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash.c **** */ + 127:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash.c **** static void FLASH_Program_HalfWord(uint32_t Address, uint16_t Data); + 128:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash.c **** static void FLASH_SetErrorCode(void); + 129:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash.c **** extern void FLASH_PageErase(uint32_t PageAddress); + 130:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash.c **** /** + 131:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash.c **** * @} + 132:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash.c **** */ + 133:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash.c **** + 134:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash.c **** /* Exported functions ---------------------------------------------------------*/ + 135:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash.c **** /** @defgroup FLASH_Exported_Functions FLASH Exported Functions + 136:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash.c **** * @{ + 137:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash.c **** */ + 138:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash.c **** + 139:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash.c **** /** @defgroup FLASH_Exported_Functions_Group1 Programming operation functions + 140:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash.c **** * @brief Programming operation functions + 141:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash.c **** * + 142:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash.c **** @verbatim + 143:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash.c **** @endverbatim + 144:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash.c **** * @{ + 145:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash.c **** */ + 146:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash.c **** + ARM GAS /tmp/ccgY7Mgl.s page 4 + + + 147:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash.c **** /** + 148:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash.c **** * @brief Program halfword, word or double word at a specified address + 149:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash.c **** * @note The function HAL_FLASH_Unlock() should be called before to unlock the FLASH interface + 150:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash.c **** * The function HAL_FLASH_Lock() should be called after to lock the FLASH interface + 151:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash.c **** * + 152:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash.c **** * @note If an erase and a program operations are requested simultaneously, + 153:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash.c **** * the erase operation is performed before the program one. + 154:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash.c **** * + 155:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash.c **** * @note FLASH should be previously erased before new programming (only exception to this + 156:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash.c **** * is when 0x0000 is programmed) + 157:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash.c **** * + 158:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash.c **** * @param TypeProgram Indicate the way to program at a specified address. + 159:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash.c **** * This parameter can be a value of @ref FLASH_Type_Program + 160:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash.c **** * @param Address Specifie the address to be programmed. + 161:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash.c **** * @param Data Specifie the data to be programmed + 162:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash.c **** * + 163:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash.c **** * @retval HAL_StatusTypeDef HAL Status + 164:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash.c **** */ + 165:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash.c **** HAL_StatusTypeDef HAL_FLASH_Program(uint32_t TypeProgram, uint32_t Address, uint64_t Data) + 166:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash.c **** { + 167:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash.c **** HAL_StatusTypeDef status = HAL_ERROR; + 168:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash.c **** uint8_t index = 0U; + 169:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash.c **** uint8_t nbiterations = 0U; + 170:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash.c **** + 171:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash.c **** /* Process Locked */ + 172:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash.c **** __HAL_LOCK(&pFlash); + 173:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash.c **** + 174:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash.c **** /* Check the parameters */ + 175:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash.c **** assert_param(IS_FLASH_TYPEPROGRAM(TypeProgram)); + 176:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash.c **** assert_param(IS_FLASH_PROGRAM_ADDRESS(Address)); + 177:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash.c **** + 178:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash.c **** /* Wait for last operation to be completed */ + 179:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash.c **** status = FLASH_WaitForLastOperation(FLASH_TIMEOUT_VALUE); + 180:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash.c **** + 181:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash.c **** if(status == HAL_OK) + 182:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash.c **** { + 183:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash.c **** if(TypeProgram == FLASH_TYPEPROGRAM_HALFWORD) + 184:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash.c **** { + 185:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash.c **** /* Program halfword (16-bit) at a specified address. */ + 186:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash.c **** nbiterations = 1U; + 187:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash.c **** } + 188:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash.c **** else if(TypeProgram == FLASH_TYPEPROGRAM_WORD) + 189:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash.c **** { + 190:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash.c **** /* Program word (32-bit = 2*16-bit) at a specified address. */ + 191:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash.c **** nbiterations = 2U; + 192:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash.c **** } + 193:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash.c **** else + 194:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash.c **** { + 195:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash.c **** /* Program double word (64-bit = 4*16-bit) at a specified address. */ + 196:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash.c **** nbiterations = 4U; + 197:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash.c **** } + 198:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash.c **** + 199:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash.c **** for (index = 0U; index < nbiterations; index++) + 200:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash.c **** { + 201:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash.c **** FLASH_Program_HalfWord((Address + (2U*index)), (uint16_t)(Data >> (16U*index))); + 202:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash.c **** + 203:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash.c **** /* Wait for last operation to be completed */ + ARM GAS /tmp/ccgY7Mgl.s page 5 + + + 204:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash.c **** status = FLASH_WaitForLastOperation(FLASH_TIMEOUT_VALUE); + 205:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash.c **** + 206:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash.c **** /* If the program operation is completed, disable the PG Bit */ + 207:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash.c **** CLEAR_BIT(FLASH->CR, FLASH_CR_PG); + 208:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash.c **** /* In case of error, stop programming procedure */ + 209:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash.c **** if (status != HAL_OK) + 210:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash.c **** { + 211:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash.c **** break; + 212:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash.c **** } + 213:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash.c **** } + 214:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash.c **** } + 215:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash.c **** + 216:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash.c **** /* Process Unlocked */ + 217:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash.c **** __HAL_UNLOCK(&pFlash); + 218:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash.c **** + 219:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash.c **** return status; + 220:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash.c **** } + 221:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash.c **** + 222:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash.c **** /** + 223:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash.c **** * @brief Program halfword, word or double word at a specified address with interrupt enabled. + 224:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash.c **** * @note The function HAL_FLASH_Unlock() should be called before to unlock the FLASH interface + 225:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash.c **** * The function HAL_FLASH_Lock() should be called after to lock the FLASH interface + 226:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash.c **** * + 227:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash.c **** * @note If an erase and a program operations are requested simultaneously, + 228:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash.c **** * the erase operation is performed before the program one. + 229:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash.c **** * + 230:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash.c **** * @param TypeProgram Indicate the way to program at a specified address. + 231:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash.c **** * This parameter can be a value of @ref FLASH_Type_Program + 232:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash.c **** * @param Address Specifie the address to be programmed. + 233:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash.c **** * @param Data Specifie the data to be programmed + 234:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash.c **** * + 235:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash.c **** * @retval HAL_StatusTypeDef HAL Status + 236:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash.c **** */ + 237:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash.c **** HAL_StatusTypeDef HAL_FLASH_Program_IT(uint32_t TypeProgram, uint32_t Address, uint64_t Data) + 238:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash.c **** { + 239:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash.c **** HAL_StatusTypeDef status = HAL_OK; + 240:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash.c **** + 241:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash.c **** /* Process Locked */ + 242:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash.c **** __HAL_LOCK(&pFlash); + 243:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash.c **** + 244:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash.c **** /* Check the parameters */ + 245:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash.c **** assert_param(IS_FLASH_TYPEPROGRAM(TypeProgram)); + 246:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash.c **** assert_param(IS_FLASH_PROGRAM_ADDRESS(Address)); + 247:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash.c **** + 248:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash.c **** /* Enable End of FLASH Operation and Error source interrupts */ + 249:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash.c **** __HAL_FLASH_ENABLE_IT(FLASH_IT_EOP | FLASH_IT_ERR); + 250:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash.c **** + 251:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash.c **** pFlash.Address = Address; + 252:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash.c **** pFlash.Data = Data; + 253:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash.c **** + 254:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash.c **** if(TypeProgram == FLASH_TYPEPROGRAM_HALFWORD) + 255:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash.c **** { + 256:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash.c **** pFlash.ProcedureOnGoing = FLASH_PROC_PROGRAMHALFWORD; + 257:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash.c **** /* Program halfword (16-bit) at a specified address. */ + 258:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash.c **** pFlash.DataRemaining = 1U; + 259:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash.c **** } + 260:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash.c **** else if(TypeProgram == FLASH_TYPEPROGRAM_WORD) + ARM GAS /tmp/ccgY7Mgl.s page 6 + + + 261:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash.c **** { + 262:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash.c **** pFlash.ProcedureOnGoing = FLASH_PROC_PROGRAMWORD; + 263:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash.c **** /* Program word (32-bit : 2*16-bit) at a specified address. */ + 264:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash.c **** pFlash.DataRemaining = 2U; + 265:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash.c **** } + 266:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash.c **** else + 267:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash.c **** { + 268:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash.c **** pFlash.ProcedureOnGoing = FLASH_PROC_PROGRAMDOUBLEWORD; + 269:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash.c **** /* Program double word (64-bit : 4*16-bit) at a specified address. */ + 270:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash.c **** pFlash.DataRemaining = 4U; + 271:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash.c **** } + 272:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash.c **** + 273:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash.c **** /* Program halfword (16-bit) at a specified address. */ + 274:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash.c **** FLASH_Program_HalfWord(Address, (uint16_t)Data); + 275:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash.c **** + 276:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash.c **** return status; + 277:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash.c **** } + 278:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash.c **** + 279:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash.c **** /** + 280:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash.c **** * @brief This function handles FLASH interrupt request. + 281:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash.c **** * @retval None + 282:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash.c **** */ + 283:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash.c **** void HAL_FLASH_IRQHandler(void) + 284:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash.c **** { + 285:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash.c **** uint32_t addresstmp = 0U; + 286:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash.c **** + 287:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash.c **** /* Check FLASH operation error flags */ + 288:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash.c **** if(__HAL_FLASH_GET_FLAG(FLASH_FLAG_WRPERR) ||__HAL_FLASH_GET_FLAG(FLASH_FLAG_PGERR)) + 289:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash.c **** { + 290:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash.c **** /* Return the faulty address */ + 291:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash.c **** addresstmp = pFlash.Address; + 292:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash.c **** /* Reset address */ + 293:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash.c **** pFlash.Address = 0xFFFFFFFFU; + 294:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash.c **** + 295:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash.c **** /* Save the Error code */ + 296:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash.c **** FLASH_SetErrorCode(); + 297:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash.c **** + 298:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash.c **** /* FLASH error interrupt user callback */ + 299:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash.c **** HAL_FLASH_OperationErrorCallback(addresstmp); + 300:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash.c **** + 301:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash.c **** /* Stop the procedure ongoing */ + 302:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash.c **** pFlash.ProcedureOnGoing = FLASH_PROC_NONE; + 303:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash.c **** } + 304:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash.c **** + 305:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash.c **** /* Check FLASH End of Operation flag */ + 306:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash.c **** if(__HAL_FLASH_GET_FLAG(FLASH_FLAG_EOP)) + 307:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash.c **** { + 308:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash.c **** /* Clear FLASH End of Operation pending bit */ + 309:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash.c **** __HAL_FLASH_CLEAR_FLAG(FLASH_FLAG_EOP); + 310:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash.c **** + 311:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash.c **** /* Process can continue only if no error detected */ + 312:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash.c **** if(pFlash.ProcedureOnGoing != FLASH_PROC_NONE) + 313:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash.c **** { + 314:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash.c **** if(pFlash.ProcedureOnGoing == FLASH_PROC_PAGEERASE) + 315:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash.c **** { + 316:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash.c **** /* Nb of pages to erased can be decreased */ + 317:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash.c **** pFlash.DataRemaining--; + ARM GAS /tmp/ccgY7Mgl.s page 7 + + + 318:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash.c **** + 319:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash.c **** /* Check if there are still pages to erase */ + 320:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash.c **** if(pFlash.DataRemaining != 0U) + 321:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash.c **** { + 322:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash.c **** addresstmp = pFlash.Address; + 323:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash.c **** /*Indicate user which sector has been erased */ + 324:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash.c **** HAL_FLASH_EndOfOperationCallback(addresstmp); + 325:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash.c **** + 326:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash.c **** /*Increment sector number*/ + 327:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash.c **** addresstmp = pFlash.Address + FLASH_PAGE_SIZE; + 328:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash.c **** pFlash.Address = addresstmp; + 329:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash.c **** + 330:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash.c **** /* If the erase operation is completed, disable the PER Bit */ + 331:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash.c **** CLEAR_BIT(FLASH->CR, FLASH_CR_PER); + 332:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash.c **** + 333:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash.c **** FLASH_PageErase(addresstmp); + 334:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash.c **** } + 335:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash.c **** else + 336:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash.c **** { + 337:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash.c **** /* No more pages to Erase, user callback can be called. */ + 338:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash.c **** /* Reset Sector and stop Erase pages procedure */ + 339:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash.c **** pFlash.Address = addresstmp = 0xFFFFFFFFU; + 340:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash.c **** pFlash.ProcedureOnGoing = FLASH_PROC_NONE; + 341:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash.c **** /* FLASH EOP interrupt user callback */ + 342:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash.c **** HAL_FLASH_EndOfOperationCallback(addresstmp); + 343:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash.c **** } + 344:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash.c **** } + 345:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash.c **** else if(pFlash.ProcedureOnGoing == FLASH_PROC_MASSERASE) + 346:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash.c **** { + 347:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash.c **** /* Operation is completed, disable the MER Bit */ + 348:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash.c **** CLEAR_BIT(FLASH->CR, FLASH_CR_MER); + 349:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash.c **** + 350:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash.c **** /* MassErase ended. Return the selected bank */ + 351:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash.c **** /* FLASH EOP interrupt user callback */ + 352:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash.c **** HAL_FLASH_EndOfOperationCallback(0); + 353:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash.c **** + 354:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash.c **** /* Stop Mass Erase procedure*/ + 355:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash.c **** pFlash.ProcedureOnGoing = FLASH_PROC_NONE; + 356:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash.c **** } + 357:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash.c **** else + 358:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash.c **** { + 359:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash.c **** /* Nb of 16-bit data to program can be decreased */ + 360:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash.c **** pFlash.DataRemaining--; + 361:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash.c **** + 362:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash.c **** /* Check if there are still 16-bit data to program */ + 363:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash.c **** if(pFlash.DataRemaining != 0U) + 364:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash.c **** { + 365:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash.c **** /* Increment address to 16-bit */ + 366:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash.c **** pFlash.Address += 2; + 367:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash.c **** addresstmp = pFlash.Address; + 368:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash.c **** + 369:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash.c **** /* Shift to have next 16-bit data */ + 370:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash.c **** pFlash.Data = (pFlash.Data >> 16U); + 371:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash.c **** + 372:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash.c **** /* Operation is completed, disable the PG Bit */ + 373:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash.c **** CLEAR_BIT(FLASH->CR, FLASH_CR_PG); + 374:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash.c **** + ARM GAS /tmp/ccgY7Mgl.s page 8 + + + 375:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash.c **** /*Program halfword (16-bit) at a specified address.*/ + 376:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash.c **** FLASH_Program_HalfWord(addresstmp, (uint16_t)pFlash.Data); + 377:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash.c **** } + 378:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash.c **** else + 379:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash.c **** { + 380:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash.c **** /* Program ended. Return the selected address */ + 381:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash.c **** /* FLASH EOP interrupt user callback */ + 382:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash.c **** if (pFlash.ProcedureOnGoing == FLASH_PROC_PROGRAMHALFWORD) + 383:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash.c **** { + 384:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash.c **** HAL_FLASH_EndOfOperationCallback(pFlash.Address); + 385:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash.c **** } + 386:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash.c **** else if (pFlash.ProcedureOnGoing == FLASH_PROC_PROGRAMWORD) + 387:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash.c **** { + 388:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash.c **** HAL_FLASH_EndOfOperationCallback(pFlash.Address - 2U); + 389:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash.c **** } + 390:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash.c **** else + 391:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash.c **** { + 392:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash.c **** HAL_FLASH_EndOfOperationCallback(pFlash.Address - 6U); + 393:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash.c **** } + 394:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash.c **** + 395:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash.c **** /* Reset Address and stop Program procedure */ + 396:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash.c **** pFlash.Address = 0xFFFFFFFFU; + 397:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash.c **** pFlash.ProcedureOnGoing = FLASH_PROC_NONE; + 398:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash.c **** } + 399:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash.c **** } + 400:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash.c **** } + 401:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash.c **** } + 402:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash.c **** + 403:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash.c **** + 404:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash.c **** if(pFlash.ProcedureOnGoing == FLASH_PROC_NONE) + 405:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash.c **** { + 406:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash.c **** /* Operation is completed, disable the PG, PER and MER Bits */ + 407:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash.c **** CLEAR_BIT(FLASH->CR, (FLASH_CR_PG | FLASH_CR_PER | FLASH_CR_MER)); + 408:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash.c **** + 409:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash.c **** /* Disable End of FLASH Operation and Error source interrupts */ + 410:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash.c **** __HAL_FLASH_DISABLE_IT(FLASH_IT_EOP | FLASH_IT_ERR); + 411:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash.c **** + 412:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash.c **** /* Process Unlocked */ + 413:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash.c **** __HAL_UNLOCK(&pFlash); + 414:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash.c **** } + 415:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash.c **** } + 416:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash.c **** + 417:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash.c **** /** + 418:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash.c **** * @brief FLASH end of operation interrupt callback + 419:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash.c **** * @param ReturnValue The value saved in this parameter depends on the ongoing procedure + 420:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash.c **** * - Mass Erase: No return value expected + 421:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash.c **** * - Pages Erase: Address of the page which has been erased + 422:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash.c **** * (if 0xFFFFFFFF, it means that all the selected pages have been erased) + 423:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash.c **** * - Program: Address which was selected for data program + 424:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash.c **** * @retval none + 425:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash.c **** */ + 426:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash.c **** __weak void HAL_FLASH_EndOfOperationCallback(uint32_t ReturnValue) + 427:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash.c **** { + 428:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash.c **** /* Prevent unused argument(s) compilation warning */ + 429:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash.c **** UNUSED(ReturnValue); + 430:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash.c **** + 431:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash.c **** /* NOTE : This function Should not be modified, when the callback is needed, + ARM GAS /tmp/ccgY7Mgl.s page 9 + + + 432:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash.c **** the HAL_FLASH_EndOfOperationCallback could be implemented in the user file + 433:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash.c **** */ + 434:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash.c **** } + 435:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash.c **** + 436:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash.c **** /** + 437:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash.c **** * @brief FLASH operation error interrupt callback + 438:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash.c **** * @param ReturnValue The value saved in this parameter depends on the ongoing procedure + 439:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash.c **** * - Mass Erase: No return value expected + 440:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash.c **** * - Pages Erase: Address of the page which returned an error + 441:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash.c **** * - Program: Address which was selected for data program + 442:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash.c **** * @retval none + 443:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash.c **** */ + 444:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash.c **** __weak void HAL_FLASH_OperationErrorCallback(uint32_t ReturnValue) + 445:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash.c **** { + 446:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash.c **** /* Prevent unused argument(s) compilation warning */ + 447:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash.c **** UNUSED(ReturnValue); + 448:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash.c **** + 449:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash.c **** /* NOTE : This function Should not be modified, when the callback is needed, + 450:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash.c **** the HAL_FLASH_OperationErrorCallback could be implemented in the user file + 451:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash.c **** */ + 452:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash.c **** } + 453:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash.c **** + 454:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash.c **** /** + 455:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash.c **** * @} + 456:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash.c **** */ + 457:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash.c **** + 458:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash.c **** /** @defgroup FLASH_Exported_Functions_Group2 Peripheral Control functions + 459:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash.c **** * @brief management functions + 460:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash.c **** * + 461:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash.c **** @verbatim + 462:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash.c **** =============================================================================== + 463:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash.c **** ##### Peripheral Control functions ##### + 464:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash.c **** =============================================================================== + 465:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash.c **** [..] + 466:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash.c **** This subsection provides a set of functions allowing to control the FLASH + 467:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash.c **** memory operations. + 468:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash.c **** + 469:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash.c **** @endverbatim + 470:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash.c **** * @{ + 471:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash.c **** */ + 472:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash.c **** + 473:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash.c **** /** + 474:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash.c **** * @brief Unlock the FLASH control register access + 475:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash.c **** * @retval HAL Status + 476:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash.c **** */ + 477:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash.c **** HAL_StatusTypeDef HAL_FLASH_Unlock(void) + 478:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash.c **** { + 479:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash.c **** HAL_StatusTypeDef status = HAL_OK; + 480:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash.c **** + 481:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash.c **** if(READ_BIT(FLASH->CR, FLASH_CR_LOCK) != RESET) + 482:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash.c **** { + 483:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash.c **** /* Authorize the FLASH Registers access */ + 484:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash.c **** WRITE_REG(FLASH->KEYR, FLASH_KEY1); + 485:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash.c **** WRITE_REG(FLASH->KEYR, FLASH_KEY2); + 486:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash.c **** + 487:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash.c **** /* Verify Flash is unlocked */ + 488:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash.c **** if(READ_BIT(FLASH->CR, FLASH_CR_LOCK) != RESET) + ARM GAS /tmp/ccgY7Mgl.s page 10 + + + 489:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash.c **** { + 490:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash.c **** status = HAL_ERROR; + 491:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash.c **** } + 492:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash.c **** } + 493:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash.c **** + 494:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash.c **** return status; + 495:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash.c **** } + 496:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash.c **** + 497:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash.c **** /** + 498:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash.c **** * @brief Locks the FLASH control register access + 499:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash.c **** * @retval HAL Status + 500:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash.c **** */ + 501:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash.c **** HAL_StatusTypeDef HAL_FLASH_Lock(void) + 502:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash.c **** { + 503:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash.c **** /* Set the LOCK Bit to lock the FLASH Registers access */ + 504:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash.c **** SET_BIT(FLASH->CR, FLASH_CR_LOCK); + 505:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash.c **** + 506:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash.c **** return HAL_OK; + 507:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash.c **** } + 508:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash.c **** + 509:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash.c **** /** + 510:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash.c **** * @brief Unlock the FLASH Option Control Registers access. + 511:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash.c **** * @retval HAL Status + 512:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash.c **** */ + 513:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash.c **** HAL_StatusTypeDef HAL_FLASH_OB_Unlock(void) + 514:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash.c **** { + 515:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash.c **** if (HAL_IS_BIT_CLR(FLASH->CR, FLASH_CR_OPTWRE)) + 516:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash.c **** { + 517:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash.c **** /* Authorizes the Option Byte register programming */ + 518:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash.c **** WRITE_REG(FLASH->OPTKEYR, FLASH_OPTKEY1); + 519:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash.c **** WRITE_REG(FLASH->OPTKEYR, FLASH_OPTKEY2); + 520:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash.c **** } + 521:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash.c **** else + 522:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash.c **** { + 523:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash.c **** return HAL_ERROR; + 524:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash.c **** } + 525:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash.c **** + 526:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash.c **** return HAL_OK; + 527:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash.c **** } + 528:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash.c **** + 529:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash.c **** /** + 530:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash.c **** * @brief Lock the FLASH Option Control Registers access. + 531:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash.c **** * @retval HAL Status + 532:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash.c **** */ + 533:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash.c **** HAL_StatusTypeDef HAL_FLASH_OB_Lock(void) + 534:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash.c **** { + 535:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash.c **** /* Clear the OPTWRE Bit to lock the FLASH Option Byte Registers access */ + 536:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash.c **** CLEAR_BIT(FLASH->CR, FLASH_CR_OPTWRE); + 537:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash.c **** + 538:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash.c **** return HAL_OK; + 539:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash.c **** } + 540:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash.c **** + 541:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash.c **** /** + 542:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash.c **** * @brief Launch the option byte loading. + 543:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash.c **** * @note This function will reset automatically the MCU. + 544:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash.c **** * @retval HAL Status + 545:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash.c **** */ + ARM GAS /tmp/ccgY7Mgl.s page 11 + + + 546:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash.c **** HAL_StatusTypeDef HAL_FLASH_OB_Launch(void) + 547:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash.c **** { + 548:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash.c **** /* Set the OBL_Launch bit to launch the option byte loading */ + 549:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash.c **** SET_BIT(FLASH->CR, FLASH_CR_OBL_LAUNCH); + 550:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash.c **** + 551:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash.c **** /* Wait for last operation to be completed */ + 552:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash.c **** return(FLASH_WaitForLastOperation(FLASH_TIMEOUT_VALUE)); + 553:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash.c **** } + 554:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash.c **** + 555:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash.c **** /** + 556:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash.c **** * @} + 557:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash.c **** */ + 558:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash.c **** + 559:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash.c **** /** @defgroup FLASH_Exported_Functions_Group3 Peripheral errors functions + 560:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash.c **** * @brief Peripheral errors functions + 561:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash.c **** * + 562:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash.c **** @verbatim + 563:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash.c **** =============================================================================== + 564:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash.c **** ##### Peripheral Errors functions ##### + 565:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash.c **** =============================================================================== + 566:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash.c **** [..] + 567:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash.c **** This subsection permit to get in run-time errors of the FLASH peripheral. + 568:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash.c **** + 569:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash.c **** @endverbatim + 570:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash.c **** * @{ + 571:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash.c **** */ + 572:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash.c **** + 573:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash.c **** /** + 574:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash.c **** * @brief Get the specific FLASH error flag. + 575:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash.c **** * @retval FLASH_ErrorCode The returned value can be: + 576:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash.c **** * @ref FLASH_Error_Codes + 577:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash.c **** */ + 578:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash.c **** uint32_t HAL_FLASH_GetError(void) + 579:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash.c **** { + 580:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash.c **** return pFlash.ErrorCode; + 581:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash.c **** } + 582:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash.c **** + 583:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash.c **** /** + 584:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash.c **** * @} + 585:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash.c **** */ + 586:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash.c **** + 587:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash.c **** /** + 588:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash.c **** * @} + 589:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash.c **** */ + 590:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash.c **** + 591:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash.c **** /** @addtogroup FLASH_Private_Functions + 592:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash.c **** * @{ + 593:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash.c **** */ + 594:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash.c **** + 595:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash.c **** /** + 596:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash.c **** * @brief Program a half-word (16-bit) at a specified address. + 597:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash.c **** * @param Address specify the address to be programmed. + 598:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash.c **** * @param Data specify the data to be programmed. + 599:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash.c **** * @retval None + 600:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash.c **** */ + 601:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash.c **** static void FLASH_Program_HalfWord(uint32_t Address, uint16_t Data) + 602:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash.c **** { + ARM GAS /tmp/ccgY7Mgl.s page 12 + + + 27 .loc 1 602 1 view -0 + 28 .cfi_startproc + 29 @ args = 0, pretend = 0, frame = 0 + 30 @ frame_needed = 0, uses_anonymous_args = 0 + 31 .loc 1 602 1 is_stmt 0 view .LVU1 + 32 0000 10B5 push {r4, lr} + 33 .cfi_def_cfa_offset 8 + 34 .cfi_offset 4, -8 + 35 .cfi_offset 14, -4 + 603:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash.c **** /* Clean the error context */ + 604:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash.c **** pFlash.ErrorCode = HAL_FLASH_ERROR_NONE; + 36 .loc 1 604 3 is_stmt 1 view .LVU2 + 37 .loc 1 604 20 is_stmt 0 view .LVU3 + 38 0002 054B ldr r3, .L2 + 39 0004 0022 movs r2, #0 + 40 0006 DA61 str r2, [r3, #28] + 605:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash.c **** + 606:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash.c **** /* Proceed to program the new data */ + 607:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash.c **** SET_BIT(FLASH->CR, FLASH_CR_PG); + 41 .loc 1 607 5 is_stmt 1 view .LVU4 + 42 0008 044A ldr r2, .L2+4 + 43 000a 1369 ldr r3, [r2, #16] + 44 000c 0124 movs r4, #1 + 45 000e 2343 orrs r3, r4 + 46 0010 1361 str r3, [r2, #16] + 608:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash.c **** + 609:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash.c **** /* Write data in the address */ + 610:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash.c **** *(__IO uint16_t*)Address = Data; + 47 .loc 1 610 3 view .LVU5 + 48 .loc 1 610 28 is_stmt 0 view .LVU6 + 49 0012 0180 strh r1, [r0] + 611:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash.c **** } + 50 .loc 1 611 1 view .LVU7 + 51 @ sp needed + 52 0014 10BD pop {r4, pc} + 53 .L3: + 54 0016 C046 .align 2 + 55 .L2: + 56 0018 00000000 .word pFlash + 57 001c 00200240 .word 1073881088 + 58 .cfi_endproc + 59 .LFE51: + 61 .section .text.FLASH_SetErrorCode,"ax",%progbits + 62 .align 1 + 63 .syntax unified + 64 .code 16 + 65 .thumb_func + 67 FLASH_SetErrorCode: + 68 .LFB53: + 612:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash.c **** + 613:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash.c **** /** + 614:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash.c **** * @brief Wait for a FLASH operation to complete. + 615:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash.c **** * @param Timeout maximum flash operation timeout + 616:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash.c **** * @retval HAL Status + 617:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash.c **** */ + 618:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash.c **** HAL_StatusTypeDef FLASH_WaitForLastOperation(uint32_t Timeout) + 619:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash.c **** { + ARM GAS /tmp/ccgY7Mgl.s page 13 + + + 620:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash.c **** /* Wait for the FLASH operation to complete by polling on BUSY flag to be reset. + 621:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash.c **** Even if the FLASH operation fails, the BUSY flag will be reset and an error + 622:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash.c **** flag will be set */ + 623:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash.c **** + 624:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash.c **** uint32_t tickstart = HAL_GetTick(); + 625:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash.c **** + 626:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash.c **** while(__HAL_FLASH_GET_FLAG(FLASH_FLAG_BSY)) + 627:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash.c **** { + 628:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash.c **** if (Timeout != HAL_MAX_DELAY) + 629:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash.c **** { + 630:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash.c **** if((Timeout == 0U) || ((HAL_GetTick()-tickstart) > Timeout)) + 631:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash.c **** { + 632:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash.c **** return HAL_TIMEOUT; + 633:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash.c **** } + 634:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash.c **** } + 635:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash.c **** } + 636:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash.c **** + 637:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash.c **** /* Check FLASH End of Operation flag */ + 638:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash.c **** if (__HAL_FLASH_GET_FLAG(FLASH_FLAG_EOP)) + 639:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash.c **** { + 640:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash.c **** /* Clear FLASH End of Operation pending bit */ + 641:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash.c **** __HAL_FLASH_CLEAR_FLAG(FLASH_FLAG_EOP); + 642:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash.c **** } + 643:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash.c **** + 644:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash.c **** if(__HAL_FLASH_GET_FLAG(FLASH_FLAG_WRPERR) || + 645:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash.c **** __HAL_FLASH_GET_FLAG(FLASH_FLAG_PGERR)) + 646:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash.c **** { + 647:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash.c **** /*Save the error code*/ + 648:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash.c **** FLASH_SetErrorCode(); + 649:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash.c **** return HAL_ERROR; + 650:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash.c **** } + 651:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash.c **** + 652:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash.c **** /* There is no error flag set */ + 653:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash.c **** return HAL_OK; + 654:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash.c **** } + 655:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash.c **** + 656:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash.c **** + 657:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash.c **** /** + 658:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash.c **** * @brief Set the specific FLASH error flag. + 659:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash.c **** * @retval None + 660:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash.c **** */ + 661:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash.c **** static void FLASH_SetErrorCode(void) + 662:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash.c **** { + 69 .loc 1 662 1 is_stmt 1 view -0 + 70 .cfi_startproc + 71 @ args = 0, pretend = 0, frame = 0 + 72 @ frame_needed = 0, uses_anonymous_args = 0 + 73 @ link register save eliminated. + 663:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash.c **** uint32_t flags = 0U; + 74 .loc 1 663 3 view .LVU9 + 75 .LVL1: + 664:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash.c **** + 665:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash.c **** if(__HAL_FLASH_GET_FLAG(FLASH_FLAG_WRPERR)) + 76 .loc 1 665 3 view .LVU10 + 77 .loc 1 665 6 is_stmt 0 view .LVU11 + 78 0000 0D4B ldr r3, .L8 + 79 0002 DA68 ldr r2, [r3, #12] + ARM GAS /tmp/ccgY7Mgl.s page 14 + + + 80 0004 1021 movs r1, #16 + 81 0006 0B00 movs r3, r1 + 82 0008 1340 ands r3, r2 + 83 .loc 1 665 5 view .LVU12 + 84 000a 1142 tst r1, r2 + 85 000c 05D0 beq .L5 + 666:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash.c **** { + 667:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash.c **** pFlash.ErrorCode |= HAL_FLASH_ERROR_WRP; + 86 .loc 1 667 5 is_stmt 1 view .LVU13 + 87 .loc 1 667 11 is_stmt 0 view .LVU14 + 88 000e 0B4A ldr r2, .L8+4 + 89 0010 D369 ldr r3, [r2, #28] + 90 .loc 1 667 22 view .LVU15 + 91 0012 0E39 subs r1, r1, #14 + 92 0014 0B43 orrs r3, r1 + 93 0016 D361 str r3, [r2, #28] + 668:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash.c **** flags |= FLASH_FLAG_WRPERR; + 94 .loc 1 668 5 is_stmt 1 view .LVU16 + 95 .LVL2: + 96 .loc 1 668 11 is_stmt 0 view .LVU17 + 97 0018 1023 movs r3, #16 + 98 .LVL3: + 99 .L5: + 669:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash.c **** } + 670:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash.c **** if(__HAL_FLASH_GET_FLAG(FLASH_FLAG_PGERR)) + 100 .loc 1 670 3 is_stmt 1 view .LVU18 + 101 .loc 1 670 6 is_stmt 0 view .LVU19 + 102 001a 074A ldr r2, .L8 + 103 001c D268 ldr r2, [r2, #12] + 104 .loc 1 670 5 view .LVU20 + 105 001e 5207 lsls r2, r2, #29 + 106 0020 06D5 bpl .L6 + 671:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash.c **** { + 672:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash.c **** pFlash.ErrorCode |= HAL_FLASH_ERROR_PROG; + 107 .loc 1 672 5 is_stmt 1 view .LVU21 + 108 .loc 1 672 11 is_stmt 0 view .LVU22 + 109 0022 0649 ldr r1, .L8+4 + 110 0024 CA69 ldr r2, [r1, #28] + 111 .loc 1 672 22 view .LVU23 + 112 0026 0120 movs r0, #1 + 113 0028 0243 orrs r2, r0 + 114 002a CA61 str r2, [r1, #28] + 673:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash.c **** flags |= FLASH_FLAG_PGERR; + 115 .loc 1 673 5 is_stmt 1 view .LVU24 + 116 .loc 1 673 11 is_stmt 0 view .LVU25 + 117 002c 0422 movs r2, #4 + 118 002e 1343 orrs r3, r2 + 119 .LVL4: + 120 .L6: + 674:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash.c **** } + 675:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash.c **** /* Clear FLASH error pending bits */ + 676:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash.c **** __HAL_FLASH_CLEAR_FLAG(flags); + 121 .loc 1 676 3 is_stmt 1 view .LVU26 + 122 0030 014A ldr r2, .L8 + 123 0032 D360 str r3, [r2, #12] + 677:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash.c **** } + 124 .loc 1 677 1 is_stmt 0 view .LVU27 + ARM GAS /tmp/ccgY7Mgl.s page 15 + + + 125 @ sp needed + 126 0034 7047 bx lr + 127 .L9: + 128 0036 C046 .align 2 + 129 .L8: + 130 0038 00200240 .word 1073881088 + 131 003c 00000000 .word pFlash + 132 .cfi_endproc + 133 .LFE53: + 135 .section .text.HAL_FLASH_Program_IT,"ax",%progbits + 136 .align 1 + 137 .global HAL_FLASH_Program_IT + 138 .syntax unified + 139 .code 16 + 140 .thumb_func + 142 HAL_FLASH_Program_IT: + 143 .LVL5: + 144 .LFB41: + 238:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash.c **** HAL_StatusTypeDef status = HAL_OK; + 145 .loc 1 238 1 is_stmt 1 view -0 + 146 .cfi_startproc + 147 @ args = 0, pretend = 0, frame = 0 + 148 @ frame_needed = 0, uses_anonymous_args = 0 + 238:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash.c **** HAL_StatusTypeDef status = HAL_OK; + 149 .loc 1 238 1 is_stmt 0 view .LVU29 + 150 0000 F8B5 push {r3, r4, r5, r6, r7, lr} + 151 .cfi_def_cfa_offset 24 + 152 .cfi_offset 3, -24 + 153 .cfi_offset 4, -20 + 154 .cfi_offset 5, -16 + 155 .cfi_offset 6, -12 + 156 .cfi_offset 7, -8 + 157 .cfi_offset 14, -4 + 158 0002 0600 movs r6, r0 + 159 0004 0800 movs r0, r1 + 160 .LVL6: + 238:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash.c **** HAL_StatusTypeDef status = HAL_OK; + 161 .loc 1 238 1 view .LVU30 + 162 0006 1400 movs r4, r2 + 163 0008 1D00 movs r5, r3 + 239:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash.c **** + 164 .loc 1 239 3 is_stmt 1 view .LVU31 + 165 .LVL7: + 242:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash.c **** + 166 .loc 1 242 3 view .LVU32 + 242:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash.c **** + 167 .loc 1 242 3 view .LVU33 + 168 000a 154B ldr r3, .L18 + 169 000c 1B7E ldrb r3, [r3, #24] + 170 000e 012B cmp r3, #1 + 171 0010 24D0 beq .L15 + 242:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash.c **** + 172 .loc 1 242 3 discriminator 2 view .LVU34 + 173 0012 134B ldr r3, .L18 + 174 0014 0122 movs r2, #1 + 175 .LVL8: + 242:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash.c **** + ARM GAS /tmp/ccgY7Mgl.s page 16 + + + 176 .loc 1 242 3 is_stmt 0 discriminator 2 view .LVU35 + 177 0016 1A76 strb r2, [r3, #24] + 242:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash.c **** + 178 .loc 1 242 3 is_stmt 1 discriminator 2 view .LVU36 + 245:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash.c **** assert_param(IS_FLASH_PROGRAM_ADDRESS(Address)); + 179 .loc 1 245 3 view .LVU37 + 246:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash.c **** + 180 .loc 1 246 3 view .LVU38 + 249:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash.c **** + 181 .loc 1 249 3 view .LVU39 + 182 0018 1249 ldr r1, .L18+4 + 183 .LVL9: + 249:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash.c **** + 184 .loc 1 249 3 is_stmt 0 view .LVU40 + 185 001a 0F69 ldr r7, [r1, #16] + 186 001c A022 movs r2, #160 + 187 001e 5201 lsls r2, r2, #5 + 188 0020 3A43 orrs r2, r7 + 189 0022 0A61 str r2, [r1, #16] + 251:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash.c **** pFlash.Data = Data; + 190 .loc 1 251 3 is_stmt 1 view .LVU41 + 251:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash.c **** pFlash.Data = Data; + 191 .loc 1 251 18 is_stmt 0 view .LVU42 + 192 0024 9860 str r0, [r3, #8] + 252:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash.c **** + 193 .loc 1 252 3 is_stmt 1 view .LVU43 + 252:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash.c **** + 194 .loc 1 252 15 is_stmt 0 view .LVU44 + 195 0026 1C61 str r4, [r3, #16] + 196 0028 5D61 str r5, [r3, #20] + 254:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash.c **** { + 197 .loc 1 254 3 is_stmt 1 view .LVU45 + 254:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash.c **** { + 198 .loc 1 254 5 is_stmt 0 view .LVU46 + 199 002a 012E cmp r6, #1 + 200 002c 0BD0 beq .L16 + 260:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash.c **** { + 201 .loc 1 260 8 is_stmt 1 view .LVU47 + 260:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash.c **** { + 202 .loc 1 260 10 is_stmt 0 view .LVU48 + 203 002e 022E cmp r6, #2 + 204 0030 0ED0 beq .L17 + 268:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash.c **** /* Program double word (64-bit : 4*16-bit) at a specified address. */ + 205 .loc 1 268 5 is_stmt 1 view .LVU49 + 268:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash.c **** /* Program double word (64-bit : 4*16-bit) at a specified address. */ + 206 .loc 1 268 29 is_stmt 0 view .LVU50 + 207 0032 0B4B ldr r3, .L18 + 208 0034 0522 movs r2, #5 + 209 0036 1A70 strb r2, [r3] + 270:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash.c **** } + 210 .loc 1 270 5 is_stmt 1 view .LVU51 + 270:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash.c **** } + 211 .loc 1 270 26 is_stmt 0 view .LVU52 + 212 0038 013A subs r2, r2, #1 + 213 003a 5A60 str r2, [r3, #4] + 214 .L13: + 274:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash.c **** + ARM GAS /tmp/ccgY7Mgl.s page 17 + + + 215 .loc 1 274 3 is_stmt 1 view .LVU53 + 216 003c A1B2 uxth r1, r4 + 217 003e FFF7FEFF bl FLASH_Program_HalfWord + 218 .LVL10: + 276:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash.c **** } + 219 .loc 1 276 3 view .LVU54 + 276:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash.c **** } + 220 .loc 1 276 10 is_stmt 0 view .LVU55 + 221 0042 0020 movs r0, #0 + 222 .L11: + 277:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash.c **** + 223 .loc 1 277 1 view .LVU56 + 224 @ sp needed + 225 .LVL11: + 277:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash.c **** + 226 .loc 1 277 1 view .LVU57 + 227 0044 F8BD pop {r3, r4, r5, r6, r7, pc} + 228 .LVL12: + 229 .L16: + 256:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash.c **** /* Program halfword (16-bit) at a specified address. */ + 230 .loc 1 256 5 is_stmt 1 view .LVU58 + 256:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash.c **** /* Program halfword (16-bit) at a specified address. */ + 231 .loc 1 256 29 is_stmt 0 view .LVU59 + 232 0046 0322 movs r2, #3 + 233 0048 1A70 strb r2, [r3] + 258:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash.c **** } + 234 .loc 1 258 5 is_stmt 1 view .LVU60 + 258:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash.c **** } + 235 .loc 1 258 26 is_stmt 0 view .LVU61 + 236 004a 023A subs r2, r2, #2 + 237 004c 5A60 str r2, [r3, #4] + 238 004e F5E7 b .L13 + 239 .L17: + 262:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash.c **** /* Program word (32-bit : 2*16-bit) at a specified address. */ + 240 .loc 1 262 5 is_stmt 1 view .LVU62 + 262:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash.c **** /* Program word (32-bit : 2*16-bit) at a specified address. */ + 241 .loc 1 262 29 is_stmt 0 view .LVU63 + 242 0050 034B ldr r3, .L18 + 243 0052 0422 movs r2, #4 + 244 0054 1A70 strb r2, [r3] + 264:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash.c **** } + 245 .loc 1 264 5 is_stmt 1 view .LVU64 + 264:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash.c **** } + 246 .loc 1 264 26 is_stmt 0 view .LVU65 + 247 0056 023A subs r2, r2, #2 + 248 0058 5A60 str r2, [r3, #4] + 249 005a EFE7 b .L13 + 250 .LVL13: + 251 .L15: + 242:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash.c **** + 252 .loc 1 242 3 discriminator 1 view .LVU66 + 253 005c 0220 movs r0, #2 + 254 .LVL14: + 242:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash.c **** + 255 .loc 1 242 3 discriminator 1 view .LVU67 + 256 005e F1E7 b .L11 + 257 .L19: + ARM GAS /tmp/ccgY7Mgl.s page 18 + + + 258 .align 2 + 259 .L18: + 260 0060 00000000 .word pFlash + 261 0064 00200240 .word 1073881088 + 262 .cfi_endproc + 263 .LFE41: + 265 .section .text.HAL_FLASH_EndOfOperationCallback,"ax",%progbits + 266 .align 1 + 267 .weak HAL_FLASH_EndOfOperationCallback + 268 .syntax unified + 269 .code 16 + 270 .thumb_func + 272 HAL_FLASH_EndOfOperationCallback: + 273 .LVL15: + 274 .LFB43: + 427:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash.c **** /* Prevent unused argument(s) compilation warning */ + 275 .loc 1 427 1 is_stmt 1 view -0 + 276 .cfi_startproc + 277 @ args = 0, pretend = 0, frame = 0 + 278 @ frame_needed = 0, uses_anonymous_args = 0 + 279 @ link register save eliminated. + 429:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash.c **** + 280 .loc 1 429 3 view .LVU69 + 434:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash.c **** + 281 .loc 1 434 1 is_stmt 0 view .LVU70 + 282 @ sp needed + 283 0000 7047 bx lr + 284 .cfi_endproc + 285 .LFE43: + 287 .section .text.HAL_FLASH_OperationErrorCallback,"ax",%progbits + 288 .align 1 + 289 .weak HAL_FLASH_OperationErrorCallback + 290 .syntax unified + 291 .code 16 + 292 .thumb_func + 294 HAL_FLASH_OperationErrorCallback: + 295 .LVL16: + 296 .LFB44: + 445:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash.c **** /* Prevent unused argument(s) compilation warning */ + 297 .loc 1 445 1 is_stmt 1 view -0 + 298 .cfi_startproc + 299 @ args = 0, pretend = 0, frame = 0 + 300 @ frame_needed = 0, uses_anonymous_args = 0 + 301 @ link register save eliminated. + 447:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash.c **** + 302 .loc 1 447 3 view .LVU72 + 452:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash.c **** + 303 .loc 1 452 1 is_stmt 0 view .LVU73 + 304 @ sp needed + 305 0000 7047 bx lr + 306 .cfi_endproc + 307 .LFE44: + 309 .section .text.HAL_FLASH_IRQHandler,"ax",%progbits + 310 .align 1 + 311 .global HAL_FLASH_IRQHandler + 312 .syntax unified + 313 .code 16 + ARM GAS /tmp/ccgY7Mgl.s page 19 + + + 314 .thumb_func + 316 HAL_FLASH_IRQHandler: + 317 .LFB42: + 284:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash.c **** uint32_t addresstmp = 0U; + 318 .loc 1 284 1 is_stmt 1 view -0 + 319 .cfi_startproc + 320 @ args = 0, pretend = 0, frame = 0 + 321 @ frame_needed = 0, uses_anonymous_args = 0 + 322 0000 F8B5 push {r3, r4, r5, r6, r7, lr} + 323 .cfi_def_cfa_offset 24 + 324 .cfi_offset 3, -24 + 325 .cfi_offset 4, -20 + 326 .cfi_offset 5, -16 + 327 .cfi_offset 6, -12 + 328 .cfi_offset 7, -8 + 329 .cfi_offset 14, -4 + 285:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash.c **** + 330 .loc 1 285 3 view .LVU75 + 331 .LVL17: + 288:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash.c **** { + 332 .loc 1 288 3 view .LVU76 + 288:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash.c **** { + 333 .loc 1 288 6 is_stmt 0 view .LVU77 + 334 0002 514B ldr r3, .L42 + 335 0004 DB68 ldr r3, [r3, #12] + 288:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash.c **** { + 336 .loc 1 288 5 view .LVU78 + 337 0006 DB06 lsls r3, r3, #27 + 338 0008 03D4 bmi .L23 + 288:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash.c **** { + 339 .loc 1 288 48 discriminator 1 view .LVU79 + 340 000a 4F4B ldr r3, .L42 + 341 000c DB68 ldr r3, [r3, #12] + 288:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash.c **** { + 342 .loc 1 288 46 discriminator 1 view .LVU80 + 343 000e 5B07 lsls r3, r3, #29 + 344 0010 0BD5 bpl .L24 + 345 .L23: + 291:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash.c **** /* Reset address */ + 346 .loc 1 291 5 is_stmt 1 view .LVU81 + 291:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash.c **** /* Reset address */ + 347 .loc 1 291 16 is_stmt 0 view .LVU82 + 348 0012 4E4C ldr r4, .L42+4 + 349 0014 A568 ldr r5, [r4, #8] + 350 .LVL18: + 293:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash.c **** + 351 .loc 1 293 5 is_stmt 1 view .LVU83 + 293:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash.c **** + 352 .loc 1 293 20 is_stmt 0 view .LVU84 + 353 0016 0123 movs r3, #1 + 354 0018 5B42 rsbs r3, r3, #0 + 355 001a A360 str r3, [r4, #8] + 296:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash.c **** + 356 .loc 1 296 5 is_stmt 1 view .LVU85 + 357 001c FFF7FEFF bl FLASH_SetErrorCode + 358 .LVL19: + 299:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash.c **** + ARM GAS /tmp/ccgY7Mgl.s page 20 + + + 359 .loc 1 299 5 view .LVU86 + 360 0020 2800 movs r0, r5 + 361 0022 FFF7FEFF bl HAL_FLASH_OperationErrorCallback + 362 .LVL20: + 302:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash.c **** } + 363 .loc 1 302 5 view .LVU87 + 302:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash.c **** } + 364 .loc 1 302 29 is_stmt 0 view .LVU88 + 365 0026 0023 movs r3, #0 + 366 0028 2370 strb r3, [r4] + 367 .LVL21: + 368 .L24: + 306:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash.c **** { + 369 .loc 1 306 3 is_stmt 1 view .LVU89 + 306:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash.c **** { + 370 .loc 1 306 6 is_stmt 0 view .LVU90 + 371 002a 474B ldr r3, .L42 + 372 002c DB68 ldr r3, [r3, #12] + 306:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash.c **** { + 373 .loc 1 306 5 view .LVU91 + 374 002e 9B06 lsls r3, r3, #26 + 375 0030 28D5 bpl .L25 + 309:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash.c **** + 376 .loc 1 309 5 is_stmt 1 view .LVU92 + 377 0032 454B ldr r3, .L42 + 378 0034 2022 movs r2, #32 + 379 0036 DA60 str r2, [r3, #12] + 312:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash.c **** { + 380 .loc 1 312 5 view .LVU93 + 312:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash.c **** { + 381 .loc 1 312 14 is_stmt 0 view .LVU94 + 382 0038 444B ldr r3, .L42+4 + 383 003a 1B78 ldrb r3, [r3] + 312:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash.c **** { + 384 .loc 1 312 7 view .LVU95 + 385 003c 002B cmp r3, #0 + 386 003e 21D0 beq .L25 + 314:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash.c **** { + 387 .loc 1 314 7 is_stmt 1 view .LVU96 + 314:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash.c **** { + 388 .loc 1 314 16 is_stmt 0 view .LVU97 + 389 0040 424B ldr r3, .L42+4 + 390 0042 1B78 ldrb r3, [r3] + 314:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash.c **** { + 391 .loc 1 314 9 view .LVU98 + 392 0044 012B cmp r3, #1 + 393 0046 2ED0 beq .L37 + 345:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash.c **** { + 394 .loc 1 345 12 is_stmt 1 view .LVU99 + 345:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash.c **** { + 395 .loc 1 345 21 is_stmt 0 view .LVU100 + 396 0048 404B ldr r3, .L42+4 + 397 004a 1B78 ldrb r3, [r3] + 345:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash.c **** { + 398 .loc 1 345 14 view .LVU101 + 399 004c 022B cmp r3, #2 + 400 004e 4CD0 beq .L38 + ARM GAS /tmp/ccgY7Mgl.s page 21 + + + 360:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash.c **** + 401 .loc 1 360 9 is_stmt 1 view .LVU102 + 360:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash.c **** + 402 .loc 1 360 15 is_stmt 0 view .LVU103 + 403 0050 3E4B ldr r3, .L42+4 + 404 0052 5A68 ldr r2, [r3, #4] + 360:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash.c **** + 405 .loc 1 360 29 view .LVU104 + 406 0054 013A subs r2, r2, #1 + 407 0056 5A60 str r2, [r3, #4] + 363:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash.c **** { + 408 .loc 1 363 9 is_stmt 1 view .LVU105 + 363:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash.c **** { + 409 .loc 1 363 18 is_stmt 0 view .LVU106 + 410 0058 5B68 ldr r3, [r3, #4] + 363:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash.c **** { + 411 .loc 1 363 11 view .LVU107 + 412 005a 002B cmp r3, #0 + 413 005c 51D1 bne .L39 + 382:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash.c **** { + 414 .loc 1 382 11 is_stmt 1 view .LVU108 + 382:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash.c **** { + 415 .loc 1 382 21 is_stmt 0 view .LVU109 + 416 005e 3B4B ldr r3, .L42+4 + 417 0060 1B78 ldrb r3, [r3] + 382:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash.c **** { + 418 .loc 1 382 14 view .LVU110 + 419 0062 032B cmp r3, #3 + 420 0064 65D0 beq .L40 + 386:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash.c **** { + 421 .loc 1 386 16 is_stmt 1 view .LVU111 + 386:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash.c **** { + 422 .loc 1 386 26 is_stmt 0 view .LVU112 + 423 0066 394B ldr r3, .L42+4 + 424 0068 1B78 ldrb r3, [r3] + 386:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash.c **** { + 425 .loc 1 386 19 view .LVU113 + 426 006a 042B cmp r3, #4 + 427 006c 66D0 beq .L41 + 392:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash.c **** } + 428 .loc 1 392 13 is_stmt 1 view .LVU114 + 392:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash.c **** } + 429 .loc 1 392 52 is_stmt 0 view .LVU115 + 430 006e 374B ldr r3, .L42+4 + 431 0070 9868 ldr r0, [r3, #8] + 392:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash.c **** } + 432 .loc 1 392 13 view .LVU116 + 433 0072 0638 subs r0, r0, #6 + 434 0074 FFF7FEFF bl HAL_FLASH_EndOfOperationCallback + 435 .LVL22: + 436 .L31: + 396:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash.c **** pFlash.ProcedureOnGoing = FLASH_PROC_NONE; + 437 .loc 1 396 11 is_stmt 1 view .LVU117 + 396:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash.c **** pFlash.ProcedureOnGoing = FLASH_PROC_NONE; + 438 .loc 1 396 26 is_stmt 0 view .LVU118 + 439 0078 344B ldr r3, .L42+4 + 440 007a 0122 movs r2, #1 + ARM GAS /tmp/ccgY7Mgl.s page 22 + + + 441 007c 5242 rsbs r2, r2, #0 + 442 007e 9A60 str r2, [r3, #8] + 397:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash.c **** } + 443 .loc 1 397 11 is_stmt 1 view .LVU119 + 397:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash.c **** } + 444 .loc 1 397 35 is_stmt 0 view .LVU120 + 445 0080 0022 movs r2, #0 + 446 0082 1A70 strb r2, [r3] + 447 .L25: + 404:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash.c **** { + 448 .loc 1 404 3 is_stmt 1 view .LVU121 + 404:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash.c **** { + 449 .loc 1 404 12 is_stmt 0 view .LVU122 + 450 0084 314B ldr r3, .L42+4 + 451 0086 1B78 ldrb r3, [r3] + 404:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash.c **** { + 452 .loc 1 404 5 view .LVU123 + 453 0088 002B cmp r3, #0 + 454 008a 0BD1 bne .L22 + 407:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash.c **** + 455 .loc 1 407 5 is_stmt 1 view .LVU124 + 456 008c 2E4B ldr r3, .L42 + 457 008e 1A69 ldr r2, [r3, #16] + 458 0090 0721 movs r1, #7 + 459 0092 8A43 bics r2, r1 + 460 0094 1A61 str r2, [r3, #16] + 410:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash.c **** + 461 .loc 1 410 5 view .LVU125 + 462 0096 1A69 ldr r2, [r3, #16] + 463 0098 2D49 ldr r1, .L42+8 + 464 009a 0A40 ands r2, r1 + 465 009c 1A61 str r2, [r3, #16] + 413:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash.c **** } + 466 .loc 1 413 5 view .LVU126 + 413:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash.c **** } + 467 .loc 1 413 5 view .LVU127 + 468 009e 2B4B ldr r3, .L42+4 + 469 00a0 0022 movs r2, #0 + 470 00a2 1A76 strb r2, [r3, #24] + 413:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash.c **** } + 471 .loc 1 413 5 discriminator 1 view .LVU128 + 472 .L22: + 415:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash.c **** + 473 .loc 1 415 1 is_stmt 0 view .LVU129 + 474 @ sp needed + 475 00a4 F8BD pop {r3, r4, r5, r6, r7, pc} + 476 .L37: + 317:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash.c **** + 477 .loc 1 317 9 is_stmt 1 view .LVU130 + 317:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash.c **** + 478 .loc 1 317 15 is_stmt 0 view .LVU131 + 479 00a6 294B ldr r3, .L42+4 + 480 00a8 5A68 ldr r2, [r3, #4] + 317:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash.c **** + 481 .loc 1 317 29 view .LVU132 + 482 00aa 013A subs r2, r2, #1 + 483 00ac 5A60 str r2, [r3, #4] + ARM GAS /tmp/ccgY7Mgl.s page 23 + + + 320:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash.c **** { + 484 .loc 1 320 9 is_stmt 1 view .LVU133 + 320:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash.c **** { + 485 .loc 1 320 18 is_stmt 0 view .LVU134 + 486 00ae 5B68 ldr r3, [r3, #4] + 320:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash.c **** { + 487 .loc 1 320 11 view .LVU135 + 488 00b0 002B cmp r3, #0 + 489 00b2 11D0 beq .L27 + 322:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash.c **** /*Indicate user which sector has been erased */ + 490 .loc 1 322 11 is_stmt 1 view .LVU136 + 322:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash.c **** /*Indicate user which sector has been erased */ + 491 .loc 1 322 22 is_stmt 0 view .LVU137 + 492 00b4 254C ldr r4, .L42+4 + 493 00b6 A068 ldr r0, [r4, #8] + 494 .LVL23: + 324:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash.c **** + 495 .loc 1 324 11 is_stmt 1 view .LVU138 + 496 00b8 FFF7FEFF bl HAL_FLASH_EndOfOperationCallback + 497 .LVL24: + 327:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash.c **** pFlash.Address = addresstmp; + 498 .loc 1 327 11 view .LVU139 + 327:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash.c **** pFlash.Address = addresstmp; + 499 .loc 1 327 30 is_stmt 0 view .LVU140 + 500 00bc A068 ldr r0, [r4, #8] + 327:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash.c **** pFlash.Address = addresstmp; + 501 .loc 1 327 22 view .LVU141 + 502 00be 8023 movs r3, #128 + 503 00c0 DB00 lsls r3, r3, #3 + 504 00c2 9C46 mov ip, r3 + 505 00c4 6044 add r0, r0, ip + 506 .LVL25: + 328:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash.c **** + 507 .loc 1 328 11 is_stmt 1 view .LVU142 + 328:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash.c **** + 508 .loc 1 328 26 is_stmt 0 view .LVU143 + 509 00c6 A060 str r0, [r4, #8] + 331:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash.c **** + 510 .loc 1 331 11 is_stmt 1 view .LVU144 + 511 00c8 1F4A ldr r2, .L42 + 512 00ca 1369 ldr r3, [r2, #16] + 513 00cc 0221 movs r1, #2 + 514 00ce 8B43 bics r3, r1 + 515 00d0 1361 str r3, [r2, #16] + 333:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash.c **** } + 516 .loc 1 333 11 view .LVU145 + 517 00d2 FFF7FEFF bl FLASH_PageErase + 518 .LVL26: + 333:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash.c **** } + 519 .loc 1 333 11 is_stmt 0 view .LVU146 + 520 00d6 D5E7 b .L25 + 521 .LVL27: + 522 .L27: + 339:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash.c **** pFlash.ProcedureOnGoing = FLASH_PROC_NONE; + 523 .loc 1 339 11 is_stmt 1 view .LVU147 + 339:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash.c **** pFlash.ProcedureOnGoing = FLASH_PROC_NONE; + 524 .loc 1 339 26 is_stmt 0 view .LVU148 + ARM GAS /tmp/ccgY7Mgl.s page 24 + + + 525 00d8 1C4B ldr r3, .L42+4 + 526 00da 0120 movs r0, #1 + 527 00dc 4042 rsbs r0, r0, #0 + 528 00de 9860 str r0, [r3, #8] + 340:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash.c **** /* FLASH EOP interrupt user callback */ + 529 .loc 1 340 11 is_stmt 1 view .LVU149 + 340:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash.c **** /* FLASH EOP interrupt user callback */ + 530 .loc 1 340 35 is_stmt 0 view .LVU150 + 531 00e0 0022 movs r2, #0 + 532 00e2 1A70 strb r2, [r3] + 342:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash.c **** } + 533 .loc 1 342 11 is_stmt 1 view .LVU151 + 534 00e4 FFF7FEFF bl HAL_FLASH_EndOfOperationCallback + 535 .LVL28: + 536 00e8 CCE7 b .L25 + 537 .LVL29: + 538 .L38: + 348:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash.c **** + 539 .loc 1 348 9 view .LVU152 + 540 00ea 174A ldr r2, .L42 + 541 00ec 1369 ldr r3, [r2, #16] + 542 00ee 0421 movs r1, #4 + 543 00f0 8B43 bics r3, r1 + 544 00f2 1361 str r3, [r2, #16] + 352:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash.c **** + 545 .loc 1 352 11 view .LVU153 + 546 00f4 0020 movs r0, #0 + 547 00f6 FFF7FEFF bl HAL_FLASH_EndOfOperationCallback + 548 .LVL30: + 355:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash.c **** } + 549 .loc 1 355 11 view .LVU154 + 355:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash.c **** } + 550 .loc 1 355 35 is_stmt 0 view .LVU155 + 551 00fa 144B ldr r3, .L42+4 + 552 00fc 0022 movs r2, #0 + 553 00fe 1A70 strb r2, [r3] + 554 0100 C0E7 b .L25 + 555 .L39: + 366:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash.c **** addresstmp = pFlash.Address; + 556 .loc 1 366 11 is_stmt 1 view .LVU156 + 366:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash.c **** addresstmp = pFlash.Address; + 557 .loc 1 366 17 is_stmt 0 view .LVU157 + 558 0102 124B ldr r3, .L42+4 + 559 0104 9A68 ldr r2, [r3, #8] + 366:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash.c **** addresstmp = pFlash.Address; + 560 .loc 1 366 26 view .LVU158 + 561 0106 0232 adds r2, r2, #2 + 562 0108 9A60 str r2, [r3, #8] + 367:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash.c **** + 563 .loc 1 367 11 is_stmt 1 view .LVU159 + 367:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash.c **** + 564 .loc 1 367 22 is_stmt 0 view .LVU160 + 565 010a 9868 ldr r0, [r3, #8] + 566 .LVL31: + 370:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash.c **** + 567 .loc 1 370 11 is_stmt 1 view .LVU161 + 370:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash.c **** + ARM GAS /tmp/ccgY7Mgl.s page 25 + + + 568 .loc 1 370 32 is_stmt 0 view .LVU162 + 569 010c 1E69 ldr r6, [r3, #16] + 570 010e 5F69 ldr r7, [r3, #20] + 370:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash.c **** + 571 .loc 1 370 38 view .LVU163 + 572 0110 3A04 lsls r2, r7, #16 + 573 0112 340C lsrs r4, r6, #16 + 574 0114 1443 orrs r4, r2 + 575 0116 3D0C lsrs r5, r7, #16 + 370:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash.c **** + 576 .loc 1 370 23 view .LVU164 + 577 0118 1C61 str r4, [r3, #16] + 578 011a 5D61 str r5, [r3, #20] + 373:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash.c **** + 579 .loc 1 373 11 is_stmt 1 view .LVU165 + 580 011c 0A49 ldr r1, .L42 + 581 011e 0A69 ldr r2, [r1, #16] + 582 0120 0124 movs r4, #1 + 583 0122 A243 bics r2, r4 + 584 0124 0A61 str r2, [r1, #16] + 376:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash.c **** } + 585 .loc 1 376 11 view .LVU166 + 376:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash.c **** } + 586 .loc 1 376 62 is_stmt 0 view .LVU167 + 587 0126 1A69 ldr r2, [r3, #16] + 588 0128 5B69 ldr r3, [r3, #20] + 376:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash.c **** } + 589 .loc 1 376 11 view .LVU168 + 590 012a 91B2 uxth r1, r2 + 591 012c FFF7FEFF bl FLASH_Program_HalfWord + 592 .LVL32: + 376:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash.c **** } + 593 .loc 1 376 11 view .LVU169 + 594 0130 A8E7 b .L25 + 595 .LVL33: + 596 .L40: + 384:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash.c **** } + 597 .loc 1 384 13 is_stmt 1 view .LVU170 + 384:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash.c **** } + 598 .loc 1 384 52 is_stmt 0 view .LVU171 + 599 0132 064B ldr r3, .L42+4 + 600 0134 9868 ldr r0, [r3, #8] + 384:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash.c **** } + 601 .loc 1 384 13 view .LVU172 + 602 0136 FFF7FEFF bl HAL_FLASH_EndOfOperationCallback + 603 .LVL34: + 604 013a 9DE7 b .L31 + 605 .L41: + 388:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash.c **** } + 606 .loc 1 388 13 is_stmt 1 view .LVU173 + 388:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash.c **** } + 607 .loc 1 388 52 is_stmt 0 view .LVU174 + 608 013c 034B ldr r3, .L42+4 + 609 013e 9868 ldr r0, [r3, #8] + 388:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash.c **** } + 610 .loc 1 388 13 view .LVU175 + 611 0140 0238 subs r0, r0, #2 + ARM GAS /tmp/ccgY7Mgl.s page 26 + + + 612 0142 FFF7FEFF bl HAL_FLASH_EndOfOperationCallback + 613 .LVL35: + 614 0146 97E7 b .L31 + 615 .L43: + 616 .align 2 + 617 .L42: + 618 0148 00200240 .word 1073881088 + 619 014c 00000000 .word pFlash + 620 0150 FFEBFFFF .word -5121 + 621 .cfi_endproc + 622 .LFE42: + 624 .section .text.HAL_FLASH_Unlock,"ax",%progbits + 625 .align 1 + 626 .global HAL_FLASH_Unlock + 627 .syntax unified + 628 .code 16 + 629 .thumb_func + 631 HAL_FLASH_Unlock: + 632 .LFB45: + 478:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash.c **** HAL_StatusTypeDef status = HAL_OK; + 633 .loc 1 478 1 is_stmt 1 view -0 + 634 .cfi_startproc + 635 @ args = 0, pretend = 0, frame = 0 + 636 @ frame_needed = 0, uses_anonymous_args = 0 + 637 @ link register save eliminated. + 479:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash.c **** + 638 .loc 1 479 3 view .LVU177 + 639 .LVL36: + 481:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash.c **** { + 640 .loc 1 481 3 view .LVU178 + 481:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash.c **** { + 641 .loc 1 481 6 is_stmt 0 view .LVU179 + 642 0000 084B ldr r3, .L48 + 643 0002 1B69 ldr r3, [r3, #16] + 481:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash.c **** { + 644 .loc 1 481 5 view .LVU180 + 645 0004 1B06 lsls r3, r3, #24 + 646 0006 09D5 bpl .L46 + 484:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash.c **** WRITE_REG(FLASH->KEYR, FLASH_KEY2); + 647 .loc 1 484 5 is_stmt 1 view .LVU181 + 648 0008 064B ldr r3, .L48 + 649 000a 074A ldr r2, .L48+4 + 650 000c 5A60 str r2, [r3, #4] + 485:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash.c **** + 651 .loc 1 485 5 view .LVU182 + 652 000e 074A ldr r2, .L48+8 + 653 0010 5A60 str r2, [r3, #4] + 488:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash.c **** { + 654 .loc 1 488 5 view .LVU183 + 488:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash.c **** { + 655 .loc 1 488 8 is_stmt 0 view .LVU184 + 656 0012 1B69 ldr r3, [r3, #16] + 488:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash.c **** { + 657 .loc 1 488 7 view .LVU185 + 658 0014 1B06 lsls r3, r3, #24 + 659 0016 03D4 bmi .L47 + 479:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash.c **** + ARM GAS /tmp/ccgY7Mgl.s page 27 + + + 660 .loc 1 479 21 view .LVU186 + 661 0018 0020 movs r0, #0 + 662 001a 00E0 b .L45 + 663 .L46: + 664 001c 0020 movs r0, #0 + 665 .L45: + 666 .LVL37: + 494:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash.c **** } + 667 .loc 1 494 3 is_stmt 1 view .LVU187 + 495:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash.c **** + 668 .loc 1 495 1 is_stmt 0 view .LVU188 + 669 @ sp needed + 670 001e 7047 bx lr + 671 .LVL38: + 672 .L47: + 490:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash.c **** } + 673 .loc 1 490 14 view .LVU189 + 674 0020 0120 movs r0, #1 + 675 0022 FCE7 b .L45 + 676 .L49: + 677 .align 2 + 678 .L48: + 679 0024 00200240 .word 1073881088 + 680 0028 23016745 .word 1164378403 + 681 002c AB89EFCD .word -839939669 + 682 .cfi_endproc + 683 .LFE45: + 685 .section .text.HAL_FLASH_Lock,"ax",%progbits + 686 .align 1 + 687 .global HAL_FLASH_Lock + 688 .syntax unified + 689 .code 16 + 690 .thumb_func + 692 HAL_FLASH_Lock: + 693 .LFB46: + 502:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash.c **** /* Set the LOCK Bit to lock the FLASH Registers access */ + 694 .loc 1 502 1 is_stmt 1 view -0 + 695 .cfi_startproc + 696 @ args = 0, pretend = 0, frame = 0 + 697 @ frame_needed = 0, uses_anonymous_args = 0 + 698 @ link register save eliminated. + 504:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash.c **** + 699 .loc 1 504 3 view .LVU191 + 700 0000 034A ldr r2, .L51 + 701 0002 1369 ldr r3, [r2, #16] + 702 0004 8021 movs r1, #128 + 703 0006 0B43 orrs r3, r1 + 704 0008 1361 str r3, [r2, #16] + 506:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash.c **** } + 705 .loc 1 506 3 view .LVU192 + 507:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash.c **** + 706 .loc 1 507 1 is_stmt 0 view .LVU193 + 707 000a 0020 movs r0, #0 + 708 @ sp needed + 709 000c 7047 bx lr + 710 .L52: + 711 000e C046 .align 2 + ARM GAS /tmp/ccgY7Mgl.s page 28 + + + 712 .L51: + 713 0010 00200240 .word 1073881088 + 714 .cfi_endproc + 715 .LFE46: + 717 .section .text.HAL_FLASH_OB_Unlock,"ax",%progbits + 718 .align 1 + 719 .global HAL_FLASH_OB_Unlock + 720 .syntax unified + 721 .code 16 + 722 .thumb_func + 724 HAL_FLASH_OB_Unlock: + 725 .LFB47: + 514:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash.c **** if (HAL_IS_BIT_CLR(FLASH->CR, FLASH_CR_OPTWRE)) + 726 .loc 1 514 1 is_stmt 1 view -0 + 727 .cfi_startproc + 728 @ args = 0, pretend = 0, frame = 0 + 729 @ frame_needed = 0, uses_anonymous_args = 0 + 730 @ link register save eliminated. + 515:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash.c **** { + 731 .loc 1 515 3 view .LVU195 + 515:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash.c **** { + 732 .loc 1 515 7 is_stmt 0 view .LVU196 + 733 0000 064B ldr r3, .L56 + 734 0002 1B69 ldr r3, [r3, #16] + 515:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash.c **** { + 735 .loc 1 515 6 view .LVU197 + 736 0004 9B05 lsls r3, r3, #22 + 737 0006 06D4 bmi .L55 + 518:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash.c **** WRITE_REG(FLASH->OPTKEYR, FLASH_OPTKEY2); + 738 .loc 1 518 5 is_stmt 1 view .LVU198 + 739 0008 044B ldr r3, .L56 + 740 000a 054A ldr r2, .L56+4 + 741 000c 9A60 str r2, [r3, #8] + 519:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash.c **** } + 742 .loc 1 519 5 view .LVU199 + 743 000e 054A ldr r2, .L56+8 + 744 0010 9A60 str r2, [r3, #8] + 526:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash.c **** } + 745 .loc 1 526 3 view .LVU200 + 526:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash.c **** } + 746 .loc 1 526 10 is_stmt 0 view .LVU201 + 747 0012 0020 movs r0, #0 + 748 .L54: + 527:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash.c **** + 749 .loc 1 527 1 view .LVU202 + 750 @ sp needed + 751 0014 7047 bx lr + 752 .L55: + 523:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash.c **** } + 753 .loc 1 523 12 view .LVU203 + 754 0016 0120 movs r0, #1 + 755 0018 FCE7 b .L54 + 756 .L57: + 757 001a C046 .align 2 + 758 .L56: + 759 001c 00200240 .word 1073881088 + 760 0020 23016745 .word 1164378403 + ARM GAS /tmp/ccgY7Mgl.s page 29 + + + 761 0024 AB89EFCD .word -839939669 + 762 .cfi_endproc + 763 .LFE47: + 765 .section .text.HAL_FLASH_OB_Lock,"ax",%progbits + 766 .align 1 + 767 .global HAL_FLASH_OB_Lock + 768 .syntax unified + 769 .code 16 + 770 .thumb_func + 772 HAL_FLASH_OB_Lock: + 773 .LFB48: + 534:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash.c **** /* Clear the OPTWRE Bit to lock the FLASH Option Byte Registers access */ + 774 .loc 1 534 1 is_stmt 1 view -0 + 775 .cfi_startproc + 776 @ args = 0, pretend = 0, frame = 0 + 777 @ frame_needed = 0, uses_anonymous_args = 0 + 778 @ link register save eliminated. + 536:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash.c **** + 779 .loc 1 536 3 view .LVU205 + 780 0000 034A ldr r2, .L59 + 781 0002 1369 ldr r3, [r2, #16] + 782 0004 0349 ldr r1, .L59+4 + 783 0006 0B40 ands r3, r1 + 784 0008 1361 str r3, [r2, #16] + 538:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash.c **** } + 785 .loc 1 538 3 view .LVU206 + 539:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash.c **** + 786 .loc 1 539 1 is_stmt 0 view .LVU207 + 787 000a 0020 movs r0, #0 + 788 @ sp needed + 789 000c 7047 bx lr + 790 .L60: + 791 000e C046 .align 2 + 792 .L59: + 793 0010 00200240 .word 1073881088 + 794 0014 FFFDFFFF .word -513 + 795 .cfi_endproc + 796 .LFE48: + 798 .section .text.HAL_FLASH_GetError,"ax",%progbits + 799 .align 1 + 800 .global HAL_FLASH_GetError + 801 .syntax unified + 802 .code 16 + 803 .thumb_func + 805 HAL_FLASH_GetError: + 806 .LFB50: + 579:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash.c **** return pFlash.ErrorCode; + 807 .loc 1 579 1 is_stmt 1 view -0 + 808 .cfi_startproc + 809 @ args = 0, pretend = 0, frame = 0 + 810 @ frame_needed = 0, uses_anonymous_args = 0 + 811 @ link register save eliminated. + 580:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash.c **** } + 812 .loc 1 580 4 view .LVU209 + 580:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash.c **** } + 813 .loc 1 580 17 is_stmt 0 view .LVU210 + 814 0000 014B ldr r3, .L62 + ARM GAS /tmp/ccgY7Mgl.s page 30 + + + 815 0002 D869 ldr r0, [r3, #28] + 581:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash.c **** + 816 .loc 1 581 1 view .LVU211 + 817 @ sp needed + 818 0004 7047 bx lr + 819 .L63: + 820 0006 C046 .align 2 + 821 .L62: + 822 0008 00000000 .word pFlash + 823 .cfi_endproc + 824 .LFE50: + 826 .section .text.FLASH_WaitForLastOperation,"ax",%progbits + 827 .align 1 + 828 .global FLASH_WaitForLastOperation + 829 .syntax unified + 830 .code 16 + 831 .thumb_func + 833 FLASH_WaitForLastOperation: + 834 .LVL39: + 835 .LFB52: + 619:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash.c **** /* Wait for the FLASH operation to complete by polling on BUSY flag to be reset. + 836 .loc 1 619 1 is_stmt 1 view -0 + 837 .cfi_startproc + 838 @ args = 0, pretend = 0, frame = 0 + 839 @ frame_needed = 0, uses_anonymous_args = 0 + 619:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash.c **** /* Wait for the FLASH operation to complete by polling on BUSY flag to be reset. + 840 .loc 1 619 1 is_stmt 0 view .LVU213 + 841 0000 70B5 push {r4, r5, r6, lr} + 842 .cfi_def_cfa_offset 16 + 843 .cfi_offset 4, -16 + 844 .cfi_offset 5, -12 + 845 .cfi_offset 6, -8 + 846 .cfi_offset 14, -4 + 847 0002 0400 movs r4, r0 + 624:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash.c **** + 848 .loc 1 624 3 is_stmt 1 view .LVU214 + 624:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash.c **** + 849 .loc 1 624 24 is_stmt 0 view .LVU215 + 850 0004 FFF7FEFF bl HAL_GetTick + 851 .LVL40: + 624:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash.c **** + 852 .loc 1 624 24 view .LVU216 + 853 0008 0500 movs r5, r0 + 854 .LVL41: + 626:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash.c **** { + 855 .loc 1 626 3 is_stmt 1 view .LVU217 + 856 .L66: + 626:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash.c **** { + 857 .loc 1 626 9 view .LVU218 + 858 000a 124B ldr r3, .L77 + 859 000c DB68 ldr r3, [r3, #12] + 860 000e DB07 lsls r3, r3, #31 + 861 0010 0AD5 bpl .L76 + 628:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash.c **** { + 862 .loc 1 628 5 view .LVU219 + 628:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash.c **** { + 863 .loc 1 628 8 is_stmt 0 view .LVU220 + ARM GAS /tmp/ccgY7Mgl.s page 31 + + + 864 0012 631C adds r3, r4, #1 + 865 0014 F9D0 beq .L66 + 630:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash.c **** { + 866 .loc 1 630 7 is_stmt 1 view .LVU221 + 630:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash.c **** { + 867 .loc 1 630 9 is_stmt 0 view .LVU222 + 868 0016 002C cmp r4, #0 + 869 0018 04D0 beq .L67 + 630:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash.c **** { + 870 .loc 1 630 31 discriminator 1 view .LVU223 + 871 001a FFF7FEFF bl HAL_GetTick + 872 .LVL42: + 630:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash.c **** { + 873 .loc 1 630 44 discriminator 1 view .LVU224 + 874 001e 401B subs r0, r0, r5 + 630:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash.c **** { + 875 .loc 1 630 26 discriminator 1 view .LVU225 + 876 0020 A042 cmp r0, r4 + 877 0022 F2D9 bls .L66 + 878 .L67: + 632:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash.c **** } + 879 .loc 1 632 9 is_stmt 1 view .LVU226 + 632:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash.c **** } + 880 .loc 1 632 16 is_stmt 0 view .LVU227 + 881 0024 0320 movs r0, #3 + 882 0026 0FE0 b .L68 + 883 .L76: + 638:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash.c **** { + 884 .loc 1 638 3 is_stmt 1 view .LVU228 + 638:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash.c **** { + 885 .loc 1 638 7 is_stmt 0 view .LVU229 + 886 0028 0A4B ldr r3, .L77 + 887 002a DB68 ldr r3, [r3, #12] + 638:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash.c **** { + 888 .loc 1 638 6 view .LVU230 + 889 002c 9B06 lsls r3, r3, #26 + 890 002e 02D5 bpl .L70 + 641:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash.c **** } + 891 .loc 1 641 5 is_stmt 1 view .LVU231 + 892 0030 084B ldr r3, .L77 + 893 0032 2022 movs r2, #32 + 894 0034 DA60 str r2, [r3, #12] + 895 .L70: + 644:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash.c **** __HAL_FLASH_GET_FLAG(FLASH_FLAG_PGERR)) + 896 .loc 1 644 3 view .LVU232 + 644:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash.c **** __HAL_FLASH_GET_FLAG(FLASH_FLAG_PGERR)) + 897 .loc 1 644 6 is_stmt 0 view .LVU233 + 898 0036 074B ldr r3, .L77 + 899 0038 DB68 ldr r3, [r3, #12] + 644:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash.c **** __HAL_FLASH_GET_FLAG(FLASH_FLAG_PGERR)) + 900 .loc 1 644 5 view .LVU234 + 901 003a DB06 lsls r3, r3, #27 + 902 003c 05D4 bmi .L71 + 645:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash.c **** { + 903 .loc 1 645 6 view .LVU235 + 904 003e 054B ldr r3, .L77 + 905 0040 DB68 ldr r3, [r3, #12] + ARM GAS /tmp/ccgY7Mgl.s page 32 + + + 644:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash.c **** __HAL_FLASH_GET_FLAG(FLASH_FLAG_PGERR)) + 906 .loc 1 644 47 discriminator 1 view .LVU236 + 907 0042 5B07 lsls r3, r3, #29 + 908 0044 01D4 bmi .L71 + 653:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash.c **** } + 909 .loc 1 653 10 view .LVU237 + 910 0046 0020 movs r0, #0 + 911 .L68: + 654:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash.c **** + 912 .loc 1 654 1 view .LVU238 + 913 @ sp needed + 914 .LVL43: + 915 .LVL44: + 654:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash.c **** + 916 .loc 1 654 1 view .LVU239 + 917 0048 70BD pop {r4, r5, r6, pc} + 918 .LVL45: + 919 .L71: + 648:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash.c **** return HAL_ERROR; + 920 .loc 1 648 5 is_stmt 1 view .LVU240 + 921 004a FFF7FEFF bl FLASH_SetErrorCode + 922 .LVL46: + 649:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash.c **** } + 923 .loc 1 649 5 view .LVU241 + 649:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash.c **** } + 924 .loc 1 649 12 is_stmt 0 view .LVU242 + 925 004e 0120 movs r0, #1 + 926 0050 FAE7 b .L68 + 927 .L78: + 928 0052 C046 .align 2 + 929 .L77: + 930 0054 00200240 .word 1073881088 + 931 .cfi_endproc + 932 .LFE52: + 934 .section .text.HAL_FLASH_Program,"ax",%progbits + 935 .align 1 + 936 .global HAL_FLASH_Program + 937 .syntax unified + 938 .code 16 + 939 .thumb_func + 941 HAL_FLASH_Program: + 942 .LVL47: + 943 .LFB40: + 166:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash.c **** HAL_StatusTypeDef status = HAL_ERROR; + 944 .loc 1 166 1 is_stmt 1 view -0 + 945 .cfi_startproc + 946 @ args = 0, pretend = 0, frame = 0 + 947 @ frame_needed = 0, uses_anonymous_args = 0 + 166:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash.c **** HAL_StatusTypeDef status = HAL_ERROR; + 948 .loc 1 166 1 is_stmt 0 view .LVU244 + 949 0000 F8B5 push {r3, r4, r5, r6, r7, lr} + 950 .cfi_def_cfa_offset 24 + 951 .cfi_offset 3, -24 + 952 .cfi_offset 4, -20 + 953 .cfi_offset 5, -16 + 954 .cfi_offset 6, -12 + 955 .cfi_offset 7, -8 + ARM GAS /tmp/ccgY7Mgl.s page 33 + + + 956 .cfi_offset 14, -4 + 957 0002 CE46 mov lr, r9 + 958 0004 4746 mov r7, r8 + 959 0006 80B5 push {r7, lr} + 960 .cfi_def_cfa_offset 32 + 961 .cfi_offset 8, -32 + 962 .cfi_offset 9, -28 + 963 0008 0500 movs r5, r0 + 964 000a 0E00 movs r6, r1 + 965 000c 9046 mov r8, r2 + 966 000e 1F00 movs r7, r3 + 167:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash.c **** uint8_t index = 0U; + 967 .loc 1 167 3 is_stmt 1 view .LVU245 + 968 .LVL48: + 168:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash.c **** uint8_t nbiterations = 0U; + 969 .loc 1 168 3 view .LVU246 + 169:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash.c **** + 970 .loc 1 169 3 view .LVU247 + 172:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash.c **** + 971 .loc 1 172 3 view .LVU248 + 172:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash.c **** + 972 .loc 1 172 3 view .LVU249 + 973 0010 214B ldr r3, .L91 + 974 0012 1B7E ldrb r3, [r3, #24] + 975 0014 012B cmp r3, #1 + 976 0016 3DD0 beq .L87 + 172:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash.c **** + 977 .loc 1 172 3 discriminator 2 view .LVU250 + 978 0018 1F4B ldr r3, .L91 + 979 001a 0122 movs r2, #1 + 980 .LVL49: + 172:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash.c **** + 981 .loc 1 172 3 is_stmt 0 discriminator 2 view .LVU251 + 982 001c 1A76 strb r2, [r3, #24] + 172:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash.c **** + 983 .loc 1 172 3 is_stmt 1 discriminator 2 view .LVU252 + 175:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash.c **** assert_param(IS_FLASH_PROGRAM_ADDRESS(Address)); + 984 .loc 1 175 3 view .LVU253 + 176:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash.c **** + 985 .loc 1 176 3 view .LVU254 + 179:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash.c **** + 986 .loc 1 179 5 view .LVU255 + 179:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash.c **** + 987 .loc 1 179 14 is_stmt 0 view .LVU256 + 988 001e 1F48 ldr r0, .L91+4 + 989 .LVL50: + 179:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash.c **** + 990 .loc 1 179 14 view .LVU257 + 991 0020 FFF7FEFF bl FLASH_WaitForLastOperation + 992 .LVL51: + 179:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash.c **** + 993 .loc 1 179 14 view .LVU258 + 994 0024 041E subs r4, r0, #0 + 995 .LVL52: + 181:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash.c **** { + 996 .loc 1 181 3 is_stmt 1 view .LVU259 + 181:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash.c **** { + ARM GAS /tmp/ccgY7Mgl.s page 34 + + + 997 .loc 1 181 5 is_stmt 0 view .LVU260 + 998 0026 2ED1 bne .L81 + 183:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash.c **** { + 999 .loc 1 183 5 is_stmt 1 view .LVU261 + 183:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash.c **** { + 1000 .loc 1 183 7 is_stmt 0 view .LVU262 + 1001 0028 012D cmp r5, #1 + 1002 002a 07D0 beq .L88 + 188:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash.c **** { + 1003 .loc 1 188 10 is_stmt 1 view .LVU263 + 188:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash.c **** { + 1004 .loc 1 188 12 is_stmt 0 view .LVU264 + 1005 002c 022D cmp r5, #2 + 1006 002e 02D0 beq .L90 + 196:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash.c **** } + 1007 .loc 1 196 20 view .LVU265 + 1008 0030 0423 movs r3, #4 + 1009 0032 9946 mov r9, r3 + 1010 .LVL53: + 199:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash.c **** { + 1011 .loc 1 199 5 is_stmt 1 view .LVU266 + 199:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash.c **** { + 1012 .loc 1 199 5 is_stmt 0 view .LVU267 + 1013 0034 1DE0 b .L83 + 1014 .LVL54: + 1015 .L90: + 191:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash.c **** } + 1016 .loc 1 191 20 view .LVU268 + 1017 0036 0223 movs r3, #2 + 1018 0038 9946 mov r9, r3 + 1019 003a 1AE0 b .L83 + 1020 .L88: + 186:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash.c **** } + 1021 .loc 1 186 20 view .LVU269 + 1022 003c 0123 movs r3, #1 + 1023 003e 9946 mov r9, r3 + 1024 0040 17E0 b .L83 + 1025 .LVL55: + 1026 .L84: + 201:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash.c **** + 1027 .loc 1 201 70 view .LVU270 + 1028 0042 2022 movs r2, #32 + 1029 0044 D21A subs r2, r2, r3 + 1030 0046 3900 movs r1, r7 + 1031 0048 9140 lsls r1, r1, r2 + 1032 004a 0A00 movs r2, r1 + 1033 004c 4146 mov r1, r8 + 1034 004e D940 lsrs r1, r1, r3 + 1035 0050 1143 orrs r1, r2 + 1036 .L85: + 201:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash.c **** + 1037 .loc 1 201 7 view .LVU271 + 1038 0052 89B2 uxth r1, r1 + 1039 0054 8019 adds r0, r0, r6 + 1040 0056 FFF7FEFF bl FLASH_Program_HalfWord + 1041 .LVL56: + 204:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash.c **** + ARM GAS /tmp/ccgY7Mgl.s page 35 + + + 1042 .loc 1 204 9 is_stmt 1 view .LVU272 + 204:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash.c **** + 1043 .loc 1 204 18 is_stmt 0 view .LVU273 + 1044 005a 1048 ldr r0, .L91+4 + 1045 005c FFF7FEFF bl FLASH_WaitForLastOperation + 1046 .LVL57: + 207:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash.c **** /* In case of error, stop programming procedure */ + 1047 .loc 1 207 9 is_stmt 1 view .LVU274 + 1048 0060 0F4A ldr r2, .L91+8 + 1049 0062 1369 ldr r3, [r2, #16] + 1050 0064 0121 movs r1, #1 + 1051 0066 8B43 bics r3, r1 + 1052 0068 1361 str r3, [r2, #16] + 209:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash.c **** { + 1053 .loc 1 209 7 view .LVU275 + 209:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash.c **** { + 1054 .loc 1 209 10 is_stmt 0 view .LVU276 + 1055 006a 0028 cmp r0, #0 + 1056 006c 0BD1 bne .L81 + 199:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash.c **** { + 1057 .loc 1 199 49 is_stmt 1 discriminator 2 view .LVU277 + 1058 006e 0134 adds r4, r4, #1 + 1059 .LVL58: + 199:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash.c **** { + 1060 .loc 1 199 49 is_stmt 0 discriminator 2 view .LVU278 + 1061 0070 E4B2 uxtb r4, r4 + 1062 .LVL59: + 1063 .L83: + 199:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash.c **** { + 1064 .loc 1 199 28 is_stmt 1 discriminator 1 view .LVU279 + 1065 0072 4C45 cmp r4, r9 + 1066 0074 07D2 bcs .L81 + 201:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash.c **** + 1067 .loc 1 201 7 view .LVU280 + 201:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash.c **** + 1068 .loc 1 201 44 is_stmt 0 view .LVU281 + 1069 0076 6000 lsls r0, r4, #1 + 1070 .LVL60: + 201:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash.c **** + 1071 .loc 1 201 77 view .LVU282 + 1072 0078 2301 lsls r3, r4, #4 + 201:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash.c **** + 1073 .loc 1 201 70 view .LVU283 + 1074 007a 1A00 movs r2, r3 + 1075 007c 203A subs r2, r2, #32 + 1076 007e E0D4 bmi .L84 + 1077 0080 3900 movs r1, r7 + 1078 0082 D140 lsrs r1, r1, r2 + 1079 0084 E5E7 b .L85 + 1080 .LVL61: + 1081 .L81: + 217:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash.c **** + 1082 .loc 1 217 3 is_stmt 1 view .LVU284 + 217:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash.c **** + 1083 .loc 1 217 3 view .LVU285 + 1084 0086 044B ldr r3, .L91 + 1085 0088 0022 movs r2, #0 + ARM GAS /tmp/ccgY7Mgl.s page 36 + + + 1086 008a 1A76 strb r2, [r3, #24] + 217:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash.c **** + 1087 .loc 1 217 3 view .LVU286 + 219:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash.c **** } + 1088 .loc 1 219 3 view .LVU287 + 1089 .LVL62: + 1090 .L80: + 220:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash.c **** + 1091 .loc 1 220 1 is_stmt 0 view .LVU288 + 1092 @ sp needed + 1093 .LVL63: + 1094 .LVL64: + 220:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash.c **** + 1095 .loc 1 220 1 view .LVU289 + 1096 008c C0BC pop {r6, r7} + 1097 008e B946 mov r9, r7 + 1098 0090 B046 mov r8, r6 + 1099 0092 F8BD pop {r3, r4, r5, r6, r7, pc} + 1100 .LVL65: + 1101 .L87: + 172:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash.c **** + 1102 .loc 1 172 3 discriminator 1 view .LVU290 + 1103 0094 0220 movs r0, #2 + 1104 .LVL66: + 172:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash.c **** + 1105 .loc 1 172 3 discriminator 1 view .LVU291 + 1106 0096 F9E7 b .L80 + 1107 .L92: + 1108 .align 2 + 1109 .L91: + 1110 0098 00000000 .word pFlash + 1111 009c 50C30000 .word 50000 + 1112 00a0 00200240 .word 1073881088 + 1113 .cfi_endproc + 1114 .LFE40: + 1116 .section .text.HAL_FLASH_OB_Launch,"ax",%progbits + 1117 .align 1 + 1118 .global HAL_FLASH_OB_Launch + 1119 .syntax unified + 1120 .code 16 + 1121 .thumb_func + 1123 HAL_FLASH_OB_Launch: + 1124 .LFB49: + 547:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash.c **** /* Set the OBL_Launch bit to launch the option byte loading */ + 1125 .loc 1 547 1 is_stmt 1 view -0 + 1126 .cfi_startproc + 1127 @ args = 0, pretend = 0, frame = 0 + 1128 @ frame_needed = 0, uses_anonymous_args = 0 + 1129 0000 10B5 push {r4, lr} + 1130 .cfi_def_cfa_offset 8 + 1131 .cfi_offset 4, -8 + 1132 .cfi_offset 14, -4 + 549:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash.c **** + 1133 .loc 1 549 3 view .LVU293 + 1134 0002 054A ldr r2, .L94 + 1135 0004 1169 ldr r1, [r2, #16] + 1136 0006 8023 movs r3, #128 + ARM GAS /tmp/ccgY7Mgl.s page 37 + + + 1137 0008 9B01 lsls r3, r3, #6 + 1138 000a 0B43 orrs r3, r1 + 1139 000c 1361 str r3, [r2, #16] + 552:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash.c **** } + 1140 .loc 1 552 3 view .LVU294 + 552:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash.c **** } + 1141 .loc 1 552 10 is_stmt 0 view .LVU295 + 1142 000e 0348 ldr r0, .L94+4 + 1143 0010 FFF7FEFF bl FLASH_WaitForLastOperation + 1144 .LVL67: + 553:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash.c **** + 1145 .loc 1 553 1 view .LVU296 + 1146 @ sp needed + 1147 0014 10BD pop {r4, pc} + 1148 .L95: + 1149 0016 C046 .align 2 + 1150 .L94: + 1151 0018 00200240 .word 1073881088 + 1152 001c 50C30000 .word 50000 + 1153 .cfi_endproc + 1154 .LFE49: + 1156 .global pFlash + 1157 .section .bss.pFlash,"aw",%nobits + 1158 .align 3 + 1161 pFlash: + 1162 0000 00000000 .space 32 + 1162 00000000 + 1162 00000000 + 1162 00000000 + 1162 00000000 + 1163 .text + 1164 .Letext0: + 1165 .file 2 "/home/chiangni/.config/VSCodium/User/globalStorage/bmd.stm32-for-vscode/@xpack-dev-tools/ + 1166 .file 3 "/home/chiangni/.config/VSCodium/User/globalStorage/bmd.stm32-for-vscode/@xpack-dev-tools/ + 1167 .file 4 "Drivers/CMSIS/Device/ST/STM32F0xx/Include/stm32f042x6.h" + 1168 .file 5 "Drivers/CMSIS/Device/ST/STM32F0xx/Include/stm32f0xx.h" + 1169 .file 6 "Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_def.h" + 1170 .file 7 "Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_flash.h" + 1171 .file 8 "Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal.h" + ARM GAS /tmp/ccgY7Mgl.s page 38 + + +DEFINED SYMBOLS + *ABS*:00000000 stm32f0xx_hal_flash.c + /tmp/ccgY7Mgl.s:19 .text.FLASH_Program_HalfWord:00000000 $t + /tmp/ccgY7Mgl.s:24 .text.FLASH_Program_HalfWord:00000000 FLASH_Program_HalfWord + /tmp/ccgY7Mgl.s:56 .text.FLASH_Program_HalfWord:00000018 $d + /tmp/ccgY7Mgl.s:1161 .bss.pFlash:00000000 pFlash + /tmp/ccgY7Mgl.s:62 .text.FLASH_SetErrorCode:00000000 $t + /tmp/ccgY7Mgl.s:67 .text.FLASH_SetErrorCode:00000000 FLASH_SetErrorCode + /tmp/ccgY7Mgl.s:130 .text.FLASH_SetErrorCode:00000038 $d + /tmp/ccgY7Mgl.s:136 .text.HAL_FLASH_Program_IT:00000000 $t + /tmp/ccgY7Mgl.s:142 .text.HAL_FLASH_Program_IT:00000000 HAL_FLASH_Program_IT + /tmp/ccgY7Mgl.s:260 .text.HAL_FLASH_Program_IT:00000060 $d + /tmp/ccgY7Mgl.s:266 .text.HAL_FLASH_EndOfOperationCallback:00000000 $t + /tmp/ccgY7Mgl.s:272 .text.HAL_FLASH_EndOfOperationCallback:00000000 HAL_FLASH_EndOfOperationCallback + /tmp/ccgY7Mgl.s:288 .text.HAL_FLASH_OperationErrorCallback:00000000 $t + /tmp/ccgY7Mgl.s:294 .text.HAL_FLASH_OperationErrorCallback:00000000 HAL_FLASH_OperationErrorCallback + /tmp/ccgY7Mgl.s:310 .text.HAL_FLASH_IRQHandler:00000000 $t + /tmp/ccgY7Mgl.s:316 .text.HAL_FLASH_IRQHandler:00000000 HAL_FLASH_IRQHandler + /tmp/ccgY7Mgl.s:618 .text.HAL_FLASH_IRQHandler:00000148 $d + /tmp/ccgY7Mgl.s:625 .text.HAL_FLASH_Unlock:00000000 $t + /tmp/ccgY7Mgl.s:631 .text.HAL_FLASH_Unlock:00000000 HAL_FLASH_Unlock + /tmp/ccgY7Mgl.s:679 .text.HAL_FLASH_Unlock:00000024 $d + /tmp/ccgY7Mgl.s:686 .text.HAL_FLASH_Lock:00000000 $t + /tmp/ccgY7Mgl.s:692 .text.HAL_FLASH_Lock:00000000 HAL_FLASH_Lock + /tmp/ccgY7Mgl.s:713 .text.HAL_FLASH_Lock:00000010 $d + /tmp/ccgY7Mgl.s:718 .text.HAL_FLASH_OB_Unlock:00000000 $t + /tmp/ccgY7Mgl.s:724 .text.HAL_FLASH_OB_Unlock:00000000 HAL_FLASH_OB_Unlock + /tmp/ccgY7Mgl.s:759 .text.HAL_FLASH_OB_Unlock:0000001c $d + /tmp/ccgY7Mgl.s:766 .text.HAL_FLASH_OB_Lock:00000000 $t + /tmp/ccgY7Mgl.s:772 .text.HAL_FLASH_OB_Lock:00000000 HAL_FLASH_OB_Lock + /tmp/ccgY7Mgl.s:793 .text.HAL_FLASH_OB_Lock:00000010 $d + /tmp/ccgY7Mgl.s:799 .text.HAL_FLASH_GetError:00000000 $t + /tmp/ccgY7Mgl.s:805 .text.HAL_FLASH_GetError:00000000 HAL_FLASH_GetError + /tmp/ccgY7Mgl.s:822 .text.HAL_FLASH_GetError:00000008 $d + /tmp/ccgY7Mgl.s:827 .text.FLASH_WaitForLastOperation:00000000 $t + /tmp/ccgY7Mgl.s:833 .text.FLASH_WaitForLastOperation:00000000 FLASH_WaitForLastOperation + /tmp/ccgY7Mgl.s:930 .text.FLASH_WaitForLastOperation:00000054 $d + /tmp/ccgY7Mgl.s:935 .text.HAL_FLASH_Program:00000000 $t + /tmp/ccgY7Mgl.s:941 .text.HAL_FLASH_Program:00000000 HAL_FLASH_Program + /tmp/ccgY7Mgl.s:1110 .text.HAL_FLASH_Program:00000098 $d + /tmp/ccgY7Mgl.s:1117 .text.HAL_FLASH_OB_Launch:00000000 $t + /tmp/ccgY7Mgl.s:1123 .text.HAL_FLASH_OB_Launch:00000000 HAL_FLASH_OB_Launch + /tmp/ccgY7Mgl.s:1151 .text.HAL_FLASH_OB_Launch:00000018 $d + /tmp/ccgY7Mgl.s:1158 .bss.pFlash:00000000 $d + +UNDEFINED SYMBOLS +FLASH_PageErase +HAL_GetTick diff --git a/Software/build/stm32f0xx_hal_flash.o b/Software/build/stm32f0xx_hal_flash.o new file mode 100644 index 0000000..7eaa951 Binary files /dev/null and b/Software/build/stm32f0xx_hal_flash.o differ diff --git a/Software/build/stm32f0xx_hal_flash_ex.d b/Software/build/stm32f0xx_hal_flash_ex.d new file mode 100644 index 0000000..a867b3c --- /dev/null +++ b/Software/build/stm32f0xx_hal_flash_ex.d @@ -0,0 +1,60 @@ +build/stm32f0xx_hal_flash_ex.o: \ + Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c \ + Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal.h \ + Core/Inc/stm32f0xx_hal_conf.h \ + Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_rcc.h \ + Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_def.h \ + Drivers/CMSIS/Device/ST/STM32F0xx/Include/stm32f0xx.h \ + Drivers/CMSIS/Device/ST/STM32F0xx/Include/stm32f042x6.h \ + Drivers/CMSIS/Include/core_cm0.h Drivers/CMSIS/Include/cmsis_version.h \ + Drivers/CMSIS/Include/cmsis_compiler.h Drivers/CMSIS/Include/cmsis_gcc.h \ + Drivers/CMSIS/Device/ST/STM32F0xx/Include/system_stm32f0xx.h \ + Drivers/STM32F0xx_HAL_Driver/Inc/Legacy/stm32_hal_legacy.h \ + Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_rcc_ex.h \ + Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_gpio.h \ + Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_gpio_ex.h \ + Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_exti.h \ + Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_dma.h \ + Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_dma_ex.h \ + Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_cortex.h \ + Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_adc.h \ + Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_adc_ex.h \ + Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_can.h \ + Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_flash.h \ + Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_flash_ex.h \ + Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_i2c.h \ + Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_i2c_ex.h \ + Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_pwr.h \ + Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_pwr_ex.h \ + Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_tim.h \ + Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_tim_ex.h +Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal.h: +Core/Inc/stm32f0xx_hal_conf.h: +Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_rcc.h: +Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_def.h: +Drivers/CMSIS/Device/ST/STM32F0xx/Include/stm32f0xx.h: +Drivers/CMSIS/Device/ST/STM32F0xx/Include/stm32f042x6.h: +Drivers/CMSIS/Include/core_cm0.h: +Drivers/CMSIS/Include/cmsis_version.h: +Drivers/CMSIS/Include/cmsis_compiler.h: +Drivers/CMSIS/Include/cmsis_gcc.h: +Drivers/CMSIS/Device/ST/STM32F0xx/Include/system_stm32f0xx.h: +Drivers/STM32F0xx_HAL_Driver/Inc/Legacy/stm32_hal_legacy.h: +Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_rcc_ex.h: +Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_gpio.h: +Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_gpio_ex.h: +Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_exti.h: +Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_dma.h: +Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_dma_ex.h: +Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_cortex.h: +Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_adc.h: +Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_adc_ex.h: +Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_can.h: +Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_flash.h: +Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_flash_ex.h: +Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_i2c.h: +Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_i2c_ex.h: +Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_pwr.h: +Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_pwr_ex.h: +Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_tim.h: +Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_tim_ex.h: diff --git a/Software/build/stm32f0xx_hal_flash_ex.lst b/Software/build/stm32f0xx_hal_flash_ex.lst new file mode 100644 index 0000000..2a918eb --- /dev/null +++ b/Software/build/stm32f0xx_hal_flash_ex.lst @@ -0,0 +1,2940 @@ +ARM GAS /tmp/cc2085Zh.s page 1 + + + 1 .cpu cortex-m0 + 2 .arch armv6s-m + 3 .fpu softvfp + 4 .eabi_attribute 20, 1 + 5 .eabi_attribute 21, 1 + 6 .eabi_attribute 23, 3 + 7 .eabi_attribute 24, 1 + 8 .eabi_attribute 25, 1 + 9 .eabi_attribute 26, 1 + 10 .eabi_attribute 30, 1 + 11 .eabi_attribute 34, 0 + 12 .eabi_attribute 18, 4 + 13 .file "stm32f0xx_hal_flash_ex.c" + 14 .text + 15 .Ltext0: + 16 .cfi_sections .debug_frame + 17 .file 1 "Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c" + 18 .section .text.FLASH_MassErase,"ax",%progbits + 19 .align 1 + 20 .syntax unified + 21 .code 16 + 22 .thumb_func + 24 FLASH_MassErase: + 25 .LFB46: + 1:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** /** + 2:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** ****************************************************************************** + 3:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** * @file stm32f0xx_hal_flash_ex.c + 4:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** * @author MCD Application Team + 5:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** * @brief Extended FLASH HAL module driver. + 6:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** * + 7:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** * This file provides firmware functions to manage the following + 8:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** * functionalities of the FLASH peripheral: + 9:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** * + Extended Initialization/de-initialization functions + 10:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** * + Extended I/O operation functions + 11:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** * + Extended Peripheral Control functions + 12:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** * + 13:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** @verbatim + 14:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** ============================================================================== + 15:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** ##### Flash peripheral extended features ##### + 16:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** ============================================================================== + 17:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** + 18:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** ##### How to use this driver ##### + 19:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** ============================================================================== + 20:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** [..] This driver provides functions to configure and program the FLASH memory + 21:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** of all STM32F0xxx devices. It includes + 22:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** + 23:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** (++) Set/Reset the write protection + 24:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** (++) Program the user Option Bytes + 25:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** (++) Get the Read protection Level + 26:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** + 27:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** @endverbatim + 28:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** ****************************************************************************** + 29:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** * @attention + 30:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** * + 31:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** * Copyright (c) 2016 STMicroelectronics. + 32:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** * All rights reserved. + 33:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** * + ARM GAS /tmp/cc2085Zh.s page 2 + + + 34:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** * This software is licensed under terms that can be found in the LICENSE file in + 35:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** * the root directory of this software component. + 36:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** * If no LICENSE file comes with this software, it is provided AS-IS. + 37:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** ****************************************************************************** + 38:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** */ + 39:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** + 40:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** /* Includes ------------------------------------------------------------------*/ + 41:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** #include "stm32f0xx_hal.h" + 42:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** + 43:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** /** @addtogroup STM32F0xx_HAL_Driver + 44:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** * @{ + 45:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** */ + 46:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** #ifdef HAL_FLASH_MODULE_ENABLED + 47:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** + 48:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** /** @addtogroup FLASH + 49:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** * @{ + 50:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** */ + 51:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** /** @addtogroup FLASH_Private_Variables + 52:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** * @{ + 53:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** */ + 54:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** /* Variables used for Erase pages under interruption*/ + 55:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** extern FLASH_ProcessTypeDef pFlash; + 56:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** /** + 57:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** * @} + 58:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** */ + 59:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** + 60:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** /** + 61:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** * @} + 62:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** */ + 63:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** + 64:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** /** @defgroup FLASHEx FLASHEx + 65:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** * @brief FLASH HAL Extension module driver + 66:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** * @{ + 67:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** */ + 68:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** + 69:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** /* Private typedef -----------------------------------------------------------*/ + 70:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** /* Private define ------------------------------------------------------------*/ + 71:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** /** @defgroup FLASHEx_Private_Constants FLASHEx Private Constants + 72:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** * @{ + 73:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** */ + 74:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** #define FLASH_POSITION_IWDGSW_BIT 8U + 75:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** #define FLASH_POSITION_OB_USERDATA0_BIT 16U + 76:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** #define FLASH_POSITION_OB_USERDATA1_BIT 24U + 77:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** /** + 78:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** * @} + 79:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** */ + 80:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** + 81:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** /* Private macro -------------------------------------------------------------*/ + 82:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** /** @defgroup FLASHEx_Private_Macros FLASHEx Private Macros + 83:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** * @{ + 84:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** */ + 85:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** /** + 86:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** * @} + 87:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** */ + 88:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** + 89:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** /* Private variables ---------------------------------------------------------*/ + 90:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** /* Private function prototypes -----------------------------------------------*/ + ARM GAS /tmp/cc2085Zh.s page 3 + + + 91:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** /** @defgroup FLASHEx_Private_Functions FLASHEx Private Functions + 92:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** * @{ + 93:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** */ + 94:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** /* Erase operations */ + 95:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** static void FLASH_MassErase(void); + 96:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** void FLASH_PageErase(uint32_t PageAddress); + 97:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** + 98:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** /* Option bytes control */ + 99:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** static HAL_StatusTypeDef FLASH_OB_EnableWRP(uint32_t WriteProtectPage); + 100:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** static HAL_StatusTypeDef FLASH_OB_DisableWRP(uint32_t WriteProtectPage); + 101:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** static HAL_StatusTypeDef FLASH_OB_RDP_LevelConfig(uint8_t ReadProtectLevel); + 102:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** static HAL_StatusTypeDef FLASH_OB_UserConfig(uint8_t UserConfig); + 103:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** static HAL_StatusTypeDef FLASH_OB_ProgramData(uint32_t Address, uint8_t Data); + 104:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** static uint32_t FLASH_OB_GetWRP(void); + 105:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** static uint32_t FLASH_OB_GetRDP(void); + 106:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** static uint8_t FLASH_OB_GetUser(void); + 107:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** + 108:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** /** + 109:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** * @} + 110:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** */ + 111:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** + 112:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** /* Exported functions ---------------------------------------------------------*/ + 113:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** /** @defgroup FLASHEx_Exported_Functions FLASHEx Exported Functions + 114:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** * @{ + 115:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** */ + 116:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** + 117:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** /** @defgroup FLASHEx_Exported_Functions_Group1 FLASHEx Memory Erasing functions + 118:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** * @brief FLASH Memory Erasing functions + 119:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** * + 120:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** @verbatim + 121:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** ============================================================================== + 122:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** ##### FLASH Erasing Programming functions ##### + 123:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** ============================================================================== + 124:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** + 125:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** [..] The FLASH Memory Erasing functions, includes the following functions: + 126:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** (+) HAL_FLASHEx_Erase: return only when erase has been done + 127:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** (+) HAL_FLASHEx_Erase_IT: end of erase is done when HAL_FLASH_EndOfOperationCallback + 128:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** is called with parameter 0xFFFFFFFF + 129:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** + 130:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** [..] Any operation of erase should follow these steps: + 131:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** (#) Call the HAL_FLASH_Unlock() function to enable the flash control register and + 132:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** program memory access. + 133:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** (#) Call the desired function to erase page. + 134:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** (#) Call the HAL_FLASH_Lock() to disable the flash program memory access + 135:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** (recommended to protect the FLASH memory against possible unwanted operation). + 136:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** + 137:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** @endverbatim + 138:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** * @{ + 139:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** */ + 140:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** + 141:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** + 142:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** /** + 143:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** * @brief Perform a mass erase or erase the specified FLASH memory pages + 144:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** * @note To correctly run this function, the @ref HAL_FLASH_Unlock() function + 145:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** * must be called before. + 146:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** * Call the @ref HAL_FLASH_Lock() to disable the flash memory access + 147:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** * (recommended to protect the FLASH memory against possible unwanted operation) + ARM GAS /tmp/cc2085Zh.s page 4 + + + 148:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** * @param[in] pEraseInit pointer to an FLASH_EraseInitTypeDef structure that + 149:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** * contains the configuration information for the erasing. + 150:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** * + 151:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** * @param[out] PageError pointer to variable that + 152:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** * contains the configuration information on faulty page in case of error + 153:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** * (0xFFFFFFFF means that all the pages have been correctly erased) + 154:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** * + 155:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** * @retval HAL_StatusTypeDef HAL Status + 156:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** */ + 157:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** HAL_StatusTypeDef HAL_FLASHEx_Erase(FLASH_EraseInitTypeDef *pEraseInit, uint32_t *PageError) + 158:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** { + 159:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** HAL_StatusTypeDef status = HAL_ERROR; + 160:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** uint32_t address = 0U; + 161:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** + 162:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** /* Process Locked */ + 163:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** __HAL_LOCK(&pFlash); + 164:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** + 165:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** /* Check the parameters */ + 166:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** assert_param(IS_FLASH_TYPEERASE(pEraseInit->TypeErase)); + 167:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** + 168:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** if (pEraseInit->TypeErase == FLASH_TYPEERASE_MASSERASE) + 169:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** { + 170:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** /* Mass Erase requested for Bank1 */ + 171:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** /* Wait for last operation to be completed */ + 172:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** if (FLASH_WaitForLastOperation((uint32_t)FLASH_TIMEOUT_VALUE) == HAL_OK) + 173:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** { + 174:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** /*Mass erase to be done*/ + 175:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** FLASH_MassErase(); + 176:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** + 177:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** /* Wait for last operation to be completed */ + 178:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** status = FLASH_WaitForLastOperation((uint32_t)FLASH_TIMEOUT_VALUE); + 179:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** + 180:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** /* If the erase operation is completed, disable the MER Bit */ + 181:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** CLEAR_BIT(FLASH->CR, FLASH_CR_MER); + 182:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** } + 183:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** } + 184:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** else + 185:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** { + 186:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** /* Page Erase is requested */ + 187:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** /* Check the parameters */ + 188:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** assert_param(IS_FLASH_PROGRAM_ADDRESS(pEraseInit->PageAddress)); + 189:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** assert_param(IS_FLASH_NB_PAGES(pEraseInit->PageAddress, pEraseInit->NbPages)); + 190:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** + 191:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** /* Page Erase requested on address located on bank1 */ + 192:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** /* Wait for last operation to be completed */ + 193:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** if (FLASH_WaitForLastOperation((uint32_t)FLASH_TIMEOUT_VALUE) == HAL_OK) + 194:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** { + 195:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** /*Initialization of PageError variable*/ + 196:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** *PageError = 0xFFFFFFFFU; + 197:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** + 198:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** /* Erase page by page to be done*/ + 199:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** for(address = pEraseInit->PageAddress; + 200:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** address < ((pEraseInit->NbPages * FLASH_PAGE_SIZE) + pEraseInit->PageAddress); + 201:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** address += FLASH_PAGE_SIZE) + 202:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** { + 203:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** FLASH_PageErase(address); + 204:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** + ARM GAS /tmp/cc2085Zh.s page 5 + + + 205:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** /* Wait for last operation to be completed */ + 206:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** status = FLASH_WaitForLastOperation((uint32_t)FLASH_TIMEOUT_VALUE); + 207:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** + 208:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** /* If the erase operation is completed, disable the PER Bit */ + 209:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** CLEAR_BIT(FLASH->CR, FLASH_CR_PER); + 210:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** + 211:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** if (status != HAL_OK) + 212:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** { + 213:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** /* In case of error, stop erase procedure and return the faulty address */ + 214:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** *PageError = address; + 215:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** break; + 216:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** } + 217:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** } + 218:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** } + 219:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** } + 220:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** + 221:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** /* Process Unlocked */ + 222:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** __HAL_UNLOCK(&pFlash); + 223:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** + 224:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** return status; + 225:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** } + 226:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** + 227:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** /** + 228:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** * @brief Perform a mass erase or erase the specified FLASH memory pages with interrupt enabled + 229:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** * @note To correctly run this function, the @ref HAL_FLASH_Unlock() function + 230:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** * must be called before. + 231:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** * Call the @ref HAL_FLASH_Lock() to disable the flash memory access + 232:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** * (recommended to protect the FLASH memory against possible unwanted operation) + 233:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** * @param pEraseInit pointer to an FLASH_EraseInitTypeDef structure that + 234:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** * contains the configuration information for the erasing. + 235:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** * + 236:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** * @retval HAL_StatusTypeDef HAL Status + 237:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** */ + 238:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** HAL_StatusTypeDef HAL_FLASHEx_Erase_IT(FLASH_EraseInitTypeDef *pEraseInit) + 239:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** { + 240:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** HAL_StatusTypeDef status = HAL_OK; + 241:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** + 242:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** /* Process Locked */ + 243:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** __HAL_LOCK(&pFlash); + 244:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** + 245:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** /* If procedure already ongoing, reject the next one */ + 246:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** if (pFlash.ProcedureOnGoing != FLASH_PROC_NONE) + 247:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** { + 248:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** return HAL_ERROR; + 249:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** } + 250:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** + 251:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** /* Check the parameters */ + 252:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** assert_param(IS_FLASH_TYPEERASE(pEraseInit->TypeErase)); + 253:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** + 254:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** /* Enable End of FLASH Operation and Error source interrupts */ + 255:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** __HAL_FLASH_ENABLE_IT(FLASH_IT_EOP | FLASH_IT_ERR); + 256:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** + 257:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** if (pEraseInit->TypeErase == FLASH_TYPEERASE_MASSERASE) + 258:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** { + 259:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** /*Mass erase to be done*/ + 260:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** pFlash.ProcedureOnGoing = FLASH_PROC_MASSERASE; + 261:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** FLASH_MassErase(); + ARM GAS /tmp/cc2085Zh.s page 6 + + + 262:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** } + 263:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** else + 264:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** { + 265:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** /* Erase by page to be done*/ + 266:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** + 267:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** /* Check the parameters */ + 268:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** assert_param(IS_FLASH_PROGRAM_ADDRESS(pEraseInit->PageAddress)); + 269:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** assert_param(IS_FLASH_NB_PAGES(pEraseInit->PageAddress, pEraseInit->NbPages)); + 270:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** + 271:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** pFlash.ProcedureOnGoing = FLASH_PROC_PAGEERASE; + 272:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** pFlash.DataRemaining = pEraseInit->NbPages; + 273:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** pFlash.Address = pEraseInit->PageAddress; + 274:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** + 275:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** /*Erase 1st page and wait for IT*/ + 276:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** FLASH_PageErase(pEraseInit->PageAddress); + 277:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** } + 278:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** + 279:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** return status; + 280:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** } + 281:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** + 282:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** /** + 283:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** * @} + 284:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** */ + 285:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** + 286:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** /** @defgroup FLASHEx_Exported_Functions_Group2 Option Bytes Programming functions + 287:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** * @brief Option Bytes Programming functions + 288:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** * + 289:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** @verbatim + 290:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** ============================================================================== + 291:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** ##### Option Bytes Programming functions ##### + 292:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** ============================================================================== + 293:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** [..] + 294:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** This subsection provides a set of functions allowing to control the FLASH + 295:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** option bytes operations. + 296:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** + 297:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** @endverbatim + 298:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** * @{ + 299:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** */ + 300:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** + 301:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** /** + 302:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** * @brief Erases the FLASH option bytes. + 303:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** * @note This functions erases all option bytes except the Read protection (RDP). + 304:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** * The function @ref HAL_FLASH_Unlock() should be called before to unlock the FLASH interf + 305:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** * The function @ref HAL_FLASH_OB_Unlock() should be called before to unlock the options b + 306:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** * The function @ref HAL_FLASH_OB_Launch() should be called after to force the reload of t + 307:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** * (system reset will occur) + 308:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** * @retval HAL status + 309:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** */ + 310:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** + 311:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** HAL_StatusTypeDef HAL_FLASHEx_OBErase(void) + 312:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** { + 313:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** uint8_t rdptmp = OB_RDP_LEVEL_0; + 314:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** HAL_StatusTypeDef status = HAL_ERROR; + 315:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** + 316:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** /* Get the actual read protection Option Byte value */ + 317:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** rdptmp = FLASH_OB_GetRDP(); + 318:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** + ARM GAS /tmp/cc2085Zh.s page 7 + + + 319:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** /* Wait for last operation to be completed */ + 320:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** status = FLASH_WaitForLastOperation((uint32_t)FLASH_TIMEOUT_VALUE); + 321:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** + 322:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** if(status == HAL_OK) + 323:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** { + 324:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** /* Clean the error context */ + 325:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** pFlash.ErrorCode = HAL_FLASH_ERROR_NONE; + 326:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** + 327:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** /* If the previous operation is completed, proceed to erase the option bytes */ + 328:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** SET_BIT(FLASH->CR, FLASH_CR_OPTER); + 329:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** SET_BIT(FLASH->CR, FLASH_CR_STRT); + 330:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** + 331:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** /* Wait for last operation to be completed */ + 332:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** status = FLASH_WaitForLastOperation((uint32_t)FLASH_TIMEOUT_VALUE); + 333:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** + 334:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** /* If the erase operation is completed, disable the OPTER Bit */ + 335:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** CLEAR_BIT(FLASH->CR, FLASH_CR_OPTER); + 336:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** + 337:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** if(status == HAL_OK) + 338:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** { + 339:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** /* Restore the last read protection Option Byte value */ + 340:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** status = FLASH_OB_RDP_LevelConfig(rdptmp); + 341:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** } + 342:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** } + 343:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** + 344:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** /* Return the erase status */ + 345:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** return status; + 346:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** } + 347:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** + 348:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** /** + 349:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** * @brief Program option bytes + 350:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** * @note The function @ref HAL_FLASH_Unlock() should be called before to unlock the FLASH interf + 351:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** * The function @ref HAL_FLASH_OB_Unlock() should be called before to unlock the options b + 352:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** * The function @ref HAL_FLASH_OB_Launch() should be called after to force the reload of t + 353:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** * (system reset will occur) + 354:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** * + 355:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** * @param pOBInit pointer to an FLASH_OBInitStruct structure that + 356:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** * contains the configuration information for the programming. + 357:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** * + 358:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** * @retval HAL_StatusTypeDef HAL Status + 359:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** */ + 360:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** HAL_StatusTypeDef HAL_FLASHEx_OBProgram(FLASH_OBProgramInitTypeDef *pOBInit) + 361:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** { + 362:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** HAL_StatusTypeDef status = HAL_ERROR; + 363:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** + 364:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** /* Process Locked */ + 365:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** __HAL_LOCK(&pFlash); + 366:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** + 367:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** /* Check the parameters */ + 368:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** assert_param(IS_OPTIONBYTE(pOBInit->OptionType)); + 369:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** + 370:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** /* Write protection configuration */ + 371:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** if((pOBInit->OptionType & OPTIONBYTE_WRP) == OPTIONBYTE_WRP) + 372:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** { + 373:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** assert_param(IS_WRPSTATE(pOBInit->WRPState)); + 374:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** if (pOBInit->WRPState == OB_WRPSTATE_ENABLE) + 375:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** { + ARM GAS /tmp/cc2085Zh.s page 8 + + + 376:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** /* Enable of Write protection on the selected page */ + 377:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** status = FLASH_OB_EnableWRP(pOBInit->WRPPage); + 378:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** } + 379:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** else + 380:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** { + 381:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** /* Disable of Write protection on the selected page */ + 382:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** status = FLASH_OB_DisableWRP(pOBInit->WRPPage); + 383:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** } + 384:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** if (status != HAL_OK) + 385:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** { + 386:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** /* Process Unlocked */ + 387:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** __HAL_UNLOCK(&pFlash); + 388:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** return status; + 389:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** } + 390:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** } + 391:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** + 392:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** /* Read protection configuration */ + 393:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** if((pOBInit->OptionType & OPTIONBYTE_RDP) == OPTIONBYTE_RDP) + 394:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** { + 395:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** status = FLASH_OB_RDP_LevelConfig(pOBInit->RDPLevel); + 396:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** if (status != HAL_OK) + 397:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** { + 398:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** /* Process Unlocked */ + 399:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** __HAL_UNLOCK(&pFlash); + 400:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** return status; + 401:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** } + 402:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** } + 403:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** + 404:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** /* USER configuration */ + 405:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** if((pOBInit->OptionType & OPTIONBYTE_USER) == OPTIONBYTE_USER) + 406:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** { + 407:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** status = FLASH_OB_UserConfig(pOBInit->USERConfig); + 408:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** if (status != HAL_OK) + 409:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** { + 410:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** /* Process Unlocked */ + 411:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** __HAL_UNLOCK(&pFlash); + 412:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** return status; + 413:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** } + 414:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** } + 415:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** + 416:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** /* DATA configuration*/ + 417:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** if((pOBInit->OptionType & OPTIONBYTE_DATA) == OPTIONBYTE_DATA) + 418:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** { + 419:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** status = FLASH_OB_ProgramData(pOBInit->DATAAddress, pOBInit->DATAData); + 420:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** if (status != HAL_OK) + 421:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** { + 422:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** /* Process Unlocked */ + 423:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** __HAL_UNLOCK(&pFlash); + 424:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** return status; + 425:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** } + 426:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** } + 427:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** + 428:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** /* Process Unlocked */ + 429:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** __HAL_UNLOCK(&pFlash); + 430:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** + 431:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** return status; + 432:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** } + ARM GAS /tmp/cc2085Zh.s page 9 + + + 433:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** + 434:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** /** + 435:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** * @brief Get the Option byte configuration + 436:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** * @param pOBInit pointer to an FLASH_OBInitStruct structure that + 437:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** * contains the configuration information for the programming. + 438:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** * + 439:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** * @retval None + 440:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** */ + 441:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** void HAL_FLASHEx_OBGetConfig(FLASH_OBProgramInitTypeDef *pOBInit) + 442:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** { + 443:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** pOBInit->OptionType = OPTIONBYTE_WRP | OPTIONBYTE_RDP | OPTIONBYTE_USER; + 444:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** + 445:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** /*Get WRP*/ + 446:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** pOBInit->WRPPage = FLASH_OB_GetWRP(); + 447:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** + 448:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** /*Get RDP Level*/ + 449:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** pOBInit->RDPLevel = FLASH_OB_GetRDP(); + 450:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** + 451:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** /*Get USER*/ + 452:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** pOBInit->USERConfig = FLASH_OB_GetUser(); + 453:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** } + 454:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** + 455:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** /** + 456:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** * @brief Get the Option byte user data + 457:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** * @param DATAAdress Address of the option byte DATA + 458:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** * This parameter can be one of the following values: + 459:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** * @arg @ref OB_DATA_ADDRESS_DATA0 + 460:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** * @arg @ref OB_DATA_ADDRESS_DATA1 + 461:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** * @retval Value programmed in USER data + 462:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** */ + 463:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** uint32_t HAL_FLASHEx_OBGetUserData(uint32_t DATAAdress) + 464:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** { + 465:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** uint32_t value = 0U; + 466:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** + 467:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** if (DATAAdress == OB_DATA_ADDRESS_DATA0) + 468:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** { + 469:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** /* Get value programmed in OB USER Data0 */ + 470:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** value = READ_BIT(FLASH->OBR, FLASH_OBR_DATA0) >> FLASH_POSITION_OB_USERDATA0_BIT; + 471:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** } + 472:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** else + 473:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** { + 474:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** /* Get value programmed in OB USER Data1 */ + 475:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** value = READ_BIT(FLASH->OBR, FLASH_OBR_DATA1) >> FLASH_POSITION_OB_USERDATA1_BIT; + 476:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** } + 477:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** + 478:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** return value; + 479:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** } + 480:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** + 481:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** /** + 482:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** * @} + 483:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** */ + 484:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** + 485:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** /** + 486:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** * @} + 487:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** */ + 488:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** + 489:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** /** @addtogroup FLASHEx_Private_Functions + ARM GAS /tmp/cc2085Zh.s page 10 + + + 490:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** * @{ + 491:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** */ + 492:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** + 493:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** /** + 494:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** * @brief Full erase of FLASH memory Bank + 495:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** * + 496:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** * @retval None + 497:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** */ + 498:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** static void FLASH_MassErase(void) + 499:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** { + 26 .loc 1 499 1 view -0 + 27 .cfi_startproc + 28 @ args = 0, pretend = 0, frame = 0 + 29 @ frame_needed = 0, uses_anonymous_args = 0 + 30 @ link register save eliminated. + 500:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** /* Clean the error context */ + 501:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** pFlash.ErrorCode = HAL_FLASH_ERROR_NONE; + 31 .loc 1 501 3 view .LVU1 + 32 .loc 1 501 20 is_stmt 0 view .LVU2 + 33 0000 064B ldr r3, .L2 + 34 0002 0022 movs r2, #0 + 35 0004 DA61 str r2, [r3, #28] + 502:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** + 503:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** /* Only bank1 will be erased*/ + 504:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** SET_BIT(FLASH->CR, FLASH_CR_MER); + 36 .loc 1 504 5 is_stmt 1 view .LVU3 + 37 0006 064B ldr r3, .L2+4 + 38 0008 1A69 ldr r2, [r3, #16] + 39 000a 0421 movs r1, #4 + 40 000c 0A43 orrs r2, r1 + 41 000e 1A61 str r2, [r3, #16] + 505:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** SET_BIT(FLASH->CR, FLASH_CR_STRT); + 42 .loc 1 505 5 view .LVU4 + 43 0010 1A69 ldr r2, [r3, #16] + 44 0012 3C31 adds r1, r1, #60 + 45 0014 0A43 orrs r2, r1 + 46 0016 1A61 str r2, [r3, #16] + 506:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** } + 47 .loc 1 506 1 is_stmt 0 view .LVU5 + 48 @ sp needed + 49 0018 7047 bx lr + 50 .L3: + 51 001a C046 .align 2 + 52 .L2: + 53 001c 00000000 .word pFlash + 54 0020 00200240 .word 1073881088 + 55 .cfi_endproc + 56 .LFE46: + 58 .section .text.FLASH_OB_GetWRP,"ax",%progbits + 59 .align 1 + 60 .syntax unified + 61 .code 16 + 62 .thumb_func + 64 FLASH_OB_GetWRP: + 65 .LFB52: + 507:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** + 508:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** /** + ARM GAS /tmp/cc2085Zh.s page 11 + + + 509:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** * @brief Enable the write protection of the desired pages + 510:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** * @note An option byte erase is done automatically in this function. + 511:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** * @note When the memory read protection level is selected (RDP level = 1), + 512:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** * it is not possible to program or erase the flash page i if + 513:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** * debug features are connected or boot code is executed in RAM, even if nWRPi = 1 + 514:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** * + 515:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** * @param WriteProtectPage specifies the page(s) to be write protected. + 516:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** * The value of this parameter depend on device used within the same series + 517:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** * @retval HAL status + 518:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** */ + 519:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** static HAL_StatusTypeDef FLASH_OB_EnableWRP(uint32_t WriteProtectPage) + 520:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** { + 521:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** HAL_StatusTypeDef status = HAL_OK; + 522:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** uint16_t WRP0_Data = 0xFFFFU; + 523:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** #if defined(OB_WRP1_WRP1) + 524:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** uint16_t WRP1_Data = 0xFFFFU; + 525:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** #endif /* OB_WRP1_WRP1 */ + 526:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** #if defined(OB_WRP2_WRP2) + 527:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** uint16_t WRP2_Data = 0xFFFFU; + 528:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** #endif /* OB_WRP2_WRP2 */ + 529:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** #if defined(OB_WRP3_WRP3) + 530:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** uint16_t WRP3_Data = 0xFFFFU; + 531:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** #endif /* OB_WRP3_WRP3 */ + 532:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** + 533:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** /* Check the parameters */ + 534:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** assert_param(IS_OB_WRP(WriteProtectPage)); + 535:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** + 536:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** /* Get current write protected pages and the new pages to be protected ******/ + 537:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** WriteProtectPage = (uint32_t)(~((~FLASH_OB_GetWRP()) | WriteProtectPage)); + 538:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** + 539:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** #if defined(OB_WRP_PAGES0TO15MASK) + 540:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** WRP0_Data = (uint16_t)(WriteProtectPage & OB_WRP_PAGES0TO15MASK); + 541:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** #elif defined(OB_WRP_PAGES0TO31MASK) + 542:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** WRP0_Data = (uint16_t)(WriteProtectPage & OB_WRP_PAGES0TO31MASK); + 543:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** #endif /* OB_WRP_PAGES0TO31MASK */ + 544:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** + 545:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** #if defined(OB_WRP_PAGES16TO31MASK) + 546:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** WRP1_Data = (uint16_t)((WriteProtectPage & OB_WRP_PAGES16TO31MASK) >> 8U); + 547:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** #elif defined(OB_WRP_PAGES32TO63MASK) + 548:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** WRP1_Data = (uint16_t)((WriteProtectPage & OB_WRP_PAGES32TO63MASK) >> 8U); + 549:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** #endif /* OB_WRP_PAGES32TO63MASK */ + 550:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** + 551:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** #if defined(OB_WRP_PAGES32TO47MASK) + 552:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** WRP2_Data = (uint16_t)((WriteProtectPage & OB_WRP_PAGES32TO47MASK) >> 16U); + 553:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** #endif /* OB_WRP_PAGES32TO47MASK */ + 554:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** + 555:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** #if defined(OB_WRP_PAGES48TO63MASK) + 556:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** WRP3_Data = (uint16_t)((WriteProtectPage & OB_WRP_PAGES48TO63MASK) >> 24U); + 557:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** #elif defined(OB_WRP_PAGES48TO127MASK) + 558:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** WRP3_Data = (uint16_t)((WriteProtectPage & OB_WRP_PAGES48TO127MASK) >> 24U); + 559:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** #endif /* OB_WRP_PAGES48TO63MASK */ + 560:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** + 561:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** /* Wait for last operation to be completed */ + 562:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** status = FLASH_WaitForLastOperation((uint32_t)FLASH_TIMEOUT_VALUE); + 563:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** + 564:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** if(status == HAL_OK) + 565:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** { + ARM GAS /tmp/cc2085Zh.s page 12 + + + 566:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** /* Clean the error context */ + 567:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** pFlash.ErrorCode = HAL_FLASH_ERROR_NONE; + 568:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** + 569:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** /* To be able to write again option byte, need to perform a option byte erase */ + 570:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** status = HAL_FLASHEx_OBErase(); + 571:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** if (status == HAL_OK) + 572:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** { + 573:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** /* Enable write protection */ + 574:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** SET_BIT(FLASH->CR, FLASH_CR_OPTPG); + 575:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** + 576:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** #if defined(OB_WRP0_WRP0) + 577:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** if(WRP0_Data != 0xFFU) + 578:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** { + 579:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** OB->WRP0 &= WRP0_Data; + 580:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** + 581:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** /* Wait for last operation to be completed */ + 582:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** status = FLASH_WaitForLastOperation((uint32_t)FLASH_TIMEOUT_VALUE); + 583:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** } + 584:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** #endif /* OB_WRP0_WRP0 */ + 585:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** + 586:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** #if defined(OB_WRP1_WRP1) + 587:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** if((status == HAL_OK) && (WRP1_Data != 0xFFU)) + 588:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** { + 589:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** OB->WRP1 &= WRP1_Data; + 590:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** + 591:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** /* Wait for last operation to be completed */ + 592:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** status = FLASH_WaitForLastOperation((uint32_t)FLASH_TIMEOUT_VALUE); + 593:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** } + 594:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** #endif /* OB_WRP1_WRP1 */ + 595:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** + 596:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** #if defined(OB_WRP2_WRP2) + 597:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** if((status == HAL_OK) && (WRP2_Data != 0xFFU)) + 598:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** { + 599:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** OB->WRP2 &= WRP2_Data; + 600:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** + 601:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** /* Wait for last operation to be completed */ + 602:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** status = FLASH_WaitForLastOperation((uint32_t)FLASH_TIMEOUT_VALUE); + 603:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** } + 604:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** #endif /* OB_WRP2_WRP2 */ + 605:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** + 606:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** #if defined(OB_WRP3_WRP3) + 607:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** if((status == HAL_OK) && (WRP3_Data != 0xFFU)) + 608:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** { + 609:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** OB->WRP3 &= WRP3_Data; + 610:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** + 611:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** /* Wait for last operation to be completed */ + 612:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** status = FLASH_WaitForLastOperation((uint32_t)FLASH_TIMEOUT_VALUE); + 613:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** } + 614:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** #endif /* OB_WRP3_WRP3 */ + 615:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** + 616:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** /* if the program operation is completed, disable the OPTPG Bit */ + 617:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** CLEAR_BIT(FLASH->CR, FLASH_CR_OPTPG); + 618:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** } + 619:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** } + 620:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** + 621:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** return status; + 622:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** } + ARM GAS /tmp/cc2085Zh.s page 13 + + + 623:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** + 624:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** /** + 625:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** * @brief Disable the write protection of the desired pages + 626:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** * @note An option byte erase is done automatically in this function. + 627:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** * @note When the memory read protection level is selected (RDP level = 1), + 628:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** * it is not possible to program or erase the flash page i if + 629:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** * debug features are connected or boot code is executed in RAM, even if nWRPi = 1 + 630:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** * + 631:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** * @param WriteProtectPage specifies the page(s) to be write unprotected. + 632:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** * The value of this parameter depend on device used within the same series + 633:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** * @retval HAL status + 634:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** */ + 635:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** static HAL_StatusTypeDef FLASH_OB_DisableWRP(uint32_t WriteProtectPage) + 636:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** { + 637:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** HAL_StatusTypeDef status = HAL_OK; + 638:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** uint16_t WRP0_Data = 0xFFFFU; + 639:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** #if defined(OB_WRP1_WRP1) + 640:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** uint16_t WRP1_Data = 0xFFFFU; + 641:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** #endif /* OB_WRP1_WRP1 */ + 642:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** #if defined(OB_WRP2_WRP2) + 643:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** uint16_t WRP2_Data = 0xFFFFU; + 644:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** #endif /* OB_WRP2_WRP2 */ + 645:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** #if defined(OB_WRP3_WRP3) + 646:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** uint16_t WRP3_Data = 0xFFFFU; + 647:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** #endif /* OB_WRP3_WRP3 */ + 648:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** + 649:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** /* Check the parameters */ + 650:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** assert_param(IS_OB_WRP(WriteProtectPage)); + 651:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** + 652:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** /* Get current write protected pages and the new pages to be unprotected ******/ + 653:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** WriteProtectPage = (FLASH_OB_GetWRP() | WriteProtectPage); + 654:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** + 655:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** #if defined(OB_WRP_PAGES0TO15MASK) + 656:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** WRP0_Data = (uint16_t)(WriteProtectPage & OB_WRP_PAGES0TO15MASK); + 657:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** #elif defined(OB_WRP_PAGES0TO31MASK) + 658:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** WRP0_Data = (uint16_t)(WriteProtectPage & OB_WRP_PAGES0TO31MASK); + 659:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** #endif /* OB_WRP_PAGES0TO31MASK */ + 660:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** + 661:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** #if defined(OB_WRP_PAGES16TO31MASK) + 662:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** WRP1_Data = (uint16_t)((WriteProtectPage & OB_WRP_PAGES16TO31MASK) >> 8U); + 663:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** #elif defined(OB_WRP_PAGES32TO63MASK) + 664:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** WRP1_Data = (uint16_t)((WriteProtectPage & OB_WRP_PAGES32TO63MASK) >> 8U); + 665:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** #endif /* OB_WRP_PAGES32TO63MASK */ + 666:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** + 667:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** #if defined(OB_WRP_PAGES32TO47MASK) + 668:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** WRP2_Data = (uint16_t)((WriteProtectPage & OB_WRP_PAGES32TO47MASK) >> 16U); + 669:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** #endif /* OB_WRP_PAGES32TO47MASK */ + 670:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** + 671:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** #if defined(OB_WRP_PAGES48TO63MASK) + 672:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** WRP3_Data = (uint16_t)((WriteProtectPage & OB_WRP_PAGES48TO63MASK) >> 24U); + 673:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** #elif defined(OB_WRP_PAGES48TO127MASK) + 674:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** WRP3_Data = (uint16_t)((WriteProtectPage & OB_WRP_PAGES48TO127MASK) >> 24U); + 675:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** #endif /* OB_WRP_PAGES48TO63MASK */ + 676:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** + 677:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** + 678:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** /* Wait for last operation to be completed */ + 679:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** status = FLASH_WaitForLastOperation((uint32_t)FLASH_TIMEOUT_VALUE); + ARM GAS /tmp/cc2085Zh.s page 14 + + + 680:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** + 681:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** if(status == HAL_OK) + 682:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** { + 683:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** /* Clean the error context */ + 684:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** pFlash.ErrorCode = HAL_FLASH_ERROR_NONE; + 685:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** + 686:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** /* To be able to write again option byte, need to perform a option byte erase */ + 687:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** status = HAL_FLASHEx_OBErase(); + 688:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** if (status == HAL_OK) + 689:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** { + 690:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** SET_BIT(FLASH->CR, FLASH_CR_OPTPG); + 691:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** + 692:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** #if defined(OB_WRP0_WRP0) + 693:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** if(WRP0_Data != 0xFFU) + 694:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** { + 695:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** OB->WRP0 &= WRP0_Data; + 696:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** + 697:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** /* Wait for last operation to be completed */ + 698:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** status = FLASH_WaitForLastOperation((uint32_t)FLASH_TIMEOUT_VALUE); + 699:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** } + 700:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** #endif /* OB_WRP0_WRP0 */ + 701:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** + 702:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** #if defined(OB_WRP1_WRP1) + 703:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** if((status == HAL_OK) && (WRP1_Data != 0xFFU)) + 704:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** { + 705:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** OB->WRP1 &= WRP1_Data; + 706:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** + 707:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** /* Wait for last operation to be completed */ + 708:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** status = FLASH_WaitForLastOperation((uint32_t)FLASH_TIMEOUT_VALUE); + 709:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** } + 710:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** #endif /* OB_WRP1_WRP1 */ + 711:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** + 712:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** #if defined(OB_WRP2_WRP2) + 713:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** if((status == HAL_OK) && (WRP2_Data != 0xFFU)) + 714:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** { + 715:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** OB->WRP2 &= WRP2_Data; + 716:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** + 717:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** /* Wait for last operation to be completed */ + 718:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** status = FLASH_WaitForLastOperation((uint32_t)FLASH_TIMEOUT_VALUE); + 719:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** } + 720:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** #endif /* OB_WRP2_WRP2 */ + 721:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** + 722:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** #if defined(OB_WRP3_WRP3) + 723:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** if((status == HAL_OK) && (WRP3_Data != 0xFFU)) + 724:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** { + 725:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** OB->WRP3 &= WRP3_Data; + 726:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** + 727:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** /* Wait for last operation to be completed */ + 728:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** status = FLASH_WaitForLastOperation((uint32_t)FLASH_TIMEOUT_VALUE); + 729:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** } + 730:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** #endif /* OB_WRP3_WRP3 */ + 731:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** + 732:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** /* if the program operation is completed, disable the OPTPG Bit */ + 733:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** CLEAR_BIT(FLASH->CR, FLASH_CR_OPTPG); + 734:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** } + 735:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** } + 736:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** return status; + ARM GAS /tmp/cc2085Zh.s page 15 + + + 737:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** } + 738:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** + 739:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** /** + 740:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** * @brief Set the read protection level. + 741:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** * @param ReadProtectLevel specifies the read protection level. + 742:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** * This parameter can be one of the following values: + 743:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** * @arg @ref OB_RDP_LEVEL_0 No protection + 744:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** * @arg @ref OB_RDP_LEVEL_1 Read protection of the memory + 745:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** * @arg @ref OB_RDP_LEVEL_2 Full chip protection + 746:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** * @note Warning: When enabling OB_RDP level 2 it's no more possible to go back to level 1 or 0 + 747:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** * @retval HAL status + 748:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** */ + 749:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** static HAL_StatusTypeDef FLASH_OB_RDP_LevelConfig(uint8_t ReadProtectLevel) + 750:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** { + 751:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** HAL_StatusTypeDef status = HAL_OK; + 752:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** + 753:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** /* Check the parameters */ + 754:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** assert_param(IS_OB_RDP_LEVEL(ReadProtectLevel)); + 755:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** + 756:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** /* Wait for last operation to be completed */ + 757:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** status = FLASH_WaitForLastOperation((uint32_t)FLASH_TIMEOUT_VALUE); + 758:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** + 759:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** if(status == HAL_OK) + 760:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** { + 761:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** /* Clean the error context */ + 762:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** pFlash.ErrorCode = HAL_FLASH_ERROR_NONE; + 763:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** + 764:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** /* If the previous operation is completed, proceed to erase the option bytes */ + 765:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** SET_BIT(FLASH->CR, FLASH_CR_OPTER); + 766:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** SET_BIT(FLASH->CR, FLASH_CR_STRT); + 767:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** + 768:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** /* Wait for last operation to be completed */ + 769:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** status = FLASH_WaitForLastOperation((uint32_t)FLASH_TIMEOUT_VALUE); + 770:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** + 771:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** /* If the erase operation is completed, disable the OPTER Bit */ + 772:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** CLEAR_BIT(FLASH->CR, FLASH_CR_OPTER); + 773:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** + 774:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** if(status == HAL_OK) + 775:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** { + 776:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** /* Enable the Option Bytes Programming operation */ + 777:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** SET_BIT(FLASH->CR, FLASH_CR_OPTPG); + 778:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** + 779:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** WRITE_REG(OB->RDP, ReadProtectLevel); + 780:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** + 781:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** /* Wait for last operation to be completed */ + 782:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** status = FLASH_WaitForLastOperation((uint32_t)FLASH_TIMEOUT_VALUE); + 783:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** + 784:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** /* if the program operation is completed, disable the OPTPG Bit */ + 785:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** CLEAR_BIT(FLASH->CR, FLASH_CR_OPTPG); + 786:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** } + 787:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** } + 788:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** + 789:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** return status; + 790:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** } + 791:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** + 792:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** /** + 793:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** * @brief Program the FLASH User Option Byte. + ARM GAS /tmp/cc2085Zh.s page 16 + + + 794:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** * @note Programming of the OB should be performed only after an erase (otherwise PGERR occurs) + 795:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** * @param UserConfig The FLASH User Option Bytes values: IWDG_SW(Bit0), RST_STOP(Bit1), RST_STDBY + 796:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** * VDDA_Analog_Monitoring(Bit5) and SRAM_Parity_Enable(Bit6). + 797:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** * For few devices, following option bytes are available: nBOOT0(Bit3) & BOOT_SEL(Bit7). + 798:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** * @retval HAL status + 799:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** */ + 800:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** static HAL_StatusTypeDef FLASH_OB_UserConfig(uint8_t UserConfig) + 801:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** { + 802:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** HAL_StatusTypeDef status = HAL_OK; + 803:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** + 804:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** /* Check the parameters */ + 805:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** assert_param(IS_OB_IWDG_SOURCE((UserConfig&OB_IWDG_SW))); + 806:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** assert_param(IS_OB_STOP_SOURCE((UserConfig&OB_STOP_NO_RST))); + 807:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** assert_param(IS_OB_STDBY_SOURCE((UserConfig&OB_STDBY_NO_RST))); + 808:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** assert_param(IS_OB_BOOT1((UserConfig&OB_BOOT1_SET))); + 809:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** assert_param(IS_OB_VDDA_ANALOG((UserConfig&OB_VDDA_ANALOG_ON))); + 810:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** assert_param(IS_OB_SRAM_PARITY((UserConfig&OB_SRAM_PARITY_RESET))); + 811:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** #if defined(FLASH_OBR_BOOT_SEL) + 812:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** assert_param(IS_OB_BOOT_SEL((UserConfig&OB_BOOT_SEL_SET))); + 813:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** assert_param(IS_OB_BOOT0((UserConfig&OB_BOOT0_SET))); + 814:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** #endif /* FLASH_OBR_BOOT_SEL */ + 815:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** + 816:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** /* Wait for last operation to be completed */ + 817:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** status = FLASH_WaitForLastOperation((uint32_t)FLASH_TIMEOUT_VALUE); + 818:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** + 819:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** if(status == HAL_OK) + 820:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** { + 821:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** /* Clean the error context */ + 822:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** pFlash.ErrorCode = HAL_FLASH_ERROR_NONE; + 823:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** + 824:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** /* Enable the Option Bytes Programming operation */ + 825:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** SET_BIT(FLASH->CR, FLASH_CR_OPTPG); + 826:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** + 827:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** #if defined(FLASH_OBR_BOOT_SEL) + 828:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** OB->USER = UserConfig; + 829:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** #else + 830:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** OB->USER = (UserConfig | 0x88U); + 831:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** #endif + 832:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** + 833:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** /* Wait for last operation to be completed */ + 834:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** status = FLASH_WaitForLastOperation((uint32_t)FLASH_TIMEOUT_VALUE); + 835:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** + 836:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** /* if the program operation is completed, disable the OPTPG Bit */ + 837:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** CLEAR_BIT(FLASH->CR, FLASH_CR_OPTPG); + 838:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** } + 839:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** + 840:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** return status; + 841:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** } + 842:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** + 843:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** /** + 844:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** * @brief Programs a half word at a specified Option Byte Data address. + 845:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** * @note The function @ref HAL_FLASH_Unlock() should be called before to unlock the FLASH interf + 846:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** * The function @ref HAL_FLASH_OB_Unlock() should be called before to unlock the options b + 847:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** * The function @ref HAL_FLASH_OB_Launch() should be called after to force the reload of t + 848:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** * (system reset will occur) + 849:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** * Programming of the OB should be performed only after an erase (otherwise PGERR occurs) + 850:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** * @param Address specifies the address to be programmed. + ARM GAS /tmp/cc2085Zh.s page 17 + + + 851:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** * This parameter can be 0x1FFFF804 or 0x1FFFF806. + 852:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** * @param Data specifies the data to be programmed. + 853:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** * @retval HAL status + 854:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** */ + 855:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** static HAL_StatusTypeDef FLASH_OB_ProgramData(uint32_t Address, uint8_t Data) + 856:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** { + 857:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** HAL_StatusTypeDef status = HAL_ERROR; + 858:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** + 859:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** /* Check the parameters */ + 860:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** assert_param(IS_OB_DATA_ADDRESS(Address)); + 861:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** + 862:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** /* Wait for last operation to be completed */ + 863:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** status = FLASH_WaitForLastOperation((uint32_t)FLASH_TIMEOUT_VALUE); + 864:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** + 865:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** if(status == HAL_OK) + 866:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** { + 867:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** /* Clean the error context */ + 868:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** pFlash.ErrorCode = HAL_FLASH_ERROR_NONE; + 869:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** + 870:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** /* Enables the Option Bytes Programming operation */ + 871:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** SET_BIT(FLASH->CR, FLASH_CR_OPTPG); + 872:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** *(__IO uint16_t*)Address = Data; + 873:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** + 874:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** /* Wait for last operation to be completed */ + 875:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** status = FLASH_WaitForLastOperation((uint32_t)FLASH_TIMEOUT_VALUE); + 876:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** + 877:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** /* If the program operation is completed, disable the OPTPG Bit */ + 878:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** CLEAR_BIT(FLASH->CR, FLASH_CR_OPTPG); + 879:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** } + 880:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** /* Return the Option Byte Data Program Status */ + 881:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** return status; + 882:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** } + 883:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** + 884:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** /** + 885:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** * @brief Return the FLASH Write Protection Option Bytes value. + 886:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** * @retval The FLASH Write Protection Option Bytes value + 887:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** */ + 888:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** static uint32_t FLASH_OB_GetWRP(void) + 889:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** { + 66 .loc 1 889 1 is_stmt 1 view -0 + 67 .cfi_startproc + 68 @ args = 0, pretend = 0, frame = 0 + 69 @ frame_needed = 0, uses_anonymous_args = 0 + 70 @ link register save eliminated. + 890:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** /* Return the FLASH write protection Register value */ + 891:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** return (uint32_t)(READ_REG(FLASH->WRPR)); + 71 .loc 1 891 3 view .LVU7 + 72 .loc 1 891 10 is_stmt 0 view .LVU8 + 73 0000 014B ldr r3, .L5 + 74 0002 186A ldr r0, [r3, #32] + 892:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** } + 75 .loc 1 892 1 view .LVU9 + 76 @ sp needed + 77 0004 7047 bx lr + 78 .L6: + 79 0006 C046 .align 2 + 80 .L5: + ARM GAS /tmp/cc2085Zh.s page 18 + + + 81 0008 00200240 .word 1073881088 + 82 .cfi_endproc + 83 .LFE52: + 85 .section .text.FLASH_OB_GetRDP,"ax",%progbits + 86 .align 1 + 87 .syntax unified + 88 .code 16 + 89 .thumb_func + 91 FLASH_OB_GetRDP: + 92 .LFB53: + 893:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** + 894:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** /** + 895:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** * @brief Returns the FLASH Read Protection level. + 896:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** * @retval FLASH RDP level + 897:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** * This parameter can be one of the following values: + 898:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** * @arg @ref OB_RDP_LEVEL_0 No protection + 899:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** * @arg @ref OB_RDP_LEVEL_1 Read protection of the memory + 900:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** * @arg @ref OB_RDP_LEVEL_2 Full chip protection + 901:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** */ + 902:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** static uint32_t FLASH_OB_GetRDP(void) + 903:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** { + 93 .loc 1 903 1 is_stmt 1 view -0 + 94 .cfi_startproc + 95 @ args = 0, pretend = 0, frame = 0 + 96 @ frame_needed = 0, uses_anonymous_args = 0 + 97 @ link register save eliminated. + 904:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** uint32_t tmp_reg; + 98 .loc 1 904 3 view .LVU11 + 905:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** + 906:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** /* Read RDP level bits */ + 907:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** tmp_reg = READ_BIT(FLASH->OBR, (FLASH_OBR_RDPRT1 | FLASH_OBR_RDPRT2)); + 99 .loc 1 907 3 view .LVU12 + 100 .loc 1 907 13 is_stmt 0 view .LVU13 + 101 0000 064B ldr r3, .L11 + 102 0002 DB69 ldr r3, [r3, #28] + 103 .loc 1 907 11 view .LVU14 + 104 0004 0622 movs r2, #6 + 105 .LVL0: + 908:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** + 909:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** if (tmp_reg == 0U) + 106 .loc 1 909 3 is_stmt 1 view .LVU15 + 107 .loc 1 909 6 is_stmt 0 view .LVU16 + 108 0006 1A42 tst r2, r3 + 109 0008 03D0 beq .L9 + 910:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** { + 911:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** return OB_RDP_LEVEL_0; + 912:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** } + 913:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** else if ((tmp_reg & FLASH_OBR_RDPRT2) == FLASH_OBR_RDPRT2) + 110 .loc 1 913 8 is_stmt 1 view .LVU17 + 111 .loc 1 913 11 is_stmt 0 view .LVU18 + 112 000a 5B07 lsls r3, r3, #29 + 113 000c 03D5 bpl .L10 + 114 .LVL1: + 914:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** { + 915:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** return OB_RDP_LEVEL_2; + 115 .loc 1 915 12 view .LVU19 + 116 000e CC20 movs r0, #204 + ARM GAS /tmp/cc2085Zh.s page 19 + + + 117 0010 00E0 b .L7 + 118 .LVL2: + 119 .L9: + 911:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** } + 120 .loc 1 911 12 view .LVU20 + 121 0012 AA20 movs r0, #170 + 122 .LVL3: + 123 .L7: + 916:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** } + 917:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** else + 918:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** { + 919:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** return OB_RDP_LEVEL_1; + 920:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** } + 921:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** } + 124 .loc 1 921 1 view .LVU21 + 125 @ sp needed + 126 0014 7047 bx lr + 127 .L10: + 919:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** } + 128 .loc 1 919 12 view .LVU22 + 129 0016 BB20 movs r0, #187 + 130 0018 FCE7 b .L7 + 131 .L12: + 132 001a C046 .align 2 + 133 .L11: + 134 001c 00200240 .word 1073881088 + 135 .cfi_endproc + 136 .LFE53: + 138 .section .text.FLASH_OB_GetUser,"ax",%progbits + 139 .align 1 + 140 .syntax unified + 141 .code 16 + 142 .thumb_func + 144 FLASH_OB_GetUser: + 145 .LFB54: + 922:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** + 923:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** /** + 924:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** * @brief Return the FLASH User Option Byte value. + 925:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** * @retval The FLASH User Option Bytes values: IWDG_SW(Bit0), RST_STOP(Bit1), RST_STDBY(Bit2), nB + 926:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** * VDDA_Analog_Monitoring(Bit5) and SRAM_Parity_Enable(Bit6). + 927:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** * For few devices, following option bytes are available: nBOOT0(Bit3) & BOOT_SEL(Bit7). + 928:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** */ + 929:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** static uint8_t FLASH_OB_GetUser(void) + 930:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** { + 146 .loc 1 930 1 is_stmt 1 view -0 + 147 .cfi_startproc + 148 @ args = 0, pretend = 0, frame = 0 + 149 @ frame_needed = 0, uses_anonymous_args = 0 + 150 @ link register save eliminated. + 931:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** /* Return the User Option Byte */ + 932:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** return (uint8_t)((READ_REG(FLASH->OBR) & FLASH_OBR_USER) >> FLASH_POSITION_IWDGSW_BIT); + 151 .loc 1 932 3 view .LVU24 + 152 .loc 1 932 21 is_stmt 0 view .LVU25 + 153 0000 024B ldr r3, .L14 + 154 0002 D869 ldr r0, [r3, #28] + 155 .loc 1 932 60 view .LVU26 + 156 0004 000A lsrs r0, r0, #8 + ARM GAS /tmp/cc2085Zh.s page 20 + + + 157 .loc 1 932 10 discriminator 1 view .LVU27 + 158 0006 C0B2 uxtb r0, r0 + 933:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** } + 159 .loc 1 933 1 view .LVU28 + 160 @ sp needed + 161 0008 7047 bx lr + 162 .L15: + 163 000a C046 .align 2 + 164 .L14: + 165 000c 00200240 .word 1073881088 + 166 .cfi_endproc + 167 .LFE54: + 169 .section .text.FLASH_OB_RDP_LevelConfig,"ax",%progbits + 170 .align 1 + 171 .syntax unified + 172 .code 16 + 173 .thumb_func + 175 FLASH_OB_RDP_LevelConfig: + 176 .LVL4: + 177 .LFB49: + 750:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** HAL_StatusTypeDef status = HAL_OK; + 178 .loc 1 750 1 is_stmt 1 view -0 + 179 .cfi_startproc + 180 @ args = 0, pretend = 0, frame = 0 + 181 @ frame_needed = 0, uses_anonymous_args = 0 + 750:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** HAL_StatusTypeDef status = HAL_OK; + 182 .loc 1 750 1 is_stmt 0 view .LVU30 + 183 0000 70B5 push {r4, r5, r6, lr} + 184 .cfi_def_cfa_offset 16 + 185 .cfi_offset 4, -16 + 186 .cfi_offset 5, -12 + 187 .cfi_offset 6, -8 + 188 .cfi_offset 14, -4 + 189 0002 0400 movs r4, r0 + 751:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** + 190 .loc 1 751 3 is_stmt 1 view .LVU31 + 191 .LVL5: + 754:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** + 192 .loc 1 754 3 view .LVU32 + 757:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** + 193 .loc 1 757 3 view .LVU33 + 757:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** + 194 .loc 1 757 12 is_stmt 0 view .LVU34 + 195 0004 1348 ldr r0, .L19 + 196 .LVL6: + 757:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** + 197 .loc 1 757 12 view .LVU35 + 198 0006 FFF7FEFF bl FLASH_WaitForLastOperation + 199 .LVL7: + 759:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** { + 200 .loc 1 759 3 is_stmt 1 view .LVU36 + 759:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** { + 201 .loc 1 759 5 is_stmt 0 view .LVU37 + 202 000a 0028 cmp r0, #0 + 203 000c 00D0 beq .L18 + 204 .LVL8: + 205 .L17: + ARM GAS /tmp/cc2085Zh.s page 21 + + + 789:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** } + 206 .loc 1 789 3 is_stmt 1 view .LVU38 + 790:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** + 207 .loc 1 790 1 is_stmt 0 view .LVU39 + 208 @ sp needed + 209 .LVL9: + 790:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** + 210 .loc 1 790 1 view .LVU40 + 211 000e 70BD pop {r4, r5, r6, pc} + 212 .L18: + 762:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** + 213 .loc 1 762 5 is_stmt 1 view .LVU41 + 762:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** + 214 .loc 1 762 22 is_stmt 0 view .LVU42 + 215 0010 114B ldr r3, .L19+4 + 216 0012 0022 movs r2, #0 + 217 0014 DA61 str r2, [r3, #28] + 765:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** SET_BIT(FLASH->CR, FLASH_CR_STRT); + 218 .loc 1 765 5 is_stmt 1 view .LVU43 + 219 0016 114D ldr r5, .L19+8 + 220 0018 2B69 ldr r3, [r5, #16] + 221 001a 2026 movs r6, #32 + 222 001c 3343 orrs r3, r6 + 223 001e 2B61 str r3, [r5, #16] + 766:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** + 224 .loc 1 766 5 view .LVU44 + 225 0020 2B69 ldr r3, [r5, #16] + 226 0022 4032 adds r2, r2, #64 + 227 0024 1343 orrs r3, r2 + 228 0026 2B61 str r3, [r5, #16] + 769:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** + 229 .loc 1 769 5 view .LVU45 + 769:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** + 230 .loc 1 769 14 is_stmt 0 view .LVU46 + 231 0028 0A48 ldr r0, .L19 + 232 .LVL10: + 769:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** + 233 .loc 1 769 14 view .LVU47 + 234 002a FFF7FEFF bl FLASH_WaitForLastOperation + 235 .LVL11: + 772:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** + 236 .loc 1 772 5 is_stmt 1 view .LVU48 + 237 002e 2B69 ldr r3, [r5, #16] + 238 0030 B343 bics r3, r6 + 239 0032 2B61 str r3, [r5, #16] + 774:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** { + 240 .loc 1 774 5 view .LVU49 + 774:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** { + 241 .loc 1 774 7 is_stmt 0 view .LVU50 + 242 0034 0028 cmp r0, #0 + 243 0036 EAD1 bne .L17 + 777:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** + 244 .loc 1 777 7 is_stmt 1 view .LVU51 + 245 0038 2B69 ldr r3, [r5, #16] + 246 003a 103E subs r6, r6, #16 + 247 003c 3343 orrs r3, r6 + 248 003e 2B61 str r3, [r5, #16] + ARM GAS /tmp/cc2085Zh.s page 22 + + + 779:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** + 249 .loc 1 779 7 view .LVU52 + 250 0040 074B ldr r3, .L19+12 + 251 0042 1C80 strh r4, [r3] + 782:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** + 252 .loc 1 782 7 view .LVU53 + 782:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** + 253 .loc 1 782 16 is_stmt 0 view .LVU54 + 254 0044 0348 ldr r0, .L19 + 255 .LVL12: + 782:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** + 256 .loc 1 782 16 view .LVU55 + 257 0046 FFF7FEFF bl FLASH_WaitForLastOperation + 258 .LVL13: + 785:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** } + 259 .loc 1 785 7 is_stmt 1 view .LVU56 + 260 004a 2B69 ldr r3, [r5, #16] + 261 004c B343 bics r3, r6 + 262 004e 2B61 str r3, [r5, #16] + 263 0050 DDE7 b .L17 + 264 .L20: + 265 0052 C046 .align 2 + 266 .L19: + 267 0054 50C30000 .word 50000 + 268 0058 00000000 .word pFlash + 269 005c 00200240 .word 1073881088 + 270 0060 00F8FF1F .word 536868864 + 271 .cfi_endproc + 272 .LFE49: + 274 .section .text.FLASH_OB_UserConfig,"ax",%progbits + 275 .align 1 + 276 .syntax unified + 277 .code 16 + 278 .thumb_func + 280 FLASH_OB_UserConfig: + 281 .LVL14: + 282 .LFB50: + 801:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** HAL_StatusTypeDef status = HAL_OK; + 283 .loc 1 801 1 view -0 + 284 .cfi_startproc + 285 @ args = 0, pretend = 0, frame = 0 + 286 @ frame_needed = 0, uses_anonymous_args = 0 + 801:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** HAL_StatusTypeDef status = HAL_OK; + 287 .loc 1 801 1 is_stmt 0 view .LVU58 + 288 0000 70B5 push {r4, r5, r6, lr} + 289 .cfi_def_cfa_offset 16 + 290 .cfi_offset 4, -16 + 291 .cfi_offset 5, -12 + 292 .cfi_offset 6, -8 + 293 .cfi_offset 14, -4 + 294 0002 0400 movs r4, r0 + 802:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** + 295 .loc 1 802 3 is_stmt 1 view .LVU59 + 296 .LVL15: + 805:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** assert_param(IS_OB_STOP_SOURCE((UserConfig&OB_STOP_NO_RST))); + 297 .loc 1 805 3 view .LVU60 + 806:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** assert_param(IS_OB_STDBY_SOURCE((UserConfig&OB_STDBY_NO_RST))); + ARM GAS /tmp/cc2085Zh.s page 23 + + + 298 .loc 1 806 3 view .LVU61 + 807:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** assert_param(IS_OB_BOOT1((UserConfig&OB_BOOT1_SET))); + 299 .loc 1 807 3 view .LVU62 + 808:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** assert_param(IS_OB_VDDA_ANALOG((UserConfig&OB_VDDA_ANALOG_ON))); + 300 .loc 1 808 3 view .LVU63 + 809:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** assert_param(IS_OB_SRAM_PARITY((UserConfig&OB_SRAM_PARITY_RESET))); + 301 .loc 1 809 3 view .LVU64 + 810:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** #if defined(FLASH_OBR_BOOT_SEL) + 302 .loc 1 810 3 view .LVU65 + 812:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** assert_param(IS_OB_BOOT0((UserConfig&OB_BOOT0_SET))); + 303 .loc 1 812 3 view .LVU66 + 813:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** #endif /* FLASH_OBR_BOOT_SEL */ + 304 .loc 1 813 3 view .LVU67 + 817:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** + 305 .loc 1 817 3 view .LVU68 + 817:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** + 306 .loc 1 817 12 is_stmt 0 view .LVU69 + 307 0004 0B48 ldr r0, .L24 + 308 .LVL16: + 817:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** + 309 .loc 1 817 12 view .LVU70 + 310 0006 FFF7FEFF bl FLASH_WaitForLastOperation + 311 .LVL17: + 819:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** { + 312 .loc 1 819 3 is_stmt 1 view .LVU71 + 819:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** { + 313 .loc 1 819 5 is_stmt 0 view .LVU72 + 314 000a 0028 cmp r0, #0 + 315 000c 00D0 beq .L23 + 316 .LVL18: + 317 .L22: + 840:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** } + 318 .loc 1 840 3 is_stmt 1 view .LVU73 + 841:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** + 319 .loc 1 841 1 is_stmt 0 view .LVU74 + 320 @ sp needed + 321 .LVL19: + 841:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** + 322 .loc 1 841 1 view .LVU75 + 323 000e 70BD pop {r4, r5, r6, pc} + 324 .L23: + 822:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** + 325 .loc 1 822 5 is_stmt 1 view .LVU76 + 822:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** + 326 .loc 1 822 22 is_stmt 0 view .LVU77 + 327 0010 094B ldr r3, .L24+4 + 328 0012 0022 movs r2, #0 + 329 0014 DA61 str r2, [r3, #28] + 825:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** + 330 .loc 1 825 5 is_stmt 1 view .LVU78 + 331 0016 094D ldr r5, .L24+8 + 332 0018 2B69 ldr r3, [r5, #16] + 333 001a 1026 movs r6, #16 + 334 001c 3343 orrs r3, r6 + 335 001e 2B61 str r3, [r5, #16] + 828:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** #else + 336 .loc 1 828 5 view .LVU79 + ARM GAS /tmp/cc2085Zh.s page 24 + + + 828:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** #else + 337 .loc 1 828 14 is_stmt 0 view .LVU80 + 338 0020 074B ldr r3, .L24+12 + 339 0022 5C80 strh r4, [r3, #2] + 834:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** + 340 .loc 1 834 5 is_stmt 1 view .LVU81 + 834:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** + 341 .loc 1 834 14 is_stmt 0 view .LVU82 + 342 0024 0348 ldr r0, .L24 + 343 .LVL20: + 834:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** + 344 .loc 1 834 14 view .LVU83 + 345 0026 FFF7FEFF bl FLASH_WaitForLastOperation + 346 .LVL21: + 837:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** } + 347 .loc 1 837 5 is_stmt 1 view .LVU84 + 348 002a 2B69 ldr r3, [r5, #16] + 349 002c B343 bics r3, r6 + 350 002e 2B61 str r3, [r5, #16] + 351 0030 EDE7 b .L22 + 352 .L25: + 353 0032 C046 .align 2 + 354 .L24: + 355 0034 50C30000 .word 50000 + 356 0038 00000000 .word pFlash + 357 003c 00200240 .word 1073881088 + 358 0040 00F8FF1F .word 536868864 + 359 .cfi_endproc + 360 .LFE50: + 362 .section .text.FLASH_OB_ProgramData,"ax",%progbits + 363 .align 1 + 364 .syntax unified + 365 .code 16 + 366 .thumb_func + 368 FLASH_OB_ProgramData: + 369 .LVL22: + 370 .LFB51: + 856:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** HAL_StatusTypeDef status = HAL_ERROR; + 371 .loc 1 856 1 view -0 + 372 .cfi_startproc + 373 @ args = 0, pretend = 0, frame = 0 + 374 @ frame_needed = 0, uses_anonymous_args = 0 + 856:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** HAL_StatusTypeDef status = HAL_ERROR; + 375 .loc 1 856 1 is_stmt 0 view .LVU86 + 376 0000 F8B5 push {r3, r4, r5, r6, r7, lr} + 377 .cfi_def_cfa_offset 24 + 378 .cfi_offset 3, -24 + 379 .cfi_offset 4, -20 + 380 .cfi_offset 5, -16 + 381 .cfi_offset 6, -12 + 382 .cfi_offset 7, -8 + 383 .cfi_offset 14, -4 + 384 0002 0400 movs r4, r0 + 385 0004 0D00 movs r5, r1 + 857:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** + 386 .loc 1 857 3 is_stmt 1 view .LVU87 + 387 .LVL23: + ARM GAS /tmp/cc2085Zh.s page 25 + + + 860:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** + 388 .loc 1 860 3 view .LVU88 + 863:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** + 389 .loc 1 863 3 view .LVU89 + 863:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** + 390 .loc 1 863 12 is_stmt 0 view .LVU90 + 391 0006 0B48 ldr r0, .L29 + 392 .LVL24: + 863:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** + 393 .loc 1 863 12 view .LVU91 + 394 0008 FFF7FEFF bl FLASH_WaitForLastOperation + 395 .LVL25: + 865:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** { + 396 .loc 1 865 3 is_stmt 1 view .LVU92 + 865:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** { + 397 .loc 1 865 5 is_stmt 0 view .LVU93 + 398 000c 0028 cmp r0, #0 + 399 000e 00D0 beq .L28 + 400 .LVL26: + 401 .L27: + 881:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** } + 402 .loc 1 881 3 is_stmt 1 view .LVU94 + 882:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** + 403 .loc 1 882 1 is_stmt 0 view .LVU95 + 404 @ sp needed + 405 .LVL27: + 406 .LVL28: + 882:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** + 407 .loc 1 882 1 view .LVU96 + 408 0010 F8BD pop {r3, r4, r5, r6, r7, pc} + 409 .LVL29: + 410 .L28: + 868:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** + 411 .loc 1 868 5 is_stmt 1 view .LVU97 + 868:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** + 412 .loc 1 868 22 is_stmt 0 view .LVU98 + 413 0012 094B ldr r3, .L29+4 + 414 0014 0022 movs r2, #0 + 415 0016 DA61 str r2, [r3, #28] + 871:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** *(__IO uint16_t*)Address = Data; + 416 .loc 1 871 5 is_stmt 1 view .LVU99 + 417 0018 084E ldr r6, .L29+8 + 418 001a 3369 ldr r3, [r6, #16] + 419 001c 1027 movs r7, #16 + 420 001e 3B43 orrs r3, r7 + 421 0020 3361 str r3, [r6, #16] + 872:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** + 422 .loc 1 872 5 view .LVU100 + 872:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** + 423 .loc 1 872 30 is_stmt 0 view .LVU101 + 424 0022 2580 strh r5, [r4] + 875:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** + 425 .loc 1 875 5 is_stmt 1 view .LVU102 + 875:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** + 426 .loc 1 875 14 is_stmt 0 view .LVU103 + 427 0024 0348 ldr r0, .L29 + 428 .LVL30: + ARM GAS /tmp/cc2085Zh.s page 26 + + + 875:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** + 429 .loc 1 875 14 view .LVU104 + 430 0026 FFF7FEFF bl FLASH_WaitForLastOperation + 431 .LVL31: + 878:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** } + 432 .loc 1 878 5 is_stmt 1 view .LVU105 + 433 002a 3369 ldr r3, [r6, #16] + 434 002c BB43 bics r3, r7 + 435 002e 3361 str r3, [r6, #16] + 436 0030 EEE7 b .L27 + 437 .L30: + 438 0032 C046 .align 2 + 439 .L29: + 440 0034 50C30000 .word 50000 + 441 0038 00000000 .word pFlash + 442 003c 00200240 .word 1073881088 + 443 .cfi_endproc + 444 .LFE51: + 446 .section .text.HAL_FLASHEx_OBErase,"ax",%progbits + 447 .align 1 + 448 .global HAL_FLASHEx_OBErase + 449 .syntax unified + 450 .code 16 + 451 .thumb_func + 453 HAL_FLASHEx_OBErase: + 454 .LFB42: + 312:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** uint8_t rdptmp = OB_RDP_LEVEL_0; + 455 .loc 1 312 1 view -0 + 456 .cfi_startproc + 457 @ args = 0, pretend = 0, frame = 0 + 458 @ frame_needed = 0, uses_anonymous_args = 0 + 459 0000 70B5 push {r4, r5, r6, lr} + 460 .cfi_def_cfa_offset 16 + 461 .cfi_offset 4, -16 + 462 .cfi_offset 5, -12 + 463 .cfi_offset 6, -8 + 464 .cfi_offset 14, -4 + 313:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** HAL_StatusTypeDef status = HAL_ERROR; + 465 .loc 1 313 3 view .LVU107 + 466 .LVL32: + 314:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** + 467 .loc 1 314 3 view .LVU108 + 317:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** + 468 .loc 1 317 3 view .LVU109 + 317:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** + 469 .loc 1 317 12 is_stmt 0 view .LVU110 + 470 0002 FFF7FEFF bl FLASH_OB_GetRDP + 471 .LVL33: + 317:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** + 472 .loc 1 317 10 discriminator 1 view .LVU111 + 473 0006 C5B2 uxtb r5, r0 + 474 .LVL34: + 320:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** + 475 .loc 1 320 3 is_stmt 1 view .LVU112 + 320:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** + 476 .loc 1 320 12 is_stmt 0 view .LVU113 + 477 0008 0E48 ldr r0, .L34 + ARM GAS /tmp/cc2085Zh.s page 27 + + + 478 000a FFF7FEFF bl FLASH_WaitForLastOperation + 479 .LVL35: + 322:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** { + 480 .loc 1 322 3 is_stmt 1 view .LVU114 + 322:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** { + 481 .loc 1 322 5 is_stmt 0 view .LVU115 + 482 000e 0028 cmp r0, #0 + 483 0010 00D0 beq .L33 + 484 .LVL36: + 485 .L32: + 345:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** } + 486 .loc 1 345 3 is_stmt 1 view .LVU116 + 346:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** + 487 .loc 1 346 1 is_stmt 0 view .LVU117 + 488 @ sp needed + 489 .LVL37: + 346:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** + 490 .loc 1 346 1 view .LVU118 + 491 0012 70BD pop {r4, r5, r6, pc} + 492 .LVL38: + 493 .L33: + 325:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** + 494 .loc 1 325 5 is_stmt 1 view .LVU119 + 325:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** + 495 .loc 1 325 22 is_stmt 0 view .LVU120 + 496 0014 0C4B ldr r3, .L34+4 + 497 0016 0022 movs r2, #0 + 498 0018 DA61 str r2, [r3, #28] + 328:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** SET_BIT(FLASH->CR, FLASH_CR_STRT); + 499 .loc 1 328 5 is_stmt 1 view .LVU121 + 500 001a 0C4C ldr r4, .L34+8 + 501 001c 2369 ldr r3, [r4, #16] + 502 001e 2026 movs r6, #32 + 503 0020 3343 orrs r3, r6 + 504 0022 2361 str r3, [r4, #16] + 329:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** + 505 .loc 1 329 5 view .LVU122 + 506 0024 2369 ldr r3, [r4, #16] + 507 0026 4032 adds r2, r2, #64 + 508 0028 1343 orrs r3, r2 + 509 002a 2361 str r3, [r4, #16] + 332:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** + 510 .loc 1 332 5 view .LVU123 + 332:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** + 511 .loc 1 332 14 is_stmt 0 view .LVU124 + 512 002c 0548 ldr r0, .L34 + 513 .LVL39: + 332:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** + 514 .loc 1 332 14 view .LVU125 + 515 002e FFF7FEFF bl FLASH_WaitForLastOperation + 516 .LVL40: + 335:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** + 517 .loc 1 335 5 is_stmt 1 view .LVU126 + 518 0032 2369 ldr r3, [r4, #16] + 519 0034 B343 bics r3, r6 + 520 0036 2361 str r3, [r4, #16] + 337:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** { + ARM GAS /tmp/cc2085Zh.s page 28 + + + 521 .loc 1 337 5 view .LVU127 + 337:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** { + 522 .loc 1 337 7 is_stmt 0 view .LVU128 + 523 0038 0028 cmp r0, #0 + 524 003a EAD1 bne .L32 + 340:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** } + 525 .loc 1 340 7 is_stmt 1 view .LVU129 + 340:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** } + 526 .loc 1 340 16 is_stmt 0 view .LVU130 + 527 003c 2800 movs r0, r5 + 528 .LVL41: + 340:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** } + 529 .loc 1 340 16 view .LVU131 + 530 003e FFF7FEFF bl FLASH_OB_RDP_LevelConfig + 531 .LVL42: + 340:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** } + 532 .loc 1 340 16 view .LVU132 + 533 0042 E6E7 b .L32 + 534 .L35: + 535 .align 2 + 536 .L34: + 537 0044 50C30000 .word 50000 + 538 0048 00000000 .word pFlash + 539 004c 00200240 .word 1073881088 + 540 .cfi_endproc + 541 .LFE42: + 543 .section .text.FLASH_OB_EnableWRP,"ax",%progbits + 544 .align 1 + 545 .syntax unified + 546 .code 16 + 547 .thumb_func + 549 FLASH_OB_EnableWRP: + 550 .LVL43: + 551 .LFB47: + 520:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** HAL_StatusTypeDef status = HAL_OK; + 552 .loc 1 520 1 is_stmt 1 view -0 + 553 .cfi_startproc + 554 @ args = 0, pretend = 0, frame = 0 + 555 @ frame_needed = 0, uses_anonymous_args = 0 + 520:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** HAL_StatusTypeDef status = HAL_OK; + 556 .loc 1 520 1 is_stmt 0 view .LVU134 + 557 0000 10B5 push {r4, lr} + 558 .cfi_def_cfa_offset 8 + 559 .cfi_offset 4, -8 + 560 .cfi_offset 14, -4 + 561 0002 0400 movs r4, r0 + 521:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** uint16_t WRP0_Data = 0xFFFFU; + 562 .loc 1 521 3 is_stmt 1 view .LVU135 + 563 .LVL44: + 522:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** #if defined(OB_WRP1_WRP1) + 564 .loc 1 522 3 view .LVU136 + 534:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** + 565 .loc 1 534 3 view .LVU137 + 537:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** + 566 .loc 1 537 3 view .LVU138 + 537:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** + 567 .loc 1 537 37 is_stmt 0 view .LVU139 + ARM GAS /tmp/cc2085Zh.s page 29 + + + 568 0004 FFF7FEFF bl FLASH_OB_GetWRP + 569 .LVL45: + 537:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** + 570 .loc 1 537 20 discriminator 1 view .LVU140 + 571 0008 A043 bics r0, r4 + 572 .LVL46: + 542:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** #endif /* OB_WRP_PAGES0TO31MASK */ + 573 .loc 1 542 3 is_stmt 1 view .LVU141 + 542:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** #endif /* OB_WRP_PAGES0TO31MASK */ + 574 .loc 1 542 13 is_stmt 0 view .LVU142 + 575 000a FF24 movs r4, #255 + 576 000c 0440 ands r4, r0 + 577 .LVL47: + 562:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** + 578 .loc 1 562 3 is_stmt 1 view .LVU143 + 562:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** + 579 .loc 1 562 12 is_stmt 0 view .LVU144 + 580 000e 1148 ldr r0, .L41 + 581 .LVL48: + 562:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** + 582 .loc 1 562 12 view .LVU145 + 583 0010 FFF7FEFF bl FLASH_WaitForLastOperation + 584 .LVL49: + 564:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** { + 585 .loc 1 564 3 is_stmt 1 view .LVU146 + 564:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** { + 586 .loc 1 564 5 is_stmt 0 view .LVU147 + 587 0014 0028 cmp r0, #0 + 588 0016 00D0 beq .L39 + 589 .LVL50: + 590 .L37: + 621:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** } + 591 .loc 1 621 3 is_stmt 1 view .LVU148 + 622:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** + 592 .loc 1 622 1 is_stmt 0 view .LVU149 + 593 @ sp needed + 594 .LVL51: + 622:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** + 595 .loc 1 622 1 view .LVU150 + 596 0018 10BD pop {r4, pc} + 597 .LVL52: + 598 .L39: + 567:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** + 599 .loc 1 567 5 is_stmt 1 view .LVU151 + 567:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** + 600 .loc 1 567 22 is_stmt 0 view .LVU152 + 601 001a 0F4B ldr r3, .L41+4 + 602 001c 0022 movs r2, #0 + 603 001e DA61 str r2, [r3, #28] + 570:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** if (status == HAL_OK) + 604 .loc 1 570 5 is_stmt 1 view .LVU153 + 570:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** if (status == HAL_OK) + 605 .loc 1 570 14 is_stmt 0 view .LVU154 + 606 0020 FFF7FEFF bl HAL_FLASHEx_OBErase + 607 .LVL53: + 571:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** { + 608 .loc 1 571 5 is_stmt 1 view .LVU155 + ARM GAS /tmp/cc2085Zh.s page 30 + + + 571:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** { + 609 .loc 1 571 8 is_stmt 0 view .LVU156 + 610 0024 0028 cmp r0, #0 + 611 0026 F7D1 bne .L37 + 574:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** + 612 .loc 1 574 7 is_stmt 1 view .LVU157 + 613 0028 0C4A ldr r2, .L41+8 + 614 002a 1369 ldr r3, [r2, #16] + 615 002c 1021 movs r1, #16 + 616 002e 0B43 orrs r3, r1 + 617 0030 1361 str r3, [r2, #16] + 577:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** { + 618 .loc 1 577 7 view .LVU158 + 577:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** { + 619 .loc 1 577 9 is_stmt 0 view .LVU159 + 620 0032 FF2C cmp r4, #255 + 621 0034 05D1 bne .L40 + 622 .LVL54: + 623 .L38: + 617:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** } + 624 .loc 1 617 7 is_stmt 1 view .LVU160 + 625 0036 094A ldr r2, .L41+8 + 626 0038 1369 ldr r3, [r2, #16] + 627 003a 1021 movs r1, #16 + 628 003c 8B43 bics r3, r1 + 629 003e 1361 str r3, [r2, #16] + 630 0040 EAE7 b .L37 + 631 .L40: + 579:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** + 632 .loc 1 579 9 view .LVU161 + 579:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** + 633 .loc 1 579 11 is_stmt 0 view .LVU162 + 634 0042 074A ldr r2, .L41+12 + 635 0044 1389 ldrh r3, [r2, #8] + 579:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** + 636 .loc 1 579 18 view .LVU163 + 637 0046 2340 ands r3, r4 + 638 0048 1381 strh r3, [r2, #8] + 582:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** } + 639 .loc 1 582 9 is_stmt 1 view .LVU164 + 582:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** } + 640 .loc 1 582 18 is_stmt 0 view .LVU165 + 641 004a 0248 ldr r0, .L41 + 642 .LVL55: + 582:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** } + 643 .loc 1 582 18 view .LVU166 + 644 004c FFF7FEFF bl FLASH_WaitForLastOperation + 645 .LVL56: + 582:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** } + 646 .loc 1 582 18 view .LVU167 + 647 0050 F1E7 b .L38 + 648 .L42: + 649 0052 C046 .align 2 + 650 .L41: + 651 0054 50C30000 .word 50000 + 652 0058 00000000 .word pFlash + 653 005c 00200240 .word 1073881088 + ARM GAS /tmp/cc2085Zh.s page 31 + + + 654 0060 00F8FF1F .word 536868864 + 655 .cfi_endproc + 656 .LFE47: + 658 .section .text.FLASH_OB_DisableWRP,"ax",%progbits + 659 .align 1 + 660 .syntax unified + 661 .code 16 + 662 .thumb_func + 664 FLASH_OB_DisableWRP: + 665 .LVL57: + 666 .LFB48: + 636:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** HAL_StatusTypeDef status = HAL_OK; + 667 .loc 1 636 1 is_stmt 1 view -0 + 668 .cfi_startproc + 669 @ args = 0, pretend = 0, frame = 0 + 670 @ frame_needed = 0, uses_anonymous_args = 0 + 636:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** HAL_StatusTypeDef status = HAL_OK; + 671 .loc 1 636 1 is_stmt 0 view .LVU169 + 672 0000 10B5 push {r4, lr} + 673 .cfi_def_cfa_offset 8 + 674 .cfi_offset 4, -8 + 675 .cfi_offset 14, -4 + 676 0002 0400 movs r4, r0 + 637:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** uint16_t WRP0_Data = 0xFFFFU; + 677 .loc 1 637 3 is_stmt 1 view .LVU170 + 678 .LVL58: + 638:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** #if defined(OB_WRP1_WRP1) + 679 .loc 1 638 3 view .LVU171 + 650:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** + 680 .loc 1 650 3 view .LVU172 + 653:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** + 681 .loc 1 653 3 view .LVU173 + 653:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** + 682 .loc 1 653 23 is_stmt 0 view .LVU174 + 683 0004 FFF7FEFF bl FLASH_OB_GetWRP + 684 .LVL59: + 653:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** + 685 .loc 1 653 20 discriminator 1 view .LVU175 + 686 0008 2043 orrs r0, r4 + 687 .LVL60: + 658:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** #endif /* OB_WRP_PAGES0TO31MASK */ + 688 .loc 1 658 3 is_stmt 1 view .LVU176 + 658:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** #endif /* OB_WRP_PAGES0TO31MASK */ + 689 .loc 1 658 13 is_stmt 0 view .LVU177 + 690 000a FF24 movs r4, #255 + 691 000c 0440 ands r4, r0 + 692 .LVL61: + 679:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** + 693 .loc 1 679 3 is_stmt 1 view .LVU178 + 679:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** + 694 .loc 1 679 12 is_stmt 0 view .LVU179 + 695 000e 1148 ldr r0, .L48 + 696 .LVL62: + 679:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** + 697 .loc 1 679 12 view .LVU180 + 698 0010 FFF7FEFF bl FLASH_WaitForLastOperation + 699 .LVL63: + ARM GAS /tmp/cc2085Zh.s page 32 + + + 681:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** { + 700 .loc 1 681 3 is_stmt 1 view .LVU181 + 681:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** { + 701 .loc 1 681 5 is_stmt 0 view .LVU182 + 702 0014 0028 cmp r0, #0 + 703 0016 00D0 beq .L46 + 704 .LVL64: + 705 .L44: + 736:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** } + 706 .loc 1 736 3 is_stmt 1 view .LVU183 + 737:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** + 707 .loc 1 737 1 is_stmt 0 view .LVU184 + 708 @ sp needed + 709 .LVL65: + 737:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** + 710 .loc 1 737 1 view .LVU185 + 711 0018 10BD pop {r4, pc} + 712 .LVL66: + 713 .L46: + 684:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** + 714 .loc 1 684 5 is_stmt 1 view .LVU186 + 684:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** + 715 .loc 1 684 22 is_stmt 0 view .LVU187 + 716 001a 0F4B ldr r3, .L48+4 + 717 001c 0022 movs r2, #0 + 718 001e DA61 str r2, [r3, #28] + 687:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** if (status == HAL_OK) + 719 .loc 1 687 5 is_stmt 1 view .LVU188 + 687:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** if (status == HAL_OK) + 720 .loc 1 687 14 is_stmt 0 view .LVU189 + 721 0020 FFF7FEFF bl HAL_FLASHEx_OBErase + 722 .LVL67: + 688:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** { + 723 .loc 1 688 5 is_stmt 1 view .LVU190 + 688:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** { + 724 .loc 1 688 8 is_stmt 0 view .LVU191 + 725 0024 0028 cmp r0, #0 + 726 0026 F7D1 bne .L44 + 690:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** + 727 .loc 1 690 7 is_stmt 1 view .LVU192 + 728 0028 0C4A ldr r2, .L48+8 + 729 002a 1369 ldr r3, [r2, #16] + 730 002c 1021 movs r1, #16 + 731 002e 0B43 orrs r3, r1 + 732 0030 1361 str r3, [r2, #16] + 693:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** { + 733 .loc 1 693 7 view .LVU193 + 693:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** { + 734 .loc 1 693 9 is_stmt 0 view .LVU194 + 735 0032 FF2C cmp r4, #255 + 736 0034 05D1 bne .L47 + 737 .LVL68: + 738 .L45: + 733:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** } + 739 .loc 1 733 7 is_stmt 1 view .LVU195 + 740 0036 094A ldr r2, .L48+8 + 741 0038 1369 ldr r3, [r2, #16] + ARM GAS /tmp/cc2085Zh.s page 33 + + + 742 003a 1021 movs r1, #16 + 743 003c 8B43 bics r3, r1 + 744 003e 1361 str r3, [r2, #16] + 745 0040 EAE7 b .L44 + 746 .L47: + 695:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** + 747 .loc 1 695 9 view .LVU196 + 695:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** + 748 .loc 1 695 11 is_stmt 0 view .LVU197 + 749 0042 074A ldr r2, .L48+12 + 750 0044 1389 ldrh r3, [r2, #8] + 695:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** + 751 .loc 1 695 18 view .LVU198 + 752 0046 2340 ands r3, r4 + 753 0048 1381 strh r3, [r2, #8] + 698:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** } + 754 .loc 1 698 9 is_stmt 1 view .LVU199 + 698:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** } + 755 .loc 1 698 18 is_stmt 0 view .LVU200 + 756 004a 0248 ldr r0, .L48 + 757 .LVL69: + 698:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** } + 758 .loc 1 698 18 view .LVU201 + 759 004c FFF7FEFF bl FLASH_WaitForLastOperation + 760 .LVL70: + 698:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** } + 761 .loc 1 698 18 view .LVU202 + 762 0050 F1E7 b .L45 + 763 .L49: + 764 0052 C046 .align 2 + 765 .L48: + 766 0054 50C30000 .word 50000 + 767 0058 00000000 .word pFlash + 768 005c 00200240 .word 1073881088 + 769 0060 00F8FF1F .word 536868864 + 770 .cfi_endproc + 771 .LFE48: + 773 .section .text.HAL_FLASHEx_OBProgram,"ax",%progbits + 774 .align 1 + 775 .global HAL_FLASHEx_OBProgram + 776 .syntax unified + 777 .code 16 + 778 .thumb_func + 780 HAL_FLASHEx_OBProgram: + 781 .LVL71: + 782 .LFB43: + 361:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** HAL_StatusTypeDef status = HAL_ERROR; + 783 .loc 1 361 1 is_stmt 1 view -0 + 784 .cfi_startproc + 785 @ args = 0, pretend = 0, frame = 0 + 786 @ frame_needed = 0, uses_anonymous_args = 0 + 361:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** HAL_StatusTypeDef status = HAL_ERROR; + 787 .loc 1 361 1 is_stmt 0 view .LVU204 + 788 0000 10B5 push {r4, lr} + 789 .cfi_def_cfa_offset 8 + 790 .cfi_offset 4, -8 + 791 .cfi_offset 14, -4 + ARM GAS /tmp/cc2085Zh.s page 34 + + + 792 0002 0400 movs r4, r0 + 362:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** + 793 .loc 1 362 3 is_stmt 1 view .LVU205 + 794 .LVL72: + 365:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** + 795 .loc 1 365 3 view .LVU206 + 365:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** + 796 .loc 1 365 3 view .LVU207 + 797 0004 224B ldr r3, .L67 + 798 0006 1B7E ldrb r3, [r3, #24] + 799 0008 012B cmp r3, #1 + 800 000a 3FD0 beq .L58 + 365:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** + 801 .loc 1 365 3 discriminator 2 view .LVU208 + 802 000c 204B ldr r3, .L67 + 803 000e 0122 movs r2, #1 + 804 0010 1A76 strb r2, [r3, #24] + 365:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** + 805 .loc 1 365 3 discriminator 2 view .LVU209 + 368:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** + 806 .loc 1 368 3 view .LVU210 + 371:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** { + 807 .loc 1 371 3 view .LVU211 + 371:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** { + 808 .loc 1 371 14 is_stmt 0 view .LVU212 + 809 0012 0368 ldr r3, [r0] + 371:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** { + 810 .loc 1 371 5 view .LVU213 + 811 0014 1A42 tst r2, r3 + 812 0016 0FD0 beq .L59 + 373:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** if (pOBInit->WRPState == OB_WRPSTATE_ENABLE) + 813 .loc 1 373 5 is_stmt 1 view .LVU214 + 374:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** { + 814 .loc 1 374 5 view .LVU215 + 374:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** { + 815 .loc 1 374 16 is_stmt 0 view .LVU216 + 816 0018 4368 ldr r3, [r0, #4] + 374:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** { + 817 .loc 1 374 8 view .LVU217 + 818 001a 012B cmp r3, #1 + 819 001c 08D0 beq .L63 + 382:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** } + 820 .loc 1 382 7 is_stmt 1 view .LVU218 + 382:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** } + 821 .loc 1 382 16 is_stmt 0 view .LVU219 + 822 001e 8068 ldr r0, [r0, #8] + 823 .LVL73: + 382:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** } + 824 .loc 1 382 16 view .LVU220 + 825 0020 FFF7FEFF bl FLASH_OB_DisableWRP + 826 .LVL74: + 827 .L54: + 384:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** { + 828 .loc 1 384 5 is_stmt 1 view .LVU221 + 384:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** { + 829 .loc 1 384 8 is_stmt 0 view .LVU222 + 830 0024 0028 cmp r0, #0 + ARM GAS /tmp/cc2085Zh.s page 35 + + + 831 0026 08D0 beq .L52 + 387:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** return status; + 832 .loc 1 387 7 is_stmt 1 view .LVU223 + 387:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** return status; + 833 .loc 1 387 7 view .LVU224 + 834 0028 194B ldr r3, .L67 + 835 002a 0022 movs r2, #0 + 836 002c 1A76 strb r2, [r3, #24] + 387:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** return status; + 837 .loc 1 387 7 view .LVU225 + 388:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** } + 838 .loc 1 388 7 view .LVU226 + 388:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** } + 839 .loc 1 388 14 is_stmt 0 view .LVU227 + 840 002e 10E0 b .L51 + 841 .LVL75: + 842 .L63: + 377:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** } + 843 .loc 1 377 7 is_stmt 1 view .LVU228 + 377:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** } + 844 .loc 1 377 16 is_stmt 0 view .LVU229 + 845 0030 8068 ldr r0, [r0, #8] + 846 .LVL76: + 377:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** } + 847 .loc 1 377 16 view .LVU230 + 848 0032 FFF7FEFF bl FLASH_OB_EnableWRP + 849 .LVL77: + 377:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** } + 850 .loc 1 377 16 view .LVU231 + 851 0036 F5E7 b .L54 + 852 .LVL78: + 853 .L59: + 362:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** + 854 .loc 1 362 21 view .LVU232 + 855 0038 0120 movs r0, #1 + 856 .LVL79: + 857 .L52: + 393:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** { + 858 .loc 1 393 3 is_stmt 1 view .LVU233 + 393:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** { + 859 .loc 1 393 14 is_stmt 0 view .LVU234 + 860 003a 2368 ldr r3, [r4] + 393:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** { + 861 .loc 1 393 5 view .LVU235 + 862 003c 9B07 lsls r3, r3, #30 + 863 003e 09D4 bmi .L64 + 864 .LVL80: + 865 .L55: + 405:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** { + 866 .loc 1 405 3 is_stmt 1 view .LVU236 + 405:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** { + 867 .loc 1 405 14 is_stmt 0 view .LVU237 + 868 0040 2368 ldr r3, [r4] + 405:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** { + 869 .loc 1 405 5 view .LVU238 + 870 0042 5B07 lsls r3, r3, #29 + 871 0044 0FD4 bmi .L65 + ARM GAS /tmp/cc2085Zh.s page 36 + + + 872 .LVL81: + 873 .L56: + 417:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** { + 874 .loc 1 417 3 is_stmt 1 view .LVU239 + 417:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** { + 875 .loc 1 417 14 is_stmt 0 view .LVU240 + 876 0046 2368 ldr r3, [r4] + 417:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** { + 877 .loc 1 417 5 view .LVU241 + 878 0048 1B07 lsls r3, r3, #28 + 879 004a 15D4 bmi .L66 + 880 .LVL82: + 881 .L57: + 429:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** + 882 .loc 1 429 3 is_stmt 1 view .LVU242 + 429:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** + 883 .loc 1 429 3 view .LVU243 + 884 004c 104B ldr r3, .L67 + 885 004e 0022 movs r2, #0 + 886 0050 1A76 strb r2, [r3, #24] + 429:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** + 887 .loc 1 429 3 view .LVU244 + 431:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** } + 888 .loc 1 431 3 view .LVU245 + 889 .LVL83: + 890 .L51: + 432:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** + 891 .loc 1 432 1 is_stmt 0 view .LVU246 + 892 @ sp needed + 893 .LVL84: + 432:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** + 894 .loc 1 432 1 view .LVU247 + 895 0052 10BD pop {r4, pc} + 896 .LVL85: + 897 .L64: + 395:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** if (status != HAL_OK) + 898 .loc 1 395 5 is_stmt 1 view .LVU248 + 395:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** if (status != HAL_OK) + 899 .loc 1 395 14 is_stmt 0 view .LVU249 + 900 0054 207B ldrb r0, [r4, #12] + 901 .LVL86: + 395:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** if (status != HAL_OK) + 902 .loc 1 395 14 view .LVU250 + 903 0056 FFF7FEFF bl FLASH_OB_RDP_LevelConfig + 904 .LVL87: + 396:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** { + 905 .loc 1 396 5 is_stmt 1 view .LVU251 + 396:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** { + 906 .loc 1 396 8 is_stmt 0 view .LVU252 + 907 005a 0028 cmp r0, #0 + 908 005c F0D0 beq .L55 + 399:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** return status; + 909 .loc 1 399 7 is_stmt 1 view .LVU253 + 399:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** return status; + 910 .loc 1 399 7 view .LVU254 + 911 005e 0C4B ldr r3, .L67 + 912 0060 0022 movs r2, #0 + ARM GAS /tmp/cc2085Zh.s page 37 + + + 913 0062 1A76 strb r2, [r3, #24] + 399:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** return status; + 914 .loc 1 399 7 view .LVU255 + 400:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** } + 915 .loc 1 400 7 view .LVU256 + 400:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** } + 916 .loc 1 400 14 is_stmt 0 view .LVU257 + 917 0064 F5E7 b .L51 + 918 .L65: + 407:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** if (status != HAL_OK) + 919 .loc 1 407 5 is_stmt 1 view .LVU258 + 407:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** if (status != HAL_OK) + 920 .loc 1 407 14 is_stmt 0 view .LVU259 + 921 0066 607B ldrb r0, [r4, #13] + 922 .LVL88: + 407:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** if (status != HAL_OK) + 923 .loc 1 407 14 view .LVU260 + 924 0068 FFF7FEFF bl FLASH_OB_UserConfig + 925 .LVL89: + 408:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** { + 926 .loc 1 408 5 is_stmt 1 view .LVU261 + 408:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** { + 927 .loc 1 408 8 is_stmt 0 view .LVU262 + 928 006c 0028 cmp r0, #0 + 929 006e EAD0 beq .L56 + 411:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** return status; + 930 .loc 1 411 7 is_stmt 1 view .LVU263 + 411:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** return status; + 931 .loc 1 411 7 view .LVU264 + 932 0070 074B ldr r3, .L67 + 933 0072 0022 movs r2, #0 + 934 0074 1A76 strb r2, [r3, #24] + 411:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** return status; + 935 .loc 1 411 7 view .LVU265 + 412:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** } + 936 .loc 1 412 7 view .LVU266 + 412:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** } + 937 .loc 1 412 14 is_stmt 0 view .LVU267 + 938 0076 ECE7 b .L51 + 939 .L66: + 419:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** if (status != HAL_OK) + 940 .loc 1 419 5 is_stmt 1 view .LVU268 + 419:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** if (status != HAL_OK) + 941 .loc 1 419 14 is_stmt 0 view .LVU269 + 942 0078 217D ldrb r1, [r4, #20] + 943 007a 2069 ldr r0, [r4, #16] + 944 .LVL90: + 419:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** if (status != HAL_OK) + 945 .loc 1 419 14 view .LVU270 + 946 007c FFF7FEFF bl FLASH_OB_ProgramData + 947 .LVL91: + 420:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** { + 948 .loc 1 420 5 is_stmt 1 view .LVU271 + 420:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** { + 949 .loc 1 420 8 is_stmt 0 view .LVU272 + 950 0080 0028 cmp r0, #0 + 951 0082 E3D0 beq .L57 + ARM GAS /tmp/cc2085Zh.s page 38 + + + 423:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** return status; + 952 .loc 1 423 7 is_stmt 1 view .LVU273 + 423:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** return status; + 953 .loc 1 423 7 view .LVU274 + 954 0084 024B ldr r3, .L67 + 955 0086 0022 movs r2, #0 + 956 0088 1A76 strb r2, [r3, #24] + 423:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** return status; + 957 .loc 1 423 7 view .LVU275 + 424:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** } + 958 .loc 1 424 7 view .LVU276 + 424:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** } + 959 .loc 1 424 14 is_stmt 0 view .LVU277 + 960 008a E2E7 b .L51 + 961 .LVL92: + 962 .L58: + 365:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** + 963 .loc 1 365 3 discriminator 1 view .LVU278 + 964 008c 0220 movs r0, #2 + 965 .LVL93: + 365:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** + 966 .loc 1 365 3 discriminator 1 view .LVU279 + 967 008e E0E7 b .L51 + 968 .L68: + 969 .align 2 + 970 .L67: + 971 0090 00000000 .word pFlash + 972 .cfi_endproc + 973 .LFE43: + 975 .section .text.HAL_FLASHEx_OBGetConfig,"ax",%progbits + 976 .align 1 + 977 .global HAL_FLASHEx_OBGetConfig + 978 .syntax unified + 979 .code 16 + 980 .thumb_func + 982 HAL_FLASHEx_OBGetConfig: + 983 .LVL94: + 984 .LFB44: + 442:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** pOBInit->OptionType = OPTIONBYTE_WRP | OPTIONBYTE_RDP | OPTIONBYTE_USER; + 985 .loc 1 442 1 is_stmt 1 view -0 + 986 .cfi_startproc + 987 @ args = 0, pretend = 0, frame = 0 + 988 @ frame_needed = 0, uses_anonymous_args = 0 + 442:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** pOBInit->OptionType = OPTIONBYTE_WRP | OPTIONBYTE_RDP | OPTIONBYTE_USER; + 989 .loc 1 442 1 is_stmt 0 view .LVU281 + 990 0000 10B5 push {r4, lr} + 991 .cfi_def_cfa_offset 8 + 992 .cfi_offset 4, -8 + 993 .cfi_offset 14, -4 + 994 0002 0400 movs r4, r0 + 443:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** + 995 .loc 1 443 3 is_stmt 1 view .LVU282 + 443:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** + 996 .loc 1 443 23 is_stmt 0 view .LVU283 + 997 0004 0723 movs r3, #7 + 998 0006 0360 str r3, [r0] + 446:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** + ARM GAS /tmp/cc2085Zh.s page 39 + + + 999 .loc 1 446 3 is_stmt 1 view .LVU284 + 446:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** + 1000 .loc 1 446 22 is_stmt 0 view .LVU285 + 1001 0008 FFF7FEFF bl FLASH_OB_GetWRP + 1002 .LVL95: + 446:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** + 1003 .loc 1 446 20 discriminator 1 view .LVU286 + 1004 000c A060 str r0, [r4, #8] + 449:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** + 1005 .loc 1 449 3 is_stmt 1 view .LVU287 + 449:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** + 1006 .loc 1 449 23 is_stmt 0 view .LVU288 + 1007 000e FFF7FEFF bl FLASH_OB_GetRDP + 1008 .LVL96: + 449:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** + 1009 .loc 1 449 21 discriminator 1 view .LVU289 + 1010 0012 2073 strb r0, [r4, #12] + 452:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** } + 1011 .loc 1 452 3 is_stmt 1 view .LVU290 + 452:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** } + 1012 .loc 1 452 25 is_stmt 0 view .LVU291 + 1013 0014 FFF7FEFF bl FLASH_OB_GetUser + 1014 .LVL97: + 452:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** } + 1015 .loc 1 452 23 discriminator 1 view .LVU292 + 1016 0018 6073 strb r0, [r4, #13] + 453:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** + 1017 .loc 1 453 1 view .LVU293 + 1018 @ sp needed + 1019 .LVL98: + 453:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** + 1020 .loc 1 453 1 view .LVU294 + 1021 001a 10BD pop {r4, pc} + 1022 .cfi_endproc + 1023 .LFE44: + 1025 .section .text.HAL_FLASHEx_OBGetUserData,"ax",%progbits + 1026 .align 1 + 1027 .global HAL_FLASHEx_OBGetUserData + 1028 .syntax unified + 1029 .code 16 + 1030 .thumb_func + 1032 HAL_FLASHEx_OBGetUserData: + 1033 .LVL99: + 1034 .LFB45: + 464:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** uint32_t value = 0U; + 1035 .loc 1 464 1 is_stmt 1 view -0 + 1036 .cfi_startproc + 1037 @ args = 0, pretend = 0, frame = 0 + 1038 @ frame_needed = 0, uses_anonymous_args = 0 + 1039 @ link register save eliminated. + 465:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** + 1040 .loc 1 465 3 view .LVU296 + 467:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** { + 1041 .loc 1 467 3 view .LVU297 + 467:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** { + 1042 .loc 1 467 6 is_stmt 0 view .LVU298 + 1043 0000 064B ldr r3, .L74 + ARM GAS /tmp/cc2085Zh.s page 40 + + + 1044 0002 9842 cmp r0, r3 + 1045 0004 03D0 beq .L73 + 475:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** } + 1046 .loc 1 475 5 is_stmt 1 view .LVU299 + 475:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** } + 1047 .loc 1 475 13 is_stmt 0 view .LVU300 + 1048 0006 064B ldr r3, .L74+4 + 1049 0008 D869 ldr r0, [r3, #28] + 1050 .LVL100: + 475:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** } + 1051 .loc 1 475 51 view .LVU301 + 1052 000a 000E lsrs r0, r0, #24 + 1053 .LVL101: + 478:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** } + 1054 .loc 1 478 3 is_stmt 1 view .LVU302 + 1055 .L70: + 479:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** + 1056 .loc 1 479 1 is_stmt 0 view .LVU303 + 1057 @ sp needed + 1058 000c 7047 bx lr + 1059 .LVL102: + 1060 .L73: + 470:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** } + 1061 .loc 1 470 5 is_stmt 1 view .LVU304 + 470:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** } + 1062 .loc 1 470 13 is_stmt 0 view .LVU305 + 1063 000e 044B ldr r3, .L74+4 + 1064 0010 DB69 ldr r3, [r3, #28] + 470:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** } + 1065 .loc 1 470 51 view .LVU306 + 1066 0012 1B0C lsrs r3, r3, #16 + 470:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** } + 1067 .loc 1 470 11 view .LVU307 + 1068 0014 FF20 movs r0, #255 + 1069 .LVL103: + 470:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** } + 1070 .loc 1 470 11 view .LVU308 + 1071 0016 1840 ands r0, r3 + 1072 .LVL104: + 470:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** } + 1073 .loc 1 470 11 view .LVU309 + 1074 0018 F8E7 b .L70 + 1075 .L75: + 1076 001a C046 .align 2 + 1077 .L74: + 1078 001c 04F8FF1F .word 536868868 + 1079 0020 00200240 .word 1073881088 + 1080 .cfi_endproc + 1081 .LFE45: + 1083 .section .text.FLASH_PageErase,"ax",%progbits + 1084 .align 1 + 1085 .global FLASH_PageErase + 1086 .syntax unified + 1087 .code 16 + 1088 .thumb_func + 1090 FLASH_PageErase: + 1091 .LVL105: + ARM GAS /tmp/cc2085Zh.s page 41 + + + 1092 .LFB55: + 934:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** + 935:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** /** + 936:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** * @} + 937:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** */ + 938:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** + 939:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** /** + 940:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** * @} + 941:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** */ + 942:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** + 943:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** /** @addtogroup FLASH + 944:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** * @{ + 945:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** */ + 946:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** + 947:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** /** @addtogroup FLASH_Private_Functions + 948:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** * @{ + 949:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** */ + 950:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** + 951:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** /** + 952:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** * @brief Erase the specified FLASH memory page + 953:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** * @param PageAddress FLASH page to erase + 954:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** * The value of this parameter depend on device used within the same series + 955:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** * + 956:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** * @retval None + 957:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** */ + 958:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** void FLASH_PageErase(uint32_t PageAddress) + 959:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** { + 1093 .loc 1 959 1 is_stmt 1 view -0 + 1094 .cfi_startproc + 1095 @ args = 0, pretend = 0, frame = 0 + 1096 @ frame_needed = 0, uses_anonymous_args = 0 + 1097 @ link register save eliminated. + 960:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** /* Clean the error context */ + 961:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** pFlash.ErrorCode = HAL_FLASH_ERROR_NONE; + 1098 .loc 1 961 3 view .LVU311 + 1099 .loc 1 961 20 is_stmt 0 view .LVU312 + 1100 0000 064B ldr r3, .L77 + 1101 0002 0022 movs r2, #0 + 1102 0004 DA61 str r2, [r3, #28] + 962:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** + 963:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** /* Proceed to erase the page */ + 964:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** SET_BIT(FLASH->CR, FLASH_CR_PER); + 1103 .loc 1 964 5 is_stmt 1 view .LVU313 + 1104 0006 064B ldr r3, .L77+4 + 1105 0008 1A69 ldr r2, [r3, #16] + 1106 000a 0221 movs r1, #2 + 1107 000c 0A43 orrs r2, r1 + 1108 000e 1A61 str r2, [r3, #16] + 965:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** WRITE_REG(FLASH->AR, PageAddress); + 1109 .loc 1 965 5 view .LVU314 + 1110 0010 5861 str r0, [r3, #20] + 966:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** SET_BIT(FLASH->CR, FLASH_CR_STRT); + 1111 .loc 1 966 5 view .LVU315 + 1112 0012 1A69 ldr r2, [r3, #16] + 1113 0014 3E31 adds r1, r1, #62 + 1114 0016 0A43 orrs r2, r1 + 1115 0018 1A61 str r2, [r3, #16] + ARM GAS /tmp/cc2085Zh.s page 42 + + + 967:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** } + 1116 .loc 1 967 1 is_stmt 0 view .LVU316 + 1117 @ sp needed + 1118 001a 7047 bx lr + 1119 .L78: + 1120 .align 2 + 1121 .L77: + 1122 001c 00000000 .word pFlash + 1123 0020 00200240 .word 1073881088 + 1124 .cfi_endproc + 1125 .LFE55: + 1127 .section .text.HAL_FLASHEx_Erase,"ax",%progbits + 1128 .align 1 + 1129 .global HAL_FLASHEx_Erase + 1130 .syntax unified + 1131 .code 16 + 1132 .thumb_func + 1134 HAL_FLASHEx_Erase: + 1135 .LVL106: + 1136 .LFB40: + 158:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** HAL_StatusTypeDef status = HAL_ERROR; + 1137 .loc 1 158 1 is_stmt 1 view -0 + 1138 .cfi_startproc + 1139 @ args = 0, pretend = 0, frame = 0 + 1140 @ frame_needed = 0, uses_anonymous_args = 0 + 158:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** HAL_StatusTypeDef status = HAL_ERROR; + 1141 .loc 1 158 1 is_stmt 0 view .LVU318 + 1142 0000 70B5 push {r4, r5, r6, lr} + 1143 .cfi_def_cfa_offset 16 + 1144 .cfi_offset 4, -16 + 1145 .cfi_offset 5, -12 + 1146 .cfi_offset 6, -8 + 1147 .cfi_offset 14, -4 + 1148 0002 0500 movs r5, r0 + 1149 0004 0E00 movs r6, r1 + 159:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** uint32_t address = 0U; + 1150 .loc 1 159 3 is_stmt 1 view .LVU319 + 1151 .LVL107: + 160:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** + 1152 .loc 1 160 3 view .LVU320 + 163:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** + 1153 .loc 1 163 3 view .LVU321 + 163:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** + 1154 .loc 1 163 3 view .LVU322 + 1155 0006 234B ldr r3, .L92 + 1156 0008 1B7E ldrb r3, [r3, #24] + 1157 000a 012B cmp r3, #1 + 1158 000c 40D0 beq .L86 + 163:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** + 1159 .loc 1 163 3 discriminator 2 view .LVU323 + 1160 000e 214B ldr r3, .L92 + 1161 0010 0122 movs r2, #1 + 1162 0012 1A76 strb r2, [r3, #24] + 163:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** + 1163 .loc 1 163 3 discriminator 2 view .LVU324 + 166:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** + 1164 .loc 1 166 3 view .LVU325 + ARM GAS /tmp/cc2085Zh.s page 43 + + + 168:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** { + 1165 .loc 1 168 3 view .LVU326 + 168:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** { + 1166 .loc 1 168 17 is_stmt 0 view .LVU327 + 1167 0014 0368 ldr r3, [r0] + 168:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** { + 1168 .loc 1 168 6 view .LVU328 + 1169 0016 012B cmp r3, #1 + 1170 0018 21D0 beq .L89 + 188:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** assert_param(IS_FLASH_NB_PAGES(pEraseInit->PageAddress, pEraseInit->NbPages)); + 1171 .loc 1 188 5 is_stmt 1 view .LVU329 + 189:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** + 1172 .loc 1 189 5 view .LVU330 + 193:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** { + 1173 .loc 1 193 7 view .LVU331 + 193:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** { + 1174 .loc 1 193 11 is_stmt 0 view .LVU332 + 1175 001a 1F48 ldr r0, .L92+4 + 1176 .LVL108: + 193:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** { + 1177 .loc 1 193 11 view .LVU333 + 1178 001c FFF7FEFF bl FLASH_WaitForLastOperation + 1179 .LVL109: + 193:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** { + 1180 .loc 1 193 10 discriminator 1 view .LVU334 + 1181 0020 0028 cmp r0, #0 + 1182 0022 30D1 bne .L88 + 196:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** + 1183 .loc 1 196 9 is_stmt 1 view .LVU335 + 196:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** + 1184 .loc 1 196 20 is_stmt 0 view .LVU336 + 1185 0024 0123 movs r3, #1 + 1186 0026 5B42 rsbs r3, r3, #0 + 1187 0028 3360 str r3, [r6] + 199:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** address < ((pEraseInit->NbPages * FLASH_PAGE_SIZE) + pEraseInit->PageAddress); + 1188 .loc 1 199 9 is_stmt 1 view .LVU337 + 199:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** address < ((pEraseInit->NbPages * FLASH_PAGE_SIZE) + pEraseInit->PageAddress); + 1189 .loc 1 199 21 is_stmt 0 view .LVU338 + 1190 002a 6C68 ldr r4, [r5, #4] + 1191 .LVL110: + 159:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** uint32_t address = 0U; + 1192 .loc 1 159 21 view .LVU339 + 1193 002c 0130 adds r0, r0, #1 + 1194 .LVL111: + 1195 .L83: + 200:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** address += FLASH_PAGE_SIZE) + 1196 .loc 1 200 21 is_stmt 1 view .LVU340 + 200:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** address += FLASH_PAGE_SIZE) + 1197 .loc 1 200 35 is_stmt 0 view .LVU341 + 1198 002e AB68 ldr r3, [r5, #8] + 200:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** address += FLASH_PAGE_SIZE) + 1199 .loc 1 200 45 view .LVU342 + 1200 0030 9B02 lsls r3, r3, #10 + 200:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** address += FLASH_PAGE_SIZE) + 1201 .loc 1 200 76 view .LVU343 + 1202 0032 6A68 ldr r2, [r5, #4] + 200:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** address += FLASH_PAGE_SIZE) + ARM GAS /tmp/cc2085Zh.s page 44 + + + 1203 .loc 1 200 64 view .LVU344 + 1204 0034 9B18 adds r3, r3, r2 + 200:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** address += FLASH_PAGE_SIZE) + 1205 .loc 1 200 21 view .LVU345 + 1206 0036 A342 cmp r3, r4 + 1207 0038 26D9 bls .L82 + 203:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** + 1208 .loc 1 203 11 is_stmt 1 view .LVU346 + 1209 003a 2000 movs r0, r4 + 1210 .LVL112: + 203:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** + 1211 .loc 1 203 11 is_stmt 0 view .LVU347 + 1212 003c FFF7FEFF bl FLASH_PageErase + 1213 .LVL113: + 206:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** + 1214 .loc 1 206 11 is_stmt 1 view .LVU348 + 206:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** + 1215 .loc 1 206 20 is_stmt 0 view .LVU349 + 1216 0040 1548 ldr r0, .L92+4 + 1217 0042 FFF7FEFF bl FLASH_WaitForLastOperation + 1218 .LVL114: + 209:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** + 1219 .loc 1 209 11 is_stmt 1 view .LVU350 + 1220 0046 154A ldr r2, .L92+8 + 1221 0048 1369 ldr r3, [r2, #16] + 1222 004a 0221 movs r1, #2 + 1223 004c 8B43 bics r3, r1 + 1224 004e 1361 str r3, [r2, #16] + 211:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** { + 1225 .loc 1 211 11 view .LVU351 + 211:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** { + 1226 .loc 1 211 14 is_stmt 0 view .LVU352 + 1227 0050 0028 cmp r0, #0 + 1228 0052 16D1 bne .L90 + 201:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** { + 1229 .loc 1 201 21 is_stmt 1 view .LVU353 + 1230 0054 8023 movs r3, #128 + 1231 0056 DB00 lsls r3, r3, #3 + 1232 0058 9C46 mov ip, r3 + 1233 005a 6444 add r4, r4, ip + 1234 .LVL115: + 201:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** { + 1235 .loc 1 201 21 is_stmt 0 view .LVU354 + 1236 005c E7E7 b .L83 + 1237 .LVL116: + 1238 .L89: + 172:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** { + 1239 .loc 1 172 7 is_stmt 1 view .LVU355 + 172:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** { + 1240 .loc 1 172 11 is_stmt 0 view .LVU356 + 1241 005e 0E48 ldr r0, .L92+4 + 1242 .LVL117: + 172:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** { + 1243 .loc 1 172 11 view .LVU357 + 1244 0060 FFF7FEFF bl FLASH_WaitForLastOperation + 1245 .LVL118: + 172:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** { + ARM GAS /tmp/cc2085Zh.s page 45 + + + 1246 .loc 1 172 10 discriminator 1 view .LVU358 + 1247 0064 0028 cmp r0, #0 + 1248 0066 01D0 beq .L91 + 159:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** uint32_t address = 0U; + 1249 .loc 1 159 21 view .LVU359 + 1250 0068 0120 movs r0, #1 + 1251 006a 0DE0 b .L82 + 1252 .L91: + 175:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** + 1253 .loc 1 175 9 is_stmt 1 view .LVU360 + 1254 006c FFF7FEFF bl FLASH_MassErase + 1255 .LVL119: + 178:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** + 1256 .loc 1 178 9 view .LVU361 + 178:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** + 1257 .loc 1 178 18 is_stmt 0 view .LVU362 + 1258 0070 0948 ldr r0, .L92+4 + 1259 0072 FFF7FEFF bl FLASH_WaitForLastOperation + 1260 .LVL120: + 181:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** } + 1261 .loc 1 181 9 is_stmt 1 view .LVU363 + 1262 0076 094A ldr r2, .L92+8 + 1263 0078 1369 ldr r3, [r2, #16] + 1264 007a 0421 movs r1, #4 + 1265 007c 8B43 bics r3, r1 + 1266 007e 1361 str r3, [r2, #16] + 1267 0080 02E0 b .L82 + 1268 .LVL121: + 1269 .L90: + 214:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** break; + 1270 .loc 1 214 13 view .LVU364 + 214:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** break; + 1271 .loc 1 214 24 is_stmt 0 view .LVU365 + 1272 0082 3460 str r4, [r6] + 215:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** } + 1273 .loc 1 215 13 is_stmt 1 view .LVU366 + 1274 0084 00E0 b .L82 + 1275 .LVL122: + 1276 .L88: + 159:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** uint32_t address = 0U; + 1277 .loc 1 159 21 is_stmt 0 view .LVU367 + 1278 0086 0120 movs r0, #1 + 1279 .LVL123: + 1280 .L82: + 222:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** + 1281 .loc 1 222 3 is_stmt 1 view .LVU368 + 222:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** + 1282 .loc 1 222 3 view .LVU369 + 1283 0088 024B ldr r3, .L92 + 1284 008a 0022 movs r2, #0 + 1285 008c 1A76 strb r2, [r3, #24] + 222:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** + 1286 .loc 1 222 3 view .LVU370 + 224:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** } + 1287 .loc 1 224 3 view .LVU371 + 1288 .LVL124: + 1289 .L80: + ARM GAS /tmp/cc2085Zh.s page 46 + + + 225:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** + 1290 .loc 1 225 1 is_stmt 0 view .LVU372 + 1291 @ sp needed + 1292 .LVL125: + 1293 .LVL126: + 225:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** + 1294 .loc 1 225 1 view .LVU373 + 1295 008e 70BD pop {r4, r5, r6, pc} + 1296 .LVL127: + 1297 .L86: + 163:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** + 1298 .loc 1 163 3 discriminator 1 view .LVU374 + 1299 0090 0220 movs r0, #2 + 1300 .LVL128: + 163:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** + 1301 .loc 1 163 3 discriminator 1 view .LVU375 + 1302 0092 FCE7 b .L80 + 1303 .L93: + 1304 .align 2 + 1305 .L92: + 1306 0094 00000000 .word pFlash + 1307 0098 50C30000 .word 50000 + 1308 009c 00200240 .word 1073881088 + 1309 .cfi_endproc + 1310 .LFE40: + 1312 .section .text.HAL_FLASHEx_Erase_IT,"ax",%progbits + 1313 .align 1 + 1314 .global HAL_FLASHEx_Erase_IT + 1315 .syntax unified + 1316 .code 16 + 1317 .thumb_func + 1319 HAL_FLASHEx_Erase_IT: + 1320 .LVL129: + 1321 .LFB41: + 239:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** HAL_StatusTypeDef status = HAL_OK; + 1322 .loc 1 239 1 is_stmt 1 view -0 + 1323 .cfi_startproc + 1324 @ args = 0, pretend = 0, frame = 0 + 1325 @ frame_needed = 0, uses_anonymous_args = 0 + 239:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** HAL_StatusTypeDef status = HAL_OK; + 1326 .loc 1 239 1 is_stmt 0 view .LVU377 + 1327 0000 10B5 push {r4, lr} + 1328 .cfi_def_cfa_offset 8 + 1329 .cfi_offset 4, -8 + 1330 .cfi_offset 14, -4 + 240:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** + 1331 .loc 1 240 3 is_stmt 1 view .LVU378 + 1332 .LVL130: + 243:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** + 1333 .loc 1 243 3 view .LVU379 + 243:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** + 1334 .loc 1 243 3 view .LVU380 + 1335 0002 144B ldr r3, .L100 + 1336 0004 1B7E ldrb r3, [r3, #24] + 1337 0006 012B cmp r3, #1 + 1338 0008 20D0 beq .L97 + 243:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** + ARM GAS /tmp/cc2085Zh.s page 47 + + + 1339 .loc 1 243 3 discriminator 2 view .LVU381 + 1340 000a 124B ldr r3, .L100 + 1341 000c 0122 movs r2, #1 + 1342 000e 1A76 strb r2, [r3, #24] + 243:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** + 1343 .loc 1 243 3 discriminator 2 view .LVU382 + 246:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** { + 1344 .loc 1 246 3 view .LVU383 + 246:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** { + 1345 .loc 1 246 13 is_stmt 0 view .LVU384 + 1346 0010 1B78 ldrb r3, [r3] + 1347 0012 DCB2 uxtb r4, r3 + 246:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** { + 1348 .loc 1 246 6 view .LVU385 + 1349 0014 002B cmp r3, #0 + 1350 0016 1BD1 bne .L98 + 252:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** + 1351 .loc 1 252 3 is_stmt 1 view .LVU386 + 255:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** + 1352 .loc 1 255 3 view .LVU387 + 1353 0018 0F4A ldr r2, .L100+4 + 1354 001a 1169 ldr r1, [r2, #16] + 1355 001c A023 movs r3, #160 + 1356 001e 5B01 lsls r3, r3, #5 + 1357 0020 0B43 orrs r3, r1 + 1358 0022 1361 str r3, [r2, #16] + 257:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** { + 1359 .loc 1 257 3 view .LVU388 + 257:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** { + 1360 .loc 1 257 17 is_stmt 0 view .LVU389 + 1361 0024 0368 ldr r3, [r0] + 257:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** { + 1362 .loc 1 257 6 view .LVU390 + 1363 0026 012B cmp r3, #1 + 1364 0028 0AD0 beq .L99 + 268:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** assert_param(IS_FLASH_NB_PAGES(pEraseInit->PageAddress, pEraseInit->NbPages)); + 1365 .loc 1 268 5 is_stmt 1 view .LVU391 + 269:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** + 1366 .loc 1 269 5 view .LVU392 + 271:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** pFlash.DataRemaining = pEraseInit->NbPages; + 1367 .loc 1 271 5 view .LVU393 + 271:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** pFlash.DataRemaining = pEraseInit->NbPages; + 1368 .loc 1 271 29 is_stmt 0 view .LVU394 + 1369 002a 0A4B ldr r3, .L100 + 1370 002c 0122 movs r2, #1 + 1371 002e 1A70 strb r2, [r3] + 272:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** pFlash.Address = pEraseInit->PageAddress; + 1372 .loc 1 272 5 is_stmt 1 view .LVU395 + 272:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** pFlash.Address = pEraseInit->PageAddress; + 1373 .loc 1 272 38 is_stmt 0 view .LVU396 + 1374 0030 8268 ldr r2, [r0, #8] + 272:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** pFlash.Address = pEraseInit->PageAddress; + 1375 .loc 1 272 26 view .LVU397 + 1376 0032 5A60 str r2, [r3, #4] + 273:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** + 1377 .loc 1 273 5 is_stmt 1 view .LVU398 + 273:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** + ARM GAS /tmp/cc2085Zh.s page 48 + + + 1378 .loc 1 273 32 is_stmt 0 view .LVU399 + 1379 0034 4068 ldr r0, [r0, #4] + 1380 .LVL131: + 273:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** + 1381 .loc 1 273 20 view .LVU400 + 1382 0036 9860 str r0, [r3, #8] + 276:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** } + 1383 .loc 1 276 5 is_stmt 1 view .LVU401 + 1384 0038 FFF7FEFF bl FLASH_PageErase + 1385 .LVL132: + 1386 .L95: + 280:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** + 1387 .loc 1 280 1 is_stmt 0 view .LVU402 + 1388 003c 2000 movs r0, r4 + 1389 @ sp needed + 1390 003e 10BD pop {r4, pc} + 1391 .LVL133: + 1392 .L99: + 260:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** FLASH_MassErase(); + 1393 .loc 1 260 5 is_stmt 1 view .LVU403 + 260:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** FLASH_MassErase(); + 1394 .loc 1 260 29 is_stmt 0 view .LVU404 + 1395 0040 044B ldr r3, .L100 + 1396 0042 0222 movs r2, #2 + 1397 0044 1A70 strb r2, [r3] + 261:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** } + 1398 .loc 1 261 9 is_stmt 1 view .LVU405 + 1399 0046 FFF7FEFF bl FLASH_MassErase + 1400 .LVL134: + 261:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** } + 1401 .loc 1 261 9 is_stmt 0 view .LVU406 + 1402 004a F7E7 b .L95 + 1403 .LVL135: + 1404 .L97: + 243:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** + 1405 .loc 1 243 3 discriminator 1 view .LVU407 + 1406 004c 0224 movs r4, #2 + 1407 004e F5E7 b .L95 + 1408 .L98: + 248:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** } + 1409 .loc 1 248 12 view .LVU408 + 1410 0050 0124 movs r4, #1 + 1411 0052 F3E7 b .L95 + 1412 .L101: + 1413 .align 2 + 1414 .L100: + 1415 0054 00000000 .word pFlash + 1416 0058 00200240 .word 1073881088 + 1417 .cfi_endproc + 1418 .LFE41: + 1420 .text + 1421 .Letext0: + 1422 .file 2 "/home/chiangni/.config/VSCodium/User/globalStorage/bmd.stm32-for-vscode/@xpack-dev-tools/ + 1423 .file 3 "/home/chiangni/.config/VSCodium/User/globalStorage/bmd.stm32-for-vscode/@xpack-dev-tools/ + 1424 .file 4 "Drivers/CMSIS/Device/ST/STM32F0xx/Include/stm32f042x6.h" + 1425 .file 5 "Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_def.h" + 1426 .file 6 "Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_flash.h" + ARM GAS /tmp/cc2085Zh.s page 49 + + + 1427 .file 7 "Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_flash_ex.h" + ARM GAS /tmp/cc2085Zh.s page 50 + + +DEFINED SYMBOLS + *ABS*:00000000 stm32f0xx_hal_flash_ex.c + /tmp/cc2085Zh.s:19 .text.FLASH_MassErase:00000000 $t + /tmp/cc2085Zh.s:24 .text.FLASH_MassErase:00000000 FLASH_MassErase + /tmp/cc2085Zh.s:53 .text.FLASH_MassErase:0000001c $d + /tmp/cc2085Zh.s:59 .text.FLASH_OB_GetWRP:00000000 $t + /tmp/cc2085Zh.s:64 .text.FLASH_OB_GetWRP:00000000 FLASH_OB_GetWRP + /tmp/cc2085Zh.s:81 .text.FLASH_OB_GetWRP:00000008 $d + /tmp/cc2085Zh.s:86 .text.FLASH_OB_GetRDP:00000000 $t + /tmp/cc2085Zh.s:91 .text.FLASH_OB_GetRDP:00000000 FLASH_OB_GetRDP + /tmp/cc2085Zh.s:134 .text.FLASH_OB_GetRDP:0000001c $d + /tmp/cc2085Zh.s:139 .text.FLASH_OB_GetUser:00000000 $t + /tmp/cc2085Zh.s:144 .text.FLASH_OB_GetUser:00000000 FLASH_OB_GetUser + /tmp/cc2085Zh.s:165 .text.FLASH_OB_GetUser:0000000c $d + /tmp/cc2085Zh.s:170 .text.FLASH_OB_RDP_LevelConfig:00000000 $t + /tmp/cc2085Zh.s:175 .text.FLASH_OB_RDP_LevelConfig:00000000 FLASH_OB_RDP_LevelConfig + /tmp/cc2085Zh.s:267 .text.FLASH_OB_RDP_LevelConfig:00000054 $d + /tmp/cc2085Zh.s:275 .text.FLASH_OB_UserConfig:00000000 $t + /tmp/cc2085Zh.s:280 .text.FLASH_OB_UserConfig:00000000 FLASH_OB_UserConfig + /tmp/cc2085Zh.s:355 .text.FLASH_OB_UserConfig:00000034 $d + /tmp/cc2085Zh.s:363 .text.FLASH_OB_ProgramData:00000000 $t + /tmp/cc2085Zh.s:368 .text.FLASH_OB_ProgramData:00000000 FLASH_OB_ProgramData + /tmp/cc2085Zh.s:440 .text.FLASH_OB_ProgramData:00000034 $d + /tmp/cc2085Zh.s:447 .text.HAL_FLASHEx_OBErase:00000000 $t + /tmp/cc2085Zh.s:453 .text.HAL_FLASHEx_OBErase:00000000 HAL_FLASHEx_OBErase + /tmp/cc2085Zh.s:537 .text.HAL_FLASHEx_OBErase:00000044 $d + /tmp/cc2085Zh.s:544 .text.FLASH_OB_EnableWRP:00000000 $t + /tmp/cc2085Zh.s:549 .text.FLASH_OB_EnableWRP:00000000 FLASH_OB_EnableWRP + /tmp/cc2085Zh.s:651 .text.FLASH_OB_EnableWRP:00000054 $d + /tmp/cc2085Zh.s:659 .text.FLASH_OB_DisableWRP:00000000 $t + /tmp/cc2085Zh.s:664 .text.FLASH_OB_DisableWRP:00000000 FLASH_OB_DisableWRP + /tmp/cc2085Zh.s:766 .text.FLASH_OB_DisableWRP:00000054 $d + /tmp/cc2085Zh.s:774 .text.HAL_FLASHEx_OBProgram:00000000 $t + /tmp/cc2085Zh.s:780 .text.HAL_FLASHEx_OBProgram:00000000 HAL_FLASHEx_OBProgram + /tmp/cc2085Zh.s:971 .text.HAL_FLASHEx_OBProgram:00000090 $d + /tmp/cc2085Zh.s:976 .text.HAL_FLASHEx_OBGetConfig:00000000 $t + /tmp/cc2085Zh.s:982 .text.HAL_FLASHEx_OBGetConfig:00000000 HAL_FLASHEx_OBGetConfig + /tmp/cc2085Zh.s:1026 .text.HAL_FLASHEx_OBGetUserData:00000000 $t + /tmp/cc2085Zh.s:1032 .text.HAL_FLASHEx_OBGetUserData:00000000 HAL_FLASHEx_OBGetUserData + /tmp/cc2085Zh.s:1078 .text.HAL_FLASHEx_OBGetUserData:0000001c $d + /tmp/cc2085Zh.s:1084 .text.FLASH_PageErase:00000000 $t + /tmp/cc2085Zh.s:1090 .text.FLASH_PageErase:00000000 FLASH_PageErase + /tmp/cc2085Zh.s:1122 .text.FLASH_PageErase:0000001c $d + /tmp/cc2085Zh.s:1128 .text.HAL_FLASHEx_Erase:00000000 $t + /tmp/cc2085Zh.s:1134 .text.HAL_FLASHEx_Erase:00000000 HAL_FLASHEx_Erase + /tmp/cc2085Zh.s:1306 .text.HAL_FLASHEx_Erase:00000094 $d + /tmp/cc2085Zh.s:1313 .text.HAL_FLASHEx_Erase_IT:00000000 $t + /tmp/cc2085Zh.s:1319 .text.HAL_FLASHEx_Erase_IT:00000000 HAL_FLASHEx_Erase_IT + /tmp/cc2085Zh.s:1415 .text.HAL_FLASHEx_Erase_IT:00000054 $d + +UNDEFINED SYMBOLS +pFlash +FLASH_WaitForLastOperation diff --git a/Software/build/stm32f0xx_hal_flash_ex.o b/Software/build/stm32f0xx_hal_flash_ex.o new file mode 100644 index 0000000..4ab794d Binary files /dev/null and b/Software/build/stm32f0xx_hal_flash_ex.o differ diff --git a/Software/build/stm32f0xx_hal_gpio.d b/Software/build/stm32f0xx_hal_gpio.d new file mode 100644 index 0000000..53034b4 --- /dev/null +++ b/Software/build/stm32f0xx_hal_gpio.d @@ -0,0 +1,60 @@ +build/stm32f0xx_hal_gpio.o: \ + Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_gpio.c \ + Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal.h \ + Core/Inc/stm32f0xx_hal_conf.h \ + Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_rcc.h \ + Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_def.h \ + Drivers/CMSIS/Device/ST/STM32F0xx/Include/stm32f0xx.h \ + Drivers/CMSIS/Device/ST/STM32F0xx/Include/stm32f042x6.h \ + Drivers/CMSIS/Include/core_cm0.h Drivers/CMSIS/Include/cmsis_version.h \ + Drivers/CMSIS/Include/cmsis_compiler.h Drivers/CMSIS/Include/cmsis_gcc.h \ + Drivers/CMSIS/Device/ST/STM32F0xx/Include/system_stm32f0xx.h \ + Drivers/STM32F0xx_HAL_Driver/Inc/Legacy/stm32_hal_legacy.h \ + Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_rcc_ex.h \ + Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_gpio.h \ + Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_gpio_ex.h \ + Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_exti.h \ + Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_dma.h \ + Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_dma_ex.h \ + Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_cortex.h \ + Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_adc.h \ + Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_adc_ex.h \ + Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_can.h \ + Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_flash.h \ + Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_flash_ex.h \ + Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_i2c.h \ + Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_i2c_ex.h \ + Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_pwr.h \ + Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_pwr_ex.h \ + Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_tim.h \ + Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_tim_ex.h +Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal.h: +Core/Inc/stm32f0xx_hal_conf.h: +Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_rcc.h: +Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_def.h: +Drivers/CMSIS/Device/ST/STM32F0xx/Include/stm32f0xx.h: +Drivers/CMSIS/Device/ST/STM32F0xx/Include/stm32f042x6.h: +Drivers/CMSIS/Include/core_cm0.h: +Drivers/CMSIS/Include/cmsis_version.h: +Drivers/CMSIS/Include/cmsis_compiler.h: +Drivers/CMSIS/Include/cmsis_gcc.h: +Drivers/CMSIS/Device/ST/STM32F0xx/Include/system_stm32f0xx.h: +Drivers/STM32F0xx_HAL_Driver/Inc/Legacy/stm32_hal_legacy.h: +Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_rcc_ex.h: +Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_gpio.h: +Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_gpio_ex.h: +Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_exti.h: +Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_dma.h: +Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_dma_ex.h: +Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_cortex.h: +Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_adc.h: +Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_adc_ex.h: +Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_can.h: +Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_flash.h: +Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_flash_ex.h: +Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_i2c.h: +Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_i2c_ex.h: +Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_pwr.h: +Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_pwr_ex.h: +Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_tim.h: +Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_tim_ex.h: diff --git a/Software/build/stm32f0xx_hal_gpio.lst b/Software/build/stm32f0xx_hal_gpio.lst new file mode 100644 index 0000000..7c5959b --- /dev/null +++ b/Software/build/stm32f0xx_hal_gpio.lst @@ -0,0 +1,1725 @@ +ARM GAS /tmp/ccJLBnnH.s page 1 + + + 1 .cpu cortex-m0 + 2 .arch armv6s-m + 3 .fpu softvfp + 4 .eabi_attribute 20, 1 + 5 .eabi_attribute 21, 1 + 6 .eabi_attribute 23, 3 + 7 .eabi_attribute 24, 1 + 8 .eabi_attribute 25, 1 + 9 .eabi_attribute 26, 1 + 10 .eabi_attribute 30, 1 + 11 .eabi_attribute 34, 0 + 12 .eabi_attribute 18, 4 + 13 .file "stm32f0xx_hal_gpio.c" + 14 .text + 15 .Ltext0: + 16 .cfi_sections .debug_frame + 17 .file 1 "Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_gpio.c" + 18 .section .text.HAL_GPIO_Init,"ax",%progbits + 19 .align 1 + 20 .global HAL_GPIO_Init + 21 .syntax unified + 22 .code 16 + 23 .thumb_func + 25 HAL_GPIO_Init: + 26 .LVL0: + 27 .LFB40: + 1:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_gpio.c **** /** + 2:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_gpio.c **** ****************************************************************************** + 3:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_gpio.c **** * @file stm32f0xx_hal_gpio.c + 4:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_gpio.c **** * @author MCD Application Team + 5:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_gpio.c **** * @brief GPIO HAL module driver. + 6:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_gpio.c **** * This file provides firmware functions to manage the following + 7:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_gpio.c **** * functionalities of the General Purpose Input/Output (GPIO) peripheral: + 8:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_gpio.c **** * + Initialization and de-initialization functions + 9:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_gpio.c **** * + IO operation functions + 10:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_gpio.c **** * + 11:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_gpio.c **** ****************************************************************************** + 12:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_gpio.c **** * @attention + 13:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_gpio.c **** * + 14:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_gpio.c **** * Copyright (c) 2016 STMicroelectronics. + 15:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_gpio.c **** * All rights reserved. + 16:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_gpio.c **** * + 17:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_gpio.c **** * This software is licensed under terms that can be found in the LICENSE file + 18:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_gpio.c **** * in the root directory of this software component. + 19:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_gpio.c **** * If no LICENSE file comes with this software, it is provided AS-IS. + 20:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_gpio.c **** * + 21:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_gpio.c **** ****************************************************************************** + 22:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_gpio.c **** @verbatim + 23:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_gpio.c **** ============================================================================== + 24:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_gpio.c **** ##### GPIO Peripheral features ##### + 25:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_gpio.c **** ============================================================================== + 26:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_gpio.c **** [..] + 27:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_gpio.c **** (+) Each port bit of the general-purpose I/O (GPIO) ports can be individually + 28:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_gpio.c **** configured by software in several modes: + 29:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_gpio.c **** (++) Input mode + 30:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_gpio.c **** (++) Analog mode + 31:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_gpio.c **** (++) Output mode + ARM GAS /tmp/ccJLBnnH.s page 2 + + + 32:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_gpio.c **** (++) Alternate function mode + 33:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_gpio.c **** (++) External interrupt/event lines + 34:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_gpio.c **** + 35:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_gpio.c **** (+) During and just after reset, the alternate functions and external interrupt + 36:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_gpio.c **** lines are not active and the I/O ports are configured in input floating mode. + 37:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_gpio.c **** + 38:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_gpio.c **** (+) All GPIO pins have weak internal pull-up and pull-down resistors, which can be + 39:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_gpio.c **** activated or not. + 40:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_gpio.c **** + 41:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_gpio.c **** (+) In Output or Alternate mode, each IO can be configured on open-drain or push-pull + 42:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_gpio.c **** type and the IO speed can be selected depending on the VDD value. + 43:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_gpio.c **** + 44:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_gpio.c **** (+) The microcontroller IO pins are connected to onboard peripherals/modules through a + 45:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_gpio.c **** multiplexer that allows only one peripheral alternate function (AF) connected + 46:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_gpio.c **** to an IO pin at a time. In this way, there can be no conflict between peripherals + 47:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_gpio.c **** sharing the same IO pin. + 48:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_gpio.c **** + 49:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_gpio.c **** (+) All ports have external interrupt/event capability. To use external interrupt + 50:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_gpio.c **** lines, the port must be configured in input mode. All available GPIO pins are + 51:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_gpio.c **** connected to the 16 external interrupt/event lines from EXTI0 to EXTI15. + 52:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_gpio.c **** + 53:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_gpio.c **** (+) The external interrupt/event controller consists of up to 28 edge detectors + 54:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_gpio.c **** (16 lines are connected to GPIO) for generating event/interrupt requests (each + 55:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_gpio.c **** input line can be independently configured to select the type (interrupt or event) + 56:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_gpio.c **** and the corresponding trigger event (rising or falling or both). Each line can + 57:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_gpio.c **** also be masked independently. + 58:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_gpio.c **** + 59:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_gpio.c **** ##### How to use this driver ##### + 60:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_gpio.c **** ============================================================================== + 61:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_gpio.c **** [..] + 62:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_gpio.c **** (#) Enable the GPIO AHB clock using the following function : __HAL_RCC_GPIOx_CLK_ENABLE(). + 63:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_gpio.c **** + 64:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_gpio.c **** (#) Configure the GPIO pin(s) using HAL_GPIO_Init(). + 65:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_gpio.c **** (++) Configure the IO mode using "Mode" member from GPIO_InitTypeDef structure + 66:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_gpio.c **** (++) Activate Pull-up, Pull-down resistor using "Pull" member from GPIO_InitTypeDef + 67:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_gpio.c **** structure. + 68:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_gpio.c **** (++) In case of Output or alternate function mode selection: the speed is + 69:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_gpio.c **** configured through "Speed" member from GPIO_InitTypeDef structure. + 70:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_gpio.c **** (++) In alternate mode is selection, the alternate function connected to the IO + 71:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_gpio.c **** is configured through "Alternate" member from GPIO_InitTypeDef structure. + 72:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_gpio.c **** (++) Analog mode is required when a pin is to be used as ADC channel + 73:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_gpio.c **** or DAC output. + 74:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_gpio.c **** (++) In case of external interrupt/event selection the "Mode" member from + 75:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_gpio.c **** GPIO_InitTypeDef structure select the type (interrupt or event) and + 76:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_gpio.c **** the corresponding trigger event (rising or falling or both). + 77:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_gpio.c **** + 78:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_gpio.c **** (#) In case of external interrupt/event mode selection, configure NVIC IRQ priority + 79:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_gpio.c **** mapped to the EXTI line using HAL_NVIC_SetPriority() and enable it using + 80:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_gpio.c **** HAL_NVIC_EnableIRQ(). + 81:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_gpio.c **** + 82:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_gpio.c **** (#) HAL_GPIO_DeInit allows to set register values to their reset value. It's also + 83:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_gpio.c **** recommended to use it to unconfigure pin which was used as an external interrupt + 84:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_gpio.c **** or in event mode. That's the only way to reset corresponding bit in EXTI & SYSCFG + 85:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_gpio.c **** registers. + 86:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_gpio.c **** + 87:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_gpio.c **** (#) To get the level of a pin configured in input mode use HAL_GPIO_ReadPin(). + 88:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_gpio.c **** + ARM GAS /tmp/ccJLBnnH.s page 3 + + + 89:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_gpio.c **** (#) To set/reset the level of a pin configured in output mode use + 90:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_gpio.c **** HAL_GPIO_WritePin()/HAL_GPIO_TogglePin(). + 91:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_gpio.c **** + 92:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_gpio.c **** (#) To lock pin configuration until next reset use HAL_GPIO_LockPin(). + 93:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_gpio.c **** + 94:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_gpio.c **** (#) During and just after reset, the alternate functions are not + 95:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_gpio.c **** active and the GPIO pins are configured in input floating mode (except JTAG + 96:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_gpio.c **** pins). + 97:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_gpio.c **** + 98:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_gpio.c **** (#) The LSE oscillator pins OSC32_IN and OSC32_OUT can be used as general purpose + 99:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_gpio.c **** (PC14 and PC15, respectively) when the LSE oscillator is off. The LSE has + 100:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_gpio.c **** priority over the GPIO function. + 101:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_gpio.c **** + 102:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_gpio.c **** (#) The HSE oscillator pins OSC_IN/OSC_OUT can be used as + 103:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_gpio.c **** general purpose PF0 and PF1, respectively, when the HSE oscillator is off. + 104:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_gpio.c **** The HSE has priority over the GPIO function. + 105:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_gpio.c **** + 106:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_gpio.c **** @endverbatim + 107:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_gpio.c **** ****************************************************************************** + 108:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_gpio.c **** */ + 109:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_gpio.c **** + 110:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_gpio.c **** /* Includes ------------------------------------------------------------------*/ + 111:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_gpio.c **** #include "stm32f0xx_hal.h" + 112:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_gpio.c **** + 113:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_gpio.c **** /** @addtogroup STM32F0xx_HAL_Driver + 114:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_gpio.c **** * @{ + 115:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_gpio.c **** */ + 116:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_gpio.c **** + 117:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_gpio.c **** /** @defgroup GPIO GPIO + 118:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_gpio.c **** * @brief GPIO HAL module driver + 119:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_gpio.c **** * @{ + 120:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_gpio.c **** */ + 121:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_gpio.c **** + 122:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_gpio.c **** /** MISRA C:2012 deviation rule has been granted for following rules: + 123:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_gpio.c **** * Rule-18.1_d - Medium: Array pointer `GPIOx' is accessed with index [..,..] + 124:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_gpio.c **** * which may be out of array bounds [..,UNKNOWN] in following APIs: + 125:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_gpio.c **** * HAL_GPIO_Init + 126:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_gpio.c **** * HAL_GPIO_DeInit + 127:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_gpio.c **** */ + 128:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_gpio.c **** + 129:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_gpio.c **** #ifdef HAL_GPIO_MODULE_ENABLED + 130:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_gpio.c **** + 131:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_gpio.c **** /* Private typedef -----------------------------------------------------------*/ + 132:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_gpio.c **** /* Private defines -----------------------------------------------------------*/ + 133:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_gpio.c **** /** @addtogroup GPIO_Private_Constants GPIO Private Constants + 134:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_gpio.c **** * @{ + 135:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_gpio.c **** */ + 136:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_gpio.c **** #define GPIO_NUMBER 16U + 137:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_gpio.c **** /** + 138:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_gpio.c **** * @} + 139:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_gpio.c **** */ + 140:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_gpio.c **** + 141:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_gpio.c **** /* Private macros ------------------------------------------------------------*/ + 142:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_gpio.c **** /* Private variables ---------------------------------------------------------*/ + 143:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_gpio.c **** /* Private function prototypes -----------------------------------------------*/ + 144:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_gpio.c **** /* Exported functions --------------------------------------------------------*/ + 145:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_gpio.c **** + ARM GAS /tmp/ccJLBnnH.s page 4 + + + 146:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_gpio.c **** /** @defgroup GPIO_Exported_Functions GPIO Exported Functions + 147:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_gpio.c **** * @{ + 148:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_gpio.c **** */ + 149:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_gpio.c **** + 150:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_gpio.c **** /** @defgroup GPIO_Exported_Functions_Group1 Initialization/de-initialization functions + 151:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_gpio.c **** * @brief Initialization and Configuration functions + 152:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_gpio.c **** * + 153:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_gpio.c **** @verbatim + 154:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_gpio.c **** =============================================================================== + 155:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_gpio.c **** ##### Initialization and de-initialization functions ##### + 156:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_gpio.c **** =============================================================================== + 157:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_gpio.c **** + 158:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_gpio.c **** @endverbatim + 159:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_gpio.c **** * @{ + 160:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_gpio.c **** */ + 161:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_gpio.c **** + 162:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_gpio.c **** /** + 163:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_gpio.c **** * @brief Initialize the GPIOx peripheral according to the specified parameters in the GPIO_Init. + 164:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_gpio.c **** * @param GPIOx where x can be (A..F) to select the GPIO peripheral for STM32F0 family + 165:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_gpio.c **** * @param GPIO_Init pointer to a GPIO_InitTypeDef structure that contains + 166:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_gpio.c **** * the configuration information for the specified GPIO peripheral. + 167:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_gpio.c **** * @retval None + 168:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_gpio.c **** */ + 169:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_gpio.c **** void HAL_GPIO_Init(GPIO_TypeDef *GPIOx, GPIO_InitTypeDef *GPIO_Init) + 170:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_gpio.c **** { + 28 .loc 1 170 1 view -0 + 29 .cfi_startproc + 30 @ args = 0, pretend = 0, frame = 8 + 31 @ frame_needed = 0, uses_anonymous_args = 0 + 32 .loc 1 170 1 is_stmt 0 view .LVU1 + 33 0000 F0B5 push {r4, r5, r6, r7, lr} + 34 .cfi_def_cfa_offset 20 + 35 .cfi_offset 4, -20 + 36 .cfi_offset 5, -16 + 37 .cfi_offset 6, -12 + 38 .cfi_offset 7, -8 + 39 .cfi_offset 14, -4 + 40 0002 83B0 sub sp, sp, #12 + 41 .cfi_def_cfa_offset 32 + 171:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_gpio.c **** uint32_t position = 0x00u; + 42 .loc 1 171 3 is_stmt 1 view .LVU2 + 43 .LVL1: + 172:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_gpio.c **** uint32_t iocurrent; + 44 .loc 1 172 3 view .LVU3 + 173:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_gpio.c **** uint32_t temp; + 45 .loc 1 173 3 view .LVU4 + 174:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_gpio.c **** + 175:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_gpio.c **** /* Check the parameters */ + 176:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_gpio.c **** assert_param(IS_GPIO_ALL_INSTANCE(GPIOx)); + 46 .loc 1 176 3 view .LVU5 + 177:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_gpio.c **** assert_param(IS_GPIO_PIN(GPIO_Init->Pin)); + 47 .loc 1 177 3 view .LVU6 + 178:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_gpio.c **** assert_param(IS_GPIO_MODE(GPIO_Init->Mode)); + 48 .loc 1 178 3 view .LVU7 + 179:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_gpio.c **** + 180:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_gpio.c **** /* Configure the port pins */ + 181:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_gpio.c **** while (((GPIO_Init->Pin) >> position) != 0x00u) + ARM GAS /tmp/ccJLBnnH.s page 5 + + + 49 .loc 1 181 3 view .LVU8 + 171:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_gpio.c **** uint32_t iocurrent; + 50 .loc 1 171 12 is_stmt 0 view .LVU9 + 51 0004 0023 movs r3, #0 + 52 .loc 1 181 9 view .LVU10 + 53 0006 56E0 b .L2 + 54 .LVL2: + 55 .L21: + 182:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_gpio.c **** { + 183:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_gpio.c **** /* Get current io position */ + 184:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_gpio.c **** iocurrent = (GPIO_Init->Pin) & (1uL << position); + 185:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_gpio.c **** + 186:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_gpio.c **** if (iocurrent != 0x00u) + 187:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_gpio.c **** { + 188:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_gpio.c **** /*--------------------- GPIO Mode Configuration ------------------------*/ + 189:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_gpio.c **** /* In case of Output or Alternate function mode selection */ + 190:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_gpio.c **** if(((GPIO_Init->Mode & GPIO_MODE) == MODE_OUTPUT) || + 191:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_gpio.c **** ((GPIO_Init->Mode & GPIO_MODE) == MODE_AF)) + 192:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_gpio.c **** { + 193:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_gpio.c **** /* Check the Speed parameter */ + 194:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_gpio.c **** assert_param(IS_GPIO_SPEED(GPIO_Init->Speed)); + 56 .loc 1 194 9 is_stmt 1 view .LVU11 + 195:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_gpio.c **** /* Configure the IO Speed */ + 196:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_gpio.c **** temp = GPIOx->OSPEEDR; + 57 .loc 1 196 9 view .LVU12 + 58 .loc 1 196 14 is_stmt 0 view .LVU13 + 59 0008 8668 ldr r6, [r0, #8] + 60 .LVL3: + 197:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_gpio.c **** temp &= ~(GPIO_OSPEEDER_OSPEEDR0 << (position * 2u)); + 61 .loc 1 197 9 is_stmt 1 view .LVU14 + 62 .loc 1 197 55 is_stmt 0 view .LVU15 + 63 000a 5F00 lsls r7, r3, #1 + 64 .loc 1 197 42 view .LVU16 + 65 000c 0324 movs r4, #3 + 66 000e BC40 lsls r4, r4, r7 + 67 .loc 1 197 14 view .LVU17 + 68 0010 A643 bics r6, r4 + 69 .LVL4: + 198:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_gpio.c **** temp |= (GPIO_Init->Speed << (position * 2u)); + 70 .loc 1 198 9 is_stmt 1 view .LVU18 + 71 .loc 1 198 27 is_stmt 0 view .LVU19 + 72 0012 CC68 ldr r4, [r1, #12] + 73 .loc 1 198 35 view .LVU20 + 74 0014 BC40 lsls r4, r4, r7 + 75 .loc 1 198 14 view .LVU21 + 76 0016 3443 orrs r4, r6 + 77 .LVL5: + 199:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_gpio.c **** GPIOx->OSPEEDR = temp; + 78 .loc 1 199 9 is_stmt 1 view .LVU22 + 79 .loc 1 199 24 is_stmt 0 view .LVU23 + 80 0018 8460 str r4, [r0, #8] + 200:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_gpio.c **** + 201:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_gpio.c **** /* Configure the IO Output Type */ + 202:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_gpio.c **** temp = GPIOx->OTYPER; + 81 .loc 1 202 9 is_stmt 1 view .LVU24 + 82 .loc 1 202 14 is_stmt 0 view .LVU25 + 83 001a 4468 ldr r4, [r0, #4] + ARM GAS /tmp/ccJLBnnH.s page 6 + + + 84 .LVL6: + 203:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_gpio.c **** temp &= ~(GPIO_OTYPER_OT_0 << position) ; + 85 .loc 1 203 9 is_stmt 1 view .LVU26 + 86 .loc 1 203 14 is_stmt 0 view .LVU27 + 87 001c 9443 bics r4, r2 + 88 .LVL7: + 204:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_gpio.c **** temp |= (((GPIO_Init->Mode & OUTPUT_TYPE) >> OUTPUT_TYPE_Pos) << position); + 89 .loc 1 204 9 is_stmt 1 view .LVU28 + 90 .loc 1 204 29 is_stmt 0 view .LVU29 + 91 001e 4E68 ldr r6, [r1, #4] + 92 .loc 1 204 51 view .LVU30 + 93 0020 3609 lsrs r6, r6, #4 + 94 0022 0122 movs r2, #1 + 95 0024 3240 ands r2, r6 + 96 .loc 1 204 71 view .LVU31 + 97 0026 9A40 lsls r2, r2, r3 + 98 .loc 1 204 14 view .LVU32 + 99 0028 2243 orrs r2, r4 + 100 .LVL8: + 205:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_gpio.c **** GPIOx->OTYPER = temp; + 101 .loc 1 205 9 is_stmt 1 view .LVU33 + 102 .loc 1 205 23 is_stmt 0 view .LVU34 + 103 002a 4260 str r2, [r0, #4] + 104 002c 53E0 b .L4 + 105 .LVL9: + 106 .L22: + 206:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_gpio.c **** } + 207:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_gpio.c **** + 208:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_gpio.c **** if((GPIO_Init->Mode & GPIO_MODE) != MODE_ANALOG) + 209:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_gpio.c **** { + 210:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_gpio.c **** /* Check the Pull parameter */ + 211:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_gpio.c **** assert_param(IS_GPIO_PULL(GPIO_Init->Pull)); + 212:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_gpio.c **** + 213:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_gpio.c **** /* Activate the Pull-up or Pull down resistor for the current IO */ + 214:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_gpio.c **** temp = GPIOx->PUPDR; + 215:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_gpio.c **** temp &= ~(GPIO_PUPDR_PUPDR0 << (position * 2u)); + 216:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_gpio.c **** temp |= ((GPIO_Init->Pull) << (position * 2u)); + 217:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_gpio.c **** GPIOx->PUPDR = temp; + 218:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_gpio.c **** } + 219:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_gpio.c **** + 220:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_gpio.c **** /* In case of Alternate function mode selection */ + 221:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_gpio.c **** if((GPIO_Init->Mode & GPIO_MODE) == MODE_AF) + 222:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_gpio.c **** { + 223:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_gpio.c **** /* Check the Alternate function parameters */ + 224:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_gpio.c **** assert_param(IS_GPIO_AF_INSTANCE(GPIOx)); + 107 .loc 1 224 9 is_stmt 1 view .LVU35 + 225:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_gpio.c **** assert_param(IS_GPIO_AF(GPIO_Init->Alternate)); + 108 .loc 1 225 9 view .LVU36 + 226:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_gpio.c **** + 227:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_gpio.c **** /* Configure Alternate function mapped with the current IO */ + 228:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_gpio.c **** temp = GPIOx->AFR[position >> 3u]; + 109 .loc 1 228 9 view .LVU37 + 110 .loc 1 228 36 is_stmt 0 view .LVU38 + 111 002e DE08 lsrs r6, r3, #3 + 112 .loc 1 228 14 view .LVU39 + 113 0030 0836 adds r6, r6, #8 + 114 0032 B600 lsls r6, r6, #2 + ARM GAS /tmp/ccJLBnnH.s page 7 + + + 115 0034 3758 ldr r7, [r6, r0] + 116 .LVL10: + 229:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_gpio.c **** temp &= ~(0xFu << ((position & 0x07u) * 4u)); + 117 .loc 1 229 9 is_stmt 1 view .LVU40 + 118 .loc 1 229 38 is_stmt 0 view .LVU41 + 119 0036 0532 adds r2, r2, #5 + 120 0038 1A40 ands r2, r3 + 121 .loc 1 229 47 view .LVU42 + 122 003a 9200 lsls r2, r2, #2 + 123 .loc 1 229 24 view .LVU43 + 124 003c 0F24 movs r4, #15 + 125 003e 9440 lsls r4, r4, r2 + 126 .loc 1 229 14 view .LVU44 + 127 0040 A743 bics r7, r4 + 128 .LVL11: + 230:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_gpio.c **** temp |= ((GPIO_Init->Alternate) << ((position & 0x07u) * 4u)); + 129 .loc 1 230 9 is_stmt 1 view .LVU45 + 130 .loc 1 230 28 is_stmt 0 view .LVU46 + 131 0042 0C69 ldr r4, [r1, #16] + 132 .loc 1 230 41 view .LVU47 + 133 0044 9440 lsls r4, r4, r2 + 134 0046 2200 movs r2, r4 + 135 .loc 1 230 14 view .LVU48 + 136 0048 3A43 orrs r2, r7 + 137 .LVL12: + 231:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_gpio.c **** GPIOx->AFR[position >> 3u] = temp; + 138 .loc 1 231 9 is_stmt 1 view .LVU49 + 139 .loc 1 231 36 is_stmt 0 view .LVU50 + 140 004a 3250 str r2, [r6, r0] + 141 004c 56E0 b .L6 + 142 .LVL13: + 143 .L23: + 232:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_gpio.c **** } + 233:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_gpio.c **** + 234:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_gpio.c **** /* Configure IO Direction mode (Input, Output, Alternate or Analog) */ + 235:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_gpio.c **** temp = GPIOx->MODER; + 236:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_gpio.c **** temp &= ~(GPIO_MODER_MODER0 << (position * 2u)); + 237:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_gpio.c **** temp |= ((GPIO_Init->Mode & GPIO_MODE) << (position * 2u)); + 238:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_gpio.c **** GPIOx->MODER = temp; + 239:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_gpio.c **** + 240:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_gpio.c **** /*--------------------- EXTI Mode Configuration ------------------------*/ + 241:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_gpio.c **** /* Configure the External Interrupt or event for the current IO */ + 242:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_gpio.c **** if((GPIO_Init->Mode & EXTI_MODE) != 0x00u) + 243:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_gpio.c **** { + 244:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_gpio.c **** /* Enable SYSCFG Clock */ + 245:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_gpio.c **** __HAL_RCC_SYSCFG_CLK_ENABLE(); + 246:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_gpio.c **** + 247:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_gpio.c **** temp = SYSCFG->EXTICR[position >> 2u]; + 248:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_gpio.c **** temp &= ~(0x0FuL << (4u * (position & 0x03u))); + 249:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_gpio.c **** temp |= (GPIO_GET_INDEX(GPIOx) << (4u * (position & 0x03u))); + 144 .loc 1 249 18 discriminator 5 view .LVU51 + 145 004e 0226 movs r6, #2 + 146 0050 00E0 b .L7 + 147 .L13: + 148 .loc 1 249 18 discriminator 2 view .LVU52 + 149 0052 0026 movs r6, #0 + 150 .L7: + ARM GAS /tmp/ccJLBnnH.s page 8 + + + 151 .loc 1 249 40 discriminator 12 view .LVU53 + 152 0054 A640 lsls r6, r6, r4 + 153 0056 3400 movs r4, r6 + 154 .loc 1 249 14 discriminator 12 view .LVU54 + 155 0058 3C43 orrs r4, r7 + 156 .LVL14: + 250:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_gpio.c **** SYSCFG->EXTICR[position >> 2u] = temp; + 157 .loc 1 250 9 is_stmt 1 view .LVU55 + 158 .loc 1 250 40 is_stmt 0 view .LVU56 + 159 005a 0232 adds r2, r2, #2 + 160 005c 9200 lsls r2, r2, #2 + 161 005e 424E ldr r6, .L24 + 162 0060 9451 str r4, [r2, r6] + 251:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_gpio.c **** + 252:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_gpio.c **** /* Clear Rising Falling edge configuration */ + 253:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_gpio.c **** temp = EXTI->RTSR; + 163 .loc 1 253 9 is_stmt 1 view .LVU57 + 164 .loc 1 253 14 is_stmt 0 view .LVU58 + 165 0062 424A ldr r2, .L24+4 + 166 0064 9768 ldr r7, [r2, #8] + 167 .LVL15: + 254:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_gpio.c **** temp &= ~(iocurrent); + 168 .loc 1 254 9 is_stmt 1 view .LVU59 + 169 .loc 1 254 17 is_stmt 0 view .LVU60 + 170 0066 EA43 mvns r2, r5 + 171 .loc 1 254 14 view .LVU61 + 172 0068 3E00 movs r6, r7 + 173 006a AE43 bics r6, r5 + 174 .LVL16: + 255:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_gpio.c **** if((GPIO_Init->Mode & TRIGGER_RISING) != 0x00u) + 175 .loc 1 255 9 is_stmt 1 view .LVU62 + 176 .loc 1 255 22 is_stmt 0 view .LVU63 + 177 006c 4C68 ldr r4, [r1, #4] + 178 .loc 1 255 11 view .LVU64 + 179 006e E402 lsls r4, r4, #11 + 180 0070 01D5 bpl .L8 + 256:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_gpio.c **** { + 257:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_gpio.c **** temp |= iocurrent; + 181 .loc 1 257 11 is_stmt 1 view .LVU65 + 182 .loc 1 257 16 is_stmt 0 view .LVU66 + 183 0072 3E00 movs r6, r7 + 184 .LVL17: + 185 .loc 1 257 16 view .LVU67 + 186 0074 2E43 orrs r6, r5 + 187 .LVL18: + 188 .L8: + 258:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_gpio.c **** } + 259:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_gpio.c **** EXTI->RTSR = temp; + 189 .loc 1 259 9 is_stmt 1 view .LVU68 + 190 .loc 1 259 20 is_stmt 0 view .LVU69 + 191 0076 3D4C ldr r4, .L24+4 + 192 0078 A660 str r6, [r4, #8] + 260:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_gpio.c **** + 261:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_gpio.c **** temp = EXTI->FTSR; + 193 .loc 1 261 9 is_stmt 1 view .LVU70 + 194 .loc 1 261 14 is_stmt 0 view .LVU71 + 195 007a E768 ldr r7, [r4, #12] + ARM GAS /tmp/ccJLBnnH.s page 9 + + + 196 .LVL19: + 262:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_gpio.c **** temp &= ~(iocurrent); + 197 .loc 1 262 9 is_stmt 1 view .LVU72 + 198 .loc 1 262 14 is_stmt 0 view .LVU73 + 199 007c 3E00 movs r6, r7 + 200 007e 1640 ands r6, r2 + 201 .LVL20: + 263:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_gpio.c **** if((GPIO_Init->Mode & TRIGGER_FALLING) != 0x00u) + 202 .loc 1 263 9 is_stmt 1 view .LVU74 + 203 .loc 1 263 22 is_stmt 0 view .LVU75 + 204 0080 4C68 ldr r4, [r1, #4] + 205 .loc 1 263 11 view .LVU76 + 206 0082 A402 lsls r4, r4, #10 + 207 0084 01D5 bpl .L9 + 264:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_gpio.c **** { + 265:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_gpio.c **** temp |= iocurrent; + 208 .loc 1 265 11 is_stmt 1 view .LVU77 + 209 .loc 1 265 16 is_stmt 0 view .LVU78 + 210 0086 3E00 movs r6, r7 + 211 .LVL21: + 212 .loc 1 265 16 view .LVU79 + 213 0088 2E43 orrs r6, r5 + 214 .LVL22: + 215 .L9: + 266:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_gpio.c **** } + 267:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_gpio.c **** EXTI->FTSR = temp; + 216 .loc 1 267 9 is_stmt 1 view .LVU80 + 217 .loc 1 267 20 is_stmt 0 view .LVU81 + 218 008a 384C ldr r4, .L24+4 + 219 008c E660 str r6, [r4, #12] + 268:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_gpio.c **** + 269:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_gpio.c **** /* Clear EXTI line configuration */ + 270:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_gpio.c **** temp = EXTI->EMR; + 220 .loc 1 270 9 is_stmt 1 view .LVU82 + 221 .loc 1 270 14 is_stmt 0 view .LVU83 + 222 008e 6768 ldr r7, [r4, #4] + 223 .LVL23: + 271:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_gpio.c **** temp &= ~(iocurrent); + 224 .loc 1 271 9 is_stmt 1 view .LVU84 + 225 .loc 1 271 14 is_stmt 0 view .LVU85 + 226 0090 3E00 movs r6, r7 + 227 0092 1640 ands r6, r2 + 228 .LVL24: + 272:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_gpio.c **** if((GPIO_Init->Mode & EXTI_EVT) != 0x00u) + 229 .loc 1 272 9 is_stmt 1 view .LVU86 + 230 .loc 1 272 22 is_stmt 0 view .LVU87 + 231 0094 4C68 ldr r4, [r1, #4] + 232 .loc 1 272 11 view .LVU88 + 233 0096 A403 lsls r4, r4, #14 + 234 0098 01D5 bpl .L10 + 273:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_gpio.c **** { + 274:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_gpio.c **** temp |= iocurrent; + 235 .loc 1 274 11 is_stmt 1 view .LVU89 + 236 .loc 1 274 16 is_stmt 0 view .LVU90 + 237 009a 3E00 movs r6, r7 + 238 .LVL25: + 239 .loc 1 274 16 view .LVU91 + ARM GAS /tmp/ccJLBnnH.s page 10 + + + 240 009c 2E43 orrs r6, r5 + 241 .LVL26: + 242 .L10: + 275:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_gpio.c **** } + 276:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_gpio.c **** EXTI->EMR = temp; + 243 .loc 1 276 9 is_stmt 1 view .LVU92 + 244 .loc 1 276 19 is_stmt 0 view .LVU93 + 245 009e 334C ldr r4, .L24+4 + 246 00a0 6660 str r6, [r4, #4] + 277:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_gpio.c **** + 278:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_gpio.c **** temp = EXTI->IMR; + 247 .loc 1 278 9 is_stmt 1 view .LVU94 + 248 .loc 1 278 14 is_stmt 0 view .LVU95 + 249 00a2 2668 ldr r6, [r4] + 250 .LVL27: + 279:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_gpio.c **** temp &= ~(iocurrent); + 251 .loc 1 279 9 is_stmt 1 view .LVU96 + 252 .loc 1 279 14 is_stmt 0 view .LVU97 + 253 00a4 3240 ands r2, r6 + 254 .LVL28: + 280:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_gpio.c **** if((GPIO_Init->Mode & EXTI_IT) != 0x00u) + 255 .loc 1 280 9 is_stmt 1 view .LVU98 + 256 .loc 1 280 22 is_stmt 0 view .LVU99 + 257 00a6 4C68 ldr r4, [r1, #4] + 258 .loc 1 280 11 view .LVU100 + 259 00a8 E403 lsls r4, r4, #15 + 260 00aa 01D5 bpl .L11 + 281:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_gpio.c **** { + 282:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_gpio.c **** temp |= iocurrent; + 261 .loc 1 282 11 is_stmt 1 view .LVU101 + 262 .loc 1 282 16 is_stmt 0 view .LVU102 + 263 00ac 2A00 movs r2, r5 + 264 .LVL29: + 265 .loc 1 282 16 view .LVU103 + 266 00ae 3243 orrs r2, r6 + 267 .LVL30: + 268 .L11: + 283:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_gpio.c **** } + 284:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_gpio.c **** EXTI->IMR = temp; + 269 .loc 1 284 9 is_stmt 1 view .LVU104 + 270 .loc 1 284 19 is_stmt 0 view .LVU105 + 271 00b0 2E4C ldr r4, .L24+4 + 272 00b2 2260 str r2, [r4] + 273 .LVL31: + 274 .L3: + 285:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_gpio.c **** } + 286:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_gpio.c **** } + 287:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_gpio.c **** + 288:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_gpio.c **** position++; + 275 .loc 1 288 5 is_stmt 1 view .LVU106 + 276 .loc 1 288 13 is_stmt 0 view .LVU107 + 277 00b4 0133 adds r3, r3, #1 + 278 .LVL32: + 279 .L2: + 181:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_gpio.c **** { + 280 .loc 1 181 41 is_stmt 1 view .LVU108 + 181:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_gpio.c **** { + ARM GAS /tmp/ccJLBnnH.s page 11 + + + 281 .loc 1 181 21 is_stmt 0 view .LVU109 + 282 00b6 0C68 ldr r4, [r1] + 181:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_gpio.c **** { + 283 .loc 1 181 28 view .LVU110 + 284 00b8 2200 movs r2, r4 + 285 00ba DA40 lsrs r2, r2, r3 + 181:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_gpio.c **** { + 286 .loc 1 181 41 view .LVU111 + 287 00bc 51D0 beq .L20 + 184:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_gpio.c **** + 288 .loc 1 184 5 is_stmt 1 view .LVU112 + 184:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_gpio.c **** + 289 .loc 1 184 41 is_stmt 0 view .LVU113 + 290 00be 0122 movs r2, #1 + 291 00c0 9A40 lsls r2, r2, r3 + 184:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_gpio.c **** + 292 .loc 1 184 15 view .LVU114 + 293 00c2 2500 movs r5, r4 + 294 00c4 1540 ands r5, r2 + 295 .LVL33: + 186:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_gpio.c **** { + 296 .loc 1 186 5 is_stmt 1 view .LVU115 + 186:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_gpio.c **** { + 297 .loc 1 186 8 is_stmt 0 view .LVU116 + 298 00c6 1442 tst r4, r2 + 299 00c8 F4D0 beq .L3 + 190:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_gpio.c **** ((GPIO_Init->Mode & GPIO_MODE) == MODE_AF)) + 300 .loc 1 190 7 is_stmt 1 view .LVU117 + 190:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_gpio.c **** ((GPIO_Init->Mode & GPIO_MODE) == MODE_AF)) + 301 .loc 1 190 21 is_stmt 0 view .LVU118 + 302 00ca 4E68 ldr r6, [r1, #4] + 190:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_gpio.c **** ((GPIO_Init->Mode & GPIO_MODE) == MODE_AF)) + 303 .loc 1 190 28 view .LVU119 + 304 00cc 0324 movs r4, #3 + 305 00ce 3440 ands r4, r6 + 190:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_gpio.c **** ((GPIO_Init->Mode & GPIO_MODE) == MODE_AF)) + 306 .loc 1 190 57 view .LVU120 + 307 00d0 013C subs r4, r4, #1 + 190:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_gpio.c **** ((GPIO_Init->Mode & GPIO_MODE) == MODE_AF)) + 308 .loc 1 190 9 view .LVU121 + 309 00d2 012C cmp r4, #1 + 310 00d4 98D9 bls .L21 + 311 .L4: + 208:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_gpio.c **** { + 312 .loc 1 208 7 is_stmt 1 view .LVU122 + 208:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_gpio.c **** { + 313 .loc 1 208 20 is_stmt 0 view .LVU123 + 314 00d6 4C68 ldr r4, [r1, #4] + 208:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_gpio.c **** { + 315 .loc 1 208 27 view .LVU124 + 316 00d8 0322 movs r2, #3 + 317 00da 2240 ands r2, r4 + 208:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_gpio.c **** { + 318 .loc 1 208 9 view .LVU125 + 319 00dc 032A cmp r2, #3 + 320 00de 08D0 beq .L5 + 211:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_gpio.c **** + ARM GAS /tmp/ccJLBnnH.s page 12 + + + 321 .loc 1 211 9 is_stmt 1 view .LVU126 + 214:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_gpio.c **** temp &= ~(GPIO_PUPDR_PUPDR0 << (position * 2u)); + 322 .loc 1 214 9 view .LVU127 + 214:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_gpio.c **** temp &= ~(GPIO_PUPDR_PUPDR0 << (position * 2u)); + 323 .loc 1 214 14 is_stmt 0 view .LVU128 + 324 00e0 C468 ldr r4, [r0, #12] + 325 .LVL34: + 215:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_gpio.c **** temp |= ((GPIO_Init->Pull) << (position * 2u)); + 326 .loc 1 215 9 is_stmt 1 view .LVU129 + 215:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_gpio.c **** temp |= ((GPIO_Init->Pull) << (position * 2u)); + 327 .loc 1 215 50 is_stmt 0 view .LVU130 + 328 00e2 5E00 lsls r6, r3, #1 + 215:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_gpio.c **** temp |= ((GPIO_Init->Pull) << (position * 2u)); + 329 .loc 1 215 37 view .LVU131 + 330 00e4 0322 movs r2, #3 + 331 00e6 B240 lsls r2, r2, r6 + 215:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_gpio.c **** temp |= ((GPIO_Init->Pull) << (position * 2u)); + 332 .loc 1 215 14 view .LVU132 + 333 00e8 9443 bics r4, r2 + 334 .LVL35: + 216:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_gpio.c **** GPIOx->PUPDR = temp; + 335 .loc 1 216 9 is_stmt 1 view .LVU133 + 216:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_gpio.c **** GPIOx->PUPDR = temp; + 336 .loc 1 216 28 is_stmt 0 view .LVU134 + 337 00ea 8A68 ldr r2, [r1, #8] + 216:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_gpio.c **** GPIOx->PUPDR = temp; + 338 .loc 1 216 36 view .LVU135 + 339 00ec B240 lsls r2, r2, r6 + 216:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_gpio.c **** GPIOx->PUPDR = temp; + 340 .loc 1 216 14 view .LVU136 + 341 00ee 2243 orrs r2, r4 + 342 .LVL36: + 217:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_gpio.c **** } + 343 .loc 1 217 9 is_stmt 1 view .LVU137 + 217:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_gpio.c **** } + 344 .loc 1 217 22 is_stmt 0 view .LVU138 + 345 00f0 C260 str r2, [r0, #12] + 346 .LVL37: + 347 .L5: + 221:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_gpio.c **** { + 348 .loc 1 221 7 is_stmt 1 view .LVU139 + 221:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_gpio.c **** { + 349 .loc 1 221 20 is_stmt 0 view .LVU140 + 350 00f2 4C68 ldr r4, [r1, #4] + 221:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_gpio.c **** { + 351 .loc 1 221 27 view .LVU141 + 352 00f4 0322 movs r2, #3 + 353 00f6 2240 ands r2, r4 + 221:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_gpio.c **** { + 354 .loc 1 221 9 view .LVU142 + 355 00f8 022A cmp r2, #2 + 356 00fa 98D0 beq .L22 + 357 .L6: + 235:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_gpio.c **** temp &= ~(GPIO_MODER_MODER0 << (position * 2u)); + 358 .loc 1 235 7 is_stmt 1 view .LVU143 + 235:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_gpio.c **** temp &= ~(GPIO_MODER_MODER0 << (position * 2u)); + 359 .loc 1 235 12 is_stmt 0 view .LVU144 + ARM GAS /tmp/ccJLBnnH.s page 13 + + + 360 00fc 0468 ldr r4, [r0] + 361 .LVL38: + 236:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_gpio.c **** temp |= ((GPIO_Init->Mode & GPIO_MODE) << (position * 2u)); + 362 .loc 1 236 7 is_stmt 1 view .LVU145 + 236:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_gpio.c **** temp |= ((GPIO_Init->Mode & GPIO_MODE) << (position * 2u)); + 363 .loc 1 236 48 is_stmt 0 view .LVU146 + 364 00fe 5E00 lsls r6, r3, #1 + 236:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_gpio.c **** temp |= ((GPIO_Init->Mode & GPIO_MODE) << (position * 2u)); + 365 .loc 1 236 35 view .LVU147 + 366 0100 0322 movs r2, #3 + 367 0102 1700 movs r7, r2 + 368 0104 B740 lsls r7, r7, r6 + 236:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_gpio.c **** temp |= ((GPIO_Init->Mode & GPIO_MODE) << (position * 2u)); + 369 .loc 1 236 12 view .LVU148 + 370 0106 BC43 bics r4, r7 + 371 .LVL39: + 237:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_gpio.c **** GPIOx->MODER = temp; + 372 .loc 1 237 7 is_stmt 1 view .LVU149 + 237:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_gpio.c **** GPIOx->MODER = temp; + 373 .loc 1 237 26 is_stmt 0 view .LVU150 + 374 0108 4F68 ldr r7, [r1, #4] + 237:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_gpio.c **** GPIOx->MODER = temp; + 375 .loc 1 237 33 view .LVU151 + 376 010a 3A40 ands r2, r7 + 237:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_gpio.c **** GPIOx->MODER = temp; + 377 .loc 1 237 46 view .LVU152 + 378 010c B240 lsls r2, r2, r6 + 237:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_gpio.c **** GPIOx->MODER = temp; + 379 .loc 1 237 12 view .LVU153 + 380 010e 2243 orrs r2, r4 + 381 .LVL40: + 238:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_gpio.c **** + 382 .loc 1 238 7 is_stmt 1 view .LVU154 + 238:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_gpio.c **** + 383 .loc 1 238 20 is_stmt 0 view .LVU155 + 384 0110 0260 str r2, [r0] + 242:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_gpio.c **** { + 385 .loc 1 242 7 is_stmt 1 view .LVU156 + 242:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_gpio.c **** { + 386 .loc 1 242 20 is_stmt 0 view .LVU157 + 387 0112 4C68 ldr r4, [r1, #4] + 242:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_gpio.c **** { + 388 .loc 1 242 27 view .LVU158 + 389 0114 C022 movs r2, #192 + 390 .LVL41: + 242:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_gpio.c **** { + 391 .loc 1 242 27 view .LVU159 + 392 0116 9202 lsls r2, r2, #10 + 242:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_gpio.c **** { + 393 .loc 1 242 9 view .LVU160 + 394 0118 1442 tst r4, r2 + 395 011a CBD0 beq .L3 + 245:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_gpio.c **** + 396 .loc 1 245 9 is_stmt 1 view .LVU161 + 397 .LBB2: + 245:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_gpio.c **** + 398 .loc 1 245 9 view .LVU162 + ARM GAS /tmp/ccJLBnnH.s page 14 + + + 245:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_gpio.c **** + 399 .loc 1 245 9 view .LVU163 + 400 011c 144C ldr r4, .L24+8 + 401 011e A669 ldr r6, [r4, #24] + 402 0120 0122 movs r2, #1 + 403 0122 1643 orrs r6, r2 + 404 0124 A661 str r6, [r4, #24] + 405 .LVL42: + 245:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_gpio.c **** + 406 .loc 1 245 9 view .LVU164 + 407 0126 A469 ldr r4, [r4, #24] + 408 0128 2240 ands r2, r4 + 409 012a 0192 str r2, [sp, #4] + 245:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_gpio.c **** + 410 .loc 1 245 9 view .LVU165 + 411 012c 019A ldr r2, [sp, #4] + 412 .LBE2: + 245:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_gpio.c **** + 413 .loc 1 245 9 view .LVU166 + 247:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_gpio.c **** temp &= ~(0x0FuL << (4u * (position & 0x03u))); + 414 .loc 1 247 9 view .LVU167 + 247:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_gpio.c **** temp &= ~(0x0FuL << (4u * (position & 0x03u))); + 415 .loc 1 247 40 is_stmt 0 view .LVU168 + 416 012e 9A08 lsrs r2, r3, #2 + 247:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_gpio.c **** temp &= ~(0x0FuL << (4u * (position & 0x03u))); + 417 .loc 1 247 14 view .LVU169 + 418 0130 941C adds r4, r2, #2 + 419 0132 A400 lsls r4, r4, #2 + 420 0134 0C4E ldr r6, .L24 + 421 0136 A759 ldr r7, [r4, r6] + 422 .LVL43: + 248:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_gpio.c **** temp |= (GPIO_GET_INDEX(GPIOx) << (4u * (position & 0x03u))); + 423 .loc 1 248 9 is_stmt 1 view .LVU170 + 248:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_gpio.c **** temp |= (GPIO_GET_INDEX(GPIOx) << (4u * (position & 0x03u))); + 424 .loc 1 248 45 is_stmt 0 view .LVU171 + 425 0138 0324 movs r4, #3 + 426 013a 1C40 ands r4, r3 + 248:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_gpio.c **** temp |= (GPIO_GET_INDEX(GPIOx) << (4u * (position & 0x03u))); + 427 .loc 1 248 33 view .LVU172 + 428 013c A400 lsls r4, r4, #2 + 248:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_gpio.c **** temp |= (GPIO_GET_INDEX(GPIOx) << (4u * (position & 0x03u))); + 429 .loc 1 248 26 view .LVU173 + 430 013e 0F26 movs r6, #15 + 431 0140 A640 lsls r6, r6, r4 + 248:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_gpio.c **** temp |= (GPIO_GET_INDEX(GPIOx) << (4u * (position & 0x03u))); + 432 .loc 1 248 14 view .LVU174 + 433 0142 B743 bics r7, r6 + 434 .LVL44: + 249:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_gpio.c **** SYSCFG->EXTICR[position >> 2u] = temp; + 435 .loc 1 249 9 is_stmt 1 view .LVU175 + 249:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_gpio.c **** SYSCFG->EXTICR[position >> 2u] = temp; + 436 .loc 1 249 18 is_stmt 0 view .LVU176 + 437 0144 9026 movs r6, #144 + 438 0146 F605 lsls r6, r6, #23 + 439 0148 B042 cmp r0, r6 + 440 014a 82D0 beq .L13 + 249:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_gpio.c **** SYSCFG->EXTICR[position >> 2u] = temp; + ARM GAS /tmp/ccJLBnnH.s page 15 + + + 441 .loc 1 249 18 discriminator 1 view .LVU177 + 442 014c 094E ldr r6, .L24+12 + 443 014e B042 cmp r0, r6 + 444 0150 05D0 beq .L14 + 249:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_gpio.c **** SYSCFG->EXTICR[position >> 2u] = temp; + 445 .loc 1 249 18 discriminator 3 view .LVU178 + 446 0152 094E ldr r6, .L24+16 + 447 0154 B042 cmp r0, r6 + 448 0156 00D1 bne .LCB389 + 449 0158 79E7 b .L23 @long jump + 450 .LCB389: + 249:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_gpio.c **** SYSCFG->EXTICR[position >> 2u] = temp; + 451 .loc 1 249 18 discriminator 6 view .LVU179 + 452 015a 0526 movs r6, #5 + 453 015c 7AE7 b .L7 + 454 .L14: + 249:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_gpio.c **** SYSCFG->EXTICR[position >> 2u] = temp; + 455 .loc 1 249 18 discriminator 4 view .LVU180 + 456 015e 0126 movs r6, #1 + 457 0160 78E7 b .L7 + 458 .LVL45: + 459 .L20: + 289:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_gpio.c **** } + 290:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_gpio.c **** } + 460 .loc 1 290 1 view .LVU181 + 461 0162 03B0 add sp, sp, #12 + 462 @ sp needed + 463 0164 F0BD pop {r4, r5, r6, r7, pc} + 464 .L25: + 465 0166 C046 .align 2 + 466 .L24: + 467 0168 00000140 .word 1073807360 + 468 016c 00040140 .word 1073808384 + 469 0170 00100240 .word 1073876992 + 470 0174 00040048 .word 1207960576 + 471 0178 00080048 .word 1207961600 + 472 .cfi_endproc + 473 .LFE40: + 475 .section .text.HAL_GPIO_DeInit,"ax",%progbits + 476 .align 1 + 477 .global HAL_GPIO_DeInit + 478 .syntax unified + 479 .code 16 + 480 .thumb_func + 482 HAL_GPIO_DeInit: + 483 .LVL46: + 484 .LFB41: + 291:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_gpio.c **** + 292:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_gpio.c **** /** + 293:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_gpio.c **** * @brief De-initialize the GPIOx peripheral registers to their default reset values. + 294:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_gpio.c **** * @param GPIOx where x can be (A..F) to select the GPIO peripheral for STM32F0 family + 295:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_gpio.c **** * @param GPIO_Pin specifies the port bit to be written. + 296:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_gpio.c **** * This parameter can be one of GPIO_PIN_x where x can be (0..15). + 297:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_gpio.c **** * @retval None + 298:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_gpio.c **** */ + 299:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_gpio.c **** void HAL_GPIO_DeInit(GPIO_TypeDef *GPIOx, uint32_t GPIO_Pin) + 300:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_gpio.c **** { + ARM GAS /tmp/ccJLBnnH.s page 16 + + + 485 .loc 1 300 1 is_stmt 1 view -0 + 486 .cfi_startproc + 487 @ args = 0, pretend = 0, frame = 0 + 488 @ frame_needed = 0, uses_anonymous_args = 0 + 489 .loc 1 300 1 is_stmt 0 view .LVU183 + 490 0000 F0B5 push {r4, r5, r6, r7, lr} + 491 .cfi_def_cfa_offset 20 + 492 .cfi_offset 4, -20 + 493 .cfi_offset 5, -16 + 494 .cfi_offset 6, -12 + 495 .cfi_offset 7, -8 + 496 .cfi_offset 14, -4 + 497 0002 CE46 mov lr, r9 + 498 0004 4746 mov r7, r8 + 499 0006 80B5 push {r7, lr} + 500 .cfi_def_cfa_offset 28 + 501 .cfi_offset 8, -28 + 502 .cfi_offset 9, -24 + 503 0008 8946 mov r9, r1 + 301:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_gpio.c **** uint32_t position = 0x00u; + 504 .loc 1 301 3 is_stmt 1 view .LVU184 + 505 .LVL47: + 302:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_gpio.c **** uint32_t iocurrent; + 506 .loc 1 302 3 view .LVU185 + 303:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_gpio.c **** uint32_t tmp; + 507 .loc 1 303 3 view .LVU186 + 304:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_gpio.c **** + 305:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_gpio.c **** /* Check the parameters */ + 306:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_gpio.c **** assert_param(IS_GPIO_ALL_INSTANCE(GPIOx)); + 508 .loc 1 306 3 view .LVU187 + 307:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_gpio.c **** assert_param(IS_GPIO_PIN(GPIO_Pin)); + 509 .loc 1 307 3 view .LVU188 + 308:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_gpio.c **** + 309:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_gpio.c **** /* Configure the port pins */ + 310:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_gpio.c **** while ((GPIO_Pin >> position) != 0x00u) + 510 .loc 1 310 3 view .LVU189 + 301:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_gpio.c **** uint32_t iocurrent; + 511 .loc 1 301 12 is_stmt 0 view .LVU190 + 512 000a 0023 movs r3, #0 + 513 .loc 1 310 9 view .LVU191 + 514 000c 23E0 b .L27 + 515 .LVL48: + 516 .L37: + 311:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_gpio.c **** { + 312:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_gpio.c **** /* Get current io position */ + 313:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_gpio.c **** iocurrent = (GPIO_Pin) & (1uL << position); + 314:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_gpio.c **** + 315:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_gpio.c **** if (iocurrent != 0x00u) + 316:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_gpio.c **** { + 317:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_gpio.c **** /*------------------------- EXTI Mode Configuration --------------------*/ + 318:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_gpio.c **** /* Clear the External Interrupt or Event for the current IO */ + 319:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_gpio.c **** + 320:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_gpio.c **** tmp = SYSCFG->EXTICR[position >> 2u]; + 321:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_gpio.c **** tmp &= (0x0FuL << (4u * (position & 0x03u))); + 322:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_gpio.c **** if (tmp == (GPIO_GET_INDEX(GPIOx) << (4u * (position & 0x03u)))) + 517 .loc 1 322 19 discriminator 5 view .LVU192 + 518 000e 0221 movs r1, #2 + ARM GAS /tmp/ccJLBnnH.s page 17 + + + 519 0010 8846 mov r8, r1 + 520 0012 01E0 b .L29 + 521 .L32: + 522 .loc 1 322 19 discriminator 2 view .LVU193 + 523 0014 0021 movs r1, #0 + 524 0016 8846 mov r8, r1 + 525 .L29: + 526 .loc 1 322 41 discriminator 12 view .LVU194 + 527 0018 4146 mov r1, r8 + 528 001a A140 lsls r1, r1, r4 + 529 .loc 1 322 10 discriminator 12 view .LVU195 + 530 001c A942 cmp r1, r5 + 531 001e 40D0 beq .L35 + 532 .LVL49: + 533 .L30: + 323:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_gpio.c **** { + 324:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_gpio.c **** /* Clear EXTI line configuration */ + 325:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_gpio.c **** EXTI->IMR &= ~((uint32_t)iocurrent); + 326:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_gpio.c **** EXTI->EMR &= ~((uint32_t)iocurrent); + 327:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_gpio.c **** + 328:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_gpio.c **** /* Clear Rising Falling edge configuration */ + 329:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_gpio.c **** EXTI->FTSR &= ~((uint32_t)iocurrent); + 330:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_gpio.c **** EXTI->RTSR &= ~((uint32_t)iocurrent); + 331:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_gpio.c **** + 332:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_gpio.c **** /* Configure the External Interrupt or event for the current IO */ + 333:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_gpio.c **** tmp = 0x0FuL << (4u * (position & 0x03u)); + 334:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_gpio.c **** SYSCFG->EXTICR[position >> 2u] &= ~tmp; + 335:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_gpio.c **** } + 336:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_gpio.c **** + 337:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_gpio.c **** /*------------------------- GPIO Mode Configuration --------------------*/ + 338:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_gpio.c **** /* Configure IO Direction in Input Floating Mode */ + 339:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_gpio.c **** GPIOx->MODER &= ~(GPIO_MODER_MODER0 << (position * 2u)); + 534 .loc 1 339 7 is_stmt 1 view .LVU196 + 535 .loc 1 339 12 is_stmt 0 view .LVU197 + 536 0020 0468 ldr r4, [r0] + 537 .loc 1 339 56 view .LVU198 + 538 0022 5E00 lsls r6, r3, #1 + 539 .loc 1 339 43 view .LVU199 + 540 0024 0325 movs r5, #3 + 541 0026 B540 lsls r5, r5, r6 + 542 .loc 1 339 20 view .LVU200 + 543 0028 AC43 bics r4, r5 + 544 002a 0460 str r4, [r0] + 340:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_gpio.c **** + 341:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_gpio.c **** /* Configure the default Alternate Function in current IO */ + 342:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_gpio.c **** GPIOx->AFR[position >> 3u] &= ~(0xFu << ((uint32_t)(position & 0x07u) * 4u)) ; + 545 .loc 1 342 7 is_stmt 1 view .LVU201 + 546 .loc 1 342 17 is_stmt 0 view .LVU202 + 547 002c DC08 lsrs r4, r3, #3 + 548 002e 0834 adds r4, r4, #8 + 549 0030 A400 lsls r4, r4, #2 + 550 0032 2758 ldr r7, [r4, r0] + 551 .loc 1 342 48 view .LVU203 + 552 0034 0726 movs r6, #7 + 553 0036 1E40 ands r6, r3 + 554 .loc 1 342 77 view .LVU204 + 555 0038 B600 lsls r6, r6, #2 + ARM GAS /tmp/ccJLBnnH.s page 18 + + + 556 .loc 1 342 44 view .LVU205 + 557 003a 0F21 movs r1, #15 + 558 003c B140 lsls r1, r1, r6 + 559 .loc 1 342 34 view .LVU206 + 560 003e 8F43 bics r7, r1 + 561 0040 2750 str r7, [r4, r0] + 343:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_gpio.c **** + 344:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_gpio.c **** /* Deactivate the Pull-up and Pull-down resistor for the current IO */ + 345:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_gpio.c **** GPIOx->PUPDR &= ~(GPIO_PUPDR_PUPDR0 << (position * 2u)); + 562 .loc 1 345 7 is_stmt 1 view .LVU207 + 563 .loc 1 345 12 is_stmt 0 view .LVU208 + 564 0042 C468 ldr r4, [r0, #12] + 565 .loc 1 345 20 view .LVU209 + 566 0044 AC43 bics r4, r5 + 567 0046 C460 str r4, [r0, #12] + 346:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_gpio.c **** + 347:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_gpio.c **** /* Configure the default value IO Output Type */ + 348:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_gpio.c **** GPIOx->OTYPER &= ~(GPIO_OTYPER_OT_0 << position) ; + 568 .loc 1 348 7 is_stmt 1 view .LVU210 + 569 .loc 1 348 12 is_stmt 0 view .LVU211 + 570 0048 4468 ldr r4, [r0, #4] + 571 .loc 1 348 22 view .LVU212 + 572 004a 9443 bics r4, r2 + 573 004c 4460 str r4, [r0, #4] + 349:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_gpio.c **** + 350:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_gpio.c **** /* Configure the default value for IO Speed */ + 351:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_gpio.c **** GPIOx->OSPEEDR &= ~(GPIO_OSPEEDER_OSPEEDR0 << (position * 2u)); + 574 .loc 1 351 7 is_stmt 1 view .LVU213 + 575 .loc 1 351 12 is_stmt 0 view .LVU214 + 576 004e 8268 ldr r2, [r0, #8] + 577 .loc 1 351 22 view .LVU215 + 578 0050 AA43 bics r2, r5 + 579 0052 8260 str r2, [r0, #8] + 580 .L28: + 352:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_gpio.c **** + 353:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_gpio.c **** } + 354:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_gpio.c **** + 355:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_gpio.c **** position++; + 581 .loc 1 355 5 is_stmt 1 view .LVU216 + 582 .loc 1 355 13 is_stmt 0 view .LVU217 + 583 0054 0133 adds r3, r3, #1 + 584 .LVL50: + 585 .L27: + 310:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_gpio.c **** { + 586 .loc 1 310 33 is_stmt 1 view .LVU218 + 310:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_gpio.c **** { + 587 .loc 1 310 20 is_stmt 0 view .LVU219 + 588 0056 4A46 mov r2, r9 + 589 0058 DA40 lsrs r2, r2, r3 + 310:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_gpio.c **** { + 590 .loc 1 310 33 view .LVU220 + 591 005a 37D0 beq .L36 + 313:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_gpio.c **** + 592 .loc 1 313 5 is_stmt 1 view .LVU221 + 313:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_gpio.c **** + 593 .loc 1 313 35 is_stmt 0 view .LVU222 + 594 005c 0122 movs r2, #1 + ARM GAS /tmp/ccJLBnnH.s page 19 + + + 595 005e 9A40 lsls r2, r2, r3 + 313:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_gpio.c **** + 596 .loc 1 313 15 view .LVU223 + 597 0060 4C46 mov r4, r9 + 598 0062 1440 ands r4, r2 + 599 0064 A446 mov ip, r4 + 600 .LVL51: + 315:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_gpio.c **** { + 601 .loc 1 315 5 is_stmt 1 view .LVU224 + 315:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_gpio.c **** { + 602 .loc 1 315 8 is_stmt 0 view .LVU225 + 603 0066 4946 mov r1, r9 + 604 0068 1142 tst r1, r2 + 605 006a F3D0 beq .L28 + 606 .LVL52: + 320:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_gpio.c **** tmp &= (0x0FuL << (4u * (position & 0x03u))); + 607 .loc 1 320 7 is_stmt 1 view .LVU226 + 320:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_gpio.c **** tmp &= (0x0FuL << (4u * (position & 0x03u))); + 608 .loc 1 320 37 is_stmt 0 view .LVU227 + 609 006c 9F08 lsrs r7, r3, #2 + 320:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_gpio.c **** tmp &= (0x0FuL << (4u * (position & 0x03u))); + 610 .loc 1 320 11 view .LVU228 + 611 006e BC1C adds r4, r7, #2 + 612 .LVL53: + 320:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_gpio.c **** tmp &= (0x0FuL << (4u * (position & 0x03u))); + 613 .loc 1 320 11 view .LVU229 + 614 0070 A400 lsls r4, r4, #2 + 615 0072 184D ldr r5, .L38 + 616 0074 6559 ldr r5, [r4, r5] + 617 .LVL54: + 321:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_gpio.c **** if (tmp == (GPIO_GET_INDEX(GPIOx) << (4u * (position & 0x03u)))) + 618 .loc 1 321 7 is_stmt 1 view .LVU230 + 321:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_gpio.c **** if (tmp == (GPIO_GET_INDEX(GPIOx) << (4u * (position & 0x03u)))) + 619 .loc 1 321 41 is_stmt 0 view .LVU231 + 620 0076 0326 movs r6, #3 + 621 0078 1E40 ands r6, r3 + 321:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_gpio.c **** if (tmp == (GPIO_GET_INDEX(GPIOx) << (4u * (position & 0x03u)))) + 622 .loc 1 321 29 view .LVU232 + 623 007a B400 lsls r4, r6, #2 + 321:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_gpio.c **** if (tmp == (GPIO_GET_INDEX(GPIOx) << (4u * (position & 0x03u)))) + 624 .loc 1 321 22 view .LVU233 + 625 007c 0F26 movs r6, #15 + 626 007e A640 lsls r6, r6, r4 + 321:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_gpio.c **** if (tmp == (GPIO_GET_INDEX(GPIOx) << (4u * (position & 0x03u)))) + 627 .loc 1 321 11 view .LVU234 + 628 0080 3540 ands r5, r6 + 629 .LVL55: + 322:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_gpio.c **** { + 630 .loc 1 322 7 is_stmt 1 view .LVU235 + 322:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_gpio.c **** { + 631 .loc 1 322 19 is_stmt 0 view .LVU236 + 632 0082 9021 movs r1, #144 + 633 .LVL56: + 322:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_gpio.c **** { + 634 .loc 1 322 19 view .LVU237 + 635 0084 C905 lsls r1, r1, #23 + 636 0086 8842 cmp r0, r1 + ARM GAS /tmp/ccJLBnnH.s page 20 + + + 637 0088 C4D0 beq .L32 + 322:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_gpio.c **** { + 638 .loc 1 322 19 discriminator 1 view .LVU238 + 639 008a 1349 ldr r1, .L38+4 + 640 008c 8842 cmp r0, r1 + 641 008e 05D0 beq .L33 + 322:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_gpio.c **** { + 642 .loc 1 322 19 discriminator 3 view .LVU239 + 643 0090 1249 ldr r1, .L38+8 + 644 0092 8842 cmp r0, r1 + 645 0094 BBD0 beq .L37 + 322:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_gpio.c **** { + 646 .loc 1 322 19 discriminator 6 view .LVU240 + 647 0096 0521 movs r1, #5 + 648 0098 8846 mov r8, r1 + 649 009a BDE7 b .L29 + 650 .L33: + 322:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_gpio.c **** { + 651 .loc 1 322 19 discriminator 4 view .LVU241 + 652 009c 0121 movs r1, #1 + 653 009e 8846 mov r8, r1 + 654 00a0 BAE7 b .L29 + 655 .L35: + 325:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_gpio.c **** EXTI->EMR &= ~((uint32_t)iocurrent); + 656 .loc 1 325 9 is_stmt 1 view .LVU242 + 325:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_gpio.c **** EXTI->EMR &= ~((uint32_t)iocurrent); + 657 .loc 1 325 13 is_stmt 0 view .LVU243 + 658 00a2 0F4C ldr r4, .L38+12 + 659 00a4 2568 ldr r5, [r4] + 660 .LVL57: + 325:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_gpio.c **** EXTI->EMR &= ~((uint32_t)iocurrent); + 661 .loc 1 325 19 view .LVU244 + 662 00a6 6146 mov r1, ip + 663 00a8 8D43 bics r5, r1 + 664 00aa 2560 str r5, [r4] + 326:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_gpio.c **** + 665 .loc 1 326 9 is_stmt 1 view .LVU245 + 326:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_gpio.c **** + 666 .loc 1 326 13 is_stmt 0 view .LVU246 + 667 00ac 6568 ldr r5, [r4, #4] + 326:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_gpio.c **** + 668 .loc 1 326 19 view .LVU247 + 669 00ae 8D43 bics r5, r1 + 670 00b0 6560 str r5, [r4, #4] + 329:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_gpio.c **** EXTI->RTSR &= ~((uint32_t)iocurrent); + 671 .loc 1 329 9 is_stmt 1 view .LVU248 + 329:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_gpio.c **** EXTI->RTSR &= ~((uint32_t)iocurrent); + 672 .loc 1 329 13 is_stmt 0 view .LVU249 + 673 00b2 E568 ldr r5, [r4, #12] + 329:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_gpio.c **** EXTI->RTSR &= ~((uint32_t)iocurrent); + 674 .loc 1 329 20 view .LVU250 + 675 00b4 8D43 bics r5, r1 + 676 00b6 E560 str r5, [r4, #12] + 330:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_gpio.c **** + 677 .loc 1 330 9 is_stmt 1 view .LVU251 + 330:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_gpio.c **** + 678 .loc 1 330 13 is_stmt 0 view .LVU252 + ARM GAS /tmp/ccJLBnnH.s page 21 + + + 679 00b8 A568 ldr r5, [r4, #8] + 330:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_gpio.c **** + 680 .loc 1 330 20 view .LVU253 + 681 00ba 8D43 bics r5, r1 + 682 00bc A560 str r5, [r4, #8] + 333:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_gpio.c **** SYSCFG->EXTICR[position >> 2u] &= ~tmp; + 683 .loc 1 333 9 is_stmt 1 view .LVU254 + 684 .LVL58: + 334:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_gpio.c **** } + 685 .loc 1 334 9 view .LVU255 + 334:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_gpio.c **** } + 686 .loc 1 334 23 is_stmt 0 view .LVU256 + 687 00be 0549 ldr r1, .L38 + 688 00c0 0237 adds r7, r7, #2 + 689 00c2 BC00 lsls r4, r7, #2 + 690 00c4 6558 ldr r5, [r4, r1] + 334:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_gpio.c **** } + 691 .loc 1 334 40 view .LVU257 + 692 00c6 B543 bics r5, r6 + 693 00c8 6550 str r5, [r4, r1] + 694 00ca A9E7 b .L30 + 695 .LVL59: + 696 .L36: + 356:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_gpio.c **** } + 357:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_gpio.c **** } + 697 .loc 1 357 1 view .LVU258 + 698 @ sp needed + 699 .LVL60: + 700 .loc 1 357 1 view .LVU259 + 701 00cc C0BC pop {r6, r7} + 702 00ce B946 mov r9, r7 + 703 00d0 B046 mov r8, r6 + 704 00d2 F0BD pop {r4, r5, r6, r7, pc} + 705 .L39: + 706 .align 2 + 707 .L38: + 708 00d4 00000140 .word 1073807360 + 709 00d8 00040048 .word 1207960576 + 710 00dc 00080048 .word 1207961600 + 711 00e0 00040140 .word 1073808384 + 712 .cfi_endproc + 713 .LFE41: + 715 .section .text.HAL_GPIO_ReadPin,"ax",%progbits + 716 .align 1 + 717 .global HAL_GPIO_ReadPin + 718 .syntax unified + 719 .code 16 + 720 .thumb_func + 722 HAL_GPIO_ReadPin: + 723 .LVL61: + 724 .LFB42: + 358:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_gpio.c **** + 359:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_gpio.c **** /** + 360:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_gpio.c **** * @} + 361:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_gpio.c **** */ + 362:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_gpio.c **** + 363:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_gpio.c **** /** @defgroup GPIO_Exported_Functions_Group2 IO operation functions + ARM GAS /tmp/ccJLBnnH.s page 22 + + + 364:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_gpio.c **** * @brief GPIO Read, Write, Toggle, Lock and EXTI management functions. + 365:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_gpio.c **** * + 366:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_gpio.c **** @verbatim + 367:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_gpio.c **** =============================================================================== + 368:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_gpio.c **** ##### IO operation functions ##### + 369:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_gpio.c **** =============================================================================== + 370:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_gpio.c **** + 371:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_gpio.c **** @endverbatim + 372:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_gpio.c **** * @{ + 373:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_gpio.c **** */ + 374:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_gpio.c **** + 375:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_gpio.c **** /** + 376:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_gpio.c **** * @brief Read the specified input port pin. + 377:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_gpio.c **** * @param GPIOx where x can be (A..F) to select the GPIO peripheral for STM32F0 family + 378:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_gpio.c **** * @param GPIO_Pin specifies the port bit to read. + 379:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_gpio.c **** * This parameter can be GPIO_PIN_x where x can be (0..15). + 380:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_gpio.c **** * @retval The input port pin value. + 381:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_gpio.c **** */ + 382:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_gpio.c **** GPIO_PinState HAL_GPIO_ReadPin(GPIO_TypeDef* GPIOx, uint16_t GPIO_Pin) + 383:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_gpio.c **** { + 725 .loc 1 383 1 is_stmt 1 view -0 + 726 .cfi_startproc + 727 @ args = 0, pretend = 0, frame = 0 + 728 @ frame_needed = 0, uses_anonymous_args = 0 + 729 @ link register save eliminated. + 384:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_gpio.c **** GPIO_PinState bitstatus; + 730 .loc 1 384 3 view .LVU261 + 385:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_gpio.c **** + 386:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_gpio.c **** /* Check the parameters */ + 387:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_gpio.c **** assert_param(IS_GPIO_PIN(GPIO_Pin)); + 731 .loc 1 387 3 view .LVU262 + 388:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_gpio.c **** + 389:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_gpio.c **** if ((GPIOx->IDR & GPIO_Pin) != (uint32_t)GPIO_PIN_RESET) + 732 .loc 1 389 3 view .LVU263 + 733 .loc 1 389 13 is_stmt 0 view .LVU264 + 734 0000 0369 ldr r3, [r0, #16] + 735 .loc 1 389 6 view .LVU265 + 736 0002 0B42 tst r3, r1 + 737 0004 01D0 beq .L42 + 390:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_gpio.c **** { + 391:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_gpio.c **** bitstatus = GPIO_PIN_SET; + 738 .loc 1 391 15 view .LVU266 + 739 0006 0120 movs r0, #1 + 740 .LVL62: + 741 .L41: + 392:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_gpio.c **** } + 393:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_gpio.c **** else + 394:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_gpio.c **** { + 395:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_gpio.c **** bitstatus = GPIO_PIN_RESET; + 396:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_gpio.c **** } + 397:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_gpio.c **** return bitstatus; + 742 .loc 1 397 3 is_stmt 1 view .LVU267 + 398:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_gpio.c **** } + 743 .loc 1 398 3 is_stmt 0 view .LVU268 + 744 @ sp needed + 745 0008 7047 bx lr + 746 .LVL63: + ARM GAS /tmp/ccJLBnnH.s page 23 + + + 747 .L42: + 395:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_gpio.c **** } + 748 .loc 1 395 15 view .LVU269 + 749 000a 0020 movs r0, #0 + 750 .LVL64: + 395:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_gpio.c **** } + 751 .loc 1 395 15 view .LVU270 + 752 000c FCE7 b .L41 + 753 .cfi_endproc + 754 .LFE42: + 756 .section .text.HAL_GPIO_WritePin,"ax",%progbits + 757 .align 1 + 758 .global HAL_GPIO_WritePin + 759 .syntax unified + 760 .code 16 + 761 .thumb_func + 763 HAL_GPIO_WritePin: + 764 .LVL65: + 765 .LFB43: + 399:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_gpio.c **** + 400:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_gpio.c **** /** + 401:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_gpio.c **** * @brief Set or clear the selected data port bit. + 402:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_gpio.c **** * @note This function uses GPIOx_BSRR and GPIOx_BRR registers to allow atomic read/modify + 403:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_gpio.c **** * accesses. In this way, there is no risk of an IRQ occurring between + 404:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_gpio.c **** * the read and the modify access. + 405:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_gpio.c **** * + 406:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_gpio.c **** * @param GPIOx where x can be (A..H) to select the GPIO peripheral for STM32F0 family + 407:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_gpio.c **** * @param GPIO_Pin specifies the port bit to be written. + 408:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_gpio.c **** * This parameter can be one of GPIO_PIN_x where x can be (0..15). + 409:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_gpio.c **** * @param PinState specifies the value to be written to the selected bit. + 410:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_gpio.c **** * This parameter can be one of the GPIO_PinState enum values: + 411:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_gpio.c **** * @arg GPIO_PIN_RESET: to clear the port pin + 412:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_gpio.c **** * @arg GPIO_PIN_SET: to set the port pin + 413:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_gpio.c **** * @retval None + 414:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_gpio.c **** */ + 415:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_gpio.c **** void HAL_GPIO_WritePin(GPIO_TypeDef* GPIOx, uint16_t GPIO_Pin, GPIO_PinState PinState) + 416:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_gpio.c **** { + 766 .loc 1 416 1 is_stmt 1 view -0 + 767 .cfi_startproc + 768 @ args = 0, pretend = 0, frame = 0 + 769 @ frame_needed = 0, uses_anonymous_args = 0 + 770 @ link register save eliminated. + 417:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_gpio.c **** /* Check the parameters */ + 418:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_gpio.c **** assert_param(IS_GPIO_PIN(GPIO_Pin)); + 771 .loc 1 418 3 view .LVU272 + 419:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_gpio.c **** assert_param(IS_GPIO_PIN_ACTION(PinState)); + 772 .loc 1 419 3 view .LVU273 + 420:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_gpio.c **** + 421:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_gpio.c **** if (PinState != GPIO_PIN_RESET) + 773 .loc 1 421 3 view .LVU274 + 774 .loc 1 421 6 is_stmt 0 view .LVU275 + 775 0000 002A cmp r2, #0 + 776 0002 01D0 beq .L44 + 422:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_gpio.c **** { + 423:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_gpio.c **** GPIOx->BSRR = (uint32_t)GPIO_Pin; + 777 .loc 1 423 5 is_stmt 1 view .LVU276 + 778 .loc 1 423 17 is_stmt 0 view .LVU277 + ARM GAS /tmp/ccJLBnnH.s page 24 + + + 779 0004 8161 str r1, [r0, #24] + 780 .L43: + 424:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_gpio.c **** } + 425:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_gpio.c **** else + 426:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_gpio.c **** { + 427:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_gpio.c **** GPIOx->BRR = (uint32_t)GPIO_Pin; + 428:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_gpio.c **** } + 429:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_gpio.c **** } + 781 .loc 1 429 1 view .LVU278 + 782 @ sp needed + 783 0006 7047 bx lr + 784 .L44: + 427:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_gpio.c **** } + 785 .loc 1 427 5 is_stmt 1 view .LVU279 + 427:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_gpio.c **** } + 786 .loc 1 427 16 is_stmt 0 view .LVU280 + 787 0008 8162 str r1, [r0, #40] + 788 .loc 1 429 1 view .LVU281 + 789 000a FCE7 b .L43 + 790 .cfi_endproc + 791 .LFE43: + 793 .section .text.HAL_GPIO_TogglePin,"ax",%progbits + 794 .align 1 + 795 .global HAL_GPIO_TogglePin + 796 .syntax unified + 797 .code 16 + 798 .thumb_func + 800 HAL_GPIO_TogglePin: + 801 .LVL66: + 802 .LFB44: + 430:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_gpio.c **** + 431:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_gpio.c **** /** + 432:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_gpio.c **** * @brief Toggle the specified GPIO pin. + 433:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_gpio.c **** * @param GPIOx where x can be (A..F) to select the GPIO peripheral for STM32F0 family + 434:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_gpio.c **** * @param GPIO_Pin specifies the pin to be toggled. + 435:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_gpio.c **** * @retval None + 436:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_gpio.c **** */ + 437:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_gpio.c **** void HAL_GPIO_TogglePin(GPIO_TypeDef* GPIOx, uint16_t GPIO_Pin) + 438:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_gpio.c **** { + 803 .loc 1 438 1 is_stmt 1 view -0 + 804 .cfi_startproc + 805 @ args = 0, pretend = 0, frame = 0 + 806 @ frame_needed = 0, uses_anonymous_args = 0 + 807 @ link register save eliminated. + 439:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_gpio.c **** uint32_t odr; + 808 .loc 1 439 3 view .LVU283 + 440:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_gpio.c **** + 441:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_gpio.c **** /* Check the parameters */ + 442:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_gpio.c **** assert_param(IS_GPIO_PIN(GPIO_Pin)); + 809 .loc 1 442 3 view .LVU284 + 443:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_gpio.c **** + 444:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_gpio.c **** /* get current Output Data Register value */ + 445:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_gpio.c **** odr = GPIOx->ODR; + 810 .loc 1 445 3 view .LVU285 + 811 .loc 1 445 7 is_stmt 0 view .LVU286 + 812 0000 4269 ldr r2, [r0, #20] + 813 .LVL67: + ARM GAS /tmp/ccJLBnnH.s page 25 + + + 446:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_gpio.c **** + 447:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_gpio.c **** /* Set selected pins that were at low level, and reset ones that were high */ + 448:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_gpio.c **** GPIOx->BSRR = ((odr & GPIO_Pin) << GPIO_NUMBER) | (~odr & GPIO_Pin); + 814 .loc 1 448 3 is_stmt 1 view .LVU287 + 815 .loc 1 448 23 is_stmt 0 view .LVU288 + 816 0002 1300 movs r3, r2 + 817 0004 0B40 ands r3, r1 + 818 .loc 1 448 35 view .LVU289 + 819 0006 1B04 lsls r3, r3, #16 + 820 .loc 1 448 59 view .LVU290 + 821 0008 9143 bics r1, r2 + 822 .LVL68: + 823 .loc 1 448 51 view .LVU291 + 824 000a 0B43 orrs r3, r1 + 825 .loc 1 448 15 view .LVU292 + 826 000c 8361 str r3, [r0, #24] + 449:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_gpio.c **** } + 827 .loc 1 449 1 view .LVU293 + 828 @ sp needed + 829 000e 7047 bx lr + 830 .cfi_endproc + 831 .LFE44: + 833 .section .text.HAL_GPIO_LockPin,"ax",%progbits + 834 .align 1 + 835 .global HAL_GPIO_LockPin + 836 .syntax unified + 837 .code 16 + 838 .thumb_func + 840 HAL_GPIO_LockPin: + 841 .LVL69: + 842 .LFB45: + 450:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_gpio.c **** + 451:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_gpio.c **** /** + 452:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_gpio.c **** * @brief Locks GPIO Pins configuration registers. + 453:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_gpio.c **** * @note The locked registers are GPIOx_MODER, GPIOx_OTYPER, GPIOx_OSPEEDR, + 454:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_gpio.c **** * GPIOx_PUPDR, GPIOx_AFRL and GPIOx_AFRH. + 455:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_gpio.c **** * @note The configuration of the locked GPIO pins can no longer be modified + 456:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_gpio.c **** * until the next reset. + 457:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_gpio.c **** * @param GPIOx where x can be (A..F) to select the GPIO peripheral for STM32F0 family + 458:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_gpio.c **** * @param GPIO_Pin specifies the port bits to be locked. + 459:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_gpio.c **** * This parameter can be any combination of GPIO_Pin_x where x can be (0..15). + 460:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_gpio.c **** * @retval None + 461:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_gpio.c **** */ + 462:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_gpio.c **** HAL_StatusTypeDef HAL_GPIO_LockPin(GPIO_TypeDef* GPIOx, uint16_t GPIO_Pin) + 463:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_gpio.c **** { + 843 .loc 1 463 1 is_stmt 1 view -0 + 844 .cfi_startproc + 845 @ args = 0, pretend = 0, frame = 8 + 846 @ frame_needed = 0, uses_anonymous_args = 0 + 847 @ link register save eliminated. + 848 .loc 1 463 1 is_stmt 0 view .LVU295 + 849 0000 82B0 sub sp, sp, #8 + 850 .cfi_def_cfa_offset 8 + 464:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_gpio.c **** __IO uint32_t tmp = GPIO_LCKR_LCKK; + 851 .loc 1 464 3 is_stmt 1 view .LVU296 + 852 .loc 1 464 17 is_stmt 0 view .LVU297 + 853 0002 8022 movs r2, #128 + ARM GAS /tmp/ccJLBnnH.s page 26 + + + 854 0004 5202 lsls r2, r2, #9 + 855 0006 0192 str r2, [sp, #4] + 465:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_gpio.c **** + 466:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_gpio.c **** /* Check the parameters */ + 467:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_gpio.c **** assert_param(IS_GPIO_LOCK_INSTANCE(GPIOx)); + 856 .loc 1 467 3 is_stmt 1 view .LVU298 + 468:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_gpio.c **** assert_param(IS_GPIO_PIN(GPIO_Pin)); + 857 .loc 1 468 3 view .LVU299 + 469:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_gpio.c **** + 470:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_gpio.c **** /* Apply lock key write sequence */ + 471:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_gpio.c **** SET_BIT(tmp, GPIO_Pin); + 858 .loc 1 471 3 view .LVU300 + 859 0008 019B ldr r3, [sp, #4] + 860 000a 0B43 orrs r3, r1 + 861 000c 0193 str r3, [sp, #4] + 472:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_gpio.c **** /* Set LCKx bit(s): LCKK='1' + LCK[15-0] */ + 473:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_gpio.c **** GPIOx->LCKR = tmp; + 862 .loc 1 473 3 view .LVU301 + 863 .loc 1 473 15 is_stmt 0 view .LVU302 + 864 000e 019B ldr r3, [sp, #4] + 865 0010 C361 str r3, [r0, #28] + 474:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_gpio.c **** /* Reset LCKx bit(s): LCKK='0' + LCK[15-0] */ + 475:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_gpio.c **** GPIOx->LCKR = GPIO_Pin; + 866 .loc 1 475 3 is_stmt 1 view .LVU303 + 867 .loc 1 475 15 is_stmt 0 view .LVU304 + 868 0012 C161 str r1, [r0, #28] + 476:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_gpio.c **** /* Set LCKx bit(s): LCKK='1' + LCK[15-0] */ + 477:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_gpio.c **** GPIOx->LCKR = tmp; + 869 .loc 1 477 3 is_stmt 1 view .LVU305 + 870 .loc 1 477 15 is_stmt 0 view .LVU306 + 871 0014 019B ldr r3, [sp, #4] + 872 0016 C361 str r3, [r0, #28] + 478:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_gpio.c **** /* Read LCKK register. This read is mandatory to complete key lock sequence */ + 479:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_gpio.c **** tmp = GPIOx->LCKR; + 873 .loc 1 479 3 is_stmt 1 view .LVU307 + 874 .loc 1 479 14 is_stmt 0 view .LVU308 + 875 0018 C369 ldr r3, [r0, #28] + 876 .loc 1 479 7 view .LVU309 + 877 001a 0193 str r3, [sp, #4] + 480:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_gpio.c **** + 481:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_gpio.c **** /* read again in order to confirm lock is active */ + 482:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_gpio.c **** if((GPIOx->LCKR & GPIO_LCKR_LCKK) != 0x00u) + 878 .loc 1 482 2 is_stmt 1 view .LVU310 + 879 .loc 1 482 11 is_stmt 0 view .LVU311 + 880 001c C369 ldr r3, [r0, #28] + 881 .loc 1 482 4 view .LVU312 + 882 001e 1342 tst r3, r2 + 883 0020 02D0 beq .L49 + 483:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_gpio.c **** { + 484:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_gpio.c **** return HAL_OK; + 884 .loc 1 484 12 view .LVU313 + 885 0022 0020 movs r0, #0 + 886 .LVL70: + 887 .L48: + 485:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_gpio.c **** } + 486:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_gpio.c **** else + 487:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_gpio.c **** { + ARM GAS /tmp/ccJLBnnH.s page 27 + + + 488:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_gpio.c **** return HAL_ERROR; + 489:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_gpio.c **** } + 490:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_gpio.c **** } + 888 .loc 1 490 1 view .LVU314 + 889 0024 02B0 add sp, sp, #8 + 890 @ sp needed + 891 0026 7047 bx lr + 892 .LVL71: + 893 .L49: + 488:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_gpio.c **** } + 894 .loc 1 488 12 view .LVU315 + 895 0028 0120 movs r0, #1 + 896 .LVL72: + 488:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_gpio.c **** } + 897 .loc 1 488 12 view .LVU316 + 898 002a FBE7 b .L48 + 899 .cfi_endproc + 900 .LFE45: + 902 .section .text.HAL_GPIO_EXTI_Callback,"ax",%progbits + 903 .align 1 + 904 .weak HAL_GPIO_EXTI_Callback + 905 .syntax unified + 906 .code 16 + 907 .thumb_func + 909 HAL_GPIO_EXTI_Callback: + 910 .LVL73: + 911 .LFB47: + 491:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_gpio.c **** + 492:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_gpio.c **** /** + 493:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_gpio.c **** * @brief Handle EXTI interrupt request. + 494:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_gpio.c **** * @param GPIO_Pin Specifies the port pin connected to corresponding EXTI line. + 495:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_gpio.c **** * @retval None + 496:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_gpio.c **** */ + 497:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_gpio.c **** void HAL_GPIO_EXTI_IRQHandler(uint16_t GPIO_Pin) + 498:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_gpio.c **** { + 499:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_gpio.c **** /* EXTI line interrupt detected */ + 500:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_gpio.c **** if(__HAL_GPIO_EXTI_GET_IT(GPIO_Pin) != 0x00u) + 501:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_gpio.c **** { + 502:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_gpio.c **** __HAL_GPIO_EXTI_CLEAR_IT(GPIO_Pin); + 503:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_gpio.c **** HAL_GPIO_EXTI_Callback(GPIO_Pin); + 504:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_gpio.c **** } + 505:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_gpio.c **** } + 506:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_gpio.c **** + 507:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_gpio.c **** /** + 508:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_gpio.c **** * @brief EXTI line detection callback. + 509:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_gpio.c **** * @param GPIO_Pin Specifies the port pin connected to corresponding EXTI line. + 510:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_gpio.c **** * @retval None + 511:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_gpio.c **** */ + 512:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_gpio.c **** __weak void HAL_GPIO_EXTI_Callback(uint16_t GPIO_Pin) + 513:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_gpio.c **** { + 912 .loc 1 513 1 is_stmt 1 view -0 + 913 .cfi_startproc + 914 @ args = 0, pretend = 0, frame = 0 + 915 @ frame_needed = 0, uses_anonymous_args = 0 + 916 @ link register save eliminated. + 514:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_gpio.c **** /* Prevent unused argument(s) compilation warning */ + 515:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_gpio.c **** UNUSED(GPIO_Pin); + ARM GAS /tmp/ccJLBnnH.s page 28 + + + 917 .loc 1 515 3 view .LVU318 + 516:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_gpio.c **** + 517:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_gpio.c **** /* NOTE: This function should not be modified, when the callback is needed, + 518:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_gpio.c **** the HAL_GPIO_EXTI_Callback could be implemented in the user file + 519:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_gpio.c **** */ + 520:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_gpio.c **** } + 918 .loc 1 520 1 is_stmt 0 view .LVU319 + 919 @ sp needed + 920 0000 7047 bx lr + 921 .cfi_endproc + 922 .LFE47: + 924 .section .text.HAL_GPIO_EXTI_IRQHandler,"ax",%progbits + 925 .align 1 + 926 .global HAL_GPIO_EXTI_IRQHandler + 927 .syntax unified + 928 .code 16 + 929 .thumb_func + 931 HAL_GPIO_EXTI_IRQHandler: + 932 .LVL74: + 933 .LFB46: + 498:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_gpio.c **** /* EXTI line interrupt detected */ + 934 .loc 1 498 1 is_stmt 1 view -0 + 935 .cfi_startproc + 936 @ args = 0, pretend = 0, frame = 0 + 937 @ frame_needed = 0, uses_anonymous_args = 0 + 498:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_gpio.c **** /* EXTI line interrupt detected */ + 938 .loc 1 498 1 is_stmt 0 view .LVU321 + 939 0000 10B5 push {r4, lr} + 940 .cfi_def_cfa_offset 8 + 941 .cfi_offset 4, -8 + 942 .cfi_offset 14, -4 + 500:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_gpio.c **** { + 943 .loc 1 500 3 is_stmt 1 view .LVU322 + 500:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_gpio.c **** { + 944 .loc 1 500 6 is_stmt 0 view .LVU323 + 945 0002 054B ldr r3, .L54 + 946 0004 5B69 ldr r3, [r3, #20] + 500:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_gpio.c **** { + 947 .loc 1 500 5 view .LVU324 + 948 0006 1842 tst r0, r3 + 949 0008 00D1 bne .L53 + 950 .LVL75: + 951 .L51: + 505:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_gpio.c **** + 952 .loc 1 505 1 view .LVU325 + 953 @ sp needed + 954 000a 10BD pop {r4, pc} + 955 .LVL76: + 956 .L53: + 502:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_gpio.c **** HAL_GPIO_EXTI_Callback(GPIO_Pin); + 957 .loc 1 502 5 is_stmt 1 view .LVU326 + 958 000c 024B ldr r3, .L54 + 959 000e 5861 str r0, [r3, #20] + 503:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_gpio.c **** } + 960 .loc 1 503 5 view .LVU327 + 961 0010 FFF7FEFF bl HAL_GPIO_EXTI_Callback + 962 .LVL77: + ARM GAS /tmp/ccJLBnnH.s page 29 + + + 505:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_gpio.c **** + 963 .loc 1 505 1 is_stmt 0 view .LVU328 + 964 0014 F9E7 b .L51 + 965 .L55: + 966 0016 C046 .align 2 + 967 .L54: + 968 0018 00040140 .word 1073808384 + 969 .cfi_endproc + 970 .LFE46: + 972 .text + 973 .Letext0: + 974 .file 2 "/home/chiangni/.config/VSCodium/User/globalStorage/bmd.stm32-for-vscode/@xpack-dev-tools/ + 975 .file 3 "/home/chiangni/.config/VSCodium/User/globalStorage/bmd.stm32-for-vscode/@xpack-dev-tools/ + 976 .file 4 "Drivers/CMSIS/Device/ST/STM32F0xx/Include/stm32f042x6.h" + 977 .file 5 "Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_def.h" + 978 .file 6 "Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_gpio.h" + ARM GAS /tmp/ccJLBnnH.s page 30 + + +DEFINED SYMBOLS + *ABS*:00000000 stm32f0xx_hal_gpio.c + /tmp/ccJLBnnH.s:19 .text.HAL_GPIO_Init:00000000 $t + /tmp/ccJLBnnH.s:25 .text.HAL_GPIO_Init:00000000 HAL_GPIO_Init + /tmp/ccJLBnnH.s:467 .text.HAL_GPIO_Init:00000168 $d + /tmp/ccJLBnnH.s:476 .text.HAL_GPIO_DeInit:00000000 $t + /tmp/ccJLBnnH.s:482 .text.HAL_GPIO_DeInit:00000000 HAL_GPIO_DeInit + /tmp/ccJLBnnH.s:708 .text.HAL_GPIO_DeInit:000000d4 $d + /tmp/ccJLBnnH.s:716 .text.HAL_GPIO_ReadPin:00000000 $t + /tmp/ccJLBnnH.s:722 .text.HAL_GPIO_ReadPin:00000000 HAL_GPIO_ReadPin + /tmp/ccJLBnnH.s:757 .text.HAL_GPIO_WritePin:00000000 $t + /tmp/ccJLBnnH.s:763 .text.HAL_GPIO_WritePin:00000000 HAL_GPIO_WritePin + /tmp/ccJLBnnH.s:794 .text.HAL_GPIO_TogglePin:00000000 $t + /tmp/ccJLBnnH.s:800 .text.HAL_GPIO_TogglePin:00000000 HAL_GPIO_TogglePin + /tmp/ccJLBnnH.s:834 .text.HAL_GPIO_LockPin:00000000 $t + /tmp/ccJLBnnH.s:840 .text.HAL_GPIO_LockPin:00000000 HAL_GPIO_LockPin + /tmp/ccJLBnnH.s:903 .text.HAL_GPIO_EXTI_Callback:00000000 $t + /tmp/ccJLBnnH.s:909 .text.HAL_GPIO_EXTI_Callback:00000000 HAL_GPIO_EXTI_Callback + /tmp/ccJLBnnH.s:925 .text.HAL_GPIO_EXTI_IRQHandler:00000000 $t + /tmp/ccJLBnnH.s:931 .text.HAL_GPIO_EXTI_IRQHandler:00000000 HAL_GPIO_EXTI_IRQHandler + /tmp/ccJLBnnH.s:968 .text.HAL_GPIO_EXTI_IRQHandler:00000018 $d + +NO UNDEFINED SYMBOLS diff --git a/Software/build/stm32f0xx_hal_gpio.o b/Software/build/stm32f0xx_hal_gpio.o new file mode 100644 index 0000000..0edd1aa Binary files /dev/null and b/Software/build/stm32f0xx_hal_gpio.o differ diff --git a/Software/build/stm32f0xx_hal_i2c.d b/Software/build/stm32f0xx_hal_i2c.d new file mode 100644 index 0000000..2861d1d --- /dev/null +++ b/Software/build/stm32f0xx_hal_i2c.d @@ -0,0 +1,60 @@ +build/stm32f0xx_hal_i2c.o: \ + Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c \ + Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal.h \ + Core/Inc/stm32f0xx_hal_conf.h \ + Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_rcc.h \ + Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_def.h \ + Drivers/CMSIS/Device/ST/STM32F0xx/Include/stm32f0xx.h \ + Drivers/CMSIS/Device/ST/STM32F0xx/Include/stm32f042x6.h \ + Drivers/CMSIS/Include/core_cm0.h Drivers/CMSIS/Include/cmsis_version.h \ + Drivers/CMSIS/Include/cmsis_compiler.h Drivers/CMSIS/Include/cmsis_gcc.h \ + Drivers/CMSIS/Device/ST/STM32F0xx/Include/system_stm32f0xx.h \ + Drivers/STM32F0xx_HAL_Driver/Inc/Legacy/stm32_hal_legacy.h \ + Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_rcc_ex.h \ + Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_gpio.h \ + Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_gpio_ex.h \ + Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_exti.h \ + Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_dma.h \ + Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_dma_ex.h \ + Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_cortex.h \ + Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_adc.h \ + Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_adc_ex.h \ + Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_can.h \ + Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_flash.h \ + Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_flash_ex.h \ + Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_i2c.h \ + Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_i2c_ex.h \ + Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_pwr.h \ + Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_pwr_ex.h \ + Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_tim.h \ + Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_tim_ex.h +Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal.h: +Core/Inc/stm32f0xx_hal_conf.h: +Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_rcc.h: +Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_def.h: +Drivers/CMSIS/Device/ST/STM32F0xx/Include/stm32f0xx.h: +Drivers/CMSIS/Device/ST/STM32F0xx/Include/stm32f042x6.h: +Drivers/CMSIS/Include/core_cm0.h: +Drivers/CMSIS/Include/cmsis_version.h: +Drivers/CMSIS/Include/cmsis_compiler.h: +Drivers/CMSIS/Include/cmsis_gcc.h: +Drivers/CMSIS/Device/ST/STM32F0xx/Include/system_stm32f0xx.h: +Drivers/STM32F0xx_HAL_Driver/Inc/Legacy/stm32_hal_legacy.h: +Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_rcc_ex.h: +Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_gpio.h: +Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_gpio_ex.h: +Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_exti.h: +Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_dma.h: +Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_dma_ex.h: +Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_cortex.h: +Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_adc.h: +Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_adc_ex.h: +Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_can.h: +Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_flash.h: +Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_flash_ex.h: +Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_i2c.h: +Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_i2c_ex.h: +Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_pwr.h: +Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_pwr_ex.h: +Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_tim.h: +Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_tim_ex.h: diff --git a/Software/build/stm32f0xx_hal_i2c.lst b/Software/build/stm32f0xx_hal_i2c.lst new file mode 100644 index 0000000..fd8c21a --- /dev/null +++ b/Software/build/stm32f0xx_hal_i2c.lst @@ -0,0 +1,28890 @@ +ARM GAS /tmp/ccuRhBPx.s page 1 + + + 1 .cpu cortex-m0 + 2 .arch armv6s-m + 3 .fpu softvfp + 4 .eabi_attribute 20, 1 + 5 .eabi_attribute 21, 1 + 6 .eabi_attribute 23, 3 + 7 .eabi_attribute 24, 1 + 8 .eabi_attribute 25, 1 + 9 .eabi_attribute 26, 1 + 10 .eabi_attribute 30, 1 + 11 .eabi_attribute 34, 0 + 12 .eabi_attribute 18, 4 + 13 .file "stm32f0xx_hal_i2c.c" + 14 .text + 15 .Ltext0: + 16 .cfi_sections .debug_frame + 17 .file 1 "Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c" + 18 .section .text.I2C_Flush_TXDR,"ax",%progbits + 19 .align 1 + 20 .syntax unified + 21 .code 16 + 22 .thumb_func + 24 I2C_Flush_TXDR: + 25 .LVL0: + 26 .LFB105: + 1:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /** + 2:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** ****************************************************************************** + 3:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** * @file stm32f0xx_hal_i2c.c + 4:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** * @author MCD Application Team + 5:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** * @brief I2C HAL module driver. + 6:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** * This file provides firmware functions to manage the following + 7:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** * functionalities of the Inter Integrated Circuit (I2C) peripheral: + 8:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** * + Initialization and de-initialization functions + 9:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** * + IO operation functions + 10:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** * + Peripheral State and Errors functions + 11:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** * + 12:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** ****************************************************************************** + 13:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** * @attention + 14:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** * + 15:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** * Copyright (c) 2016 STMicroelectronics. + 16:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** * All rights reserved. + 17:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** * + 18:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** * This software is licensed under terms that can be found in the LICENSE file + 19:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** * in the root directory of this software component. + 20:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** * If no LICENSE file comes with this software, it is provided AS-IS. + 21:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** * + 22:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** ****************************************************************************** + 23:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** @verbatim + 24:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** ============================================================================== + 25:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** ##### How to use this driver ##### + 26:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** ============================================================================== + 27:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** [..] + 28:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** The I2C HAL driver can be used as follows: + 29:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 30:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** (#) Declare a I2C_HandleTypeDef handle structure, for example: + 31:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** I2C_HandleTypeDef hi2c; + 32:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + ARM GAS /tmp/ccuRhBPx.s page 2 + + + 33:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** (#)Initialize the I2C low level resources by implementing the HAL_I2C_MspInit() API: + 34:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** (##) Enable the I2Cx interface clock + 35:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** (##) I2C pins configuration + 36:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** (+++) Enable the clock for the I2C GPIOs + 37:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** (+++) Configure I2C pins as alternate function open-drain + 38:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** (##) NVIC configuration if you need to use interrupt process + 39:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** (+++) Configure the I2Cx interrupt priority + 40:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** (+++) Enable the NVIC I2C IRQ Channel + 41:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** (##) DMA Configuration if you need to use DMA process + 42:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** (+++) Declare a DMA_HandleTypeDef handle structure for + 43:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** the transmit or receive channel + 44:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** (+++) Enable the DMAx interface clock using + 45:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** (+++) Configure the DMA handle parameters + 46:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** (+++) Configure the DMA Tx or Rx channel + 47:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** (+++) Associate the initialized DMA handle to the hi2c DMA Tx or Rx handle + 48:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** (+++) Configure the priority and enable the NVIC for the transfer complete interrupt on + 49:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** the DMA Tx or Rx channel + 50:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 51:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** (#) Configure the Communication Clock Timing, Own Address1, Master Addressing mode, Dual Addres + 52:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** Own Address2, Own Address2 Mask, General call and Nostretch mode in the hi2c Init structure + 53:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 54:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** (#) Initialize the I2C registers by calling the HAL_I2C_Init(), configures also the low level H + 55:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** (GPIO, CLOCK, NVIC...etc) by calling the customized HAL_I2C_MspInit(&hi2c) API. + 56:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 57:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** (#) To check if target device is ready for communication, use the function HAL_I2C_IsDeviceRead + 58:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 59:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** (#) For I2C IO and IO MEM operations, three operation modes are available within this driver : + 60:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 61:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** *** Polling mode IO operation *** + 62:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** ================================= + 63:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** [..] + 64:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** (+) Transmit in master mode an amount of data in blocking mode using HAL_I2C_Master_Transmit( + 65:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** (+) Receive in master mode an amount of data in blocking mode using HAL_I2C_Master_Receive() + 66:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** (+) Transmit in slave mode an amount of data in blocking mode using HAL_I2C_Slave_Transmit() + 67:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** (+) Receive in slave mode an amount of data in blocking mode using HAL_I2C_Slave_Receive() + 68:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 69:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** *** Polling mode IO MEM operation *** + 70:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** ===================================== + 71:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** [..] + 72:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** (+) Write an amount of data in blocking mode to a specific memory address using HAL_I2C_Mem_W + 73:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** (+) Read an amount of data in blocking mode from a specific memory address using HAL_I2C_Mem_ + 74:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 75:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 76:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** *** Interrupt mode IO operation *** + 77:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** =================================== + 78:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** [..] + 79:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** (+) Transmit in master mode an amount of data in non-blocking mode using HAL_I2C_Master_Trans + 80:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** (+) At transmission end of transfer, HAL_I2C_MasterTxCpltCallback() is executed and users can + 81:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** add their own code by customization of function pointer HAL_I2C_MasterTxCpltCallback() + 82:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** (+) Receive in master mode an amount of data in non-blocking mode using HAL_I2C_Master_Receiv + 83:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** (+) At reception end of transfer, HAL_I2C_MasterRxCpltCallback() is executed and users can + 84:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** add their own code by customization of function pointer HAL_I2C_MasterRxCpltCallback() + 85:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** (+) Transmit in slave mode an amount of data in non-blocking mode using HAL_I2C_Slave_Transmi + 86:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** (+) At transmission end of transfer, HAL_I2C_SlaveTxCpltCallback() is executed and users can + 87:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** add their own code by customization of function pointer HAL_I2C_SlaveTxCpltCallback() + 88:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** (+) Receive in slave mode an amount of data in non-blocking mode using HAL_I2C_Slave_Receive_ + 89:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** (+) At reception end of transfer, HAL_I2C_SlaveRxCpltCallback() is executed and users can + ARM GAS /tmp/ccuRhBPx.s page 3 + + + 90:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** add their own code by customization of function pointer HAL_I2C_SlaveRxCpltCallback() + 91:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** (+) In case of transfer Error, HAL_I2C_ErrorCallback() function is executed and users can + 92:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** add their own code by customization of function pointer HAL_I2C_ErrorCallback() + 93:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** (+) Abort a master I2C process communication with Interrupt using HAL_I2C_Master_Abort_IT() + 94:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** (+) End of abort process, HAL_I2C_AbortCpltCallback() is executed and users can + 95:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** add their own code by customization of function pointer HAL_I2C_AbortCpltCallback() + 96:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** (+) Discard a slave I2C process communication using __HAL_I2C_GENERATE_NACK() macro. + 97:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** This action will inform Master to generate a Stop condition to discard the communication + 98:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 99:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 100:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** *** Interrupt mode or DMA mode IO sequential operation *** + 101:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** ========================================================== + 102:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** [..] + 103:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** (@) These interfaces allow to manage a sequential transfer with a repeated start condition + 104:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** when a direction change during transfer + 105:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** [..] + 106:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** (+) A specific option field manage the different steps of a sequential transfer + 107:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** (+) Option field values are defined through I2C_XFEROPTIONS and are listed below: + 108:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** (++) I2C_FIRST_AND_LAST_FRAME: No sequential usage, functional is same as associated interfac + 109:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** no sequential mode + 110:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** (++) I2C_FIRST_FRAME: Sequential usage, this option allow to manage a sequence with start con + 111:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** and data to transfer without a final stop condition + 112:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** (++) I2C_FIRST_AND_NEXT_FRAME: Sequential usage (Master only), this option allow to manage a + 113:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** start condition, address and data to transfer without a final stop cond + 114:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** an then permit a call the same master sequential interface several time + 115:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** (like HAL_I2C_Master_Seq_Transmit_IT() then HAL_I2C_Master_Seq_Transmit + 116:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** or HAL_I2C_Master_Seq_Transmit_DMA() then HAL_I2C_Master_Seq_Transmit_D + 117:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** (++) I2C_NEXT_FRAME: Sequential usage, this option allow to manage a sequence with a restart + 118:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** and with new data to transfer if the direction change or manage only th + 119:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** transfer + 120:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** if no direction change and without a final stop condition in both cases + 121:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** (++) I2C_LAST_FRAME: Sequential usage, this option allow to manage a sequance with a restart + 122:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** and with new data to transfer if the direction change or manage only th + 123:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** transfer + 124:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** if no direction change and with a final stop condition in both cases + 125:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** (++) I2C_LAST_FRAME_NO_STOP: Sequential usage (Master only), this option allow to manage a re + 126:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** after several call of the same master sequential interface several time + 127:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** (link with option I2C_FIRST_AND_NEXT_FRAME). + 128:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** Usage can, transfer several bytes one by one using + 129:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** HAL_I2C_Master_Seq_Transmit_IT + 130:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** or HAL_I2C_Master_Seq_Receive_IT + 131:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** or HAL_I2C_Master_Seq_Transmit_DMA + 132:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** or HAL_I2C_Master_Seq_Receive_DMA + 133:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** with option I2C_FIRST_AND_NEXT_FRAME then I2C_NEXT_FRAME. + 134:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** Then usage of this option I2C_LAST_FRAME_NO_STOP at the last Transmit + 135:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** Receive sequence permit to call the opposite interface Receive or Tra + 136:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** without stopping the communication and so generate a restart conditio + 137:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** (++) I2C_OTHER_FRAME: Sequential usage (Master only), this option allow to manage a restart c + 138:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** each call of the same master sequential + 139:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** interface. + 140:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** Usage can, transfer several bytes one by one with a restart with slave + 141:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** each bytes using + 142:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** HAL_I2C_Master_Seq_Transmit_IT + 143:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** or HAL_I2C_Master_Seq_Receive_IT + 144:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** or HAL_I2C_Master_Seq_Transmit_DMA + 145:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** or HAL_I2C_Master_Seq_Receive_DMA + 146:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** with option I2C_FIRST_FRAME then I2C_OTHER_FRAME. + ARM GAS /tmp/ccuRhBPx.s page 4 + + + 147:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** Then usage of this option I2C_OTHER_AND_LAST_FRAME at the last frame to + 148:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** generation of STOP condition. + 149:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 150:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** (+) Different sequential I2C interfaces are listed below: + 151:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** (++) Sequential transmit in master I2C mode an amount of data in non-blocking mode using + 152:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** HAL_I2C_Master_Seq_Transmit_IT() or using HAL_I2C_Master_Seq_Transmit_DMA() + 153:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** (+++) At transmission end of current frame transfer, HAL_I2C_MasterTxCpltCallback() is execut + 154:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** users can add their own code by customization of function pointer HAL_I2C_MasterTxCpltC + 155:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** (++) Sequential receive in master I2C mode an amount of data in non-blocking mode using + 156:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** HAL_I2C_Master_Seq_Receive_IT() or using HAL_I2C_Master_Seq_Receive_DMA() + 157:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** (+++) At reception end of current frame transfer, HAL_I2C_MasterRxCpltCallback() is executed + 158:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** add their own code by customization of function pointer HAL_I2C_MasterRxCpltCallback() + 159:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** (++) Abort a master IT or DMA I2C process communication with Interrupt using HAL_I2C_Master_A + 160:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** (+++) End of abort process, HAL_I2C_AbortCpltCallback() is executed and users can + 161:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** add their own code by customization of function pointer HAL_I2C_AbortCpltCallback() + 162:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** (++) Enable/disable the Address listen mode in slave I2C mode using HAL_I2C_EnableListen_IT() + 163:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** HAL_I2C_DisableListen_IT() + 164:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** (+++) When address slave I2C match, HAL_I2C_AddrCallback() is executed and users can + 165:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** add their own code to check the Address Match Code and the transmission direction reques + 166:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** (Write/Read). + 167:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** (+++) At Listen mode end HAL_I2C_ListenCpltCallback() is executed and users can + 168:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** add their own code by customization of function pointer HAL_I2C_ListenCpltCallback() + 169:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** (++) Sequential transmit in slave I2C mode an amount of data in non-blocking mode using + 170:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** HAL_I2C_Slave_Seq_Transmit_IT() or using HAL_I2C_Slave_Seq_Transmit_DMA() + 171:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** (+++) At transmission end of current frame transfer, HAL_I2C_SlaveTxCpltCallback() is execute + 172:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** users can add their own code by customization of function pointer HAL_I2C_SlaveTxCpltCa + 173:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** (++) Sequential receive in slave I2C mode an amount of data in non-blocking mode using + 174:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** HAL_I2C_Slave_Seq_Receive_IT() or using HAL_I2C_Slave_Seq_Receive_DMA() + 175:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** (+++) At reception end of current frame transfer, HAL_I2C_SlaveRxCpltCallback() is executed a + 176:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** add their own code by customization of function pointer HAL_I2C_SlaveRxCpltCallback() + 177:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** (++) In case of transfer Error, HAL_I2C_ErrorCallback() function is executed and users can + 178:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** add their own code by customization of function pointer HAL_I2C_ErrorCallback() + 179:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** (++) Discard a slave I2C process communication using __HAL_I2C_GENERATE_NACK() macro. + 180:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** This action will inform Master to generate a Stop condition to discard the communication + 181:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 182:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** *** Interrupt mode IO MEM operation *** + 183:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** ======================================= + 184:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** [..] + 185:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** (+) Write an amount of data in non-blocking mode with Interrupt to a specific memory address + 186:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** HAL_I2C_Mem_Write_IT() + 187:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** (+) At Memory end of write transfer, HAL_I2C_MemTxCpltCallback() is executed and users can + 188:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** add their own code by customization of function pointer HAL_I2C_MemTxCpltCallback() + 189:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** (+) Read an amount of data in non-blocking mode with Interrupt from a specific memory address + 190:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** HAL_I2C_Mem_Read_IT() + 191:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** (+) At Memory end of read transfer, HAL_I2C_MemRxCpltCallback() is executed and users can + 192:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** add their own code by customization of function pointer HAL_I2C_MemRxCpltCallback() + 193:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** (+) In case of transfer Error, HAL_I2C_ErrorCallback() function is executed and users can + 194:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** add their own code by customization of function pointer HAL_I2C_ErrorCallback() + 195:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 196:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** *** DMA mode IO operation *** + 197:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** ============================== + 198:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** [..] + 199:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** (+) Transmit in master mode an amount of data in non-blocking mode (DMA) using + 200:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** HAL_I2C_Master_Transmit_DMA() + 201:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** (+) At transmission end of transfer, HAL_I2C_MasterTxCpltCallback() is executed and users can + 202:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** add their own code by customization of function pointer HAL_I2C_MasterTxCpltCallback() + 203:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** (+) Receive in master mode an amount of data in non-blocking mode (DMA) using + ARM GAS /tmp/ccuRhBPx.s page 5 + + + 204:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** HAL_I2C_Master_Receive_DMA() + 205:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** (+) At reception end of transfer, HAL_I2C_MasterRxCpltCallback() is executed and users can + 206:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** add their own code by customization of function pointer HAL_I2C_MasterRxCpltCallback() + 207:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** (+) Transmit in slave mode an amount of data in non-blocking mode (DMA) using + 208:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** HAL_I2C_Slave_Transmit_DMA() + 209:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** (+) At transmission end of transfer, HAL_I2C_SlaveTxCpltCallback() is executed and users can + 210:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** add their own code by customization of function pointer HAL_I2C_SlaveTxCpltCallback() + 211:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** (+) Receive in slave mode an amount of data in non-blocking mode (DMA) using + 212:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** HAL_I2C_Slave_Receive_DMA() + 213:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** (+) At reception end of transfer, HAL_I2C_SlaveRxCpltCallback() is executed and users can + 214:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** add their own code by customization of function pointer HAL_I2C_SlaveRxCpltCallback() + 215:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** (+) In case of transfer Error, HAL_I2C_ErrorCallback() function is executed and users can + 216:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** add their own code by customization of function pointer HAL_I2C_ErrorCallback() + 217:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** (+) Abort a master I2C process communication with Interrupt using HAL_I2C_Master_Abort_IT() + 218:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** (+) End of abort process, HAL_I2C_AbortCpltCallback() is executed and users can + 219:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** add their own code by customization of function pointer HAL_I2C_AbortCpltCallback() + 220:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** (+) Discard a slave I2C process communication using __HAL_I2C_GENERATE_NACK() macro. + 221:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** This action will inform Master to generate a Stop condition to discard the communication + 222:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 223:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** *** DMA mode IO MEM operation *** + 224:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** ================================= + 225:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** [..] + 226:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** (+) Write an amount of data in non-blocking mode with DMA to a specific memory address using + 227:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** HAL_I2C_Mem_Write_DMA() + 228:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** (+) At Memory end of write transfer, HAL_I2C_MemTxCpltCallback() is executed and users can + 229:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** add their own code by customization of function pointer HAL_I2C_MemTxCpltCallback() + 230:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** (+) Read an amount of data in non-blocking mode with DMA from a specific memory address using + 231:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** HAL_I2C_Mem_Read_DMA() + 232:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** (+) At Memory end of read transfer, HAL_I2C_MemRxCpltCallback() is executed and users can + 233:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** add their own code by customization of function pointer HAL_I2C_MemRxCpltCallback() + 234:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** (+) In case of transfer Error, HAL_I2C_ErrorCallback() function is executed and users can + 235:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** add their own code by customization of function pointer HAL_I2C_ErrorCallback() + 236:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 237:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 238:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** *** I2C HAL driver macros list *** + 239:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** ================================== + 240:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** [..] + 241:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** Below the list of most used macros in I2C HAL driver. + 242:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 243:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** (+) __HAL_I2C_ENABLE: Enable the I2C peripheral + 244:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** (+) __HAL_I2C_DISABLE: Disable the I2C peripheral + 245:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** (+) __HAL_I2C_GENERATE_NACK: Generate a Non-Acknowledge I2C peripheral in Slave mode + 246:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** (+) __HAL_I2C_GET_FLAG: Check whether the specified I2C flag is set or not + 247:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** (+) __HAL_I2C_CLEAR_FLAG: Clear the specified I2C pending flag + 248:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** (+) __HAL_I2C_ENABLE_IT: Enable the specified I2C interrupt + 249:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** (+) __HAL_I2C_DISABLE_IT: Disable the specified I2C interrupt + 250:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 251:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** *** Callback registration *** + 252:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** ============================================= + 253:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** [..] + 254:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** The compilation flag USE_HAL_I2C_REGISTER_CALLBACKS when set to 1 + 255:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** allows the user to configure dynamically the driver callbacks. + 256:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** Use Functions HAL_I2C_RegisterCallback() or HAL_I2C_RegisterAddrCallback() + 257:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** to register an interrupt callback. + 258:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** [..] + 259:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** Function HAL_I2C_RegisterCallback() allows to register following callbacks: + 260:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** (+) MasterTxCpltCallback : callback for Master transmission end of transfer. + ARM GAS /tmp/ccuRhBPx.s page 6 + + + 261:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** (+) MasterRxCpltCallback : callback for Master reception end of transfer. + 262:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** (+) SlaveTxCpltCallback : callback for Slave transmission end of transfer. + 263:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** (+) SlaveRxCpltCallback : callback for Slave reception end of transfer. + 264:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** (+) ListenCpltCallback : callback for end of listen mode. + 265:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** (+) MemTxCpltCallback : callback for Memory transmission end of transfer. + 266:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** (+) MemRxCpltCallback : callback for Memory reception end of transfer. + 267:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** (+) ErrorCallback : callback for error detection. + 268:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** (+) AbortCpltCallback : callback for abort completion process. + 269:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** (+) MspInitCallback : callback for Msp Init. + 270:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** (+) MspDeInitCallback : callback for Msp DeInit. + 271:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** This function takes as parameters the HAL peripheral handle, the Callback ID + 272:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** and a pointer to the user callback function. + 273:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** [..] + 274:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** For specific callback AddrCallback use dedicated register callbacks : HAL_I2C_RegisterAddrCall + 275:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** [..] + 276:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** Use function HAL_I2C_UnRegisterCallback to reset a callback to the default + 277:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** weak function. + 278:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** HAL_I2C_UnRegisterCallback takes as parameters the HAL peripheral handle, + 279:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** and the Callback ID. + 280:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** This function allows to reset following callbacks: + 281:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** (+) MasterTxCpltCallback : callback for Master transmission end of transfer. + 282:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** (+) MasterRxCpltCallback : callback for Master reception end of transfer. + 283:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** (+) SlaveTxCpltCallback : callback for Slave transmission end of transfer. + 284:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** (+) SlaveRxCpltCallback : callback for Slave reception end of transfer. + 285:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** (+) ListenCpltCallback : callback for end of listen mode. + 286:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** (+) MemTxCpltCallback : callback for Memory transmission end of transfer. + 287:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** (+) MemRxCpltCallback : callback for Memory reception end of transfer. + 288:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** (+) ErrorCallback : callback for error detection. + 289:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** (+) AbortCpltCallback : callback for abort completion process. + 290:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** (+) MspInitCallback : callback for Msp Init. + 291:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** (+) MspDeInitCallback : callback for Msp DeInit. + 292:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** [..] + 293:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** For callback AddrCallback use dedicated register callbacks : HAL_I2C_UnRegisterAddrCallback(). + 294:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** [..] + 295:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** By default, after the HAL_I2C_Init() and when the state is HAL_I2C_STATE_RESET + 296:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** all callbacks are set to the corresponding weak functions: + 297:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** examples HAL_I2C_MasterTxCpltCallback(), HAL_I2C_MasterRxCpltCallback(). + 298:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** Exception done for MspInit and MspDeInit functions that are + 299:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** reset to the legacy weak functions in the HAL_I2C_Init()/ HAL_I2C_DeInit() only when + 300:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** these callbacks are null (not registered beforehand). + 301:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** If MspInit or MspDeInit are not null, the HAL_I2C_Init()/ HAL_I2C_DeInit() + 302:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** keep and use the user MspInit/MspDeInit callbacks (registered beforehand) whatever the state. + 303:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** [..] + 304:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** Callbacks can be registered/unregistered in HAL_I2C_STATE_READY state only. + 305:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** Exception done MspInit/MspDeInit functions that can be registered/unregistered + 306:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** in HAL_I2C_STATE_READY or HAL_I2C_STATE_RESET state, + 307:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** thus registered (user) MspInit/DeInit callbacks can be used during the Init/DeInit. + 308:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** Then, the user first registers the MspInit/MspDeInit user callbacks + 309:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** using HAL_I2C_RegisterCallback() before calling HAL_I2C_DeInit() + 310:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** or HAL_I2C_Init() function. + 311:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** [..] + 312:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** When the compilation flag USE_HAL_I2C_REGISTER_CALLBACKS is set to 0 or + 313:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** not defined, the callback registration feature is not available and all callbacks + 314:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** are set to the corresponding weak functions. + 315:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 316:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** [..] + 317:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** (@) You can refer to the I2C HAL driver header file for more useful macros + ARM GAS /tmp/ccuRhBPx.s page 7 + + + 318:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 319:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** @endverbatim + 320:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** */ + 321:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 322:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* Includes ------------------------------------------------------------------*/ + 323:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** #include "stm32f0xx_hal.h" + 324:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 325:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /** @addtogroup STM32F0xx_HAL_Driver + 326:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** * @{ + 327:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** */ + 328:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 329:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /** @defgroup I2C I2C + 330:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** * @brief I2C HAL module driver + 331:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** * @{ + 332:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** */ + 333:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 334:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** #ifdef HAL_I2C_MODULE_ENABLED + 335:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 336:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* Private typedef -----------------------------------------------------------*/ + 337:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* Private define ------------------------------------------------------------*/ + 338:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 339:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /** @defgroup I2C_Private_Define I2C Private Define + 340:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** * @{ + 341:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** */ + 342:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** #define TIMING_CLEAR_MASK (0xF0FFFFFFU) /*!< I2C TIMING clear register Mask */ + 343:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** #define I2C_TIMEOUT_ADDR (10000U) /*!< 10 s */ + 344:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** #define I2C_TIMEOUT_BUSY (25U) /*!< 25 ms */ + 345:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** #define I2C_TIMEOUT_DIR (25U) /*!< 25 ms */ + 346:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** #define I2C_TIMEOUT_RXNE (25U) /*!< 25 ms */ + 347:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** #define I2C_TIMEOUT_STOPF (25U) /*!< 25 ms */ + 348:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** #define I2C_TIMEOUT_TC (25U) /*!< 25 ms */ + 349:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** #define I2C_TIMEOUT_TCR (25U) /*!< 25 ms */ + 350:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** #define I2C_TIMEOUT_TXIS (25U) /*!< 25 ms */ + 351:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** #define I2C_TIMEOUT_FLAG (25U) /*!< 25 ms */ + 352:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 353:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** #define MAX_NBYTE_SIZE 255U + 354:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** #define SLAVE_ADDR_SHIFT 7U + 355:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** #define SLAVE_ADDR_MSK 0x06U + 356:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 357:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* Private define for @ref PreviousState usage */ + 358:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** #define I2C_STATE_MSK ((uint32_t)((uint32_t)((uint32_t)HAL_I2C_STATE_BUSY_TX | \ + 359:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** (uint32_t)HAL_I2C_STATE_BUSY_RX) & \ + 360:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** (uint32_t)(~((uint32_t)HAL_I2C_STATE_READY)))) + 361:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /*!< Mask State define, keep only RX and TX bits */ + 362:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** #define I2C_STATE_NONE ((uint32_t)(HAL_I2C_MODE_NONE)) + 363:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /*!< Default Value */ + 364:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** #define I2C_STATE_MASTER_BUSY_TX ((uint32_t)(((uint32_t)HAL_I2C_STATE_BUSY_TX & I2C_STATE_MSK) | \ + 365:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** (uint32_t)HAL_I2C_MODE_MASTER)) + 366:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /*!< Master Busy TX, combinaison of State LSB and Mode enum */ + 367:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** #define I2C_STATE_MASTER_BUSY_RX ((uint32_t)(((uint32_t)HAL_I2C_STATE_BUSY_RX & I2C_STATE_MSK) | \ + 368:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** (uint32_t)HAL_I2C_MODE_MASTER)) + 369:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /*!< Master Busy RX, combinaison of State LSB and Mode enum */ + 370:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** #define I2C_STATE_SLAVE_BUSY_TX ((uint32_t)(((uint32_t)HAL_I2C_STATE_BUSY_TX & I2C_STATE_MSK) | \ + 371:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** (uint32_t)HAL_I2C_MODE_SLAVE)) + 372:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /*!< Slave Busy TX, combinaison of State LSB and Mode enum */ + 373:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** #define I2C_STATE_SLAVE_BUSY_RX ((uint32_t)(((uint32_t)HAL_I2C_STATE_BUSY_RX & I2C_STATE_MSK) | \ + 374:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** (uint32_t)HAL_I2C_MODE_SLAVE)) + ARM GAS /tmp/ccuRhBPx.s page 8 + + + 375:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /*!< Slave Busy RX, combinaison of State LSB and Mode enum */ + 376:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** #define I2C_STATE_MEM_BUSY_TX ((uint32_t)(((uint32_t)HAL_I2C_STATE_BUSY_TX & I2C_STATE_MSK) | \ + 377:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** (uint32_t)HAL_I2C_MODE_MEM)) + 378:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /*!< Memory Busy TX, combinaison of State LSB and Mode enum */ + 379:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** #define I2C_STATE_MEM_BUSY_RX ((uint32_t)(((uint32_t)HAL_I2C_STATE_BUSY_RX & I2C_STATE_MSK) | \ + 380:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** (uint32_t)HAL_I2C_MODE_MEM)) + 381:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /*!< Memory Busy RX, combinaison of State LSB and Mode enum */ + 382:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 383:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 384:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* Private define to centralize the enable/disable of Interrupts */ + 385:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** #define I2C_XFER_TX_IT (uint16_t)(0x0001U) /*!< Bit field can be combinated with + 386:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** @ref I2C_XFER_LISTEN_IT */ + 387:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** #define I2C_XFER_RX_IT (uint16_t)(0x0002U) /*!< Bit field can be combinated with + 388:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** @ref I2C_XFER_LISTEN_IT */ + 389:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** #define I2C_XFER_LISTEN_IT (uint16_t)(0x8000U) /*!< Bit field can be combinated with @ref I2 + 390:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** and @ref I2C_XFER_RX_IT */ + 391:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 392:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** #define I2C_XFER_ERROR_IT (uint16_t)(0x0010U) /*!< Bit definition to manage addition of glo + 393:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** and NACK treatment */ + 394:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** #define I2C_XFER_CPLT_IT (uint16_t)(0x0020U) /*!< Bit definition to manage only STOP evene + 395:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** #define I2C_XFER_RELOAD_IT (uint16_t)(0x0040U) /*!< Bit definition to manage only Reload of + 396:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 397:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* Private define Sequential Transfer Options default/reset value */ + 398:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** #define I2C_NO_OPTION_FRAME (0xFFFF0000U) + 399:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /** + 400:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** * @} + 401:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** */ + 402:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 403:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* Private macros ------------------------------------------------------------*/ + 404:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /** @addtogroup I2C_Private_Macro + 405:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** * @{ + 406:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** */ + 407:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* Macro to get remaining data to transfer on DMA side */ + 408:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** #define I2C_GET_DMA_REMAIN_DATA(__HANDLE__) __HAL_DMA_GET_COUNTER(__HANDLE__) + 409:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /** + 410:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** * @} + 411:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** */ + 412:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 413:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* Private variables ---------------------------------------------------------*/ + 414:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* Private function prototypes -----------------------------------------------*/ + 415:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 416:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /** @defgroup I2C_Private_Functions I2C Private Functions + 417:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** * @{ + 418:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** */ + 419:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* Private functions to handle DMA transfer */ + 420:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** static void I2C_DMAMasterTransmitCplt(DMA_HandleTypeDef *hdma); + 421:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** static void I2C_DMAMasterReceiveCplt(DMA_HandleTypeDef *hdma); + 422:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** static void I2C_DMASlaveTransmitCplt(DMA_HandleTypeDef *hdma); + 423:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** static void I2C_DMASlaveReceiveCplt(DMA_HandleTypeDef *hdma); + 424:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** static void I2C_DMAError(DMA_HandleTypeDef *hdma); + 425:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** static void I2C_DMAAbort(DMA_HandleTypeDef *hdma); + 426:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 427:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 428:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* Private functions to handle IT transfer */ + 429:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** static void I2C_ITAddrCplt(I2C_HandleTypeDef *hi2c, uint32_t ITFlags); + 430:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** static void I2C_ITMasterSeqCplt(I2C_HandleTypeDef *hi2c); + 431:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** static void I2C_ITSlaveSeqCplt(I2C_HandleTypeDef *hi2c); + ARM GAS /tmp/ccuRhBPx.s page 9 + + + 432:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** static void I2C_ITMasterCplt(I2C_HandleTypeDef *hi2c, uint32_t ITFlags); + 433:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** static void I2C_ITSlaveCplt(I2C_HandleTypeDef *hi2c, uint32_t ITFlags); + 434:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** static void I2C_ITListenCplt(I2C_HandleTypeDef *hi2c, uint32_t ITFlags); + 435:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** static void I2C_ITError(I2C_HandleTypeDef *hi2c, uint32_t ErrorCode); + 436:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 437:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* Private functions to handle IT transfer */ + 438:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** static HAL_StatusTypeDef I2C_RequestMemoryWrite(I2C_HandleTypeDef *hi2c, uint16_t DevAddress, + 439:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** uint16_t MemAddress, uint16_t MemAddSize, uint32_t + 440:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** uint32_t Tickstart); + 441:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** static HAL_StatusTypeDef I2C_RequestMemoryRead(I2C_HandleTypeDef *hi2c, uint16_t DevAddress, + 442:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** uint16_t MemAddress, uint16_t MemAddSize, uint32_t T + 443:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** uint32_t Tickstart); + 444:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 445:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* Private functions for I2C transfer IRQ handler */ + 446:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** static HAL_StatusTypeDef I2C_Master_ISR_IT(struct __I2C_HandleTypeDef *hi2c, uint32_t ITFlags, + 447:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** uint32_t ITSources); + 448:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** static HAL_StatusTypeDef I2C_Mem_ISR_IT(struct __I2C_HandleTypeDef *hi2c, uint32_t ITFlags, + 449:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** uint32_t ITSources); + 450:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** static HAL_StatusTypeDef I2C_Slave_ISR_IT(struct __I2C_HandleTypeDef *hi2c, uint32_t ITFlags, + 451:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** uint32_t ITSources); + 452:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** static HAL_StatusTypeDef I2C_Master_ISR_DMA(struct __I2C_HandleTypeDef *hi2c, uint32_t ITFlags, + 453:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** uint32_t ITSources); + 454:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** static HAL_StatusTypeDef I2C_Mem_ISR_DMA(struct __I2C_HandleTypeDef *hi2c, uint32_t ITFlags, + 455:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** uint32_t ITSources); + 456:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** static HAL_StatusTypeDef I2C_Slave_ISR_DMA(struct __I2C_HandleTypeDef *hi2c, uint32_t ITFlags, + 457:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** uint32_t ITSources); + 458:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 459:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* Private functions to handle flags during polling transfer */ + 460:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** static HAL_StatusTypeDef I2C_WaitOnFlagUntilTimeout(I2C_HandleTypeDef *hi2c, uint32_t Flag, FlagSta + 461:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** uint32_t Timeout, uint32_t Tickstart); + 462:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** static HAL_StatusTypeDef I2C_WaitOnTXISFlagUntilTimeout(I2C_HandleTypeDef *hi2c, uint32_t Timeout, + 463:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** uint32_t Tickstart); + 464:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** static HAL_StatusTypeDef I2C_WaitOnRXNEFlagUntilTimeout(I2C_HandleTypeDef *hi2c, uint32_t Timeout, + 465:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** uint32_t Tickstart); + 466:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** static HAL_StatusTypeDef I2C_WaitOnSTOPFlagUntilTimeout(I2C_HandleTypeDef *hi2c, uint32_t Timeout, + 467:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** uint32_t Tickstart); + 468:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** static HAL_StatusTypeDef I2C_IsErrorOccurred(I2C_HandleTypeDef *hi2c, uint32_t Timeout, + 469:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** uint32_t Tickstart); + 470:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 471:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* Private functions to centralize the enable/disable of Interrupts */ + 472:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** static void I2C_Enable_IRQ(I2C_HandleTypeDef *hi2c, uint16_t InterruptRequest); + 473:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** static void I2C_Disable_IRQ(I2C_HandleTypeDef *hi2c, uint16_t InterruptRequest); + 474:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 475:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* Private function to treat different error callback */ + 476:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** static void I2C_TreatErrorCallback(I2C_HandleTypeDef *hi2c); + 477:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 478:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* Private function to flush TXDR register */ + 479:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** static void I2C_Flush_TXDR(I2C_HandleTypeDef *hi2c); + 480:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 481:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* Private function to handle start, restart or stop a transfer */ + 482:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** static void I2C_TransferConfig(I2C_HandleTypeDef *hi2c, uint16_t DevAddress, uint8_t Size, uint32_t + 483:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** uint32_t Request); + 484:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 485:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* Private function to Convert Specific options */ + 486:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** static void I2C_ConvertOtherXferOptions(I2C_HandleTypeDef *hi2c); + 487:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /** + 488:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** * @} + ARM GAS /tmp/ccuRhBPx.s page 10 + + + 489:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** */ + 490:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 491:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* Exported functions --------------------------------------------------------*/ + 492:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 493:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /** @defgroup I2C_Exported_Functions I2C Exported Functions + 494:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** * @{ + 495:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** */ + 496:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 497:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /** @defgroup I2C_Exported_Functions_Group1 Initialization and de-initialization functions + 498:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** * @brief Initialization and Configuration functions + 499:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** * + 500:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** @verbatim + 501:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** =============================================================================== + 502:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** ##### Initialization and de-initialization functions ##### + 503:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** =============================================================================== + 504:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** [..] This subsection provides a set of functions allowing to initialize and + 505:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** deinitialize the I2Cx peripheral: + 506:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 507:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** (+) User must Implement HAL_I2C_MspInit() function in which he configures + 508:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** all related peripherals resources (CLOCK, GPIO, DMA, IT and NVIC ). + 509:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 510:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** (+) Call the function HAL_I2C_Init() to configure the selected device with + 511:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** the selected configuration: + 512:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** (++) Clock Timing + 513:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** (++) Own Address 1 + 514:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** (++) Addressing mode (Master, Slave) + 515:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** (++) Dual Addressing mode + 516:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** (++) Own Address 2 + 517:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** (++) Own Address 2 Mask + 518:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** (++) General call mode + 519:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** (++) Nostretch mode + 520:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 521:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** (+) Call the function HAL_I2C_DeInit() to restore the default configuration + 522:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** of the selected I2Cx peripheral. + 523:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 524:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** @endverbatim + 525:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** * @{ + 526:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** */ + 527:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 528:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /** + 529:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** * @brief Initializes the I2C according to the specified parameters + 530:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** * in the I2C_InitTypeDef and initialize the associated handle. + 531:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** * @param hi2c Pointer to a I2C_HandleTypeDef structure that contains + 532:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** * the configuration information for the specified I2C. + 533:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** * @retval HAL status + 534:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** */ + 535:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** HAL_StatusTypeDef HAL_I2C_Init(I2C_HandleTypeDef *hi2c) + 536:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { + 537:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* Check the I2C handle allocation */ + 538:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** if (hi2c == NULL) + 539:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { + 540:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** return HAL_ERROR; + 541:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } + 542:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 543:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* Check the parameters */ + 544:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** assert_param(IS_I2C_ALL_INSTANCE(hi2c->Instance)); + 545:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** assert_param(IS_I2C_OWN_ADDRESS1(hi2c->Init.OwnAddress1)); + ARM GAS /tmp/ccuRhBPx.s page 11 + + + 546:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** assert_param(IS_I2C_ADDRESSING_MODE(hi2c->Init.AddressingMode)); + 547:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** assert_param(IS_I2C_DUAL_ADDRESS(hi2c->Init.DualAddressMode)); + 548:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** assert_param(IS_I2C_OWN_ADDRESS2(hi2c->Init.OwnAddress2)); + 549:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** assert_param(IS_I2C_OWN_ADDRESS2_MASK(hi2c->Init.OwnAddress2Masks)); + 550:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** assert_param(IS_I2C_GENERAL_CALL(hi2c->Init.GeneralCallMode)); + 551:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** assert_param(IS_I2C_NO_STRETCH(hi2c->Init.NoStretchMode)); + 552:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 553:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** if (hi2c->State == HAL_I2C_STATE_RESET) + 554:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { + 555:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* Allocate lock resource and initialize it */ + 556:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->Lock = HAL_UNLOCKED; + 557:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 558:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** #if (USE_HAL_I2C_REGISTER_CALLBACKS == 1) + 559:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* Init the I2C Callback settings */ + 560:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->MasterTxCpltCallback = HAL_I2C_MasterTxCpltCallback; /* Legacy weak MasterTxCpltCallback + 561:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->MasterRxCpltCallback = HAL_I2C_MasterRxCpltCallback; /* Legacy weak MasterRxCpltCallback + 562:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->SlaveTxCpltCallback = HAL_I2C_SlaveTxCpltCallback; /* Legacy weak SlaveTxCpltCallback + 563:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->SlaveRxCpltCallback = HAL_I2C_SlaveRxCpltCallback; /* Legacy weak SlaveRxCpltCallback + 564:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->ListenCpltCallback = HAL_I2C_ListenCpltCallback; /* Legacy weak ListenCpltCallback + 565:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->MemTxCpltCallback = HAL_I2C_MemTxCpltCallback; /* Legacy weak MemTxCpltCallback + 566:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->MemRxCpltCallback = HAL_I2C_MemRxCpltCallback; /* Legacy weak MemRxCpltCallback + 567:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->ErrorCallback = HAL_I2C_ErrorCallback; /* Legacy weak ErrorCallback + 568:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->AbortCpltCallback = HAL_I2C_AbortCpltCallback; /* Legacy weak AbortCpltCallback + 569:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->AddrCallback = HAL_I2C_AddrCallback; /* Legacy weak AddrCallback + 570:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 571:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** if (hi2c->MspInitCallback == NULL) + 572:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { + 573:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->MspInitCallback = HAL_I2C_MspInit; /* Legacy weak MspInit */ + 574:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } + 575:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 576:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* Init the low level hardware : GPIO, CLOCK, CORTEX...etc */ + 577:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->MspInitCallback(hi2c); + 578:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** #else + 579:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* Init the low level hardware : GPIO, CLOCK, CORTEX...etc */ + 580:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** HAL_I2C_MspInit(hi2c); + 581:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** #endif /* USE_HAL_I2C_REGISTER_CALLBACKS */ + 582:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } + 583:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 584:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->State = HAL_I2C_STATE_BUSY; + 585:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 586:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* Disable the selected I2C peripheral */ + 587:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** __HAL_I2C_DISABLE(hi2c); + 588:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 589:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /*---------------------------- I2Cx TIMINGR Configuration ------------------*/ + 590:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* Configure I2Cx: Frequency range */ + 591:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->Instance->TIMINGR = hi2c->Init.Timing & TIMING_CLEAR_MASK; + 592:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 593:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /*---------------------------- I2Cx OAR1 Configuration ---------------------*/ + 594:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* Disable Own Address1 before set the Own Address1 configuration */ + 595:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->Instance->OAR1 &= ~I2C_OAR1_OA1EN; + 596:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 597:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* Configure I2Cx: Own Address1 and ack own address1 mode */ + 598:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** if (hi2c->Init.AddressingMode == I2C_ADDRESSINGMODE_7BIT) + 599:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { + 600:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->Instance->OAR1 = (I2C_OAR1_OA1EN | hi2c->Init.OwnAddress1); + 601:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } + 602:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** else /* I2C_ADDRESSINGMODE_10BIT */ + ARM GAS /tmp/ccuRhBPx.s page 12 + + + 603:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { + 604:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->Instance->OAR1 = (I2C_OAR1_OA1EN | I2C_OAR1_OA1MODE | hi2c->Init.OwnAddress1); + 605:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } + 606:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 607:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /*---------------------------- I2Cx CR2 Configuration ----------------------*/ + 608:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* Configure I2Cx: Addressing Master mode */ + 609:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** if (hi2c->Init.AddressingMode == I2C_ADDRESSINGMODE_10BIT) + 610:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { + 611:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->Instance->CR2 = (I2C_CR2_ADD10); + 612:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } + 613:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* Enable the AUTOEND by default, and enable NACK (should be disable only during Slave process */ + 614:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->Instance->CR2 |= (I2C_CR2_AUTOEND | I2C_CR2_NACK); + 615:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 616:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /*---------------------------- I2Cx OAR2 Configuration ---------------------*/ + 617:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* Disable Own Address2 before set the Own Address2 configuration */ + 618:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->Instance->OAR2 &= ~I2C_DUALADDRESS_ENABLE; + 619:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 620:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* Configure I2Cx: Dual mode and Own Address2 */ + 621:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->Instance->OAR2 = (hi2c->Init.DualAddressMode | hi2c->Init.OwnAddress2 | \ + 622:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** (hi2c->Init.OwnAddress2Masks << 8)); + 623:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 624:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /*---------------------------- I2Cx CR1 Configuration ----------------------*/ + 625:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* Configure I2Cx: Generalcall and NoStretch mode */ + 626:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->Instance->CR1 = (hi2c->Init.GeneralCallMode | hi2c->Init.NoStretchMode); + 627:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 628:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* Enable the selected I2C peripheral */ + 629:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** __HAL_I2C_ENABLE(hi2c); + 630:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 631:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->ErrorCode = HAL_I2C_ERROR_NONE; + 632:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->State = HAL_I2C_STATE_READY; + 633:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->PreviousState = I2C_STATE_NONE; + 634:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->Mode = HAL_I2C_MODE_NONE; + 635:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 636:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** return HAL_OK; + 637:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } + 638:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 639:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /** + 640:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** * @brief DeInitialize the I2C peripheral. + 641:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** * @param hi2c Pointer to a I2C_HandleTypeDef structure that contains + 642:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** * the configuration information for the specified I2C. + 643:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** * @retval HAL status + 644:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** */ + 645:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** HAL_StatusTypeDef HAL_I2C_DeInit(I2C_HandleTypeDef *hi2c) + 646:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { + 647:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* Check the I2C handle allocation */ + 648:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** if (hi2c == NULL) + 649:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { + 650:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** return HAL_ERROR; + 651:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } + 652:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 653:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* Check the parameters */ + 654:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** assert_param(IS_I2C_ALL_INSTANCE(hi2c->Instance)); + 655:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 656:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->State = HAL_I2C_STATE_BUSY; + 657:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 658:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* Disable the I2C Peripheral Clock */ + 659:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** __HAL_I2C_DISABLE(hi2c); + ARM GAS /tmp/ccuRhBPx.s page 13 + + + 660:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 661:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** #if (USE_HAL_I2C_REGISTER_CALLBACKS == 1) + 662:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** if (hi2c->MspDeInitCallback == NULL) + 663:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { + 664:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->MspDeInitCallback = HAL_I2C_MspDeInit; /* Legacy weak MspDeInit */ + 665:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } + 666:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 667:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* DeInit the low level hardware: GPIO, CLOCK, NVIC */ + 668:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->MspDeInitCallback(hi2c); + 669:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** #else + 670:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* DeInit the low level hardware: GPIO, CLOCK, NVIC */ + 671:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** HAL_I2C_MspDeInit(hi2c); + 672:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** #endif /* USE_HAL_I2C_REGISTER_CALLBACKS */ + 673:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 674:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->ErrorCode = HAL_I2C_ERROR_NONE; + 675:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->State = HAL_I2C_STATE_RESET; + 676:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->PreviousState = I2C_STATE_NONE; + 677:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->Mode = HAL_I2C_MODE_NONE; + 678:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 679:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* Release Lock */ + 680:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** __HAL_UNLOCK(hi2c); + 681:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 682:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** return HAL_OK; + 683:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } + 684:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 685:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /** + 686:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** * @brief Initialize the I2C MSP. + 687:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** * @param hi2c Pointer to a I2C_HandleTypeDef structure that contains + 688:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** * the configuration information for the specified I2C. + 689:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** * @retval None + 690:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** */ + 691:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** __weak void HAL_I2C_MspInit(I2C_HandleTypeDef *hi2c) + 692:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { + 693:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* Prevent unused argument(s) compilation warning */ + 694:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** UNUSED(hi2c); + 695:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 696:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* NOTE : This function should not be modified, when the callback is needed, + 697:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** the HAL_I2C_MspInit could be implemented in the user file + 698:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** */ + 699:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } + 700:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 701:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /** + 702:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** * @brief DeInitialize the I2C MSP. + 703:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** * @param hi2c Pointer to a I2C_HandleTypeDef structure that contains + 704:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** * the configuration information for the specified I2C. + 705:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** * @retval None + 706:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** */ + 707:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** __weak void HAL_I2C_MspDeInit(I2C_HandleTypeDef *hi2c) + 708:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { + 709:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* Prevent unused argument(s) compilation warning */ + 710:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** UNUSED(hi2c); + 711:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 712:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* NOTE : This function should not be modified, when the callback is needed, + 713:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** the HAL_I2C_MspDeInit could be implemented in the user file + 714:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** */ + 715:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } + 716:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + ARM GAS /tmp/ccuRhBPx.s page 14 + + + 717:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** #if (USE_HAL_I2C_REGISTER_CALLBACKS == 1) + 718:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /** + 719:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** * @brief Register a User I2C Callback + 720:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** * To be used instead of the weak predefined callback + 721:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** * @note The HAL_I2C_RegisterCallback() may be called before HAL_I2C_Init() in HAL_I2C_STATE_RES + 722:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** * to register callbacks for HAL_I2C_MSPINIT_CB_ID and HAL_I2C_MSPDEINIT_CB_ID. + 723:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** * @param hi2c Pointer to a I2C_HandleTypeDef structure that contains + 724:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** * the configuration information for the specified I2C. + 725:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** * @param CallbackID ID of the callback to be registered + 726:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** * This parameter can be one of the following values: + 727:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** * @arg @ref HAL_I2C_MASTER_TX_COMPLETE_CB_ID Master Tx Transfer completed callback ID + 728:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** * @arg @ref HAL_I2C_MASTER_RX_COMPLETE_CB_ID Master Rx Transfer completed callback ID + 729:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** * @arg @ref HAL_I2C_SLAVE_TX_COMPLETE_CB_ID Slave Tx Transfer completed callback ID + 730:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** * @arg @ref HAL_I2C_SLAVE_RX_COMPLETE_CB_ID Slave Rx Transfer completed callback ID + 731:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** * @arg @ref HAL_I2C_LISTEN_COMPLETE_CB_ID Listen Complete callback ID + 732:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** * @arg @ref HAL_I2C_MEM_TX_COMPLETE_CB_ID Memory Tx Transfer callback ID + 733:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** * @arg @ref HAL_I2C_MEM_RX_COMPLETE_CB_ID Memory Rx Transfer completed callback ID + 734:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** * @arg @ref HAL_I2C_ERROR_CB_ID Error callback ID + 735:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** * @arg @ref HAL_I2C_ABORT_CB_ID Abort callback ID + 736:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** * @arg @ref HAL_I2C_MSPINIT_CB_ID MspInit callback ID + 737:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** * @arg @ref HAL_I2C_MSPDEINIT_CB_ID MspDeInit callback ID + 738:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** * @param pCallback pointer to the Callback function + 739:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** * @retval HAL status + 740:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** */ + 741:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** HAL_StatusTypeDef HAL_I2C_RegisterCallback(I2C_HandleTypeDef *hi2c, HAL_I2C_CallbackIDTypeDef Callb + 742:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** pI2C_CallbackTypeDef pCallback) + 743:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { + 744:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** HAL_StatusTypeDef status = HAL_OK; + 745:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 746:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** if (pCallback == NULL) + 747:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { + 748:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* Update the error code */ + 749:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->ErrorCode |= HAL_I2C_ERROR_INVALID_CALLBACK; + 750:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 751:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** return HAL_ERROR; + 752:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } + 753:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 754:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** if (HAL_I2C_STATE_READY == hi2c->State) + 755:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { + 756:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** switch (CallbackID) + 757:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { + 758:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** case HAL_I2C_MASTER_TX_COMPLETE_CB_ID : + 759:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->MasterTxCpltCallback = pCallback; + 760:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** break; + 761:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 762:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** case HAL_I2C_MASTER_RX_COMPLETE_CB_ID : + 763:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->MasterRxCpltCallback = pCallback; + 764:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** break; + 765:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 766:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** case HAL_I2C_SLAVE_TX_COMPLETE_CB_ID : + 767:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->SlaveTxCpltCallback = pCallback; + 768:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** break; + 769:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 770:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** case HAL_I2C_SLAVE_RX_COMPLETE_CB_ID : + 771:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->SlaveRxCpltCallback = pCallback; + 772:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** break; + 773:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + ARM GAS /tmp/ccuRhBPx.s page 15 + + + 774:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** case HAL_I2C_LISTEN_COMPLETE_CB_ID : + 775:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->ListenCpltCallback = pCallback; + 776:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** break; + 777:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 778:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** case HAL_I2C_MEM_TX_COMPLETE_CB_ID : + 779:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->MemTxCpltCallback = pCallback; + 780:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** break; + 781:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 782:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** case HAL_I2C_MEM_RX_COMPLETE_CB_ID : + 783:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->MemRxCpltCallback = pCallback; + 784:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** break; + 785:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 786:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** case HAL_I2C_ERROR_CB_ID : + 787:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->ErrorCallback = pCallback; + 788:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** break; + 789:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 790:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** case HAL_I2C_ABORT_CB_ID : + 791:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->AbortCpltCallback = pCallback; + 792:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** break; + 793:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 794:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** case HAL_I2C_MSPINIT_CB_ID : + 795:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->MspInitCallback = pCallback; + 796:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** break; + 797:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 798:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** case HAL_I2C_MSPDEINIT_CB_ID : + 799:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->MspDeInitCallback = pCallback; + 800:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** break; + 801:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 802:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** default : + 803:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* Update the error code */ + 804:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->ErrorCode |= HAL_I2C_ERROR_INVALID_CALLBACK; + 805:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 806:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* Return error status */ + 807:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** status = HAL_ERROR; + 808:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** break; + 809:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } + 810:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } + 811:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** else if (HAL_I2C_STATE_RESET == hi2c->State) + 812:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { + 813:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** switch (CallbackID) + 814:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { + 815:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** case HAL_I2C_MSPINIT_CB_ID : + 816:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->MspInitCallback = pCallback; + 817:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** break; + 818:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 819:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** case HAL_I2C_MSPDEINIT_CB_ID : + 820:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->MspDeInitCallback = pCallback; + 821:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** break; + 822:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 823:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** default : + 824:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* Update the error code */ + 825:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->ErrorCode |= HAL_I2C_ERROR_INVALID_CALLBACK; + 826:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 827:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* Return error status */ + 828:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** status = HAL_ERROR; + 829:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** break; + 830:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } + ARM GAS /tmp/ccuRhBPx.s page 16 + + + 831:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } + 832:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** else + 833:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { + 834:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* Update the error code */ + 835:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->ErrorCode |= HAL_I2C_ERROR_INVALID_CALLBACK; + 836:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 837:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* Return error status */ + 838:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** status = HAL_ERROR; + 839:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } + 840:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 841:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** return status; + 842:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } + 843:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 844:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /** + 845:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** * @brief Unregister an I2C Callback + 846:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** * I2C callback is redirected to the weak predefined callback + 847:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** * @note The HAL_I2C_UnRegisterCallback() may be called before HAL_I2C_Init() in HAL_I2C_STATE_R + 848:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** * to un-register callbacks for HAL_I2C_MSPINIT_CB_ID and HAL_I2C_MSPDEINIT_CB_ID. + 849:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** * @param hi2c Pointer to a I2C_HandleTypeDef structure that contains + 850:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** * the configuration information for the specified I2C. + 851:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** * @param CallbackID ID of the callback to be unregistered + 852:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** * This parameter can be one of the following values: + 853:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** * This parameter can be one of the following values: + 854:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** * @arg @ref HAL_I2C_MASTER_TX_COMPLETE_CB_ID Master Tx Transfer completed callback ID + 855:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** * @arg @ref HAL_I2C_MASTER_RX_COMPLETE_CB_ID Master Rx Transfer completed callback ID + 856:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** * @arg @ref HAL_I2C_SLAVE_TX_COMPLETE_CB_ID Slave Tx Transfer completed callback ID + 857:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** * @arg @ref HAL_I2C_SLAVE_RX_COMPLETE_CB_ID Slave Rx Transfer completed callback ID + 858:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** * @arg @ref HAL_I2C_LISTEN_COMPLETE_CB_ID Listen Complete callback ID + 859:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** * @arg @ref HAL_I2C_MEM_TX_COMPLETE_CB_ID Memory Tx Transfer callback ID + 860:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** * @arg @ref HAL_I2C_MEM_RX_COMPLETE_CB_ID Memory Rx Transfer completed callback ID + 861:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** * @arg @ref HAL_I2C_ERROR_CB_ID Error callback ID + 862:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** * @arg @ref HAL_I2C_ABORT_CB_ID Abort callback ID + 863:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** * @arg @ref HAL_I2C_MSPINIT_CB_ID MspInit callback ID + 864:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** * @arg @ref HAL_I2C_MSPDEINIT_CB_ID MspDeInit callback ID + 865:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** * @retval HAL status + 866:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** */ + 867:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** HAL_StatusTypeDef HAL_I2C_UnRegisterCallback(I2C_HandleTypeDef *hi2c, HAL_I2C_CallbackIDTypeDef Cal + 868:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { + 869:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** HAL_StatusTypeDef status = HAL_OK; + 870:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 871:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** if (HAL_I2C_STATE_READY == hi2c->State) + 872:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { + 873:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** switch (CallbackID) + 874:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { + 875:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** case HAL_I2C_MASTER_TX_COMPLETE_CB_ID : + 876:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->MasterTxCpltCallback = HAL_I2C_MasterTxCpltCallback; /* Legacy weak MasterTxCpltCallb + 877:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** break; + 878:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 879:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** case HAL_I2C_MASTER_RX_COMPLETE_CB_ID : + 880:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->MasterRxCpltCallback = HAL_I2C_MasterRxCpltCallback; /* Legacy weak MasterRxCpltCallb + 881:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** break; + 882:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 883:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** case HAL_I2C_SLAVE_TX_COMPLETE_CB_ID : + 884:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->SlaveTxCpltCallback = HAL_I2C_SlaveTxCpltCallback; /* Legacy weak SlaveTxCpltCallba + 885:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** break; + 886:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 887:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** case HAL_I2C_SLAVE_RX_COMPLETE_CB_ID : + ARM GAS /tmp/ccuRhBPx.s page 17 + + + 888:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->SlaveRxCpltCallback = HAL_I2C_SlaveRxCpltCallback; /* Legacy weak SlaveRxCpltCallba + 889:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** break; + 890:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 891:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** case HAL_I2C_LISTEN_COMPLETE_CB_ID : + 892:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->ListenCpltCallback = HAL_I2C_ListenCpltCallback; /* Legacy weak ListenCpltCallbac + 893:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** break; + 894:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 895:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** case HAL_I2C_MEM_TX_COMPLETE_CB_ID : + 896:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->MemTxCpltCallback = HAL_I2C_MemTxCpltCallback; /* Legacy weak MemTxCpltCallback + 897:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** break; + 898:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 899:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** case HAL_I2C_MEM_RX_COMPLETE_CB_ID : + 900:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->MemRxCpltCallback = HAL_I2C_MemRxCpltCallback; /* Legacy weak MemRxCpltCallback + 901:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** break; + 902:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 903:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** case HAL_I2C_ERROR_CB_ID : + 904:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->ErrorCallback = HAL_I2C_ErrorCallback; /* Legacy weak ErrorCallback + 905:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** break; + 906:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 907:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** case HAL_I2C_ABORT_CB_ID : + 908:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->AbortCpltCallback = HAL_I2C_AbortCpltCallback; /* Legacy weak AbortCpltCallback + 909:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** break; + 910:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 911:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** case HAL_I2C_MSPINIT_CB_ID : + 912:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->MspInitCallback = HAL_I2C_MspInit; /* Legacy weak MspInit + 913:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** break; + 914:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 915:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** case HAL_I2C_MSPDEINIT_CB_ID : + 916:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->MspDeInitCallback = HAL_I2C_MspDeInit; /* Legacy weak MspDeInit + 917:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** break; + 918:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 919:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** default : + 920:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* Update the error code */ + 921:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->ErrorCode |= HAL_I2C_ERROR_INVALID_CALLBACK; + 922:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 923:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* Return error status */ + 924:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** status = HAL_ERROR; + 925:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** break; + 926:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } + 927:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } + 928:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** else if (HAL_I2C_STATE_RESET == hi2c->State) + 929:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { + 930:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** switch (CallbackID) + 931:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { + 932:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** case HAL_I2C_MSPINIT_CB_ID : + 933:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->MspInitCallback = HAL_I2C_MspInit; /* Legacy weak MspInit + 934:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** break; + 935:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 936:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** case HAL_I2C_MSPDEINIT_CB_ID : + 937:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->MspDeInitCallback = HAL_I2C_MspDeInit; /* Legacy weak MspDeInit + 938:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** break; + 939:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 940:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** default : + 941:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* Update the error code */ + 942:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->ErrorCode |= HAL_I2C_ERROR_INVALID_CALLBACK; + 943:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 944:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* Return error status */ + ARM GAS /tmp/ccuRhBPx.s page 18 + + + 945:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** status = HAL_ERROR; + 946:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** break; + 947:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } + 948:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } + 949:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** else + 950:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { + 951:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* Update the error code */ + 952:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->ErrorCode |= HAL_I2C_ERROR_INVALID_CALLBACK; + 953:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 954:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* Return error status */ + 955:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** status = HAL_ERROR; + 956:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } + 957:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 958:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** return status; + 959:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } + 960:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 961:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /** + 962:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** * @brief Register the Slave Address Match I2C Callback + 963:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** * To be used instead of the weak HAL_I2C_AddrCallback() predefined callback + 964:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** * @param hi2c Pointer to a I2C_HandleTypeDef structure that contains + 965:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** * the configuration information for the specified I2C. + 966:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** * @param pCallback pointer to the Address Match Callback function + 967:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** * @retval HAL status + 968:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** */ + 969:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** HAL_StatusTypeDef HAL_I2C_RegisterAddrCallback(I2C_HandleTypeDef *hi2c, pI2C_AddrCallbackTypeDef pC + 970:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { + 971:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** HAL_StatusTypeDef status = HAL_OK; + 972:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 973:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** if (pCallback == NULL) + 974:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { + 975:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* Update the error code */ + 976:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->ErrorCode |= HAL_I2C_ERROR_INVALID_CALLBACK; + 977:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 978:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** return HAL_ERROR; + 979:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } + 980:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 981:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** if (HAL_I2C_STATE_READY == hi2c->State) + 982:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { + 983:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->AddrCallback = pCallback; + 984:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } + 985:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** else + 986:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { + 987:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* Update the error code */ + 988:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->ErrorCode |= HAL_I2C_ERROR_INVALID_CALLBACK; + 989:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 990:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* Return error status */ + 991:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** status = HAL_ERROR; + 992:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } + 993:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 994:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** return status; + 995:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } + 996:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 997:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /** + 998:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** * @brief UnRegister the Slave Address Match I2C Callback + 999:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** * Info Ready I2C Callback is redirected to the weak HAL_I2C_AddrCallback() predefined cal +1000:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** * @param hi2c Pointer to a I2C_HandleTypeDef structure that contains +1001:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** * the configuration information for the specified I2C. + ARM GAS /tmp/ccuRhBPx.s page 19 + + +1002:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** * @retval HAL status +1003:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** */ +1004:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** HAL_StatusTypeDef HAL_I2C_UnRegisterAddrCallback(I2C_HandleTypeDef *hi2c) +1005:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { +1006:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** HAL_StatusTypeDef status = HAL_OK; +1007:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** +1008:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** if (HAL_I2C_STATE_READY == hi2c->State) +1009:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { +1010:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->AddrCallback = HAL_I2C_AddrCallback; /* Legacy weak AddrCallback */ +1011:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } +1012:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** else +1013:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { +1014:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* Update the error code */ +1015:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->ErrorCode |= HAL_I2C_ERROR_INVALID_CALLBACK; +1016:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** +1017:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* Return error status */ +1018:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** status = HAL_ERROR; +1019:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } +1020:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** +1021:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** return status; +1022:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } +1023:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** +1024:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** #endif /* USE_HAL_I2C_REGISTER_CALLBACKS */ +1025:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** +1026:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /** +1027:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** * @} +1028:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** */ +1029:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** +1030:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /** @defgroup I2C_Exported_Functions_Group2 Input and Output operation functions +1031:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** * @brief Data transfers functions +1032:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** * +1033:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** @verbatim +1034:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** =============================================================================== +1035:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** ##### IO operation functions ##### +1036:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** =============================================================================== +1037:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** [..] +1038:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** This subsection provides a set of functions allowing to manage the I2C data +1039:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** transfers. +1040:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** +1041:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** (#) There are two modes of transfer: +1042:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** (++) Blocking mode : The communication is performed in the polling mode. +1043:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** The status of all data processing is returned by the same function +1044:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** after finishing transfer. +1045:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** (++) No-Blocking mode : The communication is performed using Interrupts +1046:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** or DMA. These functions return the status of the transfer startup. +1047:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** The end of the data processing will be indicated through the +1048:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** dedicated I2C IRQ when using Interrupt mode or the DMA IRQ when +1049:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** using DMA mode. +1050:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** +1051:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** (#) Blocking mode functions are : +1052:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** (++) HAL_I2C_Master_Transmit() +1053:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** (++) HAL_I2C_Master_Receive() +1054:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** (++) HAL_I2C_Slave_Transmit() +1055:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** (++) HAL_I2C_Slave_Receive() +1056:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** (++) HAL_I2C_Mem_Write() +1057:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** (++) HAL_I2C_Mem_Read() +1058:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** (++) HAL_I2C_IsDeviceReady() + ARM GAS /tmp/ccuRhBPx.s page 20 + + +1059:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** +1060:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** (#) No-Blocking mode functions with Interrupt are : +1061:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** (++) HAL_I2C_Master_Transmit_IT() +1062:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** (++) HAL_I2C_Master_Receive_IT() +1063:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** (++) HAL_I2C_Slave_Transmit_IT() +1064:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** (++) HAL_I2C_Slave_Receive_IT() +1065:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** (++) HAL_I2C_Mem_Write_IT() +1066:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** (++) HAL_I2C_Mem_Read_IT() +1067:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** (++) HAL_I2C_Master_Seq_Transmit_IT() +1068:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** (++) HAL_I2C_Master_Seq_Receive_IT() +1069:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** (++) HAL_I2C_Slave_Seq_Transmit_IT() +1070:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** (++) HAL_I2C_Slave_Seq_Receive_IT() +1071:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** (++) HAL_I2C_EnableListen_IT() +1072:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** (++) HAL_I2C_DisableListen_IT() +1073:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** (++) HAL_I2C_Master_Abort_IT() +1074:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** +1075:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** (#) No-Blocking mode functions with DMA are : +1076:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** (++) HAL_I2C_Master_Transmit_DMA() +1077:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** (++) HAL_I2C_Master_Receive_DMA() +1078:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** (++) HAL_I2C_Slave_Transmit_DMA() +1079:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** (++) HAL_I2C_Slave_Receive_DMA() +1080:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** (++) HAL_I2C_Mem_Write_DMA() +1081:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** (++) HAL_I2C_Mem_Read_DMA() +1082:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** (++) HAL_I2C_Master_Seq_Transmit_DMA() +1083:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** (++) HAL_I2C_Master_Seq_Receive_DMA() +1084:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** (++) HAL_I2C_Slave_Seq_Transmit_DMA() +1085:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** (++) HAL_I2C_Slave_Seq_Receive_DMA() +1086:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** +1087:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** (#) A set of Transfer Complete Callbacks are provided in non Blocking mode: +1088:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** (++) HAL_I2C_MasterTxCpltCallback() +1089:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** (++) HAL_I2C_MasterRxCpltCallback() +1090:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** (++) HAL_I2C_SlaveTxCpltCallback() +1091:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** (++) HAL_I2C_SlaveRxCpltCallback() +1092:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** (++) HAL_I2C_MemTxCpltCallback() +1093:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** (++) HAL_I2C_MemRxCpltCallback() +1094:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** (++) HAL_I2C_AddrCallback() +1095:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** (++) HAL_I2C_ListenCpltCallback() +1096:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** (++) HAL_I2C_ErrorCallback() +1097:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** (++) HAL_I2C_AbortCpltCallback() +1098:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** +1099:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** @endverbatim +1100:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** * @{ +1101:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** */ +1102:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** +1103:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /** +1104:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** * @brief Transmits in master mode an amount of data in blocking mode. +1105:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** * @param hi2c Pointer to a I2C_HandleTypeDef structure that contains +1106:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** * the configuration information for the specified I2C. +1107:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** * @param DevAddress Target device address: The device 7 bits address value +1108:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** * in datasheet must be shifted to the left before calling the interface +1109:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** * @param pData Pointer to data buffer +1110:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** * @param Size Amount of data to be sent +1111:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** * @param Timeout Timeout duration +1112:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** * @retval HAL status +1113:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** */ +1114:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** HAL_StatusTypeDef HAL_I2C_Master_Transmit(I2C_HandleTypeDef *hi2c, uint16_t DevAddress, uint8_t *pD +1115:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** uint16_t Size, uint32_t Timeout) + ARM GAS /tmp/ccuRhBPx.s page 21 + + +1116:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { +1117:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** uint32_t tickstart; +1118:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** +1119:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** if (hi2c->State == HAL_I2C_STATE_READY) +1120:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { +1121:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* Process Locked */ +1122:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** __HAL_LOCK(hi2c); +1123:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** +1124:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* Init tickstart for timeout management*/ +1125:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** tickstart = HAL_GetTick(); +1126:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** +1127:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** if (I2C_WaitOnFlagUntilTimeout(hi2c, I2C_FLAG_BUSY, SET, I2C_TIMEOUT_BUSY, tickstart) != HAL_OK +1128:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { +1129:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** return HAL_ERROR; +1130:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } +1131:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** +1132:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->State = HAL_I2C_STATE_BUSY_TX; +1133:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->Mode = HAL_I2C_MODE_MASTER; +1134:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->ErrorCode = HAL_I2C_ERROR_NONE; +1135:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** +1136:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* Prepare transfer parameters */ +1137:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->pBuffPtr = pData; +1138:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->XferCount = Size; +1139:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->XferISR = NULL; +1140:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** +1141:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* Send Slave Address */ +1142:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* Set NBYTES to write and reload if hi2c->XferCount > MAX_NBYTE_SIZE and generate RESTART */ +1143:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** if (hi2c->XferCount > MAX_NBYTE_SIZE) +1144:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { +1145:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->XferSize = MAX_NBYTE_SIZE; +1146:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** I2C_TransferConfig(hi2c, DevAddress, (uint8_t)hi2c->XferSize, I2C_RELOAD_MODE, +1147:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** I2C_GENERATE_START_WRITE); +1148:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } +1149:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** else +1150:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { +1151:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->XferSize = hi2c->XferCount; +1152:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** I2C_TransferConfig(hi2c, DevAddress, (uint8_t)hi2c->XferSize, I2C_AUTOEND_MODE, +1153:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** I2C_GENERATE_START_WRITE); +1154:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } +1155:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** +1156:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** while (hi2c->XferCount > 0U) +1157:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { +1158:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* Wait until TXIS flag is set */ +1159:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** if (I2C_WaitOnTXISFlagUntilTimeout(hi2c, Timeout, tickstart) != HAL_OK) +1160:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { +1161:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** return HAL_ERROR; +1162:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } +1163:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* Write data to TXDR */ +1164:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->Instance->TXDR = *hi2c->pBuffPtr; +1165:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** +1166:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* Increment Buffer pointer */ +1167:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->pBuffPtr++; +1168:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** +1169:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->XferCount--; +1170:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->XferSize--; +1171:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** +1172:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** if ((hi2c->XferCount != 0U) && (hi2c->XferSize == 0U)) + ARM GAS /tmp/ccuRhBPx.s page 22 + + +1173:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { +1174:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* Wait until TCR flag is set */ +1175:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** if (I2C_WaitOnFlagUntilTimeout(hi2c, I2C_FLAG_TCR, RESET, Timeout, tickstart) != HAL_OK) +1176:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { +1177:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** return HAL_ERROR; +1178:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } +1179:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** +1180:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** if (hi2c->XferCount > MAX_NBYTE_SIZE) +1181:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { +1182:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->XferSize = MAX_NBYTE_SIZE; +1183:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** I2C_TransferConfig(hi2c, DevAddress, (uint8_t)hi2c->XferSize, I2C_RELOAD_MODE, +1184:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** I2C_NO_STARTSTOP); +1185:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } +1186:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** else +1187:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { +1188:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->XferSize = hi2c->XferCount; +1189:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** I2C_TransferConfig(hi2c, DevAddress, (uint8_t)hi2c->XferSize, I2C_AUTOEND_MODE, +1190:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** I2C_NO_STARTSTOP); +1191:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } +1192:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } +1193:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } +1194:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** +1195:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* No need to Check TC flag, with AUTOEND mode the stop is automatically generated */ +1196:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* Wait until STOPF flag is set */ +1197:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** if (I2C_WaitOnSTOPFlagUntilTimeout(hi2c, Timeout, tickstart) != HAL_OK) +1198:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { +1199:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** return HAL_ERROR; +1200:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } +1201:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** +1202:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* Clear STOP Flag */ +1203:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** __HAL_I2C_CLEAR_FLAG(hi2c, I2C_FLAG_STOPF); +1204:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** +1205:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* Clear Configuration Register 2 */ +1206:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** I2C_RESET_CR2(hi2c); +1207:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** +1208:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->State = HAL_I2C_STATE_READY; +1209:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->Mode = HAL_I2C_MODE_NONE; +1210:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** +1211:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* Process Unlocked */ +1212:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** __HAL_UNLOCK(hi2c); +1213:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** +1214:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** return HAL_OK; +1215:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } +1216:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** else +1217:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { +1218:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** return HAL_BUSY; +1219:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } +1220:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } +1221:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** +1222:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /** +1223:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** * @brief Receives in master mode an amount of data in blocking mode. +1224:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** * @param hi2c Pointer to a I2C_HandleTypeDef structure that contains +1225:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** * the configuration information for the specified I2C. +1226:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** * @param DevAddress Target device address: The device 7 bits address value +1227:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** * in datasheet must be shifted to the left before calling the interface +1228:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** * @param pData Pointer to data buffer +1229:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** * @param Size Amount of data to be sent + ARM GAS /tmp/ccuRhBPx.s page 23 + + +1230:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** * @param Timeout Timeout duration +1231:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** * @retval HAL status +1232:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** */ +1233:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** HAL_StatusTypeDef HAL_I2C_Master_Receive(I2C_HandleTypeDef *hi2c, uint16_t DevAddress, uint8_t *pDa +1234:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** uint16_t Size, uint32_t Timeout) +1235:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { +1236:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** uint32_t tickstart; +1237:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** +1238:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** if (hi2c->State == HAL_I2C_STATE_READY) +1239:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { +1240:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* Process Locked */ +1241:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** __HAL_LOCK(hi2c); +1242:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** +1243:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* Init tickstart for timeout management*/ +1244:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** tickstart = HAL_GetTick(); +1245:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** +1246:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** if (I2C_WaitOnFlagUntilTimeout(hi2c, I2C_FLAG_BUSY, SET, I2C_TIMEOUT_BUSY, tickstart) != HAL_OK +1247:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { +1248:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** return HAL_ERROR; +1249:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } +1250:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** +1251:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->State = HAL_I2C_STATE_BUSY_RX; +1252:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->Mode = HAL_I2C_MODE_MASTER; +1253:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->ErrorCode = HAL_I2C_ERROR_NONE; +1254:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** +1255:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* Prepare transfer parameters */ +1256:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->pBuffPtr = pData; +1257:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->XferCount = Size; +1258:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->XferISR = NULL; +1259:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** +1260:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* Send Slave Address */ +1261:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* Set NBYTES to write and reload if hi2c->XferCount > MAX_NBYTE_SIZE and generate RESTART */ +1262:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** if (hi2c->XferCount > MAX_NBYTE_SIZE) +1263:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { +1264:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->XferSize = MAX_NBYTE_SIZE; +1265:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** I2C_TransferConfig(hi2c, DevAddress, (uint8_t)hi2c->XferSize, I2C_RELOAD_MODE, +1266:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** I2C_GENERATE_START_READ); +1267:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } +1268:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** else +1269:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { +1270:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->XferSize = hi2c->XferCount; +1271:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** I2C_TransferConfig(hi2c, DevAddress, (uint8_t)hi2c->XferSize, I2C_AUTOEND_MODE, +1272:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** I2C_GENERATE_START_READ); +1273:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } +1274:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** +1275:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** while (hi2c->XferCount > 0U) +1276:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { +1277:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* Wait until RXNE flag is set */ +1278:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** if (I2C_WaitOnRXNEFlagUntilTimeout(hi2c, Timeout, tickstart) != HAL_OK) +1279:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { +1280:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** return HAL_ERROR; +1281:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } +1282:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** +1283:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* Read data from RXDR */ +1284:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** *hi2c->pBuffPtr = (uint8_t)hi2c->Instance->RXDR; +1285:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** +1286:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* Increment Buffer pointer */ + ARM GAS /tmp/ccuRhBPx.s page 24 + + +1287:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->pBuffPtr++; +1288:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** +1289:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->XferSize--; +1290:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->XferCount--; +1291:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** +1292:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** if ((hi2c->XferCount != 0U) && (hi2c->XferSize == 0U)) +1293:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { +1294:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* Wait until TCR flag is set */ +1295:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** if (I2C_WaitOnFlagUntilTimeout(hi2c, I2C_FLAG_TCR, RESET, Timeout, tickstart) != HAL_OK) +1296:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { +1297:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** return HAL_ERROR; +1298:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } +1299:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** +1300:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** if (hi2c->XferCount > MAX_NBYTE_SIZE) +1301:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { +1302:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->XferSize = MAX_NBYTE_SIZE; +1303:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** I2C_TransferConfig(hi2c, DevAddress, (uint8_t)hi2c->XferSize, I2C_RELOAD_MODE, +1304:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** I2C_NO_STARTSTOP); +1305:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } +1306:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** else +1307:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { +1308:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->XferSize = hi2c->XferCount; +1309:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** I2C_TransferConfig(hi2c, DevAddress, (uint8_t)hi2c->XferSize, I2C_AUTOEND_MODE, +1310:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** I2C_NO_STARTSTOP); +1311:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } +1312:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } +1313:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } +1314:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** +1315:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* No need to Check TC flag, with AUTOEND mode the stop is automatically generated */ +1316:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* Wait until STOPF flag is set */ +1317:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** if (I2C_WaitOnSTOPFlagUntilTimeout(hi2c, Timeout, tickstart) != HAL_OK) +1318:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { +1319:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** return HAL_ERROR; +1320:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } +1321:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** +1322:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* Clear STOP Flag */ +1323:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** __HAL_I2C_CLEAR_FLAG(hi2c, I2C_FLAG_STOPF); +1324:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** +1325:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* Clear Configuration Register 2 */ +1326:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** I2C_RESET_CR2(hi2c); +1327:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** +1328:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->State = HAL_I2C_STATE_READY; +1329:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->Mode = HAL_I2C_MODE_NONE; +1330:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** +1331:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* Process Unlocked */ +1332:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** __HAL_UNLOCK(hi2c); +1333:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** +1334:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** return HAL_OK; +1335:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } +1336:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** else +1337:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { +1338:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** return HAL_BUSY; +1339:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } +1340:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } +1341:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** +1342:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /** +1343:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** * @brief Transmits in slave mode an amount of data in blocking mode. + ARM GAS /tmp/ccuRhBPx.s page 25 + + +1344:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** * @param hi2c Pointer to a I2C_HandleTypeDef structure that contains +1345:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** * the configuration information for the specified I2C. +1346:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** * @param pData Pointer to data buffer +1347:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** * @param Size Amount of data to be sent +1348:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** * @param Timeout Timeout duration +1349:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** * @retval HAL status +1350:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** */ +1351:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** HAL_StatusTypeDef HAL_I2C_Slave_Transmit(I2C_HandleTypeDef *hi2c, uint8_t *pData, uint16_t Size, +1352:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** uint32_t Timeout) +1353:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { +1354:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** uint32_t tickstart; +1355:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** +1356:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** if (hi2c->State == HAL_I2C_STATE_READY) +1357:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { +1358:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** if ((pData == NULL) || (Size == 0U)) +1359:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { +1360:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->ErrorCode = HAL_I2C_ERROR_INVALID_PARAM; +1361:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** return HAL_ERROR; +1362:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } +1363:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* Process Locked */ +1364:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** __HAL_LOCK(hi2c); +1365:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** +1366:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* Init tickstart for timeout management*/ +1367:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** tickstart = HAL_GetTick(); +1368:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** +1369:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->State = HAL_I2C_STATE_BUSY_TX; +1370:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->Mode = HAL_I2C_MODE_SLAVE; +1371:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->ErrorCode = HAL_I2C_ERROR_NONE; +1372:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** +1373:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* Prepare transfer parameters */ +1374:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->pBuffPtr = pData; +1375:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->XferCount = Size; +1376:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->XferISR = NULL; +1377:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** +1378:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* Enable Address Acknowledge */ +1379:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->Instance->CR2 &= ~I2C_CR2_NACK; +1380:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** +1381:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* Wait until ADDR flag is set */ +1382:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** if (I2C_WaitOnFlagUntilTimeout(hi2c, I2C_FLAG_ADDR, RESET, Timeout, tickstart) != HAL_OK) +1383:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { +1384:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* Disable Address Acknowledge */ +1385:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->Instance->CR2 |= I2C_CR2_NACK; +1386:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** return HAL_ERROR; +1387:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } +1388:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** +1389:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* Preload TX data if no stretch enable */ +1390:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** if (hi2c->Init.NoStretchMode == I2C_NOSTRETCH_ENABLE) +1391:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { +1392:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* Preload TX register */ +1393:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* Write data to TXDR */ +1394:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->Instance->TXDR = *hi2c->pBuffPtr; +1395:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** +1396:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* Increment Buffer pointer */ +1397:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->pBuffPtr++; +1398:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** +1399:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->XferCount--; +1400:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } + ARM GAS /tmp/ccuRhBPx.s page 26 + + +1401:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** +1402:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* Clear ADDR flag */ +1403:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** __HAL_I2C_CLEAR_FLAG(hi2c, I2C_FLAG_ADDR); +1404:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** +1405:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* If 10bit addressing mode is selected */ +1406:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** if (hi2c->Init.AddressingMode == I2C_ADDRESSINGMODE_10BIT) +1407:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { +1408:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* Wait until ADDR flag is set */ +1409:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** if (I2C_WaitOnFlagUntilTimeout(hi2c, I2C_FLAG_ADDR, RESET, Timeout, tickstart) != HAL_OK) +1410:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { +1411:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* Disable Address Acknowledge */ +1412:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->Instance->CR2 |= I2C_CR2_NACK; +1413:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** return HAL_ERROR; +1414:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } +1415:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** +1416:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* Clear ADDR flag */ +1417:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** __HAL_I2C_CLEAR_FLAG(hi2c, I2C_FLAG_ADDR); +1418:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } +1419:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** +1420:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* Wait until DIR flag is set Transmitter mode */ +1421:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** if (I2C_WaitOnFlagUntilTimeout(hi2c, I2C_FLAG_DIR, RESET, Timeout, tickstart) != HAL_OK) +1422:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { +1423:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* Disable Address Acknowledge */ +1424:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->Instance->CR2 |= I2C_CR2_NACK; +1425:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** return HAL_ERROR; +1426:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } +1427:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** +1428:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** while (hi2c->XferCount > 0U) +1429:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { +1430:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* Wait until TXIS flag is set */ +1431:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** if (I2C_WaitOnTXISFlagUntilTimeout(hi2c, Timeout, tickstart) != HAL_OK) +1432:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { +1433:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* Disable Address Acknowledge */ +1434:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->Instance->CR2 |= I2C_CR2_NACK; +1435:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** return HAL_ERROR; +1436:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } +1437:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** +1438:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* Write data to TXDR */ +1439:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->Instance->TXDR = *hi2c->pBuffPtr; +1440:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** +1441:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* Increment Buffer pointer */ +1442:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->pBuffPtr++; +1443:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** +1444:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->XferCount--; +1445:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } +1446:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** +1447:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* Wait until AF flag is set */ +1448:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** if (I2C_WaitOnFlagUntilTimeout(hi2c, I2C_FLAG_AF, RESET, Timeout, tickstart) != HAL_OK) +1449:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { +1450:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* Disable Address Acknowledge */ +1451:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->Instance->CR2 |= I2C_CR2_NACK; +1452:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** return HAL_ERROR; +1453:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } +1454:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** +1455:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* Flush TX register */ +1456:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** I2C_Flush_TXDR(hi2c); +1457:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + ARM GAS /tmp/ccuRhBPx.s page 27 + + +1458:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* Clear AF flag */ +1459:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** __HAL_I2C_CLEAR_FLAG(hi2c, I2C_FLAG_AF); +1460:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** +1461:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* Wait until STOP flag is set */ +1462:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** if (I2C_WaitOnSTOPFlagUntilTimeout(hi2c, Timeout, tickstart) != HAL_OK) +1463:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { +1464:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* Disable Address Acknowledge */ +1465:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->Instance->CR2 |= I2C_CR2_NACK; +1466:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** +1467:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** return HAL_ERROR; +1468:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } +1469:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** +1470:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* Clear STOP flag */ +1471:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** __HAL_I2C_CLEAR_FLAG(hi2c, I2C_FLAG_STOPF); +1472:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** +1473:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* Wait until BUSY flag is reset */ +1474:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** if (I2C_WaitOnFlagUntilTimeout(hi2c, I2C_FLAG_BUSY, SET, Timeout, tickstart) != HAL_OK) +1475:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { +1476:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* Disable Address Acknowledge */ +1477:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->Instance->CR2 |= I2C_CR2_NACK; +1478:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** return HAL_ERROR; +1479:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } +1480:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** +1481:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* Disable Address Acknowledge */ +1482:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->Instance->CR2 |= I2C_CR2_NACK; +1483:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** +1484:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->State = HAL_I2C_STATE_READY; +1485:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->Mode = HAL_I2C_MODE_NONE; +1486:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** +1487:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* Process Unlocked */ +1488:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** __HAL_UNLOCK(hi2c); +1489:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** +1490:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** return HAL_OK; +1491:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } +1492:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** else +1493:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { +1494:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** return HAL_BUSY; +1495:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } +1496:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } +1497:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** +1498:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /** +1499:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** * @brief Receive in slave mode an amount of data in blocking mode +1500:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** * @param hi2c Pointer to a I2C_HandleTypeDef structure that contains +1501:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** * the configuration information for the specified I2C. +1502:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** * @param pData Pointer to data buffer +1503:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** * @param Size Amount of data to be sent +1504:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** * @param Timeout Timeout duration +1505:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** * @retval HAL status +1506:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** */ +1507:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** HAL_StatusTypeDef HAL_I2C_Slave_Receive(I2C_HandleTypeDef *hi2c, uint8_t *pData, uint16_t Size, +1508:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** uint32_t Timeout) +1509:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { +1510:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** uint32_t tickstart; +1511:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** +1512:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** if (hi2c->State == HAL_I2C_STATE_READY) +1513:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { +1514:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** if ((pData == NULL) || (Size == 0U)) + ARM GAS /tmp/ccuRhBPx.s page 28 + + +1515:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { +1516:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->ErrorCode = HAL_I2C_ERROR_INVALID_PARAM; +1517:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** return HAL_ERROR; +1518:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } +1519:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* Process Locked */ +1520:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** __HAL_LOCK(hi2c); +1521:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** +1522:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* Init tickstart for timeout management*/ +1523:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** tickstart = HAL_GetTick(); +1524:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** +1525:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->State = HAL_I2C_STATE_BUSY_RX; +1526:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->Mode = HAL_I2C_MODE_SLAVE; +1527:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->ErrorCode = HAL_I2C_ERROR_NONE; +1528:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** +1529:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* Prepare transfer parameters */ +1530:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->pBuffPtr = pData; +1531:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->XferCount = Size; +1532:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->XferSize = hi2c->XferCount; +1533:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->XferISR = NULL; +1534:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** +1535:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* Enable Address Acknowledge */ +1536:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->Instance->CR2 &= ~I2C_CR2_NACK; +1537:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** +1538:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* Wait until ADDR flag is set */ +1539:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** if (I2C_WaitOnFlagUntilTimeout(hi2c, I2C_FLAG_ADDR, RESET, Timeout, tickstart) != HAL_OK) +1540:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { +1541:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* Disable Address Acknowledge */ +1542:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->Instance->CR2 |= I2C_CR2_NACK; +1543:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** return HAL_ERROR; +1544:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } +1545:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** +1546:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* Clear ADDR flag */ +1547:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** __HAL_I2C_CLEAR_FLAG(hi2c, I2C_FLAG_ADDR); +1548:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** +1549:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* Wait until DIR flag is reset Receiver mode */ +1550:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** if (I2C_WaitOnFlagUntilTimeout(hi2c, I2C_FLAG_DIR, SET, Timeout, tickstart) != HAL_OK) +1551:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { +1552:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* Disable Address Acknowledge */ +1553:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->Instance->CR2 |= I2C_CR2_NACK; +1554:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** return HAL_ERROR; +1555:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } +1556:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** +1557:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** while (hi2c->XferCount > 0U) +1558:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { +1559:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* Wait until RXNE flag is set */ +1560:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** if (I2C_WaitOnRXNEFlagUntilTimeout(hi2c, Timeout, tickstart) != HAL_OK) +1561:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { +1562:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* Disable Address Acknowledge */ +1563:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->Instance->CR2 |= I2C_CR2_NACK; +1564:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** +1565:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* Store Last receive data if any */ +1566:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** if (__HAL_I2C_GET_FLAG(hi2c, I2C_FLAG_RXNE) == SET) +1567:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { +1568:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* Read data from RXDR */ +1569:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** *hi2c->pBuffPtr = (uint8_t)hi2c->Instance->RXDR; +1570:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** +1571:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* Increment Buffer pointer */ + ARM GAS /tmp/ccuRhBPx.s page 29 + + +1572:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->pBuffPtr++; +1573:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** +1574:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->XferCount--; +1575:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->XferSize--; +1576:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } +1577:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** +1578:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** return HAL_ERROR; +1579:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } +1580:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** +1581:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* Read data from RXDR */ +1582:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** *hi2c->pBuffPtr = (uint8_t)hi2c->Instance->RXDR; +1583:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** +1584:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* Increment Buffer pointer */ +1585:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->pBuffPtr++; +1586:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** +1587:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->XferCount--; +1588:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->XferSize--; +1589:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } +1590:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** +1591:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* Wait until STOP flag is set */ +1592:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** if (I2C_WaitOnSTOPFlagUntilTimeout(hi2c, Timeout, tickstart) != HAL_OK) +1593:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { +1594:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* Disable Address Acknowledge */ +1595:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->Instance->CR2 |= I2C_CR2_NACK; +1596:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** return HAL_ERROR; +1597:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } +1598:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** +1599:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* Clear STOP flag */ +1600:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** __HAL_I2C_CLEAR_FLAG(hi2c, I2C_FLAG_STOPF); +1601:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** +1602:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* Wait until BUSY flag is reset */ +1603:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** if (I2C_WaitOnFlagUntilTimeout(hi2c, I2C_FLAG_BUSY, SET, Timeout, tickstart) != HAL_OK) +1604:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { +1605:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* Disable Address Acknowledge */ +1606:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->Instance->CR2 |= I2C_CR2_NACK; +1607:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** return HAL_ERROR; +1608:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } +1609:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** +1610:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* Disable Address Acknowledge */ +1611:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->Instance->CR2 |= I2C_CR2_NACK; +1612:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** +1613:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->State = HAL_I2C_STATE_READY; +1614:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->Mode = HAL_I2C_MODE_NONE; +1615:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** +1616:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* Process Unlocked */ +1617:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** __HAL_UNLOCK(hi2c); +1618:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** +1619:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** return HAL_OK; +1620:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } +1621:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** else +1622:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { +1623:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** return HAL_BUSY; +1624:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } +1625:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } +1626:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** +1627:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /** +1628:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** * @brief Transmit in master mode an amount of data in non-blocking mode with Interrupt + ARM GAS /tmp/ccuRhBPx.s page 30 + + +1629:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** * @param hi2c Pointer to a I2C_HandleTypeDef structure that contains +1630:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** * the configuration information for the specified I2C. +1631:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** * @param DevAddress Target device address: The device 7 bits address value +1632:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** * in datasheet must be shifted to the left before calling the interface +1633:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** * @param pData Pointer to data buffer +1634:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** * @param Size Amount of data to be sent +1635:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** * @retval HAL status +1636:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** */ +1637:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** HAL_StatusTypeDef HAL_I2C_Master_Transmit_IT(I2C_HandleTypeDef *hi2c, uint16_t DevAddress, uint8_t +1638:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** uint16_t Size) +1639:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { +1640:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** uint32_t xfermode; +1641:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** +1642:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** if (hi2c->State == HAL_I2C_STATE_READY) +1643:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { +1644:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** if (__HAL_I2C_GET_FLAG(hi2c, I2C_FLAG_BUSY) == SET) +1645:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { +1646:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** return HAL_BUSY; +1647:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } +1648:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** +1649:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* Process Locked */ +1650:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** __HAL_LOCK(hi2c); +1651:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** +1652:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->State = HAL_I2C_STATE_BUSY_TX; +1653:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->Mode = HAL_I2C_MODE_MASTER; +1654:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->ErrorCode = HAL_I2C_ERROR_NONE; +1655:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** +1656:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* Prepare transfer parameters */ +1657:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->pBuffPtr = pData; +1658:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->XferCount = Size; +1659:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->XferOptions = I2C_NO_OPTION_FRAME; +1660:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->XferISR = I2C_Master_ISR_IT; +1661:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** +1662:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** if (hi2c->XferCount > MAX_NBYTE_SIZE) +1663:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { +1664:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->XferSize = MAX_NBYTE_SIZE; +1665:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** xfermode = I2C_RELOAD_MODE; +1666:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } +1667:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** else +1668:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { +1669:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->XferSize = hi2c->XferCount; +1670:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** xfermode = I2C_AUTOEND_MODE; +1671:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } +1672:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** +1673:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* Send Slave Address */ +1674:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* Set NBYTES to write and reload if hi2c->XferCount > MAX_NBYTE_SIZE */ +1675:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** I2C_TransferConfig(hi2c, DevAddress, (uint8_t)hi2c->XferSize, xfermode, I2C_GENERATE_START_WRIT +1676:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** +1677:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* Process Unlocked */ +1678:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** __HAL_UNLOCK(hi2c); +1679:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** +1680:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* Note : The I2C interrupts must be enabled after unlocking current process +1681:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** to avoid the risk of I2C interrupt handle execution before current +1682:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** process unlock */ +1683:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** +1684:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* Enable ERR, TC, STOP, NACK, TXI interrupt */ +1685:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* possible to enable all of these */ + ARM GAS /tmp/ccuRhBPx.s page 31 + + +1686:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* I2C_IT_ERRI | I2C_IT_TCI | I2C_IT_STOPI | I2C_IT_NACKI | +1687:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** I2C_IT_ADDRI | I2C_IT_RXI | I2C_IT_TXI */ +1688:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** I2C_Enable_IRQ(hi2c, I2C_XFER_TX_IT); +1689:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** +1690:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** return HAL_OK; +1691:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } +1692:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** else +1693:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { +1694:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** return HAL_BUSY; +1695:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } +1696:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } +1697:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** +1698:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /** +1699:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** * @brief Receive in master mode an amount of data in non-blocking mode with Interrupt +1700:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** * @param hi2c Pointer to a I2C_HandleTypeDef structure that contains +1701:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** * the configuration information for the specified I2C. +1702:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** * @param DevAddress Target device address: The device 7 bits address value +1703:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** * in datasheet must be shifted to the left before calling the interface +1704:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** * @param pData Pointer to data buffer +1705:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** * @param Size Amount of data to be sent +1706:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** * @retval HAL status +1707:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** */ +1708:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** HAL_StatusTypeDef HAL_I2C_Master_Receive_IT(I2C_HandleTypeDef *hi2c, uint16_t DevAddress, uint8_t * +1709:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** uint16_t Size) +1710:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { +1711:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** uint32_t xfermode; +1712:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** +1713:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** if (hi2c->State == HAL_I2C_STATE_READY) +1714:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { +1715:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** if (__HAL_I2C_GET_FLAG(hi2c, I2C_FLAG_BUSY) == SET) +1716:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { +1717:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** return HAL_BUSY; +1718:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } +1719:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** +1720:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* Process Locked */ +1721:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** __HAL_LOCK(hi2c); +1722:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** +1723:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->State = HAL_I2C_STATE_BUSY_RX; +1724:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->Mode = HAL_I2C_MODE_MASTER; +1725:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->ErrorCode = HAL_I2C_ERROR_NONE; +1726:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** +1727:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* Prepare transfer parameters */ +1728:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->pBuffPtr = pData; +1729:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->XferCount = Size; +1730:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->XferOptions = I2C_NO_OPTION_FRAME; +1731:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->XferISR = I2C_Master_ISR_IT; +1732:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** +1733:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** if (hi2c->XferCount > MAX_NBYTE_SIZE) +1734:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { +1735:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->XferSize = MAX_NBYTE_SIZE; +1736:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** xfermode = I2C_RELOAD_MODE; +1737:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } +1738:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** else +1739:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { +1740:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->XferSize = hi2c->XferCount; +1741:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** xfermode = I2C_AUTOEND_MODE; +1742:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } + ARM GAS /tmp/ccuRhBPx.s page 32 + + +1743:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** +1744:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* Send Slave Address */ +1745:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* Set NBYTES to write and reload if hi2c->XferCount > MAX_NBYTE_SIZE */ +1746:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** I2C_TransferConfig(hi2c, DevAddress, (uint8_t)hi2c->XferSize, xfermode, I2C_GENERATE_START_READ +1747:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** +1748:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* Process Unlocked */ +1749:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** __HAL_UNLOCK(hi2c); +1750:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** +1751:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* Note : The I2C interrupts must be enabled after unlocking current process +1752:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** to avoid the risk of I2C interrupt handle execution before current +1753:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** process unlock */ +1754:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** +1755:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* Enable ERR, TC, STOP, NACK, RXI interrupt */ +1756:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* possible to enable all of these */ +1757:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* I2C_IT_ERRI | I2C_IT_TCI | I2C_IT_STOPI | I2C_IT_NACKI | +1758:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** I2C_IT_ADDRI | I2C_IT_RXI | I2C_IT_TXI */ +1759:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** I2C_Enable_IRQ(hi2c, I2C_XFER_RX_IT); +1760:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** +1761:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** return HAL_OK; +1762:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } +1763:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** else +1764:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { +1765:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** return HAL_BUSY; +1766:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } +1767:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } +1768:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** +1769:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /** +1770:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** * @brief Transmit in slave mode an amount of data in non-blocking mode with Interrupt +1771:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** * @param hi2c Pointer to a I2C_HandleTypeDef structure that contains +1772:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** * the configuration information for the specified I2C. +1773:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** * @param pData Pointer to data buffer +1774:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** * @param Size Amount of data to be sent +1775:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** * @retval HAL status +1776:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** */ +1777:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** HAL_StatusTypeDef HAL_I2C_Slave_Transmit_IT(I2C_HandleTypeDef *hi2c, uint8_t *pData, uint16_t Size) +1778:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { +1779:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** if (hi2c->State == HAL_I2C_STATE_READY) +1780:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { +1781:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* Process Locked */ +1782:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** __HAL_LOCK(hi2c); +1783:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** +1784:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->State = HAL_I2C_STATE_BUSY_TX; +1785:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->Mode = HAL_I2C_MODE_SLAVE; +1786:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->ErrorCode = HAL_I2C_ERROR_NONE; +1787:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** +1788:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* Enable Address Acknowledge */ +1789:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->Instance->CR2 &= ~I2C_CR2_NACK; +1790:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** +1791:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* Prepare transfer parameters */ +1792:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->pBuffPtr = pData; +1793:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->XferCount = Size; +1794:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->XferSize = hi2c->XferCount; +1795:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->XferOptions = I2C_NO_OPTION_FRAME; +1796:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->XferISR = I2C_Slave_ISR_IT; +1797:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** +1798:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* Preload TX data if no stretch enable */ +1799:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** if (hi2c->Init.NoStretchMode == I2C_NOSTRETCH_ENABLE) + ARM GAS /tmp/ccuRhBPx.s page 33 + + +1800:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { +1801:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* Preload TX register */ +1802:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* Write data to TXDR */ +1803:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->Instance->TXDR = *hi2c->pBuffPtr; +1804:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** +1805:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* Increment Buffer pointer */ +1806:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->pBuffPtr++; +1807:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** +1808:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->XferCount--; +1809:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->XferSize--; +1810:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } +1811:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** +1812:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* Process Unlocked */ +1813:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** __HAL_UNLOCK(hi2c); +1814:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** +1815:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* Note : The I2C interrupts must be enabled after unlocking current process +1816:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** to avoid the risk of I2C interrupt handle execution before current +1817:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** process unlock */ +1818:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** +1819:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* Enable ERR, TC, STOP, NACK, TXI interrupt */ +1820:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* possible to enable all of these */ +1821:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* I2C_IT_ERRI | I2C_IT_TCI | I2C_IT_STOPI | I2C_IT_NACKI | +1822:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** I2C_IT_ADDRI | I2C_IT_RXI | I2C_IT_TXI */ +1823:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** I2C_Enable_IRQ(hi2c, I2C_XFER_TX_IT | I2C_XFER_LISTEN_IT); +1824:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** +1825:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** return HAL_OK; +1826:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } +1827:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** else +1828:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { +1829:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** return HAL_BUSY; +1830:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } +1831:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } +1832:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** +1833:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /** +1834:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** * @brief Receive in slave mode an amount of data in non-blocking mode with Interrupt +1835:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** * @param hi2c Pointer to a I2C_HandleTypeDef structure that contains +1836:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** * the configuration information for the specified I2C. +1837:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** * @param pData Pointer to data buffer +1838:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** * @param Size Amount of data to be sent +1839:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** * @retval HAL status +1840:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** */ +1841:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** HAL_StatusTypeDef HAL_I2C_Slave_Receive_IT(I2C_HandleTypeDef *hi2c, uint8_t *pData, uint16_t Size) +1842:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { +1843:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** if (hi2c->State == HAL_I2C_STATE_READY) +1844:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { +1845:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* Process Locked */ +1846:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** __HAL_LOCK(hi2c); +1847:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** +1848:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->State = HAL_I2C_STATE_BUSY_RX; +1849:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->Mode = HAL_I2C_MODE_SLAVE; +1850:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->ErrorCode = HAL_I2C_ERROR_NONE; +1851:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** +1852:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* Enable Address Acknowledge */ +1853:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->Instance->CR2 &= ~I2C_CR2_NACK; +1854:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** +1855:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* Prepare transfer parameters */ +1856:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->pBuffPtr = pData; + ARM GAS /tmp/ccuRhBPx.s page 34 + + +1857:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->XferCount = Size; +1858:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->XferSize = hi2c->XferCount; +1859:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->XferOptions = I2C_NO_OPTION_FRAME; +1860:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->XferISR = I2C_Slave_ISR_IT; +1861:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** +1862:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* Process Unlocked */ +1863:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** __HAL_UNLOCK(hi2c); +1864:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** +1865:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* Note : The I2C interrupts must be enabled after unlocking current process +1866:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** to avoid the risk of I2C interrupt handle execution before current +1867:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** process unlock */ +1868:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** +1869:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* Enable ERR, TC, STOP, NACK, RXI interrupt */ +1870:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* possible to enable all of these */ +1871:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* I2C_IT_ERRI | I2C_IT_TCI | I2C_IT_STOPI | I2C_IT_NACKI | +1872:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** I2C_IT_ADDRI | I2C_IT_RXI | I2C_IT_TXI */ +1873:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** I2C_Enable_IRQ(hi2c, I2C_XFER_RX_IT | I2C_XFER_LISTEN_IT); +1874:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** +1875:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** return HAL_OK; +1876:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } +1877:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** else +1878:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { +1879:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** return HAL_BUSY; +1880:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } +1881:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } +1882:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** +1883:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /** +1884:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** * @brief Transmit in master mode an amount of data in non-blocking mode with DMA +1885:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** * @param hi2c Pointer to a I2C_HandleTypeDef structure that contains +1886:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** * the configuration information for the specified I2C. +1887:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** * @param DevAddress Target device address: The device 7 bits address value +1888:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** * in datasheet must be shifted to the left before calling the interface +1889:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** * @param pData Pointer to data buffer +1890:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** * @param Size Amount of data to be sent +1891:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** * @retval HAL status +1892:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** */ +1893:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** HAL_StatusTypeDef HAL_I2C_Master_Transmit_DMA(I2C_HandleTypeDef *hi2c, uint16_t DevAddress, uint8_t +1894:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** uint16_t Size) +1895:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { +1896:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** uint32_t xfermode; +1897:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** HAL_StatusTypeDef dmaxferstatus; +1898:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** +1899:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** if (hi2c->State == HAL_I2C_STATE_READY) +1900:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { +1901:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** if (__HAL_I2C_GET_FLAG(hi2c, I2C_FLAG_BUSY) == SET) +1902:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { +1903:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** return HAL_BUSY; +1904:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } +1905:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** +1906:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* Process Locked */ +1907:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** __HAL_LOCK(hi2c); +1908:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** +1909:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->State = HAL_I2C_STATE_BUSY_TX; +1910:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->Mode = HAL_I2C_MODE_MASTER; +1911:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->ErrorCode = HAL_I2C_ERROR_NONE; +1912:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** +1913:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* Prepare transfer parameters */ + ARM GAS /tmp/ccuRhBPx.s page 35 + + +1914:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->pBuffPtr = pData; +1915:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->XferCount = Size; +1916:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->XferOptions = I2C_NO_OPTION_FRAME; +1917:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->XferISR = I2C_Master_ISR_DMA; +1918:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** +1919:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** if (hi2c->XferCount > MAX_NBYTE_SIZE) +1920:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { +1921:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->XferSize = MAX_NBYTE_SIZE; +1922:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** xfermode = I2C_RELOAD_MODE; +1923:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } +1924:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** else +1925:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { +1926:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->XferSize = hi2c->XferCount; +1927:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** xfermode = I2C_AUTOEND_MODE; +1928:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } +1929:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** +1930:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** if (hi2c->XferSize > 0U) +1931:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { +1932:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** if (hi2c->hdmatx != NULL) +1933:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { +1934:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* Set the I2C DMA transfer complete callback */ +1935:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->hdmatx->XferCpltCallback = I2C_DMAMasterTransmitCplt; +1936:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** +1937:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* Set the DMA error callback */ +1938:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->hdmatx->XferErrorCallback = I2C_DMAError; +1939:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** +1940:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* Set the unused DMA callbacks to NULL */ +1941:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->hdmatx->XferHalfCpltCallback = NULL; +1942:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->hdmatx->XferAbortCallback = NULL; +1943:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** +1944:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* Enable the DMA channel */ +1945:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** dmaxferstatus = HAL_DMA_Start_IT(hi2c->hdmatx, (uint32_t)pData, (uint32_t)&hi2c->Instance-> +1946:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->XferSize); +1947:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } +1948:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** else +1949:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { +1950:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* Update I2C state */ +1951:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->State = HAL_I2C_STATE_READY; +1952:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->Mode = HAL_I2C_MODE_NONE; +1953:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** +1954:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* Update I2C error code */ +1955:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->ErrorCode |= HAL_I2C_ERROR_DMA_PARAM; +1956:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** +1957:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* Process Unlocked */ +1958:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** __HAL_UNLOCK(hi2c); +1959:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** +1960:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** return HAL_ERROR; +1961:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } +1962:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** +1963:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** if (dmaxferstatus == HAL_OK) +1964:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { +1965:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* Send Slave Address */ +1966:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* Set NBYTES to write and reload if hi2c->XferCount > MAX_NBYTE_SIZE and generate RESTART +1967:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** I2C_TransferConfig(hi2c, DevAddress, (uint8_t)hi2c->XferSize, xfermode, I2C_GENERATE_START_ +1968:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** +1969:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* Update XferCount value */ +1970:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->XferCount -= hi2c->XferSize; + ARM GAS /tmp/ccuRhBPx.s page 36 + + +1971:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** +1972:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* Process Unlocked */ +1973:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** __HAL_UNLOCK(hi2c); +1974:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** +1975:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* Note : The I2C interrupts must be enabled after unlocking current process +1976:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** to avoid the risk of I2C interrupt handle execution before current +1977:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** process unlock */ +1978:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* Enable ERR and NACK interrupts */ +1979:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** I2C_Enable_IRQ(hi2c, I2C_XFER_ERROR_IT); +1980:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** +1981:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* Enable DMA Request */ +1982:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->Instance->CR1 |= I2C_CR1_TXDMAEN; +1983:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } +1984:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** else +1985:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { +1986:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* Update I2C state */ +1987:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->State = HAL_I2C_STATE_READY; +1988:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->Mode = HAL_I2C_MODE_NONE; +1989:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** +1990:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* Update I2C error code */ +1991:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->ErrorCode |= HAL_I2C_ERROR_DMA; +1992:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** +1993:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* Process Unlocked */ +1994:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** __HAL_UNLOCK(hi2c); +1995:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** +1996:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** return HAL_ERROR; +1997:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } +1998:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } +1999:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** else +2000:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { +2001:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* Update Transfer ISR function pointer */ +2002:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->XferISR = I2C_Master_ISR_IT; +2003:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** +2004:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* Send Slave Address */ +2005:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* Set NBYTES to write and generate START condition */ +2006:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** I2C_TransferConfig(hi2c, DevAddress, (uint8_t)hi2c->XferSize, I2C_AUTOEND_MODE, +2007:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** I2C_GENERATE_START_WRITE); +2008:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** +2009:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* Process Unlocked */ +2010:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** __HAL_UNLOCK(hi2c); +2011:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** +2012:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* Note : The I2C interrupts must be enabled after unlocking current process +2013:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** to avoid the risk of I2C interrupt handle execution before current +2014:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** process unlock */ +2015:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* Enable ERR, TC, STOP, NACK, TXI interrupt */ +2016:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* possible to enable all of these */ +2017:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* I2C_IT_ERRI | I2C_IT_TCI | I2C_IT_STOPI | I2C_IT_NACKI | +2018:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** I2C_IT_ADDRI | I2C_IT_RXI | I2C_IT_TXI */ +2019:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** I2C_Enable_IRQ(hi2c, I2C_XFER_TX_IT); +2020:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } +2021:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** +2022:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** return HAL_OK; +2023:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } +2024:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** else +2025:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { +2026:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** return HAL_BUSY; +2027:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } + ARM GAS /tmp/ccuRhBPx.s page 37 + + +2028:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } +2029:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** +2030:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /** +2031:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** * @brief Receive in master mode an amount of data in non-blocking mode with DMA +2032:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** * @param hi2c Pointer to a I2C_HandleTypeDef structure that contains +2033:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** * the configuration information for the specified I2C. +2034:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** * @param DevAddress Target device address: The device 7 bits address value +2035:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** * in datasheet must be shifted to the left before calling the interface +2036:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** * @param pData Pointer to data buffer +2037:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** * @param Size Amount of data to be sent +2038:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** * @retval HAL status +2039:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** */ +2040:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** HAL_StatusTypeDef HAL_I2C_Master_Receive_DMA(I2C_HandleTypeDef *hi2c, uint16_t DevAddress, uint8_t +2041:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** uint16_t Size) +2042:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { +2043:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** uint32_t xfermode; +2044:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** HAL_StatusTypeDef dmaxferstatus; +2045:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** +2046:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** if (hi2c->State == HAL_I2C_STATE_READY) +2047:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { +2048:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** if (__HAL_I2C_GET_FLAG(hi2c, I2C_FLAG_BUSY) == SET) +2049:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { +2050:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** return HAL_BUSY; +2051:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } +2052:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** +2053:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* Process Locked */ +2054:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** __HAL_LOCK(hi2c); +2055:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** +2056:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->State = HAL_I2C_STATE_BUSY_RX; +2057:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->Mode = HAL_I2C_MODE_MASTER; +2058:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->ErrorCode = HAL_I2C_ERROR_NONE; +2059:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** +2060:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* Prepare transfer parameters */ +2061:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->pBuffPtr = pData; +2062:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->XferCount = Size; +2063:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->XferOptions = I2C_NO_OPTION_FRAME; +2064:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->XferISR = I2C_Master_ISR_DMA; +2065:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** +2066:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** if (hi2c->XferCount > MAX_NBYTE_SIZE) +2067:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { +2068:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->XferSize = MAX_NBYTE_SIZE; +2069:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** xfermode = I2C_RELOAD_MODE; +2070:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } +2071:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** else +2072:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { +2073:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->XferSize = hi2c->XferCount; +2074:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** xfermode = I2C_AUTOEND_MODE; +2075:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } +2076:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** +2077:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** if (hi2c->XferSize > 0U) +2078:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { +2079:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** if (hi2c->hdmarx != NULL) +2080:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { +2081:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* Set the I2C DMA transfer complete callback */ +2082:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->hdmarx->XferCpltCallback = I2C_DMAMasterReceiveCplt; +2083:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** +2084:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* Set the DMA error callback */ + ARM GAS /tmp/ccuRhBPx.s page 38 + + +2085:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->hdmarx->XferErrorCallback = I2C_DMAError; +2086:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** +2087:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* Set the unused DMA callbacks to NULL */ +2088:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->hdmarx->XferHalfCpltCallback = NULL; +2089:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->hdmarx->XferAbortCallback = NULL; +2090:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** +2091:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* Enable the DMA channel */ +2092:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** dmaxferstatus = HAL_DMA_Start_IT(hi2c->hdmarx, (uint32_t)&hi2c->Instance->RXDR, (uint32_t)p +2093:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->XferSize); +2094:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } +2095:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** else +2096:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { +2097:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* Update I2C state */ +2098:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->State = HAL_I2C_STATE_READY; +2099:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->Mode = HAL_I2C_MODE_NONE; +2100:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** +2101:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* Update I2C error code */ +2102:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->ErrorCode |= HAL_I2C_ERROR_DMA_PARAM; +2103:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** +2104:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* Process Unlocked */ +2105:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** __HAL_UNLOCK(hi2c); +2106:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** +2107:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** return HAL_ERROR; +2108:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } +2109:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** +2110:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** if (dmaxferstatus == HAL_OK) +2111:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { +2112:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* Send Slave Address */ +2113:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* Set NBYTES to read and reload if hi2c->XferCount > MAX_NBYTE_SIZE and generate RESTART * +2114:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** I2C_TransferConfig(hi2c, DevAddress, (uint8_t)hi2c->XferSize, xfermode, I2C_GENERATE_START_ +2115:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** +2116:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* Update XferCount value */ +2117:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->XferCount -= hi2c->XferSize; +2118:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** +2119:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* Process Unlocked */ +2120:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** __HAL_UNLOCK(hi2c); +2121:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** +2122:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* Note : The I2C interrupts must be enabled after unlocking current process +2123:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** to avoid the risk of I2C interrupt handle execution before current +2124:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** process unlock */ +2125:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* Enable ERR and NACK interrupts */ +2126:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** I2C_Enable_IRQ(hi2c, I2C_XFER_ERROR_IT); +2127:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** +2128:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* Enable DMA Request */ +2129:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->Instance->CR1 |= I2C_CR1_RXDMAEN; +2130:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } +2131:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** else +2132:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { +2133:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* Update I2C state */ +2134:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->State = HAL_I2C_STATE_READY; +2135:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->Mode = HAL_I2C_MODE_NONE; +2136:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** +2137:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* Update I2C error code */ +2138:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->ErrorCode |= HAL_I2C_ERROR_DMA; +2139:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** +2140:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* Process Unlocked */ +2141:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** __HAL_UNLOCK(hi2c); + ARM GAS /tmp/ccuRhBPx.s page 39 + + +2142:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** +2143:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** return HAL_ERROR; +2144:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } +2145:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } +2146:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** else +2147:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { +2148:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* Update Transfer ISR function pointer */ +2149:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->XferISR = I2C_Master_ISR_IT; +2150:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** +2151:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* Send Slave Address */ +2152:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* Set NBYTES to read and generate START condition */ +2153:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** I2C_TransferConfig(hi2c, DevAddress, (uint8_t)hi2c->XferSize, I2C_AUTOEND_MODE, +2154:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** I2C_GENERATE_START_READ); +2155:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** +2156:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* Process Unlocked */ +2157:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** __HAL_UNLOCK(hi2c); +2158:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** +2159:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* Note : The I2C interrupts must be enabled after unlocking current process +2160:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** to avoid the risk of I2C interrupt handle execution before current +2161:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** process unlock */ +2162:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* Enable ERR, TC, STOP, NACK, TXI interrupt */ +2163:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* possible to enable all of these */ +2164:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* I2C_IT_ERRI | I2C_IT_TCI | I2C_IT_STOPI | I2C_IT_NACKI | +2165:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** I2C_IT_ADDRI | I2C_IT_RXI | I2C_IT_TXI */ +2166:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** I2C_Enable_IRQ(hi2c, I2C_XFER_TX_IT); +2167:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } +2168:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** +2169:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** return HAL_OK; +2170:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } +2171:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** else +2172:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { +2173:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** return HAL_BUSY; +2174:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } +2175:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } +2176:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** +2177:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /** +2178:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** * @brief Transmit in slave mode an amount of data in non-blocking mode with DMA +2179:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** * @param hi2c Pointer to a I2C_HandleTypeDef structure that contains +2180:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** * the configuration information for the specified I2C. +2181:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** * @param pData Pointer to data buffer +2182:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** * @param Size Amount of data to be sent +2183:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** * @retval HAL status +2184:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** */ +2185:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** HAL_StatusTypeDef HAL_I2C_Slave_Transmit_DMA(I2C_HandleTypeDef *hi2c, uint8_t *pData, uint16_t Size +2186:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { +2187:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** HAL_StatusTypeDef dmaxferstatus; +2188:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** +2189:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** if (hi2c->State == HAL_I2C_STATE_READY) +2190:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { +2191:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** if ((pData == NULL) || (Size == 0U)) +2192:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { +2193:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->ErrorCode = HAL_I2C_ERROR_INVALID_PARAM; +2194:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** return HAL_ERROR; +2195:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } +2196:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* Process Locked */ +2197:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** __HAL_LOCK(hi2c); +2198:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + ARM GAS /tmp/ccuRhBPx.s page 40 + + +2199:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->State = HAL_I2C_STATE_BUSY_TX; +2200:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->Mode = HAL_I2C_MODE_SLAVE; +2201:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->ErrorCode = HAL_I2C_ERROR_NONE; +2202:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** +2203:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* Prepare transfer parameters */ +2204:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->pBuffPtr = pData; +2205:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->XferCount = Size; +2206:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->XferSize = hi2c->XferCount; +2207:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->XferOptions = I2C_NO_OPTION_FRAME; +2208:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->XferISR = I2C_Slave_ISR_DMA; +2209:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** +2210:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* Preload TX data if no stretch enable */ +2211:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** if (hi2c->Init.NoStretchMode == I2C_NOSTRETCH_ENABLE) +2212:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { +2213:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* Preload TX register */ +2214:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* Write data to TXDR */ +2215:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->Instance->TXDR = *hi2c->pBuffPtr; +2216:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** +2217:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* Increment Buffer pointer */ +2218:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->pBuffPtr++; +2219:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** +2220:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->XferCount--; +2221:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->XferSize--; +2222:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } +2223:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** +2224:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** if (hi2c->XferCount != 0U) +2225:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { +2226:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** if (hi2c->hdmatx != NULL) +2227:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { +2228:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* Set the I2C DMA transfer complete callback */ +2229:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->hdmatx->XferCpltCallback = I2C_DMASlaveTransmitCplt; +2230:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** +2231:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* Set the DMA error callback */ +2232:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->hdmatx->XferErrorCallback = I2C_DMAError; +2233:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** +2234:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* Set the unused DMA callbacks to NULL */ +2235:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->hdmatx->XferHalfCpltCallback = NULL; +2236:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->hdmatx->XferAbortCallback = NULL; +2237:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** +2238:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* Enable the DMA channel */ +2239:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** dmaxferstatus = HAL_DMA_Start_IT(hi2c->hdmatx, +2240:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** (uint32_t)hi2c->pBuffPtr, (uint32_t)&hi2c->Instance->TXDR, +2241:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->XferSize); +2242:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } +2243:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** else +2244:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { +2245:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* Update I2C state */ +2246:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->State = HAL_I2C_STATE_LISTEN; +2247:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->Mode = HAL_I2C_MODE_NONE; +2248:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** +2249:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* Update I2C error code */ +2250:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->ErrorCode |= HAL_I2C_ERROR_DMA_PARAM; +2251:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** +2252:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* Process Unlocked */ +2253:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** __HAL_UNLOCK(hi2c); +2254:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** +2255:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** return HAL_ERROR; + ARM GAS /tmp/ccuRhBPx.s page 41 + + +2256:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } +2257:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** +2258:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** if (dmaxferstatus == HAL_OK) +2259:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { +2260:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* Enable Address Acknowledge */ +2261:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->Instance->CR2 &= ~I2C_CR2_NACK; +2262:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** +2263:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* Process Unlocked */ +2264:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** __HAL_UNLOCK(hi2c); +2265:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** +2266:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* Note : The I2C interrupts must be enabled after unlocking current process +2267:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** to avoid the risk of I2C interrupt handle execution before current +2268:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** process unlock */ +2269:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* Enable ERR, STOP, NACK, ADDR interrupts */ +2270:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** I2C_Enable_IRQ(hi2c, I2C_XFER_LISTEN_IT); +2271:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** +2272:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* Enable DMA Request */ +2273:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->Instance->CR1 |= I2C_CR1_TXDMAEN; +2274:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } +2275:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** else +2276:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { +2277:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* Update I2C state */ +2278:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->State = HAL_I2C_STATE_LISTEN; +2279:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->Mode = HAL_I2C_MODE_NONE; +2280:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** +2281:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* Update I2C error code */ +2282:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->ErrorCode |= HAL_I2C_ERROR_DMA; +2283:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** +2284:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* Process Unlocked */ +2285:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** __HAL_UNLOCK(hi2c); +2286:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** +2287:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** return HAL_ERROR; +2288:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } +2289:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } +2290:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** else +2291:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { +2292:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* Enable Address Acknowledge */ +2293:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->Instance->CR2 &= ~I2C_CR2_NACK; +2294:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** +2295:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* Process Unlocked */ +2296:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** __HAL_UNLOCK(hi2c); +2297:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** +2298:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* Note : The I2C interrupts must be enabled after unlocking current process +2299:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** to avoid the risk of I2C interrupt handle execution before current +2300:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** process unlock */ +2301:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* Enable ERR, STOP, NACK, ADDR interrupts */ +2302:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** I2C_Enable_IRQ(hi2c, I2C_XFER_LISTEN_IT); +2303:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } +2304:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** +2305:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** return HAL_OK; +2306:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } +2307:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** else +2308:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { +2309:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** return HAL_BUSY; +2310:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } +2311:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } +2312:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + ARM GAS /tmp/ccuRhBPx.s page 42 + + +2313:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /** +2314:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** * @brief Receive in slave mode an amount of data in non-blocking mode with DMA +2315:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** * @param hi2c Pointer to a I2C_HandleTypeDef structure that contains +2316:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** * the configuration information for the specified I2C. +2317:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** * @param pData Pointer to data buffer +2318:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** * @param Size Amount of data to be sent +2319:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** * @retval HAL status +2320:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** */ +2321:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** HAL_StatusTypeDef HAL_I2C_Slave_Receive_DMA(I2C_HandleTypeDef *hi2c, uint8_t *pData, uint16_t Size) +2322:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { +2323:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** HAL_StatusTypeDef dmaxferstatus; +2324:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** +2325:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** if (hi2c->State == HAL_I2C_STATE_READY) +2326:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { +2327:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** if ((pData == NULL) || (Size == 0U)) +2328:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { +2329:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->ErrorCode = HAL_I2C_ERROR_INVALID_PARAM; +2330:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** return HAL_ERROR; +2331:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } +2332:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* Process Locked */ +2333:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** __HAL_LOCK(hi2c); +2334:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** +2335:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->State = HAL_I2C_STATE_BUSY_RX; +2336:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->Mode = HAL_I2C_MODE_SLAVE; +2337:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->ErrorCode = HAL_I2C_ERROR_NONE; +2338:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** +2339:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* Prepare transfer parameters */ +2340:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->pBuffPtr = pData; +2341:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->XferCount = Size; +2342:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->XferSize = hi2c->XferCount; +2343:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->XferOptions = I2C_NO_OPTION_FRAME; +2344:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->XferISR = I2C_Slave_ISR_DMA; +2345:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** +2346:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** if (hi2c->hdmarx != NULL) +2347:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { +2348:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* Set the I2C DMA transfer complete callback */ +2349:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->hdmarx->XferCpltCallback = I2C_DMASlaveReceiveCplt; +2350:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** +2351:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* Set the DMA error callback */ +2352:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->hdmarx->XferErrorCallback = I2C_DMAError; +2353:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** +2354:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* Set the unused DMA callbacks to NULL */ +2355:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->hdmarx->XferHalfCpltCallback = NULL; +2356:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->hdmarx->XferAbortCallback = NULL; +2357:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** +2358:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* Enable the DMA channel */ +2359:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** dmaxferstatus = HAL_DMA_Start_IT(hi2c->hdmarx, (uint32_t)&hi2c->Instance->RXDR, (uint32_t)pDa +2360:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->XferSize); +2361:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } +2362:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** else +2363:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { +2364:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* Update I2C state */ +2365:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->State = HAL_I2C_STATE_LISTEN; +2366:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->Mode = HAL_I2C_MODE_NONE; +2367:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** +2368:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* Update I2C error code */ +2369:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->ErrorCode |= HAL_I2C_ERROR_DMA_PARAM; + ARM GAS /tmp/ccuRhBPx.s page 43 + + +2370:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** +2371:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* Process Unlocked */ +2372:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** __HAL_UNLOCK(hi2c); +2373:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** +2374:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** return HAL_ERROR; +2375:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } +2376:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** +2377:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** if (dmaxferstatus == HAL_OK) +2378:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { +2379:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* Enable Address Acknowledge */ +2380:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->Instance->CR2 &= ~I2C_CR2_NACK; +2381:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** +2382:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* Process Unlocked */ +2383:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** __HAL_UNLOCK(hi2c); +2384:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** +2385:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* Note : The I2C interrupts must be enabled after unlocking current process +2386:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** to avoid the risk of I2C interrupt handle execution before current +2387:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** process unlock */ +2388:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* Enable ERR, STOP, NACK, ADDR interrupts */ +2389:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** I2C_Enable_IRQ(hi2c, I2C_XFER_LISTEN_IT); +2390:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** +2391:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* Enable DMA Request */ +2392:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->Instance->CR1 |= I2C_CR1_RXDMAEN; +2393:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } +2394:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** else +2395:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { +2396:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* Update I2C state */ +2397:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->State = HAL_I2C_STATE_LISTEN; +2398:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->Mode = HAL_I2C_MODE_NONE; +2399:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** +2400:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* Update I2C error code */ +2401:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->ErrorCode |= HAL_I2C_ERROR_DMA; +2402:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** +2403:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* Process Unlocked */ +2404:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** __HAL_UNLOCK(hi2c); +2405:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** +2406:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** return HAL_ERROR; +2407:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } +2408:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** +2409:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** return HAL_OK; +2410:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } +2411:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** else +2412:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { +2413:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** return HAL_BUSY; +2414:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } +2415:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } +2416:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** +2417:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /** +2418:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** * @brief Write an amount of data in blocking mode to a specific memory address +2419:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** * @param hi2c Pointer to a I2C_HandleTypeDef structure that contains +2420:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** * the configuration information for the specified I2C. +2421:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** * @param DevAddress Target device address: The device 7 bits address value +2422:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** * in datasheet must be shifted to the left before calling the interface +2423:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** * @param MemAddress Internal memory address +2424:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** * @param MemAddSize Size of internal memory address +2425:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** * @param pData Pointer to data buffer +2426:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** * @param Size Amount of data to be sent + ARM GAS /tmp/ccuRhBPx.s page 44 + + +2427:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** * @param Timeout Timeout duration +2428:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** * @retval HAL status +2429:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** */ +2430:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** HAL_StatusTypeDef HAL_I2C_Mem_Write(I2C_HandleTypeDef *hi2c, uint16_t DevAddress, uint16_t MemAddre +2431:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** uint16_t MemAddSize, uint8_t *pData, uint16_t Size, uint32_t Ti +2432:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { +2433:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** uint32_t tickstart; +2434:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** +2435:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* Check the parameters */ +2436:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** assert_param(IS_I2C_MEMADD_SIZE(MemAddSize)); +2437:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** +2438:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** if (hi2c->State == HAL_I2C_STATE_READY) +2439:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { +2440:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** if ((pData == NULL) || (Size == 0U)) +2441:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { +2442:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->ErrorCode = HAL_I2C_ERROR_INVALID_PARAM; +2443:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** return HAL_ERROR; +2444:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } +2445:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** +2446:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* Process Locked */ +2447:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** __HAL_LOCK(hi2c); +2448:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** +2449:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* Init tickstart for timeout management*/ +2450:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** tickstart = HAL_GetTick(); +2451:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** +2452:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** if (I2C_WaitOnFlagUntilTimeout(hi2c, I2C_FLAG_BUSY, SET, I2C_TIMEOUT_BUSY, tickstart) != HAL_OK +2453:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { +2454:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** return HAL_ERROR; +2455:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } +2456:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** +2457:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->State = HAL_I2C_STATE_BUSY_TX; +2458:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->Mode = HAL_I2C_MODE_MEM; +2459:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->ErrorCode = HAL_I2C_ERROR_NONE; +2460:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** +2461:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* Prepare transfer parameters */ +2462:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->pBuffPtr = pData; +2463:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->XferCount = Size; +2464:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->XferISR = NULL; +2465:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** +2466:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* Send Slave Address and Memory Address */ +2467:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** if (I2C_RequestMemoryWrite(hi2c, DevAddress, MemAddress, MemAddSize, Timeout, tickstart) != HAL +2468:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { +2469:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* Process Unlocked */ +2470:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** __HAL_UNLOCK(hi2c); +2471:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** return HAL_ERROR; +2472:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } +2473:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** +2474:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* Set NBYTES to write and reload if hi2c->XferCount > MAX_NBYTE_SIZE */ +2475:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** if (hi2c->XferCount > MAX_NBYTE_SIZE) +2476:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { +2477:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->XferSize = MAX_NBYTE_SIZE; +2478:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** I2C_TransferConfig(hi2c, DevAddress, (uint8_t)hi2c->XferSize, I2C_RELOAD_MODE, I2C_NO_STARTST +2479:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } +2480:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** else +2481:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { +2482:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->XferSize = hi2c->XferCount; +2483:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** I2C_TransferConfig(hi2c, DevAddress, (uint8_t)hi2c->XferSize, I2C_AUTOEND_MODE, I2C_NO_STARTS + ARM GAS /tmp/ccuRhBPx.s page 45 + + +2484:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } +2485:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** +2486:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** do +2487:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { +2488:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* Wait until TXIS flag is set */ +2489:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** if (I2C_WaitOnTXISFlagUntilTimeout(hi2c, Timeout, tickstart) != HAL_OK) +2490:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { +2491:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** return HAL_ERROR; +2492:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } +2493:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** +2494:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* Write data to TXDR */ +2495:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->Instance->TXDR = *hi2c->pBuffPtr; +2496:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** +2497:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* Increment Buffer pointer */ +2498:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->pBuffPtr++; +2499:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** +2500:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->XferCount--; +2501:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->XferSize--; +2502:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** +2503:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** if ((hi2c->XferCount != 0U) && (hi2c->XferSize == 0U)) +2504:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { +2505:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* Wait until TCR flag is set */ +2506:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** if (I2C_WaitOnFlagUntilTimeout(hi2c, I2C_FLAG_TCR, RESET, Timeout, tickstart) != HAL_OK) +2507:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { +2508:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** return HAL_ERROR; +2509:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } +2510:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** +2511:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** if (hi2c->XferCount > MAX_NBYTE_SIZE) +2512:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { +2513:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->XferSize = MAX_NBYTE_SIZE; +2514:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** I2C_TransferConfig(hi2c, DevAddress, (uint8_t)hi2c->XferSize, I2C_RELOAD_MODE, +2515:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** I2C_NO_STARTSTOP); +2516:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } +2517:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** else +2518:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { +2519:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->XferSize = hi2c->XferCount; +2520:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** I2C_TransferConfig(hi2c, DevAddress, (uint8_t)hi2c->XferSize, I2C_AUTOEND_MODE, +2521:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** I2C_NO_STARTSTOP); +2522:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } +2523:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } +2524:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** +2525:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } while (hi2c->XferCount > 0U); +2526:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** +2527:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* No need to Check TC flag, with AUTOEND mode the stop is automatically generated */ +2528:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* Wait until STOPF flag is reset */ +2529:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** if (I2C_WaitOnSTOPFlagUntilTimeout(hi2c, Timeout, tickstart) != HAL_OK) +2530:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { +2531:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** return HAL_ERROR; +2532:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } +2533:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** +2534:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* Clear STOP Flag */ +2535:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** __HAL_I2C_CLEAR_FLAG(hi2c, I2C_FLAG_STOPF); +2536:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** +2537:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* Clear Configuration Register 2 */ +2538:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** I2C_RESET_CR2(hi2c); +2539:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** +2540:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->State = HAL_I2C_STATE_READY; + ARM GAS /tmp/ccuRhBPx.s page 46 + + +2541:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->Mode = HAL_I2C_MODE_NONE; +2542:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** +2543:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* Process Unlocked */ +2544:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** __HAL_UNLOCK(hi2c); +2545:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** +2546:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** return HAL_OK; +2547:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } +2548:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** else +2549:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { +2550:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** return HAL_BUSY; +2551:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } +2552:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } +2553:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** +2554:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /** +2555:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** * @brief Read an amount of data in blocking mode from a specific memory address +2556:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** * @param hi2c Pointer to a I2C_HandleTypeDef structure that contains +2557:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** * the configuration information for the specified I2C. +2558:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** * @param DevAddress Target device address: The device 7 bits address value +2559:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** * in datasheet must be shifted to the left before calling the interface +2560:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** * @param MemAddress Internal memory address +2561:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** * @param MemAddSize Size of internal memory address +2562:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** * @param pData Pointer to data buffer +2563:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** * @param Size Amount of data to be sent +2564:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** * @param Timeout Timeout duration +2565:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** * @retval HAL status +2566:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** */ +2567:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** HAL_StatusTypeDef HAL_I2C_Mem_Read(I2C_HandleTypeDef *hi2c, uint16_t DevAddress, uint16_t MemAddres +2568:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** uint16_t MemAddSize, uint8_t *pData, uint16_t Size, uint32_t Tim +2569:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { +2570:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** uint32_t tickstart; +2571:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** +2572:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* Check the parameters */ +2573:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** assert_param(IS_I2C_MEMADD_SIZE(MemAddSize)); +2574:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** +2575:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** if (hi2c->State == HAL_I2C_STATE_READY) +2576:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { +2577:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** if ((pData == NULL) || (Size == 0U)) +2578:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { +2579:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->ErrorCode = HAL_I2C_ERROR_INVALID_PARAM; +2580:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** return HAL_ERROR; +2581:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } +2582:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** +2583:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* Process Locked */ +2584:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** __HAL_LOCK(hi2c); +2585:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** +2586:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* Init tickstart for timeout management*/ +2587:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** tickstart = HAL_GetTick(); +2588:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** +2589:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** if (I2C_WaitOnFlagUntilTimeout(hi2c, I2C_FLAG_BUSY, SET, I2C_TIMEOUT_BUSY, tickstart) != HAL_OK +2590:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { +2591:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** return HAL_ERROR; +2592:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } +2593:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** +2594:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->State = HAL_I2C_STATE_BUSY_RX; +2595:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->Mode = HAL_I2C_MODE_MEM; +2596:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->ErrorCode = HAL_I2C_ERROR_NONE; +2597:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + ARM GAS /tmp/ccuRhBPx.s page 47 + + +2598:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* Prepare transfer parameters */ +2599:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->pBuffPtr = pData; +2600:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->XferCount = Size; +2601:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->XferISR = NULL; +2602:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** +2603:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* Send Slave Address and Memory Address */ +2604:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** if (I2C_RequestMemoryRead(hi2c, DevAddress, MemAddress, MemAddSize, Timeout, tickstart) != HAL_ +2605:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { +2606:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* Process Unlocked */ +2607:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** __HAL_UNLOCK(hi2c); +2608:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** return HAL_ERROR; +2609:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } +2610:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** +2611:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* Send Slave Address */ +2612:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* Set NBYTES to write and reload if hi2c->XferCount > MAX_NBYTE_SIZE and generate RESTART */ +2613:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** if (hi2c->XferCount > MAX_NBYTE_SIZE) +2614:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { +2615:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->XferSize = MAX_NBYTE_SIZE; +2616:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** I2C_TransferConfig(hi2c, DevAddress, (uint8_t)hi2c->XferSize, I2C_RELOAD_MODE, +2617:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** I2C_GENERATE_START_READ); +2618:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } +2619:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** else +2620:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { +2621:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->XferSize = hi2c->XferCount; +2622:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** I2C_TransferConfig(hi2c, DevAddress, (uint8_t)hi2c->XferSize, I2C_AUTOEND_MODE, +2623:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** I2C_GENERATE_START_READ); +2624:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } +2625:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** +2626:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** do +2627:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { +2628:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* Wait until RXNE flag is set */ +2629:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** if (I2C_WaitOnFlagUntilTimeout(hi2c, I2C_FLAG_RXNE, RESET, Timeout, tickstart) != HAL_OK) +2630:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { +2631:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** return HAL_ERROR; +2632:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } +2633:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** +2634:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* Read data from RXDR */ +2635:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** *hi2c->pBuffPtr = (uint8_t)hi2c->Instance->RXDR; +2636:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** +2637:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* Increment Buffer pointer */ +2638:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->pBuffPtr++; +2639:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** +2640:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->XferSize--; +2641:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->XferCount--; +2642:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** +2643:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** if ((hi2c->XferCount != 0U) && (hi2c->XferSize == 0U)) +2644:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { +2645:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* Wait until TCR flag is set */ +2646:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** if (I2C_WaitOnFlagUntilTimeout(hi2c, I2C_FLAG_TCR, RESET, Timeout, tickstart) != HAL_OK) +2647:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { +2648:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** return HAL_ERROR; +2649:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } +2650:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** +2651:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** if (hi2c->XferCount > MAX_NBYTE_SIZE) +2652:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { +2653:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->XferSize = MAX_NBYTE_SIZE; +2654:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** I2C_TransferConfig(hi2c, DevAddress, (uint8_t) hi2c->XferSize, I2C_RELOAD_MODE, + ARM GAS /tmp/ccuRhBPx.s page 48 + + +2655:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** I2C_NO_STARTSTOP); +2656:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } +2657:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** else +2658:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { +2659:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->XferSize = hi2c->XferCount; +2660:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** I2C_TransferConfig(hi2c, DevAddress, (uint8_t)hi2c->XferSize, I2C_AUTOEND_MODE, +2661:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** I2C_NO_STARTSTOP); +2662:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } +2663:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } +2664:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } while (hi2c->XferCount > 0U); +2665:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** +2666:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* No need to Check TC flag, with AUTOEND mode the stop is automatically generated */ +2667:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* Wait until STOPF flag is reset */ +2668:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** if (I2C_WaitOnSTOPFlagUntilTimeout(hi2c, Timeout, tickstart) != HAL_OK) +2669:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { +2670:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** return HAL_ERROR; +2671:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } +2672:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** +2673:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* Clear STOP Flag */ +2674:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** __HAL_I2C_CLEAR_FLAG(hi2c, I2C_FLAG_STOPF); +2675:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** +2676:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* Clear Configuration Register 2 */ +2677:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** I2C_RESET_CR2(hi2c); +2678:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** +2679:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->State = HAL_I2C_STATE_READY; +2680:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->Mode = HAL_I2C_MODE_NONE; +2681:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** +2682:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* Process Unlocked */ +2683:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** __HAL_UNLOCK(hi2c); +2684:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** +2685:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** return HAL_OK; +2686:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } +2687:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** else +2688:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { +2689:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** return HAL_BUSY; +2690:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } +2691:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } +2692:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /** +2693:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** * @brief Write an amount of data in non-blocking mode with Interrupt to a specific memory addres +2694:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** * @param hi2c Pointer to a I2C_HandleTypeDef structure that contains +2695:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** * the configuration information for the specified I2C. +2696:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** * @param DevAddress Target device address: The device 7 bits address value +2697:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** * in datasheet must be shifted to the left before calling the interface +2698:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** * @param MemAddress Internal memory address +2699:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** * @param MemAddSize Size of internal memory address +2700:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** * @param pData Pointer to data buffer +2701:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** * @param Size Amount of data to be sent +2702:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** * @retval HAL status +2703:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** */ +2704:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** HAL_StatusTypeDef HAL_I2C_Mem_Write_IT(I2C_HandleTypeDef *hi2c, uint16_t DevAddress, uint16_t MemAd +2705:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** uint16_t MemAddSize, uint8_t *pData, uint16_t Size) +2706:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { +2707:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* Check the parameters */ +2708:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** assert_param(IS_I2C_MEMADD_SIZE(MemAddSize)); +2709:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** +2710:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** if (hi2c->State == HAL_I2C_STATE_READY) +2711:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { + ARM GAS /tmp/ccuRhBPx.s page 49 + + +2712:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** if ((pData == NULL) || (Size == 0U)) +2713:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { +2714:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->ErrorCode = HAL_I2C_ERROR_INVALID_PARAM; +2715:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** return HAL_ERROR; +2716:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } +2717:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** +2718:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** if (__HAL_I2C_GET_FLAG(hi2c, I2C_FLAG_BUSY) == SET) +2719:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { +2720:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** return HAL_BUSY; +2721:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } +2722:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** +2723:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* Process Locked */ +2724:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** __HAL_LOCK(hi2c); +2725:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** +2726:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->State = HAL_I2C_STATE_BUSY_TX; +2727:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->Mode = HAL_I2C_MODE_MEM; +2728:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->ErrorCode = HAL_I2C_ERROR_NONE; +2729:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** +2730:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* Prepare transfer parameters */ +2731:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->pBuffPtr = pData; +2732:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->XferCount = Size; +2733:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->XferOptions = I2C_NO_OPTION_FRAME; +2734:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->XferISR = I2C_Mem_ISR_IT; +2735:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->Devaddress = DevAddress; +2736:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** +2737:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* If Memory address size is 8Bit */ +2738:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** if (MemAddSize == I2C_MEMADD_SIZE_8BIT) +2739:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { +2740:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* Prefetch Memory Address */ +2741:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->Instance->TXDR = I2C_MEM_ADD_LSB(MemAddress); +2742:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** +2743:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* Reset Memaddress content */ +2744:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->Memaddress = 0xFFFFFFFFU; +2745:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } +2746:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* If Memory address size is 16Bit */ +2747:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** else +2748:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { +2749:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* Prefetch Memory Address (MSB part, LSB will be manage through interrupt) */ +2750:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->Instance->TXDR = I2C_MEM_ADD_MSB(MemAddress); +2751:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** +2752:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* Prepare Memaddress buffer for LSB part */ +2753:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->Memaddress = I2C_MEM_ADD_LSB(MemAddress); +2754:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } +2755:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* Send Slave Address and Memory Address */ +2756:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** I2C_TransferConfig(hi2c, DevAddress, (uint8_t)MemAddSize, I2C_RELOAD_MODE, I2C_GENERATE_START_W +2757:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** +2758:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* Process Unlocked */ +2759:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** __HAL_UNLOCK(hi2c); +2760:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** +2761:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* Note : The I2C interrupts must be enabled after unlocking current process +2762:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** to avoid the risk of I2C interrupt handle execution before current +2763:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** process unlock */ +2764:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** +2765:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* Enable ERR, TC, STOP, NACK, TXI interrupt */ +2766:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* possible to enable all of these */ +2767:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* I2C_IT_ERRI | I2C_IT_TCI | I2C_IT_STOPI | I2C_IT_NACKI | +2768:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** I2C_IT_ADDRI | I2C_IT_RXI | I2C_IT_TXI */ + ARM GAS /tmp/ccuRhBPx.s page 50 + + +2769:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** I2C_Enable_IRQ(hi2c, I2C_XFER_TX_IT); +2770:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** +2771:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** return HAL_OK; +2772:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } +2773:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** else +2774:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { +2775:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** return HAL_BUSY; +2776:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } +2777:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } +2778:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** +2779:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /** +2780:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** * @brief Read an amount of data in non-blocking mode with Interrupt from a specific memory addre +2781:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** * @param hi2c Pointer to a I2C_HandleTypeDef structure that contains +2782:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** * the configuration information for the specified I2C. +2783:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** * @param DevAddress Target device address: The device 7 bits address value +2784:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** * in datasheet must be shifted to the left before calling the interface +2785:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** * @param MemAddress Internal memory address +2786:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** * @param MemAddSize Size of internal memory address +2787:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** * @param pData Pointer to data buffer +2788:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** * @param Size Amount of data to be sent +2789:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** * @retval HAL status +2790:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** */ +2791:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** HAL_StatusTypeDef HAL_I2C_Mem_Read_IT(I2C_HandleTypeDef *hi2c, uint16_t DevAddress, uint16_t MemAdd +2792:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** uint16_t MemAddSize, uint8_t *pData, uint16_t Size) +2793:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { +2794:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* Check the parameters */ +2795:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** assert_param(IS_I2C_MEMADD_SIZE(MemAddSize)); +2796:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** +2797:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** if (hi2c->State == HAL_I2C_STATE_READY) +2798:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { +2799:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** if ((pData == NULL) || (Size == 0U)) +2800:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { +2801:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->ErrorCode = HAL_I2C_ERROR_INVALID_PARAM; +2802:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** return HAL_ERROR; +2803:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } +2804:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** +2805:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** if (__HAL_I2C_GET_FLAG(hi2c, I2C_FLAG_BUSY) == SET) +2806:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { +2807:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** return HAL_BUSY; +2808:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } +2809:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** +2810:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* Process Locked */ +2811:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** __HAL_LOCK(hi2c); +2812:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** +2813:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->State = HAL_I2C_STATE_BUSY_RX; +2814:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->Mode = HAL_I2C_MODE_MEM; +2815:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->ErrorCode = HAL_I2C_ERROR_NONE; +2816:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** +2817:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* Prepare transfer parameters */ +2818:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->pBuffPtr = pData; +2819:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->XferCount = Size; +2820:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->XferOptions = I2C_NO_OPTION_FRAME; +2821:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->XferISR = I2C_Mem_ISR_IT; +2822:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->Devaddress = DevAddress; +2823:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** +2824:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* If Memory address size is 8Bit */ +2825:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** if (MemAddSize == I2C_MEMADD_SIZE_8BIT) + ARM GAS /tmp/ccuRhBPx.s page 51 + + +2826:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { +2827:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* Prefetch Memory Address */ +2828:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->Instance->TXDR = I2C_MEM_ADD_LSB(MemAddress); +2829:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** +2830:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* Reset Memaddress content */ +2831:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->Memaddress = 0xFFFFFFFFU; +2832:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } +2833:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* If Memory address size is 16Bit */ +2834:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** else +2835:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { +2836:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* Prefetch Memory Address (MSB part, LSB will be manage through interrupt) */ +2837:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->Instance->TXDR = I2C_MEM_ADD_MSB(MemAddress); +2838:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** +2839:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* Prepare Memaddress buffer for LSB part */ +2840:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->Memaddress = I2C_MEM_ADD_LSB(MemAddress); +2841:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } +2842:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* Send Slave Address and Memory Address */ +2843:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** I2C_TransferConfig(hi2c, DevAddress, (uint8_t)MemAddSize, I2C_SOFTEND_MODE, I2C_GENERATE_START_ +2844:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** +2845:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* Process Unlocked */ +2846:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** __HAL_UNLOCK(hi2c); +2847:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** +2848:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* Note : The I2C interrupts must be enabled after unlocking current process +2849:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** to avoid the risk of I2C interrupt handle execution before current +2850:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** process unlock */ +2851:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** +2852:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* Enable ERR, TC, STOP, NACK, RXI interrupt */ +2853:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* possible to enable all of these */ +2854:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* I2C_IT_ERRI | I2C_IT_TCI | I2C_IT_STOPI | I2C_IT_NACKI | +2855:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** I2C_IT_ADDRI | I2C_IT_RXI | I2C_IT_TXI */ +2856:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** I2C_Enable_IRQ(hi2c, (I2C_XFER_TX_IT | I2C_XFER_RX_IT)); +2857:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** +2858:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** return HAL_OK; +2859:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } +2860:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** else +2861:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { +2862:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** return HAL_BUSY; +2863:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } +2864:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } +2865:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** +2866:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /** +2867:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** * @brief Write an amount of data in non-blocking mode with DMA to a specific memory address +2868:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** * @param hi2c Pointer to a I2C_HandleTypeDef structure that contains +2869:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** * the configuration information for the specified I2C. +2870:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** * @param DevAddress Target device address: The device 7 bits address value +2871:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** * in datasheet must be shifted to the left before calling the interface +2872:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** * @param MemAddress Internal memory address +2873:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** * @param MemAddSize Size of internal memory address +2874:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** * @param pData Pointer to data buffer +2875:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** * @param Size Amount of data to be sent +2876:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** * @retval HAL status +2877:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** */ +2878:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** HAL_StatusTypeDef HAL_I2C_Mem_Write_DMA(I2C_HandleTypeDef *hi2c, uint16_t DevAddress, uint16_t MemA +2879:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** uint16_t MemAddSize, uint8_t *pData, uint16_t Size) +2880:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { +2881:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** HAL_StatusTypeDef dmaxferstatus; +2882:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + ARM GAS /tmp/ccuRhBPx.s page 52 + + +2883:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* Check the parameters */ +2884:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** assert_param(IS_I2C_MEMADD_SIZE(MemAddSize)); +2885:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** +2886:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** if (hi2c->State == HAL_I2C_STATE_READY) +2887:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { +2888:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** if ((pData == NULL) || (Size == 0U)) +2889:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { +2890:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->ErrorCode = HAL_I2C_ERROR_INVALID_PARAM; +2891:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** return HAL_ERROR; +2892:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } +2893:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** +2894:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** if (__HAL_I2C_GET_FLAG(hi2c, I2C_FLAG_BUSY) == SET) +2895:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { +2896:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** return HAL_BUSY; +2897:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } +2898:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** +2899:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* Process Locked */ +2900:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** __HAL_LOCK(hi2c); +2901:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** +2902:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->State = HAL_I2C_STATE_BUSY_TX; +2903:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->Mode = HAL_I2C_MODE_MEM; +2904:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->ErrorCode = HAL_I2C_ERROR_NONE; +2905:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** +2906:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* Prepare transfer parameters */ +2907:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->pBuffPtr = pData; +2908:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->XferCount = Size; +2909:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->XferOptions = I2C_NO_OPTION_FRAME; +2910:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->XferISR = I2C_Mem_ISR_DMA; +2911:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->Devaddress = DevAddress; +2912:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** +2913:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** if (hi2c->XferCount > MAX_NBYTE_SIZE) +2914:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { +2915:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->XferSize = MAX_NBYTE_SIZE; +2916:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } +2917:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** else +2918:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { +2919:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->XferSize = hi2c->XferCount; +2920:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } +2921:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** +2922:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* If Memory address size is 8Bit */ +2923:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** if (MemAddSize == I2C_MEMADD_SIZE_8BIT) +2924:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { +2925:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* Prefetch Memory Address */ +2926:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->Instance->TXDR = I2C_MEM_ADD_LSB(MemAddress); +2927:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** +2928:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* Reset Memaddress content */ +2929:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->Memaddress = 0xFFFFFFFFU; +2930:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } +2931:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* If Memory address size is 16Bit */ +2932:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** else +2933:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { +2934:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* Prefetch Memory Address (MSB part, LSB will be manage through interrupt) */ +2935:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->Instance->TXDR = I2C_MEM_ADD_MSB(MemAddress); +2936:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** +2937:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* Prepare Memaddress buffer for LSB part */ +2938:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->Memaddress = I2C_MEM_ADD_LSB(MemAddress); +2939:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } + ARM GAS /tmp/ccuRhBPx.s page 53 + + +2940:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** +2941:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** if (hi2c->hdmatx != NULL) +2942:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { +2943:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* Set the I2C DMA transfer complete callback */ +2944:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->hdmatx->XferCpltCallback = I2C_DMAMasterTransmitCplt; +2945:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** +2946:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* Set the DMA error callback */ +2947:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->hdmatx->XferErrorCallback = I2C_DMAError; +2948:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** +2949:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* Set the unused DMA callbacks to NULL */ +2950:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->hdmatx->XferHalfCpltCallback = NULL; +2951:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->hdmatx->XferAbortCallback = NULL; +2952:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** +2953:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* Enable the DMA channel */ +2954:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** dmaxferstatus = HAL_DMA_Start_IT(hi2c->hdmatx, (uint32_t)pData, (uint32_t)&hi2c->Instance->TX +2955:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->XferSize); +2956:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } +2957:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** else +2958:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { +2959:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* Update I2C state */ +2960:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->State = HAL_I2C_STATE_READY; +2961:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->Mode = HAL_I2C_MODE_NONE; +2962:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** +2963:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* Update I2C error code */ +2964:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->ErrorCode |= HAL_I2C_ERROR_DMA_PARAM; +2965:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** +2966:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* Process Unlocked */ +2967:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** __HAL_UNLOCK(hi2c); +2968:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** +2969:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** return HAL_ERROR; +2970:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } +2971:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** +2972:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** if (dmaxferstatus == HAL_OK) +2973:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { +2974:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* Send Slave Address and Memory Address */ +2975:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** I2C_TransferConfig(hi2c, DevAddress, (uint8_t)MemAddSize, I2C_RELOAD_MODE, I2C_GENERATE_START +2976:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** +2977:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* Process Unlocked */ +2978:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** __HAL_UNLOCK(hi2c); +2979:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** +2980:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* Note : The I2C interrupts must be enabled after unlocking current process +2981:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** to avoid the risk of I2C interrupt handle execution before current +2982:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** process unlock */ +2983:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* Enable ERR, TC, STOP, NACK, TXI interrupt */ +2984:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* possible to enable all of these */ +2985:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* I2C_IT_ERRI | I2C_IT_TCI | I2C_IT_STOPI | I2C_IT_NACKI | +2986:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** I2C_IT_ADDRI | I2C_IT_RXI | I2C_IT_TXI */ +2987:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** I2C_Enable_IRQ(hi2c, I2C_XFER_TX_IT); +2988:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } +2989:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** else +2990:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { +2991:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* Update I2C state */ +2992:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->State = HAL_I2C_STATE_READY; +2993:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->Mode = HAL_I2C_MODE_NONE; +2994:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** +2995:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* Update I2C error code */ +2996:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->ErrorCode |= HAL_I2C_ERROR_DMA; + ARM GAS /tmp/ccuRhBPx.s page 54 + + +2997:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** +2998:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* Process Unlocked */ +2999:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** __HAL_UNLOCK(hi2c); +3000:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** +3001:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** return HAL_ERROR; +3002:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } +3003:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** +3004:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** return HAL_OK; +3005:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } +3006:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** else +3007:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { +3008:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** return HAL_BUSY; +3009:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } +3010:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } +3011:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** +3012:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /** +3013:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** * @brief Reads an amount of data in non-blocking mode with DMA from a specific memory address. +3014:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** * @param hi2c Pointer to a I2C_HandleTypeDef structure that contains +3015:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** * the configuration information for the specified I2C. +3016:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** * @param DevAddress Target device address: The device 7 bits address value +3017:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** * in datasheet must be shifted to the left before calling the interface +3018:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** * @param MemAddress Internal memory address +3019:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** * @param MemAddSize Size of internal memory address +3020:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** * @param pData Pointer to data buffer +3021:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** * @param Size Amount of data to be read +3022:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** * @retval HAL status +3023:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** */ +3024:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** HAL_StatusTypeDef HAL_I2C_Mem_Read_DMA(I2C_HandleTypeDef *hi2c, uint16_t DevAddress, uint16_t MemAd +3025:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** uint16_t MemAddSize, uint8_t *pData, uint16_t Size) +3026:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { +3027:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** HAL_StatusTypeDef dmaxferstatus; +3028:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** +3029:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* Check the parameters */ +3030:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** assert_param(IS_I2C_MEMADD_SIZE(MemAddSize)); +3031:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** +3032:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** if (hi2c->State == HAL_I2C_STATE_READY) +3033:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { +3034:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** if ((pData == NULL) || (Size == 0U)) +3035:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { +3036:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->ErrorCode = HAL_I2C_ERROR_INVALID_PARAM; +3037:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** return HAL_ERROR; +3038:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } +3039:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** +3040:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** if (__HAL_I2C_GET_FLAG(hi2c, I2C_FLAG_BUSY) == SET) +3041:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { +3042:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** return HAL_BUSY; +3043:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } +3044:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** +3045:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* Process Locked */ +3046:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** __HAL_LOCK(hi2c); +3047:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** +3048:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->State = HAL_I2C_STATE_BUSY_RX; +3049:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->Mode = HAL_I2C_MODE_MEM; +3050:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->ErrorCode = HAL_I2C_ERROR_NONE; +3051:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** +3052:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* Prepare transfer parameters */ +3053:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->pBuffPtr = pData; + ARM GAS /tmp/ccuRhBPx.s page 55 + + +3054:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->XferCount = Size; +3055:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->XferOptions = I2C_NO_OPTION_FRAME; +3056:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->XferISR = I2C_Mem_ISR_DMA; +3057:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->Devaddress = DevAddress; +3058:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** +3059:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** if (hi2c->XferCount > MAX_NBYTE_SIZE) +3060:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { +3061:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->XferSize = MAX_NBYTE_SIZE; +3062:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } +3063:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** else +3064:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { +3065:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->XferSize = hi2c->XferCount; +3066:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } +3067:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** +3068:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* If Memory address size is 8Bit */ +3069:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** if (MemAddSize == I2C_MEMADD_SIZE_8BIT) +3070:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { +3071:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* Prefetch Memory Address */ +3072:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->Instance->TXDR = I2C_MEM_ADD_LSB(MemAddress); +3073:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** +3074:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* Reset Memaddress content */ +3075:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->Memaddress = 0xFFFFFFFFU; +3076:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } +3077:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* If Memory address size is 16Bit */ +3078:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** else +3079:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { +3080:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* Prefetch Memory Address (MSB part, LSB will be manage through interrupt) */ +3081:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->Instance->TXDR = I2C_MEM_ADD_MSB(MemAddress); +3082:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** +3083:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* Prepare Memaddress buffer for LSB part */ +3084:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->Memaddress = I2C_MEM_ADD_LSB(MemAddress); +3085:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } +3086:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** +3087:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** if (hi2c->hdmarx != NULL) +3088:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { +3089:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* Set the I2C DMA transfer complete callback */ +3090:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->hdmarx->XferCpltCallback = I2C_DMAMasterReceiveCplt; +3091:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** +3092:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* Set the DMA error callback */ +3093:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->hdmarx->XferErrorCallback = I2C_DMAError; +3094:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** +3095:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* Set the unused DMA callbacks to NULL */ +3096:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->hdmarx->XferHalfCpltCallback = NULL; +3097:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->hdmarx->XferAbortCallback = NULL; +3098:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** +3099:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* Enable the DMA channel */ +3100:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** dmaxferstatus = HAL_DMA_Start_IT(hi2c->hdmarx, (uint32_t)&hi2c->Instance->RXDR, (uint32_t)pDa +3101:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->XferSize); +3102:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } +3103:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** else +3104:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { +3105:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* Update I2C state */ +3106:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->State = HAL_I2C_STATE_READY; +3107:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->Mode = HAL_I2C_MODE_NONE; +3108:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** +3109:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* Update I2C error code */ +3110:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->ErrorCode |= HAL_I2C_ERROR_DMA_PARAM; + ARM GAS /tmp/ccuRhBPx.s page 56 + + +3111:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** +3112:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* Process Unlocked */ +3113:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** __HAL_UNLOCK(hi2c); +3114:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** +3115:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** return HAL_ERROR; +3116:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } +3117:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** +3118:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** if (dmaxferstatus == HAL_OK) +3119:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { +3120:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* Send Slave Address and Memory Address */ +3121:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** I2C_TransferConfig(hi2c, DevAddress, (uint8_t)MemAddSize, I2C_SOFTEND_MODE, I2C_GENERATE_STAR +3122:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** +3123:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* Process Unlocked */ +3124:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** __HAL_UNLOCK(hi2c); +3125:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** +3126:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* Note : The I2C interrupts must be enabled after unlocking current process +3127:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** to avoid the risk of I2C interrupt handle execution before current +3128:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** process unlock */ +3129:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* Enable ERR, TC, STOP, NACK, TXI interrupt */ +3130:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* possible to enable all of these */ +3131:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* I2C_IT_ERRI | I2C_IT_TCI | I2C_IT_STOPI | I2C_IT_NACKI | +3132:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** I2C_IT_ADDRI | I2C_IT_RXI | I2C_IT_TXI */ +3133:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** I2C_Enable_IRQ(hi2c, I2C_XFER_TX_IT); +3134:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } +3135:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** else +3136:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { +3137:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* Update I2C state */ +3138:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->State = HAL_I2C_STATE_READY; +3139:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->Mode = HAL_I2C_MODE_NONE; +3140:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** +3141:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* Update I2C error code */ +3142:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->ErrorCode |= HAL_I2C_ERROR_DMA; +3143:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** +3144:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* Process Unlocked */ +3145:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** __HAL_UNLOCK(hi2c); +3146:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** +3147:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** return HAL_ERROR; +3148:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } +3149:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** +3150:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** return HAL_OK; +3151:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } +3152:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** else +3153:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { +3154:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** return HAL_BUSY; +3155:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } +3156:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } +3157:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** +3158:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /** +3159:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** * @brief Checks if target device is ready for communication. +3160:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** * @note This function is used with Memory devices +3161:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** * @param hi2c Pointer to a I2C_HandleTypeDef structure that contains +3162:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** * the configuration information for the specified I2C. +3163:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** * @param DevAddress Target device address: The device 7 bits address value +3164:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** * in datasheet must be shifted to the left before calling the interface +3165:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** * @param Trials Number of trials +3166:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** * @param Timeout Timeout duration +3167:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** * @retval HAL status + ARM GAS /tmp/ccuRhBPx.s page 57 + + +3168:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** */ +3169:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** HAL_StatusTypeDef HAL_I2C_IsDeviceReady(I2C_HandleTypeDef *hi2c, uint16_t DevAddress, uint32_t Tria +3170:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** uint32_t Timeout) +3171:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { +3172:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** uint32_t tickstart; +3173:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** +3174:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** __IO uint32_t I2C_Trials = 0UL; +3175:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** +3176:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** FlagStatus tmp1; +3177:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** FlagStatus tmp2; +3178:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** +3179:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** if (hi2c->State == HAL_I2C_STATE_READY) +3180:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { +3181:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** if (__HAL_I2C_GET_FLAG(hi2c, I2C_FLAG_BUSY) == SET) +3182:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { +3183:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** return HAL_BUSY; +3184:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } +3185:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** +3186:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* Process Locked */ +3187:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** __HAL_LOCK(hi2c); +3188:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** +3189:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->State = HAL_I2C_STATE_BUSY; +3190:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->ErrorCode = HAL_I2C_ERROR_NONE; +3191:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** +3192:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** do +3193:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { +3194:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* Generate Start */ +3195:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->Instance->CR2 = I2C_GENERATE_START(hi2c->Init.AddressingMode, DevAddress); +3196:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** +3197:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* No need to Check TC flag, with AUTOEND mode the stop is automatically generated */ +3198:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* Wait until STOPF flag is set or a NACK flag is set*/ +3199:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** tickstart = HAL_GetTick(); +3200:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** +3201:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** tmp1 = __HAL_I2C_GET_FLAG(hi2c, I2C_FLAG_STOPF); +3202:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** tmp2 = __HAL_I2C_GET_FLAG(hi2c, I2C_FLAG_AF); +3203:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** +3204:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** while ((tmp1 == RESET) && (tmp2 == RESET)) +3205:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { +3206:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** if (Timeout != HAL_MAX_DELAY) +3207:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { +3208:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** if (((HAL_GetTick() - tickstart) > Timeout) || (Timeout == 0U)) +3209:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { +3210:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* Update I2C state */ +3211:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->State = HAL_I2C_STATE_READY; +3212:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** +3213:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* Update I2C error code */ +3214:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->ErrorCode |= HAL_I2C_ERROR_TIMEOUT; +3215:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** +3216:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* Process Unlocked */ +3217:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** __HAL_UNLOCK(hi2c); +3218:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** +3219:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** return HAL_ERROR; +3220:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } +3221:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } +3222:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** +3223:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** tmp1 = __HAL_I2C_GET_FLAG(hi2c, I2C_FLAG_STOPF); +3224:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** tmp2 = __HAL_I2C_GET_FLAG(hi2c, I2C_FLAG_AF); + ARM GAS /tmp/ccuRhBPx.s page 58 + + +3225:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } +3226:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** +3227:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* Check if the NACKF flag has not been set */ +3228:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** if (__HAL_I2C_GET_FLAG(hi2c, I2C_FLAG_AF) == RESET) +3229:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { +3230:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* Wait until STOPF flag is reset */ +3231:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** if (I2C_WaitOnFlagUntilTimeout(hi2c, I2C_FLAG_STOPF, RESET, Timeout, tickstart) != HAL_OK) +3232:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { +3233:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** return HAL_ERROR; +3234:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } +3235:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** +3236:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* Clear STOP Flag */ +3237:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** __HAL_I2C_CLEAR_FLAG(hi2c, I2C_FLAG_STOPF); +3238:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** +3239:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* Device is ready */ +3240:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->State = HAL_I2C_STATE_READY; +3241:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** +3242:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* Process Unlocked */ +3243:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** __HAL_UNLOCK(hi2c); +3244:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** +3245:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** return HAL_OK; +3246:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } +3247:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** else +3248:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { +3249:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* Wait until STOPF flag is reset */ +3250:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** if (I2C_WaitOnFlagUntilTimeout(hi2c, I2C_FLAG_STOPF, RESET, Timeout, tickstart) != HAL_OK) +3251:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { +3252:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** return HAL_ERROR; +3253:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } +3254:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** +3255:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* Clear NACK Flag */ +3256:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** __HAL_I2C_CLEAR_FLAG(hi2c, I2C_FLAG_AF); +3257:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** +3258:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* Clear STOP Flag, auto generated with autoend*/ +3259:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** __HAL_I2C_CLEAR_FLAG(hi2c, I2C_FLAG_STOPF); +3260:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } +3261:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** +3262:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* Check if the maximum allowed number of trials has been reached */ +3263:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** if (I2C_Trials == Trials) +3264:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { +3265:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* Generate Stop */ +3266:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->Instance->CR2 |= I2C_CR2_STOP; +3267:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** +3268:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* Wait until STOPF flag is reset */ +3269:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** if (I2C_WaitOnFlagUntilTimeout(hi2c, I2C_FLAG_STOPF, RESET, Timeout, tickstart) != HAL_OK) +3270:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { +3271:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** return HAL_ERROR; +3272:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } +3273:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** +3274:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* Clear STOP Flag */ +3275:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** __HAL_I2C_CLEAR_FLAG(hi2c, I2C_FLAG_STOPF); +3276:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } +3277:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** +3278:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* Increment Trials */ +3279:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** I2C_Trials++; +3280:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } while (I2C_Trials < Trials); +3281:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + ARM GAS /tmp/ccuRhBPx.s page 59 + + +3282:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* Update I2C state */ +3283:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->State = HAL_I2C_STATE_READY; +3284:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** +3285:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* Update I2C error code */ +3286:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->ErrorCode |= HAL_I2C_ERROR_TIMEOUT; +3287:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** +3288:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* Process Unlocked */ +3289:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** __HAL_UNLOCK(hi2c); +3290:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** +3291:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** return HAL_ERROR; +3292:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } +3293:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** else +3294:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { +3295:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** return HAL_BUSY; +3296:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } +3297:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } +3298:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** +3299:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /** +3300:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** * @brief Sequential transmit in master I2C mode an amount of data in non-blocking mode with Inte +3301:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** * @note This interface allow to manage repeated start condition when a direction change during +3302:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** * @param hi2c Pointer to a I2C_HandleTypeDef structure that contains +3303:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** * the configuration information for the specified I2C. +3304:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** * @param DevAddress Target device address: The device 7 bits address value +3305:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** * in datasheet must be shifted to the left before calling the interface +3306:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** * @param pData Pointer to data buffer +3307:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** * @param Size Amount of data to be sent +3308:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** * @param XferOptions Options of Transfer, value of @ref I2C_XFEROPTIONS +3309:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** * @retval HAL status +3310:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** */ +3311:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** HAL_StatusTypeDef HAL_I2C_Master_Seq_Transmit_IT(I2C_HandleTypeDef *hi2c, uint16_t DevAddress, uint +3312:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** uint16_t Size, uint32_t XferOptions) +3313:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { +3314:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** uint32_t xfermode; +3315:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** uint32_t xferrequest = I2C_GENERATE_START_WRITE; +3316:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** +3317:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* Check the parameters */ +3318:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** assert_param(IS_I2C_TRANSFER_OPTIONS_REQUEST(XferOptions)); +3319:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** +3320:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** if (hi2c->State == HAL_I2C_STATE_READY) +3321:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { +3322:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* Process Locked */ +3323:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** __HAL_LOCK(hi2c); +3324:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** +3325:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->State = HAL_I2C_STATE_BUSY_TX; +3326:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->Mode = HAL_I2C_MODE_MASTER; +3327:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->ErrorCode = HAL_I2C_ERROR_NONE; +3328:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** +3329:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* Prepare transfer parameters */ +3330:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->pBuffPtr = pData; +3331:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->XferCount = Size; +3332:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->XferOptions = XferOptions; +3333:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->XferISR = I2C_Master_ISR_IT; +3334:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** +3335:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* If hi2c->XferCount > MAX_NBYTE_SIZE, use reload mode */ +3336:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** if (hi2c->XferCount > MAX_NBYTE_SIZE) +3337:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { +3338:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->XferSize = MAX_NBYTE_SIZE; + ARM GAS /tmp/ccuRhBPx.s page 60 + + +3339:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** xfermode = I2C_RELOAD_MODE; +3340:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } +3341:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** else +3342:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { +3343:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->XferSize = hi2c->XferCount; +3344:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** xfermode = hi2c->XferOptions; +3345:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } +3346:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** +3347:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* If transfer direction not change and there is no request to start another frame, +3348:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** do not generate Restart Condition */ +3349:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* Mean Previous state is same as current state */ +3350:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** if ((hi2c->PreviousState == I2C_STATE_MASTER_BUSY_TX) && \ +3351:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** (IS_I2C_TRANSFER_OTHER_OPTIONS_REQUEST(XferOptions) == 0)) +3352:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { +3353:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** xferrequest = I2C_NO_STARTSTOP; +3354:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } +3355:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** else +3356:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { +3357:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* Convert OTHER_xxx XferOptions if any */ +3358:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** I2C_ConvertOtherXferOptions(hi2c); +3359:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** +3360:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* Update xfermode accordingly if no reload is necessary */ +3361:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** if (hi2c->XferCount <= MAX_NBYTE_SIZE) +3362:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { +3363:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** xfermode = hi2c->XferOptions; +3364:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } +3365:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } +3366:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** +3367:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* Send Slave Address and set NBYTES to write */ +3368:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** I2C_TransferConfig(hi2c, DevAddress, (uint8_t)hi2c->XferSize, xfermode, xferrequest); +3369:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** +3370:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* Process Unlocked */ +3371:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** __HAL_UNLOCK(hi2c); +3372:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** +3373:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* Note : The I2C interrupts must be enabled after unlocking current process +3374:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** to avoid the risk of I2C interrupt handle execution before current +3375:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** process unlock */ +3376:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* Enable ERR, TC, STOP, NACK, TXI interrupt */ +3377:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* possible to enable all of these */ +3378:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* I2C_IT_ERRI | I2C_IT_TCI | I2C_IT_STOPI | I2C_IT_NACKI | +3379:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** I2C_IT_ADDRI | I2C_IT_RXI | I2C_IT_TXI */ +3380:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** I2C_Enable_IRQ(hi2c, I2C_XFER_TX_IT); +3381:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** +3382:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** return HAL_OK; +3383:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } +3384:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** else +3385:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { +3386:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** return HAL_BUSY; +3387:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } +3388:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } +3389:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** +3390:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /** +3391:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** * @brief Sequential transmit in master I2C mode an amount of data in non-blocking mode with DMA. +3392:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** * @note This interface allow to manage repeated start condition when a direction change during +3393:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** * @param hi2c Pointer to a I2C_HandleTypeDef structure that contains +3394:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** * the configuration information for the specified I2C. +3395:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** * @param DevAddress Target device address: The device 7 bits address value + ARM GAS /tmp/ccuRhBPx.s page 61 + + +3396:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** * in datasheet must be shifted to the left before calling the interface +3397:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** * @param pData Pointer to data buffer +3398:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** * @param Size Amount of data to be sent +3399:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** * @param XferOptions Options of Transfer, value of @ref I2C_XFEROPTIONS +3400:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** * @retval HAL status +3401:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** */ +3402:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** HAL_StatusTypeDef HAL_I2C_Master_Seq_Transmit_DMA(I2C_HandleTypeDef *hi2c, uint16_t DevAddress, uin +3403:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** uint16_t Size, uint32_t XferOptions) +3404:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { +3405:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** uint32_t xfermode; +3406:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** uint32_t xferrequest = I2C_GENERATE_START_WRITE; +3407:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** HAL_StatusTypeDef dmaxferstatus; +3408:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** +3409:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* Check the parameters */ +3410:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** assert_param(IS_I2C_TRANSFER_OPTIONS_REQUEST(XferOptions)); +3411:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** +3412:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** if (hi2c->State == HAL_I2C_STATE_READY) +3413:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { +3414:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* Process Locked */ +3415:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** __HAL_LOCK(hi2c); +3416:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** +3417:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->State = HAL_I2C_STATE_BUSY_TX; +3418:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->Mode = HAL_I2C_MODE_MASTER; +3419:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->ErrorCode = HAL_I2C_ERROR_NONE; +3420:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** +3421:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* Prepare transfer parameters */ +3422:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->pBuffPtr = pData; +3423:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->XferCount = Size; +3424:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->XferOptions = XferOptions; +3425:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->XferISR = I2C_Master_ISR_DMA; +3426:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** +3427:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* If hi2c->XferCount > MAX_NBYTE_SIZE, use reload mode */ +3428:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** if (hi2c->XferCount > MAX_NBYTE_SIZE) +3429:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { +3430:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->XferSize = MAX_NBYTE_SIZE; +3431:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** xfermode = I2C_RELOAD_MODE; +3432:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } +3433:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** else +3434:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { +3435:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->XferSize = hi2c->XferCount; +3436:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** xfermode = hi2c->XferOptions; +3437:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } +3438:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** +3439:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* If transfer direction not change and there is no request to start another frame, +3440:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** do not generate Restart Condition */ +3441:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* Mean Previous state is same as current state */ +3442:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** if ((hi2c->PreviousState == I2C_STATE_MASTER_BUSY_TX) && \ +3443:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** (IS_I2C_TRANSFER_OTHER_OPTIONS_REQUEST(XferOptions) == 0)) +3444:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { +3445:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** xferrequest = I2C_NO_STARTSTOP; +3446:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } +3447:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** else +3448:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { +3449:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* Convert OTHER_xxx XferOptions if any */ +3450:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** I2C_ConvertOtherXferOptions(hi2c); +3451:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** +3452:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* Update xfermode accordingly if no reload is necessary */ + ARM GAS /tmp/ccuRhBPx.s page 62 + + +3453:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** if (hi2c->XferCount <= MAX_NBYTE_SIZE) +3454:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { +3455:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** xfermode = hi2c->XferOptions; +3456:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } +3457:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } +3458:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** +3459:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** if (hi2c->XferSize > 0U) +3460:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { +3461:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** if (hi2c->hdmatx != NULL) +3462:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { +3463:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* Set the I2C DMA transfer complete callback */ +3464:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->hdmatx->XferCpltCallback = I2C_DMAMasterTransmitCplt; +3465:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** +3466:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* Set the DMA error callback */ +3467:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->hdmatx->XferErrorCallback = I2C_DMAError; +3468:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** +3469:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* Set the unused DMA callbacks to NULL */ +3470:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->hdmatx->XferHalfCpltCallback = NULL; +3471:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->hdmatx->XferAbortCallback = NULL; +3472:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** +3473:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* Enable the DMA channel */ +3474:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** dmaxferstatus = HAL_DMA_Start_IT(hi2c->hdmatx, (uint32_t)pData, (uint32_t)&hi2c->Instance-> +3475:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->XferSize); +3476:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } +3477:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** else +3478:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { +3479:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* Update I2C state */ +3480:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->State = HAL_I2C_STATE_READY; +3481:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->Mode = HAL_I2C_MODE_NONE; +3482:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** +3483:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* Update I2C error code */ +3484:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->ErrorCode |= HAL_I2C_ERROR_DMA_PARAM; +3485:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** +3486:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* Process Unlocked */ +3487:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** __HAL_UNLOCK(hi2c); +3488:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** +3489:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** return HAL_ERROR; +3490:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } +3491:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** +3492:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** if (dmaxferstatus == HAL_OK) +3493:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { +3494:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* Send Slave Address and set NBYTES to write */ +3495:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** I2C_TransferConfig(hi2c, DevAddress, (uint8_t)hi2c->XferSize, xfermode, xferrequest); +3496:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** +3497:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* Update XferCount value */ +3498:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->XferCount -= hi2c->XferSize; +3499:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** +3500:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* Process Unlocked */ +3501:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** __HAL_UNLOCK(hi2c); +3502:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** +3503:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* Note : The I2C interrupts must be enabled after unlocking current process +3504:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** to avoid the risk of I2C interrupt handle execution before current +3505:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** process unlock */ +3506:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* Enable ERR and NACK interrupts */ +3507:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** I2C_Enable_IRQ(hi2c, I2C_XFER_ERROR_IT); +3508:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** +3509:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* Enable DMA Request */ + ARM GAS /tmp/ccuRhBPx.s page 63 + + +3510:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->Instance->CR1 |= I2C_CR1_TXDMAEN; +3511:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } +3512:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** else +3513:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { +3514:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* Update I2C state */ +3515:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->State = HAL_I2C_STATE_READY; +3516:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->Mode = HAL_I2C_MODE_NONE; +3517:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** +3518:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* Update I2C error code */ +3519:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->ErrorCode |= HAL_I2C_ERROR_DMA; +3520:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** +3521:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* Process Unlocked */ +3522:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** __HAL_UNLOCK(hi2c); +3523:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** +3524:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** return HAL_ERROR; +3525:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } +3526:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } +3527:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** else +3528:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { +3529:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* Update Transfer ISR function pointer */ +3530:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->XferISR = I2C_Master_ISR_IT; +3531:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** +3532:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* Send Slave Address */ +3533:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* Set NBYTES to write and generate START condition */ +3534:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** I2C_TransferConfig(hi2c, DevAddress, (uint8_t)hi2c->XferSize, I2C_AUTOEND_MODE, +3535:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** I2C_GENERATE_START_WRITE); +3536:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** +3537:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* Process Unlocked */ +3538:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** __HAL_UNLOCK(hi2c); +3539:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** +3540:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* Note : The I2C interrupts must be enabled after unlocking current process +3541:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** to avoid the risk of I2C interrupt handle execution before current +3542:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** process unlock */ +3543:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* Enable ERR, TC, STOP, NACK, TXI interrupt */ +3544:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* possible to enable all of these */ +3545:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* I2C_IT_ERRI | I2C_IT_TCI | I2C_IT_STOPI | I2C_IT_NACKI | +3546:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** I2C_IT_ADDRI | I2C_IT_RXI | I2C_IT_TXI */ +3547:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** I2C_Enable_IRQ(hi2c, I2C_XFER_TX_IT); +3548:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } +3549:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** +3550:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** return HAL_OK; +3551:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } +3552:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** else +3553:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { +3554:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** return HAL_BUSY; +3555:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } +3556:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } +3557:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** +3558:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /** +3559:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** * @brief Sequential receive in master I2C mode an amount of data in non-blocking mode with Inter +3560:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** * @note This interface allow to manage repeated start condition when a direction change during +3561:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** * @param hi2c Pointer to a I2C_HandleTypeDef structure that contains +3562:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** * the configuration information for the specified I2C. +3563:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** * @param DevAddress Target device address: The device 7 bits address value +3564:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** * in datasheet must be shifted to the left before calling the interface +3565:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** * @param pData Pointer to data buffer +3566:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** * @param Size Amount of data to be sent + ARM GAS /tmp/ccuRhBPx.s page 64 + + +3567:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** * @param XferOptions Options of Transfer, value of @ref I2C_XFEROPTIONS +3568:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** * @retval HAL status +3569:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** */ +3570:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** HAL_StatusTypeDef HAL_I2C_Master_Seq_Receive_IT(I2C_HandleTypeDef *hi2c, uint16_t DevAddress, uint8 +3571:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** uint16_t Size, uint32_t XferOptions) +3572:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { +3573:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** uint32_t xfermode; +3574:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** uint32_t xferrequest = I2C_GENERATE_START_READ; +3575:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** +3576:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* Check the parameters */ +3577:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** assert_param(IS_I2C_TRANSFER_OPTIONS_REQUEST(XferOptions)); +3578:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** +3579:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** if (hi2c->State == HAL_I2C_STATE_READY) +3580:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { +3581:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* Process Locked */ +3582:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** __HAL_LOCK(hi2c); +3583:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** +3584:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->State = HAL_I2C_STATE_BUSY_RX; +3585:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->Mode = HAL_I2C_MODE_MASTER; +3586:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->ErrorCode = HAL_I2C_ERROR_NONE; +3587:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** +3588:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* Prepare transfer parameters */ +3589:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->pBuffPtr = pData; +3590:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->XferCount = Size; +3591:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->XferOptions = XferOptions; +3592:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->XferISR = I2C_Master_ISR_IT; +3593:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** +3594:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* If hi2c->XferCount > MAX_NBYTE_SIZE, use reload mode */ +3595:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** if (hi2c->XferCount > MAX_NBYTE_SIZE) +3596:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { +3597:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->XferSize = MAX_NBYTE_SIZE; +3598:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** xfermode = I2C_RELOAD_MODE; +3599:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } +3600:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** else +3601:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { +3602:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->XferSize = hi2c->XferCount; +3603:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** xfermode = hi2c->XferOptions; +3604:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } +3605:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** +3606:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* If transfer direction not change and there is no request to start another frame, +3607:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** do not generate Restart Condition */ +3608:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* Mean Previous state is same as current state */ +3609:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** if ((hi2c->PreviousState == I2C_STATE_MASTER_BUSY_RX) && \ +3610:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** (IS_I2C_TRANSFER_OTHER_OPTIONS_REQUEST(XferOptions) == 0)) +3611:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { +3612:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** xferrequest = I2C_NO_STARTSTOP; +3613:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } +3614:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** else +3615:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { +3616:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* Convert OTHER_xxx XferOptions if any */ +3617:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** I2C_ConvertOtherXferOptions(hi2c); +3618:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** +3619:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* Update xfermode accordingly if no reload is necessary */ +3620:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** if (hi2c->XferCount <= MAX_NBYTE_SIZE) +3621:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { +3622:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** xfermode = hi2c->XferOptions; +3623:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } + ARM GAS /tmp/ccuRhBPx.s page 65 + + +3624:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } +3625:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** +3626:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* Send Slave Address and set NBYTES to read */ +3627:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** I2C_TransferConfig(hi2c, DevAddress, (uint8_t)hi2c->XferSize, xfermode, xferrequest); +3628:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** +3629:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* Process Unlocked */ +3630:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** __HAL_UNLOCK(hi2c); +3631:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** +3632:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* Note : The I2C interrupts must be enabled after unlocking current process +3633:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** to avoid the risk of I2C interrupt handle execution before current +3634:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** process unlock */ +3635:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** I2C_Enable_IRQ(hi2c, I2C_XFER_RX_IT); +3636:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** +3637:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** return HAL_OK; +3638:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } +3639:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** else +3640:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { +3641:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** return HAL_BUSY; +3642:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } +3643:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } +3644:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** +3645:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /** +3646:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** * @brief Sequential receive in master I2C mode an amount of data in non-blocking mode with DMA +3647:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** * @note This interface allow to manage repeated start condition when a direction change during +3648:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** * @param hi2c Pointer to a I2C_HandleTypeDef structure that contains +3649:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** * the configuration information for the specified I2C. +3650:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** * @param DevAddress Target device address: The device 7 bits address value +3651:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** * in datasheet must be shifted to the left before calling the interface +3652:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** * @param pData Pointer to data buffer +3653:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** * @param Size Amount of data to be sent +3654:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** * @param XferOptions Options of Transfer, value of @ref I2C_XFEROPTIONS +3655:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** * @retval HAL status +3656:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** */ +3657:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** HAL_StatusTypeDef HAL_I2C_Master_Seq_Receive_DMA(I2C_HandleTypeDef *hi2c, uint16_t DevAddress, uint +3658:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** uint16_t Size, uint32_t XferOptions) +3659:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { +3660:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** uint32_t xfermode; +3661:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** uint32_t xferrequest = I2C_GENERATE_START_READ; +3662:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** HAL_StatusTypeDef dmaxferstatus; +3663:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** +3664:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* Check the parameters */ +3665:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** assert_param(IS_I2C_TRANSFER_OPTIONS_REQUEST(XferOptions)); +3666:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** +3667:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** if (hi2c->State == HAL_I2C_STATE_READY) +3668:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { +3669:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* Process Locked */ +3670:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** __HAL_LOCK(hi2c); +3671:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** +3672:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->State = HAL_I2C_STATE_BUSY_RX; +3673:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->Mode = HAL_I2C_MODE_MASTER; +3674:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->ErrorCode = HAL_I2C_ERROR_NONE; +3675:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** +3676:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* Prepare transfer parameters */ +3677:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->pBuffPtr = pData; +3678:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->XferCount = Size; +3679:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->XferOptions = XferOptions; +3680:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->XferISR = I2C_Master_ISR_DMA; + ARM GAS /tmp/ccuRhBPx.s page 66 + + +3681:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** +3682:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* If hi2c->XferCount > MAX_NBYTE_SIZE, use reload mode */ +3683:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** if (hi2c->XferCount > MAX_NBYTE_SIZE) +3684:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { +3685:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->XferSize = MAX_NBYTE_SIZE; +3686:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** xfermode = I2C_RELOAD_MODE; +3687:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } +3688:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** else +3689:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { +3690:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->XferSize = hi2c->XferCount; +3691:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** xfermode = hi2c->XferOptions; +3692:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } +3693:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** +3694:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* If transfer direction not change and there is no request to start another frame, +3695:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** do not generate Restart Condition */ +3696:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* Mean Previous state is same as current state */ +3697:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** if ((hi2c->PreviousState == I2C_STATE_MASTER_BUSY_RX) && \ +3698:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** (IS_I2C_TRANSFER_OTHER_OPTIONS_REQUEST(XferOptions) == 0)) +3699:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { +3700:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** xferrequest = I2C_NO_STARTSTOP; +3701:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } +3702:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** else +3703:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { +3704:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* Convert OTHER_xxx XferOptions if any */ +3705:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** I2C_ConvertOtherXferOptions(hi2c); +3706:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** +3707:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* Update xfermode accordingly if no reload is necessary */ +3708:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** if (hi2c->XferCount <= MAX_NBYTE_SIZE) +3709:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { +3710:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** xfermode = hi2c->XferOptions; +3711:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } +3712:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } +3713:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** +3714:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** if (hi2c->XferSize > 0U) +3715:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { +3716:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** if (hi2c->hdmarx != NULL) +3717:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { +3718:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* Set the I2C DMA transfer complete callback */ +3719:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->hdmarx->XferCpltCallback = I2C_DMAMasterReceiveCplt; +3720:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** +3721:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* Set the DMA error callback */ +3722:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->hdmarx->XferErrorCallback = I2C_DMAError; +3723:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** +3724:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* Set the unused DMA callbacks to NULL */ +3725:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->hdmarx->XferHalfCpltCallback = NULL; +3726:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->hdmarx->XferAbortCallback = NULL; +3727:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** +3728:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* Enable the DMA channel */ +3729:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** dmaxferstatus = HAL_DMA_Start_IT(hi2c->hdmarx, (uint32_t)&hi2c->Instance->RXDR, (uint32_t)p +3730:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->XferSize); +3731:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } +3732:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** else +3733:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { +3734:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* Update I2C state */ +3735:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->State = HAL_I2C_STATE_READY; +3736:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->Mode = HAL_I2C_MODE_NONE; +3737:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + ARM GAS /tmp/ccuRhBPx.s page 67 + + +3738:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* Update I2C error code */ +3739:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->ErrorCode |= HAL_I2C_ERROR_DMA_PARAM; +3740:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** +3741:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* Process Unlocked */ +3742:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** __HAL_UNLOCK(hi2c); +3743:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** +3744:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** return HAL_ERROR; +3745:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } +3746:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** +3747:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** if (dmaxferstatus == HAL_OK) +3748:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { +3749:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* Send Slave Address and set NBYTES to read */ +3750:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** I2C_TransferConfig(hi2c, DevAddress, (uint8_t)hi2c->XferSize, xfermode, xferrequest); +3751:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** +3752:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* Update XferCount value */ +3753:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->XferCount -= hi2c->XferSize; +3754:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** +3755:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* Process Unlocked */ +3756:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** __HAL_UNLOCK(hi2c); +3757:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** +3758:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* Note : The I2C interrupts must be enabled after unlocking current process +3759:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** to avoid the risk of I2C interrupt handle execution before current +3760:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** process unlock */ +3761:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* Enable ERR and NACK interrupts */ +3762:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** I2C_Enable_IRQ(hi2c, I2C_XFER_ERROR_IT); +3763:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** +3764:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* Enable DMA Request */ +3765:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->Instance->CR1 |= I2C_CR1_RXDMAEN; +3766:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } +3767:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** else +3768:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { +3769:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* Update I2C state */ +3770:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->State = HAL_I2C_STATE_READY; +3771:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->Mode = HAL_I2C_MODE_NONE; +3772:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** +3773:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* Update I2C error code */ +3774:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->ErrorCode |= HAL_I2C_ERROR_DMA; +3775:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** +3776:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* Process Unlocked */ +3777:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** __HAL_UNLOCK(hi2c); +3778:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** +3779:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** return HAL_ERROR; +3780:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } +3781:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } +3782:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** else +3783:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { +3784:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* Update Transfer ISR function pointer */ +3785:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->XferISR = I2C_Master_ISR_IT; +3786:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** +3787:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* Send Slave Address */ +3788:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* Set NBYTES to read and generate START condition */ +3789:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** I2C_TransferConfig(hi2c, DevAddress, (uint8_t)hi2c->XferSize, I2C_AUTOEND_MODE, +3790:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** I2C_GENERATE_START_READ); +3791:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** +3792:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* Process Unlocked */ +3793:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** __HAL_UNLOCK(hi2c); +3794:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + ARM GAS /tmp/ccuRhBPx.s page 68 + + +3795:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* Note : The I2C interrupts must be enabled after unlocking current process +3796:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** to avoid the risk of I2C interrupt handle execution before current +3797:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** process unlock */ +3798:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* Enable ERR, TC, STOP, NACK, TXI interrupt */ +3799:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* possible to enable all of these */ +3800:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* I2C_IT_ERRI | I2C_IT_TCI | I2C_IT_STOPI | I2C_IT_NACKI | +3801:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** I2C_IT_ADDRI | I2C_IT_RXI | I2C_IT_TXI */ +3802:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** I2C_Enable_IRQ(hi2c, I2C_XFER_TX_IT); +3803:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } +3804:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** +3805:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** return HAL_OK; +3806:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } +3807:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** else +3808:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { +3809:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** return HAL_BUSY; +3810:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } +3811:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } +3812:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** +3813:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /** +3814:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** * @brief Sequential transmit in slave/device I2C mode an amount of data in non-blocking mode wit +3815:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** * @note This interface allow to manage repeated start condition when a direction change during +3816:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** * @param hi2c Pointer to a I2C_HandleTypeDef structure that contains +3817:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** * the configuration information for the specified I2C. +3818:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** * @param pData Pointer to data buffer +3819:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** * @param Size Amount of data to be sent +3820:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** * @param XferOptions Options of Transfer, value of @ref I2C_XFEROPTIONS +3821:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** * @retval HAL status +3822:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** */ +3823:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** HAL_StatusTypeDef HAL_I2C_Slave_Seq_Transmit_IT(I2C_HandleTypeDef *hi2c, uint8_t *pData, uint16_t S +3824:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** uint32_t XferOptions) +3825:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { +3826:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* Declaration of tmp to prevent undefined behavior of volatile usage */ +3827:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** FlagStatus tmp; +3828:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** +3829:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* Check the parameters */ +3830:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** assert_param(IS_I2C_TRANSFER_OPTIONS_REQUEST(XferOptions)); +3831:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** +3832:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** if (((uint32_t)hi2c->State & (uint32_t)HAL_I2C_STATE_LISTEN) == (uint32_t)HAL_I2C_STATE_LISTEN) +3833:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { +3834:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** if ((pData == NULL) || (Size == 0U)) +3835:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { +3836:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->ErrorCode = HAL_I2C_ERROR_INVALID_PARAM; +3837:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** return HAL_ERROR; +3838:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } +3839:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** +3840:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* Disable Interrupts, to prevent preemption during treatment in case of multicall */ +3841:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** I2C_Disable_IRQ(hi2c, I2C_XFER_LISTEN_IT | I2C_XFER_TX_IT); +3842:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** +3843:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* Process Locked */ +3844:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** __HAL_LOCK(hi2c); +3845:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** +3846:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* I2C cannot manage full duplex exchange so disable previous IT enabled if any */ +3847:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* and then toggle the HAL slave RX state to TX state */ +3848:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** if (hi2c->State == HAL_I2C_STATE_BUSY_RX_LISTEN) +3849:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { +3850:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* Disable associated Interrupts */ +3851:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** I2C_Disable_IRQ(hi2c, I2C_XFER_RX_IT); + ARM GAS /tmp/ccuRhBPx.s page 69 + + +3852:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** +3853:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* Abort DMA Xfer if any */ +3854:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** if ((hi2c->Instance->CR1 & I2C_CR1_RXDMAEN) == I2C_CR1_RXDMAEN) +3855:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { +3856:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->Instance->CR1 &= ~I2C_CR1_RXDMAEN; +3857:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** +3858:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** if (hi2c->hdmarx != NULL) +3859:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { +3860:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* Set the I2C DMA Abort callback : +3861:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** will lead to call HAL_I2C_ErrorCallback() at end of DMA abort procedure */ +3862:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->hdmarx->XferAbortCallback = I2C_DMAAbort; +3863:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** +3864:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* Abort DMA RX */ +3865:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** if (HAL_DMA_Abort_IT(hi2c->hdmarx) != HAL_OK) +3866:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { +3867:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* Call Directly XferAbortCallback function in case of error */ +3868:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->hdmarx->XferAbortCallback(hi2c->hdmarx); +3869:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } +3870:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } +3871:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } +3872:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } +3873:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** +3874:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->State = HAL_I2C_STATE_BUSY_TX_LISTEN; +3875:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->Mode = HAL_I2C_MODE_SLAVE; +3876:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->ErrorCode = HAL_I2C_ERROR_NONE; +3877:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** +3878:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* Enable Address Acknowledge */ +3879:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->Instance->CR2 &= ~I2C_CR2_NACK; +3880:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** +3881:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* Prepare transfer parameters */ +3882:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->pBuffPtr = pData; +3883:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->XferCount = Size; +3884:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->XferSize = hi2c->XferCount; +3885:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->XferOptions = XferOptions; +3886:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->XferISR = I2C_Slave_ISR_IT; +3887:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** +3888:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** tmp = __HAL_I2C_GET_FLAG(hi2c, I2C_FLAG_ADDR); +3889:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** if ((I2C_GET_DIR(hi2c) == I2C_DIRECTION_RECEIVE) && (tmp != RESET)) +3890:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { +3891:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* Clear ADDR flag after prepare the transfer parameters */ +3892:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* This action will generate an acknowledge to the Master */ +3893:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** __HAL_I2C_CLEAR_FLAG(hi2c, I2C_FLAG_ADDR); +3894:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } +3895:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** +3896:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* Process Unlocked */ +3897:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** __HAL_UNLOCK(hi2c); +3898:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** +3899:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* Note : The I2C interrupts must be enabled after unlocking current process +3900:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** to avoid the risk of I2C interrupt handle execution before current +3901:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** process unlock */ +3902:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* REnable ADDR interrupt */ +3903:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** I2C_Enable_IRQ(hi2c, I2C_XFER_TX_IT | I2C_XFER_LISTEN_IT); +3904:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** +3905:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** return HAL_OK; +3906:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } +3907:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** else +3908:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { + ARM GAS /tmp/ccuRhBPx.s page 70 + + +3909:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** return HAL_ERROR; +3910:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } +3911:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } +3912:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** +3913:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /** +3914:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** * @brief Sequential transmit in slave/device I2C mode an amount of data in non-blocking mode wit +3915:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** * @note This interface allow to manage repeated start condition when a direction change during +3916:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** * @param hi2c Pointer to a I2C_HandleTypeDef structure that contains +3917:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** * the configuration information for the specified I2C. +3918:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** * @param pData Pointer to data buffer +3919:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** * @param Size Amount of data to be sent +3920:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** * @param XferOptions Options of Transfer, value of @ref I2C_XFEROPTIONS +3921:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** * @retval HAL status +3922:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** */ +3923:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** HAL_StatusTypeDef HAL_I2C_Slave_Seq_Transmit_DMA(I2C_HandleTypeDef *hi2c, uint8_t *pData, uint16_t +3924:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** uint32_t XferOptions) +3925:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { +3926:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* Declaration of tmp to prevent undefined behavior of volatile usage */ +3927:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** FlagStatus tmp; +3928:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** HAL_StatusTypeDef dmaxferstatus; +3929:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** +3930:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* Check the parameters */ +3931:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** assert_param(IS_I2C_TRANSFER_OPTIONS_REQUEST(XferOptions)); +3932:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** +3933:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** if (((uint32_t)hi2c->State & (uint32_t)HAL_I2C_STATE_LISTEN) == (uint32_t)HAL_I2C_STATE_LISTEN) +3934:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { +3935:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** if ((pData == NULL) || (Size == 0U)) +3936:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { +3937:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->ErrorCode = HAL_I2C_ERROR_INVALID_PARAM; +3938:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** return HAL_ERROR; +3939:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } +3940:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** +3941:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* Process Locked */ +3942:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** __HAL_LOCK(hi2c); +3943:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** +3944:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* Disable Interrupts, to prevent preemption during treatment in case of multicall */ +3945:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** I2C_Disable_IRQ(hi2c, I2C_XFER_LISTEN_IT | I2C_XFER_TX_IT); +3946:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** +3947:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* I2C cannot manage full duplex exchange so disable previous IT enabled if any */ +3948:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* and then toggle the HAL slave RX state to TX state */ +3949:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** if (hi2c->State == HAL_I2C_STATE_BUSY_RX_LISTEN) +3950:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { +3951:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* Disable associated Interrupts */ +3952:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** I2C_Disable_IRQ(hi2c, I2C_XFER_RX_IT); +3953:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** +3954:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** if ((hi2c->Instance->CR1 & I2C_CR1_RXDMAEN) == I2C_CR1_RXDMAEN) +3955:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { +3956:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* Abort DMA Xfer if any */ +3957:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** if (hi2c->hdmarx != NULL) +3958:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { +3959:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->Instance->CR1 &= ~I2C_CR1_RXDMAEN; +3960:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** +3961:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* Set the I2C DMA Abort callback : +3962:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** will lead to call HAL_I2C_ErrorCallback() at end of DMA abort procedure */ +3963:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->hdmarx->XferAbortCallback = I2C_DMAAbort; +3964:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** +3965:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* Abort DMA RX */ + ARM GAS /tmp/ccuRhBPx.s page 71 + + +3966:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** if (HAL_DMA_Abort_IT(hi2c->hdmarx) != HAL_OK) +3967:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { +3968:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* Call Directly XferAbortCallback function in case of error */ +3969:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->hdmarx->XferAbortCallback(hi2c->hdmarx); +3970:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } +3971:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } +3972:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } +3973:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } +3974:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** else if (hi2c->State == HAL_I2C_STATE_BUSY_TX_LISTEN) +3975:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { +3976:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** if ((hi2c->Instance->CR1 & I2C_CR1_TXDMAEN) == I2C_CR1_TXDMAEN) +3977:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { +3978:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->Instance->CR1 &= ~I2C_CR1_TXDMAEN; +3979:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** +3980:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* Abort DMA Xfer if any */ +3981:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** if (hi2c->hdmatx != NULL) +3982:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { +3983:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* Set the I2C DMA Abort callback : +3984:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** will lead to call HAL_I2C_ErrorCallback() at end of DMA abort procedure */ +3985:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->hdmatx->XferAbortCallback = I2C_DMAAbort; +3986:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** +3987:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* Abort DMA TX */ +3988:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** if (HAL_DMA_Abort_IT(hi2c->hdmatx) != HAL_OK) +3989:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { +3990:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* Call Directly XferAbortCallback function in case of error */ +3991:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->hdmatx->XferAbortCallback(hi2c->hdmatx); +3992:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } +3993:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } +3994:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } +3995:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } +3996:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** else +3997:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { +3998:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* Nothing to do */ +3999:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } +4000:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** +4001:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->State = HAL_I2C_STATE_BUSY_TX_LISTEN; +4002:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->Mode = HAL_I2C_MODE_SLAVE; +4003:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->ErrorCode = HAL_I2C_ERROR_NONE; +4004:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** +4005:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* Enable Address Acknowledge */ +4006:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->Instance->CR2 &= ~I2C_CR2_NACK; +4007:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** +4008:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* Prepare transfer parameters */ +4009:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->pBuffPtr = pData; +4010:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->XferCount = Size; +4011:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->XferSize = hi2c->XferCount; +4012:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->XferOptions = XferOptions; +4013:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->XferISR = I2C_Slave_ISR_DMA; +4014:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** +4015:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** if (hi2c->hdmatx != NULL) +4016:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { +4017:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* Set the I2C DMA transfer complete callback */ +4018:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->hdmatx->XferCpltCallback = I2C_DMASlaveTransmitCplt; +4019:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** +4020:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* Set the DMA error callback */ +4021:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->hdmatx->XferErrorCallback = I2C_DMAError; +4022:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + ARM GAS /tmp/ccuRhBPx.s page 72 + + +4023:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* Set the unused DMA callbacks to NULL */ +4024:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->hdmatx->XferHalfCpltCallback = NULL; +4025:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->hdmatx->XferAbortCallback = NULL; +4026:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** +4027:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* Enable the DMA channel */ +4028:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** dmaxferstatus = HAL_DMA_Start_IT(hi2c->hdmatx, (uint32_t)pData, (uint32_t)&hi2c->Instance->TX +4029:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->XferSize); +4030:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } +4031:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** else +4032:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { +4033:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* Update I2C state */ +4034:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->State = HAL_I2C_STATE_LISTEN; +4035:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->Mode = HAL_I2C_MODE_NONE; +4036:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** +4037:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* Update I2C error code */ +4038:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->ErrorCode |= HAL_I2C_ERROR_DMA_PARAM; +4039:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** +4040:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* Process Unlocked */ +4041:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** __HAL_UNLOCK(hi2c); +4042:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** +4043:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** return HAL_ERROR; +4044:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } +4045:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** +4046:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** if (dmaxferstatus == HAL_OK) +4047:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { +4048:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* Update XferCount value */ +4049:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->XferCount -= hi2c->XferSize; +4050:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** +4051:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* Reset XferSize */ +4052:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->XferSize = 0; +4053:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } +4054:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** else +4055:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { +4056:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* Update I2C state */ +4057:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->State = HAL_I2C_STATE_LISTEN; +4058:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->Mode = HAL_I2C_MODE_NONE; +4059:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** +4060:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* Update I2C error code */ +4061:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->ErrorCode |= HAL_I2C_ERROR_DMA; +4062:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** +4063:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* Process Unlocked */ +4064:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** __HAL_UNLOCK(hi2c); +4065:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** +4066:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** return HAL_ERROR; +4067:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } +4068:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** +4069:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** tmp = __HAL_I2C_GET_FLAG(hi2c, I2C_FLAG_ADDR); +4070:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** if ((I2C_GET_DIR(hi2c) == I2C_DIRECTION_RECEIVE) && (tmp != RESET)) +4071:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { +4072:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* Clear ADDR flag after prepare the transfer parameters */ +4073:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* This action will generate an acknowledge to the Master */ +4074:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** __HAL_I2C_CLEAR_FLAG(hi2c, I2C_FLAG_ADDR); +4075:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } +4076:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** +4077:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* Process Unlocked */ +4078:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** __HAL_UNLOCK(hi2c); +4079:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + ARM GAS /tmp/ccuRhBPx.s page 73 + + +4080:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* Enable DMA Request */ +4081:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->Instance->CR1 |= I2C_CR1_TXDMAEN; +4082:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** +4083:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* Note : The I2C interrupts must be enabled after unlocking current process +4084:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** to avoid the risk of I2C interrupt handle execution before current +4085:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** process unlock */ +4086:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* Enable ERR, STOP, NACK, ADDR interrupts */ +4087:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** I2C_Enable_IRQ(hi2c, I2C_XFER_LISTEN_IT); +4088:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** +4089:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** return HAL_OK; +4090:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } +4091:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** else +4092:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { +4093:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** return HAL_ERROR; +4094:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } +4095:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } +4096:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** +4097:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /** +4098:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** * @brief Sequential receive in slave/device I2C mode an amount of data in non-blocking mode with +4099:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** * @note This interface allow to manage repeated start condition when a direction change during +4100:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** * @param hi2c Pointer to a I2C_HandleTypeDef structure that contains +4101:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** * the configuration information for the specified I2C. +4102:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** * @param pData Pointer to data buffer +4103:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** * @param Size Amount of data to be sent +4104:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** * @param XferOptions Options of Transfer, value of @ref I2C_XFEROPTIONS +4105:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** * @retval HAL status +4106:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** */ +4107:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** HAL_StatusTypeDef HAL_I2C_Slave_Seq_Receive_IT(I2C_HandleTypeDef *hi2c, uint8_t *pData, uint16_t Si +4108:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** uint32_t XferOptions) +4109:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { +4110:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* Declaration of tmp to prevent undefined behavior of volatile usage */ +4111:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** FlagStatus tmp; +4112:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** +4113:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* Check the parameters */ +4114:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** assert_param(IS_I2C_TRANSFER_OPTIONS_REQUEST(XferOptions)); +4115:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** +4116:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** if (((uint32_t)hi2c->State & (uint32_t)HAL_I2C_STATE_LISTEN) == (uint32_t)HAL_I2C_STATE_LISTEN) +4117:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { +4118:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** if ((pData == NULL) || (Size == 0U)) +4119:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { +4120:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->ErrorCode = HAL_I2C_ERROR_INVALID_PARAM; +4121:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** return HAL_ERROR; +4122:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } +4123:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** +4124:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* Disable Interrupts, to prevent preemption during treatment in case of multicall */ +4125:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** I2C_Disable_IRQ(hi2c, I2C_XFER_LISTEN_IT | I2C_XFER_RX_IT); +4126:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** +4127:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* Process Locked */ +4128:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** __HAL_LOCK(hi2c); +4129:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** +4130:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* I2C cannot manage full duplex exchange so disable previous IT enabled if any */ +4131:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* and then toggle the HAL slave TX state to RX state */ +4132:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** if (hi2c->State == HAL_I2C_STATE_BUSY_TX_LISTEN) +4133:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { +4134:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* Disable associated Interrupts */ +4135:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** I2C_Disable_IRQ(hi2c, I2C_XFER_TX_IT); +4136:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + ARM GAS /tmp/ccuRhBPx.s page 74 + + +4137:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** if ((hi2c->Instance->CR1 & I2C_CR1_TXDMAEN) == I2C_CR1_TXDMAEN) +4138:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { +4139:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->Instance->CR1 &= ~I2C_CR1_TXDMAEN; +4140:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** +4141:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* Abort DMA Xfer if any */ +4142:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** if (hi2c->hdmatx != NULL) +4143:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { +4144:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* Set the I2C DMA Abort callback : +4145:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** will lead to call HAL_I2C_ErrorCallback() at end of DMA abort procedure */ +4146:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->hdmatx->XferAbortCallback = I2C_DMAAbort; +4147:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** +4148:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* Abort DMA TX */ +4149:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** if (HAL_DMA_Abort_IT(hi2c->hdmatx) != HAL_OK) +4150:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { +4151:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* Call Directly XferAbortCallback function in case of error */ +4152:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->hdmatx->XferAbortCallback(hi2c->hdmatx); +4153:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } +4154:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } +4155:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } +4156:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } +4157:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** +4158:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->State = HAL_I2C_STATE_BUSY_RX_LISTEN; +4159:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->Mode = HAL_I2C_MODE_SLAVE; +4160:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->ErrorCode = HAL_I2C_ERROR_NONE; +4161:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** +4162:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* Enable Address Acknowledge */ +4163:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->Instance->CR2 &= ~I2C_CR2_NACK; +4164:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** +4165:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* Prepare transfer parameters */ +4166:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->pBuffPtr = pData; +4167:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->XferCount = Size; +4168:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->XferSize = hi2c->XferCount; +4169:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->XferOptions = XferOptions; +4170:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->XferISR = I2C_Slave_ISR_IT; +4171:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** +4172:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** tmp = __HAL_I2C_GET_FLAG(hi2c, I2C_FLAG_ADDR); +4173:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** if ((I2C_GET_DIR(hi2c) == I2C_DIRECTION_TRANSMIT) && (tmp != RESET)) +4174:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { +4175:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* Clear ADDR flag after prepare the transfer parameters */ +4176:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* This action will generate an acknowledge to the Master */ +4177:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** __HAL_I2C_CLEAR_FLAG(hi2c, I2C_FLAG_ADDR); +4178:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } +4179:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** +4180:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* Process Unlocked */ +4181:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** __HAL_UNLOCK(hi2c); +4182:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** +4183:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* Note : The I2C interrupts must be enabled after unlocking current process +4184:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** to avoid the risk of I2C interrupt handle execution before current +4185:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** process unlock */ +4186:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* REnable ADDR interrupt */ +4187:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** I2C_Enable_IRQ(hi2c, I2C_XFER_RX_IT | I2C_XFER_LISTEN_IT); +4188:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** +4189:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** return HAL_OK; +4190:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } +4191:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** else +4192:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { +4193:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** return HAL_ERROR; + ARM GAS /tmp/ccuRhBPx.s page 75 + + +4194:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } +4195:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } +4196:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** +4197:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /** +4198:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** * @brief Sequential receive in slave/device I2C mode an amount of data in non-blocking mode with +4199:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** * @note This interface allow to manage repeated start condition when a direction change during +4200:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** * @param hi2c Pointer to a I2C_HandleTypeDef structure that contains +4201:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** * the configuration information for the specified I2C. +4202:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** * @param pData Pointer to data buffer +4203:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** * @param Size Amount of data to be sent +4204:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** * @param XferOptions Options of Transfer, value of @ref I2C_XFEROPTIONS +4205:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** * @retval HAL status +4206:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** */ +4207:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** HAL_StatusTypeDef HAL_I2C_Slave_Seq_Receive_DMA(I2C_HandleTypeDef *hi2c, uint8_t *pData, uint16_t S +4208:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** uint32_t XferOptions) +4209:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { +4210:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* Declaration of tmp to prevent undefined behavior of volatile usage */ +4211:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** FlagStatus tmp; +4212:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** HAL_StatusTypeDef dmaxferstatus; +4213:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** +4214:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* Check the parameters */ +4215:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** assert_param(IS_I2C_TRANSFER_OPTIONS_REQUEST(XferOptions)); +4216:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** +4217:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** if (((uint32_t)hi2c->State & (uint32_t)HAL_I2C_STATE_LISTEN) == (uint32_t)HAL_I2C_STATE_LISTEN) +4218:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { +4219:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** if ((pData == NULL) || (Size == 0U)) +4220:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { +4221:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->ErrorCode = HAL_I2C_ERROR_INVALID_PARAM; +4222:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** return HAL_ERROR; +4223:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } +4224:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** +4225:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* Disable Interrupts, to prevent preemption during treatment in case of multicall */ +4226:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** I2C_Disable_IRQ(hi2c, I2C_XFER_LISTEN_IT | I2C_XFER_RX_IT); +4227:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** +4228:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* Process Locked */ +4229:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** __HAL_LOCK(hi2c); +4230:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** +4231:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* I2C cannot manage full duplex exchange so disable previous IT enabled if any */ +4232:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* and then toggle the HAL slave TX state to RX state */ +4233:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** if (hi2c->State == HAL_I2C_STATE_BUSY_TX_LISTEN) +4234:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { +4235:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* Disable associated Interrupts */ +4236:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** I2C_Disable_IRQ(hi2c, I2C_XFER_TX_IT); +4237:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** +4238:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** if ((hi2c->Instance->CR1 & I2C_CR1_TXDMAEN) == I2C_CR1_TXDMAEN) +4239:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { +4240:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* Abort DMA Xfer if any */ +4241:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** if (hi2c->hdmatx != NULL) +4242:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { +4243:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->Instance->CR1 &= ~I2C_CR1_TXDMAEN; +4244:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** +4245:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* Set the I2C DMA Abort callback : +4246:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** will lead to call HAL_I2C_ErrorCallback() at end of DMA abort procedure */ +4247:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->hdmatx->XferAbortCallback = I2C_DMAAbort; +4248:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** +4249:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* Abort DMA TX */ +4250:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** if (HAL_DMA_Abort_IT(hi2c->hdmatx) != HAL_OK) + ARM GAS /tmp/ccuRhBPx.s page 76 + + +4251:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { +4252:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* Call Directly XferAbortCallback function in case of error */ +4253:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->hdmatx->XferAbortCallback(hi2c->hdmatx); +4254:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } +4255:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } +4256:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } +4257:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } +4258:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** else if (hi2c->State == HAL_I2C_STATE_BUSY_RX_LISTEN) +4259:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { +4260:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** if ((hi2c->Instance->CR1 & I2C_CR1_RXDMAEN) == I2C_CR1_RXDMAEN) +4261:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { +4262:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->Instance->CR1 &= ~I2C_CR1_RXDMAEN; +4263:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** +4264:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* Abort DMA Xfer if any */ +4265:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** if (hi2c->hdmarx != NULL) +4266:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { +4267:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* Set the I2C DMA Abort callback : +4268:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** will lead to call HAL_I2C_ErrorCallback() at end of DMA abort procedure */ +4269:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->hdmarx->XferAbortCallback = I2C_DMAAbort; +4270:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** +4271:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* Abort DMA RX */ +4272:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** if (HAL_DMA_Abort_IT(hi2c->hdmarx) != HAL_OK) +4273:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { +4274:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* Call Directly XferAbortCallback function in case of error */ +4275:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->hdmarx->XferAbortCallback(hi2c->hdmarx); +4276:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } +4277:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } +4278:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } +4279:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } +4280:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** else +4281:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { +4282:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* Nothing to do */ +4283:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } +4284:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** +4285:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->State = HAL_I2C_STATE_BUSY_RX_LISTEN; +4286:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->Mode = HAL_I2C_MODE_SLAVE; +4287:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->ErrorCode = HAL_I2C_ERROR_NONE; +4288:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** +4289:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* Enable Address Acknowledge */ +4290:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->Instance->CR2 &= ~I2C_CR2_NACK; +4291:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** +4292:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* Prepare transfer parameters */ +4293:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->pBuffPtr = pData; +4294:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->XferCount = Size; +4295:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->XferSize = hi2c->XferCount; +4296:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->XferOptions = XferOptions; +4297:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->XferISR = I2C_Slave_ISR_DMA; +4298:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** +4299:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** if (hi2c->hdmarx != NULL) +4300:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { +4301:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* Set the I2C DMA transfer complete callback */ +4302:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->hdmarx->XferCpltCallback = I2C_DMASlaveReceiveCplt; +4303:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** +4304:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* Set the DMA error callback */ +4305:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->hdmarx->XferErrorCallback = I2C_DMAError; +4306:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** +4307:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* Set the unused DMA callbacks to NULL */ + ARM GAS /tmp/ccuRhBPx.s page 77 + + +4308:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->hdmarx->XferHalfCpltCallback = NULL; +4309:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->hdmarx->XferAbortCallback = NULL; +4310:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** +4311:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* Enable the DMA channel */ +4312:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** dmaxferstatus = HAL_DMA_Start_IT(hi2c->hdmarx, (uint32_t)&hi2c->Instance->RXDR, +4313:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** (uint32_t)pData, hi2c->XferSize); +4314:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } +4315:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** else +4316:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { +4317:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* Update I2C state */ +4318:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->State = HAL_I2C_STATE_LISTEN; +4319:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->Mode = HAL_I2C_MODE_NONE; +4320:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** +4321:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* Update I2C error code */ +4322:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->ErrorCode |= HAL_I2C_ERROR_DMA_PARAM; +4323:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** +4324:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* Process Unlocked */ +4325:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** __HAL_UNLOCK(hi2c); +4326:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** +4327:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** return HAL_ERROR; +4328:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } +4329:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** +4330:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** if (dmaxferstatus == HAL_OK) +4331:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { +4332:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* Update XferCount value */ +4333:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->XferCount -= hi2c->XferSize; +4334:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** +4335:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* Reset XferSize */ +4336:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->XferSize = 0; +4337:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } +4338:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** else +4339:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { +4340:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* Update I2C state */ +4341:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->State = HAL_I2C_STATE_LISTEN; +4342:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->Mode = HAL_I2C_MODE_NONE; +4343:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** +4344:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* Update I2C error code */ +4345:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->ErrorCode |= HAL_I2C_ERROR_DMA; +4346:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** +4347:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* Process Unlocked */ +4348:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** __HAL_UNLOCK(hi2c); +4349:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** +4350:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** return HAL_ERROR; +4351:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } +4352:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** +4353:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** tmp = __HAL_I2C_GET_FLAG(hi2c, I2C_FLAG_ADDR); +4354:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** if ((I2C_GET_DIR(hi2c) == I2C_DIRECTION_TRANSMIT) && (tmp != RESET)) +4355:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { +4356:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* Clear ADDR flag after prepare the transfer parameters */ +4357:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* This action will generate an acknowledge to the Master */ +4358:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** __HAL_I2C_CLEAR_FLAG(hi2c, I2C_FLAG_ADDR); +4359:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } +4360:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** +4361:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* Process Unlocked */ +4362:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** __HAL_UNLOCK(hi2c); +4363:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** +4364:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* Enable DMA Request */ + ARM GAS /tmp/ccuRhBPx.s page 78 + + +4365:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->Instance->CR1 |= I2C_CR1_RXDMAEN; +4366:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** +4367:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* Note : The I2C interrupts must be enabled after unlocking current process +4368:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** to avoid the risk of I2C interrupt handle execution before current +4369:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** process unlock */ +4370:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* REnable ADDR interrupt */ +4371:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** I2C_Enable_IRQ(hi2c, I2C_XFER_RX_IT | I2C_XFER_LISTEN_IT); +4372:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** +4373:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** return HAL_OK; +4374:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } +4375:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** else +4376:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { +4377:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** return HAL_ERROR; +4378:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } +4379:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } +4380:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** +4381:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /** +4382:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** * @brief Enable the Address listen mode with Interrupt. +4383:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** * @param hi2c Pointer to a I2C_HandleTypeDef structure that contains +4384:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** * the configuration information for the specified I2C. +4385:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** * @retval HAL status +4386:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** */ +4387:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** HAL_StatusTypeDef HAL_I2C_EnableListen_IT(I2C_HandleTypeDef *hi2c) +4388:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { +4389:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** if (hi2c->State == HAL_I2C_STATE_READY) +4390:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { +4391:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->State = HAL_I2C_STATE_LISTEN; +4392:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->XferISR = I2C_Slave_ISR_IT; +4393:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** +4394:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* Enable the Address Match interrupt */ +4395:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** I2C_Enable_IRQ(hi2c, I2C_XFER_LISTEN_IT); +4396:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** +4397:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** return HAL_OK; +4398:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } +4399:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** else +4400:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { +4401:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** return HAL_BUSY; +4402:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } +4403:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } +4404:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** +4405:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /** +4406:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** * @brief Disable the Address listen mode with Interrupt. +4407:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** * @param hi2c Pointer to a I2C_HandleTypeDef structure that contains +4408:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** * the configuration information for the specified I2C +4409:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** * @retval HAL status +4410:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** */ +4411:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** HAL_StatusTypeDef HAL_I2C_DisableListen_IT(I2C_HandleTypeDef *hi2c) +4412:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { +4413:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* Declaration of tmp to prevent undefined behavior of volatile usage */ +4414:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** uint32_t tmp; +4415:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** +4416:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* Disable Address listen mode only if a transfer is not ongoing */ +4417:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** if (hi2c->State == HAL_I2C_STATE_LISTEN) +4418:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { +4419:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** tmp = (uint32_t)(hi2c->State) & I2C_STATE_MSK; +4420:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->PreviousState = tmp | (uint32_t)(hi2c->Mode); +4421:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->State = HAL_I2C_STATE_READY; + ARM GAS /tmp/ccuRhBPx.s page 79 + + +4422:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->Mode = HAL_I2C_MODE_NONE; +4423:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->XferISR = NULL; +4424:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** +4425:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* Disable the Address Match interrupt */ +4426:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** I2C_Disable_IRQ(hi2c, I2C_XFER_LISTEN_IT); +4427:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** +4428:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** return HAL_OK; +4429:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } +4430:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** else +4431:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { +4432:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** return HAL_BUSY; +4433:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } +4434:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } +4435:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** +4436:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /** +4437:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** * @brief Abort a master I2C IT or DMA process communication with Interrupt. +4438:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** * @param hi2c Pointer to a I2C_HandleTypeDef structure that contains +4439:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** * the configuration information for the specified I2C. +4440:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** * @param DevAddress Target device address: The device 7 bits address value +4441:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** * in datasheet must be shifted to the left before calling the interface +4442:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** * @retval HAL status +4443:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** */ +4444:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** HAL_StatusTypeDef HAL_I2C_Master_Abort_IT(I2C_HandleTypeDef *hi2c, uint16_t DevAddress) +4445:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { +4446:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** if (hi2c->Mode == HAL_I2C_MODE_MASTER) +4447:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { +4448:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* Process Locked */ +4449:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** __HAL_LOCK(hi2c); +4450:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** +4451:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* Disable Interrupts and Store Previous state */ +4452:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** if (hi2c->State == HAL_I2C_STATE_BUSY_TX) +4453:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { +4454:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** I2C_Disable_IRQ(hi2c, I2C_XFER_TX_IT); +4455:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->PreviousState = I2C_STATE_MASTER_BUSY_TX; +4456:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } +4457:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** else if (hi2c->State == HAL_I2C_STATE_BUSY_RX) +4458:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { +4459:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** I2C_Disable_IRQ(hi2c, I2C_XFER_RX_IT); +4460:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->PreviousState = I2C_STATE_MASTER_BUSY_RX; +4461:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } +4462:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** else +4463:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { +4464:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* Do nothing */ +4465:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } +4466:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** +4467:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* Set State at HAL_I2C_STATE_ABORT */ +4468:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->State = HAL_I2C_STATE_ABORT; +4469:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** +4470:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* Set NBYTES to 1 to generate a dummy read on I2C peripheral */ +4471:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* Set AUTOEND mode, this will generate a NACK then STOP condition to abort the current transfe +4472:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** I2C_TransferConfig(hi2c, DevAddress, 1, I2C_AUTOEND_MODE, I2C_GENERATE_STOP); +4473:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** +4474:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* Process Unlocked */ +4475:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** __HAL_UNLOCK(hi2c); +4476:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** +4477:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* Note : The I2C interrupts must be enabled after unlocking current process +4478:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** to avoid the risk of I2C interrupt handle execution before current + ARM GAS /tmp/ccuRhBPx.s page 80 + + +4479:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** process unlock */ +4480:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** I2C_Enable_IRQ(hi2c, I2C_XFER_CPLT_IT); +4481:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** +4482:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** return HAL_OK; +4483:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } +4484:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** else +4485:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { +4486:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* Wrong usage of abort function */ +4487:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* This function should be used only in case of abort monitored by master device */ +4488:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** return HAL_ERROR; +4489:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } +4490:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } +4491:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** +4492:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /** +4493:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** * @} +4494:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** */ +4495:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** +4496:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /** @defgroup I2C_IRQ_Handler_and_Callbacks IRQ Handler and Callbacks +4497:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** * @{ +4498:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** */ +4499:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** +4500:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /** +4501:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** * @brief This function handles I2C event interrupt request. +4502:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** * @param hi2c Pointer to a I2C_HandleTypeDef structure that contains +4503:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** * the configuration information for the specified I2C. +4504:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** * @retval None +4505:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** */ +4506:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** void HAL_I2C_EV_IRQHandler(I2C_HandleTypeDef *hi2c) /* Derogation MISRAC2012-Rule-8.13 */ +4507:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { +4508:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* Get current IT Flags and IT sources value */ +4509:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** uint32_t itflags = READ_REG(hi2c->Instance->ISR); +4510:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** uint32_t itsources = READ_REG(hi2c->Instance->CR1); +4511:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** +4512:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* I2C events treatment -------------------------------------*/ +4513:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** if (hi2c->XferISR != NULL) +4514:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { +4515:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->XferISR(hi2c, itflags, itsources); +4516:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } +4517:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } +4518:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** +4519:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /** +4520:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** * @brief This function handles I2C error interrupt request. +4521:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** * @param hi2c Pointer to a I2C_HandleTypeDef structure that contains +4522:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** * the configuration information for the specified I2C. +4523:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** * @retval None +4524:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** */ +4525:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** void HAL_I2C_ER_IRQHandler(I2C_HandleTypeDef *hi2c) +4526:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { +4527:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** uint32_t itflags = READ_REG(hi2c->Instance->ISR); +4528:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** uint32_t itsources = READ_REG(hi2c->Instance->CR1); +4529:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** uint32_t tmperror; +4530:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** +4531:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* I2C Bus error interrupt occurred ------------------------------------*/ +4532:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** if ((I2C_CHECK_FLAG(itflags, I2C_FLAG_BERR) != RESET) && \ +4533:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** (I2C_CHECK_IT_SOURCE(itsources, I2C_IT_ERRI) != RESET)) +4534:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { +4535:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->ErrorCode |= HAL_I2C_ERROR_BERR; + ARM GAS /tmp/ccuRhBPx.s page 81 + + +4536:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** +4537:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* Clear BERR flag */ +4538:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** __HAL_I2C_CLEAR_FLAG(hi2c, I2C_FLAG_BERR); +4539:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } +4540:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** +4541:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* I2C Over-Run/Under-Run interrupt occurred ----------------------------------------*/ +4542:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** if ((I2C_CHECK_FLAG(itflags, I2C_FLAG_OVR) != RESET) && \ +4543:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** (I2C_CHECK_IT_SOURCE(itsources, I2C_IT_ERRI) != RESET)) +4544:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { +4545:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->ErrorCode |= HAL_I2C_ERROR_OVR; +4546:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** +4547:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* Clear OVR flag */ +4548:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** __HAL_I2C_CLEAR_FLAG(hi2c, I2C_FLAG_OVR); +4549:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } +4550:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** +4551:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* I2C Arbitration Loss error interrupt occurred -------------------------------------*/ +4552:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** if ((I2C_CHECK_FLAG(itflags, I2C_FLAG_ARLO) != RESET) && \ +4553:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** (I2C_CHECK_IT_SOURCE(itsources, I2C_IT_ERRI) != RESET)) +4554:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { +4555:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->ErrorCode |= HAL_I2C_ERROR_ARLO; +4556:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** +4557:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* Clear ARLO flag */ +4558:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** __HAL_I2C_CLEAR_FLAG(hi2c, I2C_FLAG_ARLO); +4559:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } +4560:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** +4561:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* Store current volatile hi2c->ErrorCode, misra rule */ +4562:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** tmperror = hi2c->ErrorCode; +4563:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** +4564:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* Call the Error Callback in case of Error detected */ +4565:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** if ((tmperror & (HAL_I2C_ERROR_BERR | HAL_I2C_ERROR_OVR | HAL_I2C_ERROR_ARLO)) != HAL_I2C_ERROR_ +4566:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { +4567:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** I2C_ITError(hi2c, tmperror); +4568:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } +4569:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } +4570:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** +4571:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /** +4572:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** * @brief Master Tx Transfer completed callback. +4573:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** * @param hi2c Pointer to a I2C_HandleTypeDef structure that contains +4574:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** * the configuration information for the specified I2C. +4575:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** * @retval None +4576:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** */ +4577:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** __weak void HAL_I2C_MasterTxCpltCallback(I2C_HandleTypeDef *hi2c) +4578:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { +4579:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* Prevent unused argument(s) compilation warning */ +4580:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** UNUSED(hi2c); +4581:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** +4582:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* NOTE : This function should not be modified, when the callback is needed, +4583:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** the HAL_I2C_MasterTxCpltCallback could be implemented in the user file +4584:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** */ +4585:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } +4586:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** +4587:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /** +4588:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** * @brief Master Rx Transfer completed callback. +4589:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** * @param hi2c Pointer to a I2C_HandleTypeDef structure that contains +4590:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** * the configuration information for the specified I2C. +4591:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** * @retval None +4592:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** */ + ARM GAS /tmp/ccuRhBPx.s page 82 + + +4593:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** __weak void HAL_I2C_MasterRxCpltCallback(I2C_HandleTypeDef *hi2c) +4594:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { +4595:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* Prevent unused argument(s) compilation warning */ +4596:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** UNUSED(hi2c); +4597:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** +4598:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* NOTE : This function should not be modified, when the callback is needed, +4599:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** the HAL_I2C_MasterRxCpltCallback could be implemented in the user file +4600:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** */ +4601:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } +4602:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** +4603:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /** @brief Slave Tx Transfer completed callback. +4604:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** * @param hi2c Pointer to a I2C_HandleTypeDef structure that contains +4605:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** * the configuration information for the specified I2C. +4606:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** * @retval None +4607:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** */ +4608:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** __weak void HAL_I2C_SlaveTxCpltCallback(I2C_HandleTypeDef *hi2c) +4609:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { +4610:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* Prevent unused argument(s) compilation warning */ +4611:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** UNUSED(hi2c); +4612:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** +4613:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* NOTE : This function should not be modified, when the callback is needed, +4614:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** the HAL_I2C_SlaveTxCpltCallback could be implemented in the user file +4615:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** */ +4616:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } +4617:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** +4618:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /** +4619:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** * @brief Slave Rx Transfer completed callback. +4620:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** * @param hi2c Pointer to a I2C_HandleTypeDef structure that contains +4621:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** * the configuration information for the specified I2C. +4622:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** * @retval None +4623:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** */ +4624:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** __weak void HAL_I2C_SlaveRxCpltCallback(I2C_HandleTypeDef *hi2c) +4625:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { +4626:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* Prevent unused argument(s) compilation warning */ +4627:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** UNUSED(hi2c); +4628:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** +4629:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* NOTE : This function should not be modified, when the callback is needed, +4630:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** the HAL_I2C_SlaveRxCpltCallback could be implemented in the user file +4631:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** */ +4632:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } +4633:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** +4634:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /** +4635:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** * @brief Slave Address Match callback. +4636:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** * @param hi2c Pointer to a I2C_HandleTypeDef structure that contains +4637:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** * the configuration information for the specified I2C. +4638:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** * @param TransferDirection Master request Transfer Direction (Write/Read), value of @ref I2C_XFE +4639:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** * @param AddrMatchCode Address Match Code +4640:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** * @retval None +4641:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** */ +4642:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** __weak void HAL_I2C_AddrCallback(I2C_HandleTypeDef *hi2c, uint8_t TransferDirection, uint16_t AddrM +4643:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { +4644:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* Prevent unused argument(s) compilation warning */ +4645:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** UNUSED(hi2c); +4646:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** UNUSED(TransferDirection); +4647:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** UNUSED(AddrMatchCode); +4648:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** +4649:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* NOTE : This function should not be modified, when the callback is needed, + ARM GAS /tmp/ccuRhBPx.s page 83 + + +4650:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** the HAL_I2C_AddrCallback() could be implemented in the user file +4651:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** */ +4652:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } +4653:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** +4654:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /** +4655:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** * @brief Listen Complete callback. +4656:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** * @param hi2c Pointer to a I2C_HandleTypeDef structure that contains +4657:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** * the configuration information for the specified I2C. +4658:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** * @retval None +4659:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** */ +4660:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** __weak void HAL_I2C_ListenCpltCallback(I2C_HandleTypeDef *hi2c) +4661:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { +4662:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* Prevent unused argument(s) compilation warning */ +4663:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** UNUSED(hi2c); +4664:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** +4665:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* NOTE : This function should not be modified, when the callback is needed, +4666:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** the HAL_I2C_ListenCpltCallback() could be implemented in the user file +4667:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** */ +4668:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } +4669:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** +4670:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /** +4671:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** * @brief Memory Tx Transfer completed callback. +4672:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** * @param hi2c Pointer to a I2C_HandleTypeDef structure that contains +4673:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** * the configuration information for the specified I2C. +4674:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** * @retval None +4675:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** */ +4676:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** __weak void HAL_I2C_MemTxCpltCallback(I2C_HandleTypeDef *hi2c) +4677:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { +4678:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* Prevent unused argument(s) compilation warning */ +4679:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** UNUSED(hi2c); +4680:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** +4681:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* NOTE : This function should not be modified, when the callback is needed, +4682:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** the HAL_I2C_MemTxCpltCallback could be implemented in the user file +4683:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** */ +4684:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } +4685:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** +4686:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /** +4687:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** * @brief Memory Rx Transfer completed callback. +4688:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** * @param hi2c Pointer to a I2C_HandleTypeDef structure that contains +4689:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** * the configuration information for the specified I2C. +4690:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** * @retval None +4691:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** */ +4692:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** __weak void HAL_I2C_MemRxCpltCallback(I2C_HandleTypeDef *hi2c) +4693:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { +4694:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* Prevent unused argument(s) compilation warning */ +4695:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** UNUSED(hi2c); +4696:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** +4697:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* NOTE : This function should not be modified, when the callback is needed, +4698:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** the HAL_I2C_MemRxCpltCallback could be implemented in the user file +4699:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** */ +4700:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } +4701:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** +4702:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /** +4703:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** * @brief I2C error callback. +4704:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** * @param hi2c Pointer to a I2C_HandleTypeDef structure that contains +4705:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** * the configuration information for the specified I2C. +4706:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** * @retval None + ARM GAS /tmp/ccuRhBPx.s page 84 + + +4707:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** */ +4708:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** __weak void HAL_I2C_ErrorCallback(I2C_HandleTypeDef *hi2c) +4709:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { +4710:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* Prevent unused argument(s) compilation warning */ +4711:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** UNUSED(hi2c); +4712:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** +4713:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* NOTE : This function should not be modified, when the callback is needed, +4714:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** the HAL_I2C_ErrorCallback could be implemented in the user file +4715:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** */ +4716:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } +4717:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** +4718:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /** +4719:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** * @brief I2C abort callback. +4720:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** * @param hi2c Pointer to a I2C_HandleTypeDef structure that contains +4721:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** * the configuration information for the specified I2C. +4722:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** * @retval None +4723:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** */ +4724:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** __weak void HAL_I2C_AbortCpltCallback(I2C_HandleTypeDef *hi2c) +4725:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { +4726:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* Prevent unused argument(s) compilation warning */ +4727:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** UNUSED(hi2c); +4728:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** +4729:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* NOTE : This function should not be modified, when the callback is needed, +4730:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** the HAL_I2C_AbortCpltCallback could be implemented in the user file +4731:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** */ +4732:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } +4733:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** +4734:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /** +4735:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** * @} +4736:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** */ +4737:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** +4738:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /** @defgroup I2C_Exported_Functions_Group3 Peripheral State, Mode and Error functions +4739:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** * @brief Peripheral State, Mode and Error functions +4740:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** * +4741:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** @verbatim +4742:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** =============================================================================== +4743:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** ##### Peripheral State, Mode and Error functions ##### +4744:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** =============================================================================== +4745:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** [..] +4746:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** This subsection permit to get in run-time the status of the peripheral +4747:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** and the data flow. +4748:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** +4749:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** @endverbatim +4750:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** * @{ +4751:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** */ +4752:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** +4753:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /** +4754:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** * @brief Return the I2C handle state. +4755:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** * @param hi2c Pointer to a I2C_HandleTypeDef structure that contains +4756:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** * the configuration information for the specified I2C. +4757:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** * @retval HAL state +4758:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** */ +4759:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** HAL_I2C_StateTypeDef HAL_I2C_GetState(const I2C_HandleTypeDef *hi2c) +4760:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { +4761:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* Return I2C handle state */ +4762:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** return hi2c->State; +4763:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } + ARM GAS /tmp/ccuRhBPx.s page 85 + + +4764:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** +4765:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /** +4766:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** * @brief Returns the I2C Master, Slave, Memory or no mode. +4767:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** * @param hi2c Pointer to a I2C_HandleTypeDef structure that contains +4768:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** * the configuration information for I2C module +4769:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** * @retval HAL mode +4770:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** */ +4771:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** HAL_I2C_ModeTypeDef HAL_I2C_GetMode(const I2C_HandleTypeDef *hi2c) +4772:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { +4773:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** return hi2c->Mode; +4774:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } +4775:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** +4776:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /** +4777:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** * @brief Return the I2C error code. +4778:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** * @param hi2c Pointer to a I2C_HandleTypeDef structure that contains +4779:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** * the configuration information for the specified I2C. +4780:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** * @retval I2C Error Code +4781:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** */ +4782:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** uint32_t HAL_I2C_GetError(const I2C_HandleTypeDef *hi2c) +4783:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { +4784:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** return hi2c->ErrorCode; +4785:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } +4786:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** +4787:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /** +4788:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** * @} +4789:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** */ +4790:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** +4791:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /** +4792:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** * @} +4793:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** */ +4794:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** +4795:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /** @addtogroup I2C_Private_Functions +4796:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** * @{ +4797:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** */ +4798:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** +4799:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /** +4800:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** * @brief Interrupt Sub-Routine which handle the Interrupt Flags Master Mode with Interrupt. +4801:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** * @param hi2c Pointer to a I2C_HandleTypeDef structure that contains +4802:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** * the configuration information for the specified I2C. +4803:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** * @param ITFlags Interrupt flags to handle. +4804:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** * @param ITSources Interrupt sources enabled. +4805:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** * @retval HAL status +4806:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** */ +4807:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** static HAL_StatusTypeDef I2C_Master_ISR_IT(struct __I2C_HandleTypeDef *hi2c, uint32_t ITFlags, +4808:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** uint32_t ITSources) +4809:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { +4810:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** uint16_t devaddress; +4811:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** uint32_t tmpITFlags = ITFlags; +4812:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** +4813:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* Process Locked */ +4814:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** __HAL_LOCK(hi2c); +4815:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** +4816:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** if ((I2C_CHECK_FLAG(tmpITFlags, I2C_FLAG_AF) != RESET) && \ +4817:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** (I2C_CHECK_IT_SOURCE(ITSources, I2C_IT_NACKI) != RESET)) +4818:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { +4819:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* Clear NACK Flag */ +4820:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** __HAL_I2C_CLEAR_FLAG(hi2c, I2C_FLAG_AF); + ARM GAS /tmp/ccuRhBPx.s page 86 + + +4821:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** +4822:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* Set corresponding Error Code */ +4823:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* No need to generate STOP, it is automatically done */ +4824:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* Error callback will be send during stop flag treatment */ +4825:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->ErrorCode |= HAL_I2C_ERROR_AF; +4826:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** +4827:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* Flush TX register */ +4828:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** I2C_Flush_TXDR(hi2c); +4829:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } +4830:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** else if ((I2C_CHECK_FLAG(tmpITFlags, I2C_FLAG_RXNE) != RESET) && \ +4831:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** (I2C_CHECK_IT_SOURCE(ITSources, I2C_IT_RXI) != RESET)) +4832:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { +4833:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* Remove RXNE flag on temporary variable as read done */ +4834:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** tmpITFlags &= ~I2C_FLAG_RXNE; +4835:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** +4836:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* Read data from RXDR */ +4837:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** *hi2c->pBuffPtr = (uint8_t)hi2c->Instance->RXDR; +4838:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** +4839:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* Increment Buffer pointer */ +4840:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->pBuffPtr++; +4841:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** +4842:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->XferSize--; +4843:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->XferCount--; +4844:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } +4845:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** else if ((I2C_CHECK_FLAG(tmpITFlags, I2C_FLAG_TXIS) != RESET) && \ +4846:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** (I2C_CHECK_IT_SOURCE(ITSources, I2C_IT_TXI) != RESET)) +4847:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { +4848:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* Write data to TXDR */ +4849:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->Instance->TXDR = *hi2c->pBuffPtr; +4850:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** +4851:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* Increment Buffer pointer */ +4852:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->pBuffPtr++; +4853:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** +4854:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->XferSize--; +4855:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->XferCount--; +4856:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } +4857:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** else if ((I2C_CHECK_FLAG(tmpITFlags, I2C_FLAG_TCR) != RESET) && \ +4858:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** (I2C_CHECK_IT_SOURCE(ITSources, I2C_IT_TCI) != RESET)) +4859:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { +4860:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** if ((hi2c->XferCount != 0U) && (hi2c->XferSize == 0U)) +4861:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { +4862:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** devaddress = (uint16_t)(hi2c->Instance->CR2 & I2C_CR2_SADD); +4863:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** +4864:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** if (hi2c->XferCount > MAX_NBYTE_SIZE) +4865:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { +4866:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->XferSize = MAX_NBYTE_SIZE; +4867:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** I2C_TransferConfig(hi2c, devaddress, (uint8_t)hi2c->XferSize, I2C_RELOAD_MODE, I2C_NO_START +4868:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } +4869:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** else +4870:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { +4871:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->XferSize = hi2c->XferCount; +4872:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** if (hi2c->XferOptions != I2C_NO_OPTION_FRAME) +4873:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { +4874:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** I2C_TransferConfig(hi2c, devaddress, (uint8_t)hi2c->XferSize, +4875:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->XferOptions, I2C_NO_STARTSTOP); +4876:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } +4877:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** else + ARM GAS /tmp/ccuRhBPx.s page 87 + + +4878:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { +4879:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** I2C_TransferConfig(hi2c, devaddress, (uint8_t)hi2c->XferSize, +4880:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** I2C_AUTOEND_MODE, I2C_NO_STARTSTOP); +4881:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } +4882:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } +4883:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } +4884:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** else +4885:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { +4886:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* Call TxCpltCallback() if no stop mode is set */ +4887:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** if (I2C_GET_STOP_MODE(hi2c) != I2C_AUTOEND_MODE) +4888:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { +4889:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* Call I2C Master Sequential complete process */ +4890:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** I2C_ITMasterSeqCplt(hi2c); +4891:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } +4892:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** else +4893:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { +4894:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* Wrong size Status regarding TCR flag event */ +4895:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* Call the corresponding callback to inform upper layer of End of Transfer */ +4896:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** I2C_ITError(hi2c, HAL_I2C_ERROR_SIZE); +4897:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } +4898:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } +4899:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } +4900:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** else if ((I2C_CHECK_FLAG(tmpITFlags, I2C_FLAG_TC) != RESET) && \ +4901:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** (I2C_CHECK_IT_SOURCE(ITSources, I2C_IT_TCI) != RESET)) +4902:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { +4903:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** if (hi2c->XferCount == 0U) +4904:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { +4905:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** if (I2C_GET_STOP_MODE(hi2c) != I2C_AUTOEND_MODE) +4906:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { +4907:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* Generate a stop condition in case of no transfer option */ +4908:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** if (hi2c->XferOptions == I2C_NO_OPTION_FRAME) +4909:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { +4910:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* Generate Stop */ +4911:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->Instance->CR2 |= I2C_CR2_STOP; +4912:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } +4913:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** else +4914:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { +4915:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* Call I2C Master Sequential complete process */ +4916:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** I2C_ITMasterSeqCplt(hi2c); +4917:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } +4918:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } +4919:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } +4920:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** else +4921:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { +4922:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* Wrong size Status regarding TC flag event */ +4923:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* Call the corresponding callback to inform upper layer of End of Transfer */ +4924:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** I2C_ITError(hi2c, HAL_I2C_ERROR_SIZE); +4925:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } +4926:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } +4927:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** else +4928:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { +4929:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* Nothing to do */ +4930:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } +4931:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** +4932:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** if ((I2C_CHECK_FLAG(tmpITFlags, I2C_FLAG_STOPF) != RESET) && \ +4933:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** (I2C_CHECK_IT_SOURCE(ITSources, I2C_IT_STOPI) != RESET)) +4934:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { + ARM GAS /tmp/ccuRhBPx.s page 88 + + +4935:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* Call I2C Master complete process */ +4936:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** I2C_ITMasterCplt(hi2c, tmpITFlags); +4937:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } +4938:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** +4939:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* Process Unlocked */ +4940:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** __HAL_UNLOCK(hi2c); +4941:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** +4942:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** return HAL_OK; +4943:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } +4944:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** +4945:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /** +4946:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** * @brief Interrupt Sub-Routine which handle the Interrupt Flags Memory Mode with Interrupt. +4947:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** * @param hi2c Pointer to a I2C_HandleTypeDef structure that contains +4948:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** * the configuration information for the specified I2C. +4949:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** * @param ITFlags Interrupt flags to handle. +4950:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** * @param ITSources Interrupt sources enabled. +4951:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** * @retval HAL status +4952:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** */ +4953:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** static HAL_StatusTypeDef I2C_Mem_ISR_IT(struct __I2C_HandleTypeDef *hi2c, uint32_t ITFlags, +4954:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** uint32_t ITSources) +4955:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { +4956:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** uint32_t direction = I2C_GENERATE_START_WRITE; +4957:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** uint32_t tmpITFlags = ITFlags; +4958:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** +4959:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* Process Locked */ +4960:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** __HAL_LOCK(hi2c); +4961:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** +4962:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** if ((I2C_CHECK_FLAG(tmpITFlags, I2C_FLAG_AF) != RESET) && \ +4963:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** (I2C_CHECK_IT_SOURCE(ITSources, I2C_IT_NACKI) != RESET)) +4964:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { +4965:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* Clear NACK Flag */ +4966:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** __HAL_I2C_CLEAR_FLAG(hi2c, I2C_FLAG_AF); +4967:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** +4968:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* Set corresponding Error Code */ +4969:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* No need to generate STOP, it is automatically done */ +4970:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* Error callback will be send during stop flag treatment */ +4971:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->ErrorCode |= HAL_I2C_ERROR_AF; +4972:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** +4973:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* Flush TX register */ +4974:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** I2C_Flush_TXDR(hi2c); +4975:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } +4976:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** else if ((I2C_CHECK_FLAG(tmpITFlags, I2C_FLAG_RXNE) != RESET) && \ +4977:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** (I2C_CHECK_IT_SOURCE(ITSources, I2C_IT_RXI) != RESET)) +4978:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { +4979:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* Remove RXNE flag on temporary variable as read done */ +4980:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** tmpITFlags &= ~I2C_FLAG_RXNE; +4981:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** +4982:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* Read data from RXDR */ +4983:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** *hi2c->pBuffPtr = (uint8_t)hi2c->Instance->RXDR; +4984:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** +4985:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* Increment Buffer pointer */ +4986:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->pBuffPtr++; +4987:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** +4988:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->XferSize--; +4989:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->XferCount--; +4990:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } +4991:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** else if ((I2C_CHECK_FLAG(tmpITFlags, I2C_FLAG_TXIS) != RESET) && \ + ARM GAS /tmp/ccuRhBPx.s page 89 + + +4992:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** (I2C_CHECK_IT_SOURCE(ITSources, I2C_IT_TXI) != RESET)) +4993:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { +4994:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** if (hi2c->Memaddress == 0xFFFFFFFFU) +4995:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { +4996:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* Write data to TXDR */ +4997:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->Instance->TXDR = *hi2c->pBuffPtr; +4998:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** +4999:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* Increment Buffer pointer */ +5000:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->pBuffPtr++; +5001:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** +5002:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->XferSize--; +5003:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->XferCount--; +5004:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } +5005:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** else +5006:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { +5007:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* Write LSB part of Memory Address */ +5008:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->Instance->TXDR = hi2c->Memaddress; +5009:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** +5010:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* Reset Memaddress content */ +5011:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->Memaddress = 0xFFFFFFFFU; +5012:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } +5013:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } +5014:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** else if ((I2C_CHECK_FLAG(tmpITFlags, I2C_FLAG_TCR) != RESET) && \ +5015:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** (I2C_CHECK_IT_SOURCE(ITSources, I2C_IT_TCI) != RESET)) +5016:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { +5017:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** if ((hi2c->XferCount != 0U) && (hi2c->XferSize == 0U)) +5018:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { +5019:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** if (hi2c->XferCount > MAX_NBYTE_SIZE) +5020:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { +5021:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->XferSize = MAX_NBYTE_SIZE; +5022:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** I2C_TransferConfig(hi2c, (uint16_t)hi2c->Devaddress, (uint8_t)hi2c->XferSize, +5023:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** I2C_RELOAD_MODE, I2C_NO_STARTSTOP); +5024:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } +5025:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** else +5026:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { +5027:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->XferSize = hi2c->XferCount; +5028:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** I2C_TransferConfig(hi2c, (uint16_t)hi2c->Devaddress, (uint8_t)hi2c->XferSize, +5029:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** I2C_AUTOEND_MODE, I2C_NO_STARTSTOP); +5030:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } +5031:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } +5032:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** else +5033:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { +5034:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* Wrong size Status regarding TCR flag event */ +5035:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* Call the corresponding callback to inform upper layer of End of Transfer */ +5036:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** I2C_ITError(hi2c, HAL_I2C_ERROR_SIZE); +5037:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } +5038:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } +5039:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** else if ((I2C_CHECK_FLAG(tmpITFlags, I2C_FLAG_TC) != RESET) && \ +5040:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** (I2C_CHECK_IT_SOURCE(ITSources, I2C_IT_TCI) != RESET)) +5041:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { +5042:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** if (hi2c->State == HAL_I2C_STATE_BUSY_RX) +5043:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { +5044:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** direction = I2C_GENERATE_START_READ; +5045:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } +5046:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** +5047:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** if (hi2c->XferCount > MAX_NBYTE_SIZE) +5048:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { + ARM GAS /tmp/ccuRhBPx.s page 90 + + +5049:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->XferSize = MAX_NBYTE_SIZE; +5050:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** +5051:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* Set NBYTES to write and reload if hi2c->XferCount > MAX_NBYTE_SIZE and generate RESTART */ +5052:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** I2C_TransferConfig(hi2c, (uint16_t)hi2c->Devaddress, (uint8_t)hi2c->XferSize, +5053:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** I2C_RELOAD_MODE, direction); +5054:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } +5055:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** else +5056:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { +5057:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->XferSize = hi2c->XferCount; +5058:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** +5059:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* Set NBYTES to write and generate RESTART */ +5060:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** I2C_TransferConfig(hi2c, (uint16_t)hi2c->Devaddress, (uint8_t)hi2c->XferSize, +5061:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** I2C_AUTOEND_MODE, direction); +5062:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } +5063:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } +5064:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** else +5065:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { +5066:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* Nothing to do */ +5067:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } +5068:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** +5069:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** if ((I2C_CHECK_FLAG(tmpITFlags, I2C_FLAG_STOPF) != RESET) && \ +5070:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** (I2C_CHECK_IT_SOURCE(ITSources, I2C_IT_STOPI) != RESET)) +5071:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { +5072:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* Call I2C Master complete process */ +5073:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** I2C_ITMasterCplt(hi2c, tmpITFlags); +5074:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } +5075:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** +5076:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* Process Unlocked */ +5077:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** __HAL_UNLOCK(hi2c); +5078:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** +5079:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** return HAL_OK; +5080:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } +5081:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** +5082:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /** +5083:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** * @brief Interrupt Sub-Routine which handle the Interrupt Flags Slave Mode with Interrupt. +5084:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** * @param hi2c Pointer to a I2C_HandleTypeDef structure that contains +5085:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** * the configuration information for the specified I2C. +5086:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** * @param ITFlags Interrupt flags to handle. +5087:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** * @param ITSources Interrupt sources enabled. +5088:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** * @retval HAL status +5089:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** */ +5090:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** static HAL_StatusTypeDef I2C_Slave_ISR_IT(struct __I2C_HandleTypeDef *hi2c, uint32_t ITFlags, +5091:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** uint32_t ITSources) +5092:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { +5093:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** uint32_t tmpoptions = hi2c->XferOptions; +5094:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** uint32_t tmpITFlags = ITFlags; +5095:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** +5096:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* Process locked */ +5097:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** __HAL_LOCK(hi2c); +5098:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** +5099:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* Check if STOPF is set */ +5100:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** if ((I2C_CHECK_FLAG(tmpITFlags, I2C_FLAG_STOPF) != RESET) && \ +5101:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** (I2C_CHECK_IT_SOURCE(ITSources, I2C_IT_STOPI) != RESET)) +5102:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { +5103:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* Call I2C Slave complete process */ +5104:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** I2C_ITSlaveCplt(hi2c, tmpITFlags); +5105:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } + ARM GAS /tmp/ccuRhBPx.s page 91 + + +5106:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** +5107:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** if ((I2C_CHECK_FLAG(tmpITFlags, I2C_FLAG_AF) != RESET) && \ +5108:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** (I2C_CHECK_IT_SOURCE(ITSources, I2C_IT_NACKI) != RESET)) +5109:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { +5110:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* Check that I2C transfer finished */ +5111:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* if yes, normal use case, a NACK is sent by the MASTER when Transfer is finished */ +5112:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* Mean XferCount == 0*/ +5113:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* So clear Flag NACKF only */ +5114:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** if (hi2c->XferCount == 0U) +5115:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { +5116:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** if ((hi2c->State == HAL_I2C_STATE_LISTEN) && (tmpoptions == I2C_FIRST_AND_LAST_FRAME)) +5117:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* Same action must be done for (tmpoptions == I2C_LAST_FRAME) which removed for +5118:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** Warning[Pa134]: left and right operands are identical */ +5119:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { +5120:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* Call I2C Listen complete process */ +5121:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** I2C_ITListenCplt(hi2c, tmpITFlags); +5122:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } +5123:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** else if ((hi2c->State == HAL_I2C_STATE_BUSY_TX_LISTEN) && (tmpoptions != I2C_NO_OPTION_FRAME) +5124:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { +5125:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* Clear NACK Flag */ +5126:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** __HAL_I2C_CLEAR_FLAG(hi2c, I2C_FLAG_AF); +5127:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** +5128:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* Flush TX register */ +5129:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** I2C_Flush_TXDR(hi2c); +5130:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** +5131:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* Last Byte is Transmitted */ +5132:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* Call I2C Slave Sequential complete process */ +5133:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** I2C_ITSlaveSeqCplt(hi2c); +5134:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } +5135:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** else +5136:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { +5137:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* Clear NACK Flag */ +5138:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** __HAL_I2C_CLEAR_FLAG(hi2c, I2C_FLAG_AF); +5139:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } +5140:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } +5141:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** else +5142:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { +5143:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* if no, error use case, a Non-Acknowledge of last Data is generated by the MASTER*/ +5144:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* Clear NACK Flag */ +5145:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** __HAL_I2C_CLEAR_FLAG(hi2c, I2C_FLAG_AF); +5146:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** +5147:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* Set ErrorCode corresponding to a Non-Acknowledge */ +5148:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->ErrorCode |= HAL_I2C_ERROR_AF; +5149:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** +5150:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** if ((tmpoptions == I2C_FIRST_FRAME) || (tmpoptions == I2C_NEXT_FRAME)) +5151:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { +5152:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* Call the corresponding callback to inform upper layer of End of Transfer */ +5153:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** I2C_ITError(hi2c, hi2c->ErrorCode); +5154:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } +5155:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } +5156:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } +5157:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** else if ((I2C_CHECK_FLAG(tmpITFlags, I2C_FLAG_RXNE) != RESET) && \ +5158:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** (I2C_CHECK_IT_SOURCE(ITSources, I2C_IT_RXI) != RESET)) +5159:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { +5160:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** if (hi2c->XferCount > 0U) +5161:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { +5162:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* Read data from RXDR */ + ARM GAS /tmp/ccuRhBPx.s page 92 + + +5163:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** *hi2c->pBuffPtr = (uint8_t)hi2c->Instance->RXDR; +5164:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** +5165:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* Increment Buffer pointer */ +5166:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->pBuffPtr++; +5167:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** +5168:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->XferSize--; +5169:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->XferCount--; +5170:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } +5171:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** +5172:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** if ((hi2c->XferCount == 0U) && \ +5173:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** (tmpoptions != I2C_NO_OPTION_FRAME)) +5174:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { +5175:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* Call I2C Slave Sequential complete process */ +5176:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** I2C_ITSlaveSeqCplt(hi2c); +5177:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } +5178:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } +5179:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** else if ((I2C_CHECK_FLAG(tmpITFlags, I2C_FLAG_ADDR) != RESET) && \ +5180:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** (I2C_CHECK_IT_SOURCE(ITSources, I2C_IT_ADDRI) != RESET)) +5181:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { +5182:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** I2C_ITAddrCplt(hi2c, tmpITFlags); +5183:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } +5184:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** else if ((I2C_CHECK_FLAG(tmpITFlags, I2C_FLAG_TXIS) != RESET) && \ +5185:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** (I2C_CHECK_IT_SOURCE(ITSources, I2C_IT_TXI) != RESET)) +5186:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { +5187:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* Write data to TXDR only if XferCount not reach "0" */ +5188:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* A TXIS flag can be set, during STOP treatment */ +5189:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* Check if all Data have already been sent */ +5190:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* If it is the case, this last write in TXDR is not sent, correspond to a dummy TXIS event */ +5191:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** if (hi2c->XferCount > 0U) +5192:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { +5193:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* Write data to TXDR */ +5194:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->Instance->TXDR = *hi2c->pBuffPtr; +5195:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** +5196:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* Increment Buffer pointer */ +5197:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->pBuffPtr++; +5198:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** +5199:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->XferCount--; +5200:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->XferSize--; +5201:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } +5202:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** else +5203:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { +5204:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** if ((tmpoptions == I2C_NEXT_FRAME) || (tmpoptions == I2C_FIRST_FRAME)) +5205:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { +5206:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* Last Byte is Transmitted */ +5207:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* Call I2C Slave Sequential complete process */ +5208:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** I2C_ITSlaveSeqCplt(hi2c); +5209:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } +5210:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } +5211:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } +5212:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** else +5213:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { +5214:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* Nothing to do */ +5215:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } +5216:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** +5217:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* Process Unlocked */ +5218:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** __HAL_UNLOCK(hi2c); +5219:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + ARM GAS /tmp/ccuRhBPx.s page 93 + + +5220:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** return HAL_OK; +5221:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } +5222:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** +5223:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /** +5224:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** * @brief Interrupt Sub-Routine which handle the Interrupt Flags Master Mode with DMA. +5225:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** * @param hi2c Pointer to a I2C_HandleTypeDef structure that contains +5226:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** * the configuration information for the specified I2C. +5227:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** * @param ITFlags Interrupt flags to handle. +5228:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** * @param ITSources Interrupt sources enabled. +5229:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** * @retval HAL status +5230:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** */ +5231:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** static HAL_StatusTypeDef I2C_Master_ISR_DMA(struct __I2C_HandleTypeDef *hi2c, uint32_t ITFlags, +5232:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** uint32_t ITSources) +5233:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { +5234:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** uint16_t devaddress; +5235:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** uint32_t xfermode; +5236:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** +5237:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* Process Locked */ +5238:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** __HAL_LOCK(hi2c); +5239:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** +5240:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** if ((I2C_CHECK_FLAG(ITFlags, I2C_FLAG_AF) != RESET) && \ +5241:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** (I2C_CHECK_IT_SOURCE(ITSources, I2C_IT_NACKI) != RESET)) +5242:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { +5243:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* Clear NACK Flag */ +5244:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** __HAL_I2C_CLEAR_FLAG(hi2c, I2C_FLAG_AF); +5245:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** +5246:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* Set corresponding Error Code */ +5247:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->ErrorCode |= HAL_I2C_ERROR_AF; +5248:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** +5249:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* No need to generate STOP, it is automatically done */ +5250:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* But enable STOP interrupt, to treat it */ +5251:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* Error callback will be send during stop flag treatment */ +5252:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** I2C_Enable_IRQ(hi2c, I2C_XFER_CPLT_IT); +5253:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** +5254:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* Flush TX register */ +5255:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** I2C_Flush_TXDR(hi2c); +5256:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } +5257:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** else if ((I2C_CHECK_FLAG(ITFlags, I2C_FLAG_TCR) != RESET) && \ +5258:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** (I2C_CHECK_IT_SOURCE(ITSources, I2C_IT_TCI) != RESET)) +5259:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { +5260:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* Disable TC interrupt */ +5261:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** __HAL_I2C_DISABLE_IT(hi2c, I2C_IT_TCI); +5262:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** +5263:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** if (hi2c->XferCount != 0U) +5264:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { +5265:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* Recover Slave address */ +5266:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** devaddress = (uint16_t)(hi2c->Instance->CR2 & I2C_CR2_SADD); +5267:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** +5268:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* Prepare the new XferSize to transfer */ +5269:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** if (hi2c->XferCount > MAX_NBYTE_SIZE) +5270:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { +5271:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->XferSize = MAX_NBYTE_SIZE; +5272:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** xfermode = I2C_RELOAD_MODE; +5273:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } +5274:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** else +5275:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { +5276:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->XferSize = hi2c->XferCount; + ARM GAS /tmp/ccuRhBPx.s page 94 + + +5277:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** if (hi2c->XferOptions != I2C_NO_OPTION_FRAME) +5278:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { +5279:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** xfermode = hi2c->XferOptions; +5280:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } +5281:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** else +5282:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { +5283:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** xfermode = I2C_AUTOEND_MODE; +5284:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } +5285:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } +5286:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** +5287:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* Set the new XferSize in Nbytes register */ +5288:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** I2C_TransferConfig(hi2c, devaddress, (uint8_t)hi2c->XferSize, xfermode, I2C_NO_STARTSTOP); +5289:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** +5290:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* Update XferCount value */ +5291:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->XferCount -= hi2c->XferSize; +5292:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** +5293:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* Enable DMA Request */ +5294:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** if (hi2c->State == HAL_I2C_STATE_BUSY_RX) +5295:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { +5296:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->Instance->CR1 |= I2C_CR1_RXDMAEN; +5297:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } +5298:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** else +5299:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { +5300:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->Instance->CR1 |= I2C_CR1_TXDMAEN; +5301:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } +5302:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } +5303:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** else +5304:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { +5305:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* Call TxCpltCallback() if no stop mode is set */ +5306:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** if (I2C_GET_STOP_MODE(hi2c) != I2C_AUTOEND_MODE) +5307:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { +5308:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* Call I2C Master Sequential complete process */ +5309:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** I2C_ITMasterSeqCplt(hi2c); +5310:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } +5311:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** else +5312:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { +5313:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* Wrong size Status regarding TCR flag event */ +5314:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* Call the corresponding callback to inform upper layer of End of Transfer */ +5315:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** I2C_ITError(hi2c, HAL_I2C_ERROR_SIZE); +5316:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } +5317:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } +5318:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } +5319:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** else if ((I2C_CHECK_FLAG(ITFlags, I2C_FLAG_TC) != RESET) && \ +5320:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** (I2C_CHECK_IT_SOURCE(ITSources, I2C_IT_TCI) != RESET)) +5321:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { +5322:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** if (hi2c->XferCount == 0U) +5323:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { +5324:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** if (I2C_GET_STOP_MODE(hi2c) != I2C_AUTOEND_MODE) +5325:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { +5326:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* Generate a stop condition in case of no transfer option */ +5327:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** if (hi2c->XferOptions == I2C_NO_OPTION_FRAME) +5328:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { +5329:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* Generate Stop */ +5330:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->Instance->CR2 |= I2C_CR2_STOP; +5331:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } +5332:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** else +5333:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { + ARM GAS /tmp/ccuRhBPx.s page 95 + + +5334:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* Call I2C Master Sequential complete process */ +5335:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** I2C_ITMasterSeqCplt(hi2c); +5336:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } +5337:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } +5338:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } +5339:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** else +5340:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { +5341:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* Wrong size Status regarding TC flag event */ +5342:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* Call the corresponding callback to inform upper layer of End of Transfer */ +5343:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** I2C_ITError(hi2c, HAL_I2C_ERROR_SIZE); +5344:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } +5345:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } +5346:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** else if ((I2C_CHECK_FLAG(ITFlags, I2C_FLAG_STOPF) != RESET) && \ +5347:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** (I2C_CHECK_IT_SOURCE(ITSources, I2C_IT_STOPI) != RESET)) +5348:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { +5349:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* Call I2C Master complete process */ +5350:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** I2C_ITMasterCplt(hi2c, ITFlags); +5351:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } +5352:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** else +5353:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { +5354:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* Nothing to do */ +5355:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } +5356:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** +5357:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* Process Unlocked */ +5358:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** __HAL_UNLOCK(hi2c); +5359:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** +5360:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** return HAL_OK; +5361:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } +5362:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** +5363:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /** +5364:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** * @brief Interrupt Sub-Routine which handle the Interrupt Flags Memory Mode with DMA. +5365:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** * @param hi2c Pointer to a I2C_HandleTypeDef structure that contains +5366:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** * the configuration information for the specified I2C. +5367:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** * @param ITFlags Interrupt flags to handle. +5368:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** * @param ITSources Interrupt sources enabled. +5369:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** * @retval HAL status +5370:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** */ +5371:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** static HAL_StatusTypeDef I2C_Mem_ISR_DMA(struct __I2C_HandleTypeDef *hi2c, uint32_t ITFlags, +5372:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** uint32_t ITSources) +5373:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { +5374:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** uint32_t direction = I2C_GENERATE_START_WRITE; +5375:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** +5376:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* Process Locked */ +5377:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** __HAL_LOCK(hi2c); +5378:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** +5379:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** if ((I2C_CHECK_FLAG(ITFlags, I2C_FLAG_AF) != RESET) && \ +5380:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** (I2C_CHECK_IT_SOURCE(ITSources, I2C_IT_NACKI) != RESET)) +5381:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { +5382:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* Clear NACK Flag */ +5383:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** __HAL_I2C_CLEAR_FLAG(hi2c, I2C_FLAG_AF); +5384:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** +5385:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* Set corresponding Error Code */ +5386:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->ErrorCode |= HAL_I2C_ERROR_AF; +5387:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** +5388:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* No need to generate STOP, it is automatically done */ +5389:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* But enable STOP interrupt, to treat it */ +5390:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* Error callback will be send during stop flag treatment */ + ARM GAS /tmp/ccuRhBPx.s page 96 + + +5391:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** I2C_Enable_IRQ(hi2c, I2C_XFER_CPLT_IT); +5392:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** +5393:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* Flush TX register */ +5394:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** I2C_Flush_TXDR(hi2c); +5395:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } +5396:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** else if ((I2C_CHECK_FLAG(ITFlags, I2C_FLAG_TXIS) != RESET) && \ +5397:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** (I2C_CHECK_IT_SOURCE(ITSources, I2C_IT_TXI) != RESET)) +5398:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { +5399:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* Write LSB part of Memory Address */ +5400:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->Instance->TXDR = hi2c->Memaddress; +5401:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** +5402:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* Reset Memaddress content */ +5403:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->Memaddress = 0xFFFFFFFFU; +5404:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } +5405:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** else if ((I2C_CHECK_FLAG(ITFlags, I2C_FLAG_TCR) != RESET) && \ +5406:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** (I2C_CHECK_IT_SOURCE(ITSources, I2C_IT_TCI) != RESET)) +5407:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { +5408:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* Enable only Error interrupt */ +5409:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** I2C_Enable_IRQ(hi2c, I2C_XFER_ERROR_IT); +5410:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** +5411:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** if (hi2c->XferCount != 0U) +5412:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { +5413:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* Prepare the new XferSize to transfer */ +5414:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** if (hi2c->XferCount > MAX_NBYTE_SIZE) +5415:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { +5416:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->XferSize = MAX_NBYTE_SIZE; +5417:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** I2C_TransferConfig(hi2c, (uint16_t)hi2c->Devaddress, (uint8_t)hi2c->XferSize, +5418:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** I2C_RELOAD_MODE, I2C_NO_STARTSTOP); +5419:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } +5420:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** else +5421:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { +5422:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->XferSize = hi2c->XferCount; +5423:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** I2C_TransferConfig(hi2c, (uint16_t)hi2c->Devaddress, (uint8_t)hi2c->XferSize, +5424:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** I2C_AUTOEND_MODE, I2C_NO_STARTSTOP); +5425:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } +5426:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** +5427:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* Update XferCount value */ +5428:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->XferCount -= hi2c->XferSize; +5429:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** +5430:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* Enable DMA Request */ +5431:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** if (hi2c->State == HAL_I2C_STATE_BUSY_RX) +5432:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { +5433:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->Instance->CR1 |= I2C_CR1_RXDMAEN; +5434:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } +5435:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** else +5436:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { +5437:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->Instance->CR1 |= I2C_CR1_TXDMAEN; +5438:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } +5439:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } +5440:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** else +5441:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { +5442:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* Wrong size Status regarding TCR flag event */ +5443:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* Call the corresponding callback to inform upper layer of End of Transfer */ +5444:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** I2C_ITError(hi2c, HAL_I2C_ERROR_SIZE); +5445:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } +5446:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } +5447:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** else if ((I2C_CHECK_FLAG(ITFlags, I2C_FLAG_TC) != RESET) && \ + ARM GAS /tmp/ccuRhBPx.s page 97 + + +5448:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** (I2C_CHECK_IT_SOURCE(ITSources, I2C_IT_TCI) != RESET)) +5449:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { +5450:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** if (hi2c->State == HAL_I2C_STATE_BUSY_RX) +5451:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { +5452:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** direction = I2C_GENERATE_START_READ; +5453:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } +5454:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** +5455:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** if (hi2c->XferCount > MAX_NBYTE_SIZE) +5456:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { +5457:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->XferSize = MAX_NBYTE_SIZE; +5458:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** +5459:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* Set NBYTES to write and reload if hi2c->XferCount > MAX_NBYTE_SIZE and generate RESTART */ +5460:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** I2C_TransferConfig(hi2c, (uint16_t)hi2c->Devaddress, (uint8_t)hi2c->XferSize, +5461:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** I2C_RELOAD_MODE, direction); +5462:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } +5463:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** else +5464:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { +5465:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->XferSize = hi2c->XferCount; +5466:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** +5467:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* Set NBYTES to write and generate RESTART */ +5468:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** I2C_TransferConfig(hi2c, (uint16_t)hi2c->Devaddress, (uint8_t)hi2c->XferSize, +5469:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** I2C_AUTOEND_MODE, direction); +5470:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } +5471:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** +5472:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* Update XferCount value */ +5473:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->XferCount -= hi2c->XferSize; +5474:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** +5475:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* Enable DMA Request */ +5476:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** if (hi2c->State == HAL_I2C_STATE_BUSY_RX) +5477:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { +5478:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->Instance->CR1 |= I2C_CR1_RXDMAEN; +5479:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } +5480:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** else +5481:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { +5482:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->Instance->CR1 |= I2C_CR1_TXDMAEN; +5483:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } +5484:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } +5485:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** else if ((I2C_CHECK_FLAG(ITFlags, I2C_FLAG_STOPF) != RESET) && \ +5486:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** (I2C_CHECK_IT_SOURCE(ITSources, I2C_IT_STOPI) != RESET)) +5487:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { +5488:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* Call I2C Master complete process */ +5489:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** I2C_ITMasterCplt(hi2c, ITFlags); +5490:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } +5491:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** else +5492:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { +5493:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* Nothing to do */ +5494:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } +5495:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** +5496:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* Process Unlocked */ +5497:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** __HAL_UNLOCK(hi2c); +5498:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** +5499:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** return HAL_OK; +5500:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } +5501:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** +5502:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /** +5503:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** * @brief Interrupt Sub-Routine which handle the Interrupt Flags Slave Mode with DMA. +5504:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** * @param hi2c Pointer to a I2C_HandleTypeDef structure that contains + ARM GAS /tmp/ccuRhBPx.s page 98 + + +5505:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** * the configuration information for the specified I2C. +5506:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** * @param ITFlags Interrupt flags to handle. +5507:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** * @param ITSources Interrupt sources enabled. +5508:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** * @retval HAL status +5509:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** */ +5510:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** static HAL_StatusTypeDef I2C_Slave_ISR_DMA(struct __I2C_HandleTypeDef *hi2c, uint32_t ITFlags, +5511:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** uint32_t ITSources) +5512:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { +5513:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** uint32_t tmpoptions = hi2c->XferOptions; +5514:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** uint32_t treatdmanack = 0U; +5515:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** HAL_I2C_StateTypeDef tmpstate; +5516:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** +5517:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* Process locked */ +5518:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** __HAL_LOCK(hi2c); +5519:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** +5520:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* Check if STOPF is set */ +5521:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** if ((I2C_CHECK_FLAG(ITFlags, I2C_FLAG_STOPF) != RESET) && \ +5522:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** (I2C_CHECK_IT_SOURCE(ITSources, I2C_IT_STOPI) != RESET)) +5523:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { +5524:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* Call I2C Slave complete process */ +5525:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** I2C_ITSlaveCplt(hi2c, ITFlags); +5526:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } +5527:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** +5528:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** if ((I2C_CHECK_FLAG(ITFlags, I2C_FLAG_AF) != RESET) && \ +5529:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** (I2C_CHECK_IT_SOURCE(ITSources, I2C_IT_NACKI) != RESET)) +5530:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { +5531:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* Check that I2C transfer finished */ +5532:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* if yes, normal use case, a NACK is sent by the MASTER when Transfer is finished */ +5533:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* Mean XferCount == 0 */ +5534:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* So clear Flag NACKF only */ +5535:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** if ((I2C_CHECK_IT_SOURCE(ITSources, I2C_CR1_TXDMAEN) != RESET) || +5536:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** (I2C_CHECK_IT_SOURCE(ITSources, I2C_CR1_RXDMAEN) != RESET)) +5537:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { +5538:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* Split check of hdmarx, for MISRA compliance */ +5539:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** if (hi2c->hdmarx != NULL) +5540:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { +5541:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** if (I2C_CHECK_IT_SOURCE(ITSources, I2C_CR1_RXDMAEN) != RESET) +5542:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { +5543:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** if (I2C_GET_DMA_REMAIN_DATA(hi2c->hdmarx) == 0U) +5544:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { +5545:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** treatdmanack = 1U; +5546:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } +5547:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } +5548:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } +5549:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** +5550:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* Split check of hdmatx, for MISRA compliance */ +5551:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** if (hi2c->hdmatx != NULL) +5552:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { +5553:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** if (I2C_CHECK_IT_SOURCE(ITSources, I2C_CR1_TXDMAEN) != RESET) +5554:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { +5555:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** if (I2C_GET_DMA_REMAIN_DATA(hi2c->hdmatx) == 0U) +5556:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { +5557:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** treatdmanack = 1U; +5558:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } +5559:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } +5560:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } +5561:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + ARM GAS /tmp/ccuRhBPx.s page 99 + + +5562:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** if (treatdmanack == 1U) +5563:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { +5564:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** if ((hi2c->State == HAL_I2C_STATE_LISTEN) && (tmpoptions == I2C_FIRST_AND_LAST_FRAME)) +5565:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* Same action must be done for (tmpoptions == I2C_LAST_FRAME) which removed for +5566:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** Warning[Pa134]: left and right operands are identical */ +5567:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { +5568:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* Call I2C Listen complete process */ +5569:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** I2C_ITListenCplt(hi2c, ITFlags); +5570:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } +5571:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** else if ((hi2c->State == HAL_I2C_STATE_BUSY_TX_LISTEN) && (tmpoptions != I2C_NO_OPTION_FRAM +5572:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { +5573:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* Clear NACK Flag */ +5574:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** __HAL_I2C_CLEAR_FLAG(hi2c, I2C_FLAG_AF); +5575:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** +5576:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* Flush TX register */ +5577:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** I2C_Flush_TXDR(hi2c); +5578:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** +5579:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* Last Byte is Transmitted */ +5580:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* Call I2C Slave Sequential complete process */ +5581:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** I2C_ITSlaveSeqCplt(hi2c); +5582:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } +5583:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** else +5584:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { +5585:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* Clear NACK Flag */ +5586:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** __HAL_I2C_CLEAR_FLAG(hi2c, I2C_FLAG_AF); +5587:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } +5588:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } +5589:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** else +5590:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { +5591:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* if no, error use case, a Non-Acknowledge of last Data is generated by the MASTER*/ +5592:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* Clear NACK Flag */ +5593:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** __HAL_I2C_CLEAR_FLAG(hi2c, I2C_FLAG_AF); +5594:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** +5595:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* Set ErrorCode corresponding to a Non-Acknowledge */ +5596:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->ErrorCode |= HAL_I2C_ERROR_AF; +5597:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** +5598:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* Store current hi2c->State, solve MISRA2012-Rule-13.5 */ +5599:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** tmpstate = hi2c->State; +5600:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** +5601:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** if ((tmpoptions == I2C_FIRST_FRAME) || (tmpoptions == I2C_NEXT_FRAME)) +5602:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { +5603:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** if ((tmpstate == HAL_I2C_STATE_BUSY_TX) || (tmpstate == HAL_I2C_STATE_BUSY_TX_LISTEN)) +5604:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { +5605:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->PreviousState = I2C_STATE_SLAVE_BUSY_TX; +5606:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } +5607:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** else if ((tmpstate == HAL_I2C_STATE_BUSY_RX) || (tmpstate == HAL_I2C_STATE_BUSY_RX_LISTEN +5608:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { +5609:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->PreviousState = I2C_STATE_SLAVE_BUSY_RX; +5610:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } +5611:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** else +5612:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { +5613:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* Do nothing */ +5614:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } +5615:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** +5616:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* Call the corresponding callback to inform upper layer of End of Transfer */ +5617:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** I2C_ITError(hi2c, hi2c->ErrorCode); +5618:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } + ARM GAS /tmp/ccuRhBPx.s page 100 + + +5619:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } +5620:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } +5621:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** else +5622:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { +5623:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* Only Clear NACK Flag, no DMA treatment is pending */ +5624:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** __HAL_I2C_CLEAR_FLAG(hi2c, I2C_FLAG_AF); +5625:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } +5626:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } +5627:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** else if ((I2C_CHECK_FLAG(ITFlags, I2C_FLAG_ADDR) != RESET) && \ +5628:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** (I2C_CHECK_IT_SOURCE(ITSources, I2C_IT_ADDRI) != RESET)) +5629:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { +5630:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** I2C_ITAddrCplt(hi2c, ITFlags); +5631:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } +5632:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** else +5633:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { +5634:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* Nothing to do */ +5635:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } +5636:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** +5637:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* Process Unlocked */ +5638:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** __HAL_UNLOCK(hi2c); +5639:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** +5640:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** return HAL_OK; +5641:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } +5642:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** +5643:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /** +5644:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** * @brief Master sends target device address followed by internal memory address for write reques +5645:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** * @param hi2c Pointer to a I2C_HandleTypeDef structure that contains +5646:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** * the configuration information for the specified I2C. +5647:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** * @param DevAddress Target device address: The device 7 bits address value +5648:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** * in datasheet must be shifted to the left before calling the interface +5649:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** * @param MemAddress Internal memory address +5650:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** * @param MemAddSize Size of internal memory address +5651:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** * @param Timeout Timeout duration +5652:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** * @param Tickstart Tick start value +5653:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** * @retval HAL status +5654:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** */ +5655:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** static HAL_StatusTypeDef I2C_RequestMemoryWrite(I2C_HandleTypeDef *hi2c, uint16_t DevAddress, +5656:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** uint16_t MemAddress, uint16_t MemAddSize, uint32_t +5657:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** uint32_t Tickstart) +5658:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { +5659:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** I2C_TransferConfig(hi2c, DevAddress, (uint8_t)MemAddSize, I2C_RELOAD_MODE, I2C_GENERATE_START_WRI +5660:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** +5661:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* Wait until TXIS flag is set */ +5662:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** if (I2C_WaitOnTXISFlagUntilTimeout(hi2c, Timeout, Tickstart) != HAL_OK) +5663:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { +5664:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** return HAL_ERROR; +5665:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } +5666:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** +5667:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* If Memory address size is 8Bit */ +5668:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** if (MemAddSize == I2C_MEMADD_SIZE_8BIT) +5669:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { +5670:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* Send Memory Address */ +5671:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->Instance->TXDR = I2C_MEM_ADD_LSB(MemAddress); +5672:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } +5673:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* If Memory address size is 16Bit */ +5674:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** else +5675:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { + ARM GAS /tmp/ccuRhBPx.s page 101 + + +5676:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* Send MSB of Memory Address */ +5677:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->Instance->TXDR = I2C_MEM_ADD_MSB(MemAddress); +5678:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** +5679:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* Wait until TXIS flag is set */ +5680:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** if (I2C_WaitOnTXISFlagUntilTimeout(hi2c, Timeout, Tickstart) != HAL_OK) +5681:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { +5682:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** return HAL_ERROR; +5683:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } +5684:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** +5685:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* Send LSB of Memory Address */ +5686:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->Instance->TXDR = I2C_MEM_ADD_LSB(MemAddress); +5687:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } +5688:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** +5689:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* Wait until TCR flag is set */ +5690:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** if (I2C_WaitOnFlagUntilTimeout(hi2c, I2C_FLAG_TCR, RESET, Timeout, Tickstart) != HAL_OK) +5691:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { +5692:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** return HAL_ERROR; +5693:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } +5694:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** +5695:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** return HAL_OK; +5696:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } +5697:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** +5698:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /** +5699:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** * @brief Master sends target device address followed by internal memory address for read request +5700:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** * @param hi2c Pointer to a I2C_HandleTypeDef structure that contains +5701:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** * the configuration information for the specified I2C. +5702:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** * @param DevAddress Target device address: The device 7 bits address value +5703:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** * in datasheet must be shifted to the left before calling the interface +5704:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** * @param MemAddress Internal memory address +5705:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** * @param MemAddSize Size of internal memory address +5706:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** * @param Timeout Timeout duration +5707:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** * @param Tickstart Tick start value +5708:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** * @retval HAL status +5709:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** */ +5710:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** static HAL_StatusTypeDef I2C_RequestMemoryRead(I2C_HandleTypeDef *hi2c, uint16_t DevAddress, +5711:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** uint16_t MemAddress, uint16_t MemAddSize, uint32_t T +5712:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** uint32_t Tickstart) +5713:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { +5714:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** I2C_TransferConfig(hi2c, DevAddress, (uint8_t)MemAddSize, I2C_SOFTEND_MODE, I2C_GENERATE_START_WR +5715:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** +5716:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* Wait until TXIS flag is set */ +5717:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** if (I2C_WaitOnTXISFlagUntilTimeout(hi2c, Timeout, Tickstart) != HAL_OK) +5718:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { +5719:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** return HAL_ERROR; +5720:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } +5721:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** +5722:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* If Memory address size is 8Bit */ +5723:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** if (MemAddSize == I2C_MEMADD_SIZE_8BIT) +5724:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { +5725:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* Send Memory Address */ +5726:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->Instance->TXDR = I2C_MEM_ADD_LSB(MemAddress); +5727:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } +5728:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* If Memory address size is 16Bit */ +5729:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** else +5730:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { +5731:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* Send MSB of Memory Address */ +5732:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->Instance->TXDR = I2C_MEM_ADD_MSB(MemAddress); + ARM GAS /tmp/ccuRhBPx.s page 102 + + +5733:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** +5734:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* Wait until TXIS flag is set */ +5735:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** if (I2C_WaitOnTXISFlagUntilTimeout(hi2c, Timeout, Tickstart) != HAL_OK) +5736:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { +5737:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** return HAL_ERROR; +5738:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } +5739:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** +5740:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* Send LSB of Memory Address */ +5741:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->Instance->TXDR = I2C_MEM_ADD_LSB(MemAddress); +5742:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } +5743:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** +5744:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* Wait until TC flag is set */ +5745:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** if (I2C_WaitOnFlagUntilTimeout(hi2c, I2C_FLAG_TC, RESET, Timeout, Tickstart) != HAL_OK) +5746:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { +5747:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** return HAL_ERROR; +5748:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } +5749:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** +5750:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** return HAL_OK; +5751:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } +5752:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** +5753:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /** +5754:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** * @brief I2C Address complete process callback. +5755:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** * @param hi2c I2C handle. +5756:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** * @param ITFlags Interrupt flags to handle. +5757:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** * @retval None +5758:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** */ +5759:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** static void I2C_ITAddrCplt(I2C_HandleTypeDef *hi2c, uint32_t ITFlags) +5760:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { +5761:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** uint8_t transferdirection; +5762:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** uint16_t slaveaddrcode; +5763:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** uint16_t ownadd1code; +5764:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** uint16_t ownadd2code; +5765:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** +5766:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* Prevent unused argument(s) compilation warning */ +5767:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** UNUSED(ITFlags); +5768:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** +5769:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* In case of Listen state, need to inform upper layer of address match code event */ +5770:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** if (((uint32_t)hi2c->State & (uint32_t)HAL_I2C_STATE_LISTEN) == (uint32_t)HAL_I2C_STATE_LISTEN) +5771:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { +5772:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** transferdirection = I2C_GET_DIR(hi2c); +5773:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** slaveaddrcode = I2C_GET_ADDR_MATCH(hi2c); +5774:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** ownadd1code = I2C_GET_OWN_ADDRESS1(hi2c); +5775:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** ownadd2code = I2C_GET_OWN_ADDRESS2(hi2c); +5776:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** +5777:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* If 10bits addressing mode is selected */ +5778:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** if (hi2c->Init.AddressingMode == I2C_ADDRESSINGMODE_10BIT) +5779:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { +5780:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** if ((slaveaddrcode & SLAVE_ADDR_MSK) == ((ownadd1code >> SLAVE_ADDR_SHIFT) & SLAVE_ADDR_MSK)) +5781:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { +5782:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** slaveaddrcode = ownadd1code; +5783:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->AddrEventCount++; +5784:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** if (hi2c->AddrEventCount == 2U) +5785:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { +5786:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* Reset Address Event counter */ +5787:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->AddrEventCount = 0U; +5788:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** +5789:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* Clear ADDR flag */ + ARM GAS /tmp/ccuRhBPx.s page 103 + + +5790:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** __HAL_I2C_CLEAR_FLAG(hi2c, I2C_FLAG_ADDR); +5791:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** +5792:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* Process Unlocked */ +5793:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** __HAL_UNLOCK(hi2c); +5794:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** +5795:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* Call Slave Addr callback */ +5796:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** #if (USE_HAL_I2C_REGISTER_CALLBACKS == 1) +5797:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->AddrCallback(hi2c, transferdirection, slaveaddrcode); +5798:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** #else +5799:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** HAL_I2C_AddrCallback(hi2c, transferdirection, slaveaddrcode); +5800:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** #endif /* USE_HAL_I2C_REGISTER_CALLBACKS */ +5801:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } +5802:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } +5803:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** else +5804:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { +5805:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** slaveaddrcode = ownadd2code; +5806:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** +5807:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* Disable ADDR Interrupts */ +5808:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** I2C_Disable_IRQ(hi2c, I2C_XFER_LISTEN_IT); +5809:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** +5810:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* Process Unlocked */ +5811:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** __HAL_UNLOCK(hi2c); +5812:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** +5813:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* Call Slave Addr callback */ +5814:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** #if (USE_HAL_I2C_REGISTER_CALLBACKS == 1) +5815:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->AddrCallback(hi2c, transferdirection, slaveaddrcode); +5816:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** #else +5817:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** HAL_I2C_AddrCallback(hi2c, transferdirection, slaveaddrcode); +5818:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** #endif /* USE_HAL_I2C_REGISTER_CALLBACKS */ +5819:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } +5820:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } +5821:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* else 7 bits addressing mode is selected */ +5822:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** else +5823:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { +5824:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* Disable ADDR Interrupts */ +5825:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** I2C_Disable_IRQ(hi2c, I2C_XFER_LISTEN_IT); +5826:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** +5827:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* Process Unlocked */ +5828:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** __HAL_UNLOCK(hi2c); +5829:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** +5830:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* Call Slave Addr callback */ +5831:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** #if (USE_HAL_I2C_REGISTER_CALLBACKS == 1) +5832:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->AddrCallback(hi2c, transferdirection, slaveaddrcode); +5833:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** #else +5834:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** HAL_I2C_AddrCallback(hi2c, transferdirection, slaveaddrcode); +5835:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** #endif /* USE_HAL_I2C_REGISTER_CALLBACKS */ +5836:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } +5837:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } +5838:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* Else clear address flag only */ +5839:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** else +5840:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { +5841:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* Clear ADDR flag */ +5842:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** __HAL_I2C_CLEAR_FLAG(hi2c, I2C_FLAG_ADDR); +5843:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** +5844:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* Process Unlocked */ +5845:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** __HAL_UNLOCK(hi2c); +5846:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } + ARM GAS /tmp/ccuRhBPx.s page 104 + + +5847:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } +5848:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** +5849:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /** +5850:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** * @brief I2C Master sequential complete process. +5851:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** * @param hi2c I2C handle. +5852:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** * @retval None +5853:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** */ +5854:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** static void I2C_ITMasterSeqCplt(I2C_HandleTypeDef *hi2c) +5855:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { +5856:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* Reset I2C handle mode */ +5857:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->Mode = HAL_I2C_MODE_NONE; +5858:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** +5859:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* No Generate Stop, to permit restart mode */ +5860:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* The stop will be done at the end of transfer, when I2C_AUTOEND_MODE enable */ +5861:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** if (hi2c->State == HAL_I2C_STATE_BUSY_TX) +5862:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { +5863:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->State = HAL_I2C_STATE_READY; +5864:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->PreviousState = I2C_STATE_MASTER_BUSY_TX; +5865:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->XferISR = NULL; +5866:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** +5867:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* Disable Interrupts */ +5868:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** I2C_Disable_IRQ(hi2c, I2C_XFER_TX_IT); +5869:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** +5870:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* Process Unlocked */ +5871:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** __HAL_UNLOCK(hi2c); +5872:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** +5873:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* Call the corresponding callback to inform upper layer of End of Transfer */ +5874:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** #if (USE_HAL_I2C_REGISTER_CALLBACKS == 1) +5875:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->MasterTxCpltCallback(hi2c); +5876:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** #else +5877:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** HAL_I2C_MasterTxCpltCallback(hi2c); +5878:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** #endif /* USE_HAL_I2C_REGISTER_CALLBACKS */ +5879:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } +5880:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* hi2c->State == HAL_I2C_STATE_BUSY_RX */ +5881:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** else +5882:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { +5883:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->State = HAL_I2C_STATE_READY; +5884:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->PreviousState = I2C_STATE_MASTER_BUSY_RX; +5885:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->XferISR = NULL; +5886:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** +5887:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* Disable Interrupts */ +5888:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** I2C_Disable_IRQ(hi2c, I2C_XFER_RX_IT); +5889:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** +5890:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* Process Unlocked */ +5891:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** __HAL_UNLOCK(hi2c); +5892:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** +5893:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* Call the corresponding callback to inform upper layer of End of Transfer */ +5894:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** #if (USE_HAL_I2C_REGISTER_CALLBACKS == 1) +5895:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->MasterRxCpltCallback(hi2c); +5896:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** #else +5897:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** HAL_I2C_MasterRxCpltCallback(hi2c); +5898:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** #endif /* USE_HAL_I2C_REGISTER_CALLBACKS */ +5899:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } +5900:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } +5901:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** +5902:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /** +5903:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** * @brief I2C Slave sequential complete process. + ARM GAS /tmp/ccuRhBPx.s page 105 + + +5904:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** * @param hi2c I2C handle. +5905:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** * @retval None +5906:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** */ +5907:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** static void I2C_ITSlaveSeqCplt(I2C_HandleTypeDef *hi2c) +5908:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { +5909:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** uint32_t tmpcr1value = READ_REG(hi2c->Instance->CR1); +5910:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** +5911:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* Reset I2C handle mode */ +5912:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->Mode = HAL_I2C_MODE_NONE; +5913:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** +5914:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* If a DMA is ongoing, Update handle size context */ +5915:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** if (I2C_CHECK_IT_SOURCE(tmpcr1value, I2C_CR1_TXDMAEN) != RESET) +5916:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { +5917:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* Disable DMA Request */ +5918:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->Instance->CR1 &= ~I2C_CR1_TXDMAEN; +5919:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } +5920:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** else if (I2C_CHECK_IT_SOURCE(tmpcr1value, I2C_CR1_RXDMAEN) != RESET) +5921:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { +5922:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* Disable DMA Request */ +5923:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->Instance->CR1 &= ~I2C_CR1_RXDMAEN; +5924:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } +5925:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** else +5926:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { +5927:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* Do nothing */ +5928:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } +5929:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** +5930:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** if (hi2c->State == HAL_I2C_STATE_BUSY_TX_LISTEN) +5931:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { +5932:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* Remove HAL_I2C_STATE_SLAVE_BUSY_TX, keep only HAL_I2C_STATE_LISTEN */ +5933:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->State = HAL_I2C_STATE_LISTEN; +5934:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->PreviousState = I2C_STATE_SLAVE_BUSY_TX; +5935:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** +5936:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* Disable Interrupts */ +5937:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** I2C_Disable_IRQ(hi2c, I2C_XFER_TX_IT); +5938:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** +5939:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* Process Unlocked */ +5940:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** __HAL_UNLOCK(hi2c); +5941:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** +5942:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* Call the corresponding callback to inform upper layer of End of Transfer */ +5943:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** #if (USE_HAL_I2C_REGISTER_CALLBACKS == 1) +5944:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->SlaveTxCpltCallback(hi2c); +5945:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** #else +5946:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** HAL_I2C_SlaveTxCpltCallback(hi2c); +5947:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** #endif /* USE_HAL_I2C_REGISTER_CALLBACKS */ +5948:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } +5949:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** +5950:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** else if (hi2c->State == HAL_I2C_STATE_BUSY_RX_LISTEN) +5951:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { +5952:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* Remove HAL_I2C_STATE_SLAVE_BUSY_RX, keep only HAL_I2C_STATE_LISTEN */ +5953:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->State = HAL_I2C_STATE_LISTEN; +5954:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->PreviousState = I2C_STATE_SLAVE_BUSY_RX; +5955:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** +5956:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* Disable Interrupts */ +5957:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** I2C_Disable_IRQ(hi2c, I2C_XFER_RX_IT); +5958:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** +5959:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* Process Unlocked */ +5960:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** __HAL_UNLOCK(hi2c); + ARM GAS /tmp/ccuRhBPx.s page 106 + + +5961:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** +5962:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* Call the corresponding callback to inform upper layer of End of Transfer */ +5963:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** #if (USE_HAL_I2C_REGISTER_CALLBACKS == 1) +5964:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->SlaveRxCpltCallback(hi2c); +5965:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** #else +5966:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** HAL_I2C_SlaveRxCpltCallback(hi2c); +5967:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** #endif /* USE_HAL_I2C_REGISTER_CALLBACKS */ +5968:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } +5969:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** else +5970:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { +5971:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* Nothing to do */ +5972:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } +5973:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } +5974:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** +5975:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /** +5976:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** * @brief I2C Master complete process. +5977:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** * @param hi2c I2C handle. +5978:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** * @param ITFlags Interrupt flags to handle. +5979:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** * @retval None +5980:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** */ +5981:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** static void I2C_ITMasterCplt(I2C_HandleTypeDef *hi2c, uint32_t ITFlags) +5982:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { +5983:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** uint32_t tmperror; +5984:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** uint32_t tmpITFlags = ITFlags; +5985:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** __IO uint32_t tmpreg; +5986:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** +5987:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* Clear STOP Flag */ +5988:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** __HAL_I2C_CLEAR_FLAG(hi2c, I2C_FLAG_STOPF); +5989:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** +5990:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* Disable Interrupts and Store Previous state */ +5991:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** if (hi2c->State == HAL_I2C_STATE_BUSY_TX) +5992:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { +5993:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** I2C_Disable_IRQ(hi2c, I2C_XFER_TX_IT); +5994:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->PreviousState = I2C_STATE_MASTER_BUSY_TX; +5995:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } +5996:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** else if (hi2c->State == HAL_I2C_STATE_BUSY_RX) +5997:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { +5998:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** I2C_Disable_IRQ(hi2c, I2C_XFER_RX_IT); +5999:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->PreviousState = I2C_STATE_MASTER_BUSY_RX; +6000:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } +6001:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** else +6002:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { +6003:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* Do nothing */ +6004:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } +6005:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** +6006:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* Clear Configuration Register 2 */ +6007:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** I2C_RESET_CR2(hi2c); +6008:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** +6009:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* Reset handle parameters */ +6010:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->XferISR = NULL; +6011:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->XferOptions = I2C_NO_OPTION_FRAME; +6012:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** +6013:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** if (I2C_CHECK_FLAG(tmpITFlags, I2C_FLAG_AF) != RESET) +6014:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { +6015:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* Clear NACK Flag */ +6016:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** __HAL_I2C_CLEAR_FLAG(hi2c, I2C_FLAG_AF); +6017:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + ARM GAS /tmp/ccuRhBPx.s page 107 + + +6018:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* Set acknowledge error code */ +6019:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->ErrorCode |= HAL_I2C_ERROR_AF; +6020:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } +6021:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** +6022:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* Fetch Last receive data if any */ +6023:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** if ((hi2c->State == HAL_I2C_STATE_ABORT) && (I2C_CHECK_FLAG(tmpITFlags, I2C_FLAG_RXNE) != RESET)) +6024:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { +6025:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* Read data from RXDR */ +6026:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** tmpreg = (uint8_t)hi2c->Instance->RXDR; +6027:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** UNUSED(tmpreg); +6028:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } +6029:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** +6030:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* Flush TX register */ +6031:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** I2C_Flush_TXDR(hi2c); +6032:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** +6033:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* Store current volatile hi2c->ErrorCode, misra rule */ +6034:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** tmperror = hi2c->ErrorCode; +6035:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** +6036:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* Call the corresponding callback to inform upper layer of End of Transfer */ +6037:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** if ((hi2c->State == HAL_I2C_STATE_ABORT) || (tmperror != HAL_I2C_ERROR_NONE)) +6038:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { +6039:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* Call the corresponding callback to inform upper layer of End of Transfer */ +6040:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** I2C_ITError(hi2c, hi2c->ErrorCode); +6041:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } +6042:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* hi2c->State == HAL_I2C_STATE_BUSY_TX */ +6043:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** else if (hi2c->State == HAL_I2C_STATE_BUSY_TX) +6044:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { +6045:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->State = HAL_I2C_STATE_READY; +6046:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->PreviousState = I2C_STATE_NONE; +6047:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** +6048:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** if (hi2c->Mode == HAL_I2C_MODE_MEM) +6049:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { +6050:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->Mode = HAL_I2C_MODE_NONE; +6051:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** +6052:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* Process Unlocked */ +6053:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** __HAL_UNLOCK(hi2c); +6054:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** +6055:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* Call the corresponding callback to inform upper layer of End of Transfer */ +6056:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** #if (USE_HAL_I2C_REGISTER_CALLBACKS == 1) +6057:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->MemTxCpltCallback(hi2c); +6058:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** #else +6059:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** HAL_I2C_MemTxCpltCallback(hi2c); +6060:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** #endif /* USE_HAL_I2C_REGISTER_CALLBACKS */ +6061:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } +6062:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** else +6063:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { +6064:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->Mode = HAL_I2C_MODE_NONE; +6065:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** +6066:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* Process Unlocked */ +6067:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** __HAL_UNLOCK(hi2c); +6068:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** +6069:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* Call the corresponding callback to inform upper layer of End of Transfer */ +6070:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** #if (USE_HAL_I2C_REGISTER_CALLBACKS == 1) +6071:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->MasterTxCpltCallback(hi2c); +6072:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** #else +6073:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** HAL_I2C_MasterTxCpltCallback(hi2c); +6074:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** #endif /* USE_HAL_I2C_REGISTER_CALLBACKS */ + ARM GAS /tmp/ccuRhBPx.s page 108 + + +6075:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } +6076:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } +6077:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* hi2c->State == HAL_I2C_STATE_BUSY_RX */ +6078:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** else if (hi2c->State == HAL_I2C_STATE_BUSY_RX) +6079:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { +6080:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->State = HAL_I2C_STATE_READY; +6081:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->PreviousState = I2C_STATE_NONE; +6082:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** +6083:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** if (hi2c->Mode == HAL_I2C_MODE_MEM) +6084:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { +6085:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->Mode = HAL_I2C_MODE_NONE; +6086:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** +6087:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* Process Unlocked */ +6088:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** __HAL_UNLOCK(hi2c); +6089:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** +6090:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* Call the corresponding callback to inform upper layer of End of Transfer */ +6091:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** #if (USE_HAL_I2C_REGISTER_CALLBACKS == 1) +6092:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->MemRxCpltCallback(hi2c); +6093:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** #else +6094:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** HAL_I2C_MemRxCpltCallback(hi2c); +6095:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** #endif /* USE_HAL_I2C_REGISTER_CALLBACKS */ +6096:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } +6097:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** else +6098:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { +6099:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->Mode = HAL_I2C_MODE_NONE; +6100:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** +6101:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* Process Unlocked */ +6102:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** __HAL_UNLOCK(hi2c); +6103:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** +6104:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* Call the corresponding callback to inform upper layer of End of Transfer */ +6105:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** #if (USE_HAL_I2C_REGISTER_CALLBACKS == 1) +6106:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->MasterRxCpltCallback(hi2c); +6107:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** #else +6108:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** HAL_I2C_MasterRxCpltCallback(hi2c); +6109:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** #endif /* USE_HAL_I2C_REGISTER_CALLBACKS */ +6110:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } +6111:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } +6112:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** else +6113:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { +6114:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* Nothing to do */ +6115:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } +6116:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } +6117:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** +6118:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /** +6119:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** * @brief I2C Slave complete process. +6120:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** * @param hi2c I2C handle. +6121:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** * @param ITFlags Interrupt flags to handle. +6122:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** * @retval None +6123:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** */ +6124:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** static void I2C_ITSlaveCplt(I2C_HandleTypeDef *hi2c, uint32_t ITFlags) +6125:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { +6126:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** uint32_t tmpcr1value = READ_REG(hi2c->Instance->CR1); +6127:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** uint32_t tmpITFlags = ITFlags; +6128:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** HAL_I2C_StateTypeDef tmpstate = hi2c->State; +6129:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** +6130:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* Clear STOP Flag */ +6131:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** __HAL_I2C_CLEAR_FLAG(hi2c, I2C_FLAG_STOPF); + ARM GAS /tmp/ccuRhBPx.s page 109 + + +6132:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** +6133:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* Disable Interrupts and Store Previous state */ +6134:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** if ((tmpstate == HAL_I2C_STATE_BUSY_TX) || (tmpstate == HAL_I2C_STATE_BUSY_TX_LISTEN)) +6135:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { +6136:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** I2C_Disable_IRQ(hi2c, I2C_XFER_LISTEN_IT | I2C_XFER_TX_IT); +6137:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->PreviousState = I2C_STATE_SLAVE_BUSY_TX; +6138:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } +6139:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** else if ((tmpstate == HAL_I2C_STATE_BUSY_RX) || (tmpstate == HAL_I2C_STATE_BUSY_RX_LISTEN)) +6140:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { +6141:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** I2C_Disable_IRQ(hi2c, I2C_XFER_LISTEN_IT | I2C_XFER_RX_IT); +6142:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->PreviousState = I2C_STATE_SLAVE_BUSY_RX; +6143:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } +6144:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** else +6145:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { +6146:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* Do nothing */ +6147:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } +6148:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** +6149:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* Disable Address Acknowledge */ +6150:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->Instance->CR2 |= I2C_CR2_NACK; +6151:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** +6152:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* Clear Configuration Register 2 */ +6153:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** I2C_RESET_CR2(hi2c); +6154:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** +6155:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* Flush TX register */ +6156:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** I2C_Flush_TXDR(hi2c); +6157:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** +6158:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* If a DMA is ongoing, Update handle size context */ +6159:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** if (I2C_CHECK_IT_SOURCE(tmpcr1value, I2C_CR1_TXDMAEN) != RESET) +6160:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { +6161:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* Disable DMA Request */ +6162:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->Instance->CR1 &= ~I2C_CR1_TXDMAEN; +6163:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** +6164:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** if (hi2c->hdmatx != NULL) +6165:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { +6166:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->XferCount = (uint16_t)I2C_GET_DMA_REMAIN_DATA(hi2c->hdmatx); +6167:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } +6168:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } +6169:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** else if (I2C_CHECK_IT_SOURCE(tmpcr1value, I2C_CR1_RXDMAEN) != RESET) +6170:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { +6171:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* Disable DMA Request */ +6172:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->Instance->CR1 &= ~I2C_CR1_RXDMAEN; +6173:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** +6174:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** if (hi2c->hdmarx != NULL) +6175:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { +6176:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->XferCount = (uint16_t)I2C_GET_DMA_REMAIN_DATA(hi2c->hdmarx); +6177:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } +6178:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } +6179:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** else +6180:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { +6181:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* Do nothing */ +6182:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } +6183:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** +6184:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* Store Last receive data if any */ +6185:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** if (I2C_CHECK_FLAG(tmpITFlags, I2C_FLAG_RXNE) != RESET) +6186:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { +6187:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* Remove RXNE flag on temporary variable as read done */ +6188:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** tmpITFlags &= ~I2C_FLAG_RXNE; + ARM GAS /tmp/ccuRhBPx.s page 110 + + +6189:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** +6190:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* Read data from RXDR */ +6191:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** *hi2c->pBuffPtr = (uint8_t)hi2c->Instance->RXDR; +6192:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** +6193:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* Increment Buffer pointer */ +6194:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->pBuffPtr++; +6195:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** +6196:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** if ((hi2c->XferSize > 0U)) +6197:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { +6198:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->XferSize--; +6199:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->XferCount--; +6200:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } +6201:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } +6202:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** +6203:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* All data are not transferred, so set error code accordingly */ +6204:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** if (hi2c->XferCount != 0U) +6205:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { +6206:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* Set ErrorCode corresponding to a Non-Acknowledge */ +6207:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->ErrorCode |= HAL_I2C_ERROR_AF; +6208:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } +6209:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** +6210:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->Mode = HAL_I2C_MODE_NONE; +6211:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->XferISR = NULL; +6212:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** +6213:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** if (hi2c->ErrorCode != HAL_I2C_ERROR_NONE) +6214:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { +6215:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* Call the corresponding callback to inform upper layer of End of Transfer */ +6216:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** I2C_ITError(hi2c, hi2c->ErrorCode); +6217:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** +6218:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* Call the Listen Complete callback, to inform upper layer of the end of Listen usecase */ +6219:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** if (hi2c->State == HAL_I2C_STATE_LISTEN) +6220:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { +6221:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* Call I2C Listen complete process */ +6222:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** I2C_ITListenCplt(hi2c, tmpITFlags); +6223:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } +6224:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } +6225:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** else if (hi2c->XferOptions != I2C_NO_OPTION_FRAME) +6226:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { +6227:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* Call the Sequential Complete callback, to inform upper layer of the end of Transfer */ +6228:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** I2C_ITSlaveSeqCplt(hi2c); +6229:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** +6230:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->XferOptions = I2C_NO_OPTION_FRAME; +6231:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->State = HAL_I2C_STATE_READY; +6232:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->PreviousState = I2C_STATE_NONE; +6233:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** +6234:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* Process Unlocked */ +6235:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** __HAL_UNLOCK(hi2c); +6236:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** +6237:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* Call the Listen Complete callback, to inform upper layer of the end of Listen usecase */ +6238:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** #if (USE_HAL_I2C_REGISTER_CALLBACKS == 1) +6239:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->ListenCpltCallback(hi2c); +6240:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** #else +6241:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** HAL_I2C_ListenCpltCallback(hi2c); +6242:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** #endif /* USE_HAL_I2C_REGISTER_CALLBACKS */ +6243:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } +6244:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* Call the corresponding callback to inform upper layer of End of Transfer */ +6245:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** else if (hi2c->State == HAL_I2C_STATE_BUSY_RX) + ARM GAS /tmp/ccuRhBPx.s page 111 + + +6246:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { +6247:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->State = HAL_I2C_STATE_READY; +6248:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->PreviousState = I2C_STATE_NONE; +6249:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** +6250:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* Process Unlocked */ +6251:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** __HAL_UNLOCK(hi2c); +6252:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** +6253:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* Call the corresponding callback to inform upper layer of End of Transfer */ +6254:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** #if (USE_HAL_I2C_REGISTER_CALLBACKS == 1) +6255:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->SlaveRxCpltCallback(hi2c); +6256:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** #else +6257:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** HAL_I2C_SlaveRxCpltCallback(hi2c); +6258:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** #endif /* USE_HAL_I2C_REGISTER_CALLBACKS */ +6259:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } +6260:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** else +6261:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { +6262:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->State = HAL_I2C_STATE_READY; +6263:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->PreviousState = I2C_STATE_NONE; +6264:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** +6265:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* Process Unlocked */ +6266:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** __HAL_UNLOCK(hi2c); +6267:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** +6268:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* Call the corresponding callback to inform upper layer of End of Transfer */ +6269:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** #if (USE_HAL_I2C_REGISTER_CALLBACKS == 1) +6270:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->SlaveTxCpltCallback(hi2c); +6271:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** #else +6272:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** HAL_I2C_SlaveTxCpltCallback(hi2c); +6273:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** #endif /* USE_HAL_I2C_REGISTER_CALLBACKS */ +6274:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } +6275:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } +6276:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** +6277:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /** +6278:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** * @brief I2C Listen complete process. +6279:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** * @param hi2c I2C handle. +6280:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** * @param ITFlags Interrupt flags to handle. +6281:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** * @retval None +6282:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** */ +6283:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** static void I2C_ITListenCplt(I2C_HandleTypeDef *hi2c, uint32_t ITFlags) +6284:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { +6285:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* Reset handle parameters */ +6286:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->XferOptions = I2C_NO_OPTION_FRAME; +6287:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->PreviousState = I2C_STATE_NONE; +6288:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->State = HAL_I2C_STATE_READY; +6289:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->Mode = HAL_I2C_MODE_NONE; +6290:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->XferISR = NULL; +6291:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** +6292:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* Store Last receive data if any */ +6293:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** if (I2C_CHECK_FLAG(ITFlags, I2C_FLAG_RXNE) != RESET) +6294:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { +6295:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* Read data from RXDR */ +6296:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** *hi2c->pBuffPtr = (uint8_t)hi2c->Instance->RXDR; +6297:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** +6298:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* Increment Buffer pointer */ +6299:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->pBuffPtr++; +6300:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** +6301:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** if ((hi2c->XferSize > 0U)) +6302:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { + ARM GAS /tmp/ccuRhBPx.s page 112 + + +6303:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->XferSize--; +6304:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->XferCount--; +6305:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** +6306:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* Set ErrorCode corresponding to a Non-Acknowledge */ +6307:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->ErrorCode |= HAL_I2C_ERROR_AF; +6308:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } +6309:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } +6310:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** +6311:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* Disable all Interrupts*/ +6312:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** I2C_Disable_IRQ(hi2c, I2C_XFER_LISTEN_IT | I2C_XFER_RX_IT | I2C_XFER_TX_IT); +6313:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** +6314:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* Clear NACK Flag */ +6315:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** __HAL_I2C_CLEAR_FLAG(hi2c, I2C_FLAG_AF); +6316:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** +6317:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* Process Unlocked */ +6318:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** __HAL_UNLOCK(hi2c); +6319:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** +6320:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* Call the Listen Complete callback, to inform upper layer of the end of Listen usecase */ +6321:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** #if (USE_HAL_I2C_REGISTER_CALLBACKS == 1) +6322:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->ListenCpltCallback(hi2c); +6323:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** #else +6324:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** HAL_I2C_ListenCpltCallback(hi2c); +6325:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** #endif /* USE_HAL_I2C_REGISTER_CALLBACKS */ +6326:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } +6327:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** +6328:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /** +6329:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** * @brief I2C interrupts error process. +6330:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** * @param hi2c I2C handle. +6331:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** * @param ErrorCode Error code to handle. +6332:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** * @retval None +6333:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** */ +6334:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** static void I2C_ITError(I2C_HandleTypeDef *hi2c, uint32_t ErrorCode) +6335:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { +6336:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** HAL_I2C_StateTypeDef tmpstate = hi2c->State; +6337:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** +6338:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** uint32_t tmppreviousstate; +6339:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** +6340:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* Reset handle parameters */ +6341:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->Mode = HAL_I2C_MODE_NONE; +6342:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->XferOptions = I2C_NO_OPTION_FRAME; +6343:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->XferCount = 0U; +6344:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** +6345:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* Set new error code */ +6346:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->ErrorCode |= ErrorCode; +6347:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** +6348:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* Disable Interrupts */ +6349:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** if ((tmpstate == HAL_I2C_STATE_LISTEN) || +6350:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** (tmpstate == HAL_I2C_STATE_BUSY_TX_LISTEN) || +6351:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** (tmpstate == HAL_I2C_STATE_BUSY_RX_LISTEN)) +6352:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { +6353:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* Disable all interrupts, except interrupts related to LISTEN state */ +6354:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** I2C_Disable_IRQ(hi2c, I2C_XFER_RX_IT | I2C_XFER_TX_IT); +6355:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** +6356:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* keep HAL_I2C_STATE_LISTEN if set */ +6357:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->State = HAL_I2C_STATE_LISTEN; +6358:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->XferISR = I2C_Slave_ISR_IT; +6359:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } + ARM GAS /tmp/ccuRhBPx.s page 113 + + +6360:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** else +6361:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { +6362:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* Disable all interrupts */ +6363:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** I2C_Disable_IRQ(hi2c, I2C_XFER_LISTEN_IT | I2C_XFER_RX_IT | I2C_XFER_TX_IT); +6364:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** +6365:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* Flush TX register */ +6366:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** I2C_Flush_TXDR(hi2c); +6367:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** +6368:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* If state is an abort treatment on going, don't change state */ +6369:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* This change will be do later */ +6370:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** if (hi2c->State != HAL_I2C_STATE_ABORT) +6371:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { +6372:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* Set HAL_I2C_STATE_READY */ +6373:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->State = HAL_I2C_STATE_READY; +6374:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** +6375:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* Check if a STOPF is detected */ +6376:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** if (__HAL_I2C_GET_FLAG(hi2c, I2C_FLAG_STOPF) == SET) +6377:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { +6378:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** if (__HAL_I2C_GET_FLAG(hi2c, I2C_FLAG_AF) == SET) +6379:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { +6380:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** __HAL_I2C_CLEAR_FLAG(hi2c, I2C_FLAG_AF); +6381:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->ErrorCode |= HAL_I2C_ERROR_AF; +6382:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } +6383:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** +6384:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* Clear STOP Flag */ +6385:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** __HAL_I2C_CLEAR_FLAG(hi2c, I2C_FLAG_STOPF); +6386:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } +6387:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** +6388:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } +6389:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->XferISR = NULL; +6390:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } +6391:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** +6392:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* Abort DMA TX transfer if any */ +6393:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** tmppreviousstate = hi2c->PreviousState; +6394:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** +6395:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** if ((hi2c->hdmatx != NULL) && ((tmppreviousstate == I2C_STATE_MASTER_BUSY_TX) || \ +6396:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** (tmppreviousstate == I2C_STATE_SLAVE_BUSY_TX))) +6397:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { +6398:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** if ((hi2c->Instance->CR1 & I2C_CR1_TXDMAEN) == I2C_CR1_TXDMAEN) +6399:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { +6400:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->Instance->CR1 &= ~I2C_CR1_TXDMAEN; +6401:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } +6402:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** +6403:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** if (HAL_DMA_GetState(hi2c->hdmatx) != HAL_DMA_STATE_READY) +6404:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { +6405:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* Set the I2C DMA Abort callback : +6406:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** will lead to call HAL_I2C_ErrorCallback() at end of DMA abort procedure */ +6407:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->hdmatx->XferAbortCallback = I2C_DMAAbort; +6408:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** +6409:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* Process Unlocked */ +6410:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** __HAL_UNLOCK(hi2c); +6411:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** +6412:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* Abort DMA TX */ +6413:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** if (HAL_DMA_Abort_IT(hi2c->hdmatx) != HAL_OK) +6414:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { +6415:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* Call Directly XferAbortCallback function in case of error */ +6416:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->hdmatx->XferAbortCallback(hi2c->hdmatx); + ARM GAS /tmp/ccuRhBPx.s page 114 + + +6417:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } +6418:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } +6419:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** else +6420:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { +6421:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** I2C_TreatErrorCallback(hi2c); +6422:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } +6423:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } +6424:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* Abort DMA RX transfer if any */ +6425:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** else if ((hi2c->hdmarx != NULL) && ((tmppreviousstate == I2C_STATE_MASTER_BUSY_RX) || \ +6426:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** (tmppreviousstate == I2C_STATE_SLAVE_BUSY_RX))) +6427:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { +6428:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** if ((hi2c->Instance->CR1 & I2C_CR1_RXDMAEN) == I2C_CR1_RXDMAEN) +6429:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { +6430:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->Instance->CR1 &= ~I2C_CR1_RXDMAEN; +6431:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } +6432:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** +6433:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** if (HAL_DMA_GetState(hi2c->hdmarx) != HAL_DMA_STATE_READY) +6434:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { +6435:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* Set the I2C DMA Abort callback : +6436:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** will lead to call HAL_I2C_ErrorCallback() at end of DMA abort procedure */ +6437:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->hdmarx->XferAbortCallback = I2C_DMAAbort; +6438:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** +6439:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* Process Unlocked */ +6440:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** __HAL_UNLOCK(hi2c); +6441:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** +6442:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* Abort DMA RX */ +6443:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** if (HAL_DMA_Abort_IT(hi2c->hdmarx) != HAL_OK) +6444:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { +6445:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* Call Directly hi2c->hdmarx->XferAbortCallback function in case of error */ +6446:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->hdmarx->XferAbortCallback(hi2c->hdmarx); +6447:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } +6448:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } +6449:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** else +6450:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { +6451:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** I2C_TreatErrorCallback(hi2c); +6452:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } +6453:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } +6454:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** else +6455:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { +6456:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** I2C_TreatErrorCallback(hi2c); +6457:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } +6458:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } +6459:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** +6460:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /** +6461:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** * @brief I2C Error callback treatment. +6462:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** * @param hi2c I2C handle. +6463:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** * @retval None +6464:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** */ +6465:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** static void I2C_TreatErrorCallback(I2C_HandleTypeDef *hi2c) +6466:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { +6467:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** if (hi2c->State == HAL_I2C_STATE_ABORT) +6468:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { +6469:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->State = HAL_I2C_STATE_READY; +6470:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->PreviousState = I2C_STATE_NONE; +6471:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** +6472:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* Process Unlocked */ +6473:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** __HAL_UNLOCK(hi2c); + ARM GAS /tmp/ccuRhBPx.s page 115 + + +6474:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** +6475:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* Call the corresponding callback to inform upper layer of End of Transfer */ +6476:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** #if (USE_HAL_I2C_REGISTER_CALLBACKS == 1) +6477:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->AbortCpltCallback(hi2c); +6478:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** #else +6479:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** HAL_I2C_AbortCpltCallback(hi2c); +6480:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** #endif /* USE_HAL_I2C_REGISTER_CALLBACKS */ +6481:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } +6482:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** else +6483:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { +6484:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->PreviousState = I2C_STATE_NONE; +6485:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** +6486:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* Process Unlocked */ +6487:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** __HAL_UNLOCK(hi2c); +6488:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** +6489:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* Call the corresponding callback to inform upper layer of End of Transfer */ +6490:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** #if (USE_HAL_I2C_REGISTER_CALLBACKS == 1) +6491:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->ErrorCallback(hi2c); +6492:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** #else +6493:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** HAL_I2C_ErrorCallback(hi2c); +6494:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** #endif /* USE_HAL_I2C_REGISTER_CALLBACKS */ +6495:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } +6496:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } +6497:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** +6498:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /** +6499:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** * @brief I2C Tx data register flush process. +6500:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** * @param hi2c I2C handle. +6501:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** * @retval None +6502:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** */ +6503:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** static void I2C_Flush_TXDR(I2C_HandleTypeDef *hi2c) +6504:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { + 27 .loc 1 6504 1 view -0 + 28 .cfi_startproc + 29 @ args = 0, pretend = 0, frame = 0 + 30 @ frame_needed = 0, uses_anonymous_args = 0 + 31 @ link register save eliminated. +6505:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* If a pending TXIS flag is set */ +6506:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* Write a dummy data in TXDR to clear it */ +6507:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** if (__HAL_I2C_GET_FLAG(hi2c, I2C_FLAG_TXIS) != RESET) + 32 .loc 1 6507 3 view .LVU1 + 33 .loc 1 6507 7 is_stmt 0 view .LVU2 + 34 0000 0268 ldr r2, [r0] + 35 0002 9369 ldr r3, [r2, #24] + 36 .loc 1 6507 6 view .LVU3 + 37 0004 9B07 lsls r3, r3, #30 + 38 0006 01D5 bpl .L2 +6508:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { +6509:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->Instance->TXDR = 0x00U; + 39 .loc 1 6509 5 is_stmt 1 view .LVU4 + 40 .loc 1 6509 26 is_stmt 0 view .LVU5 + 41 0008 0023 movs r3, #0 + 42 000a 9362 str r3, [r2, #40] + 43 .L2: +6510:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } +6511:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** +6512:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* Flush TX register if not empty */ +6513:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** if (__HAL_I2C_GET_FLAG(hi2c, I2C_FLAG_TXE) == RESET) + ARM GAS /tmp/ccuRhBPx.s page 116 + + + 44 .loc 1 6513 3 is_stmt 1 view .LVU6 + 45 .loc 1 6513 7 is_stmt 0 view .LVU7 + 46 000c 0368 ldr r3, [r0] + 47 000e 9A69 ldr r2, [r3, #24] + 48 .loc 1 6513 6 view .LVU8 + 49 0010 D207 lsls r2, r2, #31 + 50 0012 03D4 bmi .L1 +6514:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { +6515:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** __HAL_I2C_CLEAR_FLAG(hi2c, I2C_FLAG_TXE); + 51 .loc 1 6515 5 is_stmt 1 view .LVU9 + 52 0014 9A69 ldr r2, [r3, #24] + 53 0016 0121 movs r1, #1 + 54 0018 0A43 orrs r2, r1 + 55 001a 9A61 str r2, [r3, #24] + 56 .L1: +6516:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } +6517:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } + 57 .loc 1 6517 1 is_stmt 0 view .LVU10 + 58 @ sp needed + 59 001c 7047 bx lr + 60 .cfi_endproc + 61 .LFE105: + 63 .section .text.I2C_TransferConfig,"ax",%progbits + 64 .align 1 + 65 .syntax unified + 66 .code 16 + 67 .thumb_func + 69 I2C_TransferConfig: + 70 .LVL1: + 71 .LFB117: +6518:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** +6519:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /** +6520:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** * @brief DMA I2C master transmit process complete callback. +6521:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** * @param hdma DMA handle +6522:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** * @retval None +6523:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** */ +6524:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** static void I2C_DMAMasterTransmitCplt(DMA_HandleTypeDef *hdma) +6525:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { +6526:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* Derogation MISRAC2012-Rule-11.5 */ +6527:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** I2C_HandleTypeDef *hi2c = (I2C_HandleTypeDef *)(((DMA_HandleTypeDef *)hdma)->Parent); +6528:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** +6529:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* Disable DMA Request */ +6530:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->Instance->CR1 &= ~I2C_CR1_TXDMAEN; +6531:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** +6532:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* If last transfer, enable STOP interrupt */ +6533:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** if (hi2c->XferCount == 0U) +6534:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { +6535:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* Enable STOP interrupt */ +6536:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** I2C_Enable_IRQ(hi2c, I2C_XFER_CPLT_IT); +6537:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } +6538:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* else prepare a new DMA transfer and enable TCReload interrupt */ +6539:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** else +6540:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { +6541:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* Update Buffer pointer */ +6542:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->pBuffPtr += hi2c->XferSize; +6543:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** +6544:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* Set the XferSize to transfer */ + ARM GAS /tmp/ccuRhBPx.s page 117 + + +6545:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** if (hi2c->XferCount > MAX_NBYTE_SIZE) +6546:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { +6547:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->XferSize = MAX_NBYTE_SIZE; +6548:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } +6549:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** else +6550:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { +6551:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->XferSize = hi2c->XferCount; +6552:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } +6553:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** +6554:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* Enable the DMA channel */ +6555:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** if (HAL_DMA_Start_IT(hi2c->hdmatx, (uint32_t)hi2c->pBuffPtr, (uint32_t)&hi2c->Instance->TXDR, +6556:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->XferSize) != HAL_OK) +6557:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { +6558:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* Call the corresponding callback to inform upper layer of End of Transfer */ +6559:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** I2C_ITError(hi2c, HAL_I2C_ERROR_DMA); +6560:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } +6561:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** else +6562:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { +6563:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* Enable TC interrupts */ +6564:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** I2C_Enable_IRQ(hi2c, I2C_XFER_RELOAD_IT); +6565:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } +6566:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } +6567:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } +6568:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** +6569:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** +6570:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /** +6571:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** * @brief DMA I2C slave transmit process complete callback. +6572:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** * @param hdma DMA handle +6573:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** * @retval None +6574:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** */ +6575:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** static void I2C_DMASlaveTransmitCplt(DMA_HandleTypeDef *hdma) +6576:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { +6577:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* Derogation MISRAC2012-Rule-11.5 */ +6578:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** I2C_HandleTypeDef *hi2c = (I2C_HandleTypeDef *)(((DMA_HandleTypeDef *)hdma)->Parent); +6579:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** uint32_t tmpoptions = hi2c->XferOptions; +6580:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** +6581:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** if ((tmpoptions == I2C_NEXT_FRAME) || (tmpoptions == I2C_FIRST_FRAME)) +6582:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { +6583:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* Disable DMA Request */ +6584:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->Instance->CR1 &= ~I2C_CR1_TXDMAEN; +6585:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** +6586:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* Last Byte is Transmitted */ +6587:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* Call I2C Slave Sequential complete process */ +6588:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** I2C_ITSlaveSeqCplt(hi2c); +6589:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } +6590:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** else +6591:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { +6592:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* No specific action, Master fully manage the generation of STOP condition */ +6593:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* Mean that this generation can arrive at any time, at the end or during DMA process */ +6594:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* So STOP condition should be manage through Interrupt treatment */ +6595:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } +6596:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } +6597:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** +6598:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** +6599:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /** +6600:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** * @brief DMA I2C master receive process complete callback. +6601:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** * @param hdma DMA handle + ARM GAS /tmp/ccuRhBPx.s page 118 + + +6602:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** * @retval None +6603:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** */ +6604:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** static void I2C_DMAMasterReceiveCplt(DMA_HandleTypeDef *hdma) +6605:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { +6606:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* Derogation MISRAC2012-Rule-11.5 */ +6607:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** I2C_HandleTypeDef *hi2c = (I2C_HandleTypeDef *)(((DMA_HandleTypeDef *)hdma)->Parent); +6608:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** +6609:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* Disable DMA Request */ +6610:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->Instance->CR1 &= ~I2C_CR1_RXDMAEN; +6611:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** +6612:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* If last transfer, enable STOP interrupt */ +6613:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** if (hi2c->XferCount == 0U) +6614:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { +6615:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* Enable STOP interrupt */ +6616:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** I2C_Enable_IRQ(hi2c, I2C_XFER_CPLT_IT); +6617:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } +6618:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* else prepare a new DMA transfer and enable TCReload interrupt */ +6619:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** else +6620:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { +6621:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* Update Buffer pointer */ +6622:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->pBuffPtr += hi2c->XferSize; +6623:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** +6624:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* Set the XferSize to transfer */ +6625:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** if (hi2c->XferCount > MAX_NBYTE_SIZE) +6626:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { +6627:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->XferSize = MAX_NBYTE_SIZE; +6628:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } +6629:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** else +6630:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { +6631:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->XferSize = hi2c->XferCount; +6632:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } +6633:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** +6634:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* Enable the DMA channel */ +6635:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** if (HAL_DMA_Start_IT(hi2c->hdmarx, (uint32_t)&hi2c->Instance->RXDR, (uint32_t)hi2c->pBuffPtr, +6636:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->XferSize) != HAL_OK) +6637:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { +6638:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* Call the corresponding callback to inform upper layer of End of Transfer */ +6639:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** I2C_ITError(hi2c, HAL_I2C_ERROR_DMA); +6640:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } +6641:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** else +6642:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { +6643:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* Enable TC interrupts */ +6644:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** I2C_Enable_IRQ(hi2c, I2C_XFER_RELOAD_IT); +6645:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } +6646:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } +6647:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } +6648:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** +6649:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** +6650:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /** +6651:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** * @brief DMA I2C slave receive process complete callback. +6652:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** * @param hdma DMA handle +6653:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** * @retval None +6654:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** */ +6655:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** static void I2C_DMASlaveReceiveCplt(DMA_HandleTypeDef *hdma) +6656:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { +6657:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* Derogation MISRAC2012-Rule-11.5 */ +6658:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** I2C_HandleTypeDef *hi2c = (I2C_HandleTypeDef *)(((DMA_HandleTypeDef *)hdma)->Parent); + ARM GAS /tmp/ccuRhBPx.s page 119 + + +6659:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** uint32_t tmpoptions = hi2c->XferOptions; +6660:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** +6661:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** if ((I2C_GET_DMA_REMAIN_DATA(hi2c->hdmarx) == 0U) && \ +6662:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** (tmpoptions != I2C_NO_OPTION_FRAME)) +6663:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { +6664:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* Disable DMA Request */ +6665:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->Instance->CR1 &= ~I2C_CR1_RXDMAEN; +6666:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** +6667:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* Call I2C Slave Sequential complete process */ +6668:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** I2C_ITSlaveSeqCplt(hi2c); +6669:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } +6670:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** else +6671:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { +6672:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* No specific action, Master fully manage the generation of STOP condition */ +6673:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* Mean that this generation can arrive at any time, at the end or during DMA process */ +6674:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* So STOP condition should be manage through Interrupt treatment */ +6675:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } +6676:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } +6677:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** +6678:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** +6679:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /** +6680:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** * @brief DMA I2C communication error callback. +6681:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** * @param hdma DMA handle +6682:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** * @retval None +6683:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** */ +6684:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** static void I2C_DMAError(DMA_HandleTypeDef *hdma) +6685:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { +6686:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* Derogation MISRAC2012-Rule-11.5 */ +6687:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** I2C_HandleTypeDef *hi2c = (I2C_HandleTypeDef *)(((DMA_HandleTypeDef *)hdma)->Parent); +6688:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** +6689:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* Disable Acknowledge */ +6690:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->Instance->CR2 |= I2C_CR2_NACK; +6691:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** +6692:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* Call the corresponding callback to inform upper layer of End of Transfer */ +6693:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** I2C_ITError(hi2c, HAL_I2C_ERROR_DMA); +6694:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } +6695:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** +6696:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** +6697:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /** +6698:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** * @brief DMA I2C communication abort callback +6699:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** * (To be called at end of DMA Abort procedure). +6700:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** * @param hdma DMA handle. +6701:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** * @retval None +6702:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** */ +6703:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** static void I2C_DMAAbort(DMA_HandleTypeDef *hdma) +6704:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { +6705:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* Derogation MISRAC2012-Rule-11.5 */ +6706:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** I2C_HandleTypeDef *hi2c = (I2C_HandleTypeDef *)(((DMA_HandleTypeDef *)hdma)->Parent); +6707:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** +6708:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* Reset AbortCpltCallback */ +6709:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** if (hi2c->hdmatx != NULL) +6710:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { +6711:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->hdmatx->XferAbortCallback = NULL; +6712:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } +6713:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** if (hi2c->hdmarx != NULL) +6714:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { +6715:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->hdmarx->XferAbortCallback = NULL; + ARM GAS /tmp/ccuRhBPx.s page 120 + + +6716:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } +6717:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** +6718:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** I2C_TreatErrorCallback(hi2c); +6719:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } +6720:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** +6721:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** +6722:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /** +6723:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** * @brief This function handles I2C Communication Timeout. It waits +6724:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** * until a flag is no longer in the specified status. +6725:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** * @param hi2c Pointer to a I2C_HandleTypeDef structure that contains +6726:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** * the configuration information for the specified I2C. +6727:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** * @param Flag Specifies the I2C flag to check. +6728:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** * @param Status The actual Flag status (SET or RESET). +6729:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** * @param Timeout Timeout duration +6730:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** * @param Tickstart Tick start value +6731:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** * @retval HAL status +6732:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** */ +6733:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** static HAL_StatusTypeDef I2C_WaitOnFlagUntilTimeout(I2C_HandleTypeDef *hi2c, uint32_t Flag, FlagSta +6734:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** uint32_t Timeout, uint32_t Tickstart) +6735:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { +6736:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** while (__HAL_I2C_GET_FLAG(hi2c, Flag) == Status) +6737:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { +6738:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* Check for the Timeout */ +6739:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** if (Timeout != HAL_MAX_DELAY) +6740:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { +6741:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** if (((HAL_GetTick() - Tickstart) > Timeout) || (Timeout == 0U)) +6742:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { +6743:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** if ((__HAL_I2C_GET_FLAG(hi2c, Flag) == Status)) +6744:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { +6745:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->ErrorCode |= HAL_I2C_ERROR_TIMEOUT; +6746:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->State = HAL_I2C_STATE_READY; +6747:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->Mode = HAL_I2C_MODE_NONE; +6748:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** +6749:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* Process Unlocked */ +6750:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** __HAL_UNLOCK(hi2c); +6751:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** return HAL_ERROR; +6752:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } +6753:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } +6754:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } +6755:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } +6756:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** return HAL_OK; +6757:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } +6758:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** +6759:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /** +6760:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** * @brief This function handles I2C Communication Timeout for specific usage of TXIS flag. +6761:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** * @param hi2c Pointer to a I2C_HandleTypeDef structure that contains +6762:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** * the configuration information for the specified I2C. +6763:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** * @param Timeout Timeout duration +6764:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** * @param Tickstart Tick start value +6765:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** * @retval HAL status +6766:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** */ +6767:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** static HAL_StatusTypeDef I2C_WaitOnTXISFlagUntilTimeout(I2C_HandleTypeDef *hi2c, uint32_t Timeout, +6768:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** uint32_t Tickstart) +6769:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { +6770:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** while (__HAL_I2C_GET_FLAG(hi2c, I2C_FLAG_TXIS) == RESET) +6771:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { +6772:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* Check if an error is detected */ + ARM GAS /tmp/ccuRhBPx.s page 121 + + +6773:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** if (I2C_IsErrorOccurred(hi2c, Timeout, Tickstart) != HAL_OK) +6774:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { +6775:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** return HAL_ERROR; +6776:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } +6777:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** +6778:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* Check for the Timeout */ +6779:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** if (Timeout != HAL_MAX_DELAY) +6780:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { +6781:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** if (((HAL_GetTick() - Tickstart) > Timeout) || (Timeout == 0U)) +6782:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { +6783:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** if ((__HAL_I2C_GET_FLAG(hi2c, I2C_FLAG_TXIS) == RESET)) +6784:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { +6785:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->ErrorCode |= HAL_I2C_ERROR_TIMEOUT; +6786:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->State = HAL_I2C_STATE_READY; +6787:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->Mode = HAL_I2C_MODE_NONE; +6788:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** +6789:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* Process Unlocked */ +6790:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** __HAL_UNLOCK(hi2c); +6791:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** +6792:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** return HAL_ERROR; +6793:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } +6794:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } +6795:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } +6796:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } +6797:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** return HAL_OK; +6798:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } +6799:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** +6800:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /** +6801:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** * @brief This function handles I2C Communication Timeout for specific usage of STOP flag. +6802:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** * @param hi2c Pointer to a I2C_HandleTypeDef structure that contains +6803:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** * the configuration information for the specified I2C. +6804:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** * @param Timeout Timeout duration +6805:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** * @param Tickstart Tick start value +6806:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** * @retval HAL status +6807:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** */ +6808:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** static HAL_StatusTypeDef I2C_WaitOnSTOPFlagUntilTimeout(I2C_HandleTypeDef *hi2c, uint32_t Timeout, +6809:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** uint32_t Tickstart) +6810:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { +6811:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** while (__HAL_I2C_GET_FLAG(hi2c, I2C_FLAG_STOPF) == RESET) +6812:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { +6813:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* Check if an error is detected */ +6814:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** if (I2C_IsErrorOccurred(hi2c, Timeout, Tickstart) != HAL_OK) +6815:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { +6816:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** return HAL_ERROR; +6817:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } +6818:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** +6819:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* Check for the Timeout */ +6820:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** if (((HAL_GetTick() - Tickstart) > Timeout) || (Timeout == 0U)) +6821:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { +6822:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** if ((__HAL_I2C_GET_FLAG(hi2c, I2C_FLAG_STOPF) == RESET)) +6823:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { +6824:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->ErrorCode |= HAL_I2C_ERROR_TIMEOUT; +6825:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->State = HAL_I2C_STATE_READY; +6826:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->Mode = HAL_I2C_MODE_NONE; +6827:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** +6828:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* Process Unlocked */ +6829:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** __HAL_UNLOCK(hi2c); + ARM GAS /tmp/ccuRhBPx.s page 122 + + +6830:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** +6831:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** return HAL_ERROR; +6832:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } +6833:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } +6834:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } +6835:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** return HAL_OK; +6836:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } +6837:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** +6838:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /** +6839:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** * @brief This function handles I2C Communication Timeout for specific usage of RXNE flag. +6840:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** * @param hi2c Pointer to a I2C_HandleTypeDef structure that contains +6841:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** * the configuration information for the specified I2C. +6842:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** * @param Timeout Timeout duration +6843:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** * @param Tickstart Tick start value +6844:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** * @retval HAL status +6845:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** */ +6846:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** static HAL_StatusTypeDef I2C_WaitOnRXNEFlagUntilTimeout(I2C_HandleTypeDef *hi2c, uint32_t Timeout, +6847:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** uint32_t Tickstart) +6848:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { +6849:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** while (__HAL_I2C_GET_FLAG(hi2c, I2C_FLAG_RXNE) == RESET) +6850:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { +6851:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* Check if an error is detected */ +6852:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** if (I2C_IsErrorOccurred(hi2c, Timeout, Tickstart) != HAL_OK) +6853:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { +6854:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** return HAL_ERROR; +6855:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } +6856:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** +6857:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* Check if a STOPF is detected */ +6858:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** if (__HAL_I2C_GET_FLAG(hi2c, I2C_FLAG_STOPF) == SET) +6859:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { +6860:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* Check if an RXNE is pending */ +6861:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* Store Last receive data if any */ +6862:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** if ((__HAL_I2C_GET_FLAG(hi2c, I2C_FLAG_RXNE) == SET) && (hi2c->XferSize > 0U)) +6863:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { +6864:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* Return HAL_OK */ +6865:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* The Reading of data from RXDR will be done in caller function */ +6866:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** return HAL_OK; +6867:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } +6868:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** else +6869:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { +6870:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** if (__HAL_I2C_GET_FLAG(hi2c, I2C_FLAG_AF) == SET) +6871:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { +6872:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** __HAL_I2C_CLEAR_FLAG(hi2c, I2C_FLAG_AF); +6873:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->ErrorCode = HAL_I2C_ERROR_AF; +6874:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } +6875:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** else +6876:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { +6877:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->ErrorCode = HAL_I2C_ERROR_NONE; +6878:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } +6879:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** +6880:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* Clear STOP Flag */ +6881:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** __HAL_I2C_CLEAR_FLAG(hi2c, I2C_FLAG_STOPF); +6882:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** +6883:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* Clear Configuration Register 2 */ +6884:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** I2C_RESET_CR2(hi2c); +6885:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** +6886:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->State = HAL_I2C_STATE_READY; + ARM GAS /tmp/ccuRhBPx.s page 123 + + +6887:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->Mode = HAL_I2C_MODE_NONE; +6888:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** +6889:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* Process Unlocked */ +6890:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** __HAL_UNLOCK(hi2c); +6891:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** +6892:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** return HAL_ERROR; +6893:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } +6894:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } +6895:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** +6896:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* Check for the Timeout */ +6897:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** if (((HAL_GetTick() - Tickstart) > Timeout) || (Timeout == 0U)) +6898:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { +6899:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** if ((__HAL_I2C_GET_FLAG(hi2c, I2C_FLAG_RXNE) == RESET)) +6900:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { +6901:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->ErrorCode |= HAL_I2C_ERROR_TIMEOUT; +6902:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->State = HAL_I2C_STATE_READY; +6903:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** +6904:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* Process Unlocked */ +6905:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** __HAL_UNLOCK(hi2c); +6906:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** +6907:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** return HAL_ERROR; +6908:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } +6909:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } +6910:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } +6911:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** return HAL_OK; +6912:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } +6913:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** +6914:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /** +6915:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** * @brief This function handles errors detection during an I2C Communication. +6916:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** * @param hi2c Pointer to a I2C_HandleTypeDef structure that contains +6917:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** * the configuration information for the specified I2C. +6918:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** * @param Timeout Timeout duration +6919:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** * @param Tickstart Tick start value +6920:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** * @retval HAL status +6921:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** */ +6922:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** static HAL_StatusTypeDef I2C_IsErrorOccurred(I2C_HandleTypeDef *hi2c, uint32_t Timeout, uint32_t Ti +6923:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { +6924:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** HAL_StatusTypeDef status = HAL_OK; +6925:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** uint32_t itflag = hi2c->Instance->ISR; +6926:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** uint32_t error_code = 0; +6927:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** uint32_t tickstart = Tickstart; +6928:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** uint32_t tmp1; +6929:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** HAL_I2C_ModeTypeDef tmp2; +6930:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** +6931:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** if (HAL_IS_BIT_SET(itflag, I2C_FLAG_AF)) +6932:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { +6933:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* Clear NACKF Flag */ +6934:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** __HAL_I2C_CLEAR_FLAG(hi2c, I2C_FLAG_AF); +6935:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** +6936:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* Wait until STOP Flag is set or timeout occurred */ +6937:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* AutoEnd should be initiate after AF */ +6938:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** while ((__HAL_I2C_GET_FLAG(hi2c, I2C_FLAG_STOPF) == RESET) && (status == HAL_OK)) +6939:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { +6940:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* Check for the Timeout */ +6941:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** if (Timeout != HAL_MAX_DELAY) +6942:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { +6943:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** if (((HAL_GetTick() - tickstart) > Timeout) || (Timeout == 0U)) + ARM GAS /tmp/ccuRhBPx.s page 124 + + +6944:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { +6945:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** tmp1 = (uint32_t)(hi2c->Instance->CR2 & I2C_CR2_STOP); +6946:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** tmp2 = hi2c->Mode; +6947:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** +6948:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* In case of I2C still busy, try to regenerate a STOP manually */ +6949:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** if ((__HAL_I2C_GET_FLAG(hi2c, I2C_FLAG_BUSY) != RESET) && \ +6950:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** (tmp1 != I2C_CR2_STOP) && \ +6951:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** (tmp2 != HAL_I2C_MODE_SLAVE)) +6952:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { +6953:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* Generate Stop */ +6954:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->Instance->CR2 |= I2C_CR2_STOP; +6955:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** +6956:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* Update Tick with new reference */ +6957:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** tickstart = HAL_GetTick(); +6958:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } +6959:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** +6960:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** while (__HAL_I2C_GET_FLAG(hi2c, I2C_FLAG_STOPF) == RESET) +6961:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { +6962:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* Check for the Timeout */ +6963:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** if ((HAL_GetTick() - tickstart) > I2C_TIMEOUT_STOPF) +6964:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { +6965:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** error_code |= HAL_I2C_ERROR_TIMEOUT; +6966:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** +6967:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** status = HAL_ERROR; +6968:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** +6969:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** break; +6970:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } +6971:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } +6972:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } +6973:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } +6974:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } +6975:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** +6976:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* In case STOP Flag is detected, clear it */ +6977:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** if (status == HAL_OK) +6978:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { +6979:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* Clear STOP Flag */ +6980:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** __HAL_I2C_CLEAR_FLAG(hi2c, I2C_FLAG_STOPF); +6981:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } +6982:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** +6983:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** error_code |= HAL_I2C_ERROR_AF; +6984:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** +6985:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** status = HAL_ERROR; +6986:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } +6987:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** +6988:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* Refresh Content of Status register */ +6989:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** itflag = hi2c->Instance->ISR; +6990:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** +6991:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* Then verify if an additional errors occurs */ +6992:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* Check if a Bus error occurred */ +6993:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** if (HAL_IS_BIT_SET(itflag, I2C_FLAG_BERR)) +6994:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { +6995:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** error_code |= HAL_I2C_ERROR_BERR; +6996:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** +6997:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* Clear BERR flag */ +6998:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** __HAL_I2C_CLEAR_FLAG(hi2c, I2C_FLAG_BERR); +6999:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** +7000:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** status = HAL_ERROR; + ARM GAS /tmp/ccuRhBPx.s page 125 + + +7001:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } +7002:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** +7003:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* Check if an Over-Run/Under-Run error occurred */ +7004:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** if (HAL_IS_BIT_SET(itflag, I2C_FLAG_OVR)) +7005:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { +7006:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** error_code |= HAL_I2C_ERROR_OVR; +7007:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** +7008:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* Clear OVR flag */ +7009:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** __HAL_I2C_CLEAR_FLAG(hi2c, I2C_FLAG_OVR); +7010:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** +7011:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** status = HAL_ERROR; +7012:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } +7013:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** +7014:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* Check if an Arbitration Loss error occurred */ +7015:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** if (HAL_IS_BIT_SET(itflag, I2C_FLAG_ARLO)) +7016:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { +7017:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** error_code |= HAL_I2C_ERROR_ARLO; +7018:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** +7019:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* Clear ARLO flag */ +7020:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** __HAL_I2C_CLEAR_FLAG(hi2c, I2C_FLAG_ARLO); +7021:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** +7022:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** status = HAL_ERROR; +7023:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } +7024:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** +7025:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** if (status != HAL_OK) +7026:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { +7027:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* Flush TX register */ +7028:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** I2C_Flush_TXDR(hi2c); +7029:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** +7030:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* Clear Configuration Register 2 */ +7031:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** I2C_RESET_CR2(hi2c); +7032:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** +7033:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->ErrorCode |= error_code; +7034:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->State = HAL_I2C_STATE_READY; +7035:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->Mode = HAL_I2C_MODE_NONE; +7036:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** +7037:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* Process Unlocked */ +7038:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** __HAL_UNLOCK(hi2c); +7039:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } +7040:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** +7041:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** return status; +7042:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } +7043:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** +7044:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /** +7045:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** * @brief Handles I2Cx communication when starting transfer or during transfer (TC or TCR flag ar +7046:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** * @param hi2c I2C handle. +7047:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** * @param DevAddress Specifies the slave address to be programmed. +7048:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** * @param Size Specifies the number of bytes to be programmed. +7049:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** * This parameter must be a value between 0 and 255. +7050:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** * @param Mode New state of the I2C START condition generation. +7051:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** * This parameter can be one of the following values: +7052:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** * @arg @ref I2C_RELOAD_MODE Enable Reload mode . +7053:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** * @arg @ref I2C_AUTOEND_MODE Enable Automatic end mode. +7054:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** * @arg @ref I2C_SOFTEND_MODE Enable Software end mode. +7055:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** * @param Request New state of the I2C START condition generation. +7056:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** * This parameter can be one of the following values: +7057:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** * @arg @ref I2C_NO_STARTSTOP Don't Generate stop and start condition. + ARM GAS /tmp/ccuRhBPx.s page 126 + + +7058:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** * @arg @ref I2C_GENERATE_STOP Generate stop condition (Size should be set to 0). +7059:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** * @arg @ref I2C_GENERATE_START_READ Generate Restart for read request. +7060:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** * @arg @ref I2C_GENERATE_START_WRITE Generate Restart for write request. +7061:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** * @retval None +7062:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** */ +7063:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** static void I2C_TransferConfig(I2C_HandleTypeDef *hi2c, uint16_t DevAddress, uint8_t Size, uint32_t +7064:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** uint32_t Request) +7065:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { + 72 .loc 1 7065 1 is_stmt 1 view -0 + 73 .cfi_startproc + 74 @ args = 4, pretend = 0, frame = 0 + 75 @ frame_needed = 0, uses_anonymous_args = 0 + 76 .loc 1 7065 1 is_stmt 0 view .LVU12 + 77 0000 10B5 push {r4, lr} + 78 .cfi_def_cfa_offset 8 + 79 .cfi_offset 4, -8 + 80 .cfi_offset 14, -4 +7066:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* Check the parameters */ +7067:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** assert_param(IS_I2C_ALL_INSTANCE(hi2c->Instance)); + 81 .loc 1 7067 3 is_stmt 1 view .LVU13 +7068:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** assert_param(IS_TRANSFER_MODE(Mode)); + 82 .loc 1 7068 3 view .LVU14 +7069:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** assert_param(IS_TRANSFER_REQUEST(Request)); + 83 .loc 1 7069 3 view .LVU15 +7070:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** +7071:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* Declaration of tmp to prevent undefined behavior of volatile usage */ +7072:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** uint32_t tmp = ((uint32_t)(((uint32_t)DevAddress & I2C_CR2_SADD) | \ + 84 .loc 1 7072 3 view .LVU16 + 85 .loc 1 7072 52 is_stmt 0 view .LVU17 + 86 0002 8905 lsls r1, r1, #22 + 87 .LVL2: + 88 .loc 1 7072 52 view .LVU18 + 89 0004 890D lsrs r1, r1, #22 +7073:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** (((uint32_t)Size << I2C_CR2_NBYTES_Pos) & I2C_CR2_NBYTES) | \ + 90 .loc 1 7073 70 view .LVU19 + 91 0006 1204 lsls r2, r2, #16 + 92 .LVL3: +7072:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** (((uint32_t)Size << I2C_CR2_NBYTES_Pos) & I2C_CR2_NBYTES) | \ + 93 .loc 1 7072 68 view .LVU20 + 94 0008 1143 orrs r1, r2 + 95 .loc 1 7073 88 view .LVU21 + 96 000a 1943 orrs r1, r3 +7072:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** (((uint32_t)Size << I2C_CR2_NBYTES_Pos) & I2C_CR2_NBYTES) | \ + 97 .loc 1 7072 19 view .LVU22 + 98 000c 029B ldr r3, [sp, #8] + 99 .LVL4: +7072:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** (((uint32_t)Size << I2C_CR2_NBYTES_Pos) & I2C_CR2_NBYTES) | \ + 100 .loc 1 7072 19 view .LVU23 + 101 000e 1943 orrs r1, r3 +7072:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** (((uint32_t)Size << I2C_CR2_NBYTES_Pos) & I2C_CR2_NBYTES) | \ + 102 .loc 1 7072 12 view .LVU24 + 103 0010 4900 lsls r1, r1, #1 + 104 0012 4908 lsrs r1, r1, #1 + 105 .LVL5: +7074:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** (uint32_t)Mode | (uint32_t)Request) & (~0x80000000U)); +7075:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** +7076:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* update CR2 register */ + ARM GAS /tmp/ccuRhBPx.s page 127 + + +7077:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** MODIFY_REG(hi2c->Instance->CR2, \ + 106 .loc 1 7077 3 is_stmt 1 view .LVU25 + 107 0014 0468 ldr r4, [r0] + 108 0016 6268 ldr r2, [r4, #4] + 109 0018 5B0D lsrs r3, r3, #21 + 110 001a 8020 movs r0, #128 + 111 .LVL6: + 112 .loc 1 7077 3 is_stmt 0 view .LVU26 + 113 001c C000 lsls r0, r0, #3 + 114 001e 0340 ands r3, r0 + 115 0020 0348 ldr r0, .L7 + 116 0022 0343 orrs r3, r0 + 117 0024 9A43 bics r2, r3 + 118 0026 1300 movs r3, r2 + 119 0028 0B43 orrs r3, r1 + 120 002a 6360 str r3, [r4, #4] +7078:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** ((I2C_CR2_SADD | I2C_CR2_NBYTES | I2C_CR2_RELOAD | I2C_CR2_AUTOEND | \ +7079:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** (I2C_CR2_RD_WRN & (uint32_t)(Request >> (31U - I2C_CR2_RD_WRN_Pos))) | \ +7080:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** I2C_CR2_START | I2C_CR2_STOP)), tmp); +7081:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } + 121 .loc 1 7081 1 view .LVU27 + 122 @ sp needed + 123 002c 10BD pop {r4, pc} + 124 .L8: + 125 002e C046 .align 2 + 126 .L7: + 127 0030 FF63FF03 .word 67068927 + 128 .cfi_endproc + 129 .LFE117: + 131 .section .text.I2C_Enable_IRQ,"ax",%progbits + 132 .align 1 + 133 .syntax unified + 134 .code 16 + 135 .thumb_func + 137 I2C_Enable_IRQ: + 138 .LVL7: + 139 .LFB118: +7082:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** +7083:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /** +7084:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** * @brief Manage the enabling of Interrupts. +7085:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** * @param hi2c Pointer to a I2C_HandleTypeDef structure that contains +7086:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** * the configuration information for the specified I2C. +7087:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** * @param InterruptRequest Value of @ref I2C_Interrupt_configuration_definition. +7088:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** * @retval None +7089:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** */ +7090:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** static void I2C_Enable_IRQ(I2C_HandleTypeDef *hi2c, uint16_t InterruptRequest) +7091:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { + 140 .loc 1 7091 1 is_stmt 1 view -0 + 141 .cfi_startproc + 142 @ args = 0, pretend = 0, frame = 0 + 143 @ frame_needed = 0, uses_anonymous_args = 0 + 144 .loc 1 7091 1 is_stmt 0 view .LVU29 + 145 0000 10B5 push {r4, lr} + 146 .cfi_def_cfa_offset 8 + 147 .cfi_offset 4, -8 + 148 .cfi_offset 14, -4 +7092:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** uint32_t tmpisr = 0U; + ARM GAS /tmp/ccuRhBPx.s page 128 + + + 149 .loc 1 7092 3 is_stmt 1 view .LVU30 + 150 .LVL8: +7093:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** +7094:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** if ((hi2c->XferISR != I2C_Master_ISR_DMA) && \ + 151 .loc 1 7094 3 view .LVU31 + 152 .loc 1 7094 12 is_stmt 0 view .LVU32 + 153 0002 426B ldr r2, [r0, #52] + 154 .loc 1 7094 6 view .LVU33 + 155 0004 224B ldr r3, .L31 + 156 0006 9A42 cmp r2, r3 + 157 0008 1DD0 beq .L10 + 158 .loc 1 7094 45 discriminator 1 view .LVU34 + 159 000a 224B ldr r3, .L31+4 + 160 000c 9A42 cmp r2, r3 + 161 000e 1AD0 beq .L10 +7095:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** (hi2c->XferISR != I2C_Slave_ISR_DMA) && \ + 162 .loc 1 7095 44 view .LVU35 + 163 0010 214B ldr r3, .L31+8 + 164 0012 9A42 cmp r2, r3 + 165 0014 17D0 beq .L10 +7096:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** (hi2c->XferISR != I2C_Mem_ISR_DMA)) +7097:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { +7098:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** if ((InterruptRequest & I2C_XFER_LISTEN_IT) == I2C_XFER_LISTEN_IT) + 166 .loc 1 7098 5 is_stmt 1 view .LVU36 + 167 .loc 1 7098 49 is_stmt 0 view .LVU37 + 168 0016 0BB2 sxth r3, r1 + 169 .loc 1 7098 8 view .LVU38 + 170 0018 002B cmp r3, #0 + 171 001a 0FDB blt .L21 +7092:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 172 .loc 1 7092 12 view .LVU39 + 173 001c 0023 movs r3, #0 + 174 .L11: + 175 .LVL9: +7099:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { +7100:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* Enable ERR, STOP, NACK and ADDR interrupts */ +7101:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** tmpisr |= I2C_IT_ADDRI | I2C_IT_STOPI | I2C_IT_NACKI | I2C_IT_ERRI; +7102:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } +7103:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** +7104:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** if ((InterruptRequest & I2C_XFER_TX_IT) == I2C_XFER_TX_IT) + 176 .loc 1 7104 5 is_stmt 1 view .LVU40 + 177 .loc 1 7104 8 is_stmt 0 view .LVU41 + 178 001e CA07 lsls r2, r1, #31 + 179 0020 01D5 bpl .L12 +7105:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { +7106:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* Enable ERR, TC, STOP, NACK and RXI interrupts */ +7107:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** tmpisr |= I2C_IT_ERRI | I2C_IT_TCI | I2C_IT_STOPI | I2C_IT_NACKI | I2C_IT_TXI; + 180 .loc 1 7107 7 is_stmt 1 view .LVU42 + 181 .loc 1 7107 14 is_stmt 0 view .LVU43 + 182 0022 F222 movs r2, #242 + 183 0024 1343 orrs r3, r2 + 184 .LVL10: + 185 .L12: +7108:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } +7109:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** +7110:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** if ((InterruptRequest & I2C_XFER_RX_IT) == I2C_XFER_RX_IT) + 186 .loc 1 7110 5 is_stmt 1 view .LVU44 + ARM GAS /tmp/ccuRhBPx.s page 129 + + + 187 .loc 1 7110 8 is_stmt 0 view .LVU45 + 188 0026 8A07 lsls r2, r1, #30 + 189 0028 01D5 bpl .L13 +7111:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { +7112:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* Enable ERR, TC, STOP, NACK and TXI interrupts */ +7113:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** tmpisr |= I2C_IT_ERRI | I2C_IT_TCI | I2C_IT_STOPI | I2C_IT_NACKI | I2C_IT_RXI; + 190 .loc 1 7113 7 is_stmt 1 view .LVU46 + 191 .loc 1 7113 14 is_stmt 0 view .LVU47 + 192 002a F422 movs r2, #244 + 193 002c 1343 orrs r3, r2 + 194 .LVL11: + 195 .L13: +7114:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } +7115:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** +7116:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** if (InterruptRequest == I2C_XFER_ERROR_IT) + 196 .loc 1 7116 5 is_stmt 1 view .LVU48 + 197 .loc 1 7116 8 is_stmt 0 view .LVU49 + 198 002e 1029 cmp r1, #16 + 199 0030 06D0 beq .L27 + 200 .L14: +7117:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { +7118:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* Enable ERR and NACK interrupts */ +7119:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** tmpisr |= I2C_IT_ERRI | I2C_IT_NACKI; +7120:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } +7121:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** +7122:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** if (InterruptRequest == I2C_XFER_CPLT_IT) + 201 .loc 1 7122 5 is_stmt 1 view .LVU50 + 202 .loc 1 7122 8 is_stmt 0 view .LVU51 + 203 0032 2029 cmp r1, #32 + 204 0034 1CD1 bne .L15 +7123:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { +7124:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* Enable STOP interrupts */ +7125:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** tmpisr |= I2C_IT_STOPI; + 205 .loc 1 7125 7 is_stmt 1 view .LVU52 + 206 .loc 1 7125 14 is_stmt 0 view .LVU53 + 207 0036 2022 movs r2, #32 + 208 0038 1343 orrs r3, r2 + 209 .LVL12: + 210 .loc 1 7125 14 view .LVU54 + 211 003a 19E0 b .L15 + 212 .LVL13: + 213 .L21: +7101:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } + 214 .loc 1 7101 14 view .LVU55 + 215 003c B823 movs r3, #184 + 216 003e EEE7 b .L11 + 217 .LVL14: + 218 .L27: +7119:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } + 219 .loc 1 7119 7 is_stmt 1 view .LVU56 +7119:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } + 220 .loc 1 7119 14 is_stmt 0 view .LVU57 + 221 0040 9022 movs r2, #144 + 222 0042 1343 orrs r3, r2 + 223 .LVL15: +7119:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } + 224 .loc 1 7119 14 view .LVU58 + ARM GAS /tmp/ccuRhBPx.s page 130 + + + 225 0044 F5E7 b .L14 + 226 .LVL16: + 227 .L10: +7126:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } +7127:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } +7128:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** +7129:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** else +7130:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { +7131:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** if ((InterruptRequest & I2C_XFER_LISTEN_IT) == I2C_XFER_LISTEN_IT) + 228 .loc 1 7131 5 is_stmt 1 view .LVU59 + 229 .loc 1 7131 49 is_stmt 0 view .LVU60 + 230 0046 0BB2 sxth r3, r1 + 231 .loc 1 7131 8 view .LVU61 + 232 0048 002B cmp r3, #0 + 233 004a 16DB blt .L22 +7092:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 234 .loc 1 7092 12 view .LVU62 + 235 004c 0023 movs r3, #0 + 236 .L16: + 237 .LVL17: +7132:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { +7133:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* Enable ERR, STOP, NACK and ADDR interrupts */ +7134:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** tmpisr |= I2C_IT_ADDRI | I2C_IT_STOPI | I2C_IT_NACKI | I2C_IT_ERRI; +7135:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } +7136:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** +7137:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** if ((InterruptRequest & I2C_XFER_TX_IT) == I2C_XFER_TX_IT) + 238 .loc 1 7137 5 is_stmt 1 view .LVU63 + 239 .loc 1 7137 8 is_stmt 0 view .LVU64 + 240 004e CC07 lsls r4, r1, #31 + 241 0050 01D5 bpl .L17 +7138:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { +7139:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* Enable ERR, TC, STOP, NACK and RXI interrupts */ +7140:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** tmpisr |= I2C_IT_ERRI | I2C_IT_TCI | I2C_IT_STOPI | I2C_IT_NACKI | I2C_IT_TXI; + 242 .loc 1 7140 7 is_stmt 1 view .LVU65 + 243 .loc 1 7140 14 is_stmt 0 view .LVU66 + 244 0052 F224 movs r4, #242 + 245 0054 2343 orrs r3, r4 + 246 .LVL18: + 247 .L17: +7141:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } +7142:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** +7143:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** if ((InterruptRequest & I2C_XFER_RX_IT) == I2C_XFER_RX_IT) + 248 .loc 1 7143 5 is_stmt 1 view .LVU67 + 249 .loc 1 7143 8 is_stmt 0 view .LVU68 + 250 0056 8C07 lsls r4, r1, #30 + 251 0058 01D5 bpl .L18 +7144:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { +7145:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* Enable ERR, TC, STOP, NACK and TXI interrupts */ +7146:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** tmpisr |= I2C_IT_ERRI | I2C_IT_TCI | I2C_IT_STOPI | I2C_IT_NACKI | I2C_IT_RXI; + 252 .loc 1 7146 7 is_stmt 1 view .LVU69 + 253 .loc 1 7146 14 is_stmt 0 view .LVU70 + 254 005a F424 movs r4, #244 + 255 005c 2343 orrs r3, r4 + 256 .LVL19: + 257 .L18: +7147:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } +7148:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + ARM GAS /tmp/ccuRhBPx.s page 131 + + +7149:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** if (InterruptRequest == I2C_XFER_ERROR_IT) + 258 .loc 1 7149 5 is_stmt 1 view .LVU71 + 259 .loc 1 7149 8 is_stmt 0 view .LVU72 + 260 005e 1029 cmp r1, #16 + 261 0060 0DD0 beq .L28 + 262 .L19: +7150:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { +7151:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* Enable ERR and NACK interrupts */ +7152:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** tmpisr |= I2C_IT_ERRI | I2C_IT_NACKI; +7153:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } +7154:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** +7155:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** if (InterruptRequest == I2C_XFER_CPLT_IT) + 263 .loc 1 7155 5 is_stmt 1 view .LVU73 + 264 .loc 1 7155 8 is_stmt 0 view .LVU74 + 265 0062 2029 cmp r1, #32 + 266 0064 0ED0 beq .L29 + 267 .L20: +7156:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { +7157:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* Enable STOP interrupts */ +7158:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** tmpisr |= (I2C_IT_STOPI | I2C_IT_TCI); +7159:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } +7160:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** +7161:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** if ((hi2c->XferISR != I2C_Mem_ISR_DMA) && (InterruptRequest == I2C_XFER_RELOAD_IT)) + 268 .loc 1 7161 5 is_stmt 1 view .LVU75 + 269 .loc 1 7161 8 is_stmt 0 view .LVU76 + 270 0066 0C4C ldr r4, .L31+8 + 271 0068 A242 cmp r2, r4 + 272 006a 01D0 beq .L15 + 273 .loc 1 7161 44 discriminator 1 view .LVU77 + 274 006c 4029 cmp r1, #64 + 275 006e 0CD0 beq .L30 + 276 .L15: +7162:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { +7163:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* Enable TC interrupts */ +7164:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** tmpisr |= I2C_IT_TCI; +7165:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } +7166:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } +7167:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** +7168:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* Enable interrupts only at the end */ +7169:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* to avoid the risk of I2C interrupt handle execution before */ +7170:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* all interrupts requested done */ +7171:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** __HAL_I2C_ENABLE_IT(hi2c, tmpisr); + 277 .loc 1 7171 3 is_stmt 1 view .LVU78 + 278 0070 0168 ldr r1, [r0] + 279 .LVL20: + 280 .loc 1 7171 3 is_stmt 0 view .LVU79 + 281 0072 0A68 ldr r2, [r1] + 282 0074 1343 orrs r3, r2 + 283 .LVL21: + 284 .loc 1 7171 3 view .LVU80 + 285 0076 0B60 str r3, [r1] +7172:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } + 286 .loc 1 7172 1 view .LVU81 + 287 @ sp needed + 288 0078 10BD pop {r4, pc} + 289 .LVL22: + 290 .L22: + ARM GAS /tmp/ccuRhBPx.s page 132 + + +7134:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } + 291 .loc 1 7134 14 view .LVU82 + 292 007a B823 movs r3, #184 + 293 007c E7E7 b .L16 + 294 .LVL23: + 295 .L28: +7152:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } + 296 .loc 1 7152 7 is_stmt 1 view .LVU83 +7152:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } + 297 .loc 1 7152 14 is_stmt 0 view .LVU84 + 298 007e 9024 movs r4, #144 + 299 0080 2343 orrs r3, r4 + 300 .LVL24: +7152:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } + 301 .loc 1 7152 14 view .LVU85 + 302 0082 EEE7 b .L19 + 303 .L29: +7158:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } + 304 .loc 1 7158 7 is_stmt 1 view .LVU86 +7158:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } + 305 .loc 1 7158 14 is_stmt 0 view .LVU87 + 306 0084 6024 movs r4, #96 + 307 0086 2343 orrs r3, r4 + 308 .LVL25: +7158:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } + 309 .loc 1 7158 14 view .LVU88 + 310 0088 EDE7 b .L20 + 311 .L30: +7164:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } + 312 .loc 1 7164 7 is_stmt 1 view .LVU89 +7164:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } + 313 .loc 1 7164 14 is_stmt 0 view .LVU90 + 314 008a 4022 movs r2, #64 + 315 008c 1343 orrs r3, r2 + 316 .LVL26: +7164:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } + 317 .loc 1 7164 14 view .LVU91 + 318 008e EFE7 b .L15 + 319 .L32: + 320 .align 2 + 321 .L31: + 322 0090 00000000 .word I2C_Master_ISR_DMA + 323 0094 00000000 .word I2C_Slave_ISR_DMA + 324 0098 00000000 .word I2C_Mem_ISR_DMA + 325 .cfi_endproc + 326 .LFE118: + 328 .section .text.I2C_Disable_IRQ,"ax",%progbits + 329 .align 1 + 330 .syntax unified + 331 .code 16 + 332 .thumb_func + 334 I2C_Disable_IRQ: + 335 .LVL27: + 336 .LFB119: +7173:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** +7174:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /** +7175:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** * @brief Manage the disabling of Interrupts. + ARM GAS /tmp/ccuRhBPx.s page 133 + + +7176:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** * @param hi2c Pointer to a I2C_HandleTypeDef structure that contains +7177:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** * the configuration information for the specified I2C. +7178:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** * @param InterruptRequest Value of @ref I2C_Interrupt_configuration_definition. +7179:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** * @retval None +7180:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** */ +7181:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** static void I2C_Disable_IRQ(I2C_HandleTypeDef *hi2c, uint16_t InterruptRequest) +7182:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { + 337 .loc 1 7182 1 is_stmt 1 view -0 + 338 .cfi_startproc + 339 @ args = 0, pretend = 0, frame = 0 + 340 @ frame_needed = 0, uses_anonymous_args = 0 + 341 .loc 1 7182 1 is_stmt 0 view .LVU93 + 342 0000 30B5 push {r4, r5, lr} + 343 .cfi_def_cfa_offset 12 + 344 .cfi_offset 4, -12 + 345 .cfi_offset 5, -8 + 346 .cfi_offset 14, -4 +7183:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** uint32_t tmpisr = 0U; + 347 .loc 1 7183 3 is_stmt 1 view .LVU94 + 348 .LVL28: +7184:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** +7185:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** if ((InterruptRequest & I2C_XFER_TX_IT) == I2C_XFER_TX_IT) + 349 .loc 1 7185 3 view .LVU95 + 350 .loc 1 7185 6 is_stmt 0 view .LVU96 + 351 0002 CB07 lsls r3, r1, #31 + 352 0004 09D5 bpl .L40 +7186:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { +7187:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* Disable TC and TXI interrupts */ +7188:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** tmpisr |= I2C_IT_TCI | I2C_IT_TXI; + 353 .loc 1 7188 5 is_stmt 1 view .LVU97 + 354 .LVL29: +7189:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** +7190:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** if (((uint32_t)hi2c->State & (uint32_t)HAL_I2C_STATE_LISTEN) != (uint32_t)HAL_I2C_STATE_LISTEN) + 355 .loc 1 7190 5 view .LVU98 + 356 .loc 1 7190 24 is_stmt 0 view .LVU99 + 357 0006 4123 movs r3, #65 + 358 0008 C35C ldrb r3, [r0, r3] + 359 .loc 1 7190 8 view .LVU100 + 360 000a 2822 movs r2, #40 + 361 000c 1340 ands r3, r2 + 362 000e 282B cmp r3, #40 + 363 0010 01D0 beq .L44 +7191:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { +7192:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* Disable NACK and STOP interrupts */ +7193:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** tmpisr |= I2C_IT_STOPI | I2C_IT_NACKI | I2C_IT_ERRI; + 364 .loc 1 7193 14 view .LVU101 + 365 0012 F223 movs r3, #242 + 366 0014 02E0 b .L34 + 367 .L44: +7188:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 368 .loc 1 7188 12 view .LVU102 + 369 0016 1A33 adds r3, r3, #26 + 370 0018 00E0 b .L34 + 371 .LVL30: + 372 .L40: +7183:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 373 .loc 1 7183 12 view .LVU103 + ARM GAS /tmp/ccuRhBPx.s page 134 + + + 374 001a 0023 movs r3, #0 + 375 .LVL31: + 376 .L34: +7194:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } +7195:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } +7196:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** +7197:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** if ((InterruptRequest & I2C_XFER_RX_IT) == I2C_XFER_RX_IT) + 377 .loc 1 7197 3 is_stmt 1 view .LVU104 + 378 .loc 1 7197 6 is_stmt 0 view .LVU105 + 379 001c 8A07 lsls r2, r1, #30 + 380 001e 09D5 bpl .L35 +7198:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { +7199:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* Disable TC and RXI interrupts */ +7200:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** tmpisr |= I2C_IT_TCI | I2C_IT_RXI; + 381 .loc 1 7200 5 is_stmt 1 view .LVU106 + 382 .loc 1 7200 12 is_stmt 0 view .LVU107 + 383 0020 4424 movs r4, #68 + 384 0022 1C43 orrs r4, r3 + 385 .LVL32: +7201:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** +7202:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** if (((uint32_t)hi2c->State & (uint32_t)HAL_I2C_STATE_LISTEN) != (uint32_t)HAL_I2C_STATE_LISTEN) + 386 .loc 1 7202 5 is_stmt 1 view .LVU108 + 387 .loc 1 7202 24 is_stmt 0 view .LVU109 + 388 0024 4122 movs r2, #65 + 389 0026 825C ldrb r2, [r0, r2] + 390 .loc 1 7202 8 view .LVU110 + 391 0028 2825 movs r5, #40 + 392 002a 2A40 ands r2, r5 + 393 002c 282A cmp r2, #40 + 394 002e 0FD0 beq .L42 +7203:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { +7204:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* Disable NACK and STOP interrupts */ +7205:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** tmpisr |= I2C_IT_STOPI | I2C_IT_NACKI | I2C_IT_ERRI; + 395 .loc 1 7205 7 is_stmt 1 view .LVU111 + 396 .loc 1 7205 14 is_stmt 0 view .LVU112 + 397 0030 F422 movs r2, #244 + 398 0032 1343 orrs r3, r2 + 399 .LVL33: + 400 .L35: +7206:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } +7207:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } +7208:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** +7209:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** if ((InterruptRequest & I2C_XFER_LISTEN_IT) == I2C_XFER_LISTEN_IT) + 401 .loc 1 7209 3 is_stmt 1 view .LVU113 + 402 .loc 1 7209 47 is_stmt 0 view .LVU114 + 403 0034 0AB2 sxth r2, r1 + 404 .loc 1 7209 6 view .LVU115 + 405 0036 002A cmp r2, #0 + 406 0038 0CDB blt .L45 + 407 .L36: +7210:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { +7211:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* Disable ADDR, NACK and STOP interrupts */ +7212:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** tmpisr |= I2C_IT_ADDRI | I2C_IT_STOPI | I2C_IT_NACKI | I2C_IT_ERRI; +7213:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } +7214:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** +7215:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** if (InterruptRequest == I2C_XFER_ERROR_IT) + 408 .loc 1 7215 3 is_stmt 1 view .LVU116 + ARM GAS /tmp/ccuRhBPx.s page 135 + + + 409 .loc 1 7215 6 is_stmt 0 view .LVU117 + 410 003a 1029 cmp r1, #16 + 411 003c 0DD0 beq .L46 + 412 .L37: +7216:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { +7217:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* Enable ERR and NACK interrupts */ +7218:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** tmpisr |= I2C_IT_ERRI | I2C_IT_NACKI; +7219:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } +7220:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** +7221:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** if (InterruptRequest == I2C_XFER_CPLT_IT) + 413 .loc 1 7221 3 is_stmt 1 view .LVU118 + 414 .loc 1 7221 6 is_stmt 0 view .LVU119 + 415 003e 2029 cmp r1, #32 + 416 0040 0ED0 beq .L47 + 417 .L38: +7222:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { +7223:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* Enable STOP interrupts */ +7224:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** tmpisr |= I2C_IT_STOPI; +7225:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } +7226:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** +7227:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** if (InterruptRequest == I2C_XFER_RELOAD_IT) + 418 .loc 1 7227 3 is_stmt 1 view .LVU120 + 419 .loc 1 7227 6 is_stmt 0 view .LVU121 + 420 0042 4029 cmp r1, #64 + 421 0044 0FD0 beq .L48 + 422 .L39: +7228:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { +7229:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* Enable TC interrupts */ +7230:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** tmpisr |= I2C_IT_TCI; +7231:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } +7232:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** +7233:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* Disable interrupts only at the end */ +7234:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* to avoid a breaking situation like at "t" time */ +7235:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* all disable interrupts request are not done */ +7236:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** __HAL_I2C_DISABLE_IT(hi2c, tmpisr); + 423 .loc 1 7236 3 is_stmt 1 view .LVU122 + 424 0046 0168 ldr r1, [r0] + 425 .LVL34: + 426 .loc 1 7236 3 is_stmt 0 view .LVU123 + 427 0048 0A68 ldr r2, [r1] + 428 004a 9A43 bics r2, r3 + 429 004c 0A60 str r2, [r1] +7237:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } + 430 .loc 1 7237 1 view .LVU124 + 431 @ sp needed + 432 004e 30BD pop {r4, r5, pc} + 433 .LVL35: + 434 .L42: +7200:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 435 .loc 1 7200 12 view .LVU125 + 436 0050 2300 movs r3, r4 + 437 0052 EFE7 b .L35 + 438 .LVL36: + 439 .L45: +7212:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } + 440 .loc 1 7212 5 is_stmt 1 view .LVU126 +7212:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } + ARM GAS /tmp/ccuRhBPx.s page 136 + + + 441 .loc 1 7212 12 is_stmt 0 view .LVU127 + 442 0054 B822 movs r2, #184 + 443 0056 1343 orrs r3, r2 + 444 .LVL37: +7212:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } + 445 .loc 1 7212 12 view .LVU128 + 446 0058 EFE7 b .L36 + 447 .L46: +7218:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } + 448 .loc 1 7218 5 is_stmt 1 view .LVU129 +7218:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } + 449 .loc 1 7218 12 is_stmt 0 view .LVU130 + 450 005a 9022 movs r2, #144 + 451 005c 1343 orrs r3, r2 + 452 .LVL38: +7218:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } + 453 .loc 1 7218 12 view .LVU131 + 454 005e EEE7 b .L37 + 455 .L47: +7224:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } + 456 .loc 1 7224 5 is_stmt 1 view .LVU132 +7224:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } + 457 .loc 1 7224 12 is_stmt 0 view .LVU133 + 458 0060 2022 movs r2, #32 + 459 0062 1343 orrs r3, r2 + 460 .LVL39: +7224:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } + 461 .loc 1 7224 12 view .LVU134 + 462 0064 EDE7 b .L38 + 463 .L48: +7230:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } + 464 .loc 1 7230 5 is_stmt 1 view .LVU135 +7230:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } + 465 .loc 1 7230 12 is_stmt 0 view .LVU136 + 466 0066 4022 movs r2, #64 + 467 0068 1343 orrs r3, r2 + 468 .LVL40: +7230:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } + 469 .loc 1 7230 12 view .LVU137 + 470 006a ECE7 b .L39 + 471 .cfi_endproc + 472 .LFE119: + 474 .section .text.I2C_ConvertOtherXferOptions,"ax",%progbits + 475 .align 1 + 476 .syntax unified + 477 .code 16 + 478 .thumb_func + 480 I2C_ConvertOtherXferOptions: + 481 .LVL41: + 482 .LFB120: +7238:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** +7239:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /** +7240:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** * @brief Convert I2Cx OTHER_xxx XferOptions to functional XferOptions. +7241:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** * @param hi2c I2C handle. +7242:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** * @retval None +7243:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** */ +7244:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** static void I2C_ConvertOtherXferOptions(I2C_HandleTypeDef *hi2c) + ARM GAS /tmp/ccuRhBPx.s page 137 + + +7245:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { + 483 .loc 1 7245 1 is_stmt 1 view -0 + 484 .cfi_startproc + 485 @ args = 0, pretend = 0, frame = 0 + 486 @ frame_needed = 0, uses_anonymous_args = 0 + 487 @ link register save eliminated. +7246:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* if user set XferOptions to I2C_OTHER_FRAME */ +7247:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* it request implicitly to generate a restart condition */ +7248:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* set XferOptions to I2C_FIRST_FRAME */ +7249:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** if (hi2c->XferOptions == I2C_OTHER_FRAME) + 488 .loc 1 7249 3 view .LVU139 + 489 .loc 1 7249 11 is_stmt 0 view .LVU140 + 490 0000 C36A ldr r3, [r0, #44] + 491 .loc 1 7249 6 view .LVU141 + 492 0002 AA2B cmp r3, #170 + 493 0004 05D0 beq .L52 +7250:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { +7251:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->XferOptions = I2C_FIRST_FRAME; +7252:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } +7253:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* else if user set XferOptions to I2C_OTHER_AND_LAST_FRAME */ +7254:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* it request implicitly to generate a restart condition */ +7255:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* then generate a stop condition at the end of transfer */ +7256:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* set XferOptions to I2C_FIRST_AND_LAST_FRAME */ +7257:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** else if (hi2c->XferOptions == I2C_OTHER_AND_LAST_FRAME) + 494 .loc 1 7257 8 is_stmt 1 view .LVU142 + 495 .loc 1 7257 16 is_stmt 0 view .LVU143 + 496 0006 C26A ldr r2, [r0, #44] + 497 .loc 1 7257 11 view .LVU144 + 498 0008 AA23 movs r3, #170 + 499 000a 1B02 lsls r3, r3, #8 + 500 000c 9A42 cmp r2, r3 + 501 000e 03D0 beq .L53 + 502 .L49: +7258:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { +7259:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->XferOptions = I2C_FIRST_AND_LAST_FRAME; +7260:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } +7261:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** else +7262:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { +7263:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* Nothing to do */ +7264:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } +7265:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } + 503 .loc 1 7265 1 view .LVU145 + 504 @ sp needed + 505 0010 7047 bx lr + 506 .L52: +7251:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } + 507 .loc 1 7251 5 is_stmt 1 view .LVU146 +7251:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } + 508 .loc 1 7251 23 is_stmt 0 view .LVU147 + 509 0012 0023 movs r3, #0 + 510 0014 C362 str r3, [r0, #44] + 511 0016 FBE7 b .L49 + 512 .L53: +7259:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } + 513 .loc 1 7259 5 is_stmt 1 view .LVU148 +7259:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } + 514 .loc 1 7259 23 is_stmt 0 view .LVU149 + ARM GAS /tmp/ccuRhBPx.s page 138 + + + 515 0018 8023 movs r3, #128 + 516 001a 9B04 lsls r3, r3, #18 + 517 001c C362 str r3, [r0, #44] +7264:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } + 518 .loc 1 7264 3 is_stmt 1 view .LVU150 + 519 .loc 1 7265 1 is_stmt 0 view .LVU151 + 520 001e F7E7 b .L49 + 521 .cfi_endproc + 522 .LFE120: + 524 .section .text.I2C_IsErrorOccurred,"ax",%progbits + 525 .align 1 + 526 .syntax unified + 527 .code 16 + 528 .thumb_func + 530 I2C_IsErrorOccurred: + 531 .LVL42: + 532 .LFB116: +6923:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** HAL_StatusTypeDef status = HAL_OK; + 533 .loc 1 6923 1 is_stmt 1 view -0 + 534 .cfi_startproc + 535 @ args = 0, pretend = 0, frame = 0 + 536 @ frame_needed = 0, uses_anonymous_args = 0 +6923:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** HAL_StatusTypeDef status = HAL_OK; + 537 .loc 1 6923 1 is_stmt 0 view .LVU153 + 538 0000 F0B5 push {r4, r5, r6, r7, lr} + 539 .cfi_def_cfa_offset 20 + 540 .cfi_offset 4, -20 + 541 .cfi_offset 5, -16 + 542 .cfi_offset 6, -12 + 543 .cfi_offset 7, -8 + 544 .cfi_offset 14, -4 + 545 0002 C646 mov lr, r8 + 546 0004 00B5 push {lr} + 547 .cfi_def_cfa_offset 24 + 548 .cfi_offset 8, -24 + 549 0006 0400 movs r4, r0 + 550 0008 0D00 movs r5, r1 + 551 000a 1700 movs r7, r2 +6924:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** uint32_t itflag = hi2c->Instance->ISR; + 552 .loc 1 6924 3 is_stmt 1 view .LVU154 + 553 .LVL43: +6925:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** uint32_t error_code = 0; + 554 .loc 1 6925 3 view .LVU155 +6925:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** uint32_t error_code = 0; + 555 .loc 1 6925 27 is_stmt 0 view .LVU156 + 556 000c 0168 ldr r1, [r0] + 557 .LVL44: +6925:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** uint32_t error_code = 0; + 558 .loc 1 6925 12 view .LVU157 + 559 000e 8B69 ldr r3, [r1, #24] + 560 .LVL45: +6926:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** uint32_t tickstart = Tickstart; + 561 .loc 1 6926 3 is_stmt 1 view .LVU158 +6927:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** uint32_t tmp1; + 562 .loc 1 6927 3 view .LVU159 +6928:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** HAL_I2C_ModeTypeDef tmp2; + 563 .loc 1 6928 3 view .LVU160 + ARM GAS /tmp/ccuRhBPx.s page 139 + + +6929:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 564 .loc 1 6929 3 view .LVU161 +6931:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { + 565 .loc 1 6931 3 view .LVU162 +6931:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { + 566 .loc 1 6931 7 is_stmt 0 view .LVU163 + 567 0010 1022 movs r2, #16 + 568 .LVL46: +6931:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { + 569 .loc 1 6931 7 view .LVU164 + 570 0012 1600 movs r6, r2 + 571 0014 1E40 ands r6, r3 +6931:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { + 572 .loc 1 6931 6 view .LVU165 + 573 0016 1A42 tst r2, r3 + 574 0018 00D1 bne .LCB565 + 575 001a 75E0 b .L71 @long jump + 576 .LCB565: +6934:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 577 .loc 1 6934 5 is_stmt 1 view .LVU166 + 578 001c 1023 movs r3, #16 + 579 .LVL47: +6934:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 580 .loc 1 6934 5 is_stmt 0 view .LVU167 + 581 001e CB61 str r3, [r1, #28] +6938:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { + 582 .loc 1 6938 5 is_stmt 1 view .LVU168 +6926:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** uint32_t tickstart = Tickstart; + 583 .loc 1 6926 12 is_stmt 0 view .LVU169 + 584 0020 0023 movs r3, #0 + 585 0022 9846 mov r8, r3 +6924:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** uint32_t itflag = hi2c->Instance->ISR; + 586 .loc 1 6924 21 view .LVU170 + 587 0024 0026 movs r6, #0 + 588 .LVL48: + 589 .L57: +6938:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { + 590 .loc 1 6938 64 is_stmt 1 view .LVU171 +6938:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { + 591 .loc 1 6938 13 is_stmt 0 view .LVU172 + 592 0026 2068 ldr r0, [r4] + 593 0028 8369 ldr r3, [r0, #24] +6938:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { + 594 .loc 1 6938 64 view .LVU173 + 595 002a 9B06 lsls r3, r3, #26 + 596 002c 31D4 bmi .L63 +6938:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { + 597 .loc 1 6938 64 discriminator 1 view .LVU174 + 598 002e 002E cmp r6, #0 + 599 0030 2FD1 bne .L63 +6941:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { + 600 .loc 1 6941 7 is_stmt 1 view .LVU175 +6941:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { + 601 .loc 1 6941 10 is_stmt 0 view .LVU176 + 602 0032 6B1C adds r3, r5, #1 + 603 0034 F7D0 beq .L57 +6943:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { + ARM GAS /tmp/ccuRhBPx.s page 140 + + + 604 .loc 1 6943 9 is_stmt 1 view .LVU177 +6943:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { + 605 .loc 1 6943 15 is_stmt 0 view .LVU178 + 606 0036 FFF7FEFF bl HAL_GetTick + 607 .LVL49: +6943:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { + 608 .loc 1 6943 29 discriminator 1 view .LVU179 + 609 003a C01B subs r0, r0, r7 +6943:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { + 610 .loc 1 6943 12 discriminator 1 view .LVU180 + 611 003c A842 cmp r0, r5 + 612 003e 01D8 bhi .L58 +6943:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { + 613 .loc 1 6943 53 discriminator 1 view .LVU181 + 614 0040 002D cmp r5, #0 + 615 0042 F0D1 bne .L57 + 616 .L58: +6945:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** tmp2 = hi2c->Mode; + 617 .loc 1 6945 11 is_stmt 1 view .LVU182 +6945:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** tmp2 = hi2c->Mode; + 618 .loc 1 6945 33 is_stmt 0 view .LVU183 + 619 0044 2168 ldr r1, [r4] +6945:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** tmp2 = hi2c->Mode; + 620 .loc 1 6945 43 view .LVU184 + 621 0046 4B68 ldr r3, [r1, #4] +6945:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** tmp2 = hi2c->Mode; + 622 .loc 1 6945 16 view .LVU185 + 623 0048 8022 movs r2, #128 + 624 004a D201 lsls r2, r2, #7 + 625 004c 1340 ands r3, r2 + 626 .LVL50: +6946:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 627 .loc 1 6946 11 is_stmt 1 view .LVU186 +6946:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 628 .loc 1 6946 16 is_stmt 0 view .LVU187 + 629 004e 4222 movs r2, #66 + 630 0050 A25C ldrb r2, [r4, r2] + 631 0052 D2B2 uxtb r2, r2 + 632 .LVL51: +6949:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** (tmp1 != I2C_CR2_STOP) && \ + 633 .loc 1 6949 11 is_stmt 1 view .LVU188 +6949:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** (tmp1 != I2C_CR2_STOP) && \ + 634 .loc 1 6949 16 is_stmt 0 view .LVU189 + 635 0054 8869 ldr r0, [r1, #24] +6949:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** (tmp1 != I2C_CR2_STOP) && \ + 636 .loc 1 6949 14 view .LVU190 + 637 0056 0004 lsls r0, r0, #16 + 638 0058 03D5 bpl .L61 +6949:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** (tmp1 != I2C_CR2_STOP) && \ + 639 .loc 1 6949 66 discriminator 1 view .LVU191 + 640 005a 002B cmp r3, #0 + 641 005c 01D1 bne .L61 +6950:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** (tmp2 != HAL_I2C_MODE_SLAVE)) + 642 .loc 1 6950 38 view .LVU192 + 643 005e 202A cmp r2, #32 + 644 0060 0ED1 bne .L77 + 645 .LVL52: + ARM GAS /tmp/ccuRhBPx.s page 141 + + + 646 .L61: +6960:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { + 647 .loc 1 6960 59 is_stmt 1 view .LVU193 +6960:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { + 648 .loc 1 6960 18 is_stmt 0 view .LVU194 + 649 0062 2368 ldr r3, [r4] + 650 0064 9B69 ldr r3, [r3, #24] +6960:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { + 651 .loc 1 6960 59 view .LVU195 + 652 0066 9B06 lsls r3, r3, #26 + 653 0068 DDD4 bmi .L57 +6963:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { + 654 .loc 1 6963 13 is_stmt 1 view .LVU196 +6963:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { + 655 .loc 1 6963 18 is_stmt 0 view .LVU197 + 656 006a FFF7FEFF bl HAL_GetTick + 657 .LVL53: +6963:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { + 658 .loc 1 6963 32 discriminator 1 view .LVU198 + 659 006e C01B subs r0, r0, r7 +6963:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { + 660 .loc 1 6963 16 discriminator 1 view .LVU199 + 661 0070 1928 cmp r0, #25 + 662 0072 F6D9 bls .L61 +6965:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 663 .loc 1 6965 15 is_stmt 1 view .LVU200 +6965:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 664 .loc 1 6965 26 is_stmt 0 view .LVU201 + 665 0074 2023 movs r3, #32 + 666 0076 4246 mov r2, r8 + 667 0078 1A43 orrs r2, r3 + 668 007a 9046 mov r8, r2 + 669 .LVL54: +6967:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 670 .loc 1 6967 15 is_stmt 1 view .LVU202 +6969:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } + 671 .loc 1 6969 15 view .LVU203 +6967:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 672 .loc 1 6967 22 is_stmt 0 view .LVU204 + 673 007c 0126 movs r6, #1 +6969:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } + 674 .loc 1 6969 15 view .LVU205 + 675 007e D2E7 b .L57 + 676 .LVL55: + 677 .L77: +6954:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 678 .loc 1 6954 13 is_stmt 1 view .LVU206 +6954:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 679 .loc 1 6954 27 is_stmt 0 view .LVU207 + 680 0080 4A68 ldr r2, [r1, #4] + 681 .LVL56: +6954:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 682 .loc 1 6954 33 view .LVU208 + 683 0082 8023 movs r3, #128 + 684 .LVL57: +6954:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 685 .loc 1 6954 33 view .LVU209 + ARM GAS /tmp/ccuRhBPx.s page 142 + + + 686 0084 DB01 lsls r3, r3, #7 + 687 0086 1343 orrs r3, r2 + 688 0088 4B60 str r3, [r1, #4] +6957:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } + 689 .loc 1 6957 13 is_stmt 1 view .LVU210 +6957:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } + 690 .loc 1 6957 25 is_stmt 0 view .LVU211 + 691 008a FFF7FEFF bl HAL_GetTick + 692 .LVL58: + 693 008e 0700 movs r7, r0 + 694 .LVL59: +6957:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } + 695 .loc 1 6957 25 view .LVU212 + 696 0090 E7E7 b .L61 + 697 .LVL60: + 698 .L63: +6977:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { + 699 .loc 1 6977 5 is_stmt 1 view .LVU213 +6977:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { + 700 .loc 1 6977 8 is_stmt 0 view .LVU214 + 701 0092 002E cmp r6, #0 + 702 0094 01D1 bne .L65 +6980:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } + 703 .loc 1 6980 7 is_stmt 1 view .LVU215 + 704 0096 2023 movs r3, #32 + 705 0098 C361 str r3, [r0, #28] + 706 .L65: +6983:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 707 .loc 1 6983 5 view .LVU216 +6983:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 708 .loc 1 6983 16 is_stmt 0 view .LVU217 + 709 009a 0426 movs r6, #4 + 710 .LVL61: +6983:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 711 .loc 1 6983 16 view .LVU218 + 712 009c 4346 mov r3, r8 + 713 009e 3343 orrs r3, r6 + 714 00a0 1E00 movs r6, r3 + 715 .LVL62: +6985:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } + 716 .loc 1 6985 5 is_stmt 1 view .LVU219 +6985:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } + 717 .loc 1 6985 12 is_stmt 0 view .LVU220 + 718 00a2 0125 movs r5, #1 + 719 .LVL63: + 720 .L55: +6989:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 721 .loc 1 6989 3 is_stmt 1 view .LVU221 +6989:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 722 .loc 1 6989 16 is_stmt 0 view .LVU222 + 723 00a4 2268 ldr r2, [r4] +6989:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 724 .loc 1 6989 10 view .LVU223 + 725 00a6 9369 ldr r3, [r2, #24] + 726 .LVL64: +6993:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { + 727 .loc 1 6993 3 is_stmt 1 view .LVU224 + ARM GAS /tmp/ccuRhBPx.s page 143 + + +6993:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { + 728 .loc 1 6993 6 is_stmt 0 view .LVU225 + 729 00a8 D905 lsls r1, r3, #23 + 730 00aa 04D5 bpl .L66 +6995:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 731 .loc 1 6995 5 is_stmt 1 view .LVU226 +6995:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 732 .loc 1 6995 16 is_stmt 0 view .LVU227 + 733 00ac 0121 movs r1, #1 + 734 00ae 0E43 orrs r6, r1 + 735 .LVL65: +6998:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 736 .loc 1 6998 5 is_stmt 1 view .LVU228 + 737 00b0 FF31 adds r1, r1, #255 + 738 00b2 D161 str r1, [r2, #28] +7000:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } + 739 .loc 1 7000 5 view .LVU229 + 740 .LVL66: +7000:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } + 741 .loc 1 7000 12 is_stmt 0 view .LVU230 + 742 00b4 0125 movs r5, #1 + 743 .LVL67: + 744 .L66: +7004:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { + 745 .loc 1 7004 3 is_stmt 1 view .LVU231 +7004:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { + 746 .loc 1 7004 6 is_stmt 0 view .LVU232 + 747 00b6 5A05 lsls r2, r3, #21 + 748 00b8 06D5 bpl .L67 +7006:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 749 .loc 1 7006 5 is_stmt 1 view .LVU233 +7006:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 750 .loc 1 7006 16 is_stmt 0 view .LVU234 + 751 00ba 0822 movs r2, #8 + 752 00bc 1643 orrs r6, r2 + 753 .LVL68: +7009:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 754 .loc 1 7009 5 is_stmt 1 view .LVU235 + 755 00be 2268 ldr r2, [r4] + 756 00c0 8021 movs r1, #128 + 757 00c2 C900 lsls r1, r1, #3 + 758 00c4 D161 str r1, [r2, #28] +7011:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } + 759 .loc 1 7011 5 view .LVU236 + 760 .LVL69: +7011:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } + 761 .loc 1 7011 12 is_stmt 0 view .LVU237 + 762 00c6 0125 movs r5, #1 + 763 .LVL70: + 764 .L67: +7015:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { + 765 .loc 1 7015 3 is_stmt 1 view .LVU238 +7015:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { + 766 .loc 1 7015 6 is_stmt 0 view .LVU239 + 767 00c8 9B05 lsls r3, r3, #22 + 768 00ca 1FD5 bpl .L68 + 769 .LVL71: + ARM GAS /tmp/ccuRhBPx.s page 144 + + +7017:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 770 .loc 1 7017 5 is_stmt 1 view .LVU240 +7017:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 771 .loc 1 7017 16 is_stmt 0 view .LVU241 + 772 00cc 0223 movs r3, #2 + 773 00ce 1E43 orrs r6, r3 + 774 .LVL72: +7020:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 775 .loc 1 7020 5 is_stmt 1 view .LVU242 + 776 00d0 2368 ldr r3, [r4] + 777 00d2 8022 movs r2, #128 + 778 00d4 9200 lsls r2, r2, #2 + 779 00d6 DA61 str r2, [r3, #28] +7022:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } + 780 .loc 1 7022 5 view .LVU243 + 781 .LVL73: +7025:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { + 782 .loc 1 7025 3 view .LVU244 +7022:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } + 783 .loc 1 7022 12 is_stmt 0 view .LVU245 + 784 00d8 0125 movs r5, #1 + 785 .LVL74: + 786 .L69: +7028:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 787 .loc 1 7028 5 is_stmt 1 view .LVU246 + 788 00da 2000 movs r0, r4 + 789 00dc FFF7FEFF bl I2C_Flush_TXDR + 790 .LVL75: +7031:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 791 .loc 1 7031 5 view .LVU247 + 792 00e0 2268 ldr r2, [r4] + 793 00e2 5368 ldr r3, [r2, #4] + 794 00e4 0B49 ldr r1, .L78 + 795 00e6 0B40 ands r3, r1 + 796 00e8 5360 str r3, [r2, #4] +7033:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->State = HAL_I2C_STATE_READY; + 797 .loc 1 7033 5 view .LVU248 +7033:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->State = HAL_I2C_STATE_READY; + 798 .loc 1 7033 9 is_stmt 0 view .LVU249 + 799 00ea 636C ldr r3, [r4, #68] +7033:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->State = HAL_I2C_STATE_READY; + 800 .loc 1 7033 21 view .LVU250 + 801 00ec 3343 orrs r3, r6 + 802 00ee 6364 str r3, [r4, #68] +7034:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->Mode = HAL_I2C_MODE_NONE; + 803 .loc 1 7034 5 is_stmt 1 view .LVU251 +7034:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->Mode = HAL_I2C_MODE_NONE; + 804 .loc 1 7034 17 is_stmt 0 view .LVU252 + 805 00f0 4123 movs r3, #65 + 806 00f2 2022 movs r2, #32 + 807 00f4 E254 strb r2, [r4, r3] +7035:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 808 .loc 1 7035 5 is_stmt 1 view .LVU253 +7035:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 809 .loc 1 7035 16 is_stmt 0 view .LVU254 + 810 00f6 0023 movs r3, #0 + 811 00f8 2232 adds r2, r2, #34 + ARM GAS /tmp/ccuRhBPx.s page 145 + + + 812 00fa A354 strb r3, [r4, r2] +7038:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } + 813 .loc 1 7038 5 is_stmt 1 view .LVU255 +7038:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } + 814 .loc 1 7038 5 view .LVU256 + 815 00fc 023A subs r2, r2, #2 + 816 00fe A354 strb r3, [r4, r2] + 817 .L70: +7038:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } + 818 .loc 1 7038 5 discriminator 1 view .LVU257 +7041:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } + 819 .loc 1 7041 3 view .LVU258 +7042:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 820 .loc 1 7042 1 is_stmt 0 view .LVU259 + 821 0100 2800 movs r0, r5 + 822 @ sp needed + 823 .LVL76: + 824 .LVL77: + 825 .LVL78: +7042:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 826 .loc 1 7042 1 view .LVU260 + 827 0102 80BC pop {r7} + 828 0104 B846 mov r8, r7 + 829 0106 F0BD pop {r4, r5, r6, r7, pc} + 830 .LVL79: + 831 .L71: +6924:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** uint32_t itflag = hi2c->Instance->ISR; + 832 .loc 1 6924 21 view .LVU261 + 833 0108 0025 movs r5, #0 + 834 .LVL80: +6924:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** uint32_t itflag = hi2c->Instance->ISR; + 835 .loc 1 6924 21 view .LVU262 + 836 010a CBE7 b .L55 + 837 .LVL81: + 838 .L68: +7025:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { + 839 .loc 1 7025 3 is_stmt 1 view .LVU263 +7025:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { + 840 .loc 1 7025 6 is_stmt 0 view .LVU264 + 841 010c 002D cmp r5, #0 + 842 010e F7D0 beq .L70 + 843 0110 E3E7 b .L69 + 844 .L79: + 845 0112 C046 .align 2 + 846 .L78: + 847 0114 00E800FE .word -33495040 + 848 .cfi_endproc + 849 .LFE116: + 851 .section .text.I2C_WaitOnTXISFlagUntilTimeout,"ax",%progbits + 852 .align 1 + 853 .syntax unified + 854 .code 16 + 855 .thumb_func + 857 I2C_WaitOnTXISFlagUntilTimeout: + 858 .LVL82: + 859 .LFB113: +6769:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** while (__HAL_I2C_GET_FLAG(hi2c, I2C_FLAG_TXIS) == RESET) + ARM GAS /tmp/ccuRhBPx.s page 146 + + + 860 .loc 1 6769 1 is_stmt 1 view -0 + 861 .cfi_startproc + 862 @ args = 0, pretend = 0, frame = 0 + 863 @ frame_needed = 0, uses_anonymous_args = 0 +6769:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** while (__HAL_I2C_GET_FLAG(hi2c, I2C_FLAG_TXIS) == RESET) + 864 .loc 1 6769 1 is_stmt 0 view .LVU266 + 865 0000 70B5 push {r4, r5, r6, lr} + 866 .cfi_def_cfa_offset 16 + 867 .cfi_offset 4, -16 + 868 .cfi_offset 5, -12 + 869 .cfi_offset 6, -8 + 870 .cfi_offset 14, -4 + 871 0002 0400 movs r4, r0 + 872 0004 0D00 movs r5, r1 + 873 0006 1600 movs r6, r2 +6770:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { + 874 .loc 1 6770 3 is_stmt 1 view .LVU267 + 875 .LVL83: + 876 .L83: +6770:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { + 877 .loc 1 6770 50 view .LVU268 +6770:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { + 878 .loc 1 6770 10 is_stmt 0 view .LVU269 + 879 0008 2368 ldr r3, [r4] + 880 000a 9B69 ldr r3, [r3, #24] +6770:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { + 881 .loc 1 6770 50 view .LVU270 + 882 000c 9B07 lsls r3, r3, #30 + 883 000e 20D4 bmi .L89 +6773:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { + 884 .loc 1 6773 5 is_stmt 1 view .LVU271 +6773:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { + 885 .loc 1 6773 9 is_stmt 0 view .LVU272 + 886 0010 3200 movs r2, r6 + 887 0012 2900 movs r1, r5 + 888 0014 2000 movs r0, r4 + 889 0016 FFF7FEFF bl I2C_IsErrorOccurred + 890 .LVL84: +6773:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { + 891 .loc 1 6773 8 discriminator 1 view .LVU273 + 892 001a 0028 cmp r0, #0 + 893 001c 1BD1 bne .L86 +6779:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { + 894 .loc 1 6779 5 is_stmt 1 view .LVU274 +6779:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { + 895 .loc 1 6779 8 is_stmt 0 view .LVU275 + 896 001e 6B1C adds r3, r5, #1 + 897 0020 F2D0 beq .L83 +6781:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { + 898 .loc 1 6781 7 is_stmt 1 view .LVU276 +6781:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { + 899 .loc 1 6781 13 is_stmt 0 view .LVU277 + 900 0022 FFF7FEFF bl HAL_GetTick + 901 .LVL85: +6781:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { + 902 .loc 1 6781 27 discriminator 1 view .LVU278 + 903 0026 801B subs r0, r0, r6 + ARM GAS /tmp/ccuRhBPx.s page 147 + + +6781:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { + 904 .loc 1 6781 10 discriminator 1 view .LVU279 + 905 0028 A842 cmp r0, r5 + 906 002a 01D8 bhi .L84 +6781:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { + 907 .loc 1 6781 51 discriminator 1 view .LVU280 + 908 002c 002D cmp r5, #0 + 909 002e EBD1 bne .L83 + 910 .L84: +6783:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { + 911 .loc 1 6783 9 is_stmt 1 view .LVU281 +6783:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { + 912 .loc 1 6783 14 is_stmt 0 view .LVU282 + 913 0030 2368 ldr r3, [r4] + 914 0032 9B69 ldr r3, [r3, #24] +6783:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { + 915 .loc 1 6783 12 view .LVU283 + 916 0034 9B07 lsls r3, r3, #30 + 917 0036 E7D4 bmi .L83 +6785:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->State = HAL_I2C_STATE_READY; + 918 .loc 1 6785 11 is_stmt 1 view .LVU284 +6785:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->State = HAL_I2C_STATE_READY; + 919 .loc 1 6785 15 is_stmt 0 view .LVU285 + 920 0038 636C ldr r3, [r4, #68] +6785:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->State = HAL_I2C_STATE_READY; + 921 .loc 1 6785 27 view .LVU286 + 922 003a 2022 movs r2, #32 + 923 003c 1343 orrs r3, r2 + 924 003e 6364 str r3, [r4, #68] +6786:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->Mode = HAL_I2C_MODE_NONE; + 925 .loc 1 6786 11 is_stmt 1 view .LVU287 +6786:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->Mode = HAL_I2C_MODE_NONE; + 926 .loc 1 6786 23 is_stmt 0 view .LVU288 + 927 0040 4123 movs r3, #65 + 928 0042 E254 strb r2, [r4, r3] +6787:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 929 .loc 1 6787 11 is_stmt 1 view .LVU289 +6787:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 930 .loc 1 6787 22 is_stmt 0 view .LVU290 + 931 0044 0023 movs r3, #0 + 932 0046 2232 adds r2, r2, #34 + 933 0048 A354 strb r3, [r4, r2] +6790:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 934 .loc 1 6790 11 is_stmt 1 view .LVU291 +6790:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 935 .loc 1 6790 11 view .LVU292 + 936 004a 023A subs r2, r2, #2 + 937 004c A354 strb r3, [r4, r2] +6790:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 938 .loc 1 6790 11 view .LVU293 +6792:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } + 939 .loc 1 6792 11 view .LVU294 +6792:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } + 940 .loc 1 6792 18 is_stmt 0 view .LVU295 + 941 004e 0120 movs r0, #1 + 942 0050 00E0 b .L82 + 943 .L89: + ARM GAS /tmp/ccuRhBPx.s page 148 + + +6797:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } + 944 .loc 1 6797 10 view .LVU296 + 945 0052 0020 movs r0, #0 + 946 .L82: +6798:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 947 .loc 1 6798 1 view .LVU297 + 948 @ sp needed + 949 .LVL86: + 950 .LVL87: + 951 .LVL88: +6798:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 952 .loc 1 6798 1 view .LVU298 + 953 0054 70BD pop {r4, r5, r6, pc} + 954 .LVL89: + 955 .L86: +6775:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } + 956 .loc 1 6775 14 view .LVU299 + 957 0056 0120 movs r0, #1 + 958 0058 FCE7 b .L82 + 959 .cfi_endproc + 960 .LFE113: + 962 .section .text.I2C_WaitOnFlagUntilTimeout,"ax",%progbits + 963 .align 1 + 964 .syntax unified + 965 .code 16 + 966 .thumb_func + 968 I2C_WaitOnFlagUntilTimeout: + 969 .LVL90: + 970 .LFB112: +6735:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** while (__HAL_I2C_GET_FLAG(hi2c, Flag) == Status) + 971 .loc 1 6735 1 is_stmt 1 view -0 + 972 .cfi_startproc + 973 @ args = 4, pretend = 0, frame = 8 + 974 @ frame_needed = 0, uses_anonymous_args = 0 +6735:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** while (__HAL_I2C_GET_FLAG(hi2c, Flag) == Status) + 975 .loc 1 6735 1 is_stmt 0 view .LVU301 + 976 0000 F0B5 push {r4, r5, r6, r7, lr} + 977 .cfi_def_cfa_offset 20 + 978 .cfi_offset 4, -20 + 979 .cfi_offset 5, -16 + 980 .cfi_offset 6, -12 + 981 .cfi_offset 7, -8 + 982 .cfi_offset 14, -4 + 983 0002 CE46 mov lr, r9 + 984 0004 00B5 push {lr} + 985 .cfi_def_cfa_offset 24 + 986 .cfi_offset 9, -24 + 987 0006 82B0 sub sp, sp, #8 + 988 .cfi_def_cfa_offset 32 + 989 0008 0700 movs r7, r0 + 990 000a 0D00 movs r5, r1 + 991 000c 1600 movs r6, r2 + 992 000e 9946 mov r9, r3 +6736:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { + 993 .loc 1 6736 3 is_stmt 1 view .LVU302 + 994 .LVL91: + 995 .L92: + ARM GAS /tmp/ccuRhBPx.s page 149 + + +6736:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { + 996 .loc 1 6736 41 view .LVU303 +6736:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { + 997 .loc 1 6736 10 is_stmt 0 view .LVU304 + 998 0010 3B68 ldr r3, [r7] + 999 0012 9C69 ldr r4, [r3, #24] + 1000 0014 2C40 ands r4, r5 + 1001 0016 641B subs r4, r4, r5 + 1002 0018 6342 rsbs r3, r4, #0 + 1003 001a 5C41 adcs r4, r4, r3 +6736:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { + 1004 .loc 1 6736 41 view .LVU305 + 1005 001c 0196 str r6, [sp, #4] + 1006 001e B442 cmp r4, r6 + 1007 0020 21D1 bne .L97 +6739:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { + 1008 .loc 1 6739 5 is_stmt 1 view .LVU306 +6739:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { + 1009 .loc 1 6739 8 is_stmt 0 view .LVU307 + 1010 0022 4B46 mov r3, r9 + 1011 0024 0133 adds r3, r3, #1 + 1012 0026 F3D0 beq .L92 +6741:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { + 1013 .loc 1 6741 7 is_stmt 1 view .LVU308 +6741:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { + 1014 .loc 1 6741 13 is_stmt 0 view .LVU309 + 1015 0028 FFF7FEFF bl HAL_GetTick + 1016 .LVL92: +6741:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { + 1017 .loc 1 6741 27 discriminator 1 view .LVU310 + 1018 002c 089B ldr r3, [sp, #32] + 1019 002e C01A subs r0, r0, r3 +6741:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { + 1020 .loc 1 6741 10 discriminator 1 view .LVU311 + 1021 0030 4845 cmp r0, r9 + 1022 0032 02D8 bhi .L93 +6741:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { + 1023 .loc 1 6741 51 discriminator 1 view .LVU312 + 1024 0034 4B46 mov r3, r9 + 1025 0036 002B cmp r3, #0 + 1026 0038 EAD1 bne .L92 + 1027 .L93: +6743:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { + 1028 .loc 1 6743 9 is_stmt 1 view .LVU313 +6743:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { + 1029 .loc 1 6743 14 is_stmt 0 view .LVU314 + 1030 003a 3B68 ldr r3, [r7] + 1031 003c 9B69 ldr r3, [r3, #24] + 1032 003e 2B40 ands r3, r5 + 1033 0040 5B1B subs r3, r3, r5 + 1034 0042 5A42 rsbs r2, r3, #0 + 1035 0044 5341 adcs r3, r3, r2 +6743:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { + 1036 .loc 1 6743 12 view .LVU315 + 1037 0046 019A ldr r2, [sp, #4] + 1038 0048 9342 cmp r3, r2 + 1039 004a E1D1 bne .L92 + ARM GAS /tmp/ccuRhBPx.s page 150 + + +6745:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->State = HAL_I2C_STATE_READY; + 1040 .loc 1 6745 11 is_stmt 1 view .LVU316 +6745:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->State = HAL_I2C_STATE_READY; + 1041 .loc 1 6745 15 is_stmt 0 view .LVU317 + 1042 004c 7B6C ldr r3, [r7, #68] +6745:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->State = HAL_I2C_STATE_READY; + 1043 .loc 1 6745 27 view .LVU318 + 1044 004e 2022 movs r2, #32 + 1045 0050 1343 orrs r3, r2 + 1046 0052 7B64 str r3, [r7, #68] +6746:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->Mode = HAL_I2C_MODE_NONE; + 1047 .loc 1 6746 11 is_stmt 1 view .LVU319 +6746:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->Mode = HAL_I2C_MODE_NONE; + 1048 .loc 1 6746 23 is_stmt 0 view .LVU320 + 1049 0054 4123 movs r3, #65 + 1050 0056 FA54 strb r2, [r7, r3] +6747:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 1051 .loc 1 6747 11 is_stmt 1 view .LVU321 +6747:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 1052 .loc 1 6747 22 is_stmt 0 view .LVU322 + 1053 0058 0023 movs r3, #0 + 1054 005a 2232 adds r2, r2, #34 + 1055 005c BB54 strb r3, [r7, r2] +6750:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** return HAL_ERROR; + 1056 .loc 1 6750 11 is_stmt 1 view .LVU323 +6750:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** return HAL_ERROR; + 1057 .loc 1 6750 11 view .LVU324 + 1058 005e 023A subs r2, r2, #2 + 1059 0060 BB54 strb r3, [r7, r2] +6750:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** return HAL_ERROR; + 1060 .loc 1 6750 11 view .LVU325 +6751:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } + 1061 .loc 1 6751 11 view .LVU326 +6751:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } + 1062 .loc 1 6751 18 is_stmt 0 view .LVU327 + 1063 0062 0120 movs r0, #1 + 1064 0064 00E0 b .L94 + 1065 .L97: +6756:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } + 1066 .loc 1 6756 10 view .LVU328 + 1067 0066 0020 movs r0, #0 + 1068 .L94: +6757:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 1069 .loc 1 6757 1 view .LVU329 + 1070 0068 02B0 add sp, sp, #8 + 1071 @ sp needed + 1072 .LVL93: + 1073 .LVL94: + 1074 .LVL95: + 1075 .LVL96: +6757:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 1076 .loc 1 6757 1 view .LVU330 + 1077 006a 80BC pop {r7} + 1078 006c B946 mov r9, r7 + 1079 006e F0BD pop {r4, r5, r6, r7, pc} + 1080 .cfi_endproc + 1081 .LFE112: + ARM GAS /tmp/ccuRhBPx.s page 151 + + + 1083 .section .text.I2C_RequestMemoryWrite,"ax",%progbits + 1084 .align 1 + 1085 .syntax unified + 1086 .code 16 + 1087 .thumb_func + 1089 I2C_RequestMemoryWrite: + 1090 .LVL97: + 1091 .LFB95: +5658:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** I2C_TransferConfig(hi2c, DevAddress, (uint8_t)MemAddSize, I2C_RELOAD_MODE, I2C_GENERATE_START_WRI + 1092 .loc 1 5658 1 is_stmt 1 view -0 + 1093 .cfi_startproc + 1094 @ args = 8, pretend = 0, frame = 0 + 1095 @ frame_needed = 0, uses_anonymous_args = 0 +5658:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** I2C_TransferConfig(hi2c, DevAddress, (uint8_t)MemAddSize, I2C_RELOAD_MODE, I2C_GENERATE_START_WRI + 1096 .loc 1 5658 1 is_stmt 0 view .LVU332 + 1097 0000 70B5 push {r4, r5, r6, lr} + 1098 .cfi_def_cfa_offset 16 + 1099 .cfi_offset 4, -16 + 1100 .cfi_offset 5, -12 + 1101 .cfi_offset 6, -8 + 1102 .cfi_offset 14, -4 + 1103 0002 82B0 sub sp, sp, #8 + 1104 .cfi_def_cfa_offset 24 + 1105 0004 0400 movs r4, r0 + 1106 0006 1500 movs r5, r2 + 1107 0008 1E00 movs r6, r3 +5659:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 1108 .loc 1 5659 3 is_stmt 1 view .LVU333 + 1109 000a 8023 movs r3, #128 + 1110 .LVL98: +5659:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 1111 .loc 1 5659 3 is_stmt 0 view .LVU334 + 1112 000c F2B2 uxtb r2, r6 + 1113 .LVL99: +5659:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 1114 .loc 1 5659 3 view .LVU335 + 1115 000e 1948 ldr r0, .L106 + 1116 .LVL100: +5659:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 1117 .loc 1 5659 3 view .LVU336 + 1118 0010 0090 str r0, [sp] + 1119 0012 5B04 lsls r3, r3, #17 + 1120 0014 2000 movs r0, r4 + 1121 0016 FFF7FEFF bl I2C_TransferConfig + 1122 .LVL101: +5662:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { + 1123 .loc 1 5662 3 is_stmt 1 view .LVU337 +5662:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { + 1124 .loc 1 5662 7 is_stmt 0 view .LVU338 + 1125 001a 079A ldr r2, [sp, #28] + 1126 001c 0699 ldr r1, [sp, #24] + 1127 001e 2000 movs r0, r4 + 1128 0020 FFF7FEFF bl I2C_WaitOnTXISFlagUntilTimeout + 1129 .LVL102: +5662:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { + 1130 .loc 1 5662 6 discriminator 1 view .LVU339 + 1131 0024 0028 cmp r0, #0 + ARM GAS /tmp/ccuRhBPx.s page 152 + + + 1132 0026 1ED1 bne .L102 +5668:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { + 1133 .loc 1 5668 3 is_stmt 1 view .LVU340 +5668:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { + 1134 .loc 1 5668 6 is_stmt 0 view .LVU341 + 1135 0028 012E cmp r6, #1 + 1136 002a 0ED1 bne .L100 +5671:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } + 1137 .loc 1 5671 5 is_stmt 1 view .LVU342 +5671:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } + 1138 .loc 1 5671 9 is_stmt 0 view .LVU343 + 1139 002c 2368 ldr r3, [r4] +5671:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } + 1140 .loc 1 5671 28 view .LVU344 + 1141 002e EDB2 uxtb r5, r5 + 1142 .LVL103: +5671:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } + 1143 .loc 1 5671 26 view .LVU345 + 1144 0030 9D62 str r5, [r3, #40] + 1145 .L101: +5690:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { + 1146 .loc 1 5690 3 is_stmt 1 view .LVU346 +5690:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { + 1147 .loc 1 5690 7 is_stmt 0 view .LVU347 + 1148 0032 079B ldr r3, [sp, #28] + 1149 0034 0093 str r3, [sp] + 1150 0036 069B ldr r3, [sp, #24] + 1151 0038 0022 movs r2, #0 + 1152 003a 8021 movs r1, #128 + 1153 003c 2000 movs r0, r4 + 1154 003e FFF7FEFF bl I2C_WaitOnFlagUntilTimeout + 1155 .LVL104: +5690:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { + 1156 .loc 1 5690 6 discriminator 1 view .LVU348 + 1157 0042 0028 cmp r0, #0 + 1158 0044 13D1 bne .L105 + 1159 .L99: +5696:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 1160 .loc 1 5696 1 view .LVU349 + 1161 0046 02B0 add sp, sp, #8 + 1162 @ sp needed + 1163 .LVL105: + 1164 .LVL106: +5696:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 1165 .loc 1 5696 1 view .LVU350 + 1166 0048 70BD pop {r4, r5, r6, pc} + 1167 .LVL107: + 1168 .L100: +5677:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 1169 .loc 1 5677 5 is_stmt 1 view .LVU351 +5677:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 1170 .loc 1 5677 9 is_stmt 0 view .LVU352 + 1171 004a 2368 ldr r3, [r4] +5677:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 1172 .loc 1 5677 28 view .LVU353 + 1173 004c 2A0A lsrs r2, r5, #8 +5677:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + ARM GAS /tmp/ccuRhBPx.s page 153 + + + 1174 .loc 1 5677 26 view .LVU354 + 1175 004e 9A62 str r2, [r3, #40] +5680:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { + 1176 .loc 1 5680 5 is_stmt 1 view .LVU355 +5680:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { + 1177 .loc 1 5680 9 is_stmt 0 view .LVU356 + 1178 0050 079A ldr r2, [sp, #28] + 1179 0052 0699 ldr r1, [sp, #24] + 1180 0054 2000 movs r0, r4 + 1181 0056 FFF7FEFF bl I2C_WaitOnTXISFlagUntilTimeout + 1182 .LVL108: +5680:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { + 1183 .loc 1 5680 8 discriminator 1 view .LVU357 + 1184 005a 0028 cmp r0, #0 + 1185 005c 05D1 bne .L103 +5686:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } + 1186 .loc 1 5686 5 is_stmt 1 view .LVU358 +5686:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } + 1187 .loc 1 5686 9 is_stmt 0 view .LVU359 + 1188 005e 2368 ldr r3, [r4] +5686:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } + 1189 .loc 1 5686 28 view .LVU360 + 1190 0060 EDB2 uxtb r5, r5 +5686:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } + 1191 .loc 1 5686 26 view .LVU361 + 1192 0062 9D62 str r5, [r3, #40] + 1193 0064 E5E7 b .L101 + 1194 .L102: +5664:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } + 1195 .loc 1 5664 12 view .LVU362 + 1196 0066 0120 movs r0, #1 + 1197 0068 EDE7 b .L99 + 1198 .L103: +5682:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } + 1199 .loc 1 5682 14 view .LVU363 + 1200 006a 0120 movs r0, #1 + 1201 006c EBE7 b .L99 + 1202 .L105: +5692:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } + 1203 .loc 1 5692 12 view .LVU364 + 1204 006e 0120 movs r0, #1 + 1205 0070 E9E7 b .L99 + 1206 .L107: + 1207 0072 C046 .align 2 + 1208 .L106: + 1209 0074 00200080 .word -2147475456 + 1210 .cfi_endproc + 1211 .LFE95: + 1213 .section .text.I2C_RequestMemoryRead,"ax",%progbits + 1214 .align 1 + 1215 .syntax unified + 1216 .code 16 + 1217 .thumb_func + 1219 I2C_RequestMemoryRead: + 1220 .LVL109: + 1221 .LFB96: +5713:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** I2C_TransferConfig(hi2c, DevAddress, (uint8_t)MemAddSize, I2C_SOFTEND_MODE, I2C_GENERATE_START_WR + ARM GAS /tmp/ccuRhBPx.s page 154 + + + 1222 .loc 1 5713 1 is_stmt 1 view -0 + 1223 .cfi_startproc + 1224 @ args = 8, pretend = 0, frame = 0 + 1225 @ frame_needed = 0, uses_anonymous_args = 0 +5713:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** I2C_TransferConfig(hi2c, DevAddress, (uint8_t)MemAddSize, I2C_SOFTEND_MODE, I2C_GENERATE_START_WR + 1226 .loc 1 5713 1 is_stmt 0 view .LVU366 + 1227 0000 70B5 push {r4, r5, r6, lr} + 1228 .cfi_def_cfa_offset 16 + 1229 .cfi_offset 4, -16 + 1230 .cfi_offset 5, -12 + 1231 .cfi_offset 6, -8 + 1232 .cfi_offset 14, -4 + 1233 0002 82B0 sub sp, sp, #8 + 1234 .cfi_def_cfa_offset 24 + 1235 0004 0400 movs r4, r0 + 1236 0006 1500 movs r5, r2 + 1237 0008 1E00 movs r6, r3 +5714:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 1238 .loc 1 5714 3 is_stmt 1 view .LVU367 + 1239 000a DAB2 uxtb r2, r3 + 1240 .LVL110: +5714:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 1241 .loc 1 5714 3 is_stmt 0 view .LVU368 + 1242 000c 184B ldr r3, .L116 + 1243 .LVL111: +5714:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 1244 .loc 1 5714 3 view .LVU369 + 1245 000e 0093 str r3, [sp] + 1246 0010 0023 movs r3, #0 + 1247 0012 FFF7FEFF bl I2C_TransferConfig + 1248 .LVL112: +5717:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { + 1249 .loc 1 5717 3 is_stmt 1 view .LVU370 +5717:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { + 1250 .loc 1 5717 7 is_stmt 0 view .LVU371 + 1251 0016 079A ldr r2, [sp, #28] + 1252 0018 0699 ldr r1, [sp, #24] + 1253 001a 2000 movs r0, r4 + 1254 001c FFF7FEFF bl I2C_WaitOnTXISFlagUntilTimeout + 1255 .LVL113: +5717:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { + 1256 .loc 1 5717 6 discriminator 1 view .LVU372 + 1257 0020 0028 cmp r0, #0 + 1258 0022 1ED1 bne .L112 +5723:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { + 1259 .loc 1 5723 3 is_stmt 1 view .LVU373 +5723:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { + 1260 .loc 1 5723 6 is_stmt 0 view .LVU374 + 1261 0024 012E cmp r6, #1 + 1262 0026 0ED1 bne .L110 +5726:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } + 1263 .loc 1 5726 5 is_stmt 1 view .LVU375 +5726:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } + 1264 .loc 1 5726 9 is_stmt 0 view .LVU376 + 1265 0028 2368 ldr r3, [r4] +5726:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } + 1266 .loc 1 5726 28 view .LVU377 + ARM GAS /tmp/ccuRhBPx.s page 155 + + + 1267 002a EDB2 uxtb r5, r5 + 1268 .LVL114: +5726:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } + 1269 .loc 1 5726 26 view .LVU378 + 1270 002c 9D62 str r5, [r3, #40] + 1271 .L111: +5745:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { + 1272 .loc 1 5745 3 is_stmt 1 view .LVU379 +5745:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { + 1273 .loc 1 5745 7 is_stmt 0 view .LVU380 + 1274 002e 079B ldr r3, [sp, #28] + 1275 0030 0093 str r3, [sp] + 1276 0032 069B ldr r3, [sp, #24] + 1277 0034 0022 movs r2, #0 + 1278 0036 4021 movs r1, #64 + 1279 0038 2000 movs r0, r4 + 1280 003a FFF7FEFF bl I2C_WaitOnFlagUntilTimeout + 1281 .LVL115: +5745:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { + 1282 .loc 1 5745 6 discriminator 1 view .LVU381 + 1283 003e 0028 cmp r0, #0 + 1284 0040 13D1 bne .L115 + 1285 .L109: +5751:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 1286 .loc 1 5751 1 view .LVU382 + 1287 0042 02B0 add sp, sp, #8 + 1288 @ sp needed + 1289 .LVL116: + 1290 .LVL117: +5751:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 1291 .loc 1 5751 1 view .LVU383 + 1292 0044 70BD pop {r4, r5, r6, pc} + 1293 .LVL118: + 1294 .L110: +5732:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 1295 .loc 1 5732 5 is_stmt 1 view .LVU384 +5732:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 1296 .loc 1 5732 9 is_stmt 0 view .LVU385 + 1297 0046 2368 ldr r3, [r4] +5732:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 1298 .loc 1 5732 28 view .LVU386 + 1299 0048 2A0A lsrs r2, r5, #8 +5732:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 1300 .loc 1 5732 26 view .LVU387 + 1301 004a 9A62 str r2, [r3, #40] +5735:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { + 1302 .loc 1 5735 5 is_stmt 1 view .LVU388 +5735:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { + 1303 .loc 1 5735 9 is_stmt 0 view .LVU389 + 1304 004c 079A ldr r2, [sp, #28] + 1305 004e 0699 ldr r1, [sp, #24] + 1306 0050 2000 movs r0, r4 + 1307 0052 FFF7FEFF bl I2C_WaitOnTXISFlagUntilTimeout + 1308 .LVL119: +5735:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { + 1309 .loc 1 5735 8 discriminator 1 view .LVU390 + 1310 0056 0028 cmp r0, #0 + ARM GAS /tmp/ccuRhBPx.s page 156 + + + 1311 0058 05D1 bne .L113 +5741:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } + 1312 .loc 1 5741 5 is_stmt 1 view .LVU391 +5741:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } + 1313 .loc 1 5741 9 is_stmt 0 view .LVU392 + 1314 005a 2368 ldr r3, [r4] +5741:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } + 1315 .loc 1 5741 28 view .LVU393 + 1316 005c EDB2 uxtb r5, r5 +5741:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } + 1317 .loc 1 5741 26 view .LVU394 + 1318 005e 9D62 str r5, [r3, #40] + 1319 0060 E5E7 b .L111 + 1320 .L112: +5719:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } + 1321 .loc 1 5719 12 view .LVU395 + 1322 0062 0120 movs r0, #1 + 1323 0064 EDE7 b .L109 + 1324 .L113: +5737:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } + 1325 .loc 1 5737 14 view .LVU396 + 1326 0066 0120 movs r0, #1 + 1327 0068 EBE7 b .L109 + 1328 .L115: +5747:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } + 1329 .loc 1 5747 12 view .LVU397 + 1330 006a 0120 movs r0, #1 + 1331 006c E9E7 b .L109 + 1332 .L117: + 1333 006e C046 .align 2 + 1334 .L116: + 1335 0070 00200080 .word -2147475456 + 1336 .cfi_endproc + 1337 .LFE96: + 1339 .section .text.I2C_WaitOnSTOPFlagUntilTimeout,"ax",%progbits + 1340 .align 1 + 1341 .syntax unified + 1342 .code 16 + 1343 .thumb_func + 1345 I2C_WaitOnSTOPFlagUntilTimeout: + 1346 .LVL120: + 1347 .LFB114: +6810:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** while (__HAL_I2C_GET_FLAG(hi2c, I2C_FLAG_STOPF) == RESET) + 1348 .loc 1 6810 1 is_stmt 1 view -0 + 1349 .cfi_startproc + 1350 @ args = 0, pretend = 0, frame = 0 + 1351 @ frame_needed = 0, uses_anonymous_args = 0 +6810:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** while (__HAL_I2C_GET_FLAG(hi2c, I2C_FLAG_STOPF) == RESET) + 1352 .loc 1 6810 1 is_stmt 0 view .LVU399 + 1353 0000 70B5 push {r4, r5, r6, lr} + 1354 .cfi_def_cfa_offset 16 + 1355 .cfi_offset 4, -16 + 1356 .cfi_offset 5, -12 + 1357 .cfi_offset 6, -8 + 1358 .cfi_offset 14, -4 + 1359 0002 0400 movs r4, r0 + 1360 0004 0D00 movs r5, r1 + ARM GAS /tmp/ccuRhBPx.s page 157 + + + 1361 0006 1600 movs r6, r2 +6811:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { + 1362 .loc 1 6811 3 is_stmt 1 view .LVU400 +6811:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { + 1363 .loc 1 6811 9 is_stmt 0 view .LVU401 + 1364 0008 03E0 b .L119 + 1365 .LVL121: + 1366 .L121: +6822:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { + 1367 .loc 1 6822 7 is_stmt 1 view .LVU402 +6822:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { + 1368 .loc 1 6822 12 is_stmt 0 view .LVU403 + 1369 000a 2368 ldr r3, [r4] + 1370 000c 9B69 ldr r3, [r3, #24] +6822:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { + 1371 .loc 1 6822 10 view .LVU404 + 1372 000e 9B06 lsls r3, r3, #26 + 1373 0010 12D5 bpl .L125 + 1374 .L119: +6811:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { + 1375 .loc 1 6811 51 is_stmt 1 view .LVU405 +6811:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { + 1376 .loc 1 6811 10 is_stmt 0 view .LVU406 + 1377 0012 2368 ldr r3, [r4] + 1378 0014 9B69 ldr r3, [r3, #24] +6811:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { + 1379 .loc 1 6811 51 view .LVU407 + 1380 0016 9B06 lsls r3, r3, #26 + 1381 0018 1BD4 bmi .L126 +6814:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { + 1382 .loc 1 6814 5 is_stmt 1 view .LVU408 +6814:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { + 1383 .loc 1 6814 9 is_stmt 0 view .LVU409 + 1384 001a 3200 movs r2, r6 + 1385 001c 2900 movs r1, r5 + 1386 001e 2000 movs r0, r4 + 1387 0020 FFF7FEFF bl I2C_IsErrorOccurred + 1388 .LVL122: +6814:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { + 1389 .loc 1 6814 8 discriminator 1 view .LVU410 + 1390 0024 0028 cmp r0, #0 + 1391 0026 16D1 bne .L123 +6820:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { + 1392 .loc 1 6820 5 is_stmt 1 view .LVU411 +6820:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { + 1393 .loc 1 6820 11 is_stmt 0 view .LVU412 + 1394 0028 FFF7FEFF bl HAL_GetTick + 1395 .LVL123: +6820:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { + 1396 .loc 1 6820 25 discriminator 1 view .LVU413 + 1397 002c 801B subs r0, r0, r6 +6820:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { + 1398 .loc 1 6820 8 discriminator 1 view .LVU414 + 1399 002e A842 cmp r0, r5 + 1400 0030 EBD8 bhi .L121 +6820:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { + 1401 .loc 1 6820 49 discriminator 1 view .LVU415 + ARM GAS /tmp/ccuRhBPx.s page 158 + + + 1402 0032 002D cmp r5, #0 + 1403 0034 EDD1 bne .L119 + 1404 0036 E8E7 b .L121 + 1405 .L125: +6824:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->State = HAL_I2C_STATE_READY; + 1406 .loc 1 6824 9 is_stmt 1 view .LVU416 +6824:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->State = HAL_I2C_STATE_READY; + 1407 .loc 1 6824 13 is_stmt 0 view .LVU417 + 1408 0038 636C ldr r3, [r4, #68] +6824:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->State = HAL_I2C_STATE_READY; + 1409 .loc 1 6824 25 view .LVU418 + 1410 003a 2022 movs r2, #32 + 1411 003c 1343 orrs r3, r2 + 1412 003e 6364 str r3, [r4, #68] +6825:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->Mode = HAL_I2C_MODE_NONE; + 1413 .loc 1 6825 9 is_stmt 1 view .LVU419 +6825:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->Mode = HAL_I2C_MODE_NONE; + 1414 .loc 1 6825 21 is_stmt 0 view .LVU420 + 1415 0040 4123 movs r3, #65 + 1416 0042 E254 strb r2, [r4, r3] +6826:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 1417 .loc 1 6826 9 is_stmt 1 view .LVU421 +6826:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 1418 .loc 1 6826 20 is_stmt 0 view .LVU422 + 1419 0044 0023 movs r3, #0 + 1420 0046 2232 adds r2, r2, #34 + 1421 0048 A354 strb r3, [r4, r2] +6829:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 1422 .loc 1 6829 9 is_stmt 1 view .LVU423 +6829:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 1423 .loc 1 6829 9 view .LVU424 + 1424 004a 023A subs r2, r2, #2 + 1425 004c A354 strb r3, [r4, r2] +6829:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 1426 .loc 1 6829 9 view .LVU425 +6831:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } + 1427 .loc 1 6831 9 view .LVU426 +6831:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } + 1428 .loc 1 6831 16 is_stmt 0 view .LVU427 + 1429 004e 0120 movs r0, #1 + 1430 0050 00E0 b .L120 + 1431 .L126: +6835:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } + 1432 .loc 1 6835 10 view .LVU428 + 1433 0052 0020 movs r0, #0 + 1434 .L120: +6836:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 1435 .loc 1 6836 1 view .LVU429 + 1436 @ sp needed + 1437 .LVL124: + 1438 .LVL125: + 1439 .LVL126: +6836:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 1440 .loc 1 6836 1 view .LVU430 + 1441 0054 70BD pop {r4, r5, r6, pc} + 1442 .LVL127: + 1443 .L123: + ARM GAS /tmp/ccuRhBPx.s page 159 + + +6816:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } + 1444 .loc 1 6816 14 view .LVU431 + 1445 0056 0120 movs r0, #1 + 1446 0058 FCE7 b .L120 + 1447 .cfi_endproc + 1448 .LFE114: + 1450 .section .text.I2C_WaitOnRXNEFlagUntilTimeout,"ax",%progbits + 1451 .align 1 + 1452 .syntax unified + 1453 .code 16 + 1454 .thumb_func + 1456 I2C_WaitOnRXNEFlagUntilTimeout: + 1457 .LVL128: + 1458 .LFB115: +6848:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** while (__HAL_I2C_GET_FLAG(hi2c, I2C_FLAG_RXNE) == RESET) + 1459 .loc 1 6848 1 is_stmt 1 view -0 + 1460 .cfi_startproc + 1461 @ args = 0, pretend = 0, frame = 0 + 1462 @ frame_needed = 0, uses_anonymous_args = 0 +6848:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** while (__HAL_I2C_GET_FLAG(hi2c, I2C_FLAG_RXNE) == RESET) + 1463 .loc 1 6848 1 is_stmt 0 view .LVU433 + 1464 0000 70B5 push {r4, r5, r6, lr} + 1465 .cfi_def_cfa_offset 16 + 1466 .cfi_offset 4, -16 + 1467 .cfi_offset 5, -12 + 1468 .cfi_offset 6, -8 + 1469 .cfi_offset 14, -4 + 1470 0002 0400 movs r4, r0 + 1471 0004 0D00 movs r5, r1 + 1472 0006 1600 movs r6, r2 +6849:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { + 1473 .loc 1 6849 3 is_stmt 1 view .LVU434 +6849:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { + 1474 .loc 1 6849 9 is_stmt 0 view .LVU435 + 1475 0008 24E0 b .L128 + 1476 .LVL129: + 1477 .L141: +6862:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { + 1478 .loc 1 6862 7 is_stmt 1 view .LVU436 +6862:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { + 1479 .loc 1 6862 12 is_stmt 0 view .LVU437 + 1480 000a 9369 ldr r3, [r2, #24] +6862:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { + 1481 .loc 1 6862 10 view .LVU438 + 1482 000c 5B07 lsls r3, r3, #29 + 1483 000e 02D5 bpl .L131 +6862:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { + 1484 .loc 1 6862 68 discriminator 1 view .LVU439 + 1485 0010 238D ldrh r3, [r4, #40] +6862:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { + 1486 .loc 1 6862 60 discriminator 1 view .LVU440 + 1487 0012 002B cmp r3, #0 + 1488 0014 41D1 bne .L129 + 1489 .L131: +6870:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { + 1490 .loc 1 6870 9 is_stmt 1 view .LVU441 +6870:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { + ARM GAS /tmp/ccuRhBPx.s page 160 + + + 1491 .loc 1 6870 13 is_stmt 0 view .LVU442 + 1492 0016 9369 ldr r3, [r2, #24] +6870:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { + 1493 .loc 1 6870 12 view .LVU443 + 1494 0018 DB06 lsls r3, r3, #27 + 1495 001a 14D5 bpl .L132 +6872:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->ErrorCode = HAL_I2C_ERROR_AF; + 1496 .loc 1 6872 11 is_stmt 1 view .LVU444 + 1497 001c 1023 movs r3, #16 + 1498 001e D361 str r3, [r2, #28] +6873:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } + 1499 .loc 1 6873 11 view .LVU445 +6873:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } + 1500 .loc 1 6873 27 is_stmt 0 view .LVU446 + 1501 0020 0C3B subs r3, r3, #12 + 1502 0022 6364 str r3, [r4, #68] + 1503 .L133: +6881:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 1504 .loc 1 6881 9 is_stmt 1 view .LVU447 + 1505 0024 2368 ldr r3, [r4] + 1506 0026 2022 movs r2, #32 + 1507 0028 DA61 str r2, [r3, #28] +6884:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 1508 .loc 1 6884 9 view .LVU448 + 1509 002a 2168 ldr r1, [r4] + 1510 002c 4B68 ldr r3, [r1, #4] + 1511 002e 1C48 ldr r0, .L142 + 1512 0030 0340 ands r3, r0 + 1513 0032 4B60 str r3, [r1, #4] +6886:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->Mode = HAL_I2C_MODE_NONE; + 1514 .loc 1 6886 9 view .LVU449 +6886:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->Mode = HAL_I2C_MODE_NONE; + 1515 .loc 1 6886 21 is_stmt 0 view .LVU450 + 1516 0034 4123 movs r3, #65 + 1517 0036 E254 strb r2, [r4, r3] +6887:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 1518 .loc 1 6887 9 is_stmt 1 view .LVU451 +6887:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 1519 .loc 1 6887 20 is_stmt 0 view .LVU452 + 1520 0038 0023 movs r3, #0 + 1521 003a 2232 adds r2, r2, #34 + 1522 003c A354 strb r3, [r4, r2] +6890:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 1523 .loc 1 6890 9 is_stmt 1 view .LVU453 +6890:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 1524 .loc 1 6890 9 view .LVU454 + 1525 003e 023A subs r2, r2, #2 + 1526 0040 A354 strb r3, [r4, r2] +6890:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 1527 .loc 1 6890 9 view .LVU455 +6892:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } + 1528 .loc 1 6892 9 view .LVU456 +6892:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } + 1529 .loc 1 6892 16 is_stmt 0 view .LVU457 + 1530 0042 0120 movs r0, #1 + 1531 0044 29E0 b .L129 + 1532 .L132: + ARM GAS /tmp/ccuRhBPx.s page 161 + + +6877:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } + 1533 .loc 1 6877 11 is_stmt 1 view .LVU458 +6877:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } + 1534 .loc 1 6877 27 is_stmt 0 view .LVU459 + 1535 0046 0023 movs r3, #0 + 1536 0048 6364 str r3, [r4, #68] + 1537 004a EBE7 b .L133 + 1538 .L134: +6899:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { + 1539 .loc 1 6899 7 is_stmt 1 view .LVU460 +6899:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { + 1540 .loc 1 6899 12 is_stmt 0 view .LVU461 + 1541 004c 2368 ldr r3, [r4] + 1542 004e 9B69 ldr r3, [r3, #24] +6899:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { + 1543 .loc 1 6899 10 view .LVU462 + 1544 0050 5B07 lsls r3, r3, #29 + 1545 0052 16D5 bpl .L139 + 1546 .L128: +6849:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { + 1547 .loc 1 6849 50 is_stmt 1 view .LVU463 +6849:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { + 1548 .loc 1 6849 10 is_stmt 0 view .LVU464 + 1549 0054 2368 ldr r3, [r4] + 1550 0056 9B69 ldr r3, [r3, #24] +6849:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { + 1551 .loc 1 6849 50 view .LVU465 + 1552 0058 5B07 lsls r3, r3, #29 + 1553 005a 1DD4 bmi .L140 +6852:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { + 1554 .loc 1 6852 5 is_stmt 1 view .LVU466 +6852:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { + 1555 .loc 1 6852 9 is_stmt 0 view .LVU467 + 1556 005c 3200 movs r2, r6 + 1557 005e 2900 movs r1, r5 + 1558 0060 2000 movs r0, r4 + 1559 0062 FFF7FEFF bl I2C_IsErrorOccurred + 1560 .LVL130: +6852:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { + 1561 .loc 1 6852 8 discriminator 1 view .LVU468 + 1562 0066 0028 cmp r0, #0 + 1563 0068 18D1 bne .L136 +6858:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { + 1564 .loc 1 6858 5 is_stmt 1 view .LVU469 +6858:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { + 1565 .loc 1 6858 9 is_stmt 0 view .LVU470 + 1566 006a 2268 ldr r2, [r4] + 1567 006c 9369 ldr r3, [r2, #24] +6858:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { + 1568 .loc 1 6858 8 view .LVU471 + 1569 006e 9B06 lsls r3, r3, #26 + 1570 0070 CBD4 bmi .L141 +6897:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { + 1571 .loc 1 6897 5 is_stmt 1 view .LVU472 +6897:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { + 1572 .loc 1 6897 11 is_stmt 0 view .LVU473 + 1573 0072 FFF7FEFF bl HAL_GetTick + ARM GAS /tmp/ccuRhBPx.s page 162 + + + 1574 .LVL131: +6897:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { + 1575 .loc 1 6897 25 discriminator 1 view .LVU474 + 1576 0076 801B subs r0, r0, r6 +6897:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { + 1577 .loc 1 6897 8 discriminator 1 view .LVU475 + 1578 0078 A842 cmp r0, r5 + 1579 007a E7D8 bhi .L134 +6897:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { + 1580 .loc 1 6897 49 discriminator 1 view .LVU476 + 1581 007c 002D cmp r5, #0 + 1582 007e E9D1 bne .L128 + 1583 0080 E4E7 b .L134 + 1584 .L139: +6901:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->State = HAL_I2C_STATE_READY; + 1585 .loc 1 6901 9 is_stmt 1 view .LVU477 +6901:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->State = HAL_I2C_STATE_READY; + 1586 .loc 1 6901 13 is_stmt 0 view .LVU478 + 1587 0082 636C ldr r3, [r4, #68] +6901:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->State = HAL_I2C_STATE_READY; + 1588 .loc 1 6901 25 view .LVU479 + 1589 0084 2022 movs r2, #32 + 1590 0086 1343 orrs r3, r2 + 1591 0088 6364 str r3, [r4, #68] +6902:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 1592 .loc 1 6902 9 is_stmt 1 view .LVU480 +6902:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 1593 .loc 1 6902 21 is_stmt 0 view .LVU481 + 1594 008a 4123 movs r3, #65 + 1595 008c E254 strb r2, [r4, r3] +6905:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 1596 .loc 1 6905 9 is_stmt 1 view .LVU482 +6905:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 1597 .loc 1 6905 9 view .LVU483 + 1598 008e 013B subs r3, r3, #1 + 1599 0090 0022 movs r2, #0 + 1600 0092 E254 strb r2, [r4, r3] +6905:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 1601 .loc 1 6905 9 view .LVU484 +6907:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } + 1602 .loc 1 6907 9 view .LVU485 +6907:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } + 1603 .loc 1 6907 16 is_stmt 0 view .LVU486 + 1604 0094 0120 movs r0, #1 + 1605 0096 00E0 b .L129 + 1606 .L140: +6911:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } + 1607 .loc 1 6911 10 view .LVU487 + 1608 0098 0020 movs r0, #0 + 1609 .L129: +6912:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 1610 .loc 1 6912 1 view .LVU488 + 1611 @ sp needed + 1612 .LVL132: + 1613 .LVL133: + 1614 .LVL134: +6912:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + ARM GAS /tmp/ccuRhBPx.s page 163 + + + 1615 .loc 1 6912 1 view .LVU489 + 1616 009a 70BD pop {r4, r5, r6, pc} + 1617 .LVL135: + 1618 .L136: +6854:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } + 1619 .loc 1 6854 14 view .LVU490 + 1620 009c 0120 movs r0, #1 + 1621 009e FCE7 b .L129 + 1622 .L143: + 1623 .align 2 + 1624 .L142: + 1625 00a0 00E800FE .word -33495040 + 1626 .cfi_endproc + 1627 .LFE115: + 1629 .section .text.HAL_I2C_MspInit,"ax",%progbits + 1630 .align 1 + 1631 .weak HAL_I2C_MspInit + 1632 .syntax unified + 1633 .code 16 + 1634 .thumb_func + 1636 HAL_I2C_MspInit: + 1637 .LVL136: + 1638 .LFB42: + 692:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* Prevent unused argument(s) compilation warning */ + 1639 .loc 1 692 1 is_stmt 1 view -0 + 1640 .cfi_startproc + 1641 @ args = 0, pretend = 0, frame = 0 + 1642 @ frame_needed = 0, uses_anonymous_args = 0 + 1643 @ link register save eliminated. + 694:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 1644 .loc 1 694 3 view .LVU492 + 699:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 1645 .loc 1 699 1 is_stmt 0 view .LVU493 + 1646 @ sp needed + 1647 0000 7047 bx lr + 1648 .cfi_endproc + 1649 .LFE42: + 1651 .section .text.HAL_I2C_Init,"ax",%progbits + 1652 .align 1 + 1653 .global HAL_I2C_Init + 1654 .syntax unified + 1655 .code 16 + 1656 .thumb_func + 1658 HAL_I2C_Init: + 1659 .LVL137: + 1660 .LFB40: + 536:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* Check the I2C handle allocation */ + 1661 .loc 1 536 1 is_stmt 1 view -0 + 1662 .cfi_startproc + 1663 @ args = 0, pretend = 0, frame = 0 + 1664 @ frame_needed = 0, uses_anonymous_args = 0 + 536:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* Check the I2C handle allocation */ + 1665 .loc 1 536 1 is_stmt 0 view .LVU495 + 1666 0000 10B5 push {r4, lr} + 1667 .cfi_def_cfa_offset 8 + 1668 .cfi_offset 4, -8 + 1669 .cfi_offset 14, -4 + ARM GAS /tmp/ccuRhBPx.s page 164 + + + 1670 0002 041E subs r4, r0, #0 + 538:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { + 1671 .loc 1 538 3 is_stmt 1 view .LVU496 + 538:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { + 1672 .loc 1 538 6 is_stmt 0 view .LVU497 + 1673 0004 59D0 beq .L151 + 544:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** assert_param(IS_I2C_OWN_ADDRESS1(hi2c->Init.OwnAddress1)); + 1674 .loc 1 544 3 is_stmt 1 view .LVU498 + 545:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** assert_param(IS_I2C_ADDRESSING_MODE(hi2c->Init.AddressingMode)); + 1675 .loc 1 545 3 view .LVU499 + 546:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** assert_param(IS_I2C_DUAL_ADDRESS(hi2c->Init.DualAddressMode)); + 1676 .loc 1 546 3 view .LVU500 + 547:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** assert_param(IS_I2C_OWN_ADDRESS2(hi2c->Init.OwnAddress2)); + 1677 .loc 1 547 3 view .LVU501 + 548:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** assert_param(IS_I2C_OWN_ADDRESS2_MASK(hi2c->Init.OwnAddress2Masks)); + 1678 .loc 1 548 3 view .LVU502 + 549:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** assert_param(IS_I2C_GENERAL_CALL(hi2c->Init.GeneralCallMode)); + 1679 .loc 1 549 3 view .LVU503 + 550:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** assert_param(IS_I2C_NO_STRETCH(hi2c->Init.NoStretchMode)); + 1680 .loc 1 550 3 view .LVU504 + 551:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 1681 .loc 1 551 3 view .LVU505 + 553:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { + 1682 .loc 1 553 3 view .LVU506 + 553:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { + 1683 .loc 1 553 11 is_stmt 0 view .LVU507 + 1684 0006 4123 movs r3, #65 + 1685 0008 C35C ldrb r3, [r0, r3] + 553:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { + 1686 .loc 1 553 6 view .LVU508 + 1687 000a 002B cmp r3, #0 + 1688 000c 43D0 beq .L152 + 1689 .LVL138: + 1690 .L147: + 584:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 1691 .loc 1 584 3 is_stmt 1 view .LVU509 + 584:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 1692 .loc 1 584 15 is_stmt 0 view .LVU510 + 1693 000e 4123 movs r3, #65 + 1694 0010 2422 movs r2, #36 + 1695 0012 E254 strb r2, [r4, r3] + 587:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 1696 .loc 1 587 3 is_stmt 1 view .LVU511 + 1697 0014 2268 ldr r2, [r4] + 1698 0016 1368 ldr r3, [r2] + 1699 0018 0121 movs r1, #1 + 1700 001a 8B43 bics r3, r1 + 1701 001c 1360 str r3, [r2] + 591:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 1702 .loc 1 591 3 view .LVU512 + 591:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 1703 .loc 1 591 39 is_stmt 0 view .LVU513 + 1704 001e 6368 ldr r3, [r4, #4] + 591:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 1705 .loc 1 591 7 view .LVU514 + 1706 0020 2268 ldr r2, [r4] + 591:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + ARM GAS /tmp/ccuRhBPx.s page 165 + + + 1707 .loc 1 591 47 view .LVU515 + 1708 0022 2749 ldr r1, .L155 + 1709 0024 0B40 ands r3, r1 + 591:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 1710 .loc 1 591 27 view .LVU516 + 1711 0026 1361 str r3, [r2, #16] + 595:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 1712 .loc 1 595 3 is_stmt 1 view .LVU517 + 595:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 1713 .loc 1 595 7 is_stmt 0 view .LVU518 + 1714 0028 2268 ldr r2, [r4] + 595:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 1715 .loc 1 595 17 view .LVU519 + 1716 002a 9368 ldr r3, [r2, #8] + 595:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 1717 .loc 1 595 24 view .LVU520 + 1718 002c 2549 ldr r1, .L155+4 + 1719 002e 0B40 ands r3, r1 + 1720 0030 9360 str r3, [r2, #8] + 598:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { + 1721 .loc 1 598 3 is_stmt 1 view .LVU521 + 598:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { + 1722 .loc 1 598 17 is_stmt 0 view .LVU522 + 1723 0032 E368 ldr r3, [r4, #12] + 598:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { + 1724 .loc 1 598 6 view .LVU523 + 1725 0034 012B cmp r3, #1 + 1726 0036 34D0 beq .L153 + 604:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } + 1727 .loc 1 604 5 is_stmt 1 view .LVU524 + 604:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } + 1728 .loc 1 604 75 is_stmt 0 view .LVU525 + 1729 0038 A168 ldr r1, [r4, #8] + 604:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } + 1730 .loc 1 604 9 view .LVU526 + 1731 003a 2268 ldr r2, [r4] + 604:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } + 1732 .loc 1 604 63 view .LVU527 + 1733 003c 8423 movs r3, #132 + 1734 003e 1B02 lsls r3, r3, #8 + 1735 0040 0B43 orrs r3, r1 + 604:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } + 1736 .loc 1 604 26 view .LVU528 + 1737 0042 9360 str r3, [r2, #8] + 1738 .L149: + 609:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { + 1739 .loc 1 609 3 is_stmt 1 view .LVU529 + 609:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { + 1740 .loc 1 609 17 is_stmt 0 view .LVU530 + 1741 0044 E368 ldr r3, [r4, #12] + 609:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { + 1742 .loc 1 609 6 view .LVU531 + 1743 0046 022B cmp r3, #2 + 1744 0048 32D0 beq .L154 + 1745 .L150: + 614:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 1746 .loc 1 614 3 is_stmt 1 view .LVU532 + ARM GAS /tmp/ccuRhBPx.s page 166 + + + 614:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 1747 .loc 1 614 7 is_stmt 0 view .LVU533 + 1748 004a 2268 ldr r2, [r4] + 614:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 1749 .loc 1 614 17 view .LVU534 + 1750 004c 5168 ldr r1, [r2, #4] + 614:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 1751 .loc 1 614 23 view .LVU535 + 1752 004e 1E4B ldr r3, .L155+8 + 1753 0050 0B43 orrs r3, r1 + 1754 0052 5360 str r3, [r2, #4] + 618:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 1755 .loc 1 618 3 is_stmt 1 view .LVU536 + 618:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 1756 .loc 1 618 7 is_stmt 0 view .LVU537 + 1757 0054 2268 ldr r2, [r4] + 618:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 1758 .loc 1 618 17 view .LVU538 + 1759 0056 D368 ldr r3, [r2, #12] + 618:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 1760 .loc 1 618 24 view .LVU539 + 1761 0058 1A49 ldr r1, .L155+4 + 1762 005a 0B40 ands r3, r1 + 1763 005c D360 str r3, [r2, #12] + 621:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** (hi2c->Init.OwnAddress2Masks << 8)); + 1764 .loc 1 621 3 is_stmt 1 view .LVU540 + 621:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** (hi2c->Init.OwnAddress2Masks << 8)); + 1765 .loc 1 621 37 is_stmt 0 view .LVU541 + 1766 005e 2369 ldr r3, [r4, #16] + 621:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** (hi2c->Init.OwnAddress2Masks << 8)); + 1767 .loc 1 621 66 view .LVU542 + 1768 0060 6269 ldr r2, [r4, #20] + 621:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** (hi2c->Init.OwnAddress2Masks << 8)); + 1769 .loc 1 621 54 view .LVU543 + 1770 0062 1343 orrs r3, r2 + 622:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 1771 .loc 1 622 38 view .LVU544 + 1772 0064 A269 ldr r2, [r4, #24] + 622:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 1773 .loc 1 622 56 view .LVU545 + 1774 0066 1202 lsls r2, r2, #8 + 621:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** (hi2c->Init.OwnAddress2Masks << 8)); + 1775 .loc 1 621 7 view .LVU546 + 1776 0068 2168 ldr r1, [r4] + 621:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** (hi2c->Init.OwnAddress2Masks << 8)); + 1777 .loc 1 621 79 view .LVU547 + 1778 006a 1343 orrs r3, r2 + 621:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** (hi2c->Init.OwnAddress2Masks << 8)); + 1779 .loc 1 621 24 view .LVU548 + 1780 006c CB60 str r3, [r1, #12] + 626:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 1781 .loc 1 626 3 is_stmt 1 view .LVU549 + 626:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 1782 .loc 1 626 36 is_stmt 0 view .LVU550 + 1783 006e E369 ldr r3, [r4, #28] + 626:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 1784 .loc 1 626 65 view .LVU551 + ARM GAS /tmp/ccuRhBPx.s page 167 + + + 1785 0070 216A ldr r1, [r4, #32] + 626:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 1786 .loc 1 626 7 view .LVU552 + 1787 0072 2268 ldr r2, [r4] + 626:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 1788 .loc 1 626 53 view .LVU553 + 1789 0074 0B43 orrs r3, r1 + 626:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 1790 .loc 1 626 23 view .LVU554 + 1791 0076 1360 str r3, [r2] + 629:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 1792 .loc 1 629 3 is_stmt 1 view .LVU555 + 1793 0078 2268 ldr r2, [r4] + 1794 007a 1368 ldr r3, [r2] + 1795 007c 0121 movs r1, #1 + 1796 007e 0B43 orrs r3, r1 + 1797 0080 1360 str r3, [r2] + 631:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->State = HAL_I2C_STATE_READY; + 1798 .loc 1 631 3 view .LVU556 + 631:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->State = HAL_I2C_STATE_READY; + 1799 .loc 1 631 19 is_stmt 0 view .LVU557 + 1800 0082 0023 movs r3, #0 + 1801 0084 6364 str r3, [r4, #68] + 632:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->PreviousState = I2C_STATE_NONE; + 1802 .loc 1 632 3 is_stmt 1 view .LVU558 + 632:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->PreviousState = I2C_STATE_NONE; + 1803 .loc 1 632 15 is_stmt 0 view .LVU559 + 1804 0086 4122 movs r2, #65 + 1805 0088 1F31 adds r1, r1, #31 + 1806 008a A154 strb r1, [r4, r2] + 633:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->Mode = HAL_I2C_MODE_NONE; + 1807 .loc 1 633 3 is_stmt 1 view .LVU560 + 633:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->Mode = HAL_I2C_MODE_NONE; + 1808 .loc 1 633 23 is_stmt 0 view .LVU561 + 1809 008c 2363 str r3, [r4, #48] + 634:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 1810 .loc 1 634 3 is_stmt 1 view .LVU562 + 634:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 1811 .loc 1 634 14 is_stmt 0 view .LVU563 + 1812 008e 0132 adds r2, r2, #1 + 1813 0090 A354 strb r3, [r4, r2] + 636:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } + 1814 .loc 1 636 3 is_stmt 1 view .LVU564 + 636:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } + 1815 .loc 1 636 10 is_stmt 0 view .LVU565 + 1816 0092 0020 movs r0, #0 + 1817 .L146: + 637:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 1818 .loc 1 637 1 view .LVU566 + 1819 @ sp needed + 1820 .LVL139: + 637:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 1821 .loc 1 637 1 view .LVU567 + 1822 0094 10BD pop {r4, pc} + 1823 .LVL140: + 1824 .L152: + 556:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + ARM GAS /tmp/ccuRhBPx.s page 168 + + + 1825 .loc 1 556 5 is_stmt 1 view .LVU568 + 556:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 1826 .loc 1 556 16 is_stmt 0 view .LVU569 + 1827 0096 4033 adds r3, r3, #64 + 1828 0098 0022 movs r2, #0 + 1829 009a C254 strb r2, [r0, r3] + 580:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** #endif /* USE_HAL_I2C_REGISTER_CALLBACKS */ + 1830 .loc 1 580 5 is_stmt 1 view .LVU570 + 1831 009c FFF7FEFF bl HAL_I2C_MspInit + 1832 .LVL141: + 580:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** #endif /* USE_HAL_I2C_REGISTER_CALLBACKS */ + 1833 .loc 1 580 5 is_stmt 0 view .LVU571 + 1834 00a0 B5E7 b .L147 + 1835 .L153: + 600:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } + 1836 .loc 1 600 5 is_stmt 1 view .LVU572 + 600:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } + 1837 .loc 1 600 56 is_stmt 0 view .LVU573 + 1838 00a2 A168 ldr r1, [r4, #8] + 600:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } + 1839 .loc 1 600 9 view .LVU574 + 1840 00a4 2268 ldr r2, [r4] + 600:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } + 1841 .loc 1 600 44 view .LVU575 + 1842 00a6 8023 movs r3, #128 + 1843 00a8 1B02 lsls r3, r3, #8 + 1844 00aa 0B43 orrs r3, r1 + 600:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } + 1845 .loc 1 600 26 view .LVU576 + 1846 00ac 9360 str r3, [r2, #8] + 1847 00ae C9E7 b .L149 + 1848 .L154: + 611:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } + 1849 .loc 1 611 5 is_stmt 1 view .LVU577 + 611:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } + 1850 .loc 1 611 9 is_stmt 0 view .LVU578 + 1851 00b0 2368 ldr r3, [r4] + 611:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } + 1852 .loc 1 611 25 view .LVU579 + 1853 00b2 8022 movs r2, #128 + 1854 00b4 1201 lsls r2, r2, #4 + 1855 00b6 5A60 str r2, [r3, #4] + 1856 00b8 C7E7 b .L150 + 1857 .LVL142: + 1858 .L151: + 540:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } + 1859 .loc 1 540 12 view .LVU580 + 1860 00ba 0120 movs r0, #1 + 1861 .LVL143: + 540:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } + 1862 .loc 1 540 12 view .LVU581 + 1863 00bc EAE7 b .L146 + 1864 .L156: + 1865 00be C046 .align 2 + 1866 .L155: + 1867 00c0 FFFFFFF0 .word -251658241 + 1868 00c4 FF7FFFFF .word -32769 + ARM GAS /tmp/ccuRhBPx.s page 169 + + + 1869 00c8 00800002 .word 33587200 + 1870 .cfi_endproc + 1871 .LFE40: + 1873 .section .text.HAL_I2C_MspDeInit,"ax",%progbits + 1874 .align 1 + 1875 .weak HAL_I2C_MspDeInit + 1876 .syntax unified + 1877 .code 16 + 1878 .thumb_func + 1880 HAL_I2C_MspDeInit: + 1881 .LVL144: + 1882 .LFB43: + 708:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* Prevent unused argument(s) compilation warning */ + 1883 .loc 1 708 1 is_stmt 1 view -0 + 1884 .cfi_startproc + 1885 @ args = 0, pretend = 0, frame = 0 + 1886 @ frame_needed = 0, uses_anonymous_args = 0 + 1887 @ link register save eliminated. + 710:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 1888 .loc 1 710 3 view .LVU583 + 715:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 1889 .loc 1 715 1 is_stmt 0 view .LVU584 + 1890 @ sp needed + 1891 0000 7047 bx lr + 1892 .cfi_endproc + 1893 .LFE43: + 1895 .section .text.HAL_I2C_DeInit,"ax",%progbits + 1896 .align 1 + 1897 .global HAL_I2C_DeInit + 1898 .syntax unified + 1899 .code 16 + 1900 .thumb_func + 1902 HAL_I2C_DeInit: + 1903 .LVL145: + 1904 .LFB41: + 646:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* Check the I2C handle allocation */ + 1905 .loc 1 646 1 is_stmt 1 view -0 + 1906 .cfi_startproc + 1907 @ args = 0, pretend = 0, frame = 0 + 1908 @ frame_needed = 0, uses_anonymous_args = 0 + 646:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* Check the I2C handle allocation */ + 1909 .loc 1 646 1 is_stmt 0 view .LVU586 + 1910 0000 70B5 push {r4, r5, r6, lr} + 1911 .cfi_def_cfa_offset 16 + 1912 .cfi_offset 4, -16 + 1913 .cfi_offset 5, -12 + 1914 .cfi_offset 6, -8 + 1915 .cfi_offset 14, -4 + 1916 0002 041E subs r4, r0, #0 + 648:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { + 1917 .loc 1 648 3 is_stmt 1 view .LVU587 + 648:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { + 1918 .loc 1 648 6 is_stmt 0 view .LVU588 + 1919 0004 13D0 beq .L160 + 654:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 1920 .loc 1 654 3 is_stmt 1 view .LVU589 + 656:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + ARM GAS /tmp/ccuRhBPx.s page 170 + + + 1921 .loc 1 656 3 view .LVU590 + 656:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 1922 .loc 1 656 15 is_stmt 0 view .LVU591 + 1923 0006 4125 movs r5, #65 + 1924 0008 2423 movs r3, #36 + 1925 000a 4355 strb r3, [r0, r5] + 659:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 1926 .loc 1 659 3 is_stmt 1 view .LVU592 + 1927 000c 0268 ldr r2, [r0] + 1928 000e 1368 ldr r3, [r2] + 1929 0010 0121 movs r1, #1 + 1930 0012 8B43 bics r3, r1 + 1931 0014 1360 str r3, [r2] + 671:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** #endif /* USE_HAL_I2C_REGISTER_CALLBACKS */ + 1932 .loc 1 671 3 view .LVU593 + 1933 0016 FFF7FEFF bl HAL_I2C_MspDeInit + 1934 .LVL146: + 674:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->State = HAL_I2C_STATE_RESET; + 1935 .loc 1 674 3 view .LVU594 + 674:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->State = HAL_I2C_STATE_RESET; + 1936 .loc 1 674 19 is_stmt 0 view .LVU595 + 1937 001a 0023 movs r3, #0 + 1938 001c 6364 str r3, [r4, #68] + 675:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->PreviousState = I2C_STATE_NONE; + 1939 .loc 1 675 3 is_stmt 1 view .LVU596 + 675:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->PreviousState = I2C_STATE_NONE; + 1940 .loc 1 675 15 is_stmt 0 view .LVU597 + 1941 001e 6355 strb r3, [r4, r5] + 676:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->Mode = HAL_I2C_MODE_NONE; + 1942 .loc 1 676 3 is_stmt 1 view .LVU598 + 676:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->Mode = HAL_I2C_MODE_NONE; + 1943 .loc 1 676 23 is_stmt 0 view .LVU599 + 1944 0020 2363 str r3, [r4, #48] + 677:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 1945 .loc 1 677 3 is_stmt 1 view .LVU600 + 677:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 1946 .loc 1 677 14 is_stmt 0 view .LVU601 + 1947 0022 4222 movs r2, #66 + 1948 0024 A354 strb r3, [r4, r2] + 680:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 1949 .loc 1 680 3 is_stmt 1 view .LVU602 + 680:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 1950 .loc 1 680 3 view .LVU603 + 1951 0026 023A subs r2, r2, #2 + 1952 0028 A354 strb r3, [r4, r2] + 680:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 1953 .loc 1 680 3 view .LVU604 + 682:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } + 1954 .loc 1 682 3 view .LVU605 + 682:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } + 1955 .loc 1 682 10 is_stmt 0 view .LVU606 + 1956 002a 0020 movs r0, #0 + 1957 .L159: + 683:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 1958 .loc 1 683 1 view .LVU607 + 1959 @ sp needed + 1960 .LVL147: + ARM GAS /tmp/ccuRhBPx.s page 171 + + + 683:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 1961 .loc 1 683 1 view .LVU608 + 1962 002c 70BD pop {r4, r5, r6, pc} + 1963 .LVL148: + 1964 .L160: + 650:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } + 1965 .loc 1 650 12 view .LVU609 + 1966 002e 0120 movs r0, #1 + 1967 .LVL149: + 650:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } + 1968 .loc 1 650 12 view .LVU610 + 1969 0030 FCE7 b .L159 + 1970 .cfi_endproc + 1971 .LFE41: + 1973 .section .text.HAL_I2C_Master_Transmit,"ax",%progbits + 1974 .align 1 + 1975 .global HAL_I2C_Master_Transmit + 1976 .syntax unified + 1977 .code 16 + 1978 .thumb_func + 1980 HAL_I2C_Master_Transmit: + 1981 .LVL150: + 1982 .LFB44: +1116:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** uint32_t tickstart; + 1983 .loc 1 1116 1 is_stmt 1 view -0 + 1984 .cfi_startproc + 1985 @ args = 4, pretend = 0, frame = 8 + 1986 @ frame_needed = 0, uses_anonymous_args = 0 +1116:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** uint32_t tickstart; + 1987 .loc 1 1116 1 is_stmt 0 view .LVU612 + 1988 0000 F0B5 push {r4, r5, r6, r7, lr} + 1989 .cfi_def_cfa_offset 20 + 1990 .cfi_offset 4, -20 + 1991 .cfi_offset 5, -16 + 1992 .cfi_offset 6, -12 + 1993 .cfi_offset 7, -8 + 1994 .cfi_offset 14, -4 + 1995 0002 85B0 sub sp, sp, #20 + 1996 .cfi_def_cfa_offset 40 + 1997 0004 0400 movs r4, r0 + 1998 0006 0F00 movs r7, r1 + 1999 0008 0292 str r2, [sp, #8] + 2000 000a 0393 str r3, [sp, #12] + 2001 000c 0A9D ldr r5, [sp, #40] +1117:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 2002 .loc 1 1117 3 is_stmt 1 view .LVU613 +1119:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { + 2003 .loc 1 1119 3 view .LVU614 +1119:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { + 2004 .loc 1 1119 11 is_stmt 0 view .LVU615 + 2005 000e 4123 movs r3, #65 + 2006 .LVL151: +1119:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { + 2007 .loc 1 1119 11 view .LVU616 + 2008 0010 C35C ldrb r3, [r0, r3] +1119:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { + 2009 .loc 1 1119 6 view .LVU617 + ARM GAS /tmp/ccuRhBPx.s page 172 + + + 2010 0012 202B cmp r3, #32 + 2011 0014 00D0 beq .LCB1939 + 2012 0016 9BE0 b .L169 @long jump + 2013 .LCB1939: +1122:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 2014 .loc 1 1122 5 is_stmt 1 view .LVU618 +1122:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 2015 .loc 1 1122 5 view .LVU619 + 2016 0018 2033 adds r3, r3, #32 + 2017 001a C35C ldrb r3, [r0, r3] + 2018 001c 012B cmp r3, #1 + 2019 001e 00D1 bne .LCB1945 + 2020 0020 99E0 b .L170 @long jump + 2021 .LCB1945: +1122:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 2022 .loc 1 1122 5 discriminator 2 view .LVU620 + 2023 0022 4023 movs r3, #64 + 2024 0024 0122 movs r2, #1 + 2025 .LVL152: +1122:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 2026 .loc 1 1122 5 is_stmt 0 discriminator 2 view .LVU621 + 2027 0026 C254 strb r2, [r0, r3] +1122:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 2028 .loc 1 1122 5 is_stmt 1 discriminator 2 view .LVU622 +1125:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 2029 .loc 1 1125 5 view .LVU623 +1125:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 2030 .loc 1 1125 17 is_stmt 0 view .LVU624 + 2031 0028 FFF7FEFF bl HAL_GetTick + 2032 .LVL153: +1125:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 2033 .loc 1 1125 17 view .LVU625 + 2034 002c 0600 movs r6, r0 + 2035 .LVL154: +1127:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { + 2036 .loc 1 1127 5 is_stmt 1 view .LVU626 +1127:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { + 2037 .loc 1 1127 9 is_stmt 0 view .LVU627 + 2038 002e 8021 movs r1, #128 + 2039 0030 0090 str r0, [sp] + 2040 0032 1923 movs r3, #25 + 2041 0034 0122 movs r2, #1 + 2042 0036 0902 lsls r1, r1, #8 + 2043 0038 2000 movs r0, r4 + 2044 .LVL155: +1127:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { + 2045 .loc 1 1127 9 view .LVU628 + 2046 003a FFF7FEFF bl I2C_WaitOnFlagUntilTimeout + 2047 .LVL156: +1127:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { + 2048 .loc 1 1127 8 discriminator 1 view .LVU629 + 2049 003e 0028 cmp r0, #0 + 2050 0040 00D0 beq .LCB1969 + 2051 0042 8AE0 b .L171 @long jump + 2052 .LCB1969: +1132:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->Mode = HAL_I2C_MODE_MASTER; + 2053 .loc 1 1132 5 is_stmt 1 view .LVU630 + ARM GAS /tmp/ccuRhBPx.s page 173 + + +1132:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->Mode = HAL_I2C_MODE_MASTER; + 2054 .loc 1 1132 21 is_stmt 0 view .LVU631 + 2055 0044 4123 movs r3, #65 + 2056 0046 2122 movs r2, #33 + 2057 0048 E254 strb r2, [r4, r3] +1133:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->ErrorCode = HAL_I2C_ERROR_NONE; + 2058 .loc 1 1133 5 is_stmt 1 view .LVU632 +1133:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->ErrorCode = HAL_I2C_ERROR_NONE; + 2059 .loc 1 1133 21 is_stmt 0 view .LVU633 + 2060 004a 0133 adds r3, r3, #1 + 2061 004c 113A subs r2, r2, #17 + 2062 004e E254 strb r2, [r4, r3] +1134:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 2063 .loc 1 1134 5 is_stmt 1 view .LVU634 +1134:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 2064 .loc 1 1134 21 is_stmt 0 view .LVU635 + 2065 0050 0023 movs r3, #0 + 2066 0052 6364 str r3, [r4, #68] +1137:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->XferCount = Size; + 2067 .loc 1 1137 5 is_stmt 1 view .LVU636 +1137:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->XferCount = Size; + 2068 .loc 1 1137 21 is_stmt 0 view .LVU637 + 2069 0054 029A ldr r2, [sp, #8] + 2070 0056 6262 str r2, [r4, #36] +1138:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->XferISR = NULL; + 2071 .loc 1 1138 5 is_stmt 1 view .LVU638 +1138:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->XferISR = NULL; + 2072 .loc 1 1138 21 is_stmt 0 view .LVU639 + 2073 0058 039A ldr r2, [sp, #12] + 2074 005a 6285 strh r2, [r4, #42] +1139:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 2075 .loc 1 1139 5 is_stmt 1 view .LVU640 +1139:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 2076 .loc 1 1139 21 is_stmt 0 view .LVU641 + 2077 005c 6363 str r3, [r4, #52] +1143:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { + 2078 .loc 1 1143 5 is_stmt 1 view .LVU642 +1143:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { + 2079 .loc 1 1143 13 is_stmt 0 view .LVU643 + 2080 005e 638D ldrh r3, [r4, #42] + 2081 0060 9BB2 uxth r3, r3 +1143:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { + 2082 .loc 1 1143 8 view .LVU644 + 2083 0062 FF2B cmp r3, #255 + 2084 0064 0BD9 bls .L163 +1145:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** I2C_TransferConfig(hi2c, DevAddress, (uint8_t)hi2c->XferSize, I2C_RELOAD_MODE, + 2085 .loc 1 1145 7 is_stmt 1 view .LVU645 +1145:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** I2C_TransferConfig(hi2c, DevAddress, (uint8_t)hi2c->XferSize, I2C_RELOAD_MODE, + 2086 .loc 1 1145 22 is_stmt 0 view .LVU646 + 2087 0066 FF23 movs r3, #255 + 2088 0068 2385 strh r3, [r4, #40] +1146:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** I2C_GENERATE_START_WRITE); + 2089 .loc 1 1146 7 is_stmt 1 view .LVU647 + 2090 006a 7F3B subs r3, r3, #127 + 2091 006c 3F4A ldr r2, .L176 + 2092 006e 0092 str r2, [sp] + 2093 0070 5B04 lsls r3, r3, #17 + ARM GAS /tmp/ccuRhBPx.s page 174 + + + 2094 0072 FF22 movs r2, #255 + 2095 0074 3900 movs r1, r7 + 2096 0076 2000 movs r0, r4 + 2097 0078 FFF7FEFF bl I2C_TransferConfig + 2098 .LVL157: + 2099 007c 18E0 b .L165 + 2100 .L163: +1151:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** I2C_TransferConfig(hi2c, DevAddress, (uint8_t)hi2c->XferSize, I2C_AUTOEND_MODE, + 2101 .loc 1 1151 7 view .LVU648 +1151:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** I2C_TransferConfig(hi2c, DevAddress, (uint8_t)hi2c->XferSize, I2C_AUTOEND_MODE, + 2102 .loc 1 1151 28 is_stmt 0 view .LVU649 + 2103 007e 628D ldrh r2, [r4, #42] + 2104 0080 92B2 uxth r2, r2 +1151:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** I2C_TransferConfig(hi2c, DevAddress, (uint8_t)hi2c->XferSize, I2C_AUTOEND_MODE, + 2105 .loc 1 1151 22 view .LVU650 + 2106 0082 2285 strh r2, [r4, #40] +1152:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** I2C_GENERATE_START_WRITE); + 2107 .loc 1 1152 7 is_stmt 1 view .LVU651 + 2108 0084 8023 movs r3, #128 + 2109 0086 D2B2 uxtb r2, r2 + 2110 0088 3849 ldr r1, .L176 + 2111 008a 0091 str r1, [sp] + 2112 008c 9B04 lsls r3, r3, #18 + 2113 008e 3900 movs r1, r7 + 2114 0090 2000 movs r0, r4 + 2115 0092 FFF7FEFF bl I2C_TransferConfig + 2116 .LVL158: + 2117 0096 0BE0 b .L165 + 2118 .L167: +1188:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** I2C_TransferConfig(hi2c, DevAddress, (uint8_t)hi2c->XferSize, I2C_AUTOEND_MODE, + 2119 .loc 1 1188 11 view .LVU652 +1188:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** I2C_TransferConfig(hi2c, DevAddress, (uint8_t)hi2c->XferSize, I2C_AUTOEND_MODE, + 2120 .loc 1 1188 32 is_stmt 0 view .LVU653 + 2121 0098 628D ldrh r2, [r4, #42] + 2122 009a 92B2 uxth r2, r2 +1188:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** I2C_TransferConfig(hi2c, DevAddress, (uint8_t)hi2c->XferSize, I2C_AUTOEND_MODE, + 2123 .loc 1 1188 26 view .LVU654 + 2124 009c 2285 strh r2, [r4, #40] +1189:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** I2C_NO_STARTSTOP); + 2125 .loc 1 1189 11 is_stmt 1 view .LVU655 + 2126 009e 8023 movs r3, #128 + 2127 00a0 D2B2 uxtb r2, r2 + 2128 00a2 0021 movs r1, #0 + 2129 00a4 0091 str r1, [sp] + 2130 00a6 9B04 lsls r3, r3, #18 + 2131 00a8 3900 movs r1, r7 + 2132 00aa 2000 movs r0, r4 + 2133 00ac FFF7FEFF bl I2C_TransferConfig + 2134 .LVL159: + 2135 .L165: +1156:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { + 2136 .loc 1 1156 28 view .LVU656 +1156:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { + 2137 .loc 1 1156 16 is_stmt 0 view .LVU657 + 2138 00b0 638D ldrh r3, [r4, #42] + 2139 00b2 9BB2 uxth r3, r3 +1156:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { + ARM GAS /tmp/ccuRhBPx.s page 175 + + + 2140 .loc 1 1156 28 view .LVU658 + 2141 00b4 002B cmp r3, #0 + 2142 00b6 34D0 beq .L175 +1159:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { + 2143 .loc 1 1159 7 is_stmt 1 view .LVU659 +1159:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { + 2144 .loc 1 1159 11 is_stmt 0 view .LVU660 + 2145 00b8 3200 movs r2, r6 + 2146 00ba 2900 movs r1, r5 + 2147 00bc 2000 movs r0, r4 + 2148 00be FFF7FEFF bl I2C_WaitOnTXISFlagUntilTimeout + 2149 .LVL160: +1159:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { + 2150 .loc 1 1159 10 discriminator 1 view .LVU661 + 2151 00c2 0028 cmp r0, #0 + 2152 00c4 4BD1 bne .L172 +1164:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 2153 .loc 1 1164 7 is_stmt 1 view .LVU662 +1164:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 2154 .loc 1 1164 35 is_stmt 0 view .LVU663 + 2155 00c6 626A ldr r2, [r4, #36] +1164:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 2156 .loc 1 1164 11 view .LVU664 + 2157 00c8 2368 ldr r3, [r4] +1164:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 2158 .loc 1 1164 30 view .LVU665 + 2159 00ca 1278 ldrb r2, [r2] +1164:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 2160 .loc 1 1164 28 view .LVU666 + 2161 00cc 9A62 str r2, [r3, #40] +1167:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 2162 .loc 1 1167 7 is_stmt 1 view .LVU667 +1167:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 2163 .loc 1 1167 11 is_stmt 0 view .LVU668 + 2164 00ce 636A ldr r3, [r4, #36] +1167:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 2165 .loc 1 1167 21 view .LVU669 + 2166 00d0 0133 adds r3, r3, #1 + 2167 00d2 6362 str r3, [r4, #36] +1169:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->XferSize--; + 2168 .loc 1 1169 7 is_stmt 1 view .LVU670 +1169:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->XferSize--; + 2169 .loc 1 1169 11 is_stmt 0 view .LVU671 + 2170 00d4 638D ldrh r3, [r4, #42] +1169:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->XferSize--; + 2171 .loc 1 1169 22 view .LVU672 + 2172 00d6 013B subs r3, r3, #1 + 2173 00d8 9BB2 uxth r3, r3 + 2174 00da 6385 strh r3, [r4, #42] +1170:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 2175 .loc 1 1170 7 is_stmt 1 view .LVU673 +1170:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 2176 .loc 1 1170 11 is_stmt 0 view .LVU674 + 2177 00dc 238D ldrh r3, [r4, #40] +1170:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 2178 .loc 1 1170 21 view .LVU675 + 2179 00de 013B subs r3, r3, #1 + ARM GAS /tmp/ccuRhBPx.s page 176 + + + 2180 00e0 9BB2 uxth r3, r3 + 2181 00e2 2385 strh r3, [r4, #40] +1172:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { + 2182 .loc 1 1172 7 is_stmt 1 view .LVU676 +1172:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { + 2183 .loc 1 1172 16 is_stmt 0 view .LVU677 + 2184 00e4 628D ldrh r2, [r4, #42] + 2185 00e6 92B2 uxth r2, r2 +1172:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { + 2186 .loc 1 1172 10 view .LVU678 + 2187 00e8 002A cmp r2, #0 + 2188 00ea E1D0 beq .L165 +1172:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { + 2189 .loc 1 1172 35 discriminator 1 view .LVU679 + 2190 00ec 002B cmp r3, #0 + 2191 00ee DFD1 bne .L165 +1175:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { + 2192 .loc 1 1175 9 is_stmt 1 view .LVU680 +1175:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { + 2193 .loc 1 1175 13 is_stmt 0 view .LVU681 + 2194 00f0 0096 str r6, [sp] + 2195 00f2 2B00 movs r3, r5 + 2196 00f4 0022 movs r2, #0 + 2197 00f6 8021 movs r1, #128 + 2198 00f8 2000 movs r0, r4 + 2199 00fa FFF7FEFF bl I2C_WaitOnFlagUntilTimeout + 2200 .LVL161: +1175:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { + 2201 .loc 1 1175 12 discriminator 1 view .LVU682 + 2202 00fe 0028 cmp r0, #0 + 2203 0100 2FD1 bne .L173 +1180:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { + 2204 .loc 1 1180 9 is_stmt 1 view .LVU683 +1180:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { + 2205 .loc 1 1180 17 is_stmt 0 view .LVU684 + 2206 0102 638D ldrh r3, [r4, #42] + 2207 0104 9BB2 uxth r3, r3 +1180:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { + 2208 .loc 1 1180 12 view .LVU685 + 2209 0106 FF2B cmp r3, #255 + 2210 0108 C6D9 bls .L167 +1182:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** I2C_TransferConfig(hi2c, DevAddress, (uint8_t)hi2c->XferSize, I2C_RELOAD_MODE, + 2211 .loc 1 1182 11 is_stmt 1 view .LVU686 +1182:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** I2C_TransferConfig(hi2c, DevAddress, (uint8_t)hi2c->XferSize, I2C_RELOAD_MODE, + 2212 .loc 1 1182 26 is_stmt 0 view .LVU687 + 2213 010a FF23 movs r3, #255 + 2214 010c 2385 strh r3, [r4, #40] +1183:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** I2C_NO_STARTSTOP); + 2215 .loc 1 1183 11 is_stmt 1 view .LVU688 + 2216 010e 7F3B subs r3, r3, #127 + 2217 0110 0022 movs r2, #0 + 2218 0112 0092 str r2, [sp] + 2219 0114 5B04 lsls r3, r3, #17 + 2220 0116 FF32 adds r2, r2, #255 + 2221 0118 3900 movs r1, r7 + 2222 011a 2000 movs r0, r4 + 2223 011c FFF7FEFF bl I2C_TransferConfig + ARM GAS /tmp/ccuRhBPx.s page 177 + + + 2224 .LVL162: + 2225 0120 C6E7 b .L165 + 2226 .L175: +1197:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { + 2227 .loc 1 1197 5 view .LVU689 +1197:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { + 2228 .loc 1 1197 9 is_stmt 0 view .LVU690 + 2229 0122 3200 movs r2, r6 + 2230 0124 2900 movs r1, r5 + 2231 0126 2000 movs r0, r4 + 2232 0128 FFF7FEFF bl I2C_WaitOnSTOPFlagUntilTimeout + 2233 .LVL163: +1197:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { + 2234 .loc 1 1197 8 discriminator 1 view .LVU691 + 2235 012c 0028 cmp r0, #0 + 2236 012e 1AD1 bne .L174 +1203:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 2237 .loc 1 1203 5 is_stmt 1 view .LVU692 + 2238 0130 2368 ldr r3, [r4] + 2239 0132 2022 movs r2, #32 + 2240 0134 DA61 str r2, [r3, #28] +1206:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 2241 .loc 1 1206 5 view .LVU693 + 2242 0136 2168 ldr r1, [r4] + 2243 0138 4B68 ldr r3, [r1, #4] + 2244 013a 0D4D ldr r5, .L176+4 + 2245 013c 2B40 ands r3, r5 + 2246 013e 4B60 str r3, [r1, #4] +1208:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->Mode = HAL_I2C_MODE_NONE; + 2247 .loc 1 1208 5 view .LVU694 +1208:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->Mode = HAL_I2C_MODE_NONE; + 2248 .loc 1 1208 17 is_stmt 0 view .LVU695 + 2249 0140 4123 movs r3, #65 + 2250 0142 E254 strb r2, [r4, r3] +1209:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 2251 .loc 1 1209 5 is_stmt 1 view .LVU696 +1209:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 2252 .loc 1 1209 17 is_stmt 0 view .LVU697 + 2253 0144 0023 movs r3, #0 + 2254 0146 2232 adds r2, r2, #34 + 2255 0148 A354 strb r3, [r4, r2] +1212:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 2256 .loc 1 1212 5 is_stmt 1 view .LVU698 +1212:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 2257 .loc 1 1212 5 view .LVU699 + 2258 014a 023A subs r2, r2, #2 + 2259 014c A354 strb r3, [r4, r2] +1212:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 2260 .loc 1 1212 5 view .LVU700 +1214:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } + 2261 .loc 1 1214 5 view .LVU701 +1214:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } + 2262 .loc 1 1214 12 is_stmt 0 view .LVU702 + 2263 014e 00E0 b .L162 + 2264 .LVL164: + 2265 .L169: +1218:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } + ARM GAS /tmp/ccuRhBPx.s page 178 + + + 2266 .loc 1 1218 12 view .LVU703 + 2267 0150 0220 movs r0, #2 + 2268 .LVL165: + 2269 .L162: +1220:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 2270 .loc 1 1220 1 view .LVU704 + 2271 0152 05B0 add sp, sp, #20 + 2272 @ sp needed + 2273 .LVL166: + 2274 .LVL167: +1220:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 2275 .loc 1 1220 1 view .LVU705 + 2276 0154 F0BD pop {r4, r5, r6, r7, pc} + 2277 .LVL168: + 2278 .L170: +1122:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 2279 .loc 1 1122 5 discriminator 1 view .LVU706 + 2280 0156 0220 movs r0, #2 + 2281 .LVL169: +1122:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 2282 .loc 1 1122 5 discriminator 1 view .LVU707 + 2283 0158 FBE7 b .L162 + 2284 .LVL170: + 2285 .L171: +1129:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } + 2286 .loc 1 1129 14 view .LVU708 + 2287 015a 0120 movs r0, #1 + 2288 015c F9E7 b .L162 + 2289 .L172: +1161:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } + 2290 .loc 1 1161 16 view .LVU709 + 2291 015e 0120 movs r0, #1 + 2292 0160 F7E7 b .L162 + 2293 .L173: +1177:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } + 2294 .loc 1 1177 18 view .LVU710 + 2295 0162 0120 movs r0, #1 + 2296 0164 F5E7 b .L162 + 2297 .L174: +1199:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } + 2298 .loc 1 1199 14 view .LVU711 + 2299 0166 0120 movs r0, #1 + 2300 0168 F3E7 b .L162 + 2301 .L177: + 2302 016a C046 .align 2 + 2303 .L176: + 2304 016c 00200080 .word -2147475456 + 2305 0170 00E800FE .word -33495040 + 2306 .cfi_endproc + 2307 .LFE44: + 2309 .section .text.HAL_I2C_Master_Receive,"ax",%progbits + 2310 .align 1 + 2311 .global HAL_I2C_Master_Receive + 2312 .syntax unified + 2313 .code 16 + 2314 .thumb_func + 2316 HAL_I2C_Master_Receive: + ARM GAS /tmp/ccuRhBPx.s page 179 + + + 2317 .LVL171: + 2318 .LFB45: +1235:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** uint32_t tickstart; + 2319 .loc 1 1235 1 is_stmt 1 view -0 + 2320 .cfi_startproc + 2321 @ args = 4, pretend = 0, frame = 8 + 2322 @ frame_needed = 0, uses_anonymous_args = 0 +1235:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** uint32_t tickstart; + 2323 .loc 1 1235 1 is_stmt 0 view .LVU713 + 2324 0000 F0B5 push {r4, r5, r6, r7, lr} + 2325 .cfi_def_cfa_offset 20 + 2326 .cfi_offset 4, -20 + 2327 .cfi_offset 5, -16 + 2328 .cfi_offset 6, -12 + 2329 .cfi_offset 7, -8 + 2330 .cfi_offset 14, -4 + 2331 0002 85B0 sub sp, sp, #20 + 2332 .cfi_def_cfa_offset 40 + 2333 0004 0400 movs r4, r0 + 2334 0006 0F00 movs r7, r1 + 2335 0008 0292 str r2, [sp, #8] + 2336 000a 0393 str r3, [sp, #12] + 2337 000c 0A9D ldr r5, [sp, #40] +1236:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 2338 .loc 1 1236 3 is_stmt 1 view .LVU714 +1238:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { + 2339 .loc 1 1238 3 view .LVU715 +1238:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { + 2340 .loc 1 1238 11 is_stmt 0 view .LVU716 + 2341 000e 4123 movs r3, #65 + 2342 .LVL172: +1238:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { + 2343 .loc 1 1238 11 view .LVU717 + 2344 0010 C35C ldrb r3, [r0, r3] +1238:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { + 2345 .loc 1 1238 6 view .LVU718 + 2346 0012 202B cmp r3, #32 + 2347 0014 00D0 beq .LCB2260 + 2348 0016 9BE0 b .L186 @long jump + 2349 .LCB2260: +1241:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 2350 .loc 1 1241 5 is_stmt 1 view .LVU719 +1241:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 2351 .loc 1 1241 5 view .LVU720 + 2352 0018 2033 adds r3, r3, #32 + 2353 001a C35C ldrb r3, [r0, r3] + 2354 001c 012B cmp r3, #1 + 2355 001e 00D1 bne .LCB2266 + 2356 0020 99E0 b .L187 @long jump + 2357 .LCB2266: +1241:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 2358 .loc 1 1241 5 discriminator 2 view .LVU721 + 2359 0022 4023 movs r3, #64 + 2360 0024 0122 movs r2, #1 + 2361 .LVL173: +1241:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 2362 .loc 1 1241 5 is_stmt 0 discriminator 2 view .LVU722 + ARM GAS /tmp/ccuRhBPx.s page 180 + + + 2363 0026 C254 strb r2, [r0, r3] +1241:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 2364 .loc 1 1241 5 is_stmt 1 discriminator 2 view .LVU723 +1244:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 2365 .loc 1 1244 5 view .LVU724 +1244:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 2366 .loc 1 1244 17 is_stmt 0 view .LVU725 + 2367 0028 FFF7FEFF bl HAL_GetTick + 2368 .LVL174: +1244:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 2369 .loc 1 1244 17 view .LVU726 + 2370 002c 0600 movs r6, r0 + 2371 .LVL175: +1246:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { + 2372 .loc 1 1246 5 is_stmt 1 view .LVU727 +1246:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { + 2373 .loc 1 1246 9 is_stmt 0 view .LVU728 + 2374 002e 8021 movs r1, #128 + 2375 0030 0090 str r0, [sp] + 2376 0032 1923 movs r3, #25 + 2377 0034 0122 movs r2, #1 + 2378 0036 0902 lsls r1, r1, #8 + 2379 0038 2000 movs r0, r4 + 2380 .LVL176: +1246:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { + 2381 .loc 1 1246 9 view .LVU729 + 2382 003a FFF7FEFF bl I2C_WaitOnFlagUntilTimeout + 2383 .LVL177: +1246:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { + 2384 .loc 1 1246 8 discriminator 1 view .LVU730 + 2385 003e 0028 cmp r0, #0 + 2386 0040 00D0 beq .LCB2290 + 2387 0042 8AE0 b .L188 @long jump + 2388 .LCB2290: +1251:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->Mode = HAL_I2C_MODE_MASTER; + 2389 .loc 1 1251 5 is_stmt 1 view .LVU731 +1251:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->Mode = HAL_I2C_MODE_MASTER; + 2390 .loc 1 1251 21 is_stmt 0 view .LVU732 + 2391 0044 4123 movs r3, #65 + 2392 0046 2222 movs r2, #34 + 2393 0048 E254 strb r2, [r4, r3] +1252:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->ErrorCode = HAL_I2C_ERROR_NONE; + 2394 .loc 1 1252 5 is_stmt 1 view .LVU733 +1252:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->ErrorCode = HAL_I2C_ERROR_NONE; + 2395 .loc 1 1252 21 is_stmt 0 view .LVU734 + 2396 004a 0133 adds r3, r3, #1 + 2397 004c 123A subs r2, r2, #18 + 2398 004e E254 strb r2, [r4, r3] +1253:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 2399 .loc 1 1253 5 is_stmt 1 view .LVU735 +1253:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 2400 .loc 1 1253 21 is_stmt 0 view .LVU736 + 2401 0050 0023 movs r3, #0 + 2402 0052 6364 str r3, [r4, #68] +1256:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->XferCount = Size; + 2403 .loc 1 1256 5 is_stmt 1 view .LVU737 +1256:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->XferCount = Size; + ARM GAS /tmp/ccuRhBPx.s page 181 + + + 2404 .loc 1 1256 21 is_stmt 0 view .LVU738 + 2405 0054 029A ldr r2, [sp, #8] + 2406 0056 6262 str r2, [r4, #36] +1257:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->XferISR = NULL; + 2407 .loc 1 1257 5 is_stmt 1 view .LVU739 +1257:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->XferISR = NULL; + 2408 .loc 1 1257 21 is_stmt 0 view .LVU740 + 2409 0058 039A ldr r2, [sp, #12] + 2410 005a 6285 strh r2, [r4, #42] +1258:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 2411 .loc 1 1258 5 is_stmt 1 view .LVU741 +1258:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 2412 .loc 1 1258 21 is_stmt 0 view .LVU742 + 2413 005c 6363 str r3, [r4, #52] +1262:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { + 2414 .loc 1 1262 5 is_stmt 1 view .LVU743 +1262:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { + 2415 .loc 1 1262 13 is_stmt 0 view .LVU744 + 2416 005e 638D ldrh r3, [r4, #42] + 2417 0060 9BB2 uxth r3, r3 +1262:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { + 2418 .loc 1 1262 8 view .LVU745 + 2419 0062 FF2B cmp r3, #255 + 2420 0064 0BD9 bls .L180 +1264:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** I2C_TransferConfig(hi2c, DevAddress, (uint8_t)hi2c->XferSize, I2C_RELOAD_MODE, + 2421 .loc 1 1264 7 is_stmt 1 view .LVU746 +1264:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** I2C_TransferConfig(hi2c, DevAddress, (uint8_t)hi2c->XferSize, I2C_RELOAD_MODE, + 2422 .loc 1 1264 22 is_stmt 0 view .LVU747 + 2423 0066 FF23 movs r3, #255 + 2424 0068 2385 strh r3, [r4, #40] +1265:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** I2C_GENERATE_START_READ); + 2425 .loc 1 1265 7 is_stmt 1 view .LVU748 + 2426 006a 7F3B subs r3, r3, #127 + 2427 006c 3F4A ldr r2, .L193 + 2428 006e 0092 str r2, [sp] + 2429 0070 5B04 lsls r3, r3, #17 + 2430 0072 FF22 movs r2, #255 + 2431 0074 3900 movs r1, r7 + 2432 0076 2000 movs r0, r4 + 2433 0078 FFF7FEFF bl I2C_TransferConfig + 2434 .LVL178: + 2435 007c 18E0 b .L182 + 2436 .L180: +1270:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** I2C_TransferConfig(hi2c, DevAddress, (uint8_t)hi2c->XferSize, I2C_AUTOEND_MODE, + 2437 .loc 1 1270 7 view .LVU749 +1270:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** I2C_TransferConfig(hi2c, DevAddress, (uint8_t)hi2c->XferSize, I2C_AUTOEND_MODE, + 2438 .loc 1 1270 28 is_stmt 0 view .LVU750 + 2439 007e 628D ldrh r2, [r4, #42] + 2440 0080 92B2 uxth r2, r2 +1270:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** I2C_TransferConfig(hi2c, DevAddress, (uint8_t)hi2c->XferSize, I2C_AUTOEND_MODE, + 2441 .loc 1 1270 22 view .LVU751 + 2442 0082 2285 strh r2, [r4, #40] +1271:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** I2C_GENERATE_START_READ); + 2443 .loc 1 1271 7 is_stmt 1 view .LVU752 + 2444 0084 8023 movs r3, #128 + 2445 0086 D2B2 uxtb r2, r2 + 2446 0088 3849 ldr r1, .L193 + ARM GAS /tmp/ccuRhBPx.s page 182 + + + 2447 008a 0091 str r1, [sp] + 2448 008c 9B04 lsls r3, r3, #18 + 2449 008e 3900 movs r1, r7 + 2450 0090 2000 movs r0, r4 + 2451 0092 FFF7FEFF bl I2C_TransferConfig + 2452 .LVL179: + 2453 0096 0BE0 b .L182 + 2454 .L184: +1308:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** I2C_TransferConfig(hi2c, DevAddress, (uint8_t)hi2c->XferSize, I2C_AUTOEND_MODE, + 2455 .loc 1 1308 11 view .LVU753 +1308:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** I2C_TransferConfig(hi2c, DevAddress, (uint8_t)hi2c->XferSize, I2C_AUTOEND_MODE, + 2456 .loc 1 1308 32 is_stmt 0 view .LVU754 + 2457 0098 628D ldrh r2, [r4, #42] + 2458 009a 92B2 uxth r2, r2 +1308:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** I2C_TransferConfig(hi2c, DevAddress, (uint8_t)hi2c->XferSize, I2C_AUTOEND_MODE, + 2459 .loc 1 1308 26 view .LVU755 + 2460 009c 2285 strh r2, [r4, #40] +1309:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** I2C_NO_STARTSTOP); + 2461 .loc 1 1309 11 is_stmt 1 view .LVU756 + 2462 009e 8023 movs r3, #128 + 2463 00a0 D2B2 uxtb r2, r2 + 2464 00a2 0021 movs r1, #0 + 2465 00a4 0091 str r1, [sp] + 2466 00a6 9B04 lsls r3, r3, #18 + 2467 00a8 3900 movs r1, r7 + 2468 00aa 2000 movs r0, r4 + 2469 00ac FFF7FEFF bl I2C_TransferConfig + 2470 .LVL180: + 2471 .L182: +1275:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { + 2472 .loc 1 1275 28 view .LVU757 +1275:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { + 2473 .loc 1 1275 16 is_stmt 0 view .LVU758 + 2474 00b0 638D ldrh r3, [r4, #42] + 2475 00b2 9BB2 uxth r3, r3 +1275:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { + 2476 .loc 1 1275 28 view .LVU759 + 2477 00b4 002B cmp r3, #0 + 2478 00b6 34D0 beq .L192 +1278:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { + 2479 .loc 1 1278 7 is_stmt 1 view .LVU760 +1278:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { + 2480 .loc 1 1278 11 is_stmt 0 view .LVU761 + 2481 00b8 3200 movs r2, r6 + 2482 00ba 2900 movs r1, r5 + 2483 00bc 2000 movs r0, r4 + 2484 00be FFF7FEFF bl I2C_WaitOnRXNEFlagUntilTimeout + 2485 .LVL181: +1278:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { + 2486 .loc 1 1278 10 discriminator 1 view .LVU762 + 2487 00c2 0028 cmp r0, #0 + 2488 00c4 4BD1 bne .L189 +1284:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 2489 .loc 1 1284 7 is_stmt 1 view .LVU763 +1284:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 2490 .loc 1 1284 38 is_stmt 0 view .LVU764 + 2491 00c6 2368 ldr r3, [r4] + ARM GAS /tmp/ccuRhBPx.s page 183 + + +1284:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 2492 .loc 1 1284 48 view .LVU765 + 2493 00c8 5A6A ldr r2, [r3, #36] +1284:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 2494 .loc 1 1284 12 view .LVU766 + 2495 00ca 636A ldr r3, [r4, #36] +1284:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 2496 .loc 1 1284 23 view .LVU767 + 2497 00cc 1A70 strb r2, [r3] +1287:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 2498 .loc 1 1287 7 is_stmt 1 view .LVU768 +1287:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 2499 .loc 1 1287 11 is_stmt 0 view .LVU769 + 2500 00ce 636A ldr r3, [r4, #36] +1287:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 2501 .loc 1 1287 21 view .LVU770 + 2502 00d0 0133 adds r3, r3, #1 + 2503 00d2 6362 str r3, [r4, #36] +1289:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->XferCount--; + 2504 .loc 1 1289 7 is_stmt 1 view .LVU771 +1289:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->XferCount--; + 2505 .loc 1 1289 11 is_stmt 0 view .LVU772 + 2506 00d4 238D ldrh r3, [r4, #40] +1289:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->XferCount--; + 2507 .loc 1 1289 21 view .LVU773 + 2508 00d6 013B subs r3, r3, #1 + 2509 00d8 9BB2 uxth r3, r3 + 2510 00da 2385 strh r3, [r4, #40] +1290:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 2511 .loc 1 1290 7 is_stmt 1 view .LVU774 +1290:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 2512 .loc 1 1290 11 is_stmt 0 view .LVU775 + 2513 00dc 628D ldrh r2, [r4, #42] +1290:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 2514 .loc 1 1290 22 view .LVU776 + 2515 00de 013A subs r2, r2, #1 + 2516 00e0 92B2 uxth r2, r2 + 2517 00e2 6285 strh r2, [r4, #42] +1292:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { + 2518 .loc 1 1292 7 is_stmt 1 view .LVU777 +1292:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { + 2519 .loc 1 1292 16 is_stmt 0 view .LVU778 + 2520 00e4 628D ldrh r2, [r4, #42] + 2521 00e6 92B2 uxth r2, r2 +1292:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { + 2522 .loc 1 1292 10 view .LVU779 + 2523 00e8 002A cmp r2, #0 + 2524 00ea E1D0 beq .L182 +1292:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { + 2525 .loc 1 1292 35 discriminator 1 view .LVU780 + 2526 00ec 002B cmp r3, #0 + 2527 00ee DFD1 bne .L182 +1295:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { + 2528 .loc 1 1295 9 is_stmt 1 view .LVU781 +1295:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { + 2529 .loc 1 1295 13 is_stmt 0 view .LVU782 + 2530 00f0 0096 str r6, [sp] + ARM GAS /tmp/ccuRhBPx.s page 184 + + + 2531 00f2 2B00 movs r3, r5 + 2532 00f4 0022 movs r2, #0 + 2533 00f6 8021 movs r1, #128 + 2534 00f8 2000 movs r0, r4 + 2535 00fa FFF7FEFF bl I2C_WaitOnFlagUntilTimeout + 2536 .LVL182: +1295:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { + 2537 .loc 1 1295 12 discriminator 1 view .LVU783 + 2538 00fe 0028 cmp r0, #0 + 2539 0100 2FD1 bne .L190 +1300:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { + 2540 .loc 1 1300 9 is_stmt 1 view .LVU784 +1300:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { + 2541 .loc 1 1300 17 is_stmt 0 view .LVU785 + 2542 0102 638D ldrh r3, [r4, #42] + 2543 0104 9BB2 uxth r3, r3 +1300:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { + 2544 .loc 1 1300 12 view .LVU786 + 2545 0106 FF2B cmp r3, #255 + 2546 0108 C6D9 bls .L184 +1302:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** I2C_TransferConfig(hi2c, DevAddress, (uint8_t)hi2c->XferSize, I2C_RELOAD_MODE, + 2547 .loc 1 1302 11 is_stmt 1 view .LVU787 +1302:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** I2C_TransferConfig(hi2c, DevAddress, (uint8_t)hi2c->XferSize, I2C_RELOAD_MODE, + 2548 .loc 1 1302 26 is_stmt 0 view .LVU788 + 2549 010a FF23 movs r3, #255 + 2550 010c 2385 strh r3, [r4, #40] +1303:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** I2C_NO_STARTSTOP); + 2551 .loc 1 1303 11 is_stmt 1 view .LVU789 + 2552 010e 7F3B subs r3, r3, #127 + 2553 0110 0022 movs r2, #0 + 2554 0112 0092 str r2, [sp] + 2555 0114 5B04 lsls r3, r3, #17 + 2556 0116 FF32 adds r2, r2, #255 + 2557 0118 3900 movs r1, r7 + 2558 011a 2000 movs r0, r4 + 2559 011c FFF7FEFF bl I2C_TransferConfig + 2560 .LVL183: + 2561 0120 C6E7 b .L182 + 2562 .L192: +1317:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { + 2563 .loc 1 1317 5 view .LVU790 +1317:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { + 2564 .loc 1 1317 9 is_stmt 0 view .LVU791 + 2565 0122 3200 movs r2, r6 + 2566 0124 2900 movs r1, r5 + 2567 0126 2000 movs r0, r4 + 2568 0128 FFF7FEFF bl I2C_WaitOnSTOPFlagUntilTimeout + 2569 .LVL184: +1317:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { + 2570 .loc 1 1317 8 discriminator 1 view .LVU792 + 2571 012c 0028 cmp r0, #0 + 2572 012e 1AD1 bne .L191 +1323:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 2573 .loc 1 1323 5 is_stmt 1 view .LVU793 + 2574 0130 2368 ldr r3, [r4] + 2575 0132 2022 movs r2, #32 + 2576 0134 DA61 str r2, [r3, #28] + ARM GAS /tmp/ccuRhBPx.s page 185 + + +1326:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 2577 .loc 1 1326 5 view .LVU794 + 2578 0136 2168 ldr r1, [r4] + 2579 0138 4B68 ldr r3, [r1, #4] + 2580 013a 0D4D ldr r5, .L193+4 + 2581 013c 2B40 ands r3, r5 + 2582 013e 4B60 str r3, [r1, #4] +1328:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->Mode = HAL_I2C_MODE_NONE; + 2583 .loc 1 1328 5 view .LVU795 +1328:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->Mode = HAL_I2C_MODE_NONE; + 2584 .loc 1 1328 17 is_stmt 0 view .LVU796 + 2585 0140 4123 movs r3, #65 + 2586 0142 E254 strb r2, [r4, r3] +1329:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 2587 .loc 1 1329 5 is_stmt 1 view .LVU797 +1329:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 2588 .loc 1 1329 17 is_stmt 0 view .LVU798 + 2589 0144 0023 movs r3, #0 + 2590 0146 2232 adds r2, r2, #34 + 2591 0148 A354 strb r3, [r4, r2] +1332:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 2592 .loc 1 1332 5 is_stmt 1 view .LVU799 +1332:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 2593 .loc 1 1332 5 view .LVU800 + 2594 014a 023A subs r2, r2, #2 + 2595 014c A354 strb r3, [r4, r2] +1332:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 2596 .loc 1 1332 5 view .LVU801 +1334:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } + 2597 .loc 1 1334 5 view .LVU802 +1334:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } + 2598 .loc 1 1334 12 is_stmt 0 view .LVU803 + 2599 014e 00E0 b .L179 + 2600 .LVL185: + 2601 .L186: +1338:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } + 2602 .loc 1 1338 12 view .LVU804 + 2603 0150 0220 movs r0, #2 + 2604 .LVL186: + 2605 .L179: +1340:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 2606 .loc 1 1340 1 view .LVU805 + 2607 0152 05B0 add sp, sp, #20 + 2608 @ sp needed + 2609 .LVL187: + 2610 .LVL188: +1340:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 2611 .loc 1 1340 1 view .LVU806 + 2612 0154 F0BD pop {r4, r5, r6, r7, pc} + 2613 .LVL189: + 2614 .L187: +1241:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 2615 .loc 1 1241 5 discriminator 1 view .LVU807 + 2616 0156 0220 movs r0, #2 + 2617 .LVL190: +1241:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 2618 .loc 1 1241 5 discriminator 1 view .LVU808 + ARM GAS /tmp/ccuRhBPx.s page 186 + + + 2619 0158 FBE7 b .L179 + 2620 .LVL191: + 2621 .L188: +1248:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } + 2622 .loc 1 1248 14 view .LVU809 + 2623 015a 0120 movs r0, #1 + 2624 015c F9E7 b .L179 + 2625 .L189: +1280:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } + 2626 .loc 1 1280 16 view .LVU810 + 2627 015e 0120 movs r0, #1 + 2628 0160 F7E7 b .L179 + 2629 .L190: +1297:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } + 2630 .loc 1 1297 18 view .LVU811 + 2631 0162 0120 movs r0, #1 + 2632 0164 F5E7 b .L179 + 2633 .L191: +1319:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } + 2634 .loc 1 1319 14 view .LVU812 + 2635 0166 0120 movs r0, #1 + 2636 0168 F3E7 b .L179 + 2637 .L194: + 2638 016a C046 .align 2 + 2639 .L193: + 2640 016c 00240080 .word -2147474432 + 2641 0170 00E800FE .word -33495040 + 2642 .cfi_endproc + 2643 .LFE45: + 2645 .section .text.HAL_I2C_Slave_Transmit,"ax",%progbits + 2646 .align 1 + 2647 .global HAL_I2C_Slave_Transmit + 2648 .syntax unified + 2649 .code 16 + 2650 .thumb_func + 2652 HAL_I2C_Slave_Transmit: + 2653 .LVL192: + 2654 .LFB46: +1353:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** uint32_t tickstart; + 2655 .loc 1 1353 1 is_stmt 1 view -0 + 2656 .cfi_startproc + 2657 @ args = 0, pretend = 0, frame = 0 + 2658 @ frame_needed = 0, uses_anonymous_args = 0 +1353:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** uint32_t tickstart; + 2659 .loc 1 1353 1 is_stmt 0 view .LVU814 + 2660 0000 F0B5 push {r4, r5, r6, r7, lr} + 2661 .cfi_def_cfa_offset 20 + 2662 .cfi_offset 4, -20 + 2663 .cfi_offset 5, -16 + 2664 .cfi_offset 6, -12 + 2665 .cfi_offset 7, -8 + 2666 .cfi_offset 14, -4 + 2667 0002 C646 mov lr, r8 + 2668 0004 00B5 push {lr} + 2669 .cfi_def_cfa_offset 24 + 2670 .cfi_offset 8, -24 + 2671 0006 82B0 sub sp, sp, #8 + ARM GAS /tmp/ccuRhBPx.s page 187 + + + 2672 .cfi_def_cfa_offset 32 + 2673 0008 0400 movs r4, r0 + 2674 000a 0D00 movs r5, r1 + 2675 000c 9046 mov r8, r2 + 2676 000e 1E00 movs r6, r3 +1354:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 2677 .loc 1 1354 3 is_stmt 1 view .LVU815 +1356:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { + 2678 .loc 1 1356 3 view .LVU816 +1356:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { + 2679 .loc 1 1356 11 is_stmt 0 view .LVU817 + 2680 0010 4123 movs r3, #65 + 2681 .LVL193: +1356:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { + 2682 .loc 1 1356 11 view .LVU818 + 2683 0012 C35C ldrb r3, [r0, r3] +1356:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { + 2684 .loc 1 1356 6 view .LVU819 + 2685 0014 202B cmp r3, #32 + 2686 0016 00D0 beq .LCB2582 + 2687 0018 DCE0 b .L209 @long jump + 2688 .LCB2582: +1358:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { + 2689 .loc 1 1358 5 is_stmt 1 view .LVU820 +1358:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { + 2690 .loc 1 1358 8 is_stmt 0 view .LVU821 + 2691 001a 0029 cmp r1, #0 + 2692 001c 52D0 beq .L197 +1358:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { + 2693 .loc 1 1358 25 discriminator 1 view .LVU822 + 2694 001e 002A cmp r2, #0 + 2695 0020 50D0 beq .L197 +1364:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 2696 .loc 1 1364 5 is_stmt 1 view .LVU823 +1364:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 2697 .loc 1 1364 5 view .LVU824 + 2698 0022 4023 movs r3, #64 + 2699 0024 C35C ldrb r3, [r0, r3] + 2700 0026 012B cmp r3, #1 + 2701 0028 00D1 bne .LCB2593 + 2702 002a D8E0 b .L210 @long jump + 2703 .LCB2593: +1364:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 2704 .loc 1 1364 5 discriminator 2 view .LVU825 + 2705 002c 4023 movs r3, #64 + 2706 002e 0122 movs r2, #1 + 2707 .LVL194: +1364:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 2708 .loc 1 1364 5 is_stmt 0 discriminator 2 view .LVU826 + 2709 0030 C254 strb r2, [r0, r3] +1364:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 2710 .loc 1 1364 5 is_stmt 1 discriminator 2 view .LVU827 +1367:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 2711 .loc 1 1367 5 view .LVU828 +1367:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 2712 .loc 1 1367 17 is_stmt 0 view .LVU829 + 2713 0032 FFF7FEFF bl HAL_GetTick + ARM GAS /tmp/ccuRhBPx.s page 188 + + + 2714 .LVL195: +1367:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 2715 .loc 1 1367 17 view .LVU830 + 2716 0036 0700 movs r7, r0 + 2717 .LVL196: +1369:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->Mode = HAL_I2C_MODE_SLAVE; + 2718 .loc 1 1369 5 is_stmt 1 view .LVU831 +1369:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->Mode = HAL_I2C_MODE_SLAVE; + 2719 .loc 1 1369 21 is_stmt 0 view .LVU832 + 2720 0038 4123 movs r3, #65 + 2721 003a 2122 movs r2, #33 + 2722 003c E254 strb r2, [r4, r3] +1370:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->ErrorCode = HAL_I2C_ERROR_NONE; + 2723 .loc 1 1370 5 is_stmt 1 view .LVU833 +1370:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->ErrorCode = HAL_I2C_ERROR_NONE; + 2724 .loc 1 1370 21 is_stmt 0 view .LVU834 + 2725 003e 0133 adds r3, r3, #1 + 2726 0040 013A subs r2, r2, #1 + 2727 0042 E254 strb r2, [r4, r3] +1371:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 2728 .loc 1 1371 5 is_stmt 1 view .LVU835 +1371:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 2729 .loc 1 1371 21 is_stmt 0 view .LVU836 + 2730 0044 0023 movs r3, #0 + 2731 0046 6364 str r3, [r4, #68] +1374:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->XferCount = Size; + 2732 .loc 1 1374 5 is_stmt 1 view .LVU837 +1374:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->XferCount = Size; + 2733 .loc 1 1374 21 is_stmt 0 view .LVU838 + 2734 0048 6562 str r5, [r4, #36] +1375:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->XferISR = NULL; + 2735 .loc 1 1375 5 is_stmt 1 view .LVU839 +1375:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->XferISR = NULL; + 2736 .loc 1 1375 21 is_stmt 0 view .LVU840 + 2737 004a 4246 mov r2, r8 + 2738 004c 6285 strh r2, [r4, #42] +1376:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 2739 .loc 1 1376 5 is_stmt 1 view .LVU841 +1376:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 2740 .loc 1 1376 21 is_stmt 0 view .LVU842 + 2741 004e 6363 str r3, [r4, #52] +1379:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 2742 .loc 1 1379 5 is_stmt 1 view .LVU843 +1379:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 2743 .loc 1 1379 9 is_stmt 0 view .LVU844 + 2744 0050 2268 ldr r2, [r4] +1379:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 2745 .loc 1 1379 19 view .LVU845 + 2746 0052 5368 ldr r3, [r2, #4] +1379:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 2747 .loc 1 1379 25 view .LVU846 + 2748 0054 6349 ldr r1, .L218 + 2749 0056 0B40 ands r3, r1 + 2750 0058 5360 str r3, [r2, #4] +1382:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { + 2751 .loc 1 1382 5 is_stmt 1 view .LVU847 +1382:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { + ARM GAS /tmp/ccuRhBPx.s page 189 + + + 2752 .loc 1 1382 9 is_stmt 0 view .LVU848 + 2753 005a 0090 str r0, [sp] + 2754 005c 3300 movs r3, r6 + 2755 005e 0022 movs r2, #0 + 2756 0060 0821 movs r1, #8 + 2757 0062 2000 movs r0, r4 + 2758 .LVL197: +1382:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { + 2759 .loc 1 1382 9 view .LVU849 + 2760 0064 FFF7FEFF bl I2C_WaitOnFlagUntilTimeout + 2761 .LVL198: +1382:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { + 2762 .loc 1 1382 8 discriminator 1 view .LVU850 + 2763 0068 0028 cmp r0, #0 + 2764 006a 30D1 bne .L211 +1390:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { + 2765 .loc 1 1390 5 is_stmt 1 view .LVU851 +1390:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { + 2766 .loc 1 1390 19 is_stmt 0 view .LVU852 + 2767 006c 226A ldr r2, [r4, #32] +1390:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { + 2768 .loc 1 1390 8 view .LVU853 + 2769 006e 8023 movs r3, #128 + 2770 0070 9B02 lsls r3, r3, #10 + 2771 0072 9A42 cmp r2, r3 + 2772 0074 33D0 beq .L212 + 2773 .L200: +1403:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 2774 .loc 1 1403 5 is_stmt 1 view .LVU854 + 2775 0076 2368 ldr r3, [r4] + 2776 0078 0822 movs r2, #8 + 2777 007a DA61 str r2, [r3, #28] +1406:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { + 2778 .loc 1 1406 5 view .LVU855 +1406:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { + 2779 .loc 1 1406 19 is_stmt 0 view .LVU856 + 2780 007c E368 ldr r3, [r4, #12] +1406:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { + 2781 .loc 1 1406 8 view .LVU857 + 2782 007e 022B cmp r3, #2 + 2783 0080 39D0 beq .L213 + 2784 .L201: +1421:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { + 2785 .loc 1 1421 5 is_stmt 1 view .LVU858 +1421:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { + 2786 .loc 1 1421 9 is_stmt 0 view .LVU859 + 2787 0082 8021 movs r1, #128 + 2788 0084 0097 str r7, [sp] + 2789 0086 3300 movs r3, r6 + 2790 0088 0022 movs r2, #0 + 2791 008a 4902 lsls r1, r1, #9 + 2792 008c 2000 movs r0, r4 + 2793 008e FFF7FEFF bl I2C_WaitOnFlagUntilTimeout + 2794 .LVL199: +1421:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { + 2795 .loc 1 1421 8 discriminator 1 view .LVU860 + 2796 0092 0028 cmp r0, #0 + ARM GAS /tmp/ccuRhBPx.s page 190 + + + 2797 0094 44D1 bne .L214 + 2798 .LVL200: + 2799 .L203: +1428:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { + 2800 .loc 1 1428 28 is_stmt 1 view .LVU861 +1428:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { + 2801 .loc 1 1428 16 is_stmt 0 view .LVU862 + 2802 0096 638D ldrh r3, [r4, #42] + 2803 0098 9BB2 uxth r3, r3 +1428:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { + 2804 .loc 1 1428 28 view .LVU863 + 2805 009a 002B cmp r3, #0 + 2806 009c 50D0 beq .L215 +1431:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { + 2807 .loc 1 1431 7 is_stmt 1 view .LVU864 +1431:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { + 2808 .loc 1 1431 11 is_stmt 0 view .LVU865 + 2809 009e 3A00 movs r2, r7 + 2810 00a0 3100 movs r1, r6 + 2811 00a2 2000 movs r0, r4 + 2812 00a4 FFF7FEFF bl I2C_WaitOnTXISFlagUntilTimeout + 2813 .LVL201: +1431:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { + 2814 .loc 1 1431 10 discriminator 1 view .LVU866 + 2815 00a8 0028 cmp r0, #0 + 2816 00aa 41D1 bne .L216 +1439:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 2817 .loc 1 1439 7 is_stmt 1 view .LVU867 +1439:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 2818 .loc 1 1439 35 is_stmt 0 view .LVU868 + 2819 00ac 626A ldr r2, [r4, #36] +1439:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 2820 .loc 1 1439 11 view .LVU869 + 2821 00ae 2368 ldr r3, [r4] +1439:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 2822 .loc 1 1439 30 view .LVU870 + 2823 00b0 1278 ldrb r2, [r2] +1439:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 2824 .loc 1 1439 28 view .LVU871 + 2825 00b2 9A62 str r2, [r3, #40] +1442:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 2826 .loc 1 1442 7 is_stmt 1 view .LVU872 +1442:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 2827 .loc 1 1442 11 is_stmt 0 view .LVU873 + 2828 00b4 636A ldr r3, [r4, #36] +1442:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 2829 .loc 1 1442 21 view .LVU874 + 2830 00b6 0133 adds r3, r3, #1 + 2831 00b8 6362 str r3, [r4, #36] +1444:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } + 2832 .loc 1 1444 7 is_stmt 1 view .LVU875 +1444:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } + 2833 .loc 1 1444 11 is_stmt 0 view .LVU876 + 2834 00ba 658D ldrh r5, [r4, #42] +1444:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } + 2835 .loc 1 1444 22 view .LVU877 + 2836 00bc 013D subs r5, r5, #1 + ARM GAS /tmp/ccuRhBPx.s page 191 + + + 2837 00be ADB2 uxth r5, r5 + 2838 00c0 6585 strh r5, [r4, #42] + 2839 00c2 E8E7 b .L203 + 2840 .LVL202: + 2841 .L197: +1360:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** return HAL_ERROR; + 2842 .loc 1 1360 7 is_stmt 1 view .LVU878 +1360:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** return HAL_ERROR; + 2843 .loc 1 1360 23 is_stmt 0 view .LVU879 + 2844 00c4 8023 movs r3, #128 + 2845 00c6 9B00 lsls r3, r3, #2 + 2846 00c8 6364 str r3, [r4, #68] +1361:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } + 2847 .loc 1 1361 7 is_stmt 1 view .LVU880 +1361:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } + 2848 .loc 1 1361 15 is_stmt 0 view .LVU881 + 2849 00ca 0120 movs r0, #1 + 2850 .LVL203: +1361:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } + 2851 .loc 1 1361 15 view .LVU882 + 2852 00cc 83E0 b .L196 + 2853 .LVL204: + 2854 .L211: +1385:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** return HAL_ERROR; + 2855 .loc 1 1385 7 is_stmt 1 view .LVU883 +1385:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** return HAL_ERROR; + 2856 .loc 1 1385 11 is_stmt 0 view .LVU884 + 2857 00ce 2268 ldr r2, [r4] +1385:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** return HAL_ERROR; + 2858 .loc 1 1385 21 view .LVU885 + 2859 00d0 5168 ldr r1, [r2, #4] +1385:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** return HAL_ERROR; + 2860 .loc 1 1385 27 view .LVU886 + 2861 00d2 8023 movs r3, #128 + 2862 00d4 1B02 lsls r3, r3, #8 + 2863 00d6 0B43 orrs r3, r1 + 2864 00d8 5360 str r3, [r2, #4] +1386:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } + 2865 .loc 1 1386 7 is_stmt 1 view .LVU887 +1386:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } + 2866 .loc 1 1386 14 is_stmt 0 view .LVU888 + 2867 00da 0120 movs r0, #1 + 2868 00dc 7BE0 b .L196 + 2869 .L212: +1394:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 2870 .loc 1 1394 7 is_stmt 1 view .LVU889 +1394:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 2871 .loc 1 1394 35 is_stmt 0 view .LVU890 + 2872 00de 626A ldr r2, [r4, #36] +1394:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 2873 .loc 1 1394 11 view .LVU891 + 2874 00e0 2368 ldr r3, [r4] +1394:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 2875 .loc 1 1394 30 view .LVU892 + 2876 00e2 1278 ldrb r2, [r2] +1394:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 2877 .loc 1 1394 28 view .LVU893 + ARM GAS /tmp/ccuRhBPx.s page 192 + + + 2878 00e4 9A62 str r2, [r3, #40] +1397:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 2879 .loc 1 1397 7 is_stmt 1 view .LVU894 +1397:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 2880 .loc 1 1397 11 is_stmt 0 view .LVU895 + 2881 00e6 636A ldr r3, [r4, #36] +1397:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 2882 .loc 1 1397 21 view .LVU896 + 2883 00e8 0133 adds r3, r3, #1 + 2884 00ea 6362 str r3, [r4, #36] +1399:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } + 2885 .loc 1 1399 7 is_stmt 1 view .LVU897 +1399:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } + 2886 .loc 1 1399 11 is_stmt 0 view .LVU898 + 2887 00ec 638D ldrh r3, [r4, #42] +1399:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } + 2888 .loc 1 1399 22 view .LVU899 + 2889 00ee 013B subs r3, r3, #1 + 2890 00f0 9BB2 uxth r3, r3 + 2891 00f2 6385 strh r3, [r4, #42] + 2892 00f4 BFE7 b .L200 + 2893 .L213: +1409:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { + 2894 .loc 1 1409 7 is_stmt 1 view .LVU900 +1409:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { + 2895 .loc 1 1409 11 is_stmt 0 view .LVU901 + 2896 00f6 0097 str r7, [sp] + 2897 00f8 3300 movs r3, r6 + 2898 00fa 0022 movs r2, #0 + 2899 00fc 0821 movs r1, #8 + 2900 00fe 2000 movs r0, r4 + 2901 0100 FFF7FEFF bl I2C_WaitOnFlagUntilTimeout + 2902 .LVL205: +1409:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { + 2903 .loc 1 1409 10 discriminator 1 view .LVU902 + 2904 0104 0028 cmp r0, #0 + 2905 0106 03D1 bne .L217 +1417:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } + 2906 .loc 1 1417 7 is_stmt 1 view .LVU903 + 2907 0108 2368 ldr r3, [r4] + 2908 010a 0822 movs r2, #8 + 2909 010c DA61 str r2, [r3, #28] + 2910 010e B8E7 b .L201 + 2911 .L217: +1412:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** return HAL_ERROR; + 2912 .loc 1 1412 9 view .LVU904 +1412:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** return HAL_ERROR; + 2913 .loc 1 1412 13 is_stmt 0 view .LVU905 + 2914 0110 2268 ldr r2, [r4] +1412:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** return HAL_ERROR; + 2915 .loc 1 1412 23 view .LVU906 + 2916 0112 5168 ldr r1, [r2, #4] +1412:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** return HAL_ERROR; + 2917 .loc 1 1412 29 view .LVU907 + 2918 0114 8023 movs r3, #128 + 2919 0116 1B02 lsls r3, r3, #8 + 2920 0118 0B43 orrs r3, r1 + ARM GAS /tmp/ccuRhBPx.s page 193 + + + 2921 011a 5360 str r3, [r2, #4] +1413:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } + 2922 .loc 1 1413 9 is_stmt 1 view .LVU908 +1413:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } + 2923 .loc 1 1413 16 is_stmt 0 view .LVU909 + 2924 011c 0120 movs r0, #1 + 2925 011e 5AE0 b .L196 + 2926 .L214: +1424:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** return HAL_ERROR; + 2927 .loc 1 1424 7 is_stmt 1 view .LVU910 +1424:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** return HAL_ERROR; + 2928 .loc 1 1424 11 is_stmt 0 view .LVU911 + 2929 0120 2268 ldr r2, [r4] +1424:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** return HAL_ERROR; + 2930 .loc 1 1424 21 view .LVU912 + 2931 0122 5168 ldr r1, [r2, #4] +1424:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** return HAL_ERROR; + 2932 .loc 1 1424 27 view .LVU913 + 2933 0124 8023 movs r3, #128 + 2934 0126 1B02 lsls r3, r3, #8 + 2935 0128 0B43 orrs r3, r1 + 2936 012a 5360 str r3, [r2, #4] +1425:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } + 2937 .loc 1 1425 7 is_stmt 1 view .LVU914 +1425:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } + 2938 .loc 1 1425 14 is_stmt 0 view .LVU915 + 2939 012c 0120 movs r0, #1 + 2940 012e 52E0 b .L196 + 2941 .LVL206: + 2942 .L216: +1434:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** return HAL_ERROR; + 2943 .loc 1 1434 9 is_stmt 1 view .LVU916 +1434:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** return HAL_ERROR; + 2944 .loc 1 1434 13 is_stmt 0 view .LVU917 + 2945 0130 2268 ldr r2, [r4] +1434:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** return HAL_ERROR; + 2946 .loc 1 1434 23 view .LVU918 + 2947 0132 5168 ldr r1, [r2, #4] +1434:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** return HAL_ERROR; + 2948 .loc 1 1434 29 view .LVU919 + 2949 0134 8023 movs r3, #128 + 2950 0136 1B02 lsls r3, r3, #8 + 2951 0138 0B43 orrs r3, r1 + 2952 013a 5360 str r3, [r2, #4] +1435:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } + 2953 .loc 1 1435 9 is_stmt 1 view .LVU920 +1435:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } + 2954 .loc 1 1435 16 is_stmt 0 view .LVU921 + 2955 013c 0120 movs r0, #1 + 2956 013e 4AE0 b .L196 + 2957 .L215: +1448:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { + 2958 .loc 1 1448 5 is_stmt 1 view .LVU922 +1448:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { + 2959 .loc 1 1448 9 is_stmt 0 view .LVU923 + 2960 0140 0097 str r7, [sp] + 2961 0142 3300 movs r3, r6 + ARM GAS /tmp/ccuRhBPx.s page 194 + + + 2962 0144 0022 movs r2, #0 + 2963 0146 1021 movs r1, #16 + 2964 0148 2000 movs r0, r4 + 2965 014a FFF7FEFF bl I2C_WaitOnFlagUntilTimeout + 2966 .LVL207: +1448:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { + 2967 .loc 1 1448 8 discriminator 1 view .LVU924 + 2968 014e 0028 cmp r0, #0 + 2969 0150 07D0 beq .L206 +1451:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** return HAL_ERROR; + 2970 .loc 1 1451 7 is_stmt 1 view .LVU925 +1451:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** return HAL_ERROR; + 2971 .loc 1 1451 11 is_stmt 0 view .LVU926 + 2972 0152 2268 ldr r2, [r4] +1451:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** return HAL_ERROR; + 2973 .loc 1 1451 21 view .LVU927 + 2974 0154 5168 ldr r1, [r2, #4] +1451:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** return HAL_ERROR; + 2975 .loc 1 1451 27 view .LVU928 + 2976 0156 8023 movs r3, #128 + 2977 0158 1B02 lsls r3, r3, #8 + 2978 015a 0B43 orrs r3, r1 + 2979 015c 5360 str r3, [r2, #4] +1452:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } + 2980 .loc 1 1452 7 is_stmt 1 view .LVU929 +1452:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } + 2981 .loc 1 1452 14 is_stmt 0 view .LVU930 + 2982 015e 0120 movs r0, #1 + 2983 0160 39E0 b .L196 + 2984 .L206: +1456:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 2985 .loc 1 1456 5 is_stmt 1 view .LVU931 + 2986 0162 2000 movs r0, r4 + 2987 0164 FFF7FEFF bl I2C_Flush_TXDR + 2988 .LVL208: +1459:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 2989 .loc 1 1459 5 view .LVU932 + 2990 0168 2368 ldr r3, [r4] + 2991 016a 1022 movs r2, #16 + 2992 016c DA61 str r2, [r3, #28] +1462:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { + 2993 .loc 1 1462 5 view .LVU933 +1462:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { + 2994 .loc 1 1462 9 is_stmt 0 view .LVU934 + 2995 016e 3A00 movs r2, r7 + 2996 0170 3100 movs r1, r6 + 2997 0172 2000 movs r0, r4 + 2998 0174 FFF7FEFF bl I2C_WaitOnSTOPFlagUntilTimeout + 2999 .LVL209: +1462:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { + 3000 .loc 1 1462 8 discriminator 1 view .LVU935 + 3001 0178 0028 cmp r0, #0 + 3002 017a 07D0 beq .L207 +1465:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 3003 .loc 1 1465 7 is_stmt 1 view .LVU936 +1465:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 3004 .loc 1 1465 11 is_stmt 0 view .LVU937 + ARM GAS /tmp/ccuRhBPx.s page 195 + + + 3005 017c 2268 ldr r2, [r4] +1465:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 3006 .loc 1 1465 21 view .LVU938 + 3007 017e 5168 ldr r1, [r2, #4] +1465:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 3008 .loc 1 1465 27 view .LVU939 + 3009 0180 8023 movs r3, #128 + 3010 0182 1B02 lsls r3, r3, #8 + 3011 0184 0B43 orrs r3, r1 + 3012 0186 5360 str r3, [r2, #4] +1467:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } + 3013 .loc 1 1467 7 is_stmt 1 view .LVU940 +1467:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } + 3014 .loc 1 1467 14 is_stmt 0 view .LVU941 + 3015 0188 0120 movs r0, #1 + 3016 018a 24E0 b .L196 + 3017 .L207: +1471:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 3018 .loc 1 1471 5 is_stmt 1 view .LVU942 + 3019 018c 2368 ldr r3, [r4] + 3020 018e 2022 movs r2, #32 + 3021 0190 DA61 str r2, [r3, #28] +1474:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { + 3022 .loc 1 1474 5 view .LVU943 +1474:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { + 3023 .loc 1 1474 9 is_stmt 0 view .LVU944 + 3024 0192 8021 movs r1, #128 + 3025 0194 0097 str r7, [sp] + 3026 0196 3300 movs r3, r6 + 3027 0198 1F3A subs r2, r2, #31 + 3028 019a 0902 lsls r1, r1, #8 + 3029 019c 2000 movs r0, r4 + 3030 019e FFF7FEFF bl I2C_WaitOnFlagUntilTimeout + 3031 .LVL210: +1474:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { + 3032 .loc 1 1474 8 discriminator 1 view .LVU945 + 3033 01a2 0028 cmp r0, #0 + 3034 01a4 07D0 beq .L208 +1477:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** return HAL_ERROR; + 3035 .loc 1 1477 7 is_stmt 1 view .LVU946 +1477:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** return HAL_ERROR; + 3036 .loc 1 1477 11 is_stmt 0 view .LVU947 + 3037 01a6 2268 ldr r2, [r4] +1477:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** return HAL_ERROR; + 3038 .loc 1 1477 21 view .LVU948 + 3039 01a8 5168 ldr r1, [r2, #4] +1477:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** return HAL_ERROR; + 3040 .loc 1 1477 27 view .LVU949 + 3041 01aa 8023 movs r3, #128 + 3042 01ac 1B02 lsls r3, r3, #8 + 3043 01ae 0B43 orrs r3, r1 + 3044 01b0 5360 str r3, [r2, #4] +1478:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } + 3045 .loc 1 1478 7 is_stmt 1 view .LVU950 +1478:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } + 3046 .loc 1 1478 14 is_stmt 0 view .LVU951 + 3047 01b2 0120 movs r0, #1 + ARM GAS /tmp/ccuRhBPx.s page 196 + + + 3048 01b4 0FE0 b .L196 + 3049 .L208: +1482:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 3050 .loc 1 1482 5 is_stmt 1 view .LVU952 +1482:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 3051 .loc 1 1482 9 is_stmt 0 view .LVU953 + 3052 01b6 2268 ldr r2, [r4] +1482:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 3053 .loc 1 1482 19 view .LVU954 + 3054 01b8 5168 ldr r1, [r2, #4] +1482:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 3055 .loc 1 1482 25 view .LVU955 + 3056 01ba 8023 movs r3, #128 + 3057 01bc 1B02 lsls r3, r3, #8 + 3058 01be 0B43 orrs r3, r1 + 3059 01c0 5360 str r3, [r2, #4] +1484:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->Mode = HAL_I2C_MODE_NONE; + 3060 .loc 1 1484 5 is_stmt 1 view .LVU956 +1484:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->Mode = HAL_I2C_MODE_NONE; + 3061 .loc 1 1484 17 is_stmt 0 view .LVU957 + 3062 01c2 4123 movs r3, #65 + 3063 01c4 2022 movs r2, #32 + 3064 01c6 E254 strb r2, [r4, r3] +1485:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 3065 .loc 1 1485 5 is_stmt 1 view .LVU958 +1485:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 3066 .loc 1 1485 17 is_stmt 0 view .LVU959 + 3067 01c8 0023 movs r3, #0 + 3068 01ca 2232 adds r2, r2, #34 + 3069 01cc A354 strb r3, [r4, r2] +1488:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 3070 .loc 1 1488 5 is_stmt 1 view .LVU960 +1488:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 3071 .loc 1 1488 5 view .LVU961 + 3072 01ce 023A subs r2, r2, #2 + 3073 01d0 A354 strb r3, [r4, r2] +1488:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 3074 .loc 1 1488 5 view .LVU962 +1490:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } + 3075 .loc 1 1490 5 view .LVU963 +1490:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } + 3076 .loc 1 1490 12 is_stmt 0 view .LVU964 + 3077 01d2 00E0 b .L196 + 3078 .LVL211: + 3079 .L209: +1494:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } + 3080 .loc 1 1494 12 view .LVU965 + 3081 01d4 0220 movs r0, #2 + 3082 .LVL212: + 3083 .L196: +1496:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 3084 .loc 1 1496 1 view .LVU966 + 3085 01d6 02B0 add sp, sp, #8 + 3086 @ sp needed + 3087 .LVL213: + 3088 .LVL214: + 3089 .LVL215: + ARM GAS /tmp/ccuRhBPx.s page 197 + + +1496:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 3090 .loc 1 1496 1 view .LVU967 + 3091 01d8 80BC pop {r7} + 3092 01da B846 mov r8, r7 + 3093 01dc F0BD pop {r4, r5, r6, r7, pc} + 3094 .LVL216: + 3095 .L210: +1364:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 3096 .loc 1 1364 5 discriminator 1 view .LVU968 + 3097 01de 0220 movs r0, #2 + 3098 .LVL217: +1364:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 3099 .loc 1 1364 5 discriminator 1 view .LVU969 + 3100 01e0 F9E7 b .L196 + 3101 .L219: + 3102 01e2 C046 .align 2 + 3103 .L218: + 3104 01e4 FF7FFFFF .word -32769 + 3105 .cfi_endproc + 3106 .LFE46: + 3108 .section .text.HAL_I2C_Slave_Receive,"ax",%progbits + 3109 .align 1 + 3110 .global HAL_I2C_Slave_Receive + 3111 .syntax unified + 3112 .code 16 + 3113 .thumb_func + 3115 HAL_I2C_Slave_Receive: + 3116 .LVL218: + 3117 .LFB47: +1509:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** uint32_t tickstart; + 3118 .loc 1 1509 1 is_stmt 1 view -0 + 3119 .cfi_startproc + 3120 @ args = 0, pretend = 0, frame = 0 + 3121 @ frame_needed = 0, uses_anonymous_args = 0 +1509:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** uint32_t tickstart; + 3122 .loc 1 1509 1 is_stmt 0 view .LVU971 + 3123 0000 F0B5 push {r4, r5, r6, r7, lr} + 3124 .cfi_def_cfa_offset 20 + 3125 .cfi_offset 4, -20 + 3126 .cfi_offset 5, -16 + 3127 .cfi_offset 6, -12 + 3128 .cfi_offset 7, -8 + 3129 .cfi_offset 14, -4 + 3130 0002 C646 mov lr, r8 + 3131 0004 00B5 push {lr} + 3132 .cfi_def_cfa_offset 24 + 3133 .cfi_offset 8, -24 + 3134 0006 82B0 sub sp, sp, #8 + 3135 .cfi_def_cfa_offset 32 + 3136 0008 0400 movs r4, r0 + 3137 000a 0D00 movs r5, r1 + 3138 000c 9046 mov r8, r2 + 3139 000e 1E00 movs r6, r3 +1510:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 3140 .loc 1 1510 3 is_stmt 1 view .LVU972 +1512:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { + 3141 .loc 1 1512 3 view .LVU973 + ARM GAS /tmp/ccuRhBPx.s page 198 + + +1512:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { + 3142 .loc 1 1512 11 is_stmt 0 view .LVU974 + 3143 0010 4123 movs r3, #65 + 3144 .LVL219: +1512:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { + 3145 .loc 1 1512 11 view .LVU975 + 3146 0012 C35C ldrb r3, [r0, r3] +1512:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { + 3147 .loc 1 1512 6 view .LVU976 + 3148 0014 202B cmp r3, #32 + 3149 0016 00D0 beq .LCB3002 + 3150 0018 B1E0 b .L231 @long jump + 3151 .LCB3002: +1514:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { + 3152 .loc 1 1514 5 is_stmt 1 view .LVU977 +1514:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { + 3153 .loc 1 1514 8 is_stmt 0 view .LVU978 + 3154 001a 0029 cmp r1, #0 + 3155 001c 30D0 beq .L222 +1514:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { + 3156 .loc 1 1514 25 discriminator 1 view .LVU979 + 3157 001e 002A cmp r2, #0 + 3158 0020 2ED0 beq .L222 +1520:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 3159 .loc 1 1520 5 is_stmt 1 view .LVU980 +1520:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 3160 .loc 1 1520 5 view .LVU981 + 3161 0022 4023 movs r3, #64 + 3162 0024 C35C ldrb r3, [r0, r3] + 3163 0026 012B cmp r3, #1 + 3164 0028 00D1 bne .LCB3013 + 3165 002a ADE0 b .L232 @long jump + 3166 .LCB3013: +1520:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 3167 .loc 1 1520 5 discriminator 2 view .LVU982 + 3168 002c 4023 movs r3, #64 + 3169 002e 0122 movs r2, #1 + 3170 .LVL220: +1520:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 3171 .loc 1 1520 5 is_stmt 0 discriminator 2 view .LVU983 + 3172 0030 C254 strb r2, [r0, r3] +1520:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 3173 .loc 1 1520 5 is_stmt 1 discriminator 2 view .LVU984 +1523:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 3174 .loc 1 1523 5 view .LVU985 +1523:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 3175 .loc 1 1523 17 is_stmt 0 view .LVU986 + 3176 0032 FFF7FEFF bl HAL_GetTick + 3177 .LVL221: +1523:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 3178 .loc 1 1523 17 view .LVU987 + 3179 0036 0700 movs r7, r0 + 3180 .LVL222: +1525:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->Mode = HAL_I2C_MODE_SLAVE; + 3181 .loc 1 1525 5 is_stmt 1 view .LVU988 +1525:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->Mode = HAL_I2C_MODE_SLAVE; + 3182 .loc 1 1525 21 is_stmt 0 view .LVU989 + ARM GAS /tmp/ccuRhBPx.s page 199 + + + 3183 0038 4123 movs r3, #65 + 3184 003a 2222 movs r2, #34 + 3185 003c E254 strb r2, [r4, r3] +1526:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->ErrorCode = HAL_I2C_ERROR_NONE; + 3186 .loc 1 1526 5 is_stmt 1 view .LVU990 +1526:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->ErrorCode = HAL_I2C_ERROR_NONE; + 3187 .loc 1 1526 21 is_stmt 0 view .LVU991 + 3188 003e 0133 adds r3, r3, #1 + 3189 0040 023A subs r2, r2, #2 + 3190 0042 E254 strb r2, [r4, r3] +1527:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 3191 .loc 1 1527 5 is_stmt 1 view .LVU992 +1527:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 3192 .loc 1 1527 21 is_stmt 0 view .LVU993 + 3193 0044 0023 movs r3, #0 + 3194 0046 6364 str r3, [r4, #68] +1530:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->XferCount = Size; + 3195 .loc 1 1530 5 is_stmt 1 view .LVU994 +1530:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->XferCount = Size; + 3196 .loc 1 1530 21 is_stmt 0 view .LVU995 + 3197 0048 6562 str r5, [r4, #36] +1531:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->XferSize = hi2c->XferCount; + 3198 .loc 1 1531 5 is_stmt 1 view .LVU996 +1531:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->XferSize = hi2c->XferCount; + 3199 .loc 1 1531 21 is_stmt 0 view .LVU997 + 3200 004a 4246 mov r2, r8 + 3201 004c 6285 strh r2, [r4, #42] +1532:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->XferISR = NULL; + 3202 .loc 1 1532 5 is_stmt 1 view .LVU998 +1532:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->XferISR = NULL; + 3203 .loc 1 1532 26 is_stmt 0 view .LVU999 + 3204 004e 628D ldrh r2, [r4, #42] +1532:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->XferISR = NULL; + 3205 .loc 1 1532 20 view .LVU1000 + 3206 0050 2285 strh r2, [r4, #40] +1533:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 3207 .loc 1 1533 5 is_stmt 1 view .LVU1001 +1533:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 3208 .loc 1 1533 21 is_stmt 0 view .LVU1002 + 3209 0052 6363 str r3, [r4, #52] +1536:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 3210 .loc 1 1536 5 is_stmt 1 view .LVU1003 +1536:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 3211 .loc 1 1536 9 is_stmt 0 view .LVU1004 + 3212 0054 2268 ldr r2, [r4] +1536:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 3213 .loc 1 1536 19 view .LVU1005 + 3214 0056 5368 ldr r3, [r2, #4] +1536:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 3215 .loc 1 1536 25 view .LVU1006 + 3216 0058 4C49 ldr r1, .L235 + 3217 005a 0B40 ands r3, r1 + 3218 005c 5360 str r3, [r2, #4] +1539:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { + 3219 .loc 1 1539 5 is_stmt 1 view .LVU1007 +1539:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { + 3220 .loc 1 1539 9 is_stmt 0 view .LVU1008 + ARM GAS /tmp/ccuRhBPx.s page 200 + + + 3221 005e 0090 str r0, [sp] + 3222 0060 3300 movs r3, r6 + 3223 0062 0022 movs r2, #0 + 3224 0064 0821 movs r1, #8 + 3225 0066 2000 movs r0, r4 + 3226 .LVL223: +1539:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { + 3227 .loc 1 1539 9 view .LVU1009 + 3228 0068 FFF7FEFF bl I2C_WaitOnFlagUntilTimeout + 3229 .LVL224: +1539:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { + 3230 .loc 1 1539 8 discriminator 1 view .LVU1010 + 3231 006c 0028 cmp r0, #0 + 3232 006e 0CD0 beq .L224 +1542:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** return HAL_ERROR; + 3233 .loc 1 1542 7 is_stmt 1 view .LVU1011 +1542:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** return HAL_ERROR; + 3234 .loc 1 1542 11 is_stmt 0 view .LVU1012 + 3235 0070 2268 ldr r2, [r4] +1542:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** return HAL_ERROR; + 3236 .loc 1 1542 21 view .LVU1013 + 3237 0072 5168 ldr r1, [r2, #4] +1542:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** return HAL_ERROR; + 3238 .loc 1 1542 27 view .LVU1014 + 3239 0074 8023 movs r3, #128 + 3240 0076 1B02 lsls r3, r3, #8 + 3241 0078 0B43 orrs r3, r1 + 3242 007a 5360 str r3, [r2, #4] +1543:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } + 3243 .loc 1 1543 7 is_stmt 1 view .LVU1015 +1543:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } + 3244 .loc 1 1543 14 is_stmt 0 view .LVU1016 + 3245 007c 0120 movs r0, #1 + 3246 007e 7FE0 b .L221 + 3247 .LVL225: + 3248 .L222: +1516:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** return HAL_ERROR; + 3249 .loc 1 1516 7 is_stmt 1 view .LVU1017 +1516:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** return HAL_ERROR; + 3250 .loc 1 1516 23 is_stmt 0 view .LVU1018 + 3251 0080 8023 movs r3, #128 + 3252 0082 9B00 lsls r3, r3, #2 + 3253 0084 6364 str r3, [r4, #68] +1517:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } + 3254 .loc 1 1517 7 is_stmt 1 view .LVU1019 +1517:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } + 3255 .loc 1 1517 15 is_stmt 0 view .LVU1020 + 3256 0086 0120 movs r0, #1 + 3257 .LVL226: +1517:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } + 3258 .loc 1 1517 15 view .LVU1021 + 3259 0088 7AE0 b .L221 + 3260 .LVL227: + 3261 .L224: +1547:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 3262 .loc 1 1547 5 is_stmt 1 view .LVU1022 + 3263 008a 2368 ldr r3, [r4] + ARM GAS /tmp/ccuRhBPx.s page 201 + + + 3264 008c 0822 movs r2, #8 + 3265 008e DA61 str r2, [r3, #28] +1550:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { + 3266 .loc 1 1550 5 view .LVU1023 +1550:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { + 3267 .loc 1 1550 9 is_stmt 0 view .LVU1024 + 3268 0090 8021 movs r1, #128 + 3269 0092 0097 str r7, [sp] + 3270 0094 3300 movs r3, r6 + 3271 0096 073A subs r2, r2, #7 + 3272 0098 4902 lsls r1, r1, #9 + 3273 009a 2000 movs r0, r4 + 3274 009c FFF7FEFF bl I2C_WaitOnFlagUntilTimeout + 3275 .LVL228: +1550:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { + 3276 .loc 1 1550 8 discriminator 1 view .LVU1025 + 3277 00a0 0028 cmp r0, #0 + 3278 00a2 15D0 beq .L225 +1553:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** return HAL_ERROR; + 3279 .loc 1 1553 7 is_stmt 1 view .LVU1026 +1553:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** return HAL_ERROR; + 3280 .loc 1 1553 11 is_stmt 0 view .LVU1027 + 3281 00a4 2268 ldr r2, [r4] +1553:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** return HAL_ERROR; + 3282 .loc 1 1553 21 view .LVU1028 + 3283 00a6 5168 ldr r1, [r2, #4] +1553:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** return HAL_ERROR; + 3284 .loc 1 1553 27 view .LVU1029 + 3285 00a8 8023 movs r3, #128 + 3286 00aa 1B02 lsls r3, r3, #8 + 3287 00ac 0B43 orrs r3, r1 + 3288 00ae 5360 str r3, [r2, #4] +1554:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } + 3289 .loc 1 1554 7 is_stmt 1 view .LVU1030 +1554:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } + 3290 .loc 1 1554 14 is_stmt 0 view .LVU1031 + 3291 00b0 0120 movs r0, #1 + 3292 00b2 65E0 b .L221 + 3293 .LVL229: + 3294 .L226: +1582:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 3295 .loc 1 1582 7 is_stmt 1 view .LVU1032 +1582:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 3296 .loc 1 1582 38 is_stmt 0 view .LVU1033 + 3297 00b4 2368 ldr r3, [r4] +1582:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 3298 .loc 1 1582 48 view .LVU1034 + 3299 00b6 5A6A ldr r2, [r3, #36] +1582:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 3300 .loc 1 1582 12 view .LVU1035 + 3301 00b8 636A ldr r3, [r4, #36] +1582:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 3302 .loc 1 1582 23 view .LVU1036 + 3303 00ba 1A70 strb r2, [r3] +1585:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 3304 .loc 1 1585 7 is_stmt 1 view .LVU1037 +1585:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + ARM GAS /tmp/ccuRhBPx.s page 202 + + + 3305 .loc 1 1585 11 is_stmt 0 view .LVU1038 + 3306 00bc 636A ldr r3, [r4, #36] +1585:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 3307 .loc 1 1585 21 view .LVU1039 + 3308 00be 0133 adds r3, r3, #1 + 3309 00c0 6362 str r3, [r4, #36] +1587:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->XferSize--; + 3310 .loc 1 1587 7 is_stmt 1 view .LVU1040 +1587:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->XferSize--; + 3311 .loc 1 1587 11 is_stmt 0 view .LVU1041 + 3312 00c2 658D ldrh r5, [r4, #42] +1587:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->XferSize--; + 3313 .loc 1 1587 22 view .LVU1042 + 3314 00c4 013D subs r5, r5, #1 + 3315 00c6 ADB2 uxth r5, r5 + 3316 00c8 6585 strh r5, [r4, #42] +1588:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } + 3317 .loc 1 1588 7 is_stmt 1 view .LVU1043 +1588:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } + 3318 .loc 1 1588 11 is_stmt 0 view .LVU1044 + 3319 00ca 238D ldrh r3, [r4, #40] +1588:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } + 3320 .loc 1 1588 21 view .LVU1045 + 3321 00cc 013B subs r3, r3, #1 + 3322 00ce 2385 strh r3, [r4, #40] + 3323 .L225: +1557:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { + 3324 .loc 1 1557 28 is_stmt 1 view .LVU1046 +1557:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { + 3325 .loc 1 1557 16 is_stmt 0 view .LVU1047 + 3326 00d0 638D ldrh r3, [r4, #42] + 3327 00d2 9BB2 uxth r3, r3 +1557:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { + 3328 .loc 1 1557 28 view .LVU1048 + 3329 00d4 002B cmp r3, #0 + 3330 00d6 1FD0 beq .L234 +1560:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { + 3331 .loc 1 1560 7 is_stmt 1 view .LVU1049 +1560:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { + 3332 .loc 1 1560 11 is_stmt 0 view .LVU1050 + 3333 00d8 3A00 movs r2, r7 + 3334 00da 3100 movs r1, r6 + 3335 00dc 2000 movs r0, r4 + 3336 00de FFF7FEFF bl I2C_WaitOnRXNEFlagUntilTimeout + 3337 .LVL230: +1560:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { + 3338 .loc 1 1560 10 discriminator 1 view .LVU1051 + 3339 00e2 0028 cmp r0, #0 + 3340 00e4 E6D0 beq .L226 +1563:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 3341 .loc 1 1563 9 is_stmt 1 view .LVU1052 +1563:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 3342 .loc 1 1563 13 is_stmt 0 view .LVU1053 + 3343 00e6 2268 ldr r2, [r4] +1563:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 3344 .loc 1 1563 23 view .LVU1054 + 3345 00e8 5168 ldr r1, [r2, #4] + ARM GAS /tmp/ccuRhBPx.s page 203 + + +1563:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 3346 .loc 1 1563 29 view .LVU1055 + 3347 00ea 8023 movs r3, #128 + 3348 00ec 1B02 lsls r3, r3, #8 + 3349 00ee 0B43 orrs r3, r1 + 3350 00f0 5360 str r3, [r2, #4] +1566:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { + 3351 .loc 1 1566 9 is_stmt 1 view .LVU1056 +1566:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { + 3352 .loc 1 1566 13 is_stmt 0 view .LVU1057 + 3353 00f2 2268 ldr r2, [r4] + 3354 00f4 9369 ldr r3, [r2, #24] +1566:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { + 3355 .loc 1 1566 12 view .LVU1058 + 3356 00f6 5B07 lsls r3, r3, #29 + 3357 00f8 0CD5 bpl .L227 +1569:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 3358 .loc 1 1569 11 is_stmt 1 view .LVU1059 +1569:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 3359 .loc 1 1569 52 is_stmt 0 view .LVU1060 + 3360 00fa 526A ldr r2, [r2, #36] +1569:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 3361 .loc 1 1569 16 view .LVU1061 + 3362 00fc 636A ldr r3, [r4, #36] +1569:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 3363 .loc 1 1569 27 view .LVU1062 + 3364 00fe 1A70 strb r2, [r3] +1572:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 3365 .loc 1 1572 11 is_stmt 1 view .LVU1063 +1572:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 3366 .loc 1 1572 15 is_stmt 0 view .LVU1064 + 3367 0100 636A ldr r3, [r4, #36] +1572:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 3368 .loc 1 1572 25 view .LVU1065 + 3369 0102 0133 adds r3, r3, #1 + 3370 0104 6362 str r3, [r4, #36] +1574:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->XferSize--; + 3371 .loc 1 1574 11 is_stmt 1 view .LVU1066 +1574:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->XferSize--; + 3372 .loc 1 1574 15 is_stmt 0 view .LVU1067 + 3373 0106 638D ldrh r3, [r4, #42] +1574:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->XferSize--; + 3374 .loc 1 1574 26 view .LVU1068 + 3375 0108 013B subs r3, r3, #1 + 3376 010a 9BB2 uxth r3, r3 + 3377 010c 6385 strh r3, [r4, #42] +1575:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } + 3378 .loc 1 1575 11 is_stmt 1 view .LVU1069 +1575:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } + 3379 .loc 1 1575 15 is_stmt 0 view .LVU1070 + 3380 010e 238D ldrh r3, [r4, #40] +1575:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } + 3381 .loc 1 1575 25 view .LVU1071 + 3382 0110 013B subs r3, r3, #1 + 3383 0112 2385 strh r3, [r4, #40] + 3384 .L227: +1578:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } + ARM GAS /tmp/ccuRhBPx.s page 204 + + + 3385 .loc 1 1578 9 is_stmt 1 view .LVU1072 +1578:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } + 3386 .loc 1 1578 16 is_stmt 0 view .LVU1073 + 3387 0114 0120 movs r0, #1 + 3388 0116 33E0 b .L221 + 3389 .L234: +1592:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { + 3390 .loc 1 1592 5 is_stmt 1 view .LVU1074 +1592:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { + 3391 .loc 1 1592 9 is_stmt 0 view .LVU1075 + 3392 0118 3A00 movs r2, r7 + 3393 011a 3100 movs r1, r6 + 3394 011c 2000 movs r0, r4 + 3395 011e FFF7FEFF bl I2C_WaitOnSTOPFlagUntilTimeout + 3396 .LVL231: +1592:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { + 3397 .loc 1 1592 8 discriminator 1 view .LVU1076 + 3398 0122 0028 cmp r0, #0 + 3399 0124 07D0 beq .L229 +1595:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** return HAL_ERROR; + 3400 .loc 1 1595 7 is_stmt 1 view .LVU1077 +1595:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** return HAL_ERROR; + 3401 .loc 1 1595 11 is_stmt 0 view .LVU1078 + 3402 0126 2268 ldr r2, [r4] +1595:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** return HAL_ERROR; + 3403 .loc 1 1595 21 view .LVU1079 + 3404 0128 5168 ldr r1, [r2, #4] +1595:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** return HAL_ERROR; + 3405 .loc 1 1595 27 view .LVU1080 + 3406 012a 8023 movs r3, #128 + 3407 012c 1B02 lsls r3, r3, #8 + 3408 012e 0B43 orrs r3, r1 + 3409 0130 5360 str r3, [r2, #4] +1596:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } + 3410 .loc 1 1596 7 is_stmt 1 view .LVU1081 +1596:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } + 3411 .loc 1 1596 14 is_stmt 0 view .LVU1082 + 3412 0132 0120 movs r0, #1 + 3413 0134 24E0 b .L221 + 3414 .L229: +1600:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 3415 .loc 1 1600 5 is_stmt 1 view .LVU1083 + 3416 0136 2368 ldr r3, [r4] + 3417 0138 2022 movs r2, #32 + 3418 013a DA61 str r2, [r3, #28] +1603:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { + 3419 .loc 1 1603 5 view .LVU1084 +1603:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { + 3420 .loc 1 1603 9 is_stmt 0 view .LVU1085 + 3421 013c 8021 movs r1, #128 + 3422 013e 0097 str r7, [sp] + 3423 0140 3300 movs r3, r6 + 3424 0142 1F3A subs r2, r2, #31 + 3425 0144 0902 lsls r1, r1, #8 + 3426 0146 2000 movs r0, r4 + 3427 0148 FFF7FEFF bl I2C_WaitOnFlagUntilTimeout + 3428 .LVL232: + ARM GAS /tmp/ccuRhBPx.s page 205 + + +1603:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { + 3429 .loc 1 1603 8 discriminator 1 view .LVU1086 + 3430 014c 0028 cmp r0, #0 + 3431 014e 07D0 beq .L230 +1606:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** return HAL_ERROR; + 3432 .loc 1 1606 7 is_stmt 1 view .LVU1087 +1606:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** return HAL_ERROR; + 3433 .loc 1 1606 11 is_stmt 0 view .LVU1088 + 3434 0150 2268 ldr r2, [r4] +1606:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** return HAL_ERROR; + 3435 .loc 1 1606 21 view .LVU1089 + 3436 0152 5168 ldr r1, [r2, #4] +1606:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** return HAL_ERROR; + 3437 .loc 1 1606 27 view .LVU1090 + 3438 0154 8023 movs r3, #128 + 3439 0156 1B02 lsls r3, r3, #8 + 3440 0158 0B43 orrs r3, r1 + 3441 015a 5360 str r3, [r2, #4] +1607:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } + 3442 .loc 1 1607 7 is_stmt 1 view .LVU1091 +1607:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } + 3443 .loc 1 1607 14 is_stmt 0 view .LVU1092 + 3444 015c 0120 movs r0, #1 + 3445 015e 0FE0 b .L221 + 3446 .L230: +1611:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 3447 .loc 1 1611 5 is_stmt 1 view .LVU1093 +1611:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 3448 .loc 1 1611 9 is_stmt 0 view .LVU1094 + 3449 0160 2268 ldr r2, [r4] +1611:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 3450 .loc 1 1611 19 view .LVU1095 + 3451 0162 5168 ldr r1, [r2, #4] +1611:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 3452 .loc 1 1611 25 view .LVU1096 + 3453 0164 8023 movs r3, #128 + 3454 0166 1B02 lsls r3, r3, #8 + 3455 0168 0B43 orrs r3, r1 + 3456 016a 5360 str r3, [r2, #4] +1613:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->Mode = HAL_I2C_MODE_NONE; + 3457 .loc 1 1613 5 is_stmt 1 view .LVU1097 +1613:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->Mode = HAL_I2C_MODE_NONE; + 3458 .loc 1 1613 17 is_stmt 0 view .LVU1098 + 3459 016c 4123 movs r3, #65 + 3460 016e 2022 movs r2, #32 + 3461 0170 E254 strb r2, [r4, r3] +1614:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 3462 .loc 1 1614 5 is_stmt 1 view .LVU1099 +1614:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 3463 .loc 1 1614 17 is_stmt 0 view .LVU1100 + 3464 0172 0023 movs r3, #0 + 3465 0174 2232 adds r2, r2, #34 + 3466 0176 A354 strb r3, [r4, r2] +1617:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 3467 .loc 1 1617 5 is_stmt 1 view .LVU1101 +1617:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 3468 .loc 1 1617 5 view .LVU1102 + ARM GAS /tmp/ccuRhBPx.s page 206 + + + 3469 0178 023A subs r2, r2, #2 + 3470 017a A354 strb r3, [r4, r2] +1617:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 3471 .loc 1 1617 5 view .LVU1103 +1619:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } + 3472 .loc 1 1619 5 view .LVU1104 +1619:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } + 3473 .loc 1 1619 12 is_stmt 0 view .LVU1105 + 3474 017c 00E0 b .L221 + 3475 .LVL233: + 3476 .L231: +1623:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } + 3477 .loc 1 1623 12 view .LVU1106 + 3478 017e 0220 movs r0, #2 + 3479 .LVL234: + 3480 .L221: +1625:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 3481 .loc 1 1625 1 view .LVU1107 + 3482 0180 02B0 add sp, sp, #8 + 3483 @ sp needed + 3484 .LVL235: + 3485 .LVL236: + 3486 .LVL237: +1625:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 3487 .loc 1 1625 1 view .LVU1108 + 3488 0182 80BC pop {r7} + 3489 0184 B846 mov r8, r7 + 3490 0186 F0BD pop {r4, r5, r6, r7, pc} + 3491 .LVL238: + 3492 .L232: +1520:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 3493 .loc 1 1520 5 discriminator 1 view .LVU1109 + 3494 0188 0220 movs r0, #2 + 3495 .LVL239: +1520:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 3496 .loc 1 1520 5 discriminator 1 view .LVU1110 + 3497 018a F9E7 b .L221 + 3498 .L236: + 3499 .align 2 + 3500 .L235: + 3501 018c FF7FFFFF .word -32769 + 3502 .cfi_endproc + 3503 .LFE47: + 3505 .section .text.HAL_I2C_Master_Transmit_IT,"ax",%progbits + 3506 .align 1 + 3507 .global HAL_I2C_Master_Transmit_IT + 3508 .syntax unified + 3509 .code 16 + 3510 .thumb_func + 3512 HAL_I2C_Master_Transmit_IT: + 3513 .LVL240: + 3514 .LFB48: +1639:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** uint32_t xfermode; + 3515 .loc 1 1639 1 is_stmt 1 view -0 + 3516 .cfi_startproc + 3517 @ args = 0, pretend = 0, frame = 0 + 3518 @ frame_needed = 0, uses_anonymous_args = 0 + ARM GAS /tmp/ccuRhBPx.s page 207 + + +1639:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** uint32_t xfermode; + 3519 .loc 1 1639 1 is_stmt 0 view .LVU1112 + 3520 0000 30B5 push {r4, r5, lr} + 3521 .cfi_def_cfa_offset 12 + 3522 .cfi_offset 4, -12 + 3523 .cfi_offset 5, -8 + 3524 .cfi_offset 14, -4 + 3525 0002 83B0 sub sp, sp, #12 + 3526 .cfi_def_cfa_offset 24 + 3527 0004 0400 movs r4, r0 +1640:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 3528 .loc 1 1640 3 is_stmt 1 view .LVU1113 +1642:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { + 3529 .loc 1 1642 3 view .LVU1114 +1642:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { + 3530 .loc 1 1642 11 is_stmt 0 view .LVU1115 + 3531 0006 4120 movs r0, #65 + 3532 .LVL241: +1642:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { + 3533 .loc 1 1642 11 view .LVU1116 + 3534 0008 205C ldrb r0, [r4, r0] +1642:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { + 3535 .loc 1 1642 6 view .LVU1117 + 3536 000a 2028 cmp r0, #32 + 3537 000c 36D1 bne .L241 +1644:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { + 3538 .loc 1 1644 5 is_stmt 1 view .LVU1118 +1644:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { + 3539 .loc 1 1644 9 is_stmt 0 view .LVU1119 + 3540 000e 2068 ldr r0, [r4] + 3541 0010 8069 ldr r0, [r0, #24] +1644:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { + 3542 .loc 1 1644 8 view .LVU1120 + 3543 0012 0004 lsls r0, r0, #16 + 3544 0014 34D4 bmi .L242 +1650:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 3545 .loc 1 1650 5 is_stmt 1 view .LVU1121 +1650:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 3546 .loc 1 1650 5 view .LVU1122 + 3547 0016 4020 movs r0, #64 + 3548 0018 205C ldrb r0, [r4, r0] + 3549 001a 0128 cmp r0, #1 + 3550 001c 32D0 beq .L243 +1650:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 3551 .loc 1 1650 5 discriminator 2 view .LVU1123 + 3552 001e 4020 movs r0, #64 + 3553 0020 0125 movs r5, #1 + 3554 0022 2554 strb r5, [r4, r0] +1650:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 3555 .loc 1 1650 5 discriminator 2 view .LVU1124 +1652:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->Mode = HAL_I2C_MODE_MASTER; + 3556 .loc 1 1652 5 view .LVU1125 +1652:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->Mode = HAL_I2C_MODE_MASTER; + 3557 .loc 1 1652 23 is_stmt 0 view .LVU1126 + 3558 0024 0130 adds r0, r0, #1 + 3559 0026 2035 adds r5, r5, #32 + 3560 0028 2554 strb r5, [r4, r0] + ARM GAS /tmp/ccuRhBPx.s page 208 + + +1653:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->ErrorCode = HAL_I2C_ERROR_NONE; + 3561 .loc 1 1653 5 is_stmt 1 view .LVU1127 +1653:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->ErrorCode = HAL_I2C_ERROR_NONE; + 3562 .loc 1 1653 23 is_stmt 0 view .LVU1128 + 3563 002a 0130 adds r0, r0, #1 + 3564 002c 113D subs r5, r5, #17 + 3565 002e 2554 strb r5, [r4, r0] +1654:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 3566 .loc 1 1654 5 is_stmt 1 view .LVU1129 +1654:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 3567 .loc 1 1654 23 is_stmt 0 view .LVU1130 + 3568 0030 0020 movs r0, #0 + 3569 0032 6064 str r0, [r4, #68] +1657:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->XferCount = Size; + 3570 .loc 1 1657 5 is_stmt 1 view .LVU1131 +1657:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->XferCount = Size; + 3571 .loc 1 1657 23 is_stmt 0 view .LVU1132 + 3572 0034 6262 str r2, [r4, #36] +1658:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->XferOptions = I2C_NO_OPTION_FRAME; + 3573 .loc 1 1658 5 is_stmt 1 view .LVU1133 +1658:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->XferOptions = I2C_NO_OPTION_FRAME; + 3574 .loc 1 1658 23 is_stmt 0 view .LVU1134 + 3575 0036 6385 strh r3, [r4, #42] +1659:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->XferISR = I2C_Master_ISR_IT; + 3576 .loc 1 1659 5 is_stmt 1 view .LVU1135 +1659:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->XferISR = I2C_Master_ISR_IT; + 3577 .loc 1 1659 23 is_stmt 0 view .LVU1136 + 3578 0038 134B ldr r3, .L244 + 3579 .LVL242: +1659:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->XferISR = I2C_Master_ISR_IT; + 3580 .loc 1 1659 23 view .LVU1137 + 3581 003a E362 str r3, [r4, #44] + 3582 .LVL243: +1660:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 3583 .loc 1 1660 5 is_stmt 1 view .LVU1138 +1660:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 3584 .loc 1 1660 23 is_stmt 0 view .LVU1139 + 3585 003c 134B ldr r3, .L244+4 + 3586 003e 6363 str r3, [r4, #52] +1662:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { + 3587 .loc 1 1662 5 is_stmt 1 view .LVU1140 +1662:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { + 3588 .loc 1 1662 13 is_stmt 0 view .LVU1141 + 3589 0040 638D ldrh r3, [r4, #42] + 3590 0042 9BB2 uxth r3, r3 +1662:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { + 3591 .loc 1 1662 8 view .LVU1142 + 3592 0044 FF2B cmp r3, #255 + 3593 0046 14D9 bls .L239 +1664:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** xfermode = I2C_RELOAD_MODE; + 3594 .loc 1 1664 7 is_stmt 1 view .LVU1143 +1664:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** xfermode = I2C_RELOAD_MODE; + 3595 .loc 1 1664 22 is_stmt 0 view .LVU1144 + 3596 0048 FF23 movs r3, #255 + 3597 004a 2385 strh r3, [r4, #40] +1665:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } + 3598 .loc 1 1665 7 is_stmt 1 view .LVU1145 + ARM GAS /tmp/ccuRhBPx.s page 209 + + + 3599 .LVL244: +1665:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } + 3600 .loc 1 1665 16 is_stmt 0 view .LVU1146 + 3601 004c 8023 movs r3, #128 + 3602 004e 5B04 lsls r3, r3, #17 + 3603 .LVL245: + 3604 .L240: +1675:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 3605 .loc 1 1675 5 is_stmt 1 view .LVU1147 +1675:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 3606 .loc 1 1675 55 is_stmt 0 view .LVU1148 + 3607 0050 228D ldrh r2, [r4, #40] + 3608 .LVL246: +1675:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 3609 .loc 1 1675 5 view .LVU1149 + 3610 0052 D2B2 uxtb r2, r2 + 3611 0054 0E48 ldr r0, .L244+8 + 3612 0056 0090 str r0, [sp] + 3613 .LVL247: +1675:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 3614 .loc 1 1675 5 view .LVU1150 + 3615 0058 2000 movs r0, r4 + 3616 005a FFF7FEFF bl I2C_TransferConfig + 3617 .LVL248: +1678:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 3618 .loc 1 1678 5 is_stmt 1 view .LVU1151 +1678:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 3619 .loc 1 1678 5 view .LVU1152 + 3620 005e 4023 movs r3, #64 + 3621 0060 0022 movs r2, #0 + 3622 0062 E254 strb r2, [r4, r3] +1678:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 3623 .loc 1 1678 5 view .LVU1153 +1688:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 3624 .loc 1 1688 5 view .LVU1154 + 3625 0064 0121 movs r1, #1 + 3626 0066 2000 movs r0, r4 + 3627 0068 FFF7FEFF bl I2C_Enable_IRQ + 3628 .LVL249: +1690:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } + 3629 .loc 1 1690 5 view .LVU1155 +1690:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } + 3630 .loc 1 1690 12 is_stmt 0 view .LVU1156 + 3631 006c 0020 movs r0, #0 + 3632 .LVL250: + 3633 .L238: +1696:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 3634 .loc 1 1696 1 view .LVU1157 + 3635 006e 03B0 add sp, sp, #12 + 3636 @ sp needed + 3637 .LVL251: +1696:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 3638 .loc 1 1696 1 view .LVU1158 + 3639 0070 30BD pop {r4, r5, pc} + 3640 .LVL252: + 3641 .L239: +1669:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** xfermode = I2C_AUTOEND_MODE; + ARM GAS /tmp/ccuRhBPx.s page 210 + + + 3642 .loc 1 1669 7 is_stmt 1 view .LVU1159 +1669:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** xfermode = I2C_AUTOEND_MODE; + 3643 .loc 1 1669 28 is_stmt 0 view .LVU1160 + 3644 0072 638D ldrh r3, [r4, #42] +1669:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** xfermode = I2C_AUTOEND_MODE; + 3645 .loc 1 1669 22 view .LVU1161 + 3646 0074 2385 strh r3, [r4, #40] +1670:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } + 3647 .loc 1 1670 7 is_stmt 1 view .LVU1162 + 3648 .LVL253: +1670:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } + 3649 .loc 1 1670 16 is_stmt 0 view .LVU1163 + 3650 0076 8023 movs r3, #128 + 3651 0078 9B04 lsls r3, r3, #18 + 3652 007a E9E7 b .L240 + 3653 .LVL254: + 3654 .L241: +1694:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } + 3655 .loc 1 1694 12 view .LVU1164 + 3656 007c 0220 movs r0, #2 + 3657 007e F6E7 b .L238 + 3658 .L242: +1646:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } + 3659 .loc 1 1646 14 view .LVU1165 + 3660 0080 0220 movs r0, #2 + 3661 0082 F4E7 b .L238 + 3662 .L243: +1650:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 3663 .loc 1 1650 5 discriminator 1 view .LVU1166 + 3664 0084 0220 movs r0, #2 + 3665 0086 F2E7 b .L238 + 3666 .L245: + 3667 .align 2 + 3668 .L244: + 3669 0088 0000FFFF .word -65536 + 3670 008c 00000000 .word I2C_Master_ISR_IT + 3671 0090 00200080 .word -2147475456 + 3672 .cfi_endproc + 3673 .LFE48: + 3675 .section .text.HAL_I2C_Master_Receive_IT,"ax",%progbits + 3676 .align 1 + 3677 .global HAL_I2C_Master_Receive_IT + 3678 .syntax unified + 3679 .code 16 + 3680 .thumb_func + 3682 HAL_I2C_Master_Receive_IT: + 3683 .LVL255: + 3684 .LFB49: +1710:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** uint32_t xfermode; + 3685 .loc 1 1710 1 is_stmt 1 view -0 + 3686 .cfi_startproc + 3687 @ args = 0, pretend = 0, frame = 0 + 3688 @ frame_needed = 0, uses_anonymous_args = 0 +1710:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** uint32_t xfermode; + 3689 .loc 1 1710 1 is_stmt 0 view .LVU1168 + 3690 0000 30B5 push {r4, r5, lr} + 3691 .cfi_def_cfa_offset 12 + ARM GAS /tmp/ccuRhBPx.s page 211 + + + 3692 .cfi_offset 4, -12 + 3693 .cfi_offset 5, -8 + 3694 .cfi_offset 14, -4 + 3695 0002 83B0 sub sp, sp, #12 + 3696 .cfi_def_cfa_offset 24 + 3697 0004 0400 movs r4, r0 +1711:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 3698 .loc 1 1711 3 is_stmt 1 view .LVU1169 +1713:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { + 3699 .loc 1 1713 3 view .LVU1170 +1713:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { + 3700 .loc 1 1713 11 is_stmt 0 view .LVU1171 + 3701 0006 4120 movs r0, #65 + 3702 .LVL256: +1713:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { + 3703 .loc 1 1713 11 view .LVU1172 + 3704 0008 205C ldrb r0, [r4, r0] +1713:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { + 3705 .loc 1 1713 6 view .LVU1173 + 3706 000a 2028 cmp r0, #32 + 3707 000c 36D1 bne .L250 +1715:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { + 3708 .loc 1 1715 5 is_stmt 1 view .LVU1174 +1715:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { + 3709 .loc 1 1715 9 is_stmt 0 view .LVU1175 + 3710 000e 2068 ldr r0, [r4] + 3711 0010 8069 ldr r0, [r0, #24] +1715:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { + 3712 .loc 1 1715 8 view .LVU1176 + 3713 0012 0004 lsls r0, r0, #16 + 3714 0014 34D4 bmi .L251 +1721:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 3715 .loc 1 1721 5 is_stmt 1 view .LVU1177 +1721:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 3716 .loc 1 1721 5 view .LVU1178 + 3717 0016 4020 movs r0, #64 + 3718 0018 205C ldrb r0, [r4, r0] + 3719 001a 0128 cmp r0, #1 + 3720 001c 32D0 beq .L252 +1721:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 3721 .loc 1 1721 5 discriminator 2 view .LVU1179 + 3722 001e 4020 movs r0, #64 + 3723 0020 0125 movs r5, #1 + 3724 0022 2554 strb r5, [r4, r0] +1721:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 3725 .loc 1 1721 5 discriminator 2 view .LVU1180 +1723:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->Mode = HAL_I2C_MODE_MASTER; + 3726 .loc 1 1723 5 view .LVU1181 +1723:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->Mode = HAL_I2C_MODE_MASTER; + 3727 .loc 1 1723 23 is_stmt 0 view .LVU1182 + 3728 0024 0130 adds r0, r0, #1 + 3729 0026 2135 adds r5, r5, #33 + 3730 0028 2554 strb r5, [r4, r0] +1724:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->ErrorCode = HAL_I2C_ERROR_NONE; + 3731 .loc 1 1724 5 is_stmt 1 view .LVU1183 +1724:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->ErrorCode = HAL_I2C_ERROR_NONE; + 3732 .loc 1 1724 23 is_stmt 0 view .LVU1184 + ARM GAS /tmp/ccuRhBPx.s page 212 + + + 3733 002a 0130 adds r0, r0, #1 + 3734 002c 123D subs r5, r5, #18 + 3735 002e 2554 strb r5, [r4, r0] +1725:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 3736 .loc 1 1725 5 is_stmt 1 view .LVU1185 +1725:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 3737 .loc 1 1725 23 is_stmt 0 view .LVU1186 + 3738 0030 0020 movs r0, #0 + 3739 0032 6064 str r0, [r4, #68] +1728:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->XferCount = Size; + 3740 .loc 1 1728 5 is_stmt 1 view .LVU1187 +1728:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->XferCount = Size; + 3741 .loc 1 1728 23 is_stmt 0 view .LVU1188 + 3742 0034 6262 str r2, [r4, #36] +1729:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->XferOptions = I2C_NO_OPTION_FRAME; + 3743 .loc 1 1729 5 is_stmt 1 view .LVU1189 +1729:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->XferOptions = I2C_NO_OPTION_FRAME; + 3744 .loc 1 1729 23 is_stmt 0 view .LVU1190 + 3745 0036 6385 strh r3, [r4, #42] +1730:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->XferISR = I2C_Master_ISR_IT; + 3746 .loc 1 1730 5 is_stmt 1 view .LVU1191 +1730:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->XferISR = I2C_Master_ISR_IT; + 3747 .loc 1 1730 23 is_stmt 0 view .LVU1192 + 3748 0038 134B ldr r3, .L253 + 3749 .LVL257: +1730:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->XferISR = I2C_Master_ISR_IT; + 3750 .loc 1 1730 23 view .LVU1193 + 3751 003a E362 str r3, [r4, #44] + 3752 .LVL258: +1731:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 3753 .loc 1 1731 5 is_stmt 1 view .LVU1194 +1731:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 3754 .loc 1 1731 23 is_stmt 0 view .LVU1195 + 3755 003c 134B ldr r3, .L253+4 + 3756 003e 6363 str r3, [r4, #52] +1733:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { + 3757 .loc 1 1733 5 is_stmt 1 view .LVU1196 +1733:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { + 3758 .loc 1 1733 13 is_stmt 0 view .LVU1197 + 3759 0040 638D ldrh r3, [r4, #42] + 3760 0042 9BB2 uxth r3, r3 +1733:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { + 3761 .loc 1 1733 8 view .LVU1198 + 3762 0044 FF2B cmp r3, #255 + 3763 0046 14D9 bls .L248 +1735:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** xfermode = I2C_RELOAD_MODE; + 3764 .loc 1 1735 7 is_stmt 1 view .LVU1199 +1735:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** xfermode = I2C_RELOAD_MODE; + 3765 .loc 1 1735 22 is_stmt 0 view .LVU1200 + 3766 0048 FF23 movs r3, #255 + 3767 004a 2385 strh r3, [r4, #40] +1736:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } + 3768 .loc 1 1736 7 is_stmt 1 view .LVU1201 + 3769 .LVL259: +1736:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } + 3770 .loc 1 1736 16 is_stmt 0 view .LVU1202 + 3771 004c 8023 movs r3, #128 + ARM GAS /tmp/ccuRhBPx.s page 213 + + + 3772 004e 5B04 lsls r3, r3, #17 + 3773 .LVL260: + 3774 .L249: +1746:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 3775 .loc 1 1746 5 is_stmt 1 view .LVU1203 +1746:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 3776 .loc 1 1746 55 is_stmt 0 view .LVU1204 + 3777 0050 228D ldrh r2, [r4, #40] + 3778 .LVL261: +1746:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 3779 .loc 1 1746 5 view .LVU1205 + 3780 0052 D2B2 uxtb r2, r2 + 3781 0054 0E48 ldr r0, .L253+8 + 3782 0056 0090 str r0, [sp] + 3783 .LVL262: +1746:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 3784 .loc 1 1746 5 view .LVU1206 + 3785 0058 2000 movs r0, r4 + 3786 005a FFF7FEFF bl I2C_TransferConfig + 3787 .LVL263: +1749:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 3788 .loc 1 1749 5 is_stmt 1 view .LVU1207 +1749:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 3789 .loc 1 1749 5 view .LVU1208 + 3790 005e 4023 movs r3, #64 + 3791 0060 0022 movs r2, #0 + 3792 0062 E254 strb r2, [r4, r3] +1749:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 3793 .loc 1 1749 5 view .LVU1209 +1759:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 3794 .loc 1 1759 5 view .LVU1210 + 3795 0064 0221 movs r1, #2 + 3796 0066 2000 movs r0, r4 + 3797 0068 FFF7FEFF bl I2C_Enable_IRQ + 3798 .LVL264: +1761:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } + 3799 .loc 1 1761 5 view .LVU1211 +1761:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } + 3800 .loc 1 1761 12 is_stmt 0 view .LVU1212 + 3801 006c 0020 movs r0, #0 + 3802 .LVL265: + 3803 .L247: +1767:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 3804 .loc 1 1767 1 view .LVU1213 + 3805 006e 03B0 add sp, sp, #12 + 3806 @ sp needed + 3807 .LVL266: +1767:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 3808 .loc 1 1767 1 view .LVU1214 + 3809 0070 30BD pop {r4, r5, pc} + 3810 .LVL267: + 3811 .L248: +1740:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** xfermode = I2C_AUTOEND_MODE; + 3812 .loc 1 1740 7 is_stmt 1 view .LVU1215 +1740:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** xfermode = I2C_AUTOEND_MODE; + 3813 .loc 1 1740 28 is_stmt 0 view .LVU1216 + 3814 0072 638D ldrh r3, [r4, #42] + ARM GAS /tmp/ccuRhBPx.s page 214 + + +1740:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** xfermode = I2C_AUTOEND_MODE; + 3815 .loc 1 1740 22 view .LVU1217 + 3816 0074 2385 strh r3, [r4, #40] +1741:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } + 3817 .loc 1 1741 7 is_stmt 1 view .LVU1218 + 3818 .LVL268: +1741:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } + 3819 .loc 1 1741 16 is_stmt 0 view .LVU1219 + 3820 0076 8023 movs r3, #128 + 3821 0078 9B04 lsls r3, r3, #18 + 3822 007a E9E7 b .L249 + 3823 .LVL269: + 3824 .L250: +1765:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } + 3825 .loc 1 1765 12 view .LVU1220 + 3826 007c 0220 movs r0, #2 + 3827 007e F6E7 b .L247 + 3828 .L251: +1717:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } + 3829 .loc 1 1717 14 view .LVU1221 + 3830 0080 0220 movs r0, #2 + 3831 0082 F4E7 b .L247 + 3832 .L252: +1721:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 3833 .loc 1 1721 5 discriminator 1 view .LVU1222 + 3834 0084 0220 movs r0, #2 + 3835 0086 F2E7 b .L247 + 3836 .L254: + 3837 .align 2 + 3838 .L253: + 3839 0088 0000FFFF .word -65536 + 3840 008c 00000000 .word I2C_Master_ISR_IT + 3841 0090 00240080 .word -2147474432 + 3842 .cfi_endproc + 3843 .LFE49: + 3845 .section .text.HAL_I2C_Slave_Transmit_IT,"ax",%progbits + 3846 .align 1 + 3847 .global HAL_I2C_Slave_Transmit_IT + 3848 .syntax unified + 3849 .code 16 + 3850 .thumb_func + 3852 HAL_I2C_Slave_Transmit_IT: + 3853 .LVL270: + 3854 .LFB50: +1778:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** if (hi2c->State == HAL_I2C_STATE_READY) + 3855 .loc 1 1778 1 is_stmt 1 view -0 + 3856 .cfi_startproc + 3857 @ args = 0, pretend = 0, frame = 0 + 3858 @ frame_needed = 0, uses_anonymous_args = 0 +1778:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** if (hi2c->State == HAL_I2C_STATE_READY) + 3859 .loc 1 1778 1 is_stmt 0 view .LVU1224 + 3860 0000 70B5 push {r4, r5, r6, lr} + 3861 .cfi_def_cfa_offset 16 + 3862 .cfi_offset 4, -16 + 3863 .cfi_offset 5, -12 + 3864 .cfi_offset 6, -8 + 3865 .cfi_offset 14, -4 + ARM GAS /tmp/ccuRhBPx.s page 215 + + +1779:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { + 3866 .loc 1 1779 3 is_stmt 1 view .LVU1225 +1779:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { + 3867 .loc 1 1779 11 is_stmt 0 view .LVU1226 + 3868 0002 4123 movs r3, #65 + 3869 0004 C35C ldrb r3, [r0, r3] +1779:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { + 3870 .loc 1 1779 6 view .LVU1227 + 3871 0006 202B cmp r3, #32 + 3872 0008 36D1 bne .L258 +1782:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 3873 .loc 1 1782 5 is_stmt 1 view .LVU1228 +1782:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 3874 .loc 1 1782 5 view .LVU1229 + 3875 000a 2033 adds r3, r3, #32 + 3876 000c C35C ldrb r3, [r0, r3] + 3877 000e 012B cmp r3, #1 + 3878 0010 34D0 beq .L259 +1782:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 3879 .loc 1 1782 5 discriminator 2 view .LVU1230 + 3880 0012 4023 movs r3, #64 + 3881 0014 0124 movs r4, #1 + 3882 0016 C454 strb r4, [r0, r3] +1782:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 3883 .loc 1 1782 5 discriminator 2 view .LVU1231 +1784:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->Mode = HAL_I2C_MODE_SLAVE; + 3884 .loc 1 1784 5 view .LVU1232 +1784:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->Mode = HAL_I2C_MODE_SLAVE; + 3885 .loc 1 1784 23 is_stmt 0 view .LVU1233 + 3886 0018 0133 adds r3, r3, #1 + 3887 001a 2034 adds r4, r4, #32 + 3888 001c C454 strb r4, [r0, r3] +1785:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->ErrorCode = HAL_I2C_ERROR_NONE; + 3889 .loc 1 1785 5 is_stmt 1 view .LVU1234 +1785:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->ErrorCode = HAL_I2C_ERROR_NONE; + 3890 .loc 1 1785 23 is_stmt 0 view .LVU1235 + 3891 001e 0133 adds r3, r3, #1 + 3892 0020 013C subs r4, r4, #1 + 3893 0022 C454 strb r4, [r0, r3] +1786:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 3894 .loc 1 1786 5 is_stmt 1 view .LVU1236 +1786:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 3895 .loc 1 1786 23 is_stmt 0 view .LVU1237 + 3896 0024 0023 movs r3, #0 + 3897 0026 4364 str r3, [r0, #68] +1789:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 3898 .loc 1 1789 5 is_stmt 1 view .LVU1238 +1789:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 3899 .loc 1 1789 9 is_stmt 0 view .LVU1239 + 3900 0028 0468 ldr r4, [r0] +1789:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 3901 .loc 1 1789 19 view .LVU1240 + 3902 002a 6368 ldr r3, [r4, #4] +1789:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 3903 .loc 1 1789 25 view .LVU1241 + 3904 002c 144D ldr r5, .L261 + 3905 002e 2B40 ands r3, r5 + ARM GAS /tmp/ccuRhBPx.s page 216 + + + 3906 0030 6360 str r3, [r4, #4] +1792:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->XferCount = Size; + 3907 .loc 1 1792 5 is_stmt 1 view .LVU1242 +1792:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->XferCount = Size; + 3908 .loc 1 1792 23 is_stmt 0 view .LVU1243 + 3909 0032 4162 str r1, [r0, #36] +1793:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->XferSize = hi2c->XferCount; + 3910 .loc 1 1793 5 is_stmt 1 view .LVU1244 +1793:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->XferSize = hi2c->XferCount; + 3911 .loc 1 1793 23 is_stmt 0 view .LVU1245 + 3912 0034 4285 strh r2, [r0, #42] +1794:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->XferOptions = I2C_NO_OPTION_FRAME; + 3913 .loc 1 1794 5 is_stmt 1 view .LVU1246 +1794:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->XferOptions = I2C_NO_OPTION_FRAME; + 3914 .loc 1 1794 29 is_stmt 0 view .LVU1247 + 3915 0036 438D ldrh r3, [r0, #42] +1794:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->XferOptions = I2C_NO_OPTION_FRAME; + 3916 .loc 1 1794 23 view .LVU1248 + 3917 0038 0385 strh r3, [r0, #40] +1795:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->XferISR = I2C_Slave_ISR_IT; + 3918 .loc 1 1795 5 is_stmt 1 view .LVU1249 +1795:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->XferISR = I2C_Slave_ISR_IT; + 3919 .loc 1 1795 23 is_stmt 0 view .LVU1250 + 3920 003a 124B ldr r3, .L261+4 + 3921 003c C362 str r3, [r0, #44] +1796:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 3922 .loc 1 1796 5 is_stmt 1 view .LVU1251 +1796:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 3923 .loc 1 1796 23 is_stmt 0 view .LVU1252 + 3924 003e 124B ldr r3, .L261+8 + 3925 0040 4363 str r3, [r0, #52] +1799:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { + 3926 .loc 1 1799 5 is_stmt 1 view .LVU1253 +1799:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { + 3927 .loc 1 1799 19 is_stmt 0 view .LVU1254 + 3928 0042 026A ldr r2, [r0, #32] + 3929 .LVL271: +1799:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { + 3930 .loc 1 1799 8 view .LVU1255 + 3931 0044 8023 movs r3, #128 + 3932 0046 9B02 lsls r3, r3, #10 + 3933 0048 9A42 cmp r2, r3 + 3934 004a 07D0 beq .L260 + 3935 .L257: +1813:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 3936 .loc 1 1813 5 is_stmt 1 view .LVU1256 +1813:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 3937 .loc 1 1813 5 view .LVU1257 + 3938 004c 4023 movs r3, #64 + 3939 004e 0022 movs r2, #0 + 3940 0050 C254 strb r2, [r0, r3] +1813:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 3941 .loc 1 1813 5 view .LVU1258 +1823:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 3942 .loc 1 1823 5 view .LVU1259 + 3943 0052 0E49 ldr r1, .L261+12 + 3944 .LVL272: + ARM GAS /tmp/ccuRhBPx.s page 217 + + +1823:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 3945 .loc 1 1823 5 is_stmt 0 view .LVU1260 + 3946 0054 FFF7FEFF bl I2C_Enable_IRQ + 3947 .LVL273: +1825:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } + 3948 .loc 1 1825 5 is_stmt 1 view .LVU1261 +1825:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } + 3949 .loc 1 1825 12 is_stmt 0 view .LVU1262 + 3950 0058 0020 movs r0, #0 + 3951 .L256: +1831:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 3952 .loc 1 1831 1 view .LVU1263 + 3953 @ sp needed + 3954 005a 70BD pop {r4, r5, r6, pc} + 3955 .LVL274: + 3956 .L260: +1803:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 3957 .loc 1 1803 7 is_stmt 1 view .LVU1264 +1803:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 3958 .loc 1 1803 11 is_stmt 0 view .LVU1265 + 3959 005c 0368 ldr r3, [r0] +1803:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 3960 .loc 1 1803 30 view .LVU1266 + 3961 005e 0A78 ldrb r2, [r1] +1803:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 3962 .loc 1 1803 28 view .LVU1267 + 3963 0060 9A62 str r2, [r3, #40] +1806:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 3964 .loc 1 1806 7 is_stmt 1 view .LVU1268 +1806:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 3965 .loc 1 1806 11 is_stmt 0 view .LVU1269 + 3966 0062 436A ldr r3, [r0, #36] +1806:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 3967 .loc 1 1806 21 view .LVU1270 + 3968 0064 0133 adds r3, r3, #1 + 3969 0066 4362 str r3, [r0, #36] +1808:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->XferSize--; + 3970 .loc 1 1808 7 is_stmt 1 view .LVU1271 +1808:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->XferSize--; + 3971 .loc 1 1808 11 is_stmt 0 view .LVU1272 + 3972 0068 438D ldrh r3, [r0, #42] +1808:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->XferSize--; + 3973 .loc 1 1808 22 view .LVU1273 + 3974 006a 013B subs r3, r3, #1 + 3975 006c 9BB2 uxth r3, r3 + 3976 006e 4385 strh r3, [r0, #42] +1809:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } + 3977 .loc 1 1809 7 is_stmt 1 view .LVU1274 +1809:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } + 3978 .loc 1 1809 11 is_stmt 0 view .LVU1275 + 3979 0070 038D ldrh r3, [r0, #40] +1809:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } + 3980 .loc 1 1809 21 view .LVU1276 + 3981 0072 013B subs r3, r3, #1 + 3982 0074 0385 strh r3, [r0, #40] + 3983 0076 E9E7 b .L257 + 3984 .LVL275: + ARM GAS /tmp/ccuRhBPx.s page 218 + + + 3985 .L258: +1829:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } + 3986 .loc 1 1829 12 view .LVU1277 + 3987 0078 0220 movs r0, #2 + 3988 .LVL276: +1829:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } + 3989 .loc 1 1829 12 view .LVU1278 + 3990 007a EEE7 b .L256 + 3991 .LVL277: + 3992 .L259: +1782:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 3993 .loc 1 1782 5 discriminator 1 view .LVU1279 + 3994 007c 0220 movs r0, #2 + 3995 .LVL278: +1782:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 3996 .loc 1 1782 5 discriminator 1 view .LVU1280 + 3997 007e ECE7 b .L256 + 3998 .L262: + 3999 .align 2 + 4000 .L261: + 4001 0080 FF7FFFFF .word -32769 + 4002 0084 0000FFFF .word -65536 + 4003 0088 00000000 .word I2C_Slave_ISR_IT + 4004 008c 01800000 .word 32769 + 4005 .cfi_endproc + 4006 .LFE50: + 4008 .section .text.HAL_I2C_Slave_Receive_IT,"ax",%progbits + 4009 .align 1 + 4010 .global HAL_I2C_Slave_Receive_IT + 4011 .syntax unified + 4012 .code 16 + 4013 .thumb_func + 4015 HAL_I2C_Slave_Receive_IT: + 4016 .LVL279: + 4017 .LFB51: +1842:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** if (hi2c->State == HAL_I2C_STATE_READY) + 4018 .loc 1 1842 1 is_stmt 1 view -0 + 4019 .cfi_startproc + 4020 @ args = 0, pretend = 0, frame = 0 + 4021 @ frame_needed = 0, uses_anonymous_args = 0 +1842:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** if (hi2c->State == HAL_I2C_STATE_READY) + 4022 .loc 1 1842 1 is_stmt 0 view .LVU1282 + 4023 0000 F8B5 push {r3, r4, r5, r6, r7, lr} + 4024 .cfi_def_cfa_offset 24 + 4025 .cfi_offset 3, -24 + 4026 .cfi_offset 4, -20 + 4027 .cfi_offset 5, -16 + 4028 .cfi_offset 6, -12 + 4029 .cfi_offset 7, -8 + 4030 .cfi_offset 14, -4 +1843:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { + 4031 .loc 1 1843 3 is_stmt 1 view .LVU1283 +1843:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { + 4032 .loc 1 1843 11 is_stmt 0 view .LVU1284 + 4033 0002 4123 movs r3, #65 + 4034 0004 C35C ldrb r3, [r0, r3] +1843:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { + ARM GAS /tmp/ccuRhBPx.s page 219 + + + 4035 .loc 1 1843 6 view .LVU1285 + 4036 0006 202B cmp r3, #32 + 4037 0008 21D1 bne .L265 +1846:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 4038 .loc 1 1846 5 is_stmt 1 view .LVU1286 +1846:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 4039 .loc 1 1846 5 view .LVU1287 + 4040 000a 2033 adds r3, r3, #32 + 4041 000c C35C ldrb r3, [r0, r3] + 4042 000e 012B cmp r3, #1 + 4043 0010 1FD0 beq .L266 +1846:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 4044 .loc 1 1846 5 discriminator 2 view .LVU1288 + 4045 0012 4024 movs r4, #64 + 4046 0014 0123 movs r3, #1 + 4047 0016 0355 strb r3, [r0, r4] +1846:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 4048 .loc 1 1846 5 discriminator 2 view .LVU1289 +1848:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->Mode = HAL_I2C_MODE_SLAVE; + 4049 .loc 1 1848 5 view .LVU1290 +1848:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->Mode = HAL_I2C_MODE_SLAVE; + 4050 .loc 1 1848 23 is_stmt 0 view .LVU1291 + 4051 0018 4033 adds r3, r3, #64 + 4052 001a 2225 movs r5, #34 + 4053 001c C554 strb r5, [r0, r3] +1849:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->ErrorCode = HAL_I2C_ERROR_NONE; + 4054 .loc 1 1849 5 is_stmt 1 view .LVU1292 +1849:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->ErrorCode = HAL_I2C_ERROR_NONE; + 4055 .loc 1 1849 23 is_stmt 0 view .LVU1293 + 4056 001e 0133 adds r3, r3, #1 + 4057 0020 023D subs r5, r5, #2 + 4058 0022 C554 strb r5, [r0, r3] +1850:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 4059 .loc 1 1850 5 is_stmt 1 view .LVU1294 +1850:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 4060 .loc 1 1850 23 is_stmt 0 view .LVU1295 + 4061 0024 0025 movs r5, #0 + 4062 0026 4564 str r5, [r0, #68] +1853:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 4063 .loc 1 1853 5 is_stmt 1 view .LVU1296 +1853:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 4064 .loc 1 1853 9 is_stmt 0 view .LVU1297 + 4065 0028 0668 ldr r6, [r0] +1853:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 4066 .loc 1 1853 19 view .LVU1298 + 4067 002a 7368 ldr r3, [r6, #4] +1853:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 4068 .loc 1 1853 25 view .LVU1299 + 4069 002c 0A4F ldr r7, .L267 + 4070 002e 3B40 ands r3, r7 + 4071 0030 7360 str r3, [r6, #4] +1856:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->XferCount = Size; + 4072 .loc 1 1856 5 is_stmt 1 view .LVU1300 +1856:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->XferCount = Size; + 4073 .loc 1 1856 23 is_stmt 0 view .LVU1301 + 4074 0032 4162 str r1, [r0, #36] +1857:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->XferSize = hi2c->XferCount; + ARM GAS /tmp/ccuRhBPx.s page 220 + + + 4075 .loc 1 1857 5 is_stmt 1 view .LVU1302 +1857:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->XferSize = hi2c->XferCount; + 4076 .loc 1 1857 23 is_stmt 0 view .LVU1303 + 4077 0034 4285 strh r2, [r0, #42] +1858:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->XferOptions = I2C_NO_OPTION_FRAME; + 4078 .loc 1 1858 5 is_stmt 1 view .LVU1304 +1858:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->XferOptions = I2C_NO_OPTION_FRAME; + 4079 .loc 1 1858 29 is_stmt 0 view .LVU1305 + 4080 0036 438D ldrh r3, [r0, #42] +1858:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->XferOptions = I2C_NO_OPTION_FRAME; + 4081 .loc 1 1858 23 view .LVU1306 + 4082 0038 0385 strh r3, [r0, #40] +1859:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->XferISR = I2C_Slave_ISR_IT; + 4083 .loc 1 1859 5 is_stmt 1 view .LVU1307 +1859:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->XferISR = I2C_Slave_ISR_IT; + 4084 .loc 1 1859 23 is_stmt 0 view .LVU1308 + 4085 003a 084B ldr r3, .L267+4 + 4086 003c C362 str r3, [r0, #44] +1860:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 4087 .loc 1 1860 5 is_stmt 1 view .LVU1309 +1860:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 4088 .loc 1 1860 23 is_stmt 0 view .LVU1310 + 4089 003e 084B ldr r3, .L267+8 + 4090 0040 4363 str r3, [r0, #52] +1863:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 4091 .loc 1 1863 5 is_stmt 1 view .LVU1311 +1863:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 4092 .loc 1 1863 5 view .LVU1312 + 4093 0042 0555 strb r5, [r0, r4] +1863:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 4094 .loc 1 1863 5 view .LVU1313 +1873:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 4095 .loc 1 1873 5 view .LVU1314 + 4096 0044 0749 ldr r1, .L267+12 + 4097 .LVL280: +1873:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 4098 .loc 1 1873 5 is_stmt 0 view .LVU1315 + 4099 0046 FFF7FEFF bl I2C_Enable_IRQ + 4100 .LVL281: +1875:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } + 4101 .loc 1 1875 5 is_stmt 1 view .LVU1316 +1875:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } + 4102 .loc 1 1875 12 is_stmt 0 view .LVU1317 + 4103 004a 0020 movs r0, #0 + 4104 .L264: +1881:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 4105 .loc 1 1881 1 view .LVU1318 + 4106 @ sp needed + 4107 004c F8BD pop {r3, r4, r5, r6, r7, pc} + 4108 .LVL282: + 4109 .L265: +1879:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } + 4110 .loc 1 1879 12 view .LVU1319 + 4111 004e 0220 movs r0, #2 + 4112 .LVL283: +1879:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } + 4113 .loc 1 1879 12 view .LVU1320 + ARM GAS /tmp/ccuRhBPx.s page 221 + + + 4114 0050 FCE7 b .L264 + 4115 .LVL284: + 4116 .L266: +1846:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 4117 .loc 1 1846 5 discriminator 1 view .LVU1321 + 4118 0052 0220 movs r0, #2 + 4119 .LVL285: +1846:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 4120 .loc 1 1846 5 discriminator 1 view .LVU1322 + 4121 0054 FAE7 b .L264 + 4122 .L268: + 4123 0056 C046 .align 2 + 4124 .L267: + 4125 0058 FF7FFFFF .word -32769 + 4126 005c 0000FFFF .word -65536 + 4127 0060 00000000 .word I2C_Slave_ISR_IT + 4128 0064 02800000 .word 32770 + 4129 .cfi_endproc + 4130 .LFE51: + 4132 .section .text.HAL_I2C_Master_Transmit_DMA,"ax",%progbits + 4133 .align 1 + 4134 .global HAL_I2C_Master_Transmit_DMA + 4135 .syntax unified + 4136 .code 16 + 4137 .thumb_func + 4139 HAL_I2C_Master_Transmit_DMA: + 4140 .LVL286: + 4141 .LFB52: +1895:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** uint32_t xfermode; + 4142 .loc 1 1895 1 is_stmt 1 view -0 + 4143 .cfi_startproc + 4144 @ args = 0, pretend = 0, frame = 0 + 4145 @ frame_needed = 0, uses_anonymous_args = 0 +1895:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** uint32_t xfermode; + 4146 .loc 1 1895 1 is_stmt 0 view .LVU1324 + 4147 0000 F0B5 push {r4, r5, r6, r7, lr} + 4148 .cfi_def_cfa_offset 20 + 4149 .cfi_offset 4, -20 + 4150 .cfi_offset 5, -16 + 4151 .cfi_offset 6, -12 + 4152 .cfi_offset 7, -8 + 4153 .cfi_offset 14, -4 + 4154 0002 83B0 sub sp, sp, #12 + 4155 .cfi_def_cfa_offset 32 + 4156 0004 0400 movs r4, r0 + 4157 0006 0E00 movs r6, r1 + 4158 0008 1500 movs r5, r2 +1896:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** HAL_StatusTypeDef dmaxferstatus; + 4159 .loc 1 1896 3 is_stmt 1 view .LVU1325 +1897:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 4160 .loc 1 1897 3 view .LVU1326 +1899:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { + 4161 .loc 1 1899 3 view .LVU1327 +1899:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { + 4162 .loc 1 1899 11 is_stmt 0 view .LVU1328 + 4163 000a 4122 movs r2, #65 + 4164 .LVL287: + ARM GAS /tmp/ccuRhBPx.s page 222 + + +1899:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { + 4165 .loc 1 1899 11 view .LVU1329 + 4166 000c 825C ldrb r2, [r0, r2] +1899:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { + 4167 .loc 1 1899 6 view .LVU1330 + 4168 000e 202A cmp r2, #32 + 4169 0010 00D0 beq .LCB3933 + 4170 0012 8CE0 b .L278 @long jump + 4171 .LCB3933: +1901:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { + 4172 .loc 1 1901 5 is_stmt 1 view .LVU1331 +1901:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { + 4173 .loc 1 1901 9 is_stmt 0 view .LVU1332 + 4174 0014 0268 ldr r2, [r0] + 4175 0016 9269 ldr r2, [r2, #24] +1901:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { + 4176 .loc 1 1901 8 view .LVU1333 + 4177 0018 1204 lsls r2, r2, #16 + 4178 001a 00D5 bpl .LCB3940 + 4179 001c 8AE0 b .L279 @long jump + 4180 .LCB3940: +1907:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 4181 .loc 1 1907 5 is_stmt 1 view .LVU1334 +1907:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 4182 .loc 1 1907 5 view .LVU1335 + 4183 001e 4022 movs r2, #64 + 4184 0020 825C ldrb r2, [r0, r2] + 4185 0022 012A cmp r2, #1 + 4186 0024 00D1 bne .LCB3946 + 4187 0026 87E0 b .L280 @long jump + 4188 .LCB3946: +1907:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 4189 .loc 1 1907 5 discriminator 2 view .LVU1336 + 4190 0028 4022 movs r2, #64 + 4191 002a 0121 movs r1, #1 + 4192 .LVL288: +1907:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 4193 .loc 1 1907 5 is_stmt 0 discriminator 2 view .LVU1337 + 4194 002c 8154 strb r1, [r0, r2] +1907:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 4195 .loc 1 1907 5 is_stmt 1 discriminator 2 view .LVU1338 +1909:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->Mode = HAL_I2C_MODE_MASTER; + 4196 .loc 1 1909 5 view .LVU1339 +1909:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->Mode = HAL_I2C_MODE_MASTER; + 4197 .loc 1 1909 23 is_stmt 0 view .LVU1340 + 4198 002e 0132 adds r2, r2, #1 + 4199 0030 2031 adds r1, r1, #32 + 4200 0032 8154 strb r1, [r0, r2] +1910:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->ErrorCode = HAL_I2C_ERROR_NONE; + 4201 .loc 1 1910 5 is_stmt 1 view .LVU1341 +1910:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->ErrorCode = HAL_I2C_ERROR_NONE; + 4202 .loc 1 1910 23 is_stmt 0 view .LVU1342 + 4203 0034 0132 adds r2, r2, #1 + 4204 0036 1139 subs r1, r1, #17 + 4205 0038 8154 strb r1, [r0, r2] +1911:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 4206 .loc 1 1911 5 is_stmt 1 view .LVU1343 + ARM GAS /tmp/ccuRhBPx.s page 223 + + +1911:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 4207 .loc 1 1911 23 is_stmt 0 view .LVU1344 + 4208 003a 0022 movs r2, #0 + 4209 003c 4264 str r2, [r0, #68] +1914:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->XferCount = Size; + 4210 .loc 1 1914 5 is_stmt 1 view .LVU1345 +1914:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->XferCount = Size; + 4211 .loc 1 1914 23 is_stmt 0 view .LVU1346 + 4212 003e 4562 str r5, [r0, #36] +1915:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->XferOptions = I2C_NO_OPTION_FRAME; + 4213 .loc 1 1915 5 is_stmt 1 view .LVU1347 +1915:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->XferOptions = I2C_NO_OPTION_FRAME; + 4214 .loc 1 1915 23 is_stmt 0 view .LVU1348 + 4215 0040 4385 strh r3, [r0, #42] +1916:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->XferISR = I2C_Master_ISR_DMA; + 4216 .loc 1 1916 5 is_stmt 1 view .LVU1349 +1916:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->XferISR = I2C_Master_ISR_DMA; + 4217 .loc 1 1916 23 is_stmt 0 view .LVU1350 + 4218 0042 3E4B ldr r3, .L283 + 4219 .LVL289: +1916:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->XferISR = I2C_Master_ISR_DMA; + 4220 .loc 1 1916 23 view .LVU1351 + 4221 0044 C362 str r3, [r0, #44] + 4222 .LVL290: +1917:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 4223 .loc 1 1917 5 is_stmt 1 view .LVU1352 +1917:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 4224 .loc 1 1917 23 is_stmt 0 view .LVU1353 + 4225 0046 3E4B ldr r3, .L283+4 + 4226 0048 4363 str r3, [r0, #52] +1919:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { + 4227 .loc 1 1919 5 is_stmt 1 view .LVU1354 +1919:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { + 4228 .loc 1 1919 13 is_stmt 0 view .LVU1355 + 4229 004a 438D ldrh r3, [r0, #42] + 4230 004c 9BB2 uxth r3, r3 +1919:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { + 4231 .loc 1 1919 8 view .LVU1356 + 4232 004e FF2B cmp r3, #255 + 4233 0050 2AD9 bls .L271 +1921:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** xfermode = I2C_RELOAD_MODE; + 4234 .loc 1 1921 7 is_stmt 1 view .LVU1357 +1921:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** xfermode = I2C_RELOAD_MODE; + 4235 .loc 1 1921 22 is_stmt 0 view .LVU1358 + 4236 0052 FF23 movs r3, #255 + 4237 0054 0385 strh r3, [r0, #40] +1922:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } + 4238 .loc 1 1922 7 is_stmt 1 view .LVU1359 + 4239 .LVL291: +1922:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } + 4240 .loc 1 1922 16 is_stmt 0 view .LVU1360 + 4241 0056 8027 movs r7, #128 + 4242 0058 7F04 lsls r7, r7, #17 + 4243 .LVL292: + 4244 .L272: +1930:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { + 4245 .loc 1 1930 5 is_stmt 1 view .LVU1361 + ARM GAS /tmp/ccuRhBPx.s page 224 + + +1930:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { + 4246 .loc 1 1930 13 is_stmt 0 view .LVU1362 + 4247 005a 228D ldrh r2, [r4, #40] +1930:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { + 4248 .loc 1 1930 8 view .LVU1363 + 4249 005c 002A cmp r2, #0 + 4250 005e 52D0 beq .L273 +1932:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { + 4251 .loc 1 1932 7 is_stmt 1 view .LVU1364 +1932:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { + 4252 .loc 1 1932 15 is_stmt 0 view .LVU1365 + 4253 0060 A36B ldr r3, [r4, #56] +1932:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { + 4254 .loc 1 1932 10 view .LVU1366 + 4255 0062 002B cmp r3, #0 + 4256 0064 25D0 beq .L274 +1935:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 4257 .loc 1 1935 9 is_stmt 1 view .LVU1367 +1935:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 4258 .loc 1 1935 40 is_stmt 0 view .LVU1368 + 4259 0066 374A ldr r2, .L283+8 + 4260 0068 9A62 str r2, [r3, #40] +1938:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 4261 .loc 1 1938 9 is_stmt 1 view .LVU1369 +1938:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 4262 .loc 1 1938 13 is_stmt 0 view .LVU1370 + 4263 006a A36B ldr r3, [r4, #56] +1938:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 4264 .loc 1 1938 41 view .LVU1371 + 4265 006c 364A ldr r2, .L283+12 + 4266 006e 1A63 str r2, [r3, #48] +1941:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->hdmatx->XferAbortCallback = NULL; + 4267 .loc 1 1941 9 is_stmt 1 view .LVU1372 +1941:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->hdmatx->XferAbortCallback = NULL; + 4268 .loc 1 1941 13 is_stmt 0 view .LVU1373 + 4269 0070 A26B ldr r2, [r4, #56] +1941:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->hdmatx->XferAbortCallback = NULL; + 4270 .loc 1 1941 44 view .LVU1374 + 4271 0072 0023 movs r3, #0 + 4272 0074 D362 str r3, [r2, #44] +1942:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 4273 .loc 1 1942 9 is_stmt 1 view .LVU1375 +1942:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 4274 .loc 1 1942 13 is_stmt 0 view .LVU1376 + 4275 0076 A26B ldr r2, [r4, #56] +1942:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 4276 .loc 1 1942 41 view .LVU1377 + 4277 0078 5363 str r3, [r2, #52] +1945:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->XferSize); + 4278 .loc 1 1945 9 is_stmt 1 view .LVU1378 +1945:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->XferSize); + 4279 .loc 1 1945 88 is_stmt 0 view .LVU1379 + 4280 007a 2268 ldr r2, [r4] +1945:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->XferSize); + 4281 .loc 1 1945 83 view .LVU1380 + 4282 007c 2832 adds r2, r2, #40 +1946:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } + ARM GAS /tmp/ccuRhBPx.s page 225 + + + 4283 .loc 1 1946 46 view .LVU1381 + 4284 007e 238D ldrh r3, [r4, #40] +1945:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->XferSize); + 4285 .loc 1 1945 25 view .LVU1382 + 4286 0080 A06B ldr r0, [r4, #56] + 4287 .LVL293: +1945:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->XferSize); + 4288 .loc 1 1945 25 view .LVU1383 + 4289 0082 2900 movs r1, r5 + 4290 0084 FFF7FEFF bl HAL_DMA_Start_IT + 4291 .LVL294: +1963:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { + 4292 .loc 1 1963 7 is_stmt 1 view .LVU1384 +1963:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { + 4293 .loc 1 1963 10 is_stmt 0 view .LVU1385 + 4294 0088 0028 cmp r0, #0 + 4295 008a 20D0 beq .L282 +1987:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->Mode = HAL_I2C_MODE_NONE; + 4296 .loc 1 1987 9 is_stmt 1 view .LVU1386 +1987:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->Mode = HAL_I2C_MODE_NONE; + 4297 .loc 1 1987 25 is_stmt 0 view .LVU1387 + 4298 008c 4123 movs r3, #65 + 4299 008e 2022 movs r2, #32 + 4300 0090 E254 strb r2, [r4, r3] +1988:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 4301 .loc 1 1988 9 is_stmt 1 view .LVU1388 +1988:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 4302 .loc 1 1988 25 is_stmt 0 view .LVU1389 + 4303 0092 0022 movs r2, #0 + 4304 0094 0133 adds r3, r3, #1 + 4305 0096 E254 strb r2, [r4, r3] +1991:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 4306 .loc 1 1991 9 is_stmt 1 view .LVU1390 +1991:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 4307 .loc 1 1991 13 is_stmt 0 view .LVU1391 + 4308 0098 636C ldr r3, [r4, #68] +1991:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 4309 .loc 1 1991 25 view .LVU1392 + 4310 009a 1021 movs r1, #16 + 4311 009c 0B43 orrs r3, r1 + 4312 009e 6364 str r3, [r4, #68] +1994:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 4313 .loc 1 1994 9 is_stmt 1 view .LVU1393 +1994:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 4314 .loc 1 1994 9 view .LVU1394 + 4315 00a0 4023 movs r3, #64 + 4316 00a2 E254 strb r2, [r4, r3] +1994:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 4317 .loc 1 1994 9 view .LVU1395 +1996:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } + 4318 .loc 1 1996 9 view .LVU1396 +1996:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } + 4319 .loc 1 1996 16 is_stmt 0 view .LVU1397 + 4320 00a4 0120 movs r0, #1 + 4321 .LVL295: +1996:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } + 4322 .loc 1 1996 16 view .LVU1398 + ARM GAS /tmp/ccuRhBPx.s page 226 + + + 4323 00a6 43E0 b .L270 + 4324 .LVL296: + 4325 .L271: +1926:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** xfermode = I2C_AUTOEND_MODE; + 4326 .loc 1 1926 7 is_stmt 1 view .LVU1399 +1926:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** xfermode = I2C_AUTOEND_MODE; + 4327 .loc 1 1926 28 is_stmt 0 view .LVU1400 + 4328 00a8 438D ldrh r3, [r0, #42] +1926:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** xfermode = I2C_AUTOEND_MODE; + 4329 .loc 1 1926 22 view .LVU1401 + 4330 00aa 0385 strh r3, [r0, #40] +1927:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } + 4331 .loc 1 1927 7 is_stmt 1 view .LVU1402 + 4332 .LVL297: +1927:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } + 4333 .loc 1 1927 16 is_stmt 0 view .LVU1403 + 4334 00ac 8027 movs r7, #128 + 4335 00ae BF04 lsls r7, r7, #18 + 4336 00b0 D3E7 b .L272 + 4337 .LVL298: + 4338 .L274: +1951:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->Mode = HAL_I2C_MODE_NONE; + 4339 .loc 1 1951 9 is_stmt 1 view .LVU1404 +1951:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->Mode = HAL_I2C_MODE_NONE; + 4340 .loc 1 1951 25 is_stmt 0 view .LVU1405 + 4341 00b2 4123 movs r3, #65 + 4342 00b4 2022 movs r2, #32 + 4343 00b6 E254 strb r2, [r4, r3] +1952:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 4344 .loc 1 1952 9 is_stmt 1 view .LVU1406 +1952:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 4345 .loc 1 1952 25 is_stmt 0 view .LVU1407 + 4346 00b8 0022 movs r2, #0 + 4347 00ba 0133 adds r3, r3, #1 + 4348 00bc E254 strb r2, [r4, r3] +1955:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 4349 .loc 1 1955 9 is_stmt 1 view .LVU1408 +1955:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 4350 .loc 1 1955 13 is_stmt 0 view .LVU1409 + 4351 00be 636C ldr r3, [r4, #68] +1955:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 4352 .loc 1 1955 25 view .LVU1410 + 4353 00c0 8021 movs r1, #128 + 4354 00c2 0B43 orrs r3, r1 + 4355 00c4 6364 str r3, [r4, #68] +1958:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 4356 .loc 1 1958 9 is_stmt 1 view .LVU1411 +1958:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 4357 .loc 1 1958 9 view .LVU1412 + 4358 00c6 4023 movs r3, #64 + 4359 00c8 E254 strb r2, [r4, r3] +1958:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 4360 .loc 1 1958 9 view .LVU1413 +1960:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } + 4361 .loc 1 1960 9 view .LVU1414 +1960:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } + 4362 .loc 1 1960 16 is_stmt 0 view .LVU1415 + ARM GAS /tmp/ccuRhBPx.s page 227 + + + 4363 00ca 0120 movs r0, #1 + 4364 .LVL299: +1960:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } + 4365 .loc 1 1960 16 view .LVU1416 + 4366 00cc 30E0 b .L270 + 4367 .LVL300: + 4368 .L282: +1967:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 4369 .loc 1 1967 9 is_stmt 1 view .LVU1417 +1967:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 4370 .loc 1 1967 59 is_stmt 0 view .LVU1418 + 4371 00ce 228D ldrh r2, [r4, #40] +1967:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 4372 .loc 1 1967 9 view .LVU1419 + 4373 00d0 D2B2 uxtb r2, r2 + 4374 00d2 1E4B ldr r3, .L283+16 + 4375 00d4 0093 str r3, [sp] + 4376 00d6 3B00 movs r3, r7 + 4377 00d8 3100 movs r1, r6 + 4378 00da 2000 movs r0, r4 + 4379 .LVL301: +1967:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 4380 .loc 1 1967 9 view .LVU1420 + 4381 00dc FFF7FEFF bl I2C_TransferConfig + 4382 .LVL302: +1970:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 4383 .loc 1 1970 9 is_stmt 1 view .LVU1421 +1970:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 4384 .loc 1 1970 13 is_stmt 0 view .LVU1422 + 4385 00e0 638D ldrh r3, [r4, #42] +1970:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 4386 .loc 1 1970 32 view .LVU1423 + 4387 00e2 228D ldrh r2, [r4, #40] +1970:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 4388 .loc 1 1970 25 view .LVU1424 + 4389 00e4 9B1A subs r3, r3, r2 + 4390 00e6 9BB2 uxth r3, r3 + 4391 00e8 6385 strh r3, [r4, #42] +1973:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 4392 .loc 1 1973 9 is_stmt 1 view .LVU1425 +1973:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 4393 .loc 1 1973 9 view .LVU1426 + 4394 00ea 4023 movs r3, #64 + 4395 00ec 0022 movs r2, #0 + 4396 00ee E254 strb r2, [r4, r3] +1973:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 4397 .loc 1 1973 9 view .LVU1427 +1979:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 4398 .loc 1 1979 9 view .LVU1428 + 4399 00f0 1021 movs r1, #16 + 4400 00f2 2000 movs r0, r4 + 4401 00f4 FFF7FEFF bl I2C_Enable_IRQ + 4402 .LVL303: +1982:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } + 4403 .loc 1 1982 9 view .LVU1429 +1982:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } + 4404 .loc 1 1982 13 is_stmt 0 view .LVU1430 + ARM GAS /tmp/ccuRhBPx.s page 228 + + + 4405 00f8 2268 ldr r2, [r4] +1982:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } + 4406 .loc 1 1982 23 view .LVU1431 + 4407 00fa 1168 ldr r1, [r2] +1982:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } + 4408 .loc 1 1982 29 view .LVU1432 + 4409 00fc 8023 movs r3, #128 + 4410 00fe DB01 lsls r3, r3, #7 + 4411 0100 0B43 orrs r3, r1 + 4412 0102 1360 str r3, [r2] + 4413 0104 11E0 b .L277 + 4414 .LVL304: + 4415 .L273: +2002:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 4416 .loc 1 2002 7 is_stmt 1 view .LVU1433 +2002:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 4417 .loc 1 2002 21 is_stmt 0 view .LVU1434 + 4418 0106 124B ldr r3, .L283+20 + 4419 0108 6363 str r3, [r4, #52] +2006:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** I2C_GENERATE_START_WRITE); + 4420 .loc 1 2006 7 is_stmt 1 view .LVU1435 + 4421 010a 8023 movs r3, #128 + 4422 010c D2B2 uxtb r2, r2 + 4423 010e 0F49 ldr r1, .L283+16 + 4424 0110 0091 str r1, [sp] + 4425 0112 9B04 lsls r3, r3, #18 + 4426 0114 3100 movs r1, r6 + 4427 0116 2000 movs r0, r4 + 4428 .LVL305: +2006:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** I2C_GENERATE_START_WRITE); + 4429 .loc 1 2006 7 is_stmt 0 view .LVU1436 + 4430 0118 FFF7FEFF bl I2C_TransferConfig + 4431 .LVL306: +2010:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 4432 .loc 1 2010 7 is_stmt 1 view .LVU1437 +2010:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 4433 .loc 1 2010 7 view .LVU1438 + 4434 011c 4023 movs r3, #64 + 4435 011e 0022 movs r2, #0 + 4436 0120 E254 strb r2, [r4, r3] +2010:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 4437 .loc 1 2010 7 view .LVU1439 +2019:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } + 4438 .loc 1 2019 7 view .LVU1440 + 4439 0122 0121 movs r1, #1 + 4440 0124 2000 movs r0, r4 + 4441 0126 FFF7FEFF bl I2C_Enable_IRQ + 4442 .LVL307: + 4443 .L277: +2022:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } + 4444 .loc 1 2022 5 view .LVU1441 +2022:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } + 4445 .loc 1 2022 12 is_stmt 0 view .LVU1442 + 4446 012a 0020 movs r0, #0 + 4447 012c 00E0 b .L270 + 4448 .LVL308: + 4449 .L278: + ARM GAS /tmp/ccuRhBPx.s page 229 + + +2026:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } + 4450 .loc 1 2026 12 view .LVU1443 + 4451 012e 0220 movs r0, #2 + 4452 .LVL309: + 4453 .L270: +2028:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 4454 .loc 1 2028 1 view .LVU1444 + 4455 0130 03B0 add sp, sp, #12 + 4456 @ sp needed + 4457 .LVL310: + 4458 .LVL311: + 4459 .LVL312: +2028:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 4460 .loc 1 2028 1 view .LVU1445 + 4461 0132 F0BD pop {r4, r5, r6, r7, pc} + 4462 .LVL313: + 4463 .L279: +1903:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } + 4464 .loc 1 1903 14 view .LVU1446 + 4465 0134 0220 movs r0, #2 + 4466 .LVL314: +1903:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } + 4467 .loc 1 1903 14 view .LVU1447 + 4468 0136 FBE7 b .L270 + 4469 .LVL315: + 4470 .L280: +1907:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 4471 .loc 1 1907 5 discriminator 1 view .LVU1448 + 4472 0138 0220 movs r0, #2 + 4473 .LVL316: +1907:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 4474 .loc 1 1907 5 discriminator 1 view .LVU1449 + 4475 013a F9E7 b .L270 + 4476 .L284: + 4477 .align 2 + 4478 .L283: + 4479 013c 0000FFFF .word -65536 + 4480 0140 00000000 .word I2C_Master_ISR_DMA + 4481 0144 00000000 .word I2C_DMAMasterTransmitCplt + 4482 0148 00000000 .word I2C_DMAError + 4483 014c 00200080 .word -2147475456 + 4484 0150 00000000 .word I2C_Master_ISR_IT + 4485 .cfi_endproc + 4486 .LFE52: + 4488 .section .text.HAL_I2C_Master_Receive_DMA,"ax",%progbits + 4489 .align 1 + 4490 .global HAL_I2C_Master_Receive_DMA + 4491 .syntax unified + 4492 .code 16 + 4493 .thumb_func + 4495 HAL_I2C_Master_Receive_DMA: + 4496 .LVL317: + 4497 .LFB53: +2042:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** uint32_t xfermode; + 4498 .loc 1 2042 1 is_stmt 1 view -0 + 4499 .cfi_startproc + 4500 @ args = 0, pretend = 0, frame = 0 + ARM GAS /tmp/ccuRhBPx.s page 230 + + + 4501 @ frame_needed = 0, uses_anonymous_args = 0 +2042:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** uint32_t xfermode; + 4502 .loc 1 2042 1 is_stmt 0 view .LVU1451 + 4503 0000 70B5 push {r4, r5, r6, lr} + 4504 .cfi_def_cfa_offset 16 + 4505 .cfi_offset 4, -16 + 4506 .cfi_offset 5, -12 + 4507 .cfi_offset 6, -8 + 4508 .cfi_offset 14, -4 + 4509 0002 82B0 sub sp, sp, #8 + 4510 .cfi_def_cfa_offset 24 + 4511 0004 0400 movs r4, r0 + 4512 0006 0D00 movs r5, r1 +2043:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** HAL_StatusTypeDef dmaxferstatus; + 4513 .loc 1 2043 3 is_stmt 1 view .LVU1452 +2044:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 4514 .loc 1 2044 3 view .LVU1453 +2046:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { + 4515 .loc 1 2046 3 view .LVU1454 +2046:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { + 4516 .loc 1 2046 11 is_stmt 0 view .LVU1455 + 4517 0008 4121 movs r1, #65 + 4518 .LVL318: +2046:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { + 4519 .loc 1 2046 11 view .LVU1456 + 4520 000a 415C ldrb r1, [r0, r1] +2046:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { + 4521 .loc 1 2046 6 view .LVU1457 + 4522 000c 2029 cmp r1, #32 + 4523 000e 00D0 beq .LCB4253 + 4524 0010 8BE0 b .L294 @long jump + 4525 .LCB4253: +2048:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { + 4526 .loc 1 2048 5 is_stmt 1 view .LVU1458 +2048:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { + 4527 .loc 1 2048 9 is_stmt 0 view .LVU1459 + 4528 0012 0168 ldr r1, [r0] + 4529 0014 8969 ldr r1, [r1, #24] +2048:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { + 4530 .loc 1 2048 8 view .LVU1460 + 4531 0016 0904 lsls r1, r1, #16 + 4532 0018 00D5 bpl .LCB4260 + 4533 001a 89E0 b .L295 @long jump + 4534 .LCB4260: +2054:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 4535 .loc 1 2054 5 is_stmt 1 view .LVU1461 +2054:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 4536 .loc 1 2054 5 view .LVU1462 + 4537 001c 4021 movs r1, #64 + 4538 001e 415C ldrb r1, [r0, r1] + 4539 0020 0129 cmp r1, #1 + 4540 0022 00D1 bne .LCB4266 + 4541 0024 86E0 b .L296 @long jump + 4542 .LCB4266: +2054:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 4543 .loc 1 2054 5 discriminator 2 view .LVU1463 + 4544 0026 4021 movs r1, #64 + ARM GAS /tmp/ccuRhBPx.s page 231 + + + 4545 0028 0120 movs r0, #1 + 4546 .LVL319: +2054:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 4547 .loc 1 2054 5 is_stmt 0 discriminator 2 view .LVU1464 + 4548 002a 6054 strb r0, [r4, r1] +2054:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 4549 .loc 1 2054 5 is_stmt 1 discriminator 2 view .LVU1465 +2056:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->Mode = HAL_I2C_MODE_MASTER; + 4550 .loc 1 2056 5 view .LVU1466 +2056:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->Mode = HAL_I2C_MODE_MASTER; + 4551 .loc 1 2056 23 is_stmt 0 view .LVU1467 + 4552 002c 0131 adds r1, r1, #1 + 4553 002e 2130 adds r0, r0, #33 + 4554 0030 6054 strb r0, [r4, r1] +2057:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->ErrorCode = HAL_I2C_ERROR_NONE; + 4555 .loc 1 2057 5 is_stmt 1 view .LVU1468 +2057:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->ErrorCode = HAL_I2C_ERROR_NONE; + 4556 .loc 1 2057 23 is_stmt 0 view .LVU1469 + 4557 0032 0131 adds r1, r1, #1 + 4558 0034 1238 subs r0, r0, #18 + 4559 0036 6054 strb r0, [r4, r1] +2058:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 4560 .loc 1 2058 5 is_stmt 1 view .LVU1470 +2058:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 4561 .loc 1 2058 23 is_stmt 0 view .LVU1471 + 4562 0038 0021 movs r1, #0 + 4563 003a 6164 str r1, [r4, #68] +2061:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->XferCount = Size; + 4564 .loc 1 2061 5 is_stmt 1 view .LVU1472 +2061:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->XferCount = Size; + 4565 .loc 1 2061 23 is_stmt 0 view .LVU1473 + 4566 003c 6262 str r2, [r4, #36] +2062:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->XferOptions = I2C_NO_OPTION_FRAME; + 4567 .loc 1 2062 5 is_stmt 1 view .LVU1474 +2062:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->XferOptions = I2C_NO_OPTION_FRAME; + 4568 .loc 1 2062 23 is_stmt 0 view .LVU1475 + 4569 003e 6385 strh r3, [r4, #42] +2063:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->XferISR = I2C_Master_ISR_DMA; + 4570 .loc 1 2063 5 is_stmt 1 view .LVU1476 +2063:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->XferISR = I2C_Master_ISR_DMA; + 4571 .loc 1 2063 23 is_stmt 0 view .LVU1477 + 4572 0040 3D4B ldr r3, .L299 + 4573 .LVL320: +2063:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->XferISR = I2C_Master_ISR_DMA; + 4574 .loc 1 2063 23 view .LVU1478 + 4575 0042 E362 str r3, [r4, #44] + 4576 .LVL321: +2064:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 4577 .loc 1 2064 5 is_stmt 1 view .LVU1479 +2064:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 4578 .loc 1 2064 23 is_stmt 0 view .LVU1480 + 4579 0044 3D4B ldr r3, .L299+4 + 4580 0046 6363 str r3, [r4, #52] +2066:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { + 4581 .loc 1 2066 5 is_stmt 1 view .LVU1481 +2066:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { + 4582 .loc 1 2066 13 is_stmt 0 view .LVU1482 + ARM GAS /tmp/ccuRhBPx.s page 232 + + + 4583 0048 638D ldrh r3, [r4, #42] + 4584 004a 9BB2 uxth r3, r3 +2066:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { + 4585 .loc 1 2066 8 view .LVU1483 + 4586 004c FF2B cmp r3, #255 + 4587 004e 29D9 bls .L287 +2068:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** xfermode = I2C_RELOAD_MODE; + 4588 .loc 1 2068 7 is_stmt 1 view .LVU1484 +2068:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** xfermode = I2C_RELOAD_MODE; + 4589 .loc 1 2068 22 is_stmt 0 view .LVU1485 + 4590 0050 FF23 movs r3, #255 + 4591 0052 2385 strh r3, [r4, #40] +2069:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } + 4592 .loc 1 2069 7 is_stmt 1 view .LVU1486 + 4593 .LVL322: +2069:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } + 4594 .loc 1 2069 16 is_stmt 0 view .LVU1487 + 4595 0054 8026 movs r6, #128 + 4596 0056 7604 lsls r6, r6, #17 + 4597 .LVL323: + 4598 .L288: +2077:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { + 4599 .loc 1 2077 5 is_stmt 1 view .LVU1488 +2077:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { + 4600 .loc 1 2077 13 is_stmt 0 view .LVU1489 + 4601 0058 218D ldrh r1, [r4, #40] +2077:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { + 4602 .loc 1 2077 8 view .LVU1490 + 4603 005a 0029 cmp r1, #0 + 4604 005c 51D0 beq .L289 +2079:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { + 4605 .loc 1 2079 7 is_stmt 1 view .LVU1491 +2079:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { + 4606 .loc 1 2079 15 is_stmt 0 view .LVU1492 + 4607 005e E36B ldr r3, [r4, #60] +2079:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { + 4608 .loc 1 2079 10 view .LVU1493 + 4609 0060 002B cmp r3, #0 + 4610 0062 24D0 beq .L290 +2082:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 4611 .loc 1 2082 9 is_stmt 1 view .LVU1494 +2082:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 4612 .loc 1 2082 40 is_stmt 0 view .LVU1495 + 4613 0064 3649 ldr r1, .L299+8 + 4614 0066 9962 str r1, [r3, #40] +2085:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 4615 .loc 1 2085 9 is_stmt 1 view .LVU1496 +2085:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 4616 .loc 1 2085 13 is_stmt 0 view .LVU1497 + 4617 0068 E36B ldr r3, [r4, #60] +2085:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 4618 .loc 1 2085 41 view .LVU1498 + 4619 006a 3649 ldr r1, .L299+12 + 4620 006c 1963 str r1, [r3, #48] +2088:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->hdmarx->XferAbortCallback = NULL; + 4621 .loc 1 2088 9 is_stmt 1 view .LVU1499 +2088:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->hdmarx->XferAbortCallback = NULL; + ARM GAS /tmp/ccuRhBPx.s page 233 + + + 4622 .loc 1 2088 13 is_stmt 0 view .LVU1500 + 4623 006e E16B ldr r1, [r4, #60] +2088:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->hdmarx->XferAbortCallback = NULL; + 4624 .loc 1 2088 44 view .LVU1501 + 4625 0070 0023 movs r3, #0 + 4626 0072 CB62 str r3, [r1, #44] +2089:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 4627 .loc 1 2089 9 is_stmt 1 view .LVU1502 +2089:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 4628 .loc 1 2089 13 is_stmt 0 view .LVU1503 + 4629 0074 E16B ldr r1, [r4, #60] +2089:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 4630 .loc 1 2089 41 view .LVU1504 + 4631 0076 4B63 str r3, [r1, #52] +2092:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->XferSize); + 4632 .loc 1 2092 9 is_stmt 1 view .LVU1505 +2092:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->XferSize); + 4633 .loc 1 2092 71 is_stmt 0 view .LVU1506 + 4634 0078 2168 ldr r1, [r4] +2092:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->XferSize); + 4635 .loc 1 2092 66 view .LVU1507 + 4636 007a 2431 adds r1, r1, #36 +2093:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } + 4637 .loc 1 2093 46 view .LVU1508 + 4638 007c 238D ldrh r3, [r4, #40] +2092:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->XferSize); + 4639 .loc 1 2092 25 view .LVU1509 + 4640 007e E06B ldr r0, [r4, #60] + 4641 0080 FFF7FEFF bl HAL_DMA_Start_IT + 4642 .LVL324: +2110:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { + 4643 .loc 1 2110 7 is_stmt 1 view .LVU1510 +2110:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { + 4644 .loc 1 2110 10 is_stmt 0 view .LVU1511 + 4645 0084 0028 cmp r0, #0 + 4646 0086 20D0 beq .L298 +2134:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->Mode = HAL_I2C_MODE_NONE; + 4647 .loc 1 2134 9 is_stmt 1 view .LVU1512 +2134:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->Mode = HAL_I2C_MODE_NONE; + 4648 .loc 1 2134 25 is_stmt 0 view .LVU1513 + 4649 0088 4123 movs r3, #65 + 4650 008a 2022 movs r2, #32 + 4651 008c E254 strb r2, [r4, r3] +2135:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 4652 .loc 1 2135 9 is_stmt 1 view .LVU1514 +2135:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 4653 .loc 1 2135 25 is_stmt 0 view .LVU1515 + 4654 008e 0022 movs r2, #0 + 4655 0090 0133 adds r3, r3, #1 + 4656 0092 E254 strb r2, [r4, r3] +2138:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 4657 .loc 1 2138 9 is_stmt 1 view .LVU1516 +2138:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 4658 .loc 1 2138 13 is_stmt 0 view .LVU1517 + 4659 0094 636C ldr r3, [r4, #68] +2138:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 4660 .loc 1 2138 25 view .LVU1518 + ARM GAS /tmp/ccuRhBPx.s page 234 + + + 4661 0096 1021 movs r1, #16 + 4662 0098 0B43 orrs r3, r1 + 4663 009a 6364 str r3, [r4, #68] +2141:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 4664 .loc 1 2141 9 is_stmt 1 view .LVU1519 +2141:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 4665 .loc 1 2141 9 view .LVU1520 + 4666 009c 4023 movs r3, #64 + 4667 009e E254 strb r2, [r4, r3] +2141:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 4668 .loc 1 2141 9 view .LVU1521 +2143:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } + 4669 .loc 1 2143 9 view .LVU1522 +2143:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } + 4670 .loc 1 2143 16 is_stmt 0 view .LVU1523 + 4671 00a0 0120 movs r0, #1 + 4672 .LVL325: +2143:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } + 4673 .loc 1 2143 16 view .LVU1524 + 4674 00a2 43E0 b .L286 + 4675 .LVL326: + 4676 .L287: +2073:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** xfermode = I2C_AUTOEND_MODE; + 4677 .loc 1 2073 7 is_stmt 1 view .LVU1525 +2073:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** xfermode = I2C_AUTOEND_MODE; + 4678 .loc 1 2073 28 is_stmt 0 view .LVU1526 + 4679 00a4 638D ldrh r3, [r4, #42] +2073:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** xfermode = I2C_AUTOEND_MODE; + 4680 .loc 1 2073 22 view .LVU1527 + 4681 00a6 2385 strh r3, [r4, #40] +2074:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } + 4682 .loc 1 2074 7 is_stmt 1 view .LVU1528 + 4683 .LVL327: +2074:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } + 4684 .loc 1 2074 16 is_stmt 0 view .LVU1529 + 4685 00a8 8026 movs r6, #128 + 4686 00aa B604 lsls r6, r6, #18 + 4687 00ac D4E7 b .L288 + 4688 .LVL328: + 4689 .L290: +2098:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->Mode = HAL_I2C_MODE_NONE; + 4690 .loc 1 2098 9 is_stmt 1 view .LVU1530 +2098:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->Mode = HAL_I2C_MODE_NONE; + 4691 .loc 1 2098 25 is_stmt 0 view .LVU1531 + 4692 00ae 4123 movs r3, #65 + 4693 00b0 2022 movs r2, #32 + 4694 .LVL329: +2098:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->Mode = HAL_I2C_MODE_NONE; + 4695 .loc 1 2098 25 view .LVU1532 + 4696 00b2 E254 strb r2, [r4, r3] + 4697 .LVL330: +2099:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 4698 .loc 1 2099 9 is_stmt 1 view .LVU1533 +2099:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 4699 .loc 1 2099 25 is_stmt 0 view .LVU1534 + 4700 00b4 0022 movs r2, #0 + 4701 00b6 0133 adds r3, r3, #1 + ARM GAS /tmp/ccuRhBPx.s page 235 + + + 4702 00b8 E254 strb r2, [r4, r3] +2102:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 4703 .loc 1 2102 9 is_stmt 1 view .LVU1535 +2102:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 4704 .loc 1 2102 13 is_stmt 0 view .LVU1536 + 4705 00ba 636C ldr r3, [r4, #68] +2102:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 4706 .loc 1 2102 25 view .LVU1537 + 4707 00bc 8021 movs r1, #128 + 4708 00be 0B43 orrs r3, r1 + 4709 00c0 6364 str r3, [r4, #68] +2105:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 4710 .loc 1 2105 9 is_stmt 1 view .LVU1538 +2105:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 4711 .loc 1 2105 9 view .LVU1539 + 4712 00c2 4023 movs r3, #64 + 4713 00c4 E254 strb r2, [r4, r3] +2105:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 4714 .loc 1 2105 9 view .LVU1540 +2107:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } + 4715 .loc 1 2107 9 view .LVU1541 +2107:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } + 4716 .loc 1 2107 16 is_stmt 0 view .LVU1542 + 4717 00c6 0120 movs r0, #1 + 4718 00c8 30E0 b .L286 + 4719 .LVL331: + 4720 .L298: +2114:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 4721 .loc 1 2114 9 is_stmt 1 view .LVU1543 +2114:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 4722 .loc 1 2114 59 is_stmt 0 view .LVU1544 + 4723 00ca 228D ldrh r2, [r4, #40] +2114:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 4724 .loc 1 2114 9 view .LVU1545 + 4725 00cc D2B2 uxtb r2, r2 + 4726 00ce 1E4B ldr r3, .L299+16 + 4727 00d0 0093 str r3, [sp] + 4728 00d2 3300 movs r3, r6 + 4729 00d4 2900 movs r1, r5 + 4730 00d6 2000 movs r0, r4 + 4731 .LVL332: +2114:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 4732 .loc 1 2114 9 view .LVU1546 + 4733 00d8 FFF7FEFF bl I2C_TransferConfig + 4734 .LVL333: +2117:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 4735 .loc 1 2117 9 is_stmt 1 view .LVU1547 +2117:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 4736 .loc 1 2117 13 is_stmt 0 view .LVU1548 + 4737 00dc 638D ldrh r3, [r4, #42] +2117:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 4738 .loc 1 2117 32 view .LVU1549 + 4739 00de 228D ldrh r2, [r4, #40] +2117:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 4740 .loc 1 2117 25 view .LVU1550 + 4741 00e0 9B1A subs r3, r3, r2 + 4742 00e2 9BB2 uxth r3, r3 + ARM GAS /tmp/ccuRhBPx.s page 236 + + + 4743 00e4 6385 strh r3, [r4, #42] +2120:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 4744 .loc 1 2120 9 is_stmt 1 view .LVU1551 +2120:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 4745 .loc 1 2120 9 view .LVU1552 + 4746 00e6 4023 movs r3, #64 + 4747 00e8 0022 movs r2, #0 + 4748 00ea E254 strb r2, [r4, r3] +2120:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 4749 .loc 1 2120 9 view .LVU1553 +2126:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 4750 .loc 1 2126 9 view .LVU1554 + 4751 00ec 1021 movs r1, #16 + 4752 00ee 2000 movs r0, r4 + 4753 00f0 FFF7FEFF bl I2C_Enable_IRQ + 4754 .LVL334: +2129:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } + 4755 .loc 1 2129 9 view .LVU1555 +2129:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } + 4756 .loc 1 2129 13 is_stmt 0 view .LVU1556 + 4757 00f4 2268 ldr r2, [r4] +2129:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } + 4758 .loc 1 2129 23 view .LVU1557 + 4759 00f6 1168 ldr r1, [r2] +2129:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } + 4760 .loc 1 2129 29 view .LVU1558 + 4761 00f8 8023 movs r3, #128 + 4762 00fa 1B02 lsls r3, r3, #8 + 4763 00fc 0B43 orrs r3, r1 + 4764 00fe 1360 str r3, [r2] + 4765 0100 11E0 b .L293 + 4766 .LVL335: + 4767 .L289: +2149:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 4768 .loc 1 2149 7 is_stmt 1 view .LVU1559 +2149:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 4769 .loc 1 2149 21 is_stmt 0 view .LVU1560 + 4770 0102 124B ldr r3, .L299+20 + 4771 0104 6363 str r3, [r4, #52] +2153:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** I2C_GENERATE_START_READ); + 4772 .loc 1 2153 7 is_stmt 1 view .LVU1561 + 4773 0106 8023 movs r3, #128 + 4774 0108 CAB2 uxtb r2, r1 + 4775 .LVL336: +2153:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** I2C_GENERATE_START_READ); + 4776 .loc 1 2153 7 is_stmt 0 view .LVU1562 + 4777 010a 0F49 ldr r1, .L299+16 + 4778 010c 0091 str r1, [sp] + 4779 .LVL337: +2153:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** I2C_GENERATE_START_READ); + 4780 .loc 1 2153 7 view .LVU1563 + 4781 010e 9B04 lsls r3, r3, #18 + 4782 0110 2900 movs r1, r5 + 4783 0112 2000 movs r0, r4 + 4784 0114 FFF7FEFF bl I2C_TransferConfig + 4785 .LVL338: +2157:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + ARM GAS /tmp/ccuRhBPx.s page 237 + + + 4786 .loc 1 2157 7 is_stmt 1 view .LVU1564 +2157:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 4787 .loc 1 2157 7 view .LVU1565 + 4788 0118 4023 movs r3, #64 + 4789 011a 0022 movs r2, #0 + 4790 011c E254 strb r2, [r4, r3] +2157:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 4791 .loc 1 2157 7 view .LVU1566 +2166:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } + 4792 .loc 1 2166 7 view .LVU1567 + 4793 011e 0121 movs r1, #1 + 4794 0120 2000 movs r0, r4 + 4795 0122 FFF7FEFF bl I2C_Enable_IRQ + 4796 .LVL339: + 4797 .L293: +2169:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } + 4798 .loc 1 2169 5 view .LVU1568 +2169:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } + 4799 .loc 1 2169 12 is_stmt 0 view .LVU1569 + 4800 0126 0020 movs r0, #0 + 4801 0128 00E0 b .L286 + 4802 .LVL340: + 4803 .L294: +2173:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } + 4804 .loc 1 2173 12 view .LVU1570 + 4805 012a 0220 movs r0, #2 + 4806 .LVL341: + 4807 .L286: +2175:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 4808 .loc 1 2175 1 view .LVU1571 + 4809 012c 02B0 add sp, sp, #8 + 4810 @ sp needed + 4811 .LVL342: + 4812 .LVL343: +2175:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 4813 .loc 1 2175 1 view .LVU1572 + 4814 012e 70BD pop {r4, r5, r6, pc} + 4815 .LVL344: + 4816 .L295: +2050:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } + 4817 .loc 1 2050 14 view .LVU1573 + 4818 0130 0220 movs r0, #2 + 4819 .LVL345: +2050:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } + 4820 .loc 1 2050 14 view .LVU1574 + 4821 0132 FBE7 b .L286 + 4822 .LVL346: + 4823 .L296: +2054:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 4824 .loc 1 2054 5 discriminator 1 view .LVU1575 + 4825 0134 0220 movs r0, #2 + 4826 .LVL347: +2054:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 4827 .loc 1 2054 5 discriminator 1 view .LVU1576 + 4828 0136 F9E7 b .L286 + 4829 .L300: + 4830 .align 2 + ARM GAS /tmp/ccuRhBPx.s page 238 + + + 4831 .L299: + 4832 0138 0000FFFF .word -65536 + 4833 013c 00000000 .word I2C_Master_ISR_DMA + 4834 0140 00000000 .word I2C_DMAMasterReceiveCplt + 4835 0144 00000000 .word I2C_DMAError + 4836 0148 00240080 .word -2147474432 + 4837 014c 00000000 .word I2C_Master_ISR_IT + 4838 .cfi_endproc + 4839 .LFE53: + 4841 .section .text.HAL_I2C_Slave_Transmit_DMA,"ax",%progbits + 4842 .align 1 + 4843 .global HAL_I2C_Slave_Transmit_DMA + 4844 .syntax unified + 4845 .code 16 + 4846 .thumb_func + 4848 HAL_I2C_Slave_Transmit_DMA: + 4849 .LVL348: + 4850 .LFB54: +2186:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** HAL_StatusTypeDef dmaxferstatus; + 4851 .loc 1 2186 1 is_stmt 1 view -0 + 4852 .cfi_startproc + 4853 @ args = 0, pretend = 0, frame = 0 + 4854 @ frame_needed = 0, uses_anonymous_args = 0 +2186:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** HAL_StatusTypeDef dmaxferstatus; + 4855 .loc 1 2186 1 is_stmt 0 view .LVU1578 + 4856 0000 10B5 push {r4, lr} + 4857 .cfi_def_cfa_offset 8 + 4858 .cfi_offset 4, -8 + 4859 .cfi_offset 14, -4 + 4860 0002 0400 movs r4, r0 +2187:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 4861 .loc 1 2187 3 is_stmt 1 view .LVU1579 +2189:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { + 4862 .loc 1 2189 3 view .LVU1580 +2189:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { + 4863 .loc 1 2189 11 is_stmt 0 view .LVU1581 + 4864 0004 4123 movs r3, #65 + 4865 0006 C35C ldrb r3, [r0, r3] +2189:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { + 4866 .loc 1 2189 6 view .LVU1582 + 4867 0008 202B cmp r3, #32 + 4868 000a 00D0 beq .LCB4562 + 4869 000c 8CE0 b .L311 @long jump + 4870 .LCB4562: +2191:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { + 4871 .loc 1 2191 5 is_stmt 1 view .LVU1583 +2191:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { + 4872 .loc 1 2191 8 is_stmt 0 view .LVU1584 + 4873 000e 0029 cmp r1, #0 + 4874 0010 46D0 beq .L303 +2191:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { + 4875 .loc 1 2191 25 discriminator 1 view .LVU1585 + 4876 0012 002A cmp r2, #0 + 4877 0014 44D0 beq .L303 +2197:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 4878 .loc 1 2197 5 is_stmt 1 view .LVU1586 +2197:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + ARM GAS /tmp/ccuRhBPx.s page 239 + + + 4879 .loc 1 2197 5 view .LVU1587 + 4880 0016 4023 movs r3, #64 + 4881 0018 C35C ldrb r3, [r0, r3] + 4882 001a 012B cmp r3, #1 + 4883 001c 00D1 bne .LCB4573 + 4884 001e 85E0 b .L312 @long jump + 4885 .LCB4573: +2197:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 4886 .loc 1 2197 5 discriminator 2 view .LVU1588 + 4887 0020 4023 movs r3, #64 + 4888 0022 0120 movs r0, #1 + 4889 .LVL349: +2197:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 4890 .loc 1 2197 5 is_stmt 0 discriminator 2 view .LVU1589 + 4891 0024 E054 strb r0, [r4, r3] +2197:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 4892 .loc 1 2197 5 is_stmt 1 discriminator 2 view .LVU1590 +2199:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->Mode = HAL_I2C_MODE_SLAVE; + 4893 .loc 1 2199 5 view .LVU1591 +2199:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->Mode = HAL_I2C_MODE_SLAVE; + 4894 .loc 1 2199 23 is_stmt 0 view .LVU1592 + 4895 0026 0133 adds r3, r3, #1 + 4896 0028 2030 adds r0, r0, #32 + 4897 002a E054 strb r0, [r4, r3] +2200:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->ErrorCode = HAL_I2C_ERROR_NONE; + 4898 .loc 1 2200 5 is_stmt 1 view .LVU1593 +2200:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->ErrorCode = HAL_I2C_ERROR_NONE; + 4899 .loc 1 2200 23 is_stmt 0 view .LVU1594 + 4900 002c 0133 adds r3, r3, #1 + 4901 002e 0138 subs r0, r0, #1 + 4902 0030 E054 strb r0, [r4, r3] +2201:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 4903 .loc 1 2201 5 is_stmt 1 view .LVU1595 +2201:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 4904 .loc 1 2201 23 is_stmt 0 view .LVU1596 + 4905 0032 0023 movs r3, #0 + 4906 0034 6364 str r3, [r4, #68] +2204:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->XferCount = Size; + 4907 .loc 1 2204 5 is_stmt 1 view .LVU1597 +2204:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->XferCount = Size; + 4908 .loc 1 2204 23 is_stmt 0 view .LVU1598 + 4909 0036 6162 str r1, [r4, #36] +2205:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->XferSize = hi2c->XferCount; + 4910 .loc 1 2205 5 is_stmt 1 view .LVU1599 +2205:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->XferSize = hi2c->XferCount; + 4911 .loc 1 2205 23 is_stmt 0 view .LVU1600 + 4912 0038 6285 strh r2, [r4, #42] +2206:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->XferOptions = I2C_NO_OPTION_FRAME; + 4913 .loc 1 2206 5 is_stmt 1 view .LVU1601 +2206:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->XferOptions = I2C_NO_OPTION_FRAME; + 4914 .loc 1 2206 29 is_stmt 0 view .LVU1602 + 4915 003a 638D ldrh r3, [r4, #42] +2206:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->XferOptions = I2C_NO_OPTION_FRAME; + 4916 .loc 1 2206 23 view .LVU1603 + 4917 003c 2385 strh r3, [r4, #40] +2207:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->XferISR = I2C_Slave_ISR_DMA; + 4918 .loc 1 2207 5 is_stmt 1 view .LVU1604 + ARM GAS /tmp/ccuRhBPx.s page 240 + + +2207:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->XferISR = I2C_Slave_ISR_DMA; + 4919 .loc 1 2207 23 is_stmt 0 view .LVU1605 + 4920 003e 3C4B ldr r3, .L316 + 4921 0040 E362 str r3, [r4, #44] +2208:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 4922 .loc 1 2208 5 is_stmt 1 view .LVU1606 +2208:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 4923 .loc 1 2208 23 is_stmt 0 view .LVU1607 + 4924 0042 3C4B ldr r3, .L316+4 + 4925 0044 6363 str r3, [r4, #52] +2211:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { + 4926 .loc 1 2211 5 is_stmt 1 view .LVU1608 +2211:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { + 4927 .loc 1 2211 19 is_stmt 0 view .LVU1609 + 4928 0046 226A ldr r2, [r4, #32] + 4929 .LVL350: +2211:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { + 4930 .loc 1 2211 8 view .LVU1610 + 4931 0048 8023 movs r3, #128 + 4932 004a 9B02 lsls r3, r3, #10 + 4933 004c 9A42 cmp r2, r3 + 4934 004e 2CD0 beq .L314 + 4935 .L305: +2224:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { + 4936 .loc 1 2224 5 is_stmt 1 view .LVU1611 +2224:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { + 4937 .loc 1 2224 13 is_stmt 0 view .LVU1612 + 4938 0050 638D ldrh r3, [r4, #42] + 4939 0052 9BB2 uxth r3, r3 +2224:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { + 4940 .loc 1 2224 8 view .LVU1613 + 4941 0054 002B cmp r3, #0 + 4942 0056 58D0 beq .L306 +2226:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { + 4943 .loc 1 2226 7 is_stmt 1 view .LVU1614 +2226:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { + 4944 .loc 1 2226 15 is_stmt 0 view .LVU1615 + 4945 0058 A36B ldr r3, [r4, #56] +2226:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { + 4946 .loc 1 2226 10 view .LVU1616 + 4947 005a 002B cmp r3, #0 + 4948 005c 33D0 beq .L307 +2229:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 4949 .loc 1 2229 9 is_stmt 1 view .LVU1617 +2229:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 4950 .loc 1 2229 40 is_stmt 0 view .LVU1618 + 4951 005e 364A ldr r2, .L316+8 + 4952 0060 9A62 str r2, [r3, #40] +2232:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 4953 .loc 1 2232 9 is_stmt 1 view .LVU1619 +2232:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 4954 .loc 1 2232 13 is_stmt 0 view .LVU1620 + 4955 0062 A36B ldr r3, [r4, #56] +2232:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 4956 .loc 1 2232 41 view .LVU1621 + 4957 0064 354A ldr r2, .L316+12 + 4958 0066 1A63 str r2, [r3, #48] + ARM GAS /tmp/ccuRhBPx.s page 241 + + +2235:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->hdmatx->XferAbortCallback = NULL; + 4959 .loc 1 2235 9 is_stmt 1 view .LVU1622 +2235:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->hdmatx->XferAbortCallback = NULL; + 4960 .loc 1 2235 13 is_stmt 0 view .LVU1623 + 4961 0068 A26B ldr r2, [r4, #56] +2235:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->hdmatx->XferAbortCallback = NULL; + 4962 .loc 1 2235 44 view .LVU1624 + 4963 006a 0023 movs r3, #0 + 4964 006c D362 str r3, [r2, #44] +2236:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 4965 .loc 1 2236 9 is_stmt 1 view .LVU1625 +2236:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 4966 .loc 1 2236 13 is_stmt 0 view .LVU1626 + 4967 006e A26B ldr r2, [r4, #56] +2236:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 4968 .loc 1 2236 41 view .LVU1627 + 4969 0070 5363 str r3, [r2, #52] +2239:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** (uint32_t)hi2c->pBuffPtr, (uint32_t)&hi2c->Instance->TXDR, + 4970 .loc 1 2239 9 is_stmt 1 view .LVU1628 +2240:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->XferSize); + 4971 .loc 1 2240 56 is_stmt 0 view .LVU1629 + 4972 0072 616A ldr r1, [r4, #36] + 4973 .LVL351: +2240:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->XferSize); + 4974 .loc 1 2240 83 view .LVU1630 + 4975 0074 2268 ldr r2, [r4] +2240:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->XferSize); + 4976 .loc 1 2240 78 view .LVU1631 + 4977 0076 2832 adds r2, r2, #40 +2241:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } + 4978 .loc 1 2241 46 view .LVU1632 + 4979 0078 238D ldrh r3, [r4, #40] +2239:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** (uint32_t)hi2c->pBuffPtr, (uint32_t)&hi2c->Instance->TXDR, + 4980 .loc 1 2239 25 view .LVU1633 + 4981 007a A06B ldr r0, [r4, #56] + 4982 007c FFF7FEFF bl HAL_DMA_Start_IT + 4983 .LVL352: +2258:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { + 4984 .loc 1 2258 7 is_stmt 1 view .LVU1634 +2258:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { + 4985 .loc 1 2258 10 is_stmt 0 view .LVU1635 + 4986 0080 0028 cmp r0, #0 + 4987 0082 2ED0 beq .L315 +2278:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->Mode = HAL_I2C_MODE_NONE; + 4988 .loc 1 2278 9 is_stmt 1 view .LVU1636 +2278:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->Mode = HAL_I2C_MODE_NONE; + 4989 .loc 1 2278 25 is_stmt 0 view .LVU1637 + 4990 0084 4123 movs r3, #65 + 4991 0086 2822 movs r2, #40 + 4992 0088 E254 strb r2, [r4, r3] +2279:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 4993 .loc 1 2279 9 is_stmt 1 view .LVU1638 +2279:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 4994 .loc 1 2279 25 is_stmt 0 view .LVU1639 + 4995 008a 0022 movs r2, #0 + 4996 008c 0133 adds r3, r3, #1 + 4997 008e E254 strb r2, [r4, r3] + ARM GAS /tmp/ccuRhBPx.s page 242 + + +2282:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 4998 .loc 1 2282 9 is_stmt 1 view .LVU1640 +2282:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 4999 .loc 1 2282 13 is_stmt 0 view .LVU1641 + 5000 0090 636C ldr r3, [r4, #68] +2282:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 5001 .loc 1 2282 25 view .LVU1642 + 5002 0092 1021 movs r1, #16 + 5003 0094 0B43 orrs r3, r1 + 5004 0096 6364 str r3, [r4, #68] +2285:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 5005 .loc 1 2285 9 is_stmt 1 view .LVU1643 +2285:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 5006 .loc 1 2285 9 view .LVU1644 + 5007 0098 4023 movs r3, #64 + 5008 009a E254 strb r2, [r4, r3] +2285:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 5009 .loc 1 2285 9 view .LVU1645 +2287:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } + 5010 .loc 1 2287 9 view .LVU1646 +2287:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } + 5011 .loc 1 2287 16 is_stmt 0 view .LVU1647 + 5012 009c 0120 movs r0, #1 + 5013 .LVL353: +2287:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } + 5014 .loc 1 2287 16 view .LVU1648 + 5015 009e 44E0 b .L302 + 5016 .LVL354: + 5017 .L303: +2193:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** return HAL_ERROR; + 5018 .loc 1 2193 7 is_stmt 1 view .LVU1649 +2193:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** return HAL_ERROR; + 5019 .loc 1 2193 23 is_stmt 0 view .LVU1650 + 5020 00a0 8023 movs r3, #128 + 5021 00a2 9B00 lsls r3, r3, #2 + 5022 00a4 6364 str r3, [r4, #68] +2194:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } + 5023 .loc 1 2194 7 is_stmt 1 view .LVU1651 +2194:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } + 5024 .loc 1 2194 15 is_stmt 0 view .LVU1652 + 5025 00a6 0120 movs r0, #1 + 5026 .LVL355: +2194:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } + 5027 .loc 1 2194 15 view .LVU1653 + 5028 00a8 3FE0 b .L302 + 5029 .LVL356: + 5030 .L314: +2215:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 5031 .loc 1 2215 7 is_stmt 1 view .LVU1654 +2215:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 5032 .loc 1 2215 11 is_stmt 0 view .LVU1655 + 5033 00aa 2368 ldr r3, [r4] +2215:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 5034 .loc 1 2215 30 view .LVU1656 + 5035 00ac 0A78 ldrb r2, [r1] +2215:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 5036 .loc 1 2215 28 view .LVU1657 + ARM GAS /tmp/ccuRhBPx.s page 243 + + + 5037 00ae 9A62 str r2, [r3, #40] +2218:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 5038 .loc 1 2218 7 is_stmt 1 view .LVU1658 +2218:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 5039 .loc 1 2218 11 is_stmt 0 view .LVU1659 + 5040 00b0 636A ldr r3, [r4, #36] +2218:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 5041 .loc 1 2218 21 view .LVU1660 + 5042 00b2 0133 adds r3, r3, #1 + 5043 00b4 6362 str r3, [r4, #36] +2220:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->XferSize--; + 5044 .loc 1 2220 7 is_stmt 1 view .LVU1661 +2220:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->XferSize--; + 5045 .loc 1 2220 11 is_stmt 0 view .LVU1662 + 5046 00b6 638D ldrh r3, [r4, #42] +2220:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->XferSize--; + 5047 .loc 1 2220 22 view .LVU1663 + 5048 00b8 013B subs r3, r3, #1 + 5049 00ba 9BB2 uxth r3, r3 + 5050 00bc 6385 strh r3, [r4, #42] +2221:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } + 5051 .loc 1 2221 7 is_stmt 1 view .LVU1664 +2221:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } + 5052 .loc 1 2221 11 is_stmt 0 view .LVU1665 + 5053 00be 238D ldrh r3, [r4, #40] +2221:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } + 5054 .loc 1 2221 21 view .LVU1666 + 5055 00c0 013B subs r3, r3, #1 + 5056 00c2 2385 strh r3, [r4, #40] + 5057 00c4 C4E7 b .L305 + 5058 .L307: +2246:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->Mode = HAL_I2C_MODE_NONE; + 5059 .loc 1 2246 9 is_stmt 1 view .LVU1667 +2246:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->Mode = HAL_I2C_MODE_NONE; + 5060 .loc 1 2246 25 is_stmt 0 view .LVU1668 + 5061 00c6 4123 movs r3, #65 + 5062 00c8 2822 movs r2, #40 + 5063 00ca E254 strb r2, [r4, r3] +2247:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 5064 .loc 1 2247 9 is_stmt 1 view .LVU1669 +2247:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 5065 .loc 1 2247 25 is_stmt 0 view .LVU1670 + 5066 00cc 0022 movs r2, #0 + 5067 00ce 0133 adds r3, r3, #1 + 5068 00d0 E254 strb r2, [r4, r3] +2250:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 5069 .loc 1 2250 9 is_stmt 1 view .LVU1671 +2250:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 5070 .loc 1 2250 13 is_stmt 0 view .LVU1672 + 5071 00d2 636C ldr r3, [r4, #68] +2250:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 5072 .loc 1 2250 25 view .LVU1673 + 5073 00d4 8021 movs r1, #128 + 5074 .LVL357: +2250:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 5075 .loc 1 2250 25 view .LVU1674 + 5076 00d6 0B43 orrs r3, r1 + ARM GAS /tmp/ccuRhBPx.s page 244 + + + 5077 00d8 6364 str r3, [r4, #68] +2253:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 5078 .loc 1 2253 9 is_stmt 1 view .LVU1675 +2253:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 5079 .loc 1 2253 9 view .LVU1676 + 5080 00da 4023 movs r3, #64 + 5081 00dc E254 strb r2, [r4, r3] +2253:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 5082 .loc 1 2253 9 view .LVU1677 +2255:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } + 5083 .loc 1 2255 9 view .LVU1678 +2255:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } + 5084 .loc 1 2255 16 is_stmt 0 view .LVU1679 + 5085 00de 0120 movs r0, #1 + 5086 00e0 23E0 b .L302 + 5087 .LVL358: + 5088 .L315: +2261:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 5089 .loc 1 2261 9 is_stmt 1 view .LVU1680 +2261:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 5090 .loc 1 2261 13 is_stmt 0 view .LVU1681 + 5091 00e2 2268 ldr r2, [r4] +2261:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 5092 .loc 1 2261 23 view .LVU1682 + 5093 00e4 5368 ldr r3, [r2, #4] +2261:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 5094 .loc 1 2261 29 view .LVU1683 + 5095 00e6 1649 ldr r1, .L316+16 + 5096 00e8 0B40 ands r3, r1 + 5097 00ea 5360 str r3, [r2, #4] +2264:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 5098 .loc 1 2264 9 is_stmt 1 view .LVU1684 +2264:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 5099 .loc 1 2264 9 view .LVU1685 + 5100 00ec 4023 movs r3, #64 + 5101 00ee 0022 movs r2, #0 + 5102 00f0 E254 strb r2, [r4, r3] +2264:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 5103 .loc 1 2264 9 view .LVU1686 +2270:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 5104 .loc 1 2270 9 view .LVU1687 + 5105 00f2 8021 movs r1, #128 + 5106 00f4 0902 lsls r1, r1, #8 + 5107 00f6 2000 movs r0, r4 + 5108 .LVL359: +2270:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 5109 .loc 1 2270 9 is_stmt 0 view .LVU1688 + 5110 00f8 FFF7FEFF bl I2C_Enable_IRQ + 5111 .LVL360: +2273:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } + 5112 .loc 1 2273 9 is_stmt 1 view .LVU1689 +2273:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } + 5113 .loc 1 2273 13 is_stmt 0 view .LVU1690 + 5114 00fc 2268 ldr r2, [r4] +2273:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } + 5115 .loc 1 2273 23 view .LVU1691 + 5116 00fe 1168 ldr r1, [r2] + ARM GAS /tmp/ccuRhBPx.s page 245 + + +2273:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } + 5117 .loc 1 2273 29 view .LVU1692 + 5118 0100 8023 movs r3, #128 + 5119 0102 DB01 lsls r3, r3, #7 + 5120 0104 0B43 orrs r3, r1 + 5121 0106 1360 str r3, [r2] + 5122 0108 0CE0 b .L310 + 5123 .LVL361: + 5124 .L306: +2293:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 5125 .loc 1 2293 7 is_stmt 1 view .LVU1693 +2293:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 5126 .loc 1 2293 11 is_stmt 0 view .LVU1694 + 5127 010a 2268 ldr r2, [r4] +2293:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 5128 .loc 1 2293 21 view .LVU1695 + 5129 010c 5368 ldr r3, [r2, #4] +2293:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 5130 .loc 1 2293 27 view .LVU1696 + 5131 010e 0C49 ldr r1, .L316+16 + 5132 .LVL362: +2293:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 5133 .loc 1 2293 27 view .LVU1697 + 5134 0110 0B40 ands r3, r1 + 5135 0112 5360 str r3, [r2, #4] +2296:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 5136 .loc 1 2296 7 is_stmt 1 view .LVU1698 +2296:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 5137 .loc 1 2296 7 view .LVU1699 + 5138 0114 4023 movs r3, #64 + 5139 0116 0022 movs r2, #0 + 5140 0118 E254 strb r2, [r4, r3] +2296:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 5141 .loc 1 2296 7 view .LVU1700 +2302:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } + 5142 .loc 1 2302 7 view .LVU1701 + 5143 011a 8021 movs r1, #128 + 5144 011c 0902 lsls r1, r1, #8 + 5145 011e 2000 movs r0, r4 + 5146 0120 FFF7FEFF bl I2C_Enable_IRQ + 5147 .LVL363: + 5148 .L310: +2305:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } + 5149 .loc 1 2305 5 view .LVU1702 +2305:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } + 5150 .loc 1 2305 12 is_stmt 0 view .LVU1703 + 5151 0124 0020 movs r0, #0 + 5152 0126 00E0 b .L302 + 5153 .LVL364: + 5154 .L311: +2309:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } + 5155 .loc 1 2309 12 view .LVU1704 + 5156 0128 0220 movs r0, #2 + 5157 .LVL365: + 5158 .L302: +2311:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 5159 .loc 1 2311 1 view .LVU1705 + ARM GAS /tmp/ccuRhBPx.s page 246 + + + 5160 @ sp needed + 5161 .LVL366: +2311:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 5162 .loc 1 2311 1 view .LVU1706 + 5163 012a 10BD pop {r4, pc} + 5164 .LVL367: + 5165 .L312: +2197:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 5166 .loc 1 2197 5 discriminator 1 view .LVU1707 + 5167 012c 0220 movs r0, #2 + 5168 .LVL368: +2197:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 5169 .loc 1 2197 5 discriminator 1 view .LVU1708 + 5170 012e FCE7 b .L302 + 5171 .L317: + 5172 .align 2 + 5173 .L316: + 5174 0130 0000FFFF .word -65536 + 5175 0134 00000000 .word I2C_Slave_ISR_DMA + 5176 0138 00000000 .word I2C_DMASlaveTransmitCplt + 5177 013c 00000000 .word I2C_DMAError + 5178 0140 FF7FFFFF .word -32769 + 5179 .cfi_endproc + 5180 .LFE54: + 5182 .section .text.HAL_I2C_Slave_Receive_DMA,"ax",%progbits + 5183 .align 1 + 5184 .global HAL_I2C_Slave_Receive_DMA + 5185 .syntax unified + 5186 .code 16 + 5187 .thumb_func + 5189 HAL_I2C_Slave_Receive_DMA: + 5190 .LVL369: + 5191 .LFB55: +2322:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** HAL_StatusTypeDef dmaxferstatus; + 5192 .loc 1 2322 1 is_stmt 1 view -0 + 5193 .cfi_startproc + 5194 @ args = 0, pretend = 0, frame = 0 + 5195 @ frame_needed = 0, uses_anonymous_args = 0 +2322:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** HAL_StatusTypeDef dmaxferstatus; + 5196 .loc 1 2322 1 is_stmt 0 view .LVU1710 + 5197 0000 70B5 push {r4, r5, r6, lr} + 5198 .cfi_def_cfa_offset 16 + 5199 .cfi_offset 4, -16 + 5200 .cfi_offset 5, -12 + 5201 .cfi_offset 6, -8 + 5202 .cfi_offset 14, -4 + 5203 0002 0400 movs r4, r0 + 5204 0004 0D00 movs r5, r1 +2323:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 5205 .loc 1 2323 3 is_stmt 1 view .LVU1711 +2325:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { + 5206 .loc 1 2325 3 view .LVU1712 +2325:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { + 5207 .loc 1 2325 11 is_stmt 0 view .LVU1713 + 5208 0006 4123 movs r3, #65 + 5209 0008 C35C ldrb r3, [r0, r3] +2325:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { + ARM GAS /tmp/ccuRhBPx.s page 247 + + + 5210 .loc 1 2325 6 view .LVU1714 + 5211 000a 202B cmp r3, #32 + 5212 000c 64D1 bne .L325 +2327:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { + 5213 .loc 1 2327 5 is_stmt 1 view .LVU1715 +2327:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { + 5214 .loc 1 2327 8 is_stmt 0 view .LVU1716 + 5215 000e 0029 cmp r1, #0 + 5216 0010 3CD0 beq .L320 +2327:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { + 5217 .loc 1 2327 25 discriminator 1 view .LVU1717 + 5218 0012 002A cmp r2, #0 + 5219 0014 3AD0 beq .L320 +2333:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 5220 .loc 1 2333 5 is_stmt 1 view .LVU1718 +2333:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 5221 .loc 1 2333 5 view .LVU1719 + 5222 0016 4023 movs r3, #64 + 5223 0018 C35C ldrb r3, [r0, r3] + 5224 001a 012B cmp r3, #1 + 5225 001c 5FD0 beq .L326 +2333:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 5226 .loc 1 2333 5 discriminator 2 view .LVU1720 + 5227 001e 4023 movs r3, #64 + 5228 0020 0121 movs r1, #1 + 5229 .LVL370: +2333:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 5230 .loc 1 2333 5 is_stmt 0 discriminator 2 view .LVU1721 + 5231 0022 C154 strb r1, [r0, r3] +2333:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 5232 .loc 1 2333 5 is_stmt 1 discriminator 2 view .LVU1722 +2335:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->Mode = HAL_I2C_MODE_SLAVE; + 5233 .loc 1 2335 5 view .LVU1723 +2335:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->Mode = HAL_I2C_MODE_SLAVE; + 5234 .loc 1 2335 23 is_stmt 0 view .LVU1724 + 5235 0024 0133 adds r3, r3, #1 + 5236 0026 2131 adds r1, r1, #33 + 5237 0028 C154 strb r1, [r0, r3] +2336:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->ErrorCode = HAL_I2C_ERROR_NONE; + 5238 .loc 1 2336 5 is_stmt 1 view .LVU1725 +2336:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->ErrorCode = HAL_I2C_ERROR_NONE; + 5239 .loc 1 2336 23 is_stmt 0 view .LVU1726 + 5240 002a 0133 adds r3, r3, #1 + 5241 002c 0239 subs r1, r1, #2 + 5242 002e C154 strb r1, [r0, r3] +2337:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 5243 .loc 1 2337 5 is_stmt 1 view .LVU1727 +2337:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 5244 .loc 1 2337 23 is_stmt 0 view .LVU1728 + 5245 0030 0023 movs r3, #0 + 5246 0032 4364 str r3, [r0, #68] +2340:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->XferCount = Size; + 5247 .loc 1 2340 5 is_stmt 1 view .LVU1729 +2340:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->XferCount = Size; + 5248 .loc 1 2340 23 is_stmt 0 view .LVU1730 + 5249 0034 4562 str r5, [r0, #36] +2341:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->XferSize = hi2c->XferCount; + ARM GAS /tmp/ccuRhBPx.s page 248 + + + 5250 .loc 1 2341 5 is_stmt 1 view .LVU1731 +2341:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->XferSize = hi2c->XferCount; + 5251 .loc 1 2341 23 is_stmt 0 view .LVU1732 + 5252 0036 4285 strh r2, [r0, #42] +2342:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->XferOptions = I2C_NO_OPTION_FRAME; + 5253 .loc 1 2342 5 is_stmt 1 view .LVU1733 +2342:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->XferOptions = I2C_NO_OPTION_FRAME; + 5254 .loc 1 2342 29 is_stmt 0 view .LVU1734 + 5255 0038 438D ldrh r3, [r0, #42] +2342:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->XferOptions = I2C_NO_OPTION_FRAME; + 5256 .loc 1 2342 23 view .LVU1735 + 5257 003a 0385 strh r3, [r0, #40] +2343:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->XferISR = I2C_Slave_ISR_DMA; + 5258 .loc 1 2343 5 is_stmt 1 view .LVU1736 +2343:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->XferISR = I2C_Slave_ISR_DMA; + 5259 .loc 1 2343 23 is_stmt 0 view .LVU1737 + 5260 003c 294B ldr r3, .L329 + 5261 003e C362 str r3, [r0, #44] +2344:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 5262 .loc 1 2344 5 is_stmt 1 view .LVU1738 +2344:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 5263 .loc 1 2344 23 is_stmt 0 view .LVU1739 + 5264 0040 294B ldr r3, .L329+4 + 5265 0042 4363 str r3, [r0, #52] +2346:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { + 5266 .loc 1 2346 5 is_stmt 1 view .LVU1740 +2346:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { + 5267 .loc 1 2346 13 is_stmt 0 view .LVU1741 + 5268 0044 C36B ldr r3, [r0, #60] +2346:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { + 5269 .loc 1 2346 8 view .LVU1742 + 5270 0046 002B cmp r3, #0 + 5271 0048 25D0 beq .L322 +2349:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 5272 .loc 1 2349 7 is_stmt 1 view .LVU1743 +2349:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 5273 .loc 1 2349 38 is_stmt 0 view .LVU1744 + 5274 004a 284A ldr r2, .L329+8 + 5275 .LVL371: +2349:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 5276 .loc 1 2349 38 view .LVU1745 + 5277 004c 9A62 str r2, [r3, #40] +2352:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 5278 .loc 1 2352 7 is_stmt 1 view .LVU1746 +2352:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 5279 .loc 1 2352 11 is_stmt 0 view .LVU1747 + 5280 004e C36B ldr r3, [r0, #60] +2352:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 5281 .loc 1 2352 39 view .LVU1748 + 5282 0050 274A ldr r2, .L329+12 + 5283 0052 1A63 str r2, [r3, #48] +2355:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->hdmarx->XferAbortCallback = NULL; + 5284 .loc 1 2355 7 is_stmt 1 view .LVU1749 +2355:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->hdmarx->XferAbortCallback = NULL; + 5285 .loc 1 2355 11 is_stmt 0 view .LVU1750 + 5286 0054 C26B ldr r2, [r0, #60] +2355:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->hdmarx->XferAbortCallback = NULL; + ARM GAS /tmp/ccuRhBPx.s page 249 + + + 5287 .loc 1 2355 42 view .LVU1751 + 5288 0056 0023 movs r3, #0 + 5289 0058 D362 str r3, [r2, #44] +2356:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 5290 .loc 1 2356 7 is_stmt 1 view .LVU1752 +2356:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 5291 .loc 1 2356 11 is_stmt 0 view .LVU1753 + 5292 005a C26B ldr r2, [r0, #60] +2356:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 5293 .loc 1 2356 39 view .LVU1754 + 5294 005c 5363 str r3, [r2, #52] +2359:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->XferSize); + 5295 .loc 1 2359 7 is_stmt 1 view .LVU1755 +2359:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->XferSize); + 5296 .loc 1 2359 69 is_stmt 0 view .LVU1756 + 5297 005e 0168 ldr r1, [r0] +2359:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->XferSize); + 5298 .loc 1 2359 64 view .LVU1757 + 5299 0060 2431 adds r1, r1, #36 +2360:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } + 5300 .loc 1 2360 44 view .LVU1758 + 5301 0062 038D ldrh r3, [r0, #40] +2359:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->XferSize); + 5302 .loc 1 2359 23 view .LVU1759 + 5303 0064 C06B ldr r0, [r0, #60] + 5304 .LVL372: +2359:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->XferSize); + 5305 .loc 1 2359 23 view .LVU1760 + 5306 0066 2A00 movs r2, r5 + 5307 0068 FFF7FEFF bl HAL_DMA_Start_IT + 5308 .LVL373: + 5309 006c 051E subs r5, r0, #0 + 5310 .LVL374: +2377:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { + 5311 .loc 1 2377 5 is_stmt 1 view .LVU1761 +2377:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { + 5312 .loc 1 2377 8 is_stmt 0 view .LVU1762 + 5313 006e 20D0 beq .L328 +2397:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->Mode = HAL_I2C_MODE_NONE; + 5314 .loc 1 2397 7 is_stmt 1 view .LVU1763 +2397:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->Mode = HAL_I2C_MODE_NONE; + 5315 .loc 1 2397 23 is_stmt 0 view .LVU1764 + 5316 0070 4123 movs r3, #65 + 5317 0072 2822 movs r2, #40 + 5318 0074 E254 strb r2, [r4, r3] +2398:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 5319 .loc 1 2398 7 is_stmt 1 view .LVU1765 +2398:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 5320 .loc 1 2398 23 is_stmt 0 view .LVU1766 + 5321 0076 0022 movs r2, #0 + 5322 0078 0133 adds r3, r3, #1 + 5323 007a E254 strb r2, [r4, r3] +2401:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 5324 .loc 1 2401 7 is_stmt 1 view .LVU1767 +2401:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 5325 .loc 1 2401 11 is_stmt 0 view .LVU1768 + 5326 007c 636C ldr r3, [r4, #68] + ARM GAS /tmp/ccuRhBPx.s page 250 + + +2401:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 5327 .loc 1 2401 23 view .LVU1769 + 5328 007e 1021 movs r1, #16 + 5329 0080 0B43 orrs r3, r1 + 5330 0082 6364 str r3, [r4, #68] +2404:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 5331 .loc 1 2404 7 is_stmt 1 view .LVU1770 +2404:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 5332 .loc 1 2404 7 view .LVU1771 + 5333 0084 4023 movs r3, #64 + 5334 0086 E254 strb r2, [r4, r3] +2404:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 5335 .loc 1 2404 7 view .LVU1772 +2406:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } + 5336 .loc 1 2406 7 view .LVU1773 +2406:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } + 5337 .loc 1 2406 14 is_stmt 0 view .LVU1774 + 5338 0088 0125 movs r5, #1 + 5339 008a 26E0 b .L319 + 5340 .LVL375: + 5341 .L320: +2329:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** return HAL_ERROR; + 5342 .loc 1 2329 7 is_stmt 1 view .LVU1775 +2329:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** return HAL_ERROR; + 5343 .loc 1 2329 23 is_stmt 0 view .LVU1776 + 5344 008c 8023 movs r3, #128 + 5345 008e 9B00 lsls r3, r3, #2 + 5346 0090 6364 str r3, [r4, #68] +2330:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } + 5347 .loc 1 2330 7 is_stmt 1 view .LVU1777 +2330:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } + 5348 .loc 1 2330 15 is_stmt 0 view .LVU1778 + 5349 0092 0125 movs r5, #1 + 5350 0094 21E0 b .L319 + 5351 .LVL376: + 5352 .L322: +2365:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->Mode = HAL_I2C_MODE_NONE; + 5353 .loc 1 2365 7 is_stmt 1 view .LVU1779 +2365:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->Mode = HAL_I2C_MODE_NONE; + 5354 .loc 1 2365 23 is_stmt 0 view .LVU1780 + 5355 0096 4123 movs r3, #65 + 5356 0098 2822 movs r2, #40 + 5357 .LVL377: +2365:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->Mode = HAL_I2C_MODE_NONE; + 5358 .loc 1 2365 23 view .LVU1781 + 5359 009a C254 strb r2, [r0, r3] +2366:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 5360 .loc 1 2366 7 is_stmt 1 view .LVU1782 +2366:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 5361 .loc 1 2366 23 is_stmt 0 view .LVU1783 + 5362 009c 0022 movs r2, #0 + 5363 009e 0133 adds r3, r3, #1 + 5364 00a0 C254 strb r2, [r0, r3] +2369:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 5365 .loc 1 2369 7 is_stmt 1 view .LVU1784 +2369:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 5366 .loc 1 2369 11 is_stmt 0 view .LVU1785 + ARM GAS /tmp/ccuRhBPx.s page 251 + + + 5367 00a2 436C ldr r3, [r0, #68] +2369:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 5368 .loc 1 2369 23 view .LVU1786 + 5369 00a4 8021 movs r1, #128 + 5370 00a6 0B43 orrs r3, r1 + 5371 00a8 4364 str r3, [r0, #68] +2372:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 5372 .loc 1 2372 7 is_stmt 1 view .LVU1787 +2372:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 5373 .loc 1 2372 7 view .LVU1788 + 5374 00aa 4023 movs r3, #64 + 5375 00ac C254 strb r2, [r0, r3] +2372:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 5376 .loc 1 2372 7 view .LVU1789 +2374:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } + 5377 .loc 1 2374 7 view .LVU1790 +2374:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } + 5378 .loc 1 2374 14 is_stmt 0 view .LVU1791 + 5379 00ae 0125 movs r5, #1 + 5380 .LVL378: +2374:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } + 5381 .loc 1 2374 14 view .LVU1792 + 5382 00b0 13E0 b .L319 + 5383 .LVL379: + 5384 .L328: +2380:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 5385 .loc 1 2380 7 is_stmt 1 view .LVU1793 +2380:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 5386 .loc 1 2380 11 is_stmt 0 view .LVU1794 + 5387 00b2 2268 ldr r2, [r4] +2380:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 5388 .loc 1 2380 21 view .LVU1795 + 5389 00b4 5368 ldr r3, [r2, #4] +2380:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 5390 .loc 1 2380 27 view .LVU1796 + 5391 00b6 0F49 ldr r1, .L329+16 + 5392 00b8 0B40 ands r3, r1 + 5393 00ba 5360 str r3, [r2, #4] +2383:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 5394 .loc 1 2383 7 is_stmt 1 view .LVU1797 +2383:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 5395 .loc 1 2383 7 view .LVU1798 + 5396 00bc 4023 movs r3, #64 + 5397 00be 0022 movs r2, #0 + 5398 00c0 E254 strb r2, [r4, r3] +2383:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 5399 .loc 1 2383 7 view .LVU1799 +2389:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 5400 .loc 1 2389 7 view .LVU1800 + 5401 00c2 8026 movs r6, #128 + 5402 00c4 3602 lsls r6, r6, #8 + 5403 00c6 3100 movs r1, r6 + 5404 00c8 2000 movs r0, r4 + 5405 .LVL380: +2389:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 5406 .loc 1 2389 7 is_stmt 0 view .LVU1801 + 5407 00ca FFF7FEFF bl I2C_Enable_IRQ + ARM GAS /tmp/ccuRhBPx.s page 252 + + + 5408 .LVL381: +2392:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } + 5409 .loc 1 2392 7 is_stmt 1 view .LVU1802 +2392:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } + 5410 .loc 1 2392 11 is_stmt 0 view .LVU1803 + 5411 00ce 2368 ldr r3, [r4] +2392:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } + 5412 .loc 1 2392 21 view .LVU1804 + 5413 00d0 1A68 ldr r2, [r3] +2392:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } + 5414 .loc 1 2392 27 view .LVU1805 + 5415 00d2 1643 orrs r6, r2 + 5416 00d4 1E60 str r6, [r3] +2409:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } + 5417 .loc 1 2409 5 is_stmt 1 view .LVU1806 +2409:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } + 5418 .loc 1 2409 12 is_stmt 0 view .LVU1807 + 5419 00d6 00E0 b .L319 + 5420 .LVL382: + 5421 .L325: +2413:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } + 5422 .loc 1 2413 12 view .LVU1808 + 5423 00d8 0225 movs r5, #2 + 5424 .LVL383: + 5425 .L319: +2415:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 5426 .loc 1 2415 1 view .LVU1809 + 5427 00da 2800 movs r0, r5 + 5428 @ sp needed + 5429 .LVL384: +2415:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 5430 .loc 1 2415 1 view .LVU1810 + 5431 00dc 70BD pop {r4, r5, r6, pc} + 5432 .LVL385: + 5433 .L326: +2333:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 5434 .loc 1 2333 5 discriminator 1 view .LVU1811 + 5435 00de 0225 movs r5, #2 + 5436 00e0 FBE7 b .L319 + 5437 .L330: + 5438 00e2 C046 .align 2 + 5439 .L329: + 5440 00e4 0000FFFF .word -65536 + 5441 00e8 00000000 .word I2C_Slave_ISR_DMA + 5442 00ec 00000000 .word I2C_DMASlaveReceiveCplt + 5443 00f0 00000000 .word I2C_DMAError + 5444 00f4 FF7FFFFF .word -32769 + 5445 .cfi_endproc + 5446 .LFE55: + 5448 .section .text.HAL_I2C_Mem_Write,"ax",%progbits + 5449 .align 1 + 5450 .global HAL_I2C_Mem_Write + 5451 .syntax unified + 5452 .code 16 + 5453 .thumb_func + 5455 HAL_I2C_Mem_Write: + 5456 .LVL386: + ARM GAS /tmp/ccuRhBPx.s page 253 + + + 5457 .LFB56: +2432:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** uint32_t tickstart; + 5458 .loc 1 2432 1 is_stmt 1 view -0 + 5459 .cfi_startproc + 5460 @ args = 12, pretend = 0, frame = 16 + 5461 @ frame_needed = 0, uses_anonymous_args = 0 +2432:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** uint32_t tickstart; + 5462 .loc 1 2432 1 is_stmt 0 view .LVU1813 + 5463 0000 F0B5 push {r4, r5, r6, r7, lr} + 5464 .cfi_def_cfa_offset 20 + 5465 .cfi_offset 4, -20 + 5466 .cfi_offset 5, -16 + 5467 .cfi_offset 6, -12 + 5468 .cfi_offset 7, -8 + 5469 .cfi_offset 14, -4 + 5470 0002 87B0 sub sp, sp, #28 + 5471 .cfi_def_cfa_offset 48 + 5472 0004 0400 movs r4, r0 + 5473 0006 0391 str r1, [sp, #12] + 5474 0008 0492 str r2, [sp, #16] + 5475 000a 0593 str r3, [sp, #20] + 5476 000c 0CAB add r3, sp, #48 + 5477 .LVL387: +2432:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** uint32_t tickstart; + 5478 .loc 1 2432 1 view .LVU1814 + 5479 000e 20CB ldmia r3!, {r5} + 5480 .LVL388: +2432:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** uint32_t tickstart; + 5481 .loc 1 2432 1 view .LVU1815 + 5482 0010 1F88 ldrh r7, [r3] +2433:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 5483 .loc 1 2433 3 is_stmt 1 view .LVU1816 +2436:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 5484 .loc 1 2436 3 view .LVU1817 +2438:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { + 5485 .loc 1 2438 3 view .LVU1818 +2438:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { + 5486 .loc 1 2438 11 is_stmt 0 view .LVU1819 + 5487 0012 4123 movs r3, #65 + 5488 .LVL389: +2438:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { + 5489 .loc 1 2438 11 view .LVU1820 + 5490 0014 C35C ldrb r3, [r0, r3] +2438:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { + 5491 .loc 1 2438 6 view .LVU1821 + 5492 0016 202B cmp r3, #32 + 5493 0018 00D0 beq .LCB5120 + 5494 001a B3E0 b .L341 @long jump + 5495 .LCB5120: +2440:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { + 5496 .loc 1 2440 5 is_stmt 1 view .LVU1822 +2440:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { + 5497 .loc 1 2440 8 is_stmt 0 view .LVU1823 + 5498 001c 002D cmp r5, #0 + 5499 001e 18D0 beq .L333 +2440:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { + 5500 .loc 1 2440 25 discriminator 1 view .LVU1824 + ARM GAS /tmp/ccuRhBPx.s page 254 + + + 5501 0020 002F cmp r7, #0 + 5502 0022 16D0 beq .L333 +2447:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 5503 .loc 1 2447 5 is_stmt 1 view .LVU1825 +2447:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 5504 .loc 1 2447 5 view .LVU1826 + 5505 0024 4023 movs r3, #64 + 5506 0026 C35C ldrb r3, [r0, r3] + 5507 0028 012B cmp r3, #1 + 5508 002a 00D1 bne .LCB5131 + 5509 002c ADE0 b .L342 @long jump + 5510 .LCB5131: +2447:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 5511 .loc 1 2447 5 discriminator 2 view .LVU1827 + 5512 002e 4023 movs r3, #64 + 5513 0030 0122 movs r2, #1 + 5514 .LVL390: +2447:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 5515 .loc 1 2447 5 is_stmt 0 discriminator 2 view .LVU1828 + 5516 0032 C254 strb r2, [r0, r3] +2447:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 5517 .loc 1 2447 5 is_stmt 1 discriminator 2 view .LVU1829 +2450:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 5518 .loc 1 2450 5 view .LVU1830 +2450:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 5519 .loc 1 2450 17 is_stmt 0 view .LVU1831 + 5520 0034 FFF7FEFF bl HAL_GetTick + 5521 .LVL391: +2450:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 5522 .loc 1 2450 17 view .LVU1832 + 5523 0038 0600 movs r6, r0 + 5524 .LVL392: +2452:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { + 5525 .loc 1 2452 5 is_stmt 1 view .LVU1833 +2452:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { + 5526 .loc 1 2452 9 is_stmt 0 view .LVU1834 + 5527 003a 8021 movs r1, #128 + 5528 003c 0090 str r0, [sp] + 5529 003e 1923 movs r3, #25 + 5530 0040 0122 movs r2, #1 + 5531 0042 0902 lsls r1, r1, #8 + 5532 0044 2000 movs r0, r4 + 5533 .LVL393: +2452:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { + 5534 .loc 1 2452 9 view .LVU1835 + 5535 0046 FFF7FEFF bl I2C_WaitOnFlagUntilTimeout + 5536 .LVL394: +2452:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { + 5537 .loc 1 2452 8 discriminator 1 view .LVU1836 + 5538 004a 0028 cmp r0, #0 + 5539 004c 06D0 beq .L347 +2454:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } + 5540 .loc 1 2454 14 view .LVU1837 + 5541 004e 0120 movs r0, #1 + 5542 0050 99E0 b .L332 + 5543 .LVL395: + 5544 .L333: + ARM GAS /tmp/ccuRhBPx.s page 255 + + +2442:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** return HAL_ERROR; + 5545 .loc 1 2442 7 is_stmt 1 view .LVU1838 +2442:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** return HAL_ERROR; + 5546 .loc 1 2442 23 is_stmt 0 view .LVU1839 + 5547 0052 8023 movs r3, #128 + 5548 0054 9B00 lsls r3, r3, #2 + 5549 0056 6364 str r3, [r4, #68] +2443:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } + 5550 .loc 1 2443 7 is_stmt 1 view .LVU1840 +2443:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } + 5551 .loc 1 2443 15 is_stmt 0 view .LVU1841 + 5552 0058 0120 movs r0, #1 + 5553 .LVL396: +2443:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } + 5554 .loc 1 2443 15 view .LVU1842 + 5555 005a 94E0 b .L332 + 5556 .LVL397: + 5557 .L347: +2457:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->Mode = HAL_I2C_MODE_MEM; + 5558 .loc 1 2457 5 is_stmt 1 view .LVU1843 +2457:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->Mode = HAL_I2C_MODE_MEM; + 5559 .loc 1 2457 21 is_stmt 0 view .LVU1844 + 5560 005c 4123 movs r3, #65 + 5561 005e 2122 movs r2, #33 + 5562 0060 E254 strb r2, [r4, r3] +2458:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->ErrorCode = HAL_I2C_ERROR_NONE; + 5563 .loc 1 2458 5 is_stmt 1 view .LVU1845 +2458:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->ErrorCode = HAL_I2C_ERROR_NONE; + 5564 .loc 1 2458 21 is_stmt 0 view .LVU1846 + 5565 0062 0133 adds r3, r3, #1 + 5566 0064 1F32 adds r2, r2, #31 + 5567 0066 E254 strb r2, [r4, r3] +2459:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 5568 .loc 1 2459 5 is_stmt 1 view .LVU1847 +2459:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 5569 .loc 1 2459 21 is_stmt 0 view .LVU1848 + 5570 0068 0023 movs r3, #0 + 5571 006a 6364 str r3, [r4, #68] +2462:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->XferCount = Size; + 5572 .loc 1 2462 5 is_stmt 1 view .LVU1849 +2462:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->XferCount = Size; + 5573 .loc 1 2462 21 is_stmt 0 view .LVU1850 + 5574 006c 6562 str r5, [r4, #36] +2463:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->XferISR = NULL; + 5575 .loc 1 2463 5 is_stmt 1 view .LVU1851 +2463:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->XferISR = NULL; + 5576 .loc 1 2463 21 is_stmt 0 view .LVU1852 + 5577 006e 6785 strh r7, [r4, #42] +2464:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 5578 .loc 1 2464 5 is_stmt 1 view .LVU1853 +2464:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 5579 .loc 1 2464 21 is_stmt 0 view .LVU1854 + 5580 0070 6363 str r3, [r4, #52] +2467:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { + 5581 .loc 1 2467 5 is_stmt 1 view .LVU1855 +2467:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { + 5582 .loc 1 2467 9 is_stmt 0 view .LVU1856 + ARM GAS /tmp/ccuRhBPx.s page 256 + + + 5583 0072 0196 str r6, [sp, #4] + 5584 0074 0E9B ldr r3, [sp, #56] + 5585 0076 0093 str r3, [sp] + 5586 0078 059B ldr r3, [sp, #20] + 5587 007a 049A ldr r2, [sp, #16] + 5588 007c 0399 ldr r1, [sp, #12] + 5589 007e 2000 movs r0, r4 + 5590 0080 FFF7FEFF bl I2C_RequestMemoryWrite + 5591 .LVL398: +2467:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { + 5592 .loc 1 2467 8 discriminator 1 view .LVU1857 + 5593 0084 0028 cmp r0, #0 + 5594 0086 0FD1 bne .L348 +2475:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { + 5595 .loc 1 2475 5 is_stmt 1 view .LVU1858 +2475:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { + 5596 .loc 1 2475 13 is_stmt 0 view .LVU1859 + 5597 0088 638D ldrh r3, [r4, #42] + 5598 008a 9BB2 uxth r3, r3 +2475:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { + 5599 .loc 1 2475 8 view .LVU1860 + 5600 008c FF2B cmp r3, #255 + 5601 008e 10D9 bls .L336 +2477:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** I2C_TransferConfig(hi2c, DevAddress, (uint8_t)hi2c->XferSize, I2C_RELOAD_MODE, I2C_NO_STARTST + 5602 .loc 1 2477 7 is_stmt 1 view .LVU1861 +2477:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** I2C_TransferConfig(hi2c, DevAddress, (uint8_t)hi2c->XferSize, I2C_RELOAD_MODE, I2C_NO_STARTST + 5603 .loc 1 2477 22 is_stmt 0 view .LVU1862 + 5604 0090 FF23 movs r3, #255 + 5605 0092 2385 strh r3, [r4, #40] +2478:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } + 5606 .loc 1 2478 7 is_stmt 1 view .LVU1863 + 5607 0094 7F3B subs r3, r3, #127 + 5608 0096 0022 movs r2, #0 + 5609 0098 0092 str r2, [sp] + 5610 009a 5B04 lsls r3, r3, #17 + 5611 009c FF32 adds r2, r2, #255 + 5612 009e 0399 ldr r1, [sp, #12] + 5613 00a0 2000 movs r0, r4 + 5614 00a2 FFF7FEFF bl I2C_TransferConfig + 5615 .LVL399: + 5616 00a6 21E0 b .L340 + 5617 .L348: +2470:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** return HAL_ERROR; + 5618 .loc 1 2470 7 view .LVU1864 +2470:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** return HAL_ERROR; + 5619 .loc 1 2470 7 view .LVU1865 + 5620 00a8 4023 movs r3, #64 + 5621 00aa 0022 movs r2, #0 + 5622 00ac E254 strb r2, [r4, r3] +2470:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** return HAL_ERROR; + 5623 .loc 1 2470 7 view .LVU1866 +2471:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } + 5624 .loc 1 2471 7 view .LVU1867 +2471:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } + 5625 .loc 1 2471 14 is_stmt 0 view .LVU1868 + 5626 00ae 0120 movs r0, #1 + 5627 00b0 69E0 b .L332 + ARM GAS /tmp/ccuRhBPx.s page 257 + + + 5628 .L336: +2482:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** I2C_TransferConfig(hi2c, DevAddress, (uint8_t)hi2c->XferSize, I2C_AUTOEND_MODE, I2C_NO_STARTS + 5629 .loc 1 2482 7 is_stmt 1 view .LVU1869 +2482:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** I2C_TransferConfig(hi2c, DevAddress, (uint8_t)hi2c->XferSize, I2C_AUTOEND_MODE, I2C_NO_STARTS + 5630 .loc 1 2482 28 is_stmt 0 view .LVU1870 + 5631 00b2 628D ldrh r2, [r4, #42] + 5632 00b4 92B2 uxth r2, r2 +2482:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** I2C_TransferConfig(hi2c, DevAddress, (uint8_t)hi2c->XferSize, I2C_AUTOEND_MODE, I2C_NO_STARTS + 5633 .loc 1 2482 22 view .LVU1871 + 5634 00b6 2285 strh r2, [r4, #40] +2483:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } + 5635 .loc 1 2483 7 is_stmt 1 view .LVU1872 + 5636 00b8 8023 movs r3, #128 + 5637 00ba D2B2 uxtb r2, r2 + 5638 00bc 0021 movs r1, #0 + 5639 00be 0091 str r1, [sp] + 5640 00c0 9B04 lsls r3, r3, #18 + 5641 00c2 0399 ldr r1, [sp, #12] + 5642 00c4 2000 movs r0, r4 + 5643 00c6 FFF7FEFF bl I2C_TransferConfig + 5644 .LVL400: + 5645 00ca 0FE0 b .L340 + 5646 .L339: +2519:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** I2C_TransferConfig(hi2c, DevAddress, (uint8_t)hi2c->XferSize, I2C_AUTOEND_MODE, + 5647 .loc 1 2519 11 view .LVU1873 +2519:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** I2C_TransferConfig(hi2c, DevAddress, (uint8_t)hi2c->XferSize, I2C_AUTOEND_MODE, + 5648 .loc 1 2519 32 is_stmt 0 view .LVU1874 + 5649 00cc 628D ldrh r2, [r4, #42] + 5650 00ce 92B2 uxth r2, r2 +2519:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** I2C_TransferConfig(hi2c, DevAddress, (uint8_t)hi2c->XferSize, I2C_AUTOEND_MODE, + 5651 .loc 1 2519 26 view .LVU1875 + 5652 00d0 2285 strh r2, [r4, #40] +2520:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** I2C_NO_STARTSTOP); + 5653 .loc 1 2520 11 is_stmt 1 view .LVU1876 + 5654 00d2 8023 movs r3, #128 + 5655 00d4 D2B2 uxtb r2, r2 + 5656 00d6 0021 movs r1, #0 + 5657 00d8 0091 str r1, [sp] + 5658 00da 9B04 lsls r3, r3, #18 + 5659 00dc 0399 ldr r1, [sp, #12] + 5660 00de 2000 movs r0, r4 + 5661 00e0 FFF7FEFF bl I2C_TransferConfig + 5662 .LVL401: + 5663 .L338: +2525:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 5664 .loc 1 2525 30 view .LVU1877 +2525:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 5665 .loc 1 2525 18 is_stmt 0 view .LVU1878 + 5666 00e4 638D ldrh r3, [r4, #42] + 5667 00e6 9BB2 uxth r3, r3 +2525:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 5668 .loc 1 2525 30 view .LVU1879 + 5669 00e8 002B cmp r3, #0 + 5670 00ea 34D0 beq .L349 + 5671 .L340: +2486:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { + 5672 .loc 1 2486 5 is_stmt 1 view .LVU1880 + ARM GAS /tmp/ccuRhBPx.s page 258 + + +2489:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { + 5673 .loc 1 2489 7 view .LVU1881 +2489:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { + 5674 .loc 1 2489 11 is_stmt 0 view .LVU1882 + 5675 00ec 3200 movs r2, r6 + 5676 00ee 0E99 ldr r1, [sp, #56] + 5677 00f0 2000 movs r0, r4 + 5678 00f2 FFF7FEFF bl I2C_WaitOnTXISFlagUntilTimeout + 5679 .LVL402: +2489:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { + 5680 .loc 1 2489 10 discriminator 1 view .LVU1883 + 5681 00f6 0028 cmp r0, #0 + 5682 00f8 49D1 bne .L344 +2495:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 5683 .loc 1 2495 7 is_stmt 1 view .LVU1884 +2495:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 5684 .loc 1 2495 35 is_stmt 0 view .LVU1885 + 5685 00fa 626A ldr r2, [r4, #36] +2495:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 5686 .loc 1 2495 11 view .LVU1886 + 5687 00fc 2368 ldr r3, [r4] +2495:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 5688 .loc 1 2495 30 view .LVU1887 + 5689 00fe 1278 ldrb r2, [r2] +2495:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 5690 .loc 1 2495 28 view .LVU1888 + 5691 0100 9A62 str r2, [r3, #40] +2498:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 5692 .loc 1 2498 7 is_stmt 1 view .LVU1889 +2498:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 5693 .loc 1 2498 11 is_stmt 0 view .LVU1890 + 5694 0102 636A ldr r3, [r4, #36] +2498:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 5695 .loc 1 2498 21 view .LVU1891 + 5696 0104 0133 adds r3, r3, #1 + 5697 0106 6362 str r3, [r4, #36] +2500:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->XferSize--; + 5698 .loc 1 2500 7 is_stmt 1 view .LVU1892 +2500:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->XferSize--; + 5699 .loc 1 2500 11 is_stmt 0 view .LVU1893 + 5700 0108 638D ldrh r3, [r4, #42] +2500:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->XferSize--; + 5701 .loc 1 2500 22 view .LVU1894 + 5702 010a 013B subs r3, r3, #1 + 5703 010c 9BB2 uxth r3, r3 + 5704 010e 6385 strh r3, [r4, #42] +2501:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 5705 .loc 1 2501 7 is_stmt 1 view .LVU1895 +2501:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 5706 .loc 1 2501 11 is_stmt 0 view .LVU1896 + 5707 0110 238D ldrh r3, [r4, #40] +2501:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 5708 .loc 1 2501 21 view .LVU1897 + 5709 0112 013B subs r3, r3, #1 + 5710 0114 9BB2 uxth r3, r3 + 5711 0116 2385 strh r3, [r4, #40] +2503:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { + ARM GAS /tmp/ccuRhBPx.s page 259 + + + 5712 .loc 1 2503 7 is_stmt 1 view .LVU1898 +2503:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { + 5713 .loc 1 2503 16 is_stmt 0 view .LVU1899 + 5714 0118 628D ldrh r2, [r4, #42] + 5715 011a 92B2 uxth r2, r2 +2503:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { + 5716 .loc 1 2503 10 view .LVU1900 + 5717 011c 002A cmp r2, #0 + 5718 011e E1D0 beq .L338 +2503:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { + 5719 .loc 1 2503 35 discriminator 1 view .LVU1901 + 5720 0120 002B cmp r3, #0 + 5721 0122 DFD1 bne .L338 +2506:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { + 5722 .loc 1 2506 9 is_stmt 1 view .LVU1902 +2506:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { + 5723 .loc 1 2506 13 is_stmt 0 view .LVU1903 + 5724 0124 0096 str r6, [sp] + 5725 0126 0E9B ldr r3, [sp, #56] + 5726 0128 0022 movs r2, #0 + 5727 012a 8021 movs r1, #128 + 5728 012c 2000 movs r0, r4 + 5729 012e FFF7FEFF bl I2C_WaitOnFlagUntilTimeout + 5730 .LVL403: +2506:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { + 5731 .loc 1 2506 12 discriminator 1 view .LVU1904 + 5732 0132 0028 cmp r0, #0 + 5733 0134 2DD1 bne .L345 +2511:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { + 5734 .loc 1 2511 9 is_stmt 1 view .LVU1905 +2511:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { + 5735 .loc 1 2511 17 is_stmt 0 view .LVU1906 + 5736 0136 638D ldrh r3, [r4, #42] + 5737 0138 9BB2 uxth r3, r3 +2511:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { + 5738 .loc 1 2511 12 view .LVU1907 + 5739 013a FF2B cmp r3, #255 + 5740 013c C6D9 bls .L339 +2513:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** I2C_TransferConfig(hi2c, DevAddress, (uint8_t)hi2c->XferSize, I2C_RELOAD_MODE, + 5741 .loc 1 2513 11 is_stmt 1 view .LVU1908 +2513:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** I2C_TransferConfig(hi2c, DevAddress, (uint8_t)hi2c->XferSize, I2C_RELOAD_MODE, + 5742 .loc 1 2513 26 is_stmt 0 view .LVU1909 + 5743 013e FF23 movs r3, #255 + 5744 0140 2385 strh r3, [r4, #40] +2514:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** I2C_NO_STARTSTOP); + 5745 .loc 1 2514 11 is_stmt 1 view .LVU1910 + 5746 0142 7F3B subs r3, r3, #127 + 5747 0144 0022 movs r2, #0 + 5748 0146 0092 str r2, [sp] + 5749 0148 5B04 lsls r3, r3, #17 + 5750 014a FF32 adds r2, r2, #255 + 5751 014c 0399 ldr r1, [sp, #12] + 5752 014e 2000 movs r0, r4 + 5753 0150 FFF7FEFF bl I2C_TransferConfig + 5754 .LVL404: + 5755 0154 C6E7 b .L338 + 5756 .L349: + ARM GAS /tmp/ccuRhBPx.s page 260 + + +2529:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { + 5757 .loc 1 2529 5 view .LVU1911 +2529:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { + 5758 .loc 1 2529 9 is_stmt 0 view .LVU1912 + 5759 0156 3200 movs r2, r6 + 5760 0158 0E99 ldr r1, [sp, #56] + 5761 015a 2000 movs r0, r4 + 5762 015c FFF7FEFF bl I2C_WaitOnSTOPFlagUntilTimeout + 5763 .LVL405: +2529:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { + 5764 .loc 1 2529 8 discriminator 1 view .LVU1913 + 5765 0160 0028 cmp r0, #0 + 5766 0162 18D1 bne .L346 +2535:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 5767 .loc 1 2535 5 is_stmt 1 view .LVU1914 + 5768 0164 2368 ldr r3, [r4] + 5769 0166 2022 movs r2, #32 + 5770 0168 DA61 str r2, [r3, #28] +2538:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 5771 .loc 1 2538 5 view .LVU1915 + 5772 016a 2168 ldr r1, [r4] + 5773 016c 4B68 ldr r3, [r1, #4] + 5774 016e 0B4D ldr r5, .L350 + 5775 0170 2B40 ands r3, r5 + 5776 0172 4B60 str r3, [r1, #4] +2540:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->Mode = HAL_I2C_MODE_NONE; + 5777 .loc 1 2540 5 view .LVU1916 +2540:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->Mode = HAL_I2C_MODE_NONE; + 5778 .loc 1 2540 17 is_stmt 0 view .LVU1917 + 5779 0174 4123 movs r3, #65 + 5780 0176 E254 strb r2, [r4, r3] +2541:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 5781 .loc 1 2541 5 is_stmt 1 view .LVU1918 +2541:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 5782 .loc 1 2541 17 is_stmt 0 view .LVU1919 + 5783 0178 0023 movs r3, #0 + 5784 017a 2232 adds r2, r2, #34 + 5785 017c A354 strb r3, [r4, r2] +2544:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 5786 .loc 1 2544 5 is_stmt 1 view .LVU1920 +2544:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 5787 .loc 1 2544 5 view .LVU1921 + 5788 017e 023A subs r2, r2, #2 + 5789 0180 A354 strb r3, [r4, r2] +2544:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 5790 .loc 1 2544 5 view .LVU1922 +2546:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } + 5791 .loc 1 2546 5 view .LVU1923 +2546:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } + 5792 .loc 1 2546 12 is_stmt 0 view .LVU1924 + 5793 0182 00E0 b .L332 + 5794 .LVL406: + 5795 .L341: +2550:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } + 5796 .loc 1 2550 12 view .LVU1925 + 5797 0184 0220 movs r0, #2 + 5798 .LVL407: + ARM GAS /tmp/ccuRhBPx.s page 261 + + + 5799 .L332: +2552:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 5800 .loc 1 2552 1 view .LVU1926 + 5801 0186 07B0 add sp, sp, #28 + 5802 @ sp needed + 5803 .LVL408: +2552:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 5804 .loc 1 2552 1 view .LVU1927 + 5805 0188 F0BD pop {r4, r5, r6, r7, pc} + 5806 .LVL409: + 5807 .L342: +2447:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 5808 .loc 1 2447 5 discriminator 1 view .LVU1928 + 5809 018a 0220 movs r0, #2 + 5810 .LVL410: +2447:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 5811 .loc 1 2447 5 discriminator 1 view .LVU1929 + 5812 018c FBE7 b .L332 + 5813 .LVL411: + 5814 .L344: +2491:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } + 5815 .loc 1 2491 16 view .LVU1930 + 5816 018e 0120 movs r0, #1 + 5817 0190 F9E7 b .L332 + 5818 .L345: +2508:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } + 5819 .loc 1 2508 18 view .LVU1931 + 5820 0192 0120 movs r0, #1 + 5821 0194 F7E7 b .L332 + 5822 .L346: +2531:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } + 5823 .loc 1 2531 14 view .LVU1932 + 5824 0196 0120 movs r0, #1 + 5825 0198 F5E7 b .L332 + 5826 .L351: + 5827 019a C046 .align 2 + 5828 .L350: + 5829 019c 00E800FE .word -33495040 + 5830 .cfi_endproc + 5831 .LFE56: + 5833 .section .text.HAL_I2C_Mem_Read,"ax",%progbits + 5834 .align 1 + 5835 .global HAL_I2C_Mem_Read + 5836 .syntax unified + 5837 .code 16 + 5838 .thumb_func + 5840 HAL_I2C_Mem_Read: + 5841 .LVL412: + 5842 .LFB57: +2569:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** uint32_t tickstart; + 5843 .loc 1 2569 1 is_stmt 1 view -0 + 5844 .cfi_startproc + 5845 @ args = 12, pretend = 0, frame = 16 + 5846 @ frame_needed = 0, uses_anonymous_args = 0 +2569:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** uint32_t tickstart; + 5847 .loc 1 2569 1 is_stmt 0 view .LVU1934 + 5848 0000 F0B5 push {r4, r5, r6, r7, lr} + ARM GAS /tmp/ccuRhBPx.s page 262 + + + 5849 .cfi_def_cfa_offset 20 + 5850 .cfi_offset 4, -20 + 5851 .cfi_offset 5, -16 + 5852 .cfi_offset 6, -12 + 5853 .cfi_offset 7, -8 + 5854 .cfi_offset 14, -4 + 5855 0002 87B0 sub sp, sp, #28 + 5856 .cfi_def_cfa_offset 48 + 5857 0004 0400 movs r4, r0 + 5858 0006 0391 str r1, [sp, #12] + 5859 0008 0492 str r2, [sp, #16] + 5860 000a 0593 str r3, [sp, #20] + 5861 000c 0CAB add r3, sp, #48 + 5862 .LVL413: +2569:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** uint32_t tickstart; + 5863 .loc 1 2569 1 view .LVU1935 + 5864 000e 20CB ldmia r3!, {r5} + 5865 .LVL414: +2569:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** uint32_t tickstart; + 5866 .loc 1 2569 1 view .LVU1936 + 5867 0010 1F88 ldrh r7, [r3] +2570:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 5868 .loc 1 2570 3 is_stmt 1 view .LVU1937 +2573:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 5869 .loc 1 2573 3 view .LVU1938 +2575:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { + 5870 .loc 1 2575 3 view .LVU1939 +2575:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { + 5871 .loc 1 2575 11 is_stmt 0 view .LVU1940 + 5872 0012 4123 movs r3, #65 + 5873 .LVL415: +2575:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { + 5874 .loc 1 2575 11 view .LVU1941 + 5875 0014 C35C ldrb r3, [r0, r3] +2575:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { + 5876 .loc 1 2575 6 view .LVU1942 + 5877 0016 202B cmp r3, #32 + 5878 0018 00D0 beq .LCB5512 + 5879 001a B5E0 b .L362 @long jump + 5880 .LCB5512: +2577:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { + 5881 .loc 1 2577 5 is_stmt 1 view .LVU1943 +2577:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { + 5882 .loc 1 2577 8 is_stmt 0 view .LVU1944 + 5883 001c 002D cmp r5, #0 + 5884 001e 18D0 beq .L354 +2577:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { + 5885 .loc 1 2577 25 discriminator 1 view .LVU1945 + 5886 0020 002F cmp r7, #0 + 5887 0022 16D0 beq .L354 +2584:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 5888 .loc 1 2584 5 is_stmt 1 view .LVU1946 +2584:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 5889 .loc 1 2584 5 view .LVU1947 + 5890 0024 4023 movs r3, #64 + 5891 0026 C35C ldrb r3, [r0, r3] + 5892 0028 012B cmp r3, #1 + ARM GAS /tmp/ccuRhBPx.s page 263 + + + 5893 002a 00D1 bne .LCB5523 + 5894 002c AFE0 b .L363 @long jump + 5895 .LCB5523: +2584:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 5896 .loc 1 2584 5 discriminator 2 view .LVU1948 + 5897 002e 4023 movs r3, #64 + 5898 0030 0122 movs r2, #1 + 5899 .LVL416: +2584:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 5900 .loc 1 2584 5 is_stmt 0 discriminator 2 view .LVU1949 + 5901 0032 C254 strb r2, [r0, r3] +2584:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 5902 .loc 1 2584 5 is_stmt 1 discriminator 2 view .LVU1950 +2587:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 5903 .loc 1 2587 5 view .LVU1951 +2587:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 5904 .loc 1 2587 17 is_stmt 0 view .LVU1952 + 5905 0034 FFF7FEFF bl HAL_GetTick + 5906 .LVL417: +2587:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 5907 .loc 1 2587 17 view .LVU1953 + 5908 0038 0600 movs r6, r0 + 5909 .LVL418: +2589:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { + 5910 .loc 1 2589 5 is_stmt 1 view .LVU1954 +2589:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { + 5911 .loc 1 2589 9 is_stmt 0 view .LVU1955 + 5912 003a 8021 movs r1, #128 + 5913 003c 0090 str r0, [sp] + 5914 003e 1923 movs r3, #25 + 5915 0040 0122 movs r2, #1 + 5916 0042 0902 lsls r1, r1, #8 + 5917 0044 2000 movs r0, r4 + 5918 .LVL419: +2589:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { + 5919 .loc 1 2589 9 view .LVU1956 + 5920 0046 FFF7FEFF bl I2C_WaitOnFlagUntilTimeout + 5921 .LVL420: +2589:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { + 5922 .loc 1 2589 8 discriminator 1 view .LVU1957 + 5923 004a 0028 cmp r0, #0 + 5924 004c 06D0 beq .L368 +2591:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } + 5925 .loc 1 2591 14 view .LVU1958 + 5926 004e 0120 movs r0, #1 + 5927 0050 9BE0 b .L353 + 5928 .LVL421: + 5929 .L354: +2579:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** return HAL_ERROR; + 5930 .loc 1 2579 7 is_stmt 1 view .LVU1959 +2579:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** return HAL_ERROR; + 5931 .loc 1 2579 23 is_stmt 0 view .LVU1960 + 5932 0052 8023 movs r3, #128 + 5933 0054 9B00 lsls r3, r3, #2 + 5934 0056 6364 str r3, [r4, #68] +2580:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } + 5935 .loc 1 2580 7 is_stmt 1 view .LVU1961 + ARM GAS /tmp/ccuRhBPx.s page 264 + + +2580:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } + 5936 .loc 1 2580 15 is_stmt 0 view .LVU1962 + 5937 0058 0120 movs r0, #1 + 5938 .LVL422: +2580:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } + 5939 .loc 1 2580 15 view .LVU1963 + 5940 005a 96E0 b .L353 + 5941 .LVL423: + 5942 .L368: +2594:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->Mode = HAL_I2C_MODE_MEM; + 5943 .loc 1 2594 5 is_stmt 1 view .LVU1964 +2594:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->Mode = HAL_I2C_MODE_MEM; + 5944 .loc 1 2594 21 is_stmt 0 view .LVU1965 + 5945 005c 4123 movs r3, #65 + 5946 005e 2222 movs r2, #34 + 5947 0060 E254 strb r2, [r4, r3] +2595:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->ErrorCode = HAL_I2C_ERROR_NONE; + 5948 .loc 1 2595 5 is_stmt 1 view .LVU1966 +2595:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->ErrorCode = HAL_I2C_ERROR_NONE; + 5949 .loc 1 2595 21 is_stmt 0 view .LVU1967 + 5950 0062 0133 adds r3, r3, #1 + 5951 0064 1E32 adds r2, r2, #30 + 5952 0066 E254 strb r2, [r4, r3] +2596:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 5953 .loc 1 2596 5 is_stmt 1 view .LVU1968 +2596:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 5954 .loc 1 2596 21 is_stmt 0 view .LVU1969 + 5955 0068 0023 movs r3, #0 + 5956 006a 6364 str r3, [r4, #68] +2599:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->XferCount = Size; + 5957 .loc 1 2599 5 is_stmt 1 view .LVU1970 +2599:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->XferCount = Size; + 5958 .loc 1 2599 21 is_stmt 0 view .LVU1971 + 5959 006c 6562 str r5, [r4, #36] +2600:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->XferISR = NULL; + 5960 .loc 1 2600 5 is_stmt 1 view .LVU1972 +2600:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->XferISR = NULL; + 5961 .loc 1 2600 21 is_stmt 0 view .LVU1973 + 5962 006e 6785 strh r7, [r4, #42] +2601:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 5963 .loc 1 2601 5 is_stmt 1 view .LVU1974 +2601:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 5964 .loc 1 2601 21 is_stmt 0 view .LVU1975 + 5965 0070 6363 str r3, [r4, #52] +2604:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { + 5966 .loc 1 2604 5 is_stmt 1 view .LVU1976 +2604:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { + 5967 .loc 1 2604 9 is_stmt 0 view .LVU1977 + 5968 0072 0196 str r6, [sp, #4] + 5969 0074 0E9B ldr r3, [sp, #56] + 5970 0076 0093 str r3, [sp] + 5971 0078 059B ldr r3, [sp, #20] + 5972 007a 049A ldr r2, [sp, #16] + 5973 007c 0399 ldr r1, [sp, #12] + 5974 007e 2000 movs r0, r4 + 5975 0080 FFF7FEFF bl I2C_RequestMemoryRead + 5976 .LVL424: + ARM GAS /tmp/ccuRhBPx.s page 265 + + +2604:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { + 5977 .loc 1 2604 8 discriminator 1 view .LVU1978 + 5978 0084 0028 cmp r0, #0 + 5979 0086 0FD1 bne .L369 +2613:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { + 5980 .loc 1 2613 5 is_stmt 1 view .LVU1979 +2613:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { + 5981 .loc 1 2613 13 is_stmt 0 view .LVU1980 + 5982 0088 638D ldrh r3, [r4, #42] + 5983 008a 9BB2 uxth r3, r3 +2613:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { + 5984 .loc 1 2613 8 view .LVU1981 + 5985 008c FF2B cmp r3, #255 + 5986 008e 10D9 bls .L357 +2615:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** I2C_TransferConfig(hi2c, DevAddress, (uint8_t)hi2c->XferSize, I2C_RELOAD_MODE, + 5987 .loc 1 2615 7 is_stmt 1 view .LVU1982 +2615:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** I2C_TransferConfig(hi2c, DevAddress, (uint8_t)hi2c->XferSize, I2C_RELOAD_MODE, + 5988 .loc 1 2615 22 is_stmt 0 view .LVU1983 + 5989 0090 FF23 movs r3, #255 + 5990 0092 2385 strh r3, [r4, #40] +2616:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** I2C_GENERATE_START_READ); + 5991 .loc 1 2616 7 is_stmt 1 view .LVU1984 + 5992 0094 7F3B subs r3, r3, #127 + 5993 0096 424A ldr r2, .L371 + 5994 0098 0092 str r2, [sp] + 5995 009a 5B04 lsls r3, r3, #17 + 5996 009c FF22 movs r2, #255 + 5997 009e 0399 ldr r1, [sp, #12] + 5998 00a0 2000 movs r0, r4 + 5999 00a2 FFF7FEFF bl I2C_TransferConfig + 6000 .LVL425: + 6001 00a6 21E0 b .L361 + 6002 .L369: +2607:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** return HAL_ERROR; + 6003 .loc 1 2607 7 view .LVU1985 +2607:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** return HAL_ERROR; + 6004 .loc 1 2607 7 view .LVU1986 + 6005 00a8 4023 movs r3, #64 + 6006 00aa 0022 movs r2, #0 + 6007 00ac E254 strb r2, [r4, r3] +2607:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** return HAL_ERROR; + 6008 .loc 1 2607 7 view .LVU1987 +2608:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } + 6009 .loc 1 2608 7 view .LVU1988 +2608:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } + 6010 .loc 1 2608 14 is_stmt 0 view .LVU1989 + 6011 00ae 0120 movs r0, #1 + 6012 00b0 6BE0 b .L353 + 6013 .L357: +2621:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** I2C_TransferConfig(hi2c, DevAddress, (uint8_t)hi2c->XferSize, I2C_AUTOEND_MODE, + 6014 .loc 1 2621 7 is_stmt 1 view .LVU1990 +2621:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** I2C_TransferConfig(hi2c, DevAddress, (uint8_t)hi2c->XferSize, I2C_AUTOEND_MODE, + 6015 .loc 1 2621 28 is_stmt 0 view .LVU1991 + 6016 00b2 628D ldrh r2, [r4, #42] + 6017 00b4 92B2 uxth r2, r2 +2621:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** I2C_TransferConfig(hi2c, DevAddress, (uint8_t)hi2c->XferSize, I2C_AUTOEND_MODE, + 6018 .loc 1 2621 22 view .LVU1992 + ARM GAS /tmp/ccuRhBPx.s page 266 + + + 6019 00b6 2285 strh r2, [r4, #40] +2622:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** I2C_GENERATE_START_READ); + 6020 .loc 1 2622 7 is_stmt 1 view .LVU1993 + 6021 00b8 8023 movs r3, #128 + 6022 00ba D2B2 uxtb r2, r2 + 6023 00bc 3849 ldr r1, .L371 + 6024 00be 0091 str r1, [sp] + 6025 00c0 9B04 lsls r3, r3, #18 + 6026 00c2 0399 ldr r1, [sp, #12] + 6027 00c4 2000 movs r0, r4 + 6028 00c6 FFF7FEFF bl I2C_TransferConfig + 6029 .LVL426: + 6030 00ca 0FE0 b .L361 + 6031 .L360: +2659:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** I2C_TransferConfig(hi2c, DevAddress, (uint8_t)hi2c->XferSize, I2C_AUTOEND_MODE, + 6032 .loc 1 2659 11 view .LVU1994 +2659:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** I2C_TransferConfig(hi2c, DevAddress, (uint8_t)hi2c->XferSize, I2C_AUTOEND_MODE, + 6033 .loc 1 2659 32 is_stmt 0 view .LVU1995 + 6034 00cc 628D ldrh r2, [r4, #42] + 6035 00ce 92B2 uxth r2, r2 +2659:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** I2C_TransferConfig(hi2c, DevAddress, (uint8_t)hi2c->XferSize, I2C_AUTOEND_MODE, + 6036 .loc 1 2659 26 view .LVU1996 + 6037 00d0 2285 strh r2, [r4, #40] +2660:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** I2C_NO_STARTSTOP); + 6038 .loc 1 2660 11 is_stmt 1 view .LVU1997 + 6039 00d2 8023 movs r3, #128 + 6040 00d4 D2B2 uxtb r2, r2 + 6041 00d6 0021 movs r1, #0 + 6042 00d8 0091 str r1, [sp] + 6043 00da 9B04 lsls r3, r3, #18 + 6044 00dc 0399 ldr r1, [sp, #12] + 6045 00de 2000 movs r0, r4 + 6046 00e0 FFF7FEFF bl I2C_TransferConfig + 6047 .LVL427: + 6048 .L359: +2664:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 6049 .loc 1 2664 30 view .LVU1998 +2664:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 6050 .loc 1 2664 18 is_stmt 0 view .LVU1999 + 6051 00e4 638D ldrh r3, [r4, #42] + 6052 00e6 9BB2 uxth r3, r3 +2664:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 6053 .loc 1 2664 30 view .LVU2000 + 6054 00e8 002B cmp r3, #0 + 6055 00ea 36D0 beq .L370 + 6056 .L361: +2626:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { + 6057 .loc 1 2626 5 is_stmt 1 view .LVU2001 +2629:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { + 6058 .loc 1 2629 7 view .LVU2002 +2629:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { + 6059 .loc 1 2629 11 is_stmt 0 view .LVU2003 + 6060 00ec 0096 str r6, [sp] + 6061 00ee 0E9B ldr r3, [sp, #56] + 6062 00f0 0022 movs r2, #0 + 6063 00f2 0421 movs r1, #4 + 6064 00f4 2000 movs r0, r4 + ARM GAS /tmp/ccuRhBPx.s page 267 + + + 6065 00f6 FFF7FEFF bl I2C_WaitOnFlagUntilTimeout + 6066 .LVL428: +2629:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { + 6067 .loc 1 2629 10 discriminator 1 view .LVU2004 + 6068 00fa 0028 cmp r0, #0 + 6069 00fc 49D1 bne .L365 +2635:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 6070 .loc 1 2635 7 is_stmt 1 view .LVU2005 +2635:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 6071 .loc 1 2635 38 is_stmt 0 view .LVU2006 + 6072 00fe 2368 ldr r3, [r4] +2635:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 6073 .loc 1 2635 48 view .LVU2007 + 6074 0100 5A6A ldr r2, [r3, #36] +2635:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 6075 .loc 1 2635 12 view .LVU2008 + 6076 0102 636A ldr r3, [r4, #36] +2635:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 6077 .loc 1 2635 23 view .LVU2009 + 6078 0104 1A70 strb r2, [r3] +2638:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 6079 .loc 1 2638 7 is_stmt 1 view .LVU2010 +2638:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 6080 .loc 1 2638 11 is_stmt 0 view .LVU2011 + 6081 0106 636A ldr r3, [r4, #36] +2638:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 6082 .loc 1 2638 21 view .LVU2012 + 6083 0108 0133 adds r3, r3, #1 + 6084 010a 6362 str r3, [r4, #36] +2640:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->XferCount--; + 6085 .loc 1 2640 7 is_stmt 1 view .LVU2013 +2640:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->XferCount--; + 6086 .loc 1 2640 11 is_stmt 0 view .LVU2014 + 6087 010c 238D ldrh r3, [r4, #40] +2640:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->XferCount--; + 6088 .loc 1 2640 21 view .LVU2015 + 6089 010e 013B subs r3, r3, #1 + 6090 0110 9BB2 uxth r3, r3 + 6091 0112 2385 strh r3, [r4, #40] +2641:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 6092 .loc 1 2641 7 is_stmt 1 view .LVU2016 +2641:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 6093 .loc 1 2641 11 is_stmt 0 view .LVU2017 + 6094 0114 628D ldrh r2, [r4, #42] +2641:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 6095 .loc 1 2641 22 view .LVU2018 + 6096 0116 013A subs r2, r2, #1 + 6097 0118 92B2 uxth r2, r2 + 6098 011a 6285 strh r2, [r4, #42] +2643:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { + 6099 .loc 1 2643 7 is_stmt 1 view .LVU2019 +2643:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { + 6100 .loc 1 2643 16 is_stmt 0 view .LVU2020 + 6101 011c 628D ldrh r2, [r4, #42] + 6102 011e 92B2 uxth r2, r2 +2643:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { + 6103 .loc 1 2643 10 view .LVU2021 + ARM GAS /tmp/ccuRhBPx.s page 268 + + + 6104 0120 002A cmp r2, #0 + 6105 0122 DFD0 beq .L359 +2643:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { + 6106 .loc 1 2643 35 discriminator 1 view .LVU2022 + 6107 0124 002B cmp r3, #0 + 6108 0126 DDD1 bne .L359 +2646:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { + 6109 .loc 1 2646 9 is_stmt 1 view .LVU2023 +2646:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { + 6110 .loc 1 2646 13 is_stmt 0 view .LVU2024 + 6111 0128 0096 str r6, [sp] + 6112 012a 0E9B ldr r3, [sp, #56] + 6113 012c 0022 movs r2, #0 + 6114 012e 8021 movs r1, #128 + 6115 0130 2000 movs r0, r4 + 6116 0132 FFF7FEFF bl I2C_WaitOnFlagUntilTimeout + 6117 .LVL429: +2646:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { + 6118 .loc 1 2646 12 discriminator 1 view .LVU2025 + 6119 0136 0028 cmp r0, #0 + 6120 0138 2DD1 bne .L366 +2651:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { + 6121 .loc 1 2651 9 is_stmt 1 view .LVU2026 +2651:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { + 6122 .loc 1 2651 17 is_stmt 0 view .LVU2027 + 6123 013a 638D ldrh r3, [r4, #42] + 6124 013c 9BB2 uxth r3, r3 +2651:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { + 6125 .loc 1 2651 12 view .LVU2028 + 6126 013e FF2B cmp r3, #255 + 6127 0140 C4D9 bls .L360 +2653:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** I2C_TransferConfig(hi2c, DevAddress, (uint8_t) hi2c->XferSize, I2C_RELOAD_MODE, + 6128 .loc 1 2653 11 is_stmt 1 view .LVU2029 +2653:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** I2C_TransferConfig(hi2c, DevAddress, (uint8_t) hi2c->XferSize, I2C_RELOAD_MODE, + 6129 .loc 1 2653 26 is_stmt 0 view .LVU2030 + 6130 0142 FF23 movs r3, #255 + 6131 0144 2385 strh r3, [r4, #40] +2654:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** I2C_NO_STARTSTOP); + 6132 .loc 1 2654 11 is_stmt 1 view .LVU2031 + 6133 0146 7F3B subs r3, r3, #127 + 6134 0148 0022 movs r2, #0 + 6135 014a 0092 str r2, [sp] + 6136 014c 5B04 lsls r3, r3, #17 + 6137 014e FF32 adds r2, r2, #255 + 6138 0150 0399 ldr r1, [sp, #12] + 6139 0152 2000 movs r0, r4 + 6140 0154 FFF7FEFF bl I2C_TransferConfig + 6141 .LVL430: + 6142 0158 C4E7 b .L359 + 6143 .L370: +2668:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { + 6144 .loc 1 2668 5 view .LVU2032 +2668:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { + 6145 .loc 1 2668 9 is_stmt 0 view .LVU2033 + 6146 015a 3200 movs r2, r6 + 6147 015c 0E99 ldr r1, [sp, #56] + 6148 015e 2000 movs r0, r4 + ARM GAS /tmp/ccuRhBPx.s page 269 + + + 6149 0160 FFF7FEFF bl I2C_WaitOnSTOPFlagUntilTimeout + 6150 .LVL431: +2668:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { + 6151 .loc 1 2668 8 discriminator 1 view .LVU2034 + 6152 0164 0028 cmp r0, #0 + 6153 0166 18D1 bne .L367 +2674:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 6154 .loc 1 2674 5 is_stmt 1 view .LVU2035 + 6155 0168 2368 ldr r3, [r4] + 6156 016a 2022 movs r2, #32 + 6157 016c DA61 str r2, [r3, #28] +2677:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 6158 .loc 1 2677 5 view .LVU2036 + 6159 016e 2168 ldr r1, [r4] + 6160 0170 4B68 ldr r3, [r1, #4] + 6161 0172 0C4D ldr r5, .L371+4 + 6162 0174 2B40 ands r3, r5 + 6163 0176 4B60 str r3, [r1, #4] +2679:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->Mode = HAL_I2C_MODE_NONE; + 6164 .loc 1 2679 5 view .LVU2037 +2679:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->Mode = HAL_I2C_MODE_NONE; + 6165 .loc 1 2679 17 is_stmt 0 view .LVU2038 + 6166 0178 4123 movs r3, #65 + 6167 017a E254 strb r2, [r4, r3] +2680:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 6168 .loc 1 2680 5 is_stmt 1 view .LVU2039 +2680:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 6169 .loc 1 2680 17 is_stmt 0 view .LVU2040 + 6170 017c 0023 movs r3, #0 + 6171 017e 2232 adds r2, r2, #34 + 6172 0180 A354 strb r3, [r4, r2] +2683:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 6173 .loc 1 2683 5 is_stmt 1 view .LVU2041 +2683:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 6174 .loc 1 2683 5 view .LVU2042 + 6175 0182 023A subs r2, r2, #2 + 6176 0184 A354 strb r3, [r4, r2] +2683:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 6177 .loc 1 2683 5 view .LVU2043 +2685:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } + 6178 .loc 1 2685 5 view .LVU2044 +2685:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } + 6179 .loc 1 2685 12 is_stmt 0 view .LVU2045 + 6180 0186 00E0 b .L353 + 6181 .LVL432: + 6182 .L362: +2689:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } + 6183 .loc 1 2689 12 view .LVU2046 + 6184 0188 0220 movs r0, #2 + 6185 .LVL433: + 6186 .L353: +2691:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /** + 6187 .loc 1 2691 1 view .LVU2047 + 6188 018a 07B0 add sp, sp, #28 + 6189 @ sp needed + 6190 .LVL434: +2691:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /** + ARM GAS /tmp/ccuRhBPx.s page 270 + + + 6191 .loc 1 2691 1 view .LVU2048 + 6192 018c F0BD pop {r4, r5, r6, r7, pc} + 6193 .LVL435: + 6194 .L363: +2584:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 6195 .loc 1 2584 5 discriminator 1 view .LVU2049 + 6196 018e 0220 movs r0, #2 + 6197 .LVL436: +2584:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 6198 .loc 1 2584 5 discriminator 1 view .LVU2050 + 6199 0190 FBE7 b .L353 + 6200 .LVL437: + 6201 .L365: +2631:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } + 6202 .loc 1 2631 16 view .LVU2051 + 6203 0192 0120 movs r0, #1 + 6204 0194 F9E7 b .L353 + 6205 .L366: +2648:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } + 6206 .loc 1 2648 18 view .LVU2052 + 6207 0196 0120 movs r0, #1 + 6208 0198 F7E7 b .L353 + 6209 .L367: +2670:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } + 6210 .loc 1 2670 14 view .LVU2053 + 6211 019a 0120 movs r0, #1 + 6212 019c F5E7 b .L353 + 6213 .L372: + 6214 019e C046 .align 2 + 6215 .L371: + 6216 01a0 00240080 .word -2147474432 + 6217 01a4 00E800FE .word -33495040 + 6218 .cfi_endproc + 6219 .LFE57: + 6221 .section .text.HAL_I2C_Mem_Write_IT,"ax",%progbits + 6222 .align 1 + 6223 .global HAL_I2C_Mem_Write_IT + 6224 .syntax unified + 6225 .code 16 + 6226 .thumb_func + 6228 HAL_I2C_Mem_Write_IT: + 6229 .LVL438: + 6230 .LFB58: +2706:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* Check the parameters */ + 6231 .loc 1 2706 1 is_stmt 1 view -0 + 6232 .cfi_startproc + 6233 @ args = 8, pretend = 0, frame = 0 + 6234 @ frame_needed = 0, uses_anonymous_args = 0 +2706:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* Check the parameters */ + 6235 .loc 1 2706 1 is_stmt 0 view .LVU2055 + 6236 0000 F0B5 push {r4, r5, r6, r7, lr} + 6237 .cfi_def_cfa_offset 20 + 6238 .cfi_offset 4, -20 + 6239 .cfi_offset 5, -16 + 6240 .cfi_offset 6, -12 + 6241 .cfi_offset 7, -8 + 6242 .cfi_offset 14, -4 + ARM GAS /tmp/ccuRhBPx.s page 271 + + + 6243 0002 D646 mov lr, r10 + 6244 0004 4F46 mov r7, r9 + 6245 0006 4646 mov r6, r8 + 6246 0008 C0B5 push {r6, r7, lr} + 6247 .cfi_def_cfa_offset 32 + 6248 .cfi_offset 8, -32 + 6249 .cfi_offset 9, -28 + 6250 .cfi_offset 10, -24 + 6251 000a 82B0 sub sp, sp, #8 + 6252 .cfi_def_cfa_offset 40 + 6253 000c 0400 movs r4, r0 + 6254 000e 0AA8 add r0, sp, #40 + 6255 .LVL439: +2706:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* Check the parameters */ + 6256 .loc 1 2706 1 view .LVU2056 + 6257 0010 20C8 ldmia r0!, {r5} + 6258 .LVL440: +2706:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* Check the parameters */ + 6259 .loc 1 2706 1 view .LVU2057 + 6260 0012 0688 ldrh r6, [r0] +2708:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 6261 .loc 1 2708 3 is_stmt 1 view .LVU2058 +2710:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { + 6262 .loc 1 2710 3 view .LVU2059 +2710:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { + 6263 .loc 1 2710 11 is_stmt 0 view .LVU2060 + 6264 0014 4120 movs r0, #65 + 6265 .LVL441: +2710:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { + 6266 .loc 1 2710 11 view .LVU2061 + 6267 0016 205C ldrb r0, [r4, r0] +2710:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { + 6268 .loc 1 2710 6 view .LVU2062 + 6269 0018 2028 cmp r0, #32 + 6270 001a 48D1 bne .L379 +2712:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { + 6271 .loc 1 2712 5 is_stmt 1 view .LVU2063 +2712:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { + 6272 .loc 1 2712 8 is_stmt 0 view .LVU2064 + 6273 001c 002D cmp r5, #0 + 6274 001e 3AD0 beq .L375 +2712:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { + 6275 .loc 1 2712 25 discriminator 1 view .LVU2065 + 6276 0020 002E cmp r6, #0 + 6277 0022 38D0 beq .L375 +2718:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { + 6278 .loc 1 2718 5 is_stmt 1 view .LVU2066 +2718:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { + 6279 .loc 1 2718 9 is_stmt 0 view .LVU2067 + 6280 0024 2068 ldr r0, [r4] + 6281 0026 8146 mov r9, r0 + 6282 0028 8069 ldr r0, [r0, #24] +2718:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { + 6283 .loc 1 2718 8 view .LVU2068 + 6284 002a 0004 lsls r0, r0, #16 + 6285 002c 46D4 bmi .L380 +2724:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + ARM GAS /tmp/ccuRhBPx.s page 272 + + + 6286 .loc 1 2724 5 is_stmt 1 view .LVU2069 +2724:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 6287 .loc 1 2724 5 view .LVU2070 + 6288 002e 4020 movs r0, #64 + 6289 0030 205C ldrb r0, [r4, r0] + 6290 0032 0128 cmp r0, #1 + 6291 0034 44D0 beq .L381 +2724:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 6292 .loc 1 2724 5 discriminator 2 view .LVU2071 + 6293 0036 4020 movs r0, #64 + 6294 0038 8246 mov r10, r0 + 6295 003a 3F38 subs r0, r0, #63 + 6296 003c 5746 mov r7, r10 + 6297 003e E055 strb r0, [r4, r7] +2724:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 6298 .loc 1 2724 5 discriminator 2 view .LVU2072 +2726:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->Mode = HAL_I2C_MODE_MEM; + 6299 .loc 1 2726 5 view .LVU2073 +2726:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->Mode = HAL_I2C_MODE_MEM; + 6300 .loc 1 2726 23 is_stmt 0 view .LVU2074 + 6301 0040 4030 adds r0, r0, #64 + 6302 0042 8446 mov ip, r0 + 6303 0044 2038 subs r0, r0, #32 + 6304 0046 8046 mov r8, r0 + 6305 0048 6046 mov r0, ip + 6306 004a 4746 mov r7, r8 + 6307 004c 2754 strb r7, [r4, r0] +2727:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->ErrorCode = HAL_I2C_ERROR_NONE; + 6308 .loc 1 2727 5 is_stmt 1 view .LVU2075 +2727:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->ErrorCode = HAL_I2C_ERROR_NONE; + 6309 .loc 1 2727 23 is_stmt 0 view .LVU2076 + 6310 004e 0130 adds r0, r0, #1 + 6311 0050 5746 mov r7, r10 + 6312 0052 2754 strb r7, [r4, r0] +2728:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 6313 .loc 1 2728 5 is_stmt 1 view .LVU2077 +2728:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 6314 .loc 1 2728 23 is_stmt 0 view .LVU2078 + 6315 0054 0020 movs r0, #0 + 6316 0056 6064 str r0, [r4, #68] +2731:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->XferCount = Size; + 6317 .loc 1 2731 5 is_stmt 1 view .LVU2079 +2731:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->XferCount = Size; + 6318 .loc 1 2731 23 is_stmt 0 view .LVU2080 + 6319 0058 6562 str r5, [r4, #36] +2732:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->XferOptions = I2C_NO_OPTION_FRAME; + 6320 .loc 1 2732 5 is_stmt 1 view .LVU2081 +2732:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->XferOptions = I2C_NO_OPTION_FRAME; + 6321 .loc 1 2732 23 is_stmt 0 view .LVU2082 + 6322 005a 6685 strh r6, [r4, #42] +2733:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->XferISR = I2C_Mem_ISR_IT; + 6323 .loc 1 2733 5 is_stmt 1 view .LVU2083 +2733:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->XferISR = I2C_Mem_ISR_IT; + 6324 .loc 1 2733 23 is_stmt 0 view .LVU2084 + 6325 005c 1948 ldr r0, .L383 + 6326 005e E062 str r0, [r4, #44] +2734:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->Devaddress = DevAddress; + ARM GAS /tmp/ccuRhBPx.s page 273 + + + 6327 .loc 1 2734 5 is_stmt 1 view .LVU2085 +2734:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->Devaddress = DevAddress; + 6328 .loc 1 2734 23 is_stmt 0 view .LVU2086 + 6329 0060 1948 ldr r0, .L383+4 + 6330 0062 6063 str r0, [r4, #52] +2735:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 6331 .loc 1 2735 5 is_stmt 1 view .LVU2087 +2735:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 6332 .loc 1 2735 23 is_stmt 0 view .LVU2088 + 6333 0064 E164 str r1, [r4, #76] +2738:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { + 6334 .loc 1 2738 5 is_stmt 1 view .LVU2089 +2738:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { + 6335 .loc 1 2738 8 is_stmt 0 view .LVU2090 + 6336 0066 012B cmp r3, #1 + 6337 0068 1AD0 beq .L382 +2750:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 6338 .loc 1 2750 7 is_stmt 1 view .LVU2091 +2750:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 6339 .loc 1 2750 30 is_stmt 0 view .LVU2092 + 6340 006a 100A lsrs r0, r2, #8 +2750:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 6341 .loc 1 2750 28 view .LVU2093 + 6342 006c 4D46 mov r5, r9 + 6343 006e A862 str r0, [r5, #40] +2753:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } + 6344 .loc 1 2753 7 is_stmt 1 view .LVU2094 +2753:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } + 6345 .loc 1 2753 26 is_stmt 0 view .LVU2095 + 6346 0070 D2B2 uxtb r2, r2 + 6347 .LVL442: +2753:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } + 6348 .loc 1 2753 24 view .LVU2096 + 6349 0072 2265 str r2, [r4, #80] + 6350 .L378: +2756:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 6351 .loc 1 2756 5 is_stmt 1 view .LVU2097 + 6352 0074 8020 movs r0, #128 + 6353 0076 DAB2 uxtb r2, r3 + 6354 0078 144B ldr r3, .L383+8 + 6355 .LVL443: +2756:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 6356 .loc 1 2756 5 is_stmt 0 view .LVU2098 + 6357 007a 0093 str r3, [sp] + 6358 007c 4304 lsls r3, r0, #17 + 6359 007e 2000 movs r0, r4 + 6360 0080 FFF7FEFF bl I2C_TransferConfig + 6361 .LVL444: +2759:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 6362 .loc 1 2759 5 is_stmt 1 view .LVU2099 +2759:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 6363 .loc 1 2759 5 view .LVU2100 + 6364 0084 4023 movs r3, #64 + 6365 0086 0022 movs r2, #0 + 6366 0088 E254 strb r2, [r4, r3] +2759:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 6367 .loc 1 2759 5 view .LVU2101 + ARM GAS /tmp/ccuRhBPx.s page 274 + + +2769:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 6368 .loc 1 2769 5 view .LVU2102 + 6369 008a 0121 movs r1, #1 + 6370 008c 2000 movs r0, r4 + 6371 008e FFF7FEFF bl I2C_Enable_IRQ + 6372 .LVL445: +2771:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } + 6373 .loc 1 2771 5 view .LVU2103 +2771:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } + 6374 .loc 1 2771 12 is_stmt 0 view .LVU2104 + 6375 0092 0020 movs r0, #0 + 6376 0094 0CE0 b .L374 + 6377 .LVL446: + 6378 .L375: +2714:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** return HAL_ERROR; + 6379 .loc 1 2714 7 is_stmt 1 view .LVU2105 +2714:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** return HAL_ERROR; + 6380 .loc 1 2714 23 is_stmt 0 view .LVU2106 + 6381 0096 8023 movs r3, #128 + 6382 .LVL447: +2714:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** return HAL_ERROR; + 6383 .loc 1 2714 23 view .LVU2107 + 6384 0098 9B00 lsls r3, r3, #2 + 6385 009a 6364 str r3, [r4, #68] +2715:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } + 6386 .loc 1 2715 7 is_stmt 1 view .LVU2108 +2715:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } + 6387 .loc 1 2715 15 is_stmt 0 view .LVU2109 + 6388 009c 0120 movs r0, #1 + 6389 009e 07E0 b .L374 + 6390 .LVL448: + 6391 .L382: +2741:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 6392 .loc 1 2741 7 is_stmt 1 view .LVU2110 +2741:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 6393 .loc 1 2741 30 is_stmt 0 view .LVU2111 + 6394 00a0 D2B2 uxtb r2, r2 + 6395 .LVL449: +2741:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 6396 .loc 1 2741 28 view .LVU2112 + 6397 00a2 4846 mov r0, r9 + 6398 00a4 8262 str r2, [r0, #40] +2744:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } + 6399 .loc 1 2744 7 is_stmt 1 view .LVU2113 +2744:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } + 6400 .loc 1 2744 24 is_stmt 0 view .LVU2114 + 6401 00a6 0122 movs r2, #1 + 6402 00a8 5242 rsbs r2, r2, #0 + 6403 00aa 2265 str r2, [r4, #80] + 6404 00ac E2E7 b .L378 + 6405 .LVL450: + 6406 .L379: +2775:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } + 6407 .loc 1 2775 12 view .LVU2115 + 6408 00ae 0220 movs r0, #2 + 6409 .LVL451: + 6410 .L374: + ARM GAS /tmp/ccuRhBPx.s page 275 + + +2777:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 6411 .loc 1 2777 1 view .LVU2116 + 6412 00b0 02B0 add sp, sp, #8 + 6413 @ sp needed + 6414 .LVL452: +2777:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 6415 .loc 1 2777 1 view .LVU2117 + 6416 00b2 E0BC pop {r5, r6, r7} + 6417 00b4 BA46 mov r10, r7 + 6418 00b6 B146 mov r9, r6 + 6419 00b8 A846 mov r8, r5 + 6420 00ba F0BD pop {r4, r5, r6, r7, pc} + 6421 .LVL453: + 6422 .L380: +2720:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } + 6423 .loc 1 2720 14 view .LVU2118 + 6424 00bc 0220 movs r0, #2 + 6425 00be F7E7 b .L374 + 6426 .L381: +2724:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 6427 .loc 1 2724 5 discriminator 1 view .LVU2119 + 6428 00c0 0220 movs r0, #2 + 6429 00c2 F5E7 b .L374 + 6430 .L384: + 6431 .align 2 + 6432 .L383: + 6433 00c4 0000FFFF .word -65536 + 6434 00c8 00000000 .word I2C_Mem_ISR_IT + 6435 00cc 00200080 .word -2147475456 + 6436 .cfi_endproc + 6437 .LFE58: + 6439 .section .text.HAL_I2C_Mem_Read_IT,"ax",%progbits + 6440 .align 1 + 6441 .global HAL_I2C_Mem_Read_IT + 6442 .syntax unified + 6443 .code 16 + 6444 .thumb_func + 6446 HAL_I2C_Mem_Read_IT: + 6447 .LVL454: + 6448 .LFB59: +2793:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* Check the parameters */ + 6449 .loc 1 2793 1 is_stmt 1 view -0 + 6450 .cfi_startproc + 6451 @ args = 8, pretend = 0, frame = 0 + 6452 @ frame_needed = 0, uses_anonymous_args = 0 +2793:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* Check the parameters */ + 6453 .loc 1 2793 1 is_stmt 0 view .LVU2121 + 6454 0000 F0B5 push {r4, r5, r6, r7, lr} + 6455 .cfi_def_cfa_offset 20 + 6456 .cfi_offset 4, -20 + 6457 .cfi_offset 5, -16 + 6458 .cfi_offset 6, -12 + 6459 .cfi_offset 7, -8 + 6460 .cfi_offset 14, -4 + 6461 0002 D646 mov lr, r10 + 6462 0004 4F46 mov r7, r9 + 6463 0006 4646 mov r6, r8 + ARM GAS /tmp/ccuRhBPx.s page 276 + + + 6464 0008 C0B5 push {r6, r7, lr} + 6465 .cfi_def_cfa_offset 32 + 6466 .cfi_offset 8, -32 + 6467 .cfi_offset 9, -28 + 6468 .cfi_offset 10, -24 + 6469 000a 82B0 sub sp, sp, #8 + 6470 .cfi_def_cfa_offset 40 + 6471 000c 0400 movs r4, r0 + 6472 000e 0AA8 add r0, sp, #40 + 6473 .LVL455: +2793:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* Check the parameters */ + 6474 .loc 1 2793 1 view .LVU2122 + 6475 0010 20C8 ldmia r0!, {r5} + 6476 .LVL456: +2793:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* Check the parameters */ + 6477 .loc 1 2793 1 view .LVU2123 + 6478 0012 0688 ldrh r6, [r0] +2795:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 6479 .loc 1 2795 3 is_stmt 1 view .LVU2124 +2797:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { + 6480 .loc 1 2797 3 view .LVU2125 +2797:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { + 6481 .loc 1 2797 11 is_stmt 0 view .LVU2126 + 6482 0014 4120 movs r0, #65 + 6483 .LVL457: +2797:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { + 6484 .loc 1 2797 11 view .LVU2127 + 6485 0016 205C ldrb r0, [r4, r0] +2797:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { + 6486 .loc 1 2797 6 view .LVU2128 + 6487 0018 2028 cmp r0, #32 + 6488 001a 47D1 bne .L391 +2799:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { + 6489 .loc 1 2799 5 is_stmt 1 view .LVU2129 +2799:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { + 6490 .loc 1 2799 8 is_stmt 0 view .LVU2130 + 6491 001c 002D cmp r5, #0 + 6492 001e 39D0 beq .L387 +2799:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { + 6493 .loc 1 2799 25 discriminator 1 view .LVU2131 + 6494 0020 002E cmp r6, #0 + 6495 0022 37D0 beq .L387 +2805:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { + 6496 .loc 1 2805 5 is_stmt 1 view .LVU2132 +2805:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { + 6497 .loc 1 2805 9 is_stmt 0 view .LVU2133 + 6498 0024 2068 ldr r0, [r4] + 6499 0026 8146 mov r9, r0 + 6500 0028 8069 ldr r0, [r0, #24] +2805:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { + 6501 .loc 1 2805 8 view .LVU2134 + 6502 002a 0004 lsls r0, r0, #16 + 6503 002c 45D4 bmi .L392 +2811:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 6504 .loc 1 2811 5 is_stmt 1 view .LVU2135 +2811:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 6505 .loc 1 2811 5 view .LVU2136 + ARM GAS /tmp/ccuRhBPx.s page 277 + + + 6506 002e 4020 movs r0, #64 + 6507 0030 205C ldrb r0, [r4, r0] + 6508 0032 0128 cmp r0, #1 + 6509 0034 43D0 beq .L393 +2811:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 6510 .loc 1 2811 5 discriminator 2 view .LVU2137 + 6511 0036 4020 movs r0, #64 + 6512 0038 8246 mov r10, r0 + 6513 003a 3F38 subs r0, r0, #63 + 6514 003c 5746 mov r7, r10 + 6515 003e E055 strb r0, [r4, r7] +2811:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 6516 .loc 1 2811 5 discriminator 2 view .LVU2138 +2813:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->Mode = HAL_I2C_MODE_MEM; + 6517 .loc 1 2813 5 view .LVU2139 +2813:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->Mode = HAL_I2C_MODE_MEM; + 6518 .loc 1 2813 23 is_stmt 0 view .LVU2140 + 6519 0040 4030 adds r0, r0, #64 + 6520 0042 8446 mov ip, r0 + 6521 0044 1F38 subs r0, r0, #31 + 6522 0046 8046 mov r8, r0 + 6523 0048 6046 mov r0, ip + 6524 004a 4746 mov r7, r8 + 6525 004c 2754 strb r7, [r4, r0] +2814:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->ErrorCode = HAL_I2C_ERROR_NONE; + 6526 .loc 1 2814 5 is_stmt 1 view .LVU2141 +2814:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->ErrorCode = HAL_I2C_ERROR_NONE; + 6527 .loc 1 2814 23 is_stmt 0 view .LVU2142 + 6528 004e 0130 adds r0, r0, #1 + 6529 0050 5746 mov r7, r10 + 6530 0052 2754 strb r7, [r4, r0] +2815:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 6531 .loc 1 2815 5 is_stmt 1 view .LVU2143 +2815:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 6532 .loc 1 2815 23 is_stmt 0 view .LVU2144 + 6533 0054 0020 movs r0, #0 + 6534 0056 6064 str r0, [r4, #68] +2818:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->XferCount = Size; + 6535 .loc 1 2818 5 is_stmt 1 view .LVU2145 +2818:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->XferCount = Size; + 6536 .loc 1 2818 23 is_stmt 0 view .LVU2146 + 6537 0058 6562 str r5, [r4, #36] +2819:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->XferOptions = I2C_NO_OPTION_FRAME; + 6538 .loc 1 2819 5 is_stmt 1 view .LVU2147 +2819:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->XferOptions = I2C_NO_OPTION_FRAME; + 6539 .loc 1 2819 23 is_stmt 0 view .LVU2148 + 6540 005a 6685 strh r6, [r4, #42] +2820:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->XferISR = I2C_Mem_ISR_IT; + 6541 .loc 1 2820 5 is_stmt 1 view .LVU2149 +2820:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->XferISR = I2C_Mem_ISR_IT; + 6542 .loc 1 2820 23 is_stmt 0 view .LVU2150 + 6543 005c 1948 ldr r0, .L395 + 6544 005e E062 str r0, [r4, #44] +2821:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->Devaddress = DevAddress; + 6545 .loc 1 2821 5 is_stmt 1 view .LVU2151 +2821:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->Devaddress = DevAddress; + 6546 .loc 1 2821 23 is_stmt 0 view .LVU2152 + ARM GAS /tmp/ccuRhBPx.s page 278 + + + 6547 0060 1948 ldr r0, .L395+4 + 6548 0062 6063 str r0, [r4, #52] +2822:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 6549 .loc 1 2822 5 is_stmt 1 view .LVU2153 +2822:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 6550 .loc 1 2822 23 is_stmt 0 view .LVU2154 + 6551 0064 E164 str r1, [r4, #76] +2825:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { + 6552 .loc 1 2825 5 is_stmt 1 view .LVU2155 +2825:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { + 6553 .loc 1 2825 8 is_stmt 0 view .LVU2156 + 6554 0066 012B cmp r3, #1 + 6555 0068 19D0 beq .L394 +2837:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 6556 .loc 1 2837 7 is_stmt 1 view .LVU2157 +2837:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 6557 .loc 1 2837 30 is_stmt 0 view .LVU2158 + 6558 006a 100A lsrs r0, r2, #8 +2837:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 6559 .loc 1 2837 28 view .LVU2159 + 6560 006c 4D46 mov r5, r9 + 6561 006e A862 str r0, [r5, #40] +2840:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } + 6562 .loc 1 2840 7 is_stmt 1 view .LVU2160 +2840:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } + 6563 .loc 1 2840 26 is_stmt 0 view .LVU2161 + 6564 0070 D2B2 uxtb r2, r2 + 6565 .LVL458: +2840:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } + 6566 .loc 1 2840 24 view .LVU2162 + 6567 0072 2265 str r2, [r4, #80] + 6568 .L390: +2843:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 6569 .loc 1 2843 5 is_stmt 1 view .LVU2163 + 6570 0074 DAB2 uxtb r2, r3 + 6571 0076 154B ldr r3, .L395+8 + 6572 .LVL459: +2843:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 6573 .loc 1 2843 5 is_stmt 0 view .LVU2164 + 6574 0078 0093 str r3, [sp] + 6575 007a 0023 movs r3, #0 + 6576 007c 2000 movs r0, r4 + 6577 007e FFF7FEFF bl I2C_TransferConfig + 6578 .LVL460: +2846:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 6579 .loc 1 2846 5 is_stmt 1 view .LVU2165 +2846:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 6580 .loc 1 2846 5 view .LVU2166 + 6581 0082 4023 movs r3, #64 + 6582 0084 0022 movs r2, #0 + 6583 0086 E254 strb r2, [r4, r3] +2846:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 6584 .loc 1 2846 5 view .LVU2167 +2856:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 6585 .loc 1 2856 5 view .LVU2168 + 6586 0088 0321 movs r1, #3 + 6587 008a 2000 movs r0, r4 + ARM GAS /tmp/ccuRhBPx.s page 279 + + + 6588 008c FFF7FEFF bl I2C_Enable_IRQ + 6589 .LVL461: +2858:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } + 6590 .loc 1 2858 5 view .LVU2169 +2858:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } + 6591 .loc 1 2858 12 is_stmt 0 view .LVU2170 + 6592 0090 0020 movs r0, #0 + 6593 0092 0CE0 b .L386 + 6594 .LVL462: + 6595 .L387: +2801:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** return HAL_ERROR; + 6596 .loc 1 2801 7 is_stmt 1 view .LVU2171 +2801:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** return HAL_ERROR; + 6597 .loc 1 2801 23 is_stmt 0 view .LVU2172 + 6598 0094 8023 movs r3, #128 + 6599 .LVL463: +2801:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** return HAL_ERROR; + 6600 .loc 1 2801 23 view .LVU2173 + 6601 0096 9B00 lsls r3, r3, #2 + 6602 0098 6364 str r3, [r4, #68] +2802:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } + 6603 .loc 1 2802 7 is_stmt 1 view .LVU2174 +2802:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } + 6604 .loc 1 2802 15 is_stmt 0 view .LVU2175 + 6605 009a 0120 movs r0, #1 + 6606 009c 07E0 b .L386 + 6607 .LVL464: + 6608 .L394: +2828:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 6609 .loc 1 2828 7 is_stmt 1 view .LVU2176 +2828:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 6610 .loc 1 2828 30 is_stmt 0 view .LVU2177 + 6611 009e D2B2 uxtb r2, r2 + 6612 .LVL465: +2828:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 6613 .loc 1 2828 28 view .LVU2178 + 6614 00a0 4846 mov r0, r9 + 6615 00a2 8262 str r2, [r0, #40] +2831:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } + 6616 .loc 1 2831 7 is_stmt 1 view .LVU2179 +2831:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } + 6617 .loc 1 2831 24 is_stmt 0 view .LVU2180 + 6618 00a4 0122 movs r2, #1 + 6619 00a6 5242 rsbs r2, r2, #0 + 6620 00a8 2265 str r2, [r4, #80] + 6621 00aa E3E7 b .L390 + 6622 .LVL466: + 6623 .L391: +2862:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } + 6624 .loc 1 2862 12 view .LVU2181 + 6625 00ac 0220 movs r0, #2 + 6626 .LVL467: + 6627 .L386: +2864:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 6628 .loc 1 2864 1 view .LVU2182 + 6629 00ae 02B0 add sp, sp, #8 + 6630 @ sp needed + ARM GAS /tmp/ccuRhBPx.s page 280 + + + 6631 .LVL468: +2864:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 6632 .loc 1 2864 1 view .LVU2183 + 6633 00b0 E0BC pop {r5, r6, r7} + 6634 00b2 BA46 mov r10, r7 + 6635 00b4 B146 mov r9, r6 + 6636 00b6 A846 mov r8, r5 + 6637 00b8 F0BD pop {r4, r5, r6, r7, pc} + 6638 .LVL469: + 6639 .L392: +2807:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } + 6640 .loc 1 2807 14 view .LVU2184 + 6641 00ba 0220 movs r0, #2 + 6642 00bc F7E7 b .L386 + 6643 .L393: +2811:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 6644 .loc 1 2811 5 discriminator 1 view .LVU2185 + 6645 00be 0220 movs r0, #2 + 6646 00c0 F5E7 b .L386 + 6647 .L396: + 6648 00c2 C046 .align 2 + 6649 .L395: + 6650 00c4 0000FFFF .word -65536 + 6651 00c8 00000000 .word I2C_Mem_ISR_IT + 6652 00cc 00200080 .word -2147475456 + 6653 .cfi_endproc + 6654 .LFE59: + 6656 .section .text.HAL_I2C_Mem_Write_DMA,"ax",%progbits + 6657 .align 1 + 6658 .global HAL_I2C_Mem_Write_DMA + 6659 .syntax unified + 6660 .code 16 + 6661 .thumb_func + 6663 HAL_I2C_Mem_Write_DMA: + 6664 .LVL470: + 6665 .LFB60: +2880:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** HAL_StatusTypeDef dmaxferstatus; + 6666 .loc 1 2880 1 is_stmt 1 view -0 + 6667 .cfi_startproc + 6668 @ args = 8, pretend = 0, frame = 0 + 6669 @ frame_needed = 0, uses_anonymous_args = 0 +2880:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** HAL_StatusTypeDef dmaxferstatus; + 6670 .loc 1 2880 1 is_stmt 0 view .LVU2187 + 6671 0000 F0B5 push {r4, r5, r6, r7, lr} + 6672 .cfi_def_cfa_offset 20 + 6673 .cfi_offset 4, -20 + 6674 .cfi_offset 5, -16 + 6675 .cfi_offset 6, -12 + 6676 .cfi_offset 7, -8 + 6677 .cfi_offset 14, -4 + 6678 0002 D646 mov lr, r10 + 6679 0004 4F46 mov r7, r9 + 6680 0006 4646 mov r6, r8 + 6681 0008 C0B5 push {r6, r7, lr} + 6682 .cfi_def_cfa_offset 32 + 6683 .cfi_offset 8, -32 + 6684 .cfi_offset 9, -28 + ARM GAS /tmp/ccuRhBPx.s page 281 + + + 6685 .cfi_offset 10, -24 + 6686 000a 82B0 sub sp, sp, #8 + 6687 .cfi_def_cfa_offset 40 + 6688 000c 0400 movs r4, r0 + 6689 000e 0E00 movs r6, r1 + 6690 0010 1D00 movs r5, r3 + 6691 0012 0AA8 add r0, sp, #40 + 6692 .LVL471: +2880:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** HAL_StatusTypeDef dmaxferstatus; + 6693 .loc 1 2880 1 view .LVU2188 + 6694 0014 02C8 ldmia r0!, {r1} + 6695 .LVL472: +2880:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** HAL_StatusTypeDef dmaxferstatus; + 6696 .loc 1 2880 1 view .LVU2189 + 6697 0016 0088 ldrh r0, [r0] + 6698 .LVL473: +2881:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 6699 .loc 1 2881 3 is_stmt 1 view .LVU2190 +2884:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 6700 .loc 1 2884 3 view .LVU2191 +2886:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { + 6701 .loc 1 2886 3 view .LVU2192 +2886:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { + 6702 .loc 1 2886 11 is_stmt 0 view .LVU2193 + 6703 0018 4123 movs r3, #65 + 6704 .LVL474: +2886:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { + 6705 .loc 1 2886 11 view .LVU2194 + 6706 001a E35C ldrb r3, [r4, r3] +2886:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { + 6707 .loc 1 2886 6 view .LVU2195 + 6708 001c 202B cmp r3, #32 + 6709 001e 00D0 beq .LCB6351 + 6710 0020 84E0 b .L408 @long jump + 6711 .LCB6351: +2888:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { + 6712 .loc 1 2888 5 is_stmt 1 view .LVU2196 +2888:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { + 6713 .loc 1 2888 8 is_stmt 0 view .LVU2197 + 6714 0022 0029 cmp r1, #0 + 6715 0024 54D0 beq .L399 +2888:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { + 6716 .loc 1 2888 25 discriminator 1 view .LVU2198 + 6717 0026 0028 cmp r0, #0 + 6718 0028 52D0 beq .L399 +2894:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { + 6719 .loc 1 2894 5 is_stmt 1 view .LVU2199 +2894:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { + 6720 .loc 1 2894 9 is_stmt 0 view .LVU2200 + 6721 002a 2368 ldr r3, [r4] + 6722 002c 9946 mov r9, r3 + 6723 002e 9B69 ldr r3, [r3, #24] +2894:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { + 6724 .loc 1 2894 8 view .LVU2201 + 6725 0030 1B04 lsls r3, r3, #16 + 6726 0032 00D5 bpl .LCB6364 + 6727 0034 82E0 b .L409 @long jump + ARM GAS /tmp/ccuRhBPx.s page 282 + + + 6728 .LCB6364: +2900:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 6729 .loc 1 2900 5 is_stmt 1 view .LVU2202 +2900:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 6730 .loc 1 2900 5 view .LVU2203 + 6731 0036 4023 movs r3, #64 + 6732 0038 E35C ldrb r3, [r4, r3] + 6733 003a 012B cmp r3, #1 + 6734 003c 00D1 bne .LCB6370 + 6735 003e 7FE0 b .L410 @long jump + 6736 .LCB6370: +2900:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 6737 .loc 1 2900 5 discriminator 2 view .LVU2204 + 6738 0040 4023 movs r3, #64 + 6739 0042 9A46 mov r10, r3 + 6740 0044 3F3B subs r3, r3, #63 + 6741 0046 5746 mov r7, r10 + 6742 0048 E355 strb r3, [r4, r7] +2900:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 6743 .loc 1 2900 5 discriminator 2 view .LVU2205 +2902:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->Mode = HAL_I2C_MODE_MEM; + 6744 .loc 1 2902 5 view .LVU2206 +2902:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->Mode = HAL_I2C_MODE_MEM; + 6745 .loc 1 2902 23 is_stmt 0 view .LVU2207 + 6746 004a 4033 adds r3, r3, #64 + 6747 004c 9C46 mov ip, r3 + 6748 004e 203B subs r3, r3, #32 + 6749 0050 9846 mov r8, r3 + 6750 0052 6346 mov r3, ip + 6751 0054 4746 mov r7, r8 + 6752 0056 E754 strb r7, [r4, r3] +2903:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->ErrorCode = HAL_I2C_ERROR_NONE; + 6753 .loc 1 2903 5 is_stmt 1 view .LVU2208 +2903:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->ErrorCode = HAL_I2C_ERROR_NONE; + 6754 .loc 1 2903 23 is_stmt 0 view .LVU2209 + 6755 0058 0133 adds r3, r3, #1 + 6756 005a 5746 mov r7, r10 + 6757 005c E754 strb r7, [r4, r3] +2904:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 6758 .loc 1 2904 5 is_stmt 1 view .LVU2210 +2904:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 6759 .loc 1 2904 23 is_stmt 0 view .LVU2211 + 6760 005e 0023 movs r3, #0 + 6761 0060 6364 str r3, [r4, #68] +2907:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->XferCount = Size; + 6762 .loc 1 2907 5 is_stmt 1 view .LVU2212 +2907:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->XferCount = Size; + 6763 .loc 1 2907 23 is_stmt 0 view .LVU2213 + 6764 0062 6162 str r1, [r4, #36] +2908:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->XferOptions = I2C_NO_OPTION_FRAME; + 6765 .loc 1 2908 5 is_stmt 1 view .LVU2214 +2908:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->XferOptions = I2C_NO_OPTION_FRAME; + 6766 .loc 1 2908 23 is_stmt 0 view .LVU2215 + 6767 0064 6085 strh r0, [r4, #42] +2909:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->XferISR = I2C_Mem_ISR_DMA; + 6768 .loc 1 2909 5 is_stmt 1 view .LVU2216 +2909:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->XferISR = I2C_Mem_ISR_DMA; + ARM GAS /tmp/ccuRhBPx.s page 283 + + + 6769 .loc 1 2909 23 is_stmt 0 view .LVU2217 + 6770 0066 374B ldr r3, .L414 + 6771 0068 E362 str r3, [r4, #44] +2910:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->Devaddress = DevAddress; + 6772 .loc 1 2910 5 is_stmt 1 view .LVU2218 +2910:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->Devaddress = DevAddress; + 6773 .loc 1 2910 23 is_stmt 0 view .LVU2219 + 6774 006a 374B ldr r3, .L414+4 + 6775 006c 6363 str r3, [r4, #52] +2911:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 6776 .loc 1 2911 5 is_stmt 1 view .LVU2220 +2911:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 6777 .loc 1 2911 23 is_stmt 0 view .LVU2221 + 6778 006e E664 str r6, [r4, #76] +2913:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { + 6779 .loc 1 2913 5 is_stmt 1 view .LVU2222 +2913:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { + 6780 .loc 1 2913 13 is_stmt 0 view .LVU2223 + 6781 0070 638D ldrh r3, [r4, #42] + 6782 0072 9BB2 uxth r3, r3 +2913:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { + 6783 .loc 1 2913 8 view .LVU2224 + 6784 0074 FF2B cmp r3, #255 + 6785 0076 30D9 bls .L401 +2915:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } + 6786 .loc 1 2915 7 is_stmt 1 view .LVU2225 +2915:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } + 6787 .loc 1 2915 22 is_stmt 0 view .LVU2226 + 6788 0078 FF23 movs r3, #255 + 6789 007a 2385 strh r3, [r4, #40] + 6790 .L402: +2923:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { + 6791 .loc 1 2923 5 is_stmt 1 view .LVU2227 +2923:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { + 6792 .loc 1 2923 8 is_stmt 0 view .LVU2228 + 6793 007c 012D cmp r5, #1 + 6794 007e 2FD0 beq .L412 +2935:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 6795 .loc 1 2935 7 is_stmt 1 view .LVU2229 +2935:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 6796 .loc 1 2935 30 is_stmt 0 view .LVU2230 + 6797 0080 130A lsrs r3, r2, #8 +2935:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 6798 .loc 1 2935 28 view .LVU2231 + 6799 0082 4846 mov r0, r9 + 6800 0084 8362 str r3, [r0, #40] +2938:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } + 6801 .loc 1 2938 7 is_stmt 1 view .LVU2232 +2938:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } + 6802 .loc 1 2938 26 is_stmt 0 view .LVU2233 + 6803 0086 D2B2 uxtb r2, r2 + 6804 .LVL475: +2938:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } + 6805 .loc 1 2938 24 view .LVU2234 + 6806 0088 2265 str r2, [r4, #80] + 6807 .L404: +2941:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { + ARM GAS /tmp/ccuRhBPx.s page 284 + + + 6808 .loc 1 2941 5 is_stmt 1 view .LVU2235 +2941:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { + 6809 .loc 1 2941 13 is_stmt 0 view .LVU2236 + 6810 008a A36B ldr r3, [r4, #56] +2941:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { + 6811 .loc 1 2941 8 view .LVU2237 + 6812 008c 002B cmp r3, #0 + 6813 008e 2ED0 beq .L405 +2944:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 6814 .loc 1 2944 7 is_stmt 1 view .LVU2238 +2944:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 6815 .loc 1 2944 38 is_stmt 0 view .LVU2239 + 6816 0090 2E4A ldr r2, .L414+8 + 6817 0092 9A62 str r2, [r3, #40] +2947:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 6818 .loc 1 2947 7 is_stmt 1 view .LVU2240 +2947:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 6819 .loc 1 2947 11 is_stmt 0 view .LVU2241 + 6820 0094 A36B ldr r3, [r4, #56] +2947:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 6821 .loc 1 2947 39 view .LVU2242 + 6822 0096 2E4A ldr r2, .L414+12 + 6823 0098 1A63 str r2, [r3, #48] +2950:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->hdmatx->XferAbortCallback = NULL; + 6824 .loc 1 2950 7 is_stmt 1 view .LVU2243 +2950:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->hdmatx->XferAbortCallback = NULL; + 6825 .loc 1 2950 11 is_stmt 0 view .LVU2244 + 6826 009a A26B ldr r2, [r4, #56] +2950:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->hdmatx->XferAbortCallback = NULL; + 6827 .loc 1 2950 42 view .LVU2245 + 6828 009c 0023 movs r3, #0 + 6829 009e D362 str r3, [r2, #44] +2951:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 6830 .loc 1 2951 7 is_stmt 1 view .LVU2246 +2951:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 6831 .loc 1 2951 11 is_stmt 0 view .LVU2247 + 6832 00a0 A26B ldr r2, [r4, #56] +2951:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 6833 .loc 1 2951 39 view .LVU2248 + 6834 00a2 5363 str r3, [r2, #52] +2954:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->XferSize); + 6835 .loc 1 2954 7 is_stmt 1 view .LVU2249 +2954:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->XferSize); + 6836 .loc 1 2954 86 is_stmt 0 view .LVU2250 + 6837 00a4 2268 ldr r2, [r4] +2954:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->XferSize); + 6838 .loc 1 2954 81 view .LVU2251 + 6839 00a6 2832 adds r2, r2, #40 +2955:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } + 6840 .loc 1 2955 44 view .LVU2252 + 6841 00a8 238D ldrh r3, [r4, #40] +2954:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->XferSize); + 6842 .loc 1 2954 23 view .LVU2253 + 6843 00aa A06B ldr r0, [r4, #56] + 6844 00ac FFF7FEFF bl HAL_DMA_Start_IT + 6845 .LVL476: + 6846 00b0 071E subs r7, r0, #0 + ARM GAS /tmp/ccuRhBPx.s page 285 + + + 6847 .LVL477: +2972:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { + 6848 .loc 1 2972 5 is_stmt 1 view .LVU2254 +2972:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { + 6849 .loc 1 2972 8 is_stmt 0 view .LVU2255 + 6850 00b2 2AD0 beq .L413 +2992:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->Mode = HAL_I2C_MODE_NONE; + 6851 .loc 1 2992 7 is_stmt 1 view .LVU2256 +2992:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->Mode = HAL_I2C_MODE_NONE; + 6852 .loc 1 2992 23 is_stmt 0 view .LVU2257 + 6853 00b4 4123 movs r3, #65 + 6854 00b6 2022 movs r2, #32 + 6855 00b8 E254 strb r2, [r4, r3] +2993:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 6856 .loc 1 2993 7 is_stmt 1 view .LVU2258 +2993:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 6857 .loc 1 2993 23 is_stmt 0 view .LVU2259 + 6858 00ba 0022 movs r2, #0 + 6859 00bc 0133 adds r3, r3, #1 + 6860 00be E254 strb r2, [r4, r3] +2996:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 6861 .loc 1 2996 7 is_stmt 1 view .LVU2260 +2996:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 6862 .loc 1 2996 11 is_stmt 0 view .LVU2261 + 6863 00c0 636C ldr r3, [r4, #68] +2996:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 6864 .loc 1 2996 23 view .LVU2262 + 6865 00c2 1021 movs r1, #16 + 6866 00c4 0B43 orrs r3, r1 + 6867 00c6 6364 str r3, [r4, #68] +2999:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 6868 .loc 1 2999 7 is_stmt 1 view .LVU2263 +2999:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 6869 .loc 1 2999 7 view .LVU2264 + 6870 00c8 4023 movs r3, #64 + 6871 00ca E254 strb r2, [r4, r3] +2999:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 6872 .loc 1 2999 7 view .LVU2265 +3001:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } + 6873 .loc 1 3001 7 view .LVU2266 +3001:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } + 6874 .loc 1 3001 14 is_stmt 0 view .LVU2267 + 6875 00cc 0127 movs r7, #1 + 6876 00ce 2EE0 b .L398 + 6877 .LVL478: + 6878 .L399: +2890:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** return HAL_ERROR; + 6879 .loc 1 2890 7 is_stmt 1 view .LVU2268 +2890:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** return HAL_ERROR; + 6880 .loc 1 2890 23 is_stmt 0 view .LVU2269 + 6881 00d0 8023 movs r3, #128 + 6882 00d2 9B00 lsls r3, r3, #2 + 6883 00d4 6364 str r3, [r4, #68] +2891:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } + 6884 .loc 1 2891 7 is_stmt 1 view .LVU2270 +2891:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } + 6885 .loc 1 2891 15 is_stmt 0 view .LVU2271 + ARM GAS /tmp/ccuRhBPx.s page 286 + + + 6886 00d6 0127 movs r7, #1 + 6887 00d8 29E0 b .L398 + 6888 .L401: +2919:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } + 6889 .loc 1 2919 7 is_stmt 1 view .LVU2272 +2919:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } + 6890 .loc 1 2919 28 is_stmt 0 view .LVU2273 + 6891 00da 638D ldrh r3, [r4, #42] +2919:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } + 6892 .loc 1 2919 22 view .LVU2274 + 6893 00dc 2385 strh r3, [r4, #40] + 6894 00de CDE7 b .L402 + 6895 .L412: +2926:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 6896 .loc 1 2926 7 is_stmt 1 view .LVU2275 +2926:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 6897 .loc 1 2926 30 is_stmt 0 view .LVU2276 + 6898 00e0 D2B2 uxtb r2, r2 + 6899 .LVL479: +2926:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 6900 .loc 1 2926 28 view .LVU2277 + 6901 00e2 4B46 mov r3, r9 + 6902 00e4 9A62 str r2, [r3, #40] +2929:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } + 6903 .loc 1 2929 7 is_stmt 1 view .LVU2278 +2929:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } + 6904 .loc 1 2929 24 is_stmt 0 view .LVU2279 + 6905 00e6 0123 movs r3, #1 + 6906 00e8 5B42 rsbs r3, r3, #0 + 6907 00ea 2365 str r3, [r4, #80] + 6908 00ec CDE7 b .L404 + 6909 .L405: +2960:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->Mode = HAL_I2C_MODE_NONE; + 6910 .loc 1 2960 7 is_stmt 1 view .LVU2280 +2960:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->Mode = HAL_I2C_MODE_NONE; + 6911 .loc 1 2960 23 is_stmt 0 view .LVU2281 + 6912 00ee 4123 movs r3, #65 + 6913 00f0 2022 movs r2, #32 + 6914 00f2 E254 strb r2, [r4, r3] +2961:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 6915 .loc 1 2961 7 is_stmt 1 view .LVU2282 +2961:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 6916 .loc 1 2961 23 is_stmt 0 view .LVU2283 + 6917 00f4 0022 movs r2, #0 + 6918 00f6 0133 adds r3, r3, #1 + 6919 00f8 E254 strb r2, [r4, r3] +2964:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 6920 .loc 1 2964 7 is_stmt 1 view .LVU2284 +2964:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 6921 .loc 1 2964 11 is_stmt 0 view .LVU2285 + 6922 00fa 636C ldr r3, [r4, #68] +2964:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 6923 .loc 1 2964 23 view .LVU2286 + 6924 00fc 8021 movs r1, #128 + 6925 00fe 0B43 orrs r3, r1 + 6926 0100 6364 str r3, [r4, #68] +2967:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + ARM GAS /tmp/ccuRhBPx.s page 287 + + + 6927 .loc 1 2967 7 is_stmt 1 view .LVU2287 +2967:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 6928 .loc 1 2967 7 view .LVU2288 + 6929 0102 4023 movs r3, #64 + 6930 0104 E254 strb r2, [r4, r3] +2967:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 6931 .loc 1 2967 7 view .LVU2289 +2969:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } + 6932 .loc 1 2969 7 view .LVU2290 +2969:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } + 6933 .loc 1 2969 14 is_stmt 0 view .LVU2291 + 6934 0106 0127 movs r7, #1 + 6935 0108 11E0 b .L398 + 6936 .LVL480: + 6937 .L413: +2975:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 6938 .loc 1 2975 7 is_stmt 1 view .LVU2292 + 6939 010a 8023 movs r3, #128 + 6940 010c EAB2 uxtb r2, r5 + 6941 010e 1149 ldr r1, .L414+16 + 6942 0110 0091 str r1, [sp] + 6943 0112 5B04 lsls r3, r3, #17 + 6944 0114 3100 movs r1, r6 + 6945 0116 2000 movs r0, r4 + 6946 .LVL481: +2975:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 6947 .loc 1 2975 7 is_stmt 0 view .LVU2293 + 6948 0118 FFF7FEFF bl I2C_TransferConfig + 6949 .LVL482: +2978:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 6950 .loc 1 2978 7 is_stmt 1 view .LVU2294 +2978:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 6951 .loc 1 2978 7 view .LVU2295 + 6952 011c 4023 movs r3, #64 + 6953 011e 0022 movs r2, #0 + 6954 0120 E254 strb r2, [r4, r3] +2978:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 6955 .loc 1 2978 7 view .LVU2296 +2987:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } + 6956 .loc 1 2987 7 view .LVU2297 + 6957 0122 0121 movs r1, #1 + 6958 0124 2000 movs r0, r4 + 6959 0126 FFF7FEFF bl I2C_Enable_IRQ + 6960 .LVL483: +3004:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } + 6961 .loc 1 3004 5 view .LVU2298 +3004:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } + 6962 .loc 1 3004 12 is_stmt 0 view .LVU2299 + 6963 012a 00E0 b .L398 + 6964 .LVL484: + 6965 .L408: +3008:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } + 6966 .loc 1 3008 12 view .LVU2300 + 6967 012c 0227 movs r7, #2 + 6968 .LVL485: + 6969 .L398: +3010:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + ARM GAS /tmp/ccuRhBPx.s page 288 + + + 6970 .loc 1 3010 1 view .LVU2301 + 6971 012e 3800 movs r0, r7 + 6972 0130 02B0 add sp, sp, #8 + 6973 @ sp needed + 6974 .LVL486: + 6975 .LVL487: + 6976 .LVL488: +3010:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 6977 .loc 1 3010 1 view .LVU2302 + 6978 0132 E0BC pop {r5, r6, r7} + 6979 0134 BA46 mov r10, r7 + 6980 0136 B146 mov r9, r6 + 6981 0138 A846 mov r8, r5 + 6982 013a F0BD pop {r4, r5, r6, r7, pc} + 6983 .LVL489: + 6984 .L409: +2896:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } + 6985 .loc 1 2896 14 view .LVU2303 + 6986 013c 0227 movs r7, #2 + 6987 013e F6E7 b .L398 + 6988 .L410: +2900:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 6989 .loc 1 2900 5 discriminator 1 view .LVU2304 + 6990 0140 0227 movs r7, #2 + 6991 0142 F4E7 b .L398 + 6992 .L415: + 6993 .align 2 + 6994 .L414: + 6995 0144 0000FFFF .word -65536 + 6996 0148 00000000 .word I2C_Mem_ISR_DMA + 6997 014c 00000000 .word I2C_DMAMasterTransmitCplt + 6998 0150 00000000 .word I2C_DMAError + 6999 0154 00200080 .word -2147475456 + 7000 .cfi_endproc + 7001 .LFE60: + 7003 .section .text.HAL_I2C_Mem_Read_DMA,"ax",%progbits + 7004 .align 1 + 7005 .global HAL_I2C_Mem_Read_DMA + 7006 .syntax unified + 7007 .code 16 + 7008 .thumb_func + 7010 HAL_I2C_Mem_Read_DMA: + 7011 .LVL490: + 7012 .LFB61: +3026:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** HAL_StatusTypeDef dmaxferstatus; + 7013 .loc 1 3026 1 is_stmt 1 view -0 + 7014 .cfi_startproc + 7015 @ args = 8, pretend = 0, frame = 0 + 7016 @ frame_needed = 0, uses_anonymous_args = 0 +3026:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** HAL_StatusTypeDef dmaxferstatus; + 7017 .loc 1 3026 1 is_stmt 0 view .LVU2306 + 7018 0000 F0B5 push {r4, r5, r6, r7, lr} + 7019 .cfi_def_cfa_offset 20 + 7020 .cfi_offset 4, -20 + 7021 .cfi_offset 5, -16 + 7022 .cfi_offset 6, -12 + 7023 .cfi_offset 7, -8 + ARM GAS /tmp/ccuRhBPx.s page 289 + + + 7024 .cfi_offset 14, -4 + 7025 0002 D646 mov lr, r10 + 7026 0004 4F46 mov r7, r9 + 7027 0006 4646 mov r6, r8 + 7028 0008 C0B5 push {r6, r7, lr} + 7029 .cfi_def_cfa_offset 32 + 7030 .cfi_offset 8, -32 + 7031 .cfi_offset 9, -28 + 7032 .cfi_offset 10, -24 + 7033 000a 82B0 sub sp, sp, #8 + 7034 .cfi_def_cfa_offset 40 + 7035 000c 0400 movs r4, r0 + 7036 000e 0E00 movs r6, r1 + 7037 0010 1100 movs r1, r2 + 7038 .LVL491: +3026:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** HAL_StatusTypeDef dmaxferstatus; + 7039 .loc 1 3026 1 view .LVU2307 + 7040 0012 1D00 movs r5, r3 + 7041 0014 0AA8 add r0, sp, #40 + 7042 .LVL492: +3026:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** HAL_StatusTypeDef dmaxferstatus; + 7043 .loc 1 3026 1 view .LVU2308 + 7044 0016 04C8 ldmia r0!, {r2} + 7045 .LVL493: +3026:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** HAL_StatusTypeDef dmaxferstatus; + 7046 .loc 1 3026 1 view .LVU2309 + 7047 0018 0088 ldrh r0, [r0] + 7048 .LVL494: +3027:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 7049 .loc 1 3027 3 is_stmt 1 view .LVU2310 +3030:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 7050 .loc 1 3030 3 view .LVU2311 +3032:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { + 7051 .loc 1 3032 3 view .LVU2312 +3032:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { + 7052 .loc 1 3032 11 is_stmt 0 view .LVU2313 + 7053 001a 4123 movs r3, #65 + 7054 .LVL495: +3032:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { + 7055 .loc 1 3032 11 view .LVU2314 + 7056 001c E35C ldrb r3, [r4, r3] +3032:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { + 7057 .loc 1 3032 6 view .LVU2315 + 7058 001e 202B cmp r3, #32 + 7059 0020 00D0 beq .LCB6684 + 7060 0022 83E0 b .L427 @long jump + 7061 .LCB6684: +3034:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { + 7062 .loc 1 3034 5 is_stmt 1 view .LVU2316 +3034:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { + 7063 .loc 1 3034 8 is_stmt 0 view .LVU2317 + 7064 0024 002A cmp r2, #0 + 7065 0026 54D0 beq .L418 +3034:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { + 7066 .loc 1 3034 25 discriminator 1 view .LVU2318 + 7067 0028 0028 cmp r0, #0 + 7068 002a 52D0 beq .L418 + ARM GAS /tmp/ccuRhBPx.s page 290 + + +3040:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { + 7069 .loc 1 3040 5 is_stmt 1 view .LVU2319 +3040:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { + 7070 .loc 1 3040 9 is_stmt 0 view .LVU2320 + 7071 002c 2368 ldr r3, [r4] + 7072 002e 9946 mov r9, r3 + 7073 0030 9B69 ldr r3, [r3, #24] +3040:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { + 7074 .loc 1 3040 8 view .LVU2321 + 7075 0032 1B04 lsls r3, r3, #16 + 7076 0034 00D5 bpl .LCB6697 + 7077 0036 81E0 b .L428 @long jump + 7078 .LCB6697: +3046:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 7079 .loc 1 3046 5 is_stmt 1 view .LVU2322 +3046:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 7080 .loc 1 3046 5 view .LVU2323 + 7081 0038 4023 movs r3, #64 + 7082 003a E35C ldrb r3, [r4, r3] + 7083 003c 012B cmp r3, #1 + 7084 003e 00D1 bne .LCB6703 + 7085 0040 7EE0 b .L429 @long jump + 7086 .LCB6703: +3046:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 7087 .loc 1 3046 5 discriminator 2 view .LVU2324 + 7088 0042 4023 movs r3, #64 + 7089 0044 9A46 mov r10, r3 + 7090 0046 3F3B subs r3, r3, #63 + 7091 0048 5746 mov r7, r10 + 7092 004a E355 strb r3, [r4, r7] +3046:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 7093 .loc 1 3046 5 discriminator 2 view .LVU2325 +3048:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->Mode = HAL_I2C_MODE_MEM; + 7094 .loc 1 3048 5 view .LVU2326 +3048:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->Mode = HAL_I2C_MODE_MEM; + 7095 .loc 1 3048 23 is_stmt 0 view .LVU2327 + 7096 004c 4033 adds r3, r3, #64 + 7097 004e 9C46 mov ip, r3 + 7098 0050 1F3B subs r3, r3, #31 + 7099 0052 9846 mov r8, r3 + 7100 0054 6346 mov r3, ip + 7101 0056 4746 mov r7, r8 + 7102 0058 E754 strb r7, [r4, r3] +3049:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->ErrorCode = HAL_I2C_ERROR_NONE; + 7103 .loc 1 3049 5 is_stmt 1 view .LVU2328 +3049:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->ErrorCode = HAL_I2C_ERROR_NONE; + 7104 .loc 1 3049 23 is_stmt 0 view .LVU2329 + 7105 005a 0133 adds r3, r3, #1 + 7106 005c 5746 mov r7, r10 + 7107 005e E754 strb r7, [r4, r3] +3050:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 7108 .loc 1 3050 5 is_stmt 1 view .LVU2330 +3050:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 7109 .loc 1 3050 23 is_stmt 0 view .LVU2331 + 7110 0060 0023 movs r3, #0 + 7111 0062 6364 str r3, [r4, #68] +3053:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->XferCount = Size; + ARM GAS /tmp/ccuRhBPx.s page 291 + + + 7112 .loc 1 3053 5 is_stmt 1 view .LVU2332 +3053:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->XferCount = Size; + 7113 .loc 1 3053 23 is_stmt 0 view .LVU2333 + 7114 0064 6262 str r2, [r4, #36] +3054:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->XferOptions = I2C_NO_OPTION_FRAME; + 7115 .loc 1 3054 5 is_stmt 1 view .LVU2334 +3054:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->XferOptions = I2C_NO_OPTION_FRAME; + 7116 .loc 1 3054 23 is_stmt 0 view .LVU2335 + 7117 0066 6085 strh r0, [r4, #42] +3055:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->XferISR = I2C_Mem_ISR_DMA; + 7118 .loc 1 3055 5 is_stmt 1 view .LVU2336 +3055:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->XferISR = I2C_Mem_ISR_DMA; + 7119 .loc 1 3055 23 is_stmt 0 view .LVU2337 + 7120 0068 364B ldr r3, .L433 + 7121 006a E362 str r3, [r4, #44] +3056:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->Devaddress = DevAddress; + 7122 .loc 1 3056 5 is_stmt 1 view .LVU2338 +3056:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->Devaddress = DevAddress; + 7123 .loc 1 3056 23 is_stmt 0 view .LVU2339 + 7124 006c 364B ldr r3, .L433+4 + 7125 006e 6363 str r3, [r4, #52] +3057:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 7126 .loc 1 3057 5 is_stmt 1 view .LVU2340 +3057:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 7127 .loc 1 3057 23 is_stmt 0 view .LVU2341 + 7128 0070 E664 str r6, [r4, #76] +3059:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { + 7129 .loc 1 3059 5 is_stmt 1 view .LVU2342 +3059:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { + 7130 .loc 1 3059 13 is_stmt 0 view .LVU2343 + 7131 0072 638D ldrh r3, [r4, #42] + 7132 0074 9BB2 uxth r3, r3 +3059:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { + 7133 .loc 1 3059 8 view .LVU2344 + 7134 0076 FF2B cmp r3, #255 + 7135 0078 30D9 bls .L420 +3061:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } + 7136 .loc 1 3061 7 is_stmt 1 view .LVU2345 +3061:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } + 7137 .loc 1 3061 22 is_stmt 0 view .LVU2346 + 7138 007a FF23 movs r3, #255 + 7139 007c 2385 strh r3, [r4, #40] + 7140 .L421: +3069:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { + 7141 .loc 1 3069 5 is_stmt 1 view .LVU2347 +3069:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { + 7142 .loc 1 3069 8 is_stmt 0 view .LVU2348 + 7143 007e 012D cmp r5, #1 + 7144 0080 2FD0 beq .L431 +3081:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 7145 .loc 1 3081 7 is_stmt 1 view .LVU2349 +3081:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 7146 .loc 1 3081 30 is_stmt 0 view .LVU2350 + 7147 0082 0B0A lsrs r3, r1, #8 +3081:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 7148 .loc 1 3081 28 view .LVU2351 + 7149 0084 4846 mov r0, r9 + ARM GAS /tmp/ccuRhBPx.s page 292 + + + 7150 0086 8362 str r3, [r0, #40] +3084:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } + 7151 .loc 1 3084 7 is_stmt 1 view .LVU2352 +3084:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } + 7152 .loc 1 3084 26 is_stmt 0 view .LVU2353 + 7153 0088 C9B2 uxtb r1, r1 + 7154 .LVL496: +3084:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } + 7155 .loc 1 3084 24 view .LVU2354 + 7156 008a 2165 str r1, [r4, #80] + 7157 .L423: +3087:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { + 7158 .loc 1 3087 5 is_stmt 1 view .LVU2355 +3087:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { + 7159 .loc 1 3087 13 is_stmt 0 view .LVU2356 + 7160 008c E36B ldr r3, [r4, #60] +3087:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { + 7161 .loc 1 3087 8 view .LVU2357 + 7162 008e 002B cmp r3, #0 + 7163 0090 2ED0 beq .L424 +3090:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 7164 .loc 1 3090 7 is_stmt 1 view .LVU2358 +3090:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 7165 .loc 1 3090 38 is_stmt 0 view .LVU2359 + 7166 0092 2E49 ldr r1, .L433+8 + 7167 0094 9962 str r1, [r3, #40] +3093:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 7168 .loc 1 3093 7 is_stmt 1 view .LVU2360 +3093:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 7169 .loc 1 3093 11 is_stmt 0 view .LVU2361 + 7170 0096 E36B ldr r3, [r4, #60] +3093:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 7171 .loc 1 3093 39 view .LVU2362 + 7172 0098 2D49 ldr r1, .L433+12 + 7173 009a 1963 str r1, [r3, #48] +3096:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->hdmarx->XferAbortCallback = NULL; + 7174 .loc 1 3096 7 is_stmt 1 view .LVU2363 +3096:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->hdmarx->XferAbortCallback = NULL; + 7175 .loc 1 3096 11 is_stmt 0 view .LVU2364 + 7176 009c E16B ldr r1, [r4, #60] +3096:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->hdmarx->XferAbortCallback = NULL; + 7177 .loc 1 3096 42 view .LVU2365 + 7178 009e 0023 movs r3, #0 + 7179 00a0 CB62 str r3, [r1, #44] +3097:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 7180 .loc 1 3097 7 is_stmt 1 view .LVU2366 +3097:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 7181 .loc 1 3097 11 is_stmt 0 view .LVU2367 + 7182 00a2 E16B ldr r1, [r4, #60] +3097:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 7183 .loc 1 3097 39 view .LVU2368 + 7184 00a4 4B63 str r3, [r1, #52] +3100:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->XferSize); + 7185 .loc 1 3100 7 is_stmt 1 view .LVU2369 +3100:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->XferSize); + 7186 .loc 1 3100 69 is_stmt 0 view .LVU2370 + 7187 00a6 2168 ldr r1, [r4] + ARM GAS /tmp/ccuRhBPx.s page 293 + + +3100:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->XferSize); + 7188 .loc 1 3100 64 view .LVU2371 + 7189 00a8 2431 adds r1, r1, #36 +3101:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } + 7190 .loc 1 3101 44 view .LVU2372 + 7191 00aa 238D ldrh r3, [r4, #40] +3100:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->XferSize); + 7192 .loc 1 3100 23 view .LVU2373 + 7193 00ac E06B ldr r0, [r4, #60] + 7194 00ae FFF7FEFF bl HAL_DMA_Start_IT + 7195 .LVL497: + 7196 00b2 071E subs r7, r0, #0 + 7197 .LVL498: +3118:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { + 7198 .loc 1 3118 5 is_stmt 1 view .LVU2374 +3118:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { + 7199 .loc 1 3118 8 is_stmt 0 view .LVU2375 + 7200 00b4 2AD0 beq .L432 +3138:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->Mode = HAL_I2C_MODE_NONE; + 7201 .loc 1 3138 7 is_stmt 1 view .LVU2376 +3138:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->Mode = HAL_I2C_MODE_NONE; + 7202 .loc 1 3138 23 is_stmt 0 view .LVU2377 + 7203 00b6 4123 movs r3, #65 + 7204 00b8 2022 movs r2, #32 + 7205 00ba E254 strb r2, [r4, r3] +3139:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 7206 .loc 1 3139 7 is_stmt 1 view .LVU2378 +3139:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 7207 .loc 1 3139 23 is_stmt 0 view .LVU2379 + 7208 00bc 0022 movs r2, #0 + 7209 00be 0133 adds r3, r3, #1 + 7210 00c0 E254 strb r2, [r4, r3] +3142:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 7211 .loc 1 3142 7 is_stmt 1 view .LVU2380 +3142:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 7212 .loc 1 3142 11 is_stmt 0 view .LVU2381 + 7213 00c2 636C ldr r3, [r4, #68] +3142:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 7214 .loc 1 3142 23 view .LVU2382 + 7215 00c4 1021 movs r1, #16 + 7216 00c6 0B43 orrs r3, r1 + 7217 00c8 6364 str r3, [r4, #68] +3145:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 7218 .loc 1 3145 7 is_stmt 1 view .LVU2383 +3145:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 7219 .loc 1 3145 7 view .LVU2384 + 7220 00ca 4023 movs r3, #64 + 7221 00cc E254 strb r2, [r4, r3] +3145:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 7222 .loc 1 3145 7 view .LVU2385 +3147:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } + 7223 .loc 1 3147 7 view .LVU2386 +3147:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } + 7224 .loc 1 3147 14 is_stmt 0 view .LVU2387 + 7225 00ce 0127 movs r7, #1 + 7226 00d0 2DE0 b .L417 + 7227 .LVL499: + ARM GAS /tmp/ccuRhBPx.s page 294 + + + 7228 .L418: +3036:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** return HAL_ERROR; + 7229 .loc 1 3036 7 is_stmt 1 view .LVU2388 +3036:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** return HAL_ERROR; + 7230 .loc 1 3036 23 is_stmt 0 view .LVU2389 + 7231 00d2 8023 movs r3, #128 + 7232 00d4 9B00 lsls r3, r3, #2 + 7233 00d6 6364 str r3, [r4, #68] +3037:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } + 7234 .loc 1 3037 7 is_stmt 1 view .LVU2390 +3037:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } + 7235 .loc 1 3037 15 is_stmt 0 view .LVU2391 + 7236 00d8 0127 movs r7, #1 + 7237 00da 28E0 b .L417 + 7238 .L420: +3065:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } + 7239 .loc 1 3065 7 is_stmt 1 view .LVU2392 +3065:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } + 7240 .loc 1 3065 28 is_stmt 0 view .LVU2393 + 7241 00dc 638D ldrh r3, [r4, #42] +3065:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } + 7242 .loc 1 3065 22 view .LVU2394 + 7243 00de 2385 strh r3, [r4, #40] + 7244 00e0 CDE7 b .L421 + 7245 .L431: +3072:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 7246 .loc 1 3072 7 is_stmt 1 view .LVU2395 +3072:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 7247 .loc 1 3072 30 is_stmt 0 view .LVU2396 + 7248 00e2 C9B2 uxtb r1, r1 +3072:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 7249 .loc 1 3072 28 view .LVU2397 + 7250 00e4 4B46 mov r3, r9 + 7251 00e6 9962 str r1, [r3, #40] +3075:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } + 7252 .loc 1 3075 7 is_stmt 1 view .LVU2398 +3075:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } + 7253 .loc 1 3075 24 is_stmt 0 view .LVU2399 + 7254 00e8 0123 movs r3, #1 + 7255 00ea 5B42 rsbs r3, r3, #0 + 7256 00ec 2365 str r3, [r4, #80] + 7257 00ee CDE7 b .L423 + 7258 .L424: +3106:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->Mode = HAL_I2C_MODE_NONE; + 7259 .loc 1 3106 7 is_stmt 1 view .LVU2400 +3106:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->Mode = HAL_I2C_MODE_NONE; + 7260 .loc 1 3106 23 is_stmt 0 view .LVU2401 + 7261 00f0 4123 movs r3, #65 + 7262 00f2 2022 movs r2, #32 + 7263 00f4 E254 strb r2, [r4, r3] +3107:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 7264 .loc 1 3107 7 is_stmt 1 view .LVU2402 +3107:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 7265 .loc 1 3107 23 is_stmt 0 view .LVU2403 + 7266 00f6 0022 movs r2, #0 + 7267 00f8 0133 adds r3, r3, #1 + 7268 00fa E254 strb r2, [r4, r3] + ARM GAS /tmp/ccuRhBPx.s page 295 + + +3110:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 7269 .loc 1 3110 7 is_stmt 1 view .LVU2404 +3110:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 7270 .loc 1 3110 11 is_stmt 0 view .LVU2405 + 7271 00fc 636C ldr r3, [r4, #68] +3110:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 7272 .loc 1 3110 23 view .LVU2406 + 7273 00fe 8021 movs r1, #128 + 7274 0100 0B43 orrs r3, r1 + 7275 0102 6364 str r3, [r4, #68] +3113:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 7276 .loc 1 3113 7 is_stmt 1 view .LVU2407 +3113:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 7277 .loc 1 3113 7 view .LVU2408 + 7278 0104 4023 movs r3, #64 + 7279 0106 E254 strb r2, [r4, r3] +3113:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 7280 .loc 1 3113 7 view .LVU2409 +3115:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } + 7281 .loc 1 3115 7 view .LVU2410 +3115:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } + 7282 .loc 1 3115 14 is_stmt 0 view .LVU2411 + 7283 0108 0127 movs r7, #1 + 7284 010a 10E0 b .L417 + 7285 .LVL500: + 7286 .L432: +3121:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 7287 .loc 1 3121 7 is_stmt 1 view .LVU2412 + 7288 010c EAB2 uxtb r2, r5 + 7289 010e 114B ldr r3, .L433+16 + 7290 0110 0093 str r3, [sp] + 7291 0112 0023 movs r3, #0 + 7292 0114 3100 movs r1, r6 + 7293 0116 2000 movs r0, r4 + 7294 .LVL501: +3121:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 7295 .loc 1 3121 7 is_stmt 0 view .LVU2413 + 7296 0118 FFF7FEFF bl I2C_TransferConfig + 7297 .LVL502: +3124:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 7298 .loc 1 3124 7 is_stmt 1 view .LVU2414 +3124:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 7299 .loc 1 3124 7 view .LVU2415 + 7300 011c 4023 movs r3, #64 + 7301 011e 0022 movs r2, #0 + 7302 0120 E254 strb r2, [r4, r3] +3124:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 7303 .loc 1 3124 7 view .LVU2416 +3133:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } + 7304 .loc 1 3133 7 view .LVU2417 + 7305 0122 0121 movs r1, #1 + 7306 0124 2000 movs r0, r4 + 7307 0126 FFF7FEFF bl I2C_Enable_IRQ + 7308 .LVL503: +3150:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } + 7309 .loc 1 3150 5 view .LVU2418 +3150:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } + ARM GAS /tmp/ccuRhBPx.s page 296 + + + 7310 .loc 1 3150 12 is_stmt 0 view .LVU2419 + 7311 012a 00E0 b .L417 + 7312 .LVL504: + 7313 .L427: +3154:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } + 7314 .loc 1 3154 12 view .LVU2420 + 7315 012c 0227 movs r7, #2 + 7316 .L417: +3156:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 7317 .loc 1 3156 1 view .LVU2421 + 7318 012e 3800 movs r0, r7 + 7319 0130 02B0 add sp, sp, #8 + 7320 @ sp needed + 7321 .LVL505: + 7322 .LVL506: + 7323 .LVL507: +3156:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 7324 .loc 1 3156 1 view .LVU2422 + 7325 0132 E0BC pop {r5, r6, r7} + 7326 0134 BA46 mov r10, r7 + 7327 0136 B146 mov r9, r6 + 7328 0138 A846 mov r8, r5 + 7329 013a F0BD pop {r4, r5, r6, r7, pc} + 7330 .LVL508: + 7331 .L428: +3042:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } + 7332 .loc 1 3042 14 view .LVU2423 + 7333 013c 0227 movs r7, #2 + 7334 013e F6E7 b .L417 + 7335 .L429: +3046:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 7336 .loc 1 3046 5 discriminator 1 view .LVU2424 + 7337 0140 0227 movs r7, #2 + 7338 0142 F4E7 b .L417 + 7339 .L434: + 7340 .align 2 + 7341 .L433: + 7342 0144 0000FFFF .word -65536 + 7343 0148 00000000 .word I2C_Mem_ISR_DMA + 7344 014c 00000000 .word I2C_DMAMasterReceiveCplt + 7345 0150 00000000 .word I2C_DMAError + 7346 0154 00200080 .word -2147475456 + 7347 .cfi_endproc + 7348 .LFE61: + 7350 .section .text.HAL_I2C_IsDeviceReady,"ax",%progbits + 7351 .align 1 + 7352 .global HAL_I2C_IsDeviceReady + 7353 .syntax unified + 7354 .code 16 + 7355 .thumb_func + 7357 HAL_I2C_IsDeviceReady: + 7358 .LVL509: + 7359 .LFB62: +3171:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** uint32_t tickstart; + 7360 .loc 1 3171 1 is_stmt 1 view -0 + 7361 .cfi_startproc + 7362 @ args = 0, pretend = 0, frame = 8 + ARM GAS /tmp/ccuRhBPx.s page 297 + + + 7363 @ frame_needed = 0, uses_anonymous_args = 0 +3171:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** uint32_t tickstart; + 7364 .loc 1 3171 1 is_stmt 0 view .LVU2426 + 7365 0000 F0B5 push {r4, r5, r6, r7, lr} + 7366 .cfi_def_cfa_offset 20 + 7367 .cfi_offset 4, -20 + 7368 .cfi_offset 5, -16 + 7369 .cfi_offset 6, -12 + 7370 .cfi_offset 7, -8 + 7371 .cfi_offset 14, -4 + 7372 0002 CE46 mov lr, r9 + 7373 0004 4746 mov r7, r8 + 7374 0006 80B5 push {r7, lr} + 7375 .cfi_def_cfa_offset 28 + 7376 .cfi_offset 8, -28 + 7377 .cfi_offset 9, -24 + 7378 0008 85B0 sub sp, sp, #20 + 7379 .cfi_def_cfa_offset 48 + 7380 000a 0600 movs r6, r0 + 7381 000c 8946 mov r9, r1 + 7382 000e 9046 mov r8, r2 + 7383 0010 1D00 movs r5, r3 +3172:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 7384 .loc 1 3172 3 is_stmt 1 view .LVU2427 +3174:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 7385 .loc 1 3174 3 view .LVU2428 +3174:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 7386 .loc 1 3174 17 is_stmt 0 view .LVU2429 + 7387 0012 0023 movs r3, #0 + 7388 .LVL510: +3174:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 7389 .loc 1 3174 17 view .LVU2430 + 7390 0014 0393 str r3, [sp, #12] +3176:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** FlagStatus tmp2; + 7391 .loc 1 3176 3 is_stmt 1 view .LVU2431 +3177:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 7392 .loc 1 3177 3 view .LVU2432 +3179:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { + 7393 .loc 1 3179 3 view .LVU2433 +3179:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { + 7394 .loc 1 3179 11 is_stmt 0 view .LVU2434 + 7395 0016 4133 adds r3, r3, #65 + 7396 0018 C35C ldrb r3, [r0, r3] +3179:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { + 7397 .loc 1 3179 6 view .LVU2435 + 7398 001a 202B cmp r3, #32 + 7399 001c 00D0 beq .LCB6999 + 7400 001e A5E0 b .L446 @long jump + 7401 .LCB6999: +3181:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { + 7402 .loc 1 3181 5 is_stmt 1 view .LVU2436 +3181:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { + 7403 .loc 1 3181 9 is_stmt 0 view .LVU2437 + 7404 0020 0368 ldr r3, [r0] + 7405 0022 9B69 ldr r3, [r3, #24] +3181:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { + 7406 .loc 1 3181 8 view .LVU2438 + ARM GAS /tmp/ccuRhBPx.s page 298 + + + 7407 0024 1B04 lsls r3, r3, #16 + 7408 0026 00D5 bpl .LCB7006 + 7409 0028 A2E0 b .L447 @long jump + 7410 .LCB7006: +3187:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 7411 .loc 1 3187 5 is_stmt 1 view .LVU2439 +3187:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 7412 .loc 1 3187 5 view .LVU2440 + 7413 002a 4023 movs r3, #64 + 7414 002c C35C ldrb r3, [r0, r3] + 7415 002e 012B cmp r3, #1 + 7416 0030 00D1 bne .LCB7012 + 7417 0032 9FE0 b .L448 @long jump + 7418 .LCB7012: +3187:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 7419 .loc 1 3187 5 discriminator 2 view .LVU2441 + 7420 0034 4023 movs r3, #64 + 7421 0036 0122 movs r2, #1 + 7422 .LVL511: +3187:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 7423 .loc 1 3187 5 is_stmt 0 discriminator 2 view .LVU2442 + 7424 0038 C254 strb r2, [r0, r3] +3187:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 7425 .loc 1 3187 5 is_stmt 1 discriminator 2 view .LVU2443 +3189:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->ErrorCode = HAL_I2C_ERROR_NONE; + 7426 .loc 1 3189 5 view .LVU2444 +3189:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->ErrorCode = HAL_I2C_ERROR_NONE; + 7427 .loc 1 3189 17 is_stmt 0 view .LVU2445 + 7428 003a 0133 adds r3, r3, #1 + 7429 003c 2332 adds r2, r2, #35 + 7430 003e C254 strb r2, [r0, r3] +3190:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 7431 .loc 1 3190 5 is_stmt 1 view .LVU2446 +3190:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 7432 .loc 1 3190 21 is_stmt 0 view .LVU2447 + 7433 0040 0023 movs r3, #0 + 7434 0042 4364 str r3, [r0, #68] + 7435 .LVL512: + 7436 .L445: +3192:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { + 7437 .loc 1 3192 5 is_stmt 1 view .LVU2448 +3195:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 7438 .loc 1 3195 7 view .LVU2449 +3195:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 7439 .loc 1 3195 29 is_stmt 0 view .LVU2450 + 7440 0044 F368 ldr r3, [r6, #12] + 7441 0046 012B cmp r3, #1 + 7442 0048 17D0 beq .L453 +3195:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 7443 .loc 1 3195 29 discriminator 2 view .LVU2451 + 7444 004a 4B46 mov r3, r9 + 7445 004c 9A05 lsls r2, r3, #22 + 7446 004e 920D lsrs r2, r2, #22 + 7447 0050 4C4B ldr r3, .L457 + 7448 0052 1343 orrs r3, r2 + 7449 .L438: +3195:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + ARM GAS /tmp/ccuRhBPx.s page 299 + + + 7450 .loc 1 3195 11 discriminator 4 view .LVU2452 + 7451 0054 3268 ldr r2, [r6] +3195:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 7452 .loc 1 3195 27 discriminator 4 view .LVU2453 + 7453 0056 5360 str r3, [r2, #4] +3199:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 7454 .loc 1 3199 7 is_stmt 1 view .LVU2454 +3199:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 7455 .loc 1 3199 19 is_stmt 0 view .LVU2455 + 7456 0058 FFF7FEFF bl HAL_GetTick + 7457 .LVL513: + 7458 005c 0700 movs r7, r0 + 7459 .LVL514: +3201:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** tmp2 = __HAL_I2C_GET_FLAG(hi2c, I2C_FLAG_AF); + 7460 .loc 1 3201 7 is_stmt 1 view .LVU2456 +3201:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** tmp2 = __HAL_I2C_GET_FLAG(hi2c, I2C_FLAG_AF); + 7461 .loc 1 3201 14 is_stmt 0 view .LVU2457 + 7462 005e 3268 ldr r2, [r6] + 7463 0060 9169 ldr r1, [r2, #24] + 7464 0062 2023 movs r3, #32 + 7465 0064 0B40 ands r3, r1 + 7466 0066 591E subs r1, r3, #1 + 7467 0068 8B41 sbcs r3, r3, r1 + 7468 006a DBB2 uxtb r3, r3 + 7469 .LVL515: +3202:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 7470 .loc 1 3202 7 is_stmt 1 view .LVU2458 +3202:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 7471 .loc 1 3202 14 is_stmt 0 view .LVU2459 + 7472 006c 9269 ldr r2, [r2, #24] + 7473 006e 1024 movs r4, #16 + 7474 0070 1440 ands r4, r2 + 7475 0072 621E subs r2, r4, #1 + 7476 0074 9441 sbcs r4, r4, r2 + 7477 0076 E4B2 uxtb r4, r4 + 7478 .LVL516: +3204:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { + 7479 .loc 1 3204 7 is_stmt 1 view .LVU2460 +3204:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { + 7480 .loc 1 3204 13 is_stmt 0 view .LVU2461 + 7481 0078 12E0 b .L439 + 7482 .LVL517: + 7483 .L453: +3195:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 7484 .loc 1 3195 29 discriminator 1 view .LVU2462 + 7485 007a 4B46 mov r3, r9 + 7486 007c 9A05 lsls r2, r3, #22 + 7487 007e 920D lsrs r2, r2, #22 + 7488 0080 414B ldr r3, .L457+4 + 7489 0082 1343 orrs r3, r2 + 7490 0084 E6E7 b .L438 + 7491 .LVL518: + 7492 .L440: +3223:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** tmp2 = __HAL_I2C_GET_FLAG(hi2c, I2C_FLAG_AF); + 7493 .loc 1 3223 9 is_stmt 1 view .LVU2463 +3223:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** tmp2 = __HAL_I2C_GET_FLAG(hi2c, I2C_FLAG_AF); + 7494 .loc 1 3223 16 is_stmt 0 view .LVU2464 + ARM GAS /tmp/ccuRhBPx.s page 300 + + + 7495 0086 3268 ldr r2, [r6] + 7496 0088 9169 ldr r1, [r2, #24] + 7497 008a 2023 movs r3, #32 + 7498 008c 0B40 ands r3, r1 + 7499 008e 591E subs r1, r3, #1 + 7500 0090 8B41 sbcs r3, r3, r1 + 7501 0092 DBB2 uxtb r3, r3 + 7502 .LVL519: +3224:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } + 7503 .loc 1 3224 9 is_stmt 1 view .LVU2465 +3224:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } + 7504 .loc 1 3224 16 is_stmt 0 view .LVU2466 + 7505 0094 9269 ldr r2, [r2, #24] + 7506 0096 1024 movs r4, #16 + 7507 0098 1440 ands r4, r2 + 7508 009a 621E subs r2, r4, #1 + 7509 009c 9441 sbcs r4, r4, r2 + 7510 009e E4B2 uxtb r4, r4 + 7511 .LVL520: + 7512 .L439: +3204:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { + 7513 .loc 1 3204 30 is_stmt 1 view .LVU2467 + 7514 00a0 1C43 orrs r4, r3 + 7515 .LVL521: +3204:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { + 7516 .loc 1 3204 30 is_stmt 0 view .LVU2468 + 7517 00a2 17D1 bne .L454 +3206:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { + 7518 .loc 1 3206 9 is_stmt 1 view .LVU2469 +3206:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { + 7519 .loc 1 3206 12 is_stmt 0 view .LVU2470 + 7520 00a4 6B1C adds r3, r5, #1 + 7521 00a6 EED0 beq .L440 + 7522 .LVL522: +3208:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { + 7523 .loc 1 3208 11 is_stmt 1 view .LVU2471 +3208:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { + 7524 .loc 1 3208 17 is_stmt 0 view .LVU2472 + 7525 00a8 FFF7FEFF bl HAL_GetTick + 7526 .LVL523: +3208:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { + 7527 .loc 1 3208 31 discriminator 1 view .LVU2473 + 7528 00ac C01B subs r0, r0, r7 +3208:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { + 7529 .loc 1 3208 14 discriminator 1 view .LVU2474 + 7530 00ae A842 cmp r0, r5 + 7531 00b0 01D8 bhi .L441 +3208:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { + 7532 .loc 1 3208 55 discriminator 1 view .LVU2475 + 7533 00b2 002D cmp r5, #0 + 7534 00b4 E7D1 bne .L440 + 7535 .L441: +3211:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 7536 .loc 1 3211 13 is_stmt 1 view .LVU2476 +3211:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 7537 .loc 1 3211 25 is_stmt 0 view .LVU2477 + 7538 00b6 2022 movs r2, #32 + ARM GAS /tmp/ccuRhBPx.s page 301 + + + 7539 00b8 4123 movs r3, #65 + 7540 00ba F254 strb r2, [r6, r3] +3214:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 7541 .loc 1 3214 13 is_stmt 1 view .LVU2478 +3214:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 7542 .loc 1 3214 17 is_stmt 0 view .LVU2479 + 7543 00bc 736C ldr r3, [r6, #68] +3214:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 7544 .loc 1 3214 29 view .LVU2480 + 7545 00be 1343 orrs r3, r2 + 7546 00c0 7364 str r3, [r6, #68] +3217:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 7547 .loc 1 3217 13 is_stmt 1 view .LVU2481 +3217:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 7548 .loc 1 3217 13 view .LVU2482 + 7549 00c2 4023 movs r3, #64 + 7550 00c4 0022 movs r2, #0 + 7551 00c6 F254 strb r2, [r6, r3] +3217:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 7552 .loc 1 3217 13 view .LVU2483 +3219:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } + 7553 .loc 1 3219 13 view .LVU2484 +3219:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } + 7554 .loc 1 3219 20 is_stmt 0 view .LVU2485 + 7555 00c8 0120 movs r0, #1 + 7556 .LVL524: + 7557 .L436: +3297:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 7558 .loc 1 3297 1 view .LVU2486 + 7559 00ca 05B0 add sp, sp, #20 + 7560 @ sp needed + 7561 .LVL525: + 7562 .LVL526: + 7563 .LVL527: + 7564 .LVL528: +3297:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 7565 .loc 1 3297 1 view .LVU2487 + 7566 00cc C0BC pop {r6, r7} + 7567 00ce B946 mov r9, r7 + 7568 00d0 B046 mov r8, r6 + 7569 00d2 F0BD pop {r4, r5, r6, r7, pc} + 7570 .LVL529: + 7571 .L454: +3228:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { + 7572 .loc 1 3228 7 is_stmt 1 view .LVU2488 +3228:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { + 7573 .loc 1 3228 11 is_stmt 0 view .LVU2489 + 7574 00d4 3368 ldr r3, [r6] + 7575 .LVL530: +3228:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { + 7576 .loc 1 3228 11 view .LVU2490 + 7577 00d6 9B69 ldr r3, [r3, #24] +3228:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { + 7578 .loc 1 3228 10 view .LVU2491 + 7579 00d8 DB06 lsls r3, r3, #27 + 7580 00da 22D5 bpl .L455 +3250:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { + ARM GAS /tmp/ccuRhBPx.s page 302 + + + 7581 .loc 1 3250 9 is_stmt 1 view .LVU2492 +3250:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { + 7582 .loc 1 3250 13 is_stmt 0 view .LVU2493 + 7583 00dc 0097 str r7, [sp] + 7584 00de 2B00 movs r3, r5 + 7585 00e0 0022 movs r2, #0 + 7586 00e2 2021 movs r1, #32 + 7587 00e4 3000 movs r0, r6 + 7588 00e6 FFF7FEFF bl I2C_WaitOnFlagUntilTimeout + 7589 .LVL531: +3250:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { + 7590 .loc 1 3250 12 discriminator 1 view .LVU2494 + 7591 00ea 0028 cmp r0, #0 + 7592 00ec 46D1 bne .L450 +3256:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 7593 .loc 1 3256 9 is_stmt 1 view .LVU2495 + 7594 00ee 3368 ldr r3, [r6] + 7595 00f0 1022 movs r2, #16 + 7596 00f2 DA61 str r2, [r3, #28] +3259:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } + 7597 .loc 1 3259 9 view .LVU2496 + 7598 00f4 3368 ldr r3, [r6] + 7599 00f6 1032 adds r2, r2, #16 + 7600 00f8 DA61 str r2, [r3, #28] +3263:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { + 7601 .loc 1 3263 7 view .LVU2497 +3263:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { + 7602 .loc 1 3263 22 is_stmt 0 view .LVU2498 + 7603 00fa 039B ldr r3, [sp, #12] +3263:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { + 7604 .loc 1 3263 10 view .LVU2499 + 7605 00fc 4345 cmp r3, r8 + 7606 00fe 22D0 beq .L456 + 7607 .L444: +3279:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } while (I2C_Trials < Trials); + 7608 .loc 1 3279 7 is_stmt 1 view .LVU2500 +3279:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } while (I2C_Trials < Trials); + 7609 .loc 1 3279 17 is_stmt 0 view .LVU2501 + 7610 0100 039B ldr r3, [sp, #12] + 7611 0102 0133 adds r3, r3, #1 + 7612 0104 0393 str r3, [sp, #12] +3280:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 7613 .loc 1 3280 25 is_stmt 1 view .LVU2502 + 7614 0106 039B ldr r3, [sp, #12] + 7615 0108 4345 cmp r3, r8 + 7616 010a 9BD3 bcc .L445 +3283:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 7617 .loc 1 3283 5 view .LVU2503 +3283:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 7618 .loc 1 3283 17 is_stmt 0 view .LVU2504 + 7619 010c 2022 movs r2, #32 + 7620 010e 4123 movs r3, #65 + 7621 0110 F254 strb r2, [r6, r3] +3286:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 7622 .loc 1 3286 5 is_stmt 1 view .LVU2505 +3286:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 7623 .loc 1 3286 9 is_stmt 0 view .LVU2506 + ARM GAS /tmp/ccuRhBPx.s page 303 + + + 7624 0112 736C ldr r3, [r6, #68] +3286:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 7625 .loc 1 3286 21 view .LVU2507 + 7626 0114 1343 orrs r3, r2 + 7627 0116 7364 str r3, [r6, #68] +3289:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 7628 .loc 1 3289 5 is_stmt 1 view .LVU2508 +3289:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 7629 .loc 1 3289 5 view .LVU2509 + 7630 0118 4023 movs r3, #64 + 7631 011a 0022 movs r2, #0 + 7632 011c F254 strb r2, [r6, r3] +3289:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 7633 .loc 1 3289 5 view .LVU2510 +3291:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } + 7634 .loc 1 3291 5 view .LVU2511 +3291:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } + 7635 .loc 1 3291 12 is_stmt 0 view .LVU2512 + 7636 011e 0120 movs r0, #1 + 7637 0120 D3E7 b .L436 + 7638 .L455: +3231:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { + 7639 .loc 1 3231 9 is_stmt 1 view .LVU2513 +3231:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { + 7640 .loc 1 3231 13 is_stmt 0 view .LVU2514 + 7641 0122 0097 str r7, [sp] + 7642 0124 2B00 movs r3, r5 + 7643 0126 0022 movs r2, #0 + 7644 0128 2021 movs r1, #32 + 7645 012a 3000 movs r0, r6 + 7646 012c FFF7FEFF bl I2C_WaitOnFlagUntilTimeout + 7647 .LVL532: +3231:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { + 7648 .loc 1 3231 12 discriminator 1 view .LVU2515 + 7649 0130 0028 cmp r0, #0 + 7650 0132 21D1 bne .L449 +3237:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 7651 .loc 1 3237 9 is_stmt 1 view .LVU2516 + 7652 0134 3268 ldr r2, [r6] + 7653 0136 2023 movs r3, #32 + 7654 0138 D361 str r3, [r2, #28] +3240:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 7655 .loc 1 3240 9 view .LVU2517 +3240:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 7656 .loc 1 3240 21 is_stmt 0 view .LVU2518 + 7657 013a 4122 movs r2, #65 + 7658 013c B354 strb r3, [r6, r2] +3243:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 7659 .loc 1 3243 9 is_stmt 1 view .LVU2519 +3243:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 7660 .loc 1 3243 9 view .LVU2520 + 7661 013e 2033 adds r3, r3, #32 + 7662 0140 0022 movs r2, #0 + 7663 0142 F254 strb r2, [r6, r3] +3243:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 7664 .loc 1 3243 9 view .LVU2521 +3245:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } + ARM GAS /tmp/ccuRhBPx.s page 304 + + + 7665 .loc 1 3245 9 view .LVU2522 +3245:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } + 7666 .loc 1 3245 16 is_stmt 0 view .LVU2523 + 7667 0144 C1E7 b .L436 + 7668 .L456: +3266:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 7669 .loc 1 3266 9 is_stmt 1 view .LVU2524 +3266:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 7670 .loc 1 3266 13 is_stmt 0 view .LVU2525 + 7671 0146 3268 ldr r2, [r6] +3266:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 7672 .loc 1 3266 23 view .LVU2526 + 7673 0148 5168 ldr r1, [r2, #4] +3266:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 7674 .loc 1 3266 29 view .LVU2527 + 7675 014a 8023 movs r3, #128 + 7676 014c DB01 lsls r3, r3, #7 + 7677 014e 0B43 orrs r3, r1 + 7678 0150 5360 str r3, [r2, #4] +3269:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { + 7679 .loc 1 3269 9 is_stmt 1 view .LVU2528 +3269:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { + 7680 .loc 1 3269 13 is_stmt 0 view .LVU2529 + 7681 0152 0097 str r7, [sp] + 7682 0154 2B00 movs r3, r5 + 7683 0156 0022 movs r2, #0 + 7684 0158 2021 movs r1, #32 + 7685 015a 3000 movs r0, r6 + 7686 015c FFF7FEFF bl I2C_WaitOnFlagUntilTimeout + 7687 .LVL533: +3269:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { + 7688 .loc 1 3269 12 discriminator 1 view .LVU2530 + 7689 0160 0028 cmp r0, #0 + 7690 0162 0DD1 bne .L451 +3275:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } + 7691 .loc 1 3275 9 is_stmt 1 view .LVU2531 + 7692 0164 3368 ldr r3, [r6] + 7693 0166 2022 movs r2, #32 + 7694 0168 DA61 str r2, [r3, #28] + 7695 016a C9E7 b .L444 + 7696 .LVL534: + 7697 .L446: +3295:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } + 7698 .loc 1 3295 12 is_stmt 0 view .LVU2532 + 7699 016c 0220 movs r0, #2 + 7700 .LVL535: +3295:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } + 7701 .loc 1 3295 12 view .LVU2533 + 7702 016e ACE7 b .L436 + 7703 .LVL536: + 7704 .L447: +3183:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } + 7705 .loc 1 3183 14 view .LVU2534 + 7706 0170 0220 movs r0, #2 + 7707 .LVL537: +3183:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } + 7708 .loc 1 3183 14 view .LVU2535 + ARM GAS /tmp/ccuRhBPx.s page 305 + + + 7709 0172 AAE7 b .L436 + 7710 .LVL538: + 7711 .L448: +3187:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 7712 .loc 1 3187 5 discriminator 1 view .LVU2536 + 7713 0174 0220 movs r0, #2 + 7714 .LVL539: +3187:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 7715 .loc 1 3187 5 discriminator 1 view .LVU2537 + 7716 0176 A8E7 b .L436 + 7717 .LVL540: + 7718 .L449: +3233:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } + 7719 .loc 1 3233 18 view .LVU2538 + 7720 0178 0120 movs r0, #1 + 7721 017a A6E7 b .L436 + 7722 .L450: +3252:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } + 7723 .loc 1 3252 18 view .LVU2539 + 7724 017c 0120 movs r0, #1 + 7725 017e A4E7 b .L436 + 7726 .L451: +3271:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } + 7727 .loc 1 3271 18 view .LVU2540 + 7728 0180 0120 movs r0, #1 + 7729 0182 A2E7 b .L436 + 7730 .L458: + 7731 .align 2 + 7732 .L457: + 7733 0184 00280002 .word 33564672 + 7734 0188 00200002 .word 33562624 + 7735 .cfi_endproc + 7736 .LFE62: + 7738 .section .text.HAL_I2C_Master_Seq_Transmit_IT,"ax",%progbits + 7739 .align 1 + 7740 .global HAL_I2C_Master_Seq_Transmit_IT + 7741 .syntax unified + 7742 .code 16 + 7743 .thumb_func + 7745 HAL_I2C_Master_Seq_Transmit_IT: + 7746 .LVL541: + 7747 .LFB63: +3313:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** uint32_t xfermode; + 7748 .loc 1 3313 1 is_stmt 1 view -0 + 7749 .cfi_startproc + 7750 @ args = 4, pretend = 0, frame = 0 + 7751 @ frame_needed = 0, uses_anonymous_args = 0 +3313:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** uint32_t xfermode; + 7752 .loc 1 3313 1 is_stmt 0 view .LVU2542 + 7753 0000 70B5 push {r4, r5, r6, lr} + 7754 .cfi_def_cfa_offset 16 + 7755 .cfi_offset 4, -16 + 7756 .cfi_offset 5, -12 + 7757 .cfi_offset 6, -8 + 7758 .cfi_offset 14, -4 + 7759 0002 82B0 sub sp, sp, #8 + 7760 .cfi_def_cfa_offset 24 + ARM GAS /tmp/ccuRhBPx.s page 306 + + + 7761 0004 0400 movs r4, r0 + 7762 0006 0D00 movs r5, r1 +3314:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** uint32_t xferrequest = I2C_GENERATE_START_WRITE; + 7763 .loc 1 3314 3 is_stmt 1 view .LVU2543 +3315:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 7764 .loc 1 3315 3 view .LVU2544 + 7765 .LVL542: +3318:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 7766 .loc 1 3318 3 view .LVU2545 +3320:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { + 7767 .loc 1 3320 3 view .LVU2546 +3320:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { + 7768 .loc 1 3320 11 is_stmt 0 view .LVU2547 + 7769 0008 4121 movs r1, #65 + 7770 .LVL543: +3320:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { + 7771 .loc 1 3320 11 view .LVU2548 + 7772 000a 415C ldrb r1, [r0, r1] +3320:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { + 7773 .loc 1 3320 6 view .LVU2549 + 7774 000c 2029 cmp r1, #32 + 7775 000e 4AD1 bne .L465 +3323:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 7776 .loc 1 3323 5 is_stmt 1 view .LVU2550 +3323:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 7777 .loc 1 3323 5 view .LVU2551 + 7778 0010 2031 adds r1, r1, #32 + 7779 0012 415C ldrb r1, [r0, r1] + 7780 0014 0129 cmp r1, #1 + 7781 0016 48D0 beq .L466 +3323:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 7782 .loc 1 3323 5 discriminator 2 view .LVU2552 + 7783 0018 4021 movs r1, #64 + 7784 001a 0120 movs r0, #1 + 7785 .LVL544: +3323:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 7786 .loc 1 3323 5 is_stmt 0 discriminator 2 view .LVU2553 + 7787 001c 6054 strb r0, [r4, r1] +3323:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 7788 .loc 1 3323 5 is_stmt 1 discriminator 2 view .LVU2554 +3325:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->Mode = HAL_I2C_MODE_MASTER; + 7789 .loc 1 3325 5 view .LVU2555 +3325:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->Mode = HAL_I2C_MODE_MASTER; + 7790 .loc 1 3325 21 is_stmt 0 view .LVU2556 + 7791 001e 0131 adds r1, r1, #1 + 7792 0020 2030 adds r0, r0, #32 + 7793 0022 6054 strb r0, [r4, r1] +3326:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->ErrorCode = HAL_I2C_ERROR_NONE; + 7794 .loc 1 3326 5 is_stmt 1 view .LVU2557 +3326:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->ErrorCode = HAL_I2C_ERROR_NONE; + 7795 .loc 1 3326 21 is_stmt 0 view .LVU2558 + 7796 0024 0131 adds r1, r1, #1 + 7797 0026 1138 subs r0, r0, #17 + 7798 0028 6054 strb r0, [r4, r1] +3327:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 7799 .loc 1 3327 5 is_stmt 1 view .LVU2559 +3327:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + ARM GAS /tmp/ccuRhBPx.s page 307 + + + 7800 .loc 1 3327 21 is_stmt 0 view .LVU2560 + 7801 002a 0021 movs r1, #0 + 7802 002c 6164 str r1, [r4, #68] +3330:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->XferCount = Size; + 7803 .loc 1 3330 5 is_stmt 1 view .LVU2561 +3330:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->XferCount = Size; + 7804 .loc 1 3330 23 is_stmt 0 view .LVU2562 + 7805 002e 6262 str r2, [r4, #36] +3331:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->XferOptions = XferOptions; + 7806 .loc 1 3331 5 is_stmt 1 view .LVU2563 +3331:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->XferOptions = XferOptions; + 7807 .loc 1 3331 23 is_stmt 0 view .LVU2564 + 7808 0030 6385 strh r3, [r4, #42] +3332:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->XferISR = I2C_Master_ISR_IT; + 7809 .loc 1 3332 5 is_stmt 1 view .LVU2565 +3332:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->XferISR = I2C_Master_ISR_IT; + 7810 .loc 1 3332 23 is_stmt 0 view .LVU2566 + 7811 0032 069B ldr r3, [sp, #24] + 7812 .LVL545: +3332:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->XferISR = I2C_Master_ISR_IT; + 7813 .loc 1 3332 23 view .LVU2567 + 7814 0034 E362 str r3, [r4, #44] + 7815 .LVL546: +3333:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 7816 .loc 1 3333 5 is_stmt 1 view .LVU2568 +3333:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 7817 .loc 1 3333 23 is_stmt 0 view .LVU2569 + 7818 0036 1E4B ldr r3, .L469 + 7819 0038 6363 str r3, [r4, #52] +3336:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { + 7820 .loc 1 3336 5 is_stmt 1 view .LVU2570 +3336:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { + 7821 .loc 1 3336 13 is_stmt 0 view .LVU2571 + 7822 003a 638D ldrh r3, [r4, #42] + 7823 003c 9BB2 uxth r3, r3 +3336:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { + 7824 .loc 1 3336 8 view .LVU2572 + 7825 003e FF2B cmp r3, #255 + 7826 0040 10D9 bls .L461 +3338:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** xfermode = I2C_RELOAD_MODE; + 7827 .loc 1 3338 7 is_stmt 1 view .LVU2573 +3338:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** xfermode = I2C_RELOAD_MODE; + 7828 .loc 1 3338 22 is_stmt 0 view .LVU2574 + 7829 0042 FF23 movs r3, #255 + 7830 0044 2385 strh r3, [r4, #40] +3339:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } + 7831 .loc 1 3339 7 is_stmt 1 view .LVU2575 + 7832 .LVL547: +3339:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } + 7833 .loc 1 3339 16 is_stmt 0 view .LVU2576 + 7834 0046 8026 movs r6, #128 + 7835 0048 7604 lsls r6, r6, #17 + 7836 .LVL548: + 7837 .L462: +3350:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** (IS_I2C_TRANSFER_OTHER_OPTIONS_REQUEST(XferOptions) == 0)) + 7838 .loc 1 3350 5 is_stmt 1 view .LVU2577 +3350:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** (IS_I2C_TRANSFER_OTHER_OPTIONS_REQUEST(XferOptions) == 0)) + ARM GAS /tmp/ccuRhBPx.s page 308 + + + 7839 .loc 1 3350 14 is_stmt 0 view .LVU2578 + 7840 004a 236B ldr r3, [r4, #48] +3350:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** (IS_I2C_TRANSFER_OTHER_OPTIONS_REQUEST(XferOptions) == 0)) + 7841 .loc 1 3350 8 view .LVU2579 + 7842 004c 112B cmp r3, #17 + 7843 004e 0DD1 bne .L463 +3351:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { + 7844 .loc 1 3351 10 view .LVU2580 + 7845 0050 069B ldr r3, [sp, #24] + 7846 0052 AA2B cmp r3, #170 + 7847 0054 0AD0 beq .L463 +3351:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { + 7848 .loc 1 3351 10 discriminator 2 view .LVU2581 + 7849 0056 AA23 movs r3, #170 + 7850 0058 1B02 lsls r3, r3, #8 + 7851 005a 069A ldr r2, [sp, #24] + 7852 .LVL549: +3351:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { + 7853 .loc 1 3351 10 discriminator 2 view .LVU2582 + 7854 005c 9A42 cmp r2, r3 + 7855 005e 05D0 beq .L463 +3353:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } + 7856 .loc 1 3353 19 view .LVU2583 + 7857 0060 0023 movs r3, #0 + 7858 0062 0CE0 b .L464 + 7859 .LVL550: + 7860 .L461: +3343:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** xfermode = hi2c->XferOptions; + 7861 .loc 1 3343 7 is_stmt 1 view .LVU2584 +3343:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** xfermode = hi2c->XferOptions; + 7862 .loc 1 3343 28 is_stmt 0 view .LVU2585 + 7863 0064 638D ldrh r3, [r4, #42] +3343:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** xfermode = hi2c->XferOptions; + 7864 .loc 1 3343 22 view .LVU2586 + 7865 0066 2385 strh r3, [r4, #40] +3344:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } + 7866 .loc 1 3344 7 is_stmt 1 view .LVU2587 +3344:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } + 7867 .loc 1 3344 16 is_stmt 0 view .LVU2588 + 7868 0068 E66A ldr r6, [r4, #44] + 7869 .LVL551: +3344:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } + 7870 .loc 1 3344 16 view .LVU2589 + 7871 006a EEE7 b .L462 + 7872 .LVL552: + 7873 .L463: +3358:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 7874 .loc 1 3358 7 is_stmt 1 view .LVU2590 + 7875 006c 2000 movs r0, r4 + 7876 006e FFF7FEFF bl I2C_ConvertOtherXferOptions + 7877 .LVL553: +3361:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { + 7878 .loc 1 3361 7 view .LVU2591 +3361:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { + 7879 .loc 1 3361 15 is_stmt 0 view .LVU2592 + 7880 0072 638D ldrh r3, [r4, #42] + 7881 0074 9BB2 uxth r3, r3 + ARM GAS /tmp/ccuRhBPx.s page 309 + + +3361:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { + 7882 .loc 1 3361 10 view .LVU2593 + 7883 0076 FF2B cmp r3, #255 + 7884 0078 13D8 bhi .L468 +3363:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } + 7885 .loc 1 3363 9 is_stmt 1 view .LVU2594 +3363:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } + 7886 .loc 1 3363 18 is_stmt 0 view .LVU2595 + 7887 007a E66A ldr r6, [r4, #44] + 7888 .LVL554: +3315:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 7889 .loc 1 3315 12 view .LVU2596 + 7890 007c 0D4B ldr r3, .L469+4 + 7891 .L464: + 7892 .LVL555: +3368:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 7893 .loc 1 3368 5 is_stmt 1 view .LVU2597 +3368:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 7894 .loc 1 3368 55 is_stmt 0 view .LVU2598 + 7895 007e 228D ldrh r2, [r4, #40] +3368:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 7896 .loc 1 3368 5 view .LVU2599 + 7897 0080 D2B2 uxtb r2, r2 + 7898 0082 0093 str r3, [sp] + 7899 0084 3300 movs r3, r6 + 7900 .LVL556: +3368:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 7901 .loc 1 3368 5 view .LVU2600 + 7902 0086 2900 movs r1, r5 + 7903 0088 2000 movs r0, r4 + 7904 008a FFF7FEFF bl I2C_TransferConfig + 7905 .LVL557: +3371:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 7906 .loc 1 3371 5 is_stmt 1 view .LVU2601 +3371:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 7907 .loc 1 3371 5 view .LVU2602 + 7908 008e 4023 movs r3, #64 + 7909 0090 0022 movs r2, #0 + 7910 0092 E254 strb r2, [r4, r3] +3371:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 7911 .loc 1 3371 5 view .LVU2603 +3380:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 7912 .loc 1 3380 5 view .LVU2604 + 7913 0094 0121 movs r1, #1 + 7914 0096 2000 movs r0, r4 + 7915 0098 FFF7FEFF bl I2C_Enable_IRQ + 7916 .LVL558: +3382:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } + 7917 .loc 1 3382 5 view .LVU2605 +3382:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } + 7918 .loc 1 3382 12 is_stmt 0 view .LVU2606 + 7919 009c 0020 movs r0, #0 + 7920 .LVL559: + 7921 .L460: +3388:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 7922 .loc 1 3388 1 view .LVU2607 + 7923 009e 02B0 add sp, sp, #8 + ARM GAS /tmp/ccuRhBPx.s page 310 + + + 7924 @ sp needed + 7925 .LVL560: + 7926 .LVL561: +3388:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 7927 .loc 1 3388 1 view .LVU2608 + 7928 00a0 70BD pop {r4, r5, r6, pc} + 7929 .LVL562: + 7930 .L468: +3315:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 7931 .loc 1 3315 12 view .LVU2609 + 7932 00a2 044B ldr r3, .L469+4 + 7933 00a4 EBE7 b .L464 + 7934 .LVL563: + 7935 .L465: +3386:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } + 7936 .loc 1 3386 12 view .LVU2610 + 7937 00a6 0220 movs r0, #2 + 7938 .LVL564: +3386:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } + 7939 .loc 1 3386 12 view .LVU2611 + 7940 00a8 F9E7 b .L460 + 7941 .LVL565: + 7942 .L466: +3323:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 7943 .loc 1 3323 5 discriminator 1 view .LVU2612 + 7944 00aa 0220 movs r0, #2 + 7945 .LVL566: +3323:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 7946 .loc 1 3323 5 discriminator 1 view .LVU2613 + 7947 00ac F7E7 b .L460 + 7948 .L470: + 7949 00ae C046 .align 2 + 7950 .L469: + 7951 00b0 00000000 .word I2C_Master_ISR_IT + 7952 00b4 00200080 .word -2147475456 + 7953 .cfi_endproc + 7954 .LFE63: + 7956 .section .text.HAL_I2C_Master_Seq_Transmit_DMA,"ax",%progbits + 7957 .align 1 + 7958 .global HAL_I2C_Master_Seq_Transmit_DMA + 7959 .syntax unified + 7960 .code 16 + 7961 .thumb_func + 7963 HAL_I2C_Master_Seq_Transmit_DMA: + 7964 .LVL567: + 7965 .LFB64: +3404:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** uint32_t xfermode; + 7966 .loc 1 3404 1 is_stmt 1 view -0 + 7967 .cfi_startproc + 7968 @ args = 4, pretend = 0, frame = 8 + 7969 @ frame_needed = 0, uses_anonymous_args = 0 +3404:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** uint32_t xfermode; + 7970 .loc 1 3404 1 is_stmt 0 view .LVU2615 + 7971 0000 F0B5 push {r4, r5, r6, r7, lr} + 7972 .cfi_def_cfa_offset 20 + 7973 .cfi_offset 4, -20 + 7974 .cfi_offset 5, -16 + ARM GAS /tmp/ccuRhBPx.s page 311 + + + 7975 .cfi_offset 6, -12 + 7976 .cfi_offset 7, -8 + 7977 .cfi_offset 14, -4 + 7978 0002 85B0 sub sp, sp, #20 + 7979 .cfi_def_cfa_offset 40 + 7980 0004 0400 movs r4, r0 + 7981 0006 0391 str r1, [sp, #12] + 7982 0008 1500 movs r5, r2 +3405:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** uint32_t xferrequest = I2C_GENERATE_START_WRITE; + 7983 .loc 1 3405 3 is_stmt 1 view .LVU2616 +3406:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** HAL_StatusTypeDef dmaxferstatus; + 7984 .loc 1 3406 3 view .LVU2617 + 7985 .LVL568: +3407:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 7986 .loc 1 3407 3 view .LVU2618 +3410:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 7987 .loc 1 3410 3 view .LVU2619 +3412:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { + 7988 .loc 1 3412 3 view .LVU2620 +3412:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { + 7989 .loc 1 3412 11 is_stmt 0 view .LVU2621 + 7990 000a 4122 movs r2, #65 + 7991 .LVL569: +3412:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { + 7992 .loc 1 3412 11 view .LVU2622 + 7993 000c 825C ldrb r2, [r0, r2] +3412:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { + 7994 .loc 1 3412 6 view .LVU2623 + 7995 000e 202A cmp r2, #32 + 7996 0010 00D0 beq .LCB7600 + 7997 0012 9DE0 b .L482 @long jump + 7998 .LCB7600: +3415:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 7999 .loc 1 3415 5 is_stmt 1 view .LVU2624 +3415:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 8000 .loc 1 3415 5 view .LVU2625 + 8001 0014 2032 adds r2, r2, #32 + 8002 0016 825C ldrb r2, [r0, r2] + 8003 0018 012A cmp r2, #1 + 8004 001a 00D1 bne .LCB7606 + 8005 001c 9BE0 b .L483 @long jump + 8006 .LCB7606: +3415:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 8007 .loc 1 3415 5 discriminator 2 view .LVU2626 + 8008 001e 4022 movs r2, #64 + 8009 0020 0121 movs r1, #1 + 8010 .LVL570: +3415:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 8011 .loc 1 3415 5 is_stmt 0 discriminator 2 view .LVU2627 + 8012 0022 8154 strb r1, [r0, r2] +3415:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 8013 .loc 1 3415 5 is_stmt 1 discriminator 2 view .LVU2628 +3417:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->Mode = HAL_I2C_MODE_MASTER; + 8014 .loc 1 3417 5 view .LVU2629 +3417:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->Mode = HAL_I2C_MODE_MASTER; + 8015 .loc 1 3417 21 is_stmt 0 view .LVU2630 + 8016 0024 0132 adds r2, r2, #1 + ARM GAS /tmp/ccuRhBPx.s page 312 + + + 8017 0026 2031 adds r1, r1, #32 + 8018 0028 8154 strb r1, [r0, r2] +3418:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->ErrorCode = HAL_I2C_ERROR_NONE; + 8019 .loc 1 3418 5 is_stmt 1 view .LVU2631 +3418:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->ErrorCode = HAL_I2C_ERROR_NONE; + 8020 .loc 1 3418 21 is_stmt 0 view .LVU2632 + 8021 002a 0132 adds r2, r2, #1 + 8022 002c 1139 subs r1, r1, #17 + 8023 002e 8154 strb r1, [r0, r2] +3419:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 8024 .loc 1 3419 5 is_stmt 1 view .LVU2633 +3419:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 8025 .loc 1 3419 21 is_stmt 0 view .LVU2634 + 8026 0030 0022 movs r2, #0 + 8027 0032 4264 str r2, [r0, #68] +3422:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->XferCount = Size; + 8028 .loc 1 3422 5 is_stmt 1 view .LVU2635 +3422:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->XferCount = Size; + 8029 .loc 1 3422 23 is_stmt 0 view .LVU2636 + 8030 0034 4562 str r5, [r0, #36] +3423:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->XferOptions = XferOptions; + 8031 .loc 1 3423 5 is_stmt 1 view .LVU2637 +3423:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->XferOptions = XferOptions; + 8032 .loc 1 3423 23 is_stmt 0 view .LVU2638 + 8033 0036 4385 strh r3, [r0, #42] +3424:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->XferISR = I2C_Master_ISR_DMA; + 8034 .loc 1 3424 5 is_stmt 1 view .LVU2639 +3424:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->XferISR = I2C_Master_ISR_DMA; + 8035 .loc 1 3424 23 is_stmt 0 view .LVU2640 + 8036 0038 0A9B ldr r3, [sp, #40] + 8037 .LVL571: +3424:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->XferISR = I2C_Master_ISR_DMA; + 8038 .loc 1 3424 23 view .LVU2641 + 8039 003a C362 str r3, [r0, #44] + 8040 .LVL572: +3425:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 8041 .loc 1 3425 5 is_stmt 1 view .LVU2642 +3425:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 8042 .loc 1 3425 23 is_stmt 0 view .LVU2643 + 8043 003c 474B ldr r3, .L488 + 8044 003e 4363 str r3, [r0, #52] +3428:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { + 8045 .loc 1 3428 5 is_stmt 1 view .LVU2644 +3428:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { + 8046 .loc 1 3428 13 is_stmt 0 view .LVU2645 + 8047 0040 438D ldrh r3, [r0, #42] + 8048 0042 9BB2 uxth r3, r3 +3428:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { + 8049 .loc 1 3428 8 view .LVU2646 + 8050 0044 FF2B cmp r3, #255 + 8051 0046 10D9 bls .L473 +3430:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** xfermode = I2C_RELOAD_MODE; + 8052 .loc 1 3430 7 is_stmt 1 view .LVU2647 +3430:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** xfermode = I2C_RELOAD_MODE; + 8053 .loc 1 3430 22 is_stmt 0 view .LVU2648 + 8054 0048 FF23 movs r3, #255 + 8055 004a 0385 strh r3, [r0, #40] + ARM GAS /tmp/ccuRhBPx.s page 313 + + +3431:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } + 8056 .loc 1 3431 7 is_stmt 1 view .LVU2649 + 8057 .LVL573: +3431:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } + 8058 .loc 1 3431 16 is_stmt 0 view .LVU2650 + 8059 004c 8027 movs r7, #128 + 8060 004e 7F04 lsls r7, r7, #17 + 8061 .LVL574: + 8062 .L474: +3442:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** (IS_I2C_TRANSFER_OTHER_OPTIONS_REQUEST(XferOptions) == 0)) + 8063 .loc 1 3442 5 is_stmt 1 view .LVU2651 +3442:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** (IS_I2C_TRANSFER_OTHER_OPTIONS_REQUEST(XferOptions) == 0)) + 8064 .loc 1 3442 14 is_stmt 0 view .LVU2652 + 8065 0050 236B ldr r3, [r4, #48] +3442:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** (IS_I2C_TRANSFER_OTHER_OPTIONS_REQUEST(XferOptions) == 0)) + 8066 .loc 1 3442 8 view .LVU2653 + 8067 0052 112B cmp r3, #17 + 8068 0054 0DD1 bne .L475 +3443:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { + 8069 .loc 1 3443 10 view .LVU2654 + 8070 0056 0A9B ldr r3, [sp, #40] + 8071 0058 AA2B cmp r3, #170 + 8072 005a 0AD0 beq .L475 +3443:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { + 8073 .loc 1 3443 10 discriminator 2 view .LVU2655 + 8074 005c AA23 movs r3, #170 + 8075 005e 1B02 lsls r3, r3, #8 + 8076 0060 0A9A ldr r2, [sp, #40] + 8077 0062 9A42 cmp r2, r3 + 8078 0064 05D0 beq .L475 +3445:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } + 8079 .loc 1 3445 19 view .LVU2656 + 8080 0066 0026 movs r6, #0 + 8081 0068 0CE0 b .L476 + 8082 .LVL575: + 8083 .L473: +3435:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** xfermode = hi2c->XferOptions; + 8084 .loc 1 3435 7 is_stmt 1 view .LVU2657 +3435:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** xfermode = hi2c->XferOptions; + 8085 .loc 1 3435 28 is_stmt 0 view .LVU2658 + 8086 006a 438D ldrh r3, [r0, #42] +3435:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** xfermode = hi2c->XferOptions; + 8087 .loc 1 3435 22 view .LVU2659 + 8088 006c 0385 strh r3, [r0, #40] +3436:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } + 8089 .loc 1 3436 7 is_stmt 1 view .LVU2660 +3436:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } + 8090 .loc 1 3436 16 is_stmt 0 view .LVU2661 + 8091 006e C76A ldr r7, [r0, #44] + 8092 .LVL576: +3436:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } + 8093 .loc 1 3436 16 view .LVU2662 + 8094 0070 EEE7 b .L474 + 8095 .L475: +3450:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 8096 .loc 1 3450 7 is_stmt 1 view .LVU2663 + 8097 0072 2000 movs r0, r4 + ARM GAS /tmp/ccuRhBPx.s page 314 + + + 8098 .LVL577: +3450:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 8099 .loc 1 3450 7 is_stmt 0 view .LVU2664 + 8100 0074 FFF7FEFF bl I2C_ConvertOtherXferOptions + 8101 .LVL578: +3453:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { + 8102 .loc 1 3453 7 is_stmt 1 view .LVU2665 +3453:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { + 8103 .loc 1 3453 15 is_stmt 0 view .LVU2666 + 8104 0078 638D ldrh r3, [r4, #42] + 8105 007a 9BB2 uxth r3, r3 +3453:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { + 8106 .loc 1 3453 10 view .LVU2667 + 8107 007c FF2B cmp r3, #255 + 8108 007e 28D8 bhi .L485 +3455:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } + 8109 .loc 1 3455 9 is_stmt 1 view .LVU2668 +3455:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } + 8110 .loc 1 3455 18 is_stmt 0 view .LVU2669 + 8111 0080 E76A ldr r7, [r4, #44] + 8112 .LVL579: +3406:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** HAL_StatusTypeDef dmaxferstatus; + 8113 .loc 1 3406 12 view .LVU2670 + 8114 0082 374E ldr r6, .L488+4 + 8115 .L476: + 8116 .LVL580: +3459:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { + 8117 .loc 1 3459 5 is_stmt 1 view .LVU2671 +3459:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { + 8118 .loc 1 3459 13 is_stmt 0 view .LVU2672 + 8119 0084 228D ldrh r2, [r4, #40] +3459:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { + 8120 .loc 1 3459 8 view .LVU2673 + 8121 0086 002A cmp r2, #0 + 8122 0088 4ED0 beq .L477 +3461:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { + 8123 .loc 1 3461 7 is_stmt 1 view .LVU2674 +3461:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { + 8124 .loc 1 3461 15 is_stmt 0 view .LVU2675 + 8125 008a A36B ldr r3, [r4, #56] +3461:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { + 8126 .loc 1 3461 10 view .LVU2676 + 8127 008c 002B cmp r3, #0 + 8128 008e 22D0 beq .L478 +3464:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 8129 .loc 1 3464 9 is_stmt 1 view .LVU2677 +3464:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 8130 .loc 1 3464 40 is_stmt 0 view .LVU2678 + 8131 0090 344A ldr r2, .L488+8 + 8132 0092 9A62 str r2, [r3, #40] +3467:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 8133 .loc 1 3467 9 is_stmt 1 view .LVU2679 +3467:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 8134 .loc 1 3467 13 is_stmt 0 view .LVU2680 + 8135 0094 A36B ldr r3, [r4, #56] +3467:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 8136 .loc 1 3467 41 view .LVU2681 + ARM GAS /tmp/ccuRhBPx.s page 315 + + + 8137 0096 344A ldr r2, .L488+12 + 8138 0098 1A63 str r2, [r3, #48] +3470:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->hdmatx->XferAbortCallback = NULL; + 8139 .loc 1 3470 9 is_stmt 1 view .LVU2682 +3470:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->hdmatx->XferAbortCallback = NULL; + 8140 .loc 1 3470 13 is_stmt 0 view .LVU2683 + 8141 009a A26B ldr r2, [r4, #56] +3470:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->hdmatx->XferAbortCallback = NULL; + 8142 .loc 1 3470 44 view .LVU2684 + 8143 009c 0023 movs r3, #0 + 8144 009e D362 str r3, [r2, #44] +3471:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 8145 .loc 1 3471 9 is_stmt 1 view .LVU2685 +3471:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 8146 .loc 1 3471 13 is_stmt 0 view .LVU2686 + 8147 00a0 A26B ldr r2, [r4, #56] +3471:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 8148 .loc 1 3471 41 view .LVU2687 + 8149 00a2 5363 str r3, [r2, #52] +3474:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->XferSize); + 8150 .loc 1 3474 9 is_stmt 1 view .LVU2688 +3474:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->XferSize); + 8151 .loc 1 3474 88 is_stmt 0 view .LVU2689 + 8152 00a4 2268 ldr r2, [r4] +3474:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->XferSize); + 8153 .loc 1 3474 83 view .LVU2690 + 8154 00a6 2832 adds r2, r2, #40 +3475:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } + 8155 .loc 1 3475 46 view .LVU2691 + 8156 00a8 238D ldrh r3, [r4, #40] +3474:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->XferSize); + 8157 .loc 1 3474 25 view .LVU2692 + 8158 00aa A06B ldr r0, [r4, #56] + 8159 00ac 2900 movs r1, r5 + 8160 00ae FFF7FEFF bl HAL_DMA_Start_IT + 8161 .LVL581: +3492:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { + 8162 .loc 1 3492 7 is_stmt 1 view .LVU2693 +3492:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { + 8163 .loc 1 3492 10 is_stmt 0 view .LVU2694 + 8164 00b2 0028 cmp r0, #0 + 8165 00b4 1DD0 beq .L487 +3515:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->Mode = HAL_I2C_MODE_NONE; + 8166 .loc 1 3515 9 is_stmt 1 view .LVU2695 +3515:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->Mode = HAL_I2C_MODE_NONE; + 8167 .loc 1 3515 25 is_stmt 0 view .LVU2696 + 8168 00b6 4123 movs r3, #65 + 8169 00b8 2022 movs r2, #32 + 8170 00ba E254 strb r2, [r4, r3] +3516:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 8171 .loc 1 3516 9 is_stmt 1 view .LVU2697 +3516:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 8172 .loc 1 3516 25 is_stmt 0 view .LVU2698 + 8173 00bc 0022 movs r2, #0 + 8174 00be 0133 adds r3, r3, #1 + 8175 00c0 E254 strb r2, [r4, r3] +3519:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + ARM GAS /tmp/ccuRhBPx.s page 316 + + + 8176 .loc 1 3519 9 is_stmt 1 view .LVU2699 +3519:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 8177 .loc 1 3519 13 is_stmt 0 view .LVU2700 + 8178 00c2 636C ldr r3, [r4, #68] +3519:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 8179 .loc 1 3519 25 view .LVU2701 + 8180 00c4 1021 movs r1, #16 + 8181 00c6 0B43 orrs r3, r1 + 8182 00c8 6364 str r3, [r4, #68] +3522:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 8183 .loc 1 3522 9 is_stmt 1 view .LVU2702 +3522:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 8184 .loc 1 3522 9 view .LVU2703 + 8185 00ca 4023 movs r3, #64 + 8186 00cc E254 strb r2, [r4, r3] +3522:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 8187 .loc 1 3522 9 view .LVU2704 +3524:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } + 8188 .loc 1 3524 9 view .LVU2705 +3524:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } + 8189 .loc 1 3524 16 is_stmt 0 view .LVU2706 + 8190 00ce 0120 movs r0, #1 + 8191 .LVL582: +3524:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } + 8192 .loc 1 3524 16 view .LVU2707 + 8193 00d0 3FE0 b .L472 + 8194 .LVL583: + 8195 .L485: +3406:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** HAL_StatusTypeDef dmaxferstatus; + 8196 .loc 1 3406 12 view .LVU2708 + 8197 00d2 234E ldr r6, .L488+4 + 8198 00d4 D6E7 b .L476 + 8199 .LVL584: + 8200 .L478: +3480:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->Mode = HAL_I2C_MODE_NONE; + 8201 .loc 1 3480 9 is_stmt 1 view .LVU2709 +3480:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->Mode = HAL_I2C_MODE_NONE; + 8202 .loc 1 3480 25 is_stmt 0 view .LVU2710 + 8203 00d6 4123 movs r3, #65 + 8204 00d8 2022 movs r2, #32 + 8205 00da E254 strb r2, [r4, r3] +3481:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 8206 .loc 1 3481 9 is_stmt 1 view .LVU2711 +3481:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 8207 .loc 1 3481 25 is_stmt 0 view .LVU2712 + 8208 00dc 0022 movs r2, #0 + 8209 00de 0133 adds r3, r3, #1 + 8210 00e0 E254 strb r2, [r4, r3] +3484:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 8211 .loc 1 3484 9 is_stmt 1 view .LVU2713 +3484:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 8212 .loc 1 3484 13 is_stmt 0 view .LVU2714 + 8213 00e2 636C ldr r3, [r4, #68] +3484:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 8214 .loc 1 3484 25 view .LVU2715 + 8215 00e4 8021 movs r1, #128 + 8216 00e6 0B43 orrs r3, r1 + ARM GAS /tmp/ccuRhBPx.s page 317 + + + 8217 00e8 6364 str r3, [r4, #68] +3487:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 8218 .loc 1 3487 9 is_stmt 1 view .LVU2716 +3487:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 8219 .loc 1 3487 9 view .LVU2717 + 8220 00ea 4023 movs r3, #64 + 8221 00ec E254 strb r2, [r4, r3] +3487:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 8222 .loc 1 3487 9 view .LVU2718 +3489:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } + 8223 .loc 1 3489 9 view .LVU2719 +3489:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } + 8224 .loc 1 3489 16 is_stmt 0 view .LVU2720 + 8225 00ee 0120 movs r0, #1 + 8226 00f0 2FE0 b .L472 + 8227 .LVL585: + 8228 .L487: +3495:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 8229 .loc 1 3495 9 is_stmt 1 view .LVU2721 +3495:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 8230 .loc 1 3495 59 is_stmt 0 view .LVU2722 + 8231 00f2 228D ldrh r2, [r4, #40] +3495:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 8232 .loc 1 3495 9 view .LVU2723 + 8233 00f4 D2B2 uxtb r2, r2 + 8234 00f6 0096 str r6, [sp] + 8235 00f8 3B00 movs r3, r7 + 8236 00fa 0399 ldr r1, [sp, #12] + 8237 00fc 2000 movs r0, r4 + 8238 .LVL586: +3495:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 8239 .loc 1 3495 9 view .LVU2724 + 8240 00fe FFF7FEFF bl I2C_TransferConfig + 8241 .LVL587: +3498:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 8242 .loc 1 3498 9 is_stmt 1 view .LVU2725 +3498:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 8243 .loc 1 3498 13 is_stmt 0 view .LVU2726 + 8244 0102 638D ldrh r3, [r4, #42] +3498:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 8245 .loc 1 3498 32 view .LVU2727 + 8246 0104 228D ldrh r2, [r4, #40] +3498:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 8247 .loc 1 3498 25 view .LVU2728 + 8248 0106 9B1A subs r3, r3, r2 + 8249 0108 9BB2 uxth r3, r3 + 8250 010a 6385 strh r3, [r4, #42] +3501:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 8251 .loc 1 3501 9 is_stmt 1 view .LVU2729 +3501:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 8252 .loc 1 3501 9 view .LVU2730 + 8253 010c 4023 movs r3, #64 + 8254 010e 0022 movs r2, #0 + 8255 0110 E254 strb r2, [r4, r3] +3501:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 8256 .loc 1 3501 9 view .LVU2731 +3507:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + ARM GAS /tmp/ccuRhBPx.s page 318 + + + 8257 .loc 1 3507 9 view .LVU2732 + 8258 0112 1021 movs r1, #16 + 8259 0114 2000 movs r0, r4 + 8260 0116 FFF7FEFF bl I2C_Enable_IRQ + 8261 .LVL588: +3510:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } + 8262 .loc 1 3510 9 view .LVU2733 +3510:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } + 8263 .loc 1 3510 13 is_stmt 0 view .LVU2734 + 8264 011a 2268 ldr r2, [r4] +3510:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } + 8265 .loc 1 3510 23 view .LVU2735 + 8266 011c 1168 ldr r1, [r2] +3510:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } + 8267 .loc 1 3510 29 view .LVU2736 + 8268 011e 8023 movs r3, #128 + 8269 0120 DB01 lsls r3, r3, #7 + 8270 0122 0B43 orrs r3, r1 + 8271 0124 1360 str r3, [r2] + 8272 0126 11E0 b .L481 + 8273 .LVL589: + 8274 .L477: +3530:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 8275 .loc 1 3530 7 is_stmt 1 view .LVU2737 +3530:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 8276 .loc 1 3530 21 is_stmt 0 view .LVU2738 + 8277 0128 104B ldr r3, .L488+16 + 8278 012a 6363 str r3, [r4, #52] +3534:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** I2C_GENERATE_START_WRITE); + 8279 .loc 1 3534 7 is_stmt 1 view .LVU2739 + 8280 012c 8023 movs r3, #128 + 8281 012e D2B2 uxtb r2, r2 + 8282 0130 0B49 ldr r1, .L488+4 + 8283 0132 0091 str r1, [sp] + 8284 0134 9B04 lsls r3, r3, #18 + 8285 0136 0399 ldr r1, [sp, #12] + 8286 0138 2000 movs r0, r4 + 8287 013a FFF7FEFF bl I2C_TransferConfig + 8288 .LVL590: +3538:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 8289 .loc 1 3538 7 view .LVU2740 +3538:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 8290 .loc 1 3538 7 view .LVU2741 + 8291 013e 4023 movs r3, #64 + 8292 0140 0022 movs r2, #0 + 8293 0142 E254 strb r2, [r4, r3] +3538:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 8294 .loc 1 3538 7 view .LVU2742 +3547:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } + 8295 .loc 1 3547 7 view .LVU2743 + 8296 0144 0121 movs r1, #1 + 8297 0146 2000 movs r0, r4 + 8298 0148 FFF7FEFF bl I2C_Enable_IRQ + 8299 .LVL591: + 8300 .L481: +3550:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } + 8301 .loc 1 3550 5 view .LVU2744 + ARM GAS /tmp/ccuRhBPx.s page 319 + + +3550:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } + 8302 .loc 1 3550 12 is_stmt 0 view .LVU2745 + 8303 014c 0020 movs r0, #0 + 8304 014e 00E0 b .L472 + 8305 .LVL592: + 8306 .L482: +3554:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } + 8307 .loc 1 3554 12 view .LVU2746 + 8308 0150 0220 movs r0, #2 + 8309 .LVL593: + 8310 .L472: +3556:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 8311 .loc 1 3556 1 view .LVU2747 + 8312 0152 05B0 add sp, sp, #20 + 8313 @ sp needed + 8314 .LVL594: + 8315 .LVL595: +3556:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 8316 .loc 1 3556 1 view .LVU2748 + 8317 0154 F0BD pop {r4, r5, r6, r7, pc} + 8318 .LVL596: + 8319 .L483: +3415:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 8320 .loc 1 3415 5 discriminator 1 view .LVU2749 + 8321 0156 0220 movs r0, #2 + 8322 .LVL597: +3415:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 8323 .loc 1 3415 5 discriminator 1 view .LVU2750 + 8324 0158 FBE7 b .L472 + 8325 .L489: + 8326 015a C046 .align 2 + 8327 .L488: + 8328 015c 00000000 .word I2C_Master_ISR_DMA + 8329 0160 00200080 .word -2147475456 + 8330 0164 00000000 .word I2C_DMAMasterTransmitCplt + 8331 0168 00000000 .word I2C_DMAError + 8332 016c 00000000 .word I2C_Master_ISR_IT + 8333 .cfi_endproc + 8334 .LFE64: + 8336 .section .text.HAL_I2C_Master_Seq_Receive_IT,"ax",%progbits + 8337 .align 1 + 8338 .global HAL_I2C_Master_Seq_Receive_IT + 8339 .syntax unified + 8340 .code 16 + 8341 .thumb_func + 8343 HAL_I2C_Master_Seq_Receive_IT: + 8344 .LVL598: + 8345 .LFB65: +3572:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** uint32_t xfermode; + 8346 .loc 1 3572 1 is_stmt 1 view -0 + 8347 .cfi_startproc + 8348 @ args = 4, pretend = 0, frame = 0 + 8349 @ frame_needed = 0, uses_anonymous_args = 0 +3572:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** uint32_t xfermode; + 8350 .loc 1 3572 1 is_stmt 0 view .LVU2752 + 8351 0000 70B5 push {r4, r5, r6, lr} + 8352 .cfi_def_cfa_offset 16 + ARM GAS /tmp/ccuRhBPx.s page 320 + + + 8353 .cfi_offset 4, -16 + 8354 .cfi_offset 5, -12 + 8355 .cfi_offset 6, -8 + 8356 .cfi_offset 14, -4 + 8357 0002 82B0 sub sp, sp, #8 + 8358 .cfi_def_cfa_offset 24 + 8359 0004 0400 movs r4, r0 + 8360 0006 0D00 movs r5, r1 +3573:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** uint32_t xferrequest = I2C_GENERATE_START_READ; + 8361 .loc 1 3573 3 is_stmt 1 view .LVU2753 +3574:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 8362 .loc 1 3574 3 view .LVU2754 + 8363 .LVL599: +3577:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 8364 .loc 1 3577 3 view .LVU2755 +3579:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { + 8365 .loc 1 3579 3 view .LVU2756 +3579:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { + 8366 .loc 1 3579 11 is_stmt 0 view .LVU2757 + 8367 0008 4121 movs r1, #65 + 8368 .LVL600: +3579:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { + 8369 .loc 1 3579 11 view .LVU2758 + 8370 000a 415C ldrb r1, [r0, r1] +3579:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { + 8371 .loc 1 3579 6 view .LVU2759 + 8372 000c 2029 cmp r1, #32 + 8373 000e 4AD1 bne .L496 +3582:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 8374 .loc 1 3582 5 is_stmt 1 view .LVU2760 +3582:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 8375 .loc 1 3582 5 view .LVU2761 + 8376 0010 2031 adds r1, r1, #32 + 8377 0012 415C ldrb r1, [r0, r1] + 8378 0014 0129 cmp r1, #1 + 8379 0016 48D0 beq .L497 +3582:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 8380 .loc 1 3582 5 discriminator 2 view .LVU2762 + 8381 0018 4021 movs r1, #64 + 8382 001a 0120 movs r0, #1 + 8383 .LVL601: +3582:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 8384 .loc 1 3582 5 is_stmt 0 discriminator 2 view .LVU2763 + 8385 001c 6054 strb r0, [r4, r1] +3582:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 8386 .loc 1 3582 5 is_stmt 1 discriminator 2 view .LVU2764 +3584:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->Mode = HAL_I2C_MODE_MASTER; + 8387 .loc 1 3584 5 view .LVU2765 +3584:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->Mode = HAL_I2C_MODE_MASTER; + 8388 .loc 1 3584 21 is_stmt 0 view .LVU2766 + 8389 001e 0131 adds r1, r1, #1 + 8390 0020 2130 adds r0, r0, #33 + 8391 0022 6054 strb r0, [r4, r1] +3585:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->ErrorCode = HAL_I2C_ERROR_NONE; + 8392 .loc 1 3585 5 is_stmt 1 view .LVU2767 +3585:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->ErrorCode = HAL_I2C_ERROR_NONE; + 8393 .loc 1 3585 21 is_stmt 0 view .LVU2768 + ARM GAS /tmp/ccuRhBPx.s page 321 + + + 8394 0024 0131 adds r1, r1, #1 + 8395 0026 1238 subs r0, r0, #18 + 8396 0028 6054 strb r0, [r4, r1] +3586:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 8397 .loc 1 3586 5 is_stmt 1 view .LVU2769 +3586:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 8398 .loc 1 3586 21 is_stmt 0 view .LVU2770 + 8399 002a 0021 movs r1, #0 + 8400 002c 6164 str r1, [r4, #68] +3589:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->XferCount = Size; + 8401 .loc 1 3589 5 is_stmt 1 view .LVU2771 +3589:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->XferCount = Size; + 8402 .loc 1 3589 23 is_stmt 0 view .LVU2772 + 8403 002e 6262 str r2, [r4, #36] +3590:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->XferOptions = XferOptions; + 8404 .loc 1 3590 5 is_stmt 1 view .LVU2773 +3590:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->XferOptions = XferOptions; + 8405 .loc 1 3590 23 is_stmt 0 view .LVU2774 + 8406 0030 6385 strh r3, [r4, #42] +3591:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->XferISR = I2C_Master_ISR_IT; + 8407 .loc 1 3591 5 is_stmt 1 view .LVU2775 +3591:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->XferISR = I2C_Master_ISR_IT; + 8408 .loc 1 3591 23 is_stmt 0 view .LVU2776 + 8409 0032 069B ldr r3, [sp, #24] + 8410 .LVL602: +3591:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->XferISR = I2C_Master_ISR_IT; + 8411 .loc 1 3591 23 view .LVU2777 + 8412 0034 E362 str r3, [r4, #44] + 8413 .LVL603: +3592:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 8414 .loc 1 3592 5 is_stmt 1 view .LVU2778 +3592:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 8415 .loc 1 3592 23 is_stmt 0 view .LVU2779 + 8416 0036 1E4B ldr r3, .L500 + 8417 0038 6363 str r3, [r4, #52] +3595:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { + 8418 .loc 1 3595 5 is_stmt 1 view .LVU2780 +3595:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { + 8419 .loc 1 3595 13 is_stmt 0 view .LVU2781 + 8420 003a 638D ldrh r3, [r4, #42] + 8421 003c 9BB2 uxth r3, r3 +3595:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { + 8422 .loc 1 3595 8 view .LVU2782 + 8423 003e FF2B cmp r3, #255 + 8424 0040 10D9 bls .L492 +3597:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** xfermode = I2C_RELOAD_MODE; + 8425 .loc 1 3597 7 is_stmt 1 view .LVU2783 +3597:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** xfermode = I2C_RELOAD_MODE; + 8426 .loc 1 3597 22 is_stmt 0 view .LVU2784 + 8427 0042 FF23 movs r3, #255 + 8428 0044 2385 strh r3, [r4, #40] +3598:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } + 8429 .loc 1 3598 7 is_stmt 1 view .LVU2785 + 8430 .LVL604: +3598:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } + 8431 .loc 1 3598 16 is_stmt 0 view .LVU2786 + 8432 0046 8026 movs r6, #128 + ARM GAS /tmp/ccuRhBPx.s page 322 + + + 8433 0048 7604 lsls r6, r6, #17 + 8434 .LVL605: + 8435 .L493: +3609:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** (IS_I2C_TRANSFER_OTHER_OPTIONS_REQUEST(XferOptions) == 0)) + 8436 .loc 1 3609 5 is_stmt 1 view .LVU2787 +3609:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** (IS_I2C_TRANSFER_OTHER_OPTIONS_REQUEST(XferOptions) == 0)) + 8437 .loc 1 3609 14 is_stmt 0 view .LVU2788 + 8438 004a 236B ldr r3, [r4, #48] +3609:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** (IS_I2C_TRANSFER_OTHER_OPTIONS_REQUEST(XferOptions) == 0)) + 8439 .loc 1 3609 8 view .LVU2789 + 8440 004c 122B cmp r3, #18 + 8441 004e 0DD1 bne .L494 +3610:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { + 8442 .loc 1 3610 10 view .LVU2790 + 8443 0050 069B ldr r3, [sp, #24] + 8444 0052 AA2B cmp r3, #170 + 8445 0054 0AD0 beq .L494 +3610:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { + 8446 .loc 1 3610 10 discriminator 2 view .LVU2791 + 8447 0056 AA23 movs r3, #170 + 8448 0058 1B02 lsls r3, r3, #8 + 8449 005a 069A ldr r2, [sp, #24] + 8450 .LVL606: +3610:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { + 8451 .loc 1 3610 10 discriminator 2 view .LVU2792 + 8452 005c 9A42 cmp r2, r3 + 8453 005e 05D0 beq .L494 +3612:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } + 8454 .loc 1 3612 19 view .LVU2793 + 8455 0060 0023 movs r3, #0 + 8456 0062 0CE0 b .L495 + 8457 .LVL607: + 8458 .L492: +3602:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** xfermode = hi2c->XferOptions; + 8459 .loc 1 3602 7 is_stmt 1 view .LVU2794 +3602:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** xfermode = hi2c->XferOptions; + 8460 .loc 1 3602 28 is_stmt 0 view .LVU2795 + 8461 0064 638D ldrh r3, [r4, #42] +3602:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** xfermode = hi2c->XferOptions; + 8462 .loc 1 3602 22 view .LVU2796 + 8463 0066 2385 strh r3, [r4, #40] +3603:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } + 8464 .loc 1 3603 7 is_stmt 1 view .LVU2797 +3603:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } + 8465 .loc 1 3603 16 is_stmt 0 view .LVU2798 + 8466 0068 E66A ldr r6, [r4, #44] + 8467 .LVL608: +3603:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } + 8468 .loc 1 3603 16 view .LVU2799 + 8469 006a EEE7 b .L493 + 8470 .LVL609: + 8471 .L494: +3617:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 8472 .loc 1 3617 7 is_stmt 1 view .LVU2800 + 8473 006c 2000 movs r0, r4 + 8474 006e FFF7FEFF bl I2C_ConvertOtherXferOptions + 8475 .LVL610: + ARM GAS /tmp/ccuRhBPx.s page 323 + + +3620:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { + 8476 .loc 1 3620 7 view .LVU2801 +3620:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { + 8477 .loc 1 3620 15 is_stmt 0 view .LVU2802 + 8478 0072 638D ldrh r3, [r4, #42] + 8479 0074 9BB2 uxth r3, r3 +3620:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { + 8480 .loc 1 3620 10 view .LVU2803 + 8481 0076 FF2B cmp r3, #255 + 8482 0078 13D8 bhi .L499 +3622:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } + 8483 .loc 1 3622 9 is_stmt 1 view .LVU2804 +3622:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } + 8484 .loc 1 3622 18 is_stmt 0 view .LVU2805 + 8485 007a E66A ldr r6, [r4, #44] + 8486 .LVL611: +3574:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 8487 .loc 1 3574 12 view .LVU2806 + 8488 007c 0D4B ldr r3, .L500+4 + 8489 .L495: + 8490 .LVL612: +3627:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 8491 .loc 1 3627 5 is_stmt 1 view .LVU2807 +3627:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 8492 .loc 1 3627 55 is_stmt 0 view .LVU2808 + 8493 007e 228D ldrh r2, [r4, #40] +3627:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 8494 .loc 1 3627 5 view .LVU2809 + 8495 0080 D2B2 uxtb r2, r2 + 8496 0082 0093 str r3, [sp] + 8497 0084 3300 movs r3, r6 + 8498 .LVL613: +3627:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 8499 .loc 1 3627 5 view .LVU2810 + 8500 0086 2900 movs r1, r5 + 8501 0088 2000 movs r0, r4 + 8502 008a FFF7FEFF bl I2C_TransferConfig + 8503 .LVL614: +3630:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 8504 .loc 1 3630 5 is_stmt 1 view .LVU2811 +3630:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 8505 .loc 1 3630 5 view .LVU2812 + 8506 008e 4023 movs r3, #64 + 8507 0090 0022 movs r2, #0 + 8508 0092 E254 strb r2, [r4, r3] +3630:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 8509 .loc 1 3630 5 view .LVU2813 +3635:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 8510 .loc 1 3635 5 view .LVU2814 + 8511 0094 0221 movs r1, #2 + 8512 0096 2000 movs r0, r4 + 8513 0098 FFF7FEFF bl I2C_Enable_IRQ + 8514 .LVL615: +3637:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } + 8515 .loc 1 3637 5 view .LVU2815 +3637:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } + 8516 .loc 1 3637 12 is_stmt 0 view .LVU2816 + ARM GAS /tmp/ccuRhBPx.s page 324 + + + 8517 009c 0020 movs r0, #0 + 8518 .LVL616: + 8519 .L491: +3643:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 8520 .loc 1 3643 1 view .LVU2817 + 8521 009e 02B0 add sp, sp, #8 + 8522 @ sp needed + 8523 .LVL617: + 8524 .LVL618: +3643:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 8525 .loc 1 3643 1 view .LVU2818 + 8526 00a0 70BD pop {r4, r5, r6, pc} + 8527 .LVL619: + 8528 .L499: +3574:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 8529 .loc 1 3574 12 view .LVU2819 + 8530 00a2 044B ldr r3, .L500+4 + 8531 00a4 EBE7 b .L495 + 8532 .LVL620: + 8533 .L496: +3641:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } + 8534 .loc 1 3641 12 view .LVU2820 + 8535 00a6 0220 movs r0, #2 + 8536 .LVL621: +3641:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } + 8537 .loc 1 3641 12 view .LVU2821 + 8538 00a8 F9E7 b .L491 + 8539 .LVL622: + 8540 .L497: +3582:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 8541 .loc 1 3582 5 discriminator 1 view .LVU2822 + 8542 00aa 0220 movs r0, #2 + 8543 .LVL623: +3582:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 8544 .loc 1 3582 5 discriminator 1 view .LVU2823 + 8545 00ac F7E7 b .L491 + 8546 .L501: + 8547 00ae C046 .align 2 + 8548 .L500: + 8549 00b0 00000000 .word I2C_Master_ISR_IT + 8550 00b4 00240080 .word -2147474432 + 8551 .cfi_endproc + 8552 .LFE65: + 8554 .section .text.HAL_I2C_Master_Seq_Receive_DMA,"ax",%progbits + 8555 .align 1 + 8556 .global HAL_I2C_Master_Seq_Receive_DMA + 8557 .syntax unified + 8558 .code 16 + 8559 .thumb_func + 8561 HAL_I2C_Master_Seq_Receive_DMA: + 8562 .LVL624: + 8563 .LFB66: +3659:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** uint32_t xfermode; + 8564 .loc 1 3659 1 is_stmt 1 view -0 + 8565 .cfi_startproc + 8566 @ args = 4, pretend = 0, frame = 8 + 8567 @ frame_needed = 0, uses_anonymous_args = 0 + ARM GAS /tmp/ccuRhBPx.s page 325 + + +3659:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** uint32_t xfermode; + 8568 .loc 1 3659 1 is_stmt 0 view .LVU2825 + 8569 0000 F0B5 push {r4, r5, r6, r7, lr} + 8570 .cfi_def_cfa_offset 20 + 8571 .cfi_offset 4, -20 + 8572 .cfi_offset 5, -16 + 8573 .cfi_offset 6, -12 + 8574 .cfi_offset 7, -8 + 8575 .cfi_offset 14, -4 + 8576 0002 85B0 sub sp, sp, #20 + 8577 .cfi_def_cfa_offset 40 + 8578 0004 0400 movs r4, r0 + 8579 0006 0391 str r1, [sp, #12] + 8580 0008 1500 movs r5, r2 +3660:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** uint32_t xferrequest = I2C_GENERATE_START_READ; + 8581 .loc 1 3660 3 is_stmt 1 view .LVU2826 +3661:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** HAL_StatusTypeDef dmaxferstatus; + 8582 .loc 1 3661 3 view .LVU2827 + 8583 .LVL625: +3662:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 8584 .loc 1 3662 3 view .LVU2828 +3665:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 8585 .loc 1 3665 3 view .LVU2829 +3667:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { + 8586 .loc 1 3667 3 view .LVU2830 +3667:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { + 8587 .loc 1 3667 11 is_stmt 0 view .LVU2831 + 8588 000a 4122 movs r2, #65 + 8589 .LVL626: +3667:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { + 8590 .loc 1 3667 11 view .LVU2832 + 8591 000c 825C ldrb r2, [r0, r2] +3667:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { + 8592 .loc 1 3667 6 view .LVU2833 + 8593 000e 202A cmp r2, #32 + 8594 0010 00D0 beq .LCB8169 + 8595 0012 9DE0 b .L513 @long jump + 8596 .LCB8169: +3670:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 8597 .loc 1 3670 5 is_stmt 1 view .LVU2834 +3670:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 8598 .loc 1 3670 5 view .LVU2835 + 8599 0014 2032 adds r2, r2, #32 + 8600 0016 825C ldrb r2, [r0, r2] + 8601 0018 012A cmp r2, #1 + 8602 001a 00D1 bne .LCB8175 + 8603 001c 9BE0 b .L514 @long jump + 8604 .LCB8175: +3670:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 8605 .loc 1 3670 5 discriminator 2 view .LVU2836 + 8606 001e 4022 movs r2, #64 + 8607 0020 0121 movs r1, #1 + 8608 .LVL627: +3670:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 8609 .loc 1 3670 5 is_stmt 0 discriminator 2 view .LVU2837 + 8610 0022 8154 strb r1, [r0, r2] +3670:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + ARM GAS /tmp/ccuRhBPx.s page 326 + + + 8611 .loc 1 3670 5 is_stmt 1 discriminator 2 view .LVU2838 +3672:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->Mode = HAL_I2C_MODE_MASTER; + 8612 .loc 1 3672 5 view .LVU2839 +3672:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->Mode = HAL_I2C_MODE_MASTER; + 8613 .loc 1 3672 21 is_stmt 0 view .LVU2840 + 8614 0024 0132 adds r2, r2, #1 + 8615 0026 2131 adds r1, r1, #33 + 8616 0028 8154 strb r1, [r0, r2] +3673:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->ErrorCode = HAL_I2C_ERROR_NONE; + 8617 .loc 1 3673 5 is_stmt 1 view .LVU2841 +3673:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->ErrorCode = HAL_I2C_ERROR_NONE; + 8618 .loc 1 3673 21 is_stmt 0 view .LVU2842 + 8619 002a 0132 adds r2, r2, #1 + 8620 002c 1239 subs r1, r1, #18 + 8621 002e 8154 strb r1, [r0, r2] +3674:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 8622 .loc 1 3674 5 is_stmt 1 view .LVU2843 +3674:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 8623 .loc 1 3674 21 is_stmt 0 view .LVU2844 + 8624 0030 0022 movs r2, #0 + 8625 0032 4264 str r2, [r0, #68] +3677:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->XferCount = Size; + 8626 .loc 1 3677 5 is_stmt 1 view .LVU2845 +3677:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->XferCount = Size; + 8627 .loc 1 3677 23 is_stmt 0 view .LVU2846 + 8628 0034 4562 str r5, [r0, #36] +3678:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->XferOptions = XferOptions; + 8629 .loc 1 3678 5 is_stmt 1 view .LVU2847 +3678:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->XferOptions = XferOptions; + 8630 .loc 1 3678 23 is_stmt 0 view .LVU2848 + 8631 0036 4385 strh r3, [r0, #42] +3679:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->XferISR = I2C_Master_ISR_DMA; + 8632 .loc 1 3679 5 is_stmt 1 view .LVU2849 +3679:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->XferISR = I2C_Master_ISR_DMA; + 8633 .loc 1 3679 23 is_stmt 0 view .LVU2850 + 8634 0038 0A9B ldr r3, [sp, #40] + 8635 .LVL628: +3679:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->XferISR = I2C_Master_ISR_DMA; + 8636 .loc 1 3679 23 view .LVU2851 + 8637 003a C362 str r3, [r0, #44] + 8638 .LVL629: +3680:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 8639 .loc 1 3680 5 is_stmt 1 view .LVU2852 +3680:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 8640 .loc 1 3680 23 is_stmt 0 view .LVU2853 + 8641 003c 474B ldr r3, .L519 + 8642 003e 4363 str r3, [r0, #52] +3683:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { + 8643 .loc 1 3683 5 is_stmt 1 view .LVU2854 +3683:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { + 8644 .loc 1 3683 13 is_stmt 0 view .LVU2855 + 8645 0040 438D ldrh r3, [r0, #42] + 8646 0042 9BB2 uxth r3, r3 +3683:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { + 8647 .loc 1 3683 8 view .LVU2856 + 8648 0044 FF2B cmp r3, #255 + 8649 0046 10D9 bls .L504 + ARM GAS /tmp/ccuRhBPx.s page 327 + + +3685:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** xfermode = I2C_RELOAD_MODE; + 8650 .loc 1 3685 7 is_stmt 1 view .LVU2857 +3685:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** xfermode = I2C_RELOAD_MODE; + 8651 .loc 1 3685 22 is_stmt 0 view .LVU2858 + 8652 0048 FF23 movs r3, #255 + 8653 004a 0385 strh r3, [r0, #40] +3686:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } + 8654 .loc 1 3686 7 is_stmt 1 view .LVU2859 + 8655 .LVL630: +3686:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } + 8656 .loc 1 3686 16 is_stmt 0 view .LVU2860 + 8657 004c 8027 movs r7, #128 + 8658 004e 7F04 lsls r7, r7, #17 + 8659 .LVL631: + 8660 .L505: +3697:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** (IS_I2C_TRANSFER_OTHER_OPTIONS_REQUEST(XferOptions) == 0)) + 8661 .loc 1 3697 5 is_stmt 1 view .LVU2861 +3697:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** (IS_I2C_TRANSFER_OTHER_OPTIONS_REQUEST(XferOptions) == 0)) + 8662 .loc 1 3697 14 is_stmt 0 view .LVU2862 + 8663 0050 236B ldr r3, [r4, #48] +3697:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** (IS_I2C_TRANSFER_OTHER_OPTIONS_REQUEST(XferOptions) == 0)) + 8664 .loc 1 3697 8 view .LVU2863 + 8665 0052 122B cmp r3, #18 + 8666 0054 0DD1 bne .L506 +3698:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { + 8667 .loc 1 3698 10 view .LVU2864 + 8668 0056 0A9B ldr r3, [sp, #40] + 8669 0058 AA2B cmp r3, #170 + 8670 005a 0AD0 beq .L506 +3698:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { + 8671 .loc 1 3698 10 discriminator 2 view .LVU2865 + 8672 005c AA23 movs r3, #170 + 8673 005e 1B02 lsls r3, r3, #8 + 8674 0060 0A9A ldr r2, [sp, #40] + 8675 0062 9A42 cmp r2, r3 + 8676 0064 05D0 beq .L506 +3700:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } + 8677 .loc 1 3700 19 view .LVU2866 + 8678 0066 0026 movs r6, #0 + 8679 0068 0CE0 b .L507 + 8680 .LVL632: + 8681 .L504: +3690:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** xfermode = hi2c->XferOptions; + 8682 .loc 1 3690 7 is_stmt 1 view .LVU2867 +3690:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** xfermode = hi2c->XferOptions; + 8683 .loc 1 3690 28 is_stmt 0 view .LVU2868 + 8684 006a 438D ldrh r3, [r0, #42] +3690:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** xfermode = hi2c->XferOptions; + 8685 .loc 1 3690 22 view .LVU2869 + 8686 006c 0385 strh r3, [r0, #40] +3691:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } + 8687 .loc 1 3691 7 is_stmt 1 view .LVU2870 +3691:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } + 8688 .loc 1 3691 16 is_stmt 0 view .LVU2871 + 8689 006e C76A ldr r7, [r0, #44] + 8690 .LVL633: +3691:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } + ARM GAS /tmp/ccuRhBPx.s page 328 + + + 8691 .loc 1 3691 16 view .LVU2872 + 8692 0070 EEE7 b .L505 + 8693 .L506: +3705:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 8694 .loc 1 3705 7 is_stmt 1 view .LVU2873 + 8695 0072 2000 movs r0, r4 + 8696 .LVL634: +3705:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 8697 .loc 1 3705 7 is_stmt 0 view .LVU2874 + 8698 0074 FFF7FEFF bl I2C_ConvertOtherXferOptions + 8699 .LVL635: +3708:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { + 8700 .loc 1 3708 7 is_stmt 1 view .LVU2875 +3708:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { + 8701 .loc 1 3708 15 is_stmt 0 view .LVU2876 + 8702 0078 638D ldrh r3, [r4, #42] + 8703 007a 9BB2 uxth r3, r3 +3708:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { + 8704 .loc 1 3708 10 view .LVU2877 + 8705 007c FF2B cmp r3, #255 + 8706 007e 28D8 bhi .L516 +3710:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } + 8707 .loc 1 3710 9 is_stmt 1 view .LVU2878 +3710:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } + 8708 .loc 1 3710 18 is_stmt 0 view .LVU2879 + 8709 0080 E76A ldr r7, [r4, #44] + 8710 .LVL636: +3661:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** HAL_StatusTypeDef dmaxferstatus; + 8711 .loc 1 3661 12 view .LVU2880 + 8712 0082 374E ldr r6, .L519+4 + 8713 .L507: + 8714 .LVL637: +3714:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { + 8715 .loc 1 3714 5 is_stmt 1 view .LVU2881 +3714:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { + 8716 .loc 1 3714 13 is_stmt 0 view .LVU2882 + 8717 0084 228D ldrh r2, [r4, #40] +3714:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { + 8718 .loc 1 3714 8 view .LVU2883 + 8719 0086 002A cmp r2, #0 + 8720 0088 4ED0 beq .L508 +3716:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { + 8721 .loc 1 3716 7 is_stmt 1 view .LVU2884 +3716:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { + 8722 .loc 1 3716 15 is_stmt 0 view .LVU2885 + 8723 008a E36B ldr r3, [r4, #60] +3716:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { + 8724 .loc 1 3716 10 view .LVU2886 + 8725 008c 002B cmp r3, #0 + 8726 008e 22D0 beq .L509 +3719:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 8727 .loc 1 3719 9 is_stmt 1 view .LVU2887 +3719:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 8728 .loc 1 3719 40 is_stmt 0 view .LVU2888 + 8729 0090 344A ldr r2, .L519+8 + 8730 0092 9A62 str r2, [r3, #40] +3722:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + ARM GAS /tmp/ccuRhBPx.s page 329 + + + 8731 .loc 1 3722 9 is_stmt 1 view .LVU2889 +3722:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 8732 .loc 1 3722 13 is_stmt 0 view .LVU2890 + 8733 0094 E36B ldr r3, [r4, #60] +3722:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 8734 .loc 1 3722 41 view .LVU2891 + 8735 0096 344A ldr r2, .L519+12 + 8736 0098 1A63 str r2, [r3, #48] +3725:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->hdmarx->XferAbortCallback = NULL; + 8737 .loc 1 3725 9 is_stmt 1 view .LVU2892 +3725:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->hdmarx->XferAbortCallback = NULL; + 8738 .loc 1 3725 13 is_stmt 0 view .LVU2893 + 8739 009a E26B ldr r2, [r4, #60] +3725:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->hdmarx->XferAbortCallback = NULL; + 8740 .loc 1 3725 44 view .LVU2894 + 8741 009c 0023 movs r3, #0 + 8742 009e D362 str r3, [r2, #44] +3726:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 8743 .loc 1 3726 9 is_stmt 1 view .LVU2895 +3726:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 8744 .loc 1 3726 13 is_stmt 0 view .LVU2896 + 8745 00a0 E26B ldr r2, [r4, #60] +3726:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 8746 .loc 1 3726 41 view .LVU2897 + 8747 00a2 5363 str r3, [r2, #52] +3729:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->XferSize); + 8748 .loc 1 3729 9 is_stmt 1 view .LVU2898 +3729:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->XferSize); + 8749 .loc 1 3729 71 is_stmt 0 view .LVU2899 + 8750 00a4 2168 ldr r1, [r4] +3729:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->XferSize); + 8751 .loc 1 3729 66 view .LVU2900 + 8752 00a6 2431 adds r1, r1, #36 +3730:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } + 8753 .loc 1 3730 46 view .LVU2901 + 8754 00a8 238D ldrh r3, [r4, #40] +3729:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->XferSize); + 8755 .loc 1 3729 25 view .LVU2902 + 8756 00aa E06B ldr r0, [r4, #60] + 8757 00ac 2A00 movs r2, r5 + 8758 00ae FFF7FEFF bl HAL_DMA_Start_IT + 8759 .LVL638: +3747:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { + 8760 .loc 1 3747 7 is_stmt 1 view .LVU2903 +3747:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { + 8761 .loc 1 3747 10 is_stmt 0 view .LVU2904 + 8762 00b2 0028 cmp r0, #0 + 8763 00b4 1DD0 beq .L518 +3770:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->Mode = HAL_I2C_MODE_NONE; + 8764 .loc 1 3770 9 is_stmt 1 view .LVU2905 +3770:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->Mode = HAL_I2C_MODE_NONE; + 8765 .loc 1 3770 25 is_stmt 0 view .LVU2906 + 8766 00b6 4123 movs r3, #65 + 8767 00b8 2022 movs r2, #32 + 8768 00ba E254 strb r2, [r4, r3] +3771:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 8769 .loc 1 3771 9 is_stmt 1 view .LVU2907 + ARM GAS /tmp/ccuRhBPx.s page 330 + + +3771:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 8770 .loc 1 3771 25 is_stmt 0 view .LVU2908 + 8771 00bc 0022 movs r2, #0 + 8772 00be 0133 adds r3, r3, #1 + 8773 00c0 E254 strb r2, [r4, r3] +3774:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 8774 .loc 1 3774 9 is_stmt 1 view .LVU2909 +3774:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 8775 .loc 1 3774 13 is_stmt 0 view .LVU2910 + 8776 00c2 636C ldr r3, [r4, #68] +3774:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 8777 .loc 1 3774 25 view .LVU2911 + 8778 00c4 1021 movs r1, #16 + 8779 00c6 0B43 orrs r3, r1 + 8780 00c8 6364 str r3, [r4, #68] +3777:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 8781 .loc 1 3777 9 is_stmt 1 view .LVU2912 +3777:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 8782 .loc 1 3777 9 view .LVU2913 + 8783 00ca 4023 movs r3, #64 + 8784 00cc E254 strb r2, [r4, r3] +3777:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 8785 .loc 1 3777 9 view .LVU2914 +3779:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } + 8786 .loc 1 3779 9 view .LVU2915 +3779:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } + 8787 .loc 1 3779 16 is_stmt 0 view .LVU2916 + 8788 00ce 0120 movs r0, #1 + 8789 .LVL639: +3779:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } + 8790 .loc 1 3779 16 view .LVU2917 + 8791 00d0 3FE0 b .L503 + 8792 .LVL640: + 8793 .L516: +3661:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** HAL_StatusTypeDef dmaxferstatus; + 8794 .loc 1 3661 12 view .LVU2918 + 8795 00d2 234E ldr r6, .L519+4 + 8796 00d4 D6E7 b .L507 + 8797 .LVL641: + 8798 .L509: +3735:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->Mode = HAL_I2C_MODE_NONE; + 8799 .loc 1 3735 9 is_stmt 1 view .LVU2919 +3735:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->Mode = HAL_I2C_MODE_NONE; + 8800 .loc 1 3735 25 is_stmt 0 view .LVU2920 + 8801 00d6 4123 movs r3, #65 + 8802 00d8 2022 movs r2, #32 + 8803 00da E254 strb r2, [r4, r3] +3736:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 8804 .loc 1 3736 9 is_stmt 1 view .LVU2921 +3736:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 8805 .loc 1 3736 25 is_stmt 0 view .LVU2922 + 8806 00dc 0022 movs r2, #0 + 8807 00de 0133 adds r3, r3, #1 + 8808 00e0 E254 strb r2, [r4, r3] +3739:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 8809 .loc 1 3739 9 is_stmt 1 view .LVU2923 +3739:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + ARM GAS /tmp/ccuRhBPx.s page 331 + + + 8810 .loc 1 3739 13 is_stmt 0 view .LVU2924 + 8811 00e2 636C ldr r3, [r4, #68] +3739:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 8812 .loc 1 3739 25 view .LVU2925 + 8813 00e4 8021 movs r1, #128 + 8814 00e6 0B43 orrs r3, r1 + 8815 00e8 6364 str r3, [r4, #68] +3742:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 8816 .loc 1 3742 9 is_stmt 1 view .LVU2926 +3742:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 8817 .loc 1 3742 9 view .LVU2927 + 8818 00ea 4023 movs r3, #64 + 8819 00ec E254 strb r2, [r4, r3] +3742:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 8820 .loc 1 3742 9 view .LVU2928 +3744:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } + 8821 .loc 1 3744 9 view .LVU2929 +3744:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } + 8822 .loc 1 3744 16 is_stmt 0 view .LVU2930 + 8823 00ee 0120 movs r0, #1 + 8824 00f0 2FE0 b .L503 + 8825 .LVL642: + 8826 .L518: +3750:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 8827 .loc 1 3750 9 is_stmt 1 view .LVU2931 +3750:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 8828 .loc 1 3750 59 is_stmt 0 view .LVU2932 + 8829 00f2 228D ldrh r2, [r4, #40] +3750:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 8830 .loc 1 3750 9 view .LVU2933 + 8831 00f4 D2B2 uxtb r2, r2 + 8832 00f6 0096 str r6, [sp] + 8833 00f8 3B00 movs r3, r7 + 8834 00fa 0399 ldr r1, [sp, #12] + 8835 00fc 2000 movs r0, r4 + 8836 .LVL643: +3750:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 8837 .loc 1 3750 9 view .LVU2934 + 8838 00fe FFF7FEFF bl I2C_TransferConfig + 8839 .LVL644: +3753:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 8840 .loc 1 3753 9 is_stmt 1 view .LVU2935 +3753:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 8841 .loc 1 3753 13 is_stmt 0 view .LVU2936 + 8842 0102 638D ldrh r3, [r4, #42] +3753:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 8843 .loc 1 3753 32 view .LVU2937 + 8844 0104 228D ldrh r2, [r4, #40] +3753:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 8845 .loc 1 3753 25 view .LVU2938 + 8846 0106 9B1A subs r3, r3, r2 + 8847 0108 9BB2 uxth r3, r3 + 8848 010a 6385 strh r3, [r4, #42] +3756:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 8849 .loc 1 3756 9 is_stmt 1 view .LVU2939 +3756:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 8850 .loc 1 3756 9 view .LVU2940 + ARM GAS /tmp/ccuRhBPx.s page 332 + + + 8851 010c 4023 movs r3, #64 + 8852 010e 0022 movs r2, #0 + 8853 0110 E254 strb r2, [r4, r3] +3756:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 8854 .loc 1 3756 9 view .LVU2941 +3762:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 8855 .loc 1 3762 9 view .LVU2942 + 8856 0112 1021 movs r1, #16 + 8857 0114 2000 movs r0, r4 + 8858 0116 FFF7FEFF bl I2C_Enable_IRQ + 8859 .LVL645: +3765:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } + 8860 .loc 1 3765 9 view .LVU2943 +3765:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } + 8861 .loc 1 3765 13 is_stmt 0 view .LVU2944 + 8862 011a 2268 ldr r2, [r4] +3765:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } + 8863 .loc 1 3765 23 view .LVU2945 + 8864 011c 1168 ldr r1, [r2] +3765:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } + 8865 .loc 1 3765 29 view .LVU2946 + 8866 011e 8023 movs r3, #128 + 8867 0120 1B02 lsls r3, r3, #8 + 8868 0122 0B43 orrs r3, r1 + 8869 0124 1360 str r3, [r2] + 8870 0126 11E0 b .L512 + 8871 .LVL646: + 8872 .L508: +3785:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 8873 .loc 1 3785 7 is_stmt 1 view .LVU2947 +3785:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 8874 .loc 1 3785 21 is_stmt 0 view .LVU2948 + 8875 0128 104B ldr r3, .L519+16 + 8876 012a 6363 str r3, [r4, #52] +3789:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** I2C_GENERATE_START_READ); + 8877 .loc 1 3789 7 is_stmt 1 view .LVU2949 + 8878 012c 8023 movs r3, #128 + 8879 012e D2B2 uxtb r2, r2 + 8880 0130 0B49 ldr r1, .L519+4 + 8881 0132 0091 str r1, [sp] + 8882 0134 9B04 lsls r3, r3, #18 + 8883 0136 0399 ldr r1, [sp, #12] + 8884 0138 2000 movs r0, r4 + 8885 013a FFF7FEFF bl I2C_TransferConfig + 8886 .LVL647: +3793:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 8887 .loc 1 3793 7 view .LVU2950 +3793:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 8888 .loc 1 3793 7 view .LVU2951 + 8889 013e 4023 movs r3, #64 + 8890 0140 0022 movs r2, #0 + 8891 0142 E254 strb r2, [r4, r3] +3793:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 8892 .loc 1 3793 7 view .LVU2952 +3802:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } + 8893 .loc 1 3802 7 view .LVU2953 + 8894 0144 0121 movs r1, #1 + ARM GAS /tmp/ccuRhBPx.s page 333 + + + 8895 0146 2000 movs r0, r4 + 8896 0148 FFF7FEFF bl I2C_Enable_IRQ + 8897 .LVL648: + 8898 .L512: +3805:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } + 8899 .loc 1 3805 5 view .LVU2954 +3805:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } + 8900 .loc 1 3805 12 is_stmt 0 view .LVU2955 + 8901 014c 0020 movs r0, #0 + 8902 014e 00E0 b .L503 + 8903 .LVL649: + 8904 .L513: +3809:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } + 8905 .loc 1 3809 12 view .LVU2956 + 8906 0150 0220 movs r0, #2 + 8907 .LVL650: + 8908 .L503: +3811:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 8909 .loc 1 3811 1 view .LVU2957 + 8910 0152 05B0 add sp, sp, #20 + 8911 @ sp needed + 8912 .LVL651: + 8913 .LVL652: +3811:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 8914 .loc 1 3811 1 view .LVU2958 + 8915 0154 F0BD pop {r4, r5, r6, r7, pc} + 8916 .LVL653: + 8917 .L514: +3670:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 8918 .loc 1 3670 5 discriminator 1 view .LVU2959 + 8919 0156 0220 movs r0, #2 + 8920 .LVL654: +3670:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 8921 .loc 1 3670 5 discriminator 1 view .LVU2960 + 8922 0158 FBE7 b .L503 + 8923 .L520: + 8924 015a C046 .align 2 + 8925 .L519: + 8926 015c 00000000 .word I2C_Master_ISR_DMA + 8927 0160 00240080 .word -2147474432 + 8928 0164 00000000 .word I2C_DMAMasterReceiveCplt + 8929 0168 00000000 .word I2C_DMAError + 8930 016c 00000000 .word I2C_Master_ISR_IT + 8931 .cfi_endproc + 8932 .LFE66: + 8934 .section .text.HAL_I2C_Slave_Seq_Transmit_IT,"ax",%progbits + 8935 .align 1 + 8936 .global HAL_I2C_Slave_Seq_Transmit_IT + 8937 .syntax unified + 8938 .code 16 + 8939 .thumb_func + 8941 HAL_I2C_Slave_Seq_Transmit_IT: + 8942 .LVL655: + 8943 .LFB67: +3825:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* Declaration of tmp to prevent undefined behavior of volatile usage */ + 8944 .loc 1 3825 1 is_stmt 1 view -0 + 8945 .cfi_startproc + ARM GAS /tmp/ccuRhBPx.s page 334 + + + 8946 @ args = 0, pretend = 0, frame = 0 + 8947 @ frame_needed = 0, uses_anonymous_args = 0 +3825:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* Declaration of tmp to prevent undefined behavior of volatile usage */ + 8948 .loc 1 3825 1 is_stmt 0 view .LVU2962 + 8949 0000 F8B5 push {r3, r4, r5, r6, r7, lr} + 8950 .cfi_def_cfa_offset 24 + 8951 .cfi_offset 3, -24 + 8952 .cfi_offset 4, -20 + 8953 .cfi_offset 5, -16 + 8954 .cfi_offset 6, -12 + 8955 .cfi_offset 7, -8 + 8956 .cfi_offset 14, -4 + 8957 0002 0400 movs r4, r0 + 8958 0004 0D00 movs r5, r1 + 8959 0006 1600 movs r6, r2 + 8960 0008 1F00 movs r7, r3 +3827:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 8961 .loc 1 3827 3 is_stmt 1 view .LVU2963 +3830:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 8962 .loc 1 3830 3 view .LVU2964 +3832:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { + 8963 .loc 1 3832 3 view .LVU2965 +3832:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { + 8964 .loc 1 3832 22 is_stmt 0 view .LVU2966 + 8965 000a 4123 movs r3, #65 + 8966 .LVL656: +3832:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { + 8967 .loc 1 3832 22 view .LVU2967 + 8968 000c C35C ldrb r3, [r0, r3] +3832:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { + 8969 .loc 1 3832 6 view .LVU2968 + 8970 000e 2822 movs r2, #40 + 8971 .LVL657: +3832:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { + 8972 .loc 1 3832 6 view .LVU2969 + 8973 0010 1340 ands r3, r2 + 8974 0012 282B cmp r3, #40 + 8975 0014 58D1 bne .L527 +3834:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { + 8976 .loc 1 3834 5 is_stmt 1 view .LVU2970 +3834:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { + 8977 .loc 1 3834 8 is_stmt 0 view .LVU2971 + 8978 0016 0029 cmp r1, #0 + 8979 0018 01D0 beq .L523 +3834:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { + 8980 .loc 1 3834 25 discriminator 1 view .LVU2972 + 8981 001a 002E cmp r6, #0 + 8982 001c 04D1 bne .L524 + 8983 .L523: +3836:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** return HAL_ERROR; + 8984 .loc 1 3836 7 is_stmt 1 view .LVU2973 +3836:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** return HAL_ERROR; + 8985 .loc 1 3836 23 is_stmt 0 view .LVU2974 + 8986 001e 8023 movs r3, #128 + 8987 0020 9B00 lsls r3, r3, #2 + 8988 0022 6364 str r3, [r4, #68] +3837:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } + ARM GAS /tmp/ccuRhBPx.s page 335 + + + 8989 .loc 1 3837 7 is_stmt 1 view .LVU2975 +3837:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } + 8990 .loc 1 3837 15 is_stmt 0 view .LVU2976 + 8991 0024 0120 movs r0, #1 + 8992 .LVL658: +3837:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } + 8993 .loc 1 3837 15 view .LVU2977 + 8994 0026 50E0 b .L522 + 8995 .LVL659: + 8996 .L524: +3841:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 8997 .loc 1 3841 5 is_stmt 1 view .LVU2978 + 8998 0028 2949 ldr r1, .L532 + 8999 .LVL660: +3841:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 9000 .loc 1 3841 5 is_stmt 0 view .LVU2979 + 9001 002a FFF7FEFF bl I2C_Disable_IRQ + 9002 .LVL661: +3844:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 9003 .loc 1 3844 5 is_stmt 1 view .LVU2980 +3844:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 9004 .loc 1 3844 5 view .LVU2981 + 9005 002e 4023 movs r3, #64 + 9006 0030 E35C ldrb r3, [r4, r3] + 9007 0032 012B cmp r3, #1 + 9008 0034 4AD0 beq .L528 +3844:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 9009 .loc 1 3844 5 discriminator 2 view .LVU2982 + 9010 0036 4023 movs r3, #64 + 9011 0038 0122 movs r2, #1 + 9012 003a E254 strb r2, [r4, r3] +3844:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 9013 .loc 1 3844 5 discriminator 2 view .LVU2983 +3848:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { + 9014 .loc 1 3848 5 view .LVU2984 +3848:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { + 9015 .loc 1 3848 13 is_stmt 0 view .LVU2985 + 9016 003c 0133 adds r3, r3, #1 + 9017 003e E35C ldrb r3, [r4, r3] +3848:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { + 9018 .loc 1 3848 8 view .LVU2986 + 9019 0040 2A2B cmp r3, #42 + 9020 0042 27D0 beq .L531 + 9021 .L525: +3874:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->Mode = HAL_I2C_MODE_SLAVE; + 9022 .loc 1 3874 5 is_stmt 1 view .LVU2987 +3874:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->Mode = HAL_I2C_MODE_SLAVE; + 9023 .loc 1 3874 21 is_stmt 0 view .LVU2988 + 9024 0044 4123 movs r3, #65 + 9025 0046 2922 movs r2, #41 + 9026 0048 E254 strb r2, [r4, r3] +3875:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->ErrorCode = HAL_I2C_ERROR_NONE; + 9027 .loc 1 3875 5 is_stmt 1 view .LVU2989 +3875:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->ErrorCode = HAL_I2C_ERROR_NONE; + 9028 .loc 1 3875 21 is_stmt 0 view .LVU2990 + 9029 004a 0133 adds r3, r3, #1 + 9030 004c 093A subs r2, r2, #9 + ARM GAS /tmp/ccuRhBPx.s page 336 + + + 9031 004e E254 strb r2, [r4, r3] +3876:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 9032 .loc 1 3876 5 is_stmt 1 view .LVU2991 +3876:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 9033 .loc 1 3876 21 is_stmt 0 view .LVU2992 + 9034 0050 0023 movs r3, #0 + 9035 0052 6364 str r3, [r4, #68] +3879:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 9036 .loc 1 3879 5 is_stmt 1 view .LVU2993 +3879:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 9037 .loc 1 3879 9 is_stmt 0 view .LVU2994 + 9038 0054 2268 ldr r2, [r4] +3879:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 9039 .loc 1 3879 19 view .LVU2995 + 9040 0056 5368 ldr r3, [r2, #4] +3879:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 9041 .loc 1 3879 25 view .LVU2996 + 9042 0058 1E49 ldr r1, .L532+4 + 9043 005a 0B40 ands r3, r1 + 9044 005c 5360 str r3, [r2, #4] +3882:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->XferCount = Size; + 9045 .loc 1 3882 5 is_stmt 1 view .LVU2997 +3882:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->XferCount = Size; + 9046 .loc 1 3882 23 is_stmt 0 view .LVU2998 + 9047 005e 6562 str r5, [r4, #36] +3883:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->XferSize = hi2c->XferCount; + 9048 .loc 1 3883 5 is_stmt 1 view .LVU2999 +3883:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->XferSize = hi2c->XferCount; + 9049 .loc 1 3883 23 is_stmt 0 view .LVU3000 + 9050 0060 6685 strh r6, [r4, #42] +3884:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->XferOptions = XferOptions; + 9051 .loc 1 3884 5 is_stmt 1 view .LVU3001 +3884:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->XferOptions = XferOptions; + 9052 .loc 1 3884 29 is_stmt 0 view .LVU3002 + 9053 0062 638D ldrh r3, [r4, #42] +3884:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->XferOptions = XferOptions; + 9054 .loc 1 3884 23 view .LVU3003 + 9055 0064 2385 strh r3, [r4, #40] +3885:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->XferISR = I2C_Slave_ISR_IT; + 9056 .loc 1 3885 5 is_stmt 1 view .LVU3004 +3885:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->XferISR = I2C_Slave_ISR_IT; + 9057 .loc 1 3885 23 is_stmt 0 view .LVU3005 + 9058 0066 E762 str r7, [r4, #44] +3886:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 9059 .loc 1 3886 5 is_stmt 1 view .LVU3006 +3886:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 9060 .loc 1 3886 23 is_stmt 0 view .LVU3007 + 9061 0068 1B4B ldr r3, .L532+8 + 9062 006a 6363 str r3, [r4, #52] +3888:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** if ((I2C_GET_DIR(hi2c) == I2C_DIRECTION_RECEIVE) && (tmp != RESET)) + 9063 .loc 1 3888 5 is_stmt 1 view .LVU3008 +3888:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** if ((I2C_GET_DIR(hi2c) == I2C_DIRECTION_RECEIVE) && (tmp != RESET)) + 9064 .loc 1 3888 11 is_stmt 0 view .LVU3009 + 9065 006c 2268 ldr r2, [r4] + 9066 006e 9169 ldr r1, [r2, #24] + 9067 0070 0823 movs r3, #8 + 9068 0072 0B40 ands r3, r1 + ARM GAS /tmp/ccuRhBPx.s page 337 + + + 9069 .LVL662: +3889:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { + 9070 .loc 1 3889 5 is_stmt 1 view .LVU3010 +3889:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { + 9071 .loc 1 3889 10 is_stmt 0 view .LVU3011 + 9072 0074 9169 ldr r1, [r2, #24] +3889:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { + 9073 .loc 1 3889 8 view .LVU3012 + 9074 0076 C903 lsls r1, r1, #15 + 9075 0078 03D5 bpl .L526 +3889:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { + 9076 .loc 1 3889 54 discriminator 1 view .LVU3013 + 9077 007a 002B cmp r3, #0 + 9078 007c 01D0 beq .L526 +3893:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } + 9079 .loc 1 3893 7 is_stmt 1 view .LVU3014 + 9080 007e 0823 movs r3, #8 + 9081 .LVL663: +3893:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } + 9082 .loc 1 3893 7 is_stmt 0 view .LVU3015 + 9083 0080 D361 str r3, [r2, #28] + 9084 .L526: +3897:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 9085 .loc 1 3897 5 is_stmt 1 view .LVU3016 +3897:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 9086 .loc 1 3897 5 view .LVU3017 + 9087 0082 4023 movs r3, #64 + 9088 0084 0022 movs r2, #0 + 9089 0086 E254 strb r2, [r4, r3] +3897:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 9090 .loc 1 3897 5 view .LVU3018 +3903:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 9091 .loc 1 3903 5 view .LVU3019 + 9092 0088 1149 ldr r1, .L532 + 9093 008a 2000 movs r0, r4 + 9094 008c FFF7FEFF bl I2C_Enable_IRQ + 9095 .LVL664: +3905:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } + 9096 .loc 1 3905 5 view .LVU3020 +3905:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } + 9097 .loc 1 3905 12 is_stmt 0 view .LVU3021 + 9098 0090 0020 movs r0, #0 + 9099 0092 1AE0 b .L522 + 9100 .LVL665: + 9101 .L531: +3851:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 9102 .loc 1 3851 7 is_stmt 1 view .LVU3022 + 9103 0094 0221 movs r1, #2 + 9104 0096 2000 movs r0, r4 + 9105 0098 FFF7FEFF bl I2C_Disable_IRQ + 9106 .LVL666: +3854:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { + 9107 .loc 1 3854 7 view .LVU3023 +3854:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { + 9108 .loc 1 3854 16 is_stmt 0 view .LVU3024 + 9109 009c 2268 ldr r2, [r4] +3854:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { + ARM GAS /tmp/ccuRhBPx.s page 338 + + + 9110 .loc 1 3854 26 view .LVU3025 + 9111 009e 1368 ldr r3, [r2] +3854:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { + 9112 .loc 1 3854 10 view .LVU3026 + 9113 00a0 1B04 lsls r3, r3, #16 + 9114 00a2 CFD5 bpl .L525 +3856:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 9115 .loc 1 3856 9 is_stmt 1 view .LVU3027 +3856:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 9116 .loc 1 3856 23 is_stmt 0 view .LVU3028 + 9117 00a4 1368 ldr r3, [r2] +3856:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 9118 .loc 1 3856 29 view .LVU3029 + 9119 00a6 0B49 ldr r1, .L532+4 + 9120 00a8 0B40 ands r3, r1 + 9121 00aa 1360 str r3, [r2] +3858:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { + 9122 .loc 1 3858 9 is_stmt 1 view .LVU3030 +3858:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { + 9123 .loc 1 3858 17 is_stmt 0 view .LVU3031 + 9124 00ac E36B ldr r3, [r4, #60] +3858:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { + 9125 .loc 1 3858 12 view .LVU3032 + 9126 00ae 002B cmp r3, #0 + 9127 00b0 C8D0 beq .L525 +3862:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 9128 .loc 1 3862 11 is_stmt 1 view .LVU3033 +3862:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 9129 .loc 1 3862 43 is_stmt 0 view .LVU3034 + 9130 00b2 0A4A ldr r2, .L532+12 + 9131 00b4 5A63 str r2, [r3, #52] +3865:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { + 9132 .loc 1 3865 11 is_stmt 1 view .LVU3035 +3865:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { + 9133 .loc 1 3865 15 is_stmt 0 view .LVU3036 + 9134 00b6 E06B ldr r0, [r4, #60] + 9135 00b8 FFF7FEFF bl HAL_DMA_Abort_IT + 9136 .LVL667: +3865:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { + 9137 .loc 1 3865 14 discriminator 1 view .LVU3037 + 9138 00bc 0028 cmp r0, #0 + 9139 00be C1D0 beq .L525 +3868:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } + 9140 .loc 1 3868 13 is_stmt 1 view .LVU3038 +3868:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } + 9141 .loc 1 3868 17 is_stmt 0 view .LVU3039 + 9142 00c0 E06B ldr r0, [r4, #60] +3868:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } + 9143 .loc 1 3868 25 view .LVU3040 + 9144 00c2 436B ldr r3, [r0, #52] +3868:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } + 9145 .loc 1 3868 13 view .LVU3041 + 9146 00c4 9847 blx r3 + 9147 .LVL668: + 9148 00c6 BDE7 b .L525 + 9149 .LVL669: + 9150 .L527: + ARM GAS /tmp/ccuRhBPx.s page 339 + + +3909:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } + 9151 .loc 1 3909 12 view .LVU3042 + 9152 00c8 0120 movs r0, #1 + 9153 .LVL670: + 9154 .L522: +3911:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 9155 .loc 1 3911 1 view .LVU3043 + 9156 @ sp needed + 9157 .LVL671: + 9158 .LVL672: + 9159 .LVL673: + 9160 .LVL674: +3911:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 9161 .loc 1 3911 1 view .LVU3044 + 9162 00ca F8BD pop {r3, r4, r5, r6, r7, pc} + 9163 .LVL675: + 9164 .L528: +3844:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 9165 .loc 1 3844 5 discriminator 1 view .LVU3045 + 9166 00cc 0220 movs r0, #2 + 9167 00ce FCE7 b .L522 + 9168 .L533: + 9169 .align 2 + 9170 .L532: + 9171 00d0 01800000 .word 32769 + 9172 00d4 FF7FFFFF .word -32769 + 9173 00d8 00000000 .word I2C_Slave_ISR_IT + 9174 00dc 00000000 .word I2C_DMAAbort + 9175 .cfi_endproc + 9176 .LFE67: + 9178 .section .text.HAL_I2C_Slave_Seq_Transmit_DMA,"ax",%progbits + 9179 .align 1 + 9180 .global HAL_I2C_Slave_Seq_Transmit_DMA + 9181 .syntax unified + 9182 .code 16 + 9183 .thumb_func + 9185 HAL_I2C_Slave_Seq_Transmit_DMA: + 9186 .LVL676: + 9187 .LFB68: +3925:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* Declaration of tmp to prevent undefined behavior of volatile usage */ + 9188 .loc 1 3925 1 is_stmt 1 view -0 + 9189 .cfi_startproc + 9190 @ args = 0, pretend = 0, frame = 0 + 9191 @ frame_needed = 0, uses_anonymous_args = 0 +3925:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* Declaration of tmp to prevent undefined behavior of volatile usage */ + 9192 .loc 1 3925 1 is_stmt 0 view .LVU3047 + 9193 0000 F8B5 push {r3, r4, r5, r6, r7, lr} + 9194 .cfi_def_cfa_offset 24 + 9195 .cfi_offset 3, -24 + 9196 .cfi_offset 4, -20 + 9197 .cfi_offset 5, -16 + 9198 .cfi_offset 6, -12 + 9199 .cfi_offset 7, -8 + 9200 .cfi_offset 14, -4 + 9201 0002 0400 movs r4, r0 + 9202 0004 0F00 movs r7, r1 + 9203 0006 1500 movs r5, r2 + ARM GAS /tmp/ccuRhBPx.s page 340 + + + 9204 0008 1E00 movs r6, r3 +3927:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** HAL_StatusTypeDef dmaxferstatus; + 9205 .loc 1 3927 3 is_stmt 1 view .LVU3048 +3928:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 9206 .loc 1 3928 3 view .LVU3049 +3931:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 9207 .loc 1 3931 3 view .LVU3050 +3933:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { + 9208 .loc 1 3933 3 view .LVU3051 +3933:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { + 9209 .loc 1 3933 22 is_stmt 0 view .LVU3052 + 9210 000a 4123 movs r3, #65 + 9211 .LVL677: +3933:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { + 9212 .loc 1 3933 22 view .LVU3053 + 9213 000c C05C ldrb r0, [r0, r3] + 9214 .LVL678: +3933:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { + 9215 .loc 1 3933 6 view .LVU3054 + 9216 000e 193B subs r3, r3, #25 + 9217 0010 1840 ands r0, r3 + 9218 0012 2828 cmp r0, #40 + 9219 0014 00D0 beq .LCB8752 + 9220 0016 B5E0 b .L545 @long jump + 9221 .LCB8752: +3935:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { + 9222 .loc 1 3935 5 is_stmt 1 view .LVU3055 +3935:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { + 9223 .loc 1 3935 8 is_stmt 0 view .LVU3056 + 9224 0018 0029 cmp r1, #0 + 9225 001a 4DD0 beq .L536 +3935:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { + 9226 .loc 1 3935 25 discriminator 1 view .LVU3057 + 9227 001c 002A cmp r2, #0 + 9228 001e 4BD0 beq .L536 +3942:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 9229 .loc 1 3942 5 is_stmt 1 view .LVU3058 +3942:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 9230 .loc 1 3942 5 view .LVU3059 + 9231 0020 4023 movs r3, #64 + 9232 0022 E35C ldrb r3, [r4, r3] + 9233 0024 012B cmp r3, #1 + 9234 0026 00D1 bne .LCB8763 + 9235 0028 AFE0 b .L546 @long jump + 9236 .LCB8763: +3942:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 9237 .loc 1 3942 5 discriminator 2 view .LVU3060 + 9238 002a 4023 movs r3, #64 + 9239 002c 0122 movs r2, #1 + 9240 .LVL679: +3942:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 9241 .loc 1 3942 5 is_stmt 0 discriminator 2 view .LVU3061 + 9242 002e E254 strb r2, [r4, r3] +3942:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 9243 .loc 1 3942 5 is_stmt 1 discriminator 2 view .LVU3062 +3945:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 9244 .loc 1 3945 5 view .LVU3063 + ARM GAS /tmp/ccuRhBPx.s page 341 + + + 9245 0030 5749 ldr r1, .L552 + 9246 .LVL680: +3945:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 9247 .loc 1 3945 5 is_stmt 0 view .LVU3064 + 9248 0032 2000 movs r0, r4 + 9249 0034 FFF7FEFF bl I2C_Disable_IRQ + 9250 .LVL681: +3949:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { + 9251 .loc 1 3949 5 is_stmt 1 view .LVU3065 +3949:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { + 9252 .loc 1 3949 13 is_stmt 0 view .LVU3066 + 9253 0038 4123 movs r3, #65 + 9254 003a E35C ldrb r3, [r4, r3] +3949:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { + 9255 .loc 1 3949 8 view .LVU3067 + 9256 003c 2A2B cmp r3, #42 + 9257 003e 40D0 beq .L550 +3974:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { + 9258 .loc 1 3974 10 is_stmt 1 view .LVU3068 +3974:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { + 9259 .loc 1 3974 18 is_stmt 0 view .LVU3069 + 9260 0040 4123 movs r3, #65 + 9261 0042 E35C ldrb r3, [r4, r3] +3974:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { + 9262 .loc 1 3974 13 view .LVU3070 + 9263 0044 292B cmp r3, #41 + 9264 0046 57D0 beq .L551 + 9265 .L539: +3999:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 9266 .loc 1 3999 5 is_stmt 1 view .LVU3071 +4001:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->Mode = HAL_I2C_MODE_SLAVE; + 9267 .loc 1 4001 5 view .LVU3072 +4001:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->Mode = HAL_I2C_MODE_SLAVE; + 9268 .loc 1 4001 21 is_stmt 0 view .LVU3073 + 9269 0048 4123 movs r3, #65 + 9270 004a 2922 movs r2, #41 + 9271 004c E254 strb r2, [r4, r3] +4002:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->ErrorCode = HAL_I2C_ERROR_NONE; + 9272 .loc 1 4002 5 is_stmt 1 view .LVU3074 +4002:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->ErrorCode = HAL_I2C_ERROR_NONE; + 9273 .loc 1 4002 21 is_stmt 0 view .LVU3075 + 9274 004e 0133 adds r3, r3, #1 + 9275 0050 093A subs r2, r2, #9 + 9276 0052 E254 strb r2, [r4, r3] +4003:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 9277 .loc 1 4003 5 is_stmt 1 view .LVU3076 +4003:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 9278 .loc 1 4003 21 is_stmt 0 view .LVU3077 + 9279 0054 0023 movs r3, #0 + 9280 0056 6364 str r3, [r4, #68] +4006:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 9281 .loc 1 4006 5 is_stmt 1 view .LVU3078 +4006:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 9282 .loc 1 4006 9 is_stmt 0 view .LVU3079 + 9283 0058 2268 ldr r2, [r4] +4006:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 9284 .loc 1 4006 19 view .LVU3080 + ARM GAS /tmp/ccuRhBPx.s page 342 + + + 9285 005a 5368 ldr r3, [r2, #4] +4006:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 9286 .loc 1 4006 25 view .LVU3081 + 9287 005c 4D49 ldr r1, .L552+4 + 9288 005e 0B40 ands r3, r1 + 9289 0060 5360 str r3, [r2, #4] +4009:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->XferCount = Size; + 9290 .loc 1 4009 5 is_stmt 1 view .LVU3082 +4009:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->XferCount = Size; + 9291 .loc 1 4009 23 is_stmt 0 view .LVU3083 + 9292 0062 6762 str r7, [r4, #36] +4010:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->XferSize = hi2c->XferCount; + 9293 .loc 1 4010 5 is_stmt 1 view .LVU3084 +4010:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->XferSize = hi2c->XferCount; + 9294 .loc 1 4010 23 is_stmt 0 view .LVU3085 + 9295 0064 6585 strh r5, [r4, #42] +4011:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->XferOptions = XferOptions; + 9296 .loc 1 4011 5 is_stmt 1 view .LVU3086 +4011:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->XferOptions = XferOptions; + 9297 .loc 1 4011 29 is_stmt 0 view .LVU3087 + 9298 0066 638D ldrh r3, [r4, #42] +4011:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->XferOptions = XferOptions; + 9299 .loc 1 4011 23 view .LVU3088 + 9300 0068 2385 strh r3, [r4, #40] +4012:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->XferISR = I2C_Slave_ISR_DMA; + 9301 .loc 1 4012 5 is_stmt 1 view .LVU3089 +4012:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->XferISR = I2C_Slave_ISR_DMA; + 9302 .loc 1 4012 23 is_stmt 0 view .LVU3090 + 9303 006a E662 str r6, [r4, #44] +4013:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 9304 .loc 1 4013 5 is_stmt 1 view .LVU3091 +4013:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 9305 .loc 1 4013 23 is_stmt 0 view .LVU3092 + 9306 006c 4A4B ldr r3, .L552+8 + 9307 006e 6363 str r3, [r4, #52] +4015:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { + 9308 .loc 1 4015 5 is_stmt 1 view .LVU3093 +4015:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { + 9309 .loc 1 4015 13 is_stmt 0 view .LVU3094 + 9310 0070 A36B ldr r3, [r4, #56] +4015:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { + 9311 .loc 1 4015 8 view .LVU3095 + 9312 0072 002B cmp r3, #0 + 9313 0074 56D0 beq .L540 +4018:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 9314 .loc 1 4018 7 is_stmt 1 view .LVU3096 +4018:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 9315 .loc 1 4018 38 is_stmt 0 view .LVU3097 + 9316 0076 494A ldr r2, .L552+12 + 9317 0078 9A62 str r2, [r3, #40] +4021:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 9318 .loc 1 4021 7 is_stmt 1 view .LVU3098 +4021:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 9319 .loc 1 4021 11 is_stmt 0 view .LVU3099 + 9320 007a A36B ldr r3, [r4, #56] +4021:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 9321 .loc 1 4021 39 view .LVU3100 + ARM GAS /tmp/ccuRhBPx.s page 343 + + + 9322 007c 484A ldr r2, .L552+16 + 9323 007e 1A63 str r2, [r3, #48] +4024:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->hdmatx->XferAbortCallback = NULL; + 9324 .loc 1 4024 7 is_stmt 1 view .LVU3101 +4024:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->hdmatx->XferAbortCallback = NULL; + 9325 .loc 1 4024 11 is_stmt 0 view .LVU3102 + 9326 0080 A26B ldr r2, [r4, #56] +4024:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->hdmatx->XferAbortCallback = NULL; + 9327 .loc 1 4024 42 view .LVU3103 + 9328 0082 0023 movs r3, #0 + 9329 0084 D362 str r3, [r2, #44] +4025:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 9330 .loc 1 4025 7 is_stmt 1 view .LVU3104 +4025:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 9331 .loc 1 4025 11 is_stmt 0 view .LVU3105 + 9332 0086 A26B ldr r2, [r4, #56] +4025:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 9333 .loc 1 4025 39 view .LVU3106 + 9334 0088 5363 str r3, [r2, #52] +4028:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->XferSize); + 9335 .loc 1 4028 7 is_stmt 1 view .LVU3107 +4028:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->XferSize); + 9336 .loc 1 4028 86 is_stmt 0 view .LVU3108 + 9337 008a 2268 ldr r2, [r4] +4028:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->XferSize); + 9338 .loc 1 4028 81 view .LVU3109 + 9339 008c 2832 adds r2, r2, #40 +4029:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } + 9340 .loc 1 4029 44 view .LVU3110 + 9341 008e 238D ldrh r3, [r4, #40] +4028:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->XferSize); + 9342 .loc 1 4028 23 view .LVU3111 + 9343 0090 A06B ldr r0, [r4, #56] + 9344 0092 3900 movs r1, r7 + 9345 0094 FFF7FEFF bl HAL_DMA_Start_IT + 9346 .LVL682: + 9347 0098 051E subs r5, r0, #0 + 9348 .LVL683: +4046:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { + 9349 .loc 1 4046 5 is_stmt 1 view .LVU3112 +4046:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { + 9350 .loc 1 4046 8 is_stmt 0 view .LVU3113 + 9351 009a 51D0 beq .L541 +4057:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->Mode = HAL_I2C_MODE_NONE; + 9352 .loc 1 4057 7 is_stmt 1 view .LVU3114 +4057:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->Mode = HAL_I2C_MODE_NONE; + 9353 .loc 1 4057 23 is_stmt 0 view .LVU3115 + 9354 009c 4123 movs r3, #65 + 9355 009e 2822 movs r2, #40 + 9356 00a0 E254 strb r2, [r4, r3] +4058:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 9357 .loc 1 4058 7 is_stmt 1 view .LVU3116 +4058:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 9358 .loc 1 4058 23 is_stmt 0 view .LVU3117 + 9359 00a2 0022 movs r2, #0 + 9360 00a4 0133 adds r3, r3, #1 + 9361 00a6 E254 strb r2, [r4, r3] + ARM GAS /tmp/ccuRhBPx.s page 344 + + +4061:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 9362 .loc 1 4061 7 is_stmt 1 view .LVU3118 +4061:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 9363 .loc 1 4061 11 is_stmt 0 view .LVU3119 + 9364 00a8 636C ldr r3, [r4, #68] +4061:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 9365 .loc 1 4061 23 view .LVU3120 + 9366 00aa 1021 movs r1, #16 + 9367 00ac 0B43 orrs r3, r1 + 9368 00ae 6364 str r3, [r4, #68] +4064:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 9369 .loc 1 4064 7 is_stmt 1 view .LVU3121 +4064:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 9370 .loc 1 4064 7 view .LVU3122 + 9371 00b0 4023 movs r3, #64 + 9372 00b2 E254 strb r2, [r4, r3] +4064:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 9373 .loc 1 4064 7 view .LVU3123 +4066:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } + 9374 .loc 1 4066 7 view .LVU3124 +4066:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } + 9375 .loc 1 4066 14 is_stmt 0 view .LVU3125 + 9376 00b4 0125 movs r5, #1 + 9377 00b6 66E0 b .L535 + 9378 .LVL684: + 9379 .L536: +3937:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** return HAL_ERROR; + 9380 .loc 1 3937 7 is_stmt 1 view .LVU3126 +3937:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** return HAL_ERROR; + 9381 .loc 1 3937 23 is_stmt 0 view .LVU3127 + 9382 00b8 8023 movs r3, #128 + 9383 00ba 9B00 lsls r3, r3, #2 + 9384 00bc 6364 str r3, [r4, #68] +3938:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } + 9385 .loc 1 3938 7 is_stmt 1 view .LVU3128 +3938:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } + 9386 .loc 1 3938 15 is_stmt 0 view .LVU3129 + 9387 00be 0125 movs r5, #1 + 9388 00c0 61E0 b .L535 + 9389 .LVL685: + 9390 .L550: +3952:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 9391 .loc 1 3952 7 is_stmt 1 view .LVU3130 + 9392 00c2 0221 movs r1, #2 + 9393 00c4 2000 movs r0, r4 + 9394 00c6 FFF7FEFF bl I2C_Disable_IRQ + 9395 .LVL686: +3954:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { + 9396 .loc 1 3954 7 view .LVU3131 +3954:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { + 9397 .loc 1 3954 16 is_stmt 0 view .LVU3132 + 9398 00ca 2268 ldr r2, [r4] +3954:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { + 9399 .loc 1 3954 26 view .LVU3133 + 9400 00cc 1368 ldr r3, [r2] +3954:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { + 9401 .loc 1 3954 10 view .LVU3134 + ARM GAS /tmp/ccuRhBPx.s page 345 + + + 9402 00ce 1B04 lsls r3, r3, #16 + 9403 00d0 BAD5 bpl .L539 +3957:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { + 9404 .loc 1 3957 9 is_stmt 1 view .LVU3135 +3957:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { + 9405 .loc 1 3957 17 is_stmt 0 view .LVU3136 + 9406 00d2 E36B ldr r3, [r4, #60] +3957:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { + 9407 .loc 1 3957 12 view .LVU3137 + 9408 00d4 002B cmp r3, #0 + 9409 00d6 B7D0 beq .L539 +3959:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 9410 .loc 1 3959 11 is_stmt 1 view .LVU3138 +3959:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 9411 .loc 1 3959 25 is_stmt 0 view .LVU3139 + 9412 00d8 1368 ldr r3, [r2] +3959:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 9413 .loc 1 3959 31 view .LVU3140 + 9414 00da 2E49 ldr r1, .L552+4 + 9415 00dc 0B40 ands r3, r1 + 9416 00de 1360 str r3, [r2] +3963:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 9417 .loc 1 3963 11 is_stmt 1 view .LVU3141 +3963:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 9418 .loc 1 3963 15 is_stmt 0 view .LVU3142 + 9419 00e0 E36B ldr r3, [r4, #60] +3963:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 9420 .loc 1 3963 43 view .LVU3143 + 9421 00e2 304A ldr r2, .L552+20 + 9422 00e4 5A63 str r2, [r3, #52] +3966:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { + 9423 .loc 1 3966 11 is_stmt 1 view .LVU3144 +3966:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { + 9424 .loc 1 3966 15 is_stmt 0 view .LVU3145 + 9425 00e6 E06B ldr r0, [r4, #60] + 9426 00e8 FFF7FEFF bl HAL_DMA_Abort_IT + 9427 .LVL687: +3966:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { + 9428 .loc 1 3966 14 discriminator 1 view .LVU3146 + 9429 00ec 0028 cmp r0, #0 + 9430 00ee ABD0 beq .L539 +3969:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } + 9431 .loc 1 3969 13 is_stmt 1 view .LVU3147 +3969:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } + 9432 .loc 1 3969 17 is_stmt 0 view .LVU3148 + 9433 00f0 E06B ldr r0, [r4, #60] +3969:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } + 9434 .loc 1 3969 25 view .LVU3149 + 9435 00f2 436B ldr r3, [r0, #52] +3969:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } + 9436 .loc 1 3969 13 view .LVU3150 + 9437 00f4 9847 blx r3 + 9438 .LVL688: + 9439 00f6 A7E7 b .L539 + 9440 .L551: +3976:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { + 9441 .loc 1 3976 7 is_stmt 1 view .LVU3151 + ARM GAS /tmp/ccuRhBPx.s page 346 + + +3976:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { + 9442 .loc 1 3976 16 is_stmt 0 view .LVU3152 + 9443 00f8 2368 ldr r3, [r4] +3976:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { + 9444 .loc 1 3976 26 view .LVU3153 + 9445 00fa 1A68 ldr r2, [r3] +3976:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { + 9446 .loc 1 3976 10 view .LVU3154 + 9447 00fc 5204 lsls r2, r2, #17 + 9448 00fe A3D5 bpl .L539 +3978:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 9449 .loc 1 3978 9 is_stmt 1 view .LVU3155 +3978:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 9450 .loc 1 3978 23 is_stmt 0 view .LVU3156 + 9451 0100 1A68 ldr r2, [r3] +3978:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 9452 .loc 1 3978 29 view .LVU3157 + 9453 0102 2949 ldr r1, .L552+24 + 9454 0104 0A40 ands r2, r1 + 9455 0106 1A60 str r2, [r3] +3981:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { + 9456 .loc 1 3981 9 is_stmt 1 view .LVU3158 +3981:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { + 9457 .loc 1 3981 17 is_stmt 0 view .LVU3159 + 9458 0108 A36B ldr r3, [r4, #56] +3981:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { + 9459 .loc 1 3981 12 view .LVU3160 + 9460 010a 002B cmp r3, #0 + 9461 010c 9CD0 beq .L539 +3985:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 9462 .loc 1 3985 11 is_stmt 1 view .LVU3161 +3985:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 9463 .loc 1 3985 43 is_stmt 0 view .LVU3162 + 9464 010e 254A ldr r2, .L552+20 + 9465 0110 5A63 str r2, [r3, #52] +3988:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { + 9466 .loc 1 3988 11 is_stmt 1 view .LVU3163 +3988:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { + 9467 .loc 1 3988 15 is_stmt 0 view .LVU3164 + 9468 0112 A06B ldr r0, [r4, #56] + 9469 0114 FFF7FEFF bl HAL_DMA_Abort_IT + 9470 .LVL689: +3988:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { + 9471 .loc 1 3988 14 discriminator 1 view .LVU3165 + 9472 0118 0028 cmp r0, #0 + 9473 011a 95D0 beq .L539 +3991:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } + 9474 .loc 1 3991 13 is_stmt 1 view .LVU3166 +3991:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } + 9475 .loc 1 3991 17 is_stmt 0 view .LVU3167 + 9476 011c A06B ldr r0, [r4, #56] +3991:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } + 9477 .loc 1 3991 25 view .LVU3168 + 9478 011e 436B ldr r3, [r0, #52] +3991:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } + 9479 .loc 1 3991 13 view .LVU3169 + 9480 0120 9847 blx r3 + ARM GAS /tmp/ccuRhBPx.s page 347 + + + 9481 .LVL690: + 9482 0122 91E7 b .L539 + 9483 .L540: +4034:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->Mode = HAL_I2C_MODE_NONE; + 9484 .loc 1 4034 7 is_stmt 1 view .LVU3170 +4034:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->Mode = HAL_I2C_MODE_NONE; + 9485 .loc 1 4034 23 is_stmt 0 view .LVU3171 + 9486 0124 4123 movs r3, #65 + 9487 0126 2822 movs r2, #40 + 9488 0128 E254 strb r2, [r4, r3] +4035:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 9489 .loc 1 4035 7 is_stmt 1 view .LVU3172 +4035:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 9490 .loc 1 4035 23 is_stmt 0 view .LVU3173 + 9491 012a 0022 movs r2, #0 + 9492 012c 0133 adds r3, r3, #1 + 9493 012e E254 strb r2, [r4, r3] +4038:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 9494 .loc 1 4038 7 is_stmt 1 view .LVU3174 +4038:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 9495 .loc 1 4038 11 is_stmt 0 view .LVU3175 + 9496 0130 636C ldr r3, [r4, #68] +4038:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 9497 .loc 1 4038 23 view .LVU3176 + 9498 0132 8021 movs r1, #128 + 9499 0134 0B43 orrs r3, r1 + 9500 0136 6364 str r3, [r4, #68] +4041:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 9501 .loc 1 4041 7 is_stmt 1 view .LVU3177 +4041:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 9502 .loc 1 4041 7 view .LVU3178 + 9503 0138 4023 movs r3, #64 + 9504 013a E254 strb r2, [r4, r3] +4041:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 9505 .loc 1 4041 7 view .LVU3179 +4043:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } + 9506 .loc 1 4043 7 view .LVU3180 +4043:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } + 9507 .loc 1 4043 14 is_stmt 0 view .LVU3181 + 9508 013c 0125 movs r5, #1 + 9509 .LVL691: +4043:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } + 9510 .loc 1 4043 14 view .LVU3182 + 9511 013e 22E0 b .L535 + 9512 .LVL692: + 9513 .L541: +4049:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 9514 .loc 1 4049 7 is_stmt 1 view .LVU3183 +4049:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 9515 .loc 1 4049 11 is_stmt 0 view .LVU3184 + 9516 0140 638D ldrh r3, [r4, #42] +4049:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 9517 .loc 1 4049 30 view .LVU3185 + 9518 0142 228D ldrh r2, [r4, #40] +4049:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 9519 .loc 1 4049 23 view .LVU3186 + 9520 0144 9B1A subs r3, r3, r2 + ARM GAS /tmp/ccuRhBPx.s page 348 + + + 9521 0146 9BB2 uxth r3, r3 + 9522 0148 6385 strh r3, [r4, #42] +4052:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } + 9523 .loc 1 4052 7 is_stmt 1 view .LVU3187 +4052:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } + 9524 .loc 1 4052 22 is_stmt 0 view .LVU3188 + 9525 014a 0023 movs r3, #0 + 9526 014c 2385 strh r3, [r4, #40] +4069:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** if ((I2C_GET_DIR(hi2c) == I2C_DIRECTION_RECEIVE) && (tmp != RESET)) + 9527 .loc 1 4069 5 is_stmt 1 view .LVU3189 +4069:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** if ((I2C_GET_DIR(hi2c) == I2C_DIRECTION_RECEIVE) && (tmp != RESET)) + 9528 .loc 1 4069 11 is_stmt 0 view .LVU3190 + 9529 014e 2268 ldr r2, [r4] + 9530 0150 9169 ldr r1, [r2, #24] + 9531 0152 0833 adds r3, r3, #8 + 9532 0154 0B40 ands r3, r1 + 9533 .LVL693: +4070:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { + 9534 .loc 1 4070 5 is_stmt 1 view .LVU3191 +4070:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { + 9535 .loc 1 4070 10 is_stmt 0 view .LVU3192 + 9536 0156 9169 ldr r1, [r2, #24] +4070:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { + 9537 .loc 1 4070 8 view .LVU3193 + 9538 0158 C903 lsls r1, r1, #15 + 9539 015a 0ED4 bmi .L543 + 9540 .LVL694: + 9541 .L544: +4078:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 9542 .loc 1 4078 5 is_stmt 1 view .LVU3194 +4078:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 9543 .loc 1 4078 5 view .LVU3195 + 9544 015c 4023 movs r3, #64 + 9545 015e 0022 movs r2, #0 +4078:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 9546 .loc 1 4078 5 is_stmt 0 view .LVU3196 + 9547 0160 E254 strb r2, [r4, r3] +4078:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 9548 .loc 1 4078 5 is_stmt 1 view .LVU3197 +4081:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 9549 .loc 1 4081 5 view .LVU3198 +4081:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 9550 .loc 1 4081 9 is_stmt 0 view .LVU3199 + 9551 0162 2268 ldr r2, [r4] +4081:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 9552 .loc 1 4081 19 view .LVU3200 + 9553 0164 1168 ldr r1, [r2] +4081:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 9554 .loc 1 4081 25 view .LVU3201 + 9555 0166 8023 movs r3, #128 + 9556 0168 DB01 lsls r3, r3, #7 + 9557 016a 0B43 orrs r3, r1 + 9558 016c 1360 str r3, [r2] +4087:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 9559 .loc 1 4087 5 is_stmt 1 view .LVU3202 + 9560 016e 8021 movs r1, #128 + 9561 0170 0902 lsls r1, r1, #8 + ARM GAS /tmp/ccuRhBPx.s page 349 + + + 9562 0172 2000 movs r0, r4 + 9563 .LVL695: +4087:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 9564 .loc 1 4087 5 is_stmt 0 view .LVU3203 + 9565 0174 FFF7FEFF bl I2C_Enable_IRQ + 9566 .LVL696: +4089:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } + 9567 .loc 1 4089 5 is_stmt 1 view .LVU3204 +4089:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } + 9568 .loc 1 4089 12 is_stmt 0 view .LVU3205 + 9569 0178 05E0 b .L535 + 9570 .LVL697: + 9571 .L543: +4070:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { + 9572 .loc 1 4070 54 discriminator 1 view .LVU3206 + 9573 017a 002B cmp r3, #0 + 9574 017c EED0 beq .L544 +4074:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } + 9575 .loc 1 4074 7 is_stmt 1 view .LVU3207 + 9576 017e 0823 movs r3, #8 + 9577 .LVL698: +4074:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } + 9578 .loc 1 4074 7 is_stmt 0 view .LVU3208 + 9579 0180 D361 str r3, [r2, #28] + 9580 0182 EBE7 b .L544 + 9581 .LVL699: + 9582 .L545: +4093:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } + 9583 .loc 1 4093 12 view .LVU3209 + 9584 0184 0125 movs r5, #1 + 9585 .LVL700: + 9586 .L535: +4095:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 9587 .loc 1 4095 1 view .LVU3210 + 9588 0186 2800 movs r0, r5 + 9589 @ sp needed + 9590 .LVL701: + 9591 .LVL702: + 9592 .LVL703: +4095:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 9593 .loc 1 4095 1 view .LVU3211 + 9594 0188 F8BD pop {r3, r4, r5, r6, r7, pc} + 9595 .LVL704: + 9596 .L546: +3942:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 9597 .loc 1 3942 5 discriminator 1 view .LVU3212 + 9598 018a 0225 movs r5, #2 + 9599 018c FBE7 b .L535 + 9600 .L553: + 9601 018e C046 .align 2 + 9602 .L552: + 9603 0190 01800000 .word 32769 + 9604 0194 FF7FFFFF .word -32769 + 9605 0198 00000000 .word I2C_Slave_ISR_DMA + 9606 019c 00000000 .word I2C_DMASlaveTransmitCplt + 9607 01a0 00000000 .word I2C_DMAError + 9608 01a4 00000000 .word I2C_DMAAbort + ARM GAS /tmp/ccuRhBPx.s page 350 + + + 9609 01a8 FFBFFFFF .word -16385 + 9610 .cfi_endproc + 9611 .LFE68: + 9613 .section .text.HAL_I2C_Slave_Seq_Receive_IT,"ax",%progbits + 9614 .align 1 + 9615 .global HAL_I2C_Slave_Seq_Receive_IT + 9616 .syntax unified + 9617 .code 16 + 9618 .thumb_func + 9620 HAL_I2C_Slave_Seq_Receive_IT: + 9621 .LVL705: + 9622 .LFB69: +4109:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* Declaration of tmp to prevent undefined behavior of volatile usage */ + 9623 .loc 1 4109 1 is_stmt 1 view -0 + 9624 .cfi_startproc + 9625 @ args = 0, pretend = 0, frame = 0 + 9626 @ frame_needed = 0, uses_anonymous_args = 0 +4109:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* Declaration of tmp to prevent undefined behavior of volatile usage */ + 9627 .loc 1 4109 1 is_stmt 0 view .LVU3214 + 9628 0000 F8B5 push {r3, r4, r5, r6, r7, lr} + 9629 .cfi_def_cfa_offset 24 + 9630 .cfi_offset 3, -24 + 9631 .cfi_offset 4, -20 + 9632 .cfi_offset 5, -16 + 9633 .cfi_offset 6, -12 + 9634 .cfi_offset 7, -8 + 9635 .cfi_offset 14, -4 + 9636 0002 0400 movs r4, r0 + 9637 0004 0D00 movs r5, r1 + 9638 0006 1600 movs r6, r2 + 9639 0008 1F00 movs r7, r3 +4111:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 9640 .loc 1 4111 3 is_stmt 1 view .LVU3215 +4114:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 9641 .loc 1 4114 3 view .LVU3216 +4116:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { + 9642 .loc 1 4116 3 view .LVU3217 +4116:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { + 9643 .loc 1 4116 22 is_stmt 0 view .LVU3218 + 9644 000a 4123 movs r3, #65 + 9645 .LVL706: +4116:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { + 9646 .loc 1 4116 22 view .LVU3219 + 9647 000c C35C ldrb r3, [r0, r3] +4116:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { + 9648 .loc 1 4116 6 view .LVU3220 + 9649 000e 2822 movs r2, #40 + 9650 .LVL707: +4116:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { + 9651 .loc 1 4116 6 view .LVU3221 + 9652 0010 1340 ands r3, r2 + 9653 0012 282B cmp r3, #40 + 9654 0014 58D1 bne .L560 +4118:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { + 9655 .loc 1 4118 5 is_stmt 1 view .LVU3222 +4118:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { + 9656 .loc 1 4118 8 is_stmt 0 view .LVU3223 + ARM GAS /tmp/ccuRhBPx.s page 351 + + + 9657 0016 0029 cmp r1, #0 + 9658 0018 01D0 beq .L556 +4118:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { + 9659 .loc 1 4118 25 discriminator 1 view .LVU3224 + 9660 001a 002E cmp r6, #0 + 9661 001c 04D1 bne .L557 + 9662 .L556: +4120:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** return HAL_ERROR; + 9663 .loc 1 4120 7 is_stmt 1 view .LVU3225 +4120:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** return HAL_ERROR; + 9664 .loc 1 4120 23 is_stmt 0 view .LVU3226 + 9665 001e 8023 movs r3, #128 + 9666 0020 9B00 lsls r3, r3, #2 + 9667 0022 6364 str r3, [r4, #68] +4121:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } + 9668 .loc 1 4121 7 is_stmt 1 view .LVU3227 +4121:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } + 9669 .loc 1 4121 15 is_stmt 0 view .LVU3228 + 9670 0024 0120 movs r0, #1 + 9671 .LVL708: +4121:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } + 9672 .loc 1 4121 15 view .LVU3229 + 9673 0026 50E0 b .L555 + 9674 .LVL709: + 9675 .L557: +4125:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 9676 .loc 1 4125 5 is_stmt 1 view .LVU3230 + 9677 0028 2949 ldr r1, .L565 + 9678 .LVL710: +4125:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 9679 .loc 1 4125 5 is_stmt 0 view .LVU3231 + 9680 002a FFF7FEFF bl I2C_Disable_IRQ + 9681 .LVL711: +4128:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 9682 .loc 1 4128 5 is_stmt 1 view .LVU3232 +4128:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 9683 .loc 1 4128 5 view .LVU3233 + 9684 002e 4023 movs r3, #64 + 9685 0030 E35C ldrb r3, [r4, r3] + 9686 0032 012B cmp r3, #1 + 9687 0034 4AD0 beq .L561 +4128:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 9688 .loc 1 4128 5 discriminator 2 view .LVU3234 + 9689 0036 4023 movs r3, #64 + 9690 0038 0122 movs r2, #1 + 9691 003a E254 strb r2, [r4, r3] +4128:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 9692 .loc 1 4128 5 discriminator 2 view .LVU3235 +4132:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { + 9693 .loc 1 4132 5 view .LVU3236 +4132:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { + 9694 .loc 1 4132 13 is_stmt 0 view .LVU3237 + 9695 003c 0133 adds r3, r3, #1 + 9696 003e E35C ldrb r3, [r4, r3] +4132:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { + 9697 .loc 1 4132 8 view .LVU3238 + 9698 0040 292B cmp r3, #41 + ARM GAS /tmp/ccuRhBPx.s page 352 + + + 9699 0042 27D0 beq .L564 + 9700 .L558: +4158:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->Mode = HAL_I2C_MODE_SLAVE; + 9701 .loc 1 4158 5 is_stmt 1 view .LVU3239 +4158:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->Mode = HAL_I2C_MODE_SLAVE; + 9702 .loc 1 4158 21 is_stmt 0 view .LVU3240 + 9703 0044 4123 movs r3, #65 + 9704 0046 2A22 movs r2, #42 + 9705 0048 E254 strb r2, [r4, r3] +4159:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->ErrorCode = HAL_I2C_ERROR_NONE; + 9706 .loc 1 4159 5 is_stmt 1 view .LVU3241 +4159:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->ErrorCode = HAL_I2C_ERROR_NONE; + 9707 .loc 1 4159 21 is_stmt 0 view .LVU3242 + 9708 004a 0133 adds r3, r3, #1 + 9709 004c 0A3A subs r2, r2, #10 + 9710 004e E254 strb r2, [r4, r3] +4160:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 9711 .loc 1 4160 5 is_stmt 1 view .LVU3243 +4160:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 9712 .loc 1 4160 21 is_stmt 0 view .LVU3244 + 9713 0050 0023 movs r3, #0 + 9714 0052 6364 str r3, [r4, #68] +4163:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 9715 .loc 1 4163 5 is_stmt 1 view .LVU3245 +4163:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 9716 .loc 1 4163 9 is_stmt 0 view .LVU3246 + 9717 0054 2268 ldr r2, [r4] +4163:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 9718 .loc 1 4163 19 view .LVU3247 + 9719 0056 5368 ldr r3, [r2, #4] +4163:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 9720 .loc 1 4163 25 view .LVU3248 + 9721 0058 1E49 ldr r1, .L565+4 + 9722 005a 0B40 ands r3, r1 + 9723 005c 5360 str r3, [r2, #4] +4166:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->XferCount = Size; + 9724 .loc 1 4166 5 is_stmt 1 view .LVU3249 +4166:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->XferCount = Size; + 9725 .loc 1 4166 23 is_stmt 0 view .LVU3250 + 9726 005e 6562 str r5, [r4, #36] +4167:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->XferSize = hi2c->XferCount; + 9727 .loc 1 4167 5 is_stmt 1 view .LVU3251 +4167:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->XferSize = hi2c->XferCount; + 9728 .loc 1 4167 23 is_stmt 0 view .LVU3252 + 9729 0060 6685 strh r6, [r4, #42] +4168:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->XferOptions = XferOptions; + 9730 .loc 1 4168 5 is_stmt 1 view .LVU3253 +4168:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->XferOptions = XferOptions; + 9731 .loc 1 4168 29 is_stmt 0 view .LVU3254 + 9732 0062 638D ldrh r3, [r4, #42] +4168:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->XferOptions = XferOptions; + 9733 .loc 1 4168 23 view .LVU3255 + 9734 0064 2385 strh r3, [r4, #40] +4169:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->XferISR = I2C_Slave_ISR_IT; + 9735 .loc 1 4169 5 is_stmt 1 view .LVU3256 +4169:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->XferISR = I2C_Slave_ISR_IT; + 9736 .loc 1 4169 23 is_stmt 0 view .LVU3257 + ARM GAS /tmp/ccuRhBPx.s page 353 + + + 9737 0066 E762 str r7, [r4, #44] +4170:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 9738 .loc 1 4170 5 is_stmt 1 view .LVU3258 +4170:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 9739 .loc 1 4170 23 is_stmt 0 view .LVU3259 + 9740 0068 1B4B ldr r3, .L565+8 + 9741 006a 6363 str r3, [r4, #52] +4172:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** if ((I2C_GET_DIR(hi2c) == I2C_DIRECTION_TRANSMIT) && (tmp != RESET)) + 9742 .loc 1 4172 5 is_stmt 1 view .LVU3260 +4172:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** if ((I2C_GET_DIR(hi2c) == I2C_DIRECTION_TRANSMIT) && (tmp != RESET)) + 9743 .loc 1 4172 11 is_stmt 0 view .LVU3261 + 9744 006c 2268 ldr r2, [r4] + 9745 006e 9169 ldr r1, [r2, #24] + 9746 0070 0823 movs r3, #8 + 9747 0072 0B40 ands r3, r1 + 9748 .LVL712: +4173:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { + 9749 .loc 1 4173 5 is_stmt 1 view .LVU3262 +4173:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { + 9750 .loc 1 4173 10 is_stmt 0 view .LVU3263 + 9751 0074 9169 ldr r1, [r2, #24] +4173:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { + 9752 .loc 1 4173 8 view .LVU3264 + 9753 0076 C903 lsls r1, r1, #15 + 9754 0078 03D4 bmi .L559 +4173:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { + 9755 .loc 1 4173 55 discriminator 1 view .LVU3265 + 9756 007a 002B cmp r3, #0 + 9757 007c 01D0 beq .L559 +4177:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } + 9758 .loc 1 4177 7 is_stmt 1 view .LVU3266 + 9759 007e 0823 movs r3, #8 + 9760 .LVL713: +4177:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } + 9761 .loc 1 4177 7 is_stmt 0 view .LVU3267 + 9762 0080 D361 str r3, [r2, #28] + 9763 .L559: +4181:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 9764 .loc 1 4181 5 is_stmt 1 view .LVU3268 +4181:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 9765 .loc 1 4181 5 view .LVU3269 + 9766 0082 4023 movs r3, #64 + 9767 0084 0022 movs r2, #0 + 9768 0086 E254 strb r2, [r4, r3] +4181:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 9769 .loc 1 4181 5 view .LVU3270 +4187:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 9770 .loc 1 4187 5 view .LVU3271 + 9771 0088 1149 ldr r1, .L565 + 9772 008a 2000 movs r0, r4 + 9773 008c FFF7FEFF bl I2C_Enable_IRQ + 9774 .LVL714: +4189:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } + 9775 .loc 1 4189 5 view .LVU3272 +4189:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } + 9776 .loc 1 4189 12 is_stmt 0 view .LVU3273 + 9777 0090 0020 movs r0, #0 + ARM GAS /tmp/ccuRhBPx.s page 354 + + + 9778 0092 1AE0 b .L555 + 9779 .LVL715: + 9780 .L564: +4135:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 9781 .loc 1 4135 7 is_stmt 1 view .LVU3274 + 9782 0094 0121 movs r1, #1 + 9783 0096 2000 movs r0, r4 + 9784 0098 FFF7FEFF bl I2C_Disable_IRQ + 9785 .LVL716: +4137:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { + 9786 .loc 1 4137 7 view .LVU3275 +4137:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { + 9787 .loc 1 4137 16 is_stmt 0 view .LVU3276 + 9788 009c 2268 ldr r2, [r4] +4137:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { + 9789 .loc 1 4137 26 view .LVU3277 + 9790 009e 1368 ldr r3, [r2] +4137:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { + 9791 .loc 1 4137 10 view .LVU3278 + 9792 00a0 5B04 lsls r3, r3, #17 + 9793 00a2 CFD5 bpl .L558 +4139:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 9794 .loc 1 4139 9 is_stmt 1 view .LVU3279 +4139:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 9795 .loc 1 4139 23 is_stmt 0 view .LVU3280 + 9796 00a4 1368 ldr r3, [r2] +4139:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 9797 .loc 1 4139 29 view .LVU3281 + 9798 00a6 0D49 ldr r1, .L565+12 + 9799 00a8 0B40 ands r3, r1 + 9800 00aa 1360 str r3, [r2] +4142:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { + 9801 .loc 1 4142 9 is_stmt 1 view .LVU3282 +4142:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { + 9802 .loc 1 4142 17 is_stmt 0 view .LVU3283 + 9803 00ac A36B ldr r3, [r4, #56] +4142:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { + 9804 .loc 1 4142 12 view .LVU3284 + 9805 00ae 002B cmp r3, #0 + 9806 00b0 C8D0 beq .L558 +4146:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 9807 .loc 1 4146 11 is_stmt 1 view .LVU3285 +4146:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 9808 .loc 1 4146 43 is_stmt 0 view .LVU3286 + 9809 00b2 0B4A ldr r2, .L565+16 + 9810 00b4 5A63 str r2, [r3, #52] +4149:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { + 9811 .loc 1 4149 11 is_stmt 1 view .LVU3287 +4149:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { + 9812 .loc 1 4149 15 is_stmt 0 view .LVU3288 + 9813 00b6 A06B ldr r0, [r4, #56] + 9814 00b8 FFF7FEFF bl HAL_DMA_Abort_IT + 9815 .LVL717: +4149:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { + 9816 .loc 1 4149 14 discriminator 1 view .LVU3289 + 9817 00bc 0028 cmp r0, #0 + 9818 00be C1D0 beq .L558 + ARM GAS /tmp/ccuRhBPx.s page 355 + + +4152:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } + 9819 .loc 1 4152 13 is_stmt 1 view .LVU3290 +4152:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } + 9820 .loc 1 4152 17 is_stmt 0 view .LVU3291 + 9821 00c0 A06B ldr r0, [r4, #56] +4152:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } + 9822 .loc 1 4152 25 view .LVU3292 + 9823 00c2 436B ldr r3, [r0, #52] +4152:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } + 9824 .loc 1 4152 13 view .LVU3293 + 9825 00c4 9847 blx r3 + 9826 .LVL718: + 9827 00c6 BDE7 b .L558 + 9828 .LVL719: + 9829 .L560: +4193:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } + 9830 .loc 1 4193 12 view .LVU3294 + 9831 00c8 0120 movs r0, #1 + 9832 .LVL720: + 9833 .L555: +4195:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 9834 .loc 1 4195 1 view .LVU3295 + 9835 @ sp needed + 9836 .LVL721: + 9837 .LVL722: + 9838 .LVL723: + 9839 .LVL724: +4195:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 9840 .loc 1 4195 1 view .LVU3296 + 9841 00ca F8BD pop {r3, r4, r5, r6, r7, pc} + 9842 .LVL725: + 9843 .L561: +4128:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 9844 .loc 1 4128 5 discriminator 1 view .LVU3297 + 9845 00cc 0220 movs r0, #2 + 9846 00ce FCE7 b .L555 + 9847 .L566: + 9848 .align 2 + 9849 .L565: + 9850 00d0 02800000 .word 32770 + 9851 00d4 FF7FFFFF .word -32769 + 9852 00d8 00000000 .word I2C_Slave_ISR_IT + 9853 00dc FFBFFFFF .word -16385 + 9854 00e0 00000000 .word I2C_DMAAbort + 9855 .cfi_endproc + 9856 .LFE69: + 9858 .section .text.HAL_I2C_Slave_Seq_Receive_DMA,"ax",%progbits + 9859 .align 1 + 9860 .global HAL_I2C_Slave_Seq_Receive_DMA + 9861 .syntax unified + 9862 .code 16 + 9863 .thumb_func + 9865 HAL_I2C_Slave_Seq_Receive_DMA: + 9866 .LVL726: + 9867 .LFB70: +4209:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* Declaration of tmp to prevent undefined behavior of volatile usage */ + 9868 .loc 1 4209 1 is_stmt 1 view -0 + ARM GAS /tmp/ccuRhBPx.s page 356 + + + 9869 .cfi_startproc + 9870 @ args = 0, pretend = 0, frame = 0 + 9871 @ frame_needed = 0, uses_anonymous_args = 0 +4209:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* Declaration of tmp to prevent undefined behavior of volatile usage */ + 9872 .loc 1 4209 1 is_stmt 0 view .LVU3299 + 9873 0000 F8B5 push {r3, r4, r5, r6, r7, lr} + 9874 .cfi_def_cfa_offset 24 + 9875 .cfi_offset 3, -24 + 9876 .cfi_offset 4, -20 + 9877 .cfi_offset 5, -16 + 9878 .cfi_offset 6, -12 + 9879 .cfi_offset 7, -8 + 9880 .cfi_offset 14, -4 + 9881 0002 0400 movs r4, r0 + 9882 0004 0F00 movs r7, r1 + 9883 0006 1500 movs r5, r2 + 9884 0008 1E00 movs r6, r3 +4211:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** HAL_StatusTypeDef dmaxferstatus; + 9885 .loc 1 4211 3 is_stmt 1 view .LVU3300 +4212:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 9886 .loc 1 4212 3 view .LVU3301 +4215:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 9887 .loc 1 4215 3 view .LVU3302 +4217:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { + 9888 .loc 1 4217 3 view .LVU3303 +4217:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { + 9889 .loc 1 4217 22 is_stmt 0 view .LVU3304 + 9890 000a 4123 movs r3, #65 + 9891 .LVL727: +4217:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { + 9892 .loc 1 4217 22 view .LVU3305 + 9893 000c C05C ldrb r0, [r0, r3] + 9894 .LVL728: +4217:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { + 9895 .loc 1 4217 6 view .LVU3306 + 9896 000e 193B subs r3, r3, #25 + 9897 0010 1840 ands r0, r3 + 9898 0012 2828 cmp r0, #40 + 9899 0014 00D0 beq .LCB9366 + 9900 0016 B4E0 b .L578 @long jump + 9901 .LCB9366: +4219:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { + 9902 .loc 1 4219 5 is_stmt 1 view .LVU3307 +4219:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { + 9903 .loc 1 4219 8 is_stmt 0 view .LVU3308 + 9904 0018 0029 cmp r1, #0 + 9905 001a 01D0 beq .L569 +4219:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { + 9906 .loc 1 4219 25 discriminator 1 view .LVU3309 + 9907 001c 002A cmp r2, #0 + 9908 001e 04D1 bne .L570 + 9909 .L569: +4221:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** return HAL_ERROR; + 9910 .loc 1 4221 7 is_stmt 1 view .LVU3310 +4221:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** return HAL_ERROR; + 9911 .loc 1 4221 23 is_stmt 0 view .LVU3311 + 9912 0020 8023 movs r3, #128 + ARM GAS /tmp/ccuRhBPx.s page 357 + + + 9913 0022 9B00 lsls r3, r3, #2 + 9914 0024 6364 str r3, [r4, #68] +4222:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } + 9915 .loc 1 4222 7 is_stmt 1 view .LVU3312 +4222:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } + 9916 .loc 1 4222 15 is_stmt 0 view .LVU3313 + 9917 0026 0125 movs r5, #1 + 9918 0028 ACE0 b .L568 + 9919 .L570: +4226:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 9920 .loc 1 4226 5 is_stmt 1 view .LVU3314 + 9921 002a 5849 ldr r1, .L585 + 9922 .LVL729: +4226:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 9923 .loc 1 4226 5 is_stmt 0 view .LVU3315 + 9924 002c 2000 movs r0, r4 + 9925 002e FFF7FEFF bl I2C_Disable_IRQ + 9926 .LVL730: +4229:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 9927 .loc 1 4229 5 is_stmt 1 view .LVU3316 +4229:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 9928 .loc 1 4229 5 view .LVU3317 + 9929 0032 4023 movs r3, #64 + 9930 0034 E35C ldrb r3, [r4, r3] + 9931 0036 012B cmp r3, #1 + 9932 0038 00D1 bne .LCB9395 + 9933 003a A5E0 b .L579 @long jump + 9934 .LCB9395: +4229:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 9935 .loc 1 4229 5 discriminator 2 view .LVU3318 + 9936 003c 4023 movs r3, #64 + 9937 003e 0122 movs r2, #1 + 9938 0040 E254 strb r2, [r4, r3] +4229:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 9939 .loc 1 4229 5 discriminator 2 view .LVU3319 +4233:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { + 9940 .loc 1 4233 5 view .LVU3320 +4233:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { + 9941 .loc 1 4233 13 is_stmt 0 view .LVU3321 + 9942 0042 0133 adds r3, r3, #1 + 9943 0044 E35C ldrb r3, [r4, r3] +4233:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { + 9944 .loc 1 4233 8 view .LVU3322 + 9945 0046 292B cmp r3, #41 + 9946 0048 3BD0 beq .L583 +4258:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { + 9947 .loc 1 4258 10 is_stmt 1 view .LVU3323 +4258:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { + 9948 .loc 1 4258 18 is_stmt 0 view .LVU3324 + 9949 004a 4123 movs r3, #65 + 9950 004c E35C ldrb r3, [r4, r3] +4258:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { + 9951 .loc 1 4258 13 view .LVU3325 + 9952 004e 2A2B cmp r3, #42 + 9953 0050 52D0 beq .L584 + 9954 .L572: +4283:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + ARM GAS /tmp/ccuRhBPx.s page 358 + + + 9955 .loc 1 4283 5 is_stmt 1 view .LVU3326 +4285:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->Mode = HAL_I2C_MODE_SLAVE; + 9956 .loc 1 4285 5 view .LVU3327 +4285:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->Mode = HAL_I2C_MODE_SLAVE; + 9957 .loc 1 4285 21 is_stmt 0 view .LVU3328 + 9958 0052 4123 movs r3, #65 + 9959 0054 2A22 movs r2, #42 + 9960 0056 E254 strb r2, [r4, r3] +4286:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->ErrorCode = HAL_I2C_ERROR_NONE; + 9961 .loc 1 4286 5 is_stmt 1 view .LVU3329 +4286:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->ErrorCode = HAL_I2C_ERROR_NONE; + 9962 .loc 1 4286 21 is_stmt 0 view .LVU3330 + 9963 0058 0133 adds r3, r3, #1 + 9964 005a 0A3A subs r2, r2, #10 + 9965 005c E254 strb r2, [r4, r3] +4287:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 9966 .loc 1 4287 5 is_stmt 1 view .LVU3331 +4287:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 9967 .loc 1 4287 21 is_stmt 0 view .LVU3332 + 9968 005e 0023 movs r3, #0 + 9969 0060 6364 str r3, [r4, #68] +4290:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 9970 .loc 1 4290 5 is_stmt 1 view .LVU3333 +4290:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 9971 .loc 1 4290 9 is_stmt 0 view .LVU3334 + 9972 0062 2268 ldr r2, [r4] +4290:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 9973 .loc 1 4290 19 view .LVU3335 + 9974 0064 5368 ldr r3, [r2, #4] +4290:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 9975 .loc 1 4290 25 view .LVU3336 + 9976 0066 4A49 ldr r1, .L585+4 + 9977 0068 0B40 ands r3, r1 + 9978 006a 5360 str r3, [r2, #4] +4293:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->XferCount = Size; + 9979 .loc 1 4293 5 is_stmt 1 view .LVU3337 +4293:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->XferCount = Size; + 9980 .loc 1 4293 23 is_stmt 0 view .LVU3338 + 9981 006c 6762 str r7, [r4, #36] +4294:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->XferSize = hi2c->XferCount; + 9982 .loc 1 4294 5 is_stmt 1 view .LVU3339 +4294:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->XferSize = hi2c->XferCount; + 9983 .loc 1 4294 23 is_stmt 0 view .LVU3340 + 9984 006e 6585 strh r5, [r4, #42] +4295:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->XferOptions = XferOptions; + 9985 .loc 1 4295 5 is_stmt 1 view .LVU3341 +4295:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->XferOptions = XferOptions; + 9986 .loc 1 4295 29 is_stmt 0 view .LVU3342 + 9987 0070 638D ldrh r3, [r4, #42] +4295:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->XferOptions = XferOptions; + 9988 .loc 1 4295 23 view .LVU3343 + 9989 0072 2385 strh r3, [r4, #40] +4296:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->XferISR = I2C_Slave_ISR_DMA; + 9990 .loc 1 4296 5 is_stmt 1 view .LVU3344 +4296:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->XferISR = I2C_Slave_ISR_DMA; + 9991 .loc 1 4296 23 is_stmt 0 view .LVU3345 + 9992 0074 E662 str r6, [r4, #44] + ARM GAS /tmp/ccuRhBPx.s page 359 + + +4297:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 9993 .loc 1 4297 5 is_stmt 1 view .LVU3346 +4297:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 9994 .loc 1 4297 23 is_stmt 0 view .LVU3347 + 9995 0076 474B ldr r3, .L585+8 + 9996 0078 6363 str r3, [r4, #52] +4299:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { + 9997 .loc 1 4299 5 is_stmt 1 view .LVU3348 +4299:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { + 9998 .loc 1 4299 13 is_stmt 0 view .LVU3349 + 9999 007a E36B ldr r3, [r4, #60] +4299:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { + 10000 .loc 1 4299 8 view .LVU3350 + 10001 007c 002B cmp r3, #0 + 10002 007e 51D0 beq .L573 +4302:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 10003 .loc 1 4302 7 is_stmt 1 view .LVU3351 +4302:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 10004 .loc 1 4302 38 is_stmt 0 view .LVU3352 + 10005 0080 454A ldr r2, .L585+12 + 10006 0082 9A62 str r2, [r3, #40] +4305:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 10007 .loc 1 4305 7 is_stmt 1 view .LVU3353 +4305:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 10008 .loc 1 4305 11 is_stmt 0 view .LVU3354 + 10009 0084 E36B ldr r3, [r4, #60] +4305:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 10010 .loc 1 4305 39 view .LVU3355 + 10011 0086 454A ldr r2, .L585+16 + 10012 0088 1A63 str r2, [r3, #48] +4308:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->hdmarx->XferAbortCallback = NULL; + 10013 .loc 1 4308 7 is_stmt 1 view .LVU3356 +4308:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->hdmarx->XferAbortCallback = NULL; + 10014 .loc 1 4308 11 is_stmt 0 view .LVU3357 + 10015 008a E26B ldr r2, [r4, #60] +4308:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->hdmarx->XferAbortCallback = NULL; + 10016 .loc 1 4308 42 view .LVU3358 + 10017 008c 0023 movs r3, #0 + 10018 008e D362 str r3, [r2, #44] +4309:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 10019 .loc 1 4309 7 is_stmt 1 view .LVU3359 +4309:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 10020 .loc 1 4309 11 is_stmt 0 view .LVU3360 + 10021 0090 E26B ldr r2, [r4, #60] +4309:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 10022 .loc 1 4309 39 view .LVU3361 + 10023 0092 5363 str r3, [r2, #52] +4312:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** (uint32_t)pData, hi2c->XferSize); + 10024 .loc 1 4312 7 is_stmt 1 view .LVU3362 +4312:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** (uint32_t)pData, hi2c->XferSize); + 10025 .loc 1 4312 69 is_stmt 0 view .LVU3363 + 10026 0094 2168 ldr r1, [r4] +4312:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** (uint32_t)pData, hi2c->XferSize); + 10027 .loc 1 4312 64 view .LVU3364 + 10028 0096 2431 adds r1, r1, #36 +4313:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } + 10029 .loc 1 4313 61 view .LVU3365 + ARM GAS /tmp/ccuRhBPx.s page 360 + + + 10030 0098 238D ldrh r3, [r4, #40] +4312:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** (uint32_t)pData, hi2c->XferSize); + 10031 .loc 1 4312 23 view .LVU3366 + 10032 009a E06B ldr r0, [r4, #60] + 10033 009c 3A00 movs r2, r7 + 10034 009e FFF7FEFF bl HAL_DMA_Start_IT + 10035 .LVL731: + 10036 00a2 051E subs r5, r0, #0 + 10037 .LVL732: +4330:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { + 10038 .loc 1 4330 5 is_stmt 1 view .LVU3367 +4330:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { + 10039 .loc 1 4330 8 is_stmt 0 view .LVU3368 + 10040 00a4 4CD0 beq .L574 +4341:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->Mode = HAL_I2C_MODE_NONE; + 10041 .loc 1 4341 7 is_stmt 1 view .LVU3369 +4341:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->Mode = HAL_I2C_MODE_NONE; + 10042 .loc 1 4341 23 is_stmt 0 view .LVU3370 + 10043 00a6 4123 movs r3, #65 + 10044 00a8 2822 movs r2, #40 + 10045 00aa E254 strb r2, [r4, r3] +4342:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 10046 .loc 1 4342 7 is_stmt 1 view .LVU3371 +4342:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 10047 .loc 1 4342 23 is_stmt 0 view .LVU3372 + 10048 00ac 0022 movs r2, #0 + 10049 00ae 0133 adds r3, r3, #1 + 10050 00b0 E254 strb r2, [r4, r3] +4345:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 10051 .loc 1 4345 7 is_stmt 1 view .LVU3373 +4345:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 10052 .loc 1 4345 11 is_stmt 0 view .LVU3374 + 10053 00b2 636C ldr r3, [r4, #68] +4345:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 10054 .loc 1 4345 23 view .LVU3375 + 10055 00b4 1021 movs r1, #16 + 10056 00b6 0B43 orrs r3, r1 + 10057 00b8 6364 str r3, [r4, #68] +4348:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 10058 .loc 1 4348 7 is_stmt 1 view .LVU3376 +4348:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 10059 .loc 1 4348 7 view .LVU3377 + 10060 00ba 4023 movs r3, #64 + 10061 00bc E254 strb r2, [r4, r3] +4348:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 10062 .loc 1 4348 7 view .LVU3378 +4350:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } + 10063 .loc 1 4350 7 view .LVU3379 +4350:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } + 10064 .loc 1 4350 14 is_stmt 0 view .LVU3380 + 10065 00be 0125 movs r5, #1 + 10066 00c0 60E0 b .L568 + 10067 .LVL733: + 10068 .L583: +4236:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 10069 .loc 1 4236 7 is_stmt 1 view .LVU3381 + 10070 00c2 0121 movs r1, #1 + ARM GAS /tmp/ccuRhBPx.s page 361 + + + 10071 00c4 2000 movs r0, r4 + 10072 00c6 FFF7FEFF bl I2C_Disable_IRQ + 10073 .LVL734: +4238:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { + 10074 .loc 1 4238 7 view .LVU3382 +4238:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { + 10075 .loc 1 4238 16 is_stmt 0 view .LVU3383 + 10076 00ca 2268 ldr r2, [r4] +4238:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { + 10077 .loc 1 4238 26 view .LVU3384 + 10078 00cc 1368 ldr r3, [r2] +4238:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { + 10079 .loc 1 4238 10 view .LVU3385 + 10080 00ce 5B04 lsls r3, r3, #17 + 10081 00d0 BFD5 bpl .L572 +4241:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { + 10082 .loc 1 4241 9 is_stmt 1 view .LVU3386 +4241:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { + 10083 .loc 1 4241 17 is_stmt 0 view .LVU3387 + 10084 00d2 A36B ldr r3, [r4, #56] +4241:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { + 10085 .loc 1 4241 12 view .LVU3388 + 10086 00d4 002B cmp r3, #0 + 10087 00d6 BCD0 beq .L572 +4243:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 10088 .loc 1 4243 11 is_stmt 1 view .LVU3389 +4243:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 10089 .loc 1 4243 25 is_stmt 0 view .LVU3390 + 10090 00d8 1368 ldr r3, [r2] +4243:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 10091 .loc 1 4243 31 view .LVU3391 + 10092 00da 3149 ldr r1, .L585+20 + 10093 00dc 0B40 ands r3, r1 + 10094 00de 1360 str r3, [r2] +4247:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 10095 .loc 1 4247 11 is_stmt 1 view .LVU3392 +4247:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 10096 .loc 1 4247 15 is_stmt 0 view .LVU3393 + 10097 00e0 A36B ldr r3, [r4, #56] +4247:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 10098 .loc 1 4247 43 view .LVU3394 + 10099 00e2 304A ldr r2, .L585+24 + 10100 00e4 5A63 str r2, [r3, #52] +4250:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { + 10101 .loc 1 4250 11 is_stmt 1 view .LVU3395 +4250:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { + 10102 .loc 1 4250 15 is_stmt 0 view .LVU3396 + 10103 00e6 A06B ldr r0, [r4, #56] + 10104 00e8 FFF7FEFF bl HAL_DMA_Abort_IT + 10105 .LVL735: +4250:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { + 10106 .loc 1 4250 14 discriminator 1 view .LVU3397 + 10107 00ec 0028 cmp r0, #0 + 10108 00ee B0D0 beq .L572 +4253:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } + 10109 .loc 1 4253 13 is_stmt 1 view .LVU3398 +4253:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } + ARM GAS /tmp/ccuRhBPx.s page 362 + + + 10110 .loc 1 4253 17 is_stmt 0 view .LVU3399 + 10111 00f0 A06B ldr r0, [r4, #56] +4253:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } + 10112 .loc 1 4253 25 view .LVU3400 + 10113 00f2 436B ldr r3, [r0, #52] +4253:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } + 10114 .loc 1 4253 13 view .LVU3401 + 10115 00f4 9847 blx r3 + 10116 .LVL736: + 10117 00f6 ACE7 b .L572 + 10118 .L584: +4260:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { + 10119 .loc 1 4260 7 is_stmt 1 view .LVU3402 +4260:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { + 10120 .loc 1 4260 16 is_stmt 0 view .LVU3403 + 10121 00f8 2268 ldr r2, [r4] +4260:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { + 10122 .loc 1 4260 26 view .LVU3404 + 10123 00fa 1368 ldr r3, [r2] +4260:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { + 10124 .loc 1 4260 10 view .LVU3405 + 10125 00fc 1B04 lsls r3, r3, #16 + 10126 00fe A8D5 bpl .L572 +4262:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 10127 .loc 1 4262 9 is_stmt 1 view .LVU3406 +4262:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 10128 .loc 1 4262 23 is_stmt 0 view .LVU3407 + 10129 0100 1368 ldr r3, [r2] +4262:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 10130 .loc 1 4262 29 view .LVU3408 + 10131 0102 2349 ldr r1, .L585+4 + 10132 0104 0B40 ands r3, r1 + 10133 0106 1360 str r3, [r2] +4265:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { + 10134 .loc 1 4265 9 is_stmt 1 view .LVU3409 +4265:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { + 10135 .loc 1 4265 17 is_stmt 0 view .LVU3410 + 10136 0108 E36B ldr r3, [r4, #60] +4265:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { + 10137 .loc 1 4265 12 view .LVU3411 + 10138 010a 002B cmp r3, #0 + 10139 010c A1D0 beq .L572 +4269:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 10140 .loc 1 4269 11 is_stmt 1 view .LVU3412 +4269:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 10141 .loc 1 4269 43 is_stmt 0 view .LVU3413 + 10142 010e 254A ldr r2, .L585+24 + 10143 0110 5A63 str r2, [r3, #52] +4272:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { + 10144 .loc 1 4272 11 is_stmt 1 view .LVU3414 +4272:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { + 10145 .loc 1 4272 15 is_stmt 0 view .LVU3415 + 10146 0112 E06B ldr r0, [r4, #60] + 10147 0114 FFF7FEFF bl HAL_DMA_Abort_IT + 10148 .LVL737: +4272:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { + 10149 .loc 1 4272 14 discriminator 1 view .LVU3416 + ARM GAS /tmp/ccuRhBPx.s page 363 + + + 10150 0118 0028 cmp r0, #0 + 10151 011a 9AD0 beq .L572 +4275:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } + 10152 .loc 1 4275 13 is_stmt 1 view .LVU3417 +4275:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } + 10153 .loc 1 4275 17 is_stmt 0 view .LVU3418 + 10154 011c E06B ldr r0, [r4, #60] +4275:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } + 10155 .loc 1 4275 25 view .LVU3419 + 10156 011e 436B ldr r3, [r0, #52] +4275:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } + 10157 .loc 1 4275 13 view .LVU3420 + 10158 0120 9847 blx r3 + 10159 .LVL738: + 10160 0122 96E7 b .L572 + 10161 .L573: +4318:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->Mode = HAL_I2C_MODE_NONE; + 10162 .loc 1 4318 7 is_stmt 1 view .LVU3421 +4318:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->Mode = HAL_I2C_MODE_NONE; + 10163 .loc 1 4318 23 is_stmt 0 view .LVU3422 + 10164 0124 4123 movs r3, #65 + 10165 0126 2822 movs r2, #40 + 10166 0128 E254 strb r2, [r4, r3] +4319:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 10167 .loc 1 4319 7 is_stmt 1 view .LVU3423 +4319:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 10168 .loc 1 4319 23 is_stmt 0 view .LVU3424 + 10169 012a 0022 movs r2, #0 + 10170 012c 0133 adds r3, r3, #1 + 10171 012e E254 strb r2, [r4, r3] +4322:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 10172 .loc 1 4322 7 is_stmt 1 view .LVU3425 +4322:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 10173 .loc 1 4322 11 is_stmt 0 view .LVU3426 + 10174 0130 636C ldr r3, [r4, #68] +4322:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 10175 .loc 1 4322 23 view .LVU3427 + 10176 0132 8021 movs r1, #128 + 10177 0134 0B43 orrs r3, r1 + 10178 0136 6364 str r3, [r4, #68] +4325:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 10179 .loc 1 4325 7 is_stmt 1 view .LVU3428 +4325:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 10180 .loc 1 4325 7 view .LVU3429 + 10181 0138 4023 movs r3, #64 + 10182 013a E254 strb r2, [r4, r3] +4325:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 10183 .loc 1 4325 7 view .LVU3430 +4327:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } + 10184 .loc 1 4327 7 view .LVU3431 +4327:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } + 10185 .loc 1 4327 14 is_stmt 0 view .LVU3432 + 10186 013c 0125 movs r5, #1 + 10187 013e 21E0 b .L568 + 10188 .LVL739: + 10189 .L574: +4333:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + ARM GAS /tmp/ccuRhBPx.s page 364 + + + 10190 .loc 1 4333 7 is_stmt 1 view .LVU3433 +4333:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 10191 .loc 1 4333 11 is_stmt 0 view .LVU3434 + 10192 0140 638D ldrh r3, [r4, #42] +4333:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 10193 .loc 1 4333 30 view .LVU3435 + 10194 0142 228D ldrh r2, [r4, #40] +4333:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 10195 .loc 1 4333 23 view .LVU3436 + 10196 0144 9B1A subs r3, r3, r2 + 10197 0146 9BB2 uxth r3, r3 + 10198 0148 6385 strh r3, [r4, #42] +4336:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } + 10199 .loc 1 4336 7 is_stmt 1 view .LVU3437 +4336:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } + 10200 .loc 1 4336 22 is_stmt 0 view .LVU3438 + 10201 014a 0023 movs r3, #0 + 10202 014c 2385 strh r3, [r4, #40] +4353:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** if ((I2C_GET_DIR(hi2c) == I2C_DIRECTION_TRANSMIT) && (tmp != RESET)) + 10203 .loc 1 4353 5 is_stmt 1 view .LVU3439 +4353:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** if ((I2C_GET_DIR(hi2c) == I2C_DIRECTION_TRANSMIT) && (tmp != RESET)) + 10204 .loc 1 4353 11 is_stmt 0 view .LVU3440 + 10205 014e 2268 ldr r2, [r4] + 10206 0150 9169 ldr r1, [r2, #24] + 10207 0152 0833 adds r3, r3, #8 + 10208 0154 0B40 ands r3, r1 + 10209 .LVL740: +4354:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { + 10210 .loc 1 4354 5 is_stmt 1 view .LVU3441 +4354:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { + 10211 .loc 1 4354 10 is_stmt 0 view .LVU3442 + 10212 0156 9169 ldr r1, [r2, #24] +4354:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { + 10213 .loc 1 4354 8 view .LVU3443 + 10214 0158 C903 lsls r1, r1, #15 + 10215 015a 0DD5 bpl .L576 + 10216 .LVL741: + 10217 .L577: +4362:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 10218 .loc 1 4362 5 is_stmt 1 view .LVU3444 +4362:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 10219 .loc 1 4362 5 view .LVU3445 + 10220 015c 4023 movs r3, #64 + 10221 015e 0022 movs r2, #0 +4362:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 10222 .loc 1 4362 5 is_stmt 0 view .LVU3446 + 10223 0160 E254 strb r2, [r4, r3] +4362:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 10224 .loc 1 4362 5 is_stmt 1 view .LVU3447 +4365:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 10225 .loc 1 4365 5 view .LVU3448 +4365:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 10226 .loc 1 4365 9 is_stmt 0 view .LVU3449 + 10227 0162 2268 ldr r2, [r4] +4365:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 10228 .loc 1 4365 19 view .LVU3450 + 10229 0164 1168 ldr r1, [r2] + ARM GAS /tmp/ccuRhBPx.s page 365 + + +4365:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 10230 .loc 1 4365 25 view .LVU3451 + 10231 0166 8023 movs r3, #128 + 10232 0168 1B02 lsls r3, r3, #8 + 10233 016a 0B43 orrs r3, r1 + 10234 016c 1360 str r3, [r2] +4371:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 10235 .loc 1 4371 5 is_stmt 1 view .LVU3452 + 10236 016e 0749 ldr r1, .L585 + 10237 0170 2000 movs r0, r4 + 10238 .LVL742: +4371:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 10239 .loc 1 4371 5 is_stmt 0 view .LVU3453 + 10240 0172 FFF7FEFF bl I2C_Enable_IRQ + 10241 .LVL743: +4373:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } + 10242 .loc 1 4373 5 is_stmt 1 view .LVU3454 +4373:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } + 10243 .loc 1 4373 12 is_stmt 0 view .LVU3455 + 10244 0176 05E0 b .L568 + 10245 .LVL744: + 10246 .L576: +4354:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { + 10247 .loc 1 4354 55 discriminator 1 view .LVU3456 + 10248 0178 002B cmp r3, #0 + 10249 017a EFD0 beq .L577 +4358:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } + 10250 .loc 1 4358 7 is_stmt 1 view .LVU3457 + 10251 017c 0823 movs r3, #8 + 10252 .LVL745: +4358:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } + 10253 .loc 1 4358 7 is_stmt 0 view .LVU3458 + 10254 017e D361 str r3, [r2, #28] + 10255 0180 ECE7 b .L577 + 10256 .LVL746: + 10257 .L578: +4377:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } + 10258 .loc 1 4377 12 view .LVU3459 + 10259 0182 0125 movs r5, #1 + 10260 .LVL747: + 10261 .L568: +4379:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 10262 .loc 1 4379 1 view .LVU3460 + 10263 0184 2800 movs r0, r5 + 10264 @ sp needed + 10265 .LVL748: + 10266 .LVL749: + 10267 .LVL750: +4379:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 10268 .loc 1 4379 1 view .LVU3461 + 10269 0186 F8BD pop {r3, r4, r5, r6, r7, pc} + 10270 .LVL751: + 10271 .L579: +4229:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 10272 .loc 1 4229 5 discriminator 1 view .LVU3462 + 10273 0188 0225 movs r5, #2 + 10274 018a FBE7 b .L568 + ARM GAS /tmp/ccuRhBPx.s page 366 + + + 10275 .L586: + 10276 .align 2 + 10277 .L585: + 10278 018c 02800000 .word 32770 + 10279 0190 FF7FFFFF .word -32769 + 10280 0194 00000000 .word I2C_Slave_ISR_DMA + 10281 0198 00000000 .word I2C_DMASlaveReceiveCplt + 10282 019c 00000000 .word I2C_DMAError + 10283 01a0 FFBFFFFF .word -16385 + 10284 01a4 00000000 .word I2C_DMAAbort + 10285 .cfi_endproc + 10286 .LFE70: + 10288 .section .text.HAL_I2C_EnableListen_IT,"ax",%progbits + 10289 .align 1 + 10290 .global HAL_I2C_EnableListen_IT + 10291 .syntax unified + 10292 .code 16 + 10293 .thumb_func + 10295 HAL_I2C_EnableListen_IT: + 10296 .LVL752: + 10297 .LFB71: +4388:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** if (hi2c->State == HAL_I2C_STATE_READY) + 10298 .loc 1 4388 1 is_stmt 1 view -0 + 10299 .cfi_startproc + 10300 @ args = 0, pretend = 0, frame = 0 + 10301 @ frame_needed = 0, uses_anonymous_args = 0 +4388:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** if (hi2c->State == HAL_I2C_STATE_READY) + 10302 .loc 1 4388 1 is_stmt 0 view .LVU3464 + 10303 0000 10B5 push {r4, lr} + 10304 .cfi_def_cfa_offset 8 + 10305 .cfi_offset 4, -8 + 10306 .cfi_offset 14, -4 +4389:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { + 10307 .loc 1 4389 3 is_stmt 1 view .LVU3465 +4389:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { + 10308 .loc 1 4389 11 is_stmt 0 view .LVU3466 + 10309 0002 4123 movs r3, #65 + 10310 0004 C35C ldrb r3, [r0, r3] +4389:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { + 10311 .loc 1 4389 6 view .LVU3467 + 10312 0006 202B cmp r3, #32 + 10313 0008 01D0 beq .L590 +4401:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } + 10314 .loc 1 4401 12 view .LVU3468 + 10315 000a 0220 movs r0, #2 + 10316 .LVL753: + 10317 .L588: +4403:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 10318 .loc 1 4403 1 view .LVU3469 + 10319 @ sp needed + 10320 000c 10BD pop {r4, pc} + 10321 .LVL754: + 10322 .L590: +4391:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->XferISR = I2C_Slave_ISR_IT; + 10323 .loc 1 4391 5 is_stmt 1 view .LVU3470 +4391:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->XferISR = I2C_Slave_ISR_IT; + 10324 .loc 1 4391 17 is_stmt 0 view .LVU3471 + ARM GAS /tmp/ccuRhBPx.s page 367 + + + 10325 000e 2133 adds r3, r3, #33 + 10326 0010 2822 movs r2, #40 + 10327 0012 C254 strb r2, [r0, r3] +4392:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 10328 .loc 1 4392 5 is_stmt 1 view .LVU3472 +4392:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 10329 .loc 1 4392 19 is_stmt 0 view .LVU3473 + 10330 0014 034B ldr r3, .L591 + 10331 0016 4363 str r3, [r0, #52] +4395:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 10332 .loc 1 4395 5 is_stmt 1 view .LVU3474 + 10333 0018 8021 movs r1, #128 + 10334 001a 0902 lsls r1, r1, #8 + 10335 001c FFF7FEFF bl I2C_Enable_IRQ + 10336 .LVL755: +4397:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } + 10337 .loc 1 4397 5 view .LVU3475 +4397:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } + 10338 .loc 1 4397 12 is_stmt 0 view .LVU3476 + 10339 0020 0020 movs r0, #0 + 10340 0022 F3E7 b .L588 + 10341 .L592: + 10342 .align 2 + 10343 .L591: + 10344 0024 00000000 .word I2C_Slave_ISR_IT + 10345 .cfi_endproc + 10346 .LFE71: + 10348 .section .text.HAL_I2C_DisableListen_IT,"ax",%progbits + 10349 .align 1 + 10350 .global HAL_I2C_DisableListen_IT + 10351 .syntax unified + 10352 .code 16 + 10353 .thumb_func + 10355 HAL_I2C_DisableListen_IT: + 10356 .LVL756: + 10357 .LFB72: +4412:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* Declaration of tmp to prevent undefined behavior of volatile usage */ + 10358 .loc 1 4412 1 is_stmt 1 view -0 + 10359 .cfi_startproc + 10360 @ args = 0, pretend = 0, frame = 0 + 10361 @ frame_needed = 0, uses_anonymous_args = 0 +4412:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* Declaration of tmp to prevent undefined behavior of volatile usage */ + 10362 .loc 1 4412 1 is_stmt 0 view .LVU3478 + 10363 0000 70B5 push {r4, r5, r6, lr} + 10364 .cfi_def_cfa_offset 16 + 10365 .cfi_offset 4, -16 + 10366 .cfi_offset 5, -12 + 10367 .cfi_offset 6, -8 + 10368 .cfi_offset 14, -4 +4414:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 10369 .loc 1 4414 3 is_stmt 1 view .LVU3479 +4417:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { + 10370 .loc 1 4417 3 view .LVU3480 +4417:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { + 10371 .loc 1 4417 11 is_stmt 0 view .LVU3481 + 10372 0002 4123 movs r3, #65 + 10373 0004 C35C ldrb r3, [r0, r3] + ARM GAS /tmp/ccuRhBPx.s page 368 + + +4417:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { + 10374 .loc 1 4417 6 view .LVU3482 + 10375 0006 282B cmp r3, #40 + 10376 0008 01D0 beq .L596 +4432:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } + 10377 .loc 1 4432 12 view .LVU3483 + 10378 000a 0220 movs r0, #2 + 10379 .LVL757: + 10380 .L594: +4434:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 10381 .loc 1 4434 1 view .LVU3484 + 10382 @ sp needed + 10383 000c 70BD pop {r4, r5, r6, pc} + 10384 .LVL758: + 10385 .L596: +4419:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->PreviousState = tmp | (uint32_t)(hi2c->Mode); + 10386 .loc 1 4419 5 is_stmt 1 view .LVU3485 +4419:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->PreviousState = tmp | (uint32_t)(hi2c->Mode); + 10387 .loc 1 4419 26 is_stmt 0 view .LVU3486 + 10388 000e 4124 movs r4, #65 + 10389 0010 025D ldrb r2, [r0, r4] + 10390 .LVL759: +4420:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->State = HAL_I2C_STATE_READY; + 10391 .loc 1 4420 5 is_stmt 1 view .LVU3487 +4420:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->State = HAL_I2C_STATE_READY; + 10392 .loc 1 4420 48 is_stmt 0 view .LVU3488 + 10393 0012 4221 movs r1, #66 + 10394 0014 435C ldrb r3, [r0, r1] +4420:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->State = HAL_I2C_STATE_READY; + 10395 .loc 1 4420 31 view .LVU3489 + 10396 0016 0325 movs r5, #3 + 10397 0018 2A40 ands r2, r5 + 10398 .LVL760: +4420:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->State = HAL_I2C_STATE_READY; + 10399 .loc 1 4420 31 view .LVU3490 + 10400 001a 1343 orrs r3, r2 +4420:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->State = HAL_I2C_STATE_READY; + 10401 .loc 1 4420 25 view .LVU3491 + 10402 001c 0363 str r3, [r0, #48] +4421:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->Mode = HAL_I2C_MODE_NONE; + 10403 .loc 1 4421 5 is_stmt 1 view .LVU3492 +4421:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->Mode = HAL_I2C_MODE_NONE; + 10404 .loc 1 4421 17 is_stmt 0 view .LVU3493 + 10405 001e 2023 movs r3, #32 + 10406 0020 0355 strb r3, [r0, r4] +4422:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->XferISR = NULL; + 10407 .loc 1 4422 5 is_stmt 1 view .LVU3494 +4422:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->XferISR = NULL; + 10408 .loc 1 4422 16 is_stmt 0 view .LVU3495 + 10409 0022 0023 movs r3, #0 + 10410 0024 4354 strb r3, [r0, r1] +4423:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 10411 .loc 1 4423 5 is_stmt 1 view .LVU3496 +4423:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 10412 .loc 1 4423 19 is_stmt 0 view .LVU3497 + 10413 0026 4363 str r3, [r0, #52] +4426:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + ARM GAS /tmp/ccuRhBPx.s page 369 + + + 10414 .loc 1 4426 5 is_stmt 1 view .LVU3498 + 10415 0028 3E31 adds r1, r1, #62 + 10416 002a 0902 lsls r1, r1, #8 + 10417 002c FFF7FEFF bl I2C_Disable_IRQ + 10418 .LVL761: +4428:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } + 10419 .loc 1 4428 5 view .LVU3499 +4428:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } + 10420 .loc 1 4428 12 is_stmt 0 view .LVU3500 + 10421 0030 0020 movs r0, #0 + 10422 0032 EBE7 b .L594 + 10423 .cfi_endproc + 10424 .LFE72: + 10426 .section .text.HAL_I2C_Master_Abort_IT,"ax",%progbits + 10427 .align 1 + 10428 .global HAL_I2C_Master_Abort_IT + 10429 .syntax unified + 10430 .code 16 + 10431 .thumb_func + 10433 HAL_I2C_Master_Abort_IT: + 10434 .LVL762: + 10435 .LFB73: +4445:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** if (hi2c->Mode == HAL_I2C_MODE_MASTER) + 10436 .loc 1 4445 1 is_stmt 1 view -0 + 10437 .cfi_startproc + 10438 @ args = 0, pretend = 0, frame = 0 + 10439 @ frame_needed = 0, uses_anonymous_args = 0 +4445:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** if (hi2c->Mode == HAL_I2C_MODE_MASTER) + 10440 .loc 1 4445 1 is_stmt 0 view .LVU3502 + 10441 0000 30B5 push {r4, r5, lr} + 10442 .cfi_def_cfa_offset 12 + 10443 .cfi_offset 4, -12 + 10444 .cfi_offset 5, -8 + 10445 .cfi_offset 14, -4 + 10446 0002 83B0 sub sp, sp, #12 + 10447 .cfi_def_cfa_offset 24 + 10448 0004 0400 movs r4, r0 + 10449 0006 0D00 movs r5, r1 +4446:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { + 10450 .loc 1 4446 3 is_stmt 1 view .LVU3503 +4446:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { + 10451 .loc 1 4446 11 is_stmt 0 view .LVU3504 + 10452 0008 4223 movs r3, #66 + 10453 000a C35C ldrb r3, [r0, r3] +4446:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { + 10454 .loc 1 4446 6 view .LVU3505 + 10455 000c 102B cmp r3, #16 + 10456 000e 2FD1 bne .L601 +4449:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 10457 .loc 1 4449 5 is_stmt 1 view .LVU3506 +4449:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 10458 .loc 1 4449 5 view .LVU3507 + 10459 0010 3033 adds r3, r3, #48 + 10460 0012 C35C ldrb r3, [r0, r3] + 10461 0014 012B cmp r3, #1 + 10462 0016 2ED0 beq .L602 +4449:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + ARM GAS /tmp/ccuRhBPx.s page 370 + + + 10463 .loc 1 4449 5 discriminator 2 view .LVU3508 + 10464 0018 4023 movs r3, #64 + 10465 001a 0122 movs r2, #1 + 10466 001c C254 strb r2, [r0, r3] +4449:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 10467 .loc 1 4449 5 discriminator 2 view .LVU3509 +4452:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { + 10468 .loc 1 4452 5 view .LVU3510 +4452:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { + 10469 .loc 1 4452 13 is_stmt 0 view .LVU3511 + 10470 001e 0133 adds r3, r3, #1 + 10471 0020 C35C ldrb r3, [r0, r3] +4452:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { + 10472 .loc 1 4452 8 view .LVU3512 + 10473 0022 212B cmp r3, #33 + 10474 0024 18D0 beq .L603 +4457:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { + 10475 .loc 1 4457 10 is_stmt 1 view .LVU3513 +4457:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { + 10476 .loc 1 4457 18 is_stmt 0 view .LVU3514 + 10477 0026 4123 movs r3, #65 + 10478 0028 C35C ldrb r3, [r0, r3] +4457:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { + 10479 .loc 1 4457 13 view .LVU3515 + 10480 002a 222B cmp r3, #34 + 10481 002c 1AD0 beq .L604 + 10482 .LVL763: + 10483 .L600: +4465:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 10484 .loc 1 4465 5 is_stmt 1 view .LVU3516 +4468:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 10485 .loc 1 4468 5 view .LVU3517 +4468:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 10486 .loc 1 4468 17 is_stmt 0 view .LVU3518 + 10487 002e 4123 movs r3, #65 + 10488 0030 6022 movs r2, #96 + 10489 0032 E254 strb r2, [r4, r3] +4472:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 10490 .loc 1 4472 5 is_stmt 1 view .LVU3519 + 10491 0034 3F33 adds r3, r3, #63 + 10492 0036 114A ldr r2, .L605 + 10493 0038 0092 str r2, [sp] + 10494 003a 9B04 lsls r3, r3, #18 + 10495 003c 0122 movs r2, #1 + 10496 003e 2900 movs r1, r5 + 10497 0040 2000 movs r0, r4 + 10498 0042 FFF7FEFF bl I2C_TransferConfig + 10499 .LVL764: +4475:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 10500 .loc 1 4475 5 view .LVU3520 +4475:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 10501 .loc 1 4475 5 view .LVU3521 + 10502 0046 4023 movs r3, #64 + 10503 0048 0022 movs r2, #0 + 10504 004a E254 strb r2, [r4, r3] +4475:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 10505 .loc 1 4475 5 view .LVU3522 + ARM GAS /tmp/ccuRhBPx.s page 371 + + +4480:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 10506 .loc 1 4480 5 view .LVU3523 + 10507 004c 2021 movs r1, #32 + 10508 004e 2000 movs r0, r4 + 10509 0050 FFF7FEFF bl I2C_Enable_IRQ + 10510 .LVL765: +4482:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } + 10511 .loc 1 4482 5 view .LVU3524 +4482:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } + 10512 .loc 1 4482 12 is_stmt 0 view .LVU3525 + 10513 0054 0020 movs r0, #0 + 10514 0056 0CE0 b .L598 + 10515 .LVL766: + 10516 .L603: +4454:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->PreviousState = I2C_STATE_MASTER_BUSY_TX; + 10517 .loc 1 4454 7 is_stmt 1 view .LVU3526 + 10518 0058 0121 movs r1, #1 + 10519 .LVL767: +4454:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->PreviousState = I2C_STATE_MASTER_BUSY_TX; + 10520 .loc 1 4454 7 is_stmt 0 view .LVU3527 + 10521 005a FFF7FEFF bl I2C_Disable_IRQ + 10522 .LVL768: +4455:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } + 10523 .loc 1 4455 7 is_stmt 1 view .LVU3528 +4455:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } + 10524 .loc 1 4455 27 is_stmt 0 view .LVU3529 + 10525 005e 1123 movs r3, #17 + 10526 0060 2363 str r3, [r4, #48] + 10527 0062 E4E7 b .L600 + 10528 .LVL769: + 10529 .L604: +4459:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->PreviousState = I2C_STATE_MASTER_BUSY_RX; + 10530 .loc 1 4459 7 is_stmt 1 view .LVU3530 + 10531 0064 0221 movs r1, #2 + 10532 .LVL770: +4459:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->PreviousState = I2C_STATE_MASTER_BUSY_RX; + 10533 .loc 1 4459 7 is_stmt 0 view .LVU3531 + 10534 0066 FFF7FEFF bl I2C_Disable_IRQ + 10535 .LVL771: +4460:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } + 10536 .loc 1 4460 7 is_stmt 1 view .LVU3532 +4460:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } + 10537 .loc 1 4460 27 is_stmt 0 view .LVU3533 + 10538 006a 1223 movs r3, #18 + 10539 006c 2363 str r3, [r4, #48] + 10540 006e DEE7 b .L600 + 10541 .LVL772: + 10542 .L601: +4488:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } + 10543 .loc 1 4488 12 view .LVU3534 + 10544 0070 0120 movs r0, #1 + 10545 .LVL773: + 10546 .L598: +4490:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 10547 .loc 1 4490 1 view .LVU3535 + 10548 0072 03B0 add sp, sp, #12 + 10549 @ sp needed + ARM GAS /tmp/ccuRhBPx.s page 372 + + + 10550 .LVL774: + 10551 .LVL775: +4490:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 10552 .loc 1 4490 1 view .LVU3536 + 10553 0074 30BD pop {r4, r5, pc} + 10554 .LVL776: + 10555 .L602: +4449:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 10556 .loc 1 4449 5 discriminator 1 view .LVU3537 + 10557 0076 0220 movs r0, #2 + 10558 .LVL777: +4449:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 10559 .loc 1 4449 5 discriminator 1 view .LVU3538 + 10560 0078 FBE7 b .L598 + 10561 .L606: + 10562 007a C046 .align 2 + 10563 .L605: + 10564 007c 00400080 .word -2147467264 + 10565 .cfi_endproc + 10566 .LFE73: + 10568 .section .text.HAL_I2C_EV_IRQHandler,"ax",%progbits + 10569 .align 1 + 10570 .global HAL_I2C_EV_IRQHandler + 10571 .syntax unified + 10572 .code 16 + 10573 .thumb_func + 10575 HAL_I2C_EV_IRQHandler: + 10576 .LVL778: + 10577 .LFB74: +4507:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* Get current IT Flags and IT sources value */ + 10578 .loc 1 4507 1 is_stmt 1 view -0 + 10579 .cfi_startproc + 10580 @ args = 0, pretend = 0, frame = 0 + 10581 @ frame_needed = 0, uses_anonymous_args = 0 +4507:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* Get current IT Flags and IT sources value */ + 10582 .loc 1 4507 1 is_stmt 0 view .LVU3540 + 10583 0000 10B5 push {r4, lr} + 10584 .cfi_def_cfa_offset 8 + 10585 .cfi_offset 4, -8 + 10586 .cfi_offset 14, -4 +4509:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** uint32_t itsources = READ_REG(hi2c->Instance->CR1); + 10587 .loc 1 4509 3 is_stmt 1 view .LVU3541 +4509:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** uint32_t itsources = READ_REG(hi2c->Instance->CR1); + 10588 .loc 1 4509 24 is_stmt 0 view .LVU3542 + 10589 0002 0368 ldr r3, [r0] +4509:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** uint32_t itsources = READ_REG(hi2c->Instance->CR1); + 10590 .loc 1 4509 12 view .LVU3543 + 10591 0004 9969 ldr r1, [r3, #24] + 10592 .LVL779: +4510:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 10593 .loc 1 4510 3 is_stmt 1 view .LVU3544 +4510:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 10594 .loc 1 4510 12 is_stmt 0 view .LVU3545 + 10595 0006 1A68 ldr r2, [r3] + 10596 .LVL780: +4513:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { + 10597 .loc 1 4513 3 is_stmt 1 view .LVU3546 + ARM GAS /tmp/ccuRhBPx.s page 373 + + +4513:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { + 10598 .loc 1 4513 11 is_stmt 0 view .LVU3547 + 10599 0008 436B ldr r3, [r0, #52] +4513:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { + 10600 .loc 1 4513 6 view .LVU3548 + 10601 000a 002B cmp r3, #0 + 10602 000c 00D0 beq .L607 +4515:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } + 10603 .loc 1 4515 5 is_stmt 1 view .LVU3549 + 10604 000e 9847 blx r3 + 10605 .LVL781: + 10606 .L607: +4517:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 10607 .loc 1 4517 1 is_stmt 0 view .LVU3550 + 10608 @ sp needed + 10609 0010 10BD pop {r4, pc} + 10610 .cfi_endproc + 10611 .LFE74: + 10613 .section .text.HAL_I2C_MasterTxCpltCallback,"ax",%progbits + 10614 .align 1 + 10615 .weak HAL_I2C_MasterTxCpltCallback + 10616 .syntax unified + 10617 .code 16 + 10618 .thumb_func + 10620 HAL_I2C_MasterTxCpltCallback: + 10621 .LVL782: + 10622 .LFB76: +4578:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* Prevent unused argument(s) compilation warning */ + 10623 .loc 1 4578 1 is_stmt 1 view -0 + 10624 .cfi_startproc + 10625 @ args = 0, pretend = 0, frame = 0 + 10626 @ frame_needed = 0, uses_anonymous_args = 0 + 10627 @ link register save eliminated. +4580:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 10628 .loc 1 4580 3 view .LVU3552 +4585:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 10629 .loc 1 4585 1 is_stmt 0 view .LVU3553 + 10630 @ sp needed + 10631 0000 7047 bx lr + 10632 .cfi_endproc + 10633 .LFE76: + 10635 .section .text.HAL_I2C_MasterRxCpltCallback,"ax",%progbits + 10636 .align 1 + 10637 .weak HAL_I2C_MasterRxCpltCallback + 10638 .syntax unified + 10639 .code 16 + 10640 .thumb_func + 10642 HAL_I2C_MasterRxCpltCallback: + 10643 .LVL783: + 10644 .LFB77: +4594:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* Prevent unused argument(s) compilation warning */ + 10645 .loc 1 4594 1 is_stmt 1 view -0 + 10646 .cfi_startproc + 10647 @ args = 0, pretend = 0, frame = 0 + 10648 @ frame_needed = 0, uses_anonymous_args = 0 + 10649 @ link register save eliminated. +4596:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + ARM GAS /tmp/ccuRhBPx.s page 374 + + + 10650 .loc 1 4596 3 view .LVU3555 +4601:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 10651 .loc 1 4601 1 is_stmt 0 view .LVU3556 + 10652 @ sp needed + 10653 0000 7047 bx lr + 10654 .cfi_endproc + 10655 .LFE77: + 10657 .section .text.I2C_ITMasterSeqCplt,"ax",%progbits + 10658 .align 1 + 10659 .syntax unified + 10660 .code 16 + 10661 .thumb_func + 10663 I2C_ITMasterSeqCplt: + 10664 .LVL784: + 10665 .LFB98: +5855:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* Reset I2C handle mode */ + 10666 .loc 1 5855 1 is_stmt 1 view -0 + 10667 .cfi_startproc + 10668 @ args = 0, pretend = 0, frame = 0 + 10669 @ frame_needed = 0, uses_anonymous_args = 0 +5855:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* Reset I2C handle mode */ + 10670 .loc 1 5855 1 is_stmt 0 view .LVU3558 + 10671 0000 70B5 push {r4, r5, r6, lr} + 10672 .cfi_def_cfa_offset 16 + 10673 .cfi_offset 4, -16 + 10674 .cfi_offset 5, -12 + 10675 .cfi_offset 6, -8 + 10676 .cfi_offset 14, -4 + 10677 0002 0400 movs r4, r0 +5857:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 10678 .loc 1 5857 3 is_stmt 1 view .LVU3559 +5857:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 10679 .loc 1 5857 14 is_stmt 0 view .LVU3560 + 10680 0004 4223 movs r3, #66 + 10681 0006 0022 movs r2, #0 + 10682 0008 C254 strb r2, [r0, r3] +5861:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { + 10683 .loc 1 5861 3 is_stmt 1 view .LVU3561 +5861:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { + 10684 .loc 1 5861 11 is_stmt 0 view .LVU3562 + 10685 000a 013B subs r3, r3, #1 + 10686 000c C35C ldrb r3, [r0, r3] +5861:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { + 10687 .loc 1 5861 6 view .LVU3563 + 10688 000e 212B cmp r3, #33 + 10689 0010 0FD0 beq .L614 +5883:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->PreviousState = I2C_STATE_MASTER_BUSY_RX; + 10690 .loc 1 5883 5 is_stmt 1 view .LVU3564 +5883:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->PreviousState = I2C_STATE_MASTER_BUSY_RX; + 10691 .loc 1 5883 25 is_stmt 0 view .LVU3565 + 10692 0012 4123 movs r3, #65 + 10693 0014 2022 movs r2, #32 + 10694 0016 C254 strb r2, [r0, r3] +5884:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->XferISR = NULL; + 10695 .loc 1 5884 5 is_stmt 1 view .LVU3566 +5884:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->XferISR = NULL; + 10696 .loc 1 5884 25 is_stmt 0 view .LVU3567 + ARM GAS /tmp/ccuRhBPx.s page 375 + + + 10697 0018 2F3B subs r3, r3, #47 + 10698 001a 0363 str r3, [r0, #48] +5885:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 10699 .loc 1 5885 5 is_stmt 1 view .LVU3568 +5885:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 10700 .loc 1 5885 25 is_stmt 0 view .LVU3569 + 10701 001c 0025 movs r5, #0 + 10702 001e 4563 str r5, [r0, #52] +5888:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 10703 .loc 1 5888 5 is_stmt 1 view .LVU3570 + 10704 0020 0221 movs r1, #2 + 10705 0022 FFF7FEFF bl I2C_Disable_IRQ + 10706 .LVL785: +5891:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 10707 .loc 1 5891 5 view .LVU3571 +5891:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 10708 .loc 1 5891 5 view .LVU3572 + 10709 0026 4023 movs r3, #64 + 10710 0028 E554 strb r5, [r4, r3] +5891:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 10711 .loc 1 5891 5 view .LVU3573 +5897:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** #endif /* USE_HAL_I2C_REGISTER_CALLBACKS */ + 10712 .loc 1 5897 5 view .LVU3574 + 10713 002a 2000 movs r0, r4 + 10714 002c FFF7FEFF bl HAL_I2C_MasterRxCpltCallback + 10715 .LVL786: + 10716 .L611: +5900:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 10717 .loc 1 5900 1 is_stmt 0 view .LVU3575 + 10718 @ sp needed + 10719 .LVL787: +5900:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 10720 .loc 1 5900 1 view .LVU3576 + 10721 0030 70BD pop {r4, r5, r6, pc} + 10722 .LVL788: + 10723 .L614: +5863:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->PreviousState = I2C_STATE_MASTER_BUSY_TX; + 10724 .loc 1 5863 5 is_stmt 1 view .LVU3577 +5863:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->PreviousState = I2C_STATE_MASTER_BUSY_TX; + 10725 .loc 1 5863 25 is_stmt 0 view .LVU3578 + 10726 0032 2033 adds r3, r3, #32 + 10727 0034 2032 adds r2, r2, #32 + 10728 0036 C254 strb r2, [r0, r3] +5864:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->XferISR = NULL; + 10729 .loc 1 5864 5 is_stmt 1 view .LVU3579 +5864:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->XferISR = NULL; + 10730 .loc 1 5864 25 is_stmt 0 view .LVU3580 + 10731 0038 303B subs r3, r3, #48 + 10732 003a 0363 str r3, [r0, #48] +5865:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 10733 .loc 1 5865 5 is_stmt 1 view .LVU3581 +5865:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 10734 .loc 1 5865 25 is_stmt 0 view .LVU3582 + 10735 003c 0025 movs r5, #0 + 10736 003e 4563 str r5, [r0, #52] +5868:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 10737 .loc 1 5868 5 is_stmt 1 view .LVU3583 + ARM GAS /tmp/ccuRhBPx.s page 376 + + + 10738 0040 0121 movs r1, #1 + 10739 0042 FFF7FEFF bl I2C_Disable_IRQ + 10740 .LVL789: +5871:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 10741 .loc 1 5871 5 view .LVU3584 +5871:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 10742 .loc 1 5871 5 view .LVU3585 + 10743 0046 4023 movs r3, #64 + 10744 0048 E554 strb r5, [r4, r3] +5871:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 10745 .loc 1 5871 5 view .LVU3586 +5877:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** #endif /* USE_HAL_I2C_REGISTER_CALLBACKS */ + 10746 .loc 1 5877 5 view .LVU3587 + 10747 004a 2000 movs r0, r4 + 10748 004c FFF7FEFF bl HAL_I2C_MasterTxCpltCallback + 10749 .LVL790: + 10750 0050 EEE7 b .L611 + 10751 .cfi_endproc + 10752 .LFE98: + 10754 .section .text.HAL_I2C_SlaveTxCpltCallback,"ax",%progbits + 10755 .align 1 + 10756 .weak HAL_I2C_SlaveTxCpltCallback + 10757 .syntax unified + 10758 .code 16 + 10759 .thumb_func + 10761 HAL_I2C_SlaveTxCpltCallback: + 10762 .LVL791: + 10763 .LFB78: +4609:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* Prevent unused argument(s) compilation warning */ + 10764 .loc 1 4609 1 view -0 + 10765 .cfi_startproc + 10766 @ args = 0, pretend = 0, frame = 0 + 10767 @ frame_needed = 0, uses_anonymous_args = 0 + 10768 @ link register save eliminated. +4611:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 10769 .loc 1 4611 3 view .LVU3589 +4616:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 10770 .loc 1 4616 1 is_stmt 0 view .LVU3590 + 10771 @ sp needed + 10772 0000 7047 bx lr + 10773 .cfi_endproc + 10774 .LFE78: + 10776 .section .text.HAL_I2C_SlaveRxCpltCallback,"ax",%progbits + 10777 .align 1 + 10778 .weak HAL_I2C_SlaveRxCpltCallback + 10779 .syntax unified + 10780 .code 16 + 10781 .thumb_func + 10783 HAL_I2C_SlaveRxCpltCallback: + 10784 .LVL792: + 10785 .LFB79: +4625:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* Prevent unused argument(s) compilation warning */ + 10786 .loc 1 4625 1 is_stmt 1 view -0 + 10787 .cfi_startproc + 10788 @ args = 0, pretend = 0, frame = 0 + 10789 @ frame_needed = 0, uses_anonymous_args = 0 + 10790 @ link register save eliminated. + ARM GAS /tmp/ccuRhBPx.s page 377 + + +4627:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 10791 .loc 1 4627 3 view .LVU3592 +4632:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 10792 .loc 1 4632 1 is_stmt 0 view .LVU3593 + 10793 @ sp needed + 10794 0000 7047 bx lr + 10795 .cfi_endproc + 10796 .LFE79: + 10798 .section .text.I2C_ITSlaveSeqCplt,"ax",%progbits + 10799 .align 1 + 10800 .syntax unified + 10801 .code 16 + 10802 .thumb_func + 10804 I2C_ITSlaveSeqCplt: + 10805 .LVL793: + 10806 .LFB99: +5908:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** uint32_t tmpcr1value = READ_REG(hi2c->Instance->CR1); + 10807 .loc 1 5908 1 is_stmt 1 view -0 + 10808 .cfi_startproc + 10809 @ args = 0, pretend = 0, frame = 0 + 10810 @ frame_needed = 0, uses_anonymous_args = 0 +5908:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** uint32_t tmpcr1value = READ_REG(hi2c->Instance->CR1); + 10811 .loc 1 5908 1 is_stmt 0 view .LVU3595 + 10812 0000 10B5 push {r4, lr} + 10813 .cfi_def_cfa_offset 8 + 10814 .cfi_offset 4, -8 + 10815 .cfi_offset 14, -4 + 10816 0002 0400 movs r4, r0 +5909:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 10817 .loc 1 5909 3 is_stmt 1 view .LVU3596 +5909:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 10818 .loc 1 5909 26 is_stmt 0 view .LVU3597 + 10819 0004 0368 ldr r3, [r0] +5909:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 10820 .loc 1 5909 12 view .LVU3598 + 10821 0006 1A68 ldr r2, [r3] + 10822 .LVL794: +5912:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 10823 .loc 1 5912 3 is_stmt 1 view .LVU3599 +5912:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 10824 .loc 1 5912 14 is_stmt 0 view .LVU3600 + 10825 0008 4221 movs r1, #66 + 10826 000a 0020 movs r0, #0 + 10827 .LVL795: +5912:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 10828 .loc 1 5912 14 view .LVU3601 + 10829 000c 6054 strb r0, [r4, r1] +5915:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { + 10830 .loc 1 5915 3 is_stmt 1 view .LVU3602 +5915:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { + 10831 .loc 1 5915 6 is_stmt 0 view .LVU3603 + 10832 000e 5104 lsls r1, r2, #17 + 10833 0010 0CD5 bpl .L618 +5918:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } + 10834 .loc 1 5918 5 is_stmt 1 view .LVU3604 +5918:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } + 10835 .loc 1 5918 19 is_stmt 0 view .LVU3605 + ARM GAS /tmp/ccuRhBPx.s page 378 + + + 10836 0012 1A68 ldr r2, [r3] + 10837 .LVL796: +5918:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } + 10838 .loc 1 5918 25 view .LVU3606 + 10839 0014 1949 ldr r1, .L625 + 10840 0016 0A40 ands r2, r1 + 10841 0018 1A60 str r2, [r3] + 10842 .L619: +5928:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 10843 .loc 1 5928 3 is_stmt 1 view .LVU3607 +5930:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { + 10844 .loc 1 5930 3 view .LVU3608 +5930:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { + 10845 .loc 1 5930 11 is_stmt 0 view .LVU3609 + 10846 001a 4123 movs r3, #65 + 10847 001c E35C ldrb r3, [r4, r3] +5930:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { + 10848 .loc 1 5930 6 view .LVU3610 + 10849 001e 292B cmp r3, #41 + 10850 0020 0BD0 beq .L623 +5950:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { + 10851 .loc 1 5950 8 is_stmt 1 view .LVU3611 +5950:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { + 10852 .loc 1 5950 16 is_stmt 0 view .LVU3612 + 10853 0022 4123 movs r3, #65 + 10854 0024 E35C ldrb r3, [r4, r3] +5950:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { + 10855 .loc 1 5950 11 view .LVU3613 + 10856 0026 2A2B cmp r3, #42 + 10857 0028 17D0 beq .L624 + 10858 .L617: +5973:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 10859 .loc 1 5973 1 view .LVU3614 + 10860 @ sp needed + 10861 .LVL797: +5973:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 10862 .loc 1 5973 1 view .LVU3615 + 10863 002a 10BD pop {r4, pc} + 10864 .LVL798: + 10865 .L618: +5920:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { + 10866 .loc 1 5920 8 is_stmt 1 view .LVU3616 +5920:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { + 10867 .loc 1 5920 11 is_stmt 0 view .LVU3617 + 10868 002c 1204 lsls r2, r2, #16 + 10869 002e F4D5 bpl .L619 + 10870 .LVL799: +5923:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } + 10871 .loc 1 5923 5 is_stmt 1 view .LVU3618 +5923:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } + 10872 .loc 1 5923 19 is_stmt 0 view .LVU3619 + 10873 0030 1A68 ldr r2, [r3] +5923:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } + 10874 .loc 1 5923 25 view .LVU3620 + 10875 0032 1349 ldr r1, .L625+4 + 10876 0034 0A40 ands r2, r1 + 10877 0036 1A60 str r2, [r3] + ARM GAS /tmp/ccuRhBPx.s page 379 + + + 10878 0038 EFE7 b .L619 + 10879 .L623: +5933:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->PreviousState = I2C_STATE_SLAVE_BUSY_TX; + 10880 .loc 1 5933 5 is_stmt 1 view .LVU3621 +5933:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->PreviousState = I2C_STATE_SLAVE_BUSY_TX; + 10881 .loc 1 5933 25 is_stmt 0 view .LVU3622 + 10882 003a 1833 adds r3, r3, #24 + 10883 003c 2822 movs r2, #40 + 10884 003e E254 strb r2, [r4, r3] +5934:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 10885 .loc 1 5934 5 is_stmt 1 view .LVU3623 +5934:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 10886 .loc 1 5934 25 is_stmt 0 view .LVU3624 + 10887 0040 203B subs r3, r3, #32 + 10888 0042 2363 str r3, [r4, #48] +5937:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 10889 .loc 1 5937 5 is_stmt 1 view .LVU3625 + 10890 0044 0121 movs r1, #1 + 10891 0046 2000 movs r0, r4 + 10892 0048 FFF7FEFF bl I2C_Disable_IRQ + 10893 .LVL800: +5940:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 10894 .loc 1 5940 5 view .LVU3626 +5940:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 10895 .loc 1 5940 5 view .LVU3627 + 10896 004c 4023 movs r3, #64 + 10897 004e 0022 movs r2, #0 + 10898 0050 E254 strb r2, [r4, r3] +5940:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 10899 .loc 1 5940 5 view .LVU3628 +5946:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** #endif /* USE_HAL_I2C_REGISTER_CALLBACKS */ + 10900 .loc 1 5946 5 view .LVU3629 + 10901 0052 2000 movs r0, r4 + 10902 0054 FFF7FEFF bl HAL_I2C_SlaveTxCpltCallback + 10903 .LVL801: + 10904 0058 E7E7 b .L617 + 10905 .L624: +5953:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->PreviousState = I2C_STATE_SLAVE_BUSY_RX; + 10906 .loc 1 5953 5 view .LVU3630 +5953:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->PreviousState = I2C_STATE_SLAVE_BUSY_RX; + 10907 .loc 1 5953 25 is_stmt 0 view .LVU3631 + 10908 005a 1733 adds r3, r3, #23 + 10909 005c 2822 movs r2, #40 + 10910 005e E254 strb r2, [r4, r3] +5954:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 10911 .loc 1 5954 5 is_stmt 1 view .LVU3632 +5954:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 10912 .loc 1 5954 25 is_stmt 0 view .LVU3633 + 10913 0060 1F3B subs r3, r3, #31 + 10914 0062 2363 str r3, [r4, #48] +5957:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 10915 .loc 1 5957 5 is_stmt 1 view .LVU3634 + 10916 0064 0221 movs r1, #2 + 10917 0066 2000 movs r0, r4 + 10918 0068 FFF7FEFF bl I2C_Disable_IRQ + 10919 .LVL802: +5960:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + ARM GAS /tmp/ccuRhBPx.s page 380 + + + 10920 .loc 1 5960 5 view .LVU3635 +5960:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 10921 .loc 1 5960 5 view .LVU3636 + 10922 006c 4023 movs r3, #64 + 10923 006e 0022 movs r2, #0 + 10924 0070 E254 strb r2, [r4, r3] +5960:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 10925 .loc 1 5960 5 view .LVU3637 +5966:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** #endif /* USE_HAL_I2C_REGISTER_CALLBACKS */ + 10926 .loc 1 5966 5 view .LVU3638 + 10927 0072 2000 movs r0, r4 + 10928 0074 FFF7FEFF bl HAL_I2C_SlaveRxCpltCallback + 10929 .LVL803: +5972:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } + 10930 .loc 1 5972 3 view .LVU3639 +5973:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 10931 .loc 1 5973 1 is_stmt 0 view .LVU3640 + 10932 0078 D7E7 b .L617 + 10933 .L626: + 10934 007a C046 .align 2 + 10935 .L625: + 10936 007c FFBFFFFF .word -16385 + 10937 0080 FF7FFFFF .word -32769 + 10938 .cfi_endproc + 10939 .LFE99: + 10941 .section .text.I2C_DMASlaveTransmitCplt,"ax",%progbits + 10942 .align 1 + 10943 .syntax unified + 10944 .code 16 + 10945 .thumb_func + 10947 I2C_DMASlaveTransmitCplt: + 10948 .LVL804: + 10949 .LFB107: +6576:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* Derogation MISRAC2012-Rule-11.5 */ + 10950 .loc 1 6576 1 is_stmt 1 view -0 + 10951 .cfi_startproc + 10952 @ args = 0, pretend = 0, frame = 0 + 10953 @ frame_needed = 0, uses_anonymous_args = 0 +6576:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* Derogation MISRAC2012-Rule-11.5 */ + 10954 .loc 1 6576 1 is_stmt 0 view .LVU3642 + 10955 0000 10B5 push {r4, lr} + 10956 .cfi_def_cfa_offset 8 + 10957 .cfi_offset 4, -8 + 10958 .cfi_offset 14, -4 +6578:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** uint32_t tmpoptions = hi2c->XferOptions; + 10959 .loc 1 6578 3 is_stmt 1 view .LVU3643 +6578:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** uint32_t tmpoptions = hi2c->XferOptions; + 10960 .loc 1 6578 22 is_stmt 0 view .LVU3644 + 10961 0002 406A ldr r0, [r0, #36] + 10962 .LVL805: +6579:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 10963 .loc 1 6579 3 is_stmt 1 view .LVU3645 +6579:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 10964 .loc 1 6579 12 is_stmt 0 view .LVU3646 + 10965 0004 C36A ldr r3, [r0, #44] + 10966 .LVL806: +6581:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { + ARM GAS /tmp/ccuRhBPx.s page 381 + + + 10967 .loc 1 6581 3 is_stmt 1 view .LVU3647 +6581:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { + 10968 .loc 1 6581 6 is_stmt 0 view .LVU3648 + 10969 0006 8022 movs r2, #128 + 10970 0008 5204 lsls r2, r2, #17 + 10971 000a 9342 cmp r3, r2 + 10972 000c 01D0 beq .L628 +6581:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { + 10973 .loc 1 6581 38 discriminator 1 view .LVU3649 + 10974 000e 002B cmp r3, #0 + 10975 0010 06D1 bne .L627 + 10976 .L628: +6584:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 10977 .loc 1 6584 5 is_stmt 1 view .LVU3650 +6584:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 10978 .loc 1 6584 9 is_stmt 0 view .LVU3651 + 10979 0012 0268 ldr r2, [r0] +6584:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 10980 .loc 1 6584 19 view .LVU3652 + 10981 0014 1368 ldr r3, [r2] + 10982 .LVL807: +6584:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 10983 .loc 1 6584 25 view .LVU3653 + 10984 0016 0349 ldr r1, .L630 + 10985 0018 0B40 ands r3, r1 + 10986 001a 1360 str r3, [r2] +6588:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } + 10987 .loc 1 6588 5 is_stmt 1 view .LVU3654 + 10988 001c FFF7FEFF bl I2C_ITSlaveSeqCplt + 10989 .LVL808: + 10990 .L627: +6596:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 10991 .loc 1 6596 1 is_stmt 0 view .LVU3655 + 10992 @ sp needed + 10993 0020 10BD pop {r4, pc} + 10994 .L631: + 10995 0022 C046 .align 2 + 10996 .L630: + 10997 0024 FFBFFFFF .word -16385 + 10998 .cfi_endproc + 10999 .LFE107: + 11001 .section .text.I2C_DMASlaveReceiveCplt,"ax",%progbits + 11002 .align 1 + 11003 .syntax unified + 11004 .code 16 + 11005 .thumb_func + 11007 I2C_DMASlaveReceiveCplt: + 11008 .LVL809: + 11009 .LFB109: +6656:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* Derogation MISRAC2012-Rule-11.5 */ + 11010 .loc 1 6656 1 is_stmt 1 view -0 + 11011 .cfi_startproc + 11012 @ args = 0, pretend = 0, frame = 0 + 11013 @ frame_needed = 0, uses_anonymous_args = 0 +6656:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* Derogation MISRAC2012-Rule-11.5 */ + 11014 .loc 1 6656 1 is_stmt 0 view .LVU3657 + 11015 0000 10B5 push {r4, lr} + ARM GAS /tmp/ccuRhBPx.s page 382 + + + 11016 .cfi_def_cfa_offset 8 + 11017 .cfi_offset 4, -8 + 11018 .cfi_offset 14, -4 +6658:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** uint32_t tmpoptions = hi2c->XferOptions; + 11019 .loc 1 6658 3 is_stmt 1 view .LVU3658 +6658:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** uint32_t tmpoptions = hi2c->XferOptions; + 11020 .loc 1 6658 22 is_stmt 0 view .LVU3659 + 11021 0002 406A ldr r0, [r0, #36] + 11022 .LVL810: +6659:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 11023 .loc 1 6659 3 is_stmt 1 view .LVU3660 +6659:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 11024 .loc 1 6659 12 is_stmt 0 view .LVU3661 + 11025 0004 C26A ldr r2, [r0, #44] + 11026 .LVL811: +6661:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** (tmpoptions != I2C_NO_OPTION_FRAME)) + 11027 .loc 1 6661 3 is_stmt 1 view .LVU3662 +6661:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** (tmpoptions != I2C_NO_OPTION_FRAME)) + 11028 .loc 1 6661 8 is_stmt 0 view .LVU3663 + 11029 0006 C36B ldr r3, [r0, #60] + 11030 0008 1B68 ldr r3, [r3] + 11031 000a 5B68 ldr r3, [r3, #4] +6661:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** (tmpoptions != I2C_NO_OPTION_FRAME)) + 11032 .loc 1 6661 6 view .LVU3664 + 11033 000c 002B cmp r3, #0 + 11034 000e 02D1 bne .L632 +6661:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** (tmpoptions != I2C_NO_OPTION_FRAME)) + 11035 .loc 1 6661 53 discriminator 1 view .LVU3665 + 11036 0010 054B ldr r3, .L635 + 11037 0012 9A42 cmp r2, r3 + 11038 0014 00D1 bne .L634 + 11039 .LVL812: + 11040 .L632: +6676:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 11041 .loc 1 6676 1 view .LVU3666 + 11042 @ sp needed + 11043 0016 10BD pop {r4, pc} + 11044 .LVL813: + 11045 .L634: +6665:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 11046 .loc 1 6665 5 is_stmt 1 view .LVU3667 +6665:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 11047 .loc 1 6665 9 is_stmt 0 view .LVU3668 + 11048 0018 0268 ldr r2, [r0] + 11049 .LVL814: +6665:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 11050 .loc 1 6665 19 view .LVU3669 + 11051 001a 1368 ldr r3, [r2] +6665:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 11052 .loc 1 6665 25 view .LVU3670 + 11053 001c 0349 ldr r1, .L635+4 + 11054 001e 0B40 ands r3, r1 + 11055 0020 1360 str r3, [r2] +6668:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } + 11056 .loc 1 6668 5 is_stmt 1 view .LVU3671 + 11057 0022 FFF7FEFF bl I2C_ITSlaveSeqCplt + 11058 .LVL815: + ARM GAS /tmp/ccuRhBPx.s page 383 + + +6675:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } + 11059 .loc 1 6675 3 view .LVU3672 +6676:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 11060 .loc 1 6676 1 is_stmt 0 view .LVU3673 + 11061 0026 F6E7 b .L632 + 11062 .L636: + 11063 .align 2 + 11064 .L635: + 11065 0028 0000FFFF .word -65536 + 11066 002c FF7FFFFF .word -32769 + 11067 .cfi_endproc + 11068 .LFE109: + 11070 .section .text.HAL_I2C_AddrCallback,"ax",%progbits + 11071 .align 1 + 11072 .weak HAL_I2C_AddrCallback + 11073 .syntax unified + 11074 .code 16 + 11075 .thumb_func + 11077 HAL_I2C_AddrCallback: + 11078 .LVL816: + 11079 .LFB80: +4643:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* Prevent unused argument(s) compilation warning */ + 11080 .loc 1 4643 1 is_stmt 1 view -0 + 11081 .cfi_startproc + 11082 @ args = 0, pretend = 0, frame = 0 + 11083 @ frame_needed = 0, uses_anonymous_args = 0 + 11084 @ link register save eliminated. +4645:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** UNUSED(TransferDirection); + 11085 .loc 1 4645 3 view .LVU3675 +4646:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** UNUSED(AddrMatchCode); + 11086 .loc 1 4646 3 view .LVU3676 +4647:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 11087 .loc 1 4647 3 view .LVU3677 +4652:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 11088 .loc 1 4652 1 is_stmt 0 view .LVU3678 + 11089 @ sp needed + 11090 0000 7047 bx lr + 11091 .cfi_endproc + 11092 .LFE80: + 11094 .section .text.I2C_ITAddrCplt,"ax",%progbits + 11095 .align 1 + 11096 .syntax unified + 11097 .code 16 + 11098 .thumb_func + 11100 I2C_ITAddrCplt: + 11101 .LVL817: + 11102 .LFB97: +5760:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** uint8_t transferdirection; + 11103 .loc 1 5760 1 is_stmt 1 view -0 + 11104 .cfi_startproc + 11105 @ args = 0, pretend = 0, frame = 0 + 11106 @ frame_needed = 0, uses_anonymous_args = 0 +5760:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** uint8_t transferdirection; + 11107 .loc 1 5760 1 is_stmt 0 view .LVU3680 + 11108 0000 F8B5 push {r3, r4, r5, r6, r7, lr} + 11109 .cfi_def_cfa_offset 24 + 11110 .cfi_offset 3, -24 + ARM GAS /tmp/ccuRhBPx.s page 384 + + + 11111 .cfi_offset 4, -20 + 11112 .cfi_offset 5, -16 + 11113 .cfi_offset 6, -12 + 11114 .cfi_offset 7, -8 + 11115 .cfi_offset 14, -4 + 11116 0002 0400 movs r4, r0 +5761:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** uint16_t slaveaddrcode; + 11117 .loc 1 5761 3 is_stmt 1 view .LVU3681 +5762:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** uint16_t ownadd1code; + 11118 .loc 1 5762 3 view .LVU3682 +5763:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** uint16_t ownadd2code; + 11119 .loc 1 5763 3 view .LVU3683 +5764:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 11120 .loc 1 5764 3 view .LVU3684 +5767:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 11121 .loc 1 5767 3 view .LVU3685 +5770:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { + 11122 .loc 1 5770 3 view .LVU3686 +5770:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { + 11123 .loc 1 5770 22 is_stmt 0 view .LVU3687 + 11124 0004 4123 movs r3, #65 + 11125 0006 C35C ldrb r3, [r0, r3] +5770:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { + 11126 .loc 1 5770 6 view .LVU3688 + 11127 0008 2822 movs r2, #40 + 11128 000a 1340 ands r3, r2 + 11129 000c 282B cmp r3, #40 + 11130 000e 06D0 beq .L643 +5842:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 11131 .loc 1 5842 5 is_stmt 1 view .LVU3689 + 11132 0010 0368 ldr r3, [r0] + 11133 0012 0822 movs r2, #8 + 11134 0014 DA61 str r2, [r3, #28] +5845:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } + 11135 .loc 1 5845 5 view .LVU3690 +5845:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } + 11136 .loc 1 5845 5 view .LVU3691 + 11137 0016 4023 movs r3, #64 + 11138 0018 0022 movs r2, #0 + 11139 001a C254 strb r2, [r0, r3] +5845:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } + 11140 .loc 1 5845 5 discriminator 1 view .LVU3692 + 11141 .LVL818: + 11142 .L638: +5847:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 11143 .loc 1 5847 1 is_stmt 0 view .LVU3693 + 11144 @ sp needed + 11145 .LVL819: +5847:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 11146 .loc 1 5847 1 view .LVU3694 + 11147 001c F8BD pop {r3, r4, r5, r6, r7, pc} + 11148 .LVL820: + 11149 .L643: +5772:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** slaveaddrcode = I2C_GET_ADDR_MATCH(hi2c); + 11150 .loc 1 5772 5 is_stmt 1 view .LVU3695 +5772:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** slaveaddrcode = I2C_GET_ADDR_MATCH(hi2c); + 11151 .loc 1 5772 25 is_stmt 0 view .LVU3696 + ARM GAS /tmp/ccuRhBPx.s page 385 + + + 11152 001e 0068 ldr r0, [r0] + 11153 .LVL821: +5772:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** slaveaddrcode = I2C_GET_ADDR_MATCH(hi2c); + 11154 .loc 1 5772 25 view .LVU3697 + 11155 0020 8569 ldr r5, [r0, #24] + 11156 0022 2D0C lsrs r5, r5, #16 +5772:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** slaveaddrcode = I2C_GET_ADDR_MATCH(hi2c); + 11157 .loc 1 5772 23 view .LVU3698 + 11158 0024 273B subs r3, r3, #39 + 11159 0026 1D40 ands r5, r3 + 11160 .LVL822: +5773:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** ownadd1code = I2C_GET_OWN_ADDRESS1(hi2c); + 11161 .loc 1 5773 5 is_stmt 1 view .LVU3699 +5773:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** ownadd1code = I2C_GET_OWN_ADDRESS1(hi2c); + 11162 .loc 1 5773 25 is_stmt 0 view .LVU3700 + 11163 0028 8669 ldr r6, [r0, #24] + 11164 002a 360C lsrs r6, r6, #16 +5773:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** ownadd1code = I2C_GET_OWN_ADDRESS1(hi2c); + 11165 .loc 1 5773 23 view .LVU3701 + 11166 002c FE21 movs r1, #254 + 11167 .LVL823: +5773:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** ownadd1code = I2C_GET_OWN_ADDRESS1(hi2c); + 11168 .loc 1 5773 23 view .LVU3702 + 11169 002e 0E40 ands r6, r1 + 11170 .LVL824: +5774:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** ownadd2code = I2C_GET_OWN_ADDRESS2(hi2c); + 11171 .loc 1 5774 5 is_stmt 1 view .LVU3703 +5774:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** ownadd2code = I2C_GET_OWN_ADDRESS2(hi2c); + 11172 .loc 1 5774 25 is_stmt 0 view .LVU3704 + 11173 0030 8368 ldr r3, [r0, #8] +5774:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** ownadd2code = I2C_GET_OWN_ADDRESS2(hi2c); + 11174 .loc 1 5774 23 view .LVU3705 + 11175 0032 9B05 lsls r3, r3, #22 + 11176 0034 9B0D lsrs r3, r3, #22 + 11177 .LVL825: +5775:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 11178 .loc 1 5775 5 is_stmt 1 view .LVU3706 +5775:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 11179 .loc 1 5775 25 is_stmt 0 view .LVU3707 + 11180 0036 C768 ldr r7, [r0, #12] +5775:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 11181 .loc 1 5775 23 view .LVU3708 + 11182 0038 0F40 ands r7, r1 + 11183 .LVL826: +5778:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { + 11184 .loc 1 5778 5 is_stmt 1 view .LVU3709 +5778:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { + 11185 .loc 1 5778 19 is_stmt 0 view .LVU3710 + 11186 003a E268 ldr r2, [r4, #12] +5778:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { + 11187 .loc 1 5778 8 view .LVU3711 + 11188 003c 022A cmp r2, #2 + 11189 003e 24D1 bne .L640 +5780:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { + 11190 .loc 1 5780 7 is_stmt 1 view .LVU3712 +5780:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { + 11191 .loc 1 5780 44 is_stmt 0 view .LVU3713 + ARM GAS /tmp/ccuRhBPx.s page 386 + + + 11192 0040 DA09 lsrs r2, r3, #7 + 11193 0042 7240 eors r2, r6 +5780:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { + 11194 .loc 1 5780 10 view .LVU3714 + 11195 0044 F839 subs r1, r1, #248 + 11196 0046 1142 tst r1, r2 + 11197 0048 11D1 bne .L641 +5782:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->AddrEventCount++; + 11198 .loc 1 5782 9 is_stmt 1 view .LVU3715 + 11199 .LVL827: +5783:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** if (hi2c->AddrEventCount == 2U) + 11200 .loc 1 5783 9 view .LVU3716 +5783:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** if (hi2c->AddrEventCount == 2U) + 11201 .loc 1 5783 13 is_stmt 0 view .LVU3717 + 11202 004a A26C ldr r2, [r4, #72] +5783:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** if (hi2c->AddrEventCount == 2U) + 11203 .loc 1 5783 29 view .LVU3718 + 11204 004c 0132 adds r2, r2, #1 + 11205 004e A264 str r2, [r4, #72] +5784:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { + 11206 .loc 1 5784 9 is_stmt 1 view .LVU3719 +5784:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { + 11207 .loc 1 5784 17 is_stmt 0 view .LVU3720 + 11208 0050 A26C ldr r2, [r4, #72] +5784:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { + 11209 .loc 1 5784 12 view .LVU3721 + 11210 0052 022A cmp r2, #2 + 11211 0054 E2D1 bne .L638 +5787:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 11212 .loc 1 5787 11 is_stmt 1 view .LVU3722 +5787:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 11213 .loc 1 5787 32 is_stmt 0 view .LVU3723 + 11214 0056 0022 movs r2, #0 + 11215 0058 A264 str r2, [r4, #72] +5790:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 11216 .loc 1 5790 11 is_stmt 1 view .LVU3724 + 11217 005a 0231 adds r1, r1, #2 + 11218 005c C161 str r1, [r0, #28] +5793:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 11219 .loc 1 5793 11 view .LVU3725 +5793:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 11220 .loc 1 5793 11 view .LVU3726 + 11221 005e 3831 adds r1, r1, #56 + 11222 0060 6254 strb r2, [r4, r1] +5793:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 11223 .loc 1 5793 11 view .LVU3727 +5799:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** #endif /* USE_HAL_I2C_REGISTER_CALLBACKS */ + 11224 .loc 1 5799 11 view .LVU3728 + 11225 0062 1A00 movs r2, r3 + 11226 0064 2900 movs r1, r5 + 11227 0066 2000 movs r0, r4 + 11228 0068 FFF7FEFF bl HAL_I2C_AddrCallback + 11229 .LVL828: +5799:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** #endif /* USE_HAL_I2C_REGISTER_CALLBACKS */ + 11230 .loc 1 5799 11 is_stmt 0 view .LVU3729 + 11231 006c D6E7 b .L638 + 11232 .LVL829: + ARM GAS /tmp/ccuRhBPx.s page 387 + + + 11233 .L641: +5805:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 11234 .loc 1 5805 9 is_stmt 1 view .LVU3730 +5808:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 11235 .loc 1 5808 9 view .LVU3731 + 11236 006e 8021 movs r1, #128 + 11237 0070 0902 lsls r1, r1, #8 + 11238 0072 2000 movs r0, r4 + 11239 0074 FFF7FEFF bl I2C_Disable_IRQ + 11240 .LVL830: +5811:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 11241 .loc 1 5811 9 view .LVU3732 +5811:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 11242 .loc 1 5811 9 view .LVU3733 + 11243 0078 4023 movs r3, #64 + 11244 007a 0022 movs r2, #0 + 11245 007c E254 strb r2, [r4, r3] +5811:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 11246 .loc 1 5811 9 view .LVU3734 +5817:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** #endif /* USE_HAL_I2C_REGISTER_CALLBACKS */ + 11247 .loc 1 5817 9 view .LVU3735 + 11248 007e 3A00 movs r2, r7 + 11249 0080 2900 movs r1, r5 + 11250 0082 2000 movs r0, r4 + 11251 0084 FFF7FEFF bl HAL_I2C_AddrCallback + 11252 .LVL831: + 11253 0088 C8E7 b .L638 + 11254 .LVL832: + 11255 .L640: +5825:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 11256 .loc 1 5825 7 view .LVU3736 + 11257 008a 8021 movs r1, #128 + 11258 008c 0902 lsls r1, r1, #8 + 11259 008e 2000 movs r0, r4 + 11260 0090 FFF7FEFF bl I2C_Disable_IRQ + 11261 .LVL833: +5828:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 11262 .loc 1 5828 7 view .LVU3737 +5828:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 11263 .loc 1 5828 7 view .LVU3738 + 11264 0094 4023 movs r3, #64 + 11265 0096 0022 movs r2, #0 + 11266 0098 E254 strb r2, [r4, r3] +5828:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 11267 .loc 1 5828 7 view .LVU3739 +5834:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** #endif /* USE_HAL_I2C_REGISTER_CALLBACKS */ + 11268 .loc 1 5834 7 view .LVU3740 + 11269 009a 3200 movs r2, r6 + 11270 009c 2900 movs r1, r5 + 11271 009e 2000 movs r0, r4 + 11272 00a0 FFF7FEFF bl HAL_I2C_AddrCallback + 11273 .LVL834: + 11274 00a4 BAE7 b .L638 + 11275 .cfi_endproc + 11276 .LFE97: + 11278 .section .text.HAL_I2C_ListenCpltCallback,"ax",%progbits + 11279 .align 1 + ARM GAS /tmp/ccuRhBPx.s page 388 + + + 11280 .weak HAL_I2C_ListenCpltCallback + 11281 .syntax unified + 11282 .code 16 + 11283 .thumb_func + 11285 HAL_I2C_ListenCpltCallback: + 11286 .LVL835: + 11287 .LFB81: +4661:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* Prevent unused argument(s) compilation warning */ + 11288 .loc 1 4661 1 view -0 + 11289 .cfi_startproc + 11290 @ args = 0, pretend = 0, frame = 0 + 11291 @ frame_needed = 0, uses_anonymous_args = 0 + 11292 @ link register save eliminated. +4663:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 11293 .loc 1 4663 3 view .LVU3742 +4668:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 11294 .loc 1 4668 1 is_stmt 0 view .LVU3743 + 11295 @ sp needed + 11296 0000 7047 bx lr + 11297 .cfi_endproc + 11298 .LFE81: + 11300 .section .text.I2C_ITListenCplt,"ax",%progbits + 11301 .align 1 + 11302 .syntax unified + 11303 .code 16 + 11304 .thumb_func + 11306 I2C_ITListenCplt: + 11307 .LVL836: + 11308 .LFB102: +6284:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* Reset handle parameters */ + 11309 .loc 1 6284 1 is_stmt 1 view -0 + 11310 .cfi_startproc + 11311 @ args = 0, pretend = 0, frame = 0 + 11312 @ frame_needed = 0, uses_anonymous_args = 0 +6284:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* Reset handle parameters */ + 11313 .loc 1 6284 1 is_stmt 0 view .LVU3745 + 11314 0000 10B5 push {r4, lr} + 11315 .cfi_def_cfa_offset 8 + 11316 .cfi_offset 4, -8 + 11317 .cfi_offset 14, -4 + 11318 0002 0400 movs r4, r0 +6286:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->PreviousState = I2C_STATE_NONE; + 11319 .loc 1 6286 3 is_stmt 1 view .LVU3746 +6286:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->PreviousState = I2C_STATE_NONE; + 11320 .loc 1 6286 21 is_stmt 0 view .LVU3747 + 11321 0004 164B ldr r3, .L648 + 11322 0006 C362 str r3, [r0, #44] +6287:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->State = HAL_I2C_STATE_READY; + 11323 .loc 1 6287 3 is_stmt 1 view .LVU3748 +6287:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->State = HAL_I2C_STATE_READY; + 11324 .loc 1 6287 23 is_stmt 0 view .LVU3749 + 11325 0008 0023 movs r3, #0 + 11326 000a 0363 str r3, [r0, #48] +6288:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->Mode = HAL_I2C_MODE_NONE; + 11327 .loc 1 6288 3 is_stmt 1 view .LVU3750 +6288:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->Mode = HAL_I2C_MODE_NONE; + 11328 .loc 1 6288 15 is_stmt 0 view .LVU3751 + ARM GAS /tmp/ccuRhBPx.s page 389 + + + 11329 000c 4122 movs r2, #65 + 11330 000e 2020 movs r0, #32 + 11331 .LVL837: +6288:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->Mode = HAL_I2C_MODE_NONE; + 11332 .loc 1 6288 15 view .LVU3752 + 11333 0010 A054 strb r0, [r4, r2] +6289:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->XferISR = NULL; + 11334 .loc 1 6289 3 is_stmt 1 view .LVU3753 +6289:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->XferISR = NULL; + 11335 .loc 1 6289 14 is_stmt 0 view .LVU3754 + 11336 0012 0132 adds r2, r2, #1 + 11337 0014 A354 strb r3, [r4, r2] +6290:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 11338 .loc 1 6290 3 is_stmt 1 view .LVU3755 +6290:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 11339 .loc 1 6290 17 is_stmt 0 view .LVU3756 + 11340 0016 6363 str r3, [r4, #52] +6293:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { + 11341 .loc 1 6293 3 is_stmt 1 view .LVU3757 +6293:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { + 11342 .loc 1 6293 6 is_stmt 0 view .LVU3758 + 11343 0018 4907 lsls r1, r1, #29 + 11344 001a 13D5 bpl .L646 + 11345 .LVL838: +6296:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 11346 .loc 1 6296 5 is_stmt 1 view .LVU3759 +6296:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 11347 .loc 1 6296 36 is_stmt 0 view .LVU3760 + 11348 001c 2368 ldr r3, [r4] +6296:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 11349 .loc 1 6296 46 view .LVU3761 + 11350 001e 5A6A ldr r2, [r3, #36] +6296:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 11351 .loc 1 6296 10 view .LVU3762 + 11352 0020 636A ldr r3, [r4, #36] +6296:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 11353 .loc 1 6296 21 view .LVU3763 + 11354 0022 1A70 strb r2, [r3] +6299:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 11355 .loc 1 6299 5 is_stmt 1 view .LVU3764 +6299:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 11356 .loc 1 6299 9 is_stmt 0 view .LVU3765 + 11357 0024 636A ldr r3, [r4, #36] +6299:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 11358 .loc 1 6299 19 view .LVU3766 + 11359 0026 0133 adds r3, r3, #1 + 11360 0028 6362 str r3, [r4, #36] +6301:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { + 11361 .loc 1 6301 5 is_stmt 1 view .LVU3767 +6301:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { + 11362 .loc 1 6301 14 is_stmt 0 view .LVU3768 + 11363 002a 238D ldrh r3, [r4, #40] +6301:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { + 11364 .loc 1 6301 8 view .LVU3769 + 11365 002c 002B cmp r3, #0 + 11366 002e 09D0 beq .L646 +6303:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->XferCount--; + ARM GAS /tmp/ccuRhBPx.s page 390 + + + 11367 .loc 1 6303 7 is_stmt 1 view .LVU3770 +6303:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->XferCount--; + 11368 .loc 1 6303 21 is_stmt 0 view .LVU3771 + 11369 0030 013B subs r3, r3, #1 + 11370 0032 2385 strh r3, [r4, #40] +6304:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 11371 .loc 1 6304 7 is_stmt 1 view .LVU3772 +6304:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 11372 .loc 1 6304 11 is_stmt 0 view .LVU3773 + 11373 0034 638D ldrh r3, [r4, #42] +6304:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 11374 .loc 1 6304 22 view .LVU3774 + 11375 0036 013B subs r3, r3, #1 + 11376 0038 9BB2 uxth r3, r3 + 11377 003a 6385 strh r3, [r4, #42] +6307:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } + 11378 .loc 1 6307 7 is_stmt 1 view .LVU3775 +6307:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } + 11379 .loc 1 6307 11 is_stmt 0 view .LVU3776 + 11380 003c 636C ldr r3, [r4, #68] +6307:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } + 11381 .loc 1 6307 23 view .LVU3777 + 11382 003e 0422 movs r2, #4 + 11383 0040 1343 orrs r3, r2 + 11384 0042 6364 str r3, [r4, #68] + 11385 .L646: +6312:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 11386 .loc 1 6312 3 is_stmt 1 view .LVU3778 + 11387 0044 0749 ldr r1, .L648+4 + 11388 0046 2000 movs r0, r4 + 11389 0048 FFF7FEFF bl I2C_Disable_IRQ + 11390 .LVL839: +6315:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 11391 .loc 1 6315 3 view .LVU3779 + 11392 004c 2368 ldr r3, [r4] + 11393 004e 1022 movs r2, #16 + 11394 0050 DA61 str r2, [r3, #28] +6318:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 11395 .loc 1 6318 3 view .LVU3780 +6318:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 11396 .loc 1 6318 3 view .LVU3781 + 11397 0052 4023 movs r3, #64 + 11398 0054 0022 movs r2, #0 + 11399 0056 E254 strb r2, [r4, r3] +6318:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 11400 .loc 1 6318 3 view .LVU3782 +6324:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** #endif /* USE_HAL_I2C_REGISTER_CALLBACKS */ + 11401 .loc 1 6324 3 view .LVU3783 + 11402 0058 2000 movs r0, r4 + 11403 005a FFF7FEFF bl HAL_I2C_ListenCpltCallback + 11404 .LVL840: +6326:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 11405 .loc 1 6326 1 is_stmt 0 view .LVU3784 + 11406 @ sp needed + 11407 .LVL841: +6326:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 11408 .loc 1 6326 1 view .LVU3785 + ARM GAS /tmp/ccuRhBPx.s page 391 + + + 11409 005e 10BD pop {r4, pc} + 11410 .L649: + 11411 .align 2 + 11412 .L648: + 11413 0060 0000FFFF .word -65536 + 11414 0064 03800000 .word 32771 + 11415 .cfi_endproc + 11416 .LFE102: + 11418 .section .text.HAL_I2C_MemTxCpltCallback,"ax",%progbits + 11419 .align 1 + 11420 .weak HAL_I2C_MemTxCpltCallback + 11421 .syntax unified + 11422 .code 16 + 11423 .thumb_func + 11425 HAL_I2C_MemTxCpltCallback: + 11426 .LVL842: + 11427 .LFB82: +4677:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* Prevent unused argument(s) compilation warning */ + 11428 .loc 1 4677 1 is_stmt 1 view -0 + 11429 .cfi_startproc + 11430 @ args = 0, pretend = 0, frame = 0 + 11431 @ frame_needed = 0, uses_anonymous_args = 0 + 11432 @ link register save eliminated. +4679:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 11433 .loc 1 4679 3 view .LVU3787 +4684:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 11434 .loc 1 4684 1 is_stmt 0 view .LVU3788 + 11435 @ sp needed + 11436 0000 7047 bx lr + 11437 .cfi_endproc + 11438 .LFE82: + 11440 .section .text.HAL_I2C_MemRxCpltCallback,"ax",%progbits + 11441 .align 1 + 11442 .weak HAL_I2C_MemRxCpltCallback + 11443 .syntax unified + 11444 .code 16 + 11445 .thumb_func + 11447 HAL_I2C_MemRxCpltCallback: + 11448 .LVL843: + 11449 .LFB83: +4693:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* Prevent unused argument(s) compilation warning */ + 11450 .loc 1 4693 1 is_stmt 1 view -0 + 11451 .cfi_startproc + 11452 @ args = 0, pretend = 0, frame = 0 + 11453 @ frame_needed = 0, uses_anonymous_args = 0 + 11454 @ link register save eliminated. +4695:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 11455 .loc 1 4695 3 view .LVU3790 +4700:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 11456 .loc 1 4700 1 is_stmt 0 view .LVU3791 + 11457 @ sp needed + 11458 0000 7047 bx lr + 11459 .cfi_endproc + 11460 .LFE83: + 11462 .section .text.HAL_I2C_ErrorCallback,"ax",%progbits + 11463 .align 1 + 11464 .weak HAL_I2C_ErrorCallback + ARM GAS /tmp/ccuRhBPx.s page 392 + + + 11465 .syntax unified + 11466 .code 16 + 11467 .thumb_func + 11469 HAL_I2C_ErrorCallback: + 11470 .LVL844: + 11471 .LFB84: +4709:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* Prevent unused argument(s) compilation warning */ + 11472 .loc 1 4709 1 is_stmt 1 view -0 + 11473 .cfi_startproc + 11474 @ args = 0, pretend = 0, frame = 0 + 11475 @ frame_needed = 0, uses_anonymous_args = 0 + 11476 @ link register save eliminated. +4711:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 11477 .loc 1 4711 3 view .LVU3793 +4716:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 11478 .loc 1 4716 1 is_stmt 0 view .LVU3794 + 11479 @ sp needed + 11480 0000 7047 bx lr + 11481 .cfi_endproc + 11482 .LFE84: + 11484 .section .text.HAL_I2C_AbortCpltCallback,"ax",%progbits + 11485 .align 1 + 11486 .weak HAL_I2C_AbortCpltCallback + 11487 .syntax unified + 11488 .code 16 + 11489 .thumb_func + 11491 HAL_I2C_AbortCpltCallback: + 11492 .LVL845: + 11493 .LFB85: +4725:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* Prevent unused argument(s) compilation warning */ + 11494 .loc 1 4725 1 is_stmt 1 view -0 + 11495 .cfi_startproc + 11496 @ args = 0, pretend = 0, frame = 0 + 11497 @ frame_needed = 0, uses_anonymous_args = 0 + 11498 @ link register save eliminated. +4727:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 11499 .loc 1 4727 3 view .LVU3796 +4732:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 11500 .loc 1 4732 1 is_stmt 0 view .LVU3797 + 11501 @ sp needed + 11502 0000 7047 bx lr + 11503 .cfi_endproc + 11504 .LFE85: + 11506 .section .text.I2C_TreatErrorCallback,"ax",%progbits + 11507 .align 1 + 11508 .syntax unified + 11509 .code 16 + 11510 .thumb_func + 11512 I2C_TreatErrorCallback: + 11513 .LVL846: + 11514 .LFB104: +6466:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** if (hi2c->State == HAL_I2C_STATE_ABORT) + 11515 .loc 1 6466 1 is_stmt 1 view -0 + 11516 .cfi_startproc + 11517 @ args = 0, pretend = 0, frame = 0 + 11518 @ frame_needed = 0, uses_anonymous_args = 0 +6466:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** if (hi2c->State == HAL_I2C_STATE_ABORT) + ARM GAS /tmp/ccuRhBPx.s page 393 + + + 11519 .loc 1 6466 1 is_stmt 0 view .LVU3799 + 11520 0000 10B5 push {r4, lr} + 11521 .cfi_def_cfa_offset 8 + 11522 .cfi_offset 4, -8 + 11523 .cfi_offset 14, -4 +6467:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { + 11524 .loc 1 6467 3 is_stmt 1 view .LVU3800 +6467:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { + 11525 .loc 1 6467 11 is_stmt 0 view .LVU3801 + 11526 0002 4123 movs r3, #65 + 11527 0004 C35C ldrb r3, [r0, r3] +6467:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { + 11528 .loc 1 6467 6 view .LVU3802 + 11529 0006 602B cmp r3, #96 + 11530 0008 06D0 beq .L657 +6484:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 11531 .loc 1 6484 5 is_stmt 1 view .LVU3803 +6484:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 11532 .loc 1 6484 25 is_stmt 0 view .LVU3804 + 11533 000a 0023 movs r3, #0 + 11534 000c 0363 str r3, [r0, #48] +6487:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 11535 .loc 1 6487 5 is_stmt 1 view .LVU3805 +6487:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 11536 .loc 1 6487 5 view .LVU3806 + 11537 000e 4022 movs r2, #64 + 11538 0010 8354 strb r3, [r0, r2] +6487:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 11539 .loc 1 6487 5 view .LVU3807 +6493:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** #endif /* USE_HAL_I2C_REGISTER_CALLBACKS */ + 11540 .loc 1 6493 5 view .LVU3808 + 11541 0012 FFF7FEFF bl HAL_I2C_ErrorCallback + 11542 .LVL847: + 11543 .L654: +6496:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 11544 .loc 1 6496 1 is_stmt 0 view .LVU3809 + 11545 @ sp needed + 11546 0016 10BD pop {r4, pc} + 11547 .LVL848: + 11548 .L657: +6469:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->PreviousState = I2C_STATE_NONE; + 11549 .loc 1 6469 5 is_stmt 1 view .LVU3810 +6469:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->PreviousState = I2C_STATE_NONE; + 11550 .loc 1 6469 17 is_stmt 0 view .LVU3811 + 11551 0018 1F3B subs r3, r3, #31 + 11552 001a 2022 movs r2, #32 + 11553 001c C254 strb r2, [r0, r3] +6470:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 11554 .loc 1 6470 5 is_stmt 1 view .LVU3812 +6470:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 11555 .loc 1 6470 25 is_stmt 0 view .LVU3813 + 11556 001e 0023 movs r3, #0 + 11557 0020 0363 str r3, [r0, #48] +6473:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 11558 .loc 1 6473 5 is_stmt 1 view .LVU3814 +6473:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 11559 .loc 1 6473 5 view .LVU3815 + ARM GAS /tmp/ccuRhBPx.s page 394 + + + 11560 0022 2032 adds r2, r2, #32 + 11561 0024 8354 strb r3, [r0, r2] +6473:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 11562 .loc 1 6473 5 view .LVU3816 +6479:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** #endif /* USE_HAL_I2C_REGISTER_CALLBACKS */ + 11563 .loc 1 6479 5 view .LVU3817 + 11564 0026 FFF7FEFF bl HAL_I2C_AbortCpltCallback + 11565 .LVL849: +6479:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** #endif /* USE_HAL_I2C_REGISTER_CALLBACKS */ + 11566 .loc 1 6479 5 is_stmt 0 view .LVU3818 + 11567 002a F4E7 b .L654 + 11568 .cfi_endproc + 11569 .LFE104: + 11571 .section .text.I2C_ITError,"ax",%progbits + 11572 .align 1 + 11573 .syntax unified + 11574 .code 16 + 11575 .thumb_func + 11577 I2C_ITError: + 11578 .LVL850: + 11579 .LFB103: +6335:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** HAL_I2C_StateTypeDef tmpstate = hi2c->State; + 11580 .loc 1 6335 1 is_stmt 1 view -0 + 11581 .cfi_startproc + 11582 @ args = 0, pretend = 0, frame = 0 + 11583 @ frame_needed = 0, uses_anonymous_args = 0 +6335:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** HAL_I2C_StateTypeDef tmpstate = hi2c->State; + 11584 .loc 1 6335 1 is_stmt 0 view .LVU3820 + 11585 0000 10B5 push {r4, lr} + 11586 .cfi_def_cfa_offset 8 + 11587 .cfi_offset 4, -8 + 11588 .cfi_offset 14, -4 + 11589 0002 0400 movs r4, r0 +6336:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 11590 .loc 1 6336 3 is_stmt 1 view .LVU3821 +6336:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 11591 .loc 1 6336 24 is_stmt 0 view .LVU3822 + 11592 0004 4123 movs r3, #65 + 11593 0006 C35C ldrb r3, [r0, r3] + 11594 .LVL851: +6338:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 11595 .loc 1 6338 3 is_stmt 1 view .LVU3823 +6341:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->XferOptions = I2C_NO_OPTION_FRAME; + 11596 .loc 1 6341 3 view .LVU3824 +6341:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->XferOptions = I2C_NO_OPTION_FRAME; + 11597 .loc 1 6341 23 is_stmt 0 view .LVU3825 + 11598 0008 0022 movs r2, #0 + 11599 000a 4220 movs r0, #66 + 11600 .LVL852: +6341:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->XferOptions = I2C_NO_OPTION_FRAME; + 11601 .loc 1 6341 23 view .LVU3826 + 11602 000c 2254 strb r2, [r4, r0] +6342:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->XferCount = 0U; + 11603 .loc 1 6342 3 is_stmt 1 view .LVU3827 +6342:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->XferCount = 0U; + 11604 .loc 1 6342 23 is_stmt 0 view .LVU3828 + 11605 000e 4348 ldr r0, .L675 + ARM GAS /tmp/ccuRhBPx.s page 395 + + + 11606 0010 E062 str r0, [r4, #44] +6343:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 11607 .loc 1 6343 3 is_stmt 1 view .LVU3829 +6343:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 11608 .loc 1 6343 23 is_stmt 0 view .LVU3830 + 11609 0012 6285 strh r2, [r4, #42] +6346:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 11610 .loc 1 6346 3 is_stmt 1 view .LVU3831 +6346:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 11611 .loc 1 6346 7 is_stmt 0 view .LVU3832 + 11612 0014 626C ldr r2, [r4, #68] +6346:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 11613 .loc 1 6346 19 view .LVU3833 + 11614 0016 0A43 orrs r2, r1 + 11615 0018 6264 str r2, [r4, #68] +6349:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** (tmpstate == HAL_I2C_STATE_BUSY_TX_LISTEN) || + 11616 .loc 1 6349 3 is_stmt 1 view .LVU3834 +6350:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** (tmpstate == HAL_I2C_STATE_BUSY_RX_LISTEN)) + 11617 .loc 1 6350 50 is_stmt 0 view .LVU3835 + 11618 001a 283B subs r3, r3, #40 + 11619 .LVL853: +6350:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** (tmpstate == HAL_I2C_STATE_BUSY_RX_LISTEN)) + 11620 .loc 1 6350 50 view .LVU3836 + 11621 001c DBB2 uxtb r3, r3 + 11622 .LVL854: +6349:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** (tmpstate == HAL_I2C_STATE_BUSY_TX_LISTEN) || + 11623 .loc 1 6349 6 view .LVU3837 + 11624 001e 022B cmp r3, #2 + 11625 0020 1BD8 bhi .L659 +6354:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 11626 .loc 1 6354 5 is_stmt 1 view .LVU3838 + 11627 0022 0321 movs r1, #3 + 11628 .LVL855: +6354:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 11629 .loc 1 6354 5 is_stmt 0 view .LVU3839 + 11630 0024 2000 movs r0, r4 + 11631 0026 FFF7FEFF bl I2C_Disable_IRQ + 11632 .LVL856: +6357:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->XferISR = I2C_Slave_ISR_IT; + 11633 .loc 1 6357 5 is_stmt 1 view .LVU3840 +6357:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->XferISR = I2C_Slave_ISR_IT; + 11634 .loc 1 6357 25 is_stmt 0 view .LVU3841 + 11635 002a 4123 movs r3, #65 + 11636 002c 2822 movs r2, #40 + 11637 002e E254 strb r2, [r4, r3] +6358:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } + 11638 .loc 1 6358 5 is_stmt 1 view .LVU3842 +6358:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } + 11639 .loc 1 6358 25 is_stmt 0 view .LVU3843 + 11640 0030 3B4B ldr r3, .L675+4 + 11641 0032 6363 str r3, [r4, #52] + 11642 .L660: +6393:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 11643 .loc 1 6393 3 is_stmt 1 view .LVU3844 +6393:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 11644 .loc 1 6393 20 is_stmt 0 view .LVU3845 + 11645 0034 236B ldr r3, [r4, #48] + ARM GAS /tmp/ccuRhBPx.s page 396 + + + 11646 .LVL857: +6395:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** (tmppreviousstate == I2C_STATE_SLAVE_BUSY_TX))) + 11647 .loc 1 6395 3 is_stmt 1 view .LVU3846 +6395:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** (tmppreviousstate == I2C_STATE_SLAVE_BUSY_TX))) + 11648 .loc 1 6395 12 is_stmt 0 view .LVU3847 + 11649 0036 A26B ldr r2, [r4, #56] +6395:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** (tmppreviousstate == I2C_STATE_SLAVE_BUSY_TX))) + 11650 .loc 1 6395 6 view .LVU3848 + 11651 0038 002A cmp r2, #0 + 11652 003a 03D0 beq .L663 +6395:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** (tmppreviousstate == I2C_STATE_SLAVE_BUSY_TX))) + 11653 .loc 1 6395 30 discriminator 1 view .LVU3849 + 11654 003c 112B cmp r3, #17 + 11655 003e 2DD0 beq .L664 +6395:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** (tmppreviousstate == I2C_STATE_SLAVE_BUSY_TX))) + 11656 .loc 1 6395 81 discriminator 2 view .LVU3850 + 11657 0040 212B cmp r3, #33 + 11658 0042 2BD0 beq .L664 + 11659 .L663: +6425:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** (tmppreviousstate == I2C_STATE_SLAVE_BUSY_RX))) + 11660 .loc 1 6425 8 is_stmt 1 view .LVU3851 +6425:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** (tmppreviousstate == I2C_STATE_SLAVE_BUSY_RX))) + 11661 .loc 1 6425 17 is_stmt 0 view .LVU3852 + 11662 0044 E26B ldr r2, [r4, #60] +6425:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** (tmppreviousstate == I2C_STATE_SLAVE_BUSY_RX))) + 11663 .loc 1 6425 11 view .LVU3853 + 11664 0046 002A cmp r2, #0 + 11665 0048 03D0 beq .L668 +6425:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** (tmppreviousstate == I2C_STATE_SLAVE_BUSY_RX))) + 11666 .loc 1 6425 35 discriminator 1 view .LVU3854 + 11667 004a 122B cmp r3, #18 + 11668 004c 46D0 beq .L669 +6425:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** (tmppreviousstate == I2C_STATE_SLAVE_BUSY_RX))) + 11669 .loc 1 6425 86 discriminator 2 view .LVU3855 + 11670 004e 222B cmp r3, #34 + 11671 0050 44D0 beq .L669 + 11672 .L668: +6456:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } + 11673 .loc 1 6456 5 is_stmt 1 view .LVU3856 + 11674 0052 2000 movs r0, r4 + 11675 0054 FFF7FEFF bl I2C_TreatErrorCallback + 11676 .LVL858: + 11677 .L658: +6458:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 11678 .loc 1 6458 1 is_stmt 0 view .LVU3857 + 11679 @ sp needed + 11680 .LVL859: +6458:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 11681 .loc 1 6458 1 view .LVU3858 + 11682 0058 10BD pop {r4, pc} + 11683 .LVL860: + 11684 .L659: +6363:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 11685 .loc 1 6363 5 is_stmt 1 view .LVU3859 + 11686 005a 3249 ldr r1, .L675+8 + 11687 .LVL861: +6363:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + ARM GAS /tmp/ccuRhBPx.s page 397 + + + 11688 .loc 1 6363 5 is_stmt 0 view .LVU3860 + 11689 005c 2000 movs r0, r4 + 11690 005e FFF7FEFF bl I2C_Disable_IRQ + 11691 .LVL862: +6366:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 11692 .loc 1 6366 5 is_stmt 1 view .LVU3861 + 11693 0062 2000 movs r0, r4 + 11694 0064 FFF7FEFF bl I2C_Flush_TXDR + 11695 .LVL863: +6370:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { + 11696 .loc 1 6370 5 view .LVU3862 +6370:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { + 11697 .loc 1 6370 13 is_stmt 0 view .LVU3863 + 11698 0068 4123 movs r3, #65 + 11699 006a E35C ldrb r3, [r4, r3] +6370:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { + 11700 .loc 1 6370 8 view .LVU3864 + 11701 006c 602B cmp r3, #96 + 11702 006e 12D0 beq .L661 +6373:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 11703 .loc 1 6373 7 is_stmt 1 view .LVU3865 +6373:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 11704 .loc 1 6373 27 is_stmt 0 view .LVU3866 + 11705 0070 2023 movs r3, #32 + 11706 0072 4122 movs r2, #65 + 11707 0074 A354 strb r3, [r4, r2] +6376:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { + 11708 .loc 1 6376 7 is_stmt 1 view .LVU3867 +6376:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { + 11709 .loc 1 6376 11 is_stmt 0 view .LVU3868 + 11710 0076 2268 ldr r2, [r4] + 11711 0078 9169 ldr r1, [r2, #24] +6376:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { + 11712 .loc 1 6376 10 view .LVU3869 + 11713 007a 0B42 tst r3, r1 + 11714 007c 0BD0 beq .L661 +6378:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { + 11715 .loc 1 6378 9 is_stmt 1 view .LVU3870 +6378:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { + 11716 .loc 1 6378 13 is_stmt 0 view .LVU3871 + 11717 007e 9369 ldr r3, [r2, #24] +6378:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { + 11718 .loc 1 6378 12 view .LVU3872 + 11719 0080 DB06 lsls r3, r3, #27 + 11720 0082 05D5 bpl .L662 +6380:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->ErrorCode |= HAL_I2C_ERROR_AF; + 11721 .loc 1 6380 11 is_stmt 1 view .LVU3873 + 11722 0084 1023 movs r3, #16 + 11723 0086 D361 str r3, [r2, #28] +6381:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } + 11724 .loc 1 6381 11 view .LVU3874 +6381:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } + 11725 .loc 1 6381 15 is_stmt 0 view .LVU3875 + 11726 0088 636C ldr r3, [r4, #68] +6381:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } + 11727 .loc 1 6381 27 view .LVU3876 + 11728 008a 0422 movs r2, #4 + ARM GAS /tmp/ccuRhBPx.s page 398 + + + 11729 008c 1343 orrs r3, r2 + 11730 008e 6364 str r3, [r4, #68] + 11731 .L662: +6385:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } + 11732 .loc 1 6385 9 is_stmt 1 view .LVU3877 + 11733 0090 2368 ldr r3, [r4] + 11734 0092 2022 movs r2, #32 + 11735 0094 DA61 str r2, [r3, #28] + 11736 .L661: +6389:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } + 11737 .loc 1 6389 5 view .LVU3878 +6389:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } + 11738 .loc 1 6389 25 is_stmt 0 view .LVU3879 + 11739 0096 0023 movs r3, #0 + 11740 0098 6363 str r3, [r4, #52] + 11741 009a CBE7 b .L660 + 11742 .LVL864: + 11743 .L664: +6398:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { + 11744 .loc 1 6398 5 is_stmt 1 view .LVU3880 +6398:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { + 11745 .loc 1 6398 14 is_stmt 0 view .LVU3881 + 11746 009c 2268 ldr r2, [r4] +6398:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { + 11747 .loc 1 6398 24 view .LVU3882 + 11748 009e 1368 ldr r3, [r2] + 11749 .LVL865: +6398:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { + 11750 .loc 1 6398 8 view .LVU3883 + 11751 00a0 5B04 lsls r3, r3, #17 + 11752 00a2 03D5 bpl .L665 +6400:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } + 11753 .loc 1 6400 7 is_stmt 1 view .LVU3884 +6400:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } + 11754 .loc 1 6400 21 is_stmt 0 view .LVU3885 + 11755 00a4 1368 ldr r3, [r2] +6400:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } + 11756 .loc 1 6400 27 view .LVU3886 + 11757 00a6 2049 ldr r1, .L675+12 + 11758 00a8 0B40 ands r3, r1 + 11759 00aa 1360 str r3, [r2] + 11760 .L665: +6403:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { + 11761 .loc 1 6403 5 is_stmt 1 view .LVU3887 +6403:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { + 11762 .loc 1 6403 9 is_stmt 0 view .LVU3888 + 11763 00ac A06B ldr r0, [r4, #56] + 11764 00ae FFF7FEFF bl HAL_DMA_GetState + 11765 .LVL866: +6403:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { + 11766 .loc 1 6403 8 discriminator 1 view .LVU3889 + 11767 00b2 0128 cmp r0, #1 + 11768 00b4 0ED0 beq .L666 +6407:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 11769 .loc 1 6407 7 is_stmt 1 view .LVU3890 +6407:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 11770 .loc 1 6407 11 is_stmt 0 view .LVU3891 + ARM GAS /tmp/ccuRhBPx.s page 399 + + + 11771 00b6 A36B ldr r3, [r4, #56] +6407:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 11772 .loc 1 6407 39 view .LVU3892 + 11773 00b8 1C4A ldr r2, .L675+16 + 11774 00ba 5A63 str r2, [r3, #52] +6410:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 11775 .loc 1 6410 7 is_stmt 1 view .LVU3893 +6410:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 11776 .loc 1 6410 7 view .LVU3894 + 11777 00bc 4023 movs r3, #64 + 11778 00be 0022 movs r2, #0 + 11779 00c0 E254 strb r2, [r4, r3] +6410:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 11780 .loc 1 6410 7 view .LVU3895 +6413:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { + 11781 .loc 1 6413 7 view .LVU3896 +6413:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { + 11782 .loc 1 6413 11 is_stmt 0 view .LVU3897 + 11783 00c2 A06B ldr r0, [r4, #56] + 11784 00c4 FFF7FEFF bl HAL_DMA_Abort_IT + 11785 .LVL867: +6413:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { + 11786 .loc 1 6413 10 discriminator 1 view .LVU3898 + 11787 00c8 0028 cmp r0, #0 + 11788 00ca C5D0 beq .L658 +6416:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } + 11789 .loc 1 6416 9 is_stmt 1 view .LVU3899 +6416:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } + 11790 .loc 1 6416 13 is_stmt 0 view .LVU3900 + 11791 00cc A06B ldr r0, [r4, #56] +6416:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } + 11792 .loc 1 6416 21 view .LVU3901 + 11793 00ce 436B ldr r3, [r0, #52] +6416:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } + 11794 .loc 1 6416 9 view .LVU3902 + 11795 00d0 9847 blx r3 + 11796 .LVL868: + 11797 00d2 C1E7 b .L658 + 11798 .L666: +6421:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } + 11799 .loc 1 6421 7 is_stmt 1 view .LVU3903 + 11800 00d4 2000 movs r0, r4 + 11801 00d6 FFF7FEFF bl I2C_TreatErrorCallback + 11802 .LVL869: + 11803 00da BDE7 b .L658 + 11804 .LVL870: + 11805 .L669: +6428:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { + 11806 .loc 1 6428 5 view .LVU3904 +6428:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { + 11807 .loc 1 6428 14 is_stmt 0 view .LVU3905 + 11808 00dc 2368 ldr r3, [r4] + 11809 .LVL871: +6428:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { + 11810 .loc 1 6428 24 view .LVU3906 + 11811 00de 1A68 ldr r2, [r3] +6428:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { + ARM GAS /tmp/ccuRhBPx.s page 400 + + + 11812 .loc 1 6428 8 view .LVU3907 + 11813 00e0 1204 lsls r2, r2, #16 + 11814 00e2 03D5 bpl .L670 +6430:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } + 11815 .loc 1 6430 7 is_stmt 1 view .LVU3908 +6430:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } + 11816 .loc 1 6430 21 is_stmt 0 view .LVU3909 + 11817 00e4 1A68 ldr r2, [r3] +6430:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } + 11818 .loc 1 6430 27 view .LVU3910 + 11819 00e6 1249 ldr r1, .L675+20 + 11820 00e8 0A40 ands r2, r1 + 11821 00ea 1A60 str r2, [r3] + 11822 .L670: +6433:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { + 11823 .loc 1 6433 5 is_stmt 1 view .LVU3911 +6433:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { + 11824 .loc 1 6433 9 is_stmt 0 view .LVU3912 + 11825 00ec E06B ldr r0, [r4, #60] + 11826 00ee FFF7FEFF bl HAL_DMA_GetState + 11827 .LVL872: +6433:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { + 11828 .loc 1 6433 8 discriminator 1 view .LVU3913 + 11829 00f2 0128 cmp r0, #1 + 11830 00f4 0ED0 beq .L671 +6437:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 11831 .loc 1 6437 7 is_stmt 1 view .LVU3914 +6437:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 11832 .loc 1 6437 11 is_stmt 0 view .LVU3915 + 11833 00f6 E36B ldr r3, [r4, #60] +6437:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 11834 .loc 1 6437 39 view .LVU3916 + 11835 00f8 0C4A ldr r2, .L675+16 + 11836 00fa 5A63 str r2, [r3, #52] +6440:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 11837 .loc 1 6440 7 is_stmt 1 view .LVU3917 +6440:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 11838 .loc 1 6440 7 view .LVU3918 + 11839 00fc 4023 movs r3, #64 + 11840 00fe 0022 movs r2, #0 + 11841 0100 E254 strb r2, [r4, r3] +6440:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 11842 .loc 1 6440 7 view .LVU3919 +6443:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { + 11843 .loc 1 6443 7 view .LVU3920 +6443:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { + 11844 .loc 1 6443 11 is_stmt 0 view .LVU3921 + 11845 0102 E06B ldr r0, [r4, #60] + 11846 0104 FFF7FEFF bl HAL_DMA_Abort_IT + 11847 .LVL873: +6443:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { + 11848 .loc 1 6443 10 discriminator 1 view .LVU3922 + 11849 0108 0028 cmp r0, #0 + 11850 010a A5D0 beq .L658 +6446:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } + 11851 .loc 1 6446 9 is_stmt 1 view .LVU3923 +6446:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } + ARM GAS /tmp/ccuRhBPx.s page 401 + + + 11852 .loc 1 6446 13 is_stmt 0 view .LVU3924 + 11853 010c E06B ldr r0, [r4, #60] +6446:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } + 11854 .loc 1 6446 21 view .LVU3925 + 11855 010e 436B ldr r3, [r0, #52] +6446:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } + 11856 .loc 1 6446 9 view .LVU3926 + 11857 0110 9847 blx r3 + 11858 .LVL874: + 11859 0112 A1E7 b .L658 + 11860 .L671: +6451:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } + 11861 .loc 1 6451 7 is_stmt 1 view .LVU3927 + 11862 0114 2000 movs r0, r4 + 11863 0116 FFF7FEFF bl I2C_TreatErrorCallback + 11864 .LVL875: + 11865 011a 9DE7 b .L658 + 11866 .L676: + 11867 .align 2 + 11868 .L675: + 11869 011c 0000FFFF .word -65536 + 11870 0120 00000000 .word I2C_Slave_ISR_IT + 11871 0124 03800000 .word 32771 + 11872 0128 FFBFFFFF .word -16385 + 11873 012c 00000000 .word I2C_DMAAbort + 11874 0130 FF7FFFFF .word -32769 + 11875 .cfi_endproc + 11876 .LFE103: + 11878 .section .text.I2C_ITSlaveCplt,"ax",%progbits + 11879 .align 1 + 11880 .syntax unified + 11881 .code 16 + 11882 .thumb_func + 11884 I2C_ITSlaveCplt: + 11885 .LVL876: + 11886 .LFB101: +6125:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** uint32_t tmpcr1value = READ_REG(hi2c->Instance->CR1); + 11887 .loc 1 6125 1 view -0 + 11888 .cfi_startproc + 11889 @ args = 0, pretend = 0, frame = 0 + 11890 @ frame_needed = 0, uses_anonymous_args = 0 +6125:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** uint32_t tmpcr1value = READ_REG(hi2c->Instance->CR1); + 11891 .loc 1 6125 1 is_stmt 0 view .LVU3929 + 11892 0000 70B5 push {r4, r5, r6, lr} + 11893 .cfi_def_cfa_offset 16 + 11894 .cfi_offset 4, -16 + 11895 .cfi_offset 5, -12 + 11896 .cfi_offset 6, -8 + 11897 .cfi_offset 14, -4 + 11898 0002 0400 movs r4, r0 + 11899 0004 0D00 movs r5, r1 +6126:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** uint32_t tmpITFlags = ITFlags; + 11900 .loc 1 6126 3 is_stmt 1 view .LVU3930 +6126:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** uint32_t tmpITFlags = ITFlags; + 11901 .loc 1 6126 26 is_stmt 0 view .LVU3931 + 11902 0006 0268 ldr r2, [r0] +6126:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** uint32_t tmpITFlags = ITFlags; + ARM GAS /tmp/ccuRhBPx.s page 402 + + + 11903 .loc 1 6126 12 view .LVU3932 + 11904 0008 1668 ldr r6, [r2] + 11905 .LVL877: +6127:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** HAL_I2C_StateTypeDef tmpstate = hi2c->State; + 11906 .loc 1 6127 3 is_stmt 1 view .LVU3933 +6128:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 11907 .loc 1 6128 3 view .LVU3934 +6128:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 11908 .loc 1 6128 24 is_stmt 0 view .LVU3935 + 11909 000a 4123 movs r3, #65 + 11910 000c C35C ldrb r3, [r0, r3] + 11911 000e D9B2 uxtb r1, r3 + 11912 .LVL878: +6131:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 11913 .loc 1 6131 3 is_stmt 1 view .LVU3936 + 11914 0010 2020 movs r0, #32 + 11915 .LVL879: +6131:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 11916 .loc 1 6131 3 is_stmt 0 view .LVU3937 + 11917 0012 D061 str r0, [r2, #28] +6134:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { + 11918 .loc 1 6134 3 is_stmt 1 view .LVU3938 +6134:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { + 11919 .loc 1 6134 6 is_stmt 0 view .LVU3939 + 11920 0014 212B cmp r3, #33 + 11921 0016 0CD0 beq .L678 +6134:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { + 11922 .loc 1 6134 43 discriminator 1 view .LVU3940 + 11923 0018 2929 cmp r1, #41 + 11924 001a 0AD0 beq .L678 +6139:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { + 11925 .loc 1 6139 8 is_stmt 1 view .LVU3941 +6139:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { + 11926 .loc 1 6139 11 is_stmt 0 view .LVU3942 + 11927 001c 2229 cmp r1, #34 + 11928 001e 01D0 beq .L681 +6139:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { + 11929 .loc 1 6139 48 discriminator 1 view .LVU3943 + 11930 0020 2A29 cmp r1, #42 + 11931 0022 0CD1 bne .L680 + 11932 .L681: +6141:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->PreviousState = I2C_STATE_SLAVE_BUSY_RX; + 11933 .loc 1 6141 5 is_stmt 1 view .LVU3944 + 11934 0024 4A49 ldr r1, .L695 + 11935 .LVL880: +6141:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->PreviousState = I2C_STATE_SLAVE_BUSY_RX; + 11936 .loc 1 6141 5 is_stmt 0 view .LVU3945 + 11937 0026 2000 movs r0, r4 + 11938 0028 FFF7FEFF bl I2C_Disable_IRQ + 11939 .LVL881: +6142:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } + 11940 .loc 1 6142 5 is_stmt 1 view .LVU3946 +6142:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } + 11941 .loc 1 6142 25 is_stmt 0 view .LVU3947 + 11942 002c 2223 movs r3, #34 + 11943 002e 2363 str r3, [r4, #48] + 11944 0030 05E0 b .L680 + ARM GAS /tmp/ccuRhBPx.s page 403 + + + 11945 .LVL882: + 11946 .L678: +6136:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->PreviousState = I2C_STATE_SLAVE_BUSY_TX; + 11947 .loc 1 6136 5 is_stmt 1 view .LVU3948 + 11948 0032 4849 ldr r1, .L695+4 + 11949 .LVL883: +6136:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->PreviousState = I2C_STATE_SLAVE_BUSY_TX; + 11950 .loc 1 6136 5 is_stmt 0 view .LVU3949 + 11951 0034 2000 movs r0, r4 + 11952 0036 FFF7FEFF bl I2C_Disable_IRQ + 11953 .LVL884: +6137:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } + 11954 .loc 1 6137 5 is_stmt 1 view .LVU3950 +6137:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } + 11955 .loc 1 6137 25 is_stmt 0 view .LVU3951 + 11956 003a 2123 movs r3, #33 + 11957 003c 2363 str r3, [r4, #48] + 11958 .L680: +6150:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 11959 .loc 1 6150 3 is_stmt 1 view .LVU3952 +6150:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 11960 .loc 1 6150 7 is_stmt 0 view .LVU3953 + 11961 003e 2268 ldr r2, [r4] +6150:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 11962 .loc 1 6150 17 view .LVU3954 + 11963 0040 5168 ldr r1, [r2, #4] +6150:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 11964 .loc 1 6150 23 view .LVU3955 + 11965 0042 8023 movs r3, #128 + 11966 0044 1B02 lsls r3, r3, #8 + 11967 0046 0B43 orrs r3, r1 + 11968 0048 5360 str r3, [r2, #4] +6153:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 11969 .loc 1 6153 3 is_stmt 1 view .LVU3956 + 11970 004a 2268 ldr r2, [r4] + 11971 004c 5368 ldr r3, [r2, #4] + 11972 004e 4249 ldr r1, .L695+8 + 11973 0050 0B40 ands r3, r1 + 11974 0052 5360 str r3, [r2, #4] +6156:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 11975 .loc 1 6156 3 view .LVU3957 + 11976 0054 2000 movs r0, r4 + 11977 0056 FFF7FEFF bl I2C_Flush_TXDR + 11978 .LVL885: +6159:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { + 11979 .loc 1 6159 3 view .LVU3958 +6159:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { + 11980 .loc 1 6159 6 is_stmt 0 view .LVU3959 + 11981 005a 7304 lsls r3, r6, #17 + 11982 005c 41D5 bpl .L682 +6162:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 11983 .loc 1 6162 5 is_stmt 1 view .LVU3960 +6162:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 11984 .loc 1 6162 9 is_stmt 0 view .LVU3961 + 11985 005e 2268 ldr r2, [r4] +6162:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 11986 .loc 1 6162 19 view .LVU3962 + ARM GAS /tmp/ccuRhBPx.s page 404 + + + 11987 0060 1368 ldr r3, [r2] +6162:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 11988 .loc 1 6162 25 view .LVU3963 + 11989 0062 3E49 ldr r1, .L695+12 + 11990 0064 0B40 ands r3, r1 + 11991 0066 1360 str r3, [r2] +6164:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { + 11992 .loc 1 6164 5 is_stmt 1 view .LVU3964 +6164:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { + 11993 .loc 1 6164 13 is_stmt 0 view .LVU3965 + 11994 0068 A36B ldr r3, [r4, #56] +6164:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { + 11995 .loc 1 6164 8 view .LVU3966 + 11996 006a 002B cmp r3, #0 + 11997 006c 03D0 beq .L683 +6166:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } + 11998 .loc 1 6166 7 is_stmt 1 view .LVU3967 +6166:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } + 11999 .loc 1 6166 35 is_stmt 0 view .LVU3968 + 12000 006e 1B68 ldr r3, [r3] + 12001 0070 5B68 ldr r3, [r3, #4] +6166:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } + 12002 .loc 1 6166 25 view .LVU3969 + 12003 0072 9BB2 uxth r3, r3 +6166:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } + 12004 .loc 1 6166 23 view .LVU3970 + 12005 0074 6385 strh r3, [r4, #42] + 12006 .LVL886: + 12007 .L683: +6182:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 12008 .loc 1 6182 3 is_stmt 1 view .LVU3971 +6185:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { + 12009 .loc 1 6185 3 view .LVU3972 +6185:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { + 12010 .loc 1 6185 6 is_stmt 0 view .LVU3973 + 12011 0076 6B07 lsls r3, r5, #29 + 12012 0078 11D5 bpl .L684 +6188:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 12013 .loc 1 6188 5 is_stmt 1 view .LVU3974 +6188:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 12014 .loc 1 6188 16 is_stmt 0 view .LVU3975 + 12015 007a 0423 movs r3, #4 + 12016 007c 9D43 bics r5, r3 + 12017 .LVL887: +6191:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 12018 .loc 1 6191 5 is_stmt 1 view .LVU3976 +6191:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 12019 .loc 1 6191 36 is_stmt 0 view .LVU3977 + 12020 007e 2368 ldr r3, [r4] +6191:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 12021 .loc 1 6191 46 view .LVU3978 + 12022 0080 5A6A ldr r2, [r3, #36] +6191:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 12023 .loc 1 6191 10 view .LVU3979 + 12024 0082 636A ldr r3, [r4, #36] +6191:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 12025 .loc 1 6191 21 view .LVU3980 + ARM GAS /tmp/ccuRhBPx.s page 405 + + + 12026 0084 1A70 strb r2, [r3] +6194:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 12027 .loc 1 6194 5 is_stmt 1 view .LVU3981 +6194:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 12028 .loc 1 6194 9 is_stmt 0 view .LVU3982 + 12029 0086 636A ldr r3, [r4, #36] +6194:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 12030 .loc 1 6194 19 view .LVU3983 + 12031 0088 0133 adds r3, r3, #1 + 12032 008a 6362 str r3, [r4, #36] +6196:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { + 12033 .loc 1 6196 5 is_stmt 1 view .LVU3984 +6196:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { + 12034 .loc 1 6196 14 is_stmt 0 view .LVU3985 + 12035 008c 238D ldrh r3, [r4, #40] +6196:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { + 12036 .loc 1 6196 8 view .LVU3986 + 12037 008e 002B cmp r3, #0 + 12038 0090 05D0 beq .L684 +6198:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->XferCount--; + 12039 .loc 1 6198 7 is_stmt 1 view .LVU3987 +6198:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->XferCount--; + 12040 .loc 1 6198 21 is_stmt 0 view .LVU3988 + 12041 0092 013B subs r3, r3, #1 + 12042 0094 2385 strh r3, [r4, #40] +6199:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } + 12043 .loc 1 6199 7 is_stmt 1 view .LVU3989 +6199:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } + 12044 .loc 1 6199 11 is_stmt 0 view .LVU3990 + 12045 0096 638D ldrh r3, [r4, #42] +6199:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } + 12046 .loc 1 6199 22 view .LVU3991 + 12047 0098 013B subs r3, r3, #1 + 12048 009a 9BB2 uxth r3, r3 + 12049 009c 6385 strh r3, [r4, #42] + 12050 .L684: +6204:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { + 12051 .loc 1 6204 3 is_stmt 1 view .LVU3992 +6204:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { + 12052 .loc 1 6204 11 is_stmt 0 view .LVU3993 + 12053 009e 638D ldrh r3, [r4, #42] + 12054 00a0 9BB2 uxth r3, r3 +6204:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { + 12055 .loc 1 6204 6 view .LVU3994 + 12056 00a2 002B cmp r3, #0 + 12057 00a4 03D0 beq .L685 +6207:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } + 12058 .loc 1 6207 5 is_stmt 1 view .LVU3995 +6207:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } + 12059 .loc 1 6207 9 is_stmt 0 view .LVU3996 + 12060 00a6 636C ldr r3, [r4, #68] +6207:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } + 12061 .loc 1 6207 21 view .LVU3997 + 12062 00a8 0422 movs r2, #4 + 12063 00aa 1343 orrs r3, r2 + 12064 00ac 6364 str r3, [r4, #68] + 12065 .L685: + ARM GAS /tmp/ccuRhBPx.s page 406 + + +6210:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->XferISR = NULL; + 12066 .loc 1 6210 3 is_stmt 1 view .LVU3998 +6210:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->XferISR = NULL; + 12067 .loc 1 6210 14 is_stmt 0 view .LVU3999 + 12068 00ae 0023 movs r3, #0 + 12069 00b0 4222 movs r2, #66 + 12070 00b2 A354 strb r3, [r4, r2] +6211:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 12071 .loc 1 6211 3 is_stmt 1 view .LVU4000 +6211:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 12072 .loc 1 6211 17 is_stmt 0 view .LVU4001 + 12073 00b4 6363 str r3, [r4, #52] +6213:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { + 12074 .loc 1 6213 3 is_stmt 1 view .LVU4002 +6213:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { + 12075 .loc 1 6213 11 is_stmt 0 view .LVU4003 + 12076 00b6 636C ldr r3, [r4, #68] +6213:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { + 12077 .loc 1 6213 6 view .LVU4004 + 12078 00b8 002B cmp r3, #0 + 12079 00ba 21D1 bne .L692 +6225:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { + 12080 .loc 1 6225 8 is_stmt 1 view .LVU4005 +6225:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { + 12081 .loc 1 6225 16 is_stmt 0 view .LVU4006 + 12082 00bc E26A ldr r2, [r4, #44] +6225:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { + 12083 .loc 1 6225 11 view .LVU4007 + 12084 00be 284B ldr r3, .L695+16 + 12085 00c0 9A42 cmp r2, r3 + 12086 00c2 2AD1 bne .L693 +6245:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { + 12087 .loc 1 6245 8 is_stmt 1 view .LVU4008 +6245:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { + 12088 .loc 1 6245 16 is_stmt 0 view .LVU4009 + 12089 00c4 4123 movs r3, #65 + 12090 00c6 E35C ldrb r3, [r4, r3] +6245:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { + 12091 .loc 1 6245 11 view .LVU4010 + 12092 00c8 222B cmp r3, #34 + 12093 00ca 36D0 beq .L694 +6262:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->PreviousState = I2C_STATE_NONE; + 12094 .loc 1 6262 5 is_stmt 1 view .LVU4011 +6262:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->PreviousState = I2C_STATE_NONE; + 12095 .loc 1 6262 17 is_stmt 0 view .LVU4012 + 12096 00cc 4123 movs r3, #65 + 12097 00ce 2022 movs r2, #32 + 12098 00d0 E254 strb r2, [r4, r3] +6263:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 12099 .loc 1 6263 5 is_stmt 1 view .LVU4013 +6263:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 12100 .loc 1 6263 25 is_stmt 0 view .LVU4014 + 12101 00d2 0023 movs r3, #0 + 12102 00d4 2363 str r3, [r4, #48] +6266:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 12103 .loc 1 6266 5 is_stmt 1 view .LVU4015 +6266:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + ARM GAS /tmp/ccuRhBPx.s page 407 + + + 12104 .loc 1 6266 5 view .LVU4016 + 12105 00d6 2032 adds r2, r2, #32 + 12106 00d8 A354 strb r3, [r4, r2] +6266:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 12107 .loc 1 6266 5 view .LVU4017 +6272:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** #endif /* USE_HAL_I2C_REGISTER_CALLBACKS */ + 12108 .loc 1 6272 5 view .LVU4018 + 12109 00da 2000 movs r0, r4 + 12110 00dc FFF7FEFF bl HAL_I2C_SlaveTxCpltCallback + 12111 .LVL888: +6275:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 12112 .loc 1 6275 1 is_stmt 0 view .LVU4019 + 12113 00e0 2AE0 b .L677 + 12114 .LVL889: + 12115 .L682: +6169:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { + 12116 .loc 1 6169 8 is_stmt 1 view .LVU4020 +6169:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { + 12117 .loc 1 6169 11 is_stmt 0 view .LVU4021 + 12118 00e2 3604 lsls r6, r6, #16 + 12119 00e4 C7D5 bpl .L683 + 12120 .LVL890: +6172:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 12121 .loc 1 6172 5 is_stmt 1 view .LVU4022 +6172:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 12122 .loc 1 6172 9 is_stmt 0 view .LVU4023 + 12123 00e6 2268 ldr r2, [r4] +6172:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 12124 .loc 1 6172 19 view .LVU4024 + 12125 00e8 1368 ldr r3, [r2] +6172:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 12126 .loc 1 6172 25 view .LVU4025 + 12127 00ea 1E49 ldr r1, .L695+20 + 12128 00ec 0B40 ands r3, r1 + 12129 00ee 1360 str r3, [r2] +6174:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { + 12130 .loc 1 6174 5 is_stmt 1 view .LVU4026 +6174:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { + 12131 .loc 1 6174 13 is_stmt 0 view .LVU4027 + 12132 00f0 E36B ldr r3, [r4, #60] +6174:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { + 12133 .loc 1 6174 8 view .LVU4028 + 12134 00f2 002B cmp r3, #0 + 12135 00f4 BFD0 beq .L683 +6176:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } + 12136 .loc 1 6176 7 is_stmt 1 view .LVU4029 +6176:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } + 12137 .loc 1 6176 35 is_stmt 0 view .LVU4030 + 12138 00f6 1B68 ldr r3, [r3] + 12139 00f8 5B68 ldr r3, [r3, #4] +6176:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } + 12140 .loc 1 6176 25 view .LVU4031 + 12141 00fa 9BB2 uxth r3, r3 +6176:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } + 12142 .loc 1 6176 23 view .LVU4032 + 12143 00fc 6385 strh r3, [r4, #42] + 12144 00fe BAE7 b .L683 + ARM GAS /tmp/ccuRhBPx.s page 408 + + + 12145 .LVL891: + 12146 .L692: +6216:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 12147 .loc 1 6216 5 is_stmt 1 view .LVU4033 +6216:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 12148 .loc 1 6216 27 is_stmt 0 view .LVU4034 + 12149 0100 616C ldr r1, [r4, #68] +6216:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 12150 .loc 1 6216 5 view .LVU4035 + 12151 0102 2000 movs r0, r4 + 12152 0104 FFF7FEFF bl I2C_ITError + 12153 .LVL892: +6219:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { + 12154 .loc 1 6219 5 is_stmt 1 view .LVU4036 +6219:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { + 12155 .loc 1 6219 13 is_stmt 0 view .LVU4037 + 12156 0108 4123 movs r3, #65 + 12157 010a E35C ldrb r3, [r4, r3] +6219:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { + 12158 .loc 1 6219 8 view .LVU4038 + 12159 010c 282B cmp r3, #40 + 12160 010e 13D1 bne .L677 +6222:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } + 12161 .loc 1 6222 7 is_stmt 1 view .LVU4039 + 12162 0110 2900 movs r1, r5 + 12163 0112 2000 movs r0, r4 + 12164 0114 FFF7FEFF bl I2C_ITListenCplt + 12165 .LVL893: + 12166 0118 0EE0 b .L677 + 12167 .L693: +6228:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 12168 .loc 1 6228 5 view .LVU4040 + 12169 011a 2000 movs r0, r4 + 12170 011c FFF7FEFF bl I2C_ITSlaveSeqCplt + 12171 .LVL894: +6230:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->State = HAL_I2C_STATE_READY; + 12172 .loc 1 6230 5 view .LVU4041 +6230:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->State = HAL_I2C_STATE_READY; + 12173 .loc 1 6230 23 is_stmt 0 view .LVU4042 + 12174 0120 0F4B ldr r3, .L695+16 + 12175 0122 E362 str r3, [r4, #44] +6231:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->PreviousState = I2C_STATE_NONE; + 12176 .loc 1 6231 5 is_stmt 1 view .LVU4043 +6231:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->PreviousState = I2C_STATE_NONE; + 12177 .loc 1 6231 17 is_stmt 0 view .LVU4044 + 12178 0124 4123 movs r3, #65 + 12179 0126 2022 movs r2, #32 + 12180 0128 E254 strb r2, [r4, r3] +6232:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 12181 .loc 1 6232 5 is_stmt 1 view .LVU4045 +6232:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 12182 .loc 1 6232 25 is_stmt 0 view .LVU4046 + 12183 012a 0023 movs r3, #0 + 12184 012c 2363 str r3, [r4, #48] +6235:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 12185 .loc 1 6235 5 is_stmt 1 view .LVU4047 +6235:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + ARM GAS /tmp/ccuRhBPx.s page 409 + + + 12186 .loc 1 6235 5 view .LVU4048 + 12187 012e 2032 adds r2, r2, #32 + 12188 0130 A354 strb r3, [r4, r2] +6235:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 12189 .loc 1 6235 5 view .LVU4049 +6241:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** #endif /* USE_HAL_I2C_REGISTER_CALLBACKS */ + 12190 .loc 1 6241 5 view .LVU4050 + 12191 0132 2000 movs r0, r4 + 12192 0134 FFF7FEFF bl HAL_I2C_ListenCpltCallback + 12193 .LVL895: + 12194 .L677: +6275:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 12195 .loc 1 6275 1 is_stmt 0 view .LVU4051 + 12196 @ sp needed + 12197 .LVL896: + 12198 .LVL897: +6275:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 12199 .loc 1 6275 1 view .LVU4052 + 12200 0138 70BD pop {r4, r5, r6, pc} + 12201 .LVL898: + 12202 .L694: +6247:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->PreviousState = I2C_STATE_NONE; + 12203 .loc 1 6247 5 is_stmt 1 view .LVU4053 +6247:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->PreviousState = I2C_STATE_NONE; + 12204 .loc 1 6247 17 is_stmt 0 view .LVU4054 + 12205 013a 1F33 adds r3, r3, #31 + 12206 013c 2022 movs r2, #32 + 12207 013e E254 strb r2, [r4, r3] +6248:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 12208 .loc 1 6248 5 is_stmt 1 view .LVU4055 +6248:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 12209 .loc 1 6248 25 is_stmt 0 view .LVU4056 + 12210 0140 0023 movs r3, #0 + 12211 0142 2363 str r3, [r4, #48] +6251:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 12212 .loc 1 6251 5 is_stmt 1 view .LVU4057 +6251:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 12213 .loc 1 6251 5 view .LVU4058 + 12214 0144 2032 adds r2, r2, #32 + 12215 0146 A354 strb r3, [r4, r2] +6251:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 12216 .loc 1 6251 5 view .LVU4059 +6257:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** #endif /* USE_HAL_I2C_REGISTER_CALLBACKS */ + 12217 .loc 1 6257 5 view .LVU4060 + 12218 0148 2000 movs r0, r4 + 12219 014a FFF7FEFF bl HAL_I2C_SlaveRxCpltCallback + 12220 .LVL899: + 12221 014e F3E7 b .L677 + 12222 .L696: + 12223 .align 2 + 12224 .L695: + 12225 0150 02800000 .word 32770 + 12226 0154 01800000 .word 32769 + 12227 0158 00E800FE .word -33495040 + 12228 015c FFBFFFFF .word -16385 + 12229 0160 0000FFFF .word -65536 + 12230 0164 FF7FFFFF .word -32769 + ARM GAS /tmp/ccuRhBPx.s page 410 + + + 12231 .cfi_endproc + 12232 .LFE101: + 12234 .section .text.I2C_Slave_ISR_IT,"ax",%progbits + 12235 .align 1 + 12236 .syntax unified + 12237 .code 16 + 12238 .thumb_func + 12240 I2C_Slave_ISR_IT: + 12241 .LVL900: + 12242 .LFB91: +5092:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** uint32_t tmpoptions = hi2c->XferOptions; + 12243 .loc 1 5092 1 view -0 + 12244 .cfi_startproc + 12245 @ args = 0, pretend = 0, frame = 0 + 12246 @ frame_needed = 0, uses_anonymous_args = 0 +5092:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** uint32_t tmpoptions = hi2c->XferOptions; + 12247 .loc 1 5092 1 is_stmt 0 view .LVU4062 + 12248 0000 F8B5 push {r3, r4, r5, r6, r7, lr} + 12249 .cfi_def_cfa_offset 24 + 12250 .cfi_offset 3, -24 + 12251 .cfi_offset 4, -20 + 12252 .cfi_offset 5, -16 + 12253 .cfi_offset 6, -12 + 12254 .cfi_offset 7, -8 + 12255 .cfi_offset 14, -4 + 12256 0002 0400 movs r4, r0 + 12257 0004 0D00 movs r5, r1 + 12258 0006 1600 movs r6, r2 +5093:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** uint32_t tmpITFlags = ITFlags; + 12259 .loc 1 5093 3 is_stmt 1 view .LVU4063 +5093:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** uint32_t tmpITFlags = ITFlags; + 12260 .loc 1 5093 12 is_stmt 0 view .LVU4064 + 12261 0008 C76A ldr r7, [r0, #44] + 12262 .LVL901: +5094:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 12263 .loc 1 5094 3 is_stmt 1 view .LVU4065 +5097:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 12264 .loc 1 5097 3 view .LVU4066 +5097:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 12265 .loc 1 5097 3 view .LVU4067 + 12266 000a 4023 movs r3, #64 + 12267 000c C35C ldrb r3, [r0, r3] + 12268 000e 012B cmp r3, #1 + 12269 0010 00D1 bne .LCB11390 + 12270 0012 96E0 b .L711 @long jump + 12271 .LCB11390: +5097:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 12272 .loc 1 5097 3 discriminator 2 view .LVU4068 + 12273 0014 0123 movs r3, #1 + 12274 0016 4022 movs r2, #64 + 12275 .LVL902: +5097:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 12276 .loc 1 5097 3 is_stmt 0 discriminator 2 view .LVU4069 + 12277 0018 8354 strb r3, [r0, r2] +5097:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 12278 .loc 1 5097 3 is_stmt 1 discriminator 2 view .LVU4070 +5100:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** (I2C_CHECK_IT_SOURCE(ITSources, I2C_IT_STOPI) != RESET)) + ARM GAS /tmp/ccuRhBPx.s page 411 + + + 12279 .loc 1 5100 3 view .LVU4071 +5100:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** (I2C_CHECK_IT_SOURCE(ITSources, I2C_IT_STOPI) != RESET)) + 12280 .loc 1 5100 8 is_stmt 0 view .LVU4072 + 12281 001a 4A09 lsrs r2, r1, #5 +5100:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** (I2C_CHECK_IT_SOURCE(ITSources, I2C_IT_STOPI) != RESET)) + 12282 .loc 1 5100 6 view .LVU4073 + 12283 001c 1342 tst r3, r2 + 12284 001e 01D0 beq .L699 +5100:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** (I2C_CHECK_IT_SOURCE(ITSources, I2C_IT_STOPI) != RESET)) + 12285 .loc 1 5100 61 discriminator 1 view .LVU4074 + 12286 0020 B306 lsls r3, r6, #26 + 12287 0022 17D4 bmi .L721 + 12288 .LVL903: + 12289 .L699: +5107:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** (I2C_CHECK_IT_SOURCE(ITSources, I2C_IT_NACKI) != RESET)) + 12290 .loc 1 5107 3 is_stmt 1 view .LVU4075 +5107:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** (I2C_CHECK_IT_SOURCE(ITSources, I2C_IT_NACKI) != RESET)) + 12291 .loc 1 5107 6 is_stmt 0 view .LVU4076 + 12292 0024 EB06 lsls r3, r5, #27 + 12293 0026 40D5 bpl .L700 +5107:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** (I2C_CHECK_IT_SOURCE(ITSources, I2C_IT_NACKI) != RESET)) + 12294 .loc 1 5107 58 discriminator 1 view .LVU4077 + 12295 0028 F306 lsls r3, r6, #27 + 12296 002a 3ED5 bpl .L700 +5114:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { + 12297 .loc 1 5114 5 is_stmt 1 view .LVU4078 +5114:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { + 12298 .loc 1 5114 13 is_stmt 0 view .LVU4079 + 12299 002c 638D ldrh r3, [r4, #42] + 12300 002e 9BB2 uxth r3, r3 +5114:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { + 12301 .loc 1 5114 8 view .LVU4080 + 12302 0030 002B cmp r3, #0 + 12303 0032 28D1 bne .L701 +5116:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* Same action must be done for (tmpoptions == I2C_LAST_FRAME) which removed for + 12304 .loc 1 5116 7 is_stmt 1 view .LVU4081 +5116:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* Same action must be done for (tmpoptions == I2C_LAST_FRAME) which removed for + 12305 .loc 1 5116 16 is_stmt 0 view .LVU4082 + 12306 0034 4133 adds r3, r3, #65 + 12307 0036 E35C ldrb r3, [r4, r3] +5116:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* Same action must be done for (tmpoptions == I2C_LAST_FRAME) which removed for + 12308 .loc 1 5116 10 view .LVU4083 + 12309 0038 282B cmp r3, #40 + 12310 003a 0ED0 beq .L722 + 12311 .L702: +5123:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { + 12312 .loc 1 5123 12 is_stmt 1 view .LVU4084 +5123:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { + 12313 .loc 1 5123 21 is_stmt 0 view .LVU4085 + 12314 003c 4123 movs r3, #65 + 12315 003e E35C ldrb r3, [r4, r3] +5123:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { + 12316 .loc 1 5123 15 view .LVU4086 + 12317 0040 292B cmp r3, #41 + 12318 0042 13D0 beq .L723 + 12319 .L704: +5138:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } + ARM GAS /tmp/ccuRhBPx.s page 412 + + + 12320 .loc 1 5138 9 is_stmt 1 view .LVU4087 + 12321 0044 2368 ldr r3, [r4] + 12322 0046 1022 movs r2, #16 + 12323 0048 DA61 str r2, [r3, #28] + 12324 .LVL904: + 12325 .L703: +5215:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 12326 .loc 1 5215 3 view .LVU4088 +5218:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 12327 .loc 1 5218 3 view .LVU4089 +5218:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 12328 .loc 1 5218 3 view .LVU4090 + 12329 004a 4023 movs r3, #64 + 12330 004c 0022 movs r2, #0 + 12331 004e E254 strb r2, [r4, r3] +5218:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 12332 .loc 1 5218 3 view .LVU4091 +5220:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } + 12333 .loc 1 5220 3 view .LVU4092 +5220:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } + 12334 .loc 1 5220 10 is_stmt 0 view .LVU4093 + 12335 0050 0020 movs r0, #0 + 12336 .L698: +5221:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 12337 .loc 1 5221 1 view .LVU4094 + 12338 @ sp needed + 12339 .LVL905: + 12340 .LVL906: +5221:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 12341 .loc 1 5221 1 view .LVU4095 + 12342 0052 F8BD pop {r3, r4, r5, r6, r7, pc} + 12343 .LVL907: + 12344 .L721: +5104:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } + 12345 .loc 1 5104 5 is_stmt 1 view .LVU4096 + 12346 0054 FFF7FEFF bl I2C_ITSlaveCplt + 12347 .LVL908: +5104:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } + 12348 .loc 1 5104 5 is_stmt 0 view .LVU4097 + 12349 0058 E4E7 b .L699 + 12350 .L722: +5116:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* Same action must be done for (tmpoptions == I2C_LAST_FRAME) which removed for + 12351 .loc 1 5116 49 discriminator 1 view .LVU4098 + 12352 005a 8023 movs r3, #128 + 12353 005c 9B04 lsls r3, r3, #18 + 12354 005e 9F42 cmp r7, r3 + 12355 0060 ECD1 bne .L702 +5121:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } + 12356 .loc 1 5121 9 is_stmt 1 view .LVU4099 + 12357 0062 2900 movs r1, r5 + 12358 0064 2000 movs r0, r4 + 12359 0066 FFF7FEFF bl I2C_ITListenCplt + 12360 .LVL909: + 12361 006a EEE7 b .L703 + 12362 .L723: +5123:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { + 12363 .loc 1 5123 62 is_stmt 0 discriminator 1 view .LVU4100 + ARM GAS /tmp/ccuRhBPx.s page 413 + + + 12364 006c 364B ldr r3, .L725 + 12365 006e 9F42 cmp r7, r3 + 12366 0070 E8D0 beq .L704 +5126:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 12367 .loc 1 5126 9 is_stmt 1 view .LVU4101 + 12368 0072 2368 ldr r3, [r4] + 12369 0074 1022 movs r2, #16 + 12370 0076 DA61 str r2, [r3, #28] +5129:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 12371 .loc 1 5129 9 view .LVU4102 + 12372 0078 2000 movs r0, r4 + 12373 007a FFF7FEFF bl I2C_Flush_TXDR + 12374 .LVL910: +5133:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } + 12375 .loc 1 5133 9 view .LVU4103 + 12376 007e 2000 movs r0, r4 + 12377 0080 FFF7FEFF bl I2C_ITSlaveSeqCplt + 12378 .LVL911: + 12379 0084 E1E7 b .L703 + 12380 .L701: +5145:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 12381 .loc 1 5145 7 view .LVU4104 + 12382 0086 2368 ldr r3, [r4] + 12383 0088 1022 movs r2, #16 + 12384 008a DA61 str r2, [r3, #28] +5148:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 12385 .loc 1 5148 7 view .LVU4105 +5148:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 12386 .loc 1 5148 11 is_stmt 0 view .LVU4106 + 12387 008c 636C ldr r3, [r4, #68] +5148:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 12388 .loc 1 5148 23 view .LVU4107 + 12389 008e 0C3A subs r2, r2, #12 + 12390 0090 1343 orrs r3, r2 + 12391 0092 6364 str r3, [r4, #68] +5150:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { + 12392 .loc 1 5150 7 is_stmt 1 view .LVU4108 +5150:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { + 12393 .loc 1 5150 10 is_stmt 0 view .LVU4109 + 12394 0094 002F cmp r7, #0 + 12395 0096 03D0 beq .L705 +5150:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { + 12396 .loc 1 5150 43 discriminator 1 view .LVU4110 + 12397 0098 8023 movs r3, #128 + 12398 009a 5B04 lsls r3, r3, #17 + 12399 009c 9F42 cmp r7, r3 + 12400 009e D4D1 bne .L703 + 12401 .L705: +5153:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } + 12402 .loc 1 5153 9 is_stmt 1 view .LVU4111 +5153:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } + 12403 .loc 1 5153 31 is_stmt 0 view .LVU4112 + 12404 00a0 616C ldr r1, [r4, #68] +5153:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } + 12405 .loc 1 5153 9 view .LVU4113 + 12406 00a2 2000 movs r0, r4 + 12407 00a4 FFF7FEFF bl I2C_ITError + ARM GAS /tmp/ccuRhBPx.s page 414 + + + 12408 .LVL912: + 12409 00a8 CFE7 b .L703 + 12410 .L700: +5157:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** (I2C_CHECK_IT_SOURCE(ITSources, I2C_IT_RXI) != RESET)) + 12411 .loc 1 5157 8 is_stmt 1 view .LVU4114 +5157:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** (I2C_CHECK_IT_SOURCE(ITSources, I2C_IT_RXI) != RESET)) + 12412 .loc 1 5157 11 is_stmt 0 view .LVU4115 + 12413 00aa 6B07 lsls r3, r5, #29 + 12414 00ac 1ED5 bpl .L706 +5157:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** (I2C_CHECK_IT_SOURCE(ITSources, I2C_IT_RXI) != RESET)) + 12415 .loc 1 5157 65 discriminator 1 view .LVU4116 + 12416 00ae 7307 lsls r3, r6, #29 + 12417 00b0 1CD5 bpl .L706 +5160:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { + 12418 .loc 1 5160 5 is_stmt 1 view .LVU4117 +5160:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { + 12419 .loc 1 5160 13 is_stmt 0 view .LVU4118 + 12420 00b2 638D ldrh r3, [r4, #42] + 12421 00b4 9BB2 uxth r3, r3 +5160:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { + 12422 .loc 1 5160 8 view .LVU4119 + 12423 00b6 002B cmp r3, #0 + 12424 00b8 0DD0 beq .L707 +5163:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 12425 .loc 1 5163 7 is_stmt 1 view .LVU4120 +5163:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 12426 .loc 1 5163 38 is_stmt 0 view .LVU4121 + 12427 00ba 2368 ldr r3, [r4] +5163:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 12428 .loc 1 5163 48 view .LVU4122 + 12429 00bc 5A6A ldr r2, [r3, #36] +5163:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 12430 .loc 1 5163 12 view .LVU4123 + 12431 00be 636A ldr r3, [r4, #36] +5163:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 12432 .loc 1 5163 23 view .LVU4124 + 12433 00c0 1A70 strb r2, [r3] +5166:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 12434 .loc 1 5166 7 is_stmt 1 view .LVU4125 +5166:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 12435 .loc 1 5166 11 is_stmt 0 view .LVU4126 + 12436 00c2 636A ldr r3, [r4, #36] +5166:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 12437 .loc 1 5166 21 view .LVU4127 + 12438 00c4 0133 adds r3, r3, #1 + 12439 00c6 6362 str r3, [r4, #36] +5168:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->XferCount--; + 12440 .loc 1 5168 7 is_stmt 1 view .LVU4128 +5168:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->XferCount--; + 12441 .loc 1 5168 11 is_stmt 0 view .LVU4129 + 12442 00c8 238D ldrh r3, [r4, #40] +5168:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->XferCount--; + 12443 .loc 1 5168 21 view .LVU4130 + 12444 00ca 013B subs r3, r3, #1 + 12445 00cc 2385 strh r3, [r4, #40] +5169:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } + 12446 .loc 1 5169 7 is_stmt 1 view .LVU4131 + ARM GAS /tmp/ccuRhBPx.s page 415 + + +5169:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } + 12447 .loc 1 5169 11 is_stmt 0 view .LVU4132 + 12448 00ce 638D ldrh r3, [r4, #42] +5169:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } + 12449 .loc 1 5169 22 view .LVU4133 + 12450 00d0 013B subs r3, r3, #1 + 12451 00d2 9BB2 uxth r3, r3 + 12452 00d4 6385 strh r3, [r4, #42] + 12453 .L707: +5172:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** (tmpoptions != I2C_NO_OPTION_FRAME)) + 12454 .loc 1 5172 5 is_stmt 1 view .LVU4134 +5172:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** (tmpoptions != I2C_NO_OPTION_FRAME)) + 12455 .loc 1 5172 14 is_stmt 0 view .LVU4135 + 12456 00d6 638D ldrh r3, [r4, #42] + 12457 00d8 9BB2 uxth r3, r3 +5172:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** (tmpoptions != I2C_NO_OPTION_FRAME)) + 12458 .loc 1 5172 8 view .LVU4136 + 12459 00da 002B cmp r3, #0 + 12460 00dc B5D1 bne .L703 +5172:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** (tmpoptions != I2C_NO_OPTION_FRAME)) + 12461 .loc 1 5172 33 discriminator 1 view .LVU4137 + 12462 00de 1A4B ldr r3, .L725 + 12463 00e0 9F42 cmp r7, r3 + 12464 00e2 B2D0 beq .L703 +5176:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } + 12465 .loc 1 5176 7 is_stmt 1 view .LVU4138 + 12466 00e4 2000 movs r0, r4 + 12467 00e6 FFF7FEFF bl I2C_ITSlaveSeqCplt + 12468 .LVL913: + 12469 00ea AEE7 b .L703 + 12470 .L706: +5179:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** (I2C_CHECK_IT_SOURCE(ITSources, I2C_IT_ADDRI) != RESET)) + 12471 .loc 1 5179 8 view .LVU4139 +5179:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** (I2C_CHECK_IT_SOURCE(ITSources, I2C_IT_ADDRI) != RESET)) + 12472 .loc 1 5179 11 is_stmt 0 view .LVU4140 + 12473 00ec 2B07 lsls r3, r5, #28 + 12474 00ee 01D5 bpl .L708 +5179:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** (I2C_CHECK_IT_SOURCE(ITSources, I2C_IT_ADDRI) != RESET)) + 12475 .loc 1 5179 65 discriminator 1 view .LVU4141 + 12476 00f0 3307 lsls r3, r6, #28 + 12477 00f2 16D4 bmi .L724 + 12478 .L708: +5184:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** (I2C_CHECK_IT_SOURCE(ITSources, I2C_IT_TXI) != RESET)) + 12479 .loc 1 5184 8 is_stmt 1 view .LVU4142 +5184:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** (I2C_CHECK_IT_SOURCE(ITSources, I2C_IT_TXI) != RESET)) + 12480 .loc 1 5184 11 is_stmt 0 view .LVU4143 + 12481 00f4 AD07 lsls r5, r5, #30 + 12482 00f6 A8D5 bpl .L703 + 12483 .LVL914: +5184:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** (I2C_CHECK_IT_SOURCE(ITSources, I2C_IT_TXI) != RESET)) + 12484 .loc 1 5184 65 discriminator 1 view .LVU4144 + 12485 00f8 B607 lsls r6, r6, #30 + 12486 00fa A6D5 bpl .L703 + 12487 .LVL915: +5191:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { + 12488 .loc 1 5191 5 is_stmt 1 view .LVU4145 +5191:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { + ARM GAS /tmp/ccuRhBPx.s page 416 + + + 12489 .loc 1 5191 13 is_stmt 0 view .LVU4146 + 12490 00fc 638D ldrh r3, [r4, #42] + 12491 00fe 9BB2 uxth r3, r3 +5191:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { + 12492 .loc 1 5191 8 view .LVU4147 + 12493 0100 002B cmp r3, #0 + 12494 0102 13D0 beq .L709 +5194:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 12495 .loc 1 5194 7 is_stmt 1 view .LVU4148 +5194:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 12496 .loc 1 5194 35 is_stmt 0 view .LVU4149 + 12497 0104 626A ldr r2, [r4, #36] +5194:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 12498 .loc 1 5194 11 view .LVU4150 + 12499 0106 2368 ldr r3, [r4] +5194:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 12500 .loc 1 5194 30 view .LVU4151 + 12501 0108 1278 ldrb r2, [r2] +5194:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 12502 .loc 1 5194 28 view .LVU4152 + 12503 010a 9A62 str r2, [r3, #40] +5197:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 12504 .loc 1 5197 7 is_stmt 1 view .LVU4153 +5197:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 12505 .loc 1 5197 11 is_stmt 0 view .LVU4154 + 12506 010c 636A ldr r3, [r4, #36] +5197:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 12507 .loc 1 5197 21 view .LVU4155 + 12508 010e 0133 adds r3, r3, #1 + 12509 0110 6362 str r3, [r4, #36] +5199:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->XferSize--; + 12510 .loc 1 5199 7 is_stmt 1 view .LVU4156 +5199:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->XferSize--; + 12511 .loc 1 5199 11 is_stmt 0 view .LVU4157 + 12512 0112 638D ldrh r3, [r4, #42] +5199:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->XferSize--; + 12513 .loc 1 5199 22 view .LVU4158 + 12514 0114 013B subs r3, r3, #1 + 12515 0116 9BB2 uxth r3, r3 + 12516 0118 6385 strh r3, [r4, #42] +5200:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } + 12517 .loc 1 5200 7 is_stmt 1 view .LVU4159 +5200:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } + 12518 .loc 1 5200 11 is_stmt 0 view .LVU4160 + 12519 011a 238D ldrh r3, [r4, #40] +5200:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } + 12520 .loc 1 5200 21 view .LVU4161 + 12521 011c 013B subs r3, r3, #1 + 12522 011e 2385 strh r3, [r4, #40] + 12523 0120 93E7 b .L703 + 12524 .LVL916: + 12525 .L724: +5182:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } + 12526 .loc 1 5182 5 is_stmt 1 view .LVU4162 + 12527 0122 2900 movs r1, r5 + 12528 0124 2000 movs r0, r4 + 12529 0126 FFF7FEFF bl I2C_ITAddrCplt + ARM GAS /tmp/ccuRhBPx.s page 417 + + + 12530 .LVL917: + 12531 012a 8EE7 b .L703 + 12532 .LVL918: + 12533 .L709: +5204:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { + 12534 .loc 1 5204 7 view .LVU4163 +5204:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { + 12535 .loc 1 5204 10 is_stmt 0 view .LVU4164 + 12536 012c 8023 movs r3, #128 + 12537 012e 5B04 lsls r3, r3, #17 + 12538 0130 9F42 cmp r7, r3 + 12539 0132 02D0 beq .L710 +5204:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { + 12540 .loc 1 5204 42 discriminator 1 view .LVU4165 + 12541 0134 002F cmp r7, #0 + 12542 0136 00D0 beq .LCB11680 + 12543 0138 87E7 b .L703 @long jump + 12544 .LCB11680: + 12545 .L710: +5208:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } + 12546 .loc 1 5208 9 is_stmt 1 view .LVU4166 + 12547 013a 2000 movs r0, r4 + 12548 013c FFF7FEFF bl I2C_ITSlaveSeqCplt + 12549 .LVL919: + 12550 0140 83E7 b .L703 + 12551 .LVL920: + 12552 .L711: +5097:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 12553 .loc 1 5097 3 is_stmt 0 discriminator 1 view .LVU4167 + 12554 0142 0220 movs r0, #2 + 12555 .LVL921: +5097:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 12556 .loc 1 5097 3 discriminator 1 view .LVU4168 + 12557 0144 85E7 b .L698 + 12558 .L726: + 12559 0146 C046 .align 2 + 12560 .L725: + 12561 0148 0000FFFF .word -65536 + 12562 .cfi_endproc + 12563 .LFE91: + 12565 .section .text.I2C_ITMasterCplt,"ax",%progbits + 12566 .align 1 + 12567 .syntax unified + 12568 .code 16 + 12569 .thumb_func + 12571 I2C_ITMasterCplt: + 12572 .LVL922: + 12573 .LFB100: +5982:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** uint32_t tmperror; + 12574 .loc 1 5982 1 is_stmt 1 view -0 + 12575 .cfi_startproc + 12576 @ args = 0, pretend = 0, frame = 8 + 12577 @ frame_needed = 0, uses_anonymous_args = 0 +5982:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** uint32_t tmperror; + 12578 .loc 1 5982 1 is_stmt 0 view .LVU4170 + 12579 0000 30B5 push {r4, r5, lr} + 12580 .cfi_def_cfa_offset 12 + ARM GAS /tmp/ccuRhBPx.s page 418 + + + 12581 .cfi_offset 4, -12 + 12582 .cfi_offset 5, -8 + 12583 .cfi_offset 14, -4 + 12584 0002 83B0 sub sp, sp, #12 + 12585 .cfi_def_cfa_offset 24 + 12586 0004 0400 movs r4, r0 + 12587 0006 0D00 movs r5, r1 +5983:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** uint32_t tmpITFlags = ITFlags; + 12588 .loc 1 5983 3 is_stmt 1 view .LVU4171 +5984:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** __IO uint32_t tmpreg; + 12589 .loc 1 5984 3 view .LVU4172 + 12590 .LVL923: +5985:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 12591 .loc 1 5985 3 view .LVU4173 +5988:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 12592 .loc 1 5988 3 view .LVU4174 + 12593 0008 0368 ldr r3, [r0] + 12594 000a 2022 movs r2, #32 + 12595 000c DA61 str r2, [r3, #28] +5991:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { + 12596 .loc 1 5991 3 view .LVU4175 +5991:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { + 12597 .loc 1 5991 11 is_stmt 0 view .LVU4176 + 12598 000e 4123 movs r3, #65 + 12599 0010 C35C ldrb r3, [r0, r3] +5991:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { + 12600 .loc 1 5991 6 view .LVU4177 + 12601 0012 212B cmp r3, #33 + 12602 0014 29D0 beq .L740 +5996:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { + 12603 .loc 1 5996 8 is_stmt 1 view .LVU4178 +5996:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { + 12604 .loc 1 5996 16 is_stmt 0 view .LVU4179 + 12605 0016 4123 movs r3, #65 + 12606 0018 C35C ldrb r3, [r0, r3] +5996:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { + 12607 .loc 1 5996 11 view .LVU4180 + 12608 001a 222B cmp r3, #34 + 12609 001c 2BD0 beq .L741 + 12610 .LVL924: + 12611 .L729: +6004:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 12612 .loc 1 6004 3 is_stmt 1 view .LVU4181 +6007:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 12613 .loc 1 6007 3 view .LVU4182 + 12614 001e 2268 ldr r2, [r4] + 12615 0020 5368 ldr r3, [r2, #4] + 12616 0022 3B49 ldr r1, .L746 + 12617 0024 0B40 ands r3, r1 + 12618 0026 5360 str r3, [r2, #4] +6010:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->XferOptions = I2C_NO_OPTION_FRAME; + 12619 .loc 1 6010 3 view .LVU4183 +6010:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->XferOptions = I2C_NO_OPTION_FRAME; + 12620 .loc 1 6010 23 is_stmt 0 view .LVU4184 + 12621 0028 0023 movs r3, #0 + 12622 002a 6363 str r3, [r4, #52] +6011:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + ARM GAS /tmp/ccuRhBPx.s page 419 + + + 12623 .loc 1 6011 3 is_stmt 1 view .LVU4185 +6011:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 12624 .loc 1 6011 23 is_stmt 0 view .LVU4186 + 12625 002c 394B ldr r3, .L746+4 + 12626 002e E362 str r3, [r4, #44] +6013:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { + 12627 .loc 1 6013 3 is_stmt 1 view .LVU4187 +6013:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { + 12628 .loc 1 6013 6 is_stmt 0 view .LVU4188 + 12629 0030 EB06 lsls r3, r5, #27 + 12630 0032 06D5 bpl .L730 +6016:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 12631 .loc 1 6016 5 is_stmt 1 view .LVU4189 + 12632 0034 2368 ldr r3, [r4] + 12633 0036 1022 movs r2, #16 + 12634 0038 DA61 str r2, [r3, #28] +6019:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } + 12635 .loc 1 6019 5 view .LVU4190 +6019:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } + 12636 .loc 1 6019 9 is_stmt 0 view .LVU4191 + 12637 003a 636C ldr r3, [r4, #68] +6019:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } + 12638 .loc 1 6019 21 view .LVU4192 + 12639 003c 0C3A subs r2, r2, #12 + 12640 003e 1343 orrs r3, r2 + 12641 0040 6364 str r3, [r4, #68] + 12642 .L730: +6023:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { + 12643 .loc 1 6023 3 is_stmt 1 view .LVU4193 +6023:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { + 12644 .loc 1 6023 12 is_stmt 0 view .LVU4194 + 12645 0042 4123 movs r3, #65 + 12646 0044 E35C ldrb r3, [r4, r3] +6023:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { + 12647 .loc 1 6023 6 view .LVU4195 + 12648 0046 602B cmp r3, #96 + 12649 0048 1BD0 beq .L742 + 12650 .LVL925: + 12651 .L731: +6031:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 12652 .loc 1 6031 3 is_stmt 1 view .LVU4196 + 12653 004a 2000 movs r0, r4 + 12654 004c FFF7FEFF bl I2C_Flush_TXDR + 12655 .LVL926: +6034:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 12656 .loc 1 6034 3 view .LVU4197 +6034:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 12657 .loc 1 6034 12 is_stmt 0 view .LVU4198 + 12658 0050 626C ldr r2, [r4, #68] + 12659 .LVL927: +6037:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { + 12660 .loc 1 6037 3 is_stmt 1 view .LVU4199 +6037:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { + 12661 .loc 1 6037 12 is_stmt 0 view .LVU4200 + 12662 0052 4123 movs r3, #65 + 12663 0054 E35C ldrb r3, [r4, r3] +6037:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { + ARM GAS /tmp/ccuRhBPx.s page 420 + + + 12664 .loc 1 6037 6 view .LVU4201 + 12665 0056 602B cmp r3, #96 + 12666 0058 01D0 beq .L732 +6037:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { + 12667 .loc 1 6037 44 discriminator 1 view .LVU4202 + 12668 005a 002A cmp r2, #0 + 12669 005c 1AD0 beq .L733 + 12670 .L732: +6040:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } + 12671 .loc 1 6040 5 is_stmt 1 view .LVU4203 +6040:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } + 12672 .loc 1 6040 27 is_stmt 0 view .LVU4204 + 12673 005e 616C ldr r1, [r4, #68] +6040:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } + 12674 .loc 1 6040 5 view .LVU4205 + 12675 0060 2000 movs r0, r4 + 12676 0062 FFF7FEFF bl I2C_ITError + 12677 .LVL928: + 12678 .L727: +6116:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 12679 .loc 1 6116 1 view .LVU4206 + 12680 0066 03B0 add sp, sp, #12 + 12681 @ sp needed + 12682 .LVL929: +6116:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 12683 .loc 1 6116 1 view .LVU4207 + 12684 0068 30BD pop {r4, r5, pc} + 12685 .LVL930: + 12686 .L740: +5993:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->PreviousState = I2C_STATE_MASTER_BUSY_TX; + 12687 .loc 1 5993 5 is_stmt 1 view .LVU4208 + 12688 006a 0121 movs r1, #1 + 12689 .LVL931: +5993:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->PreviousState = I2C_STATE_MASTER_BUSY_TX; + 12690 .loc 1 5993 5 is_stmt 0 view .LVU4209 + 12691 006c FFF7FEFF bl I2C_Disable_IRQ + 12692 .LVL932: +5994:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } + 12693 .loc 1 5994 5 is_stmt 1 view .LVU4210 +5994:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } + 12694 .loc 1 5994 25 is_stmt 0 view .LVU4211 + 12695 0070 1123 movs r3, #17 + 12696 0072 2363 str r3, [r4, #48] + 12697 0074 D3E7 b .L729 + 12698 .LVL933: + 12699 .L741: +5998:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->PreviousState = I2C_STATE_MASTER_BUSY_RX; + 12700 .loc 1 5998 5 is_stmt 1 view .LVU4212 + 12701 0076 0221 movs r1, #2 + 12702 .LVL934: +5998:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->PreviousState = I2C_STATE_MASTER_BUSY_RX; + 12703 .loc 1 5998 5 is_stmt 0 view .LVU4213 + 12704 0078 FFF7FEFF bl I2C_Disable_IRQ + 12705 .LVL935: +5999:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } + 12706 .loc 1 5999 5 is_stmt 1 view .LVU4214 +5999:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } + ARM GAS /tmp/ccuRhBPx.s page 421 + + + 12707 .loc 1 5999 25 is_stmt 0 view .LVU4215 + 12708 007c 1223 movs r3, #18 + 12709 007e 2363 str r3, [r4, #48] + 12710 0080 CDE7 b .L729 + 12711 .L742: +6023:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { + 12712 .loc 1 6023 44 discriminator 1 view .LVU4216 + 12713 0082 6D07 lsls r5, r5, #29 + 12714 0084 E1D5 bpl .L731 + 12715 .LVL936: +6026:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** UNUSED(tmpreg); + 12716 .loc 1 6026 5 is_stmt 1 view .LVU4217 +6026:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** UNUSED(tmpreg); + 12717 .loc 1 6026 27 is_stmt 0 view .LVU4218 + 12718 0086 2368 ldr r3, [r4] +6026:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** UNUSED(tmpreg); + 12719 .loc 1 6026 37 view .LVU4219 + 12720 0088 5A6A ldr r2, [r3, #36] + 12721 008a FF23 movs r3, #255 + 12722 008c 1340 ands r3, r2 +6026:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** UNUSED(tmpreg); + 12723 .loc 1 6026 12 view .LVU4220 + 12724 008e 0193 str r3, [sp, #4] +6027:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } + 12725 .loc 1 6027 5 is_stmt 1 view .LVU4221 + 12726 0090 019B ldr r3, [sp, #4] + 12727 0092 DAE7 b .L731 + 12728 .LVL937: + 12729 .L733: +6043:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { + 12730 .loc 1 6043 8 view .LVU4222 +6043:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { + 12731 .loc 1 6043 16 is_stmt 0 view .LVU4223 + 12732 0094 4123 movs r3, #65 + 12733 0096 E35C ldrb r3, [r4, r3] +6043:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { + 12734 .loc 1 6043 11 view .LVU4224 + 12735 0098 212B cmp r3, #33 + 12736 009a 15D0 beq .L743 +6078:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { + 12737 .loc 1 6078 8 is_stmt 1 view .LVU4225 +6078:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { + 12738 .loc 1 6078 16 is_stmt 0 view .LVU4226 + 12739 009c 4123 movs r3, #65 + 12740 009e E35C ldrb r3, [r4, r3] +6078:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { + 12741 .loc 1 6078 11 view .LVU4227 + 12742 00a0 222B cmp r3, #34 + 12743 00a2 E0D1 bne .L727 +6080:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->PreviousState = I2C_STATE_NONE; + 12744 .loc 1 6080 5 is_stmt 1 view .LVU4228 +6080:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->PreviousState = I2C_STATE_NONE; + 12745 .loc 1 6080 17 is_stmt 0 view .LVU4229 + 12746 00a4 1F33 adds r3, r3, #31 + 12747 00a6 2022 movs r2, #32 + 12748 .LVL938: +6080:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->PreviousState = I2C_STATE_NONE; + ARM GAS /tmp/ccuRhBPx.s page 422 + + + 12749 .loc 1 6080 17 view .LVU4230 + 12750 00a8 E254 strb r2, [r4, r3] +6081:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 12751 .loc 1 6081 5 is_stmt 1 view .LVU4231 +6081:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 12752 .loc 1 6081 25 is_stmt 0 view .LVU4232 + 12753 00aa 0023 movs r3, #0 + 12754 00ac 2363 str r3, [r4, #48] +6083:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { + 12755 .loc 1 6083 5 is_stmt 1 view .LVU4233 +6083:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { + 12756 .loc 1 6083 13 is_stmt 0 view .LVU4234 + 12757 00ae 4233 adds r3, r3, #66 + 12758 00b0 E35C ldrb r3, [r4, r3] +6083:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { + 12759 .loc 1 6083 8 view .LVU4235 + 12760 00b2 402B cmp r3, #64 + 12761 00b4 23D0 beq .L744 +6099:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 12762 .loc 1 6099 7 is_stmt 1 view .LVU4236 +6099:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 12763 .loc 1 6099 18 is_stmt 0 view .LVU4237 + 12764 00b6 0023 movs r3, #0 + 12765 00b8 4222 movs r2, #66 + 12766 00ba A354 strb r3, [r4, r2] +6102:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 12767 .loc 1 6102 7 is_stmt 1 view .LVU4238 +6102:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 12768 .loc 1 6102 7 view .LVU4239 + 12769 00bc 023A subs r2, r2, #2 + 12770 00be A354 strb r3, [r4, r2] +6102:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 12771 .loc 1 6102 7 view .LVU4240 +6108:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** #endif /* USE_HAL_I2C_REGISTER_CALLBACKS */ + 12772 .loc 1 6108 7 view .LVU4241 + 12773 00c0 2000 movs r0, r4 + 12774 00c2 FFF7FEFF bl HAL_I2C_MasterRxCpltCallback + 12775 .LVL939: +6115:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } + 12776 .loc 1 6115 3 view .LVU4242 +6116:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 12777 .loc 1 6116 1 is_stmt 0 view .LVU4243 + 12778 00c6 CEE7 b .L727 + 12779 .LVL940: + 12780 .L743: +6045:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->PreviousState = I2C_STATE_NONE; + 12781 .loc 1 6045 5 is_stmt 1 view .LVU4244 +6045:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->PreviousState = I2C_STATE_NONE; + 12782 .loc 1 6045 17 is_stmt 0 view .LVU4245 + 12783 00c8 2033 adds r3, r3, #32 + 12784 00ca 2022 movs r2, #32 + 12785 .LVL941: +6045:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->PreviousState = I2C_STATE_NONE; + 12786 .loc 1 6045 17 view .LVU4246 + 12787 00cc E254 strb r2, [r4, r3] +6046:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 12788 .loc 1 6046 5 is_stmt 1 view .LVU4247 + ARM GAS /tmp/ccuRhBPx.s page 423 + + +6046:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 12789 .loc 1 6046 25 is_stmt 0 view .LVU4248 + 12790 00ce 0023 movs r3, #0 + 12791 00d0 2363 str r3, [r4, #48] +6048:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { + 12792 .loc 1 6048 5 is_stmt 1 view .LVU4249 +6048:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { + 12793 .loc 1 6048 13 is_stmt 0 view .LVU4250 + 12794 00d2 4233 adds r3, r3, #66 + 12795 00d4 E35C ldrb r3, [r4, r3] +6048:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { + 12796 .loc 1 6048 8 view .LVU4251 + 12797 00d6 402B cmp r3, #64 + 12798 00d8 08D0 beq .L745 +6064:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 12799 .loc 1 6064 7 is_stmt 1 view .LVU4252 +6064:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 12800 .loc 1 6064 18 is_stmt 0 view .LVU4253 + 12801 00da 0023 movs r3, #0 + 12802 00dc 4222 movs r2, #66 + 12803 00de A354 strb r3, [r4, r2] +6067:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 12804 .loc 1 6067 7 is_stmt 1 view .LVU4254 +6067:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 12805 .loc 1 6067 7 view .LVU4255 + 12806 00e0 023A subs r2, r2, #2 + 12807 00e2 A354 strb r3, [r4, r2] +6067:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 12808 .loc 1 6067 7 view .LVU4256 +6073:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** #endif /* USE_HAL_I2C_REGISTER_CALLBACKS */ + 12809 .loc 1 6073 7 view .LVU4257 + 12810 00e4 2000 movs r0, r4 + 12811 00e6 FFF7FEFF bl HAL_I2C_MasterTxCpltCallback + 12812 .LVL942: + 12813 00ea BCE7 b .L727 + 12814 .L745: +6050:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 12815 .loc 1 6050 7 view .LVU4258 +6050:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 12816 .loc 1 6050 18 is_stmt 0 view .LVU4259 + 12817 00ec 0023 movs r3, #0 + 12818 00ee 2232 adds r2, r2, #34 + 12819 00f0 A354 strb r3, [r4, r2] +6053:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 12820 .loc 1 6053 7 is_stmt 1 view .LVU4260 +6053:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 12821 .loc 1 6053 7 view .LVU4261 + 12822 00f2 023A subs r2, r2, #2 + 12823 00f4 A354 strb r3, [r4, r2] +6053:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 12824 .loc 1 6053 7 view .LVU4262 +6059:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** #endif /* USE_HAL_I2C_REGISTER_CALLBACKS */ + 12825 .loc 1 6059 7 view .LVU4263 + 12826 00f6 2000 movs r0, r4 + 12827 00f8 FFF7FEFF bl HAL_I2C_MemTxCpltCallback + 12828 .LVL943: + 12829 00fc B3E7 b .L727 + ARM GAS /tmp/ccuRhBPx.s page 424 + + + 12830 .L744: +6085:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 12831 .loc 1 6085 7 view .LVU4264 +6085:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 12832 .loc 1 6085 18 is_stmt 0 view .LVU4265 + 12833 00fe 0023 movs r3, #0 + 12834 0100 2232 adds r2, r2, #34 + 12835 0102 A354 strb r3, [r4, r2] +6088:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 12836 .loc 1 6088 7 is_stmt 1 view .LVU4266 +6088:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 12837 .loc 1 6088 7 view .LVU4267 + 12838 0104 023A subs r2, r2, #2 + 12839 0106 A354 strb r3, [r4, r2] +6088:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 12840 .loc 1 6088 7 view .LVU4268 +6094:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** #endif /* USE_HAL_I2C_REGISTER_CALLBACKS */ + 12841 .loc 1 6094 7 view .LVU4269 + 12842 0108 2000 movs r0, r4 + 12843 010a FFF7FEFF bl HAL_I2C_MemRxCpltCallback + 12844 .LVL944: + 12845 010e AAE7 b .L727 + 12846 .L747: + 12847 .align 2 + 12848 .L746: + 12849 0110 00E800FE .word -33495040 + 12850 0114 0000FFFF .word -65536 + 12851 .cfi_endproc + 12852 .LFE100: + 12854 .section .text.I2C_Master_ISR_IT,"ax",%progbits + 12855 .align 1 + 12856 .syntax unified + 12857 .code 16 + 12858 .thumb_func + 12860 I2C_Master_ISR_IT: + 12861 .LVL945: + 12862 .LFB89: +4809:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** uint16_t devaddress; + 12863 .loc 1 4809 1 view -0 + 12864 .cfi_startproc + 12865 @ args = 0, pretend = 0, frame = 0 + 12866 @ frame_needed = 0, uses_anonymous_args = 0 +4809:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** uint16_t devaddress; + 12867 .loc 1 4809 1 is_stmt 0 view .LVU4271 + 12868 0000 70B5 push {r4, r5, r6, lr} + 12869 .cfi_def_cfa_offset 16 + 12870 .cfi_offset 4, -16 + 12871 .cfi_offset 5, -12 + 12872 .cfi_offset 6, -8 + 12873 .cfi_offset 14, -4 + 12874 0002 82B0 sub sp, sp, #8 + 12875 .cfi_def_cfa_offset 24 + 12876 0004 0400 movs r4, r0 + 12877 0006 0D00 movs r5, r1 + 12878 0008 1600 movs r6, r2 +4810:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** uint32_t tmpITFlags = ITFlags; + 12879 .loc 1 4810 3 is_stmt 1 view .LVU4272 + ARM GAS /tmp/ccuRhBPx.s page 425 + + +4811:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 12880 .loc 1 4811 3 view .LVU4273 + 12881 .LVL946: +4814:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 12882 .loc 1 4814 3 view .LVU4274 +4814:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 12883 .loc 1 4814 3 view .LVU4275 + 12884 000a 4023 movs r3, #64 + 12885 000c C35C ldrb r3, [r0, r3] + 12886 000e 012B cmp r3, #1 + 12887 0010 00D1 bne .LCB12011 + 12888 0012 ADE0 b .L762 @long jump + 12889 .LCB12011: +4814:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 12890 .loc 1 4814 3 discriminator 2 view .LVU4276 + 12891 0014 0123 movs r3, #1 + 12892 0016 4022 movs r2, #64 + 12893 .LVL947: +4814:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 12894 .loc 1 4814 3 is_stmt 0 discriminator 2 view .LVU4277 + 12895 0018 8354 strb r3, [r0, r2] +4814:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 12896 .loc 1 4814 3 is_stmt 1 discriminator 2 view .LVU4278 +4816:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** (I2C_CHECK_IT_SOURCE(ITSources, I2C_IT_NACKI) != RESET)) + 12897 .loc 1 4816 3 view .LVU4279 +4816:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** (I2C_CHECK_IT_SOURCE(ITSources, I2C_IT_NACKI) != RESET)) + 12898 .loc 1 4816 8 is_stmt 0 view .LVU4280 + 12899 001a 0A09 lsrs r2, r1, #4 +4816:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** (I2C_CHECK_IT_SOURCE(ITSources, I2C_IT_NACKI) != RESET)) + 12900 .loc 1 4816 6 view .LVU4281 + 12901 001c 1342 tst r3, r2 + 12902 001e 01D0 beq .L750 +4816:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** (I2C_CHECK_IT_SOURCE(ITSources, I2C_IT_NACKI) != RESET)) + 12903 .loc 1 4816 58 discriminator 1 view .LVU4282 + 12904 0020 F306 lsls r3, r6, #27 + 12905 0022 1ED4 bmi .L775 + 12906 .L750: +4830:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** (I2C_CHECK_IT_SOURCE(ITSources, I2C_IT_RXI) != RESET)) + 12907 .loc 1 4830 8 is_stmt 1 view .LVU4283 +4830:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** (I2C_CHECK_IT_SOURCE(ITSources, I2C_IT_RXI) != RESET)) + 12908 .loc 1 4830 11 is_stmt 0 view .LVU4284 + 12909 0024 6B07 lsls r3, r5, #29 + 12910 0026 26D5 bpl .L752 +4830:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** (I2C_CHECK_IT_SOURCE(ITSources, I2C_IT_RXI) != RESET)) + 12911 .loc 1 4830 65 discriminator 1 view .LVU4285 + 12912 0028 7307 lsls r3, r6, #29 + 12913 002a 24D5 bpl .L752 +4834:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 12914 .loc 1 4834 5 is_stmt 1 view .LVU4286 +4834:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 12915 .loc 1 4834 16 is_stmt 0 view .LVU4287 + 12916 002c 0423 movs r3, #4 + 12917 002e 9D43 bics r5, r3 + 12918 .LVL948: +4837:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 12919 .loc 1 4837 5 is_stmt 1 view .LVU4288 +4837:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + ARM GAS /tmp/ccuRhBPx.s page 426 + + + 12920 .loc 1 4837 36 is_stmt 0 view .LVU4289 + 12921 0030 2368 ldr r3, [r4] +4837:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 12922 .loc 1 4837 46 view .LVU4290 + 12923 0032 5A6A ldr r2, [r3, #36] +4837:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 12924 .loc 1 4837 10 view .LVU4291 + 12925 0034 636A ldr r3, [r4, #36] +4837:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 12926 .loc 1 4837 21 view .LVU4292 + 12927 0036 1A70 strb r2, [r3] +4840:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 12928 .loc 1 4840 5 is_stmt 1 view .LVU4293 +4840:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 12929 .loc 1 4840 9 is_stmt 0 view .LVU4294 + 12930 0038 636A ldr r3, [r4, #36] +4840:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 12931 .loc 1 4840 19 view .LVU4295 + 12932 003a 0133 adds r3, r3, #1 + 12933 003c 6362 str r3, [r4, #36] +4842:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->XferCount--; + 12934 .loc 1 4842 5 is_stmt 1 view .LVU4296 +4842:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->XferCount--; + 12935 .loc 1 4842 9 is_stmt 0 view .LVU4297 + 12936 003e 238D ldrh r3, [r4, #40] +4842:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->XferCount--; + 12937 .loc 1 4842 19 view .LVU4298 + 12938 0040 013B subs r3, r3, #1 + 12939 0042 2385 strh r3, [r4, #40] +4843:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } + 12940 .loc 1 4843 5 is_stmt 1 view .LVU4299 +4843:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } + 12941 .loc 1 4843 9 is_stmt 0 view .LVU4300 + 12942 0044 638D ldrh r3, [r4, #42] +4843:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } + 12943 .loc 1 4843 20 view .LVU4301 + 12944 0046 013B subs r3, r3, #1 + 12945 0048 9BB2 uxth r3, r3 + 12946 004a 6385 strh r3, [r4, #42] + 12947 .LVL949: + 12948 .L751: +4930:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 12949 .loc 1 4930 3 is_stmt 1 view .LVU4302 +4932:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** (I2C_CHECK_IT_SOURCE(ITSources, I2C_IT_STOPI) != RESET)) + 12950 .loc 1 4932 3 view .LVU4303 +4932:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** (I2C_CHECK_IT_SOURCE(ITSources, I2C_IT_STOPI) != RESET)) + 12951 .loc 1 4932 6 is_stmt 0 view .LVU4304 + 12952 004c AB06 lsls r3, r5, #26 + 12953 004e 02D5 bpl .L761 +4932:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** (I2C_CHECK_IT_SOURCE(ITSources, I2C_IT_STOPI) != RESET)) + 12954 .loc 1 4932 61 discriminator 1 view .LVU4305 + 12955 0050 B606 lsls r6, r6, #26 + 12956 0052 00D5 bpl .LCB12082 + 12957 0054 87E0 b .L776 @long jump + 12958 .LCB12082: + 12959 .LVL950: + 12960 .L761: + ARM GAS /tmp/ccuRhBPx.s page 427 + + +4940:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 12961 .loc 1 4940 3 is_stmt 1 view .LVU4306 +4940:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 12962 .loc 1 4940 3 view .LVU4307 + 12963 0056 4023 movs r3, #64 + 12964 0058 0022 movs r2, #0 + 12965 005a E254 strb r2, [r4, r3] +4940:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 12966 .loc 1 4940 3 view .LVU4308 +4942:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } + 12967 .loc 1 4942 3 view .LVU4309 +4942:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } + 12968 .loc 1 4942 10 is_stmt 0 view .LVU4310 + 12969 005c 0020 movs r0, #0 + 12970 .L749: +4943:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 12971 .loc 1 4943 1 view .LVU4311 + 12972 005e 02B0 add sp, sp, #8 + 12973 @ sp needed + 12974 .LVL951: + 12975 .LVL952: +4943:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 12976 .loc 1 4943 1 view .LVU4312 + 12977 0060 70BD pop {r4, r5, r6, pc} + 12978 .LVL953: + 12979 .L775: +4820:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 12980 .loc 1 4820 5 is_stmt 1 view .LVU4313 + 12981 0062 0368 ldr r3, [r0] + 12982 0064 1022 movs r2, #16 + 12983 0066 DA61 str r2, [r3, #28] +4825:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 12984 .loc 1 4825 5 view .LVU4314 +4825:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 12985 .loc 1 4825 9 is_stmt 0 view .LVU4315 + 12986 0068 436C ldr r3, [r0, #68] +4825:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 12987 .loc 1 4825 21 view .LVU4316 + 12988 006a 0C3A subs r2, r2, #12 + 12989 006c 1343 orrs r3, r2 + 12990 006e 4364 str r3, [r0, #68] +4828:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } + 12991 .loc 1 4828 5 is_stmt 1 view .LVU4317 + 12992 0070 FFF7FEFF bl I2C_Flush_TXDR + 12993 .LVL954: +4828:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } + 12994 .loc 1 4828 5 is_stmt 0 view .LVU4318 + 12995 0074 EAE7 b .L751 + 12996 .LVL955: + 12997 .L752: +4845:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** (I2C_CHECK_IT_SOURCE(ITSources, I2C_IT_TXI) != RESET)) + 12998 .loc 1 4845 8 is_stmt 1 view .LVU4319 +4845:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** (I2C_CHECK_IT_SOURCE(ITSources, I2C_IT_TXI) != RESET)) + 12999 .loc 1 4845 11 is_stmt 0 view .LVU4320 + 13000 0076 AB07 lsls r3, r5, #30 + 13001 0078 10D5 bpl .L753 +4845:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** (I2C_CHECK_IT_SOURCE(ITSources, I2C_IT_TXI) != RESET)) + ARM GAS /tmp/ccuRhBPx.s page 428 + + + 13002 .loc 1 4845 65 discriminator 1 view .LVU4321 + 13003 007a B307 lsls r3, r6, #30 + 13004 007c 0ED5 bpl .L753 +4849:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 13005 .loc 1 4849 5 is_stmt 1 view .LVU4322 +4849:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 13006 .loc 1 4849 33 is_stmt 0 view .LVU4323 + 13007 007e 626A ldr r2, [r4, #36] +4849:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 13008 .loc 1 4849 9 view .LVU4324 + 13009 0080 2368 ldr r3, [r4] +4849:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 13010 .loc 1 4849 28 view .LVU4325 + 13011 0082 1278 ldrb r2, [r2] +4849:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 13012 .loc 1 4849 26 view .LVU4326 + 13013 0084 9A62 str r2, [r3, #40] +4852:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 13014 .loc 1 4852 5 is_stmt 1 view .LVU4327 +4852:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 13015 .loc 1 4852 9 is_stmt 0 view .LVU4328 + 13016 0086 636A ldr r3, [r4, #36] +4852:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 13017 .loc 1 4852 19 view .LVU4329 + 13018 0088 0133 adds r3, r3, #1 + 13019 008a 6362 str r3, [r4, #36] +4854:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->XferCount--; + 13020 .loc 1 4854 5 is_stmt 1 view .LVU4330 +4854:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->XferCount--; + 13021 .loc 1 4854 9 is_stmt 0 view .LVU4331 + 13022 008c 238D ldrh r3, [r4, #40] +4854:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->XferCount--; + 13023 .loc 1 4854 19 view .LVU4332 + 13024 008e 013B subs r3, r3, #1 + 13025 0090 2385 strh r3, [r4, #40] +4855:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } + 13026 .loc 1 4855 5 is_stmt 1 view .LVU4333 +4855:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } + 13027 .loc 1 4855 9 is_stmt 0 view .LVU4334 + 13028 0092 638D ldrh r3, [r4, #42] +4855:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } + 13029 .loc 1 4855 20 view .LVU4335 + 13030 0094 013B subs r3, r3, #1 + 13031 0096 9BB2 uxth r3, r3 + 13032 0098 6385 strh r3, [r4, #42] + 13033 009a D7E7 b .L751 + 13034 .L753: +4857:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** (I2C_CHECK_IT_SOURCE(ITSources, I2C_IT_TCI) != RESET)) + 13035 .loc 1 4857 8 is_stmt 1 view .LVU4336 +4857:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** (I2C_CHECK_IT_SOURCE(ITSources, I2C_IT_TCI) != RESET)) + 13036 .loc 1 4857 11 is_stmt 0 view .LVU4337 + 13037 009c 2B06 lsls r3, r5, #24 + 13038 009e 40D5 bpl .L754 +4857:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** (I2C_CHECK_IT_SOURCE(ITSources, I2C_IT_TCI) != RESET)) + 13039 .loc 1 4857 64 discriminator 1 view .LVU4338 + 13040 00a0 7306 lsls r3, r6, #25 + 13041 00a2 3ED5 bpl .L754 + ARM GAS /tmp/ccuRhBPx.s page 429 + + +4860:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { + 13042 .loc 1 4860 5 is_stmt 1 view .LVU4339 +4860:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { + 13043 .loc 1 4860 14 is_stmt 0 view .LVU4340 + 13044 00a4 638D ldrh r3, [r4, #42] + 13045 00a6 9BB2 uxth r3, r3 +4860:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { + 13046 .loc 1 4860 8 view .LVU4341 + 13047 00a8 002B cmp r3, #0 + 13048 00aa 2DD0 beq .L755 +4860:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { + 13049 .loc 1 4860 41 discriminator 1 view .LVU4342 + 13050 00ac 238D ldrh r3, [r4, #40] +4860:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { + 13051 .loc 1 4860 33 discriminator 1 view .LVU4343 + 13052 00ae 002B cmp r3, #0 + 13053 00b0 2AD1 bne .L755 +4862:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 13054 .loc 1 4862 7 is_stmt 1 view .LVU4344 +4862:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 13055 .loc 1 4862 35 is_stmt 0 view .LVU4345 + 13056 00b2 2368 ldr r3, [r4] +4862:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 13057 .loc 1 4862 45 view .LVU4346 + 13058 00b4 5968 ldr r1, [r3, #4] + 13059 .LVL956: +4862:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 13060 .loc 1 4862 18 view .LVU4347 + 13061 00b6 8905 lsls r1, r1, #22 + 13062 00b8 890D lsrs r1, r1, #22 + 13063 .LVL957: +4864:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { + 13064 .loc 1 4864 7 is_stmt 1 view .LVU4348 +4864:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { + 13065 .loc 1 4864 15 is_stmt 0 view .LVU4349 + 13066 00ba 638D ldrh r3, [r4, #42] + 13067 00bc 9BB2 uxth r3, r3 +4864:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { + 13068 .loc 1 4864 10 view .LVU4350 + 13069 00be FF2B cmp r3, #255 + 13070 00c0 0ED8 bhi .L777 +4871:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** if (hi2c->XferOptions != I2C_NO_OPTION_FRAME) + 13071 .loc 1 4871 9 is_stmt 1 view .LVU4351 +4871:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** if (hi2c->XferOptions != I2C_NO_OPTION_FRAME) + 13072 .loc 1 4871 30 is_stmt 0 view .LVU4352 + 13073 00c2 628D ldrh r2, [r4, #42] + 13074 00c4 92B2 uxth r2, r2 +4871:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** if (hi2c->XferOptions != I2C_NO_OPTION_FRAME) + 13075 .loc 1 4871 24 view .LVU4353 + 13076 00c6 2285 strh r2, [r4, #40] +4872:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { + 13077 .loc 1 4872 9 is_stmt 1 view .LVU4354 +4872:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { + 13078 .loc 1 4872 17 is_stmt 0 view .LVU4355 + 13079 00c8 E06A ldr r0, [r4, #44] + 13080 .LVL958: +4872:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { + ARM GAS /tmp/ccuRhBPx.s page 430 + + + 13081 .loc 1 4872 12 view .LVU4356 + 13082 00ca 2A4B ldr r3, .L778 + 13083 00cc 9842 cmp r0, r3 + 13084 00ce 12D0 beq .L757 +4874:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->XferOptions, I2C_NO_STARTSTOP); + 13085 .loc 1 4874 11 is_stmt 1 view .LVU4357 +4875:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } + 13086 .loc 1 4875 34 is_stmt 0 view .LVU4358 + 13087 00d0 E36A ldr r3, [r4, #44] +4874:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->XferOptions, I2C_NO_STARTSTOP); + 13088 .loc 1 4874 11 view .LVU4359 + 13089 00d2 D2B2 uxtb r2, r2 + 13090 00d4 0020 movs r0, #0 + 13091 00d6 0090 str r0, [sp] + 13092 00d8 2000 movs r0, r4 + 13093 00da FFF7FEFF bl I2C_TransferConfig + 13094 .LVL959: +4874:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->XferOptions, I2C_NO_STARTSTOP); + 13095 .loc 1 4874 11 view .LVU4360 + 13096 00de B5E7 b .L751 + 13097 .LVL960: + 13098 .L777: +4866:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** I2C_TransferConfig(hi2c, devaddress, (uint8_t)hi2c->XferSize, I2C_RELOAD_MODE, I2C_NO_START + 13099 .loc 1 4866 9 is_stmt 1 view .LVU4361 +4866:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** I2C_TransferConfig(hi2c, devaddress, (uint8_t)hi2c->XferSize, I2C_RELOAD_MODE, I2C_NO_START + 13100 .loc 1 4866 24 is_stmt 0 view .LVU4362 + 13101 00e0 FF23 movs r3, #255 + 13102 00e2 2385 strh r3, [r4, #40] +4867:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } + 13103 .loc 1 4867 9 is_stmt 1 view .LVU4363 + 13104 00e4 7F3B subs r3, r3, #127 + 13105 00e6 0022 movs r2, #0 + 13106 00e8 0092 str r2, [sp] + 13107 00ea 5B04 lsls r3, r3, #17 + 13108 00ec FF32 adds r2, r2, #255 + 13109 00ee 2000 movs r0, r4 + 13110 .LVL961: +4867:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } + 13111 .loc 1 4867 9 is_stmt 0 view .LVU4364 + 13112 00f0 FFF7FEFF bl I2C_TransferConfig + 13113 .LVL962: +4867:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } + 13114 .loc 1 4867 9 view .LVU4365 + 13115 00f4 AAE7 b .L751 + 13116 .LVL963: + 13117 .L757: +4879:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** I2C_AUTOEND_MODE, I2C_NO_STARTSTOP); + 13118 .loc 1 4879 11 is_stmt 1 view .LVU4366 + 13119 00f6 8023 movs r3, #128 + 13120 00f8 D2B2 uxtb r2, r2 + 13121 00fa 0020 movs r0, #0 + 13122 00fc 0090 str r0, [sp] + 13123 00fe 9B04 lsls r3, r3, #18 + 13124 0100 2000 movs r0, r4 + 13125 0102 FFF7FEFF bl I2C_TransferConfig + 13126 .LVL964: +4879:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** I2C_AUTOEND_MODE, I2C_NO_STARTSTOP); + ARM GAS /tmp/ccuRhBPx.s page 431 + + + 13127 .loc 1 4879 11 is_stmt 0 view .LVU4367 + 13128 0106 A1E7 b .L751 + 13129 .LVL965: + 13130 .L755: +4887:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { + 13131 .loc 1 4887 7 is_stmt 1 view .LVU4368 +4887:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { + 13132 .loc 1 4887 11 is_stmt 0 view .LVU4369 + 13133 0108 2368 ldr r3, [r4] + 13134 010a 5B68 ldr r3, [r3, #4] +4887:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { + 13135 .loc 1 4887 10 view .LVU4370 + 13136 010c 9B01 lsls r3, r3, #6 + 13137 010e 03D4 bmi .L758 +4890:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } + 13138 .loc 1 4890 9 is_stmt 1 view .LVU4371 + 13139 0110 2000 movs r0, r4 + 13140 .LVL966: +4890:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } + 13141 .loc 1 4890 9 is_stmt 0 view .LVU4372 + 13142 0112 FFF7FEFF bl I2C_ITMasterSeqCplt + 13143 .LVL967: +4890:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } + 13144 .loc 1 4890 9 view .LVU4373 + 13145 0116 99E7 b .L751 + 13146 .LVL968: + 13147 .L758: +4896:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } + 13148 .loc 1 4896 9 is_stmt 1 view .LVU4374 + 13149 0118 4021 movs r1, #64 + 13150 .LVL969: +4896:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } + 13151 .loc 1 4896 9 is_stmt 0 view .LVU4375 + 13152 011a 2000 movs r0, r4 + 13153 .LVL970: +4896:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } + 13154 .loc 1 4896 9 view .LVU4376 + 13155 011c FFF7FEFF bl I2C_ITError + 13156 .LVL971: + 13157 0120 94E7 b .L751 + 13158 .LVL972: + 13159 .L754: +4900:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** (I2C_CHECK_IT_SOURCE(ITSources, I2C_IT_TCI) != RESET)) + 13160 .loc 1 4900 8 is_stmt 1 view .LVU4377 +4900:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** (I2C_CHECK_IT_SOURCE(ITSources, I2C_IT_TCI) != RESET)) + 13161 .loc 1 4900 11 is_stmt 0 view .LVU4378 + 13162 0122 6B06 lsls r3, r5, #25 + 13163 0124 00D4 bmi .LCB12304 + 13164 0126 91E7 b .L751 @long jump + 13165 .LCB12304: +4900:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** (I2C_CHECK_IT_SOURCE(ITSources, I2C_IT_TCI) != RESET)) + 13166 .loc 1 4900 63 discriminator 1 view .LVU4379 + 13167 0128 7306 lsls r3, r6, #25 + 13168 012a 00D4 bmi .LCB12309 + 13169 012c 8EE7 b .L751 @long jump + 13170 .LCB12309: +4903:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { + ARM GAS /tmp/ccuRhBPx.s page 432 + + + 13171 .loc 1 4903 5 is_stmt 1 view .LVU4380 +4903:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { + 13172 .loc 1 4903 13 is_stmt 0 view .LVU4381 + 13173 012e 638D ldrh r3, [r4, #42] + 13174 0130 9BB2 uxth r3, r3 +4903:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { + 13175 .loc 1 4903 8 view .LVU4382 + 13176 0132 002B cmp r3, #0 + 13177 0134 12D1 bne .L759 +4905:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { + 13178 .loc 1 4905 7 is_stmt 1 view .LVU4383 +4905:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { + 13179 .loc 1 4905 11 is_stmt 0 view .LVU4384 + 13180 0136 2268 ldr r2, [r4] + 13181 0138 5368 ldr r3, [r2, #4] +4905:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { + 13182 .loc 1 4905 10 view .LVU4385 + 13183 013a 9B01 lsls r3, r3, #6 + 13184 013c 00D5 bpl .LCB12321 + 13185 013e 85E7 b .L751 @long jump + 13186 .LCB12321: +4908:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { + 13187 .loc 1 4908 9 is_stmt 1 view .LVU4386 +4908:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { + 13188 .loc 1 4908 17 is_stmt 0 view .LVU4387 + 13189 0140 E16A ldr r1, [r4, #44] + 13190 .LVL973: +4908:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { + 13191 .loc 1 4908 12 view .LVU4388 + 13192 0142 0C4B ldr r3, .L778 + 13193 0144 9942 cmp r1, r3 + 13194 0146 05D1 bne .L760 +4911:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } + 13195 .loc 1 4911 11 is_stmt 1 view .LVU4389 +4911:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } + 13196 .loc 1 4911 25 is_stmt 0 view .LVU4390 + 13197 0148 5168 ldr r1, [r2, #4] +4911:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } + 13198 .loc 1 4911 31 view .LVU4391 + 13199 014a 8023 movs r3, #128 + 13200 014c DB01 lsls r3, r3, #7 + 13201 014e 0B43 orrs r3, r1 + 13202 0150 5360 str r3, [r2, #4] + 13203 0152 7BE7 b .L751 + 13204 .L760: +4916:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } + 13205 .loc 1 4916 11 is_stmt 1 view .LVU4392 + 13206 0154 2000 movs r0, r4 + 13207 .LVL974: +4916:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } + 13208 .loc 1 4916 11 is_stmt 0 view .LVU4393 + 13209 0156 FFF7FEFF bl I2C_ITMasterSeqCplt + 13210 .LVL975: + 13211 015a 77E7 b .L751 + 13212 .LVL976: + 13213 .L759: +4924:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } + ARM GAS /tmp/ccuRhBPx.s page 433 + + + 13214 .loc 1 4924 7 is_stmt 1 view .LVU4394 + 13215 015c 4021 movs r1, #64 + 13216 .LVL977: +4924:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } + 13217 .loc 1 4924 7 is_stmt 0 view .LVU4395 + 13218 015e 2000 movs r0, r4 + 13219 .LVL978: +4924:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } + 13220 .loc 1 4924 7 view .LVU4396 + 13221 0160 FFF7FEFF bl I2C_ITError + 13222 .LVL979: + 13223 0164 72E7 b .L751 + 13224 .LVL980: + 13225 .L776: +4936:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } + 13226 .loc 1 4936 5 is_stmt 1 view .LVU4397 + 13227 0166 2900 movs r1, r5 + 13228 0168 2000 movs r0, r4 + 13229 016a FFF7FEFF bl I2C_ITMasterCplt + 13230 .LVL981: + 13231 016e 72E7 b .L761 + 13232 .LVL982: + 13233 .L762: +4814:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 13234 .loc 1 4814 3 is_stmt 0 discriminator 1 view .LVU4398 + 13235 0170 0220 movs r0, #2 + 13236 .LVL983: +4814:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 13237 .loc 1 4814 3 discriminator 1 view .LVU4399 + 13238 0172 74E7 b .L749 + 13239 .L779: + 13240 .align 2 + 13241 .L778: + 13242 0174 0000FFFF .word -65536 + 13243 .cfi_endproc + 13244 .LFE89: + 13246 .section .text.I2C_Mem_ISR_DMA,"ax",%progbits + 13247 .align 1 + 13248 .syntax unified + 13249 .code 16 + 13250 .thumb_func + 13252 I2C_Mem_ISR_DMA: + 13253 .LVL984: + 13254 .LFB93: +5373:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** uint32_t direction = I2C_GENERATE_START_WRITE; + 13255 .loc 1 5373 1 is_stmt 1 view -0 + 13256 .cfi_startproc + 13257 @ args = 0, pretend = 0, frame = 0 + 13258 @ frame_needed = 0, uses_anonymous_args = 0 +5373:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** uint32_t direction = I2C_GENERATE_START_WRITE; + 13259 .loc 1 5373 1 is_stmt 0 view .LVU4401 + 13260 0000 10B5 push {r4, lr} + 13261 .cfi_def_cfa_offset 8 + 13262 .cfi_offset 4, -8 + 13263 .cfi_offset 14, -4 + 13264 0002 82B0 sub sp, sp, #8 + 13265 .cfi_def_cfa_offset 16 + ARM GAS /tmp/ccuRhBPx.s page 434 + + + 13266 0004 0400 movs r4, r0 +5374:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 13267 .loc 1 5374 3 is_stmt 1 view .LVU4402 + 13268 .LVL985: +5377:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 13269 .loc 1 5377 3 view .LVU4403 +5377:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 13270 .loc 1 5377 3 view .LVU4404 + 13271 0006 4023 movs r3, #64 + 13272 0008 C35C ldrb r3, [r0, r3] + 13273 000a 012B cmp r3, #1 + 13274 000c 00D1 bne .LCB12409 + 13275 000e B6E0 b .L795 @long jump + 13276 .LCB12409: +5377:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 13277 .loc 1 5377 3 discriminator 2 view .LVU4405 + 13278 0010 0123 movs r3, #1 + 13279 0012 4020 movs r0, #64 + 13280 .LVL986: +5377:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 13281 .loc 1 5377 3 is_stmt 0 discriminator 2 view .LVU4406 + 13282 0014 2354 strb r3, [r4, r0] +5377:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 13283 .loc 1 5377 3 is_stmt 1 discriminator 2 view .LVU4407 +5379:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** (I2C_CHECK_IT_SOURCE(ITSources, I2C_IT_NACKI) != RESET)) + 13284 .loc 1 5379 3 view .LVU4408 +5379:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** (I2C_CHECK_IT_SOURCE(ITSources, I2C_IT_NACKI) != RESET)) + 13285 .loc 1 5379 8 is_stmt 0 view .LVU4409 + 13286 0016 0809 lsrs r0, r1, #4 +5379:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** (I2C_CHECK_IT_SOURCE(ITSources, I2C_IT_NACKI) != RESET)) + 13287 .loc 1 5379 6 view .LVU4410 + 13288 0018 0342 tst r3, r0 + 13289 001a 01D0 beq .L782 +5379:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** (I2C_CHECK_IT_SOURCE(ITSources, I2C_IT_NACKI) != RESET)) + 13290 .loc 1 5379 55 discriminator 1 view .LVU4411 + 13291 001c D306 lsls r3, r2, #27 + 13292 001e 0FD4 bmi .L806 + 13293 .L782: +5396:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** (I2C_CHECK_IT_SOURCE(ITSources, I2C_IT_TXI) != RESET)) + 13294 .loc 1 5396 8 is_stmt 1 view .LVU4412 +5396:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** (I2C_CHECK_IT_SOURCE(ITSources, I2C_IT_TXI) != RESET)) + 13295 .loc 1 5396 11 is_stmt 0 view .LVU4413 + 13296 0020 8B07 lsls r3, r1, #30 + 13297 0022 1CD5 bpl .L784 +5396:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** (I2C_CHECK_IT_SOURCE(ITSources, I2C_IT_TXI) != RESET)) + 13298 .loc 1 5396 62 discriminator 1 view .LVU4414 + 13299 0024 9307 lsls r3, r2, #30 + 13300 0026 1AD5 bpl .L784 +5400:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 13301 .loc 1 5400 5 is_stmt 1 view .LVU4415 +5400:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 13302 .loc 1 5400 9 is_stmt 0 view .LVU4416 + 13303 0028 2368 ldr r3, [r4] +5400:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 13304 .loc 1 5400 32 view .LVU4417 + 13305 002a 226D ldr r2, [r4, #80] + 13306 .LVL987: + ARM GAS /tmp/ccuRhBPx.s page 435 + + +5400:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 13307 .loc 1 5400 26 view .LVU4418 + 13308 002c 9A62 str r2, [r3, #40] +5403:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } + 13309 .loc 1 5403 5 is_stmt 1 view .LVU4419 +5403:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } + 13310 .loc 1 5403 22 is_stmt 0 view .LVU4420 + 13311 002e 0123 movs r3, #1 + 13312 0030 5B42 rsbs r3, r3, #0 + 13313 0032 2365 str r3, [r4, #80] + 13314 .LVL988: + 13315 .L783: +5494:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 13316 .loc 1 5494 3 is_stmt 1 view .LVU4421 +5497:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 13317 .loc 1 5497 3 view .LVU4422 +5497:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 13318 .loc 1 5497 3 view .LVU4423 + 13319 0034 4023 movs r3, #64 + 13320 0036 0022 movs r2, #0 + 13321 0038 E254 strb r2, [r4, r3] +5497:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 13322 .loc 1 5497 3 view .LVU4424 +5499:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } + 13323 .loc 1 5499 3 view .LVU4425 +5499:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } + 13324 .loc 1 5499 10 is_stmt 0 view .LVU4426 + 13325 003a 0020 movs r0, #0 + 13326 .L781: +5500:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 13327 .loc 1 5500 1 view .LVU4427 + 13328 003c 02B0 add sp, sp, #8 + 13329 @ sp needed + 13330 .LVL989: +5500:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 13331 .loc 1 5500 1 view .LVU4428 + 13332 003e 10BD pop {r4, pc} + 13333 .LVL990: + 13334 .L806: +5383:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 13335 .loc 1 5383 5 is_stmt 1 view .LVU4429 + 13336 0040 2368 ldr r3, [r4] + 13337 0042 1022 movs r2, #16 + 13338 .LVL991: +5383:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 13339 .loc 1 5383 5 is_stmt 0 view .LVU4430 + 13340 0044 DA61 str r2, [r3, #28] +5386:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 13341 .loc 1 5386 5 is_stmt 1 view .LVU4431 +5386:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 13342 .loc 1 5386 9 is_stmt 0 view .LVU4432 + 13343 0046 636C ldr r3, [r4, #68] +5386:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 13344 .loc 1 5386 21 view .LVU4433 + 13345 0048 0C3A subs r2, r2, #12 + 13346 004a 1343 orrs r3, r2 + 13347 004c 6364 str r3, [r4, #68] + ARM GAS /tmp/ccuRhBPx.s page 436 + + +5391:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 13348 .loc 1 5391 5 is_stmt 1 view .LVU4434 + 13349 004e 2021 movs r1, #32 + 13350 .LVL992: +5391:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 13351 .loc 1 5391 5 is_stmt 0 view .LVU4435 + 13352 0050 2000 movs r0, r4 + 13353 0052 FFF7FEFF bl I2C_Enable_IRQ + 13354 .LVL993: +5394:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } + 13355 .loc 1 5394 5 is_stmt 1 view .LVU4436 + 13356 0056 2000 movs r0, r4 + 13357 0058 FFF7FEFF bl I2C_Flush_TXDR + 13358 .LVL994: + 13359 005c EAE7 b .L783 + 13360 .LVL995: + 13361 .L784: +5405:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** (I2C_CHECK_IT_SOURCE(ITSources, I2C_IT_TCI) != RESET)) + 13362 .loc 1 5405 8 view .LVU4437 +5405:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** (I2C_CHECK_IT_SOURCE(ITSources, I2C_IT_TCI) != RESET)) + 13363 .loc 1 5405 11 is_stmt 0 view .LVU4438 + 13364 005e 0B06 lsls r3, r1, #24 + 13365 0060 01D5 bpl .L785 +5405:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** (I2C_CHECK_IT_SOURCE(ITSources, I2C_IT_TCI) != RESET)) + 13366 .loc 1 5405 61 discriminator 1 view .LVU4439 + 13367 0062 5306 lsls r3, r2, #25 + 13368 0064 29D4 bmi .L807 + 13369 .L785: +5447:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** (I2C_CHECK_IT_SOURCE(ITSources, I2C_IT_TCI) != RESET)) + 13370 .loc 1 5447 8 is_stmt 1 view .LVU4440 +5447:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** (I2C_CHECK_IT_SOURCE(ITSources, I2C_IT_TCI) != RESET)) + 13371 .loc 1 5447 11 is_stmt 0 view .LVU4441 + 13372 0066 4B06 lsls r3, r1, #25 + 13373 0068 00D4 bmi .LCB12521 + 13374 006a 7EE0 b .L790 @long jump + 13375 .LCB12521: +5447:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** (I2C_CHECK_IT_SOURCE(ITSources, I2C_IT_TCI) != RESET)) + 13376 .loc 1 5447 60 discriminator 1 view .LVU4442 + 13377 006c 5306 lsls r3, r2, #25 + 13378 006e 00D4 bmi .LCB12526 + 13379 0070 7BE0 b .L790 @long jump + 13380 .LCB12526: +5450:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { + 13381 .loc 1 5450 5 is_stmt 1 view .LVU4443 +5450:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { + 13382 .loc 1 5450 13 is_stmt 0 view .LVU4444 + 13383 0072 4123 movs r3, #65 + 13384 0074 E35C ldrb r3, [r4, r3] +5450:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { + 13385 .loc 1 5450 8 view .LVU4445 + 13386 0076 222B cmp r3, #34 + 13387 0078 61D0 beq .L796 +5374:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 13388 .loc 1 5374 12 view .LVU4446 + 13389 007a 4248 ldr r0, .L810 + 13390 .L791: + 13391 .LVL996: + ARM GAS /tmp/ccuRhBPx.s page 437 + + +5455:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { + 13392 .loc 1 5455 5 is_stmt 1 view .LVU4447 +5455:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { + 13393 .loc 1 5455 13 is_stmt 0 view .LVU4448 + 13394 007c 638D ldrh r3, [r4, #42] + 13395 007e 9BB2 uxth r3, r3 +5455:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { + 13396 .loc 1 5455 8 view .LVU4449 + 13397 0080 FF2B cmp r3, #255 + 13398 0082 5ED9 bls .L792 +5457:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 13399 .loc 1 5457 7 is_stmt 1 view .LVU4450 +5457:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 13400 .loc 1 5457 22 is_stmt 0 view .LVU4451 + 13401 0084 FF23 movs r3, #255 + 13402 0086 2385 strh r3, [r4, #40] +5460:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** I2C_RELOAD_MODE, direction); + 13403 .loc 1 5460 7 is_stmt 1 view .LVU4452 +5460:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** I2C_RELOAD_MODE, direction); + 13404 .loc 1 5460 46 is_stmt 0 view .LVU4453 + 13405 0088 E16C ldr r1, [r4, #76] + 13406 .LVL997: +5460:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** I2C_RELOAD_MODE, direction); + 13407 .loc 1 5460 7 view .LVU4454 + 13408 008a 7F3B subs r3, r3, #127 + 13409 008c 89B2 uxth r1, r1 + 13410 008e 0090 str r0, [sp] + 13411 0090 5B04 lsls r3, r3, #17 + 13412 0092 FF22 movs r2, #255 + 13413 .LVL998: +5460:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** I2C_RELOAD_MODE, direction); + 13414 .loc 1 5460 7 view .LVU4455 + 13415 0094 2000 movs r0, r4 + 13416 .LVL999: +5460:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** I2C_RELOAD_MODE, direction); + 13417 .loc 1 5460 7 view .LVU4456 + 13418 0096 FFF7FEFF bl I2C_TransferConfig + 13419 .LVL1000: + 13420 .L793: +5473:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 13421 .loc 1 5473 5 is_stmt 1 view .LVU4457 +5473:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 13422 .loc 1 5473 9 is_stmt 0 view .LVU4458 + 13423 009a 638D ldrh r3, [r4, #42] +5473:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 13424 .loc 1 5473 28 view .LVU4459 + 13425 009c 228D ldrh r2, [r4, #40] +5473:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 13426 .loc 1 5473 21 view .LVU4460 + 13427 009e 9B1A subs r3, r3, r2 + 13428 00a0 9BB2 uxth r3, r3 + 13429 00a2 6385 strh r3, [r4, #42] +5476:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { + 13430 .loc 1 5476 5 is_stmt 1 view .LVU4461 +5476:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { + 13431 .loc 1 5476 13 is_stmt 0 view .LVU4462 + 13432 00a4 4123 movs r3, #65 + ARM GAS /tmp/ccuRhBPx.s page 438 + + + 13433 00a6 E35C ldrb r3, [r4, r3] +5476:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { + 13434 .loc 1 5476 8 view .LVU4463 + 13435 00a8 222B cmp r3, #34 + 13436 00aa 57D0 beq .L808 +5482:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } + 13437 .loc 1 5482 7 is_stmt 1 view .LVU4464 +5482:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } + 13438 .loc 1 5482 11 is_stmt 0 view .LVU4465 + 13439 00ac 2268 ldr r2, [r4] +5482:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } + 13440 .loc 1 5482 21 view .LVU4466 + 13441 00ae 1168 ldr r1, [r2] +5482:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } + 13442 .loc 1 5482 27 view .LVU4467 + 13443 00b0 8023 movs r3, #128 + 13444 00b2 DB01 lsls r3, r3, #7 + 13445 00b4 0B43 orrs r3, r1 + 13446 00b6 1360 str r3, [r2] + 13447 00b8 BCE7 b .L783 + 13448 .LVL1001: + 13449 .L807: +5409:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 13450 .loc 1 5409 5 is_stmt 1 view .LVU4468 + 13451 00ba 1021 movs r1, #16 + 13452 .LVL1002: +5409:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 13453 .loc 1 5409 5 is_stmt 0 view .LVU4469 + 13454 00bc 2000 movs r0, r4 + 13455 00be FFF7FEFF bl I2C_Enable_IRQ + 13456 .LVL1003: +5411:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { + 13457 .loc 1 5411 5 is_stmt 1 view .LVU4470 +5411:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { + 13458 .loc 1 5411 13 is_stmt 0 view .LVU4471 + 13459 00c2 638D ldrh r3, [r4, #42] + 13460 00c4 9BB2 uxth r3, r3 +5411:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { + 13461 .loc 1 5411 8 view .LVU4472 + 13462 00c6 002B cmp r3, #0 + 13463 00c8 34D0 beq .L786 +5414:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { + 13464 .loc 1 5414 7 is_stmt 1 view .LVU4473 +5414:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { + 13465 .loc 1 5414 15 is_stmt 0 view .LVU4474 + 13466 00ca 638D ldrh r3, [r4, #42] + 13467 00cc 9BB2 uxth r3, r3 +5414:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { + 13468 .loc 1 5414 10 view .LVU4475 + 13469 00ce FF2B cmp r3, #255 + 13470 00d0 1BD9 bls .L787 +5416:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** I2C_TransferConfig(hi2c, (uint16_t)hi2c->Devaddress, (uint8_t)hi2c->XferSize, + 13471 .loc 1 5416 9 is_stmt 1 view .LVU4476 +5416:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** I2C_TransferConfig(hi2c, (uint16_t)hi2c->Devaddress, (uint8_t)hi2c->XferSize, + 13472 .loc 1 5416 24 is_stmt 0 view .LVU4477 + 13473 00d2 FF23 movs r3, #255 + 13474 00d4 2385 strh r3, [r4, #40] + ARM GAS /tmp/ccuRhBPx.s page 439 + + +5417:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** I2C_RELOAD_MODE, I2C_NO_STARTSTOP); + 13475 .loc 1 5417 9 is_stmt 1 view .LVU4478 +5417:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** I2C_RELOAD_MODE, I2C_NO_STARTSTOP); + 13476 .loc 1 5417 48 is_stmt 0 view .LVU4479 + 13477 00d6 E16C ldr r1, [r4, #76] +5417:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** I2C_RELOAD_MODE, I2C_NO_STARTSTOP); + 13478 .loc 1 5417 9 view .LVU4480 + 13479 00d8 7F3B subs r3, r3, #127 + 13480 00da 89B2 uxth r1, r1 + 13481 00dc 0022 movs r2, #0 + 13482 00de 0092 str r2, [sp] + 13483 00e0 5B04 lsls r3, r3, #17 + 13484 00e2 FF32 adds r2, r2, #255 + 13485 00e4 2000 movs r0, r4 + 13486 00e6 FFF7FEFF bl I2C_TransferConfig + 13487 .LVL1004: + 13488 .L788: +5428:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 13489 .loc 1 5428 7 is_stmt 1 view .LVU4481 +5428:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 13490 .loc 1 5428 11 is_stmt 0 view .LVU4482 + 13491 00ea 638D ldrh r3, [r4, #42] +5428:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 13492 .loc 1 5428 30 view .LVU4483 + 13493 00ec 228D ldrh r2, [r4, #40] +5428:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 13494 .loc 1 5428 23 view .LVU4484 + 13495 00ee 9B1A subs r3, r3, r2 + 13496 00f0 9BB2 uxth r3, r3 + 13497 00f2 6385 strh r3, [r4, #42] +5431:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { + 13498 .loc 1 5431 7 is_stmt 1 view .LVU4485 +5431:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { + 13499 .loc 1 5431 15 is_stmt 0 view .LVU4486 + 13500 00f4 4123 movs r3, #65 + 13501 00f6 E35C ldrb r3, [r4, r3] +5431:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { + 13502 .loc 1 5431 10 view .LVU4487 + 13503 00f8 222B cmp r3, #34 + 13504 00fa 14D0 beq .L809 +5437:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } + 13505 .loc 1 5437 9 is_stmt 1 view .LVU4488 +5437:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } + 13506 .loc 1 5437 13 is_stmt 0 view .LVU4489 + 13507 00fc 2268 ldr r2, [r4] +5437:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } + 13508 .loc 1 5437 23 view .LVU4490 + 13509 00fe 1168 ldr r1, [r2] +5437:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } + 13510 .loc 1 5437 29 view .LVU4491 + 13511 0100 8023 movs r3, #128 + 13512 0102 DB01 lsls r3, r3, #7 + 13513 0104 0B43 orrs r3, r1 + 13514 0106 1360 str r3, [r2] + 13515 0108 94E7 b .L783 + 13516 .L787: +5422:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** I2C_TransferConfig(hi2c, (uint16_t)hi2c->Devaddress, (uint8_t)hi2c->XferSize, + ARM GAS /tmp/ccuRhBPx.s page 440 + + + 13517 .loc 1 5422 9 is_stmt 1 view .LVU4492 +5422:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** I2C_TransferConfig(hi2c, (uint16_t)hi2c->Devaddress, (uint8_t)hi2c->XferSize, + 13518 .loc 1 5422 30 is_stmt 0 view .LVU4493 + 13519 010a 628D ldrh r2, [r4, #42] + 13520 010c 92B2 uxth r2, r2 +5422:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** I2C_TransferConfig(hi2c, (uint16_t)hi2c->Devaddress, (uint8_t)hi2c->XferSize, + 13521 .loc 1 5422 24 view .LVU4494 + 13522 010e 2285 strh r2, [r4, #40] +5423:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** I2C_AUTOEND_MODE, I2C_NO_STARTSTOP); + 13523 .loc 1 5423 9 is_stmt 1 view .LVU4495 +5423:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** I2C_AUTOEND_MODE, I2C_NO_STARTSTOP); + 13524 .loc 1 5423 48 is_stmt 0 view .LVU4496 + 13525 0110 E16C ldr r1, [r4, #76] +5423:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** I2C_AUTOEND_MODE, I2C_NO_STARTSTOP); + 13526 .loc 1 5423 9 view .LVU4497 + 13527 0112 8023 movs r3, #128 + 13528 0114 D2B2 uxtb r2, r2 + 13529 0116 89B2 uxth r1, r1 + 13530 0118 0020 movs r0, #0 + 13531 011a 0090 str r0, [sp] + 13532 011c 9B04 lsls r3, r3, #18 + 13533 011e 2000 movs r0, r4 + 13534 0120 FFF7FEFF bl I2C_TransferConfig + 13535 .LVL1005: + 13536 0124 E1E7 b .L788 + 13537 .L809: +5433:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } + 13538 .loc 1 5433 9 is_stmt 1 view .LVU4498 +5433:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } + 13539 .loc 1 5433 13 is_stmt 0 view .LVU4499 + 13540 0126 2268 ldr r2, [r4] +5433:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } + 13541 .loc 1 5433 23 view .LVU4500 + 13542 0128 1168 ldr r1, [r2] +5433:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } + 13543 .loc 1 5433 29 view .LVU4501 + 13544 012a 8023 movs r3, #128 + 13545 012c 1B02 lsls r3, r3, #8 + 13546 012e 0B43 orrs r3, r1 + 13547 0130 1360 str r3, [r2] + 13548 0132 7FE7 b .L783 + 13549 .L786: +5444:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } + 13550 .loc 1 5444 7 is_stmt 1 view .LVU4502 + 13551 0134 4021 movs r1, #64 + 13552 0136 2000 movs r0, r4 + 13553 0138 FFF7FEFF bl I2C_ITError + 13554 .LVL1006: + 13555 013c 7AE7 b .L783 + 13556 .LVL1007: + 13557 .L796: +5452:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } + 13558 .loc 1 5452 17 is_stmt 0 view .LVU4503 + 13559 013e 1248 ldr r0, .L810+4 + 13560 0140 9CE7 b .L791 + 13561 .LVL1008: + 13562 .L792: + ARM GAS /tmp/ccuRhBPx.s page 441 + + +5465:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 13563 .loc 1 5465 7 is_stmt 1 view .LVU4504 +5465:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 13564 .loc 1 5465 28 is_stmt 0 view .LVU4505 + 13565 0142 628D ldrh r2, [r4, #42] + 13566 .LVL1009: +5465:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 13567 .loc 1 5465 28 view .LVU4506 + 13568 0144 92B2 uxth r2, r2 +5465:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 13569 .loc 1 5465 22 view .LVU4507 + 13570 0146 2285 strh r2, [r4, #40] +5468:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** I2C_AUTOEND_MODE, direction); + 13571 .loc 1 5468 7 is_stmt 1 view .LVU4508 +5468:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** I2C_AUTOEND_MODE, direction); + 13572 .loc 1 5468 46 is_stmt 0 view .LVU4509 + 13573 0148 E16C ldr r1, [r4, #76] + 13574 .LVL1010: +5468:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** I2C_AUTOEND_MODE, direction); + 13575 .loc 1 5468 7 view .LVU4510 + 13576 014a 8023 movs r3, #128 + 13577 014c D2B2 uxtb r2, r2 + 13578 014e 89B2 uxth r1, r1 + 13579 0150 0090 str r0, [sp] + 13580 0152 9B04 lsls r3, r3, #18 + 13581 0154 2000 movs r0, r4 + 13582 .LVL1011: +5468:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** I2C_AUTOEND_MODE, direction); + 13583 .loc 1 5468 7 view .LVU4511 + 13584 0156 FFF7FEFF bl I2C_TransferConfig + 13585 .LVL1012: +5468:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** I2C_AUTOEND_MODE, direction); + 13586 .loc 1 5468 7 view .LVU4512 + 13587 015a 9EE7 b .L793 + 13588 .L808: +5478:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } + 13589 .loc 1 5478 7 is_stmt 1 view .LVU4513 +5478:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } + 13590 .loc 1 5478 11 is_stmt 0 view .LVU4514 + 13591 015c 2268 ldr r2, [r4] +5478:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } + 13592 .loc 1 5478 21 view .LVU4515 + 13593 015e 1168 ldr r1, [r2] +5478:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } + 13594 .loc 1 5478 27 view .LVU4516 + 13595 0160 8023 movs r3, #128 + 13596 0162 1B02 lsls r3, r3, #8 + 13597 0164 0B43 orrs r3, r1 + 13598 0166 1360 str r3, [r2] + 13599 0168 64E7 b .L783 + 13600 .LVL1013: + 13601 .L790: +5485:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** (I2C_CHECK_IT_SOURCE(ITSources, I2C_IT_STOPI) != RESET)) + 13602 .loc 1 5485 8 is_stmt 1 view .LVU4517 +5485:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** (I2C_CHECK_IT_SOURCE(ITSources, I2C_IT_STOPI) != RESET)) + 13603 .loc 1 5485 11 is_stmt 0 view .LVU4518 + 13604 016a 8B06 lsls r3, r1, #26 + ARM GAS /tmp/ccuRhBPx.s page 442 + + + 13605 016c 00D4 bmi .LCB12736 + 13606 016e 61E7 b .L783 @long jump + 13607 .LCB12736: +5485:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** (I2C_CHECK_IT_SOURCE(ITSources, I2C_IT_STOPI) != RESET)) + 13608 .loc 1 5485 63 discriminator 1 view .LVU4519 + 13609 0170 9206 lsls r2, r2, #26 + 13610 0172 00D4 bmi .LCB12741 + 13611 0174 5EE7 b .L783 @long jump + 13612 .LCB12741: + 13613 .LVL1014: +5489:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } + 13614 .loc 1 5489 5 is_stmt 1 view .LVU4520 + 13615 0176 2000 movs r0, r4 + 13616 0178 FFF7FEFF bl I2C_ITMasterCplt + 13617 .LVL1015: +5489:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } + 13618 .loc 1 5489 5 is_stmt 0 view .LVU4521 + 13619 017c 5AE7 b .L783 + 13620 .LVL1016: + 13621 .L795: +5377:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 13622 .loc 1 5377 3 discriminator 1 view .LVU4522 + 13623 017e 0220 movs r0, #2 + 13624 .LVL1017: +5377:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 13625 .loc 1 5377 3 discriminator 1 view .LVU4523 + 13626 0180 5CE7 b .L781 + 13627 .L811: + 13628 0182 C046 .align 2 + 13629 .L810: + 13630 0184 00200080 .word -2147475456 + 13631 0188 00240080 .word -2147474432 + 13632 .cfi_endproc + 13633 .LFE93: + 13635 .section .text.I2C_Slave_ISR_DMA,"ax",%progbits + 13636 .align 1 + 13637 .syntax unified + 13638 .code 16 + 13639 .thumb_func + 13641 I2C_Slave_ISR_DMA: + 13642 .LVL1018: + 13643 .LFB94: +5512:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** uint32_t tmpoptions = hi2c->XferOptions; + 13644 .loc 1 5512 1 is_stmt 1 view -0 + 13645 .cfi_startproc + 13646 @ args = 0, pretend = 0, frame = 0 + 13647 @ frame_needed = 0, uses_anonymous_args = 0 +5512:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** uint32_t tmpoptions = hi2c->XferOptions; + 13648 .loc 1 5512 1 is_stmt 0 view .LVU4525 + 13649 0000 F8B5 push {r3, r4, r5, r6, r7, lr} + 13650 .cfi_def_cfa_offset 24 + 13651 .cfi_offset 3, -24 + 13652 .cfi_offset 4, -20 + 13653 .cfi_offset 5, -16 + 13654 .cfi_offset 6, -12 + 13655 .cfi_offset 7, -8 + 13656 .cfi_offset 14, -4 + ARM GAS /tmp/ccuRhBPx.s page 443 + + + 13657 0002 0400 movs r4, r0 + 13658 0004 0D00 movs r5, r1 + 13659 0006 1600 movs r6, r2 +5513:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** uint32_t treatdmanack = 0U; + 13660 .loc 1 5513 3 is_stmt 1 view .LVU4526 +5513:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** uint32_t treatdmanack = 0U; + 13661 .loc 1 5513 12 is_stmt 0 view .LVU4527 + 13662 0008 C76A ldr r7, [r0, #44] + 13663 .LVL1019: +5514:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** HAL_I2C_StateTypeDef tmpstate; + 13664 .loc 1 5514 3 is_stmt 1 view .LVU4528 +5515:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 13665 .loc 1 5515 3 view .LVU4529 +5518:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 13666 .loc 1 5518 3 view .LVU4530 +5518:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 13667 .loc 1 5518 3 view .LVU4531 + 13668 000a 4023 movs r3, #64 + 13669 000c C35C ldrb r3, [r0, r3] + 13670 000e 012B cmp r3, #1 + 13671 0010 00D1 bne .LCB12795 + 13672 0012 89E0 b .L830 @long jump + 13673 .LCB12795: +5518:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 13674 .loc 1 5518 3 discriminator 2 view .LVU4532 + 13675 0014 0123 movs r3, #1 + 13676 0016 4022 movs r2, #64 + 13677 .LVL1020: +5518:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 13678 .loc 1 5518 3 is_stmt 0 discriminator 2 view .LVU4533 + 13679 0018 8354 strb r3, [r0, r2] +5518:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 13680 .loc 1 5518 3 is_stmt 1 discriminator 2 view .LVU4534 +5521:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** (I2C_CHECK_IT_SOURCE(ITSources, I2C_IT_STOPI) != RESET)) + 13681 .loc 1 5521 3 view .LVU4535 +5521:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** (I2C_CHECK_IT_SOURCE(ITSources, I2C_IT_STOPI) != RESET)) + 13682 .loc 1 5521 8 is_stmt 0 view .LVU4536 + 13683 001a 4A09 lsrs r2, r1, #5 +5521:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** (I2C_CHECK_IT_SOURCE(ITSources, I2C_IT_STOPI) != RESET)) + 13684 .loc 1 5521 6 view .LVU4537 + 13685 001c 1342 tst r3, r2 + 13686 001e 01D0 beq .L814 +5521:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** (I2C_CHECK_IT_SOURCE(ITSources, I2C_IT_STOPI) != RESET)) + 13687 .loc 1 5521 58 discriminator 1 view .LVU4538 + 13688 0020 B306 lsls r3, r6, #26 + 13689 0022 1AD4 bmi .L838 + 13690 .LVL1021: + 13691 .L814: +5528:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** (I2C_CHECK_IT_SOURCE(ITSources, I2C_IT_NACKI) != RESET)) + 13692 .loc 1 5528 3 is_stmt 1 view .LVU4539 +5528:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** (I2C_CHECK_IT_SOURCE(ITSources, I2C_IT_NACKI) != RESET)) + 13693 .loc 1 5528 6 is_stmt 0 view .LVU4540 + 13694 0024 EB06 lsls r3, r5, #27 + 13695 0026 71D5 bpl .L815 +5528:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** (I2C_CHECK_IT_SOURCE(ITSources, I2C_IT_NACKI) != RESET)) + 13696 .loc 1 5528 55 discriminator 1 view .LVU4541 + 13697 0028 F306 lsls r3, r6, #27 + ARM GAS /tmp/ccuRhBPx.s page 444 + + + 13698 002a 6FD5 bpl .L815 +5535:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** (I2C_CHECK_IT_SOURCE(ITSources, I2C_CR1_RXDMAEN) != RESET)) + 13699 .loc 1 5535 5 is_stmt 1 view .LVU4542 +5535:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** (I2C_CHECK_IT_SOURCE(ITSources, I2C_CR1_RXDMAEN) != RESET)) + 13700 .loc 1 5535 10 is_stmt 0 view .LVU4543 + 13701 002c B30B lsrs r3, r6, #14 + 13702 002e 0122 movs r2, #1 + 13703 0030 1000 movs r0, r2 + 13704 0032 1840 ands r0, r3 +5535:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** (I2C_CHECK_IT_SOURCE(ITSources, I2C_CR1_RXDMAEN) != RESET)) + 13705 .loc 1 5535 8 view .LVU4544 + 13706 0034 1A42 tst r2, r3 + 13707 0036 01D1 bne .L816 +5535:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** (I2C_CHECK_IT_SOURCE(ITSources, I2C_CR1_RXDMAEN) != RESET)) + 13708 .loc 1 5535 68 discriminator 1 view .LVU4545 + 13709 0038 3304 lsls r3, r6, #16 + 13710 003a 63D5 bpl .L817 + 13711 .L816: +5539:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { + 13712 .loc 1 5539 7 is_stmt 1 view .LVU4546 +5539:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { + 13713 .loc 1 5539 15 is_stmt 0 view .LVU4547 + 13714 003c E36B ldr r3, [r4, #60] +5539:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { + 13715 .loc 1 5539 10 view .LVU4548 + 13716 003e 002B cmp r3, #0 + 13717 0040 0ED0 beq .L831 +5541:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { + 13718 .loc 1 5541 9 is_stmt 1 view .LVU4549 +5541:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { + 13719 .loc 1 5541 13 is_stmt 0 view .LVU4550 + 13720 0042 F60B lsrs r6, r6, #15 + 13721 .LVL1022: +5541:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { + 13722 .loc 1 5541 13 view .LVU4551 + 13723 0044 0121 movs r1, #1 + 13724 0046 0A00 movs r2, r1 + 13725 0048 3240 ands r2, r6 +5541:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { + 13726 .loc 1 5541 12 view .LVU4552 + 13727 004a 3142 tst r1, r6 + 13728 004c 09D0 beq .L818 +5543:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { + 13729 .loc 1 5543 11 is_stmt 1 view .LVU4553 +5543:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { + 13730 .loc 1 5543 15 is_stmt 0 view .LVU4554 + 13731 004e 1B68 ldr r3, [r3] + 13732 0050 5B68 ldr r3, [r3, #4] +5543:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { + 13733 .loc 1 5543 14 view .LVU4555 + 13734 0052 002B cmp r3, #0 + 13735 0054 2BD0 beq .L832 +5514:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** HAL_I2C_StateTypeDef tmpstate; + 13736 .loc 1 5514 12 view .LVU4556 + 13737 0056 0022 movs r2, #0 + 13738 0058 03E0 b .L818 + 13739 .LVL1023: + ARM GAS /tmp/ccuRhBPx.s page 445 + + + 13740 .L838: +5525:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } + 13741 .loc 1 5525 5 is_stmt 1 view .LVU4557 + 13742 005a FFF7FEFF bl I2C_ITSlaveCplt + 13743 .LVL1024: +5525:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } + 13744 .loc 1 5525 5 is_stmt 0 view .LVU4558 + 13745 005e E1E7 b .L814 + 13746 .L831: +5514:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** HAL_I2C_StateTypeDef tmpstate; + 13747 .loc 1 5514 12 view .LVU4559 + 13748 0060 0022 movs r2, #0 + 13749 .LVL1025: + 13750 .L818: +5551:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { + 13751 .loc 1 5551 7 is_stmt 1 view .LVU4560 +5551:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { + 13752 .loc 1 5551 15 is_stmt 0 view .LVU4561 + 13753 0062 A36B ldr r3, [r4, #56] +5551:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { + 13754 .loc 1 5551 10 view .LVU4562 + 13755 0064 002B cmp r3, #0 + 13756 0066 05D0 beq .L819 +5553:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { + 13757 .loc 1 5553 9 is_stmt 1 view .LVU4563 +5553:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { + 13758 .loc 1 5553 12 is_stmt 0 view .LVU4564 + 13759 0068 0028 cmp r0, #0 + 13760 006a 03D0 beq .L819 +5555:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { + 13761 .loc 1 5555 11 is_stmt 1 view .LVU4565 +5555:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { + 13762 .loc 1 5555 15 is_stmt 0 view .LVU4566 + 13763 006c 1B68 ldr r3, [r3] + 13764 006e 5B68 ldr r3, [r3, #4] +5555:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { + 13765 .loc 1 5555 14 view .LVU4567 + 13766 0070 002B cmp r3, #0 + 13767 0072 1ED0 beq .L820 + 13768 .L819: +5562:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { + 13769 .loc 1 5562 7 is_stmt 1 view .LVU4568 +5562:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { + 13770 .loc 1 5562 10 is_stmt 0 view .LVU4569 + 13771 0074 012A cmp r2, #1 + 13772 0076 1CD0 beq .L820 +5593:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 13773 .loc 1 5593 9 is_stmt 1 view .LVU4570 + 13774 0078 2368 ldr r3, [r4] + 13775 007a 1022 movs r2, #16 + 13776 .LVL1026: +5593:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 13777 .loc 1 5593 9 is_stmt 0 view .LVU4571 + 13778 007c DA61 str r2, [r3, #28] +5596:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 13779 .loc 1 5596 9 is_stmt 1 view .LVU4572 +5596:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + ARM GAS /tmp/ccuRhBPx.s page 446 + + + 13780 .loc 1 5596 13 is_stmt 0 view .LVU4573 + 13781 007e 636C ldr r3, [r4, #68] +5596:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 13782 .loc 1 5596 25 view .LVU4574 + 13783 0080 0C3A subs r2, r2, #12 + 13784 0082 1343 orrs r3, r2 + 13785 0084 6364 str r3, [r4, #68] +5599:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 13786 .loc 1 5599 9 is_stmt 1 view .LVU4575 +5599:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 13787 .loc 1 5599 18 is_stmt 0 view .LVU4576 + 13788 0086 4123 movs r3, #65 + 13789 0088 E35C ldrb r3, [r4, r3] + 13790 008a DBB2 uxtb r3, r3 + 13791 .LVL1027: +5601:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { + 13792 .loc 1 5601 9 is_stmt 1 view .LVU4577 +5601:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { + 13793 .loc 1 5601 12 is_stmt 0 view .LVU4578 + 13794 008c 002F cmp r7, #0 + 13795 008e 03D0 beq .L825 +5601:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { + 13796 .loc 1 5601 45 discriminator 1 view .LVU4579 + 13797 0090 8022 movs r2, #128 + 13798 0092 5204 lsls r2, r2, #17 + 13799 0094 9742 cmp r7, r2 + 13800 0096 3DD1 bne .L823 + 13801 .L825: +5603:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { + 13802 .loc 1 5603 11 is_stmt 1 view .LVU4580 +5603:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { + 13803 .loc 1 5603 14 is_stmt 0 view .LVU4581 + 13804 0098 212B cmp r3, #33 + 13805 009a 2CD0 beq .L826 +5603:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { + 13806 .loc 1 5603 51 discriminator 1 view .LVU4582 + 13807 009c 292B cmp r3, #41 + 13808 009e 2AD0 beq .L826 +5607:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { + 13809 .loc 1 5607 16 is_stmt 1 view .LVU4583 +5607:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { + 13810 .loc 1 5607 19 is_stmt 0 view .LVU4584 + 13811 00a0 222B cmp r3, #34 + 13812 00a2 01D0 beq .L829 +5607:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { + 13813 .loc 1 5607 56 discriminator 1 view .LVU4585 + 13814 00a4 2A2B cmp r3, #42 + 13815 00a6 28D1 bne .L828 + 13816 .L829: +5609:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } + 13817 .loc 1 5609 13 is_stmt 1 view .LVU4586 +5609:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } + 13818 .loc 1 5609 33 is_stmt 0 view .LVU4587 + 13819 00a8 2223 movs r3, #34 + 13820 .LVL1028: +5609:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } + 13821 .loc 1 5609 33 view .LVU4588 + ARM GAS /tmp/ccuRhBPx.s page 447 + + + 13822 00aa 2363 str r3, [r4, #48] + 13823 00ac 25E0 b .L828 + 13824 .LVL1029: + 13825 .L832: +5545:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } + 13826 .loc 1 5545 26 view .LVU4589 + 13827 00ae 0122 movs r2, #1 + 13828 00b0 D7E7 b .L818 + 13829 .LVL1030: + 13830 .L820: +5564:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* Same action must be done for (tmpoptions == I2C_LAST_FRAME) which removed for + 13831 .loc 1 5564 9 is_stmt 1 view .LVU4590 +5564:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* Same action must be done for (tmpoptions == I2C_LAST_FRAME) which removed for + 13832 .loc 1 5564 18 is_stmt 0 view .LVU4591 + 13833 00b2 4123 movs r3, #65 + 13834 00b4 E35C ldrb r3, [r4, r3] +5564:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* Same action must be done for (tmpoptions == I2C_LAST_FRAME) which removed for + 13835 .loc 1 5564 12 view .LVU4592 + 13836 00b6 282B cmp r3, #40 + 13837 00b8 07D0 beq .L839 + 13838 .L822: +5571:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { + 13839 .loc 1 5571 14 is_stmt 1 view .LVU4593 +5571:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { + 13840 .loc 1 5571 23 is_stmt 0 view .LVU4594 + 13841 00ba 4123 movs r3, #65 + 13842 00bc E35C ldrb r3, [r4, r3] +5571:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { + 13843 .loc 1 5571 17 view .LVU4595 + 13844 00be 292B cmp r3, #41 + 13845 00c0 0CD0 beq .L840 + 13846 .L824: +5586:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } + 13847 .loc 1 5586 11 is_stmt 1 view .LVU4596 + 13848 00c2 2368 ldr r3, [r4] + 13849 00c4 1022 movs r2, #16 + 13850 00c6 DA61 str r2, [r3, #28] + 13851 00c8 24E0 b .L823 + 13852 .L839: +5564:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* Same action must be done for (tmpoptions == I2C_LAST_FRAME) which removed for + 13853 .loc 1 5564 51 is_stmt 0 discriminator 1 view .LVU4597 + 13854 00ca 8023 movs r3, #128 + 13855 00cc 9B04 lsls r3, r3, #18 + 13856 00ce 9F42 cmp r7, r3 + 13857 00d0 F3D1 bne .L822 +5569:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } + 13858 .loc 1 5569 11 is_stmt 1 view .LVU4598 + 13859 00d2 2900 movs r1, r5 + 13860 00d4 2000 movs r0, r4 + 13861 00d6 FFF7FEFF bl I2C_ITListenCplt + 13862 .LVL1031: + 13863 00da 1BE0 b .L823 + 13864 .L840: +5571:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { + 13865 .loc 1 5571 64 is_stmt 0 discriminator 1 view .LVU4599 + 13866 00dc 134B ldr r3, .L842 + 13867 00de 9F42 cmp r7, r3 + ARM GAS /tmp/ccuRhBPx.s page 448 + + + 13868 00e0 EFD0 beq .L824 +5574:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 13869 .loc 1 5574 11 is_stmt 1 view .LVU4600 + 13870 00e2 2368 ldr r3, [r4] + 13871 00e4 1022 movs r2, #16 + 13872 00e6 DA61 str r2, [r3, #28] +5577:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 13873 .loc 1 5577 11 view .LVU4601 + 13874 00e8 2000 movs r0, r4 + 13875 00ea FFF7FEFF bl I2C_Flush_TXDR + 13876 .LVL1032: +5581:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } + 13877 .loc 1 5581 11 view .LVU4602 + 13878 00ee 2000 movs r0, r4 + 13879 00f0 FFF7FEFF bl I2C_ITSlaveSeqCplt + 13880 .LVL1033: + 13881 00f4 0EE0 b .L823 + 13882 .LVL1034: + 13883 .L826: +5605:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } + 13884 .loc 1 5605 13 view .LVU4603 +5605:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } + 13885 .loc 1 5605 33 is_stmt 0 view .LVU4604 + 13886 00f6 2123 movs r3, #33 + 13887 .LVL1035: +5605:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } + 13888 .loc 1 5605 33 view .LVU4605 + 13889 00f8 2363 str r3, [r4, #48] + 13890 .L828: +5617:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } + 13891 .loc 1 5617 11 is_stmt 1 view .LVU4606 +5617:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } + 13892 .loc 1 5617 33 is_stmt 0 view .LVU4607 + 13893 00fa 616C ldr r1, [r4, #68] +5617:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } + 13894 .loc 1 5617 11 view .LVU4608 + 13895 00fc 2000 movs r0, r4 + 13896 00fe FFF7FEFF bl I2C_ITError + 13897 .LVL1036: + 13898 0102 07E0 b .L823 + 13899 .LVL1037: + 13900 .L817: +5624:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } + 13901 .loc 1 5624 7 is_stmt 1 view .LVU4609 + 13902 0104 2368 ldr r3, [r4] + 13903 0106 1022 movs r2, #16 + 13904 0108 DA61 str r2, [r3, #28] + 13905 010a 03E0 b .L823 + 13906 .L815: +5627:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** (I2C_CHECK_IT_SOURCE(ITSources, I2C_IT_ADDRI) != RESET)) + 13907 .loc 1 5627 8 view .LVU4610 +5627:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** (I2C_CHECK_IT_SOURCE(ITSources, I2C_IT_ADDRI) != RESET)) + 13908 .loc 1 5627 11 is_stmt 0 view .LVU4611 + 13909 010c 2B07 lsls r3, r5, #28 + 13910 010e 01D5 bpl .L823 +5627:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** (I2C_CHECK_IT_SOURCE(ITSources, I2C_IT_ADDRI) != RESET)) + 13911 .loc 1 5627 62 discriminator 1 view .LVU4612 + ARM GAS /tmp/ccuRhBPx.s page 449 + + + 13912 0110 3607 lsls r6, r6, #28 + 13913 0112 04D4 bmi .L841 + 13914 .LVL1038: + 13915 .L823: +5635:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 13916 .loc 1 5635 3 is_stmt 1 view .LVU4613 +5638:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 13917 .loc 1 5638 3 view .LVU4614 +5638:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 13918 .loc 1 5638 3 view .LVU4615 + 13919 0114 4023 movs r3, #64 + 13920 0116 0022 movs r2, #0 + 13921 0118 E254 strb r2, [r4, r3] +5638:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 13922 .loc 1 5638 3 view .LVU4616 +5640:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } + 13923 .loc 1 5640 3 view .LVU4617 +5640:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } + 13924 .loc 1 5640 10 is_stmt 0 view .LVU4618 + 13925 011a 0020 movs r0, #0 + 13926 .L813: +5641:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 13927 .loc 1 5641 1 view .LVU4619 + 13928 @ sp needed + 13929 .LVL1039: + 13930 .LVL1040: + 13931 .LVL1041: +5641:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 13932 .loc 1 5641 1 view .LVU4620 + 13933 011c F8BD pop {r3, r4, r5, r6, r7, pc} + 13934 .LVL1042: + 13935 .L841: +5630:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } + 13936 .loc 1 5630 5 is_stmt 1 view .LVU4621 + 13937 011e 2900 movs r1, r5 + 13938 0120 2000 movs r0, r4 + 13939 0122 FFF7FEFF bl I2C_ITAddrCplt + 13940 .LVL1043: + 13941 0126 F5E7 b .L823 + 13942 .LVL1044: + 13943 .L830: +5518:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 13944 .loc 1 5518 3 is_stmt 0 discriminator 1 view .LVU4622 + 13945 0128 0220 movs r0, #2 + 13946 .LVL1045: +5518:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 13947 .loc 1 5518 3 discriminator 1 view .LVU4623 + 13948 012a F7E7 b .L813 + 13949 .L843: + 13950 .align 2 + 13951 .L842: + 13952 012c 0000FFFF .word -65536 + 13953 .cfi_endproc + 13954 .LFE94: + 13956 .section .text.I2C_Master_ISR_DMA,"ax",%progbits + 13957 .align 1 + 13958 .syntax unified + ARM GAS /tmp/ccuRhBPx.s page 450 + + + 13959 .code 16 + 13960 .thumb_func + 13962 I2C_Master_ISR_DMA: + 13963 .LVL1046: + 13964 .LFB92: +5233:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** uint16_t devaddress; + 13965 .loc 1 5233 1 is_stmt 1 view -0 + 13966 .cfi_startproc + 13967 @ args = 0, pretend = 0, frame = 0 + 13968 @ frame_needed = 0, uses_anonymous_args = 0 +5233:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** uint16_t devaddress; + 13969 .loc 1 5233 1 is_stmt 0 view .LVU4625 + 13970 0000 10B5 push {r4, lr} + 13971 .cfi_def_cfa_offset 8 + 13972 .cfi_offset 4, -8 + 13973 .cfi_offset 14, -4 + 13974 0002 82B0 sub sp, sp, #8 + 13975 .cfi_def_cfa_offset 16 + 13976 0004 0400 movs r4, r0 +5234:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** uint32_t xfermode; + 13977 .loc 1 5234 3 is_stmt 1 view .LVU4626 +5235:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 13978 .loc 1 5235 3 view .LVU4627 +5238:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 13979 .loc 1 5238 3 view .LVU4628 +5238:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 13980 .loc 1 5238 3 view .LVU4629 + 13981 0006 4023 movs r3, #64 + 13982 0008 C35C ldrb r3, [r0, r3] + 13983 000a 012B cmp r3, #1 + 13984 000c 00D1 bne .LCB13125 + 13985 000e 91E0 b .L857 @long jump + 13986 .LCB13125: +5238:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 13987 .loc 1 5238 3 discriminator 2 view .LVU4630 + 13988 0010 0123 movs r3, #1 + 13989 0012 4020 movs r0, #64 + 13990 .LVL1047: +5238:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 13991 .loc 1 5238 3 is_stmt 0 discriminator 2 view .LVU4631 + 13992 0014 2354 strb r3, [r4, r0] +5238:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 13993 .loc 1 5238 3 is_stmt 1 discriminator 2 view .LVU4632 +5240:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** (I2C_CHECK_IT_SOURCE(ITSources, I2C_IT_NACKI) != RESET)) + 13994 .loc 1 5240 3 view .LVU4633 +5240:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** (I2C_CHECK_IT_SOURCE(ITSources, I2C_IT_NACKI) != RESET)) + 13995 .loc 1 5240 8 is_stmt 0 view .LVU4634 + 13996 0016 0809 lsrs r0, r1, #4 +5240:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** (I2C_CHECK_IT_SOURCE(ITSources, I2C_IT_NACKI) != RESET)) + 13997 .loc 1 5240 6 view .LVU4635 + 13998 0018 0342 tst r3, r0 + 13999 001a 01D0 beq .L846 +5240:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** (I2C_CHECK_IT_SOURCE(ITSources, I2C_IT_NACKI) != RESET)) + 14000 .loc 1 5240 55 discriminator 1 view .LVU4636 + 14001 001c D306 lsls r3, r2, #27 + 14002 001e 2FD4 bmi .L867 + 14003 .L846: + ARM GAS /tmp/ccuRhBPx.s page 451 + + +5257:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** (I2C_CHECK_IT_SOURCE(ITSources, I2C_IT_TCI) != RESET)) + 14004 .loc 1 5257 8 is_stmt 1 view .LVU4637 +5257:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** (I2C_CHECK_IT_SOURCE(ITSources, I2C_IT_TCI) != RESET)) + 14005 .loc 1 5257 11 is_stmt 0 view .LVU4638 + 14006 0020 0B06 lsls r3, r1, #24 + 14007 0022 60D5 bpl .L848 +5257:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** (I2C_CHECK_IT_SOURCE(ITSources, I2C_IT_TCI) != RESET)) + 14008 .loc 1 5257 61 discriminator 1 view .LVU4639 + 14009 0024 5306 lsls r3, r2, #25 + 14010 0026 5ED5 bpl .L848 +5261:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 14011 .loc 1 5261 5 is_stmt 1 view .LVU4640 + 14012 0028 2268 ldr r2, [r4] + 14013 .LVL1048: +5261:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 14014 .loc 1 5261 5 is_stmt 0 view .LVU4641 + 14015 002a 1368 ldr r3, [r2] + 14016 002c 4021 movs r1, #64 + 14017 .LVL1049: +5261:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 14018 .loc 1 5261 5 view .LVU4642 + 14019 002e 8B43 bics r3, r1 + 14020 0030 1360 str r3, [r2] +5263:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { + 14021 .loc 1 5263 5 is_stmt 1 view .LVU4643 +5263:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { + 14022 .loc 1 5263 13 is_stmt 0 view .LVU4644 + 14023 0032 638D ldrh r3, [r4, #42] + 14024 0034 9BB2 uxth r3, r3 +5263:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { + 14025 .loc 1 5263 8 view .LVU4645 + 14026 0036 002B cmp r3, #0 + 14027 0038 48D0 beq .L849 +5266:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 14028 .loc 1 5266 7 is_stmt 1 view .LVU4646 +5266:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 14029 .loc 1 5266 35 is_stmt 0 view .LVU4647 + 14030 003a 2368 ldr r3, [r4] +5266:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 14031 .loc 1 5266 45 view .LVU4648 + 14032 003c 5968 ldr r1, [r3, #4] +5266:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 14033 .loc 1 5266 18 view .LVU4649 + 14034 003e 8905 lsls r1, r1, #22 + 14035 0040 890D lsrs r1, r1, #22 + 14036 .LVL1050: +5269:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { + 14037 .loc 1 5269 7 is_stmt 1 view .LVU4650 +5269:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { + 14038 .loc 1 5269 15 is_stmt 0 view .LVU4651 + 14039 0042 638D ldrh r3, [r4, #42] + 14040 0044 9BB2 uxth r3, r3 +5269:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { + 14041 .loc 1 5269 10 view .LVU4652 + 14042 0046 FF2B cmp r3, #255 + 14043 0048 2ED9 bls .L850 +5271:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** xfermode = I2C_RELOAD_MODE; + ARM GAS /tmp/ccuRhBPx.s page 452 + + + 14044 .loc 1 5271 9 is_stmt 1 view .LVU4653 +5271:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** xfermode = I2C_RELOAD_MODE; + 14045 .loc 1 5271 24 is_stmt 0 view .LVU4654 + 14046 004a FF23 movs r3, #255 + 14047 004c 2385 strh r3, [r4, #40] +5272:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } + 14048 .loc 1 5272 9 is_stmt 1 view .LVU4655 + 14049 .LVL1051: +5272:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } + 14050 .loc 1 5272 18 is_stmt 0 view .LVU4656 + 14051 004e 8023 movs r3, #128 + 14052 0050 5B04 lsls r3, r3, #17 + 14053 .LVL1052: + 14054 .L851: +5288:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 14055 .loc 1 5288 7 is_stmt 1 view .LVU4657 +5288:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 14056 .loc 1 5288 57 is_stmt 0 view .LVU4658 + 14057 0052 228D ldrh r2, [r4, #40] +5288:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 14058 .loc 1 5288 7 view .LVU4659 + 14059 0054 D2B2 uxtb r2, r2 + 14060 0056 0020 movs r0, #0 + 14061 0058 0090 str r0, [sp] + 14062 005a 2000 movs r0, r4 + 14063 005c FFF7FEFF bl I2C_TransferConfig + 14064 .LVL1053: +5291:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 14065 .loc 1 5291 7 is_stmt 1 view .LVU4660 +5291:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 14066 .loc 1 5291 11 is_stmt 0 view .LVU4661 + 14067 0060 638D ldrh r3, [r4, #42] +5291:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 14068 .loc 1 5291 30 view .LVU4662 + 14069 0062 228D ldrh r2, [r4, #40] +5291:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 14070 .loc 1 5291 23 view .LVU4663 + 14071 0064 9B1A subs r3, r3, r2 + 14072 0066 9BB2 uxth r3, r3 + 14073 0068 6385 strh r3, [r4, #42] +5294:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { + 14074 .loc 1 5294 7 is_stmt 1 view .LVU4664 +5294:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { + 14075 .loc 1 5294 15 is_stmt 0 view .LVU4665 + 14076 006a 4123 movs r3, #65 + 14077 006c E35C ldrb r3, [r4, r3] +5294:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { + 14078 .loc 1 5294 10 view .LVU4666 + 14079 006e 222B cmp r3, #34 + 14080 0070 25D0 beq .L868 +5300:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } + 14081 .loc 1 5300 9 is_stmt 1 view .LVU4667 +5300:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } + 14082 .loc 1 5300 13 is_stmt 0 view .LVU4668 + 14083 0072 2268 ldr r2, [r4] +5300:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } + 14084 .loc 1 5300 23 view .LVU4669 + ARM GAS /tmp/ccuRhBPx.s page 453 + + + 14085 0074 1168 ldr r1, [r2] +5300:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } + 14086 .loc 1 5300 29 view .LVU4670 + 14087 0076 8023 movs r3, #128 + 14088 0078 DB01 lsls r3, r3, #7 + 14089 007a 0B43 orrs r3, r1 + 14090 007c 1360 str r3, [r2] + 14091 007e 0DE0 b .L847 + 14092 .LVL1054: + 14093 .L867: +5244:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 14094 .loc 1 5244 5 is_stmt 1 view .LVU4671 + 14095 0080 2368 ldr r3, [r4] + 14096 0082 1022 movs r2, #16 + 14097 .LVL1055: +5244:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 14098 .loc 1 5244 5 is_stmt 0 view .LVU4672 + 14099 0084 DA61 str r2, [r3, #28] +5247:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 14100 .loc 1 5247 5 is_stmt 1 view .LVU4673 +5247:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 14101 .loc 1 5247 9 is_stmt 0 view .LVU4674 + 14102 0086 636C ldr r3, [r4, #68] +5247:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 14103 .loc 1 5247 21 view .LVU4675 + 14104 0088 0C3A subs r2, r2, #12 + 14105 008a 1343 orrs r3, r2 + 14106 008c 6364 str r3, [r4, #68] +5252:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 14107 .loc 1 5252 5 is_stmt 1 view .LVU4676 + 14108 008e 2021 movs r1, #32 + 14109 .LVL1056: +5252:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 14110 .loc 1 5252 5 is_stmt 0 view .LVU4677 + 14111 0090 2000 movs r0, r4 + 14112 0092 FFF7FEFF bl I2C_Enable_IRQ + 14113 .LVL1057: +5255:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } + 14114 .loc 1 5255 5 is_stmt 1 view .LVU4678 + 14115 0096 2000 movs r0, r4 + 14116 0098 FFF7FEFF bl I2C_Flush_TXDR + 14117 .LVL1058: + 14118 .L847: +5355:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 14119 .loc 1 5355 3 view .LVU4679 +5358:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 14120 .loc 1 5358 3 view .LVU4680 +5358:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 14121 .loc 1 5358 3 view .LVU4681 + 14122 009c 4023 movs r3, #64 + 14123 009e 0022 movs r2, #0 + 14124 00a0 E254 strb r2, [r4, r3] +5358:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 14125 .loc 1 5358 3 view .LVU4682 +5360:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } + 14126 .loc 1 5360 3 view .LVU4683 +5360:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } + ARM GAS /tmp/ccuRhBPx.s page 454 + + + 14127 .loc 1 5360 10 is_stmt 0 view .LVU4684 + 14128 00a2 0020 movs r0, #0 + 14129 .L845: +5361:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 14130 .loc 1 5361 1 view .LVU4685 + 14131 00a4 02B0 add sp, sp, #8 + 14132 @ sp needed + 14133 .LVL1059: +5361:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 14134 .loc 1 5361 1 view .LVU4686 + 14135 00a6 10BD pop {r4, pc} + 14136 .LVL1060: + 14137 .L850: +5276:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** if (hi2c->XferOptions != I2C_NO_OPTION_FRAME) + 14138 .loc 1 5276 9 is_stmt 1 view .LVU4687 +5276:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** if (hi2c->XferOptions != I2C_NO_OPTION_FRAME) + 14139 .loc 1 5276 30 is_stmt 0 view .LVU4688 + 14140 00a8 638D ldrh r3, [r4, #42] +5276:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** if (hi2c->XferOptions != I2C_NO_OPTION_FRAME) + 14141 .loc 1 5276 24 view .LVU4689 + 14142 00aa 2385 strh r3, [r4, #40] +5277:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { + 14143 .loc 1 5277 9 is_stmt 1 view .LVU4690 +5277:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { + 14144 .loc 1 5277 17 is_stmt 0 view .LVU4691 + 14145 00ac E26A ldr r2, [r4, #44] +5277:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { + 14146 .loc 1 5277 12 view .LVU4692 + 14147 00ae 224B ldr r3, .L869 + 14148 00b0 9A42 cmp r2, r3 + 14149 00b2 01D0 beq .L858 +5279:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } + 14150 .loc 1 5279 11 is_stmt 1 view .LVU4693 +5279:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } + 14151 .loc 1 5279 20 is_stmt 0 view .LVU4694 + 14152 00b4 E36A ldr r3, [r4, #44] + 14153 .LVL1061: +5279:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } + 14154 .loc 1 5279 20 view .LVU4695 + 14155 00b6 CCE7 b .L851 + 14156 .LVL1062: + 14157 .L858: +5283:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } + 14158 .loc 1 5283 20 view .LVU4696 + 14159 00b8 8023 movs r3, #128 + 14160 00ba 9B04 lsls r3, r3, #18 + 14161 00bc C9E7 b .L851 + 14162 .LVL1063: + 14163 .L868: +5296:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } + 14164 .loc 1 5296 9 is_stmt 1 view .LVU4697 +5296:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } + 14165 .loc 1 5296 13 is_stmt 0 view .LVU4698 + 14166 00be 2268 ldr r2, [r4] +5296:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } + 14167 .loc 1 5296 23 view .LVU4699 + 14168 00c0 1168 ldr r1, [r2] + ARM GAS /tmp/ccuRhBPx.s page 455 + + +5296:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } + 14169 .loc 1 5296 29 view .LVU4700 + 14170 00c2 8023 movs r3, #128 + 14171 00c4 1B02 lsls r3, r3, #8 + 14172 00c6 0B43 orrs r3, r1 + 14173 00c8 1360 str r3, [r2] + 14174 00ca E7E7 b .L847 + 14175 .LVL1064: + 14176 .L849: +5306:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { + 14177 .loc 1 5306 7 is_stmt 1 view .LVU4701 +5306:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { + 14178 .loc 1 5306 11 is_stmt 0 view .LVU4702 + 14179 00cc 2368 ldr r3, [r4] + 14180 00ce 5B68 ldr r3, [r3, #4] +5306:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { + 14181 .loc 1 5306 10 view .LVU4703 + 14182 00d0 9B01 lsls r3, r3, #6 + 14183 00d2 03D4 bmi .L853 +5309:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } + 14184 .loc 1 5309 9 is_stmt 1 view .LVU4704 + 14185 00d4 2000 movs r0, r4 + 14186 00d6 FFF7FEFF bl I2C_ITMasterSeqCplt + 14187 .LVL1065: + 14188 00da DFE7 b .L847 + 14189 .L853: +5315:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } + 14190 .loc 1 5315 9 view .LVU4705 + 14191 00dc 4021 movs r1, #64 + 14192 00de 2000 movs r0, r4 + 14193 00e0 FFF7FEFF bl I2C_ITError + 14194 .LVL1066: + 14195 00e4 DAE7 b .L847 + 14196 .LVL1067: + 14197 .L848: +5319:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** (I2C_CHECK_IT_SOURCE(ITSources, I2C_IT_TCI) != RESET)) + 14198 .loc 1 5319 8 view .LVU4706 +5319:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** (I2C_CHECK_IT_SOURCE(ITSources, I2C_IT_TCI) != RESET)) + 14199 .loc 1 5319 11 is_stmt 0 view .LVU4707 + 14200 00e6 4B06 lsls r3, r1, #25 + 14201 00e8 1CD5 bpl .L854 +5319:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** (I2C_CHECK_IT_SOURCE(ITSources, I2C_IT_TCI) != RESET)) + 14202 .loc 1 5319 60 discriminator 1 view .LVU4708 + 14203 00ea 5306 lsls r3, r2, #25 + 14204 00ec 1AD5 bpl .L854 +5322:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { + 14205 .loc 1 5322 5 is_stmt 1 view .LVU4709 +5322:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { + 14206 .loc 1 5322 13 is_stmt 0 view .LVU4710 + 14207 00ee 638D ldrh r3, [r4, #42] + 14208 00f0 9BB2 uxth r3, r3 +5322:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { + 14209 .loc 1 5322 8 view .LVU4711 + 14210 00f2 002B cmp r3, #0 + 14211 00f4 11D1 bne .L855 +5324:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { + 14212 .loc 1 5324 7 is_stmt 1 view .LVU4712 + ARM GAS /tmp/ccuRhBPx.s page 456 + + +5324:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { + 14213 .loc 1 5324 11 is_stmt 0 view .LVU4713 + 14214 00f6 2268 ldr r2, [r4] + 14215 .LVL1068: +5324:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { + 14216 .loc 1 5324 11 view .LVU4714 + 14217 00f8 5368 ldr r3, [r2, #4] +5324:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { + 14218 .loc 1 5324 10 view .LVU4715 + 14219 00fa 9B01 lsls r3, r3, #6 + 14220 00fc CED4 bmi .L847 +5327:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { + 14221 .loc 1 5327 9 is_stmt 1 view .LVU4716 +5327:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { + 14222 .loc 1 5327 17 is_stmt 0 view .LVU4717 + 14223 00fe E16A ldr r1, [r4, #44] + 14224 .LVL1069: +5327:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { + 14225 .loc 1 5327 12 view .LVU4718 + 14226 0100 0D4B ldr r3, .L869 + 14227 0102 9942 cmp r1, r3 + 14228 0104 05D1 bne .L856 +5330:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } + 14229 .loc 1 5330 11 is_stmt 1 view .LVU4719 +5330:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } + 14230 .loc 1 5330 25 is_stmt 0 view .LVU4720 + 14231 0106 5168 ldr r1, [r2, #4] +5330:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } + 14232 .loc 1 5330 31 view .LVU4721 + 14233 0108 8023 movs r3, #128 + 14234 010a DB01 lsls r3, r3, #7 + 14235 010c 0B43 orrs r3, r1 + 14236 010e 5360 str r3, [r2, #4] + 14237 0110 C4E7 b .L847 + 14238 .L856: +5335:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } + 14239 .loc 1 5335 11 is_stmt 1 view .LVU4722 + 14240 0112 2000 movs r0, r4 + 14241 0114 FFF7FEFF bl I2C_ITMasterSeqCplt + 14242 .LVL1070: + 14243 0118 C0E7 b .L847 + 14244 .LVL1071: + 14245 .L855: +5343:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } + 14246 .loc 1 5343 7 view .LVU4723 + 14247 011a 4021 movs r1, #64 + 14248 .LVL1072: +5343:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } + 14249 .loc 1 5343 7 is_stmt 0 view .LVU4724 + 14250 011c 2000 movs r0, r4 + 14251 011e FFF7FEFF bl I2C_ITError + 14252 .LVL1073: +5343:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } + 14253 .loc 1 5343 7 view .LVU4725 + 14254 0122 BBE7 b .L847 + 14255 .LVL1074: + 14256 .L854: + ARM GAS /tmp/ccuRhBPx.s page 457 + + +5346:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** (I2C_CHECK_IT_SOURCE(ITSources, I2C_IT_STOPI) != RESET)) + 14257 .loc 1 5346 8 is_stmt 1 view .LVU4726 +5346:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** (I2C_CHECK_IT_SOURCE(ITSources, I2C_IT_STOPI) != RESET)) + 14258 .loc 1 5346 11 is_stmt 0 view .LVU4727 + 14259 0124 8B06 lsls r3, r1, #26 + 14260 0126 B9D5 bpl .L847 +5346:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** (I2C_CHECK_IT_SOURCE(ITSources, I2C_IT_STOPI) != RESET)) + 14261 .loc 1 5346 63 discriminator 1 view .LVU4728 + 14262 0128 9206 lsls r2, r2, #26 + 14263 012a B7D5 bpl .L847 + 14264 .LVL1075: +5350:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } + 14265 .loc 1 5350 5 is_stmt 1 view .LVU4729 + 14266 012c 2000 movs r0, r4 + 14267 012e FFF7FEFF bl I2C_ITMasterCplt + 14268 .LVL1076: +5350:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } + 14269 .loc 1 5350 5 is_stmt 0 view .LVU4730 + 14270 0132 B3E7 b .L847 + 14271 .LVL1077: + 14272 .L857: +5238:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 14273 .loc 1 5238 3 discriminator 1 view .LVU4731 + 14274 0134 0220 movs r0, #2 + 14275 .LVL1078: +5238:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 14276 .loc 1 5238 3 discriminator 1 view .LVU4732 + 14277 0136 B5E7 b .L845 + 14278 .L870: + 14279 .align 2 + 14280 .L869: + 14281 0138 0000FFFF .word -65536 + 14282 .cfi_endproc + 14283 .LFE92: + 14285 .section .text.I2C_DMAError,"ax",%progbits + 14286 .align 1 + 14287 .syntax unified + 14288 .code 16 + 14289 .thumb_func + 14291 I2C_DMAError: + 14292 .LVL1079: + 14293 .LFB110: +6685:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* Derogation MISRAC2012-Rule-11.5 */ + 14294 .loc 1 6685 1 is_stmt 1 view -0 + 14295 .cfi_startproc + 14296 @ args = 0, pretend = 0, frame = 0 + 14297 @ frame_needed = 0, uses_anonymous_args = 0 +6685:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* Derogation MISRAC2012-Rule-11.5 */ + 14298 .loc 1 6685 1 is_stmt 0 view .LVU4734 + 14299 0000 10B5 push {r4, lr} + 14300 .cfi_def_cfa_offset 8 + 14301 .cfi_offset 4, -8 + 14302 .cfi_offset 14, -4 +6687:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 14303 .loc 1 6687 3 is_stmt 1 view .LVU4735 +6687:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 14304 .loc 1 6687 22 is_stmt 0 view .LVU4736 + ARM GAS /tmp/ccuRhBPx.s page 458 + + + 14305 0002 406A ldr r0, [r0, #36] + 14306 .LVL1080: +6690:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 14307 .loc 1 6690 3 is_stmt 1 view .LVU4737 +6690:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 14308 .loc 1 6690 7 is_stmt 0 view .LVU4738 + 14309 0004 0268 ldr r2, [r0] +6690:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 14310 .loc 1 6690 17 view .LVU4739 + 14311 0006 5168 ldr r1, [r2, #4] +6690:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 14312 .loc 1 6690 23 view .LVU4740 + 14313 0008 8023 movs r3, #128 + 14314 000a 1B02 lsls r3, r3, #8 + 14315 000c 0B43 orrs r3, r1 + 14316 000e 5360 str r3, [r2, #4] +6693:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } + 14317 .loc 1 6693 3 is_stmt 1 view .LVU4741 + 14318 0010 1021 movs r1, #16 + 14319 0012 FFF7FEFF bl I2C_ITError + 14320 .LVL1081: +6694:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 14321 .loc 1 6694 1 is_stmt 0 view .LVU4742 + 14322 @ sp needed + 14323 0016 10BD pop {r4, pc} + 14324 .cfi_endproc + 14325 .LFE110: + 14327 .section .text.I2C_DMAMasterTransmitCplt,"ax",%progbits + 14328 .align 1 + 14329 .syntax unified + 14330 .code 16 + 14331 .thumb_func + 14333 I2C_DMAMasterTransmitCplt: + 14334 .LVL1082: + 14335 .LFB106: +6525:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* Derogation MISRAC2012-Rule-11.5 */ + 14336 .loc 1 6525 1 is_stmt 1 view -0 + 14337 .cfi_startproc + 14338 @ args = 0, pretend = 0, frame = 0 + 14339 @ frame_needed = 0, uses_anonymous_args = 0 +6525:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* Derogation MISRAC2012-Rule-11.5 */ + 14340 .loc 1 6525 1 is_stmt 0 view .LVU4744 + 14341 0000 10B5 push {r4, lr} + 14342 .cfi_def_cfa_offset 8 + 14343 .cfi_offset 4, -8 + 14344 .cfi_offset 14, -4 +6527:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 14345 .loc 1 6527 3 is_stmt 1 view .LVU4745 +6527:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 14346 .loc 1 6527 22 is_stmt 0 view .LVU4746 + 14347 0002 446A ldr r4, [r0, #36] + 14348 .LVL1083: +6530:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 14349 .loc 1 6530 3 is_stmt 1 view .LVU4747 +6530:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 14350 .loc 1 6530 7 is_stmt 0 view .LVU4748 + 14351 0004 2268 ldr r2, [r4] + ARM GAS /tmp/ccuRhBPx.s page 459 + + +6530:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 14352 .loc 1 6530 17 view .LVU4749 + 14353 0006 1368 ldr r3, [r2] +6530:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 14354 .loc 1 6530 23 view .LVU4750 + 14355 0008 1549 ldr r1, .L879 + 14356 000a 0B40 ands r3, r1 + 14357 000c 1360 str r3, [r2] +6533:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { + 14358 .loc 1 6533 3 is_stmt 1 view .LVU4751 +6533:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { + 14359 .loc 1 6533 11 is_stmt 0 view .LVU4752 + 14360 000e 638D ldrh r3, [r4, #42] + 14361 0010 9BB2 uxth r3, r3 +6533:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { + 14362 .loc 1 6533 6 view .LVU4753 + 14363 0012 002B cmp r3, #0 + 14364 0014 16D0 beq .L878 +6542:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 14365 .loc 1 6542 5 is_stmt 1 view .LVU4754 +6542:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 14366 .loc 1 6542 9 is_stmt 0 view .LVU4755 + 14367 0016 616A ldr r1, [r4, #36] +6542:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 14368 .loc 1 6542 27 view .LVU4756 + 14369 0018 238D ldrh r3, [r4, #40] +6542:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 14370 .loc 1 6542 20 view .LVU4757 + 14371 001a C918 adds r1, r1, r3 + 14372 001c 6162 str r1, [r4, #36] +6545:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { + 14373 .loc 1 6545 5 is_stmt 1 view .LVU4758 +6545:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { + 14374 .loc 1 6545 13 is_stmt 0 view .LVU4759 + 14375 001e 638D ldrh r3, [r4, #42] + 14376 0020 9BB2 uxth r3, r3 +6545:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { + 14377 .loc 1 6545 8 view .LVU4760 + 14378 0022 FF2B cmp r3, #255 + 14379 0024 13D9 bls .L875 +6547:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } + 14380 .loc 1 6547 7 is_stmt 1 view .LVU4761 +6547:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } + 14381 .loc 1 6547 22 is_stmt 0 view .LVU4762 + 14382 0026 FF23 movs r3, #255 + 14383 0028 2385 strh r3, [r4, #40] + 14384 .L876: +6555:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->XferSize) != HAL_OK) + 14385 .loc 1 6555 5 is_stmt 1 view .LVU4763 +6555:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->XferSize) != HAL_OK) + 14386 .loc 1 6555 81 is_stmt 0 view .LVU4764 + 14387 002a 2268 ldr r2, [r4] +6555:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->XferSize) != HAL_OK) + 14388 .loc 1 6555 76 view .LVU4765 + 14389 002c 2832 adds r2, r2, #40 +6556:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { + 14390 .loc 1 6556 30 view .LVU4766 + ARM GAS /tmp/ccuRhBPx.s page 460 + + + 14391 002e 238D ldrh r3, [r4, #40] +6555:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->XferSize) != HAL_OK) + 14392 .loc 1 6555 9 view .LVU4767 + 14393 0030 A06B ldr r0, [r4, #56] + 14394 .LVL1084: +6555:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->XferSize) != HAL_OK) + 14395 .loc 1 6555 9 view .LVU4768 + 14396 0032 FFF7FEFF bl HAL_DMA_Start_IT + 14397 .LVL1085: +6555:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->XferSize) != HAL_OK) + 14398 .loc 1 6555 8 discriminator 1 view .LVU4769 + 14399 0036 0028 cmp r0, #0 + 14400 0038 0CD0 beq .L877 +6559:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } + 14401 .loc 1 6559 7 is_stmt 1 view .LVU4770 + 14402 003a 1021 movs r1, #16 + 14403 003c 2000 movs r0, r4 + 14404 003e FFF7FEFF bl I2C_ITError + 14405 .LVL1086: + 14406 .L872: +6567:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 14407 .loc 1 6567 1 is_stmt 0 view .LVU4771 + 14408 @ sp needed + 14409 .LVL1087: +6567:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 14410 .loc 1 6567 1 view .LVU4772 + 14411 0042 10BD pop {r4, pc} + 14412 .LVL1088: + 14413 .L878: +6536:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } + 14414 .loc 1 6536 5 is_stmt 1 view .LVU4773 + 14415 0044 2021 movs r1, #32 + 14416 0046 2000 movs r0, r4 + 14417 .LVL1089: +6536:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } + 14418 .loc 1 6536 5 is_stmt 0 view .LVU4774 + 14419 0048 FFF7FEFF bl I2C_Enable_IRQ + 14420 .LVL1090: + 14421 004c F9E7 b .L872 + 14422 .LVL1091: + 14423 .L875: +6551:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } + 14424 .loc 1 6551 7 is_stmt 1 view .LVU4775 +6551:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } + 14425 .loc 1 6551 28 is_stmt 0 view .LVU4776 + 14426 004e 638D ldrh r3, [r4, #42] +6551:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } + 14427 .loc 1 6551 22 view .LVU4777 + 14428 0050 2385 strh r3, [r4, #40] + 14429 0052 EAE7 b .L876 + 14430 .LVL1092: + 14431 .L877: +6564:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } + 14432 .loc 1 6564 7 is_stmt 1 view .LVU4778 + 14433 0054 4021 movs r1, #64 + 14434 0056 2000 movs r0, r4 + 14435 0058 FFF7FEFF bl I2C_Enable_IRQ + ARM GAS /tmp/ccuRhBPx.s page 461 + + + 14436 .LVL1093: +6567:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 14437 .loc 1 6567 1 is_stmt 0 view .LVU4779 + 14438 005c F1E7 b .L872 + 14439 .L880: + 14440 005e C046 .align 2 + 14441 .L879: + 14442 0060 FFBFFFFF .word -16385 + 14443 .cfi_endproc + 14444 .LFE106: + 14446 .section .text.I2C_DMAMasterReceiveCplt,"ax",%progbits + 14447 .align 1 + 14448 .syntax unified + 14449 .code 16 + 14450 .thumb_func + 14452 I2C_DMAMasterReceiveCplt: + 14453 .LVL1094: + 14454 .LFB108: +6605:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* Derogation MISRAC2012-Rule-11.5 */ + 14455 .loc 1 6605 1 is_stmt 1 view -0 + 14456 .cfi_startproc + 14457 @ args = 0, pretend = 0, frame = 0 + 14458 @ frame_needed = 0, uses_anonymous_args = 0 +6605:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* Derogation MISRAC2012-Rule-11.5 */ + 14459 .loc 1 6605 1 is_stmt 0 view .LVU4781 + 14460 0000 10B5 push {r4, lr} + 14461 .cfi_def_cfa_offset 8 + 14462 .cfi_offset 4, -8 + 14463 .cfi_offset 14, -4 +6607:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 14464 .loc 1 6607 3 is_stmt 1 view .LVU4782 +6607:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 14465 .loc 1 6607 22 is_stmt 0 view .LVU4783 + 14466 0002 446A ldr r4, [r0, #36] + 14467 .LVL1095: +6610:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 14468 .loc 1 6610 3 is_stmt 1 view .LVU4784 +6610:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 14469 .loc 1 6610 7 is_stmt 0 view .LVU4785 + 14470 0004 2268 ldr r2, [r4] +6610:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 14471 .loc 1 6610 17 view .LVU4786 + 14472 0006 1368 ldr r3, [r2] +6610:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 14473 .loc 1 6610 23 view .LVU4787 + 14474 0008 1549 ldr r1, .L888 + 14475 000a 0B40 ands r3, r1 + 14476 000c 1360 str r3, [r2] +6613:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { + 14477 .loc 1 6613 3 is_stmt 1 view .LVU4788 +6613:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { + 14478 .loc 1 6613 11 is_stmt 0 view .LVU4789 + 14479 000e 638D ldrh r3, [r4, #42] + 14480 0010 9BB2 uxth r3, r3 +6613:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { + 14481 .loc 1 6613 6 view .LVU4790 + 14482 0012 002B cmp r3, #0 + ARM GAS /tmp/ccuRhBPx.s page 462 + + + 14483 0014 16D0 beq .L887 +6622:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 14484 .loc 1 6622 5 is_stmt 1 view .LVU4791 +6622:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 14485 .loc 1 6622 9 is_stmt 0 view .LVU4792 + 14486 0016 626A ldr r2, [r4, #36] +6622:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 14487 .loc 1 6622 27 view .LVU4793 + 14488 0018 238D ldrh r3, [r4, #40] +6622:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 14489 .loc 1 6622 20 view .LVU4794 + 14490 001a D218 adds r2, r2, r3 + 14491 001c 6262 str r2, [r4, #36] +6625:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { + 14492 .loc 1 6625 5 is_stmt 1 view .LVU4795 +6625:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { + 14493 .loc 1 6625 13 is_stmt 0 view .LVU4796 + 14494 001e 638D ldrh r3, [r4, #42] + 14495 0020 9BB2 uxth r3, r3 +6625:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { + 14496 .loc 1 6625 8 view .LVU4797 + 14497 0022 FF2B cmp r3, #255 + 14498 0024 13D9 bls .L884 +6627:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } + 14499 .loc 1 6627 7 is_stmt 1 view .LVU4798 +6627:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } + 14500 .loc 1 6627 22 is_stmt 0 view .LVU4799 + 14501 0026 FF23 movs r3, #255 + 14502 0028 2385 strh r3, [r4, #40] + 14503 .L885: +6635:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->XferSize) != HAL_OK) + 14504 .loc 1 6635 5 is_stmt 1 view .LVU4800 +6635:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->XferSize) != HAL_OK) + 14505 .loc 1 6635 55 is_stmt 0 view .LVU4801 + 14506 002a 2168 ldr r1, [r4] +6635:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->XferSize) != HAL_OK) + 14507 .loc 1 6635 50 view .LVU4802 + 14508 002c 2431 adds r1, r1, #36 +6636:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { + 14509 .loc 1 6636 30 view .LVU4803 + 14510 002e 238D ldrh r3, [r4, #40] +6635:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->XferSize) != HAL_OK) + 14511 .loc 1 6635 9 view .LVU4804 + 14512 0030 E06B ldr r0, [r4, #60] + 14513 .LVL1096: +6635:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->XferSize) != HAL_OK) + 14514 .loc 1 6635 9 view .LVU4805 + 14515 0032 FFF7FEFF bl HAL_DMA_Start_IT + 14516 .LVL1097: +6635:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->XferSize) != HAL_OK) + 14517 .loc 1 6635 8 discriminator 1 view .LVU4806 + 14518 0036 0028 cmp r0, #0 + 14519 0038 0CD0 beq .L886 +6639:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } + 14520 .loc 1 6639 7 is_stmt 1 view .LVU4807 + 14521 003a 1021 movs r1, #16 + 14522 003c 2000 movs r0, r4 + ARM GAS /tmp/ccuRhBPx.s page 463 + + + 14523 003e FFF7FEFF bl I2C_ITError + 14524 .LVL1098: + 14525 .L881: +6647:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 14526 .loc 1 6647 1 is_stmt 0 view .LVU4808 + 14527 @ sp needed + 14528 .LVL1099: +6647:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 14529 .loc 1 6647 1 view .LVU4809 + 14530 0042 10BD pop {r4, pc} + 14531 .LVL1100: + 14532 .L887: +6616:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } + 14533 .loc 1 6616 5 is_stmt 1 view .LVU4810 + 14534 0044 2021 movs r1, #32 + 14535 0046 2000 movs r0, r4 + 14536 .LVL1101: +6616:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } + 14537 .loc 1 6616 5 is_stmt 0 view .LVU4811 + 14538 0048 FFF7FEFF bl I2C_Enable_IRQ + 14539 .LVL1102: + 14540 004c F9E7 b .L881 + 14541 .LVL1103: + 14542 .L884: +6631:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } + 14543 .loc 1 6631 7 is_stmt 1 view .LVU4812 +6631:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } + 14544 .loc 1 6631 28 is_stmt 0 view .LVU4813 + 14545 004e 638D ldrh r3, [r4, #42] +6631:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } + 14546 .loc 1 6631 22 view .LVU4814 + 14547 0050 2385 strh r3, [r4, #40] + 14548 0052 EAE7 b .L885 + 14549 .LVL1104: + 14550 .L886: +6644:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } + 14551 .loc 1 6644 7 is_stmt 1 view .LVU4815 + 14552 0054 4021 movs r1, #64 + 14553 0056 2000 movs r0, r4 + 14554 0058 FFF7FEFF bl I2C_Enable_IRQ + 14555 .LVL1105: +6647:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 14556 .loc 1 6647 1 is_stmt 0 view .LVU4816 + 14557 005c F1E7 b .L881 + 14558 .L889: + 14559 005e C046 .align 2 + 14560 .L888: + 14561 0060 FF7FFFFF .word -32769 + 14562 .cfi_endproc + 14563 .LFE108: + 14565 .section .text.I2C_Mem_ISR_IT,"ax",%progbits + 14566 .align 1 + 14567 .syntax unified + 14568 .code 16 + 14569 .thumb_func + 14571 I2C_Mem_ISR_IT: + 14572 .LVL1106: + ARM GAS /tmp/ccuRhBPx.s page 464 + + + 14573 .LFB90: +4955:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** uint32_t direction = I2C_GENERATE_START_WRITE; + 14574 .loc 1 4955 1 is_stmt 1 view -0 + 14575 .cfi_startproc + 14576 @ args = 0, pretend = 0, frame = 0 + 14577 @ frame_needed = 0, uses_anonymous_args = 0 +4955:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** uint32_t direction = I2C_GENERATE_START_WRITE; + 14578 .loc 1 4955 1 is_stmt 0 view .LVU4818 + 14579 0000 70B5 push {r4, r5, r6, lr} + 14580 .cfi_def_cfa_offset 16 + 14581 .cfi_offset 4, -16 + 14582 .cfi_offset 5, -12 + 14583 .cfi_offset 6, -8 + 14584 .cfi_offset 14, -4 + 14585 0002 82B0 sub sp, sp, #8 + 14586 .cfi_def_cfa_offset 24 + 14587 0004 0400 movs r4, r0 + 14588 0006 0D00 movs r5, r1 + 14589 0008 1600 movs r6, r2 +4956:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** uint32_t tmpITFlags = ITFlags; + 14590 .loc 1 4956 3 is_stmt 1 view .LVU4819 + 14591 .LVL1107: +4957:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 14592 .loc 1 4957 3 view .LVU4820 +4960:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 14593 .loc 1 4960 3 view .LVU4821 +4960:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 14594 .loc 1 4960 3 view .LVU4822 + 14595 000a 4023 movs r3, #64 + 14596 000c C35C ldrb r3, [r0, r3] + 14597 000e 012B cmp r3, #1 + 14598 0010 00D1 bne .LCB13694 + 14599 0012 AAE0 b .L903 @long jump + 14600 .LCB13694: +4960:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 14601 .loc 1 4960 3 discriminator 2 view .LVU4823 + 14602 0014 0123 movs r3, #1 + 14603 0016 4022 movs r2, #64 + 14604 .LVL1108: +4960:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 14605 .loc 1 4960 3 is_stmt 0 discriminator 2 view .LVU4824 + 14606 0018 8354 strb r3, [r0, r2] +4960:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 14607 .loc 1 4960 3 is_stmt 1 discriminator 2 view .LVU4825 +4962:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** (I2C_CHECK_IT_SOURCE(ITSources, I2C_IT_NACKI) != RESET)) + 14608 .loc 1 4962 3 view .LVU4826 +4962:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** (I2C_CHECK_IT_SOURCE(ITSources, I2C_IT_NACKI) != RESET)) + 14609 .loc 1 4962 8 is_stmt 0 view .LVU4827 + 14610 001a 0A09 lsrs r2, r1, #4 +4962:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** (I2C_CHECK_IT_SOURCE(ITSources, I2C_IT_NACKI) != RESET)) + 14611 .loc 1 4962 6 view .LVU4828 + 14612 001c 1342 tst r3, r2 + 14613 001e 01D0 beq .L892 +4962:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** (I2C_CHECK_IT_SOURCE(ITSources, I2C_IT_NACKI) != RESET)) + 14614 .loc 1 4962 58 discriminator 1 view .LVU4829 + 14615 0020 F306 lsls r3, r6, #27 + 14616 0022 1ED4 bmi .L916 + ARM GAS /tmp/ccuRhBPx.s page 465 + + + 14617 .L892: +4976:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** (I2C_CHECK_IT_SOURCE(ITSources, I2C_IT_RXI) != RESET)) + 14618 .loc 1 4976 8 is_stmt 1 view .LVU4830 +4976:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** (I2C_CHECK_IT_SOURCE(ITSources, I2C_IT_RXI) != RESET)) + 14619 .loc 1 4976 11 is_stmt 0 view .LVU4831 + 14620 0024 6B07 lsls r3, r5, #29 + 14621 0026 26D5 bpl .L894 +4976:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** (I2C_CHECK_IT_SOURCE(ITSources, I2C_IT_RXI) != RESET)) + 14622 .loc 1 4976 65 discriminator 1 view .LVU4832 + 14623 0028 7307 lsls r3, r6, #29 + 14624 002a 24D5 bpl .L894 +4980:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 14625 .loc 1 4980 5 is_stmt 1 view .LVU4833 +4980:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 14626 .loc 1 4980 16 is_stmt 0 view .LVU4834 + 14627 002c 0423 movs r3, #4 + 14628 002e 9D43 bics r5, r3 + 14629 .LVL1109: +4983:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 14630 .loc 1 4983 5 is_stmt 1 view .LVU4835 +4983:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 14631 .loc 1 4983 36 is_stmt 0 view .LVU4836 + 14632 0030 2368 ldr r3, [r4] +4983:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 14633 .loc 1 4983 46 view .LVU4837 + 14634 0032 5A6A ldr r2, [r3, #36] +4983:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 14635 .loc 1 4983 10 view .LVU4838 + 14636 0034 636A ldr r3, [r4, #36] +4983:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 14637 .loc 1 4983 21 view .LVU4839 + 14638 0036 1A70 strb r2, [r3] +4986:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 14639 .loc 1 4986 5 is_stmt 1 view .LVU4840 +4986:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 14640 .loc 1 4986 9 is_stmt 0 view .LVU4841 + 14641 0038 636A ldr r3, [r4, #36] +4986:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 14642 .loc 1 4986 19 view .LVU4842 + 14643 003a 0133 adds r3, r3, #1 + 14644 003c 6362 str r3, [r4, #36] +4988:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->XferCount--; + 14645 .loc 1 4988 5 is_stmt 1 view .LVU4843 +4988:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->XferCount--; + 14646 .loc 1 4988 9 is_stmt 0 view .LVU4844 + 14647 003e 238D ldrh r3, [r4, #40] +4988:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->XferCount--; + 14648 .loc 1 4988 19 view .LVU4845 + 14649 0040 013B subs r3, r3, #1 + 14650 0042 2385 strh r3, [r4, #40] +4989:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } + 14651 .loc 1 4989 5 is_stmt 1 view .LVU4846 +4989:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } + 14652 .loc 1 4989 9 is_stmt 0 view .LVU4847 + 14653 0044 638D ldrh r3, [r4, #42] +4989:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } + 14654 .loc 1 4989 20 view .LVU4848 + ARM GAS /tmp/ccuRhBPx.s page 466 + + + 14655 0046 013B subs r3, r3, #1 + 14656 0048 9BB2 uxth r3, r3 + 14657 004a 6385 strh r3, [r4, #42] + 14658 .LVL1110: + 14659 .L893: +5067:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 14660 .loc 1 5067 3 is_stmt 1 view .LVU4849 +5069:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** (I2C_CHECK_IT_SOURCE(ITSources, I2C_IT_STOPI) != RESET)) + 14661 .loc 1 5069 3 view .LVU4850 +5069:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** (I2C_CHECK_IT_SOURCE(ITSources, I2C_IT_STOPI) != RESET)) + 14662 .loc 1 5069 6 is_stmt 0 view .LVU4851 + 14663 004c AB06 lsls r3, r5, #26 + 14664 004e 02D5 bpl .L902 +5069:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** (I2C_CHECK_IT_SOURCE(ITSources, I2C_IT_STOPI) != RESET)) + 14665 .loc 1 5069 61 discriminator 1 view .LVU4852 + 14666 0050 B606 lsls r6, r6, #26 + 14667 0052 00D5 bpl .LCB13766 + 14668 0054 84E0 b .L917 @long jump + 14669 .LCB13766: + 14670 .LVL1111: + 14671 .L902: +5077:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 14672 .loc 1 5077 3 is_stmt 1 view .LVU4853 +5077:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 14673 .loc 1 5077 3 view .LVU4854 + 14674 0056 4023 movs r3, #64 + 14675 0058 0022 movs r2, #0 + 14676 005a E254 strb r2, [r4, r3] +5077:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 14677 .loc 1 5077 3 view .LVU4855 +5079:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } + 14678 .loc 1 5079 3 view .LVU4856 +5079:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } + 14679 .loc 1 5079 10 is_stmt 0 view .LVU4857 + 14680 005c 0020 movs r0, #0 + 14681 .L891: +5080:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 14682 .loc 1 5080 1 view .LVU4858 + 14683 005e 02B0 add sp, sp, #8 + 14684 @ sp needed + 14685 .LVL1112: + 14686 .LVL1113: +5080:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 14687 .loc 1 5080 1 view .LVU4859 + 14688 0060 70BD pop {r4, r5, r6, pc} + 14689 .LVL1114: + 14690 .L916: +4966:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 14691 .loc 1 4966 5 is_stmt 1 view .LVU4860 + 14692 0062 0368 ldr r3, [r0] + 14693 0064 1022 movs r2, #16 + 14694 0066 DA61 str r2, [r3, #28] +4971:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 14695 .loc 1 4971 5 view .LVU4861 +4971:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 14696 .loc 1 4971 9 is_stmt 0 view .LVU4862 + 14697 0068 436C ldr r3, [r0, #68] + ARM GAS /tmp/ccuRhBPx.s page 467 + + +4971:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 14698 .loc 1 4971 21 view .LVU4863 + 14699 006a 0C3A subs r2, r2, #12 + 14700 006c 1343 orrs r3, r2 + 14701 006e 4364 str r3, [r0, #68] +4974:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } + 14702 .loc 1 4974 5 is_stmt 1 view .LVU4864 + 14703 0070 FFF7FEFF bl I2C_Flush_TXDR + 14704 .LVL1115: +4974:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } + 14705 .loc 1 4974 5 is_stmt 0 view .LVU4865 + 14706 0074 EAE7 b .L893 + 14707 .LVL1116: + 14708 .L894: +4991:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** (I2C_CHECK_IT_SOURCE(ITSources, I2C_IT_TXI) != RESET)) + 14709 .loc 1 4991 8 is_stmt 1 view .LVU4866 +4991:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** (I2C_CHECK_IT_SOURCE(ITSources, I2C_IT_TXI) != RESET)) + 14710 .loc 1 4991 11 is_stmt 0 view .LVU4867 + 14711 0076 AB07 lsls r3, r5, #30 + 14712 0078 1AD5 bpl .L895 +4991:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** (I2C_CHECK_IT_SOURCE(ITSources, I2C_IT_TXI) != RESET)) + 14713 .loc 1 4991 65 discriminator 1 view .LVU4868 + 14714 007a B307 lsls r3, r6, #30 + 14715 007c 18D5 bpl .L895 +4994:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { + 14716 .loc 1 4994 5 is_stmt 1 view .LVU4869 +4994:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { + 14717 .loc 1 4994 13 is_stmt 0 view .LVU4870 + 14718 007e 236D ldr r3, [r4, #80] +4994:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { + 14719 .loc 1 4994 8 view .LVU4871 + 14720 0080 0133 adds r3, r3, #1 + 14721 0082 06D0 beq .L918 +5008:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 14722 .loc 1 5008 7 is_stmt 1 view .LVU4872 +5008:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 14723 .loc 1 5008 11 is_stmt 0 view .LVU4873 + 14724 0084 2368 ldr r3, [r4] +5008:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 14725 .loc 1 5008 34 view .LVU4874 + 14726 0086 226D ldr r2, [r4, #80] +5008:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 14727 .loc 1 5008 28 view .LVU4875 + 14728 0088 9A62 str r2, [r3, #40] +5011:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } + 14729 .loc 1 5011 7 is_stmt 1 view .LVU4876 +5011:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } + 14730 .loc 1 5011 24 is_stmt 0 view .LVU4877 + 14731 008a 0123 movs r3, #1 + 14732 008c 5B42 rsbs r3, r3, #0 + 14733 008e 2365 str r3, [r4, #80] + 14734 0090 DCE7 b .L893 + 14735 .L918: +4997:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 14736 .loc 1 4997 7 is_stmt 1 view .LVU4878 +4997:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 14737 .loc 1 4997 35 is_stmt 0 view .LVU4879 + ARM GAS /tmp/ccuRhBPx.s page 468 + + + 14738 0092 626A ldr r2, [r4, #36] +4997:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 14739 .loc 1 4997 11 view .LVU4880 + 14740 0094 2368 ldr r3, [r4] +4997:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 14741 .loc 1 4997 30 view .LVU4881 + 14742 0096 1278 ldrb r2, [r2] +4997:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 14743 .loc 1 4997 28 view .LVU4882 + 14744 0098 9A62 str r2, [r3, #40] +5000:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 14745 .loc 1 5000 7 is_stmt 1 view .LVU4883 +5000:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 14746 .loc 1 5000 11 is_stmt 0 view .LVU4884 + 14747 009a 636A ldr r3, [r4, #36] +5000:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 14748 .loc 1 5000 21 view .LVU4885 + 14749 009c 0133 adds r3, r3, #1 + 14750 009e 6362 str r3, [r4, #36] +5002:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->XferCount--; + 14751 .loc 1 5002 7 is_stmt 1 view .LVU4886 +5002:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->XferCount--; + 14752 .loc 1 5002 11 is_stmt 0 view .LVU4887 + 14753 00a0 238D ldrh r3, [r4, #40] +5002:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->XferCount--; + 14754 .loc 1 5002 21 view .LVU4888 + 14755 00a2 013B subs r3, r3, #1 + 14756 00a4 2385 strh r3, [r4, #40] +5003:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } + 14757 .loc 1 5003 7 is_stmt 1 view .LVU4889 +5003:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } + 14758 .loc 1 5003 11 is_stmt 0 view .LVU4890 + 14759 00a6 638D ldrh r3, [r4, #42] +5003:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } + 14760 .loc 1 5003 22 view .LVU4891 + 14761 00a8 013B subs r3, r3, #1 + 14762 00aa 9BB2 uxth r3, r3 + 14763 00ac 6385 strh r3, [r4, #42] + 14764 00ae CDE7 b .L893 + 14765 .L895: +5014:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** (I2C_CHECK_IT_SOURCE(ITSources, I2C_IT_TCI) != RESET)) + 14766 .loc 1 5014 8 is_stmt 1 view .LVU4892 +5014:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** (I2C_CHECK_IT_SOURCE(ITSources, I2C_IT_TCI) != RESET)) + 14767 .loc 1 5014 11 is_stmt 0 view .LVU4893 + 14768 00b0 2B06 lsls r3, r5, #24 + 14769 00b2 2CD5 bpl .L897 +5014:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** (I2C_CHECK_IT_SOURCE(ITSources, I2C_IT_TCI) != RESET)) + 14770 .loc 1 5014 64 discriminator 1 view .LVU4894 + 14771 00b4 7306 lsls r3, r6, #25 + 14772 00b6 2AD5 bpl .L897 +5017:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { + 14773 .loc 1 5017 5 is_stmt 1 view .LVU4895 +5017:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { + 14774 .loc 1 5017 14 is_stmt 0 view .LVU4896 + 14775 00b8 638D ldrh r3, [r4, #42] + 14776 00ba 9BB2 uxth r3, r3 +5017:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { + ARM GAS /tmp/ccuRhBPx.s page 469 + + + 14777 .loc 1 5017 8 view .LVU4897 + 14778 00bc 002B cmp r3, #0 + 14779 00be 21D0 beq .L898 +5017:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { + 14780 .loc 1 5017 41 discriminator 1 view .LVU4898 + 14781 00c0 238D ldrh r3, [r4, #40] +5017:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { + 14782 .loc 1 5017 33 discriminator 1 view .LVU4899 + 14783 00c2 002B cmp r3, #0 + 14784 00c4 1ED1 bne .L898 +5019:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { + 14785 .loc 1 5019 7 is_stmt 1 view .LVU4900 +5019:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { + 14786 .loc 1 5019 15 is_stmt 0 view .LVU4901 + 14787 00c6 638D ldrh r3, [r4, #42] + 14788 00c8 9BB2 uxth r3, r3 +5019:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { + 14789 .loc 1 5019 10 view .LVU4902 + 14790 00ca FF2B cmp r3, #255 + 14791 00cc 0CD9 bls .L899 +5021:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** I2C_TransferConfig(hi2c, (uint16_t)hi2c->Devaddress, (uint8_t)hi2c->XferSize, + 14792 .loc 1 5021 9 is_stmt 1 view .LVU4903 +5021:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** I2C_TransferConfig(hi2c, (uint16_t)hi2c->Devaddress, (uint8_t)hi2c->XferSize, + 14793 .loc 1 5021 24 is_stmt 0 view .LVU4904 + 14794 00ce FF23 movs r3, #255 + 14795 00d0 2385 strh r3, [r4, #40] +5022:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** I2C_RELOAD_MODE, I2C_NO_STARTSTOP); + 14796 .loc 1 5022 9 is_stmt 1 view .LVU4905 +5022:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** I2C_RELOAD_MODE, I2C_NO_STARTSTOP); + 14797 .loc 1 5022 48 is_stmt 0 view .LVU4906 + 14798 00d2 E16C ldr r1, [r4, #76] + 14799 .LVL1117: +5022:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** I2C_RELOAD_MODE, I2C_NO_STARTSTOP); + 14800 .loc 1 5022 9 view .LVU4907 + 14801 00d4 7F3B subs r3, r3, #127 + 14802 00d6 89B2 uxth r1, r1 + 14803 00d8 0022 movs r2, #0 + 14804 00da 0092 str r2, [sp] + 14805 00dc 5B04 lsls r3, r3, #17 + 14806 00de FF32 adds r2, r2, #255 + 14807 00e0 2000 movs r0, r4 + 14808 .LVL1118: +5022:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** I2C_RELOAD_MODE, I2C_NO_STARTSTOP); + 14809 .loc 1 5022 9 view .LVU4908 + 14810 00e2 FFF7FEFF bl I2C_TransferConfig + 14811 .LVL1119: + 14812 00e6 B1E7 b .L893 + 14813 .LVL1120: + 14814 .L899: +5027:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** I2C_TransferConfig(hi2c, (uint16_t)hi2c->Devaddress, (uint8_t)hi2c->XferSize, + 14815 .loc 1 5027 9 is_stmt 1 view .LVU4909 +5027:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** I2C_TransferConfig(hi2c, (uint16_t)hi2c->Devaddress, (uint8_t)hi2c->XferSize, + 14816 .loc 1 5027 30 is_stmt 0 view .LVU4910 + 14817 00e8 628D ldrh r2, [r4, #42] + 14818 00ea 92B2 uxth r2, r2 +5027:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** I2C_TransferConfig(hi2c, (uint16_t)hi2c->Devaddress, (uint8_t)hi2c->XferSize, + 14819 .loc 1 5027 24 view .LVU4911 + ARM GAS /tmp/ccuRhBPx.s page 470 + + + 14820 00ec 2285 strh r2, [r4, #40] +5028:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** I2C_AUTOEND_MODE, I2C_NO_STARTSTOP); + 14821 .loc 1 5028 9 is_stmt 1 view .LVU4912 +5028:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** I2C_AUTOEND_MODE, I2C_NO_STARTSTOP); + 14822 .loc 1 5028 48 is_stmt 0 view .LVU4913 + 14823 00ee E16C ldr r1, [r4, #76] + 14824 .LVL1121: +5028:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** I2C_AUTOEND_MODE, I2C_NO_STARTSTOP); + 14825 .loc 1 5028 9 view .LVU4914 + 14826 00f0 8023 movs r3, #128 + 14827 00f2 D2B2 uxtb r2, r2 + 14828 00f4 89B2 uxth r1, r1 + 14829 00f6 0020 movs r0, #0 + 14830 .LVL1122: +5028:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** I2C_AUTOEND_MODE, I2C_NO_STARTSTOP); + 14831 .loc 1 5028 9 view .LVU4915 + 14832 00f8 0090 str r0, [sp] + 14833 00fa 9B04 lsls r3, r3, #18 + 14834 00fc 2000 movs r0, r4 + 14835 00fe FFF7FEFF bl I2C_TransferConfig + 14836 .LVL1123: + 14837 0102 A3E7 b .L893 + 14838 .LVL1124: + 14839 .L898: +5036:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } + 14840 .loc 1 5036 7 is_stmt 1 view .LVU4916 + 14841 0104 4021 movs r1, #64 + 14842 .LVL1125: +5036:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } + 14843 .loc 1 5036 7 is_stmt 0 view .LVU4917 + 14844 0106 2000 movs r0, r4 + 14845 .LVL1126: +5036:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } + 14846 .loc 1 5036 7 view .LVU4918 + 14847 0108 FFF7FEFF bl I2C_ITError + 14848 .LVL1127: + 14849 010c 9EE7 b .L893 + 14850 .LVL1128: + 14851 .L897: +5039:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** (I2C_CHECK_IT_SOURCE(ITSources, I2C_IT_TCI) != RESET)) + 14852 .loc 1 5039 8 is_stmt 1 view .LVU4919 +5039:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** (I2C_CHECK_IT_SOURCE(ITSources, I2C_IT_TCI) != RESET)) + 14853 .loc 1 5039 11 is_stmt 0 view .LVU4920 + 14854 010e 6B06 lsls r3, r5, #25 + 14855 0110 9CD5 bpl .L893 +5039:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** (I2C_CHECK_IT_SOURCE(ITSources, I2C_IT_TCI) != RESET)) + 14856 .loc 1 5039 63 discriminator 1 view .LVU4921 + 14857 0112 7306 lsls r3, r6, #25 + 14858 0114 00D4 bmi .LCB13968 + 14859 0116 99E7 b .L893 @long jump + 14860 .LCB13968: +5042:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { + 14861 .loc 1 5042 5 is_stmt 1 view .LVU4922 +5042:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { + 14862 .loc 1 5042 13 is_stmt 0 view .LVU4923 + 14863 0118 4123 movs r3, #65 + 14864 011a E35C ldrb r3, [r4, r3] + ARM GAS /tmp/ccuRhBPx.s page 471 + + +5042:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { + 14865 .loc 1 5042 8 view .LVU4924 + 14866 011c 222B cmp r3, #34 + 14867 011e 10D0 beq .L904 +4956:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** uint32_t tmpITFlags = ITFlags; + 14868 .loc 1 4956 12 view .LVU4925 + 14869 0120 1348 ldr r0, .L919 + 14870 .LVL1129: + 14871 .L900: +5047:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { + 14872 .loc 1 5047 5 is_stmt 1 view .LVU4926 +5047:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { + 14873 .loc 1 5047 13 is_stmt 0 view .LVU4927 + 14874 0122 638D ldrh r3, [r4, #42] + 14875 0124 9BB2 uxth r3, r3 +5047:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { + 14876 .loc 1 5047 8 view .LVU4928 + 14877 0126 FF2B cmp r3, #255 + 14878 0128 0DD9 bls .L901 +5049:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 14879 .loc 1 5049 7 is_stmt 1 view .LVU4929 +5049:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 14880 .loc 1 5049 22 is_stmt 0 view .LVU4930 + 14881 012a FF23 movs r3, #255 + 14882 012c 2385 strh r3, [r4, #40] +5052:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** I2C_RELOAD_MODE, direction); + 14883 .loc 1 5052 7 is_stmt 1 view .LVU4931 +5052:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** I2C_RELOAD_MODE, direction); + 14884 .loc 1 5052 46 is_stmt 0 view .LVU4932 + 14885 012e E16C ldr r1, [r4, #76] + 14886 .LVL1130: +5052:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** I2C_RELOAD_MODE, direction); + 14887 .loc 1 5052 7 view .LVU4933 + 14888 0130 7F3B subs r3, r3, #127 + 14889 0132 89B2 uxth r1, r1 + 14890 0134 0090 str r0, [sp] + 14891 0136 5B04 lsls r3, r3, #17 + 14892 0138 FF22 movs r2, #255 + 14893 013a 2000 movs r0, r4 + 14894 .LVL1131: +5052:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** I2C_RELOAD_MODE, direction); + 14895 .loc 1 5052 7 view .LVU4934 + 14896 013c FFF7FEFF bl I2C_TransferConfig + 14897 .LVL1132: +5052:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** I2C_RELOAD_MODE, direction); + 14898 .loc 1 5052 7 view .LVU4935 + 14899 0140 84E7 b .L893 + 14900 .LVL1133: + 14901 .L904: +5044:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } + 14902 .loc 1 5044 17 view .LVU4936 + 14903 0142 0C48 ldr r0, .L919+4 + 14904 .LVL1134: +5044:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } + 14905 .loc 1 5044 17 view .LVU4937 + 14906 0144 EDE7 b .L900 + 14907 .LVL1135: + ARM GAS /tmp/ccuRhBPx.s page 472 + + + 14908 .L901: +5057:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 14909 .loc 1 5057 7 is_stmt 1 view .LVU4938 +5057:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 14910 .loc 1 5057 28 is_stmt 0 view .LVU4939 + 14911 0146 628D ldrh r2, [r4, #42] + 14912 0148 92B2 uxth r2, r2 +5057:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 14913 .loc 1 5057 22 view .LVU4940 + 14914 014a 2285 strh r2, [r4, #40] +5060:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** I2C_AUTOEND_MODE, direction); + 14915 .loc 1 5060 7 is_stmt 1 view .LVU4941 +5060:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** I2C_AUTOEND_MODE, direction); + 14916 .loc 1 5060 46 is_stmt 0 view .LVU4942 + 14917 014c E16C ldr r1, [r4, #76] + 14918 .LVL1136: +5060:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** I2C_AUTOEND_MODE, direction); + 14919 .loc 1 5060 7 view .LVU4943 + 14920 014e 8023 movs r3, #128 + 14921 0150 D2B2 uxtb r2, r2 + 14922 0152 89B2 uxth r1, r1 + 14923 0154 0090 str r0, [sp] + 14924 0156 9B04 lsls r3, r3, #18 + 14925 0158 2000 movs r0, r4 + 14926 .LVL1137: +5060:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** I2C_AUTOEND_MODE, direction); + 14927 .loc 1 5060 7 view .LVU4944 + 14928 015a FFF7FEFF bl I2C_TransferConfig + 14929 .LVL1138: +5060:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** I2C_AUTOEND_MODE, direction); + 14930 .loc 1 5060 7 view .LVU4945 + 14931 015e 75E7 b .L893 + 14932 .LVL1139: + 14933 .L917: +5073:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } + 14934 .loc 1 5073 5 is_stmt 1 view .LVU4946 + 14935 0160 2900 movs r1, r5 + 14936 0162 2000 movs r0, r4 + 14937 0164 FFF7FEFF bl I2C_ITMasterCplt + 14938 .LVL1140: + 14939 0168 75E7 b .L902 + 14940 .LVL1141: + 14941 .L903: +4960:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 14942 .loc 1 4960 3 is_stmt 0 discriminator 1 view .LVU4947 + 14943 016a 0220 movs r0, #2 + 14944 .LVL1142: +4960:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 14945 .loc 1 4960 3 discriminator 1 view .LVU4948 + 14946 016c 77E7 b .L891 + 14947 .L920: + 14948 016e C046 .align 2 + 14949 .L919: + 14950 0170 00200080 .word -2147475456 + 14951 0174 00240080 .word -2147474432 + 14952 .cfi_endproc + 14953 .LFE90: + ARM GAS /tmp/ccuRhBPx.s page 473 + + + 14955 .section .text.HAL_I2C_ER_IRQHandler,"ax",%progbits + 14956 .align 1 + 14957 .global HAL_I2C_ER_IRQHandler + 14958 .syntax unified + 14959 .code 16 + 14960 .thumb_func + 14962 HAL_I2C_ER_IRQHandler: + 14963 .LVL1143: + 14964 .LFB75: +4526:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** uint32_t itflags = READ_REG(hi2c->Instance->ISR); + 14965 .loc 1 4526 1 is_stmt 1 view -0 + 14966 .cfi_startproc + 14967 @ args = 0, pretend = 0, frame = 0 + 14968 @ frame_needed = 0, uses_anonymous_args = 0 +4526:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** uint32_t itflags = READ_REG(hi2c->Instance->ISR); + 14969 .loc 1 4526 1 is_stmt 0 view .LVU4950 + 14970 0000 70B5 push {r4, r5, r6, lr} + 14971 .cfi_def_cfa_offset 16 + 14972 .cfi_offset 4, -16 + 14973 .cfi_offset 5, -12 + 14974 .cfi_offset 6, -8 + 14975 .cfi_offset 14, -4 +4527:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** uint32_t itsources = READ_REG(hi2c->Instance->CR1); + 14976 .loc 1 4527 3 is_stmt 1 view .LVU4951 +4527:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** uint32_t itsources = READ_REG(hi2c->Instance->CR1); + 14977 .loc 1 4527 24 is_stmt 0 view .LVU4952 + 14978 0002 0268 ldr r2, [r0] +4527:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** uint32_t itsources = READ_REG(hi2c->Instance->CR1); + 14979 .loc 1 4527 12 view .LVU4953 + 14980 0004 9369 ldr r3, [r2, #24] + 14981 .LVL1144: +4528:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** uint32_t tmperror; + 14982 .loc 1 4528 3 is_stmt 1 view .LVU4954 +4528:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** uint32_t tmperror; + 14983 .loc 1 4528 12 is_stmt 0 view .LVU4955 + 14984 0006 1168 ldr r1, [r2] + 14985 .LVL1145: +4529:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 14986 .loc 1 4529 3 is_stmt 1 view .LVU4956 +4532:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** (I2C_CHECK_IT_SOURCE(itsources, I2C_IT_ERRI) != RESET)) + 14987 .loc 1 4532 3 view .LVU4957 +4532:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** (I2C_CHECK_IT_SOURCE(itsources, I2C_IT_ERRI) != RESET)) + 14988 .loc 1 4532 6 is_stmt 0 view .LVU4958 + 14989 0008 DC05 lsls r4, r3, #23 + 14990 000a 08D5 bpl .L922 +4532:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** (I2C_CHECK_IT_SOURCE(itsources, I2C_IT_ERRI) != RESET)) + 14991 .loc 1 4532 57 discriminator 1 view .LVU4959 + 14992 000c 0C06 lsls r4, r1, #24 + 14993 000e 06D5 bpl .L922 +4535:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 14994 .loc 1 4535 5 is_stmt 1 view .LVU4960 +4535:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 14995 .loc 1 4535 9 is_stmt 0 view .LVU4961 + 14996 0010 446C ldr r4, [r0, #68] +4535:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 14997 .loc 1 4535 21 view .LVU4962 + 14998 0012 0125 movs r5, #1 + ARM GAS /tmp/ccuRhBPx.s page 474 + + + 14999 0014 2C43 orrs r4, r5 + 15000 0016 4464 str r4, [r0, #68] +4538:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } + 15001 .loc 1 4538 5 is_stmt 1 view .LVU4963 + 15002 0018 8024 movs r4, #128 + 15003 001a 6400 lsls r4, r4, #1 + 15004 001c D461 str r4, [r2, #28] + 15005 .L922: +4542:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** (I2C_CHECK_IT_SOURCE(itsources, I2C_IT_ERRI) != RESET)) + 15006 .loc 1 4542 3 view .LVU4964 +4542:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** (I2C_CHECK_IT_SOURCE(itsources, I2C_IT_ERRI) != RESET)) + 15007 .loc 1 4542 6 is_stmt 0 view .LVU4965 + 15008 001e 5A05 lsls r2, r3, #21 + 15009 0020 09D5 bpl .L923 +4542:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** (I2C_CHECK_IT_SOURCE(itsources, I2C_IT_ERRI) != RESET)) + 15010 .loc 1 4542 56 discriminator 1 view .LVU4966 + 15011 0022 0A06 lsls r2, r1, #24 + 15012 0024 07D5 bpl .L923 +4545:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 15013 .loc 1 4545 5 is_stmt 1 view .LVU4967 +4545:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 15014 .loc 1 4545 9 is_stmt 0 view .LVU4968 + 15015 0026 426C ldr r2, [r0, #68] +4545:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 15016 .loc 1 4545 21 view .LVU4969 + 15017 0028 0824 movs r4, #8 + 15018 002a 2243 orrs r2, r4 + 15019 002c 4264 str r2, [r0, #68] +4548:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } + 15020 .loc 1 4548 5 is_stmt 1 view .LVU4970 + 15021 002e 0268 ldr r2, [r0] + 15022 0030 8024 movs r4, #128 + 15023 0032 E400 lsls r4, r4, #3 + 15024 0034 D461 str r4, [r2, #28] + 15025 .L923: +4552:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** (I2C_CHECK_IT_SOURCE(itsources, I2C_IT_ERRI) != RESET)) + 15026 .loc 1 4552 3 view .LVU4971 +4552:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** (I2C_CHECK_IT_SOURCE(itsources, I2C_IT_ERRI) != RESET)) + 15027 .loc 1 4552 6 is_stmt 0 view .LVU4972 + 15028 0036 9B05 lsls r3, r3, #22 + 15029 0038 09D5 bpl .L924 + 15030 .LVL1146: +4552:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** (I2C_CHECK_IT_SOURCE(itsources, I2C_IT_ERRI) != RESET)) + 15031 .loc 1 4552 57 discriminator 1 view .LVU4973 + 15032 003a 0906 lsls r1, r1, #24 + 15033 003c 07D5 bpl .L924 + 15034 .LVL1147: +4555:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 15035 .loc 1 4555 5 is_stmt 1 view .LVU4974 +4555:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 15036 .loc 1 4555 9 is_stmt 0 view .LVU4975 + 15037 003e 436C ldr r3, [r0, #68] +4555:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 15038 .loc 1 4555 21 view .LVU4976 + 15039 0040 0222 movs r2, #2 + 15040 0042 1343 orrs r3, r2 + 15041 0044 4364 str r3, [r0, #68] + ARM GAS /tmp/ccuRhBPx.s page 475 + + +4558:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } + 15042 .loc 1 4558 5 is_stmt 1 view .LVU4977 + 15043 0046 0368 ldr r3, [r0] + 15044 0048 FF32 adds r2, r2, #255 + 15045 004a FF32 adds r2, r2, #255 + 15046 004c DA61 str r2, [r3, #28] + 15047 .L924: +4562:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 15048 .loc 1 4562 3 view .LVU4978 +4562:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 15049 .loc 1 4562 12 is_stmt 0 view .LVU4979 + 15050 004e 416C ldr r1, [r0, #68] + 15051 .LVL1148: +4565:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { + 15052 .loc 1 4565 3 is_stmt 1 view .LVU4980 +4565:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { + 15053 .loc 1 4565 17 is_stmt 0 view .LVU4981 + 15054 0050 0B23 movs r3, #11 +4565:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { + 15055 .loc 1 4565 6 view .LVU4982 + 15056 0052 0B42 tst r3, r1 + 15057 0054 00D1 bne .L932 + 15058 .LVL1149: + 15059 .L921: +4569:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 15060 .loc 1 4569 1 view .LVU4983 + 15061 @ sp needed + 15062 0056 70BD pop {r4, r5, r6, pc} + 15063 .LVL1150: + 15064 .L932: +4567:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } + 15065 .loc 1 4567 5 is_stmt 1 view .LVU4984 + 15066 0058 FFF7FEFF bl I2C_ITError + 15067 .LVL1151: +4569:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 15068 .loc 1 4569 1 is_stmt 0 view .LVU4985 + 15069 005c FBE7 b .L921 + 15070 .cfi_endproc + 15071 .LFE75: + 15073 .section .text.I2C_DMAAbort,"ax",%progbits + 15074 .align 1 + 15075 .syntax unified + 15076 .code 16 + 15077 .thumb_func + 15079 I2C_DMAAbort: + 15080 .LVL1152: + 15081 .LFB111: +6704:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* Derogation MISRAC2012-Rule-11.5 */ + 15082 .loc 1 6704 1 is_stmt 1 view -0 + 15083 .cfi_startproc + 15084 @ args = 0, pretend = 0, frame = 0 + 15085 @ frame_needed = 0, uses_anonymous_args = 0 +6704:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* Derogation MISRAC2012-Rule-11.5 */ + 15086 .loc 1 6704 1 is_stmt 0 view .LVU4987 + 15087 0000 10B5 push {r4, lr} + 15088 .cfi_def_cfa_offset 8 + 15089 .cfi_offset 4, -8 + ARM GAS /tmp/ccuRhBPx.s page 476 + + + 15090 .cfi_offset 14, -4 +6706:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 15091 .loc 1 6706 3 is_stmt 1 view .LVU4988 +6706:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 15092 .loc 1 6706 22 is_stmt 0 view .LVU4989 + 15093 0002 406A ldr r0, [r0, #36] + 15094 .LVL1153: +6709:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { + 15095 .loc 1 6709 3 is_stmt 1 view .LVU4990 +6709:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { + 15096 .loc 1 6709 11 is_stmt 0 view .LVU4991 + 15097 0004 836B ldr r3, [r0, #56] +6709:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { + 15098 .loc 1 6709 6 view .LVU4992 + 15099 0006 002B cmp r3, #0 + 15100 0008 01D0 beq .L934 +6711:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } + 15101 .loc 1 6711 5 is_stmt 1 view .LVU4993 +6711:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } + 15102 .loc 1 6711 37 is_stmt 0 view .LVU4994 + 15103 000a 0022 movs r2, #0 + 15104 000c 5A63 str r2, [r3, #52] + 15105 .L934: +6713:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { + 15106 .loc 1 6713 3 is_stmt 1 view .LVU4995 +6713:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { + 15107 .loc 1 6713 11 is_stmt 0 view .LVU4996 + 15108 000e C36B ldr r3, [r0, #60] +6713:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { + 15109 .loc 1 6713 6 view .LVU4997 + 15110 0010 002B cmp r3, #0 + 15111 0012 01D0 beq .L935 +6715:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } + 15112 .loc 1 6715 5 is_stmt 1 view .LVU4998 +6715:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } + 15113 .loc 1 6715 37 is_stmt 0 view .LVU4999 + 15114 0014 0022 movs r2, #0 + 15115 0016 5A63 str r2, [r3, #52] + 15116 .L935: +6718:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } + 15117 .loc 1 6718 3 is_stmt 1 view .LVU5000 + 15118 0018 FFF7FEFF bl I2C_TreatErrorCallback + 15119 .LVL1154: +6719:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 15120 .loc 1 6719 1 is_stmt 0 view .LVU5001 + 15121 @ sp needed + 15122 001c 10BD pop {r4, pc} + 15123 .cfi_endproc + 15124 .LFE111: + 15126 .section .text.HAL_I2C_GetState,"ax",%progbits + 15127 .align 1 + 15128 .global HAL_I2C_GetState + 15129 .syntax unified + 15130 .code 16 + 15131 .thumb_func + 15133 HAL_I2C_GetState: + 15134 .LVL1155: + ARM GAS /tmp/ccuRhBPx.s page 477 + + + 15135 .LFB86: +4760:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* Return I2C handle state */ + 15136 .loc 1 4760 1 is_stmt 1 view -0 + 15137 .cfi_startproc + 15138 @ args = 0, pretend = 0, frame = 0 + 15139 @ frame_needed = 0, uses_anonymous_args = 0 + 15140 @ link register save eliminated. +4762:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } + 15141 .loc 1 4762 3 view .LVU5003 +4762:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } + 15142 .loc 1 4762 14 is_stmt 0 view .LVU5004 + 15143 0000 4123 movs r3, #65 + 15144 0002 C05C ldrb r0, [r0, r3] + 15145 .LVL1156: +4762:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } + 15146 .loc 1 4762 14 view .LVU5005 + 15147 0004 C0B2 uxtb r0, r0 +4763:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 15148 .loc 1 4763 1 view .LVU5006 + 15149 @ sp needed + 15150 0006 7047 bx lr + 15151 .cfi_endproc + 15152 .LFE86: + 15154 .section .text.HAL_I2C_GetMode,"ax",%progbits + 15155 .align 1 + 15156 .global HAL_I2C_GetMode + 15157 .syntax unified + 15158 .code 16 + 15159 .thumb_func + 15161 HAL_I2C_GetMode: + 15162 .LVL1157: + 15163 .LFB87: +4772:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** return hi2c->Mode; + 15164 .loc 1 4772 1 is_stmt 1 view -0 + 15165 .cfi_startproc + 15166 @ args = 0, pretend = 0, frame = 0 + 15167 @ frame_needed = 0, uses_anonymous_args = 0 + 15168 @ link register save eliminated. +4773:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } + 15169 .loc 1 4773 3 view .LVU5008 +4773:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } + 15170 .loc 1 4773 14 is_stmt 0 view .LVU5009 + 15171 0000 4223 movs r3, #66 + 15172 0002 C05C ldrb r0, [r0, r3] + 15173 .LVL1158: +4773:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } + 15174 .loc 1 4773 14 view .LVU5010 + 15175 0004 C0B2 uxtb r0, r0 +4774:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 15176 .loc 1 4774 1 view .LVU5011 + 15177 @ sp needed + 15178 0006 7047 bx lr + 15179 .cfi_endproc + 15180 .LFE87: + 15182 .section .text.HAL_I2C_GetError,"ax",%progbits + 15183 .align 1 + 15184 .global HAL_I2C_GetError + ARM GAS /tmp/ccuRhBPx.s page 478 + + + 15185 .syntax unified + 15186 .code 16 + 15187 .thumb_func + 15189 HAL_I2C_GetError: + 15190 .LVL1159: + 15191 .LFB88: +4783:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** return hi2c->ErrorCode; + 15192 .loc 1 4783 1 is_stmt 1 view -0 + 15193 .cfi_startproc + 15194 @ args = 0, pretend = 0, frame = 0 + 15195 @ frame_needed = 0, uses_anonymous_args = 0 + 15196 @ link register save eliminated. +4784:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } + 15197 .loc 1 4784 3 view .LVU5013 +4784:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } + 15198 .loc 1 4784 14 is_stmt 0 view .LVU5014 + 15199 0000 406C ldr r0, [r0, #68] + 15200 .LVL1160: +4785:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 15201 .loc 1 4785 1 view .LVU5015 + 15202 @ sp needed + 15203 0002 7047 bx lr + 15204 .cfi_endproc + 15205 .LFE88: + 15207 .text + 15208 .Letext0: + 15209 .file 2 "/home/chiangni/.config/VSCodium/User/globalStorage/bmd.stm32-for-vscode/@xpack-dev-tools/ + 15210 .file 3 "/home/chiangni/.config/VSCodium/User/globalStorage/bmd.stm32-for-vscode/@xpack-dev-tools/ + 15211 .file 4 "Drivers/CMSIS/Device/ST/STM32F0xx/Include/stm32f042x6.h" + 15212 .file 5 "Drivers/CMSIS/Device/ST/STM32F0xx/Include/stm32f0xx.h" + 15213 .file 6 "Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_def.h" + 15214 .file 7 "Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_dma.h" + 15215 .file 8 "Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_i2c.h" + 15216 .file 9 "Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal.h" + ARM GAS /tmp/ccuRhBPx.s page 479 + + +DEFINED SYMBOLS + *ABS*:00000000 stm32f0xx_hal_i2c.c + /tmp/ccuRhBPx.s:19 .text.I2C_Flush_TXDR:00000000 $t + /tmp/ccuRhBPx.s:24 .text.I2C_Flush_TXDR:00000000 I2C_Flush_TXDR + /tmp/ccuRhBPx.s:64 .text.I2C_TransferConfig:00000000 $t + /tmp/ccuRhBPx.s:69 .text.I2C_TransferConfig:00000000 I2C_TransferConfig + /tmp/ccuRhBPx.s:127 .text.I2C_TransferConfig:00000030 $d + /tmp/ccuRhBPx.s:132 .text.I2C_Enable_IRQ:00000000 $t + /tmp/ccuRhBPx.s:137 .text.I2C_Enable_IRQ:00000000 I2C_Enable_IRQ + /tmp/ccuRhBPx.s:322 .text.I2C_Enable_IRQ:00000090 $d + /tmp/ccuRhBPx.s:13962 .text.I2C_Master_ISR_DMA:00000000 I2C_Master_ISR_DMA + /tmp/ccuRhBPx.s:13641 .text.I2C_Slave_ISR_DMA:00000000 I2C_Slave_ISR_DMA + /tmp/ccuRhBPx.s:13252 .text.I2C_Mem_ISR_DMA:00000000 I2C_Mem_ISR_DMA + /tmp/ccuRhBPx.s:329 .text.I2C_Disable_IRQ:00000000 $t + /tmp/ccuRhBPx.s:334 .text.I2C_Disable_IRQ:00000000 I2C_Disable_IRQ + /tmp/ccuRhBPx.s:475 .text.I2C_ConvertOtherXferOptions:00000000 $t + /tmp/ccuRhBPx.s:480 .text.I2C_ConvertOtherXferOptions:00000000 I2C_ConvertOtherXferOptions + /tmp/ccuRhBPx.s:525 .text.I2C_IsErrorOccurred:00000000 $t + /tmp/ccuRhBPx.s:530 .text.I2C_IsErrorOccurred:00000000 I2C_IsErrorOccurred + /tmp/ccuRhBPx.s:847 .text.I2C_IsErrorOccurred:00000114 $d + /tmp/ccuRhBPx.s:852 .text.I2C_WaitOnTXISFlagUntilTimeout:00000000 $t + /tmp/ccuRhBPx.s:857 .text.I2C_WaitOnTXISFlagUntilTimeout:00000000 I2C_WaitOnTXISFlagUntilTimeout + /tmp/ccuRhBPx.s:963 .text.I2C_WaitOnFlagUntilTimeout:00000000 $t + /tmp/ccuRhBPx.s:968 .text.I2C_WaitOnFlagUntilTimeout:00000000 I2C_WaitOnFlagUntilTimeout + /tmp/ccuRhBPx.s:1084 .text.I2C_RequestMemoryWrite:00000000 $t + /tmp/ccuRhBPx.s:1089 .text.I2C_RequestMemoryWrite:00000000 I2C_RequestMemoryWrite + /tmp/ccuRhBPx.s:1209 .text.I2C_RequestMemoryWrite:00000074 $d + /tmp/ccuRhBPx.s:1214 .text.I2C_RequestMemoryRead:00000000 $t + /tmp/ccuRhBPx.s:1219 .text.I2C_RequestMemoryRead:00000000 I2C_RequestMemoryRead + /tmp/ccuRhBPx.s:1335 .text.I2C_RequestMemoryRead:00000070 $d + /tmp/ccuRhBPx.s:1340 .text.I2C_WaitOnSTOPFlagUntilTimeout:00000000 $t + /tmp/ccuRhBPx.s:1345 .text.I2C_WaitOnSTOPFlagUntilTimeout:00000000 I2C_WaitOnSTOPFlagUntilTimeout + /tmp/ccuRhBPx.s:1451 .text.I2C_WaitOnRXNEFlagUntilTimeout:00000000 $t + /tmp/ccuRhBPx.s:1456 .text.I2C_WaitOnRXNEFlagUntilTimeout:00000000 I2C_WaitOnRXNEFlagUntilTimeout + /tmp/ccuRhBPx.s:1625 .text.I2C_WaitOnRXNEFlagUntilTimeout:000000a0 $d + /tmp/ccuRhBPx.s:1630 .text.HAL_I2C_MspInit:00000000 $t + /tmp/ccuRhBPx.s:1636 .text.HAL_I2C_MspInit:00000000 HAL_I2C_MspInit + /tmp/ccuRhBPx.s:1652 .text.HAL_I2C_Init:00000000 $t + /tmp/ccuRhBPx.s:1658 .text.HAL_I2C_Init:00000000 HAL_I2C_Init + /tmp/ccuRhBPx.s:1867 .text.HAL_I2C_Init:000000c0 $d + /tmp/ccuRhBPx.s:1874 .text.HAL_I2C_MspDeInit:00000000 $t + /tmp/ccuRhBPx.s:1880 .text.HAL_I2C_MspDeInit:00000000 HAL_I2C_MspDeInit + /tmp/ccuRhBPx.s:1896 .text.HAL_I2C_DeInit:00000000 $t + /tmp/ccuRhBPx.s:1902 .text.HAL_I2C_DeInit:00000000 HAL_I2C_DeInit + /tmp/ccuRhBPx.s:1974 .text.HAL_I2C_Master_Transmit:00000000 $t + /tmp/ccuRhBPx.s:1980 .text.HAL_I2C_Master_Transmit:00000000 HAL_I2C_Master_Transmit + /tmp/ccuRhBPx.s:2304 .text.HAL_I2C_Master_Transmit:0000016c $d + /tmp/ccuRhBPx.s:2310 .text.HAL_I2C_Master_Receive:00000000 $t + /tmp/ccuRhBPx.s:2316 .text.HAL_I2C_Master_Receive:00000000 HAL_I2C_Master_Receive + /tmp/ccuRhBPx.s:2640 .text.HAL_I2C_Master_Receive:0000016c $d + /tmp/ccuRhBPx.s:2646 .text.HAL_I2C_Slave_Transmit:00000000 $t + /tmp/ccuRhBPx.s:2652 .text.HAL_I2C_Slave_Transmit:00000000 HAL_I2C_Slave_Transmit + /tmp/ccuRhBPx.s:3104 .text.HAL_I2C_Slave_Transmit:000001e4 $d + /tmp/ccuRhBPx.s:3109 .text.HAL_I2C_Slave_Receive:00000000 $t + /tmp/ccuRhBPx.s:3115 .text.HAL_I2C_Slave_Receive:00000000 HAL_I2C_Slave_Receive + /tmp/ccuRhBPx.s:3501 .text.HAL_I2C_Slave_Receive:0000018c $d + /tmp/ccuRhBPx.s:3506 .text.HAL_I2C_Master_Transmit_IT:00000000 $t + ARM GAS /tmp/ccuRhBPx.s page 480 + + + /tmp/ccuRhBPx.s:3512 .text.HAL_I2C_Master_Transmit_IT:00000000 HAL_I2C_Master_Transmit_IT + /tmp/ccuRhBPx.s:3669 .text.HAL_I2C_Master_Transmit_IT:00000088 $d + /tmp/ccuRhBPx.s:12860 .text.I2C_Master_ISR_IT:00000000 I2C_Master_ISR_IT + /tmp/ccuRhBPx.s:3676 .text.HAL_I2C_Master_Receive_IT:00000000 $t + /tmp/ccuRhBPx.s:3682 .text.HAL_I2C_Master_Receive_IT:00000000 HAL_I2C_Master_Receive_IT + /tmp/ccuRhBPx.s:3839 .text.HAL_I2C_Master_Receive_IT:00000088 $d + /tmp/ccuRhBPx.s:3846 .text.HAL_I2C_Slave_Transmit_IT:00000000 $t + /tmp/ccuRhBPx.s:3852 .text.HAL_I2C_Slave_Transmit_IT:00000000 HAL_I2C_Slave_Transmit_IT + /tmp/ccuRhBPx.s:4001 .text.HAL_I2C_Slave_Transmit_IT:00000080 $d + /tmp/ccuRhBPx.s:12240 .text.I2C_Slave_ISR_IT:00000000 I2C_Slave_ISR_IT + /tmp/ccuRhBPx.s:4009 .text.HAL_I2C_Slave_Receive_IT:00000000 $t + /tmp/ccuRhBPx.s:4015 .text.HAL_I2C_Slave_Receive_IT:00000000 HAL_I2C_Slave_Receive_IT + /tmp/ccuRhBPx.s:4125 .text.HAL_I2C_Slave_Receive_IT:00000058 $d + /tmp/ccuRhBPx.s:4133 .text.HAL_I2C_Master_Transmit_DMA:00000000 $t + /tmp/ccuRhBPx.s:4139 .text.HAL_I2C_Master_Transmit_DMA:00000000 HAL_I2C_Master_Transmit_DMA + /tmp/ccuRhBPx.s:4479 .text.HAL_I2C_Master_Transmit_DMA:0000013c $d + /tmp/ccuRhBPx.s:14333 .text.I2C_DMAMasterTransmitCplt:00000000 I2C_DMAMasterTransmitCplt + /tmp/ccuRhBPx.s:14291 .text.I2C_DMAError:00000000 I2C_DMAError + /tmp/ccuRhBPx.s:4489 .text.HAL_I2C_Master_Receive_DMA:00000000 $t + /tmp/ccuRhBPx.s:4495 .text.HAL_I2C_Master_Receive_DMA:00000000 HAL_I2C_Master_Receive_DMA + /tmp/ccuRhBPx.s:4832 .text.HAL_I2C_Master_Receive_DMA:00000138 $d + /tmp/ccuRhBPx.s:14452 .text.I2C_DMAMasterReceiveCplt:00000000 I2C_DMAMasterReceiveCplt + /tmp/ccuRhBPx.s:4842 .text.HAL_I2C_Slave_Transmit_DMA:00000000 $t + /tmp/ccuRhBPx.s:4848 .text.HAL_I2C_Slave_Transmit_DMA:00000000 HAL_I2C_Slave_Transmit_DMA + /tmp/ccuRhBPx.s:5174 .text.HAL_I2C_Slave_Transmit_DMA:00000130 $d + /tmp/ccuRhBPx.s:10947 .text.I2C_DMASlaveTransmitCplt:00000000 I2C_DMASlaveTransmitCplt + /tmp/ccuRhBPx.s:5183 .text.HAL_I2C_Slave_Receive_DMA:00000000 $t + /tmp/ccuRhBPx.s:5189 .text.HAL_I2C_Slave_Receive_DMA:00000000 HAL_I2C_Slave_Receive_DMA + /tmp/ccuRhBPx.s:5440 .text.HAL_I2C_Slave_Receive_DMA:000000e4 $d + /tmp/ccuRhBPx.s:11007 .text.I2C_DMASlaveReceiveCplt:00000000 I2C_DMASlaveReceiveCplt + /tmp/ccuRhBPx.s:5449 .text.HAL_I2C_Mem_Write:00000000 $t + /tmp/ccuRhBPx.s:5455 .text.HAL_I2C_Mem_Write:00000000 HAL_I2C_Mem_Write + /tmp/ccuRhBPx.s:5829 .text.HAL_I2C_Mem_Write:0000019c $d + /tmp/ccuRhBPx.s:5834 .text.HAL_I2C_Mem_Read:00000000 $t + /tmp/ccuRhBPx.s:5840 .text.HAL_I2C_Mem_Read:00000000 HAL_I2C_Mem_Read + /tmp/ccuRhBPx.s:6216 .text.HAL_I2C_Mem_Read:000001a0 $d + /tmp/ccuRhBPx.s:6222 .text.HAL_I2C_Mem_Write_IT:00000000 $t + /tmp/ccuRhBPx.s:6228 .text.HAL_I2C_Mem_Write_IT:00000000 HAL_I2C_Mem_Write_IT + /tmp/ccuRhBPx.s:6433 .text.HAL_I2C_Mem_Write_IT:000000c4 $d + /tmp/ccuRhBPx.s:14571 .text.I2C_Mem_ISR_IT:00000000 I2C_Mem_ISR_IT + /tmp/ccuRhBPx.s:6440 .text.HAL_I2C_Mem_Read_IT:00000000 $t + /tmp/ccuRhBPx.s:6446 .text.HAL_I2C_Mem_Read_IT:00000000 HAL_I2C_Mem_Read_IT + /tmp/ccuRhBPx.s:6650 .text.HAL_I2C_Mem_Read_IT:000000c4 $d + /tmp/ccuRhBPx.s:6657 .text.HAL_I2C_Mem_Write_DMA:00000000 $t + /tmp/ccuRhBPx.s:6663 .text.HAL_I2C_Mem_Write_DMA:00000000 HAL_I2C_Mem_Write_DMA + /tmp/ccuRhBPx.s:6995 .text.HAL_I2C_Mem_Write_DMA:00000144 $d + /tmp/ccuRhBPx.s:7004 .text.HAL_I2C_Mem_Read_DMA:00000000 $t + /tmp/ccuRhBPx.s:7010 .text.HAL_I2C_Mem_Read_DMA:00000000 HAL_I2C_Mem_Read_DMA + /tmp/ccuRhBPx.s:7342 .text.HAL_I2C_Mem_Read_DMA:00000144 $d + /tmp/ccuRhBPx.s:7351 .text.HAL_I2C_IsDeviceReady:00000000 $t + /tmp/ccuRhBPx.s:7357 .text.HAL_I2C_IsDeviceReady:00000000 HAL_I2C_IsDeviceReady + /tmp/ccuRhBPx.s:7733 .text.HAL_I2C_IsDeviceReady:00000184 $d + /tmp/ccuRhBPx.s:7739 .text.HAL_I2C_Master_Seq_Transmit_IT:00000000 $t + /tmp/ccuRhBPx.s:7745 .text.HAL_I2C_Master_Seq_Transmit_IT:00000000 HAL_I2C_Master_Seq_Transmit_IT + /tmp/ccuRhBPx.s:7951 .text.HAL_I2C_Master_Seq_Transmit_IT:000000b0 $d + /tmp/ccuRhBPx.s:7957 .text.HAL_I2C_Master_Seq_Transmit_DMA:00000000 $t + /tmp/ccuRhBPx.s:7963 .text.HAL_I2C_Master_Seq_Transmit_DMA:00000000 HAL_I2C_Master_Seq_Transmit_DMA + ARM GAS /tmp/ccuRhBPx.s page 481 + + + /tmp/ccuRhBPx.s:8328 .text.HAL_I2C_Master_Seq_Transmit_DMA:0000015c $d + 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.text.HAL_I2C_Slave_Seq_Transmit_DMA:00000190 $d + /tmp/ccuRhBPx.s:9614 .text.HAL_I2C_Slave_Seq_Receive_IT:00000000 $t + /tmp/ccuRhBPx.s:9620 .text.HAL_I2C_Slave_Seq_Receive_IT:00000000 HAL_I2C_Slave_Seq_Receive_IT + /tmp/ccuRhBPx.s:9850 .text.HAL_I2C_Slave_Seq_Receive_IT:000000d0 $d + /tmp/ccuRhBPx.s:9859 .text.HAL_I2C_Slave_Seq_Receive_DMA:00000000 $t + /tmp/ccuRhBPx.s:9865 .text.HAL_I2C_Slave_Seq_Receive_DMA:00000000 HAL_I2C_Slave_Seq_Receive_DMA + /tmp/ccuRhBPx.s:10278 .text.HAL_I2C_Slave_Seq_Receive_DMA:0000018c $d + /tmp/ccuRhBPx.s:10289 .text.HAL_I2C_EnableListen_IT:00000000 $t + /tmp/ccuRhBPx.s:10295 .text.HAL_I2C_EnableListen_IT:00000000 HAL_I2C_EnableListen_IT + /tmp/ccuRhBPx.s:10344 .text.HAL_I2C_EnableListen_IT:00000024 $d + /tmp/ccuRhBPx.s:10349 .text.HAL_I2C_DisableListen_IT:00000000 $t + /tmp/ccuRhBPx.s:10355 .text.HAL_I2C_DisableListen_IT:00000000 HAL_I2C_DisableListen_IT + /tmp/ccuRhBPx.s:10427 .text.HAL_I2C_Master_Abort_IT:00000000 $t + /tmp/ccuRhBPx.s:10433 .text.HAL_I2C_Master_Abort_IT:00000000 HAL_I2C_Master_Abort_IT + /tmp/ccuRhBPx.s:10564 .text.HAL_I2C_Master_Abort_IT:0000007c $d + /tmp/ccuRhBPx.s:10569 .text.HAL_I2C_EV_IRQHandler:00000000 $t + /tmp/ccuRhBPx.s:10575 .text.HAL_I2C_EV_IRQHandler:00000000 HAL_I2C_EV_IRQHandler + /tmp/ccuRhBPx.s:10614 .text.HAL_I2C_MasterTxCpltCallback:00000000 $t + /tmp/ccuRhBPx.s:10620 .text.HAL_I2C_MasterTxCpltCallback:00000000 HAL_I2C_MasterTxCpltCallback + /tmp/ccuRhBPx.s:10636 .text.HAL_I2C_MasterRxCpltCallback:00000000 $t + /tmp/ccuRhBPx.s:10642 .text.HAL_I2C_MasterRxCpltCallback:00000000 HAL_I2C_MasterRxCpltCallback + /tmp/ccuRhBPx.s:10658 .text.I2C_ITMasterSeqCplt:00000000 $t + /tmp/ccuRhBPx.s:10663 .text.I2C_ITMasterSeqCplt:00000000 I2C_ITMasterSeqCplt + /tmp/ccuRhBPx.s:10755 .text.HAL_I2C_SlaveTxCpltCallback:00000000 $t + /tmp/ccuRhBPx.s:10761 .text.HAL_I2C_SlaveTxCpltCallback:00000000 HAL_I2C_SlaveTxCpltCallback + /tmp/ccuRhBPx.s:10777 .text.HAL_I2C_SlaveRxCpltCallback:00000000 $t + /tmp/ccuRhBPx.s:10783 .text.HAL_I2C_SlaveRxCpltCallback:00000000 HAL_I2C_SlaveRxCpltCallback + /tmp/ccuRhBPx.s:10799 .text.I2C_ITSlaveSeqCplt:00000000 $t + /tmp/ccuRhBPx.s:10804 .text.I2C_ITSlaveSeqCplt:00000000 I2C_ITSlaveSeqCplt + /tmp/ccuRhBPx.s:10936 .text.I2C_ITSlaveSeqCplt:0000007c $d + /tmp/ccuRhBPx.s:10942 .text.I2C_DMASlaveTransmitCplt:00000000 $t + /tmp/ccuRhBPx.s:10997 .text.I2C_DMASlaveTransmitCplt:00000024 $d + /tmp/ccuRhBPx.s:11002 .text.I2C_DMASlaveReceiveCplt:00000000 $t + /tmp/ccuRhBPx.s:11065 .text.I2C_DMASlaveReceiveCplt:00000028 $d + /tmp/ccuRhBPx.s:11071 .text.HAL_I2C_AddrCallback:00000000 $t + /tmp/ccuRhBPx.s:11077 .text.HAL_I2C_AddrCallback:00000000 HAL_I2C_AddrCallback + /tmp/ccuRhBPx.s:11095 .text.I2C_ITAddrCplt:00000000 $t + /tmp/ccuRhBPx.s:11100 .text.I2C_ITAddrCplt:00000000 I2C_ITAddrCplt + /tmp/ccuRhBPx.s:11279 .text.HAL_I2C_ListenCpltCallback:00000000 $t + /tmp/ccuRhBPx.s:11285 .text.HAL_I2C_ListenCpltCallback:00000000 HAL_I2C_ListenCpltCallback + /tmp/ccuRhBPx.s:11301 .text.I2C_ITListenCplt:00000000 $t + /tmp/ccuRhBPx.s:11306 .text.I2C_ITListenCplt:00000000 I2C_ITListenCplt + /tmp/ccuRhBPx.s:11413 .text.I2C_ITListenCplt:00000060 $d + /tmp/ccuRhBPx.s:11419 .text.HAL_I2C_MemTxCpltCallback:00000000 $t + ARM GAS /tmp/ccuRhBPx.s page 482 + + + /tmp/ccuRhBPx.s:11425 .text.HAL_I2C_MemTxCpltCallback:00000000 HAL_I2C_MemTxCpltCallback + /tmp/ccuRhBPx.s:11441 .text.HAL_I2C_MemRxCpltCallback:00000000 $t + /tmp/ccuRhBPx.s:11447 .text.HAL_I2C_MemRxCpltCallback:00000000 HAL_I2C_MemRxCpltCallback + /tmp/ccuRhBPx.s:11463 .text.HAL_I2C_ErrorCallback:00000000 $t + /tmp/ccuRhBPx.s:11469 .text.HAL_I2C_ErrorCallback:00000000 HAL_I2C_ErrorCallback + /tmp/ccuRhBPx.s:11485 .text.HAL_I2C_AbortCpltCallback:00000000 $t + /tmp/ccuRhBPx.s:11491 .text.HAL_I2C_AbortCpltCallback:00000000 HAL_I2C_AbortCpltCallback + /tmp/ccuRhBPx.s:11507 .text.I2C_TreatErrorCallback:00000000 $t + /tmp/ccuRhBPx.s:11512 .text.I2C_TreatErrorCallback:00000000 I2C_TreatErrorCallback + /tmp/ccuRhBPx.s:11572 .text.I2C_ITError:00000000 $t + /tmp/ccuRhBPx.s:11577 .text.I2C_ITError:00000000 I2C_ITError + /tmp/ccuRhBPx.s:11869 .text.I2C_ITError:0000011c $d + /tmp/ccuRhBPx.s:11879 .text.I2C_ITSlaveCplt:00000000 $t + /tmp/ccuRhBPx.s:11884 .text.I2C_ITSlaveCplt:00000000 I2C_ITSlaveCplt + /tmp/ccuRhBPx.s:12225 .text.I2C_ITSlaveCplt:00000150 $d + /tmp/ccuRhBPx.s:12235 .text.I2C_Slave_ISR_IT:00000000 $t + /tmp/ccuRhBPx.s:12561 .text.I2C_Slave_ISR_IT:00000148 $d + /tmp/ccuRhBPx.s:12566 .text.I2C_ITMasterCplt:00000000 $t + /tmp/ccuRhBPx.s:12571 .text.I2C_ITMasterCplt:00000000 I2C_ITMasterCplt + /tmp/ccuRhBPx.s:12849 .text.I2C_ITMasterCplt:00000110 $d + /tmp/ccuRhBPx.s:12855 .text.I2C_Master_ISR_IT:00000000 $t + /tmp/ccuRhBPx.s:13242 .text.I2C_Master_ISR_IT:00000174 $d + /tmp/ccuRhBPx.s:13247 .text.I2C_Mem_ISR_DMA:00000000 $t + /tmp/ccuRhBPx.s:13630 .text.I2C_Mem_ISR_DMA:00000184 $d + /tmp/ccuRhBPx.s:13636 .text.I2C_Slave_ISR_DMA:00000000 $t + /tmp/ccuRhBPx.s:13952 .text.I2C_Slave_ISR_DMA:0000012c $d + /tmp/ccuRhBPx.s:13957 .text.I2C_Master_ISR_DMA:00000000 $t + /tmp/ccuRhBPx.s:14281 .text.I2C_Master_ISR_DMA:00000138 $d + /tmp/ccuRhBPx.s:14286 .text.I2C_DMAError:00000000 $t + /tmp/ccuRhBPx.s:14328 .text.I2C_DMAMasterTransmitCplt:00000000 $t + /tmp/ccuRhBPx.s:14442 .text.I2C_DMAMasterTransmitCplt:00000060 $d + /tmp/ccuRhBPx.s:14447 .text.I2C_DMAMasterReceiveCplt:00000000 $t + /tmp/ccuRhBPx.s:14561 .text.I2C_DMAMasterReceiveCplt:00000060 $d + /tmp/ccuRhBPx.s:14566 .text.I2C_Mem_ISR_IT:00000000 $t + /tmp/ccuRhBPx.s:14950 .text.I2C_Mem_ISR_IT:00000170 $d + /tmp/ccuRhBPx.s:14956 .text.HAL_I2C_ER_IRQHandler:00000000 $t + /tmp/ccuRhBPx.s:14962 .text.HAL_I2C_ER_IRQHandler:00000000 HAL_I2C_ER_IRQHandler + /tmp/ccuRhBPx.s:15074 .text.I2C_DMAAbort:00000000 $t + /tmp/ccuRhBPx.s:15127 .text.HAL_I2C_GetState:00000000 $t + /tmp/ccuRhBPx.s:15133 .text.HAL_I2C_GetState:00000000 HAL_I2C_GetState + /tmp/ccuRhBPx.s:15155 .text.HAL_I2C_GetMode:00000000 $t + /tmp/ccuRhBPx.s:15161 .text.HAL_I2C_GetMode:00000000 HAL_I2C_GetMode + /tmp/ccuRhBPx.s:15183 .text.HAL_I2C_GetError:00000000 $t + /tmp/ccuRhBPx.s:15189 .text.HAL_I2C_GetError:00000000 HAL_I2C_GetError + +UNDEFINED SYMBOLS +HAL_GetTick +HAL_DMA_Start_IT +HAL_DMA_Abort_IT +HAL_DMA_GetState diff --git a/Software/build/stm32f0xx_hal_i2c.o b/Software/build/stm32f0xx_hal_i2c.o new file mode 100644 index 0000000..4c66c01 Binary files /dev/null and b/Software/build/stm32f0xx_hal_i2c.o differ diff --git a/Software/build/stm32f0xx_hal_i2c_ex.d b/Software/build/stm32f0xx_hal_i2c_ex.d new file mode 100644 index 0000000..e6866d5 --- /dev/null +++ b/Software/build/stm32f0xx_hal_i2c_ex.d @@ -0,0 +1,60 @@ +build/stm32f0xx_hal_i2c_ex.o: \ + Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c_ex.c \ + Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal.h \ + Core/Inc/stm32f0xx_hal_conf.h \ + Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_rcc.h \ + Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_def.h \ + Drivers/CMSIS/Device/ST/STM32F0xx/Include/stm32f0xx.h \ + Drivers/CMSIS/Device/ST/STM32F0xx/Include/stm32f042x6.h \ + Drivers/CMSIS/Include/core_cm0.h Drivers/CMSIS/Include/cmsis_version.h \ + Drivers/CMSIS/Include/cmsis_compiler.h Drivers/CMSIS/Include/cmsis_gcc.h \ + Drivers/CMSIS/Device/ST/STM32F0xx/Include/system_stm32f0xx.h \ + Drivers/STM32F0xx_HAL_Driver/Inc/Legacy/stm32_hal_legacy.h \ + Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_rcc_ex.h \ + Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_gpio.h \ + Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_gpio_ex.h \ + Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_exti.h \ + Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_dma.h \ + Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_dma_ex.h \ + Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_cortex.h \ + Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_adc.h \ + Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_adc_ex.h \ + Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_can.h \ + Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_flash.h \ + Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_flash_ex.h \ + Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_i2c.h \ + Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_i2c_ex.h \ + Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_pwr.h \ + Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_pwr_ex.h \ + Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_tim.h \ + Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_tim_ex.h +Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal.h: +Core/Inc/stm32f0xx_hal_conf.h: +Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_rcc.h: +Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_def.h: +Drivers/CMSIS/Device/ST/STM32F0xx/Include/stm32f0xx.h: +Drivers/CMSIS/Device/ST/STM32F0xx/Include/stm32f042x6.h: +Drivers/CMSIS/Include/core_cm0.h: +Drivers/CMSIS/Include/cmsis_version.h: +Drivers/CMSIS/Include/cmsis_compiler.h: +Drivers/CMSIS/Include/cmsis_gcc.h: +Drivers/CMSIS/Device/ST/STM32F0xx/Include/system_stm32f0xx.h: +Drivers/STM32F0xx_HAL_Driver/Inc/Legacy/stm32_hal_legacy.h: +Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_rcc_ex.h: +Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_gpio.h: +Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_gpio_ex.h: +Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_exti.h: +Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_dma.h: +Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_dma_ex.h: +Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_cortex.h: +Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_adc.h: +Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_adc_ex.h: +Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_can.h: +Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_flash.h: +Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_flash_ex.h: +Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_i2c.h: +Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_i2c_ex.h: +Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_pwr.h: +Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_pwr_ex.h: +Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_tim.h: +Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_tim_ex.h: diff --git a/Software/build/stm32f0xx_hal_i2c_ex.lst b/Software/build/stm32f0xx_hal_i2c_ex.lst new file mode 100644 index 0000000..786fee3 --- /dev/null +++ b/Software/build/stm32f0xx_hal_i2c_ex.lst @@ -0,0 +1,992 @@ +ARM GAS /tmp/ccOhaUnK.s page 1 + + + 1 .cpu cortex-m0 + 2 .arch armv6s-m + 3 .fpu softvfp + 4 .eabi_attribute 20, 1 + 5 .eabi_attribute 21, 1 + 6 .eabi_attribute 23, 3 + 7 .eabi_attribute 24, 1 + 8 .eabi_attribute 25, 1 + 9 .eabi_attribute 26, 1 + 10 .eabi_attribute 30, 1 + 11 .eabi_attribute 34, 0 + 12 .eabi_attribute 18, 4 + 13 .file "stm32f0xx_hal_i2c_ex.c" + 14 .text + 15 .Ltext0: + 16 .cfi_sections .debug_frame + 17 .file 1 "Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c_ex.c" + 18 .section .text.HAL_I2CEx_ConfigAnalogFilter,"ax",%progbits + 19 .align 1 + 20 .global HAL_I2CEx_ConfigAnalogFilter + 21 .syntax unified + 22 .code 16 + 23 .thumb_func + 25 HAL_I2CEx_ConfigAnalogFilter: + 26 .LVL0: + 27 .LFB40: + 1:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c_ex.c **** /** + 2:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c_ex.c **** ****************************************************************************** + 3:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c_ex.c **** * @file stm32f0xx_hal_i2c_ex.c + 4:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c_ex.c **** * @author MCD Application Team + 5:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c_ex.c **** * @brief I2C Extended HAL module driver. + 6:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c_ex.c **** * This file provides firmware functions to manage the following + 7:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c_ex.c **** * functionalities of I2C Extended peripheral: + 8:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c_ex.c **** * + Filter Mode Functions + 9:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c_ex.c **** * + WakeUp Mode Functions + 10:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c_ex.c **** * + FastModePlus Functions + 11:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c_ex.c **** * + 12:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c_ex.c **** ****************************************************************************** + 13:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c_ex.c **** * @attention + 14:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c_ex.c **** * + 15:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c_ex.c **** * Copyright (c) 2016 STMicroelectronics. + 16:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c_ex.c **** * All rights reserved. + 17:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c_ex.c **** * + 18:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c_ex.c **** * This software is licensed under terms that can be found in the LICENSE file + 19:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c_ex.c **** * in the root directory of this software component. + 20:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c_ex.c **** * If no LICENSE file comes with this software, it is provided AS-IS. + 21:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c_ex.c **** * + 22:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c_ex.c **** ****************************************************************************** + 23:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c_ex.c **** @verbatim + 24:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c_ex.c **** ============================================================================== + 25:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c_ex.c **** ##### I2C peripheral Extended features ##### + 26:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c_ex.c **** ============================================================================== + 27:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c_ex.c **** + 28:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c_ex.c **** [..] Comparing to other previous devices, the I2C interface for STM32F0xx + 29:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c_ex.c **** devices contains the following additional features + 30:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c_ex.c **** + 31:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c_ex.c **** (+) Possibility to disable or enable Analog Noise Filter + ARM GAS /tmp/ccOhaUnK.s page 2 + + + 32:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c_ex.c **** (+) Use of a configured Digital Noise Filter + 33:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c_ex.c **** (+) Disable or enable wakeup from Stop mode(s) + 34:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c_ex.c **** (+) Disable or enable Fast Mode Plus + 35:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c_ex.c **** + 36:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c_ex.c **** ##### How to use this driver ##### + 37:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c_ex.c **** ============================================================================== + 38:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c_ex.c **** [..] This driver provides functions to configure Noise Filter and Wake Up Feature + 39:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c_ex.c **** (#) Configure I2C Analog noise filter using the function HAL_I2CEx_ConfigAnalogFilter() + 40:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c_ex.c **** (#) Configure I2C Digital noise filter using the function HAL_I2CEx_ConfigDigitalFilter() + 41:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c_ex.c **** (#) Configure the enable or disable of I2C Wake Up Mode using the functions : + 42:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c_ex.c **** (++) HAL_I2CEx_EnableWakeUp() + 43:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c_ex.c **** (++) HAL_I2CEx_DisableWakeUp() + 44:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c_ex.c **** (#) Configure the enable or disable of fast mode plus driving capability using the functions : + 45:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c_ex.c **** (++) HAL_I2CEx_EnableFastModePlus() + 46:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c_ex.c **** (++) HAL_I2CEx_DisableFastModePlus() + 47:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c_ex.c **** @endverbatim + 48:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c_ex.c **** */ + 49:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c_ex.c **** + 50:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c_ex.c **** /* Includes ------------------------------------------------------------------*/ + 51:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c_ex.c **** #include "stm32f0xx_hal.h" + 52:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c_ex.c **** + 53:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c_ex.c **** /** @addtogroup STM32F0xx_HAL_Driver + 54:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c_ex.c **** * @{ + 55:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c_ex.c **** */ + 56:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c_ex.c **** + 57:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c_ex.c **** /** @defgroup I2CEx I2CEx + 58:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c_ex.c **** * @brief I2C Extended HAL module driver + 59:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c_ex.c **** * @{ + 60:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c_ex.c **** */ + 61:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c_ex.c **** + 62:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c_ex.c **** #ifdef HAL_I2C_MODULE_ENABLED + 63:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c_ex.c **** + 64:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c_ex.c **** /* Private typedef -----------------------------------------------------------*/ + 65:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c_ex.c **** /* Private define ------------------------------------------------------------*/ + 66:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c_ex.c **** /* Private macro -------------------------------------------------------------*/ + 67:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c_ex.c **** /* Private variables ---------------------------------------------------------*/ + 68:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c_ex.c **** /* Private function prototypes -----------------------------------------------*/ + 69:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c_ex.c **** /* Private functions ---------------------------------------------------------*/ + 70:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c_ex.c **** + 71:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c_ex.c **** /** @defgroup I2CEx_Exported_Functions I2C Extended Exported Functions + 72:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c_ex.c **** * @{ + 73:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c_ex.c **** */ + 74:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c_ex.c **** + 75:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c_ex.c **** /** @defgroup I2CEx_Exported_Functions_Group1 Filter Mode Functions + 76:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c_ex.c **** * @brief Filter Mode Functions + 77:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c_ex.c **** * + 78:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c_ex.c **** @verbatim + 79:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c_ex.c **** =============================================================================== + 80:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c_ex.c **** ##### Filter Mode Functions ##### + 81:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c_ex.c **** =============================================================================== + 82:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c_ex.c **** [..] This section provides functions allowing to: + 83:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c_ex.c **** (+) Configure Noise Filters + 84:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c_ex.c **** + 85:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c_ex.c **** @endverbatim + 86:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c_ex.c **** * @{ + 87:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c_ex.c **** */ + 88:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c_ex.c **** + ARM GAS /tmp/ccOhaUnK.s page 3 + + + 89:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c_ex.c **** /** + 90:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c_ex.c **** * @brief Configure I2C Analog noise filter. + 91:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c_ex.c **** * @param hi2c Pointer to a I2C_HandleTypeDef structure that contains + 92:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c_ex.c **** * the configuration information for the specified I2Cx peripheral. + 93:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c_ex.c **** * @param AnalogFilter New state of the Analog filter. + 94:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c_ex.c **** * @retval HAL status + 95:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c_ex.c **** */ + 96:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c_ex.c **** HAL_StatusTypeDef HAL_I2CEx_ConfigAnalogFilter(I2C_HandleTypeDef *hi2c, uint32_t AnalogFilter) + 97:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c_ex.c **** { + 28 .loc 1 97 1 view -0 + 29 .cfi_startproc + 30 @ args = 0, pretend = 0, frame = 0 + 31 @ frame_needed = 0, uses_anonymous_args = 0 + 32 .loc 1 97 1 is_stmt 0 view .LVU1 + 33 0000 F0B5 push {r4, r5, r6, r7, lr} + 34 .cfi_def_cfa_offset 20 + 35 .cfi_offset 4, -20 + 36 .cfi_offset 5, -16 + 37 .cfi_offset 6, -12 + 38 .cfi_offset 7, -8 + 39 .cfi_offset 14, -4 + 98:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c_ex.c **** /* Check the parameters */ + 99:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c_ex.c **** assert_param(IS_I2C_ALL_INSTANCE(hi2c->Instance)); + 40 .loc 1 99 3 is_stmt 1 view .LVU2 + 100:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c_ex.c **** assert_param(IS_I2C_ANALOG_FILTER(AnalogFilter)); + 41 .loc 1 100 3 view .LVU3 + 101:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c_ex.c **** + 102:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c_ex.c **** if (hi2c->State == HAL_I2C_STATE_READY) + 42 .loc 1 102 3 view .LVU4 + 43 .loc 1 102 11 is_stmt 0 view .LVU5 + 44 0002 4123 movs r3, #65 + 45 0004 C35C ldrb r3, [r0, r3] + 46 .loc 1 102 6 view .LVU6 + 47 0006 202B cmp r3, #32 + 48 0008 20D1 bne .L3 + 103:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c_ex.c **** { + 104:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c_ex.c **** /* Process Locked */ + 105:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c_ex.c **** __HAL_LOCK(hi2c); + 49 .loc 1 105 5 is_stmt 1 view .LVU7 + 50 .loc 1 105 5 view .LVU8 + 51 000a 2033 adds r3, r3, #32 + 52 000c C35C ldrb r3, [r0, r3] + 53 000e 012B cmp r3, #1 + 54 0010 1ED0 beq .L4 + 55 .loc 1 105 5 discriminator 2 view .LVU9 + 56 0012 4024 movs r4, #64 + 57 0014 0122 movs r2, #1 + 58 0016 0255 strb r2, [r0, r4] + 59 .loc 1 105 5 discriminator 2 view .LVU10 + 106:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c_ex.c **** + 107:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c_ex.c **** hi2c->State = HAL_I2C_STATE_BUSY; + 60 .loc 1 107 5 view .LVU11 + 61 .loc 1 107 17 is_stmt 0 view .LVU12 + 62 0018 4125 movs r5, #65 + 63 001a 2423 movs r3, #36 + 64 001c 4355 strb r3, [r0, r5] + 108:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c_ex.c **** + ARM GAS /tmp/ccOhaUnK.s page 4 + + + 109:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c_ex.c **** /* Disable the selected I2C peripheral */ + 110:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c_ex.c **** __HAL_I2C_DISABLE(hi2c); + 65 .loc 1 110 5 is_stmt 1 view .LVU13 + 66 001e 0668 ldr r6, [r0] + 67 0020 3368 ldr r3, [r6] + 68 0022 9343 bics r3, r2 + 69 0024 3360 str r3, [r6] + 111:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c_ex.c **** + 112:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c_ex.c **** /* Reset I2Cx ANOFF bit */ + 113:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c_ex.c **** hi2c->Instance->CR1 &= ~(I2C_CR1_ANFOFF); + 70 .loc 1 113 5 view .LVU14 + 71 .loc 1 113 9 is_stmt 0 view .LVU15 + 72 0026 0668 ldr r6, [r0] + 73 .loc 1 113 19 view .LVU16 + 74 0028 3368 ldr r3, [r6] + 75 .loc 1 113 25 view .LVU17 + 76 002a 0A4F ldr r7, .L5 + 77 002c 3B40 ands r3, r7 + 78 002e 3360 str r3, [r6] + 114:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c_ex.c **** + 115:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c_ex.c **** /* Set analog filter bit*/ + 116:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c_ex.c **** hi2c->Instance->CR1 |= AnalogFilter; + 79 .loc 1 116 5 is_stmt 1 view .LVU18 + 80 .loc 1 116 9 is_stmt 0 view .LVU19 + 81 0030 0668 ldr r6, [r0] + 82 .loc 1 116 19 view .LVU20 + 83 0032 3368 ldr r3, [r6] + 84 .loc 1 116 25 view .LVU21 + 85 0034 0B43 orrs r3, r1 + 86 0036 3360 str r3, [r6] + 117:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c_ex.c **** + 118:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c_ex.c **** __HAL_I2C_ENABLE(hi2c); + 87 .loc 1 118 5 is_stmt 1 view .LVU22 + 88 0038 0168 ldr r1, [r0] + 89 .LVL1: + 90 .loc 1 118 5 is_stmt 0 view .LVU23 + 91 003a 0B68 ldr r3, [r1] + 92 003c 1343 orrs r3, r2 + 93 003e 0B60 str r3, [r1] + 119:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c_ex.c **** + 120:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c_ex.c **** hi2c->State = HAL_I2C_STATE_READY; + 94 .loc 1 120 5 is_stmt 1 view .LVU24 + 95 .loc 1 120 17 is_stmt 0 view .LVU25 + 96 0040 2023 movs r3, #32 + 97 0042 4355 strb r3, [r0, r5] + 121:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c_ex.c **** + 122:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c_ex.c **** /* Process Unlocked */ + 123:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c_ex.c **** __HAL_UNLOCK(hi2c); + 98 .loc 1 123 5 is_stmt 1 view .LVU26 + 99 .loc 1 123 5 view .LVU27 + 100 0044 0023 movs r3, #0 + 101 0046 0355 strb r3, [r0, r4] + 102 .loc 1 123 5 view .LVU28 + 124:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c_ex.c **** + 125:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c_ex.c **** return HAL_OK; + 103 .loc 1 125 5 view .LVU29 + 104 .loc 1 125 12 is_stmt 0 view .LVU30 + ARM GAS /tmp/ccOhaUnK.s page 5 + + + 105 0048 0020 movs r0, #0 + 106 .LVL2: + 107 .L2: + 126:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c_ex.c **** } + 127:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c_ex.c **** else + 128:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c_ex.c **** { + 129:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c_ex.c **** return HAL_BUSY; + 130:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c_ex.c **** } + 131:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c_ex.c **** } + 108 .loc 1 131 1 view .LVU31 + 109 @ sp needed + 110 004a F0BD pop {r4, r5, r6, r7, pc} + 111 .LVL3: + 112 .L3: + 129:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c_ex.c **** } + 113 .loc 1 129 12 view .LVU32 + 114 004c 0220 movs r0, #2 + 115 .LVL4: + 129:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c_ex.c **** } + 116 .loc 1 129 12 view .LVU33 + 117 004e FCE7 b .L2 + 118 .LVL5: + 119 .L4: + 105:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c_ex.c **** + 120 .loc 1 105 5 discriminator 1 view .LVU34 + 121 0050 0220 movs r0, #2 + 122 .LVL6: + 105:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c_ex.c **** + 123 .loc 1 105 5 discriminator 1 view .LVU35 + 124 0052 FAE7 b .L2 + 125 .L6: + 126 .align 2 + 127 .L5: + 128 0054 FFEFFFFF .word -4097 + 129 .cfi_endproc + 130 .LFE40: + 132 .section .text.HAL_I2CEx_ConfigDigitalFilter,"ax",%progbits + 133 .align 1 + 134 .global HAL_I2CEx_ConfigDigitalFilter + 135 .syntax unified + 136 .code 16 + 137 .thumb_func + 139 HAL_I2CEx_ConfigDigitalFilter: + 140 .LVL7: + 141 .LFB41: + 132:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c_ex.c **** + 133:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c_ex.c **** /** + 134:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c_ex.c **** * @brief Configure I2C Digital noise filter. + 135:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c_ex.c **** * @param hi2c Pointer to a I2C_HandleTypeDef structure that contains + 136:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c_ex.c **** * the configuration information for the specified I2Cx peripheral. + 137:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c_ex.c **** * @param DigitalFilter Coefficient of digital noise filter between Min_Data=0x00 and Max_Data=0x + 138:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c_ex.c **** * @retval HAL status + 139:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c_ex.c **** */ + 140:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c_ex.c **** HAL_StatusTypeDef HAL_I2CEx_ConfigDigitalFilter(I2C_HandleTypeDef *hi2c, uint32_t DigitalFilter) + 141:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c_ex.c **** { + 142 .loc 1 141 1 is_stmt 1 view -0 + 143 .cfi_startproc + ARM GAS /tmp/ccOhaUnK.s page 6 + + + 144 @ args = 0, pretend = 0, frame = 0 + 145 @ frame_needed = 0, uses_anonymous_args = 0 + 146 .loc 1 141 1 is_stmt 0 view .LVU37 + 147 0000 F0B5 push {r4, r5, r6, r7, lr} + 148 .cfi_def_cfa_offset 20 + 149 .cfi_offset 4, -20 + 150 .cfi_offset 5, -16 + 151 .cfi_offset 6, -12 + 152 .cfi_offset 7, -8 + 153 .cfi_offset 14, -4 + 142:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c_ex.c **** uint32_t tmpreg; + 154 .loc 1 142 3 is_stmt 1 view .LVU38 + 143:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c_ex.c **** + 144:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c_ex.c **** /* Check the parameters */ + 145:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c_ex.c **** assert_param(IS_I2C_ALL_INSTANCE(hi2c->Instance)); + 155 .loc 1 145 3 view .LVU39 + 146:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c_ex.c **** assert_param(IS_I2C_DIGITAL_FILTER(DigitalFilter)); + 156 .loc 1 146 3 view .LVU40 + 147:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c_ex.c **** + 148:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c_ex.c **** if (hi2c->State == HAL_I2C_STATE_READY) + 157 .loc 1 148 3 view .LVU41 + 158 .loc 1 148 11 is_stmt 0 view .LVU42 + 159 0002 4123 movs r3, #65 + 160 0004 C35C ldrb r3, [r0, r3] + 161 .loc 1 148 6 view .LVU43 + 162 0006 202B cmp r3, #32 + 163 0008 1ED1 bne .L9 + 149:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c_ex.c **** { + 150:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c_ex.c **** /* Process Locked */ + 151:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c_ex.c **** __HAL_LOCK(hi2c); + 164 .loc 1 151 5 is_stmt 1 view .LVU44 + 165 .loc 1 151 5 view .LVU45 + 166 000a 2033 adds r3, r3, #32 + 167 000c C35C ldrb r3, [r0, r3] + 168 000e 012B cmp r3, #1 + 169 0010 1CD0 beq .L10 + 170 .loc 1 151 5 discriminator 2 view .LVU46 + 171 0012 4024 movs r4, #64 + 172 0014 0122 movs r2, #1 + 173 0016 0255 strb r2, [r0, r4] + 174 .loc 1 151 5 discriminator 2 view .LVU47 + 152:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c_ex.c **** + 153:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c_ex.c **** hi2c->State = HAL_I2C_STATE_BUSY; + 175 .loc 1 153 5 view .LVU48 + 176 .loc 1 153 17 is_stmt 0 view .LVU49 + 177 0018 4125 movs r5, #65 + 178 001a 2423 movs r3, #36 + 179 001c 4355 strb r3, [r0, r5] + 154:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c_ex.c **** + 155:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c_ex.c **** /* Disable the selected I2C peripheral */ + 156:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c_ex.c **** __HAL_I2C_DISABLE(hi2c); + 180 .loc 1 156 5 is_stmt 1 view .LVU50 + 181 001e 0668 ldr r6, [r0] + 182 0020 3368 ldr r3, [r6] + 183 0022 9343 bics r3, r2 + 184 0024 3360 str r3, [r6] + 157:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c_ex.c **** + ARM GAS /tmp/ccOhaUnK.s page 7 + + + 158:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c_ex.c **** /* Get the old register value */ + 159:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c_ex.c **** tmpreg = hi2c->Instance->CR1; + 185 .loc 1 159 5 view .LVU51 + 186 .loc 1 159 18 is_stmt 0 view .LVU52 + 187 0026 0668 ldr r6, [r0] + 188 .loc 1 159 12 view .LVU53 + 189 0028 3368 ldr r3, [r6] + 190 .LVL8: + 160:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c_ex.c **** + 161:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c_ex.c **** /* Reset I2Cx DNF bits [11:8] */ + 162:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c_ex.c **** tmpreg &= ~(I2C_CR1_DNF); + 191 .loc 1 162 5 is_stmt 1 view .LVU54 + 192 .loc 1 162 12 is_stmt 0 view .LVU55 + 193 002a 094F ldr r7, .L11 + 194 002c 3B40 ands r3, r7 + 195 .LVL9: + 163:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c_ex.c **** + 164:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c_ex.c **** /* Set I2Cx DNF coefficient */ + 165:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c_ex.c **** tmpreg |= DigitalFilter << 8U; + 196 .loc 1 165 5 is_stmt 1 view .LVU56 + 197 .loc 1 165 29 is_stmt 0 view .LVU57 + 198 002e 0902 lsls r1, r1, #8 + 199 .LVL10: + 200 .loc 1 165 12 view .LVU58 + 201 0030 1943 orrs r1, r3 + 202 .LVL11: + 166:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c_ex.c **** + 167:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c_ex.c **** /* Store the new register value */ + 168:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c_ex.c **** hi2c->Instance->CR1 = tmpreg; + 203 .loc 1 168 5 is_stmt 1 view .LVU59 + 204 .loc 1 168 25 is_stmt 0 view .LVU60 + 205 0032 3160 str r1, [r6] + 169:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c_ex.c **** + 170:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c_ex.c **** __HAL_I2C_ENABLE(hi2c); + 206 .loc 1 170 5 is_stmt 1 view .LVU61 + 207 0034 0168 ldr r1, [r0] + 208 .LVL12: + 209 .loc 1 170 5 is_stmt 0 view .LVU62 + 210 0036 0B68 ldr r3, [r1] + 211 0038 1343 orrs r3, r2 + 212 003a 0B60 str r3, [r1] + 213 .LVL13: + 171:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c_ex.c **** + 172:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c_ex.c **** hi2c->State = HAL_I2C_STATE_READY; + 214 .loc 1 172 5 is_stmt 1 view .LVU63 + 215 .loc 1 172 17 is_stmt 0 view .LVU64 + 216 003c 2023 movs r3, #32 + 217 003e 4355 strb r3, [r0, r5] + 173:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c_ex.c **** + 174:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c_ex.c **** /* Process Unlocked */ + 175:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c_ex.c **** __HAL_UNLOCK(hi2c); + 218 .loc 1 175 5 is_stmt 1 view .LVU65 + 219 .loc 1 175 5 view .LVU66 + 220 0040 0023 movs r3, #0 + 221 0042 0355 strb r3, [r0, r4] + 222 .loc 1 175 5 view .LVU67 + 176:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c_ex.c **** + ARM GAS /tmp/ccOhaUnK.s page 8 + + + 177:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c_ex.c **** return HAL_OK; + 223 .loc 1 177 5 view .LVU68 + 224 .loc 1 177 12 is_stmt 0 view .LVU69 + 225 0044 0020 movs r0, #0 + 226 .LVL14: + 227 .L8: + 178:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c_ex.c **** } + 179:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c_ex.c **** else + 180:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c_ex.c **** { + 181:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c_ex.c **** return HAL_BUSY; + 182:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c_ex.c **** } + 183:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c_ex.c **** } + 228 .loc 1 183 1 view .LVU70 + 229 @ sp needed + 230 0046 F0BD pop {r4, r5, r6, r7, pc} + 231 .LVL15: + 232 .L9: + 181:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c_ex.c **** } + 233 .loc 1 181 12 view .LVU71 + 234 0048 0220 movs r0, #2 + 235 .LVL16: + 181:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c_ex.c **** } + 236 .loc 1 181 12 view .LVU72 + 237 004a FCE7 b .L8 + 238 .LVL17: + 239 .L10: + 151:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c_ex.c **** + 240 .loc 1 151 5 discriminator 1 view .LVU73 + 241 004c 0220 movs r0, #2 + 242 .LVL18: + 151:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c_ex.c **** + 243 .loc 1 151 5 discriminator 1 view .LVU74 + 244 004e FAE7 b .L8 + 245 .L12: + 246 .align 2 + 247 .L11: + 248 0050 FFF0FFFF .word -3841 + 249 .cfi_endproc + 250 .LFE41: + 252 .section .text.HAL_I2CEx_EnableWakeUp,"ax",%progbits + 253 .align 1 + 254 .global HAL_I2CEx_EnableWakeUp + 255 .syntax unified + 256 .code 16 + 257 .thumb_func + 259 HAL_I2CEx_EnableWakeUp: + 260 .LVL19: + 261 .LFB42: + 184:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c_ex.c **** /** + 185:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c_ex.c **** * @} + 186:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c_ex.c **** */ + 187:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c_ex.c **** #if defined(I2C_CR1_WUPEN) + 188:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c_ex.c **** + 189:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c_ex.c **** /** @defgroup I2CEx_Exported_Functions_Group2 WakeUp Mode Functions + 190:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c_ex.c **** * @brief WakeUp Mode Functions + 191:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c_ex.c **** * + 192:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c_ex.c **** @verbatim + ARM GAS /tmp/ccOhaUnK.s page 9 + + + 193:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c_ex.c **** =============================================================================== + 194:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c_ex.c **** ##### WakeUp Mode Functions ##### + 195:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c_ex.c **** =============================================================================== + 196:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c_ex.c **** [..] This section provides functions allowing to: + 197:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c_ex.c **** (+) Configure Wake Up Feature + 198:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c_ex.c **** + 199:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c_ex.c **** @endverbatim + 200:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c_ex.c **** * @{ + 201:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c_ex.c **** */ + 202:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c_ex.c **** + 203:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c_ex.c **** /** + 204:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c_ex.c **** * @brief Enable I2C wakeup from Stop mode(s). + 205:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c_ex.c **** * @param hi2c Pointer to a I2C_HandleTypeDef structure that contains + 206:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c_ex.c **** * the configuration information for the specified I2Cx peripheral. + 207:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c_ex.c **** * @retval HAL status + 208:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c_ex.c **** */ + 209:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c_ex.c **** HAL_StatusTypeDef HAL_I2CEx_EnableWakeUp(I2C_HandleTypeDef *hi2c) + 210:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c_ex.c **** { + 262 .loc 1 210 1 is_stmt 1 view -0 + 263 .cfi_startproc + 264 @ args = 0, pretend = 0, frame = 0 + 265 @ frame_needed = 0, uses_anonymous_args = 0 + 266 .loc 1 210 1 is_stmt 0 view .LVU76 + 267 0000 70B5 push {r4, r5, r6, lr} + 268 .cfi_def_cfa_offset 16 + 269 .cfi_offset 4, -16 + 270 .cfi_offset 5, -12 + 271 .cfi_offset 6, -8 + 272 .cfi_offset 14, -4 + 211:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c_ex.c **** /* Check the parameters */ + 212:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c_ex.c **** assert_param(IS_I2C_WAKEUP_FROMSTOP_INSTANCE(hi2c->Instance)); + 273 .loc 1 212 3 is_stmt 1 view .LVU77 + 213:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c_ex.c **** + 214:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c_ex.c **** if (hi2c->State == HAL_I2C_STATE_READY) + 274 .loc 1 214 3 view .LVU78 + 275 .loc 1 214 11 is_stmt 0 view .LVU79 + 276 0002 4123 movs r3, #65 + 277 0004 C35C ldrb r3, [r0, r3] + 278 .loc 1 214 6 view .LVU80 + 279 0006 202B cmp r3, #32 + 280 0008 1DD1 bne .L15 + 215:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c_ex.c **** { + 216:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c_ex.c **** /* Process Locked */ + 217:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c_ex.c **** __HAL_LOCK(hi2c); + 281 .loc 1 217 5 is_stmt 1 view .LVU81 + 282 .loc 1 217 5 view .LVU82 + 283 000a 2033 adds r3, r3, #32 + 284 000c C35C ldrb r3, [r0, r3] + 285 000e 012B cmp r3, #1 + 286 0010 1BD0 beq .L16 + 287 .loc 1 217 5 discriminator 2 view .LVU83 + 288 0012 4021 movs r1, #64 + 289 0014 0122 movs r2, #1 + 290 0016 4254 strb r2, [r0, r1] + 291 .loc 1 217 5 discriminator 2 view .LVU84 + 218:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c_ex.c **** + 219:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c_ex.c **** hi2c->State = HAL_I2C_STATE_BUSY; + ARM GAS /tmp/ccOhaUnK.s page 10 + + + 292 .loc 1 219 5 view .LVU85 + 293 .loc 1 219 17 is_stmt 0 view .LVU86 + 294 0018 4124 movs r4, #65 + 295 001a 2423 movs r3, #36 + 296 001c 0355 strb r3, [r0, r4] + 220:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c_ex.c **** + 221:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c_ex.c **** /* Disable the selected I2C peripheral */ + 222:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c_ex.c **** __HAL_I2C_DISABLE(hi2c); + 297 .loc 1 222 5 is_stmt 1 view .LVU87 + 298 001e 0568 ldr r5, [r0] + 299 0020 2B68 ldr r3, [r5] + 300 0022 9343 bics r3, r2 + 301 0024 2B60 str r3, [r5] + 223:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c_ex.c **** + 224:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c_ex.c **** /* Enable wakeup from stop mode */ + 225:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c_ex.c **** hi2c->Instance->CR1 |= I2C_CR1_WUPEN; + 302 .loc 1 225 5 view .LVU88 + 303 .loc 1 225 9 is_stmt 0 view .LVU89 + 304 0026 0568 ldr r5, [r0] + 305 .loc 1 225 19 view .LVU90 + 306 0028 2E68 ldr r6, [r5] + 307 .loc 1 225 25 view .LVU91 + 308 002a 8023 movs r3, #128 + 309 002c DB02 lsls r3, r3, #11 + 310 002e 3343 orrs r3, r6 + 311 0030 2B60 str r3, [r5] + 226:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c_ex.c **** + 227:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c_ex.c **** __HAL_I2C_ENABLE(hi2c); + 312 .loc 1 227 5 is_stmt 1 view .LVU92 + 313 0032 0568 ldr r5, [r0] + 314 0034 2B68 ldr r3, [r5] + 315 0036 1343 orrs r3, r2 + 316 0038 2B60 str r3, [r5] + 228:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c_ex.c **** + 229:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c_ex.c **** hi2c->State = HAL_I2C_STATE_READY; + 317 .loc 1 229 5 view .LVU93 + 318 .loc 1 229 17 is_stmt 0 view .LVU94 + 319 003a 2023 movs r3, #32 + 320 003c 0355 strb r3, [r0, r4] + 230:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c_ex.c **** + 231:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c_ex.c **** /* Process Unlocked */ + 232:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c_ex.c **** __HAL_UNLOCK(hi2c); + 321 .loc 1 232 5 is_stmt 1 view .LVU95 + 322 .loc 1 232 5 view .LVU96 + 323 003e 0023 movs r3, #0 + 324 0040 4354 strb r3, [r0, r1] + 325 .loc 1 232 5 view .LVU97 + 233:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c_ex.c **** + 234:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c_ex.c **** return HAL_OK; + 326 .loc 1 234 5 view .LVU98 + 327 .loc 1 234 12 is_stmt 0 view .LVU99 + 328 0042 0020 movs r0, #0 + 329 .LVL20: + 330 .L14: + 235:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c_ex.c **** } + 236:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c_ex.c **** else + 237:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c_ex.c **** { + ARM GAS /tmp/ccOhaUnK.s page 11 + + + 238:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c_ex.c **** return HAL_BUSY; + 239:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c_ex.c **** } + 240:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c_ex.c **** } + 331 .loc 1 240 1 view .LVU100 + 332 @ sp needed + 333 0044 70BD pop {r4, r5, r6, pc} + 334 .LVL21: + 335 .L15: + 238:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c_ex.c **** } + 336 .loc 1 238 12 view .LVU101 + 337 0046 0220 movs r0, #2 + 338 .LVL22: + 238:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c_ex.c **** } + 339 .loc 1 238 12 view .LVU102 + 340 0048 FCE7 b .L14 + 341 .LVL23: + 342 .L16: + 217:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c_ex.c **** + 343 .loc 1 217 5 discriminator 1 view .LVU103 + 344 004a 0220 movs r0, #2 + 345 .LVL24: + 217:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c_ex.c **** + 346 .loc 1 217 5 discriminator 1 view .LVU104 + 347 004c FAE7 b .L14 + 348 .cfi_endproc + 349 .LFE42: + 351 .section .text.HAL_I2CEx_DisableWakeUp,"ax",%progbits + 352 .align 1 + 353 .global HAL_I2CEx_DisableWakeUp + 354 .syntax unified + 355 .code 16 + 356 .thumb_func + 358 HAL_I2CEx_DisableWakeUp: + 359 .LVL25: + 360 .LFB43: + 241:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c_ex.c **** + 242:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c_ex.c **** /** + 243:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c_ex.c **** * @brief Disable I2C wakeup from Stop mode(s). + 244:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c_ex.c **** * @param hi2c Pointer to a I2C_HandleTypeDef structure that contains + 245:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c_ex.c **** * the configuration information for the specified I2Cx peripheral. + 246:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c_ex.c **** * @retval HAL status + 247:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c_ex.c **** */ + 248:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c_ex.c **** HAL_StatusTypeDef HAL_I2CEx_DisableWakeUp(I2C_HandleTypeDef *hi2c) + 249:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c_ex.c **** { + 361 .loc 1 249 1 is_stmt 1 view -0 + 362 .cfi_startproc + 363 @ args = 0, pretend = 0, frame = 0 + 364 @ frame_needed = 0, uses_anonymous_args = 0 + 365 .loc 1 249 1 is_stmt 0 view .LVU106 + 366 0000 70B5 push {r4, r5, r6, lr} + 367 .cfi_def_cfa_offset 16 + 368 .cfi_offset 4, -16 + 369 .cfi_offset 5, -12 + 370 .cfi_offset 6, -8 + 371 .cfi_offset 14, -4 + 250:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c_ex.c **** /* Check the parameters */ + 251:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c_ex.c **** assert_param(IS_I2C_WAKEUP_FROMSTOP_INSTANCE(hi2c->Instance)); + ARM GAS /tmp/ccOhaUnK.s page 12 + + + 372 .loc 1 251 3 is_stmt 1 view .LVU107 + 252:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c_ex.c **** + 253:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c_ex.c **** if (hi2c->State == HAL_I2C_STATE_READY) + 373 .loc 1 253 3 view .LVU108 + 374 .loc 1 253 11 is_stmt 0 view .LVU109 + 375 0002 4123 movs r3, #65 + 376 0004 C35C ldrb r3, [r0, r3] + 377 .loc 1 253 6 view .LVU110 + 378 0006 202B cmp r3, #32 + 379 0008 1CD1 bne .L19 + 254:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c_ex.c **** { + 255:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c_ex.c **** /* Process Locked */ + 256:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c_ex.c **** __HAL_LOCK(hi2c); + 380 .loc 1 256 5 is_stmt 1 view .LVU111 + 381 .loc 1 256 5 view .LVU112 + 382 000a 2033 adds r3, r3, #32 + 383 000c C35C ldrb r3, [r0, r3] + 384 000e 012B cmp r3, #1 + 385 0010 1AD0 beq .L20 + 386 .loc 1 256 5 discriminator 2 view .LVU113 + 387 0012 4021 movs r1, #64 + 388 0014 0122 movs r2, #1 + 389 0016 4254 strb r2, [r0, r1] + 390 .loc 1 256 5 discriminator 2 view .LVU114 + 257:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c_ex.c **** + 258:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c_ex.c **** hi2c->State = HAL_I2C_STATE_BUSY; + 391 .loc 1 258 5 view .LVU115 + 392 .loc 1 258 17 is_stmt 0 view .LVU116 + 393 0018 4124 movs r4, #65 + 394 001a 2423 movs r3, #36 + 395 001c 0355 strb r3, [r0, r4] + 259:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c_ex.c **** + 260:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c_ex.c **** /* Disable the selected I2C peripheral */ + 261:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c_ex.c **** __HAL_I2C_DISABLE(hi2c); + 396 .loc 1 261 5 is_stmt 1 view .LVU117 + 397 001e 0568 ldr r5, [r0] + 398 0020 2B68 ldr r3, [r5] + 399 0022 9343 bics r3, r2 + 400 0024 2B60 str r3, [r5] + 262:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c_ex.c **** + 263:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c_ex.c **** /* Enable wakeup from stop mode */ + 264:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c_ex.c **** hi2c->Instance->CR1 &= ~(I2C_CR1_WUPEN); + 401 .loc 1 264 5 view .LVU118 + 402 .loc 1 264 9 is_stmt 0 view .LVU119 + 403 0026 0568 ldr r5, [r0] + 404 .loc 1 264 19 view .LVU120 + 405 0028 2B68 ldr r3, [r5] + 406 .loc 1 264 25 view .LVU121 + 407 002a 084E ldr r6, .L21 + 408 002c 3340 ands r3, r6 + 409 002e 2B60 str r3, [r5] + 265:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c_ex.c **** + 266:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c_ex.c **** __HAL_I2C_ENABLE(hi2c); + 410 .loc 1 266 5 is_stmt 1 view .LVU122 + 411 0030 0568 ldr r5, [r0] + 412 0032 2B68 ldr r3, [r5] + 413 0034 1343 orrs r3, r2 + ARM GAS /tmp/ccOhaUnK.s page 13 + + + 414 0036 2B60 str r3, [r5] + 267:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c_ex.c **** + 268:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c_ex.c **** hi2c->State = HAL_I2C_STATE_READY; + 415 .loc 1 268 5 view .LVU123 + 416 .loc 1 268 17 is_stmt 0 view .LVU124 + 417 0038 2023 movs r3, #32 + 418 003a 0355 strb r3, [r0, r4] + 269:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c_ex.c **** + 270:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c_ex.c **** /* Process Unlocked */ + 271:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c_ex.c **** __HAL_UNLOCK(hi2c); + 419 .loc 1 271 5 is_stmt 1 view .LVU125 + 420 .loc 1 271 5 view .LVU126 + 421 003c 0023 movs r3, #0 + 422 003e 4354 strb r3, [r0, r1] + 423 .loc 1 271 5 view .LVU127 + 272:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c_ex.c **** + 273:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c_ex.c **** return HAL_OK; + 424 .loc 1 273 5 view .LVU128 + 425 .loc 1 273 12 is_stmt 0 view .LVU129 + 426 0040 0020 movs r0, #0 + 427 .LVL26: + 428 .L18: + 274:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c_ex.c **** } + 275:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c_ex.c **** else + 276:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c_ex.c **** { + 277:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c_ex.c **** return HAL_BUSY; + 278:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c_ex.c **** } + 279:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c_ex.c **** } + 429 .loc 1 279 1 view .LVU130 + 430 @ sp needed + 431 0042 70BD pop {r4, r5, r6, pc} + 432 .LVL27: + 433 .L19: + 277:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c_ex.c **** } + 434 .loc 1 277 12 view .LVU131 + 435 0044 0220 movs r0, #2 + 436 .LVL28: + 277:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c_ex.c **** } + 437 .loc 1 277 12 view .LVU132 + 438 0046 FCE7 b .L18 + 439 .LVL29: + 440 .L20: + 256:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c_ex.c **** + 441 .loc 1 256 5 discriminator 1 view .LVU133 + 442 0048 0220 movs r0, #2 + 443 .LVL30: + 256:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c_ex.c **** + 444 .loc 1 256 5 discriminator 1 view .LVU134 + 445 004a FAE7 b .L18 + 446 .L22: + 447 .align 2 + 448 .L21: + 449 004c FFFFFBFF .word -262145 + 450 .cfi_endproc + 451 .LFE43: + 453 .section .text.HAL_I2CEx_EnableFastModePlus,"ax",%progbits + 454 .align 1 + ARM GAS /tmp/ccOhaUnK.s page 14 + + + 455 .global HAL_I2CEx_EnableFastModePlus + 456 .syntax unified + 457 .code 16 + 458 .thumb_func + 460 HAL_I2CEx_EnableFastModePlus: + 461 .LVL31: + 462 .LFB44: + 280:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c_ex.c **** /** + 281:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c_ex.c **** * @} + 282:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c_ex.c **** */ + 283:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c_ex.c **** #endif /* I2C_CR1_WUPEN */ + 284:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c_ex.c **** + 285:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c_ex.c **** /** @defgroup I2CEx_Exported_Functions_Group3 Fast Mode Plus Functions + 286:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c_ex.c **** * @brief Fast Mode Plus Functions + 287:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c_ex.c **** * + 288:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c_ex.c **** @verbatim + 289:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c_ex.c **** =============================================================================== + 290:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c_ex.c **** ##### Fast Mode Plus Functions ##### + 291:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c_ex.c **** =============================================================================== + 292:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c_ex.c **** [..] This section provides functions allowing to: + 293:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c_ex.c **** (+) Configure Fast Mode Plus + 294:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c_ex.c **** + 295:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c_ex.c **** @endverbatim + 296:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c_ex.c **** * @{ + 297:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c_ex.c **** */ + 298:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c_ex.c **** + 299:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c_ex.c **** /** + 300:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c_ex.c **** * @brief Enable the I2C fast mode plus driving capability. + 301:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c_ex.c **** * @param ConfigFastModePlus Selects the pin. + 302:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c_ex.c **** * This parameter can be one of the @ref I2CEx_FastModePlus values + 303:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c_ex.c **** * @note For I2C1, fast mode plus driving capability can be enabled on all selected + 304:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c_ex.c **** * I2C1 pins using I2C_FASTMODEPLUS_I2C1 parameter or independently + 305:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c_ex.c **** * on each one of the following pins PB6, PB7, PB8 and PB9. + 306:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c_ex.c **** * @note For remaining I2C1 pins (PA14, PA15...) fast mode plus driving capability + 307:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c_ex.c **** * can be enabled only by using I2C_FASTMODEPLUS_I2C1 parameter. + 308:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c_ex.c **** * @note For all I2C2 pins fast mode plus driving capability can be enabled + 309:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c_ex.c **** * only by using I2C_FASTMODEPLUS_I2C2 parameter. + 310:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c_ex.c **** * @retval None + 311:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c_ex.c **** */ + 312:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c_ex.c **** void HAL_I2CEx_EnableFastModePlus(uint32_t ConfigFastModePlus) + 313:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c_ex.c **** { + 463 .loc 1 313 1 is_stmt 1 view -0 + 464 .cfi_startproc + 465 @ args = 0, pretend = 0, frame = 8 + 466 @ frame_needed = 0, uses_anonymous_args = 0 + 467 @ link register save eliminated. + 468 .loc 1 313 1 is_stmt 0 view .LVU136 + 469 0000 82B0 sub sp, sp, #8 + 470 .cfi_def_cfa_offset 8 + 314:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c_ex.c **** /* Check the parameter */ + 315:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c_ex.c **** assert_param(IS_I2C_FASTMODEPLUS(ConfigFastModePlus)); + 471 .loc 1 315 3 is_stmt 1 view .LVU137 + 316:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c_ex.c **** + 317:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c_ex.c **** /* Enable SYSCFG clock */ + 318:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c_ex.c **** __HAL_RCC_SYSCFG_CLK_ENABLE(); + 472 .loc 1 318 3 view .LVU138 + 473 .LBB2: + ARM GAS /tmp/ccOhaUnK.s page 15 + + + 474 .loc 1 318 3 view .LVU139 + 475 .loc 1 318 3 view .LVU140 + 476 0002 074A ldr r2, .L24 + 477 0004 9169 ldr r1, [r2, #24] + 478 0006 0123 movs r3, #1 + 479 0008 1943 orrs r1, r3 + 480 000a 9161 str r1, [r2, #24] + 481 .loc 1 318 3 view .LVU141 + 482 000c 9269 ldr r2, [r2, #24] + 483 000e 1340 ands r3, r2 + 484 0010 0193 str r3, [sp, #4] + 485 .loc 1 318 3 view .LVU142 + 486 0012 019B ldr r3, [sp, #4] + 487 .LBE2: + 488 .loc 1 318 3 view .LVU143 + 319:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c_ex.c **** + 320:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c_ex.c **** /* Enable fast mode plus driving capability for selected pin */ + 321:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c_ex.c **** SET_BIT(SYSCFG->CFGR1, (uint32_t)ConfigFastModePlus); + 489 .loc 1 321 3 view .LVU144 + 490 0014 034A ldr r2, .L24+4 + 491 0016 1368 ldr r3, [r2] + 492 0018 0343 orrs r3, r0 + 493 001a 1360 str r3, [r2] + 322:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c_ex.c **** } + 494 .loc 1 322 1 is_stmt 0 view .LVU145 + 495 001c 02B0 add sp, sp, #8 + 496 @ sp needed + 497 001e 7047 bx lr + 498 .L25: + 499 .align 2 + 500 .L24: + 501 0020 00100240 .word 1073876992 + 502 0024 00000140 .word 1073807360 + 503 .cfi_endproc + 504 .LFE44: + 506 .section .text.HAL_I2CEx_DisableFastModePlus,"ax",%progbits + 507 .align 1 + 508 .global HAL_I2CEx_DisableFastModePlus + 509 .syntax unified + 510 .code 16 + 511 .thumb_func + 513 HAL_I2CEx_DisableFastModePlus: + 514 .LVL32: + 515 .LFB45: + 323:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c_ex.c **** + 324:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c_ex.c **** /** + 325:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c_ex.c **** * @brief Disable the I2C fast mode plus driving capability. + 326:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c_ex.c **** * @param ConfigFastModePlus Selects the pin. + 327:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c_ex.c **** * This parameter can be one of the @ref I2CEx_FastModePlus values + 328:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c_ex.c **** * @note For I2C1, fast mode plus driving capability can be disabled on all selected + 329:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c_ex.c **** * I2C1 pins using I2C_FASTMODEPLUS_I2C1 parameter or independently + 330:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c_ex.c **** * on each one of the following pins PB6, PB7, PB8 and PB9. + 331:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c_ex.c **** * @note For remaining I2C1 pins (PA14, PA15...) fast mode plus driving capability + 332:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c_ex.c **** * can be disabled only by using I2C_FASTMODEPLUS_I2C1 parameter. + 333:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c_ex.c **** * @note For all I2C2 pins fast mode plus driving capability can be disabled + 334:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c_ex.c **** * only by using I2C_FASTMODEPLUS_I2C2 parameter. + 335:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c_ex.c **** * @retval None + ARM GAS /tmp/ccOhaUnK.s page 16 + + + 336:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c_ex.c **** */ + 337:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c_ex.c **** void HAL_I2CEx_DisableFastModePlus(uint32_t ConfigFastModePlus) + 338:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c_ex.c **** { + 516 .loc 1 338 1 is_stmt 1 view -0 + 517 .cfi_startproc + 518 @ args = 0, pretend = 0, frame = 8 + 519 @ frame_needed = 0, uses_anonymous_args = 0 + 520 @ link register save eliminated. + 521 .loc 1 338 1 is_stmt 0 view .LVU147 + 522 0000 82B0 sub sp, sp, #8 + 523 .cfi_def_cfa_offset 8 + 339:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c_ex.c **** /* Check the parameter */ + 340:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c_ex.c **** assert_param(IS_I2C_FASTMODEPLUS(ConfigFastModePlus)); + 524 .loc 1 340 3 is_stmt 1 view .LVU148 + 341:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c_ex.c **** + 342:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c_ex.c **** /* Enable SYSCFG clock */ + 343:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c_ex.c **** __HAL_RCC_SYSCFG_CLK_ENABLE(); + 525 .loc 1 343 3 view .LVU149 + 526 .LBB3: + 527 .loc 1 343 3 view .LVU150 + 528 .loc 1 343 3 view .LVU151 + 529 0002 074A ldr r2, .L27 + 530 0004 9169 ldr r1, [r2, #24] + 531 0006 0123 movs r3, #1 + 532 0008 1943 orrs r1, r3 + 533 000a 9161 str r1, [r2, #24] + 534 .loc 1 343 3 view .LVU152 + 535 000c 9269 ldr r2, [r2, #24] + 536 000e 1340 ands r3, r2 + 537 0010 0193 str r3, [sp, #4] + 538 .loc 1 343 3 view .LVU153 + 539 0012 019B ldr r3, [sp, #4] + 540 .LBE3: + 541 .loc 1 343 3 view .LVU154 + 344:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c_ex.c **** + 345:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c_ex.c **** /* Disable fast mode plus driving capability for selected pin */ + 346:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c_ex.c **** CLEAR_BIT(SYSCFG->CFGR1, (uint32_t)ConfigFastModePlus); + 542 .loc 1 346 3 view .LVU155 + 543 0014 034A ldr r2, .L27+4 + 544 0016 1368 ldr r3, [r2] + 545 0018 8343 bics r3, r0 + 546 001a 1360 str r3, [r2] + 347:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c_ex.c **** } + 547 .loc 1 347 1 is_stmt 0 view .LVU156 + 548 001c 02B0 add sp, sp, #8 + 549 @ sp needed + 550 001e 7047 bx lr + 551 .L28: + 552 .align 2 + 553 .L27: + 554 0020 00100240 .word 1073876992 + 555 0024 00000140 .word 1073807360 + 556 .cfi_endproc + 557 .LFE45: + 559 .text + 560 .Letext0: + 561 .file 2 "/home/chiangni/.config/VSCodium/User/globalStorage/bmd.stm32-for-vscode/@xpack-dev-tools/ + ARM GAS /tmp/ccOhaUnK.s page 17 + + + 562 .file 3 "/home/chiangni/.config/VSCodium/User/globalStorage/bmd.stm32-for-vscode/@xpack-dev-tools/ + 563 .file 4 "Drivers/CMSIS/Device/ST/STM32F0xx/Include/stm32f042x6.h" + 564 .file 5 "Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_def.h" + 565 .file 6 "Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_dma.h" + 566 .file 7 "Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_i2c.h" + ARM GAS /tmp/ccOhaUnK.s page 18 + + +DEFINED SYMBOLS + *ABS*:00000000 stm32f0xx_hal_i2c_ex.c + /tmp/ccOhaUnK.s:19 .text.HAL_I2CEx_ConfigAnalogFilter:00000000 $t + /tmp/ccOhaUnK.s:25 .text.HAL_I2CEx_ConfigAnalogFilter:00000000 HAL_I2CEx_ConfigAnalogFilter + /tmp/ccOhaUnK.s:128 .text.HAL_I2CEx_ConfigAnalogFilter:00000054 $d + /tmp/ccOhaUnK.s:133 .text.HAL_I2CEx_ConfigDigitalFilter:00000000 $t + /tmp/ccOhaUnK.s:139 .text.HAL_I2CEx_ConfigDigitalFilter:00000000 HAL_I2CEx_ConfigDigitalFilter + /tmp/ccOhaUnK.s:248 .text.HAL_I2CEx_ConfigDigitalFilter:00000050 $d + /tmp/ccOhaUnK.s:253 .text.HAL_I2CEx_EnableWakeUp:00000000 $t + /tmp/ccOhaUnK.s:259 .text.HAL_I2CEx_EnableWakeUp:00000000 HAL_I2CEx_EnableWakeUp + /tmp/ccOhaUnK.s:352 .text.HAL_I2CEx_DisableWakeUp:00000000 $t + /tmp/ccOhaUnK.s:358 .text.HAL_I2CEx_DisableWakeUp:00000000 HAL_I2CEx_DisableWakeUp + /tmp/ccOhaUnK.s:449 .text.HAL_I2CEx_DisableWakeUp:0000004c $d + /tmp/ccOhaUnK.s:454 .text.HAL_I2CEx_EnableFastModePlus:00000000 $t + /tmp/ccOhaUnK.s:460 .text.HAL_I2CEx_EnableFastModePlus:00000000 HAL_I2CEx_EnableFastModePlus + /tmp/ccOhaUnK.s:501 .text.HAL_I2CEx_EnableFastModePlus:00000020 $d + /tmp/ccOhaUnK.s:507 .text.HAL_I2CEx_DisableFastModePlus:00000000 $t + /tmp/ccOhaUnK.s:513 .text.HAL_I2CEx_DisableFastModePlus:00000000 HAL_I2CEx_DisableFastModePlus + /tmp/ccOhaUnK.s:554 .text.HAL_I2CEx_DisableFastModePlus:00000020 $d + +NO UNDEFINED SYMBOLS diff --git a/Software/build/stm32f0xx_hal_i2c_ex.o b/Software/build/stm32f0xx_hal_i2c_ex.o new file mode 100644 index 0000000..e7a33db Binary files /dev/null and b/Software/build/stm32f0xx_hal_i2c_ex.o differ diff --git a/Software/build/stm32f0xx_hal_msp.d b/Software/build/stm32f0xx_hal_msp.d new file mode 100644 index 0000000..392d1cd --- /dev/null +++ b/Software/build/stm32f0xx_hal_msp.d @@ -0,0 +1,60 @@ +build/stm32f0xx_hal_msp.o: Core/Src/stm32f0xx_hal_msp.c Core/Inc/main.h \ + Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal.h \ + Core/Inc/stm32f0xx_hal_conf.h \ + Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_rcc.h \ + Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_def.h \ + Drivers/CMSIS/Device/ST/STM32F0xx/Include/stm32f0xx.h \ + Drivers/CMSIS/Device/ST/STM32F0xx/Include/stm32f042x6.h \ + Drivers/CMSIS/Include/core_cm0.h Drivers/CMSIS/Include/cmsis_version.h \ + Drivers/CMSIS/Include/cmsis_compiler.h Drivers/CMSIS/Include/cmsis_gcc.h \ + Drivers/CMSIS/Device/ST/STM32F0xx/Include/system_stm32f0xx.h \ + Drivers/STM32F0xx_HAL_Driver/Inc/Legacy/stm32_hal_legacy.h \ + Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_rcc_ex.h \ + Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_gpio.h \ + Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_gpio_ex.h \ + Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_exti.h \ + Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_dma.h \ + Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_dma_ex.h \ + Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_cortex.h \ + Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_adc.h \ + Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_adc_ex.h \ + Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_can.h \ + Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_flash.h \ + Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_flash_ex.h \ + Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_i2c.h \ + Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_i2c_ex.h \ + Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_pwr.h \ + Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_pwr_ex.h \ + Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_tim.h \ + Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_tim_ex.h +Core/Inc/main.h: +Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal.h: +Core/Inc/stm32f0xx_hal_conf.h: +Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_rcc.h: +Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_def.h: +Drivers/CMSIS/Device/ST/STM32F0xx/Include/stm32f0xx.h: +Drivers/CMSIS/Device/ST/STM32F0xx/Include/stm32f042x6.h: +Drivers/CMSIS/Include/core_cm0.h: +Drivers/CMSIS/Include/cmsis_version.h: +Drivers/CMSIS/Include/cmsis_compiler.h: +Drivers/CMSIS/Include/cmsis_gcc.h: +Drivers/CMSIS/Device/ST/STM32F0xx/Include/system_stm32f0xx.h: +Drivers/STM32F0xx_HAL_Driver/Inc/Legacy/stm32_hal_legacy.h: +Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_rcc_ex.h: +Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_gpio.h: +Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_gpio_ex.h: +Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_exti.h: +Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_dma.h: +Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_dma_ex.h: +Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_cortex.h: +Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_adc.h: +Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_adc_ex.h: +Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_can.h: +Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_flash.h: +Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_flash_ex.h: +Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_i2c.h: +Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_i2c_ex.h: +Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_pwr.h: +Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_pwr_ex.h: +Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_tim.h: +Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_tim_ex.h: diff --git a/Software/build/stm32f0xx_hal_msp.lst b/Software/build/stm32f0xx_hal_msp.lst new file mode 100644 index 0000000..b3d6847 --- /dev/null +++ b/Software/build/stm32f0xx_hal_msp.lst @@ -0,0 +1,1112 @@ +ARM GAS /tmp/ccP9ub9v.s page 1 + + + 1 .cpu cortex-m0 + 2 .arch armv6s-m + 3 .fpu softvfp + 4 .eabi_attribute 20, 1 + 5 .eabi_attribute 21, 1 + 6 .eabi_attribute 23, 3 + 7 .eabi_attribute 24, 1 + 8 .eabi_attribute 25, 1 + 9 .eabi_attribute 26, 1 + 10 .eabi_attribute 30, 1 + 11 .eabi_attribute 34, 0 + 12 .eabi_attribute 18, 4 + 13 .file "stm32f0xx_hal_msp.c" + 14 .text + 15 .Ltext0: + 16 .cfi_sections .debug_frame + 17 .file 1 "Core/Src/stm32f0xx_hal_msp.c" + 18 .section .text.HAL_MspInit,"ax",%progbits + 19 .align 1 + 20 .global HAL_MspInit + 21 .syntax unified + 22 .code 16 + 23 .thumb_func + 25 HAL_MspInit: + 26 .LFB40: + 1:Core/Src/stm32f0xx_hal_msp.c **** /* USER CODE BEGIN Header */ + 2:Core/Src/stm32f0xx_hal_msp.c **** /** + 3:Core/Src/stm32f0xx_hal_msp.c **** ****************************************************************************** + 4:Core/Src/stm32f0xx_hal_msp.c **** * @file stm32f0xx_hal_msp.c + 5:Core/Src/stm32f0xx_hal_msp.c **** * @brief This file provides code for the MSP Initialization + 6:Core/Src/stm32f0xx_hal_msp.c **** * and de-Initialization codes. + 7:Core/Src/stm32f0xx_hal_msp.c **** ****************************************************************************** + 8:Core/Src/stm32f0xx_hal_msp.c **** * @attention + 9:Core/Src/stm32f0xx_hal_msp.c **** * + 10:Core/Src/stm32f0xx_hal_msp.c **** * Copyright (c) 2024 STMicroelectronics. + 11:Core/Src/stm32f0xx_hal_msp.c **** * All rights reserved. + 12:Core/Src/stm32f0xx_hal_msp.c **** * + 13:Core/Src/stm32f0xx_hal_msp.c **** * This software is licensed under terms that can be found in the LICENSE file + 14:Core/Src/stm32f0xx_hal_msp.c **** * in the root directory of this software component. + 15:Core/Src/stm32f0xx_hal_msp.c **** * If no LICENSE file comes with this software, it is provided AS-IS. + 16:Core/Src/stm32f0xx_hal_msp.c **** * + 17:Core/Src/stm32f0xx_hal_msp.c **** ****************************************************************************** + 18:Core/Src/stm32f0xx_hal_msp.c **** */ + 19:Core/Src/stm32f0xx_hal_msp.c **** /* USER CODE END Header */ + 20:Core/Src/stm32f0xx_hal_msp.c **** + 21:Core/Src/stm32f0xx_hal_msp.c **** /* Includes ------------------------------------------------------------------*/ + 22:Core/Src/stm32f0xx_hal_msp.c **** #include "main.h" + 23:Core/Src/stm32f0xx_hal_msp.c **** + 24:Core/Src/stm32f0xx_hal_msp.c **** /* USER CODE BEGIN Includes */ + 25:Core/Src/stm32f0xx_hal_msp.c **** + 26:Core/Src/stm32f0xx_hal_msp.c **** /* USER CODE END Includes */ + 27:Core/Src/stm32f0xx_hal_msp.c **** + 28:Core/Src/stm32f0xx_hal_msp.c **** /* Private typedef -----------------------------------------------------------*/ + 29:Core/Src/stm32f0xx_hal_msp.c **** /* USER CODE BEGIN TD */ + 30:Core/Src/stm32f0xx_hal_msp.c **** + 31:Core/Src/stm32f0xx_hal_msp.c **** /* USER CODE END TD */ + 32:Core/Src/stm32f0xx_hal_msp.c **** + ARM GAS /tmp/ccP9ub9v.s page 2 + + + 33:Core/Src/stm32f0xx_hal_msp.c **** /* Private define ------------------------------------------------------------*/ + 34:Core/Src/stm32f0xx_hal_msp.c **** /* USER CODE BEGIN Define */ + 35:Core/Src/stm32f0xx_hal_msp.c **** + 36:Core/Src/stm32f0xx_hal_msp.c **** /* USER CODE END Define */ + 37:Core/Src/stm32f0xx_hal_msp.c **** + 38:Core/Src/stm32f0xx_hal_msp.c **** /* Private macro -------------------------------------------------------------*/ + 39:Core/Src/stm32f0xx_hal_msp.c **** /* USER CODE BEGIN Macro */ + 40:Core/Src/stm32f0xx_hal_msp.c **** + 41:Core/Src/stm32f0xx_hal_msp.c **** /* USER CODE END Macro */ + 42:Core/Src/stm32f0xx_hal_msp.c **** + 43:Core/Src/stm32f0xx_hal_msp.c **** /* Private variables ---------------------------------------------------------*/ + 44:Core/Src/stm32f0xx_hal_msp.c **** /* USER CODE BEGIN PV */ + 45:Core/Src/stm32f0xx_hal_msp.c **** + 46:Core/Src/stm32f0xx_hal_msp.c **** /* USER CODE END PV */ + 47:Core/Src/stm32f0xx_hal_msp.c **** + 48:Core/Src/stm32f0xx_hal_msp.c **** /* Private function prototypes -----------------------------------------------*/ + 49:Core/Src/stm32f0xx_hal_msp.c **** /* USER CODE BEGIN PFP */ + 50:Core/Src/stm32f0xx_hal_msp.c **** + 51:Core/Src/stm32f0xx_hal_msp.c **** /* USER CODE END PFP */ + 52:Core/Src/stm32f0xx_hal_msp.c **** + 53:Core/Src/stm32f0xx_hal_msp.c **** /* External functions --------------------------------------------------------*/ + 54:Core/Src/stm32f0xx_hal_msp.c **** /* USER CODE BEGIN ExternalFunctions */ + 55:Core/Src/stm32f0xx_hal_msp.c **** + 56:Core/Src/stm32f0xx_hal_msp.c **** /* USER CODE END ExternalFunctions */ + 57:Core/Src/stm32f0xx_hal_msp.c **** + 58:Core/Src/stm32f0xx_hal_msp.c **** /* USER CODE BEGIN 0 */ + 59:Core/Src/stm32f0xx_hal_msp.c **** + 60:Core/Src/stm32f0xx_hal_msp.c **** /* USER CODE END 0 */ + 61:Core/Src/stm32f0xx_hal_msp.c **** + 62:Core/Src/stm32f0xx_hal_msp.c **** void HAL_TIM_MspPostInit(TIM_HandleTypeDef *htim); + 63:Core/Src/stm32f0xx_hal_msp.c **** /** + 64:Core/Src/stm32f0xx_hal_msp.c **** * Initializes the Global MSP. + 65:Core/Src/stm32f0xx_hal_msp.c **** */ + 66:Core/Src/stm32f0xx_hal_msp.c **** void HAL_MspInit(void) + 67:Core/Src/stm32f0xx_hal_msp.c **** { + 27 .loc 1 67 1 view -0 + 28 .cfi_startproc + 29 @ args = 0, pretend = 0, frame = 8 + 30 @ frame_needed = 0, uses_anonymous_args = 0 + 31 @ link register save eliminated. + 32 0000 82B0 sub sp, sp, #8 + 33 .cfi_def_cfa_offset 8 + 68:Core/Src/stm32f0xx_hal_msp.c **** /* USER CODE BEGIN MspInit 0 */ + 69:Core/Src/stm32f0xx_hal_msp.c **** + 70:Core/Src/stm32f0xx_hal_msp.c **** /* USER CODE END MspInit 0 */ + 71:Core/Src/stm32f0xx_hal_msp.c **** + 72:Core/Src/stm32f0xx_hal_msp.c **** __HAL_RCC_SYSCFG_CLK_ENABLE(); + 34 .loc 1 72 3 view .LVU1 + 35 .LBB2: + 36 .loc 1 72 3 view .LVU2 + 37 .loc 1 72 3 view .LVU3 + 38 0002 0A4B ldr r3, .L2 + 39 0004 9969 ldr r1, [r3, #24] + 40 0006 0122 movs r2, #1 + 41 0008 1143 orrs r1, r2 + 42 000a 9961 str r1, [r3, #24] + 43 .loc 1 72 3 view .LVU4 + ARM GAS /tmp/ccP9ub9v.s page 3 + + + 44 000c 9969 ldr r1, [r3, #24] + 45 000e 0A40 ands r2, r1 + 46 0010 0092 str r2, [sp] + 47 .loc 1 72 3 view .LVU5 + 48 0012 009A ldr r2, [sp] + 49 .LBE2: + 50 .loc 1 72 3 view .LVU6 + 73:Core/Src/stm32f0xx_hal_msp.c **** __HAL_RCC_PWR_CLK_ENABLE(); + 51 .loc 1 73 3 view .LVU7 + 52 .LBB3: + 53 .loc 1 73 3 view .LVU8 + 54 .loc 1 73 3 view .LVU9 + 55 0014 DA69 ldr r2, [r3, #28] + 56 0016 8021 movs r1, #128 + 57 0018 4905 lsls r1, r1, #21 + 58 001a 0A43 orrs r2, r1 + 59 001c DA61 str r2, [r3, #28] + 60 .loc 1 73 3 view .LVU10 + 61 001e DB69 ldr r3, [r3, #28] + 62 0020 0B40 ands r3, r1 + 63 0022 0193 str r3, [sp, #4] + 64 .loc 1 73 3 view .LVU11 + 65 0024 019B ldr r3, [sp, #4] + 66 .LBE3: + 67 .loc 1 73 3 view .LVU12 + 74:Core/Src/stm32f0xx_hal_msp.c **** + 75:Core/Src/stm32f0xx_hal_msp.c **** /* System interrupt init*/ + 76:Core/Src/stm32f0xx_hal_msp.c **** + 77:Core/Src/stm32f0xx_hal_msp.c **** /* USER CODE BEGIN MspInit 1 */ + 78:Core/Src/stm32f0xx_hal_msp.c **** + 79:Core/Src/stm32f0xx_hal_msp.c **** /* USER CODE END MspInit 1 */ + 80:Core/Src/stm32f0xx_hal_msp.c **** } + 68 .loc 1 80 1 is_stmt 0 view .LVU13 + 69 0026 02B0 add sp, sp, #8 + 70 @ sp needed + 71 0028 7047 bx lr + 72 .L3: + 73 002a C046 .align 2 + 74 .L2: + 75 002c 00100240 .word 1073876992 + 76 .cfi_endproc + 77 .LFE40: + 79 .section .text.HAL_ADC_MspInit,"ax",%progbits + 80 .align 1 + 81 .global HAL_ADC_MspInit + 82 .syntax unified + 83 .code 16 + 84 .thumb_func + 86 HAL_ADC_MspInit: + 87 .LVL0: + 88 .LFB41: + 81:Core/Src/stm32f0xx_hal_msp.c **** + 82:Core/Src/stm32f0xx_hal_msp.c **** /** + 83:Core/Src/stm32f0xx_hal_msp.c **** * @brief ADC MSP Initialization + 84:Core/Src/stm32f0xx_hal_msp.c **** * This function configures the hardware resources used in this example + 85:Core/Src/stm32f0xx_hal_msp.c **** * @param hadc: ADC handle pointer + 86:Core/Src/stm32f0xx_hal_msp.c **** * @retval None + ARM GAS /tmp/ccP9ub9v.s page 4 + + + 87:Core/Src/stm32f0xx_hal_msp.c **** */ + 88:Core/Src/stm32f0xx_hal_msp.c **** void HAL_ADC_MspInit(ADC_HandleTypeDef* hadc) + 89:Core/Src/stm32f0xx_hal_msp.c **** { + 89 .loc 1 89 1 is_stmt 1 view -0 + 90 .cfi_startproc + 91 @ args = 0, pretend = 0, frame = 32 + 92 @ frame_needed = 0, uses_anonymous_args = 0 + 93 .loc 1 89 1 is_stmt 0 view .LVU15 + 94 0000 10B5 push {r4, lr} + 95 .cfi_def_cfa_offset 8 + 96 .cfi_offset 4, -8 + 97 .cfi_offset 14, -4 + 98 0002 88B0 sub sp, sp, #32 + 99 .cfi_def_cfa_offset 40 + 100 0004 0400 movs r4, r0 + 90:Core/Src/stm32f0xx_hal_msp.c **** GPIO_InitTypeDef GPIO_InitStruct = {0}; + 101 .loc 1 90 3 is_stmt 1 view .LVU16 + 102 .loc 1 90 20 is_stmt 0 view .LVU17 + 103 0006 1422 movs r2, #20 + 104 0008 0021 movs r1, #0 + 105 000a 03A8 add r0, sp, #12 + 106 .LVL1: + 107 .loc 1 90 20 view .LVU18 + 108 000c FFF7FEFF bl memset + 109 .LVL2: + 91:Core/Src/stm32f0xx_hal_msp.c **** if(hadc->Instance==ADC1) + 110 .loc 1 91 3 is_stmt 1 view .LVU19 + 111 .loc 1 91 10 is_stmt 0 view .LVU20 + 112 0010 2268 ldr r2, [r4] + 113 .loc 1 91 5 view .LVU21 + 114 0012 104B ldr r3, .L7 + 115 0014 9A42 cmp r2, r3 + 116 0016 01D0 beq .L6 + 117 .L4: + 92:Core/Src/stm32f0xx_hal_msp.c **** { + 93:Core/Src/stm32f0xx_hal_msp.c **** /* USER CODE BEGIN ADC1_MspInit 0 */ + 94:Core/Src/stm32f0xx_hal_msp.c **** + 95:Core/Src/stm32f0xx_hal_msp.c **** /* USER CODE END ADC1_MspInit 0 */ + 96:Core/Src/stm32f0xx_hal_msp.c **** /* Peripheral clock enable */ + 97:Core/Src/stm32f0xx_hal_msp.c **** __HAL_RCC_ADC1_CLK_ENABLE(); + 98:Core/Src/stm32f0xx_hal_msp.c **** + 99:Core/Src/stm32f0xx_hal_msp.c **** __HAL_RCC_GPIOA_CLK_ENABLE(); + 100:Core/Src/stm32f0xx_hal_msp.c **** /**ADC GPIO Configuration + 101:Core/Src/stm32f0xx_hal_msp.c **** PA0 ------> ADC_IN0 + 102:Core/Src/stm32f0xx_hal_msp.c **** PA1 ------> ADC_IN1 + 103:Core/Src/stm32f0xx_hal_msp.c **** */ + 104:Core/Src/stm32f0xx_hal_msp.c **** GPIO_InitStruct.Pin = GPIO_PIN_0|GPIO_PIN_1; + 105:Core/Src/stm32f0xx_hal_msp.c **** GPIO_InitStruct.Mode = GPIO_MODE_ANALOG; + 106:Core/Src/stm32f0xx_hal_msp.c **** GPIO_InitStruct.Pull = GPIO_NOPULL; + 107:Core/Src/stm32f0xx_hal_msp.c **** HAL_GPIO_Init(GPIOA, &GPIO_InitStruct); + 108:Core/Src/stm32f0xx_hal_msp.c **** + 109:Core/Src/stm32f0xx_hal_msp.c **** /* USER CODE BEGIN ADC1_MspInit 1 */ + 110:Core/Src/stm32f0xx_hal_msp.c **** + 111:Core/Src/stm32f0xx_hal_msp.c **** /* USER CODE END ADC1_MspInit 1 */ + 112:Core/Src/stm32f0xx_hal_msp.c **** } + 113:Core/Src/stm32f0xx_hal_msp.c **** + 114:Core/Src/stm32f0xx_hal_msp.c **** } + ARM GAS /tmp/ccP9ub9v.s page 5 + + + 118 .loc 1 114 1 view .LVU22 + 119 0018 08B0 add sp, sp, #32 + 120 @ sp needed + 121 .LVL3: + 122 .loc 1 114 1 view .LVU23 + 123 001a 10BD pop {r4, pc} + 124 .LVL4: + 125 .L6: + 97:Core/Src/stm32f0xx_hal_msp.c **** + 126 .loc 1 97 5 is_stmt 1 view .LVU24 + 127 .LBB4: + 97:Core/Src/stm32f0xx_hal_msp.c **** + 128 .loc 1 97 5 view .LVU25 + 97:Core/Src/stm32f0xx_hal_msp.c **** + 129 .loc 1 97 5 view .LVU26 + 130 001c 0E4B ldr r3, .L7+4 + 131 001e 9A69 ldr r2, [r3, #24] + 132 0020 8021 movs r1, #128 + 133 0022 8900 lsls r1, r1, #2 + 134 0024 0A43 orrs r2, r1 + 135 0026 9A61 str r2, [r3, #24] + 97:Core/Src/stm32f0xx_hal_msp.c **** + 136 .loc 1 97 5 view .LVU27 + 137 0028 9A69 ldr r2, [r3, #24] + 138 002a 0A40 ands r2, r1 + 139 002c 0192 str r2, [sp, #4] + 97:Core/Src/stm32f0xx_hal_msp.c **** + 140 .loc 1 97 5 view .LVU28 + 141 002e 019A ldr r2, [sp, #4] + 142 .LBE4: + 97:Core/Src/stm32f0xx_hal_msp.c **** + 143 .loc 1 97 5 view .LVU29 + 99:Core/Src/stm32f0xx_hal_msp.c **** /**ADC GPIO Configuration + 144 .loc 1 99 5 view .LVU30 + 145 .LBB5: + 99:Core/Src/stm32f0xx_hal_msp.c **** /**ADC GPIO Configuration + 146 .loc 1 99 5 view .LVU31 + 99:Core/Src/stm32f0xx_hal_msp.c **** /**ADC GPIO Configuration + 147 .loc 1 99 5 view .LVU32 + 148 0030 5A69 ldr r2, [r3, #20] + 149 0032 8021 movs r1, #128 + 150 0034 8902 lsls r1, r1, #10 + 151 0036 0A43 orrs r2, r1 + 152 0038 5A61 str r2, [r3, #20] + 99:Core/Src/stm32f0xx_hal_msp.c **** /**ADC GPIO Configuration + 153 .loc 1 99 5 view .LVU33 + 154 003a 5B69 ldr r3, [r3, #20] + 155 003c 0B40 ands r3, r1 + 156 003e 0293 str r3, [sp, #8] + 99:Core/Src/stm32f0xx_hal_msp.c **** /**ADC GPIO Configuration + 157 .loc 1 99 5 view .LVU34 + 158 0040 029B ldr r3, [sp, #8] + 159 .LBE5: + 99:Core/Src/stm32f0xx_hal_msp.c **** /**ADC GPIO Configuration + 160 .loc 1 99 5 view .LVU35 + 104:Core/Src/stm32f0xx_hal_msp.c **** GPIO_InitStruct.Mode = GPIO_MODE_ANALOG; + 161 .loc 1 104 5 view .LVU36 + ARM GAS /tmp/ccP9ub9v.s page 6 + + + 104:Core/Src/stm32f0xx_hal_msp.c **** GPIO_InitStruct.Mode = GPIO_MODE_ANALOG; + 162 .loc 1 104 25 is_stmt 0 view .LVU37 + 163 0042 0323 movs r3, #3 + 164 0044 0393 str r3, [sp, #12] + 105:Core/Src/stm32f0xx_hal_msp.c **** GPIO_InitStruct.Pull = GPIO_NOPULL; + 165 .loc 1 105 5 is_stmt 1 view .LVU38 + 105:Core/Src/stm32f0xx_hal_msp.c **** GPIO_InitStruct.Pull = GPIO_NOPULL; + 166 .loc 1 105 26 is_stmt 0 view .LVU39 + 167 0046 0493 str r3, [sp, #16] + 106:Core/Src/stm32f0xx_hal_msp.c **** HAL_GPIO_Init(GPIOA, &GPIO_InitStruct); + 168 .loc 1 106 5 is_stmt 1 view .LVU40 + 107:Core/Src/stm32f0xx_hal_msp.c **** + 169 .loc 1 107 5 view .LVU41 + 170 0048 9020 movs r0, #144 + 171 004a 03A9 add r1, sp, #12 + 172 004c C005 lsls r0, r0, #23 + 173 004e FFF7FEFF bl HAL_GPIO_Init + 174 .LVL5: + 175 .loc 1 114 1 is_stmt 0 view .LVU42 + 176 0052 E1E7 b .L4 + 177 .L8: + 178 .align 2 + 179 .L7: + 180 0054 00240140 .word 1073816576 + 181 0058 00100240 .word 1073876992 + 182 .cfi_endproc + 183 .LFE41: + 185 .section .text.HAL_ADC_MspDeInit,"ax",%progbits + 186 .align 1 + 187 .global HAL_ADC_MspDeInit + 188 .syntax unified + 189 .code 16 + 190 .thumb_func + 192 HAL_ADC_MspDeInit: + 193 .LVL6: + 194 .LFB42: + 115:Core/Src/stm32f0xx_hal_msp.c **** + 116:Core/Src/stm32f0xx_hal_msp.c **** /** + 117:Core/Src/stm32f0xx_hal_msp.c **** * @brief ADC MSP De-Initialization + 118:Core/Src/stm32f0xx_hal_msp.c **** * This function freeze the hardware resources used in this example + 119:Core/Src/stm32f0xx_hal_msp.c **** * @param hadc: ADC handle pointer + 120:Core/Src/stm32f0xx_hal_msp.c **** * @retval None + 121:Core/Src/stm32f0xx_hal_msp.c **** */ + 122:Core/Src/stm32f0xx_hal_msp.c **** void HAL_ADC_MspDeInit(ADC_HandleTypeDef* hadc) + 123:Core/Src/stm32f0xx_hal_msp.c **** { + 195 .loc 1 123 1 is_stmt 1 view -0 + 196 .cfi_startproc + 197 @ args = 0, pretend = 0, frame = 0 + 198 @ frame_needed = 0, uses_anonymous_args = 0 + 199 .loc 1 123 1 is_stmt 0 view .LVU44 + 200 0000 10B5 push {r4, lr} + 201 .cfi_def_cfa_offset 8 + 202 .cfi_offset 4, -8 + 203 .cfi_offset 14, -4 + 124:Core/Src/stm32f0xx_hal_msp.c **** if(hadc->Instance==ADC1) + 204 .loc 1 124 3 is_stmt 1 view .LVU45 + 205 .loc 1 124 10 is_stmt 0 view .LVU46 + ARM GAS /tmp/ccP9ub9v.s page 7 + + + 206 0002 0268 ldr r2, [r0] + 207 .loc 1 124 5 view .LVU47 + 208 0004 074B ldr r3, .L12 + 209 0006 9A42 cmp r2, r3 + 210 0008 00D0 beq .L11 + 211 .LVL7: + 212 .L9: + 125:Core/Src/stm32f0xx_hal_msp.c **** { + 126:Core/Src/stm32f0xx_hal_msp.c **** /* USER CODE BEGIN ADC1_MspDeInit 0 */ + 127:Core/Src/stm32f0xx_hal_msp.c **** + 128:Core/Src/stm32f0xx_hal_msp.c **** /* USER CODE END ADC1_MspDeInit 0 */ + 129:Core/Src/stm32f0xx_hal_msp.c **** /* Peripheral clock disable */ + 130:Core/Src/stm32f0xx_hal_msp.c **** __HAL_RCC_ADC1_CLK_DISABLE(); + 131:Core/Src/stm32f0xx_hal_msp.c **** + 132:Core/Src/stm32f0xx_hal_msp.c **** /**ADC GPIO Configuration + 133:Core/Src/stm32f0xx_hal_msp.c **** PA0 ------> ADC_IN0 + 134:Core/Src/stm32f0xx_hal_msp.c **** PA1 ------> ADC_IN1 + 135:Core/Src/stm32f0xx_hal_msp.c **** */ + 136:Core/Src/stm32f0xx_hal_msp.c **** HAL_GPIO_DeInit(GPIOA, GPIO_PIN_0|GPIO_PIN_1); + 137:Core/Src/stm32f0xx_hal_msp.c **** + 138:Core/Src/stm32f0xx_hal_msp.c **** /* USER CODE BEGIN ADC1_MspDeInit 1 */ + 139:Core/Src/stm32f0xx_hal_msp.c **** + 140:Core/Src/stm32f0xx_hal_msp.c **** /* USER CODE END ADC1_MspDeInit 1 */ + 141:Core/Src/stm32f0xx_hal_msp.c **** } + 142:Core/Src/stm32f0xx_hal_msp.c **** + 143:Core/Src/stm32f0xx_hal_msp.c **** } + 213 .loc 1 143 1 view .LVU48 + 214 @ sp needed + 215 000a 10BD pop {r4, pc} + 216 .LVL8: + 217 .L11: + 130:Core/Src/stm32f0xx_hal_msp.c **** + 218 .loc 1 130 5 is_stmt 1 view .LVU49 + 219 000c 064A ldr r2, .L12+4 + 220 000e 9369 ldr r3, [r2, #24] + 221 0010 0649 ldr r1, .L12+8 + 222 0012 0B40 ands r3, r1 + 223 0014 9361 str r3, [r2, #24] + 136:Core/Src/stm32f0xx_hal_msp.c **** + 224 .loc 1 136 5 view .LVU50 + 225 0016 9020 movs r0, #144 + 226 .LVL9: + 136:Core/Src/stm32f0xx_hal_msp.c **** + 227 .loc 1 136 5 is_stmt 0 view .LVU51 + 228 0018 0321 movs r1, #3 + 229 001a C005 lsls r0, r0, #23 + 230 001c FFF7FEFF bl HAL_GPIO_DeInit + 231 .LVL10: + 232 .loc 1 143 1 view .LVU52 + 233 0020 F3E7 b .L9 + 234 .L13: + 235 0022 C046 .align 2 + 236 .L12: + 237 0024 00240140 .word 1073816576 + 238 0028 00100240 .word 1073876992 + 239 002c FFFDFFFF .word -513 + 240 .cfi_endproc + ARM GAS /tmp/ccP9ub9v.s page 8 + + + 241 .LFE42: + 243 .section .text.HAL_CAN_MspInit,"ax",%progbits + 244 .align 1 + 245 .global HAL_CAN_MspInit + 246 .syntax unified + 247 .code 16 + 248 .thumb_func + 250 HAL_CAN_MspInit: + 251 .LVL11: + 252 .LFB43: + 144:Core/Src/stm32f0xx_hal_msp.c **** + 145:Core/Src/stm32f0xx_hal_msp.c **** /** + 146:Core/Src/stm32f0xx_hal_msp.c **** * @brief CAN MSP Initialization + 147:Core/Src/stm32f0xx_hal_msp.c **** * This function configures the hardware resources used in this example + 148:Core/Src/stm32f0xx_hal_msp.c **** * @param hcan: CAN handle pointer + 149:Core/Src/stm32f0xx_hal_msp.c **** * @retval None + 150:Core/Src/stm32f0xx_hal_msp.c **** */ + 151:Core/Src/stm32f0xx_hal_msp.c **** void HAL_CAN_MspInit(CAN_HandleTypeDef* hcan) + 152:Core/Src/stm32f0xx_hal_msp.c **** { + 253 .loc 1 152 1 is_stmt 1 view -0 + 254 .cfi_startproc + 255 @ args = 0, pretend = 0, frame = 32 + 256 @ frame_needed = 0, uses_anonymous_args = 0 + 257 .loc 1 152 1 is_stmt 0 view .LVU54 + 258 0000 10B5 push {r4, lr} + 259 .cfi_def_cfa_offset 8 + 260 .cfi_offset 4, -8 + 261 .cfi_offset 14, -4 + 262 0002 88B0 sub sp, sp, #32 + 263 .cfi_def_cfa_offset 40 + 264 0004 0400 movs r4, r0 + 153:Core/Src/stm32f0xx_hal_msp.c **** GPIO_InitTypeDef GPIO_InitStruct = {0}; + 265 .loc 1 153 3 is_stmt 1 view .LVU55 + 266 .loc 1 153 20 is_stmt 0 view .LVU56 + 267 0006 1422 movs r2, #20 + 268 0008 0021 movs r1, #0 + 269 000a 03A8 add r0, sp, #12 + 270 .LVL12: + 271 .loc 1 153 20 view .LVU57 + 272 000c FFF7FEFF bl memset + 273 .LVL13: + 154:Core/Src/stm32f0xx_hal_msp.c **** if(hcan->Instance==CAN) + 274 .loc 1 154 3 is_stmt 1 view .LVU58 + 275 .loc 1 154 10 is_stmt 0 view .LVU59 + 276 0010 2268 ldr r2, [r4] + 277 .loc 1 154 5 view .LVU60 + 278 0012 134B ldr r3, .L17 + 279 0014 9A42 cmp r2, r3 + 280 0016 01D0 beq .L16 + 281 .L14: + 155:Core/Src/stm32f0xx_hal_msp.c **** { + 156:Core/Src/stm32f0xx_hal_msp.c **** /* USER CODE BEGIN CAN_MspInit 0 */ + 157:Core/Src/stm32f0xx_hal_msp.c **** + 158:Core/Src/stm32f0xx_hal_msp.c **** /* USER CODE END CAN_MspInit 0 */ + 159:Core/Src/stm32f0xx_hal_msp.c **** /* Peripheral clock enable */ + 160:Core/Src/stm32f0xx_hal_msp.c **** __HAL_RCC_CAN1_CLK_ENABLE(); + 161:Core/Src/stm32f0xx_hal_msp.c **** + ARM GAS /tmp/ccP9ub9v.s page 9 + + + 162:Core/Src/stm32f0xx_hal_msp.c **** __HAL_RCC_GPIOA_CLK_ENABLE(); + 163:Core/Src/stm32f0xx_hal_msp.c **** /**CAN GPIO Configuration + 164:Core/Src/stm32f0xx_hal_msp.c **** PA11 ------> CAN_RX + 165:Core/Src/stm32f0xx_hal_msp.c **** PA12 ------> CAN_TX + 166:Core/Src/stm32f0xx_hal_msp.c **** */ + 167:Core/Src/stm32f0xx_hal_msp.c **** GPIO_InitStruct.Pin = GPIO_PIN_11|GPIO_PIN_12; + 168:Core/Src/stm32f0xx_hal_msp.c **** GPIO_InitStruct.Mode = GPIO_MODE_AF_PP; + 169:Core/Src/stm32f0xx_hal_msp.c **** GPIO_InitStruct.Pull = GPIO_NOPULL; + 170:Core/Src/stm32f0xx_hal_msp.c **** GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_HIGH; + 171:Core/Src/stm32f0xx_hal_msp.c **** GPIO_InitStruct.Alternate = GPIO_AF4_CAN; + 172:Core/Src/stm32f0xx_hal_msp.c **** HAL_GPIO_Init(GPIOA, &GPIO_InitStruct); + 173:Core/Src/stm32f0xx_hal_msp.c **** + 174:Core/Src/stm32f0xx_hal_msp.c **** /* USER CODE BEGIN CAN_MspInit 1 */ + 175:Core/Src/stm32f0xx_hal_msp.c **** + 176:Core/Src/stm32f0xx_hal_msp.c **** /* USER CODE END CAN_MspInit 1 */ + 177:Core/Src/stm32f0xx_hal_msp.c **** } + 178:Core/Src/stm32f0xx_hal_msp.c **** + 179:Core/Src/stm32f0xx_hal_msp.c **** } + 282 .loc 1 179 1 view .LVU61 + 283 0018 08B0 add sp, sp, #32 + 284 @ sp needed + 285 .LVL14: + 286 .loc 1 179 1 view .LVU62 + 287 001a 10BD pop {r4, pc} + 288 .LVL15: + 289 .L16: + 160:Core/Src/stm32f0xx_hal_msp.c **** + 290 .loc 1 160 5 is_stmt 1 view .LVU63 + 291 .LBB6: + 160:Core/Src/stm32f0xx_hal_msp.c **** + 292 .loc 1 160 5 view .LVU64 + 160:Core/Src/stm32f0xx_hal_msp.c **** + 293 .loc 1 160 5 view .LVU65 + 294 001c 114B ldr r3, .L17+4 + 295 001e DA69 ldr r2, [r3, #28] + 296 0020 8021 movs r1, #128 + 297 0022 8904 lsls r1, r1, #18 + 298 0024 0A43 orrs r2, r1 + 299 0026 DA61 str r2, [r3, #28] + 160:Core/Src/stm32f0xx_hal_msp.c **** + 300 .loc 1 160 5 view .LVU66 + 301 0028 DA69 ldr r2, [r3, #28] + 302 002a 0A40 ands r2, r1 + 303 002c 0192 str r2, [sp, #4] + 160:Core/Src/stm32f0xx_hal_msp.c **** + 304 .loc 1 160 5 view .LVU67 + 305 002e 019A ldr r2, [sp, #4] + 306 .LBE6: + 160:Core/Src/stm32f0xx_hal_msp.c **** + 307 .loc 1 160 5 view .LVU68 + 162:Core/Src/stm32f0xx_hal_msp.c **** /**CAN GPIO Configuration + 308 .loc 1 162 5 view .LVU69 + 309 .LBB7: + 162:Core/Src/stm32f0xx_hal_msp.c **** /**CAN GPIO Configuration + 310 .loc 1 162 5 view .LVU70 + 162:Core/Src/stm32f0xx_hal_msp.c **** /**CAN GPIO Configuration + 311 .loc 1 162 5 view .LVU71 + ARM GAS /tmp/ccP9ub9v.s page 10 + + + 312 0030 5A69 ldr r2, [r3, #20] + 313 0032 8021 movs r1, #128 + 314 0034 8902 lsls r1, r1, #10 + 315 0036 0A43 orrs r2, r1 + 316 0038 5A61 str r2, [r3, #20] + 162:Core/Src/stm32f0xx_hal_msp.c **** /**CAN GPIO Configuration + 317 .loc 1 162 5 view .LVU72 + 318 003a 5B69 ldr r3, [r3, #20] + 319 003c 0B40 ands r3, r1 + 320 003e 0293 str r3, [sp, #8] + 162:Core/Src/stm32f0xx_hal_msp.c **** /**CAN GPIO Configuration + 321 .loc 1 162 5 view .LVU73 + 322 0040 029B ldr r3, [sp, #8] + 323 .LBE7: + 162:Core/Src/stm32f0xx_hal_msp.c **** /**CAN GPIO Configuration + 324 .loc 1 162 5 view .LVU74 + 167:Core/Src/stm32f0xx_hal_msp.c **** GPIO_InitStruct.Mode = GPIO_MODE_AF_PP; + 325 .loc 1 167 5 view .LVU75 + 167:Core/Src/stm32f0xx_hal_msp.c **** GPIO_InitStruct.Mode = GPIO_MODE_AF_PP; + 326 .loc 1 167 25 is_stmt 0 view .LVU76 + 327 0042 C023 movs r3, #192 + 328 0044 5B01 lsls r3, r3, #5 + 329 0046 0393 str r3, [sp, #12] + 168:Core/Src/stm32f0xx_hal_msp.c **** GPIO_InitStruct.Pull = GPIO_NOPULL; + 330 .loc 1 168 5 is_stmt 1 view .LVU77 + 168:Core/Src/stm32f0xx_hal_msp.c **** GPIO_InitStruct.Pull = GPIO_NOPULL; + 331 .loc 1 168 26 is_stmt 0 view .LVU78 + 332 0048 0223 movs r3, #2 + 333 004a 0493 str r3, [sp, #16] + 169:Core/Src/stm32f0xx_hal_msp.c **** GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_HIGH; + 334 .loc 1 169 5 is_stmt 1 view .LVU79 + 170:Core/Src/stm32f0xx_hal_msp.c **** GPIO_InitStruct.Alternate = GPIO_AF4_CAN; + 335 .loc 1 170 5 view .LVU80 + 170:Core/Src/stm32f0xx_hal_msp.c **** GPIO_InitStruct.Alternate = GPIO_AF4_CAN; + 336 .loc 1 170 27 is_stmt 0 view .LVU81 + 337 004c 0133 adds r3, r3, #1 + 338 004e 0693 str r3, [sp, #24] + 171:Core/Src/stm32f0xx_hal_msp.c **** HAL_GPIO_Init(GPIOA, &GPIO_InitStruct); + 339 .loc 1 171 5 is_stmt 1 view .LVU82 + 171:Core/Src/stm32f0xx_hal_msp.c **** HAL_GPIO_Init(GPIOA, &GPIO_InitStruct); + 340 .loc 1 171 31 is_stmt 0 view .LVU83 + 341 0050 0133 adds r3, r3, #1 + 342 0052 0793 str r3, [sp, #28] + 172:Core/Src/stm32f0xx_hal_msp.c **** + 343 .loc 1 172 5 is_stmt 1 view .LVU84 + 344 0054 9020 movs r0, #144 + 345 0056 03A9 add r1, sp, #12 + 346 0058 C005 lsls r0, r0, #23 + 347 005a FFF7FEFF bl HAL_GPIO_Init + 348 .LVL16: + 349 .loc 1 179 1 is_stmt 0 view .LVU85 + 350 005e DBE7 b .L14 + 351 .L18: + 352 .align 2 + 353 .L17: + 354 0060 00640040 .word 1073767424 + 355 0064 00100240 .word 1073876992 + ARM GAS /tmp/ccP9ub9v.s page 11 + + + 356 .cfi_endproc + 357 .LFE43: + 359 .section .text.HAL_CAN_MspDeInit,"ax",%progbits + 360 .align 1 + 361 .global HAL_CAN_MspDeInit + 362 .syntax unified + 363 .code 16 + 364 .thumb_func + 366 HAL_CAN_MspDeInit: + 367 .LVL17: + 368 .LFB44: + 180:Core/Src/stm32f0xx_hal_msp.c **** + 181:Core/Src/stm32f0xx_hal_msp.c **** /** + 182:Core/Src/stm32f0xx_hal_msp.c **** * @brief CAN MSP De-Initialization + 183:Core/Src/stm32f0xx_hal_msp.c **** * This function freeze the hardware resources used in this example + 184:Core/Src/stm32f0xx_hal_msp.c **** * @param hcan: CAN handle pointer + 185:Core/Src/stm32f0xx_hal_msp.c **** * @retval None + 186:Core/Src/stm32f0xx_hal_msp.c **** */ + 187:Core/Src/stm32f0xx_hal_msp.c **** void HAL_CAN_MspDeInit(CAN_HandleTypeDef* hcan) + 188:Core/Src/stm32f0xx_hal_msp.c **** { + 369 .loc 1 188 1 is_stmt 1 view -0 + 370 .cfi_startproc + 371 @ args = 0, pretend = 0, frame = 0 + 372 @ frame_needed = 0, uses_anonymous_args = 0 + 373 .loc 1 188 1 is_stmt 0 view .LVU87 + 374 0000 10B5 push {r4, lr} + 375 .cfi_def_cfa_offset 8 + 376 .cfi_offset 4, -8 + 377 .cfi_offset 14, -4 + 189:Core/Src/stm32f0xx_hal_msp.c **** if(hcan->Instance==CAN) + 378 .loc 1 189 3 is_stmt 1 view .LVU88 + 379 .loc 1 189 10 is_stmt 0 view .LVU89 + 380 0002 0268 ldr r2, [r0] + 381 .loc 1 189 5 view .LVU90 + 382 0004 074B ldr r3, .L22 + 383 0006 9A42 cmp r2, r3 + 384 0008 00D0 beq .L21 + 385 .LVL18: + 386 .L19: + 190:Core/Src/stm32f0xx_hal_msp.c **** { + 191:Core/Src/stm32f0xx_hal_msp.c **** /* USER CODE BEGIN CAN_MspDeInit 0 */ + 192:Core/Src/stm32f0xx_hal_msp.c **** + 193:Core/Src/stm32f0xx_hal_msp.c **** /* USER CODE END CAN_MspDeInit 0 */ + 194:Core/Src/stm32f0xx_hal_msp.c **** /* Peripheral clock disable */ + 195:Core/Src/stm32f0xx_hal_msp.c **** __HAL_RCC_CAN1_CLK_DISABLE(); + 196:Core/Src/stm32f0xx_hal_msp.c **** + 197:Core/Src/stm32f0xx_hal_msp.c **** /**CAN GPIO Configuration + 198:Core/Src/stm32f0xx_hal_msp.c **** PA11 ------> CAN_RX + 199:Core/Src/stm32f0xx_hal_msp.c **** PA12 ------> CAN_TX + 200:Core/Src/stm32f0xx_hal_msp.c **** */ + 201:Core/Src/stm32f0xx_hal_msp.c **** HAL_GPIO_DeInit(GPIOA, GPIO_PIN_11|GPIO_PIN_12); + 202:Core/Src/stm32f0xx_hal_msp.c **** + 203:Core/Src/stm32f0xx_hal_msp.c **** /* USER CODE BEGIN CAN_MspDeInit 1 */ + 204:Core/Src/stm32f0xx_hal_msp.c **** + 205:Core/Src/stm32f0xx_hal_msp.c **** /* USER CODE END CAN_MspDeInit 1 */ + 206:Core/Src/stm32f0xx_hal_msp.c **** } + 207:Core/Src/stm32f0xx_hal_msp.c **** + ARM GAS /tmp/ccP9ub9v.s page 12 + + + 208:Core/Src/stm32f0xx_hal_msp.c **** } + 387 .loc 1 208 1 view .LVU91 + 388 @ sp needed + 389 000a 10BD pop {r4, pc} + 390 .LVL19: + 391 .L21: + 195:Core/Src/stm32f0xx_hal_msp.c **** + 392 .loc 1 195 5 is_stmt 1 view .LVU92 + 393 000c 064A ldr r2, .L22+4 + 394 000e D369 ldr r3, [r2, #28] + 395 0010 0649 ldr r1, .L22+8 + 396 0012 0B40 ands r3, r1 + 397 0014 D361 str r3, [r2, #28] + 201:Core/Src/stm32f0xx_hal_msp.c **** + 398 .loc 1 201 5 view .LVU93 + 399 0016 C021 movs r1, #192 + 400 0018 9020 movs r0, #144 + 401 .LVL20: + 201:Core/Src/stm32f0xx_hal_msp.c **** + 402 .loc 1 201 5 is_stmt 0 view .LVU94 + 403 001a 4901 lsls r1, r1, #5 + 404 001c C005 lsls r0, r0, #23 + 405 001e FFF7FEFF bl HAL_GPIO_DeInit + 406 .LVL21: + 407 .loc 1 208 1 view .LVU95 + 408 0022 F2E7 b .L19 + 409 .L23: + 410 .align 2 + 411 .L22: + 412 0024 00640040 .word 1073767424 + 413 0028 00100240 .word 1073876992 + 414 002c FFFFFFFD .word -33554433 + 415 .cfi_endproc + 416 .LFE44: + 418 .section .text.HAL_TIM_Base_MspInit,"ax",%progbits + 419 .align 1 + 420 .global HAL_TIM_Base_MspInit + 421 .syntax unified + 422 .code 16 + 423 .thumb_func + 425 HAL_TIM_Base_MspInit: + 426 .LVL22: + 427 .LFB45: + 209:Core/Src/stm32f0xx_hal_msp.c **** + 210:Core/Src/stm32f0xx_hal_msp.c **** /** + 211:Core/Src/stm32f0xx_hal_msp.c **** * @brief TIM_Base MSP Initialization + 212:Core/Src/stm32f0xx_hal_msp.c **** * This function configures the hardware resources used in this example + 213:Core/Src/stm32f0xx_hal_msp.c **** * @param htim_base: TIM_Base handle pointer + 214:Core/Src/stm32f0xx_hal_msp.c **** * @retval None + 215:Core/Src/stm32f0xx_hal_msp.c **** */ + 216:Core/Src/stm32f0xx_hal_msp.c **** void HAL_TIM_Base_MspInit(TIM_HandleTypeDef* htim_base) + 217:Core/Src/stm32f0xx_hal_msp.c **** { + 428 .loc 1 217 1 is_stmt 1 view -0 + 429 .cfi_startproc + 430 @ args = 0, pretend = 0, frame = 8 + 431 @ frame_needed = 0, uses_anonymous_args = 0 + 432 @ link register save eliminated. + ARM GAS /tmp/ccP9ub9v.s page 13 + + + 433 .loc 1 217 1 is_stmt 0 view .LVU97 + 434 0000 82B0 sub sp, sp, #8 + 435 .cfi_def_cfa_offset 8 + 218:Core/Src/stm32f0xx_hal_msp.c **** if(htim_base->Instance==TIM2) + 436 .loc 1 218 3 is_stmt 1 view .LVU98 + 437 .loc 1 218 15 is_stmt 0 view .LVU99 + 438 0002 0268 ldr r2, [r0] + 439 .loc 1 218 5 view .LVU100 + 440 0004 8023 movs r3, #128 + 441 0006 DB05 lsls r3, r3, #23 + 442 0008 9A42 cmp r2, r3 + 443 000a 01D0 beq .L26 + 444 .L24: + 219:Core/Src/stm32f0xx_hal_msp.c **** { + 220:Core/Src/stm32f0xx_hal_msp.c **** /* USER CODE BEGIN TIM2_MspInit 0 */ + 221:Core/Src/stm32f0xx_hal_msp.c **** + 222:Core/Src/stm32f0xx_hal_msp.c **** /* USER CODE END TIM2_MspInit 0 */ + 223:Core/Src/stm32f0xx_hal_msp.c **** /* Peripheral clock enable */ + 224:Core/Src/stm32f0xx_hal_msp.c **** __HAL_RCC_TIM2_CLK_ENABLE(); + 225:Core/Src/stm32f0xx_hal_msp.c **** /* USER CODE BEGIN TIM2_MspInit 1 */ + 226:Core/Src/stm32f0xx_hal_msp.c **** + 227:Core/Src/stm32f0xx_hal_msp.c **** /* USER CODE END TIM2_MspInit 1 */ + 228:Core/Src/stm32f0xx_hal_msp.c **** } + 229:Core/Src/stm32f0xx_hal_msp.c **** + 230:Core/Src/stm32f0xx_hal_msp.c **** } + 445 .loc 1 230 1 view .LVU101 + 446 000c 02B0 add sp, sp, #8 + 447 @ sp needed + 448 000e 7047 bx lr + 449 .L26: + 224:Core/Src/stm32f0xx_hal_msp.c **** /* USER CODE BEGIN TIM2_MspInit 1 */ + 450 .loc 1 224 5 is_stmt 1 view .LVU102 + 451 .LBB8: + 224:Core/Src/stm32f0xx_hal_msp.c **** /* USER CODE BEGIN TIM2_MspInit 1 */ + 452 .loc 1 224 5 view .LVU103 + 224:Core/Src/stm32f0xx_hal_msp.c **** /* USER CODE BEGIN TIM2_MspInit 1 */ + 453 .loc 1 224 5 view .LVU104 + 454 0010 044A ldr r2, .L27 + 455 0012 D169 ldr r1, [r2, #28] + 456 0014 0123 movs r3, #1 + 457 0016 1943 orrs r1, r3 + 458 0018 D161 str r1, [r2, #28] + 224:Core/Src/stm32f0xx_hal_msp.c **** /* USER CODE BEGIN TIM2_MspInit 1 */ + 459 .loc 1 224 5 view .LVU105 + 460 001a D269 ldr r2, [r2, #28] + 461 001c 1340 ands r3, r2 + 462 001e 0193 str r3, [sp, #4] + 224:Core/Src/stm32f0xx_hal_msp.c **** /* USER CODE BEGIN TIM2_MspInit 1 */ + 463 .loc 1 224 5 view .LVU106 + 464 0020 019B ldr r3, [sp, #4] + 465 .LBE8: + 224:Core/Src/stm32f0xx_hal_msp.c **** /* USER CODE BEGIN TIM2_MspInit 1 */ + 466 .loc 1 224 5 discriminator 1 view .LVU107 + 467 .loc 1 230 1 is_stmt 0 view .LVU108 + 468 0022 F3E7 b .L24 + 469 .L28: + 470 .align 2 + ARM GAS /tmp/ccP9ub9v.s page 14 + + + 471 .L27: + 472 0024 00100240 .word 1073876992 + 473 .cfi_endproc + 474 .LFE45: + 476 .section .text.HAL_TIM_MspPostInit,"ax",%progbits + 477 .align 1 + 478 .global HAL_TIM_MspPostInit + 479 .syntax unified + 480 .code 16 + 481 .thumb_func + 483 HAL_TIM_MspPostInit: + 484 .LVL23: + 485 .LFB46: + 231:Core/Src/stm32f0xx_hal_msp.c **** + 232:Core/Src/stm32f0xx_hal_msp.c **** void HAL_TIM_MspPostInit(TIM_HandleTypeDef* htim) + 233:Core/Src/stm32f0xx_hal_msp.c **** { + 486 .loc 1 233 1 is_stmt 1 view -0 + 487 .cfi_startproc + 488 @ args = 0, pretend = 0, frame = 32 + 489 @ frame_needed = 0, uses_anonymous_args = 0 + 490 .loc 1 233 1 is_stmt 0 view .LVU110 + 491 0000 10B5 push {r4, lr} + 492 .cfi_def_cfa_offset 8 + 493 .cfi_offset 4, -8 + 494 .cfi_offset 14, -4 + 495 0002 88B0 sub sp, sp, #32 + 496 .cfi_def_cfa_offset 40 + 497 0004 0400 movs r4, r0 + 234:Core/Src/stm32f0xx_hal_msp.c **** GPIO_InitTypeDef GPIO_InitStruct = {0}; + 498 .loc 1 234 3 is_stmt 1 view .LVU111 + 499 .loc 1 234 20 is_stmt 0 view .LVU112 + 500 0006 1422 movs r2, #20 + 501 0008 0021 movs r1, #0 + 502 000a 03A8 add r0, sp, #12 + 503 .LVL24: + 504 .loc 1 234 20 view .LVU113 + 505 000c FFF7FEFF bl memset + 506 .LVL25: + 235:Core/Src/stm32f0xx_hal_msp.c **** if(htim->Instance==TIM2) + 507 .loc 1 235 3 is_stmt 1 view .LVU114 + 508 .loc 1 235 10 is_stmt 0 view .LVU115 + 509 0010 2268 ldr r2, [r4] + 510 .loc 1 235 5 view .LVU116 + 511 0012 8023 movs r3, #128 + 512 0014 DB05 lsls r3, r3, #23 + 513 0016 9A42 cmp r2, r3 + 514 0018 01D0 beq .L31 + 515 .LVL26: + 516 .L29: + 236:Core/Src/stm32f0xx_hal_msp.c **** { + 237:Core/Src/stm32f0xx_hal_msp.c **** /* USER CODE BEGIN TIM2_MspPostInit 0 */ + 238:Core/Src/stm32f0xx_hal_msp.c **** + 239:Core/Src/stm32f0xx_hal_msp.c **** /* USER CODE END TIM2_MspPostInit 0 */ + 240:Core/Src/stm32f0xx_hal_msp.c **** + 241:Core/Src/stm32f0xx_hal_msp.c **** __HAL_RCC_GPIOA_CLK_ENABLE(); + 242:Core/Src/stm32f0xx_hal_msp.c **** __HAL_RCC_GPIOB_CLK_ENABLE(); + 243:Core/Src/stm32f0xx_hal_msp.c **** /**TIM2 GPIO Configuration + ARM GAS /tmp/ccP9ub9v.s page 15 + + + 244:Core/Src/stm32f0xx_hal_msp.c **** PA2 ------> TIM2_CH3 + 245:Core/Src/stm32f0xx_hal_msp.c **** PA5 ------> TIM2_CH1 + 246:Core/Src/stm32f0xx_hal_msp.c **** PB3 ------> TIM2_CH2 + 247:Core/Src/stm32f0xx_hal_msp.c **** */ + 248:Core/Src/stm32f0xx_hal_msp.c **** GPIO_InitStruct.Pin = GPIO_PIN_2|GPIO_PIN_5; + 249:Core/Src/stm32f0xx_hal_msp.c **** GPIO_InitStruct.Mode = GPIO_MODE_AF_PP; + 250:Core/Src/stm32f0xx_hal_msp.c **** GPIO_InitStruct.Pull = GPIO_NOPULL; + 251:Core/Src/stm32f0xx_hal_msp.c **** GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_LOW; + 252:Core/Src/stm32f0xx_hal_msp.c **** GPIO_InitStruct.Alternate = GPIO_AF2_TIM2; + 253:Core/Src/stm32f0xx_hal_msp.c **** HAL_GPIO_Init(GPIOA, &GPIO_InitStruct); + 254:Core/Src/stm32f0xx_hal_msp.c **** + 255:Core/Src/stm32f0xx_hal_msp.c **** GPIO_InitStruct.Pin = GPIO_PIN_3; + 256:Core/Src/stm32f0xx_hal_msp.c **** GPIO_InitStruct.Mode = GPIO_MODE_AF_PP; + 257:Core/Src/stm32f0xx_hal_msp.c **** GPIO_InitStruct.Pull = GPIO_NOPULL; + 258:Core/Src/stm32f0xx_hal_msp.c **** GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_LOW; + 259:Core/Src/stm32f0xx_hal_msp.c **** GPIO_InitStruct.Alternate = GPIO_AF2_TIM2; + 260:Core/Src/stm32f0xx_hal_msp.c **** HAL_GPIO_Init(GPIOB, &GPIO_InitStruct); + 261:Core/Src/stm32f0xx_hal_msp.c **** + 262:Core/Src/stm32f0xx_hal_msp.c **** /* USER CODE BEGIN TIM2_MspPostInit 1 */ + 263:Core/Src/stm32f0xx_hal_msp.c **** + 264:Core/Src/stm32f0xx_hal_msp.c **** /* USER CODE END TIM2_MspPostInit 1 */ + 265:Core/Src/stm32f0xx_hal_msp.c **** } + 266:Core/Src/stm32f0xx_hal_msp.c **** + 267:Core/Src/stm32f0xx_hal_msp.c **** } + 517 .loc 1 267 1 view .LVU117 + 518 001a 08B0 add sp, sp, #32 + 519 @ sp needed + 520 001c 10BD pop {r4, pc} + 521 .LVL27: + 522 .L31: + 241:Core/Src/stm32f0xx_hal_msp.c **** __HAL_RCC_GPIOB_CLK_ENABLE(); + 523 .loc 1 241 5 is_stmt 1 view .LVU118 + 524 .LBB9: + 241:Core/Src/stm32f0xx_hal_msp.c **** __HAL_RCC_GPIOB_CLK_ENABLE(); + 525 .loc 1 241 5 view .LVU119 + 241:Core/Src/stm32f0xx_hal_msp.c **** __HAL_RCC_GPIOB_CLK_ENABLE(); + 526 .loc 1 241 5 view .LVU120 + 527 001e 144B ldr r3, .L32 + 528 0020 5A69 ldr r2, [r3, #20] + 529 0022 8021 movs r1, #128 + 530 0024 8902 lsls r1, r1, #10 + 531 0026 0A43 orrs r2, r1 + 532 0028 5A61 str r2, [r3, #20] + 241:Core/Src/stm32f0xx_hal_msp.c **** __HAL_RCC_GPIOB_CLK_ENABLE(); + 533 .loc 1 241 5 view .LVU121 + 534 002a 5A69 ldr r2, [r3, #20] + 535 002c 0A40 ands r2, r1 + 536 002e 0192 str r2, [sp, #4] + 241:Core/Src/stm32f0xx_hal_msp.c **** __HAL_RCC_GPIOB_CLK_ENABLE(); + 537 .loc 1 241 5 view .LVU122 + 538 0030 019A ldr r2, [sp, #4] + 539 .LBE9: + 241:Core/Src/stm32f0xx_hal_msp.c **** __HAL_RCC_GPIOB_CLK_ENABLE(); + 540 .loc 1 241 5 view .LVU123 + 242:Core/Src/stm32f0xx_hal_msp.c **** /**TIM2 GPIO Configuration + 541 .loc 1 242 5 view .LVU124 + 542 .LBB10: + ARM GAS /tmp/ccP9ub9v.s page 16 + + + 242:Core/Src/stm32f0xx_hal_msp.c **** /**TIM2 GPIO Configuration + 543 .loc 1 242 5 view .LVU125 + 242:Core/Src/stm32f0xx_hal_msp.c **** /**TIM2 GPIO Configuration + 544 .loc 1 242 5 view .LVU126 + 545 0032 5A69 ldr r2, [r3, #20] + 546 0034 8021 movs r1, #128 + 547 0036 C902 lsls r1, r1, #11 + 548 0038 0A43 orrs r2, r1 + 549 003a 5A61 str r2, [r3, #20] + 242:Core/Src/stm32f0xx_hal_msp.c **** /**TIM2 GPIO Configuration + 550 .loc 1 242 5 view .LVU127 + 551 003c 5B69 ldr r3, [r3, #20] + 552 003e 0B40 ands r3, r1 + 553 0040 0293 str r3, [sp, #8] + 242:Core/Src/stm32f0xx_hal_msp.c **** /**TIM2 GPIO Configuration + 554 .loc 1 242 5 view .LVU128 + 555 0042 029B ldr r3, [sp, #8] + 556 .LBE10: + 242:Core/Src/stm32f0xx_hal_msp.c **** /**TIM2 GPIO Configuration + 557 .loc 1 242 5 view .LVU129 + 248:Core/Src/stm32f0xx_hal_msp.c **** GPIO_InitStruct.Mode = GPIO_MODE_AF_PP; + 558 .loc 1 248 5 view .LVU130 + 248:Core/Src/stm32f0xx_hal_msp.c **** GPIO_InitStruct.Mode = GPIO_MODE_AF_PP; + 559 .loc 1 248 25 is_stmt 0 view .LVU131 + 560 0044 2423 movs r3, #36 + 561 0046 0393 str r3, [sp, #12] + 249:Core/Src/stm32f0xx_hal_msp.c **** GPIO_InitStruct.Pull = GPIO_NOPULL; + 562 .loc 1 249 5 is_stmt 1 view .LVU132 + 249:Core/Src/stm32f0xx_hal_msp.c **** GPIO_InitStruct.Pull = GPIO_NOPULL; + 563 .loc 1 249 26 is_stmt 0 view .LVU133 + 564 0048 0224 movs r4, #2 + 565 .LVL28: + 249:Core/Src/stm32f0xx_hal_msp.c **** GPIO_InitStruct.Pull = GPIO_NOPULL; + 566 .loc 1 249 26 view .LVU134 + 567 004a 0494 str r4, [sp, #16] + 250:Core/Src/stm32f0xx_hal_msp.c **** GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_LOW; + 568 .loc 1 250 5 is_stmt 1 view .LVU135 + 251:Core/Src/stm32f0xx_hal_msp.c **** GPIO_InitStruct.Alternate = GPIO_AF2_TIM2; + 569 .loc 1 251 5 view .LVU136 + 252:Core/Src/stm32f0xx_hal_msp.c **** HAL_GPIO_Init(GPIOA, &GPIO_InitStruct); + 570 .loc 1 252 5 view .LVU137 + 252:Core/Src/stm32f0xx_hal_msp.c **** HAL_GPIO_Init(GPIOA, &GPIO_InitStruct); + 571 .loc 1 252 31 is_stmt 0 view .LVU138 + 572 004c 0794 str r4, [sp, #28] + 253:Core/Src/stm32f0xx_hal_msp.c **** + 573 .loc 1 253 5 is_stmt 1 view .LVU139 + 574 004e 9020 movs r0, #144 + 575 0050 03A9 add r1, sp, #12 + 576 0052 C005 lsls r0, r0, #23 + 577 0054 FFF7FEFF bl HAL_GPIO_Init + 578 .LVL29: + 255:Core/Src/stm32f0xx_hal_msp.c **** GPIO_InitStruct.Mode = GPIO_MODE_AF_PP; + 579 .loc 1 255 5 view .LVU140 + 255:Core/Src/stm32f0xx_hal_msp.c **** GPIO_InitStruct.Mode = GPIO_MODE_AF_PP; + 580 .loc 1 255 25 is_stmt 0 view .LVU141 + 581 0058 0823 movs r3, #8 + 582 005a 0393 str r3, [sp, #12] + ARM GAS /tmp/ccP9ub9v.s page 17 + + + 256:Core/Src/stm32f0xx_hal_msp.c **** GPIO_InitStruct.Pull = GPIO_NOPULL; + 583 .loc 1 256 5 is_stmt 1 view .LVU142 + 256:Core/Src/stm32f0xx_hal_msp.c **** GPIO_InitStruct.Pull = GPIO_NOPULL; + 584 .loc 1 256 26 is_stmt 0 view .LVU143 + 585 005c 0494 str r4, [sp, #16] + 257:Core/Src/stm32f0xx_hal_msp.c **** GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_LOW; + 586 .loc 1 257 5 is_stmt 1 view .LVU144 + 257:Core/Src/stm32f0xx_hal_msp.c **** GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_LOW; + 587 .loc 1 257 26 is_stmt 0 view .LVU145 + 588 005e 0023 movs r3, #0 + 589 0060 0593 str r3, [sp, #20] + 258:Core/Src/stm32f0xx_hal_msp.c **** GPIO_InitStruct.Alternate = GPIO_AF2_TIM2; + 590 .loc 1 258 5 is_stmt 1 view .LVU146 + 258:Core/Src/stm32f0xx_hal_msp.c **** GPIO_InitStruct.Alternate = GPIO_AF2_TIM2; + 591 .loc 1 258 27 is_stmt 0 view .LVU147 + 592 0062 0693 str r3, [sp, #24] + 259:Core/Src/stm32f0xx_hal_msp.c **** HAL_GPIO_Init(GPIOB, &GPIO_InitStruct); + 593 .loc 1 259 5 is_stmt 1 view .LVU148 + 259:Core/Src/stm32f0xx_hal_msp.c **** HAL_GPIO_Init(GPIOB, &GPIO_InitStruct); + 594 .loc 1 259 31 is_stmt 0 view .LVU149 + 595 0064 0794 str r4, [sp, #28] + 260:Core/Src/stm32f0xx_hal_msp.c **** + 596 .loc 1 260 5 is_stmt 1 view .LVU150 + 597 0066 03A9 add r1, sp, #12 + 598 0068 0248 ldr r0, .L32+4 + 599 006a FFF7FEFF bl HAL_GPIO_Init + 600 .LVL30: + 601 .loc 1 267 1 is_stmt 0 view .LVU151 + 602 006e D4E7 b .L29 + 603 .L33: + 604 .align 2 + 605 .L32: + 606 0070 00100240 .word 1073876992 + 607 0074 00040048 .word 1207960576 + 608 .cfi_endproc + 609 .LFE46: + 611 .section .text.HAL_TIM_Base_MspDeInit,"ax",%progbits + 612 .align 1 + 613 .global HAL_TIM_Base_MspDeInit + 614 .syntax unified + 615 .code 16 + 616 .thumb_func + 618 HAL_TIM_Base_MspDeInit: + 619 .LVL31: + 620 .LFB47: + 268:Core/Src/stm32f0xx_hal_msp.c **** /** + 269:Core/Src/stm32f0xx_hal_msp.c **** * @brief TIM_Base MSP De-Initialization + 270:Core/Src/stm32f0xx_hal_msp.c **** * This function freeze the hardware resources used in this example + 271:Core/Src/stm32f0xx_hal_msp.c **** * @param htim_base: TIM_Base handle pointer + 272:Core/Src/stm32f0xx_hal_msp.c **** * @retval None + 273:Core/Src/stm32f0xx_hal_msp.c **** */ + 274:Core/Src/stm32f0xx_hal_msp.c **** void HAL_TIM_Base_MspDeInit(TIM_HandleTypeDef* htim_base) + 275:Core/Src/stm32f0xx_hal_msp.c **** { + 621 .loc 1 275 1 is_stmt 1 view -0 + 622 .cfi_startproc + 623 @ args = 0, pretend = 0, frame = 0 + 624 @ frame_needed = 0, uses_anonymous_args = 0 + ARM GAS /tmp/ccP9ub9v.s page 18 + + + 625 @ link register save eliminated. + 276:Core/Src/stm32f0xx_hal_msp.c **** if(htim_base->Instance==TIM2) + 626 .loc 1 276 3 view .LVU153 + 627 .loc 1 276 15 is_stmt 0 view .LVU154 + 628 0000 0268 ldr r2, [r0] + 629 .loc 1 276 5 view .LVU155 + 630 0002 8023 movs r3, #128 + 631 0004 DB05 lsls r3, r3, #23 + 632 0006 9A42 cmp r2, r3 + 633 0008 00D0 beq .L36 + 634 .L34: + 277:Core/Src/stm32f0xx_hal_msp.c **** { + 278:Core/Src/stm32f0xx_hal_msp.c **** /* USER CODE BEGIN TIM2_MspDeInit 0 */ + 279:Core/Src/stm32f0xx_hal_msp.c **** + 280:Core/Src/stm32f0xx_hal_msp.c **** /* USER CODE END TIM2_MspDeInit 0 */ + 281:Core/Src/stm32f0xx_hal_msp.c **** /* Peripheral clock disable */ + 282:Core/Src/stm32f0xx_hal_msp.c **** __HAL_RCC_TIM2_CLK_DISABLE(); + 283:Core/Src/stm32f0xx_hal_msp.c **** /* USER CODE BEGIN TIM2_MspDeInit 1 */ + 284:Core/Src/stm32f0xx_hal_msp.c **** + 285:Core/Src/stm32f0xx_hal_msp.c **** /* USER CODE END TIM2_MspDeInit 1 */ + 286:Core/Src/stm32f0xx_hal_msp.c **** } + 287:Core/Src/stm32f0xx_hal_msp.c **** + 288:Core/Src/stm32f0xx_hal_msp.c **** } + 635 .loc 1 288 1 view .LVU156 + 636 @ sp needed + 637 000a 7047 bx lr + 638 .L36: + 282:Core/Src/stm32f0xx_hal_msp.c **** /* USER CODE BEGIN TIM2_MspDeInit 1 */ + 639 .loc 1 282 5 is_stmt 1 view .LVU157 + 640 000c 024A ldr r2, .L37 + 641 000e D369 ldr r3, [r2, #28] + 642 0010 0121 movs r1, #1 + 643 0012 8B43 bics r3, r1 + 644 0014 D361 str r3, [r2, #28] + 645 .loc 1 288 1 is_stmt 0 view .LVU158 + 646 0016 F8E7 b .L34 + 647 .L38: + 648 .align 2 + 649 .L37: + 650 0018 00100240 .word 1073876992 + 651 .cfi_endproc + 652 .LFE47: + 654 .text + 655 .Letext0: + 656 .file 2 "/home/chiangni/.config/VSCodium/User/globalStorage/bmd.stm32-for-vscode/@xpack-dev-tools/ + 657 .file 3 "/home/chiangni/.config/VSCodium/User/globalStorage/bmd.stm32-for-vscode/@xpack-dev-tools/ + 658 .file 4 "Drivers/CMSIS/Device/ST/STM32F0xx/Include/stm32f042x6.h" + 659 .file 5 "Drivers/CMSIS/Device/ST/STM32F0xx/Include/stm32f0xx.h" + 660 .file 6 "Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_def.h" + 661 .file 7 "Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_gpio.h" + 662 .file 8 "Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_dma.h" + 663 .file 9 "Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_adc.h" + 664 .file 10 "Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_can.h" + 665 .file 11 "Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_tim.h" + 666 .file 12 "" + ARM GAS /tmp/ccP9ub9v.s page 19 + + +DEFINED SYMBOLS + *ABS*:00000000 stm32f0xx_hal_msp.c + /tmp/ccP9ub9v.s:19 .text.HAL_MspInit:00000000 $t + /tmp/ccP9ub9v.s:25 .text.HAL_MspInit:00000000 HAL_MspInit + /tmp/ccP9ub9v.s:75 .text.HAL_MspInit:0000002c $d + /tmp/ccP9ub9v.s:80 .text.HAL_ADC_MspInit:00000000 $t + /tmp/ccP9ub9v.s:86 .text.HAL_ADC_MspInit:00000000 HAL_ADC_MspInit + /tmp/ccP9ub9v.s:180 .text.HAL_ADC_MspInit:00000054 $d + /tmp/ccP9ub9v.s:186 .text.HAL_ADC_MspDeInit:00000000 $t + /tmp/ccP9ub9v.s:192 .text.HAL_ADC_MspDeInit:00000000 HAL_ADC_MspDeInit + /tmp/ccP9ub9v.s:237 .text.HAL_ADC_MspDeInit:00000024 $d + /tmp/ccP9ub9v.s:244 .text.HAL_CAN_MspInit:00000000 $t + /tmp/ccP9ub9v.s:250 .text.HAL_CAN_MspInit:00000000 HAL_CAN_MspInit + /tmp/ccP9ub9v.s:354 .text.HAL_CAN_MspInit:00000060 $d + /tmp/ccP9ub9v.s:360 .text.HAL_CAN_MspDeInit:00000000 $t + /tmp/ccP9ub9v.s:366 .text.HAL_CAN_MspDeInit:00000000 HAL_CAN_MspDeInit + /tmp/ccP9ub9v.s:412 .text.HAL_CAN_MspDeInit:00000024 $d + /tmp/ccP9ub9v.s:419 .text.HAL_TIM_Base_MspInit:00000000 $t + /tmp/ccP9ub9v.s:425 .text.HAL_TIM_Base_MspInit:00000000 HAL_TIM_Base_MspInit + /tmp/ccP9ub9v.s:472 .text.HAL_TIM_Base_MspInit:00000024 $d + /tmp/ccP9ub9v.s:477 .text.HAL_TIM_MspPostInit:00000000 $t + /tmp/ccP9ub9v.s:483 .text.HAL_TIM_MspPostInit:00000000 HAL_TIM_MspPostInit + /tmp/ccP9ub9v.s:606 .text.HAL_TIM_MspPostInit:00000070 $d + /tmp/ccP9ub9v.s:612 .text.HAL_TIM_Base_MspDeInit:00000000 $t + /tmp/ccP9ub9v.s:618 .text.HAL_TIM_Base_MspDeInit:00000000 HAL_TIM_Base_MspDeInit + /tmp/ccP9ub9v.s:650 .text.HAL_TIM_Base_MspDeInit:00000018 $d + +UNDEFINED SYMBOLS +memset +HAL_GPIO_Init +HAL_GPIO_DeInit diff --git a/Software/build/stm32f0xx_hal_msp.o b/Software/build/stm32f0xx_hal_msp.o new file mode 100644 index 0000000..eda12ac Binary files /dev/null and b/Software/build/stm32f0xx_hal_msp.o differ diff --git a/Software/build/stm32f0xx_hal_pwr.d b/Software/build/stm32f0xx_hal_pwr.d new file mode 100644 index 0000000..b52a088 --- /dev/null +++ b/Software/build/stm32f0xx_hal_pwr.d @@ -0,0 +1,60 @@ +build/stm32f0xx_hal_pwr.o: \ + Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pwr.c \ + Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal.h \ + Core/Inc/stm32f0xx_hal_conf.h \ + Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_rcc.h \ + Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_def.h \ + Drivers/CMSIS/Device/ST/STM32F0xx/Include/stm32f0xx.h \ + Drivers/CMSIS/Device/ST/STM32F0xx/Include/stm32f042x6.h \ + Drivers/CMSIS/Include/core_cm0.h Drivers/CMSIS/Include/cmsis_version.h \ + Drivers/CMSIS/Include/cmsis_compiler.h Drivers/CMSIS/Include/cmsis_gcc.h \ + Drivers/CMSIS/Device/ST/STM32F0xx/Include/system_stm32f0xx.h \ + Drivers/STM32F0xx_HAL_Driver/Inc/Legacy/stm32_hal_legacy.h \ + Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_rcc_ex.h \ + Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_gpio.h \ + Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_gpio_ex.h \ + Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_exti.h \ + Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_dma.h \ + Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_dma_ex.h \ + Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_cortex.h \ + Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_adc.h \ + Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_adc_ex.h \ + Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_can.h \ + Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_flash.h \ + Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_flash_ex.h \ + Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_i2c.h \ + Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_i2c_ex.h \ + Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_pwr.h \ + Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_pwr_ex.h \ + Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_tim.h \ + Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_tim_ex.h +Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal.h: +Core/Inc/stm32f0xx_hal_conf.h: +Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_rcc.h: +Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_def.h: +Drivers/CMSIS/Device/ST/STM32F0xx/Include/stm32f0xx.h: +Drivers/CMSIS/Device/ST/STM32F0xx/Include/stm32f042x6.h: +Drivers/CMSIS/Include/core_cm0.h: +Drivers/CMSIS/Include/cmsis_version.h: +Drivers/CMSIS/Include/cmsis_compiler.h: +Drivers/CMSIS/Include/cmsis_gcc.h: +Drivers/CMSIS/Device/ST/STM32F0xx/Include/system_stm32f0xx.h: +Drivers/STM32F0xx_HAL_Driver/Inc/Legacy/stm32_hal_legacy.h: +Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_rcc_ex.h: +Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_gpio.h: +Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_gpio_ex.h: +Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_exti.h: +Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_dma.h: +Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_dma_ex.h: +Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_cortex.h: +Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_adc.h: +Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_adc_ex.h: +Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_can.h: +Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_flash.h: +Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_flash_ex.h: +Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_i2c.h: +Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_i2c_ex.h: +Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_pwr.h: +Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_pwr_ex.h: +Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_tim.h: +Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_tim_ex.h: diff --git a/Software/build/stm32f0xx_hal_pwr.lst b/Software/build/stm32f0xx_hal_pwr.lst new file mode 100644 index 0000000..7407207 --- /dev/null +++ b/Software/build/stm32f0xx_hal_pwr.lst @@ -0,0 +1,1031 @@ +ARM GAS /tmp/cc4CvqUD.s page 1 + + + 1 .cpu cortex-m0 + 2 .arch armv6s-m + 3 .fpu softvfp + 4 .eabi_attribute 20, 1 + 5 .eabi_attribute 21, 1 + 6 .eabi_attribute 23, 3 + 7 .eabi_attribute 24, 1 + 8 .eabi_attribute 25, 1 + 9 .eabi_attribute 26, 1 + 10 .eabi_attribute 30, 1 + 11 .eabi_attribute 34, 0 + 12 .eabi_attribute 18, 4 + 13 .file "stm32f0xx_hal_pwr.c" + 14 .text + 15 .Ltext0: + 16 .cfi_sections .debug_frame + 17 .file 1 "Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pwr.c" + 18 .section .text.HAL_PWR_DeInit,"ax",%progbits + 19 .align 1 + 20 .global HAL_PWR_DeInit + 21 .syntax unified + 22 .code 16 + 23 .thumb_func + 25 HAL_PWR_DeInit: + 26 .LFB40: + 1:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pwr.c **** /** + 2:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pwr.c **** ****************************************************************************** + 3:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pwr.c **** * @file stm32f0xx_hal_pwr.c + 4:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pwr.c **** * @author MCD Application Team + 5:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pwr.c **** * @brief PWR HAL module driver. + 6:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pwr.c **** * This file provides firmware functions to manage the following + 7:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pwr.c **** * functionalities of the Power Controller (PWR) peripheral: + 8:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pwr.c **** * + Initialization/de-initialization function + 9:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pwr.c **** * + Peripheral Control function + 10:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pwr.c **** * + 11:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pwr.c **** ****************************************************************************** + 12:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pwr.c **** * @attention + 13:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pwr.c **** * + 14:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pwr.c **** * Copyright (c) 2016 STMicroelectronics. + 15:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pwr.c **** * All rights reserved. + 16:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pwr.c **** * + 17:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pwr.c **** * This software is licensed under terms that can be found in the LICENSE file + 18:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pwr.c **** * in the root directory of this software component. + 19:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pwr.c **** * If no LICENSE file comes with this software, it is provided AS-IS. + 20:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pwr.c **** * + 21:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pwr.c **** ****************************************************************************** + 22:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pwr.c **** */ + 23:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pwr.c **** + 24:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pwr.c **** /* Includes ------------------------------------------------------------------*/ + 25:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pwr.c **** #include "stm32f0xx_hal.h" + 26:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pwr.c **** + 27:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pwr.c **** /** @addtogroup STM32F0xx_HAL_Driver + 28:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pwr.c **** * @{ + 29:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pwr.c **** */ + 30:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pwr.c **** + 31:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pwr.c **** /** @defgroup PWR PWR + 32:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pwr.c **** * @brief PWR HAL module driver + ARM GAS /tmp/cc4CvqUD.s page 2 + + + 33:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pwr.c **** * @{ + 34:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pwr.c **** */ + 35:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pwr.c **** + 36:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pwr.c **** #ifdef HAL_PWR_MODULE_ENABLED + 37:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pwr.c **** + 38:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pwr.c **** /* Private typedef -----------------------------------------------------------*/ + 39:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pwr.c **** /* Private define ------------------------------------------------------------*/ + 40:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pwr.c **** /* Private macro -------------------------------------------------------------*/ + 41:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pwr.c **** /* Private variables ---------------------------------------------------------*/ + 42:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pwr.c **** /* Private function prototypes -----------------------------------------------*/ + 43:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pwr.c **** /* Private functions ---------------------------------------------------------*/ + 44:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pwr.c **** + 45:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pwr.c **** /** @defgroup PWR_Exported_Functions PWR Exported Functions + 46:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pwr.c **** * @{ + 47:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pwr.c **** */ + 48:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pwr.c **** + 49:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pwr.c **** /** @defgroup PWR_Exported_Functions_Group1 Initialization and de-initialization functions + 50:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pwr.c **** * @brief Initialization and de-initialization functions + 51:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pwr.c **** * + 52:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pwr.c **** @verbatim + 53:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pwr.c **** =============================================================================== + 54:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pwr.c **** ##### Initialization and de-initialization functions ##### + 55:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pwr.c **** =============================================================================== + 56:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pwr.c **** [..] + 57:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pwr.c **** After reset, the backup domain (RTC registers, RTC backup data + 58:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pwr.c **** registers) is protected against possible unwanted + 59:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pwr.c **** write accesses. + 60:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pwr.c **** To enable access to the RTC Domain and RTC registers, proceed as follows: + 61:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pwr.c **** (+) Enable the Power Controller (PWR) APB1 interface clock using the + 62:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pwr.c **** __HAL_RCC_PWR_CLK_ENABLE() macro. + 63:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pwr.c **** (+) Enable access to RTC domain using the HAL_PWR_EnableBkUpAccess() function. + 64:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pwr.c **** + 65:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pwr.c **** @endverbatim + 66:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pwr.c **** * @{ + 67:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pwr.c **** */ + 68:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pwr.c **** + 69:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pwr.c **** /** + 70:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pwr.c **** * @brief Deinitializes the PWR peripheral registers to their default reset values. + 71:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pwr.c **** * @retval None + 72:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pwr.c **** */ + 73:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pwr.c **** void HAL_PWR_DeInit(void) + 74:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pwr.c **** { + 27 .loc 1 74 1 view -0 + 28 .cfi_startproc + 29 @ args = 0, pretend = 0, frame = 0 + 30 @ frame_needed = 0, uses_anonymous_args = 0 + 31 @ link register save eliminated. + 75:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pwr.c **** __HAL_RCC_PWR_FORCE_RESET(); + 32 .loc 1 75 3 view .LVU1 + 33 0000 054B ldr r3, .L2 + 34 0002 1969 ldr r1, [r3, #16] + 35 0004 8022 movs r2, #128 + 36 0006 5205 lsls r2, r2, #21 + 37 0008 0A43 orrs r2, r1 + 38 000a 1A61 str r2, [r3, #16] + 76:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pwr.c **** __HAL_RCC_PWR_RELEASE_RESET(); + 39 .loc 1 76 3 view .LVU2 + ARM GAS /tmp/cc4CvqUD.s page 3 + + + 40 000c 1A69 ldr r2, [r3, #16] + 41 000e 0349 ldr r1, .L2+4 + 42 0010 0A40 ands r2, r1 + 43 0012 1A61 str r2, [r3, #16] + 77:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pwr.c **** } + 44 .loc 1 77 1 is_stmt 0 view .LVU3 + 45 @ sp needed + 46 0014 7047 bx lr + 47 .L3: + 48 0016 C046 .align 2 + 49 .L2: + 50 0018 00100240 .word 1073876992 + 51 001c FFFFFFEF .word -268435457 + 52 .cfi_endproc + 53 .LFE40: + 55 .section .text.HAL_PWR_EnableBkUpAccess,"ax",%progbits + 56 .align 1 + 57 .global HAL_PWR_EnableBkUpAccess + 58 .syntax unified + 59 .code 16 + 60 .thumb_func + 62 HAL_PWR_EnableBkUpAccess: + 63 .LFB41: + 78:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pwr.c **** + 79:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pwr.c **** /** + 80:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pwr.c **** * @brief Enables access to the backup domain (RTC registers, RTC + 81:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pwr.c **** * backup data registers when present). + 82:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pwr.c **** * @note If the HSE divided by 32 is used as the RTC clock, the + 83:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pwr.c **** * Backup Domain Access should be kept enabled. + 84:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pwr.c **** * @retval None + 85:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pwr.c **** */ + 86:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pwr.c **** void HAL_PWR_EnableBkUpAccess(void) + 87:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pwr.c **** { + 64 .loc 1 87 1 is_stmt 1 view -0 + 65 .cfi_startproc + 66 @ args = 0, pretend = 0, frame = 0 + 67 @ frame_needed = 0, uses_anonymous_args = 0 + 68 @ link register save eliminated. + 88:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pwr.c **** PWR->CR |= (uint32_t)PWR_CR_DBP; + 69 .loc 1 88 3 view .LVU5 + 70 .loc 1 88 6 is_stmt 0 view .LVU6 + 71 0000 034A ldr r2, .L5 + 72 0002 1168 ldr r1, [r2] + 73 .loc 1 88 11 view .LVU7 + 74 0004 8023 movs r3, #128 + 75 0006 5B00 lsls r3, r3, #1 + 76 0008 0B43 orrs r3, r1 + 77 000a 1360 str r3, [r2] + 89:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pwr.c **** } + 78 .loc 1 89 1 view .LVU8 + 79 @ sp needed + 80 000c 7047 bx lr + 81 .L6: + 82 000e C046 .align 2 + 83 .L5: + 84 0010 00700040 .word 1073770496 + 85 .cfi_endproc + ARM GAS /tmp/cc4CvqUD.s page 4 + + + 86 .LFE41: + 88 .section .text.HAL_PWR_DisableBkUpAccess,"ax",%progbits + 89 .align 1 + 90 .global HAL_PWR_DisableBkUpAccess + 91 .syntax unified + 92 .code 16 + 93 .thumb_func + 95 HAL_PWR_DisableBkUpAccess: + 96 .LFB42: + 90:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pwr.c **** + 91:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pwr.c **** /** + 92:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pwr.c **** * @brief Disables access to the backup domain (RTC registers, RTC + 93:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pwr.c **** * backup data registers when present). + 94:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pwr.c **** * @note If the HSE divided by 32 is used as the RTC clock, the + 95:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pwr.c **** * Backup Domain Access should be kept enabled. + 96:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pwr.c **** * @retval None + 97:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pwr.c **** */ + 98:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pwr.c **** void HAL_PWR_DisableBkUpAccess(void) + 99:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pwr.c **** { + 97 .loc 1 99 1 is_stmt 1 view -0 + 98 .cfi_startproc + 99 @ args = 0, pretend = 0, frame = 0 + 100 @ frame_needed = 0, uses_anonymous_args = 0 + 101 @ link register save eliminated. + 100:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pwr.c **** PWR->CR &= ~((uint32_t)PWR_CR_DBP); + 102 .loc 1 100 3 view .LVU10 + 103 .loc 1 100 6 is_stmt 0 view .LVU11 + 104 0000 024A ldr r2, .L8 + 105 0002 1368 ldr r3, [r2] + 106 .loc 1 100 11 view .LVU12 + 107 0004 0249 ldr r1, .L8+4 + 108 0006 0B40 ands r3, r1 + 109 0008 1360 str r3, [r2] + 101:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pwr.c **** } + 110 .loc 1 101 1 view .LVU13 + 111 @ sp needed + 112 000a 7047 bx lr + 113 .L9: + 114 .align 2 + 115 .L8: + 116 000c 00700040 .word 1073770496 + 117 0010 FFFEFFFF .word -257 + 118 .cfi_endproc + 119 .LFE42: + 121 .section .text.HAL_PWR_EnableWakeUpPin,"ax",%progbits + 122 .align 1 + 123 .global HAL_PWR_EnableWakeUpPin + 124 .syntax unified + 125 .code 16 + 126 .thumb_func + 128 HAL_PWR_EnableWakeUpPin: + 129 .LVL0: + 130 .LFB43: + 102:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pwr.c **** + 103:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pwr.c **** /** + 104:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pwr.c **** * @} + 105:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pwr.c **** */ + ARM GAS /tmp/cc4CvqUD.s page 5 + + + 106:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pwr.c **** + 107:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pwr.c **** /** @defgroup PWR_Exported_Functions_Group2 Peripheral Control functions + 108:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pwr.c **** * @brief Low Power modes configuration functions + 109:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pwr.c **** * + 110:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pwr.c **** @verbatim + 111:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pwr.c **** + 112:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pwr.c **** =============================================================================== + 113:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pwr.c **** ##### Peripheral Control functions ##### + 114:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pwr.c **** =============================================================================== + 115:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pwr.c **** + 116:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pwr.c **** *** WakeUp pin configuration *** + 117:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pwr.c **** ================================ + 118:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pwr.c **** [..] + 119:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pwr.c **** (+) WakeUp pin is used to wakeup the system from Standby mode. This pin is + 120:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pwr.c **** forced in input pull down configuration and is active on rising edges. + 121:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pwr.c **** (+) There are two WakeUp pins, and up to eight Wakeup pins on STM32F07x & STM32F09x devices. + 122:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pwr.c **** (++)WakeUp Pin 1 on PA.00. + 123:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pwr.c **** (++)WakeUp Pin 2 on PC.13. + 124:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pwr.c **** (++)WakeUp Pin 3 on PE.06.(STM32F07x/STM32F09x) + 125:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pwr.c **** (++)WakeUp Pin 4 on PA.02.(STM32F07x/STM32F09x) + 126:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pwr.c **** (++)WakeUp Pin 5 on PC.05.(STM32F07x/STM32F09x) + 127:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pwr.c **** (++)WakeUp Pin 6 on PB.05.(STM32F07x/STM32F09x) + 128:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pwr.c **** (++)WakeUp Pin 7 on PB.15.(STM32F07x/STM32F09x) + 129:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pwr.c **** (++)WakeUp Pin 8 on PF.02.(STM32F07x/STM32F09x) + 130:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pwr.c **** + 131:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pwr.c **** *** Low Power modes configuration *** + 132:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pwr.c **** ===================================== + 133:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pwr.c **** [..] + 134:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pwr.c **** The devices feature 3 low-power modes: + 135:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pwr.c **** (+) Sleep mode: Cortex-M0 core stopped, peripherals kept running. + 136:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pwr.c **** (+) Stop mode: all clocks are stopped, regulator running, regulator + 137:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pwr.c **** in low power mode + 138:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pwr.c **** (+) Standby mode: 1.2V domain powered off (mode not available on STM32F0x8 devices). + 139:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pwr.c **** + 140:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pwr.c **** *** Sleep mode *** + 141:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pwr.c **** ================== + 142:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pwr.c **** [..] + 143:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pwr.c **** (+) Entry: + 144:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pwr.c **** The Sleep mode is entered by using the HAL_PWR_EnterSLEEPMode(PWR_MAINREGULATOR_ON, PWR_S + 145:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pwr.c **** functions with + 146:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pwr.c **** (++) PWR_SLEEPENTRY_WFI: enter SLEEP mode with WFI instruction + 147:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pwr.c **** (++) PWR_SLEEPENTRY_WFE: enter SLEEP mode with WFE instruction + 148:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pwr.c **** + 149:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pwr.c **** (+) Exit: + 150:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pwr.c **** (++) Any peripheral interrupt acknowledged by the nested vectored interrupt + 151:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pwr.c **** controller (NVIC) can wake up the device from Sleep mode. + 152:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pwr.c **** + 153:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pwr.c **** *** Stop mode *** + 154:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pwr.c **** ================= + 155:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pwr.c **** [..] + 156:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pwr.c **** In Stop mode, all clocks in the 1.8V domain are stopped, the PLL, the HSI, + 157:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pwr.c **** and the HSE RC oscillators are disabled. Internal SRAM and register contents + 158:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pwr.c **** are preserved. + 159:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pwr.c **** The voltage regulator can be configured either in normal or low-power mode. + 160:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pwr.c **** To minimize the consumption. + 161:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pwr.c **** + 162:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pwr.c **** (+) Entry: + ARM GAS /tmp/cc4CvqUD.s page 6 + + + 163:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pwr.c **** The Stop mode is entered using the HAL_PWR_EnterSTOPMode(PWR_MAINREGULATOR_ON, PWR_STOPEN + 164:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pwr.c **** function with: + 165:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pwr.c **** (++) Main regulator ON. + 166:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pwr.c **** (++) Low Power regulator ON. + 167:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pwr.c **** (++) PWR_STOPENTRY_WFI: enter STOP mode with WFI instruction + 168:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pwr.c **** (++) PWR_STOPENTRY_WFE: enter STOP mode with WFE instruction + 169:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pwr.c **** (+) Exit: + 170:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pwr.c **** (++) Any EXTI Line (Internal or External) configured in Interrupt/Event mode. + 171:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pwr.c **** (++) Some specific communication peripherals (CEC, USART, I2C) interrupts, + 172:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pwr.c **** when programmed in wakeup mode (the peripheral must be + 173:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pwr.c **** programmed in wakeup mode and the corresponding interrupt vector + 174:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pwr.c **** must be enabled in the NVIC) + 175:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pwr.c **** + 176:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pwr.c **** *** Standby mode *** + 177:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pwr.c **** ==================== + 178:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pwr.c **** [..] + 179:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pwr.c **** The Standby mode allows to achieve the lowest power consumption. It is based + 180:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pwr.c **** on the Cortex-M0 deep sleep mode, with the voltage regulator disabled. + 181:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pwr.c **** The 1.8V domain is consequently powered off. The PLL, the HSI oscillator and + 182:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pwr.c **** the HSE oscillator are also switched off. SRAM and register contents are lost + 183:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pwr.c **** except for the RTC registers, RTC backup registers and Standby circuitry. + 184:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pwr.c **** The voltage regulator is OFF. + 185:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pwr.c **** + 186:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pwr.c **** (+) Entry: + 187:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pwr.c **** (++) The Standby mode is entered using the HAL_PWR_EnterSTANDBYMode() function. + 188:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pwr.c **** (+) Exit: + 189:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pwr.c **** (++) WKUP pin rising edge, RTC alarm (Alarm A), RTC wakeup, + 190:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pwr.c **** tamper event, time-stamp event, external reset in NRST pin, IWDG reset. + 191:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pwr.c **** + 192:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pwr.c **** *** Auto-wakeup (AWU) from low-power mode *** + 193:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pwr.c **** ============================================= + 194:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pwr.c **** [..] + 195:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pwr.c **** The MCU can be woken up from low-power mode by an RTC Alarm event, an RTC + 196:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pwr.c **** Wakeup event, a tamper event, a time-stamp event, or a comparator event, + 197:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pwr.c **** without depending on an external interrupt (Auto-wakeup mode). + 198:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pwr.c **** + 199:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pwr.c **** (+) RTC auto-wakeup (AWU) from the Stop and Standby modes + 200:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pwr.c **** + 201:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pwr.c **** (++) To wake up from the Stop mode with an RTC alarm event, it is necessary to + 202:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pwr.c **** configure the RTC to generate the RTC alarm using the HAL_RTC_SetAlarm_IT() function. + 203:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pwr.c **** + 204:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pwr.c **** (++) To wake up from the Stop mode with an RTC Tamper or time stamp event, it + 205:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pwr.c **** is necessary to configure the RTC to detect the tamper or time stamp event using the + 206:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pwr.c **** HAL_RTC_SetTimeStamp_IT() or HAL_RTC_SetTamper_IT() functions. + 207:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pwr.c **** + 208:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pwr.c **** (++) To wake up from the Stop mode with an RTC WakeUp event, it is necessary to + 209:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pwr.c **** configure the RTC to generate the RTC WakeUp event using the HAL_RTC_SetWakeUpTimer_IT() + 210:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pwr.c **** + 211:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pwr.c **** (+) Comparator auto-wakeup (AWU) from the Stop mode + 212:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pwr.c **** + 213:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pwr.c **** (++) To wake up from the Stop mode with a comparator wakeup event, it is necessary to: + 214:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pwr.c **** (+++) Configure the EXTI Line associated with the comparator (example EXTI Line 22 for c + 215:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pwr.c **** to be sensitive to to the selected edges (falling, rising or falling + 216:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pwr.c **** and rising) (Interrupt or Event modes) using the EXTI_Init() function. + 217:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pwr.c **** (+++) Configure the comparator to generate the event. + 218:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pwr.c **** @endverbatim + 219:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pwr.c **** * @{ + ARM GAS /tmp/cc4CvqUD.s page 7 + + + 220:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pwr.c **** */ + 221:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pwr.c **** + 222:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pwr.c **** /** + 223:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pwr.c **** * @brief Enables the WakeUp PINx functionality. + 224:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pwr.c **** * @param WakeUpPinx Specifies the Power Wake-Up pin to enable. + 225:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pwr.c **** * This parameter can be value of : + 226:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pwr.c **** * @ref PWREx_WakeUp_Pins + 227:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pwr.c **** * @retval None + 228:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pwr.c **** */ + 229:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pwr.c **** void HAL_PWR_EnableWakeUpPin(uint32_t WakeUpPinx) + 230:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pwr.c **** { + 131 .loc 1 230 1 is_stmt 1 view -0 + 132 .cfi_startproc + 133 @ args = 0, pretend = 0, frame = 0 + 134 @ frame_needed = 0, uses_anonymous_args = 0 + 135 @ link register save eliminated. + 231:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pwr.c **** /* Check the parameters */ + 232:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pwr.c **** assert_param(IS_PWR_WAKEUP_PIN(WakeUpPinx)); + 136 .loc 1 232 3 view .LVU15 + 233:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pwr.c **** /* Enable the EWUPx pin */ + 234:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pwr.c **** SET_BIT(PWR->CSR, WakeUpPinx); + 137 .loc 1 234 3 view .LVU16 + 138 0000 024A ldr r2, .L11 + 139 0002 5368 ldr r3, [r2, #4] + 140 0004 0343 orrs r3, r0 + 141 0006 5360 str r3, [r2, #4] + 235:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pwr.c **** } + 142 .loc 1 235 1 is_stmt 0 view .LVU17 + 143 @ sp needed + 144 0008 7047 bx lr + 145 .L12: + 146 000a C046 .align 2 + 147 .L11: + 148 000c 00700040 .word 1073770496 + 149 .cfi_endproc + 150 .LFE43: + 152 .section .text.HAL_PWR_DisableWakeUpPin,"ax",%progbits + 153 .align 1 + 154 .global HAL_PWR_DisableWakeUpPin + 155 .syntax unified + 156 .code 16 + 157 .thumb_func + 159 HAL_PWR_DisableWakeUpPin: + 160 .LVL1: + 161 .LFB44: + 236:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pwr.c **** + 237:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pwr.c **** /** + 238:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pwr.c **** * @brief Disables the WakeUp PINx functionality. + 239:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pwr.c **** * @param WakeUpPinx Specifies the Power Wake-Up pin to disable. + 240:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pwr.c **** * This parameter can be values of : + 241:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pwr.c **** * @ref PWREx_WakeUp_Pins + 242:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pwr.c **** * @retval None + 243:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pwr.c **** */ + 244:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pwr.c **** void HAL_PWR_DisableWakeUpPin(uint32_t WakeUpPinx) + 245:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pwr.c **** { + 162 .loc 1 245 1 is_stmt 1 view -0 + 163 .cfi_startproc + ARM GAS /tmp/cc4CvqUD.s page 8 + + + 164 @ args = 0, pretend = 0, frame = 0 + 165 @ frame_needed = 0, uses_anonymous_args = 0 + 166 @ link register save eliminated. + 246:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pwr.c **** /* Check the parameters */ + 247:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pwr.c **** assert_param(IS_PWR_WAKEUP_PIN(WakeUpPinx)); + 167 .loc 1 247 3 view .LVU19 + 248:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pwr.c **** /* Disable the EWUPx pin */ + 249:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pwr.c **** CLEAR_BIT(PWR->CSR, WakeUpPinx); + 168 .loc 1 249 3 view .LVU20 + 169 0000 024A ldr r2, .L14 + 170 0002 5368 ldr r3, [r2, #4] + 171 0004 8343 bics r3, r0 + 172 0006 5360 str r3, [r2, #4] + 250:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pwr.c **** } + 173 .loc 1 250 1 is_stmt 0 view .LVU21 + 174 @ sp needed + 175 0008 7047 bx lr + 176 .L15: + 177 000a C046 .align 2 + 178 .L14: + 179 000c 00700040 .word 1073770496 + 180 .cfi_endproc + 181 .LFE44: + 183 .section .text.HAL_PWR_EnterSLEEPMode,"ax",%progbits + 184 .align 1 + 185 .global HAL_PWR_EnterSLEEPMode + 186 .syntax unified + 187 .code 16 + 188 .thumb_func + 190 HAL_PWR_EnterSLEEPMode: + 191 .LVL2: + 192 .LFB45: + 251:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pwr.c **** + 252:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pwr.c **** /** + 253:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pwr.c **** * @brief Enters Sleep mode. + 254:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pwr.c **** * @note In Sleep mode, all I/O pins keep the same state as in Run mode. + 255:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pwr.c **** * @param Regulator Specifies the regulator state in SLEEP mode. + 256:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pwr.c **** * On STM32F0 devices, this parameter is a dummy value and it is ignored + 257:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pwr.c **** * as regulator can't be modified in this mode. Parameter is kept for platform + 258:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pwr.c **** * compatibility. + 259:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pwr.c **** * @param SLEEPEntry Specifies if SLEEP mode is entered with WFI or WFE instruction. + 260:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pwr.c **** * When WFI entry is used, tick interrupt have to be disabled if not desired as + 261:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pwr.c **** * the interrupt wake up source. + 262:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pwr.c **** * This parameter can be one of the following values: + 263:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pwr.c **** * @arg PWR_SLEEPENTRY_WFI: enter SLEEP mode with WFI instruction + 264:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pwr.c **** * @arg PWR_SLEEPENTRY_WFE: enter SLEEP mode with WFE instruction + 265:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pwr.c **** * @retval None + 266:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pwr.c **** */ + 267:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pwr.c **** void HAL_PWR_EnterSLEEPMode(uint32_t Regulator, uint8_t SLEEPEntry) + 268:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pwr.c **** { + 193 .loc 1 268 1 is_stmt 1 view -0 + 194 .cfi_startproc + 195 @ args = 0, pretend = 0, frame = 0 + 196 @ frame_needed = 0, uses_anonymous_args = 0 + 197 @ link register save eliminated. + 269:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pwr.c **** /* Check the parameters */ + 270:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pwr.c **** assert_param(IS_PWR_REGULATOR(Regulator)); + ARM GAS /tmp/cc4CvqUD.s page 9 + + + 198 .loc 1 270 3 view .LVU23 + 271:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pwr.c **** assert_param(IS_PWR_SLEEP_ENTRY(SLEEPEntry)); + 199 .loc 1 271 3 view .LVU24 + 272:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pwr.c **** + 273:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pwr.c **** /* Clear SLEEPDEEP bit of Cortex System Control Register */ + 274:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pwr.c **** SCB->SCR &= (uint32_t)~((uint32_t)SCB_SCR_SLEEPDEEP_Msk); + 200 .loc 1 274 3 view .LVU25 + 201 .loc 1 274 6 is_stmt 0 view .LVU26 + 202 0000 064A ldr r2, .L20 + 203 0002 1369 ldr r3, [r2, #16] + 204 .loc 1 274 12 view .LVU27 + 205 0004 0420 movs r0, #4 + 206 .LVL3: + 207 .loc 1 274 12 view .LVU28 + 208 0006 8343 bics r3, r0 + 209 0008 1361 str r3, [r2, #16] + 275:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pwr.c **** + 276:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pwr.c **** /* Select SLEEP mode entry -------------------------------------------------*/ + 277:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pwr.c **** if(SLEEPEntry == PWR_SLEEPENTRY_WFI) + 210 .loc 1 277 3 is_stmt 1 view .LVU29 + 211 .loc 1 277 5 is_stmt 0 view .LVU30 + 212 000a 0129 cmp r1, #1 + 213 000c 03D0 beq .L19 + 278:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pwr.c **** { + 279:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pwr.c **** /* Request Wait For Interrupt */ + 280:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pwr.c **** __WFI(); + 281:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pwr.c **** } + 282:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pwr.c **** else + 283:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pwr.c **** { + 284:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pwr.c **** /* Request Wait For Event */ + 285:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pwr.c **** __SEV(); + 214 .loc 1 285 5 is_stmt 1 view .LVU31 + 215 .syntax divided + 216 @ 285 "Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pwr.c" 1 + 217 000e 40BF sev + 218 @ 0 "" 2 + 286:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pwr.c **** __WFE(); + 219 .loc 1 286 5 view .LVU32 + 220 @ 286 "Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pwr.c" 1 + 221 0010 20BF wfe + 222 @ 0 "" 2 + 287:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pwr.c **** __WFE(); + 223 .loc 1 287 5 view .LVU33 + 224 @ 287 "Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pwr.c" 1 + 225 0012 20BF wfe + 226 @ 0 "" 2 + 227 .thumb + 228 .syntax unified + 229 .L16: + 288:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pwr.c **** } + 289:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pwr.c **** } + 230 .loc 1 289 1 is_stmt 0 view .LVU34 + 231 @ sp needed + 232 0014 7047 bx lr + 233 .L19: + 280:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pwr.c **** } + 234 .loc 1 280 5 is_stmt 1 view .LVU35 + ARM GAS /tmp/cc4CvqUD.s page 10 + + + 235 .syntax divided + 236 @ 280 "Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pwr.c" 1 + 237 0016 30BF wfi + 238 @ 0 "" 2 + 239 .thumb + 240 .syntax unified + 241 0018 FCE7 b .L16 + 242 .L21: + 243 001a C046 .align 2 + 244 .L20: + 245 001c 00ED00E0 .word -536810240 + 246 .cfi_endproc + 247 .LFE45: + 249 .section .text.HAL_PWR_EnterSTOPMode,"ax",%progbits + 250 .align 1 + 251 .global HAL_PWR_EnterSTOPMode + 252 .syntax unified + 253 .code 16 + 254 .thumb_func + 256 HAL_PWR_EnterSTOPMode: + 257 .LVL4: + 258 .LFB46: + 290:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pwr.c **** + 291:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pwr.c **** /** + 292:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pwr.c **** * @brief Enters STOP mode. + 293:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pwr.c **** * @note In Stop mode, all I/O pins keep the same state as in Run mode. + 294:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pwr.c **** * @note When exiting Stop mode by issuing an interrupt or a wakeup event, + 295:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pwr.c **** * the HSI RC oscillator is selected as system clock. + 296:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pwr.c **** * @note When the voltage regulator operates in low power mode, an additional + 297:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pwr.c **** * startup delay is incurred when waking up from Stop mode. + 298:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pwr.c **** * By keeping the internal regulator ON during Stop mode, the consumption + 299:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pwr.c **** * is higher although the startup time is reduced. + 300:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pwr.c **** * @param Regulator Specifies the regulator state in STOP mode. + 301:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pwr.c **** * This parameter can be one of the following values: + 302:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pwr.c **** * @arg PWR_MAINREGULATOR_ON: STOP mode with regulator ON + 303:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pwr.c **** * @arg PWR_LOWPOWERREGULATOR_ON: STOP mode with low power regulator ON + 304:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pwr.c **** * @param STOPEntry specifies if STOP mode in entered with WFI or WFE instruction. + 305:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pwr.c **** * This parameter can be one of the following values: + 306:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pwr.c **** * @arg PWR_STOPENTRY_WFI:Enter STOP mode with WFI instruction + 307:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pwr.c **** * @arg PWR_STOPENTRY_WFE: Enter STOP mode with WFE instruction + 308:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pwr.c **** * @retval None + 309:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pwr.c **** */ + 310:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pwr.c **** void HAL_PWR_EnterSTOPMode(uint32_t Regulator, uint8_t STOPEntry) + 311:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pwr.c **** { + 259 .loc 1 311 1 view -0 + 260 .cfi_startproc + 261 @ args = 0, pretend = 0, frame = 0 + 262 @ frame_needed = 0, uses_anonymous_args = 0 + 263 .loc 1 311 1 is_stmt 0 view .LVU37 + 264 0000 10B5 push {r4, lr} + 265 .cfi_def_cfa_offset 8 + 266 .cfi_offset 4, -8 + 267 .cfi_offset 14, -4 + 312:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pwr.c **** uint32_t tmpreg = 0; + 268 .loc 1 312 3 is_stmt 1 view .LVU38 + 269 .LVL5: + 313:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pwr.c **** + ARM GAS /tmp/cc4CvqUD.s page 11 + + + 314:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pwr.c **** /* Check the parameters */ + 315:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pwr.c **** assert_param(IS_PWR_REGULATOR(Regulator)); + 270 .loc 1 315 3 view .LVU39 + 316:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pwr.c **** assert_param(IS_PWR_STOP_ENTRY(STOPEntry)); + 271 .loc 1 316 3 view .LVU40 + 317:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pwr.c **** + 318:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pwr.c **** /* Select the regulator state in STOP mode ---------------------------------*/ + 319:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pwr.c **** tmpreg = PWR->CR; + 272 .loc 1 319 3 view .LVU41 + 273 .loc 1 319 10 is_stmt 0 view .LVU42 + 274 0002 0C4A ldr r2, .L26 + 275 0004 1368 ldr r3, [r2] + 276 .LVL6: + 320:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pwr.c **** + 321:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pwr.c **** /* Clear PDDS and LPDS bits */ + 322:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pwr.c **** tmpreg &= (uint32_t)~(PWR_CR_PDDS | PWR_CR_LPDS); + 277 .loc 1 322 3 is_stmt 1 view .LVU43 + 278 .loc 1 322 10 is_stmt 0 view .LVU44 + 279 0006 0324 movs r4, #3 + 280 0008 A343 bics r3, r4 + 281 .LVL7: + 323:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pwr.c **** + 324:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pwr.c **** /* Set LPDS bit according to Regulator value */ + 325:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pwr.c **** tmpreg |= Regulator; + 282 .loc 1 325 3 is_stmt 1 view .LVU45 + 283 .loc 1 325 10 is_stmt 0 view .LVU46 + 284 000a 0343 orrs r3, r0 + 285 .LVL8: + 326:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pwr.c **** + 327:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pwr.c **** /* Store the new value */ + 328:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pwr.c **** PWR->CR = tmpreg; + 286 .loc 1 328 3 is_stmt 1 view .LVU47 + 287 .loc 1 328 11 is_stmt 0 view .LVU48 + 288 000c 1360 str r3, [r2] + 329:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pwr.c **** + 330:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pwr.c **** /* Set SLEEPDEEP bit of Cortex System Control Register */ + 331:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pwr.c **** SCB->SCR |= SCB_SCR_SLEEPDEEP_Msk; + 289 .loc 1 331 3 is_stmt 1 view .LVU49 + 290 .loc 1 331 6 is_stmt 0 view .LVU50 + 291 000e 0A4A ldr r2, .L26+4 + 292 0010 1369 ldr r3, [r2, #16] + 293 .LVL9: + 294 .loc 1 331 12 view .LVU51 + 295 0012 0420 movs r0, #4 + 296 .LVL10: + 297 .loc 1 331 12 view .LVU52 + 298 0014 0343 orrs r3, r0 + 299 0016 1361 str r3, [r2, #16] + 300 .LVL11: + 332:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pwr.c **** + 333:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pwr.c **** /* Select STOP mode entry --------------------------------------------------*/ + 334:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pwr.c **** if(STOPEntry == PWR_STOPENTRY_WFI) + 301 .loc 1 334 3 is_stmt 1 view .LVU53 + 302 .loc 1 334 5 is_stmt 0 view .LVU54 + 303 0018 0129 cmp r1, #1 + 304 001a 08D0 beq .L25 + 335:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pwr.c **** { + ARM GAS /tmp/cc4CvqUD.s page 12 + + + 336:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pwr.c **** /* Request Wait For Interrupt */ + 337:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pwr.c **** __WFI(); + 338:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pwr.c **** } + 339:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pwr.c **** else + 340:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pwr.c **** { + 341:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pwr.c **** /* Request Wait For Event */ + 342:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pwr.c **** __SEV(); + 305 .loc 1 342 5 is_stmt 1 view .LVU55 + 306 .syntax divided + 307 @ 342 "Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pwr.c" 1 + 308 001c 40BF sev + 309 @ 0 "" 2 + 343:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pwr.c **** __WFE(); + 310 .loc 1 343 5 view .LVU56 + 311 @ 343 "Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pwr.c" 1 + 312 001e 20BF wfe + 313 @ 0 "" 2 + 344:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pwr.c **** __WFE(); + 314 .loc 1 344 5 view .LVU57 + 315 @ 344 "Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pwr.c" 1 + 316 0020 20BF wfe + 317 @ 0 "" 2 + 318 .thumb + 319 .syntax unified + 320 .L24: + 345:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pwr.c **** } + 346:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pwr.c **** + 347:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pwr.c **** /* Reset SLEEPDEEP bit of Cortex System Control Register */ + 348:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pwr.c **** SCB->SCR &= (uint32_t)~((uint32_t)SCB_SCR_SLEEPDEEP_Msk); + 321 .loc 1 348 3 view .LVU58 + 322 .loc 1 348 6 is_stmt 0 view .LVU59 + 323 0022 054A ldr r2, .L26+4 + 324 0024 1369 ldr r3, [r2, #16] + 325 .loc 1 348 12 view .LVU60 + 326 0026 0421 movs r1, #4 + 327 .LVL12: + 328 .loc 1 348 12 view .LVU61 + 329 0028 8B43 bics r3, r1 + 330 002a 1361 str r3, [r2, #16] + 349:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pwr.c **** } + 331 .loc 1 349 1 view .LVU62 + 332 @ sp needed + 333 .loc 1 349 1 view .LVU63 + 334 002c 10BD pop {r4, pc} + 335 .LVL13: + 336 .L25: + 337:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pwr.c **** } + 337 .loc 1 337 5 is_stmt 1 view .LVU64 + 338 .syntax divided + 339 @ 337 "Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pwr.c" 1 + 340 002e 30BF wfi + 341 @ 0 "" 2 + 342 .thumb + 343 .syntax unified + 344 0030 F7E7 b .L24 + 345 .L27: + 346 0032 C046 .align 2 + ARM GAS /tmp/cc4CvqUD.s page 13 + + + 347 .L26: + 348 0034 00700040 .word 1073770496 + 349 0038 00ED00E0 .word -536810240 + 350 .cfi_endproc + 351 .LFE46: + 353 .section .text.HAL_PWR_EnterSTANDBYMode,"ax",%progbits + 354 .align 1 + 355 .global HAL_PWR_EnterSTANDBYMode + 356 .syntax unified + 357 .code 16 + 358 .thumb_func + 360 HAL_PWR_EnterSTANDBYMode: + 361 .LFB47: + 350:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pwr.c **** + 351:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pwr.c **** /** + 352:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pwr.c **** * @brief Enters STANDBY mode. + 353:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pwr.c **** * @note In Standby mode, all I/O pins are high impedance except for: + 354:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pwr.c **** * - Reset pad (still available) + 355:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pwr.c **** * - RTC alternate function pins if configured for tamper, time-stamp, RTC + 356:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pwr.c **** * Alarm out, or RTC clock calibration out. + 357:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pwr.c **** * - WKUP pins if enabled. + 358:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pwr.c **** * STM32F0x8 devices, the Stop mode is available, but it is + 359:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pwr.c **** * aningless to distinguish between voltage regulator in Low power + 360:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pwr.c **** * mode and voltage regulator in Run mode because the regulator + 361:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pwr.c **** * not used and the core is supplied directly from an external source. + 362:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pwr.c **** * Consequently, the Standby mode is not available on those devices. + 363:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pwr.c **** * @retval None + 364:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pwr.c **** */ + 365:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pwr.c **** void HAL_PWR_EnterSTANDBYMode(void) + 366:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pwr.c **** { + 362 .loc 1 366 1 view -0 + 363 .cfi_startproc + 364 @ args = 0, pretend = 0, frame = 0 + 365 @ frame_needed = 0, uses_anonymous_args = 0 + 366 @ link register save eliminated. + 367:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pwr.c **** /* Select STANDBY mode */ + 368:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pwr.c **** PWR->CR |= (uint32_t)PWR_CR_PDDS; + 367 .loc 1 368 3 view .LVU66 + 368 .loc 1 368 6 is_stmt 0 view .LVU67 + 369 0000 054A ldr r2, .L29 + 370 0002 1368 ldr r3, [r2] + 371 .loc 1 368 11 view .LVU68 + 372 0004 0221 movs r1, #2 + 373 0006 0B43 orrs r3, r1 + 374 0008 1360 str r3, [r2] + 369:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pwr.c **** + 370:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pwr.c **** /* Set SLEEPDEEP bit of Cortex System Control Register */ + 371:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pwr.c **** SCB->SCR |= SCB_SCR_SLEEPDEEP_Msk; + 375 .loc 1 371 3 is_stmt 1 view .LVU69 + 376 .loc 1 371 6 is_stmt 0 view .LVU70 + 377 000a 044A ldr r2, .L29+4 + 378 000c 1369 ldr r3, [r2, #16] + 379 .loc 1 371 12 view .LVU71 + 380 000e 0231 adds r1, r1, #2 + 381 0010 0B43 orrs r3, r1 + 382 0012 1361 str r3, [r2, #16] + 372:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pwr.c **** + ARM GAS /tmp/cc4CvqUD.s page 14 + + + 373:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pwr.c **** /* This option is used to ensure that store operations are completed */ + 374:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pwr.c **** #if defined ( __CC_ARM) + 375:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pwr.c **** __force_stores(); + 376:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pwr.c **** #endif + 377:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pwr.c **** /* Request Wait For Interrupt */ + 378:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pwr.c **** __WFI(); + 383 .loc 1 378 3 is_stmt 1 view .LVU72 + 384 .syntax divided + 385 @ 378 "Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pwr.c" 1 + 386 0014 30BF wfi + 387 @ 0 "" 2 + 379:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pwr.c **** } + 388 .loc 1 379 1 is_stmt 0 view .LVU73 + 389 .thumb + 390 .syntax unified + 391 @ sp needed + 392 0016 7047 bx lr + 393 .L30: + 394 .align 2 + 395 .L29: + 396 0018 00700040 .word 1073770496 + 397 001c 00ED00E0 .word -536810240 + 398 .cfi_endproc + 399 .LFE47: + 401 .section .text.HAL_PWR_EnableSleepOnExit,"ax",%progbits + 402 .align 1 + 403 .global HAL_PWR_EnableSleepOnExit + 404 .syntax unified + 405 .code 16 + 406 .thumb_func + 408 HAL_PWR_EnableSleepOnExit: + 409 .LFB48: + 380:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pwr.c **** + 381:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pwr.c **** /** + 382:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pwr.c **** * @brief Indicates Sleep-On-Exit when returning from Handler mode to Thread mode. + 383:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pwr.c **** * @note Set SLEEPONEXIT bit of SCR register. When this bit is set, the processor + 384:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pwr.c **** * re-enters SLEEP mode when an interruption handling is over. + 385:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pwr.c **** * Setting this bit is useful when the processor is expected to run only on + 386:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pwr.c **** * interruptions handling. + 387:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pwr.c **** * @retval None + 388:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pwr.c **** */ + 389:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pwr.c **** void HAL_PWR_EnableSleepOnExit(void) + 390:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pwr.c **** { + 410 .loc 1 390 1 is_stmt 1 view -0 + 411 .cfi_startproc + 412 @ args = 0, pretend = 0, frame = 0 + 413 @ frame_needed = 0, uses_anonymous_args = 0 + 414 @ link register save eliminated. + 391:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pwr.c **** /* Set SLEEPONEXIT bit of Cortex System Control Register */ + 392:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pwr.c **** SET_BIT(SCB->SCR, ((uint32_t)SCB_SCR_SLEEPONEXIT_Msk)); + 415 .loc 1 392 3 view .LVU75 + 416 0000 024A ldr r2, .L32 + 417 0002 1369 ldr r3, [r2, #16] + 418 0004 0221 movs r1, #2 + 419 0006 0B43 orrs r3, r1 + 420 0008 1361 str r3, [r2, #16] + 393:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pwr.c **** } + ARM GAS /tmp/cc4CvqUD.s page 15 + + + 421 .loc 1 393 1 is_stmt 0 view .LVU76 + 422 @ sp needed + 423 000a 7047 bx lr + 424 .L33: + 425 .align 2 + 426 .L32: + 427 000c 00ED00E0 .word -536810240 + 428 .cfi_endproc + 429 .LFE48: + 431 .section .text.HAL_PWR_DisableSleepOnExit,"ax",%progbits + 432 .align 1 + 433 .global HAL_PWR_DisableSleepOnExit + 434 .syntax unified + 435 .code 16 + 436 .thumb_func + 438 HAL_PWR_DisableSleepOnExit: + 439 .LFB49: + 394:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pwr.c **** + 395:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pwr.c **** + 396:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pwr.c **** /** + 397:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pwr.c **** * @brief Disables Sleep-On-Exit feature when returning from Handler mode to Thread mode. + 398:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pwr.c **** * @note Clears SLEEPONEXIT bit of SCR register. When this bit is set, the processor + 399:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pwr.c **** * re-enters SLEEP mode when an interruption handling is over. + 400:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pwr.c **** * @retval None + 401:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pwr.c **** */ + 402:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pwr.c **** void HAL_PWR_DisableSleepOnExit(void) + 403:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pwr.c **** { + 440 .loc 1 403 1 is_stmt 1 view -0 + 441 .cfi_startproc + 442 @ args = 0, pretend = 0, frame = 0 + 443 @ frame_needed = 0, uses_anonymous_args = 0 + 444 @ link register save eliminated. + 404:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pwr.c **** /* Clear SLEEPONEXIT bit of Cortex System Control Register */ + 405:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pwr.c **** CLEAR_BIT(SCB->SCR, ((uint32_t)SCB_SCR_SLEEPONEXIT_Msk)); + 445 .loc 1 405 3 view .LVU78 + 446 0000 024A ldr r2, .L35 + 447 0002 1369 ldr r3, [r2, #16] + 448 0004 0221 movs r1, #2 + 449 0006 8B43 bics r3, r1 + 450 0008 1361 str r3, [r2, #16] + 406:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pwr.c **** } + 451 .loc 1 406 1 is_stmt 0 view .LVU79 + 452 @ sp needed + 453 000a 7047 bx lr + 454 .L36: + 455 .align 2 + 456 .L35: + 457 000c 00ED00E0 .word -536810240 + 458 .cfi_endproc + 459 .LFE49: + 461 .section .text.HAL_PWR_EnableSEVOnPend,"ax",%progbits + 462 .align 1 + 463 .global HAL_PWR_EnableSEVOnPend + 464 .syntax unified + 465 .code 16 + 466 .thumb_func + 468 HAL_PWR_EnableSEVOnPend: + ARM GAS /tmp/cc4CvqUD.s page 16 + + + 469 .LFB50: + 407:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pwr.c **** + 408:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pwr.c **** + 409:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pwr.c **** + 410:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pwr.c **** /** + 411:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pwr.c **** * @brief Enables CORTEX M4 SEVONPEND bit. + 412:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pwr.c **** * @note Sets SEVONPEND bit of SCR register. When this bit is set, this causes + 413:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pwr.c **** * WFE to wake up when an interrupt moves from inactive to pended. + 414:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pwr.c **** * @retval None + 415:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pwr.c **** */ + 416:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pwr.c **** void HAL_PWR_EnableSEVOnPend(void) + 417:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pwr.c **** { + 470 .loc 1 417 1 is_stmt 1 view -0 + 471 .cfi_startproc + 472 @ args = 0, pretend = 0, frame = 0 + 473 @ frame_needed = 0, uses_anonymous_args = 0 + 474 @ link register save eliminated. + 418:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pwr.c **** /* Set SEVONPEND bit of Cortex System Control Register */ + 419:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pwr.c **** SET_BIT(SCB->SCR, ((uint32_t)SCB_SCR_SEVONPEND_Msk)); + 475 .loc 1 419 3 view .LVU81 + 476 0000 024A ldr r2, .L38 + 477 0002 1369 ldr r3, [r2, #16] + 478 0004 1021 movs r1, #16 + 479 0006 0B43 orrs r3, r1 + 480 0008 1361 str r3, [r2, #16] + 420:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pwr.c **** } + 481 .loc 1 420 1 is_stmt 0 view .LVU82 + 482 @ sp needed + 483 000a 7047 bx lr + 484 .L39: + 485 .align 2 + 486 .L38: + 487 000c 00ED00E0 .word -536810240 + 488 .cfi_endproc + 489 .LFE50: + 491 .section .text.HAL_PWR_DisableSEVOnPend,"ax",%progbits + 492 .align 1 + 493 .global HAL_PWR_DisableSEVOnPend + 494 .syntax unified + 495 .code 16 + 496 .thumb_func + 498 HAL_PWR_DisableSEVOnPend: + 499 .LFB51: + 421:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pwr.c **** + 422:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pwr.c **** + 423:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pwr.c **** /** + 424:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pwr.c **** * @brief Disables CORTEX M4 SEVONPEND bit. + 425:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pwr.c **** * @note Clears SEVONPEND bit of SCR register. When this bit is set, this causes + 426:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pwr.c **** * WFE to wake up when an interrupt moves from inactive to pended. + 427:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pwr.c **** * @retval None + 428:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pwr.c **** */ + 429:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pwr.c **** void HAL_PWR_DisableSEVOnPend(void) + 430:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pwr.c **** { + 500 .loc 1 430 1 is_stmt 1 view -0 + 501 .cfi_startproc + 502 @ args = 0, pretend = 0, frame = 0 + 503 @ frame_needed = 0, uses_anonymous_args = 0 + ARM GAS /tmp/cc4CvqUD.s page 17 + + + 504 @ link register save eliminated. + 431:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pwr.c **** /* Clear SEVONPEND bit of Cortex System Control Register */ + 432:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pwr.c **** CLEAR_BIT(SCB->SCR, ((uint32_t)SCB_SCR_SEVONPEND_Msk)); + 505 .loc 1 432 3 view .LVU84 + 506 0000 024A ldr r2, .L41 + 507 0002 1369 ldr r3, [r2, #16] + 508 0004 1021 movs r1, #16 + 509 0006 8B43 bics r3, r1 + 510 0008 1361 str r3, [r2, #16] + 433:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pwr.c **** } + 511 .loc 1 433 1 is_stmt 0 view .LVU85 + 512 @ sp needed + 513 000a 7047 bx lr + 514 .L42: + 515 .align 2 + 516 .L41: + 517 000c 00ED00E0 .word -536810240 + 518 .cfi_endproc + 519 .LFE51: + 521 .text + 522 .Letext0: + 523 .file 2 "/home/chiangni/.config/VSCodium/User/globalStorage/bmd.stm32-for-vscode/@xpack-dev-tools/ + 524 .file 3 "/home/chiangni/.config/VSCodium/User/globalStorage/bmd.stm32-for-vscode/@xpack-dev-tools/ + 525 .file 4 "Drivers/CMSIS/Include/core_cm0.h" + 526 .file 5 "Drivers/CMSIS/Device/ST/STM32F0xx/Include/stm32f042x6.h" + ARM GAS /tmp/cc4CvqUD.s page 18 + + +DEFINED SYMBOLS + *ABS*:00000000 stm32f0xx_hal_pwr.c + /tmp/cc4CvqUD.s:19 .text.HAL_PWR_DeInit:00000000 $t + /tmp/cc4CvqUD.s:25 .text.HAL_PWR_DeInit:00000000 HAL_PWR_DeInit + /tmp/cc4CvqUD.s:50 .text.HAL_PWR_DeInit:00000018 $d + /tmp/cc4CvqUD.s:56 .text.HAL_PWR_EnableBkUpAccess:00000000 $t + /tmp/cc4CvqUD.s:62 .text.HAL_PWR_EnableBkUpAccess:00000000 HAL_PWR_EnableBkUpAccess + /tmp/cc4CvqUD.s:84 .text.HAL_PWR_EnableBkUpAccess:00000010 $d + /tmp/cc4CvqUD.s:89 .text.HAL_PWR_DisableBkUpAccess:00000000 $t + /tmp/cc4CvqUD.s:95 .text.HAL_PWR_DisableBkUpAccess:00000000 HAL_PWR_DisableBkUpAccess + /tmp/cc4CvqUD.s:116 .text.HAL_PWR_DisableBkUpAccess:0000000c $d + /tmp/cc4CvqUD.s:122 .text.HAL_PWR_EnableWakeUpPin:00000000 $t + /tmp/cc4CvqUD.s:128 .text.HAL_PWR_EnableWakeUpPin:00000000 HAL_PWR_EnableWakeUpPin + /tmp/cc4CvqUD.s:148 .text.HAL_PWR_EnableWakeUpPin:0000000c $d + /tmp/cc4CvqUD.s:153 .text.HAL_PWR_DisableWakeUpPin:00000000 $t + /tmp/cc4CvqUD.s:159 .text.HAL_PWR_DisableWakeUpPin:00000000 HAL_PWR_DisableWakeUpPin + /tmp/cc4CvqUD.s:179 .text.HAL_PWR_DisableWakeUpPin:0000000c $d + /tmp/cc4CvqUD.s:184 .text.HAL_PWR_EnterSLEEPMode:00000000 $t + /tmp/cc4CvqUD.s:190 .text.HAL_PWR_EnterSLEEPMode:00000000 HAL_PWR_EnterSLEEPMode + /tmp/cc4CvqUD.s:245 .text.HAL_PWR_EnterSLEEPMode:0000001c $d + /tmp/cc4CvqUD.s:250 .text.HAL_PWR_EnterSTOPMode:00000000 $t + /tmp/cc4CvqUD.s:256 .text.HAL_PWR_EnterSTOPMode:00000000 HAL_PWR_EnterSTOPMode + /tmp/cc4CvqUD.s:348 .text.HAL_PWR_EnterSTOPMode:00000034 $d + /tmp/cc4CvqUD.s:354 .text.HAL_PWR_EnterSTANDBYMode:00000000 $t + /tmp/cc4CvqUD.s:360 .text.HAL_PWR_EnterSTANDBYMode:00000000 HAL_PWR_EnterSTANDBYMode + /tmp/cc4CvqUD.s:396 .text.HAL_PWR_EnterSTANDBYMode:00000018 $d + /tmp/cc4CvqUD.s:402 .text.HAL_PWR_EnableSleepOnExit:00000000 $t + /tmp/cc4CvqUD.s:408 .text.HAL_PWR_EnableSleepOnExit:00000000 HAL_PWR_EnableSleepOnExit + /tmp/cc4CvqUD.s:427 .text.HAL_PWR_EnableSleepOnExit:0000000c $d + /tmp/cc4CvqUD.s:432 .text.HAL_PWR_DisableSleepOnExit:00000000 $t + /tmp/cc4CvqUD.s:438 .text.HAL_PWR_DisableSleepOnExit:00000000 HAL_PWR_DisableSleepOnExit + /tmp/cc4CvqUD.s:457 .text.HAL_PWR_DisableSleepOnExit:0000000c $d + /tmp/cc4CvqUD.s:462 .text.HAL_PWR_EnableSEVOnPend:00000000 $t + /tmp/cc4CvqUD.s:468 .text.HAL_PWR_EnableSEVOnPend:00000000 HAL_PWR_EnableSEVOnPend + /tmp/cc4CvqUD.s:487 .text.HAL_PWR_EnableSEVOnPend:0000000c $d + /tmp/cc4CvqUD.s:492 .text.HAL_PWR_DisableSEVOnPend:00000000 $t + /tmp/cc4CvqUD.s:498 .text.HAL_PWR_DisableSEVOnPend:00000000 HAL_PWR_DisableSEVOnPend + /tmp/cc4CvqUD.s:517 .text.HAL_PWR_DisableSEVOnPend:0000000c $d + +NO UNDEFINED SYMBOLS diff --git a/Software/build/stm32f0xx_hal_pwr.o b/Software/build/stm32f0xx_hal_pwr.o new file mode 100644 index 0000000..b0a0aaf Binary files /dev/null and b/Software/build/stm32f0xx_hal_pwr.o differ diff --git a/Software/build/stm32f0xx_hal_pwr_ex.d b/Software/build/stm32f0xx_hal_pwr_ex.d new file mode 100644 index 0000000..34db7b9 --- /dev/null +++ b/Software/build/stm32f0xx_hal_pwr_ex.d @@ -0,0 +1,60 @@ +build/stm32f0xx_hal_pwr_ex.o: \ + Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pwr_ex.c \ + Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal.h \ + Core/Inc/stm32f0xx_hal_conf.h \ + Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_rcc.h \ + Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_def.h \ + Drivers/CMSIS/Device/ST/STM32F0xx/Include/stm32f0xx.h \ + Drivers/CMSIS/Device/ST/STM32F0xx/Include/stm32f042x6.h \ + Drivers/CMSIS/Include/core_cm0.h Drivers/CMSIS/Include/cmsis_version.h \ + Drivers/CMSIS/Include/cmsis_compiler.h Drivers/CMSIS/Include/cmsis_gcc.h \ + Drivers/CMSIS/Device/ST/STM32F0xx/Include/system_stm32f0xx.h \ + Drivers/STM32F0xx_HAL_Driver/Inc/Legacy/stm32_hal_legacy.h \ + Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_rcc_ex.h \ + Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_gpio.h \ + Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_gpio_ex.h \ + Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_exti.h \ + Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_dma.h \ + Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_dma_ex.h \ + Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_cortex.h \ + Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_adc.h \ + Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_adc_ex.h \ + Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_can.h \ + Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_flash.h \ + Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_flash_ex.h \ + Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_i2c.h \ + Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_i2c_ex.h \ + Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_pwr.h \ + Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_pwr_ex.h \ + Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_tim.h \ + Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_tim_ex.h +Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal.h: +Core/Inc/stm32f0xx_hal_conf.h: +Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_rcc.h: +Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_def.h: +Drivers/CMSIS/Device/ST/STM32F0xx/Include/stm32f0xx.h: +Drivers/CMSIS/Device/ST/STM32F0xx/Include/stm32f042x6.h: +Drivers/CMSIS/Include/core_cm0.h: +Drivers/CMSIS/Include/cmsis_version.h: +Drivers/CMSIS/Include/cmsis_compiler.h: +Drivers/CMSIS/Include/cmsis_gcc.h: +Drivers/CMSIS/Device/ST/STM32F0xx/Include/system_stm32f0xx.h: +Drivers/STM32F0xx_HAL_Driver/Inc/Legacy/stm32_hal_legacy.h: +Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_rcc_ex.h: +Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_gpio.h: +Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_gpio_ex.h: +Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_exti.h: +Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_dma.h: +Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_dma_ex.h: +Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_cortex.h: +Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_adc.h: +Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_adc_ex.h: +Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_can.h: +Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_flash.h: +Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_flash_ex.h: +Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_i2c.h: +Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_i2c_ex.h: +Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_pwr.h: +Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_pwr_ex.h: +Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_tim.h: +Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_tim_ex.h: diff --git a/Software/build/stm32f0xx_hal_pwr_ex.lst b/Software/build/stm32f0xx_hal_pwr_ex.lst new file mode 100644 index 0000000..c86e9cf --- /dev/null +++ b/Software/build/stm32f0xx_hal_pwr_ex.lst @@ -0,0 +1,724 @@ +ARM GAS /tmp/cc5Uj3PK.s page 1 + + + 1 .cpu cortex-m0 + 2 .arch armv6s-m + 3 .fpu softvfp + 4 .eabi_attribute 20, 1 + 5 .eabi_attribute 21, 1 + 6 .eabi_attribute 23, 3 + 7 .eabi_attribute 24, 1 + 8 .eabi_attribute 25, 1 + 9 .eabi_attribute 26, 1 + 10 .eabi_attribute 30, 1 + 11 .eabi_attribute 34, 0 + 12 .eabi_attribute 18, 4 + 13 .file "stm32f0xx_hal_pwr_ex.c" + 14 .text + 15 .Ltext0: + 16 .cfi_sections .debug_frame + 17 .file 1 "Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pwr_ex.c" + 18 .section .text.HAL_PWR_ConfigPVD,"ax",%progbits + 19 .align 1 + 20 .global HAL_PWR_ConfigPVD + 21 .syntax unified + 22 .code 16 + 23 .thumb_func + 25 HAL_PWR_ConfigPVD: + 26 .LVL0: + 27 .LFB40: + 1:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pwr_ex.c **** /** + 2:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pwr_ex.c **** ****************************************************************************** + 3:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pwr_ex.c **** * @file stm32f0xx_hal_pwr_ex.c + 4:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pwr_ex.c **** * @author MCD Application Team + 5:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pwr_ex.c **** * @brief Extended PWR HAL module driver. + 6:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pwr_ex.c **** * This file provides firmware functions to manage the following + 7:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pwr_ex.c **** * functionalities of the Power Controller (PWR) peripheral: + 8:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pwr_ex.c **** * + Extended Initialization and de-initialization functions + 9:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pwr_ex.c **** * + Extended Peripheral Control functions + 10:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pwr_ex.c **** * + 11:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pwr_ex.c **** ****************************************************************************** + 12:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pwr_ex.c **** * @attention + 13:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pwr_ex.c **** * + 14:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pwr_ex.c **** * Copyright (c) 2016 STMicroelectronics. + 15:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pwr_ex.c **** * All rights reserved. + 16:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pwr_ex.c **** * + 17:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pwr_ex.c **** * This software is licensed under terms that can be found in the LICENSE file + 18:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pwr_ex.c **** * in the root directory of this software component. + 19:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pwr_ex.c **** * If no LICENSE file comes with this software, it is provided AS-IS. + 20:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pwr_ex.c **** * + 21:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pwr_ex.c **** ****************************************************************************** + 22:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pwr_ex.c **** */ + 23:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pwr_ex.c **** + 24:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pwr_ex.c **** /* Includes ------------------------------------------------------------------*/ + 25:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pwr_ex.c **** #include "stm32f0xx_hal.h" + 26:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pwr_ex.c **** + 27:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pwr_ex.c **** /** @addtogroup STM32F0xx_HAL_Driver + 28:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pwr_ex.c **** * @{ + 29:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pwr_ex.c **** */ + 30:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pwr_ex.c **** + 31:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pwr_ex.c **** /** @defgroup PWREx PWREx + ARM GAS /tmp/cc5Uj3PK.s page 2 + + + 32:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pwr_ex.c **** * @brief PWREx HAL module driver + 33:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pwr_ex.c **** * @{ + 34:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pwr_ex.c **** */ + 35:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pwr_ex.c **** + 36:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pwr_ex.c **** #ifdef HAL_PWR_MODULE_ENABLED + 37:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pwr_ex.c **** + 38:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pwr_ex.c **** /* Private typedef -----------------------------------------------------------*/ + 39:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pwr_ex.c **** /* Private define ------------------------------------------------------------*/ + 40:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pwr_ex.c **** /** @defgroup PWREx_Private_Constants PWREx Private Constants + 41:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pwr_ex.c **** * @{ + 42:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pwr_ex.c **** */ + 43:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pwr_ex.c **** #define PVD_MODE_IT (0x00010000U) + 44:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pwr_ex.c **** #define PVD_MODE_EVT (0x00020000U) + 45:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pwr_ex.c **** #define PVD_RISING_EDGE (0x00000001U) + 46:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pwr_ex.c **** #define PVD_FALLING_EDGE (0x00000002U) + 47:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pwr_ex.c **** /** + 48:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pwr_ex.c **** * @} + 49:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pwr_ex.c **** */ + 50:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pwr_ex.c **** + 51:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pwr_ex.c **** /* Private macro -------------------------------------------------------------*/ + 52:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pwr_ex.c **** /* Private variables ---------------------------------------------------------*/ + 53:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pwr_ex.c **** /* Private function prototypes -----------------------------------------------*/ + 54:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pwr_ex.c **** /* Exported functions ---------------------------------------------------------*/ + 55:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pwr_ex.c **** + 56:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pwr_ex.c **** /** @defgroup PWREx_Exported_Functions PWREx Exported Functions + 57:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pwr_ex.c **** * @{ + 58:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pwr_ex.c **** */ + 59:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pwr_ex.c **** + 60:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pwr_ex.c **** /** @defgroup PWREx_Exported_Functions_Group1 Peripheral Extended Control Functions + 61:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pwr_ex.c **** * @brief Extended Peripheral Control functions + 62:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pwr_ex.c **** * + 63:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pwr_ex.c **** @verbatim + 64:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pwr_ex.c **** + 65:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pwr_ex.c **** =============================================================================== + 66:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pwr_ex.c **** ##### Peripheral extended control functions ##### + 67:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pwr_ex.c **** =============================================================================== + 68:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pwr_ex.c **** + 69:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pwr_ex.c **** *** PVD configuration *** + 70:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pwr_ex.c **** ========================= + 71:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pwr_ex.c **** [..] + 72:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pwr_ex.c **** (+) The PVD is used to monitor the VDD power supply by comparing it to a + 73:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pwr_ex.c **** threshold selected by the PVD Level (PLS[2:0] bits in the PWR_CR). + 74:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pwr_ex.c **** (+) A PVDO flag is available to indicate if VDD/VDDA is higher or lower + 75:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pwr_ex.c **** than the PVD threshold. This event is internally connected to the EXTI + 76:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pwr_ex.c **** line16 and can generate an interrupt if enabled. This is done through + 77:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pwr_ex.c **** HAL_PWR_ConfigPVD(), HAL_PWR_EnablePVD() functions. + 78:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pwr_ex.c **** (+) The PVD is stopped in Standby mode. + 79:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pwr_ex.c **** -@- PVD is not available on STM32F030x4/x6/x8 + 80:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pwr_ex.c **** + 81:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pwr_ex.c **** *** VDDIO2 Monitor Configuration *** + 82:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pwr_ex.c **** ==================================== + 83:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pwr_ex.c **** [..] + 84:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pwr_ex.c **** (+) VDDIO2 monitor is used to monitor the VDDIO2 power supply by comparing it + 85:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pwr_ex.c **** to VREFInt Voltage + 86:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pwr_ex.c **** (+) This monitor is internally connected to the EXTI line31 + 87:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pwr_ex.c **** and can generate an interrupt if enabled. This is done through + 88:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pwr_ex.c **** HAL_PWREx_EnableVddio2Monitor() function. + ARM GAS /tmp/cc5Uj3PK.s page 3 + + + 89:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pwr_ex.c **** -@- VDDIO2 is available on STM32F07x/09x/04x + 90:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pwr_ex.c **** + 91:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pwr_ex.c **** @endverbatim + 92:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pwr_ex.c **** * @{ + 93:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pwr_ex.c **** */ + 94:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pwr_ex.c **** + 95:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pwr_ex.c **** #if defined (STM32F031x6) || defined (STM32F051x8) || \ + 96:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pwr_ex.c **** defined (STM32F071xB) || defined (STM32F091xC) || \ + 97:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pwr_ex.c **** defined (STM32F042x6) || defined (STM32F072xB) + 98:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pwr_ex.c **** /** + 99:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pwr_ex.c **** * @brief Configures the voltage threshold detected by the Power Voltage Detector(PVD). + 100:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pwr_ex.c **** * @param sConfigPVD pointer to an PWR_PVDTypeDef structure that contains the configuration + 101:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pwr_ex.c **** * information for the PVD. + 102:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pwr_ex.c **** * @note Refer to the electrical characteristics of your device datasheet for + 103:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pwr_ex.c **** * more details about the voltage threshold corresponding to each + 104:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pwr_ex.c **** * detection level. + 105:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pwr_ex.c **** * @retval None + 106:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pwr_ex.c **** */ + 107:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pwr_ex.c **** void HAL_PWR_ConfigPVD(PWR_PVDTypeDef *sConfigPVD) + 108:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pwr_ex.c **** { + 28 .loc 1 108 1 view -0 + 29 .cfi_startproc + 30 @ args = 0, pretend = 0, frame = 0 + 31 @ frame_needed = 0, uses_anonymous_args = 0 + 32 @ link register save eliminated. + 109:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pwr_ex.c **** /* Check the parameters */ + 110:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pwr_ex.c **** assert_param(IS_PWR_PVD_LEVEL(sConfigPVD->PVDLevel)); + 33 .loc 1 110 3 view .LVU1 + 111:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pwr_ex.c **** assert_param(IS_PWR_PVD_MODE(sConfigPVD->Mode)); + 34 .loc 1 111 3 view .LVU2 + 112:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pwr_ex.c **** + 113:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pwr_ex.c **** /* Set PLS[7:5] bits according to PVDLevel value */ + 114:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pwr_ex.c **** MODIFY_REG(PWR->CR, PWR_CR_PLS, sConfigPVD->PVDLevel); + 35 .loc 1 114 3 view .LVU3 + 36 0000 1C4A ldr r2, .L10 + 37 0002 1368 ldr r3, [r2] + 38 0004 E021 movs r1, #224 + 39 0006 8B43 bics r3, r1 + 40 0008 0168 ldr r1, [r0] + 41 000a 0B43 orrs r3, r1 + 42 000c 1360 str r3, [r2] + 115:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pwr_ex.c **** + 116:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pwr_ex.c **** /* Clear any previous config. Keep it clear if no event or IT mode is selected */ + 117:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pwr_ex.c **** __HAL_PWR_PVD_EXTI_DISABLE_EVENT(); + 43 .loc 1 117 3 view .LVU4 + 44 000e 1A4B ldr r3, .L10+4 + 45 0010 5968 ldr r1, [r3, #4] + 46 0012 1A4A ldr r2, .L10+8 + 47 0014 1140 ands r1, r2 + 48 0016 5960 str r1, [r3, #4] + 118:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pwr_ex.c **** __HAL_PWR_PVD_EXTI_DISABLE_IT(); + 49 .loc 1 118 3 view .LVU5 + 50 0018 1968 ldr r1, [r3] + 51 001a 1140 ands r1, r2 + 52 001c 1960 str r1, [r3] + 119:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pwr_ex.c **** __HAL_PWR_PVD_EXTI_DISABLE_RISING_EDGE();__HAL_PWR_PVD_EXTI_DISABLE_FALLING_EDGE(); + 53 .loc 1 119 3 view .LVU6 + ARM GAS /tmp/cc5Uj3PK.s page 4 + + + 54 001e 9968 ldr r1, [r3, #8] + 55 0020 1140 ands r1, r2 + 56 0022 9960 str r1, [r3, #8] + 57 .loc 1 119 44 view .LVU7 + 58 0024 D968 ldr r1, [r3, #12] + 59 0026 0A40 ands r2, r1 + 60 0028 DA60 str r2, [r3, #12] + 120:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pwr_ex.c **** + 121:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pwr_ex.c **** /* Configure interrupt mode */ + 122:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pwr_ex.c **** if((sConfigPVD->Mode & PVD_MODE_IT) == PVD_MODE_IT) + 61 .loc 1 122 3 view .LVU8 + 62 .loc 1 122 17 is_stmt 0 view .LVU9 + 63 002a 4368 ldr r3, [r0, #4] + 64 .loc 1 122 5 view .LVU10 + 65 002c DB03 lsls r3, r3, #15 + 66 002e 05D5 bpl .L2 + 123:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pwr_ex.c **** { + 124:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pwr_ex.c **** __HAL_PWR_PVD_EXTI_ENABLE_IT(); + 67 .loc 1 124 5 is_stmt 1 view .LVU11 + 68 0030 114A ldr r2, .L10+4 + 69 0032 1168 ldr r1, [r2] + 70 0034 8023 movs r3, #128 + 71 0036 5B02 lsls r3, r3, #9 + 72 0038 0B43 orrs r3, r1 + 73 003a 1360 str r3, [r2] + 74 .L2: + 125:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pwr_ex.c **** } + 126:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pwr_ex.c **** + 127:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pwr_ex.c **** /* Configure event mode */ + 128:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pwr_ex.c **** if((sConfigPVD->Mode & PVD_MODE_EVT) == PVD_MODE_EVT) + 75 .loc 1 128 3 view .LVU12 + 76 .loc 1 128 17 is_stmt 0 view .LVU13 + 77 003c 4368 ldr r3, [r0, #4] + 78 .loc 1 128 5 view .LVU14 + 79 003e 9B03 lsls r3, r3, #14 + 80 0040 05D5 bpl .L3 + 129:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pwr_ex.c **** { + 130:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pwr_ex.c **** __HAL_PWR_PVD_EXTI_ENABLE_EVENT(); + 81 .loc 1 130 5 is_stmt 1 view .LVU15 + 82 0042 0D4A ldr r2, .L10+4 + 83 0044 5168 ldr r1, [r2, #4] + 84 0046 8023 movs r3, #128 + 85 0048 5B02 lsls r3, r3, #9 + 86 004a 0B43 orrs r3, r1 + 87 004c 5360 str r3, [r2, #4] + 88 .L3: + 131:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pwr_ex.c **** } + 132:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pwr_ex.c **** + 133:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pwr_ex.c **** /* Configure the edge */ + 134:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pwr_ex.c **** if((sConfigPVD->Mode & PVD_RISING_EDGE) == PVD_RISING_EDGE) + 89 .loc 1 134 3 view .LVU16 + 90 .loc 1 134 17 is_stmt 0 view .LVU17 + 91 004e 4368 ldr r3, [r0, #4] + 92 .loc 1 134 5 view .LVU18 + 93 0050 DB07 lsls r3, r3, #31 + 94 0052 05D5 bpl .L4 + 135:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pwr_ex.c **** { + ARM GAS /tmp/cc5Uj3PK.s page 5 + + + 136:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pwr_ex.c **** __HAL_PWR_PVD_EXTI_ENABLE_RISING_EDGE(); + 95 .loc 1 136 5 is_stmt 1 view .LVU19 + 96 0054 084A ldr r2, .L10+4 + 97 0056 9168 ldr r1, [r2, #8] + 98 0058 8023 movs r3, #128 + 99 005a 5B02 lsls r3, r3, #9 + 100 005c 0B43 orrs r3, r1 + 101 005e 9360 str r3, [r2, #8] + 102 .L4: + 137:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pwr_ex.c **** } + 138:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pwr_ex.c **** + 139:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pwr_ex.c **** if((sConfigPVD->Mode & PVD_FALLING_EDGE) == PVD_FALLING_EDGE) + 103 .loc 1 139 3 view .LVU20 + 104 .loc 1 139 17 is_stmt 0 view .LVU21 + 105 0060 4368 ldr r3, [r0, #4] + 106 .loc 1 139 5 view .LVU22 + 107 0062 9B07 lsls r3, r3, #30 + 108 0064 05D5 bpl .L1 + 140:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pwr_ex.c **** { + 141:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pwr_ex.c **** __HAL_PWR_PVD_EXTI_ENABLE_FALLING_EDGE(); + 109 .loc 1 141 5 is_stmt 1 view .LVU23 + 110 0066 044A ldr r2, .L10+4 + 111 0068 D168 ldr r1, [r2, #12] + 112 006a 8023 movs r3, #128 + 113 006c 5B02 lsls r3, r3, #9 + 114 006e 0B43 orrs r3, r1 + 115 0070 D360 str r3, [r2, #12] + 116 .L1: + 142:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pwr_ex.c **** } + 143:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pwr_ex.c **** } + 117 .loc 1 143 1 is_stmt 0 view .LVU24 + 118 @ sp needed + 119 0072 7047 bx lr + 120 .L11: + 121 .align 2 + 122 .L10: + 123 0074 00700040 .word 1073770496 + 124 0078 00040140 .word 1073808384 + 125 007c FFFFFEFF .word -65537 + 126 .cfi_endproc + 127 .LFE40: + 129 .section .text.HAL_PWR_EnablePVD,"ax",%progbits + 130 .align 1 + 131 .global HAL_PWR_EnablePVD + 132 .syntax unified + 133 .code 16 + 134 .thumb_func + 136 HAL_PWR_EnablePVD: + 137 .LFB41: + 144:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pwr_ex.c **** + 145:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pwr_ex.c **** /** + 146:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pwr_ex.c **** * @brief Enables the Power Voltage Detector(PVD). + 147:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pwr_ex.c **** * @retval None + 148:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pwr_ex.c **** */ + 149:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pwr_ex.c **** void HAL_PWR_EnablePVD(void) + 150:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pwr_ex.c **** { + 138 .loc 1 150 1 is_stmt 1 view -0 + ARM GAS /tmp/cc5Uj3PK.s page 6 + + + 139 .cfi_startproc + 140 @ args = 0, pretend = 0, frame = 0 + 141 @ frame_needed = 0, uses_anonymous_args = 0 + 142 @ link register save eliminated. + 151:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pwr_ex.c **** PWR->CR |= (uint32_t)PWR_CR_PVDE; + 143 .loc 1 151 3 view .LVU26 + 144 .loc 1 151 6 is_stmt 0 view .LVU27 + 145 0000 024A ldr r2, .L13 + 146 0002 1368 ldr r3, [r2] + 147 .loc 1 151 11 view .LVU28 + 148 0004 1021 movs r1, #16 + 149 0006 0B43 orrs r3, r1 + 150 0008 1360 str r3, [r2] + 152:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pwr_ex.c **** } + 151 .loc 1 152 1 view .LVU29 + 152 @ sp needed + 153 000a 7047 bx lr + 154 .L14: + 155 .align 2 + 156 .L13: + 157 000c 00700040 .word 1073770496 + 158 .cfi_endproc + 159 .LFE41: + 161 .section .text.HAL_PWR_DisablePVD,"ax",%progbits + 162 .align 1 + 163 .global HAL_PWR_DisablePVD + 164 .syntax unified + 165 .code 16 + 166 .thumb_func + 168 HAL_PWR_DisablePVD: + 169 .LFB42: + 153:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pwr_ex.c **** + 154:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pwr_ex.c **** /** + 155:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pwr_ex.c **** * @brief Disables the Power Voltage Detector(PVD). + 156:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pwr_ex.c **** * @retval None + 157:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pwr_ex.c **** */ + 158:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pwr_ex.c **** void HAL_PWR_DisablePVD(void) + 159:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pwr_ex.c **** { + 170 .loc 1 159 1 is_stmt 1 view -0 + 171 .cfi_startproc + 172 @ args = 0, pretend = 0, frame = 0 + 173 @ frame_needed = 0, uses_anonymous_args = 0 + 174 @ link register save eliminated. + 160:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pwr_ex.c **** PWR->CR &= ~((uint32_t)PWR_CR_PVDE); + 175 .loc 1 160 3 view .LVU31 + 176 .loc 1 160 6 is_stmt 0 view .LVU32 + 177 0000 024A ldr r2, .L16 + 178 0002 1368 ldr r3, [r2] + 179 .loc 1 160 11 view .LVU33 + 180 0004 1021 movs r1, #16 + 181 0006 8B43 bics r3, r1 + 182 0008 1360 str r3, [r2] + 161:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pwr_ex.c **** } + 183 .loc 1 161 1 view .LVU34 + 184 @ sp needed + 185 000a 7047 bx lr + 186 .L17: + ARM GAS /tmp/cc5Uj3PK.s page 7 + + + 187 .align 2 + 188 .L16: + 189 000c 00700040 .word 1073770496 + 190 .cfi_endproc + 191 .LFE42: + 193 .section .text.HAL_PWR_PVDCallback,"ax",%progbits + 194 .align 1 + 195 .weak HAL_PWR_PVDCallback + 196 .syntax unified + 197 .code 16 + 198 .thumb_func + 200 HAL_PWR_PVDCallback: + 201 .LFB44: + 162:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pwr_ex.c **** + 163:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pwr_ex.c **** /** + 164:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pwr_ex.c **** * @brief This function handles the PWR PVD interrupt request. + 165:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pwr_ex.c **** * @note This API should be called under the PVD_IRQHandler() or PVD_VDDIO2_IRQHandler(). + 166:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pwr_ex.c **** * @retval None + 167:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pwr_ex.c **** */ + 168:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pwr_ex.c **** void HAL_PWR_PVD_IRQHandler(void) + 169:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pwr_ex.c **** { + 170:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pwr_ex.c **** /* Check PWR exti flag */ + 171:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pwr_ex.c **** if(__HAL_PWR_PVD_EXTI_GET_FLAG() != RESET) + 172:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pwr_ex.c **** { + 173:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pwr_ex.c **** /* PWR PVD interrupt user callback */ + 174:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pwr_ex.c **** HAL_PWR_PVDCallback(); + 175:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pwr_ex.c **** + 176:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pwr_ex.c **** /* Clear PWR Exti pending bit */ + 177:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pwr_ex.c **** __HAL_PWR_PVD_EXTI_CLEAR_FLAG(); + 178:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pwr_ex.c **** } + 179:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pwr_ex.c **** } + 180:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pwr_ex.c **** + 181:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pwr_ex.c **** /** + 182:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pwr_ex.c **** * @brief PWR PVD interrupt callback + 183:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pwr_ex.c **** * @retval None + 184:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pwr_ex.c **** */ + 185:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pwr_ex.c **** __weak void HAL_PWR_PVDCallback(void) + 186:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pwr_ex.c **** { + 202 .loc 1 186 1 is_stmt 1 view -0 + 203 .cfi_startproc + 204 @ args = 0, pretend = 0, frame = 0 + 205 @ frame_needed = 0, uses_anonymous_args = 0 + 206 @ link register save eliminated. + 187:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pwr_ex.c **** /* NOTE : This function Should not be modified, when the callback is needed, + 188:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pwr_ex.c **** the HAL_PWR_PVDCallback could be implemented in the user file + 189:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pwr_ex.c **** */ + 190:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pwr_ex.c **** } + 207 .loc 1 190 1 view .LVU36 + 208 @ sp needed + 209 0000 7047 bx lr + 210 .cfi_endproc + 211 .LFE44: + 213 .section .text.HAL_PWR_PVD_IRQHandler,"ax",%progbits + 214 .align 1 + 215 .global HAL_PWR_PVD_IRQHandler + 216 .syntax unified + 217 .code 16 + ARM GAS /tmp/cc5Uj3PK.s page 8 + + + 218 .thumb_func + 220 HAL_PWR_PVD_IRQHandler: + 221 .LFB43: + 169:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pwr_ex.c **** /* Check PWR exti flag */ + 222 .loc 1 169 1 view -0 + 223 .cfi_startproc + 224 @ args = 0, pretend = 0, frame = 0 + 225 @ frame_needed = 0, uses_anonymous_args = 0 + 226 0000 10B5 push {r4, lr} + 227 .cfi_def_cfa_offset 8 + 228 .cfi_offset 4, -8 + 229 .cfi_offset 14, -4 + 171:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pwr_ex.c **** { + 230 .loc 1 171 3 view .LVU38 + 171:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pwr_ex.c **** { + 231 .loc 1 171 6 is_stmt 0 view .LVU39 + 232 0002 064B ldr r3, .L23 + 233 0004 5B69 ldr r3, [r3, #20] + 171:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pwr_ex.c **** { + 234 .loc 1 171 5 view .LVU40 + 235 0006 DB03 lsls r3, r3, #15 + 236 0008 00D4 bmi .L22 + 237 .L19: + 179:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pwr_ex.c **** + 238 .loc 1 179 1 view .LVU41 + 239 @ sp needed + 240 000a 10BD pop {r4, pc} + 241 .L22: + 174:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pwr_ex.c **** + 242 .loc 1 174 5 is_stmt 1 view .LVU42 + 243 000c FFF7FEFF bl HAL_PWR_PVDCallback + 244 .LVL1: + 177:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pwr_ex.c **** } + 245 .loc 1 177 5 view .LVU43 + 246 0010 024B ldr r3, .L23 + 247 0012 8022 movs r2, #128 + 248 0014 5202 lsls r2, r2, #9 + 249 0016 5A61 str r2, [r3, #20] + 179:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pwr_ex.c **** + 250 .loc 1 179 1 is_stmt 0 view .LVU44 + 251 0018 F7E7 b .L19 + 252 .L24: + 253 001a C046 .align 2 + 254 .L23: + 255 001c 00040140 .word 1073808384 + 256 .cfi_endproc + 257 .LFE43: + 259 .section .text.HAL_PWREx_EnableVddio2Monitor,"ax",%progbits + 260 .align 1 + 261 .global HAL_PWREx_EnableVddio2Monitor + 262 .syntax unified + 263 .code 16 + 264 .thumb_func + 266 HAL_PWREx_EnableVddio2Monitor: + 267 .LFB45: + 191:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pwr_ex.c **** + 192:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pwr_ex.c **** #endif /* defined (STM32F031x6) || defined (STM32F051x8) || */ + ARM GAS /tmp/cc5Uj3PK.s page 9 + + + 193:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pwr_ex.c **** /* defined (STM32F071xB) || defined (STM32F091xC) || */ + 194:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pwr_ex.c **** /* defined (STM32F042x6) || defined (STM32F072xB) */ + 195:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pwr_ex.c **** + 196:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pwr_ex.c **** #if defined (STM32F042x6) || defined (STM32F048xx) || \ + 197:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pwr_ex.c **** defined (STM32F071xB) || defined (STM32F072xB) || defined (STM32F078xx) || \ + 198:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pwr_ex.c **** defined (STM32F091xC) || defined (STM32F098xx) + 199:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pwr_ex.c **** /** + 200:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pwr_ex.c **** * @brief Enable VDDIO2 monitor: enable Exti 31 and falling edge detection. + 201:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pwr_ex.c **** * @note If Exti 31 is enable correlty and VDDIO2 voltage goes below Vrefint, + 202:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pwr_ex.c **** an interrupt is generated Irq line 1. + 203:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pwr_ex.c **** NVIS has to be enable by user. + 204:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pwr_ex.c **** * @retval None + 205:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pwr_ex.c **** */ + 206:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pwr_ex.c **** void HAL_PWREx_EnableVddio2Monitor(void) + 207:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pwr_ex.c **** { + 268 .loc 1 207 1 is_stmt 1 view -0 + 269 .cfi_startproc + 270 @ args = 0, pretend = 0, frame = 0 + 271 @ frame_needed = 0, uses_anonymous_args = 0 + 272 @ link register save eliminated. + 208:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pwr_ex.c **** __HAL_PWR_VDDIO2_EXTI_ENABLE_IT(); + 273 .loc 1 208 3 view .LVU46 + 274 0000 044B ldr r3, .L26 + 275 0002 1968 ldr r1, [r3] + 276 0004 8022 movs r2, #128 + 277 0006 1206 lsls r2, r2, #24 + 278 0008 1143 orrs r1, r2 + 279 000a 1960 str r1, [r3] + 209:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pwr_ex.c **** __HAL_PWR_VDDIO2_EXTI_ENABLE_FALLING_EDGE(); + 280 .loc 1 209 3 view .LVU47 + 281 000c D968 ldr r1, [r3, #12] + 282 000e 0A43 orrs r2, r1 + 283 0010 DA60 str r2, [r3, #12] + 210:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pwr_ex.c **** } + 284 .loc 1 210 1 is_stmt 0 view .LVU48 + 285 @ sp needed + 286 0012 7047 bx lr + 287 .L27: + 288 .align 2 + 289 .L26: + 290 0014 00040140 .word 1073808384 + 291 .cfi_endproc + 292 .LFE45: + 294 .section .text.HAL_PWREx_DisableVddio2Monitor,"ax",%progbits + 295 .align 1 + 296 .global HAL_PWREx_DisableVddio2Monitor + 297 .syntax unified + 298 .code 16 + 299 .thumb_func + 301 HAL_PWREx_DisableVddio2Monitor: + 302 .LFB46: + 211:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pwr_ex.c **** + 212:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pwr_ex.c **** /** + 213:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pwr_ex.c **** * @brief Disable the Vddio2 Monitor. + 214:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pwr_ex.c **** * @retval None + 215:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pwr_ex.c **** */ + 216:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pwr_ex.c **** void HAL_PWREx_DisableVddio2Monitor(void) + ARM GAS /tmp/cc5Uj3PK.s page 10 + + + 217:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pwr_ex.c **** { + 303 .loc 1 217 1 is_stmt 1 view -0 + 304 .cfi_startproc + 305 @ args = 0, pretend = 0, frame = 0 + 306 @ frame_needed = 0, uses_anonymous_args = 0 + 307 @ link register save eliminated. + 218:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pwr_ex.c **** __HAL_PWR_VDDIO2_EXTI_DISABLE_IT(); + 308 .loc 1 218 3 view .LVU50 + 309 0000 064B ldr r3, .L29 + 310 0002 1A68 ldr r2, [r3] + 311 0004 5200 lsls r2, r2, #1 + 312 0006 5208 lsrs r2, r2, #1 + 313 0008 1A60 str r2, [r3] + 219:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pwr_ex.c **** __HAL_PWR_VDDIO2_EXTI_DISABLE_FALLING_EDGE(); + 314 .loc 1 219 3 view .LVU51 + 315 .loc 1 219 3 view .LVU52 + 316 000a DA68 ldr r2, [r3, #12] + 317 000c 5200 lsls r2, r2, #1 + 318 000e 5208 lsrs r2, r2, #1 + 319 0010 DA60 str r2, [r3, #12] + 320 .loc 1 219 3 view .LVU53 + 321 0012 9A68 ldr r2, [r3, #8] + 322 0014 5200 lsls r2, r2, #1 + 323 0016 5208 lsrs r2, r2, #1 + 324 0018 9A60 str r2, [r3, #8] + 325 .loc 1 219 3 view .LVU54 + 220:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pwr_ex.c **** + 221:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pwr_ex.c **** } + 326 .loc 1 221 1 is_stmt 0 view .LVU55 + 327 @ sp needed + 328 001a 7047 bx lr + 329 .L30: + 330 .align 2 + 331 .L29: + 332 001c 00040140 .word 1073808384 + 333 .cfi_endproc + 334 .LFE46: + 336 .section .text.HAL_PWREx_Vddio2MonitorCallback,"ax",%progbits + 337 .align 1 + 338 .weak HAL_PWREx_Vddio2MonitorCallback + 339 .syntax unified + 340 .code 16 + 341 .thumb_func + 343 HAL_PWREx_Vddio2MonitorCallback: + 344 .LFB48: + 222:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pwr_ex.c **** + 223:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pwr_ex.c **** /** + 224:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pwr_ex.c **** * @brief This function handles the PWR Vddio2 monitor interrupt request. + 225:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pwr_ex.c **** * @note This API should be called under the VDDIO2_IRQHandler() PVD_VDDIO2_IRQHandler(). + 226:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pwr_ex.c **** * @retval None + 227:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pwr_ex.c **** */ + 228:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pwr_ex.c **** void HAL_PWREx_Vddio2Monitor_IRQHandler(void) + 229:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pwr_ex.c **** { + 230:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pwr_ex.c **** /* Check PWR exti flag */ + 231:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pwr_ex.c **** if(__HAL_PWR_VDDIO2_EXTI_GET_FLAG() != RESET) + 232:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pwr_ex.c **** { + 233:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pwr_ex.c **** /* PWR Vddio2 monitor interrupt user callback */ + ARM GAS /tmp/cc5Uj3PK.s page 11 + + + 234:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pwr_ex.c **** HAL_PWREx_Vddio2MonitorCallback(); + 235:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pwr_ex.c **** + 236:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pwr_ex.c **** /* Clear PWR Exti pending bit */ + 237:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pwr_ex.c **** __HAL_PWR_VDDIO2_EXTI_CLEAR_FLAG(); + 238:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pwr_ex.c **** } + 239:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pwr_ex.c **** } + 240:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pwr_ex.c **** + 241:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pwr_ex.c **** /** + 242:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pwr_ex.c **** * @brief PWR Vddio2 Monitor interrupt callback + 243:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pwr_ex.c **** * @retval None + 244:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pwr_ex.c **** */ + 245:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pwr_ex.c **** __weak void HAL_PWREx_Vddio2MonitorCallback(void) + 246:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pwr_ex.c **** { + 345 .loc 1 246 1 is_stmt 1 view -0 + 346 .cfi_startproc + 347 @ args = 0, pretend = 0, frame = 0 + 348 @ frame_needed = 0, uses_anonymous_args = 0 + 349 @ link register save eliminated. + 247:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pwr_ex.c **** /* NOTE : This function Should not be modified, when the callback is needed, + 248:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pwr_ex.c **** the HAL_PWREx_Vddio2MonitorCallback could be implemented in the user file + 249:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pwr_ex.c **** */ + 250:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pwr_ex.c **** } + 350 .loc 1 250 1 view .LVU57 + 351 @ sp needed + 352 0000 7047 bx lr + 353 .cfi_endproc + 354 .LFE48: + 356 .section .text.HAL_PWREx_Vddio2Monitor_IRQHandler,"ax",%progbits + 357 .align 1 + 358 .global HAL_PWREx_Vddio2Monitor_IRQHandler + 359 .syntax unified + 360 .code 16 + 361 .thumb_func + 363 HAL_PWREx_Vddio2Monitor_IRQHandler: + 364 .LFB47: + 229:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pwr_ex.c **** /* Check PWR exti flag */ + 365 .loc 1 229 1 view -0 + 366 .cfi_startproc + 367 @ args = 0, pretend = 0, frame = 0 + 368 @ frame_needed = 0, uses_anonymous_args = 0 + 369 0000 10B5 push {r4, lr} + 370 .cfi_def_cfa_offset 8 + 371 .cfi_offset 4, -8 + 372 .cfi_offset 14, -4 + 231:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pwr_ex.c **** { + 373 .loc 1 231 3 view .LVU59 + 231:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pwr_ex.c **** { + 374 .loc 1 231 6 is_stmt 0 view .LVU60 + 375 0002 064B ldr r3, .L35 + 376 0004 5B69 ldr r3, [r3, #20] + 231:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pwr_ex.c **** { + 377 .loc 1 231 5 view .LVU61 + 378 0006 002B cmp r3, #0 + 379 0008 00DB blt .L34 + 380 .L32: + 239:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pwr_ex.c **** + 381 .loc 1 239 1 view .LVU62 + ARM GAS /tmp/cc5Uj3PK.s page 12 + + + 382 @ sp needed + 383 000a 10BD pop {r4, pc} + 384 .L34: + 234:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pwr_ex.c **** + 385 .loc 1 234 5 is_stmt 1 view .LVU63 + 386 000c FFF7FEFF bl HAL_PWREx_Vddio2MonitorCallback + 387 .LVL2: + 237:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pwr_ex.c **** } + 388 .loc 1 237 5 view .LVU64 + 389 0010 024B ldr r3, .L35 + 390 0012 8022 movs r2, #128 + 391 0014 1206 lsls r2, r2, #24 + 392 0016 5A61 str r2, [r3, #20] + 239:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pwr_ex.c **** + 393 .loc 1 239 1 is_stmt 0 view .LVU65 + 394 0018 F7E7 b .L32 + 395 .L36: + 396 001a C046 .align 2 + 397 .L35: + 398 001c 00040140 .word 1073808384 + 399 .cfi_endproc + 400 .LFE47: + 402 .text + 403 .Letext0: + 404 .file 2 "/home/chiangni/.config/VSCodium/User/globalStorage/bmd.stm32-for-vscode/@xpack-dev-tools/ + 405 .file 3 "/home/chiangni/.config/VSCodium/User/globalStorage/bmd.stm32-for-vscode/@xpack-dev-tools/ + 406 .file 4 "Drivers/CMSIS/Device/ST/STM32F0xx/Include/stm32f042x6.h" + 407 .file 5 "Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_pwr_ex.h" + 408 .file 6 "Drivers/CMSIS/Device/ST/STM32F0xx/Include/stm32f0xx.h" + ARM GAS /tmp/cc5Uj3PK.s page 13 + + +DEFINED SYMBOLS + *ABS*:00000000 stm32f0xx_hal_pwr_ex.c + /tmp/cc5Uj3PK.s:19 .text.HAL_PWR_ConfigPVD:00000000 $t + /tmp/cc5Uj3PK.s:25 .text.HAL_PWR_ConfigPVD:00000000 HAL_PWR_ConfigPVD + /tmp/cc5Uj3PK.s:123 .text.HAL_PWR_ConfigPVD:00000074 $d + /tmp/cc5Uj3PK.s:130 .text.HAL_PWR_EnablePVD:00000000 $t + /tmp/cc5Uj3PK.s:136 .text.HAL_PWR_EnablePVD:00000000 HAL_PWR_EnablePVD + /tmp/cc5Uj3PK.s:157 .text.HAL_PWR_EnablePVD:0000000c $d + /tmp/cc5Uj3PK.s:162 .text.HAL_PWR_DisablePVD:00000000 $t + /tmp/cc5Uj3PK.s:168 .text.HAL_PWR_DisablePVD:00000000 HAL_PWR_DisablePVD + /tmp/cc5Uj3PK.s:189 .text.HAL_PWR_DisablePVD:0000000c $d + /tmp/cc5Uj3PK.s:194 .text.HAL_PWR_PVDCallback:00000000 $t + /tmp/cc5Uj3PK.s:200 .text.HAL_PWR_PVDCallback:00000000 HAL_PWR_PVDCallback + /tmp/cc5Uj3PK.s:214 .text.HAL_PWR_PVD_IRQHandler:00000000 $t + /tmp/cc5Uj3PK.s:220 .text.HAL_PWR_PVD_IRQHandler:00000000 HAL_PWR_PVD_IRQHandler + /tmp/cc5Uj3PK.s:255 .text.HAL_PWR_PVD_IRQHandler:0000001c $d + /tmp/cc5Uj3PK.s:260 .text.HAL_PWREx_EnableVddio2Monitor:00000000 $t + /tmp/cc5Uj3PK.s:266 .text.HAL_PWREx_EnableVddio2Monitor:00000000 HAL_PWREx_EnableVddio2Monitor + /tmp/cc5Uj3PK.s:290 .text.HAL_PWREx_EnableVddio2Monitor:00000014 $d + /tmp/cc5Uj3PK.s:295 .text.HAL_PWREx_DisableVddio2Monitor:00000000 $t + /tmp/cc5Uj3PK.s:301 .text.HAL_PWREx_DisableVddio2Monitor:00000000 HAL_PWREx_DisableVddio2Monitor + /tmp/cc5Uj3PK.s:332 .text.HAL_PWREx_DisableVddio2Monitor:0000001c $d + /tmp/cc5Uj3PK.s:337 .text.HAL_PWREx_Vddio2MonitorCallback:00000000 $t + /tmp/cc5Uj3PK.s:343 .text.HAL_PWREx_Vddio2MonitorCallback:00000000 HAL_PWREx_Vddio2MonitorCallback + /tmp/cc5Uj3PK.s:357 .text.HAL_PWREx_Vddio2Monitor_IRQHandler:00000000 $t + /tmp/cc5Uj3PK.s:363 .text.HAL_PWREx_Vddio2Monitor_IRQHandler:00000000 HAL_PWREx_Vddio2Monitor_IRQHandler + /tmp/cc5Uj3PK.s:398 .text.HAL_PWREx_Vddio2Monitor_IRQHandler:0000001c $d + +NO UNDEFINED SYMBOLS diff --git a/Software/build/stm32f0xx_hal_pwr_ex.o b/Software/build/stm32f0xx_hal_pwr_ex.o new file mode 100644 index 0000000..b623c17 Binary files /dev/null and b/Software/build/stm32f0xx_hal_pwr_ex.o differ diff --git a/Software/build/stm32f0xx_hal_rcc.d b/Software/build/stm32f0xx_hal_rcc.d new file mode 100644 index 0000000..38f69ab --- /dev/null +++ b/Software/build/stm32f0xx_hal_rcc.d @@ -0,0 +1,60 @@ +build/stm32f0xx_hal_rcc.o: \ + Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c \ + Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal.h \ + Core/Inc/stm32f0xx_hal_conf.h \ + Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_rcc.h \ + Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_def.h \ + Drivers/CMSIS/Device/ST/STM32F0xx/Include/stm32f0xx.h \ + Drivers/CMSIS/Device/ST/STM32F0xx/Include/stm32f042x6.h \ + Drivers/CMSIS/Include/core_cm0.h Drivers/CMSIS/Include/cmsis_version.h \ + Drivers/CMSIS/Include/cmsis_compiler.h Drivers/CMSIS/Include/cmsis_gcc.h \ + Drivers/CMSIS/Device/ST/STM32F0xx/Include/system_stm32f0xx.h \ + Drivers/STM32F0xx_HAL_Driver/Inc/Legacy/stm32_hal_legacy.h \ + Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_rcc_ex.h \ + Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_gpio.h \ + Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_gpio_ex.h \ + Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_exti.h \ + Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_dma.h \ + Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_dma_ex.h \ + Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_cortex.h \ + Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_adc.h \ + Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_adc_ex.h \ + Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_can.h \ + Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_flash.h \ + Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_flash_ex.h \ + Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_i2c.h \ + Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_i2c_ex.h \ + Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_pwr.h \ + Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_pwr_ex.h \ + Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_tim.h \ + Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_tim_ex.h +Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal.h: +Core/Inc/stm32f0xx_hal_conf.h: +Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_rcc.h: +Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_def.h: +Drivers/CMSIS/Device/ST/STM32F0xx/Include/stm32f0xx.h: +Drivers/CMSIS/Device/ST/STM32F0xx/Include/stm32f042x6.h: +Drivers/CMSIS/Include/core_cm0.h: +Drivers/CMSIS/Include/cmsis_version.h: +Drivers/CMSIS/Include/cmsis_compiler.h: +Drivers/CMSIS/Include/cmsis_gcc.h: +Drivers/CMSIS/Device/ST/STM32F0xx/Include/system_stm32f0xx.h: +Drivers/STM32F0xx_HAL_Driver/Inc/Legacy/stm32_hal_legacy.h: +Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_rcc_ex.h: +Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_gpio.h: +Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_gpio_ex.h: +Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_exti.h: +Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_dma.h: +Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_dma_ex.h: +Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_cortex.h: +Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_adc.h: +Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_adc_ex.h: +Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_can.h: +Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_flash.h: +Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_flash_ex.h: +Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_i2c.h: +Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_i2c_ex.h: +Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_pwr.h: +Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_pwr_ex.h: +Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_tim.h: +Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_tim_ex.h: diff --git a/Software/build/stm32f0xx_hal_rcc.lst b/Software/build/stm32f0xx_hal_rcc.lst new file mode 100644 index 0000000..44c22e0 --- /dev/null +++ b/Software/build/stm32f0xx_hal_rcc.lst @@ -0,0 +1,4458 @@ +ARM GAS /tmp/ccCIS8O6.s page 1 + + + 1 .cpu cortex-m0 + 2 .arch armv6s-m + 3 .fpu softvfp + 4 .eabi_attribute 20, 1 + 5 .eabi_attribute 21, 1 + 6 .eabi_attribute 23, 3 + 7 .eabi_attribute 24, 1 + 8 .eabi_attribute 25, 1 + 9 .eabi_attribute 26, 1 + 10 .eabi_attribute 30, 1 + 11 .eabi_attribute 34, 0 + 12 .eabi_attribute 18, 4 + 13 .file "stm32f0xx_hal_rcc.c" + 14 .text + 15 .Ltext0: + 16 .cfi_sections .debug_frame + 17 .file 1 "Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c" + 18 .section .text.HAL_RCC_DeInit,"ax",%progbits + 19 .align 1 + 20 .global HAL_RCC_DeInit + 21 .syntax unified + 22 .code 16 + 23 .thumb_func + 25 HAL_RCC_DeInit: + 26 .LFB40: + 1:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** /** + 2:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** ****************************************************************************** + 3:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** * @file stm32f0xx_hal_rcc.c + 4:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** * @author MCD Application Team + 5:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** * @brief RCC HAL module driver. + 6:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** * This file provides firmware functions to manage the following + 7:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** * functionalities of the Reset and Clock Control (RCC) peripheral: + 8:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** * + Initialization and de-initialization functions + 9:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** * + Peripheral Control functions + 10:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** * + 11:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** @verbatim + 12:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** ============================================================================== + 13:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** ##### RCC specific features ##### + 14:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** ============================================================================== + 15:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** [..] + 16:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** After reset the device is running from Internal High Speed oscillator + 17:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** (HSI 8MHz) with Flash 0 wait state, Flash prefetch buffer is disabled, + 18:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** and all peripherals are off except internal SRAM, Flash and JTAG. + 19:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** (+) There is no prescaler on High speed (AHB) and Low speed (APB) buses; + 20:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** all peripherals mapped on these buses are running at HSI speed. + 21:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** (+) The clock for all peripherals is switched off, except the SRAM and FLASH. + 22:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** (+) All GPIOs are in input floating state, except the JTAG pins which + 23:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** are assigned to be used for debug purpose. + 24:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** [..] Once the device started from reset, the user application has to: + 25:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** (+) Configure the clock source to be used to drive the System clock + 26:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** (if the application needs higher frequency/performance) + 27:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** (+) Configure the System clock frequency and Flash settings + 28:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** (+) Configure the AHB and APB buses prescalers + 29:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** (+) Enable the clock for the peripheral(s) to be used + 30:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** (+) Configure the clock source(s) for peripherals whose clocks are not + 31:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** derived from the System clock (RTC, ADC, I2C, USART, TIM, USB FS, etc..) + 32:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** + ARM GAS /tmp/ccCIS8O6.s page 2 + + + 33:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** ##### RCC Limitations ##### + 34:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** ============================================================================== + 35:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** [..] + 36:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** A delay between an RCC peripheral clock enable and the effective peripheral + 37:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** enabling should be taken into account in order to manage the peripheral read/write + 38:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** from/to registers. + 39:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** (+) This delay depends on the peripheral mapping. + 40:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** (++) AHB & APB peripherals, 1 dummy read is necessary + 41:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** + 42:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** [..] + 43:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** Workarounds: + 44:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** (#) For AHB & APB peripherals, a dummy read to the peripheral register has been + 45:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** inserted in each __HAL_RCC_PPP_CLK_ENABLE() macro. + 46:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** + 47:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** @endverbatim + 48:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** ****************************************************************************** + 49:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** * @attention + 50:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** * + 51:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** * Copyright (c) 2016 STMicroelectronics. + 52:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** * All rights reserved. + 53:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** * + 54:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** * This software is licensed under terms that can be found in the LICENSE file in + 55:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** * the root directory of this software component. + 56:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** * If no LICENSE file comes with this software, it is provided AS-IS. + 57:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** ****************************************************************************** + 58:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** */ + 59:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** + 60:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** /* Includes ------------------------------------------------------------------*/ + 61:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** #include "stm32f0xx_hal.h" + 62:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** + 63:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** /** @addtogroup STM32F0xx_HAL_Driver + 64:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** * @{ + 65:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** */ + 66:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** + 67:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** /** @defgroup RCC RCC + 68:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** * @brief RCC HAL module driver + 69:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** * @{ + 70:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** */ + 71:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** + 72:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** #ifdef HAL_RCC_MODULE_ENABLED + 73:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** + 74:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** /* Private typedef -----------------------------------------------------------*/ + 75:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** /* Private define ------------------------------------------------------------*/ + 76:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** /** @defgroup RCC_Private_Constants RCC Private Constants + 77:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** * @{ + 78:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** */ + 79:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** /** + 80:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** * @} + 81:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** */ + 82:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** /* Private macro -------------------------------------------------------------*/ + 83:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** /** @defgroup RCC_Private_Macros RCC Private Macros + 84:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** * @{ + 85:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** */ + 86:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** + 87:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** #define MCO1_CLK_ENABLE() __HAL_RCC_GPIOA_CLK_ENABLE() + 88:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** #define MCO1_GPIO_PORT GPIOA + 89:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** #define MCO1_PIN GPIO_PIN_8 + ARM GAS /tmp/ccCIS8O6.s page 3 + + + 90:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** + 91:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** /** + 92:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** * @} + 93:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** */ + 94:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** + 95:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** /* Private variables ---------------------------------------------------------*/ + 96:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** /** @defgroup RCC_Private_Variables RCC Private Variables + 97:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** * @{ + 98:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** */ + 99:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** /** + 100:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** * @} + 101:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** */ + 102:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** + 103:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** /* Private function prototypes -----------------------------------------------*/ + 104:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** /* Exported functions ---------------------------------------------------------*/ + 105:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** + 106:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** /** @defgroup RCC_Exported_Functions RCC Exported Functions + 107:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** * @{ + 108:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** */ + 109:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** + 110:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** /** @defgroup RCC_Exported_Functions_Group1 Initialization and de-initialization functions + 111:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** * @brief Initialization and Configuration functions + 112:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** * + 113:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** @verbatim + 114:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** =============================================================================== + 115:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** ##### Initialization and de-initialization functions ##### + 116:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** =============================================================================== + 117:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** [..] + 118:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** This section provides functions allowing to configure the internal/external oscillators + 119:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** (HSE, HSI, HSI14, HSI48, LSE, LSI, PLL, CSS and MCO) and the System buses clocks (SYSCLK, + 120:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** AHB and APB1). + 121:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** + 122:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** [..] Internal/external clock and PLL configuration + 123:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** (#) HSI (high-speed internal), 8 MHz factory-trimmed RC used directly or through + 124:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** the PLL as System clock source. + 125:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** The HSI clock can be used also to clock the USART and I2C peripherals. + 126:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** + 127:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** (#) HSI14 (high-speed internal), 14 MHz factory-trimmed RC used directly to clock + 128:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** the ADC peripheral. + 129:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** + 130:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** (#) LSI (low-speed internal), ~40 KHz low consumption RC used as IWDG and/or RTC + 131:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** clock source. + 132:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** + 133:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** (#) HSE (high-speed external), 4 to 32 MHz crystal oscillator used directly or + 134:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** through the PLL as System clock source. Can be used also as RTC clock source. + 135:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** + 136:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** (#) LSE (low-speed external), 32 KHz oscillator used as RTC clock source. + 137:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** + 138:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** (#) PLL (clocked by HSI, HSI48 or HSE), featuring different output clocks: + 139:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** (++) The first output is used to generate the high speed system clock (up to 48 MHz) + 140:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** (++) The second output is used to generate the clock for the USB FS (48 MHz) + 141:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** (++) The third output may be used to generate the clock for the TIM, I2C and USART + 142:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** peripherals (up to 48 MHz) + 143:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** + 144:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** (#) CSS (Clock security system), once enable using the macro __HAL_RCC_CSS_ENABLE() + 145:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** and if a HSE clock failure occurs(HSE used directly or through PLL as System + 146:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** clock source), the System clocks automatically switched to HSI and an interrupt + ARM GAS /tmp/ccCIS8O6.s page 4 + + + 147:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** is generated if enabled. The interrupt is linked to the Cortex-M0 NMI + 148:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** (Non-Maskable Interrupt) exception vector. + 149:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** + 150:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** (#) MCO (microcontroller clock output), used to output SYSCLK, HSI, HSE, LSI, LSE or PLL + 151:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** clock (divided by 2) output on pin (such as PA8 pin). + 152:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** + 153:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** [..] System, AHB and APB buses clocks configuration + 154:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** (#) Several clock sources can be used to drive the System clock (SYSCLK): HSI, + 155:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** HSE and PLL. + 156:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** The AHB clock (HCLK) is derived from System clock through configurable + 157:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** prescaler and used to clock the CPU, memory and peripherals mapped + 158:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** on AHB bus (DMA, GPIO...). APB1 (PCLK1) clock is derived + 159:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** from AHB clock through configurable prescalers and used to clock + 160:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** the peripherals mapped on these buses. You can use + 161:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** "HAL_RCC_GetSysClockFreq()" function to retrieve the frequencies of these clocks. + 162:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** + 163:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** (#) All the peripheral clocks are derived from the System clock (SYSCLK) except: + 164:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** (++) The FLASH program/erase clock which is always HSI 8MHz clock. + 165:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** (++) The USB 48 MHz clock which is derived from the PLL VCO clock. + 166:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** (++) The USART clock which can be derived as well from HSI 8MHz, LSI or LSE. + 167:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** (++) The I2C clock which can be derived as well from HSI 8MHz clock. + 168:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** (++) The ADC clock which is derived from PLL output. + 169:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** (++) The RTC clock which is derived from the LSE, LSI or 1 MHz HSE_RTC + 170:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** (HSE divided by a programmable prescaler). The System clock (SYSCLK) + 171:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** frequency must be higher or equal to the RTC clock frequency. + 172:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** (++) IWDG clock which is always the LSI clock. + 173:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** + 174:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** (#) For the STM32F0xx devices, the maximum frequency of the SYSCLK, HCLK and PCLK1 is 48 MHz, + 175:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** Depending on the SYSCLK frequency, the flash latency should be adapted accordingly. + 176:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** + 177:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** (#) After reset, the System clock source is the HSI (8 MHz) with 0 WS and + 178:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** prefetch is disabled. + 179:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** @endverbatim + 180:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** * @{ + 181:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** */ + 182:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** + 183:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** /* + 184:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** Additional consideration on the SYSCLK based on Latency settings: + 185:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** +-----------------------------------------------+ + 186:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** | Latency | SYSCLK clock frequency (MHz) | + 187:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** |---------------|-------------------------------| + 188:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** |0WS(1CPU cycle)| 0 < SYSCLK <= 24 | + 189:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** |---------------|-------------------------------| + 190:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** |1WS(2CPU cycle)| 24 < SYSCLK <= 48 | + 191:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** +-----------------------------------------------+ + 192:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** */ + 193:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** + 194:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** /** + 195:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** * @brief Resets the RCC clock configuration to the default reset state. + 196:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** * @note The default reset state of the clock configuration is given below: + 197:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** * - HSI ON and used as system clock source + 198:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** * - HSE and PLL OFF + 199:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** * - AHB, APB1 prescaler set to 1. + 200:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** * - CSS and MCO1 OFF + 201:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** * - All interrupts disabled + 202:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** * - All interrupt and reset flags cleared + 203:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** * @note This function does not modify the configuration of the + ARM GAS /tmp/ccCIS8O6.s page 5 + + + 204:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** * - Peripheral clocks + 205:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** * - LSI, LSE and RTC clocks + 206:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** * @retval HAL status + 207:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** */ + 208:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** HAL_StatusTypeDef HAL_RCC_DeInit(void) + 209:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** { + 27 .loc 1 209 1 view -0 + 28 .cfi_startproc + 29 @ args = 0, pretend = 0, frame = 0 + 30 @ frame_needed = 0, uses_anonymous_args = 0 + 31 0000 70B5 push {r4, r5, r6, lr} + 32 .cfi_def_cfa_offset 16 + 33 .cfi_offset 4, -16 + 34 .cfi_offset 5, -12 + 35 .cfi_offset 6, -8 + 36 .cfi_offset 14, -4 + 210:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** uint32_t tickstart; + 37 .loc 1 210 3 view .LVU1 + 211:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** + 212:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** /* Get Start Tick*/ + 213:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** tickstart = HAL_GetTick(); + 38 .loc 1 213 3 view .LVU2 + 39 .loc 1 213 15 is_stmt 0 view .LVU3 + 40 0002 FFF7FEFF bl HAL_GetTick + 41 .LVL0: + 42 0006 0400 movs r4, r0 + 43 .LVL1: + 214:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** + 215:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** /* Set HSION bit, HSITRIM[4:0] bits to the reset value*/ + 216:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** SET_BIT(RCC->CR, RCC_CR_HSION | RCC_CR_HSITRIM_4); + 44 .loc 1 216 3 is_stmt 1 view .LVU4 + 45 0008 284A ldr r2, .L17 + 46 000a 1368 ldr r3, [r2] + 47 000c 8121 movs r1, #129 + 48 000e 0B43 orrs r3, r1 + 49 0010 1360 str r3, [r2] + 217:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** + 218:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** /* Wait till HSI is ready */ + 219:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** while (READ_BIT(RCC->CR, RCC_CR_HSIRDY) == RESET) + 50 .loc 1 219 3 view .LVU5 + 51 .LVL2: + 52 .L2: + 53 .loc 1 219 43 view .LVU6 + 54 .loc 1 219 10 is_stmt 0 view .LVU7 + 55 0012 264B ldr r3, .L17 + 56 0014 1B68 ldr r3, [r3] + 57 .loc 1 219 43 view .LVU8 + 58 0016 9B07 lsls r3, r3, #30 + 59 0018 07D4 bmi .L13 + 220:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** { + 221:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** if ((HAL_GetTick() - tickstart) > HSI_TIMEOUT_VALUE) + 60 .loc 1 221 5 is_stmt 1 view .LVU9 + 61 .loc 1 221 10 is_stmt 0 view .LVU10 + 62 001a FFF7FEFF bl HAL_GetTick + 63 .LVL3: + 64 .loc 1 221 24 discriminator 1 view .LVU11 + 65 001e 001B subs r0, r0, r4 + ARM GAS /tmp/ccCIS8O6.s page 6 + + + 66 .loc 1 221 8 discriminator 1 view .LVU12 + 67 0020 0228 cmp r0, #2 + 68 0022 F6D9 bls .L2 + 222:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** { + 223:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** return HAL_TIMEOUT; + 69 .loc 1 223 14 view .LVU13 + 70 0024 0324 movs r4, #3 + 71 .LVL4: + 72 .L3: + 224:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** } + 225:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** } + 226:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** + 227:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** /* Reset SW[1:0], HPRE[3:0], PPRE[2:0] and MCOSEL[2:0] bits */ + 228:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** CLEAR_BIT(RCC->CFGR, RCC_CFGR_SW | RCC_CFGR_HPRE | RCC_CFGR_PPRE | RCC_CFGR_MCO); + 229:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** + 230:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** /* Wait till HSI as SYSCLK status is enabled */ + 231:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** while (READ_BIT(RCC->CFGR, RCC_CFGR_SWS) != RESET) + 232:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** { + 233:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** if ((HAL_GetTick() - tickstart) > CLOCKSWITCH_TIMEOUT_VALUE) + 234:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** { + 235:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** return HAL_TIMEOUT; + 236:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** } + 237:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** } + 238:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** + 239:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** /* Update the SystemCoreClock global variable for HSI as system clock source */ + 240:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** SystemCoreClock = HSI_VALUE; + 241:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** + 242:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** /* Adapt Systick interrupt period */ + 243:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** if (HAL_InitTick(uwTickPrio) != HAL_OK) + 244:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** { + 245:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** return HAL_ERROR; + 246:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** } + 247:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** + 248:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** /* Reset HSEON, CSSON, PLLON bits */ + 249:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** CLEAR_BIT(RCC->CR, RCC_CR_PLLON | RCC_CR_CSSON | RCC_CR_HSEON); + 250:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** + 251:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** /* Reset HSEBYP bit */ + 252:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** CLEAR_BIT(RCC->CR, RCC_CR_HSEBYP); + 253:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** + 254:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** /* Get start tick */ + 255:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** tickstart = HAL_GetTick(); + 256:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** + 257:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** /* Wait till PLLRDY is cleared */ + 258:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** while(READ_BIT(RCC->CR, RCC_CR_PLLRDY) != RESET) + 259:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** { + 260:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** if((HAL_GetTick() - tickstart) > PLL_TIMEOUT_VALUE) + 261:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** { + 262:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** return HAL_TIMEOUT; + 263:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** } + 264:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** } + 265:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** + 266:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** /* Reset CFGR register */ + 267:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** CLEAR_REG(RCC->CFGR); + 268:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** + 269:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** /* Reset CFGR2 register */ + 270:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** CLEAR_REG(RCC->CFGR2); + 271:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** + ARM GAS /tmp/ccCIS8O6.s page 7 + + + 272:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** /* Reset CFGR3 register */ + 273:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** CLEAR_REG(RCC->CFGR3); + 274:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** + 275:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** /* Disable all interrupts */ + 276:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** CLEAR_REG(RCC->CIR); + 277:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** + 278:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** /* Clear all reset flags */ + 279:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** __HAL_RCC_CLEAR_RESET_FLAGS(); + 280:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** + 281:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** return HAL_OK; + 282:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** } + 73 .loc 1 282 1 view .LVU14 + 74 0026 2000 movs r0, r4 + 75 @ sp needed + 76 0028 70BD pop {r4, r5, r6, pc} + 77 .LVL5: + 78 .L13: + 228:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** + 79 .loc 1 228 3 is_stmt 1 view .LVU15 + 80 002a 204A ldr r2, .L17 + 81 002c 5368 ldr r3, [r2, #4] + 82 002e 2049 ldr r1, .L17+4 + 83 0030 0B40 ands r3, r1 + 84 0032 5360 str r3, [r2, #4] + 231:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** { + 85 .loc 1 231 3 view .LVU16 + 86 .L5: + 231:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** { + 87 .loc 1 231 44 view .LVU17 + 231:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** { + 88 .loc 1 231 10 is_stmt 0 view .LVU18 + 89 0034 1D4B ldr r3, .L17 + 90 0036 5B68 ldr r3, [r3, #4] + 91 0038 0C22 movs r2, #12 + 231:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** { + 92 .loc 1 231 44 view .LVU19 + 93 003a 1A42 tst r2, r3 + 94 003c 07D0 beq .L14 + 233:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** { + 95 .loc 1 233 5 is_stmt 1 view .LVU20 + 233:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** { + 96 .loc 1 233 10 is_stmt 0 view .LVU21 + 97 003e FFF7FEFF bl HAL_GetTick + 98 .LVL6: + 233:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** { + 99 .loc 1 233 24 discriminator 1 view .LVU22 + 100 0042 001B subs r0, r0, r4 + 233:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** { + 101 .loc 1 233 8 discriminator 1 view .LVU23 + 102 0044 1B4B ldr r3, .L17+8 + 103 0046 9842 cmp r0, r3 + 104 0048 F4D9 bls .L5 + 235:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** } + 105 .loc 1 235 14 view .LVU24 + 106 004a 0324 movs r4, #3 + 107 .LVL7: + 235:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** } + ARM GAS /tmp/ccCIS8O6.s page 8 + + + 108 .loc 1 235 14 view .LVU25 + 109 004c EBE7 b .L3 + 110 .LVL8: + 111 .L14: + 240:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** + 112 .loc 1 240 3 is_stmt 1 view .LVU26 + 240:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** + 113 .loc 1 240 19 is_stmt 0 view .LVU27 + 114 004e 1A4B ldr r3, .L17+12 + 115 0050 1A4A ldr r2, .L17+16 + 116 0052 1A60 str r2, [r3] + 243:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** { + 117 .loc 1 243 3 is_stmt 1 view .LVU28 + 243:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** { + 118 .loc 1 243 7 is_stmt 0 view .LVU29 + 119 0054 1A4B ldr r3, .L17+20 + 120 0056 1868 ldr r0, [r3] + 121 0058 FFF7FEFF bl HAL_InitTick + 122 .LVL9: + 123 005c 041E subs r4, r0, #0 + 124 .LVL10: + 243:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** { + 125 .loc 1 243 6 discriminator 1 view .LVU30 + 126 005e 01D0 beq .L15 + 245:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** } + 127 .loc 1 245 12 view .LVU31 + 128 0060 0124 movs r4, #1 + 129 0062 E0E7 b .L3 + 130 .L15: + 249:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** + 131 .loc 1 249 3 is_stmt 1 view .LVU32 + 132 0064 114B ldr r3, .L17 + 133 0066 1A68 ldr r2, [r3] + 134 0068 1649 ldr r1, .L17+24 + 135 006a 0A40 ands r2, r1 + 136 006c 1A60 str r2, [r3] + 252:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** + 137 .loc 1 252 3 view .LVU33 + 138 006e 1A68 ldr r2, [r3] + 139 0070 1549 ldr r1, .L17+28 + 140 0072 0A40 ands r2, r1 + 141 0074 1A60 str r2, [r3] + 255:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** + 142 .loc 1 255 3 view .LVU34 + 255:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** + 143 .loc 1 255 15 is_stmt 0 view .LVU35 + 144 0076 FFF7FEFF bl HAL_GetTick + 145 .LVL11: + 146 007a 0500 movs r5, r0 + 147 .LVL12: + 258:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** { + 148 .loc 1 258 3 is_stmt 1 view .LVU36 + 149 .L7: + 258:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** { + 150 .loc 1 258 42 view .LVU37 + 258:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** { + 151 .loc 1 258 9 is_stmt 0 view .LVU38 + ARM GAS /tmp/ccCIS8O6.s page 9 + + + 152 007c 0B4B ldr r3, .L17 + 153 007e 1B68 ldr r3, [r3] + 258:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** { + 154 .loc 1 258 42 view .LVU39 + 155 0080 9B01 lsls r3, r3, #6 + 156 0082 06D5 bpl .L16 + 260:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** { + 157 .loc 1 260 5 is_stmt 1 view .LVU40 + 260:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** { + 158 .loc 1 260 9 is_stmt 0 view .LVU41 + 159 0084 FFF7FEFF bl HAL_GetTick + 160 .LVL13: + 260:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** { + 161 .loc 1 260 23 discriminator 1 view .LVU42 + 162 0088 401B subs r0, r0, r5 + 260:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** { + 163 .loc 1 260 7 discriminator 1 view .LVU43 + 164 008a 0228 cmp r0, #2 + 165 008c F6D9 bls .L7 + 262:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** } + 166 .loc 1 262 14 view .LVU44 + 167 008e 0324 movs r4, #3 + 168 0090 C9E7 b .L3 + 169 .L16: + 267:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** + 170 .loc 1 267 3 is_stmt 1 view .LVU45 + 171 0092 064B ldr r3, .L17 + 172 0094 0022 movs r2, #0 + 173 0096 5A60 str r2, [r3, #4] + 270:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** + 174 .loc 1 270 3 view .LVU46 + 175 0098 DA62 str r2, [r3, #44] + 273:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** + 176 .loc 1 273 3 view .LVU47 + 177 009a 1A63 str r2, [r3, #48] + 276:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** + 178 .loc 1 276 3 view .LVU48 + 179 009c 9A60 str r2, [r3, #8] + 279:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** + 180 .loc 1 279 3 view .LVU49 + 181 009e 596A ldr r1, [r3, #36] + 182 00a0 8022 movs r2, #128 + 183 00a2 5204 lsls r2, r2, #17 + 184 00a4 0A43 orrs r2, r1 + 185 00a6 5A62 str r2, [r3, #36] + 281:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** } + 186 .loc 1 281 3 view .LVU50 + 281:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** } + 187 .loc 1 281 10 is_stmt 0 view .LVU51 + 188 00a8 BDE7 b .L3 + 189 .L18: + 190 00aa C046 .align 2 + 191 .L17: + 192 00ac 00100240 .word 1073876992 + 193 00b0 0CF8FFF0 .word -251660276 + 194 00b4 88130000 .word 5000 + 195 00b8 00000000 .word SystemCoreClock + ARM GAS /tmp/ccCIS8O6.s page 10 + + + 196 00bc 00127A00 .word 8000000 + 197 00c0 00000000 .word uwTickPrio + 198 00c4 FFFFF6FE .word -17367041 + 199 00c8 FFFFFBFF .word -262145 + 200 .cfi_endproc + 201 .LFE40: + 203 .section .text.HAL_RCC_OscConfig,"ax",%progbits + 204 .align 1 + 205 .global HAL_RCC_OscConfig + 206 .syntax unified + 207 .code 16 + 208 .thumb_func + 210 HAL_RCC_OscConfig: + 211 .LVL14: + 212 .LFB41: + 283:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** + 284:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** /** + 285:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** * @brief Initializes the RCC Oscillators according to the specified parameters in the + 286:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** * RCC_OscInitTypeDef. + 287:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** * @param RCC_OscInitStruct pointer to an RCC_OscInitTypeDef structure that + 288:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** * contains the configuration information for the RCC Oscillators. + 289:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** * @note The PLL is not disabled when used as system clock. + 290:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** * @note Transitions LSE Bypass to LSE On and LSE On to LSE Bypass are not + 291:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** * supported by this macro. User should request a transition to LSE Off + 292:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** * first and then LSE On or LSE Bypass. + 293:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** * @note Transition HSE Bypass to HSE On and HSE On to HSE Bypass are not + 294:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** * supported by this macro. User should request a transition to HSE Off + 295:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** * first and then HSE On or HSE Bypass. + 296:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** * @retval HAL status + 297:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** */ + 298:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** HAL_StatusTypeDef HAL_RCC_OscConfig(RCC_OscInitTypeDef *RCC_OscInitStruct) + 299:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** { + 213 .loc 1 299 1 is_stmt 1 view -0 + 214 .cfi_startproc + 215 @ args = 0, pretend = 0, frame = 8 + 216 @ frame_needed = 0, uses_anonymous_args = 0 + 217 .loc 1 299 1 is_stmt 0 view .LVU53 + 218 0000 70B5 push {r4, r5, r6, lr} + 219 .cfi_def_cfa_offset 16 + 220 .cfi_offset 4, -16 + 221 .cfi_offset 5, -12 + 222 .cfi_offset 6, -8 + 223 .cfi_offset 14, -4 + 224 0002 82B0 sub sp, sp, #8 + 225 .cfi_def_cfa_offset 24 + 226 0004 041E subs r4, r0, #0 + 300:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** uint32_t tickstart; + 227 .loc 1 300 3 is_stmt 1 view .LVU54 + 301:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** uint32_t pll_config; + 228 .loc 1 301 3 view .LVU55 + 302:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** uint32_t pll_config2; + 229 .loc 1 302 3 view .LVU56 + 303:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** + 304:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** /* Check Null pointer */ + 305:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** if(RCC_OscInitStruct == NULL) + 230 .loc 1 305 3 view .LVU57 + 231 .loc 1 305 5 is_stmt 0 view .LVU58 + ARM GAS /tmp/ccCIS8O6.s page 11 + + + 232 0006 00D1 bne .LCB192 + 233 0008 7FE2 b .L86 @long jump + 234 .LCB192: + 306:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** { + 307:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** return HAL_ERROR; + 308:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** } + 309:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** + 310:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** /* Check the parameters */ + 311:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** assert_param(IS_RCC_OSCILLATORTYPE(RCC_OscInitStruct->OscillatorType)); + 235 .loc 1 311 3 is_stmt 1 view .LVU59 + 312:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** + 313:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** /*------------------------------- HSE Configuration ------------------------*/ + 314:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** if(((RCC_OscInitStruct->OscillatorType) & RCC_OSCILLATORTYPE_HSE) == RCC_OSCILLATORTYPE_HSE) + 236 .loc 1 314 3 view .LVU60 + 237 .loc 1 314 25 is_stmt 0 view .LVU61 + 238 000a 0368 ldr r3, [r0] + 239 .loc 1 314 5 view .LVU62 + 240 000c DB07 lsls r3, r3, #31 + 241 000e 2BD5 bpl .L21 + 315:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** { + 316:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** /* Check the parameters */ + 317:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** assert_param(IS_RCC_HSE(RCC_OscInitStruct->HSEState)); + 242 .loc 1 317 5 is_stmt 1 view .LVU63 + 318:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** + 319:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** /* When the HSE is used as system clock or clock source for PLL in these cases it is not allowe + 320:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** if((__HAL_RCC_GET_SYSCLK_SOURCE() == RCC_SYSCLKSOURCE_STATUS_HSE) + 243 .loc 1 320 5 view .LVU64 + 244 .loc 1 320 9 is_stmt 0 view .LVU65 + 245 0010 B34B ldr r3, .L139 + 246 0012 5A68 ldr r2, [r3, #4] + 247 0014 0C23 movs r3, #12 + 248 0016 1340 ands r3, r2 + 249 .loc 1 320 7 view .LVU66 + 250 0018 042B cmp r3, #4 + 251 001a 1DD0 beq .L22 + 321:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** || ((__HAL_RCC_GET_SYSCLK_SOURCE() == RCC_SYSCLKSOURCE_STATUS_PLLCLK) && (__HAL_RCC_GET_PLL_ + 252 .loc 1 321 13 view .LVU67 + 253 001c B04B ldr r3, .L139 + 254 001e 5A68 ldr r2, [r3, #4] + 255 0020 0C23 movs r3, #12 + 256 0022 1340 ands r3, r2 + 257 .loc 1 321 8 view .LVU68 + 258 0024 082B cmp r3, #8 + 259 0026 0ED0 beq .L122 + 260 .L23: + 322:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** { + 323:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** if((__HAL_RCC_GET_FLAG(RCC_FLAG_HSERDY) != RESET) && (RCC_OscInitStruct->HSEState == RCC_HSE_ + 324:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** { + 325:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** return HAL_ERROR; + 326:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** } + 327:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** } + 328:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** else + 329:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** { + 330:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** /* Set the new HSE configuration ---------------------------------------*/ + 331:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** __HAL_RCC_HSE_CONFIG(RCC_OscInitStruct->HSEState); + 261 .loc 1 331 7 is_stmt 1 view .LVU69 + 262 .loc 1 331 7 view .LVU70 + ARM GAS /tmp/ccCIS8O6.s page 12 + + + 263 0028 6368 ldr r3, [r4, #4] + 264 002a 012B cmp r3, #1 + 265 002c 41D0 beq .L123 + 266 .loc 1 331 7 discriminator 2 view .LVU71 + 267 002e 002B cmp r3, #0 + 268 0030 56D1 bne .L26 + 269 .loc 1 331 7 discriminator 4 view .LVU72 + 270 0032 AB4B ldr r3, .L139 + 271 0034 1A68 ldr r2, [r3] + 272 0036 AB49 ldr r1, .L139+4 + 273 0038 0A40 ands r2, r1 + 274 003a 1A60 str r2, [r3] + 275 .loc 1 331 7 discriminator 4 view .LVU73 + 276 003c 1A68 ldr r2, [r3] + 277 003e AA49 ldr r1, .L139+8 + 278 0040 0A40 ands r2, r1 + 279 0042 1A60 str r2, [r3] + 280 0044 3BE0 b .L25 + 281 .L122: + 321:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** || ((__HAL_RCC_GET_SYSCLK_SOURCE() == RCC_SYSCLKSOURCE_STATUS_PLLCLK) && (__HAL_RCC_GET_PLL_ + 282 .loc 1 321 82 is_stmt 0 discriminator 1 view .LVU74 + 283 0046 A64B ldr r3, .L139 + 284 0048 5B68 ldr r3, [r3, #4] + 285 004a C022 movs r2, #192 + 286 004c 5202 lsls r2, r2, #9 + 287 004e 1340 ands r3, r2 + 321:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** || ((__HAL_RCC_GET_SYSCLK_SOURCE() == RCC_SYSCLKSOURCE_STATUS_PLLCLK) && (__HAL_RCC_GET_PLL_ + 288 .loc 1 321 78 discriminator 1 view .LVU75 + 289 0050 8022 movs r2, #128 + 290 0052 5202 lsls r2, r2, #9 + 291 0054 9342 cmp r3, r2 + 292 0056 E7D1 bne .L23 + 293 .L22: + 323:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** { + 294 .loc 1 323 7 is_stmt 1 view .LVU76 + 323:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** { + 295 .loc 1 323 11 is_stmt 0 view .LVU77 + 296 0058 A14B ldr r3, .L139 + 297 005a 1B68 ldr r3, [r3] + 323:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** { + 298 .loc 1 323 9 view .LVU78 + 299 005c 9B03 lsls r3, r3, #14 + 300 005e 03D5 bpl .L21 + 323:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** { + 301 .loc 1 323 78 discriminator 1 view .LVU79 + 302 0060 6368 ldr r3, [r4, #4] + 323:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** { + 303 .loc 1 323 57 discriminator 1 view .LVU80 + 304 0062 002B cmp r3, #0 + 305 0064 00D1 bne .LCB258 + 306 0066 53E2 b .L124 @long jump + 307 .LCB258: + 308 .LVL15: + 309 .L21: + 332:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** + 333:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** + 334:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** /* Check the HSE State */ + ARM GAS /tmp/ccCIS8O6.s page 13 + + + 335:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** if(RCC_OscInitStruct->HSEState != RCC_HSE_OFF) + 336:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** { + 337:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** /* Get Start Tick */ + 338:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** tickstart = HAL_GetTick(); + 339:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** + 340:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** /* Wait till HSE is ready */ + 341:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** while(__HAL_RCC_GET_FLAG(RCC_FLAG_HSERDY) == RESET) + 342:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** { + 343:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** if((HAL_GetTick() - tickstart ) > HSE_TIMEOUT_VALUE) + 344:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** { + 345:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** return HAL_TIMEOUT; + 346:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** } + 347:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** } + 348:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** } + 349:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** else + 350:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** { + 351:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** /* Get Start Tick */ + 352:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** tickstart = HAL_GetTick(); + 353:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** + 354:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** /* Wait till HSE is disabled */ + 355:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** while(__HAL_RCC_GET_FLAG(RCC_FLAG_HSERDY) != RESET) + 356:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** { + 357:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** if((HAL_GetTick() - tickstart ) > HSE_TIMEOUT_VALUE) + 358:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** { + 359:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** return HAL_TIMEOUT; + 360:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** } + 361:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** } + 362:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** } + 363:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** } + 364:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** } + 365:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** /*----------------------------- HSI Configuration --------------------------*/ + 366:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** if(((RCC_OscInitStruct->OscillatorType) & RCC_OSCILLATORTYPE_HSI) == RCC_OSCILLATORTYPE_HSI) + 310 .loc 1 366 3 is_stmt 1 view .LVU81 + 311 .loc 1 366 25 is_stmt 0 view .LVU82 + 312 0068 2368 ldr r3, [r4] + 313 .loc 1 366 5 view .LVU83 + 314 006a 9B07 lsls r3, r3, #30 + 315 006c 77D5 bpl .L33 + 367:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** { + 368:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** /* Check the parameters */ + 369:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** assert_param(IS_RCC_HSI(RCC_OscInitStruct->HSIState)); + 316 .loc 1 369 5 is_stmt 1 view .LVU84 + 370:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** assert_param(IS_RCC_CALIBRATION_VALUE(RCC_OscInitStruct->HSICalibrationValue)); + 317 .loc 1 370 5 view .LVU85 + 371:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** + 372:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** /* Check if HSI is used as system clock or as PLL source when PLL is selected as system clock * + 373:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** if((__HAL_RCC_GET_SYSCLK_SOURCE() == RCC_SYSCLKSOURCE_STATUS_HSI) + 318 .loc 1 373 5 view .LVU86 + 319 .loc 1 373 9 is_stmt 0 view .LVU87 + 320 006e 9C4B ldr r3, .L139 + 321 0070 5B68 ldr r3, [r3, #4] + 322 0072 0C22 movs r2, #12 + 323 .loc 1 373 7 view .LVU88 + 324 0074 1A42 tst r2, r3 + 325 0076 62D0 beq .L34 + 374:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** || ((__HAL_RCC_GET_SYSCLK_SOURCE() == RCC_SYSCLKSOURCE_STATUS_PLLCLK) && (__HAL_RCC_GET_PLL_ + 326 .loc 1 374 13 view .LVU89 + ARM GAS /tmp/ccCIS8O6.s page 14 + + + 327 0078 994B ldr r3, .L139 + 328 007a 5A68 ldr r2, [r3, #4] + 329 007c 0C23 movs r3, #12 + 330 007e 1340 ands r3, r2 + 331 .loc 1 374 8 view .LVU90 + 332 0080 082B cmp r3, #8 + 333 0082 53D0 beq .L125 + 334 .L35: + 375:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** { + 376:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** /* When HSI is used as system clock it will not disabled */ + 377:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** if((__HAL_RCC_GET_FLAG(RCC_FLAG_HSIRDY) != RESET) && (RCC_OscInitStruct->HSIState != RCC_HSI_ + 378:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** { + 379:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** return HAL_ERROR; + 380:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** } + 381:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** /* Otherwise, just the calibration is allowed */ + 382:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** else + 383:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** { + 384:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** /* Adjusts the Internal High Speed oscillator (HSI) calibration value.*/ + 385:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** __HAL_RCC_HSI_CALIBRATIONVALUE_ADJUST(RCC_OscInitStruct->HSICalibrationValue); + 386:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** } + 387:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** } + 388:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** else + 389:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** { + 390:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** /* Check the HSI State */ + 391:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** if(RCC_OscInitStruct->HSIState != RCC_HSI_OFF) + 335 .loc 1 391 7 is_stmt 1 view .LVU91 + 336 .loc 1 391 27 is_stmt 0 view .LVU92 + 337 0084 E368 ldr r3, [r4, #12] + 338 .loc 1 391 9 view .LVU93 + 339 0086 002B cmp r3, #0 + 340 0088 00D1 bne .LCB286 + 341 008a 8AE0 b .L37 @long jump + 342 .LCB286: + 392:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** { + 393:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** /* Enable the Internal High Speed oscillator (HSI). */ + 394:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** __HAL_RCC_HSI_ENABLE(); + 343 .loc 1 394 9 is_stmt 1 view .LVU94 + 344 008c 944A ldr r2, .L139 + 345 008e 1368 ldr r3, [r2] + 346 0090 0121 movs r1, #1 + 347 0092 0B43 orrs r3, r1 + 348 0094 1360 str r3, [r2] + 395:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** + 396:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** /* Get Start Tick */ + 397:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** tickstart = HAL_GetTick(); + 349 .loc 1 397 9 view .LVU95 + 350 .loc 1 397 21 is_stmt 0 view .LVU96 + 351 0096 FFF7FEFF bl HAL_GetTick + 352 .LVL16: + 353 009a 0500 movs r5, r0 + 354 .LVL17: + 398:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** + 399:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** /* Wait till HSI is ready */ + 400:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** while(__HAL_RCC_GET_FLAG(RCC_FLAG_HSIRDY) == RESET) + 355 .loc 1 400 9 is_stmt 1 view .LVU97 + 356 .L38: + 357 .loc 1 400 51 view .LVU98 + ARM GAS /tmp/ccCIS8O6.s page 15 + + + 358 .loc 1 400 15 is_stmt 0 view .LVU99 + 359 009c 904B ldr r3, .L139 + 360 009e 1B68 ldr r3, [r3] + 361 .loc 1 400 51 view .LVU100 + 362 00a0 9B07 lsls r3, r3, #30 + 363 00a2 75D4 bmi .L126 + 401:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** { + 402:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** if((HAL_GetTick() - tickstart ) > HSI_TIMEOUT_VALUE) + 364 .loc 1 402 11 is_stmt 1 view .LVU101 + 365 .loc 1 402 15 is_stmt 0 view .LVU102 + 366 00a4 FFF7FEFF bl HAL_GetTick + 367 .LVL18: + 368 .loc 1 402 29 discriminator 1 view .LVU103 + 369 00a8 401B subs r0, r0, r5 + 370 .loc 1 402 13 discriminator 1 view .LVU104 + 371 00aa 0228 cmp r0, #2 + 372 00ac F6D9 bls .L38 + 403:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** { + 404:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** return HAL_TIMEOUT; + 373 .loc 1 404 20 view .LVU105 + 374 00ae 0320 movs r0, #3 + 375 00b0 2CE2 b .L20 + 376 .LVL19: + 377 .L123: + 331:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** + 378 .loc 1 331 7 is_stmt 1 discriminator 1 view .LVU106 + 379 00b2 8B4A ldr r2, .L139 + 380 00b4 1168 ldr r1, [r2] + 381 00b6 8023 movs r3, #128 + 382 00b8 5B02 lsls r3, r3, #9 + 383 00ba 0B43 orrs r3, r1 + 384 00bc 1360 str r3, [r2] + 385 .L25: + 331:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** + 386 .loc 1 331 7 discriminator 10 view .LVU107 + 335:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** { + 387 .loc 1 335 7 view .LVU108 + 335:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** { + 388 .loc 1 335 27 is_stmt 0 view .LVU109 + 389 00be 6368 ldr r3, [r4, #4] + 335:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** { + 390 .loc 1 335 9 view .LVU110 + 391 00c0 002B cmp r3, #0 + 392 00c2 25D0 beq .L28 + 338:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** + 393 .loc 1 338 9 is_stmt 1 view .LVU111 + 338:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** + 394 .loc 1 338 21 is_stmt 0 view .LVU112 + 395 00c4 FFF7FEFF bl HAL_GetTick + 396 .LVL20: + 338:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** + 397 .loc 1 338 21 view .LVU113 + 398 00c8 0500 movs r5, r0 + 399 .LVL21: + 341:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** { + 400 .loc 1 341 9 is_stmt 1 view .LVU114 + 401 .L29: + ARM GAS /tmp/ccCIS8O6.s page 16 + + + 341:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** { + 402 .loc 1 341 51 view .LVU115 + 341:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** { + 403 .loc 1 341 15 is_stmt 0 view .LVU116 + 404 00ca 854B ldr r3, .L139 + 405 00cc 1B68 ldr r3, [r3] + 341:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** { + 406 .loc 1 341 51 view .LVU117 + 407 00ce 9B03 lsls r3, r3, #14 + 408 00d0 CAD4 bmi .L21 + 343:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** { + 409 .loc 1 343 11 is_stmt 1 view .LVU118 + 343:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** { + 410 .loc 1 343 15 is_stmt 0 view .LVU119 + 411 00d2 FFF7FEFF bl HAL_GetTick + 412 .LVL22: + 343:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** { + 413 .loc 1 343 29 discriminator 1 view .LVU120 + 414 00d6 401B subs r0, r0, r5 + 343:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** { + 415 .loc 1 343 13 discriminator 1 view .LVU121 + 416 00d8 6428 cmp r0, #100 + 417 00da F6D9 bls .L29 + 345:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** } + 418 .loc 1 345 20 view .LVU122 + 419 00dc 0320 movs r0, #3 + 420 00de 15E2 b .L20 + 421 .LVL23: + 422 .L26: + 331:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** + 423 .loc 1 331 7 is_stmt 1 discriminator 5 view .LVU123 + 424 00e0 052B cmp r3, #5 + 425 00e2 09D0 beq .L127 + 331:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** + 426 .loc 1 331 7 discriminator 8 view .LVU124 + 427 00e4 7E4B ldr r3, .L139 + 428 00e6 1A68 ldr r2, [r3] + 429 00e8 7E49 ldr r1, .L139+4 + 430 00ea 0A40 ands r2, r1 + 431 00ec 1A60 str r2, [r3] + 331:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** + 432 .loc 1 331 7 discriminator 8 view .LVU125 + 433 00ee 1A68 ldr r2, [r3] + 434 00f0 7D49 ldr r1, .L139+8 + 435 00f2 0A40 ands r2, r1 + 436 00f4 1A60 str r2, [r3] + 437 00f6 E2E7 b .L25 + 438 .L127: + 331:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** + 439 .loc 1 331 7 discriminator 7 view .LVU126 + 440 00f8 794B ldr r3, .L139 + 441 00fa 1968 ldr r1, [r3] + 442 00fc 8022 movs r2, #128 + 443 00fe D202 lsls r2, r2, #11 + 444 0100 0A43 orrs r2, r1 + 445 0102 1A60 str r2, [r3] + 331:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** + ARM GAS /tmp/ccCIS8O6.s page 17 + + + 446 .loc 1 331 7 discriminator 7 view .LVU127 + 447 0104 1968 ldr r1, [r3] + 448 0106 8022 movs r2, #128 + 449 0108 5202 lsls r2, r2, #9 + 450 010a 0A43 orrs r2, r1 + 451 010c 1A60 str r2, [r3] + 452 010e D6E7 b .L25 + 453 .L28: + 352:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** + 454 .loc 1 352 9 view .LVU128 + 352:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** + 455 .loc 1 352 21 is_stmt 0 view .LVU129 + 456 0110 FFF7FEFF bl HAL_GetTick + 457 .LVL24: + 352:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** + 458 .loc 1 352 21 view .LVU130 + 459 0114 0500 movs r5, r0 + 460 .LVL25: + 355:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** { + 461 .loc 1 355 9 is_stmt 1 view .LVU131 + 462 .L31: + 355:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** { + 463 .loc 1 355 51 view .LVU132 + 355:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** { + 464 .loc 1 355 15 is_stmt 0 view .LVU133 + 465 0116 724B ldr r3, .L139 + 466 0118 1B68 ldr r3, [r3] + 355:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** { + 467 .loc 1 355 51 view .LVU134 + 468 011a 9B03 lsls r3, r3, #14 + 469 011c A4D5 bpl .L21 + 357:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** { + 470 .loc 1 357 12 is_stmt 1 view .LVU135 + 357:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** { + 471 .loc 1 357 16 is_stmt 0 view .LVU136 + 472 011e FFF7FEFF bl HAL_GetTick + 473 .LVL26: + 357:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** { + 474 .loc 1 357 30 discriminator 1 view .LVU137 + 475 0122 401B subs r0, r0, r5 + 357:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** { + 476 .loc 1 357 14 discriminator 1 view .LVU138 + 477 0124 6428 cmp r0, #100 + 478 0126 F6D9 bls .L31 + 359:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** } + 479 .loc 1 359 20 view .LVU139 + 480 0128 0320 movs r0, #3 + 481 012a EFE1 b .L20 + 482 .LVL27: + 483 .L125: + 374:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** { + 484 .loc 1 374 82 discriminator 1 view .LVU140 + 485 012c 6C4B ldr r3, .L139 + 486 012e 5B68 ldr r3, [r3, #4] + 487 0130 C022 movs r2, #192 + 488 0132 5202 lsls r2, r2, #9 + 489 0134 1340 ands r3, r2 + ARM GAS /tmp/ccCIS8O6.s page 18 + + + 374:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** { + 490 .loc 1 374 78 discriminator 1 view .LVU141 + 491 0136 8022 movs r2, #128 + 492 0138 1202 lsls r2, r2, #8 + 493 013a 9342 cmp r3, r2 + 494 013c A2D1 bne .L35 + 495 .L34: + 377:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** { + 496 .loc 1 377 7 is_stmt 1 view .LVU142 + 377:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** { + 497 .loc 1 377 11 is_stmt 0 view .LVU143 + 498 013e 684B ldr r3, .L139 + 499 0140 1B68 ldr r3, [r3] + 377:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** { + 500 .loc 1 377 9 view .LVU144 + 501 0142 9B07 lsls r3, r3, #30 + 502 0144 03D5 bpl .L36 + 377:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** { + 503 .loc 1 377 78 discriminator 1 view .LVU145 + 504 0146 E368 ldr r3, [r4, #12] + 377:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** { + 505 .loc 1 377 57 discriminator 1 view .LVU146 + 506 0148 012B cmp r3, #1 + 507 014a 00D0 beq .LCB448 + 508 014c E2E1 b .L90 @long jump + 509 .LCB448: + 510 .L36: + 385:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** } + 511 .loc 1 385 9 is_stmt 1 view .LVU147 + 512 014e 6449 ldr r1, .L139 + 513 0150 0B68 ldr r3, [r1] + 514 0152 F822 movs r2, #248 + 515 0154 9343 bics r3, r2 + 516 0156 2269 ldr r2, [r4, #16] + 517 0158 D200 lsls r2, r2, #3 + 518 015a 1343 orrs r3, r2 + 519 015c 0B60 str r3, [r1] + 520 .L33: + 405:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** } + 406:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** } + 407:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** + 408:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** /* Adjusts the Internal High Speed oscillator (HSI) calibration value.*/ + 409:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** __HAL_RCC_HSI_CALIBRATIONVALUE_ADJUST(RCC_OscInitStruct->HSICalibrationValue); + 410:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** } + 411:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** else + 412:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** { + 413:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** /* Disable the Internal High Speed oscillator (HSI). */ + 414:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** __HAL_RCC_HSI_DISABLE(); + 415:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** + 416:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** /* Get Start Tick */ + 417:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** tickstart = HAL_GetTick(); + 418:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** + 419:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** /* Wait till HSI is disabled */ + 420:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** while(__HAL_RCC_GET_FLAG(RCC_FLAG_HSIRDY) != RESET) + 421:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** { + 422:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** if((HAL_GetTick() - tickstart ) > HSI_TIMEOUT_VALUE) + 423:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** { + ARM GAS /tmp/ccCIS8O6.s page 19 + + + 424:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** return HAL_TIMEOUT; + 425:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** } + 426:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** } + 427:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** } + 428:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** } + 429:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** } + 430:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** /*------------------------------ LSI Configuration -------------------------*/ + 431:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** if(((RCC_OscInitStruct->OscillatorType) & RCC_OSCILLATORTYPE_LSI) == RCC_OSCILLATORTYPE_LSI) + 521 .loc 1 431 3 view .LVU148 + 522 .loc 1 431 25 is_stmt 0 view .LVU149 + 523 015e 2368 ldr r3, [r4] + 524 .loc 1 431 5 view .LVU150 + 525 0160 1B07 lsls r3, r3, #28 + 526 0162 44D5 bpl .L42 + 432:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** { + 433:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** /* Check the parameters */ + 434:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** assert_param(IS_RCC_LSI(RCC_OscInitStruct->LSIState)); + 527 .loc 1 434 5 is_stmt 1 view .LVU151 + 435:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** + 436:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** /* Check the LSI State */ + 437:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** if(RCC_OscInitStruct->LSIState != RCC_LSI_OFF) + 528 .loc 1 437 5 view .LVU152 + 529 .loc 1 437 25 is_stmt 0 view .LVU153 + 530 0164 E369 ldr r3, [r4, #28] + 531 .loc 1 437 7 view .LVU154 + 532 0166 002B cmp r3, #0 + 533 0168 2ED0 beq .L43 + 438:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** { + 439:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** /* Enable the Internal Low Speed oscillator (LSI). */ + 440:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** __HAL_RCC_LSI_ENABLE(); + 534 .loc 1 440 7 is_stmt 1 view .LVU155 + 535 016a 5D4A ldr r2, .L139 + 536 016c 536A ldr r3, [r2, #36] + 537 016e 0121 movs r1, #1 + 538 0170 0B43 orrs r3, r1 + 539 0172 5362 str r3, [r2, #36] + 441:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** + 442:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** /* Get Start Tick */ + 443:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** tickstart = HAL_GetTick(); + 540 .loc 1 443 7 view .LVU156 + 541 .loc 1 443 19 is_stmt 0 view .LVU157 + 542 0174 FFF7FEFF bl HAL_GetTick + 543 .LVL28: + 544 0178 0500 movs r5, r0 + 545 .LVL29: + 444:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** + 445:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** /* Wait till LSI is ready */ + 446:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** while(__HAL_RCC_GET_FLAG(RCC_FLAG_LSIRDY) == RESET) + 546 .loc 1 446 7 is_stmt 1 view .LVU158 + 547 .L44: + 548 .loc 1 446 49 view .LVU159 + 549 .loc 1 446 13 is_stmt 0 view .LVU160 + 550 017a 594B ldr r3, .L139 + 551 017c 5B6A ldr r3, [r3, #36] + 552 .loc 1 446 49 view .LVU161 + 553 017e 9B07 lsls r3, r3, #30 + 554 0180 35D4 bmi .L42 + ARM GAS /tmp/ccCIS8O6.s page 20 + + + 447:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** { + 448:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** if((HAL_GetTick() - tickstart ) > LSI_TIMEOUT_VALUE) + 555 .loc 1 448 9 is_stmt 1 view .LVU162 + 556 .loc 1 448 13 is_stmt 0 view .LVU163 + 557 0182 FFF7FEFF bl HAL_GetTick + 558 .LVL30: + 559 .loc 1 448 27 discriminator 1 view .LVU164 + 560 0186 401B subs r0, r0, r5 + 561 .loc 1 448 11 discriminator 1 view .LVU165 + 562 0188 0228 cmp r0, #2 + 563 018a F6D9 bls .L44 + 449:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** { + 450:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** return HAL_TIMEOUT; + 564 .loc 1 450 18 view .LVU166 + 565 018c 0320 movs r0, #3 + 566 018e BDE1 b .L20 + 567 .L126: + 409:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** } + 568 .loc 1 409 9 is_stmt 1 view .LVU167 + 569 0190 5349 ldr r1, .L139 + 570 0192 0B68 ldr r3, [r1] + 571 0194 F822 movs r2, #248 + 572 0196 9343 bics r3, r2 + 573 0198 2269 ldr r2, [r4, #16] + 574 019a D200 lsls r2, r2, #3 + 575 019c 1343 orrs r3, r2 + 576 019e 0B60 str r3, [r1] + 577 01a0 DDE7 b .L33 + 578 .LVL31: + 579 .L37: + 414:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** + 580 .loc 1 414 9 view .LVU168 + 581 01a2 4F4A ldr r2, .L139 + 582 01a4 1368 ldr r3, [r2] + 583 01a6 0121 movs r1, #1 + 584 01a8 8B43 bics r3, r1 + 585 01aa 1360 str r3, [r2] + 417:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** + 586 .loc 1 417 9 view .LVU169 + 417:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** + 587 .loc 1 417 21 is_stmt 0 view .LVU170 + 588 01ac FFF7FEFF bl HAL_GetTick + 589 .LVL32: + 590 01b0 0500 movs r5, r0 + 591 .LVL33: + 420:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** { + 592 .loc 1 420 9 is_stmt 1 view .LVU171 + 593 .L40: + 420:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** { + 594 .loc 1 420 51 view .LVU172 + 420:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** { + 595 .loc 1 420 15 is_stmt 0 view .LVU173 + 596 01b2 4B4B ldr r3, .L139 + 597 01b4 1B68 ldr r3, [r3] + 420:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** { + 598 .loc 1 420 51 view .LVU174 + 599 01b6 9B07 lsls r3, r3, #30 + ARM GAS /tmp/ccCIS8O6.s page 21 + + + 600 01b8 D1D5 bpl .L33 + 422:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** { + 601 .loc 1 422 11 is_stmt 1 view .LVU175 + 422:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** { + 602 .loc 1 422 15 is_stmt 0 view .LVU176 + 603 01ba FFF7FEFF bl HAL_GetTick + 604 .LVL34: + 422:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** { + 605 .loc 1 422 29 discriminator 1 view .LVU177 + 606 01be 401B subs r0, r0, r5 + 422:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** { + 607 .loc 1 422 13 discriminator 1 view .LVU178 + 608 01c0 0228 cmp r0, #2 + 609 01c2 F6D9 bls .L40 + 424:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** } + 610 .loc 1 424 20 view .LVU179 + 611 01c4 0320 movs r0, #3 + 612 01c6 A1E1 b .L20 + 613 .LVL35: + 614 .L43: + 451:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** } + 452:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** } + 453:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** } + 454:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** else + 455:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** { + 456:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** /* Disable the Internal Low Speed oscillator (LSI). */ + 457:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** __HAL_RCC_LSI_DISABLE(); + 615 .loc 1 457 7 is_stmt 1 view .LVU180 + 616 01c8 454A ldr r2, .L139 + 617 01ca 536A ldr r3, [r2, #36] + 618 01cc 0121 movs r1, #1 + 619 01ce 8B43 bics r3, r1 + 620 01d0 5362 str r3, [r2, #36] + 458:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** + 459:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** /* Get Start Tick */ + 460:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** tickstart = HAL_GetTick(); + 621 .loc 1 460 7 view .LVU181 + 622 .loc 1 460 19 is_stmt 0 view .LVU182 + 623 01d2 FFF7FEFF bl HAL_GetTick + 624 .LVL36: + 625 01d6 0500 movs r5, r0 + 626 .LVL37: + 461:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** + 462:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** /* Wait till LSI is disabled */ + 463:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** while(__HAL_RCC_GET_FLAG(RCC_FLAG_LSIRDY) != RESET) + 627 .loc 1 463 7 is_stmt 1 view .LVU183 + 628 .L46: + 629 .loc 1 463 49 view .LVU184 + 630 .loc 1 463 13 is_stmt 0 view .LVU185 + 631 01d8 414B ldr r3, .L139 + 632 01da 5B6A ldr r3, [r3, #36] + 633 .loc 1 463 49 view .LVU186 + 634 01dc 9B07 lsls r3, r3, #30 + 635 01de 06D5 bpl .L42 + 464:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** { + 465:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** if((HAL_GetTick() - tickstart ) > LSI_TIMEOUT_VALUE) + 636 .loc 1 465 9 is_stmt 1 view .LVU187 + ARM GAS /tmp/ccCIS8O6.s page 22 + + + 637 .loc 1 465 13 is_stmt 0 view .LVU188 + 638 01e0 FFF7FEFF bl HAL_GetTick + 639 .LVL38: + 640 .loc 1 465 27 discriminator 1 view .LVU189 + 641 01e4 401B subs r0, r0, r5 + 642 .loc 1 465 11 discriminator 1 view .LVU190 + 643 01e6 0228 cmp r0, #2 + 644 01e8 F6D9 bls .L46 + 466:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** { + 467:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** return HAL_TIMEOUT; + 645 .loc 1 467 18 view .LVU191 + 646 01ea 0320 movs r0, #3 + 647 01ec 8EE1 b .L20 + 648 .LVL39: + 649 .L42: + 468:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** } + 469:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** } + 470:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** } + 471:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** } + 472:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** /*------------------------------ LSE Configuration -------------------------*/ + 473:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** if(((RCC_OscInitStruct->OscillatorType) & RCC_OSCILLATORTYPE_LSE) == RCC_OSCILLATORTYPE_LSE) + 650 .loc 1 473 3 is_stmt 1 view .LVU192 + 651 .loc 1 473 25 is_stmt 0 view .LVU193 + 652 01ee 2368 ldr r3, [r4] + 653 .loc 1 473 5 view .LVU194 + 654 01f0 5B07 lsls r3, r3, #29 + 655 01f2 00D4 bmi .LCB595 + 656 01f4 80E0 b .L48 @long jump + 657 .LCB595: + 658 .LBB2: + 474:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** { + 475:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** FlagStatus pwrclkchanged = RESET; + 659 .loc 1 475 5 is_stmt 1 view .LVU195 + 660 .LVL40: + 476:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** + 477:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** /* Check the parameters */ + 478:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** assert_param(IS_RCC_LSE(RCC_OscInitStruct->LSEState)); + 661 .loc 1 478 5 view .LVU196 + 479:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** + 480:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** /* Update LSE configuration in Backup Domain control register */ + 481:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** /* Requires to enable write access to Backup Domain of necessary */ + 482:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** if(__HAL_RCC_PWR_IS_CLK_DISABLED()) + 662 .loc 1 482 5 view .LVU197 + 663 .loc 1 482 8 is_stmt 0 view .LVU198 + 664 01f6 3A4B ldr r3, .L139 + 665 01f8 DB69 ldr r3, [r3, #28] + 666 .loc 1 482 7 view .LVU199 + 667 01fa DB00 lsls r3, r3, #3 + 668 01fc 1DD4 bmi .L95 + 483:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** { + 484:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** __HAL_RCC_PWR_CLK_ENABLE(); + 669 .loc 1 484 7 is_stmt 1 view .LVU200 + 670 .LBB3: + 671 .loc 1 484 7 view .LVU201 + 672 .loc 1 484 7 view .LVU202 + 673 01fe 384B ldr r3, .L139 + 674 0200 DA69 ldr r2, [r3, #28] + ARM GAS /tmp/ccCIS8O6.s page 23 + + + 675 0202 8021 movs r1, #128 + 676 0204 4905 lsls r1, r1, #21 + 677 0206 0A43 orrs r2, r1 + 678 0208 DA61 str r2, [r3, #28] + 679 .loc 1 484 7 view .LVU203 + 680 020a DB69 ldr r3, [r3, #28] + 681 020c 0B40 ands r3, r1 + 682 020e 0193 str r3, [sp, #4] + 683 .loc 1 484 7 view .LVU204 + 684 0210 019B ldr r3, [sp, #4] + 685 .LBE3: + 686 .loc 1 484 7 view .LVU205 + 485:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** pwrclkchanged = SET; + 687 .loc 1 485 7 view .LVU206 + 688 .LVL41: + 689 .loc 1 485 21 is_stmt 0 view .LVU207 + 690 0212 0125 movs r5, #1 + 691 .LVL42: + 692 .L49: + 486:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** } + 487:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** + 488:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** if(HAL_IS_BIT_CLR(PWR->CR, PWR_CR_DBP)) + 693 .loc 1 488 5 is_stmt 1 view .LVU208 + 694 .loc 1 488 8 is_stmt 0 view .LVU209 + 695 0214 354B ldr r3, .L139+12 + 696 0216 1B68 ldr r3, [r3] + 697 .loc 1 488 7 view .LVU210 + 698 0218 DB05 lsls r3, r3, #23 + 699 021a 10D5 bpl .L128 + 700 .L50: + 489:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** { + 490:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** /* Enable write access to Backup domain */ + 491:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** SET_BIT(PWR->CR, PWR_CR_DBP); + 492:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** + 493:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** /* Wait for Backup domain Write protection disable */ + 494:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** tickstart = HAL_GetTick(); + 495:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** + 496:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** while(HAL_IS_BIT_CLR(PWR->CR, PWR_CR_DBP)) + 497:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** { + 498:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** if((HAL_GetTick() - tickstart) > RCC_DBP_TIMEOUT_VALUE) + 499:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** { + 500:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** return HAL_TIMEOUT; + 501:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** } + 502:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** } + 503:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** } + 504:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** + 505:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** /* Set the new LSE configuration -----------------------------------------*/ + 506:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** __HAL_RCC_LSE_CONFIG(RCC_OscInitStruct->LSEState); + 701 .loc 1 506 5 is_stmt 1 view .LVU211 + 702 .loc 1 506 5 view .LVU212 + 703 021c A368 ldr r3, [r4, #8] + 704 021e 012B cmp r3, #1 + 705 0220 21D0 beq .L129 + 706 .loc 1 506 5 discriminator 2 view .LVU213 + 707 0222 002B cmp r3, #0 + 708 0224 36D1 bne .L55 + 709 .loc 1 506 5 discriminator 4 view .LVU214 + ARM GAS /tmp/ccCIS8O6.s page 24 + + + 710 0226 2E4B ldr r3, .L139 + 711 0228 1A6A ldr r2, [r3, #32] + 712 022a 0121 movs r1, #1 + 713 022c 8A43 bics r2, r1 + 714 022e 1A62 str r2, [r3, #32] + 715 .loc 1 506 5 discriminator 4 view .LVU215 + 716 0230 1A6A ldr r2, [r3, #32] + 717 0232 0331 adds r1, r1, #3 + 718 0234 8A43 bics r2, r1 + 719 0236 1A62 str r2, [r3, #32] + 720 0238 1AE0 b .L54 + 721 .LVL43: + 722 .L95: + 475:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** + 723 .loc 1 475 22 is_stmt 0 view .LVU216 + 724 023a 0025 movs r5, #0 + 725 023c EAE7 b .L49 + 726 .LVL44: + 727 .L128: + 491:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** + 728 .loc 1 491 7 is_stmt 1 view .LVU217 + 729 023e 2B4A ldr r2, .L139+12 + 730 0240 1168 ldr r1, [r2] + 731 0242 8023 movs r3, #128 + 732 0244 5B00 lsls r3, r3, #1 + 733 0246 0B43 orrs r3, r1 + 734 0248 1360 str r3, [r2] + 494:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** + 735 .loc 1 494 7 view .LVU218 + 494:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** + 736 .loc 1 494 19 is_stmt 0 view .LVU219 + 737 024a FFF7FEFF bl HAL_GetTick + 738 .LVL45: + 739 024e 0600 movs r6, r0 + 740 .LVL46: + 496:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** { + 741 .loc 1 496 7 is_stmt 1 view .LVU220 + 742 .L51: + 496:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** { + 743 .loc 1 496 13 view .LVU221 + 744 0250 264B ldr r3, .L139+12 + 745 0252 1B68 ldr r3, [r3] + 746 0254 DB05 lsls r3, r3, #23 + 747 0256 E1D4 bmi .L50 + 498:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** { + 748 .loc 1 498 9 view .LVU222 + 498:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** { + 749 .loc 1 498 13 is_stmt 0 view .LVU223 + 750 0258 FFF7FEFF bl HAL_GetTick + 751 .LVL47: + 498:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** { + 752 .loc 1 498 27 discriminator 1 view .LVU224 + 753 025c 801B subs r0, r0, r6 + 498:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** { + 754 .loc 1 498 11 discriminator 1 view .LVU225 + 755 025e 6428 cmp r0, #100 + 756 0260 F6D9 bls .L51 + ARM GAS /tmp/ccCIS8O6.s page 25 + + + 500:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** } + 757 .loc 1 500 18 view .LVU226 + 758 0262 0320 movs r0, #3 + 759 0264 52E1 b .L20 + 760 .LVL48: + 761 .L129: + 762 .loc 1 506 5 is_stmt 1 discriminator 1 view .LVU227 + 763 0266 1E4A ldr r2, .L139 + 764 0268 136A ldr r3, [r2, #32] + 765 026a 0121 movs r1, #1 + 766 026c 0B43 orrs r3, r1 + 767 026e 1362 str r3, [r2, #32] + 768 .L54: + 769 .loc 1 506 5 discriminator 10 view .LVU228 + 507:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** /* Check the LSE State */ + 508:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** if(RCC_OscInitStruct->LSEState != RCC_LSE_OFF) + 770 .loc 1 508 5 view .LVU229 + 771 .loc 1 508 25 is_stmt 0 view .LVU230 + 772 0270 A368 ldr r3, [r4, #8] + 773 .loc 1 508 7 view .LVU231 + 774 0272 002B cmp r3, #0 + 775 0274 24D0 beq .L57 + 509:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** { + 510:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** /* Get Start Tick */ + 511:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** tickstart = HAL_GetTick(); + 776 .loc 1 511 7 is_stmt 1 view .LVU232 + 777 .loc 1 511 19 is_stmt 0 view .LVU233 + 778 0276 FFF7FEFF bl HAL_GetTick + 779 .LVL49: + 780 027a 0600 movs r6, r0 + 781 .LVL50: + 512:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** + 513:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** /* Wait till LSE is ready */ + 514:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** while(__HAL_RCC_GET_FLAG(RCC_FLAG_LSERDY) == RESET) + 782 .loc 1 514 7 is_stmt 1 view .LVU234 + 783 .L58: + 784 .loc 1 514 49 view .LVU235 + 785 .loc 1 514 13 is_stmt 0 view .LVU236 + 786 027c 184B ldr r3, .L139 + 787 027e 1B6A ldr r3, [r3, #32] + 788 .loc 1 514 49 view .LVU237 + 789 0280 9B07 lsls r3, r3, #30 + 790 0282 37D4 bmi .L60 + 515:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** { + 516:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** if((HAL_GetTick() - tickstart ) > RCC_LSE_TIMEOUT_VALUE) + 791 .loc 1 516 9 is_stmt 1 view .LVU238 + 792 .loc 1 516 13 is_stmt 0 view .LVU239 + 793 0284 FFF7FEFF bl HAL_GetTick + 794 .LVL51: + 795 .loc 1 516 27 discriminator 1 view .LVU240 + 796 0288 801B subs r0, r0, r6 + 797 .loc 1 516 11 discriminator 1 view .LVU241 + 798 028a 194B ldr r3, .L139+16 + 799 028c 9842 cmp r0, r3 + 800 028e F5D9 bls .L58 + 517:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** { + 518:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** return HAL_TIMEOUT; + ARM GAS /tmp/ccCIS8O6.s page 26 + + + 801 .loc 1 518 18 view .LVU242 + 802 0290 0320 movs r0, #3 + 803 0292 3BE1 b .L20 + 804 .LVL52: + 805 .L55: + 506:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** /* Check the LSE State */ + 806 .loc 1 506 5 is_stmt 1 discriminator 5 view .LVU243 + 807 0294 052B cmp r3, #5 + 808 0296 09D0 beq .L130 + 506:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** /* Check the LSE State */ + 809 .loc 1 506 5 discriminator 8 view .LVU244 + 810 0298 114B ldr r3, .L139 + 811 029a 1A6A ldr r2, [r3, #32] + 812 029c 0121 movs r1, #1 + 813 029e 8A43 bics r2, r1 + 814 02a0 1A62 str r2, [r3, #32] + 506:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** /* Check the LSE State */ + 815 .loc 1 506 5 discriminator 8 view .LVU245 + 816 02a2 1A6A ldr r2, [r3, #32] + 817 02a4 0331 adds r1, r1, #3 + 818 02a6 8A43 bics r2, r1 + 819 02a8 1A62 str r2, [r3, #32] + 820 02aa E1E7 b .L54 + 821 .L130: + 506:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** /* Check the LSE State */ + 822 .loc 1 506 5 discriminator 7 view .LVU246 + 823 02ac 0C4B ldr r3, .L139 + 824 02ae 1A6A ldr r2, [r3, #32] + 825 02b0 0421 movs r1, #4 + 826 02b2 0A43 orrs r2, r1 + 827 02b4 1A62 str r2, [r3, #32] + 506:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** /* Check the LSE State */ + 828 .loc 1 506 5 discriminator 7 view .LVU247 + 829 02b6 1A6A ldr r2, [r3, #32] + 830 02b8 0339 subs r1, r1, #3 + 831 02ba 0A43 orrs r2, r1 + 832 02bc 1A62 str r2, [r3, #32] + 833 02be D7E7 b .L54 + 834 .L57: + 519:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** } + 520:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** } + 521:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** } + 522:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** else + 523:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** { + 524:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** /* Get Start Tick */ + 525:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** tickstart = HAL_GetTick(); + 835 .loc 1 525 7 view .LVU248 + 836 .loc 1 525 19 is_stmt 0 view .LVU249 + 837 02c0 FFF7FEFF bl HAL_GetTick + 838 .LVL53: + 839 02c4 0600 movs r6, r0 + 840 .LVL54: + 526:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** + 527:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** /* Wait till LSE is disabled */ + 528:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** while(__HAL_RCC_GET_FLAG(RCC_FLAG_LSERDY) != RESET) + 841 .loc 1 528 7 is_stmt 1 view .LVU250 + 842 .L61: + ARM GAS /tmp/ccCIS8O6.s page 27 + + + 843 .loc 1 528 49 view .LVU251 + 844 .loc 1 528 13 is_stmt 0 view .LVU252 + 845 02c6 064B ldr r3, .L139 + 846 02c8 1B6A ldr r3, [r3, #32] + 847 .loc 1 528 49 view .LVU253 + 848 02ca 9B07 lsls r3, r3, #30 + 849 02cc 12D5 bpl .L60 + 529:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** { + 530:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** if((HAL_GetTick() - tickstart ) > RCC_LSE_TIMEOUT_VALUE) + 850 .loc 1 530 9 is_stmt 1 view .LVU254 + 851 .loc 1 530 13 is_stmt 0 view .LVU255 + 852 02ce FFF7FEFF bl HAL_GetTick + 853 .LVL55: + 854 .loc 1 530 27 discriminator 1 view .LVU256 + 855 02d2 801B subs r0, r0, r6 + 856 .loc 1 530 11 discriminator 1 view .LVU257 + 857 02d4 064B ldr r3, .L139+16 + 858 02d6 9842 cmp r0, r3 + 859 02d8 F5D9 bls .L61 + 531:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** { + 532:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** return HAL_TIMEOUT; + 860 .loc 1 532 18 view .LVU258 + 861 02da 0320 movs r0, #3 + 862 02dc 16E1 b .L20 + 863 .L140: + 864 02de C046 .align 2 + 865 .L139: + 866 02e0 00100240 .word 1073876992 + 867 02e4 FFFFFEFF .word -65537 + 868 02e8 FFFFFBFF .word -262145 + 869 02ec 00700040 .word 1073770496 + 870 02f0 88130000 .word 5000 + 871 .L60: + 533:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** } + 534:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** } + 535:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** } + 536:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** + 537:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** /* Require to disable power clock if necessary */ + 538:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** if(pwrclkchanged == SET) + 872 .loc 1 538 5 is_stmt 1 view .LVU259 + 873 .loc 1 538 7 is_stmt 0 view .LVU260 + 874 02f4 012D cmp r5, #1 + 875 02f6 39D0 beq .L131 + 876 .LVL56: + 877 .L48: + 878 .loc 1 538 7 view .LVU261 + 879 .LBE2: + 539:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** { + 540:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** __HAL_RCC_PWR_CLK_DISABLE(); + 541:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** } + 542:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** } + 543:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** + 544:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** /*----------------------------- HSI14 Configuration --------------------------*/ + 545:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** if(((RCC_OscInitStruct->OscillatorType) & RCC_OSCILLATORTYPE_HSI14) == RCC_OSCILLATORTYPE_HSI14) + 880 .loc 1 545 3 is_stmt 1 view .LVU262 + 881 .loc 1 545 25 is_stmt 0 view .LVU263 + 882 02f8 2368 ldr r3, [r4] + ARM GAS /tmp/ccCIS8O6.s page 28 + + + 883 .loc 1 545 5 view .LVU264 + 884 02fa DB06 lsls r3, r3, #27 + 885 02fc 10D5 bpl .L63 + 546:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** { + 547:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** /* Check the parameters */ + 548:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** assert_param(IS_RCC_HSI14(RCC_OscInitStruct->HSI14State)); + 886 .loc 1 548 5 is_stmt 1 view .LVU265 + 549:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** assert_param(IS_RCC_CALIBRATION_VALUE(RCC_OscInitStruct->HSI14CalibrationValue)); + 887 .loc 1 549 5 view .LVU266 + 550:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** + 551:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** /* Check the HSI14 State */ + 552:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** if(RCC_OscInitStruct->HSI14State == RCC_HSI14_ON) + 888 .loc 1 552 5 view .LVU267 + 889 .loc 1 552 25 is_stmt 0 view .LVU268 + 890 02fe 6369 ldr r3, [r4, #20] + 891 .loc 1 552 7 view .LVU269 + 892 0300 012B cmp r3, #1 + 893 0302 39D0 beq .L132 + 553:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** { + 554:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** /* Disable ADC control of the Internal High Speed oscillator HSI14 */ + 555:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** __HAL_RCC_HSI14ADC_DISABLE(); + 556:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** + 557:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** /* Enable the Internal High Speed oscillator (HSI). */ + 558:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** __HAL_RCC_HSI14_ENABLE(); + 559:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** + 560:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** /* Get Start Tick */ + 561:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** tickstart = HAL_GetTick(); + 562:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** + 563:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** /* Wait till HSI is ready */ + 564:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** while(__HAL_RCC_GET_FLAG(RCC_FLAG_HSI14RDY) == RESET) + 565:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** { + 566:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** if((HAL_GetTick() - tickstart) > HSI14_TIMEOUT_VALUE) + 567:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** { + 568:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** return HAL_TIMEOUT; + 569:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** } + 570:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** } + 571:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** + 572:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** /* Adjusts the Internal High Speed oscillator 14Mhz (HSI14) calibration value. */ + 573:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** __HAL_RCC_HSI14_CALIBRATIONVALUE_ADJUST(RCC_OscInitStruct->HSI14CalibrationValue); + 574:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** } + 575:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** else if(RCC_OscInitStruct->HSI14State == RCC_HSI14_ADC_CONTROL) + 894 .loc 1 575 10 is_stmt 1 view .LVU270 + 895 .loc 1 575 12 is_stmt 0 view .LVU271 + 896 0304 0533 adds r3, r3, #5 + 897 0306 57D1 bne .L67 + 576:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** { + 577:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** /* Enable ADC control of the Internal High Speed oscillator HSI14 */ + 578:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** __HAL_RCC_HSI14ADC_ENABLE(); + 898 .loc 1 578 7 is_stmt 1 view .LVU272 + 899 0308 894A ldr r2, .L141 + 900 030a 536B ldr r3, [r2, #52] + 901 030c 0421 movs r1, #4 + 902 030e 8B43 bics r3, r1 + 903 0310 5363 str r3, [r2, #52] + 579:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** + 580:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** /* Adjusts the Internal High Speed oscillator 14Mhz (HSI14) calibration value. */ + 581:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** __HAL_RCC_HSI14_CALIBRATIONVALUE_ADJUST(RCC_OscInitStruct->HSI14CalibrationValue); + ARM GAS /tmp/ccCIS8O6.s page 29 + + + 904 .loc 1 581 7 view .LVU273 + 905 0312 536B ldr r3, [r2, #52] + 906 0314 F431 adds r1, r1, #244 + 907 0316 8B43 bics r3, r1 + 908 0318 A169 ldr r1, [r4, #24] + 909 031a C900 lsls r1, r1, #3 + 910 031c 0B43 orrs r3, r1 + 911 031e 5363 str r3, [r2, #52] + 912 .L63: + 582:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** } + 583:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** else + 584:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** { + 585:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** /* Disable ADC control of the Internal High Speed oscillator HSI14 */ + 586:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** __HAL_RCC_HSI14ADC_DISABLE(); + 587:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** + 588:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** /* Disable the Internal High Speed oscillator (HSI). */ + 589:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** __HAL_RCC_HSI14_DISABLE(); + 590:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** + 591:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** /* Get Start Tick */ + 592:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** tickstart = HAL_GetTick(); + 593:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** + 594:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** /* Wait till HSI is ready */ + 595:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** while(__HAL_RCC_GET_FLAG(RCC_FLAG_HSI14RDY) != RESET) + 596:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** { + 597:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** if((HAL_GetTick() - tickstart) > HSI14_TIMEOUT_VALUE) + 598:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** { + 599:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** return HAL_TIMEOUT; + 600:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** } + 601:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** } + 602:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** } + 603:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** } + 604:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** + 605:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** #if defined(RCC_HSI48_SUPPORT) + 606:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** /*----------------------------- HSI48 Configuration --------------------------*/ + 607:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** if(((RCC_OscInitStruct->OscillatorType) & RCC_OSCILLATORTYPE_HSI48) == RCC_OSCILLATORTYPE_HSI48) + 913 .loc 1 607 3 view .LVU274 + 914 .loc 1 607 25 is_stmt 0 view .LVU275 + 915 0320 2368 ldr r3, [r4] + 916 .loc 1 607 5 view .LVU276 + 917 0322 9B06 lsls r3, r3, #26 + 918 0324 6ED5 bpl .L70 + 608:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** { + 609:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** /* Check the parameters */ + 610:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** assert_param(IS_RCC_HSI48(RCC_OscInitStruct->HSI48State)); + 919 .loc 1 610 5 is_stmt 1 view .LVU277 + 611:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** + 612:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** /* When the HSI48 is used as system clock it is not allowed to be disabled */ + 613:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** if((__HAL_RCC_GET_SYSCLK_SOURCE() == RCC_SYSCLKSOURCE_STATUS_HSI48) || + 920 .loc 1 613 5 view .LVU278 + 921 .loc 1 613 9 is_stmt 0 view .LVU279 + 922 0326 824B ldr r3, .L141 + 923 0328 5A68 ldr r2, [r3, #4] + 924 032a 0C23 movs r3, #12 + 925 032c 1340 ands r3, r2 + 926 .loc 1 613 7 view .LVU280 + 927 032e 0C2B cmp r3, #12 + 928 0330 60D0 beq .L71 + ARM GAS /tmp/ccCIS8O6.s page 30 + + + 614:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** ((__HAL_RCC_GET_SYSCLK_SOURCE() == RCC_SYSCLKSOURCE_STATUS_PLLCLK) && (__HAL_RCC_GET_PLL_OSC + 929 .loc 1 614 10 view .LVU281 + 930 0332 7F4B ldr r3, .L141 + 931 0334 5A68 ldr r2, [r3, #4] + 932 0336 0C23 movs r3, #12 + 933 0338 1340 ands r3, r2 + 613:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** ((__HAL_RCC_GET_SYSCLK_SOURCE() == RCC_SYSCLKSOURCE_STATUS_PLLCLK) && (__HAL_RCC_GET_PLL_OSC + 934 .loc 1 613 73 discriminator 1 view .LVU282 + 935 033a 082B cmp r3, #8 + 936 033c 53D0 beq .L133 + 937 .L72: + 615:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** { + 616:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** if((__HAL_RCC_GET_FLAG(RCC_FLAG_HSI48RDY) != RESET) && (RCC_OscInitStruct->HSI48State != RCC_ + 617:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** { + 618:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** return HAL_ERROR; + 619:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** } + 620:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** } + 621:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** else + 622:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** { + 623:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** /* Check the HSI48 State */ + 624:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** if(RCC_OscInitStruct->HSI48State != RCC_HSI48_OFF) + 938 .loc 1 624 7 is_stmt 1 view .LVU283 + 939 .loc 1 624 27 is_stmt 0 view .LVU284 + 940 033e 236A ldr r3, [r4, #32] + 941 .loc 1 624 9 view .LVU285 + 942 0340 002B cmp r3, #0 + 943 0342 7ED0 beq .L73 + 625:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** { + 626:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** /* Enable the Internal High Speed oscillator (HSI48). */ + 627:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** __HAL_RCC_HSI48_ENABLE(); + 944 .loc 1 627 9 is_stmt 1 view .LVU286 + 945 0344 7A4A ldr r2, .L141 + 946 0346 516B ldr r1, [r2, #52] + 947 0348 8023 movs r3, #128 + 948 034a 5B02 lsls r3, r3, #9 + 949 034c 0B43 orrs r3, r1 + 950 034e 5363 str r3, [r2, #52] + 628:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** + 629:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** /* Get Start Tick */ + 630:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** tickstart = HAL_GetTick(); + 951 .loc 1 630 9 view .LVU287 + 952 .loc 1 630 21 is_stmt 0 view .LVU288 + 953 0350 FFF7FEFF bl HAL_GetTick + 954 .LVL57: + 955 0354 0500 movs r5, r0 + 956 .LVL58: + 631:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** + 632:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** /* Wait till HSI48 is ready */ + 633:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** while(__HAL_RCC_GET_FLAG(RCC_FLAG_HSI48RDY) == RESET) + 957 .loc 1 633 9 is_stmt 1 view .LVU289 + 958 .L74: + 959 .loc 1 633 53 view .LVU290 + 960 .loc 1 633 15 is_stmt 0 view .LVU291 + 961 0356 764B ldr r3, .L141 + 962 0358 5B6B ldr r3, [r3, #52] + 963 .loc 1 633 53 view .LVU292 + 964 035a 9B03 lsls r3, r3, #14 + ARM GAS /tmp/ccCIS8O6.s page 31 + + + 965 035c 52D4 bmi .L70 + 634:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** { + 635:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** if((HAL_GetTick() - tickstart) > HSI48_TIMEOUT_VALUE) + 966 .loc 1 635 11 is_stmt 1 view .LVU293 + 967 .loc 1 635 15 is_stmt 0 view .LVU294 + 968 035e FFF7FEFF bl HAL_GetTick + 969 .LVL59: + 970 .loc 1 635 29 discriminator 1 view .LVU295 + 971 0362 401B subs r0, r0, r5 + 972 .loc 1 635 13 discriminator 1 view .LVU296 + 973 0364 0228 cmp r0, #2 + 974 0366 F6D9 bls .L74 + 636:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** { + 637:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** return HAL_TIMEOUT; + 975 .loc 1 637 20 view .LVU297 + 976 0368 0320 movs r0, #3 + 977 036a CFE0 b .L20 + 978 .LVL60: + 979 .L131: + 980 .LBB4: + 540:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** } + 981 .loc 1 540 7 is_stmt 1 view .LVU298 + 982 036c 704A ldr r2, .L141 + 983 036e D369 ldr r3, [r2, #28] + 984 0370 7049 ldr r1, .L141+4 + 985 0372 0B40 ands r3, r1 + 986 0374 D361 str r3, [r2, #28] + 987 0376 BFE7 b .L48 + 988 .LVL61: + 989 .L132: + 540:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** } + 990 .loc 1 540 7 is_stmt 0 view .LVU299 + 991 .LBE4: + 555:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** + 992 .loc 1 555 7 is_stmt 1 view .LVU300 + 993 0378 6D4B ldr r3, .L141 + 994 037a 5A6B ldr r2, [r3, #52] + 995 037c 0421 movs r1, #4 + 996 037e 0A43 orrs r2, r1 + 997 0380 5A63 str r2, [r3, #52] + 558:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** + 998 .loc 1 558 7 view .LVU301 + 999 0382 5A6B ldr r2, [r3, #52] + 1000 0384 0339 subs r1, r1, #3 + 1001 0386 0A43 orrs r2, r1 + 1002 0388 5A63 str r2, [r3, #52] + 561:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** + 1003 .loc 1 561 7 view .LVU302 + 561:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** + 1004 .loc 1 561 19 is_stmt 0 view .LVU303 + 1005 038a FFF7FEFF bl HAL_GetTick + 1006 .LVL62: + 1007 038e 0500 movs r5, r0 + 1008 .LVL63: + 564:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** { + 1009 .loc 1 564 7 is_stmt 1 view .LVU304 + 1010 .L65: + ARM GAS /tmp/ccCIS8O6.s page 32 + + + 564:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** { + 1011 .loc 1 564 51 view .LVU305 + 564:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** { + 1012 .loc 1 564 13 is_stmt 0 view .LVU306 + 1013 0390 674B ldr r3, .L141 + 1014 0392 5B6B ldr r3, [r3, #52] + 564:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** { + 1015 .loc 1 564 51 view .LVU307 + 1016 0394 9B07 lsls r3, r3, #30 + 1017 0396 06D4 bmi .L134 + 566:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** { + 1018 .loc 1 566 9 is_stmt 1 view .LVU308 + 566:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** { + 1019 .loc 1 566 13 is_stmt 0 view .LVU309 + 1020 0398 FFF7FEFF bl HAL_GetTick + 1021 .LVL64: + 566:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** { + 1022 .loc 1 566 27 discriminator 1 view .LVU310 + 1023 039c 401B subs r0, r0, r5 + 566:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** { + 1024 .loc 1 566 11 discriminator 1 view .LVU311 + 1025 039e 0228 cmp r0, #2 + 1026 03a0 F6D9 bls .L65 + 568:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** } + 1027 .loc 1 568 18 view .LVU312 + 1028 03a2 0320 movs r0, #3 + 1029 03a4 B2E0 b .L20 + 1030 .L134: + 573:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** } + 1031 .loc 1 573 7 is_stmt 1 view .LVU313 + 1032 03a6 6249 ldr r1, .L141 + 1033 03a8 4B6B ldr r3, [r1, #52] + 1034 03aa F822 movs r2, #248 + 1035 03ac 9343 bics r3, r2 + 1036 03ae A269 ldr r2, [r4, #24] + 1037 03b0 D200 lsls r2, r2, #3 + 1038 03b2 1343 orrs r3, r2 + 1039 03b4 4B63 str r3, [r1, #52] + 1040 03b6 B3E7 b .L63 + 1041 .LVL65: + 1042 .L67: + 586:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** + 1043 .loc 1 586 7 view .LVU314 + 1044 03b8 5D4B ldr r3, .L141 + 1045 03ba 5A6B ldr r2, [r3, #52] + 1046 03bc 0421 movs r1, #4 + 1047 03be 0A43 orrs r2, r1 + 1048 03c0 5A63 str r2, [r3, #52] + 589:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** + 1049 .loc 1 589 7 view .LVU315 + 1050 03c2 5A6B ldr r2, [r3, #52] + 1051 03c4 0339 subs r1, r1, #3 + 1052 03c6 8A43 bics r2, r1 + 1053 03c8 5A63 str r2, [r3, #52] + 592:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** + 1054 .loc 1 592 7 view .LVU316 + 592:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** + ARM GAS /tmp/ccCIS8O6.s page 33 + + + 1055 .loc 1 592 19 is_stmt 0 view .LVU317 + 1056 03ca FFF7FEFF bl HAL_GetTick + 1057 .LVL66: + 1058 03ce 0500 movs r5, r0 + 1059 .LVL67: + 595:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** { + 1060 .loc 1 595 7 is_stmt 1 view .LVU318 + 1061 .L68: + 595:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** { + 1062 .loc 1 595 51 view .LVU319 + 595:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** { + 1063 .loc 1 595 13 is_stmt 0 view .LVU320 + 1064 03d0 574B ldr r3, .L141 + 1065 03d2 5B6B ldr r3, [r3, #52] + 595:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** { + 1066 .loc 1 595 51 view .LVU321 + 1067 03d4 9B07 lsls r3, r3, #30 + 1068 03d6 A3D5 bpl .L63 + 597:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** { + 1069 .loc 1 597 9 is_stmt 1 view .LVU322 + 597:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** { + 1070 .loc 1 597 13 is_stmt 0 view .LVU323 + 1071 03d8 FFF7FEFF bl HAL_GetTick + 1072 .LVL68: + 597:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** { + 1073 .loc 1 597 27 discriminator 1 view .LVU324 + 1074 03dc 401B subs r0, r0, r5 + 597:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** { + 1075 .loc 1 597 11 discriminator 1 view .LVU325 + 1076 03de 0228 cmp r0, #2 + 1077 03e0 F6D9 bls .L68 + 599:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** } + 1078 .loc 1 599 18 view .LVU326 + 1079 03e2 0320 movs r0, #3 + 1080 03e4 92E0 b .L20 + 1081 .LVL69: + 1082 .L133: + 614:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** { + 1083 .loc 1 614 79 view .LVU327 + 1084 03e6 524B ldr r3, .L141 + 1085 03e8 5B68 ldr r3, [r3, #4] + 1086 03ea C022 movs r2, #192 + 1087 03ec 5202 lsls r2, r2, #9 + 1088 03ee 1340 ands r3, r2 + 614:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** { + 1089 .loc 1 614 75 view .LVU328 + 1090 03f0 9342 cmp r3, r2 + 1091 03f2 A4D1 bne .L72 + 1092 .L71: + 616:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** { + 1093 .loc 1 616 7 is_stmt 1 view .LVU329 + 616:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** { + 1094 .loc 1 616 11 is_stmt 0 view .LVU330 + 1095 03f4 4E4B ldr r3, .L141 + 1096 03f6 5B6B ldr r3, [r3, #52] + 616:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** { + 1097 .loc 1 616 9 view .LVU331 + ARM GAS /tmp/ccCIS8O6.s page 34 + + + 1098 03f8 9B03 lsls r3, r3, #14 + 1099 03fa 03D5 bpl .L70 + 616:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** { + 1100 .loc 1 616 80 discriminator 1 view .LVU332 + 1101 03fc 236A ldr r3, [r4, #32] + 616:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** { + 1102 .loc 1 616 59 discriminator 1 view .LVU333 + 1103 03fe 012B cmp r3, #1 + 1104 0400 00D0 beq .LCB1044 + 1105 0402 89E0 b .L101 @long jump + 1106 .LCB1044: + 1107 .L70: + 638:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** } + 639:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** } + 640:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** } + 641:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** else + 642:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** { + 643:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** /* Disable the Internal High Speed oscillator (HSI48). */ + 644:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** __HAL_RCC_HSI48_DISABLE(); + 645:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** + 646:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** /* Get Start Tick */ + 647:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** tickstart = HAL_GetTick(); + 648:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** + 649:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** /* Wait till HSI48 is ready */ + 650:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** while(__HAL_RCC_GET_FLAG(RCC_FLAG_HSI48RDY) != RESET) + 651:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** { + 652:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** if((HAL_GetTick() - tickstart) > HSI48_TIMEOUT_VALUE) + 653:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** { + 654:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** return HAL_TIMEOUT; + 655:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** } + 656:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** } + 657:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** } + 658:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** } + 659:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** } + 660:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** #endif /* RCC_HSI48_SUPPORT */ + 661:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** + 662:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** /*-------------------------------- PLL Configuration -----------------------*/ + 663:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** /* Check the parameters */ + 664:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** assert_param(IS_RCC_PLL(RCC_OscInitStruct->PLL.PLLState)); + 1108 .loc 1 664 3 is_stmt 1 view .LVU334 + 665:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** if ((RCC_OscInitStruct->PLL.PLLState) != RCC_PLL_NONE) + 1109 .loc 1 665 3 view .LVU335 + 1110 .loc 1 665 30 is_stmt 0 view .LVU336 + 1111 0404 636A ldr r3, [r4, #36] + 1112 .loc 1 665 6 view .LVU337 + 1113 0406 002B cmp r3, #0 + 1114 0408 00D1 bne .LCB1051 + 1115 040a 87E0 b .L104 @long jump + 1116 .LCB1051: + 666:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** { + 667:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** /* Check if the PLL is used as system clock or not */ + 668:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** if(__HAL_RCC_GET_SYSCLK_SOURCE() != RCC_SYSCLKSOURCE_STATUS_PLLCLK) + 1117 .loc 1 668 5 is_stmt 1 view .LVU338 + 1118 .loc 1 668 8 is_stmt 0 view .LVU339 + 1119 040c 484A ldr r2, .L141 + 1120 040e 5168 ldr r1, [r2, #4] + 1121 0410 0C22 movs r2, #12 + ARM GAS /tmp/ccCIS8O6.s page 35 + + + 1122 0412 0A40 ands r2, r1 + 1123 .loc 1 668 7 view .LVU340 + 1124 0414 082A cmp r2, #8 + 1125 0416 60D0 beq .L78 + 669:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** { + 670:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** if((RCC_OscInitStruct->PLL.PLLState) == RCC_PLL_ON) + 1126 .loc 1 670 7 is_stmt 1 view .LVU341 + 1127 .loc 1 670 9 is_stmt 0 view .LVU342 + 1128 0418 022B cmp r3, #2 + 1129 041a 25D0 beq .L135 + 671:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** { + 672:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** /* Check the parameters */ + 673:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** assert_param(IS_RCC_PLLSOURCE(RCC_OscInitStruct->PLL.PLLSource)); + 674:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** assert_param(IS_RCC_PLL_MUL(RCC_OscInitStruct->PLL.PLLMUL)); + 675:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** assert_param(IS_RCC_PREDIV(RCC_OscInitStruct->PLL.PREDIV)); + 676:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** + 677:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** /* Disable the main PLL. */ + 678:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** __HAL_RCC_PLL_DISABLE(); + 679:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** + 680:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** /* Get Start Tick */ + 681:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** tickstart = HAL_GetTick(); + 682:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** + 683:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** /* Wait till PLL is disabled */ + 684:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** while(__HAL_RCC_GET_FLAG(RCC_FLAG_PLLRDY) != RESET) + 685:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** { + 686:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** if((HAL_GetTick() - tickstart ) > PLL_TIMEOUT_VALUE) + 687:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** { + 688:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** return HAL_TIMEOUT; + 689:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** } + 690:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** } + 691:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** + 692:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** /* Configure the main PLL clock source, predivider and multiplication factor. */ + 693:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** __HAL_RCC_PLL_CONFIG(RCC_OscInitStruct->PLL.PLLSource, + 694:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** RCC_OscInitStruct->PLL.PREDIV, + 695:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** RCC_OscInitStruct->PLL.PLLMUL); + 696:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** /* Enable the main PLL. */ + 697:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** __HAL_RCC_PLL_ENABLE(); + 698:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** + 699:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** /* Get Start Tick */ + 700:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** tickstart = HAL_GetTick(); + 701:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** + 702:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** /* Wait till PLL is ready */ + 703:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** while(__HAL_RCC_GET_FLAG(RCC_FLAG_PLLRDY) == RESET) + 704:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** { + 705:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** if((HAL_GetTick() - tickstart ) > PLL_TIMEOUT_VALUE) + 706:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** { + 707:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** return HAL_TIMEOUT; + 708:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** } + 709:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** } + 710:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** } + 711:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** else + 712:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** { + 713:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** /* Disable the main PLL. */ + 714:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** __HAL_RCC_PLL_DISABLE(); + 1130 .loc 1 714 9 is_stmt 1 view .LVU343 + 1131 041c 444A ldr r2, .L141 + 1132 041e 1368 ldr r3, [r2] + ARM GAS /tmp/ccCIS8O6.s page 36 + + + 1133 0420 4549 ldr r1, .L141+8 + 1134 0422 0B40 ands r3, r1 + 1135 0424 1360 str r3, [r2] + 715:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** + 716:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** /* Get Start Tick */ + 717:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** tickstart = HAL_GetTick(); + 1136 .loc 1 717 9 view .LVU344 + 1137 .loc 1 717 21 is_stmt 0 view .LVU345 + 1138 0426 FFF7FEFF bl HAL_GetTick + 1139 .LVL70: + 1140 042a 0400 movs r4, r0 + 1141 .LVL71: + 718:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** + 719:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** /* Wait till PLL is disabled */ + 720:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** while(__HAL_RCC_GET_FLAG(RCC_FLAG_PLLRDY) != RESET) + 1142 .loc 1 720 9 is_stmt 1 view .LVU346 + 1143 .L84: + 1144 .loc 1 720 52 view .LVU347 + 1145 .loc 1 720 15 is_stmt 0 view .LVU348 + 1146 042c 404B ldr r3, .L141 + 1147 042e 1B68 ldr r3, [r3] + 1148 .loc 1 720 52 view .LVU349 + 1149 0430 9B01 lsls r3, r3, #6 + 1150 0432 50D5 bpl .L136 + 721:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** { + 722:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** if((HAL_GetTick() - tickstart ) > PLL_TIMEOUT_VALUE) + 1151 .loc 1 722 11 is_stmt 1 view .LVU350 + 1152 .loc 1 722 15 is_stmt 0 view .LVU351 + 1153 0434 FFF7FEFF bl HAL_GetTick + 1154 .LVL72: + 1155 .loc 1 722 29 discriminator 1 view .LVU352 + 1156 0438 001B subs r0, r0, r4 + 1157 .loc 1 722 13 discriminator 1 view .LVU353 + 1158 043a 0228 cmp r0, #2 + 1159 043c F6D9 bls .L84 + 723:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** { + 724:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** return HAL_TIMEOUT; + 1160 .loc 1 724 20 view .LVU354 + 1161 043e 0320 movs r0, #3 + 1162 0440 64E0 b .L20 + 1163 .LVL73: + 1164 .L73: + 644:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** + 1165 .loc 1 644 9 is_stmt 1 view .LVU355 + 1166 0442 3B4A ldr r2, .L141 + 1167 0444 536B ldr r3, [r2, #52] + 1168 0446 3D49 ldr r1, .L141+12 + 1169 0448 0B40 ands r3, r1 + 1170 044a 5363 str r3, [r2, #52] + 647:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** + 1171 .loc 1 647 9 view .LVU356 + 647:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** + 1172 .loc 1 647 21 is_stmt 0 view .LVU357 + 1173 044c FFF7FEFF bl HAL_GetTick + 1174 .LVL74: + 1175 0450 0500 movs r5, r0 + 1176 .LVL75: + ARM GAS /tmp/ccCIS8O6.s page 37 + + + 650:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** { + 1177 .loc 1 650 9 is_stmt 1 view .LVU358 + 1178 .L76: + 650:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** { + 1179 .loc 1 650 53 view .LVU359 + 650:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** { + 1180 .loc 1 650 15 is_stmt 0 view .LVU360 + 1181 0452 374B ldr r3, .L141 + 1182 0454 5B6B ldr r3, [r3, #52] + 650:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** { + 1183 .loc 1 650 53 view .LVU361 + 1184 0456 9B03 lsls r3, r3, #14 + 1185 0458 D4D5 bpl .L70 + 652:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** { + 1186 .loc 1 652 11 is_stmt 1 view .LVU362 + 652:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** { + 1187 .loc 1 652 15 is_stmt 0 view .LVU363 + 1188 045a FFF7FEFF bl HAL_GetTick + 1189 .LVL76: + 652:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** { + 1190 .loc 1 652 29 discriminator 1 view .LVU364 + 1191 045e 401B subs r0, r0, r5 + 652:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** { + 1192 .loc 1 652 13 discriminator 1 view .LVU365 + 1193 0460 0228 cmp r0, #2 + 1194 0462 F6D9 bls .L76 + 654:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** } + 1195 .loc 1 654 20 view .LVU366 + 1196 0464 0320 movs r0, #3 + 1197 0466 51E0 b .L20 + 1198 .LVL77: + 1199 .L135: + 673:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** assert_param(IS_RCC_PLL_MUL(RCC_OscInitStruct->PLL.PLLMUL)); + 1200 .loc 1 673 9 is_stmt 1 view .LVU367 + 674:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** assert_param(IS_RCC_PREDIV(RCC_OscInitStruct->PLL.PREDIV)); + 1201 .loc 1 674 9 view .LVU368 + 675:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** + 1202 .loc 1 675 9 view .LVU369 + 678:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** + 1203 .loc 1 678 9 view .LVU370 + 1204 0468 314A ldr r2, .L141 + 1205 046a 1368 ldr r3, [r2] + 1206 046c 3249 ldr r1, .L141+8 + 1207 046e 0B40 ands r3, r1 + 1208 0470 1360 str r3, [r2] + 681:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** + 1209 .loc 1 681 9 view .LVU371 + 681:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** + 1210 .loc 1 681 21 is_stmt 0 view .LVU372 + 1211 0472 FFF7FEFF bl HAL_GetTick + 1212 .LVL78: + 1213 0476 0500 movs r5, r0 + 1214 .LVL79: + 684:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** { + 1215 .loc 1 684 9 is_stmt 1 view .LVU373 + 1216 .L80: + 684:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** { + ARM GAS /tmp/ccCIS8O6.s page 38 + + + 1217 .loc 1 684 52 view .LVU374 + 684:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** { + 1218 .loc 1 684 15 is_stmt 0 view .LVU375 + 1219 0478 2D4B ldr r3, .L141 + 1220 047a 1B68 ldr r3, [r3] + 684:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** { + 1221 .loc 1 684 52 view .LVU376 + 1222 047c 9B01 lsls r3, r3, #6 + 1223 047e 06D5 bpl .L137 + 686:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** { + 1224 .loc 1 686 11 is_stmt 1 view .LVU377 + 686:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** { + 1225 .loc 1 686 15 is_stmt 0 view .LVU378 + 1226 0480 FFF7FEFF bl HAL_GetTick + 1227 .LVL80: + 686:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** { + 1228 .loc 1 686 29 discriminator 1 view .LVU379 + 1229 0484 401B subs r0, r0, r5 + 686:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** { + 1230 .loc 1 686 13 discriminator 1 view .LVU380 + 1231 0486 0228 cmp r0, #2 + 1232 0488 F6D9 bls .L80 + 688:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** } + 1233 .loc 1 688 20 view .LVU381 + 1234 048a 0320 movs r0, #3 + 1235 048c 3EE0 b .L20 + 1236 .L137: + 693:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** RCC_OscInitStruct->PLL.PREDIV, + 1237 .loc 1 693 9 is_stmt 1 view .LVU382 + 693:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** RCC_OscInitStruct->PLL.PREDIV, + 1238 .loc 1 693 9 view .LVU383 + 1239 048e 284B ldr r3, .L141 + 1240 0490 DA6A ldr r2, [r3, #44] + 1241 0492 0F21 movs r1, #15 + 1242 0494 8A43 bics r2, r1 + 1243 0496 216B ldr r1, [r4, #48] + 1244 0498 0A43 orrs r2, r1 + 1245 049a DA62 str r2, [r3, #44] + 693:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** RCC_OscInitStruct->PLL.PREDIV, + 1246 .loc 1 693 9 view .LVU384 + 1247 049c 5A68 ldr r2, [r3, #4] + 1248 049e 2849 ldr r1, .L141+16 + 1249 04a0 0A40 ands r2, r1 + 1250 04a2 E16A ldr r1, [r4, #44] + 1251 04a4 A06A ldr r0, [r4, #40] + 1252 04a6 0143 orrs r1, r0 + 1253 04a8 0A43 orrs r2, r1 + 1254 04aa 5A60 str r2, [r3, #4] + 693:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** RCC_OscInitStruct->PLL.PREDIV, + 1255 .loc 1 693 9 view .LVU385 + 697:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** + 1256 .loc 1 697 9 view .LVU386 + 1257 04ac 1968 ldr r1, [r3] + 1258 04ae 8022 movs r2, #128 + 1259 04b0 5204 lsls r2, r2, #17 + 1260 04b2 0A43 orrs r2, r1 + 1261 04b4 1A60 str r2, [r3] + ARM GAS /tmp/ccCIS8O6.s page 39 + + + 700:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** + 1262 .loc 1 700 9 view .LVU387 + 700:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** + 1263 .loc 1 700 21 is_stmt 0 view .LVU388 + 1264 04b6 FFF7FEFF bl HAL_GetTick + 1265 .LVL81: + 1266 04ba 0400 movs r4, r0 + 1267 .LVL82: + 703:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** { + 1268 .loc 1 703 9 is_stmt 1 view .LVU389 + 1269 .L82: + 703:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** { + 1270 .loc 1 703 52 view .LVU390 + 703:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** { + 1271 .loc 1 703 15 is_stmt 0 view .LVU391 + 1272 04bc 1C4B ldr r3, .L141 + 1273 04be 1B68 ldr r3, [r3] + 703:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** { + 1274 .loc 1 703 52 view .LVU392 + 1275 04c0 9B01 lsls r3, r3, #6 + 1276 04c2 06D4 bmi .L138 + 705:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** { + 1277 .loc 1 705 11 is_stmt 1 view .LVU393 + 705:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** { + 1278 .loc 1 705 15 is_stmt 0 view .LVU394 + 1279 04c4 FFF7FEFF bl HAL_GetTick + 1280 .LVL83: + 705:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** { + 1281 .loc 1 705 29 discriminator 1 view .LVU395 + 1282 04c8 001B subs r0, r0, r4 + 705:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** { + 1283 .loc 1 705 13 discriminator 1 view .LVU396 + 1284 04ca 0228 cmp r0, #2 + 1285 04cc F6D9 bls .L82 + 707:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** } + 1286 .loc 1 707 20 view .LVU397 + 1287 04ce 0320 movs r0, #3 + 1288 04d0 1CE0 b .L20 + 1289 .L138: + 725:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** } + 726:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** } + 727:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** } + 728:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** } + 729:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** else + 730:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** { + 731:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** /* Check if there is a request to disable the PLL used as System clock source */ + 732:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** if((RCC_OscInitStruct->PLL.PLLState) == RCC_PLL_OFF) + 733:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** { + 734:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** return HAL_ERROR; + 735:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** } + 736:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** else + 737:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** { + 738:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** /* Do not return HAL_ERROR if request repeats the current configuration */ + 739:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** pll_config = RCC->CFGR; + 740:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** pll_config2 = RCC->CFGR2; + 741:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** if((READ_BIT(pll_config, RCC_CFGR_PLLSRC) != RCC_OscInitStruct->PLL.PLLSource) || + 742:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** (READ_BIT(pll_config2, RCC_CFGR2_PREDIV) != RCC_OscInitStruct->PLL.PREDIV) || + ARM GAS /tmp/ccCIS8O6.s page 40 + + + 743:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** (READ_BIT(pll_config, RCC_CFGR_PLLMUL) != RCC_OscInitStruct->PLL.PLLMUL)) + 744:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** { + 745:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** return HAL_ERROR; + 746:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** } + 747:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** } + 748:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** } + 749:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** } + 750:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** + 751:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** return HAL_OK; + 1290 .loc 1 751 10 view .LVU398 + 1291 04d2 0020 movs r0, #0 + 1292 04d4 1AE0 b .L20 + 1293 .L136: + 1294 .loc 1 751 10 view .LVU399 + 1295 04d6 0020 movs r0, #0 + 1296 04d8 18E0 b .L20 + 1297 .LVL84: + 1298 .L78: + 732:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** { + 1299 .loc 1 732 7 is_stmt 1 view .LVU400 + 732:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** { + 1300 .loc 1 732 9 is_stmt 0 view .LVU401 + 1301 04da 012B cmp r3, #1 + 1302 04dc 20D0 beq .L108 + 739:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** pll_config2 = RCC->CFGR2; + 1303 .loc 1 739 9 is_stmt 1 view .LVU402 + 739:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** pll_config2 = RCC->CFGR2; + 1304 .loc 1 739 21 is_stmt 0 view .LVU403 + 1305 04de 144B ldr r3, .L141 + 1306 04e0 5A68 ldr r2, [r3, #4] + 1307 .LVL85: + 740:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** if((READ_BIT(pll_config, RCC_CFGR_PLLSRC) != RCC_OscInitStruct->PLL.PLLSource) || + 1308 .loc 1 740 9 is_stmt 1 view .LVU404 + 740:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** if((READ_BIT(pll_config, RCC_CFGR_PLLSRC) != RCC_OscInitStruct->PLL.PLLSource) || + 1309 .loc 1 740 21 is_stmt 0 view .LVU405 + 1310 04e2 D86A ldr r0, [r3, #44] + 1311 .LVL86: + 741:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** (READ_BIT(pll_config2, RCC_CFGR2_PREDIV) != RCC_OscInitStruct->PLL.PREDIV) || + 1312 .loc 1 741 9 is_stmt 1 view .LVU406 + 741:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** (READ_BIT(pll_config2, RCC_CFGR2_PREDIV) != RCC_OscInitStruct->PLL.PREDIV) || + 1313 .loc 1 741 13 is_stmt 0 view .LVU407 + 1314 04e4 C023 movs r3, #192 + 1315 04e6 5B02 lsls r3, r3, #9 + 1316 04e8 1340 ands r3, r2 + 741:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** (READ_BIT(pll_config2, RCC_CFGR2_PREDIV) != RCC_OscInitStruct->PLL.PREDIV) || + 1317 .loc 1 741 78 view .LVU408 + 1318 04ea A16A ldr r1, [r4, #40] + 741:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** (READ_BIT(pll_config2, RCC_CFGR2_PREDIV) != RCC_OscInitStruct->PLL.PREDIV) || + 1319 .loc 1 741 11 view .LVU409 + 1320 04ec 8B42 cmp r3, r1 + 1321 04ee 19D1 bne .L109 + 742:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** (READ_BIT(pll_config, RCC_CFGR_PLLMUL) != RCC_OscInitStruct->PLL.PLLMUL)) + 1322 .loc 1 742 13 view .LVU410 + 1323 04f0 0F23 movs r3, #15 + 1324 04f2 0340 ands r3, r0 + 742:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** (READ_BIT(pll_config, RCC_CFGR_PLLMUL) != RCC_OscInitStruct->PLL.PLLMUL)) + 1325 .loc 1 742 78 view .LVU411 + ARM GAS /tmp/ccCIS8O6.s page 41 + + + 1326 04f4 216B ldr r1, [r4, #48] + 741:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** (READ_BIT(pll_config2, RCC_CFGR2_PREDIV) != RCC_OscInitStruct->PLL.PREDIV) || + 1327 .loc 1 741 90 discriminator 1 view .LVU412 + 1328 04f6 8B42 cmp r3, r1 + 1329 04f8 16D1 bne .L110 + 743:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** { + 1330 .loc 1 743 13 view .LVU413 + 1331 04fa F023 movs r3, #240 + 1332 04fc 9B03 lsls r3, r3, #14 + 1333 04fe 1A40 ands r2, r3 + 1334 .LVL87: + 743:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** { + 1335 .loc 1 743 78 view .LVU414 + 1336 0500 E36A ldr r3, [r4, #44] + 742:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** (READ_BIT(pll_config, RCC_CFGR_PLLMUL) != RCC_OscInitStruct->PLL.PLLMUL)) + 1337 .loc 1 742 90 view .LVU415 + 1338 0502 9A42 cmp r2, r3 + 1339 0504 12D1 bne .L111 + 1340 .loc 1 751 10 view .LVU416 + 1341 0506 0020 movs r0, #0 + 1342 .LVL88: + 1343 .loc 1 751 10 view .LVU417 + 1344 0508 00E0 b .L20 + 1345 .LVL89: + 1346 .L86: + 307:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** } + 1347 .loc 1 307 12 view .LVU418 + 1348 050a 0120 movs r0, #1 + 1349 .LVL90: + 1350 .L20: + 752:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** } + 1351 .loc 1 752 1 view .LVU419 + 1352 050c 02B0 add sp, sp, #8 + 1353 @ sp needed + 1354 050e 70BD pop {r4, r5, r6, pc} + 1355 .LVL91: + 1356 .L124: + 325:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** } + 1357 .loc 1 325 16 view .LVU420 + 1358 0510 0120 movs r0, #1 + 1359 .LVL92: + 325:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** } + 1360 .loc 1 325 16 view .LVU421 + 1361 0512 FBE7 b .L20 + 1362 .L90: + 379:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** } + 1363 .loc 1 379 16 view .LVU422 + 1364 0514 0120 movs r0, #1 + 1365 0516 F9E7 b .L20 + 1366 .L101: + 618:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** } + 1367 .loc 1 618 16 view .LVU423 + 1368 0518 0120 movs r0, #1 + 1369 051a F7E7 b .L20 + 1370 .L104: + 751:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** } + 1371 .loc 1 751 10 view .LVU424 + ARM GAS /tmp/ccCIS8O6.s page 42 + + + 1372 051c 0020 movs r0, #0 + 1373 051e F5E7 b .L20 + 1374 .L108: + 734:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** } + 1375 .loc 1 734 16 view .LVU425 + 1376 0520 0120 movs r0, #1 + 1377 0522 F3E7 b .L20 + 1378 .LVL93: + 1379 .L109: + 745:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** } + 1380 .loc 1 745 18 view .LVU426 + 1381 0524 0120 movs r0, #1 + 1382 .LVL94: + 745:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** } + 1383 .loc 1 745 18 view .LVU427 + 1384 0526 F1E7 b .L20 + 1385 .LVL95: + 1386 .L110: + 745:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** } + 1387 .loc 1 745 18 view .LVU428 + 1388 0528 0120 movs r0, #1 + 1389 .LVL96: + 745:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** } + 1390 .loc 1 745 18 view .LVU429 + 1391 052a EFE7 b .L20 + 1392 .LVL97: + 1393 .L111: + 745:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** } + 1394 .loc 1 745 18 view .LVU430 + 1395 052c 0120 movs r0, #1 + 1396 .LVL98: + 745:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** } + 1397 .loc 1 745 18 view .LVU431 + 1398 052e EDE7 b .L20 + 1399 .L142: + 1400 .align 2 + 1401 .L141: + 1402 0530 00100240 .word 1073876992 + 1403 0534 FFFFFFEF .word -268435457 + 1404 0538 FFFFFFFE .word -16777217 + 1405 053c FFFFFEFF .word -65537 + 1406 0540 FF7FC2FF .word -4030465 + 1407 .cfi_endproc + 1408 .LFE41: + 1410 .section .text.HAL_RCC_MCOConfig,"ax",%progbits + 1411 .align 1 + 1412 .global HAL_RCC_MCOConfig + 1413 .syntax unified + 1414 .code 16 + 1415 .thumb_func + 1417 HAL_RCC_MCOConfig: + 1418 .LVL99: + 1419 .LFB43: + 753:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** + 754:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** /** + 755:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** * @brief Initializes the CPU, AHB and APB buses clocks according to the specified + 756:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** * parameters in the RCC_ClkInitStruct. + ARM GAS /tmp/ccCIS8O6.s page 43 + + + 757:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** * @param RCC_ClkInitStruct pointer to an RCC_OscInitTypeDef structure that + 758:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** * contains the configuration information for the RCC peripheral. + 759:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** * @param FLatency FLASH Latency + 760:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** * The value of this parameter depend on device used within the same series + 761:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** * @note The SystemCoreClock CMSIS variable is used to store System Clock Frequency + 762:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** * and updated by @ref HAL_RCC_GetHCLKFreq() function called within this function + 763:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** * + 764:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** * @note The HSI is used (enabled by hardware) as system clock source after + 765:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** * start-up from Reset, wake-up from STOP and STANDBY mode, or in case + 766:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** * of failure of the HSE used directly or indirectly as system clock + 767:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** * (if the Clock Security System CSS is enabled). + 768:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** * + 769:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** * @note A switch from one clock source to another occurs only if the target + 770:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** * clock source is ready (clock stable after start-up delay or PLL locked). + 771:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** * If a clock source which is not yet ready is selected, the switch will + 772:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** * occur when the clock source will be ready. + 773:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** * You can use @ref HAL_RCC_GetClockConfig() function to know which clock is + 774:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** * currently used as system clock source. + 775:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** * @retval HAL status + 776:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** */ + 777:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** HAL_StatusTypeDef HAL_RCC_ClockConfig(RCC_ClkInitTypeDef *RCC_ClkInitStruct, uint32_t FLatency) + 778:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** { + 779:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** uint32_t tickstart; + 780:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** + 781:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** /* Check Null pointer */ + 782:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** if(RCC_ClkInitStruct == NULL) + 783:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** { + 784:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** return HAL_ERROR; + 785:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** } + 786:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** + 787:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** /* Check the parameters */ + 788:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** assert_param(IS_RCC_CLOCKTYPE(RCC_ClkInitStruct->ClockType)); + 789:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** assert_param(IS_FLASH_LATENCY(FLatency)); + 790:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** + 791:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** /* To correctly read data from FLASH memory, the number of wait states (LATENCY) + 792:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** must be correctly programmed according to the frequency of the CPU clock + 793:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** (HCLK) of the device. */ + 794:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** + 795:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** /* Increasing the number of wait states because of higher CPU frequency */ + 796:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** if(FLatency > __HAL_FLASH_GET_LATENCY()) + 797:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** { + 798:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** /* Program the new number of wait states to the LATENCY bits in the FLASH_ACR register */ + 799:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** __HAL_FLASH_SET_LATENCY(FLatency); + 800:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** + 801:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** /* Check that the new number of wait states is taken into account to access the Flash + 802:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** memory by reading the FLASH_ACR register */ + 803:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** if(__HAL_FLASH_GET_LATENCY() != FLatency) + 804:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** { + 805:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** return HAL_ERROR; + 806:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** } + 807:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** } + 808:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** + 809:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** /*-------------------------- HCLK Configuration --------------------------*/ + 810:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** if(((RCC_ClkInitStruct->ClockType) & RCC_CLOCKTYPE_HCLK) == RCC_CLOCKTYPE_HCLK) + 811:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** { + 812:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** /* Set the highest APB divider in order to ensure that we do not go through + 813:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** a non-spec phase whatever we decrease or increase HCLK. */ + ARM GAS /tmp/ccCIS8O6.s page 44 + + + 814:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** if(((RCC_ClkInitStruct->ClockType) & RCC_CLOCKTYPE_PCLK1) == RCC_CLOCKTYPE_PCLK1) + 815:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** { + 816:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** MODIFY_REG(RCC->CFGR, RCC_CFGR_PPRE, RCC_HCLK_DIV16); + 817:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** } + 818:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** + 819:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** /* Set the new HCLK clock divider */ + 820:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** assert_param(IS_RCC_HCLK(RCC_ClkInitStruct->AHBCLKDivider)); + 821:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** MODIFY_REG(RCC->CFGR, RCC_CFGR_HPRE, RCC_ClkInitStruct->AHBCLKDivider); + 822:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** } + 823:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** + 824:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** /*------------------------- SYSCLK Configuration ---------------------------*/ + 825:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** if(((RCC_ClkInitStruct->ClockType) & RCC_CLOCKTYPE_SYSCLK) == RCC_CLOCKTYPE_SYSCLK) + 826:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** { + 827:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** assert_param(IS_RCC_SYSCLKSOURCE(RCC_ClkInitStruct->SYSCLKSource)); + 828:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** + 829:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** /* HSE is selected as System Clock Source */ + 830:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** if(RCC_ClkInitStruct->SYSCLKSource == RCC_SYSCLKSOURCE_HSE) + 831:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** { + 832:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** /* Check the HSE ready flag */ + 833:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** if(__HAL_RCC_GET_FLAG(RCC_FLAG_HSERDY) == RESET) + 834:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** { + 835:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** return HAL_ERROR; + 836:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** } + 837:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** } + 838:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** /* PLL is selected as System Clock Source */ + 839:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** else if(RCC_ClkInitStruct->SYSCLKSource == RCC_SYSCLKSOURCE_PLLCLK) + 840:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** { + 841:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** /* Check the PLL ready flag */ + 842:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** if(__HAL_RCC_GET_FLAG(RCC_FLAG_PLLRDY) == RESET) + 843:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** { + 844:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** return HAL_ERROR; + 845:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** } + 846:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** } + 847:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** #if defined(RCC_CFGR_SWS_HSI48) + 848:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** /* HSI48 is selected as System Clock Source */ + 849:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** else if(RCC_ClkInitStruct->SYSCLKSource == RCC_SYSCLKSOURCE_HSI48) + 850:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** { + 851:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** /* Check the HSI48 ready flag */ + 852:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** if(__HAL_RCC_GET_FLAG(RCC_FLAG_HSI48RDY) == RESET) + 853:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** { + 854:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** return HAL_ERROR; + 855:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** } + 856:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** } + 857:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** #endif /* RCC_CFGR_SWS_HSI48 */ + 858:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** /* HSI is selected as System Clock Source */ + 859:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** else + 860:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** { + 861:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** /* Check the HSI ready flag */ + 862:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** if(__HAL_RCC_GET_FLAG(RCC_FLAG_HSIRDY) == RESET) + 863:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** { + 864:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** return HAL_ERROR; + 865:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** } + 866:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** } + 867:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** __HAL_RCC_SYSCLK_CONFIG(RCC_ClkInitStruct->SYSCLKSource); + 868:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** + 869:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** /* Get Start Tick */ + 870:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** tickstart = HAL_GetTick(); + ARM GAS /tmp/ccCIS8O6.s page 45 + + + 871:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** + 872:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** while (__HAL_RCC_GET_SYSCLK_SOURCE() != (RCC_ClkInitStruct->SYSCLKSource << RCC_CFGR_SWS_Pos)) + 873:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** { + 874:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** if((HAL_GetTick() - tickstart ) > CLOCKSWITCH_TIMEOUT_VALUE) + 875:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** { + 876:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** return HAL_TIMEOUT; + 877:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** } + 878:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** } + 879:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** } + 880:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** + 881:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** /* Decreasing the number of wait states because of lower CPU frequency */ + 882:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** if(FLatency < __HAL_FLASH_GET_LATENCY()) + 883:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** { + 884:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** /* Program the new number of wait states to the LATENCY bits in the FLASH_ACR register */ + 885:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** __HAL_FLASH_SET_LATENCY(FLatency); + 886:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** + 887:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** /* Check that the new number of wait states is taken into account to access the Flash + 888:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** memory by reading the FLASH_ACR register */ + 889:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** if(__HAL_FLASH_GET_LATENCY() != FLatency) + 890:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** { + 891:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** return HAL_ERROR; + 892:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** } + 893:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** } + 894:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** + 895:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** /*-------------------------- PCLK1 Configuration ---------------------------*/ + 896:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** if(((RCC_ClkInitStruct->ClockType) & RCC_CLOCKTYPE_PCLK1) == RCC_CLOCKTYPE_PCLK1) + 897:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** { + 898:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** assert_param(IS_RCC_PCLK(RCC_ClkInitStruct->APB1CLKDivider)); + 899:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** MODIFY_REG(RCC->CFGR, RCC_CFGR_PPRE, RCC_ClkInitStruct->APB1CLKDivider); + 900:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** } + 901:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** + 902:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** /* Update the SystemCoreClock global variable */ + 903:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** SystemCoreClock = HAL_RCC_GetSysClockFreq() >> AHBPrescTable[(RCC->CFGR & RCC_CFGR_HPRE)>> RCC_CF + 904:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** + 905:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** /* Configure the source of time base considering new system clocks settings*/ + 906:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** HAL_InitTick (TICK_INT_PRIORITY); + 907:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** + 908:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** return HAL_OK; + 909:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** } + 910:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** + 911:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** /** + 912:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** * @} + 913:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** */ + 914:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** + 915:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** /** @defgroup RCC_Exported_Functions_Group2 Peripheral Control functions + 916:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** * @brief RCC clocks control functions + 917:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** * + 918:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** @verbatim + 919:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** =============================================================================== + 920:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** ##### Peripheral Control functions ##### + 921:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** =============================================================================== + 922:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** [..] + 923:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** This subsection provides a set of functions allowing to control the RCC Clocks + 924:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** frequencies. + 925:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** + 926:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** @endverbatim + 927:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** * @{ + ARM GAS /tmp/ccCIS8O6.s page 46 + + + 928:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** */ + 929:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** + 930:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** #if defined(RCC_CFGR_MCOPRE) + 931:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** /** + 932:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** * @brief Selects the clock source to output on MCO pin. + 933:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** * @note MCO pin should be configured in alternate function mode. + 934:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** * @param RCC_MCOx specifies the output direction for the clock source. + 935:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** * This parameter can be one of the following values: + 936:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** * @arg @ref RCC_MCO1 Clock source to output on MCO1 pin(PA8). + 937:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** * @param RCC_MCOSource specifies the clock source to output. + 938:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** * This parameter can be one of the following values: + 939:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** * @arg @ref RCC_MCO1SOURCE_NOCLOCK No clock selected + 940:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** * @arg @ref RCC_MCO1SOURCE_SYSCLK System Clock selected as MCO clock + 941:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** * @arg @ref RCC_MCO1SOURCE_HSI HSI selected as MCO clock + 942:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** * @arg @ref RCC_MCO1SOURCE_HSE HSE selected as MCO clock + 943:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** * @arg @ref RCC_MCO1SOURCE_LSI LSI selected as MCO clock + 944:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** * @arg @ref RCC_MCO1SOURCE_LSE LSE selected as MCO clock + 945:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** * @arg @ref RCC_MCO1SOURCE_HSI14 HSI14 selected as MCO clock + 946:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** @if STM32F042x6 + 947:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** * @arg @ref RCC_MCO1SOURCE_HSI48 HSI48 selected as MCO clock + 948:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** * @arg @ref RCC_MCO1SOURCE_PLLCLK PLLCLK selected as MCO clock + 949:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** @elseif STM32F048xx + 950:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** * @arg @ref RCC_MCO1SOURCE_HSI48 HSI48 selected as MCO clock + 951:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** * @arg @ref RCC_MCO1SOURCE_PLLCLK PLLCLK selected as MCO clock + 952:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** @elseif STM32F071xB + 953:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** * @arg @ref RCC_MCO1SOURCE_HSI48 HSI48 selected as MCO clock + 954:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** * @arg @ref RCC_MCO1SOURCE_PLLCLK PLLCLK selected as MCO clock + 955:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** @elseif STM32F072xB + 956:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** * @arg @ref RCC_MCO1SOURCE_HSI48 HSI48 selected as MCO clock + 957:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** * @arg @ref RCC_MCO1SOURCE_PLLCLK PLLCLK selected as MCO clock + 958:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** @elseif STM32F078xx + 959:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** * @arg @ref RCC_MCO1SOURCE_HSI48 HSI48 selected as MCO clock + 960:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** * @arg @ref RCC_MCO1SOURCE_PLLCLK PLLCLK selected as MCO clock + 961:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** @elseif STM32F091xC + 962:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** * @arg @ref RCC_MCO1SOURCE_HSI48 HSI48 selected as MCO clock + 963:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** * @arg @ref RCC_MCO1SOURCE_PLLCLK PLLCLK selected as MCO clock + 964:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** @elseif STM32F098xx + 965:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** * @arg @ref RCC_MCO1SOURCE_HSI48 HSI48 selected as MCO clock + 966:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** * @arg @ref RCC_MCO1SOURCE_PLLCLK PLLCLK selected as MCO clock + 967:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** @elif STM32F030x6 + 968:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** * @arg @ref RCC_MCO1SOURCE_PLLCLK PLLCLK selected as MCO clock + 969:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** @elif STM32F030xC + 970:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** * @arg @ref RCC_MCO1SOURCE_PLLCLK PLLCLK selected as MCO clock + 971:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** @elif STM32F031x6 + 972:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** * @arg @ref RCC_MCO1SOURCE_PLLCLK PLLCLK selected as MCO clock + 973:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** @elif STM32F038xx + 974:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** * @arg @ref RCC_MCO1SOURCE_PLLCLK PLLCLK selected as MCO clock + 975:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** @elif STM32F070x6 + 976:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** * @arg @ref RCC_MCO1SOURCE_PLLCLK PLLCLK selected as MCO clock + 977:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** @elif STM32F070xB + 978:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** * @arg @ref RCC_MCO1SOURCE_PLLCLK PLLCLK selected as MCO clock + 979:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** @endif + 980:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** * @arg @ref RCC_MCO1SOURCE_PLLCLK_DIV2 PLLCLK Divided by 2 selected as MCO clock + 981:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** * @param RCC_MCODiv specifies the MCO DIV. + 982:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** * This parameter can be one of the following values: + 983:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** * @arg @ref RCC_MCODIV_1 no division applied to MCO clock + 984:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** * @arg @ref RCC_MCODIV_2 division by 2 applied to MCO clock + ARM GAS /tmp/ccCIS8O6.s page 47 + + + 985:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** * @arg @ref RCC_MCODIV_4 division by 4 applied to MCO clock + 986:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** * @arg @ref RCC_MCODIV_8 division by 8 applied to MCO clock + 987:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** * @arg @ref RCC_MCODIV_16 division by 16 applied to MCO clock + 988:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** * @arg @ref RCC_MCODIV_32 division by 32 applied to MCO clock + 989:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** * @arg @ref RCC_MCODIV_64 division by 64 applied to MCO clock + 990:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** * @arg @ref RCC_MCODIV_128 division by 128 applied to MCO clock + 991:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** * @retval None + 992:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** */ + 993:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** #else + 994:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** /** + 995:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** * @brief Selects the clock source to output on MCO pin. + 996:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** * @note MCO pin should be configured in alternate function mode. + 997:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** * @param RCC_MCOx specifies the output direction for the clock source. + 998:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** * This parameter can be one of the following values: + 999:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** * @arg @ref RCC_MCO1 Clock source to output on MCO1 pin(PA8). +1000:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** * @param RCC_MCOSource specifies the clock source to output. +1001:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** * This parameter can be one of the following values: +1002:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** * @arg @ref RCC_MCO1SOURCE_NOCLOCK No clock selected as MCO clock +1003:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** * @arg @ref RCC_MCO1SOURCE_SYSCLK System clock selected as MCO clock +1004:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** * @arg @ref RCC_MCO1SOURCE_HSI HSI selected as MCO clock +1005:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** * @arg @ref RCC_MCO1SOURCE_HSE HSE selected as MCO clock +1006:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** * @arg @ref RCC_MCO1SOURCE_LSI LSI selected as MCO clock +1007:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** * @arg @ref RCC_MCO1SOURCE_LSE LSE selected as MCO clock +1008:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** * @arg @ref RCC_MCO1SOURCE_HSI14 HSI14 selected as MCO clock +1009:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** * @arg @ref RCC_MCO1SOURCE_PLLCLK_DIV2 PLLCLK Divided by 2 selected as MCO clock +1010:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** * @param RCC_MCODiv specifies the MCO DIV. +1011:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** * This parameter can be one of the following values: +1012:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** * @arg @ref RCC_MCODIV_1 no division applied to MCO clock +1013:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** * @retval None +1014:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** */ +1015:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** #endif +1016:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** void HAL_RCC_MCOConfig(uint32_t RCC_MCOx, uint32_t RCC_MCOSource, uint32_t RCC_MCODiv) +1017:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** { + 1420 .loc 1 1017 1 is_stmt 1 view -0 + 1421 .cfi_startproc + 1422 @ args = 0, pretend = 0, frame = 24 + 1423 @ frame_needed = 0, uses_anonymous_args = 0 + 1424 .loc 1 1017 1 is_stmt 0 view .LVU433 + 1425 0000 70B5 push {r4, r5, r6, lr} + 1426 .cfi_def_cfa_offset 16 + 1427 .cfi_offset 4, -16 + 1428 .cfi_offset 5, -12 + 1429 .cfi_offset 6, -8 + 1430 .cfi_offset 14, -4 + 1431 0002 86B0 sub sp, sp, #24 + 1432 .cfi_def_cfa_offset 40 + 1433 0004 0D00 movs r5, r1 + 1434 0006 1600 movs r6, r2 +1018:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** GPIO_InitTypeDef gpio; + 1435 .loc 1 1018 3 is_stmt 1 view .LVU434 +1019:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** +1020:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** /* Check the parameters */ +1021:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** assert_param(IS_RCC_MCO(RCC_MCOx)); + 1436 .loc 1 1021 3 view .LVU435 +1022:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** assert_param(IS_RCC_MCODIV(RCC_MCODiv)); + 1437 .loc 1 1022 3 view .LVU436 +1023:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** assert_param(IS_RCC_MCO1SOURCE(RCC_MCOSource)); + ARM GAS /tmp/ccCIS8O6.s page 48 + + + 1438 .loc 1 1023 3 view .LVU437 +1024:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** +1025:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** /* Configure the MCO1 pin in alternate function mode */ +1026:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** gpio.Mode = GPIO_MODE_AF_PP; + 1439 .loc 1 1026 3 view .LVU438 + 1440 .loc 1 1026 18 is_stmt 0 view .LVU439 + 1441 0008 0223 movs r3, #2 + 1442 000a 0293 str r3, [sp, #8] +1027:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** gpio.Speed = GPIO_SPEED_FREQ_HIGH; + 1443 .loc 1 1027 3 is_stmt 1 view .LVU440 + 1444 .loc 1 1027 18 is_stmt 0 view .LVU441 + 1445 000c 0133 adds r3, r3, #1 + 1446 000e 0493 str r3, [sp, #16] +1028:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** gpio.Pull = GPIO_NOPULL; + 1447 .loc 1 1028 3 is_stmt 1 view .LVU442 + 1448 .loc 1 1028 18 is_stmt 0 view .LVU443 + 1449 0010 0023 movs r3, #0 + 1450 0012 0393 str r3, [sp, #12] +1029:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** gpio.Pin = MCO1_PIN; + 1451 .loc 1 1029 3 is_stmt 1 view .LVU444 + 1452 .loc 1 1029 18 is_stmt 0 view .LVU445 + 1453 0014 8022 movs r2, #128 + 1454 .LVL100: + 1455 .loc 1 1029 18 view .LVU446 + 1456 0016 5200 lsls r2, r2, #1 + 1457 0018 0192 str r2, [sp, #4] +1030:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** gpio.Alternate = GPIO_AF0_MCO; + 1458 .loc 1 1030 3 is_stmt 1 view .LVU447 + 1459 .loc 1 1030 18 is_stmt 0 view .LVU448 + 1460 001a 0593 str r3, [sp, #20] +1031:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** +1032:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** /* MCO1 Clock Enable */ +1033:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** MCO1_CLK_ENABLE(); + 1461 .loc 1 1033 3 is_stmt 1 view .LVU449 + 1462 .LBB5: + 1463 .loc 1 1033 3 view .LVU450 + 1464 .loc 1 1033 3 view .LVU451 + 1465 001c 0B4C ldr r4, .L144 + 1466 001e 6369 ldr r3, [r4, #20] + 1467 0020 8022 movs r2, #128 + 1468 0022 9202 lsls r2, r2, #10 + 1469 0024 1343 orrs r3, r2 + 1470 0026 6361 str r3, [r4, #20] + 1471 .loc 1 1033 3 view .LVU452 + 1472 0028 6369 ldr r3, [r4, #20] + 1473 002a 1340 ands r3, r2 + 1474 002c 0093 str r3, [sp] + 1475 .loc 1 1033 3 view .LVU453 + 1476 002e 009B ldr r3, [sp] + 1477 .LBE5: + 1478 .loc 1 1033 3 view .LVU454 +1034:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** +1035:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** HAL_GPIO_Init(MCO1_GPIO_PORT, &gpio); + 1479 .loc 1 1035 3 view .LVU455 + 1480 0030 9020 movs r0, #144 + 1481 .LVL101: + 1482 .loc 1 1035 3 is_stmt 0 view .LVU456 + ARM GAS /tmp/ccCIS8O6.s page 49 + + + 1483 0032 01A9 add r1, sp, #4 + 1484 .LVL102: + 1485 .loc 1 1035 3 view .LVU457 + 1486 0034 C005 lsls r0, r0, #23 + 1487 0036 FFF7FEFF bl HAL_GPIO_Init + 1488 .LVL103: +1036:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** +1037:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** /* Configure the MCO clock source */ +1038:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** __HAL_RCC_MCO1_CONFIG(RCC_MCOSource, RCC_MCODiv); + 1489 .loc 1 1038 3 is_stmt 1 view .LVU458 + 1490 003a 6268 ldr r2, [r4, #4] + 1491 003c 044B ldr r3, .L144+4 + 1492 003e 1A40 ands r2, r3 + 1493 0040 3543 orrs r5, r6 + 1494 .LVL104: + 1495 .loc 1 1038 3 is_stmt 0 view .LVU459 + 1496 0042 2A43 orrs r2, r5 + 1497 0044 6260 str r2, [r4, #4] +1039:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** } + 1498 .loc 1 1039 1 view .LVU460 + 1499 0046 06B0 add sp, sp, #24 + 1500 @ sp needed + 1501 .LVL105: + 1502 .loc 1 1039 1 view .LVU461 + 1503 0048 70BD pop {r4, r5, r6, pc} + 1504 .L145: + 1505 004a C046 .align 2 + 1506 .L144: + 1507 004c 00100240 .word 1073876992 + 1508 0050 FFFFFF80 .word -2130706433 + 1509 .cfi_endproc + 1510 .LFE43: + 1512 .section .text.HAL_RCC_EnableCSS,"ax",%progbits + 1513 .align 1 + 1514 .global HAL_RCC_EnableCSS + 1515 .syntax unified + 1516 .code 16 + 1517 .thumb_func + 1519 HAL_RCC_EnableCSS: + 1520 .LFB44: +1040:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** +1041:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** /** +1042:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** * @brief Enables the Clock Security System. +1043:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** * @note If a failure is detected on the HSE oscillator clock, this oscillator +1044:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** * is automatically disabled and an interrupt is generated to inform the +1045:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** * software about the failure (Clock Security System Interrupt, CSSI), +1046:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** * allowing the MCU to perform rescue operations. The CSSI is linked to +1047:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** * the Cortex-M0 NMI (Non-Maskable Interrupt) exception vector. +1048:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** * @retval None +1049:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** */ +1050:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** void HAL_RCC_EnableCSS(void) +1051:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** { + 1521 .loc 1 1051 1 is_stmt 1 view -0 + 1522 .cfi_startproc + 1523 @ args = 0, pretend = 0, frame = 0 + 1524 @ frame_needed = 0, uses_anonymous_args = 0 + 1525 @ link register save eliminated. + ARM GAS /tmp/ccCIS8O6.s page 50 + + +1052:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** SET_BIT(RCC->CR, RCC_CR_CSSON) ; + 1526 .loc 1 1052 3 view .LVU463 + 1527 0000 034A ldr r2, .L147 + 1528 0002 1168 ldr r1, [r2] + 1529 0004 8023 movs r3, #128 + 1530 0006 1B03 lsls r3, r3, #12 + 1531 0008 0B43 orrs r3, r1 + 1532 000a 1360 str r3, [r2] +1053:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** } + 1533 .loc 1 1053 1 is_stmt 0 view .LVU464 + 1534 @ sp needed + 1535 000c 7047 bx lr + 1536 .L148: + 1537 000e C046 .align 2 + 1538 .L147: + 1539 0010 00100240 .word 1073876992 + 1540 .cfi_endproc + 1541 .LFE44: + 1543 .section .text.HAL_RCC_DisableCSS,"ax",%progbits + 1544 .align 1 + 1545 .global HAL_RCC_DisableCSS + 1546 .syntax unified + 1547 .code 16 + 1548 .thumb_func + 1550 HAL_RCC_DisableCSS: + 1551 .LFB45: +1054:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** +1055:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** /** +1056:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** * @brief Disables the Clock Security System. +1057:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** * @retval None +1058:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** */ +1059:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** void HAL_RCC_DisableCSS(void) +1060:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** { + 1552 .loc 1 1060 1 is_stmt 1 view -0 + 1553 .cfi_startproc + 1554 @ args = 0, pretend = 0, frame = 0 + 1555 @ frame_needed = 0, uses_anonymous_args = 0 + 1556 @ link register save eliminated. +1061:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** CLEAR_BIT(RCC->CR, RCC_CR_CSSON) ; + 1557 .loc 1 1061 3 view .LVU466 + 1558 0000 024A ldr r2, .L150 + 1559 0002 1368 ldr r3, [r2] + 1560 0004 0249 ldr r1, .L150+4 + 1561 0006 0B40 ands r3, r1 + 1562 0008 1360 str r3, [r2] +1062:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** } + 1563 .loc 1 1062 1 is_stmt 0 view .LVU467 + 1564 @ sp needed + 1565 000a 7047 bx lr + 1566 .L151: + 1567 .align 2 + 1568 .L150: + 1569 000c 00100240 .word 1073876992 + 1570 0010 FFFFF7FF .word -524289 + 1571 .cfi_endproc + 1572 .LFE45: + 1574 .global __aeabi_uidiv + ARM GAS /tmp/ccCIS8O6.s page 51 + + + 1575 .section .text.HAL_RCC_GetSysClockFreq,"ax",%progbits + 1576 .align 1 + 1577 .global HAL_RCC_GetSysClockFreq + 1578 .syntax unified + 1579 .code 16 + 1580 .thumb_func + 1582 HAL_RCC_GetSysClockFreq: + 1583 .LFB46: +1063:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** +1064:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** /** +1065:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** * @brief Returns the SYSCLK frequency +1066:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** * @note The system frequency computed by this function is not the real +1067:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** * frequency in the chip. It is calculated based on the predefined +1068:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** * constant and the selected clock source: +1069:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** * @note If SYSCLK source is HSI, function returns values based on HSI_VALUE(*) +1070:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** * @note If SYSCLK source is HSE, function returns a value based on HSE_VALUE +1071:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** * divided by PREDIV factor(**) +1072:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** * @note If SYSCLK source is PLL, function returns a value based on HSE_VALUE +1073:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** * divided by PREDIV factor(**) or depending on STM32F0xxxx devices either a value based +1074:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** * on HSI_VALUE divided by 2 or HSI_VALUE divided by PREDIV factor(*) multiplied by the +1075:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** * PLL factor. +1076:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** * @note (*) HSI_VALUE is a constant defined in stm32f0xx_hal_conf.h file (default value +1077:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** * 8 MHz) but the real value may vary depending on the variations +1078:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** * in voltage and temperature. +1079:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** * @note (**) HSE_VALUE is a constant defined in stm32f0xx_hal_conf.h file (default value +1080:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** * 8 MHz), user has to ensure that HSE_VALUE is same as the real +1081:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** * frequency of the crystal used. Otherwise, this function may +1082:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** * have wrong result. +1083:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** * +1084:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** * @note The result of this function could be not correct when using fractional +1085:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** * value for HSE crystal. +1086:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** * +1087:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** * @note This function can be used by the user application to compute the +1088:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** * baud-rate for the communication peripherals or configure other parameters. +1089:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** * +1090:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** * @note Each time SYSCLK changes, this function must be called to update the +1091:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** * right SYSCLK value. Otherwise, any configuration based on this function will be incorre +1092:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** * +1093:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** * @retval SYSCLK frequency +1094:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** */ +1095:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** uint32_t HAL_RCC_GetSysClockFreq(void) +1096:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** { + 1584 .loc 1 1096 1 is_stmt 1 view -0 + 1585 .cfi_startproc + 1586 @ args = 0, pretend = 0, frame = 0 + 1587 @ frame_needed = 0, uses_anonymous_args = 0 + 1588 0000 10B5 push {r4, lr} + 1589 .cfi_def_cfa_offset 8 + 1590 .cfi_offset 4, -8 + 1591 .cfi_offset 14, -4 +1097:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** static const uint8_t aPLLMULFactorTable[16U] = { 2U, 3U, 4U, 5U, 6U, 7U, 8U, 9U, + 1592 .loc 1 1097 3 view .LVU469 +1098:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** 10U, 11U, 12U, 13U, 14U, 15U, 16U, 16U}; +1099:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** static const uint8_t aPredivFactorTable[16U] = { 1U, 2U, 3U, 4U, 5U, 6U, 7U, 8U, + 1593 .loc 1 1099 3 view .LVU470 +1100:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** 9U,10U, 11U, 12U, 13U, 14U, 15U, 16U}; +1101:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** + ARM GAS /tmp/ccCIS8O6.s page 52 + + +1102:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** uint32_t tmpreg = 0U, prediv = 0U, pllclk = 0U, pllmul = 0U; + 1594 .loc 1 1102 3 view .LVU471 + 1595 .LVL106: +1103:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** uint32_t sysclockfreq = 0U; + 1596 .loc 1 1103 3 view .LVU472 +1104:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** +1105:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** tmpreg = RCC->CFGR; + 1597 .loc 1 1105 3 view .LVU473 + 1598 .loc 1 1105 10 is_stmt 0 view .LVU474 + 1599 0002 184B ldr r3, .L160 + 1600 0004 5A68 ldr r2, [r3, #4] + 1601 .LVL107: +1106:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** +1107:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** /* Get SYSCLK source -------------------------------------------------------*/ +1108:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** switch (tmpreg & RCC_CFGR_SWS) + 1602 .loc 1 1108 3 is_stmt 1 view .LVU475 + 1603 .loc 1 1108 18 is_stmt 0 view .LVU476 + 1604 0006 0C23 movs r3, #12 + 1605 0008 1340 ands r3, r2 + 1606 .loc 1 1108 3 view .LVU477 + 1607 000a 082B cmp r3, #8 + 1608 000c 03D0 beq .L153 + 1609 000e 0C2B cmp r3, #12 + 1610 0010 25D1 bne .L157 +1109:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** { +1110:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** case RCC_SYSCLKSOURCE_STATUS_HSE: /* HSE used as system clock */ +1111:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** { +1112:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** sysclockfreq = HSE_VALUE; +1113:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** break; +1114:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** } +1115:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** case RCC_SYSCLKSOURCE_STATUS_PLLCLK: /* PLL used as system clock */ +1116:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** { +1117:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** pllmul = aPLLMULFactorTable[(uint32_t)(tmpreg & RCC_CFGR_PLLMUL) >> RCC_CFGR_PLLMUL_BITNUMBER +1118:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** prediv = aPredivFactorTable[(uint32_t)(RCC->CFGR2 & RCC_CFGR2_PREDIV) >> RCC_CFGR2_PREDIV_BIT +1119:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** if ((tmpreg & RCC_CFGR_PLLSRC) == RCC_PLLSOURCE_HSE) +1120:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** { +1121:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** /* HSE used as PLL clock source : PLLCLK = HSE/PREDIV * PLLMUL */ +1122:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** pllclk = (uint32_t)((uint64_t) HSE_VALUE / (uint64_t) (prediv)) * ((uint64_t) pllmul); +1123:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** } +1124:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** #if defined(RCC_CFGR_PLLSRC_HSI48_PREDIV) +1125:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** else if ((tmpreg & RCC_CFGR_PLLSRC) == RCC_PLLSOURCE_HSI48) +1126:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** { +1127:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** /* HSI48 used as PLL clock source : PLLCLK = HSI48/PREDIV * PLLMUL */ +1128:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** pllclk = (uint32_t)((uint64_t) HSI48_VALUE / (uint64_t) (prediv)) * ((uint64_t) pllmul); +1129:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** } +1130:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** #endif /* RCC_CFGR_PLLSRC_HSI48_PREDIV */ +1131:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** else +1132:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** { +1133:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** #if (defined(STM32F042x6) || defined(STM32F048xx) || defined(STM32F070x6) || defined(STM32F071xB) +1134:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** /* HSI used as PLL clock source : PLLCLK = HSI/PREDIV * PLLMUL */ +1135:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** pllclk = (uint32_t)((uint64_t) HSI_VALUE / (uint64_t) (prediv)) * ((uint64_t) pllmul); +1136:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** #else +1137:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** /* HSI used as PLL clock source : PLLCLK = HSI/2 * PLLMUL */ +1138:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** pllclk = (uint32_t)((uint64_t) (HSI_VALUE >> 1U) * ((uint64_t) pllmul)); +1139:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** #endif +1140:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** } +1141:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** sysclockfreq = pllclk; + ARM GAS /tmp/ccCIS8O6.s page 53 + + +1142:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** break; +1143:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** } +1144:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** #if defined(RCC_CFGR_SWS_HSI48) +1145:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** case RCC_SYSCLKSOURCE_STATUS_HSI48: /* HSI48 used as system clock source */ +1146:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** { +1147:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** sysclockfreq = HSI48_VALUE; + 1611 .loc 1 1147 20 view .LVU478 + 1612 0012 1548 ldr r0, .L160+4 + 1613 .LVL108: + 1614 .L152: +1148:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** break; +1149:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** } +1150:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** #endif /* RCC_CFGR_SWS_HSI48 */ +1151:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** case RCC_SYSCLKSOURCE_STATUS_HSI: /* HSI used as system clock source */ +1152:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** default: /* HSI used as system clock */ +1153:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** { +1154:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** sysclockfreq = HSI_VALUE; +1155:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** break; +1156:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** } +1157:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** } +1158:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** return sysclockfreq; +1159:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** } + 1615 .loc 1 1159 1 view .LVU479 + 1616 @ sp needed + 1617 0014 10BD pop {r4, pc} + 1618 .LVL109: + 1619 .L153: +1117:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** prediv = aPredivFactorTable[(uint32_t)(RCC->CFGR2 & RCC_CFGR2_PREDIV) >> RCC_CFGR2_PREDIV_BIT + 1620 .loc 1 1117 7 is_stmt 1 view .LVU480 +1117:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** prediv = aPredivFactorTable[(uint32_t)(RCC->CFGR2 & RCC_CFGR2_PREDIV) >> RCC_CFGR2_PREDIV_BIT + 1621 .loc 1 1117 72 is_stmt 0 view .LVU481 + 1622 0016 910C lsrs r1, r2, #18 + 1623 0018 0F23 movs r3, #15 + 1624 001a 1940 ands r1, r3 +1117:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** prediv = aPredivFactorTable[(uint32_t)(RCC->CFGR2 & RCC_CFGR2_PREDIV) >> RCC_CFGR2_PREDIV_BIT + 1625 .loc 1 1117 34 view .LVU482 + 1626 001c 1348 ldr r0, .L160+8 + 1627 001e 445C ldrb r4, [r0, r1] + 1628 .LVL110: +1118:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** if ((tmpreg & RCC_CFGR_PLLSRC) == RCC_PLLSOURCE_HSE) + 1629 .loc 1 1118 7 is_stmt 1 view .LVU483 +1118:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** if ((tmpreg & RCC_CFGR_PLLSRC) == RCC_PLLSOURCE_HSE) + 1630 .loc 1 1118 49 is_stmt 0 view .LVU484 + 1631 0020 1049 ldr r1, .L160 + 1632 0022 C96A ldr r1, [r1, #44] +1118:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** if ((tmpreg & RCC_CFGR_PLLSRC) == RCC_PLLSOURCE_HSE) + 1633 .loc 1 1118 77 view .LVU485 + 1634 0024 0B40 ands r3, r1 +1118:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** if ((tmpreg & RCC_CFGR_PLLSRC) == RCC_PLLSOURCE_HSE) + 1635 .loc 1 1118 34 view .LVU486 + 1636 0026 1249 ldr r1, .L160+12 + 1637 0028 C95C ldrb r1, [r1, r3] + 1638 .LVL111: +1119:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** { + 1639 .loc 1 1119 7 is_stmt 1 view .LVU487 +1119:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** { + 1640 .loc 1 1119 19 is_stmt 0 view .LVU488 + ARM GAS /tmp/ccCIS8O6.s page 54 + + + 1641 002a C023 movs r3, #192 + 1642 002c 5B02 lsls r3, r3, #9 + 1643 002e 1A40 ands r2, r3 + 1644 .LVL112: +1119:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** { + 1645 .loc 1 1119 10 view .LVU489 + 1646 0030 8023 movs r3, #128 + 1647 0032 5B02 lsls r3, r3, #9 + 1648 0034 9A42 cmp r2, r3 + 1649 0036 08D0 beq .L158 +1125:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** { + 1650 .loc 1 1125 12 is_stmt 1 view .LVU490 +1125:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** { + 1651 .loc 1 1125 15 is_stmt 0 view .LVU491 + 1652 0038 C023 movs r3, #192 + 1653 003a 5B02 lsls r3, r3, #9 + 1654 003c 9A42 cmp r2, r3 + 1655 003e 09D0 beq .L159 +1135:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** #else + 1656 .loc 1 1135 9 is_stmt 1 view .LVU492 +1135:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** #else + 1657 .loc 1 1135 18 is_stmt 0 view .LVU493 + 1658 0040 0C48 ldr r0, .L160+16 + 1659 0042 FFF7FEFF bl __aeabi_uidiv + 1660 .LVL113: +1135:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** #else + 1661 .loc 1 1135 16 view .LVU494 + 1662 0046 6043 muls r0, r4 + 1663 .LVL114: +1135:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** #else + 1664 .loc 1 1135 16 view .LVU495 + 1665 0048 E4E7 b .L152 + 1666 .LVL115: + 1667 .L158: +1122:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** } + 1668 .loc 1 1122 9 is_stmt 1 view .LVU496 +1122:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** } + 1669 .loc 1 1122 18 is_stmt 0 view .LVU497 + 1670 004a 0A48 ldr r0, .L160+16 + 1671 004c FFF7FEFF bl __aeabi_uidiv + 1672 .LVL116: +1122:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** } + 1673 .loc 1 1122 16 view .LVU498 + 1674 0050 6043 muls r0, r4 + 1675 .LVL117: +1122:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** } + 1676 .loc 1 1122 16 view .LVU499 + 1677 0052 DFE7 b .L152 + 1678 .LVL118: + 1679 .L159: +1128:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** } + 1680 .loc 1 1128 9 is_stmt 1 view .LVU500 +1128:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** } + 1681 .loc 1 1128 18 is_stmt 0 view .LVU501 + 1682 0054 0448 ldr r0, .L160+4 + 1683 0056 FFF7FEFF bl __aeabi_uidiv + 1684 .LVL119: + ARM GAS /tmp/ccCIS8O6.s page 55 + + +1128:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** } + 1685 .loc 1 1128 16 view .LVU502 + 1686 005a 6043 muls r0, r4 + 1687 .LVL120: +1128:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** } + 1688 .loc 1 1128 16 view .LVU503 + 1689 005c DAE7 b .L152 + 1690 .LVL121: + 1691 .L157: +1108:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** { + 1692 .loc 1 1108 3 view .LVU504 + 1693 005e 0548 ldr r0, .L160+16 + 1694 .LVL122: +1158:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** } + 1695 .loc 1 1158 3 is_stmt 1 view .LVU505 +1158:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** } + 1696 .loc 1 1158 10 is_stmt 0 view .LVU506 + 1697 0060 D8E7 b .L152 + 1698 .L161: + 1699 0062 C046 .align 2 + 1700 .L160: + 1701 0064 00100240 .word 1073876992 + 1702 0068 006CDC02 .word 48000000 + 1703 006c 00000000 .word aPLLMULFactorTable.1 + 1704 0070 00000000 .word aPredivFactorTable.0 + 1705 0074 00127A00 .word 8000000 + 1706 .cfi_endproc + 1707 .LFE46: + 1709 .section .text.HAL_RCC_ClockConfig,"ax",%progbits + 1710 .align 1 + 1711 .global HAL_RCC_ClockConfig + 1712 .syntax unified + 1713 .code 16 + 1714 .thumb_func + 1716 HAL_RCC_ClockConfig: + 1717 .LVL123: + 1718 .LFB42: + 778:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** uint32_t tickstart; + 1719 .loc 1 778 1 is_stmt 1 view -0 + 1720 .cfi_startproc + 1721 @ args = 0, pretend = 0, frame = 0 + 1722 @ frame_needed = 0, uses_anonymous_args = 0 + 778:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** uint32_t tickstart; + 1723 .loc 1 778 1 is_stmt 0 view .LVU508 + 1724 0000 70B5 push {r4, r5, r6, lr} + 1725 .cfi_def_cfa_offset 16 + 1726 .cfi_offset 4, -16 + 1727 .cfi_offset 5, -12 + 1728 .cfi_offset 6, -8 + 1729 .cfi_offset 14, -4 + 1730 0002 0400 movs r4, r0 + 1731 0004 0D00 movs r5, r1 + 779:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** + 1732 .loc 1 779 3 is_stmt 1 view .LVU509 + 782:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** { + 1733 .loc 1 782 3 view .LVU510 + 782:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** { + ARM GAS /tmp/ccCIS8O6.s page 56 + + + 1734 .loc 1 782 5 is_stmt 0 view .LVU511 + 1735 0006 0028 cmp r0, #0 + 1736 0008 00D1 bne .LCB1641 + 1737 000a 86E0 b .L176 @long jump + 1738 .LCB1641: + 788:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** assert_param(IS_FLASH_LATENCY(FLatency)); + 1739 .loc 1 788 3 is_stmt 1 view .LVU512 + 789:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** + 1740 .loc 1 789 3 view .LVU513 + 796:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** { + 1741 .loc 1 796 3 view .LVU514 + 796:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** { + 1742 .loc 1 796 17 is_stmt 0 view .LVU515 + 1743 000c 474B ldr r3, .L195 + 1744 000e 1A68 ldr r2, [r3] + 1745 0010 0123 movs r3, #1 + 1746 0012 1340 ands r3, r2 + 796:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** { + 1747 .loc 1 796 5 view .LVU516 + 1748 0014 8B42 cmp r3, r1 + 1749 0016 0AD2 bcs .L164 + 799:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** + 1750 .loc 1 799 5 is_stmt 1 view .LVU517 + 1751 0018 4449 ldr r1, .L195 + 1752 .LVL124: + 799:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** + 1753 .loc 1 799 5 is_stmt 0 view .LVU518 + 1754 001a 0B68 ldr r3, [r1] + 1755 001c 0122 movs r2, #1 + 1756 001e 9343 bics r3, r2 + 1757 0020 2B43 orrs r3, r5 + 1758 0022 0B60 str r3, [r1] + 803:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** { + 1759 .loc 1 803 5 is_stmt 1 view .LVU519 + 803:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** { + 1760 .loc 1 803 8 is_stmt 0 view .LVU520 + 1761 0024 0B68 ldr r3, [r1] + 1762 0026 1A40 ands r2, r3 + 803:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** { + 1763 .loc 1 803 7 view .LVU521 + 1764 0028 AA42 cmp r2, r5 + 1765 002a 00D0 beq .LCB1663 + 1766 002c 77E0 b .L177 @long jump + 1767 .LCB1663: + 1768 .L164: + 810:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** { + 1769 .loc 1 810 3 is_stmt 1 view .LVU522 + 810:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** { + 1770 .loc 1 810 25 is_stmt 0 view .LVU523 + 1771 002e 2368 ldr r3, [r4] + 810:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** { + 1772 .loc 1 810 5 view .LVU524 + 1773 0030 9A07 lsls r2, r3, #30 + 1774 0032 0ED5 bpl .L165 + 814:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** { + 1775 .loc 1 814 5 is_stmt 1 view .LVU525 + 814:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** { + ARM GAS /tmp/ccCIS8O6.s page 57 + + + 1776 .loc 1 814 7 is_stmt 0 view .LVU526 + 1777 0034 5B07 lsls r3, r3, #29 + 1778 0036 05D5 bpl .L166 + 816:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** } + 1779 .loc 1 816 7 is_stmt 1 view .LVU527 + 1780 0038 3D4A ldr r2, .L195+4 + 1781 003a 5168 ldr r1, [r2, #4] + 1782 003c E023 movs r3, #224 + 1783 003e DB00 lsls r3, r3, #3 + 1784 0040 0B43 orrs r3, r1 + 1785 0042 5360 str r3, [r2, #4] + 1786 .L166: + 820:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** MODIFY_REG(RCC->CFGR, RCC_CFGR_HPRE, RCC_ClkInitStruct->AHBCLKDivider); + 1787 .loc 1 820 5 view .LVU528 + 821:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** } + 1788 .loc 1 821 5 view .LVU529 + 1789 0044 3A4A ldr r2, .L195+4 + 1790 0046 5368 ldr r3, [r2, #4] + 1791 0048 F021 movs r1, #240 + 1792 004a 8B43 bics r3, r1 + 1793 004c A168 ldr r1, [r4, #8] + 1794 004e 0B43 orrs r3, r1 + 1795 0050 5360 str r3, [r2, #4] + 1796 .L165: + 825:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** { + 1797 .loc 1 825 3 view .LVU530 + 825:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** { + 1798 .loc 1 825 25 is_stmt 0 view .LVU531 + 1799 0052 2368 ldr r3, [r4] + 825:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** { + 1800 .loc 1 825 5 view .LVU532 + 1801 0054 DB07 lsls r3, r3, #31 + 1802 0056 35D5 bpl .L167 + 827:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** + 1803 .loc 1 827 5 is_stmt 1 view .LVU533 + 830:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** { + 1804 .loc 1 830 5 view .LVU534 + 830:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** { + 1805 .loc 1 830 25 is_stmt 0 view .LVU535 + 1806 0058 6368 ldr r3, [r4, #4] + 830:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** { + 1807 .loc 1 830 7 view .LVU536 + 1808 005a 012B cmp r3, #1 + 1809 005c 09D0 beq .L191 + 839:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** { + 1810 .loc 1 839 10 is_stmt 1 view .LVU537 + 839:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** { + 1811 .loc 1 839 12 is_stmt 0 view .LVU538 + 1812 005e 022B cmp r3, #2 + 1813 0060 24D0 beq .L192 + 849:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** { + 1814 .loc 1 849 10 is_stmt 1 view .LVU539 + 849:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** { + 1815 .loc 1 849 12 is_stmt 0 view .LVU540 + 1816 0062 032B cmp r3, #3 + 1817 0064 28D0 beq .L193 + 862:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** { + ARM GAS /tmp/ccCIS8O6.s page 58 + + + 1818 .loc 1 862 7 is_stmt 1 view .LVU541 + 862:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** { + 1819 .loc 1 862 10 is_stmt 0 view .LVU542 + 1820 0066 324A ldr r2, .L195+4 + 1821 0068 1268 ldr r2, [r2] + 862:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** { + 1822 .loc 1 862 9 view .LVU543 + 1823 006a 9207 lsls r2, r2, #30 + 1824 006c 05D4 bmi .L169 + 864:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** } + 1825 .loc 1 864 16 view .LVU544 + 1826 006e 0120 movs r0, #1 + 1827 .LVL125: + 864:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** } + 1828 .loc 1 864 16 view .LVU545 + 1829 0070 52E0 b .L163 + 1830 .LVL126: + 1831 .L191: + 833:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** { + 1832 .loc 1 833 7 is_stmt 1 view .LVU546 + 833:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** { + 1833 .loc 1 833 10 is_stmt 0 view .LVU547 + 1834 0072 2F4A ldr r2, .L195+4 + 1835 0074 1268 ldr r2, [r2] + 833:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** { + 1836 .loc 1 833 9 view .LVU548 + 1837 0076 9203 lsls r2, r2, #14 + 1838 0078 53D5 bpl .L194 + 1839 .L169: + 867:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** + 1840 .loc 1 867 5 is_stmt 1 view .LVU549 + 1841 007a 2D49 ldr r1, .L195+4 + 1842 007c 4A68 ldr r2, [r1, #4] + 1843 007e 0320 movs r0, #3 + 1844 .LVL127: + 867:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** + 1845 .loc 1 867 5 is_stmt 0 view .LVU550 + 1846 0080 8243 bics r2, r0 + 1847 0082 1343 orrs r3, r2 + 1848 0084 4B60 str r3, [r1, #4] + 870:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** + 1849 .loc 1 870 5 is_stmt 1 view .LVU551 + 870:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** + 1850 .loc 1 870 17 is_stmt 0 view .LVU552 + 1851 0086 FFF7FEFF bl HAL_GetTick + 1852 .LVL128: + 1853 008a 0600 movs r6, r0 + 1854 .LVL129: + 872:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** { + 1855 .loc 1 872 5 is_stmt 1 view .LVU553 + 1856 .L172: + 872:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** { + 1857 .loc 1 872 42 view .LVU554 + 872:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** { + 1858 .loc 1 872 12 is_stmt 0 view .LVU555 + 1859 008c 284B ldr r3, .L195+4 + 1860 008e 5B68 ldr r3, [r3, #4] + ARM GAS /tmp/ccCIS8O6.s page 59 + + + 1861 0090 0C22 movs r2, #12 + 1862 0092 1A40 ands r2, r3 + 872:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** { + 1863 .loc 1 872 63 view .LVU556 + 1864 0094 6368 ldr r3, [r4, #4] + 872:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** { + 1865 .loc 1 872 78 view .LVU557 + 1866 0096 9B00 lsls r3, r3, #2 + 872:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** { + 1867 .loc 1 872 42 view .LVU558 + 1868 0098 9A42 cmp r2, r3 + 1869 009a 13D0 beq .L167 + 874:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** { + 1870 .loc 1 874 7 is_stmt 1 view .LVU559 + 874:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** { + 1871 .loc 1 874 11 is_stmt 0 view .LVU560 + 1872 009c FFF7FEFF bl HAL_GetTick + 1873 .LVL130: + 874:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** { + 1874 .loc 1 874 25 discriminator 1 view .LVU561 + 1875 00a0 801B subs r0, r0, r6 + 874:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** { + 1876 .loc 1 874 9 discriminator 1 view .LVU562 + 1877 00a2 244B ldr r3, .L195+8 + 1878 00a4 9842 cmp r0, r3 + 1879 00a6 F1D9 bls .L172 + 876:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** } + 1880 .loc 1 876 16 view .LVU563 + 1881 00a8 0320 movs r0, #3 + 1882 00aa 35E0 b .L163 + 1883 .LVL131: + 1884 .L192: + 842:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** { + 1885 .loc 1 842 7 is_stmt 1 view .LVU564 + 842:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** { + 1886 .loc 1 842 10 is_stmt 0 view .LVU565 + 1887 00ac 204A ldr r2, .L195+4 + 1888 00ae 1268 ldr r2, [r2] + 842:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** { + 1889 .loc 1 842 9 view .LVU566 + 1890 00b0 9201 lsls r2, r2, #6 + 1891 00b2 E2D4 bmi .L169 + 844:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** } + 1892 .loc 1 844 16 view .LVU567 + 1893 00b4 0120 movs r0, #1 + 1894 .LVL132: + 844:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** } + 1895 .loc 1 844 16 view .LVU568 + 1896 00b6 2FE0 b .L163 + 1897 .LVL133: + 1898 .L193: + 852:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** { + 1899 .loc 1 852 7 is_stmt 1 view .LVU569 + 852:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** { + 1900 .loc 1 852 10 is_stmt 0 view .LVU570 + 1901 00b8 1D4A ldr r2, .L195+4 + 1902 00ba 526B ldr r2, [r2, #52] + ARM GAS /tmp/ccCIS8O6.s page 60 + + + 852:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** { + 1903 .loc 1 852 9 view .LVU571 + 1904 00bc 9203 lsls r2, r2, #14 + 1905 00be DCD4 bmi .L169 + 854:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** } + 1906 .loc 1 854 16 view .LVU572 + 1907 00c0 0120 movs r0, #1 + 1908 .LVL134: + 854:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** } + 1909 .loc 1 854 16 view .LVU573 + 1910 00c2 29E0 b .L163 + 1911 .L167: + 882:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** { + 1912 .loc 1 882 3 is_stmt 1 view .LVU574 + 882:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** { + 1913 .loc 1 882 17 is_stmt 0 view .LVU575 + 1914 00c4 194B ldr r3, .L195 + 1915 00c6 1A68 ldr r2, [r3] + 1916 00c8 0123 movs r3, #1 + 1917 00ca 1340 ands r3, r2 + 882:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** { + 1918 .loc 1 882 5 view .LVU576 + 1919 00cc AB42 cmp r3, r5 + 1920 00ce 09D9 bls .L174 + 885:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** + 1921 .loc 1 885 5 is_stmt 1 view .LVU577 + 1922 00d0 1649 ldr r1, .L195 + 1923 00d2 0B68 ldr r3, [r1] + 1924 00d4 0122 movs r2, #1 + 1925 00d6 9343 bics r3, r2 + 1926 00d8 2B43 orrs r3, r5 + 1927 00da 0B60 str r3, [r1] + 889:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** { + 1928 .loc 1 889 5 view .LVU578 + 889:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** { + 1929 .loc 1 889 8 is_stmt 0 view .LVU579 + 1930 00dc 0B68 ldr r3, [r1] + 1931 00de 1A40 ands r2, r3 + 889:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** { + 1932 .loc 1 889 7 view .LVU580 + 1933 00e0 AA42 cmp r2, r5 + 1934 00e2 20D1 bne .L183 + 1935 .L174: + 896:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** { + 1936 .loc 1 896 3 is_stmt 1 view .LVU581 + 896:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** { + 1937 .loc 1 896 25 is_stmt 0 view .LVU582 + 1938 00e4 2368 ldr r3, [r4] + 896:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** { + 1939 .loc 1 896 5 view .LVU583 + 1940 00e6 5B07 lsls r3, r3, #29 + 1941 00e8 06D5 bpl .L175 + 898:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** MODIFY_REG(RCC->CFGR, RCC_CFGR_PPRE, RCC_ClkInitStruct->APB1CLKDivider); + 1942 .loc 1 898 5 is_stmt 1 view .LVU584 + 899:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** } + 1943 .loc 1 899 5 view .LVU585 + 1944 00ea 114A ldr r2, .L195+4 + ARM GAS /tmp/ccCIS8O6.s page 61 + + + 1945 00ec 5368 ldr r3, [r2, #4] + 1946 00ee 1249 ldr r1, .L195+12 + 1947 00f0 0B40 ands r3, r1 + 1948 00f2 E168 ldr r1, [r4, #12] + 1949 00f4 0B43 orrs r3, r1 + 1950 00f6 5360 str r3, [r2, #4] + 1951 .L175: + 903:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** + 1952 .loc 1 903 3 view .LVU586 + 903:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** + 1953 .loc 1 903 21 is_stmt 0 view .LVU587 + 1954 00f8 FFF7FEFF bl HAL_RCC_GetSysClockFreq + 1955 .LVL135: + 903:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** + 1956 .loc 1 903 68 discriminator 1 view .LVU588 + 1957 00fc 0C4B ldr r3, .L195+4 + 1958 00fe 5A68 ldr r2, [r3, #4] + 903:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** + 1959 .loc 1 903 91 discriminator 1 view .LVU589 + 1960 0100 1209 lsrs r2, r2, #4 + 1961 0102 0F23 movs r3, #15 + 1962 0104 1340 ands r3, r2 + 903:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** + 1963 .loc 1 903 63 discriminator 1 view .LVU590 + 1964 0106 0D4A ldr r2, .L195+16 + 1965 0108 D35C ldrb r3, [r2, r3] + 903:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** + 1966 .loc 1 903 47 discriminator 1 view .LVU591 + 1967 010a D840 lsrs r0, r0, r3 + 903:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** + 1968 .loc 1 903 19 discriminator 1 view .LVU592 + 1969 010c 0C4B ldr r3, .L195+20 + 1970 010e 1860 str r0, [r3] + 906:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** + 1971 .loc 1 906 3 is_stmt 1 view .LVU593 + 1972 0110 0320 movs r0, #3 + 1973 0112 FFF7FEFF bl HAL_InitTick + 1974 .LVL136: + 908:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** } + 1975 .loc 1 908 3 view .LVU594 + 908:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** } + 1976 .loc 1 908 10 is_stmt 0 view .LVU595 + 1977 0116 0020 movs r0, #0 + 1978 .L163: + 909:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** + 1979 .loc 1 909 1 view .LVU596 + 1980 @ sp needed + 1981 .LVL137: + 1982 .LVL138: + 909:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** + 1983 .loc 1 909 1 view .LVU597 + 1984 0118 70BD pop {r4, r5, r6, pc} + 1985 .LVL139: + 1986 .L176: + 784:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** } + 1987 .loc 1 784 12 view .LVU598 + 1988 011a 0120 movs r0, #1 + ARM GAS /tmp/ccCIS8O6.s page 62 + + + 1989 .LVL140: + 784:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** } + 1990 .loc 1 784 12 view .LVU599 + 1991 011c FCE7 b .L163 + 1992 .LVL141: + 1993 .L177: + 805:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** } + 1994 .loc 1 805 14 view .LVU600 + 1995 011e 0120 movs r0, #1 + 1996 .LVL142: + 805:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** } + 1997 .loc 1 805 14 view .LVU601 + 1998 0120 FAE7 b .L163 + 1999 .LVL143: + 2000 .L194: + 835:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** } + 2001 .loc 1 835 16 view .LVU602 + 2002 0122 0120 movs r0, #1 + 2003 .LVL144: + 835:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** } + 2004 .loc 1 835 16 view .LVU603 + 2005 0124 F8E7 b .L163 + 2006 .L183: + 891:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** } + 2007 .loc 1 891 14 view .LVU604 + 2008 0126 0120 movs r0, #1 + 2009 0128 F6E7 b .L163 + 2010 .L196: + 2011 012a C046 .align 2 + 2012 .L195: + 2013 012c 00200240 .word 1073881088 + 2014 0130 00100240 .word 1073876992 + 2015 0134 88130000 .word 5000 + 2016 0138 FFF8FFFF .word -1793 + 2017 013c 00000000 .word AHBPrescTable + 2018 0140 00000000 .word SystemCoreClock + 2019 .cfi_endproc + 2020 .LFE42: + 2022 .section .text.HAL_RCC_GetHCLKFreq,"ax",%progbits + 2023 .align 1 + 2024 .global HAL_RCC_GetHCLKFreq + 2025 .syntax unified + 2026 .code 16 + 2027 .thumb_func + 2029 HAL_RCC_GetHCLKFreq: + 2030 .LFB47: +1160:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** +1161:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** /** +1162:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** * @brief Returns the HCLK frequency +1163:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** * @note Each time HCLK changes, this function must be called to update the +1164:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** * right HCLK value. Otherwise, any configuration based on this function will be incorrect +1165:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** * +1166:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** * @note The SystemCoreClock CMSIS variable is used to store System Clock Frequency +1167:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** * and updated within this function +1168:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** * @retval HCLK frequency +1169:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** */ +1170:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** uint32_t HAL_RCC_GetHCLKFreq(void) + ARM GAS /tmp/ccCIS8O6.s page 63 + + +1171:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** { + 2031 .loc 1 1171 1 is_stmt 1 view -0 + 2032 .cfi_startproc + 2033 @ args = 0, pretend = 0, frame = 0 + 2034 @ frame_needed = 0, uses_anonymous_args = 0 + 2035 @ link register save eliminated. +1172:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** return SystemCoreClock; + 2036 .loc 1 1172 3 view .LVU606 + 2037 .loc 1 1172 10 is_stmt 0 view .LVU607 + 2038 0000 014B ldr r3, .L198 + 2039 .loc 1 1172 10 discriminator 1 view .LVU608 + 2040 0002 1868 ldr r0, [r3] +1173:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** } + 2041 .loc 1 1173 1 view .LVU609 + 2042 @ sp needed + 2043 0004 7047 bx lr + 2044 .L199: + 2045 0006 C046 .align 2 + 2046 .L198: + 2047 0008 00000000 .word SystemCoreClock + 2048 .cfi_endproc + 2049 .LFE47: + 2051 .section .text.HAL_RCC_GetPCLK1Freq,"ax",%progbits + 2052 .align 1 + 2053 .global HAL_RCC_GetPCLK1Freq + 2054 .syntax unified + 2055 .code 16 + 2056 .thumb_func + 2058 HAL_RCC_GetPCLK1Freq: + 2059 .LFB48: +1174:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** +1175:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** /** +1176:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** * @brief Returns the PCLK1 frequency +1177:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** * @note Each time PCLK1 changes, this function must be called to update the +1178:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** * right PCLK1 value. Otherwise, any configuration based on this function will be incorrec +1179:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** * @retval PCLK1 frequency +1180:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** */ +1181:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** uint32_t HAL_RCC_GetPCLK1Freq(void) +1182:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** { + 2060 .loc 1 1182 1 is_stmt 1 view -0 + 2061 .cfi_startproc + 2062 @ args = 0, pretend = 0, frame = 0 + 2063 @ frame_needed = 0, uses_anonymous_args = 0 + 2064 0000 10B5 push {r4, lr} + 2065 .cfi_def_cfa_offset 8 + 2066 .cfi_offset 4, -8 + 2067 .cfi_offset 14, -4 +1183:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** /* Get HCLK source and Compute PCLK1 frequency ---------------------------*/ +1184:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** return (HAL_RCC_GetHCLKFreq() >> APBPrescTable[(RCC->CFGR & RCC_CFGR_PPRE) >> RCC_CFGR_PPRE_BITNU + 2068 .loc 1 1184 3 view .LVU611 + 2069 .loc 1 1184 11 is_stmt 0 view .LVU612 + 2070 0002 FFF7FEFF bl HAL_RCC_GetHCLKFreq + 2071 .LVL145: + 2072 .loc 1 1184 54 discriminator 1 view .LVU613 + 2073 0006 044B ldr r3, .L201 + 2074 0008 5A68 ldr r2, [r3, #4] + 2075 .loc 1 1184 78 discriminator 1 view .LVU614 + ARM GAS /tmp/ccCIS8O6.s page 64 + + + 2076 000a 120A lsrs r2, r2, #8 + 2077 000c 0723 movs r3, #7 + 2078 000e 1340 ands r3, r2 + 2079 .loc 1 1184 49 discriminator 1 view .LVU615 + 2080 0010 024A ldr r2, .L201+4 + 2081 0012 D35C ldrb r3, [r2, r3] + 2082 .loc 1 1184 33 discriminator 1 view .LVU616 + 2083 0014 D840 lsrs r0, r0, r3 +1185:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** } + 2084 .loc 1 1185 1 view .LVU617 + 2085 @ sp needed + 2086 0016 10BD pop {r4, pc} + 2087 .L202: + 2088 .align 2 + 2089 .L201: + 2090 0018 00100240 .word 1073876992 + 2091 001c 00000000 .word APBPrescTable + 2092 .cfi_endproc + 2093 .LFE48: + 2095 .section .text.HAL_RCC_GetOscConfig,"ax",%progbits + 2096 .align 1 + 2097 .global HAL_RCC_GetOscConfig + 2098 .syntax unified + 2099 .code 16 + 2100 .thumb_func + 2102 HAL_RCC_GetOscConfig: + 2103 .LVL146: + 2104 .LFB49: +1186:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** +1187:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** /** +1188:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** * @brief Configures the RCC_OscInitStruct according to the internal +1189:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** * RCC configuration registers. +1190:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** * @param RCC_OscInitStruct pointer to an RCC_OscInitTypeDef structure that +1191:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** * will be configured. +1192:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** * @retval None +1193:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** */ +1194:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** void HAL_RCC_GetOscConfig(RCC_OscInitTypeDef *RCC_OscInitStruct) +1195:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** { + 2105 .loc 1 1195 1 is_stmt 1 view -0 + 2106 .cfi_startproc + 2107 @ args = 0, pretend = 0, frame = 0 + 2108 @ frame_needed = 0, uses_anonymous_args = 0 + 2109 @ link register save eliminated. +1196:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** /* Check the parameters */ +1197:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** assert_param(RCC_OscInitStruct != NULL); + 2110 .loc 1 1197 3 view .LVU619 +1198:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** +1199:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** /* Set all possible values for the Oscillator type parameter ---------------*/ +1200:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** RCC_OscInitStruct->OscillatorType = RCC_OSCILLATORTYPE_HSE | RCC_OSCILLATORTYPE_HSI \ + 2111 .loc 1 1200 3 view .LVU620 + 2112 .loc 1 1200 37 is_stmt 0 view .LVU621 + 2113 0000 1F23 movs r3, #31 + 2114 0002 0360 str r3, [r0] +1201:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** | RCC_OSCILLATORTYPE_LSE | RCC_OSCILLATORTYPE_LSI | RCC_OSCILLATORTYPE_HSI14; +1202:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** #if defined(RCC_HSI48_SUPPORT) +1203:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** RCC_OscInitStruct->OscillatorType |= RCC_OSCILLATORTYPE_HSI48; + 2115 .loc 1 1203 3 is_stmt 1 view .LVU622 + ARM GAS /tmp/ccCIS8O6.s page 65 + + + 2116 .loc 1 1203 37 is_stmt 0 view .LVU623 + 2117 0004 2033 adds r3, r3, #32 + 2118 0006 0360 str r3, [r0] +1204:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** #endif /* RCC_HSI48_SUPPORT */ +1205:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** +1206:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** +1207:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** /* Get the HSE configuration -----------------------------------------------*/ +1208:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** if((RCC->CR &RCC_CR_HSEBYP) == RCC_CR_HSEBYP) + 2119 .loc 1 1208 3 is_stmt 1 view .LVU624 + 2120 .loc 1 1208 10 is_stmt 0 view .LVU625 + 2121 0008 324B ldr r3, .L218 + 2122 000a 1B68 ldr r3, [r3] + 2123 .loc 1 1208 5 view .LVU626 + 2124 000c 5B03 lsls r3, r3, #13 + 2125 000e 40D5 bpl .L204 +1209:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** { +1210:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** RCC_OscInitStruct->HSEState = RCC_HSE_BYPASS; + 2126 .loc 1 1210 5 is_stmt 1 view .LVU627 + 2127 .loc 1 1210 33 is_stmt 0 view .LVU628 + 2128 0010 0523 movs r3, #5 + 2129 0012 4360 str r3, [r0, #4] + 2130 .L205: +1211:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** } +1212:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** else if((RCC->CR &RCC_CR_HSEON) == RCC_CR_HSEON) +1213:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** { +1214:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** RCC_OscInitStruct->HSEState = RCC_HSE_ON; +1215:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** } +1216:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** else +1217:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** { +1218:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** RCC_OscInitStruct->HSEState = RCC_HSE_OFF; +1219:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** } +1220:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** +1221:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** /* Get the HSI configuration -----------------------------------------------*/ +1222:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** if((RCC->CR &RCC_CR_HSION) == RCC_CR_HSION) + 2131 .loc 1 1222 3 is_stmt 1 view .LVU629 + 2132 .loc 1 1222 10 is_stmt 0 view .LVU630 + 2133 0014 2F4B ldr r3, .L218 + 2134 0016 1B68 ldr r3, [r3] + 2135 .loc 1 1222 5 view .LVU631 + 2136 0018 DB07 lsls r3, r3, #31 + 2137 001a 44D5 bpl .L207 +1223:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** { +1224:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** RCC_OscInitStruct->HSIState = RCC_HSI_ON; + 2138 .loc 1 1224 5 is_stmt 1 view .LVU632 + 2139 .loc 1 1224 33 is_stmt 0 view .LVU633 + 2140 001c 0123 movs r3, #1 + 2141 001e C360 str r3, [r0, #12] + 2142 .L208: +1225:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** } +1226:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** else +1227:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** { +1228:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** RCC_OscInitStruct->HSIState = RCC_HSI_OFF; +1229:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** } +1230:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** +1231:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** RCC_OscInitStruct->HSICalibrationValue = (uint32_t)((RCC->CR &RCC_CR_HSITRIM) >> RCC_CR_HSITRIM_B + 2143 .loc 1 1231 3 is_stmt 1 view .LVU634 + 2144 .loc 1 1231 59 is_stmt 0 view .LVU635 + ARM GAS /tmp/ccCIS8O6.s page 66 + + + 2145 0020 2C49 ldr r1, .L218 + 2146 0022 0A68 ldr r2, [r1] + 2147 .loc 1 1231 44 view .LVU636 + 2148 0024 D208 lsrs r2, r2, #3 + 2149 0026 1F23 movs r3, #31 + 2150 0028 1340 ands r3, r2 + 2151 .loc 1 1231 42 view .LVU637 + 2152 002a 0361 str r3, [r0, #16] +1232:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** +1233:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** /* Get the LSE configuration -----------------------------------------------*/ +1234:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** if((RCC->BDCR &RCC_BDCR_LSEBYP) == RCC_BDCR_LSEBYP) + 2153 .loc 1 1234 3 is_stmt 1 view .LVU638 + 2154 .loc 1 1234 10 is_stmt 0 view .LVU639 + 2155 002c 0B6A ldr r3, [r1, #32] + 2156 .loc 1 1234 5 view .LVU640 + 2157 002e 5B07 lsls r3, r3, #29 + 2158 0030 3CD5 bpl .L209 +1235:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** { +1236:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** RCC_OscInitStruct->LSEState = RCC_LSE_BYPASS; + 2159 .loc 1 1236 5 is_stmt 1 view .LVU641 + 2160 .loc 1 1236 33 is_stmt 0 view .LVU642 + 2161 0032 0523 movs r3, #5 + 2162 0034 8360 str r3, [r0, #8] + 2163 .L210: +1237:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** } +1238:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** else if((RCC->BDCR &RCC_BDCR_LSEON) == RCC_BDCR_LSEON) +1239:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** { +1240:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** RCC_OscInitStruct->LSEState = RCC_LSE_ON; +1241:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** } +1242:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** else +1243:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** { +1244:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** RCC_OscInitStruct->LSEState = RCC_LSE_OFF; +1245:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** } +1246:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** +1247:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** /* Get the LSI configuration -----------------------------------------------*/ +1248:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** if((RCC->CSR &RCC_CSR_LSION) == RCC_CSR_LSION) + 2164 .loc 1 1248 3 is_stmt 1 view .LVU643 + 2165 .loc 1 1248 10 is_stmt 0 view .LVU644 + 2166 0036 274B ldr r3, .L218 + 2167 0038 5B6A ldr r3, [r3, #36] + 2168 .loc 1 1248 5 view .LVU645 + 2169 003a DB07 lsls r3, r3, #31 + 2170 003c 40D5 bpl .L212 +1249:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** { +1250:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** RCC_OscInitStruct->LSIState = RCC_LSI_ON; + 2171 .loc 1 1250 5 is_stmt 1 view .LVU646 + 2172 .loc 1 1250 33 is_stmt 0 view .LVU647 + 2173 003e 0123 movs r3, #1 + 2174 0040 C361 str r3, [r0, #28] + 2175 .L213: +1251:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** } +1252:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** else +1253:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** { +1254:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** RCC_OscInitStruct->LSIState = RCC_LSI_OFF; +1255:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** } +1256:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** +1257:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** /* Get the HSI14 configuration -----------------------------------------------*/ + ARM GAS /tmp/ccCIS8O6.s page 67 + + +1258:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** if((RCC->CR2 & RCC_CR2_HSI14ON) == RCC_CR2_HSI14ON) + 2176 .loc 1 1258 3 is_stmt 1 view .LVU648 + 2177 .loc 1 1258 10 is_stmt 0 view .LVU649 + 2178 0042 244B ldr r3, .L218 + 2179 0044 5B6B ldr r3, [r3, #52] + 2180 .loc 1 1258 5 view .LVU650 + 2181 0046 DB07 lsls r3, r3, #31 + 2182 0048 3DD5 bpl .L214 +1259:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** { +1260:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** RCC_OscInitStruct->HSI14State = RCC_HSI_ON; + 2183 .loc 1 1260 5 is_stmt 1 view .LVU651 + 2184 .loc 1 1260 35 is_stmt 0 view .LVU652 + 2185 004a 0123 movs r3, #1 + 2186 004c 4361 str r3, [r0, #20] + 2187 .L215: +1261:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** } +1262:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** else +1263:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** { +1264:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** RCC_OscInitStruct->HSI14State = RCC_HSI_OFF; +1265:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** } +1266:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** +1267:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** RCC_OscInitStruct->HSI14CalibrationValue = (uint32_t)((RCC->CR2 & RCC_CR2_HSI14TRIM) >> RCC_HSI14 + 2188 .loc 1 1267 3 is_stmt 1 view .LVU653 + 2189 .loc 1 1267 61 is_stmt 0 view .LVU654 + 2190 004e 214A ldr r2, .L218 + 2191 0050 516B ldr r1, [r2, #52] + 2192 .loc 1 1267 46 view .LVU655 + 2193 0052 C908 lsrs r1, r1, #3 + 2194 0054 1F23 movs r3, #31 + 2195 0056 0B40 ands r3, r1 + 2196 .loc 1 1267 44 view .LVU656 + 2197 0058 8361 str r3, [r0, #24] +1268:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** +1269:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** #if defined(RCC_HSI48_SUPPORT) +1270:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** /* Get the HSI48 configuration if any-----------------------------------------*/ +1271:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** RCC_OscInitStruct->HSI48State = __HAL_RCC_GET_HSI48_STATE(); + 2198 .loc 1 1271 3 is_stmt 1 view .LVU657 + 2199 .loc 1 1271 35 is_stmt 0 view .LVU658 + 2200 005a 536B ldr r3, [r2, #52] + 2201 005c 8021 movs r1, #128 + 2202 005e 4902 lsls r1, r1, #9 + 2203 0060 0B40 ands r3, r1 + 2204 0062 591E subs r1, r3, #1 + 2205 0064 8B41 sbcs r3, r3, r1 + 2206 .loc 1 1271 33 view .LVU659 + 2207 0066 0362 str r3, [r0, #32] +1272:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** #endif /* RCC_HSI48_SUPPORT */ +1273:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** +1274:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** /* Get the PLL configuration -----------------------------------------------*/ +1275:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** if((RCC->CR &RCC_CR_PLLON) == RCC_CR_PLLON) + 2208 .loc 1 1275 3 is_stmt 1 view .LVU660 + 2209 .loc 1 1275 10 is_stmt 0 view .LVU661 + 2210 0068 1368 ldr r3, [r2] + 2211 .loc 1 1275 5 view .LVU662 + 2212 006a DB01 lsls r3, r3, #7 + 2213 006c 2ED5 bpl .L216 +1276:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** { + ARM GAS /tmp/ccCIS8O6.s page 68 + + +1277:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** RCC_OscInitStruct->PLL.PLLState = RCC_PLL_ON; + 2214 .loc 1 1277 5 is_stmt 1 view .LVU663 + 2215 .loc 1 1277 37 is_stmt 0 view .LVU664 + 2216 006e 0223 movs r3, #2 + 2217 0070 4362 str r3, [r0, #36] + 2218 .L217: +1278:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** } +1279:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** else +1280:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** { +1281:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** RCC_OscInitStruct->PLL.PLLState = RCC_PLL_OFF; +1282:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** } +1283:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** RCC_OscInitStruct->PLL.PLLSource = (uint32_t)(RCC->CFGR & RCC_CFGR_PLLSRC); + 2219 .loc 1 1283 3 is_stmt 1 view .LVU665 + 2220 .loc 1 1283 52 is_stmt 0 view .LVU666 + 2221 0072 184B ldr r3, .L218 + 2222 0074 5A68 ldr r2, [r3, #4] + 2223 .loc 1 1283 38 view .LVU667 + 2224 0076 C021 movs r1, #192 + 2225 0078 4902 lsls r1, r1, #9 + 2226 007a 0A40 ands r2, r1 + 2227 .loc 1 1283 36 view .LVU668 + 2228 007c 8262 str r2, [r0, #40] +1284:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** RCC_OscInitStruct->PLL.PLLMUL = (uint32_t)(RCC->CFGR & RCC_CFGR_PLLMUL); + 2229 .loc 1 1284 3 is_stmt 1 view .LVU669 + 2230 .loc 1 1284 49 is_stmt 0 view .LVU670 + 2231 007e 5A68 ldr r2, [r3, #4] + 2232 .loc 1 1284 35 view .LVU671 + 2233 0080 F021 movs r1, #240 + 2234 0082 8903 lsls r1, r1, #14 + 2235 0084 0A40 ands r2, r1 + 2236 .loc 1 1284 33 view .LVU672 + 2237 0086 C262 str r2, [r0, #44] +1285:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** RCC_OscInitStruct->PLL.PREDIV = (uint32_t)(RCC->CFGR2 & RCC_CFGR2_PREDIV); + 2238 .loc 1 1285 3 is_stmt 1 view .LVU673 + 2239 .loc 1 1285 49 is_stmt 0 view .LVU674 + 2240 0088 DA6A ldr r2, [r3, #44] + 2241 .loc 1 1285 35 view .LVU675 + 2242 008a 0F23 movs r3, #15 + 2243 008c 1340 ands r3, r2 + 2244 .loc 1 1285 33 view .LVU676 + 2245 008e 0363 str r3, [r0, #48] +1286:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** } + 2246 .loc 1 1286 1 view .LVU677 + 2247 @ sp needed + 2248 0090 7047 bx lr + 2249 .L204: +1212:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** { + 2250 .loc 1 1212 8 is_stmt 1 view .LVU678 +1212:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** { + 2251 .loc 1 1212 15 is_stmt 0 view .LVU679 + 2252 0092 104B ldr r3, .L218 + 2253 0094 1B68 ldr r3, [r3] +1212:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** { + 2254 .loc 1 1212 10 view .LVU680 + 2255 0096 DB03 lsls r3, r3, #15 + 2256 0098 02D5 bpl .L206 +1214:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** } + ARM GAS /tmp/ccCIS8O6.s page 69 + + + 2257 .loc 1 1214 5 is_stmt 1 view .LVU681 +1214:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** } + 2258 .loc 1 1214 33 is_stmt 0 view .LVU682 + 2259 009a 0123 movs r3, #1 + 2260 009c 4360 str r3, [r0, #4] + 2261 009e B9E7 b .L205 + 2262 .L206: +1218:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** } + 2263 .loc 1 1218 5 is_stmt 1 view .LVU683 +1218:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** } + 2264 .loc 1 1218 33 is_stmt 0 view .LVU684 + 2265 00a0 0023 movs r3, #0 + 2266 00a2 4360 str r3, [r0, #4] + 2267 00a4 B6E7 b .L205 + 2268 .L207: +1228:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** } + 2269 .loc 1 1228 5 is_stmt 1 view .LVU685 +1228:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** } + 2270 .loc 1 1228 33 is_stmt 0 view .LVU686 + 2271 00a6 0023 movs r3, #0 + 2272 00a8 C360 str r3, [r0, #12] + 2273 00aa B9E7 b .L208 + 2274 .L209: +1238:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** { + 2275 .loc 1 1238 8 is_stmt 1 view .LVU687 +1238:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** { + 2276 .loc 1 1238 15 is_stmt 0 view .LVU688 + 2277 00ac 094B ldr r3, .L218 + 2278 00ae 1B6A ldr r3, [r3, #32] +1238:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** { + 2279 .loc 1 1238 10 view .LVU689 + 2280 00b0 DB07 lsls r3, r3, #31 + 2281 00b2 02D5 bpl .L211 +1240:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** } + 2282 .loc 1 1240 5 is_stmt 1 view .LVU690 +1240:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** } + 2283 .loc 1 1240 33 is_stmt 0 view .LVU691 + 2284 00b4 0123 movs r3, #1 + 2285 00b6 8360 str r3, [r0, #8] + 2286 00b8 BDE7 b .L210 + 2287 .L211: +1244:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** } + 2288 .loc 1 1244 5 is_stmt 1 view .LVU692 +1244:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** } + 2289 .loc 1 1244 33 is_stmt 0 view .LVU693 + 2290 00ba 0023 movs r3, #0 + 2291 00bc 8360 str r3, [r0, #8] + 2292 00be BAE7 b .L210 + 2293 .L212: +1254:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** } + 2294 .loc 1 1254 5 is_stmt 1 view .LVU694 +1254:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** } + 2295 .loc 1 1254 33 is_stmt 0 view .LVU695 + 2296 00c0 0023 movs r3, #0 + 2297 00c2 C361 str r3, [r0, #28] + 2298 00c4 BDE7 b .L213 + 2299 .L214: + ARM GAS /tmp/ccCIS8O6.s page 70 + + +1264:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** } + 2300 .loc 1 1264 5 is_stmt 1 view .LVU696 +1264:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** } + 2301 .loc 1 1264 35 is_stmt 0 view .LVU697 + 2302 00c6 0023 movs r3, #0 + 2303 00c8 4361 str r3, [r0, #20] + 2304 00ca C0E7 b .L215 + 2305 .L216: +1281:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** } + 2306 .loc 1 1281 5 is_stmt 1 view .LVU698 +1281:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** } + 2307 .loc 1 1281 37 is_stmt 0 view .LVU699 + 2308 00cc 0123 movs r3, #1 + 2309 00ce 4362 str r3, [r0, #36] + 2310 00d0 CFE7 b .L217 + 2311 .L219: + 2312 00d2 C046 .align 2 + 2313 .L218: + 2314 00d4 00100240 .word 1073876992 + 2315 .cfi_endproc + 2316 .LFE49: + 2318 .section .text.HAL_RCC_GetClockConfig,"ax",%progbits + 2319 .align 1 + 2320 .global HAL_RCC_GetClockConfig + 2321 .syntax unified + 2322 .code 16 + 2323 .thumb_func + 2325 HAL_RCC_GetClockConfig: + 2326 .LVL147: + 2327 .LFB50: +1287:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** +1288:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** /** +1289:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** * @brief Get the RCC_ClkInitStruct according to the internal +1290:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** * RCC configuration registers. +1291:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** * @param RCC_ClkInitStruct pointer to an RCC_ClkInitTypeDef structure that +1292:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** * contains the current clock configuration. +1293:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** * @param pFLatency Pointer on the Flash Latency. +1294:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** * @retval None +1295:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** */ +1296:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** void HAL_RCC_GetClockConfig(RCC_ClkInitTypeDef *RCC_ClkInitStruct, uint32_t *pFLatency) +1297:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** { + 2328 .loc 1 1297 1 is_stmt 1 view -0 + 2329 .cfi_startproc + 2330 @ args = 0, pretend = 0, frame = 0 + 2331 @ frame_needed = 0, uses_anonymous_args = 0 + 2332 .loc 1 1297 1 is_stmt 0 view .LVU701 + 2333 0000 10B5 push {r4, lr} + 2334 .cfi_def_cfa_offset 8 + 2335 .cfi_offset 4, -8 + 2336 .cfi_offset 14, -4 +1298:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** /* Check the parameters */ +1299:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** assert_param(RCC_ClkInitStruct != NULL); + 2337 .loc 1 1299 3 is_stmt 1 view .LVU702 +1300:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** assert_param(pFLatency != NULL); + 2338 .loc 1 1300 3 view .LVU703 +1301:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** +1302:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** /* Set all possible values for the Clock type parameter --------------------*/ + ARM GAS /tmp/ccCIS8O6.s page 71 + + +1303:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** RCC_ClkInitStruct->ClockType = RCC_CLOCKTYPE_SYSCLK | RCC_CLOCKTYPE_HCLK | RCC_CLOCKTYPE_PCLK1; + 2339 .loc 1 1303 3 view .LVU704 + 2340 .loc 1 1303 32 is_stmt 0 view .LVU705 + 2341 0002 0723 movs r3, #7 + 2342 0004 0360 str r3, [r0] +1304:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** +1305:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** /* Get the SYSCLK configuration --------------------------------------------*/ +1306:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** RCC_ClkInitStruct->SYSCLKSource = (uint32_t)(RCC->CFGR & RCC_CFGR_SW); + 2343 .loc 1 1306 3 is_stmt 1 view .LVU706 + 2344 .loc 1 1306 51 is_stmt 0 view .LVU707 + 2345 0006 0A4B ldr r3, .L221 + 2346 0008 5C68 ldr r4, [r3, #4] + 2347 .loc 1 1306 37 view .LVU708 + 2348 000a 0322 movs r2, #3 + 2349 000c 2240 ands r2, r4 + 2350 .loc 1 1306 35 view .LVU709 + 2351 000e 4260 str r2, [r0, #4] +1307:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** +1308:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** /* Get the HCLK configuration ----------------------------------------------*/ +1309:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** RCC_ClkInitStruct->AHBCLKDivider = (uint32_t)(RCC->CFGR & RCC_CFGR_HPRE); + 2352 .loc 1 1309 3 is_stmt 1 view .LVU710 + 2353 .loc 1 1309 52 is_stmt 0 view .LVU711 + 2354 0010 5C68 ldr r4, [r3, #4] + 2355 .loc 1 1309 38 view .LVU712 + 2356 0012 F022 movs r2, #240 + 2357 0014 2240 ands r2, r4 + 2358 .loc 1 1309 36 view .LVU713 + 2359 0016 8260 str r2, [r0, #8] +1310:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** +1311:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** /* Get the APB1 configuration ----------------------------------------------*/ +1312:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** RCC_ClkInitStruct->APB1CLKDivider = (uint32_t)(RCC->CFGR & RCC_CFGR_PPRE); + 2360 .loc 1 1312 3 is_stmt 1 view .LVU714 + 2361 .loc 1 1312 53 is_stmt 0 view .LVU715 + 2362 0018 5B68 ldr r3, [r3, #4] + 2363 .loc 1 1312 39 view .LVU716 + 2364 001a E022 movs r2, #224 + 2365 001c D200 lsls r2, r2, #3 + 2366 001e 1340 ands r3, r2 + 2367 .loc 1 1312 37 view .LVU717 + 2368 0020 C360 str r3, [r0, #12] +1313:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** /* Get the Flash Wait State (Latency) configuration ------------------------*/ +1314:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** *pFLatency = __HAL_FLASH_GET_LATENCY(); + 2369 .loc 1 1314 3 is_stmt 1 view .LVU718 + 2370 .loc 1 1314 16 is_stmt 0 view .LVU719 + 2371 0022 044B ldr r3, .L221+4 + 2372 0024 1A68 ldr r2, [r3] + 2373 0026 0123 movs r3, #1 + 2374 0028 1340 ands r3, r2 + 2375 .loc 1 1314 14 view .LVU720 + 2376 002a 0B60 str r3, [r1] +1315:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** } + 2377 .loc 1 1315 1 view .LVU721 + 2378 @ sp needed + 2379 002c 10BD pop {r4, pc} + 2380 .L222: + 2381 002e C046 .align 2 + 2382 .L221: + ARM GAS /tmp/ccCIS8O6.s page 72 + + + 2383 0030 00100240 .word 1073876992 + 2384 0034 00200240 .word 1073881088 + 2385 .cfi_endproc + 2386 .LFE50: + 2388 .section .text.HAL_RCC_CSSCallback,"ax",%progbits + 2389 .align 1 + 2390 .weak HAL_RCC_CSSCallback + 2391 .syntax unified + 2392 .code 16 + 2393 .thumb_func + 2395 HAL_RCC_CSSCallback: + 2396 .LFB52: +1316:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** +1317:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** /** +1318:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** * @brief This function handles the RCC CSS interrupt request. +1319:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** * @note This API should be called under the NMI_Handler(). +1320:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** * @retval None +1321:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** */ +1322:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** void HAL_RCC_NMI_IRQHandler(void) +1323:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** { +1324:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** /* Check RCC CSSF flag */ +1325:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** if(__HAL_RCC_GET_IT(RCC_IT_CSS)) +1326:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** { +1327:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** /* RCC Clock Security System interrupt user callback */ +1328:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** HAL_RCC_CSSCallback(); +1329:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** +1330:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** /* Clear RCC CSS pending bit */ +1331:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** __HAL_RCC_CLEAR_IT(RCC_IT_CSS); +1332:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** } +1333:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** } +1334:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** +1335:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** /** +1336:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** * @brief RCC Clock Security System interrupt callback +1337:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** * @retval none +1338:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** */ +1339:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** __weak void HAL_RCC_CSSCallback(void) +1340:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** { + 2397 .loc 1 1340 1 is_stmt 1 view -0 + 2398 .cfi_startproc + 2399 @ args = 0, pretend = 0, frame = 0 + 2400 @ frame_needed = 0, uses_anonymous_args = 0 + 2401 @ link register save eliminated. +1341:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** /* NOTE : This function Should not be modified, when the callback is needed, +1342:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** the HAL_RCC_CSSCallback could be implemented in the user file +1343:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** */ +1344:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** } + 2402 .loc 1 1344 1 view .LVU723 + 2403 @ sp needed + 2404 0000 7047 bx lr + 2405 .cfi_endproc + 2406 .LFE52: + 2408 .section .text.HAL_RCC_NMI_IRQHandler,"ax",%progbits + 2409 .align 1 + 2410 .global HAL_RCC_NMI_IRQHandler + 2411 .syntax unified + 2412 .code 16 + 2413 .thumb_func + ARM GAS /tmp/ccCIS8O6.s page 73 + + + 2415 HAL_RCC_NMI_IRQHandler: + 2416 .LFB51: +1323:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** /* Check RCC CSSF flag */ + 2417 .loc 1 1323 1 view -0 + 2418 .cfi_startproc + 2419 @ args = 0, pretend = 0, frame = 0 + 2420 @ frame_needed = 0, uses_anonymous_args = 0 + 2421 0000 10B5 push {r4, lr} + 2422 .cfi_def_cfa_offset 8 + 2423 .cfi_offset 4, -8 + 2424 .cfi_offset 14, -4 +1325:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** { + 2425 .loc 1 1325 3 view .LVU725 +1325:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** { + 2426 .loc 1 1325 6 is_stmt 0 view .LVU726 + 2427 0002 054B ldr r3, .L228 + 2428 0004 9B68 ldr r3, [r3, #8] +1325:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** { + 2429 .loc 1 1325 5 view .LVU727 + 2430 0006 1B06 lsls r3, r3, #24 + 2431 0008 00D4 bmi .L227 + 2432 .L224: +1333:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** + 2433 .loc 1 1333 1 view .LVU728 + 2434 @ sp needed + 2435 000a 10BD pop {r4, pc} + 2436 .L227: +1328:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** + 2437 .loc 1 1328 5 is_stmt 1 view .LVU729 + 2438 000c FFF7FEFF bl HAL_RCC_CSSCallback + 2439 .LVL148: +1331:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** } + 2440 .loc 1 1331 5 view .LVU730 + 2441 0010 024B ldr r3, .L228+4 + 2442 0012 8022 movs r2, #128 + 2443 0014 1A70 strb r2, [r3] +1333:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** + 2444 .loc 1 1333 1 is_stmt 0 view .LVU731 + 2445 0016 F8E7 b .L224 + 2446 .L229: + 2447 .align 2 + 2448 .L228: + 2449 0018 00100240 .word 1073876992 + 2450 001c 0A100240 .word 1073877002 + 2451 .cfi_endproc + 2452 .LFE51: + 2454 .section .rodata.aPredivFactorTable.0,"a" + 2455 .align 2 + 2458 aPredivFactorTable.0: + 2459 0000 01020304 .ascii "\001\002\003\004\005\006\007\010\011\012\013\014\015" + 2459 05060708 + 2459 090A0B0C + 2459 0D + 2460 000d 0E0F10 .ascii "\016\017\020" + 2461 .section .rodata.aPLLMULFactorTable.1,"a" + 2462 .align 2 + 2465 aPLLMULFactorTable.1: + ARM GAS /tmp/ccCIS8O6.s page 74 + + + 2466 0000 02030405 .ascii "\002\003\004\005\006\007\010\011\012\013\014\015\016" + 2466 06070809 + 2466 0A0B0C0D + 2466 0E + 2467 000d 0F1010 .ascii "\017\020\020" + 2468 .text + 2469 .Letext0: + 2470 .file 2 "/home/chiangni/.config/VSCodium/User/globalStorage/bmd.stm32-for-vscode/@xpack-dev-tools/ + 2471 .file 3 "/home/chiangni/.config/VSCodium/User/globalStorage/bmd.stm32-for-vscode/@xpack-dev-tools/ + 2472 .file 4 "Drivers/CMSIS/Device/ST/STM32F0xx/Include/system_stm32f0xx.h" + 2473 .file 5 "Drivers/CMSIS/Device/ST/STM32F0xx/Include/stm32f042x6.h" + 2474 .file 6 "Drivers/CMSIS/Device/ST/STM32F0xx/Include/stm32f0xx.h" + 2475 .file 7 "Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_def.h" + 2476 .file 8 "Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_rcc.h" + 2477 .file 9 "Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_gpio.h" + 2478 .file 10 "Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal.h" + ARM GAS /tmp/ccCIS8O6.s page 75 + + +DEFINED SYMBOLS + *ABS*:00000000 stm32f0xx_hal_rcc.c + /tmp/ccCIS8O6.s:19 .text.HAL_RCC_DeInit:00000000 $t + /tmp/ccCIS8O6.s:25 .text.HAL_RCC_DeInit:00000000 HAL_RCC_DeInit + /tmp/ccCIS8O6.s:192 .text.HAL_RCC_DeInit:000000ac $d + /tmp/ccCIS8O6.s:204 .text.HAL_RCC_OscConfig:00000000 $t + /tmp/ccCIS8O6.s:210 .text.HAL_RCC_OscConfig:00000000 HAL_RCC_OscConfig + /tmp/ccCIS8O6.s:866 .text.HAL_RCC_OscConfig:000002e0 $d + /tmp/ccCIS8O6.s:874 .text.HAL_RCC_OscConfig:000002f4 $t + /tmp/ccCIS8O6.s:1402 .text.HAL_RCC_OscConfig:00000530 $d + /tmp/ccCIS8O6.s:1411 .text.HAL_RCC_MCOConfig:00000000 $t + /tmp/ccCIS8O6.s:1417 .text.HAL_RCC_MCOConfig:00000000 HAL_RCC_MCOConfig + /tmp/ccCIS8O6.s:1507 .text.HAL_RCC_MCOConfig:0000004c $d + /tmp/ccCIS8O6.s:1513 .text.HAL_RCC_EnableCSS:00000000 $t + /tmp/ccCIS8O6.s:1519 .text.HAL_RCC_EnableCSS:00000000 HAL_RCC_EnableCSS + /tmp/ccCIS8O6.s:1539 .text.HAL_RCC_EnableCSS:00000010 $d + /tmp/ccCIS8O6.s:1544 .text.HAL_RCC_DisableCSS:00000000 $t + /tmp/ccCIS8O6.s:1550 .text.HAL_RCC_DisableCSS:00000000 HAL_RCC_DisableCSS + /tmp/ccCIS8O6.s:1569 .text.HAL_RCC_DisableCSS:0000000c $d + /tmp/ccCIS8O6.s:1576 .text.HAL_RCC_GetSysClockFreq:00000000 $t + /tmp/ccCIS8O6.s:1582 .text.HAL_RCC_GetSysClockFreq:00000000 HAL_RCC_GetSysClockFreq + /tmp/ccCIS8O6.s:1701 .text.HAL_RCC_GetSysClockFreq:00000064 $d + /tmp/ccCIS8O6.s:2465 .rodata.aPLLMULFactorTable.1:00000000 aPLLMULFactorTable.1 + /tmp/ccCIS8O6.s:2458 .rodata.aPredivFactorTable.0:00000000 aPredivFactorTable.0 + /tmp/ccCIS8O6.s:1710 .text.HAL_RCC_ClockConfig:00000000 $t + /tmp/ccCIS8O6.s:1716 .text.HAL_RCC_ClockConfig:00000000 HAL_RCC_ClockConfig + /tmp/ccCIS8O6.s:2013 .text.HAL_RCC_ClockConfig:0000012c $d + /tmp/ccCIS8O6.s:2023 .text.HAL_RCC_GetHCLKFreq:00000000 $t + /tmp/ccCIS8O6.s:2029 .text.HAL_RCC_GetHCLKFreq:00000000 HAL_RCC_GetHCLKFreq + /tmp/ccCIS8O6.s:2047 .text.HAL_RCC_GetHCLKFreq:00000008 $d + /tmp/ccCIS8O6.s:2052 .text.HAL_RCC_GetPCLK1Freq:00000000 $t + /tmp/ccCIS8O6.s:2058 .text.HAL_RCC_GetPCLK1Freq:00000000 HAL_RCC_GetPCLK1Freq + /tmp/ccCIS8O6.s:2090 .text.HAL_RCC_GetPCLK1Freq:00000018 $d + /tmp/ccCIS8O6.s:2096 .text.HAL_RCC_GetOscConfig:00000000 $t + /tmp/ccCIS8O6.s:2102 .text.HAL_RCC_GetOscConfig:00000000 HAL_RCC_GetOscConfig + /tmp/ccCIS8O6.s:2314 .text.HAL_RCC_GetOscConfig:000000d4 $d + /tmp/ccCIS8O6.s:2319 .text.HAL_RCC_GetClockConfig:00000000 $t + /tmp/ccCIS8O6.s:2325 .text.HAL_RCC_GetClockConfig:00000000 HAL_RCC_GetClockConfig + /tmp/ccCIS8O6.s:2383 .text.HAL_RCC_GetClockConfig:00000030 $d + /tmp/ccCIS8O6.s:2389 .text.HAL_RCC_CSSCallback:00000000 $t + /tmp/ccCIS8O6.s:2395 .text.HAL_RCC_CSSCallback:00000000 HAL_RCC_CSSCallback + /tmp/ccCIS8O6.s:2409 .text.HAL_RCC_NMI_IRQHandler:00000000 $t + /tmp/ccCIS8O6.s:2415 .text.HAL_RCC_NMI_IRQHandler:00000000 HAL_RCC_NMI_IRQHandler + /tmp/ccCIS8O6.s:2449 .text.HAL_RCC_NMI_IRQHandler:00000018 $d + /tmp/ccCIS8O6.s:2455 .rodata.aPredivFactorTable.0:00000000 $d + /tmp/ccCIS8O6.s:2462 .rodata.aPLLMULFactorTable.1:00000000 $d + +UNDEFINED SYMBOLS +HAL_GetTick +HAL_InitTick +SystemCoreClock +uwTickPrio +HAL_GPIO_Init +__aeabi_uidiv +AHBPrescTable +APBPrescTable diff --git a/Software/build/stm32f0xx_hal_rcc.o b/Software/build/stm32f0xx_hal_rcc.o new file mode 100644 index 0000000..e7db095 Binary files /dev/null and b/Software/build/stm32f0xx_hal_rcc.o differ diff --git a/Software/build/stm32f0xx_hal_rcc_ex.d b/Software/build/stm32f0xx_hal_rcc_ex.d new file mode 100644 index 0000000..b86fcd7 --- /dev/null +++ b/Software/build/stm32f0xx_hal_rcc_ex.d @@ -0,0 +1,60 @@ +build/stm32f0xx_hal_rcc_ex.o: \ + Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c \ + Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal.h \ + Core/Inc/stm32f0xx_hal_conf.h \ + Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_rcc.h \ + Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_def.h \ + Drivers/CMSIS/Device/ST/STM32F0xx/Include/stm32f0xx.h \ + Drivers/CMSIS/Device/ST/STM32F0xx/Include/stm32f042x6.h \ + Drivers/CMSIS/Include/core_cm0.h Drivers/CMSIS/Include/cmsis_version.h \ + Drivers/CMSIS/Include/cmsis_compiler.h Drivers/CMSIS/Include/cmsis_gcc.h \ + Drivers/CMSIS/Device/ST/STM32F0xx/Include/system_stm32f0xx.h \ + Drivers/STM32F0xx_HAL_Driver/Inc/Legacy/stm32_hal_legacy.h \ + Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_rcc_ex.h \ + Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_gpio.h \ + Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_gpio_ex.h \ + Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_exti.h \ + Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_dma.h \ + Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_dma_ex.h \ + Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_cortex.h \ + Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_adc.h \ + Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_adc_ex.h \ + Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_can.h \ + Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_flash.h \ + Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_flash_ex.h \ + Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_i2c.h \ + Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_i2c_ex.h \ + Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_pwr.h \ + Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_pwr_ex.h \ + Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_tim.h \ + Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_tim_ex.h +Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal.h: +Core/Inc/stm32f0xx_hal_conf.h: +Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_rcc.h: +Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_def.h: +Drivers/CMSIS/Device/ST/STM32F0xx/Include/stm32f0xx.h: +Drivers/CMSIS/Device/ST/STM32F0xx/Include/stm32f042x6.h: +Drivers/CMSIS/Include/core_cm0.h: +Drivers/CMSIS/Include/cmsis_version.h: +Drivers/CMSIS/Include/cmsis_compiler.h: +Drivers/CMSIS/Include/cmsis_gcc.h: +Drivers/CMSIS/Device/ST/STM32F0xx/Include/system_stm32f0xx.h: +Drivers/STM32F0xx_HAL_Driver/Inc/Legacy/stm32_hal_legacy.h: +Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_rcc_ex.h: +Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_gpio.h: +Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_gpio_ex.h: +Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_exti.h: +Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_dma.h: +Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_dma_ex.h: +Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_cortex.h: +Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_adc.h: +Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_adc_ex.h: +Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_can.h: +Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_flash.h: +Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_flash_ex.h: +Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_i2c.h: +Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_i2c_ex.h: +Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_pwr.h: +Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_pwr_ex.h: +Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_tim.h: +Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_tim_ex.h: diff --git a/Software/build/stm32f0xx_hal_rcc_ex.lst b/Software/build/stm32f0xx_hal_rcc_ex.lst new file mode 100644 index 0000000..71d8935 --- /dev/null +++ b/Software/build/stm32f0xx_hal_rcc_ex.lst @@ -0,0 +1,2750 @@ +ARM GAS /tmp/ccHuuDpT.s page 1 + + + 1 .cpu cortex-m0 + 2 .arch armv6s-m + 3 .fpu softvfp + 4 .eabi_attribute 20, 1 + 5 .eabi_attribute 21, 1 + 6 .eabi_attribute 23, 3 + 7 .eabi_attribute 24, 1 + 8 .eabi_attribute 25, 1 + 9 .eabi_attribute 26, 1 + 10 .eabi_attribute 30, 1 + 11 .eabi_attribute 34, 0 + 12 .eabi_attribute 18, 4 + 13 .file "stm32f0xx_hal_rcc_ex.c" + 14 .text + 15 .Ltext0: + 16 .cfi_sections .debug_frame + 17 .file 1 "Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c" + 18 .section .text.HAL_RCCEx_PeriphCLKConfig,"ax",%progbits + 19 .align 1 + 20 .global HAL_RCCEx_PeriphCLKConfig + 21 .syntax unified + 22 .code 16 + 23 .thumb_func + 25 HAL_RCCEx_PeriphCLKConfig: + 26 .LVL0: + 27 .LFB40: + 1:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** /** + 2:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** ****************************************************************************** + 3:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** * @file stm32f0xx_hal_rcc_ex.c + 4:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** * @author MCD Application Team + 5:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** * @brief Extended RCC HAL module driver. + 6:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** * This file provides firmware functions to manage the following + 7:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** * functionalities RCC extension peripheral: + 8:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** * + Extended Peripheral Control functions + 9:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** * + Extended Clock Recovery System Control functions + 10:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** * + 11:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** ****************************************************************************** + 12:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** * @attention + 13:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** * + 14:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** * Copyright (c) 2016 STMicroelectronics. + 15:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** * All rights reserved. + 16:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** * + 17:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** * This software is licensed under terms that can be found in the LICENSE file in + 18:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** * the root directory of this software component. + 19:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** * If no LICENSE file comes with this software, it is provided AS-IS. + 20:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** ****************************************************************************** + 21:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** */ + 22:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** + 23:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** /* Includes ------------------------------------------------------------------*/ + 24:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** #include "stm32f0xx_hal.h" + 25:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** + 26:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** /** @addtogroup STM32F0xx_HAL_Driver + 27:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** * @{ + 28:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** */ + 29:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** + 30:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** #ifdef HAL_RCC_MODULE_ENABLED + 31:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** + ARM GAS /tmp/ccHuuDpT.s page 2 + + + 32:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** /** @defgroup RCCEx RCCEx + 33:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** * @brief RCC Extension HAL module driver. + 34:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** * @{ + 35:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** */ + 36:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** + 37:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** /* Private typedef -----------------------------------------------------------*/ + 38:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** /* Private define ------------------------------------------------------------*/ + 39:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** #if defined(CRS) + 40:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** /** @defgroup RCCEx_Private_Constants RCCEx Private Constants + 41:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** * @{ + 42:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** */ + 43:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** /* Bit position in register */ + 44:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** #define CRS_CFGR_FELIM_BITNUMBER 16 + 45:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** #define CRS_CR_TRIM_BITNUMBER 8 + 46:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** #define CRS_ISR_FECAP_BITNUMBER 16 + 47:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** /** + 48:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** * @} + 49:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** */ + 50:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** #endif /* CRS */ + 51:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** + 52:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** /* Private macro -------------------------------------------------------------*/ + 53:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** /** @defgroup RCCEx_Private_Macros RCCEx Private Macros + 54:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** * @{ + 55:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** */ + 56:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** /** + 57:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** * @} + 58:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** */ + 59:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** + 60:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** /* Private variables ---------------------------------------------------------*/ + 61:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** /* Private function prototypes -----------------------------------------------*/ + 62:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** /* Private functions ---------------------------------------------------------*/ + 63:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** + 64:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** /** @defgroup RCCEx_Exported_Functions RCCEx Exported Functions + 65:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** * @{ + 66:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** */ + 67:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** + 68:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** /** @defgroup RCCEx_Exported_Functions_Group1 Extended Peripheral Control functions + 69:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** * @brief Extended Peripheral Control functions + 70:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** * + 71:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** @verbatim + 72:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** =============================================================================== + 73:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** ##### Extended Peripheral Control functions ##### + 74:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** =============================================================================== + 75:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** [..] + 76:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** This subsection provides a set of functions allowing to control the RCC Clocks + 77:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** frequencies. + 78:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** [..] + 79:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** (@) Important note: Care must be taken when HAL_RCCEx_PeriphCLKConfig() is used to + 80:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** select the RTC clock source; in this case the Backup domain will be reset in + 81:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** order to modify the RTC Clock source, as consequence RTC registers (including + 82:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** the backup registers) are set to their reset values. + 83:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** + 84:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** @endverbatim + 85:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** * @{ + 86:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** */ + 87:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** + 88:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** /** + ARM GAS /tmp/ccHuuDpT.s page 3 + + + 89:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** * @brief Initializes the RCC extended peripherals clocks according to the specified + 90:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** * parameters in the RCC_PeriphCLKInitTypeDef. + 91:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** * @param PeriphClkInit pointer to an RCC_PeriphCLKInitTypeDef structure that + 92:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** * contains the configuration information for the Extended Peripherals clocks + 93:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** * (USART, RTC, I2C, CEC and USB). + 94:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** * + 95:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** * @note Care must be taken when @ref HAL_RCCEx_PeriphCLKConfig() is used to select + 96:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** * the RTC clock source; in this case the Backup domain will be reset in + 97:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** * order to modify the RTC Clock source, as consequence RTC registers (including + 98:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** * the backup registers) and RCC_BDCR register are set to their reset values. + 99:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** * + 100:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** * @retval HAL status + 101:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** */ + 102:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** HAL_StatusTypeDef HAL_RCCEx_PeriphCLKConfig(RCC_PeriphCLKInitTypeDef *PeriphClkInit) + 103:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** { + 28 .loc 1 103 1 view -0 + 29 .cfi_startproc + 30 @ args = 0, pretend = 0, frame = 8 + 31 @ frame_needed = 0, uses_anonymous_args = 0 + 32 .loc 1 103 1 is_stmt 0 view .LVU1 + 33 0000 70B5 push {r4, r5, r6, lr} + 34 .cfi_def_cfa_offset 16 + 35 .cfi_offset 4, -16 + 36 .cfi_offset 5, -12 + 37 .cfi_offset 6, -8 + 38 .cfi_offset 14, -4 + 39 0002 82B0 sub sp, sp, #8 + 40 .cfi_def_cfa_offset 24 + 41 0004 0400 movs r4, r0 + 104:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** uint32_t tickstart = 0U; + 42 .loc 1 104 3 is_stmt 1 view .LVU2 + 43 .LVL1: + 105:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** uint32_t temp_reg = 0U; + 44 .loc 1 105 3 view .LVU3 + 106:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** + 107:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** /* Check the parameters */ + 108:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** assert_param(IS_RCC_PERIPHCLOCK(PeriphClkInit->PeriphClockSelection)); + 45 .loc 1 108 3 view .LVU4 + 109:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** + 110:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** /*---------------------------- RTC configuration -------------------------------*/ + 111:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** if(((PeriphClkInit->PeriphClockSelection) & RCC_PERIPHCLK_RTC) == (RCC_PERIPHCLK_RTC)) + 46 .loc 1 111 3 view .LVU5 + 47 .loc 1 111 21 is_stmt 0 view .LVU6 + 48 0006 0368 ldr r3, [r0] + 49 .loc 1 111 5 view .LVU7 + 50 0008 DB03 lsls r3, r3, #15 + 51 000a 39D5 bpl .L2 + 52 .LBB2: + 112:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** { + 113:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** /* check for RTC Parameters used to output RTCCLK */ + 114:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** assert_param(IS_RCC_RTCCLKSOURCE(PeriphClkInit->RTCClockSelection)); + 53 .loc 1 114 5 is_stmt 1 view .LVU8 + 115:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** + 116:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** FlagStatus pwrclkchanged = RESET; + 54 .loc 1 116 5 view .LVU9 + 55 .LVL2: + 117:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** + ARM GAS /tmp/ccHuuDpT.s page 4 + + + 118:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** /* As soon as function is called to change RTC clock source, activation of the + 119:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** power domain is done. */ + 120:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** /* Requires to enable write access to Backup Domain of necessary */ + 121:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** if(__HAL_RCC_PWR_IS_CLK_DISABLED()) + 56 .loc 1 121 5 view .LVU10 + 57 .loc 1 121 8 is_stmt 0 view .LVU11 + 58 000c 484B ldr r3, .L27 + 59 000e DB69 ldr r3, [r3, #28] + 60 .loc 1 121 7 view .LVU12 + 61 0010 DB00 lsls r3, r3, #3 + 62 0012 5FD4 bmi .L14 + 122:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** { + 123:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** __HAL_RCC_PWR_CLK_ENABLE(); + 63 .loc 1 123 5 is_stmt 1 view .LVU13 + 64 .LBB3: + 65 .loc 1 123 5 view .LVU14 + 66 .loc 1 123 5 view .LVU15 + 67 0014 464B ldr r3, .L27 + 68 0016 DA69 ldr r2, [r3, #28] + 69 0018 8021 movs r1, #128 + 70 001a 4905 lsls r1, r1, #21 + 71 001c 0A43 orrs r2, r1 + 72 001e DA61 str r2, [r3, #28] + 73 .loc 1 123 5 view .LVU16 + 74 0020 DB69 ldr r3, [r3, #28] + 75 0022 0B40 ands r3, r1 + 76 0024 0193 str r3, [sp, #4] + 77 .loc 1 123 5 view .LVU17 + 78 0026 019B ldr r3, [sp, #4] + 79 .LBE3: + 80 .loc 1 123 5 view .LVU18 + 124:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** pwrclkchanged = SET; + 81 .loc 1 124 7 view .LVU19 + 82 .LVL3: + 83 .loc 1 124 21 is_stmt 0 view .LVU20 + 84 0028 0125 movs r5, #1 + 85 .LVL4: + 86 .L3: + 125:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** } + 126:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** + 127:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** if(HAL_IS_BIT_CLR(PWR->CR, PWR_CR_DBP)) + 87 .loc 1 127 5 is_stmt 1 view .LVU21 + 88 .loc 1 127 8 is_stmt 0 view .LVU22 + 89 002a 424B ldr r3, .L27+4 + 90 002c 1B68 ldr r3, [r3] + 91 .loc 1 127 7 view .LVU23 + 92 002e DB05 lsls r3, r3, #23 + 93 0030 52D5 bpl .L24 + 94 .LVL5: + 95 .L4: + 128:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** { + 129:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** /* Enable write access to Backup domain */ + 130:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** SET_BIT(PWR->CR, PWR_CR_DBP); + 131:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** + 132:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** /* Wait for Backup domain Write protection disable */ + 133:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** tickstart = HAL_GetTick(); + 134:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** + ARM GAS /tmp/ccHuuDpT.s page 5 + + + 135:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** while(HAL_IS_BIT_CLR(PWR->CR, PWR_CR_DBP)) + 136:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** { + 137:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** if((HAL_GetTick() - tickstart) > RCC_DBP_TIMEOUT_VALUE) + 138:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** { + 139:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** return HAL_TIMEOUT; + 140:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** } + 141:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** } + 142:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** } + 143:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** + 144:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** /* Reset the Backup domain only if the RTC Clock source selection is modified from reset value + 145:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** temp_reg = (RCC->BDCR & RCC_BDCR_RTCSEL); + 96 .loc 1 145 5 is_stmt 1 view .LVU24 + 97 .loc 1 145 20 is_stmt 0 view .LVU25 + 98 0032 3F4B ldr r3, .L27 + 99 0034 1A6A ldr r2, [r3, #32] + 100 .loc 1 145 14 view .LVU26 + 101 0036 C023 movs r3, #192 + 102 0038 9B00 lsls r3, r3, #2 + 103 003a 1100 movs r1, r2 + 104 003c 1940 ands r1, r3 + 105 .LVL6: + 146:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** if((temp_reg != 0x00000000U) && (temp_reg != (PeriphClkInit->RTCClockSelection & RCC_BDCR_RTCSE + 106 .loc 1 146 5 is_stmt 1 view .LVU27 + 107 .loc 1 146 7 is_stmt 0 view .LVU28 + 108 003e 1A42 tst r2, r3 + 109 0040 15D0 beq .L8 + 110 .loc 1 146 64 discriminator 1 view .LVU29 + 111 0042 6368 ldr r3, [r4, #4] + 112 .loc 1 146 84 discriminator 1 view .LVU30 + 113 0044 C022 movs r2, #192 + 114 0046 9200 lsls r2, r2, #2 + 115 0048 1340 ands r3, r2 + 116 .loc 1 146 34 discriminator 1 view .LVU31 + 117 004a 8B42 cmp r3, r1 + 118 004c 0FD0 beq .L8 + 147:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** { + 148:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** /* Store the content of BDCR register before the reset of Backup Domain */ + 149:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** temp_reg = (RCC->BDCR & ~(RCC_BDCR_RTCSEL)); + 119 .loc 1 149 7 is_stmt 1 view .LVU32 + 120 .loc 1 149 22 is_stmt 0 view .LVU33 + 121 004e 384B ldr r3, .L27 + 122 0050 1A6A ldr r2, [r3, #32] + 123 .loc 1 149 16 view .LVU34 + 124 0052 3949 ldr r1, .L27+8 + 125 .LVL7: + 126 .loc 1 149 16 view .LVU35 + 127 0054 1140 ands r1, r2 + 128 .LVL8: + 150:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** /* RTC Clock selection can be changed only if the Backup Domain is reset */ + 151:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** __HAL_RCC_BACKUPRESET_FORCE(); + 129 .loc 1 151 7 is_stmt 1 view .LVU36 + 130 0056 1E6A ldr r6, [r3, #32] + 131 0058 8020 movs r0, #128 + 132 005a 4002 lsls r0, r0, #9 + 133 005c 3043 orrs r0, r6 + 134 005e 1862 str r0, [r3, #32] + 152:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** __HAL_RCC_BACKUPRESET_RELEASE(); + ARM GAS /tmp/ccHuuDpT.s page 6 + + + 135 .loc 1 152 7 view .LVU37 + 136 0060 186A ldr r0, [r3, #32] + 137 0062 364E ldr r6, .L27+12 + 138 0064 3040 ands r0, r6 + 139 0066 1862 str r0, [r3, #32] + 153:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** /* Restore the Content of BDCR register */ + 154:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** RCC->BDCR = temp_reg; + 140 .loc 1 154 7 view .LVU38 + 141 .loc 1 154 17 is_stmt 0 view .LVU39 + 142 0068 1962 str r1, [r3, #32] + 155:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** + 156:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** /* Wait for LSERDY if LSE was enabled */ + 157:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** if (HAL_IS_BIT_SET(temp_reg, RCC_BDCR_LSEON)) + 143 .loc 1 157 7 is_stmt 1 view .LVU40 + 144 .loc 1 157 10 is_stmt 0 view .LVU41 + 145 006a D207 lsls r2, r2, #31 + 146 006c 48D4 bmi .L25 + 147 .LVL9: + 148 .L8: + 158:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** { + 159:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** /* Get Start Tick */ + 160:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** tickstart = HAL_GetTick(); + 161:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** + 162:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** /* Wait till LSE is ready */ + 163:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** while(__HAL_RCC_GET_FLAG(RCC_FLAG_LSERDY) == RESET) + 164:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** { + 165:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** if((HAL_GetTick() - tickstart) > RCC_LSE_TIMEOUT_VALUE) + 166:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** { + 167:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** return HAL_TIMEOUT; + 168:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** } + 169:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** } + 170:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** } + 171:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** } + 172:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** __HAL_RCC_RTC_CONFIG(PeriphClkInit->RTCClockSelection); + 149 .loc 1 172 5 is_stmt 1 view .LVU42 + 150 006e 304A ldr r2, .L27 + 151 0070 136A ldr r3, [r2, #32] + 152 0072 3149 ldr r1, .L27+8 + 153 0074 0B40 ands r3, r1 + 154 0076 6168 ldr r1, [r4, #4] + 155 0078 0B43 orrs r3, r1 + 156 007a 1362 str r3, [r2, #32] + 173:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** + 174:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** /* Require to disable power clock if necessary */ + 175:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** if(pwrclkchanged == SET) + 157 .loc 1 175 5 view .LVU43 + 158 .loc 1 175 7 is_stmt 0 view .LVU44 + 159 007c 012D cmp r5, #1 + 160 007e 4ED0 beq .L26 + 161 .LVL10: + 162 .L2: + 163 .loc 1 175 7 view .LVU45 + 164 .LBE2: + 176:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** { + 177:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** __HAL_RCC_PWR_CLK_DISABLE(); + 178:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** } + 179:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** } + ARM GAS /tmp/ccHuuDpT.s page 7 + + + 180:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** + 181:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** /*------------------------------- USART1 Configuration ------------------------*/ + 182:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** if(((PeriphClkInit->PeriphClockSelection) & RCC_PERIPHCLK_USART1) == RCC_PERIPHCLK_USART1) + 165 .loc 1 182 3 is_stmt 1 view .LVU46 + 166 .loc 1 182 21 is_stmt 0 view .LVU47 + 167 0080 2368 ldr r3, [r4] + 168 .loc 1 182 5 view .LVU48 + 169 0082 DB07 lsls r3, r3, #31 + 170 0084 06D5 bpl .L11 + 183:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** { + 184:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** /* Check the parameters */ + 185:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** assert_param(IS_RCC_USART1CLKSOURCE(PeriphClkInit->Usart1ClockSelection)); + 171 .loc 1 185 5 is_stmt 1 view .LVU49 + 186:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** + 187:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** /* Configure the USART1 clock source */ + 188:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** __HAL_RCC_USART1_CONFIG(PeriphClkInit->Usart1ClockSelection); + 172 .loc 1 188 5 view .LVU50 + 173 0086 2A4A ldr r2, .L27 + 174 0088 136B ldr r3, [r2, #48] + 175 008a 0321 movs r1, #3 + 176 008c 8B43 bics r3, r1 + 177 008e A168 ldr r1, [r4, #8] + 178 0090 0B43 orrs r3, r1 + 179 0092 1363 str r3, [r2, #48] + 180 .L11: + 189:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** } + 190:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** + 191:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** #if defined(STM32F071xB) || defined(STM32F072xB) || defined(STM32F078xx)\ + 192:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** || defined(STM32F091xC) || defined(STM32F098xx) + 193:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** /*----------------------------- USART2 Configuration --------------------------*/ + 194:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** if(((PeriphClkInit->PeriphClockSelection) & RCC_PERIPHCLK_USART2) == RCC_PERIPHCLK_USART2) + 195:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** { + 196:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** /* Check the parameters */ + 197:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** assert_param(IS_RCC_USART2CLKSOURCE(PeriphClkInit->Usart2ClockSelection)); + 198:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** + 199:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** /* Configure the USART2 clock source */ + 200:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** __HAL_RCC_USART2_CONFIG(PeriphClkInit->Usart2ClockSelection); + 201:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** } + 202:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** #endif /* STM32F071xB || STM32F072xB || STM32F078xx || */ + 203:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** /* STM32F091xC || STM32F098xx */ + 204:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** + 205:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** #if defined(STM32F091xC) || defined(STM32F098xx) + 206:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** /*----------------------------- USART3 Configuration --------------------------*/ + 207:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** if(((PeriphClkInit->PeriphClockSelection) & RCC_PERIPHCLK_USART3) == RCC_PERIPHCLK_USART3) + 208:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** { + 209:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** /* Check the parameters */ + 210:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** assert_param(IS_RCC_USART3CLKSOURCE(PeriphClkInit->Usart3ClockSelection)); + 211:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** + 212:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** /* Configure the USART3 clock source */ + 213:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** __HAL_RCC_USART3_CONFIG(PeriphClkInit->Usart3ClockSelection); + 214:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** } + 215:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** #endif /* STM32F091xC || STM32F098xx */ + 216:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** + 217:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** /*------------------------------ I2C1 Configuration ------------------------*/ + 218:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** if(((PeriphClkInit->PeriphClockSelection) & RCC_PERIPHCLK_I2C1) == RCC_PERIPHCLK_I2C1) + 181 .loc 1 218 3 view .LVU51 + 182 .loc 1 218 21 is_stmt 0 view .LVU52 + ARM GAS /tmp/ccHuuDpT.s page 8 + + + 183 0094 2368 ldr r3, [r4] + 184 .loc 1 218 5 view .LVU53 + 185 0096 9B06 lsls r3, r3, #26 + 186 0098 06D5 bpl .L12 + 219:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** { + 220:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** /* Check the parameters */ + 221:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** assert_param(IS_RCC_I2C1CLKSOURCE(PeriphClkInit->I2c1ClockSelection)); + 187 .loc 1 221 5 is_stmt 1 view .LVU54 + 222:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** + 223:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** /* Configure the I2C1 clock source */ + 224:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** __HAL_RCC_I2C1_CONFIG(PeriphClkInit->I2c1ClockSelection); + 188 .loc 1 224 5 view .LVU55 + 189 009a 254A ldr r2, .L27 + 190 009c 136B ldr r3, [r2, #48] + 191 009e 1021 movs r1, #16 + 192 00a0 8B43 bics r3, r1 + 193 00a2 E168 ldr r1, [r4, #12] + 194 00a4 0B43 orrs r3, r1 + 195 00a6 1363 str r3, [r2, #48] + 196 .L12: + 225:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** } + 226:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** + 227:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** #if defined(STM32F042x6) || defined(STM32F048xx) || defined(STM32F072xB) || defined(STM32F078xx) || + 228:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** /*------------------------------ USB Configuration ------------------------*/ + 229:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** if(((PeriphClkInit->PeriphClockSelection) & RCC_PERIPHCLK_USB) == RCC_PERIPHCLK_USB) + 197 .loc 1 229 3 view .LVU56 + 198 .loc 1 229 21 is_stmt 0 view .LVU57 + 199 00a8 2368 ldr r3, [r4] + 200 .loc 1 229 5 view .LVU58 + 201 00aa 9B03 lsls r3, r3, #14 + 202 00ac 06D5 bpl .L13 + 230:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** { + 231:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** /* Check the parameters */ + 232:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** assert_param(IS_RCC_USBCLKSOURCE(PeriphClkInit->UsbClockSelection)); + 203 .loc 1 232 5 is_stmt 1 view .LVU59 + 233:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** + 234:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** /* Configure the USB clock source */ + 235:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** __HAL_RCC_USB_CONFIG(PeriphClkInit->UsbClockSelection); + 204 .loc 1 235 5 view .LVU60 + 205 00ae 204A ldr r2, .L27 + 206 00b0 136B ldr r3, [r2, #48] + 207 00b2 8021 movs r1, #128 + 208 00b4 8B43 bics r3, r1 + 209 00b6 6169 ldr r1, [r4, #20] + 210 00b8 0B43 orrs r3, r1 + 211 00ba 1363 str r3, [r2, #48] + 212 .L13: + 236:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** } + 237:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** #endif /* STM32F042x6 || STM32F048xx || STM32F072xB || STM32F078xx || STM32F070xB || STM32F070x6 */ + 238:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** + 239:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** #if defined(STM32F042x6) || defined(STM32F048xx)\ + 240:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** || defined(STM32F051x8) || defined(STM32F058xx)\ + 241:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** || defined(STM32F071xB) || defined(STM32F072xB) || defined(STM32F078xx)\ + 242:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** || defined(STM32F091xC) || defined(STM32F098xx) + 243:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** /*------------------------------ CEC clock Configuration -------------------*/ + 244:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** if(((PeriphClkInit->PeriphClockSelection) & RCC_PERIPHCLK_CEC) == RCC_PERIPHCLK_CEC) + 213 .loc 1 244 3 view .LVU61 + ARM GAS /tmp/ccHuuDpT.s page 9 + + + 214 .loc 1 244 21 is_stmt 0 view .LVU62 + 215 00bc 2368 ldr r3, [r4] + 216 .loc 1 244 5 view .LVU63 + 217 00be 5B05 lsls r3, r3, #21 + 218 00c0 32D5 bpl .L17 + 245:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** { + 246:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** /* Check the parameters */ + 247:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** assert_param(IS_RCC_CECCLKSOURCE(PeriphClkInit->CecClockSelection)); + 219 .loc 1 247 5 is_stmt 1 view .LVU64 + 248:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** + 249:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** /* Configure the CEC clock source */ + 250:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** __HAL_RCC_CEC_CONFIG(PeriphClkInit->CecClockSelection); + 220 .loc 1 250 5 view .LVU65 + 221 00c2 1B4A ldr r2, .L27 + 222 00c4 136B ldr r3, [r2, #48] + 223 00c6 4021 movs r1, #64 + 224 00c8 8B43 bics r3, r1 + 225 00ca 2169 ldr r1, [r4, #16] + 226 00cc 0B43 orrs r3, r1 + 227 00ce 1363 str r3, [r2, #48] + 251:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** } + 252:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** #endif /* STM32F042x6 || STM32F048xx || */ + 253:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** /* STM32F051x8 || STM32F058xx || */ + 254:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** /* STM32F071xB || STM32F072xB || STM32F078xx || */ + 255:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** /* STM32F091xC || STM32F098xx */ + 256:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** + 257:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** return HAL_OK; + 228 .loc 1 257 10 is_stmt 0 view .LVU66 + 229 00d0 0020 movs r0, #0 + 230 00d2 2AE0 b .L6 + 231 .LVL11: + 232 .L14: + 233 .LBB4: + 116:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** + 234 .loc 1 116 22 view .LVU67 + 235 00d4 0025 movs r5, #0 + 236 00d6 A8E7 b .L3 + 237 .LVL12: + 238 .L24: + 130:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** + 239 .loc 1 130 7 is_stmt 1 view .LVU68 + 240 00d8 164A ldr r2, .L27+4 + 241 00da 1168 ldr r1, [r2] + 242 00dc 8023 movs r3, #128 + 243 00de 5B00 lsls r3, r3, #1 + 244 00e0 0B43 orrs r3, r1 + 245 00e2 1360 str r3, [r2] + 133:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** + 246 .loc 1 133 7 view .LVU69 + 133:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** + 247 .loc 1 133 19 is_stmt 0 view .LVU70 + 248 00e4 FFF7FEFF bl HAL_GetTick + 249 .LVL13: + 133:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** + 250 .loc 1 133 19 view .LVU71 + 251 00e8 0600 movs r6, r0 + 252 .LVL14: + ARM GAS /tmp/ccHuuDpT.s page 10 + + + 135:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** { + 253 .loc 1 135 7 is_stmt 1 view .LVU72 + 254 .L5: + 135:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** { + 255 .loc 1 135 13 view .LVU73 + 256 00ea 124B ldr r3, .L27+4 + 257 00ec 1B68 ldr r3, [r3] + 258 00ee DB05 lsls r3, r3, #23 + 259 00f0 9FD4 bmi .L4 + 137:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** { + 260 .loc 1 137 9 view .LVU74 + 137:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** { + 261 .loc 1 137 13 is_stmt 0 view .LVU75 + 262 00f2 FFF7FEFF bl HAL_GetTick + 263 .LVL15: + 137:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** { + 264 .loc 1 137 27 discriminator 1 view .LVU76 + 265 00f6 801B subs r0, r0, r6 + 137:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** { + 266 .loc 1 137 11 discriminator 1 view .LVU77 + 267 00f8 6428 cmp r0, #100 + 268 00fa F6D9 bls .L5 + 139:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** } + 269 .loc 1 139 18 view .LVU78 + 270 00fc 0320 movs r0, #3 + 271 00fe 14E0 b .L6 + 272 .LVL16: + 273 .L25: + 160:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** + 274 .loc 1 160 9 is_stmt 1 view .LVU79 + 160:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** + 275 .loc 1 160 21 is_stmt 0 view .LVU80 + 276 0100 FFF7FEFF bl HAL_GetTick + 277 .LVL17: + 160:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** + 278 .loc 1 160 21 view .LVU81 + 279 0104 0600 movs r6, r0 + 280 .LVL18: + 163:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** { + 281 .loc 1 163 9 is_stmt 1 view .LVU82 + 282 .L9: + 163:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** { + 283 .loc 1 163 51 view .LVU83 + 163:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** { + 284 .loc 1 163 15 is_stmt 0 view .LVU84 + 285 0106 0A4B ldr r3, .L27 + 286 0108 1B6A ldr r3, [r3, #32] + 163:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** { + 287 .loc 1 163 51 view .LVU85 + 288 010a 9B07 lsls r3, r3, #30 + 289 010c AFD4 bmi .L8 + 165:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** { + 290 .loc 1 165 11 is_stmt 1 view .LVU86 + 165:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** { + 291 .loc 1 165 15 is_stmt 0 view .LVU87 + 292 010e FFF7FEFF bl HAL_GetTick + 293 .LVL19: + ARM GAS /tmp/ccHuuDpT.s page 11 + + + 165:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** { + 294 .loc 1 165 29 discriminator 1 view .LVU88 + 295 0112 801B subs r0, r0, r6 + 165:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** { + 296 .loc 1 165 13 discriminator 1 view .LVU89 + 297 0114 0A4B ldr r3, .L27+16 + 298 0116 9842 cmp r0, r3 + 299 0118 F5D9 bls .L9 + 167:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** } + 300 .loc 1 167 20 view .LVU90 + 301 011a 0320 movs r0, #3 + 302 011c 05E0 b .L6 + 303 .LVL20: + 304 .L26: + 177:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** } + 305 .loc 1 177 7 is_stmt 1 view .LVU91 + 306 011e D369 ldr r3, [r2, #28] + 307 0120 0849 ldr r1, .L27+20 + 308 0122 0B40 ands r3, r1 + 309 0124 D361 str r3, [r2, #28] + 310 0126 ABE7 b .L2 + 311 .LVL21: + 312 .L17: + 177:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** } + 313 .loc 1 177 7 is_stmt 0 view .LVU92 + 314 .LBE4: + 315 .loc 1 257 10 view .LVU93 + 316 0128 0020 movs r0, #0 + 317 .L6: + 258:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** } + 318 .loc 1 258 1 view .LVU94 + 319 012a 02B0 add sp, sp, #8 + 320 @ sp needed + 321 .LVL22: + 322 .loc 1 258 1 view .LVU95 + 323 012c 70BD pop {r4, r5, r6, pc} + 324 .L28: + 325 012e C046 .align 2 + 326 .L27: + 327 0130 00100240 .word 1073876992 + 328 0134 00700040 .word 1073770496 + 329 0138 FFFCFFFF .word -769 + 330 013c FFFFFEFF .word -65537 + 331 0140 88130000 .word 5000 + 332 0144 FFFFFFEF .word -268435457 + 333 .cfi_endproc + 334 .LFE40: + 336 .section .text.HAL_RCCEx_GetPeriphCLKConfig,"ax",%progbits + 337 .align 1 + 338 .global HAL_RCCEx_GetPeriphCLKConfig + 339 .syntax unified + 340 .code 16 + 341 .thumb_func + 343 HAL_RCCEx_GetPeriphCLKConfig: + 344 .LVL23: + 345 .LFB41: + 259:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** + ARM GAS /tmp/ccHuuDpT.s page 12 + + + 260:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** /** + 261:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** * @brief Get the RCC_ClkInitStruct according to the internal + 262:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** * RCC configuration registers. + 263:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** * @param PeriphClkInit pointer to an RCC_PeriphCLKInitTypeDef structure that + 264:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** * returns the configuration information for the Extended Peripherals clocks + 265:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** * (USART, RTC, I2C, CEC and USB). + 266:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** * @retval None + 267:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** */ + 268:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** void HAL_RCCEx_GetPeriphCLKConfig(RCC_PeriphCLKInitTypeDef *PeriphClkInit) + 269:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** { + 346 .loc 1 269 1 is_stmt 1 view -0 + 347 .cfi_startproc + 348 @ args = 0, pretend = 0, frame = 0 + 349 @ frame_needed = 0, uses_anonymous_args = 0 + 350 @ link register save eliminated. + 270:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** /* Set all possible values for the extended clock type parameter------------*/ + 271:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** /* Common part first */ + 272:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** PeriphClkInit->PeriphClockSelection = RCC_PERIPHCLK_USART1 | RCC_PERIPHCLK_I2C1 | RCC_PERIPHCLK + 351 .loc 1 272 3 view .LVU97 + 352 .loc 1 272 39 is_stmt 0 view .LVU98 + 353 0000 0E4B ldr r3, .L30 + 354 0002 0360 str r3, [r0] + 273:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** /* Get the RTC configuration --------------------------------------------*/ + 274:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** PeriphClkInit->RTCClockSelection = __HAL_RCC_GET_RTC_SOURCE(); + 355 .loc 1 274 3 is_stmt 1 view .LVU99 + 356 .loc 1 274 38 is_stmt 0 view .LVU100 + 357 0004 0E4B ldr r3, .L30+4 + 358 0006 1A6A ldr r2, [r3, #32] + 359 0008 C021 movs r1, #192 + 360 000a 8900 lsls r1, r1, #2 + 361 000c 0A40 ands r2, r1 + 362 .loc 1 274 36 view .LVU101 + 363 000e 4260 str r2, [r0, #4] + 275:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** /* Get the USART1 clock configuration --------------------------------------------*/ + 276:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** PeriphClkInit->Usart1ClockSelection = __HAL_RCC_GET_USART1_SOURCE(); + 364 .loc 1 276 3 is_stmt 1 view .LVU102 + 365 .loc 1 276 41 is_stmt 0 view .LVU103 + 366 0010 196B ldr r1, [r3, #48] + 367 0012 0322 movs r2, #3 + 368 0014 0A40 ands r2, r1 + 369 .loc 1 276 39 view .LVU104 + 370 0016 8260 str r2, [r0, #8] + 277:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** /* Get the I2C1 clock source -----------------------------------------------*/ + 278:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** PeriphClkInit->I2c1ClockSelection = __HAL_RCC_GET_I2C1_SOURCE(); + 371 .loc 1 278 3 is_stmt 1 view .LVU105 + 372 .loc 1 278 39 is_stmt 0 view .LVU106 + 373 0018 196B ldr r1, [r3, #48] + 374 001a 1022 movs r2, #16 + 375 001c 0A40 ands r2, r1 + 376 .loc 1 278 37 view .LVU107 + 377 001e C260 str r2, [r0, #12] + 279:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** + 280:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** #if defined(STM32F071xB) || defined(STM32F072xB) || defined(STM32F078xx)\ + 281:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** || defined(STM32F091xC) || defined(STM32F098xx) + 282:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** PeriphClkInit->PeriphClockSelection |= RCC_PERIPHCLK_USART2; + 283:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** /* Get the USART2 clock source ---------------------------------------------*/ + 284:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** PeriphClkInit->Usart2ClockSelection = __HAL_RCC_GET_USART2_SOURCE(); + ARM GAS /tmp/ccHuuDpT.s page 13 + + + 285:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** #endif /* STM32F071xB || STM32F072xB || STM32F078xx || */ + 286:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** /* STM32F091xC || STM32F098xx */ + 287:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** + 288:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** #if defined(STM32F091xC) || defined(STM32F098xx) + 289:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** PeriphClkInit->PeriphClockSelection |= RCC_PERIPHCLK_USART3; + 290:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** /* Get the USART3 clock source ---------------------------------------------*/ + 291:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** PeriphClkInit->Usart3ClockSelection = __HAL_RCC_GET_USART3_SOURCE(); + 292:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** #endif /* STM32F091xC || STM32F098xx */ + 293:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** + 294:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** #if defined(STM32F042x6) || defined(STM32F048xx) || defined(STM32F072xB) || defined(STM32F078xx) || + 295:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** PeriphClkInit->PeriphClockSelection |= RCC_PERIPHCLK_USB; + 378 .loc 1 295 3 is_stmt 1 view .LVU108 + 379 .loc 1 295 39 is_stmt 0 view .LVU109 + 380 0020 084A ldr r2, .L30+8 + 381 0022 0260 str r2, [r0] + 296:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** /* Get the USB clock source ---------------------------------------------*/ + 297:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** PeriphClkInit->UsbClockSelection = __HAL_RCC_GET_USB_SOURCE(); + 382 .loc 1 297 3 is_stmt 1 view .LVU110 + 383 .loc 1 297 38 is_stmt 0 view .LVU111 + 384 0024 196B ldr r1, [r3, #48] + 385 0026 8022 movs r2, #128 + 386 0028 0A40 ands r2, r1 + 387 .loc 1 297 36 view .LVU112 + 388 002a 4261 str r2, [r0, #20] + 298:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** #endif /* STM32F042x6 || STM32F048xx || STM32F072xB || STM32F078xx || STM32F070xB || STM32F070x6 */ + 299:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** + 300:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** #if defined(STM32F042x6) || defined(STM32F048xx)\ + 301:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** || defined(STM32F051x8) || defined(STM32F058xx)\ + 302:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** || defined(STM32F071xB) || defined(STM32F072xB) || defined(STM32F078xx)\ + 303:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** || defined(STM32F091xC) || defined(STM32F098xx) + 304:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** PeriphClkInit->PeriphClockSelection |= RCC_PERIPHCLK_CEC; + 389 .loc 1 304 3 is_stmt 1 view .LVU113 + 390 .loc 1 304 39 is_stmt 0 view .LVU114 + 391 002c 064A ldr r2, .L30+12 + 392 002e 0260 str r2, [r0] + 305:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** /* Get the CEC clock source ------------------------------------------------*/ + 306:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** PeriphClkInit->CecClockSelection = __HAL_RCC_GET_CEC_SOURCE(); + 393 .loc 1 306 3 is_stmt 1 view .LVU115 + 394 .loc 1 306 38 is_stmt 0 view .LVU116 + 395 0030 1A6B ldr r2, [r3, #48] + 396 0032 4023 movs r3, #64 + 397 0034 1340 ands r3, r2 + 398 .loc 1 306 36 view .LVU117 + 399 0036 0361 str r3, [r0, #16] + 307:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** #endif /* STM32F042x6 || STM32F048xx || */ + 308:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** /* STM32F051x8 || STM32F058xx || */ + 309:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** /* STM32F071xB || STM32F072xB || STM32F078xx || */ + 310:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** /* STM32F091xC || STM32F098xx */ + 311:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** + 312:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** } + 400 .loc 1 312 1 view .LVU118 + 401 @ sp needed + 402 0038 7047 bx lr + 403 .L31: + 404 003a C046 .align 2 + 405 .L30: + 406 003c 21000100 .word 65569 + ARM GAS /tmp/ccHuuDpT.s page 14 + + + 407 0040 00100240 .word 1073876992 + 408 0044 21000300 .word 196641 + 409 0048 21040300 .word 197665 + 410 .cfi_endproc + 411 .LFE41: + 413 .global __aeabi_uidiv + 414 .section .text.HAL_RCCEx_GetPeriphCLKFreq,"ax",%progbits + 415 .align 1 + 416 .global HAL_RCCEx_GetPeriphCLKFreq + 417 .syntax unified + 418 .code 16 + 419 .thumb_func + 421 HAL_RCCEx_GetPeriphCLKFreq: + 422 .LVL24: + 423 .LFB42: + 313:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** + 314:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** /** + 315:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** * @brief Returns the peripheral clock frequency + 316:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** * @note Returns 0 if peripheral clock is unknown + 317:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** * @param PeriphClk Peripheral clock identifier + 318:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** * This parameter can be one of the following values: + 319:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** * @arg @ref RCC_PERIPHCLK_RTC RTC peripheral clock + 320:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** * @arg @ref RCC_PERIPHCLK_USART1 USART1 peripheral clock + 321:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** * @arg @ref RCC_PERIPHCLK_I2C1 I2C1 peripheral clock + 322:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** @if STM32F042x6 + 323:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** * @arg @ref RCC_PERIPHCLK_USB USB peripheral clock + 324:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** * @arg @ref RCC_PERIPHCLK_CEC CEC peripheral clock + 325:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** @endif + 326:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** @if STM32F048xx + 327:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** * @arg @ref RCC_PERIPHCLK_USB USB peripheral clock + 328:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** * @arg @ref RCC_PERIPHCLK_CEC CEC peripheral clock + 329:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** @endif + 330:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** @if STM32F051x8 + 331:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** * @arg @ref RCC_PERIPHCLK_CEC CEC peripheral clock + 332:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** @endif + 333:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** @if STM32F058xx + 334:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** * @arg @ref RCC_PERIPHCLK_CEC CEC peripheral clock + 335:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** @endif + 336:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** @if STM32F070x6 + 337:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** * @arg @ref RCC_PERIPHCLK_USB USB peripheral clock + 338:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** @endif + 339:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** @if STM32F070xB + 340:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** * @arg @ref RCC_PERIPHCLK_USB USB peripheral clock + 341:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** @endif + 342:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** @if STM32F071xB + 343:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** * @arg @ref RCC_PERIPHCLK_USART2 USART2 peripheral clock + 344:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** * @arg @ref RCC_PERIPHCLK_CEC CEC peripheral clock + 345:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** @endif + 346:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** @if STM32F072xB + 347:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** * @arg @ref RCC_PERIPHCLK_USART2 USART2 peripheral clock + 348:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** * @arg @ref RCC_PERIPHCLK_USB USB peripheral clock + 349:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** * @arg @ref RCC_PERIPHCLK_CEC CEC peripheral clock + 350:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** @endif + 351:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** @if STM32F078xx + 352:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** * @arg @ref RCC_PERIPHCLK_USART2 USART2 peripheral clock + 353:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** * @arg @ref RCC_PERIPHCLK_USB USB peripheral clock + 354:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** * @arg @ref RCC_PERIPHCLK_CEC CEC peripheral clock + ARM GAS /tmp/ccHuuDpT.s page 15 + + + 355:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** @endif + 356:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** @if STM32F091xC + 357:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** * @arg @ref RCC_PERIPHCLK_USART2 USART2 peripheral clock + 358:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** * @arg @ref RCC_PERIPHCLK_USART3 USART2 peripheral clock + 359:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** * @arg @ref RCC_PERIPHCLK_CEC CEC peripheral clock + 360:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** @endif + 361:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** @if STM32F098xx + 362:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** * @arg @ref RCC_PERIPHCLK_USART2 USART2 peripheral clock + 363:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** * @arg @ref RCC_PERIPHCLK_USART3 USART2 peripheral clock + 364:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** * @arg @ref RCC_PERIPHCLK_CEC CEC peripheral clock + 365:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** @endif + 366:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** * @retval Frequency in Hz (0: means that no available frequency for the peripheral) + 367:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** */ + 368:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** uint32_t HAL_RCCEx_GetPeriphCLKFreq(uint32_t PeriphClk) + 369:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** { + 424 .loc 1 369 1 is_stmt 1 view -0 + 425 .cfi_startproc + 426 @ args = 0, pretend = 0, frame = 0 + 427 @ frame_needed = 0, uses_anonymous_args = 0 + 428 .loc 1 369 1 is_stmt 0 view .LVU120 + 429 0000 10B5 push {r4, lr} + 430 .cfi_def_cfa_offset 8 + 431 .cfi_offset 4, -8 + 432 .cfi_offset 14, -4 + 370:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** /* frequency == 0 : means that no available frequency for the peripheral */ + 371:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** uint32_t frequency = 0U; + 433 .loc 1 371 3 is_stmt 1 view .LVU121 + 434 .LVL25: + 372:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** + 373:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** uint32_t srcclk = 0U; + 435 .loc 1 373 3 view .LVU122 + 374:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** #if defined(USB) + 375:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** uint32_t pllmull = 0U, pllsource = 0U, predivfactor = 0U; + 436 .loc 1 375 3 view .LVU123 + 376:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** #endif /* USB */ + 377:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** + 378:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** /* Check the parameters */ + 379:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** assert_param(IS_RCC_PERIPHCLOCK(PeriphClk)); + 437 .loc 1 379 3 view .LVU124 + 380:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** + 381:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** switch (PeriphClk) + 438 .loc 1 381 3 view .LVU125 + 439 0002 8023 movs r3, #128 + 440 0004 DB00 lsls r3, r3, #3 + 441 0006 9842 cmp r0, r3 + 442 0008 00D1 bne .LCB398 + 443 000a ACE0 b .L33 @long jump + 444 .LCB398: + 445 000c 30D9 bls .L59 + 446 000e 8023 movs r3, #128 + 447 0010 5B02 lsls r3, r3, #9 + 448 0012 9842 cmp r0, r3 + 449 0014 41D0 beq .L38 + 450 0016 8023 movs r3, #128 + 451 0018 9B02 lsls r3, r3, #10 + 452 001a 9842 cmp r0, r3 + 453 001c 3BD1 bne .L60 + ARM GAS /tmp/ccHuuDpT.s page 16 + + + 382:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** { + 383:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** case RCC_PERIPHCLK_RTC: + 384:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** { + 385:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** /* Get the current RTC source */ + 386:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** srcclk = __HAL_RCC_GET_RTC_SOURCE(); + 387:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** + 388:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** /* Check if LSE is ready and if RTC clock selection is LSE */ + 389:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** if ((srcclk == RCC_RTCCLKSOURCE_LSE) && (HAL_IS_BIT_SET(RCC->BDCR, RCC_BDCR_LSERDY))) + 390:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** { + 391:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** frequency = LSE_VALUE; + 392:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** } + 393:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** /* Check if LSI is ready and if RTC clock selection is LSI */ + 394:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** else if ((srcclk == RCC_RTCCLKSOURCE_LSI) && (HAL_IS_BIT_SET(RCC->CSR, RCC_CSR_LSIRDY))) + 395:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** { + 396:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** frequency = LSI_VALUE; + 397:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** } + 398:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** /* Check if HSE is ready and if RTC clock selection is HSI_DIV32*/ + 399:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** else if ((srcclk == RCC_RTCCLKSOURCE_HSE_DIV32) && (HAL_IS_BIT_SET(RCC->CR, RCC_CR_HSERDY))) + 400:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** { + 401:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** frequency = HSE_VALUE / 32U; + 402:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** } + 403:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** break; + 404:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** } + 405:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** case RCC_PERIPHCLK_USART1: + 406:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** { + 407:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** /* Get the current USART1 source */ + 408:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** srcclk = __HAL_RCC_GET_USART1_SOURCE(); + 409:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** + 410:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** /* Check if USART1 clock selection is PCLK1 */ + 411:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** if (srcclk == RCC_USART1CLKSOURCE_PCLK1) + 412:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** { + 413:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** frequency = HAL_RCC_GetPCLK1Freq(); + 414:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** } + 415:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** /* Check if HSI is ready and if USART1 clock selection is HSI */ + 416:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** else if ((srcclk == RCC_USART1CLKSOURCE_HSI) && (HAL_IS_BIT_SET(RCC->CR, RCC_CR_HSIRDY))) + 417:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** { + 418:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** frequency = HSI_VALUE; + 419:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** } + 420:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** /* Check if USART1 clock selection is SYSCLK */ + 421:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** else if (srcclk == RCC_USART1CLKSOURCE_SYSCLK) + 422:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** { + 423:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** frequency = HAL_RCC_GetSysClockFreq(); + 424:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** } + 425:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** /* Check if LSE is ready and if USART1 clock selection is LSE */ + 426:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** else if ((srcclk == RCC_USART1CLKSOURCE_LSE) && (HAL_IS_BIT_SET(RCC->BDCR, RCC_BDCR_LSERDY))) + 427:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** { + 428:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** frequency = LSE_VALUE; + 429:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** } + 430:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** break; + 431:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** } + 432:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** #if defined(RCC_CFGR3_USART2SW) + 433:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** case RCC_PERIPHCLK_USART2: + 434:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** { + 435:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** /* Get the current USART2 source */ + 436:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** srcclk = __HAL_RCC_GET_USART2_SOURCE(); + 437:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** + 438:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** /* Check if USART2 clock selection is PCLK1 */ + ARM GAS /tmp/ccHuuDpT.s page 17 + + + 439:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** if (srcclk == RCC_USART2CLKSOURCE_PCLK1) + 440:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** { + 441:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** frequency = HAL_RCC_GetPCLK1Freq(); + 442:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** } + 443:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** /* Check if HSI is ready and if USART2 clock selection is HSI */ + 444:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** else if ((srcclk == RCC_USART2CLKSOURCE_HSI) && (HAL_IS_BIT_SET(RCC->CR, RCC_CR_HSIRDY))) + 445:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** { + 446:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** frequency = HSI_VALUE; + 447:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** } + 448:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** /* Check if USART2 clock selection is SYSCLK */ + 449:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** else if (srcclk == RCC_USART2CLKSOURCE_SYSCLK) + 450:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** { + 451:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** frequency = HAL_RCC_GetSysClockFreq(); + 452:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** } + 453:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** /* Check if LSE is ready and if USART2 clock selection is LSE */ + 454:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** else if ((srcclk == RCC_USART2CLKSOURCE_LSE) && (HAL_IS_BIT_SET(RCC->BDCR, RCC_BDCR_LSERDY))) + 455:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** { + 456:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** frequency = LSE_VALUE; + 457:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** } + 458:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** break; + 459:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** } + 460:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** #endif /* RCC_CFGR3_USART2SW */ + 461:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** #if defined(RCC_CFGR3_USART3SW) + 462:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** case RCC_PERIPHCLK_USART3: + 463:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** { + 464:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** /* Get the current USART3 source */ + 465:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** srcclk = __HAL_RCC_GET_USART3_SOURCE(); + 466:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** + 467:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** /* Check if USART3 clock selection is PCLK1 */ + 468:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** if (srcclk == RCC_USART3CLKSOURCE_PCLK1) + 469:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** { + 470:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** frequency = HAL_RCC_GetPCLK1Freq(); + 471:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** } + 472:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** /* Check if HSI is ready and if USART3 clock selection is HSI */ + 473:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** else if ((srcclk == RCC_USART3CLKSOURCE_HSI) && (HAL_IS_BIT_SET(RCC->CR, RCC_CR_HSIRDY))) + 474:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** { + 475:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** frequency = HSI_VALUE; + 476:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** } + 477:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** /* Check if USART3 clock selection is SYSCLK */ + 478:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** else if (srcclk == RCC_USART3CLKSOURCE_SYSCLK) + 479:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** { + 480:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** frequency = HAL_RCC_GetSysClockFreq(); + 481:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** } + 482:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** /* Check if LSE is ready and if USART3 clock selection is LSE */ + 483:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** else if ((srcclk == RCC_USART3CLKSOURCE_LSE) && (HAL_IS_BIT_SET(RCC->BDCR, RCC_BDCR_LSERDY))) + 484:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** { + 485:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** frequency = LSE_VALUE; + 486:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** } + 487:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** break; + 488:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** } + 489:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** #endif /* RCC_CFGR3_USART3SW */ + 490:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** case RCC_PERIPHCLK_I2C1: + 491:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** { + 492:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** /* Get the current I2C1 source */ + 493:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** srcclk = __HAL_RCC_GET_I2C1_SOURCE(); + 494:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** + 495:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** /* Check if HSI is ready and if I2C1 clock selection is HSI */ + ARM GAS /tmp/ccHuuDpT.s page 18 + + + 496:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** if ((srcclk == RCC_I2C1CLKSOURCE_HSI) && (HAL_IS_BIT_SET(RCC->CR, RCC_CR_HSIRDY))) + 497:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** { + 498:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** frequency = HSI_VALUE; + 499:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** } + 500:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** /* Check if I2C1 clock selection is SYSCLK */ + 501:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** else if (srcclk == RCC_I2C1CLKSOURCE_SYSCLK) + 502:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** { + 503:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** frequency = HAL_RCC_GetSysClockFreq(); + 504:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** } + 505:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** break; + 506:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** } + 507:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** #if defined(USB) + 508:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** case RCC_PERIPHCLK_USB: + 509:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** { + 510:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** /* Get the current USB source */ + 511:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** srcclk = __HAL_RCC_GET_USB_SOURCE(); + 454 .loc 1 511 7 view .LVU126 + 455 .loc 1 511 16 is_stmt 0 view .LVU127 + 456 001e 5D4B ldr r3, .L71 + 457 0020 1B6B ldr r3, [r3, #48] + 458 .LVL26: + 512:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** + 513:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** /* Check if PLL is ready and if USB clock selection is PLL */ + 514:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** if ((srcclk == RCC_USBCLKSOURCE_PLL) && (HAL_IS_BIT_SET(RCC->CR, RCC_CR_PLLRDY))) + 459 .loc 1 514 7 is_stmt 1 view .LVU128 + 460 .loc 1 514 10 is_stmt 0 view .LVU129 + 461 0022 1B06 lsls r3, r3, #24 + 462 0024 00D4 bmi .LCB417 + 463 0026 94E0 b .L46 @long jump + 464 .LCB417: + 465 .LVL27: + 466 .loc 1 514 48 discriminator 1 view .LVU130 + 467 0028 5A4B ldr r3, .L71 + 468 002a 1A68 ldr r2, [r3] + 469 002c 8023 movs r3, #128 + 470 002e 9B04 lsls r3, r3, #18 + 471 0030 1000 movs r0, r2 + 472 .LVL28: + 473 .loc 1 514 48 discriminator 1 view .LVU131 + 474 0032 1840 ands r0, r3 + 475 .loc 1 514 44 discriminator 1 view .LVU132 + 476 0034 1A42 tst r2, r3 + 477 0036 42D0 beq .L32 + 515:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** { + 516:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** /* Get PLL clock source and multiplication factor ----------------------*/ + 517:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** pllmull = RCC->CFGR & RCC_CFGR_PLLMUL; + 478 .loc 1 517 9 is_stmt 1 view .LVU133 + 479 .loc 1 517 27 is_stmt 0 view .LVU134 + 480 0038 564A ldr r2, .L71 + 481 003a 5068 ldr r0, [r2, #4] + 482 .LVL29: + 518:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** pllsource = RCC->CFGR & RCC_CFGR_PLLSRC; + 483 .loc 1 518 9 is_stmt 1 view .LVU135 + 484 .loc 1 518 27 is_stmt 0 view .LVU136 + 485 003c 5368 ldr r3, [r2, #4] + 486 .loc 1 518 22 view .LVU137 + 487 003e C021 movs r1, #192 + ARM GAS /tmp/ccHuuDpT.s page 19 + + + 488 0040 4902 lsls r1, r1, #9 + 489 0042 0B40 ands r3, r1 + 490 .LVL30: + 519:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** pllmull = (pllmull >> RCC_CFGR_PLLMUL_BITNUMBER) + 2U; + 491 .loc 1 519 9 is_stmt 1 view .LVU138 + 492 .loc 1 519 33 is_stmt 0 view .LVU139 + 493 0044 800C lsrs r0, r0, #18 + 494 .LVL31: + 495 .loc 1 519 33 view .LVU140 + 496 0046 0F21 movs r1, #15 + 497 0048 0840 ands r0, r1 + 498 .loc 1 519 22 view .LVU141 + 499 004a 841C adds r4, r0, #2 + 500 .LVL32: + 520:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** predivfactor = (RCC->CFGR2 & RCC_CFGR2_PREDIV) + 1U; + 501 .loc 1 520 9 is_stmt 1 view .LVU142 + 502 .loc 1 520 28 is_stmt 0 view .LVU143 + 503 004c D26A ldr r2, [r2, #44] + 504 .loc 1 520 36 view .LVU144 + 505 004e 1140 ands r1, r2 + 506 .loc 1 520 22 view .LVU145 + 507 0050 0131 adds r1, r1, #1 + 508 .LVL33: + 521:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** + 522:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** if (pllsource == RCC_CFGR_PLLSRC_HSE_PREDIV) + 509 .loc 1 522 9 is_stmt 1 view .LVU146 + 510 .loc 1 522 12 is_stmt 0 view .LVU147 + 511 0052 8022 movs r2, #128 + 512 0054 5202 lsls r2, r2, #9 + 513 0056 9342 cmp r3, r2 + 514 0058 00D1 bne .LCB454 + 515 005a 70E0 b .L61 @long jump + 516 .LCB454: + 523:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** { + 524:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** /* HSE used as PLL clock source : frequency = HSE/PREDIV * PLLMUL */ + 525:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** frequency = (HSE_VALUE/predivfactor) * pllmull; + 526:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** } + 527:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** #if defined(RCC_CR2_HSI48ON) + 528:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** else if (pllsource == RCC_CFGR_PLLSRC_HSI48_PREDIV) + 517 .loc 1 528 14 is_stmt 1 view .LVU148 + 518 .loc 1 528 17 is_stmt 0 view .LVU149 + 519 005c C022 movs r2, #192 + 520 005e 5202 lsls r2, r2, #9 + 521 0060 9342 cmp r3, r2 + 522 0062 00D1 bne .LCB459 + 523 0064 70E0 b .L62 @long jump + 524 .LCB459: + 529:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** { + 530:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** /* HSI48 used as PLL clock source : frequency = HSI48/PREDIV * PLLMUL */ + 531:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** frequency = (HSI48_VALUE / predivfactor) * pllmull; + 532:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** } + 533:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** #endif /* RCC_CR2_HSI48ON */ + 534:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** else + 535:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** { + 536:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** #if defined(STM32F042x6) || defined(STM32F048xx) || defined(STM32F078xx) || defined(STM32F072xB) || + 537:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** /* HSI used as PLL clock source : frequency = HSI/PREDIV * PLLMUL */ + 538:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** frequency = (HSI_VALUE / predivfactor) * pllmull; + ARM GAS /tmp/ccHuuDpT.s page 20 + + + 525 .loc 1 538 11 is_stmt 1 view .LVU150 + 526 .loc 1 538 34 is_stmt 0 view .LVU151 + 527 0066 4C48 ldr r0, .L71+4 + 528 0068 FFF7FEFF bl __aeabi_uidiv + 529 .LVL34: + 530 .loc 1 538 21 view .LVU152 + 531 006c 6043 muls r0, r4 + 532 .LVL35: + 533 .loc 1 538 21 view .LVU153 + 534 006e 26E0 b .L32 + 535 .LVL36: + 536 .L59: + 381:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** { + 537 .loc 1 381 3 view .LVU154 + 538 0070 0128 cmp r0, #1 + 539 0072 3CD0 beq .L35 + 540 0074 2028 cmp r0, #32 + 541 0076 0CD1 bne .L63 + 493:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** + 542 .loc 1 493 7 is_stmt 1 view .LVU155 + 493:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** + 543 .loc 1 493 16 is_stmt 0 view .LVU156 + 544 0078 464B ldr r3, .L71 + 545 007a 1B6B ldr r3, [r3, #48] + 546 .LVL37: + 496:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** { + 547 .loc 1 496 7 is_stmt 1 view .LVU157 + 496:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** { + 548 .loc 1 496 10 is_stmt 0 view .LVU158 + 549 007c DB06 lsls r3, r3, #27 + 550 007e 5BD4 bmi .L45 + 551 .LVL38: + 496:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** { + 552 .loc 1 496 49 discriminator 1 view .LVU159 + 553 0080 444B ldr r3, .L71 + 554 0082 1B68 ldr r3, [r3] + 555 0084 0222 movs r2, #2 + 556 0086 1000 movs r0, r2 + 557 .LVL39: + 496:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** { + 558 .loc 1 496 49 discriminator 1 view .LVU160 + 559 0088 1840 ands r0, r3 + 496:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** { + 560 .loc 1 496 45 discriminator 1 view .LVU161 + 561 008a 1A42 tst r2, r3 + 562 008c 17D0 beq .L32 + 498:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** } + 563 .loc 1 498 19 view .LVU162 + 564 008e 4248 ldr r0, .L71+4 + 565 0090 15E0 b .L32 + 566 .LVL40: + 567 .L63: + 381:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** { + 568 .loc 1 381 3 view .LVU163 + 569 0092 0020 movs r0, #0 + 570 .LVL41: + 381:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** { + ARM GAS /tmp/ccHuuDpT.s page 21 + + + 571 .loc 1 381 3 view .LVU164 + 572 0094 13E0 b .L32 + 573 .LVL42: + 574 .L60: + 381:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** { + 575 .loc 1 381 3 view .LVU165 + 576 0096 0020 movs r0, #0 + 577 .LVL43: + 381:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** { + 578 .loc 1 381 3 view .LVU166 + 579 0098 11E0 b .L32 + 580 .LVL44: + 581 .L38: + 386:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** + 582 .loc 1 386 7 is_stmt 1 view .LVU167 + 386:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** + 583 .loc 1 386 16 is_stmt 0 view .LVU168 + 584 009a 3E4B ldr r3, .L71 + 585 009c 1B6A ldr r3, [r3, #32] + 386:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** + 586 .loc 1 386 14 view .LVU169 + 587 009e C022 movs r2, #192 + 588 00a0 9200 lsls r2, r2, #2 + 589 00a2 1340 ands r3, r2 + 590 .LVL45: + 389:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** { + 591 .loc 1 389 7 is_stmt 1 view .LVU170 + 389:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** { + 592 .loc 1 389 10 is_stmt 0 view .LVU171 + 593 00a4 8022 movs r2, #128 + 594 00a6 5200 lsls r2, r2, #1 + 595 00a8 9342 cmp r3, r2 + 596 00aa 09D0 beq .L64 + 597 .L40: + 394:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** { + 598 .loc 1 394 12 is_stmt 1 view .LVU172 + 394:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** { + 599 .loc 1 394 15 is_stmt 0 view .LVU173 + 600 00ac 8022 movs r2, #128 + 601 00ae 9200 lsls r2, r2, #2 + 602 00b0 9342 cmp r3, r2 + 603 00b2 0CD0 beq .L65 + 604 .L41: + 399:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** { + 605 .loc 1 399 12 is_stmt 1 view .LVU174 + 399:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** { + 606 .loc 1 399 15 is_stmt 0 view .LVU175 + 607 00b4 C022 movs r2, #192 + 608 00b6 9200 lsls r2, r2, #2 + 609 00b8 9342 cmp r3, r2 + 610 00ba 0ED0 beq .L66 + 371:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** + 611 .loc 1 371 12 view .LVU176 + 612 00bc 0020 movs r0, #0 + 613 .LVL46: + 614 .L32: + 539:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** #else + ARM GAS /tmp/ccHuuDpT.s page 22 + + + 540:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** /* HSI used as PLL clock source : frequency = HSI/2U * PLLMUL */ + 541:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** frequency = (HSI_VALUE >> 1U) * pllmull; + 542:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** #endif /* STM32F042x6 || STM32F048xx || STM32F072xB || STM32F078xx || STM32F070xB */ + 543:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** } + 544:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** } + 545:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** #if defined(RCC_CR2_HSI48ON) + 546:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** /* Check if HSI48 is ready and if USB clock selection is HSI48 */ + 547:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** else if ((srcclk == RCC_USBCLKSOURCE_HSI48) && (HAL_IS_BIT_SET(RCC->CR2, RCC_CR2_HSI48RDY))) + 548:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** { + 549:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** frequency = HSI48_VALUE; + 550:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** } + 551:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** #endif /* RCC_CR2_HSI48ON */ + 552:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** break; + 553:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** } + 554:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** #endif /* USB */ + 555:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** #if defined(CEC) + 556:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** case RCC_PERIPHCLK_CEC: + 557:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** { + 558:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** /* Get the current CEC source */ + 559:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** srcclk = __HAL_RCC_GET_CEC_SOURCE(); + 560:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** + 561:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** /* Check if HSI is ready and if CEC clock selection is HSI */ + 562:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** if ((srcclk == RCC_CECCLKSOURCE_HSI) && (HAL_IS_BIT_SET(RCC->CR, RCC_CR_HSIRDY))) + 563:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** { + 564:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** frequency = HSI_VALUE; + 565:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** } + 566:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** /* Check if LSE is ready and if CEC clock selection is LSE */ + 567:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** else if ((srcclk == RCC_CECCLKSOURCE_LSE) && (HAL_IS_BIT_SET(RCC->BDCR, RCC_BDCR_LSERDY))) + 568:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** { + 569:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** frequency = LSE_VALUE; + 570:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** } + 571:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** break; + 572:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** } + 573:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** #endif /* CEC */ + 574:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** default: + 575:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** { + 576:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** break; + 577:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** } + 578:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** } + 579:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** return(frequency); + 580:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** } + 615 .loc 1 580 1 view .LVU177 + 616 @ sp needed + 617 00be 10BD pop {r4, pc} + 618 .LVL47: + 619 .L64: + 389:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** { + 620 .loc 1 389 48 discriminator 1 view .LVU178 + 621 00c0 344A ldr r2, .L71 + 622 00c2 126A ldr r2, [r2, #32] + 389:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** { + 623 .loc 1 389 44 discriminator 1 view .LVU179 + 624 00c4 9207 lsls r2, r2, #30 + 625 00c6 F1D5 bpl .L40 + 391:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** } + 626 .loc 1 391 19 view .LVU180 + 627 00c8 8020 movs r0, #128 + ARM GAS /tmp/ccHuuDpT.s page 23 + + + 628 .LVL48: + 391:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** } + 629 .loc 1 391 19 view .LVU181 + 630 00ca 0002 lsls r0, r0, #8 + 631 00cc F7E7 b .L32 + 632 .LVL49: + 633 .L65: + 394:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** { + 634 .loc 1 394 53 discriminator 1 view .LVU182 + 635 00ce 314A ldr r2, .L71 + 636 00d0 526A ldr r2, [r2, #36] + 394:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** { + 637 .loc 1 394 49 discriminator 1 view .LVU183 + 638 00d2 9207 lsls r2, r2, #30 + 639 00d4 EED5 bpl .L41 + 396:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** } + 640 .loc 1 396 19 view .LVU184 + 641 00d6 3148 ldr r0, .L71+8 + 642 .LVL50: + 396:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** } + 643 .loc 1 396 19 view .LVU185 + 644 00d8 F1E7 b .L32 + 645 .LVL51: + 646 .L66: + 399:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** { + 647 .loc 1 399 59 discriminator 1 view .LVU186 + 648 00da 2E4B ldr r3, .L71 + 649 .LVL52: + 399:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** { + 650 .loc 1 399 59 discriminator 1 view .LVU187 + 651 00dc 1A68 ldr r2, [r3] + 652 00de 8023 movs r3, #128 + 653 00e0 9B02 lsls r3, r3, #10 + 654 00e2 1000 movs r0, r2 + 655 .LVL53: + 399:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** { + 656 .loc 1 399 59 discriminator 1 view .LVU188 + 657 00e4 1840 ands r0, r3 + 399:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** { + 658 .loc 1 399 55 discriminator 1 view .LVU189 + 659 00e6 1A42 tst r2, r3 + 660 00e8 E9D0 beq .L32 + 401:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** } + 661 .loc 1 401 19 view .LVU190 + 662 00ea 2D48 ldr r0, .L71+12 + 663 00ec E7E7 b .L32 + 664 .LVL54: + 665 .L35: + 408:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** + 666 .loc 1 408 7 is_stmt 1 view .LVU191 + 408:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** + 667 .loc 1 408 16 is_stmt 0 view .LVU192 + 668 00ee 294B ldr r3, .L71 + 669 00f0 1B6B ldr r3, [r3, #48] + 408:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** + 670 .loc 1 408 14 view .LVU193 + 671 00f2 0322 movs r2, #3 + ARM GAS /tmp/ccHuuDpT.s page 24 + + + 672 00f4 1100 movs r1, r2 + 673 00f6 1940 ands r1, r3 + 674 .LVL55: + 411:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** { + 675 .loc 1 411 7 is_stmt 1 view .LVU194 + 411:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** { + 676 .loc 1 411 10 is_stmt 0 view .LVU195 + 677 00f8 1A42 tst r2, r3 + 678 00fa 07D0 beq .L67 + 416:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** { + 679 .loc 1 416 12 is_stmt 1 view .LVU196 + 416:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** { + 680 .loc 1 416 15 is_stmt 0 view .LVU197 + 681 00fc 0329 cmp r1, #3 + 682 00fe 08D0 beq .L68 + 683 .L43: + 421:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** { + 684 .loc 1 421 12 is_stmt 1 view .LVU198 + 421:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** { + 685 .loc 1 421 15 is_stmt 0 view .LVU199 + 686 0100 0129 cmp r1, #1 + 687 0102 0CD0 beq .L69 + 426:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** { + 688 .loc 1 426 12 is_stmt 1 view .LVU200 + 426:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** { + 689 .loc 1 426 15 is_stmt 0 view .LVU201 + 690 0104 0229 cmp r1, #2 + 691 0106 0DD0 beq .L70 + 371:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** + 692 .loc 1 371 12 view .LVU202 + 693 0108 0020 movs r0, #0 + 694 .LVL56: + 371:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** + 695 .loc 1 371 12 view .LVU203 + 696 010a D8E7 b .L32 + 697 .LVL57: + 698 .L67: + 413:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** } + 699 .loc 1 413 9 is_stmt 1 view .LVU204 + 413:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** } + 700 .loc 1 413 21 is_stmt 0 view .LVU205 + 701 010c FFF7FEFF bl HAL_RCC_GetPCLK1Freq + 702 .LVL58: + 413:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** } + 703 .loc 1 413 21 view .LVU206 + 704 0110 D5E7 b .L32 + 705 .LVL59: + 706 .L68: + 416:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** { + 707 .loc 1 416 56 discriminator 1 view .LVU207 + 708 0112 204B ldr r3, .L71 + 709 0114 1B68 ldr r3, [r3] + 416:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** { + 710 .loc 1 416 52 discriminator 1 view .LVU208 + 711 0116 9B07 lsls r3, r3, #30 + 712 0118 F2D5 bpl .L43 + 418:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** } + ARM GAS /tmp/ccHuuDpT.s page 25 + + + 713 .loc 1 418 19 view .LVU209 + 714 011a 1F48 ldr r0, .L71+4 + 715 .LVL60: + 418:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** } + 716 .loc 1 418 19 view .LVU210 + 717 011c CFE7 b .L32 + 718 .LVL61: + 719 .L69: + 423:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** } + 720 .loc 1 423 9 is_stmt 1 view .LVU211 + 423:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** } + 721 .loc 1 423 21 is_stmt 0 view .LVU212 + 722 011e FFF7FEFF bl HAL_RCC_GetSysClockFreq + 723 .LVL62: + 423:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** } + 724 .loc 1 423 21 view .LVU213 + 725 0122 CCE7 b .L32 + 726 .LVL63: + 727 .L70: + 426:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** { + 728 .loc 1 426 56 discriminator 1 view .LVU214 + 729 0124 1B4B ldr r3, .L71 + 730 0126 1B6A ldr r3, [r3, #32] + 731 0128 0222 movs r2, #2 + 732 012a 1000 movs r0, r2 + 733 .LVL64: + 426:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** { + 734 .loc 1 426 56 discriminator 1 view .LVU215 + 735 012c 1840 ands r0, r3 + 426:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** { + 736 .loc 1 426 52 discriminator 1 view .LVU216 + 737 012e 1A42 tst r2, r3 + 738 0130 C5D0 beq .L32 + 428:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** } + 739 .loc 1 428 19 view .LVU217 + 740 0132 8020 movs r0, #128 + 741 0134 0002 lsls r0, r0, #8 + 742 0136 C2E7 b .L32 + 743 .LVL65: + 744 .L45: + 503:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** } + 745 .loc 1 503 9 is_stmt 1 view .LVU218 + 503:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** } + 746 .loc 1 503 21 is_stmt 0 view .LVU219 + 747 0138 FFF7FEFF bl HAL_RCC_GetSysClockFreq + 748 .LVL66: + 503:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** } + 749 .loc 1 503 21 view .LVU220 + 750 013c BFE7 b .L32 + 751 .LVL67: + 752 .L61: + 525:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** } + 753 .loc 1 525 11 is_stmt 1 view .LVU221 + 525:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** } + 754 .loc 1 525 33 is_stmt 0 view .LVU222 + 755 013e 1648 ldr r0, .L71+4 + 756 0140 FFF7FEFF bl __aeabi_uidiv + ARM GAS /tmp/ccHuuDpT.s page 26 + + + 757 .LVL68: + 525:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** } + 758 .loc 1 525 21 view .LVU223 + 759 0144 6043 muls r0, r4 + 760 .LVL69: + 525:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** } + 761 .loc 1 525 21 view .LVU224 + 762 0146 BAE7 b .L32 + 763 .LVL70: + 764 .L62: + 531:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** } + 765 .loc 1 531 11 is_stmt 1 view .LVU225 + 531:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** } + 766 .loc 1 531 36 is_stmt 0 view .LVU226 + 767 0148 1648 ldr r0, .L71+16 + 768 014a FFF7FEFF bl __aeabi_uidiv + 769 .LVL71: + 531:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** } + 770 .loc 1 531 21 view .LVU227 + 771 014e 6043 muls r0, r4 + 772 .LVL72: + 531:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** } + 773 .loc 1 531 21 view .LVU228 + 774 0150 B5E7 b .L32 + 775 .LVL73: + 776 .L46: + 547:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** { + 777 .loc 1 547 55 discriminator 1 view .LVU229 + 778 0152 104B ldr r3, .L71 + 779 0154 5A6B ldr r2, [r3, #52] + 780 0156 8023 movs r3, #128 + 781 0158 9B02 lsls r3, r3, #10 + 782 015a 1000 movs r0, r2 + 783 .LVL74: + 547:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** { + 784 .loc 1 547 55 discriminator 1 view .LVU230 + 785 015c 1840 ands r0, r3 + 547:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** { + 786 .loc 1 547 51 discriminator 1 view .LVU231 + 787 015e 1A42 tst r2, r3 + 788 0160 ADD0 beq .L32 + 549:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** } + 789 .loc 1 549 19 view .LVU232 + 790 0162 1048 ldr r0, .L71+16 + 791 0164 ABE7 b .L32 + 792 .LVL75: + 793 .L33: + 559:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** + 794 .loc 1 559 7 is_stmt 1 view .LVU233 + 559:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** + 795 .loc 1 559 16 is_stmt 0 view .LVU234 + 796 0166 0B4B ldr r3, .L71 + 797 0168 1B6B ldr r3, [r3, #48] + 798 .LVL76: + 562:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** { + 799 .loc 1 562 7 is_stmt 1 view .LVU235 + 562:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** { + ARM GAS /tmp/ccHuuDpT.s page 27 + + + 800 .loc 1 562 10 is_stmt 0 view .LVU236 + 801 016a 5B06 lsls r3, r3, #25 + 802 016c 08D4 bmi .L49 + 803 .LVL77: + 562:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** { + 804 .loc 1 562 48 discriminator 1 view .LVU237 + 805 016e 094B ldr r3, .L71 + 806 0170 1B68 ldr r3, [r3] + 807 0172 0222 movs r2, #2 + 808 0174 1000 movs r0, r2 + 809 .LVL78: + 562:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** { + 810 .loc 1 562 48 discriminator 1 view .LVU238 + 811 0176 1840 ands r0, r3 + 562:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** { + 812 .loc 1 562 44 discriminator 1 view .LVU239 + 813 0178 1A42 tst r2, r3 + 814 017a A0D0 beq .L32 + 564:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** } + 815 .loc 1 564 19 view .LVU240 + 816 017c 0648 ldr r0, .L71+4 + 817 017e 9EE7 b .L32 + 818 .LVL79: + 819 .L49: + 567:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** { + 820 .loc 1 567 53 discriminator 1 view .LVU241 + 821 0180 044B ldr r3, .L71 + 822 0182 1B6A ldr r3, [r3, #32] + 823 0184 0222 movs r2, #2 + 824 0186 1000 movs r0, r2 + 825 .LVL80: + 567:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** { + 826 .loc 1 567 53 discriminator 1 view .LVU242 + 827 0188 1840 ands r0, r3 + 567:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** { + 828 .loc 1 567 49 discriminator 1 view .LVU243 + 829 018a 1A42 tst r2, r3 + 830 018c 97D0 beq .L32 + 569:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** } + 831 .loc 1 569 19 view .LVU244 + 832 018e 8020 movs r0, #128 + 833 0190 0002 lsls r0, r0, #8 + 834 .LVL81: + 579:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** } + 835 .loc 1 579 3 is_stmt 1 view .LVU245 + 579:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** } + 836 .loc 1 579 9 is_stmt 0 view .LVU246 + 837 0192 94E7 b .L32 + 838 .L72: + 839 .align 2 + 840 .L71: + 841 0194 00100240 .word 1073876992 + 842 0198 00127A00 .word 8000000 + 843 019c 409C0000 .word 40000 + 844 01a0 90D00300 .word 250000 + 845 01a4 006CDC02 .word 48000000 + 846 .cfi_endproc + ARM GAS /tmp/ccHuuDpT.s page 28 + + + 847 .LFE42: + 849 .section .text.HAL_RCCEx_CRSConfig,"ax",%progbits + 850 .align 1 + 851 .global HAL_RCCEx_CRSConfig + 852 .syntax unified + 853 .code 16 + 854 .thumb_func + 856 HAL_RCCEx_CRSConfig: + 857 .LVL82: + 858 .LFB43: + 581:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** + 582:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** /** + 583:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** * @} + 584:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** */ + 585:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** + 586:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** #if defined(CRS) + 587:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** + 588:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** /** @defgroup RCCEx_Exported_Functions_Group3 Extended Clock Recovery System Control functions + 589:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** * @brief Extended Clock Recovery System Control functions + 590:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** * + 591:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** @verbatim + 592:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** =============================================================================== + 593:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** ##### Extended Clock Recovery System Control functions ##### + 594:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** =============================================================================== + 595:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** [..] + 596:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** For devices with Clock Recovery System feature (CRS), RCC Extension HAL driver can be used as + 597:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** + 598:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** (#) In System clock config, HSI48 needs to be enabled + 599:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** + 600:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** (#) Enable CRS clock in IP MSP init which will use CRS functions + 601:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** + 602:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** (#) Call CRS functions as follows: + 603:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** (##) Prepare synchronization configuration necessary for HSI48 calibration + 604:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** (+++) Default values can be set for frequency Error Measurement (reload and error lim + 605:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** and also HSI48 oscillator smooth trimming. + 606:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** (+++) Macro __HAL_RCC_CRS_RELOADVALUE_CALCULATE can be also used to calculate + 607:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** directly reload value with target and synchronization frequencies values + 608:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** (##) Call function HAL_RCCEx_CRSConfig which + 609:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** (+++) Reset CRS registers to their default values. + 610:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** (+++) Configure CRS registers with synchronization configuration + 611:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** (+++) Enable automatic calibration and frequency error counter feature + 612:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** Note: When using USB LPM (Link Power Management) and the device is in Sleep mode, the + 613:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** periodic USB SOF will not be generated by the host. No SYNC signal will therefore be + 614:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** provided to the CRS to calibrate the HSI48 on the run. To guarantee the required clock + 615:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** precision after waking up from Sleep mode, the LSE or reference clock on the GPIOs + 616:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** should be used as SYNC signal. + 617:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** + 618:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** (##) A polling function is provided to wait for complete synchronization + 619:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** (+++) Call function HAL_RCCEx_CRSWaitSynchronization() + 620:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** (+++) According to CRS status, user can decide to adjust again the calibration or con + 621:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** application if synchronization is OK + 622:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** + 623:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** (#) User can retrieve information related to synchronization in calling function + 624:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** HAL_RCCEx_CRSGetSynchronizationInfo() + 625:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** + 626:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** (#) Regarding synchronization status and synchronization information, user can try a new cali + 627:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** in changing synchronization configuration and call again HAL_RCCEx_CRSConfig. + ARM GAS /tmp/ccHuuDpT.s page 29 + + + 628:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** Note: When the SYNC event is detected during the downcounting phase (before reaching the + 629:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** it means that the actual frequency is lower than the target (and so, that the TRIM value + 630:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** incremented), while when it is detected during the upcounting phase it means that the ac + 631:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** is higher (and that the TRIM value should be decremented). + 632:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** + 633:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** (#) In interrupt mode, user can resort to the available macros (__HAL_RCC_CRS_XXX_IT). Interr + 634:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** through CRS Handler (RCC_IRQn/RCC_IRQHandler) + 635:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** (++) Call function HAL_RCCEx_CRSConfig() + 636:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** (++) Enable RCC_IRQn (thanks to NVIC functions) + 637:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** (++) Enable CRS interrupt (__HAL_RCC_CRS_ENABLE_IT) + 638:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** (++) Implement CRS status management in the following user callbacks called from + 639:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** HAL_RCCEx_CRS_IRQHandler(): + 640:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** (+++) HAL_RCCEx_CRS_SyncOkCallback() + 641:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** (+++) HAL_RCCEx_CRS_SyncWarnCallback() + 642:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** (+++) HAL_RCCEx_CRS_ExpectedSyncCallback() + 643:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** (+++) HAL_RCCEx_CRS_ErrorCallback() + 644:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** + 645:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** (#) To force a SYNC EVENT, user can use the function HAL_RCCEx_CRSSoftwareSynchronizationGene + 646:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** This function can be called before calling HAL_RCCEx_CRSConfig (for instance in Systick h + 647:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** + 648:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** @endverbatim + 649:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** * @{ + 650:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** */ + 651:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** + 652:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** /** + 653:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** * @brief Start automatic synchronization for polling mode + 654:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** * @param pInit Pointer on RCC_CRSInitTypeDef structure + 655:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** * @retval None + 656:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** */ + 657:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** void HAL_RCCEx_CRSConfig(RCC_CRSInitTypeDef *pInit) + 658:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** { + 859 .loc 1 658 1 is_stmt 1 view -0 + 860 .cfi_startproc + 861 @ args = 0, pretend = 0, frame = 0 + 862 @ frame_needed = 0, uses_anonymous_args = 0 + 863 @ link register save eliminated. + 659:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** uint32_t value = 0U; + 864 .loc 1 659 3 view .LVU248 + 660:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** + 661:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** /* Check the parameters */ + 662:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** assert_param(IS_RCC_CRS_SYNC_DIV(pInit->Prescaler)); + 865 .loc 1 662 3 view .LVU249 + 663:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** assert_param(IS_RCC_CRS_SYNC_SOURCE(pInit->Source)); + 866 .loc 1 663 3 view .LVU250 + 664:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** assert_param(IS_RCC_CRS_SYNC_POLARITY(pInit->Polarity)); + 867 .loc 1 664 3 view .LVU251 + 665:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** assert_param(IS_RCC_CRS_RELOADVALUE(pInit->ReloadValue)); + 868 .loc 1 665 3 view .LVU252 + 666:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** assert_param(IS_RCC_CRS_ERRORLIMIT(pInit->ErrorLimitValue)); + 869 .loc 1 666 3 view .LVU253 + 667:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** assert_param(IS_RCC_CRS_HSI48CALIBRATION(pInit->HSI48CalibrationValue)); + 870 .loc 1 667 3 view .LVU254 + 668:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** + 669:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** /* CONFIGURATION */ + 670:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** + 671:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** /* Before configuration, reset CRS registers to their default values*/ + 672:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** __HAL_RCC_CRS_FORCE_RESET(); + ARM GAS /tmp/ccHuuDpT.s page 30 + + + 871 .loc 1 672 3 view .LVU255 + 872 0000 104B ldr r3, .L74 + 873 0002 1969 ldr r1, [r3, #16] + 874 0004 8022 movs r2, #128 + 875 0006 1205 lsls r2, r2, #20 + 876 0008 0A43 orrs r2, r1 + 877 000a 1A61 str r2, [r3, #16] + 673:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** __HAL_RCC_CRS_RELEASE_RESET(); + 878 .loc 1 673 3 view .LVU256 + 879 000c 1A69 ldr r2, [r3, #16] + 880 000e 0E49 ldr r1, .L74+4 + 881 0010 0A40 ands r2, r1 + 882 0012 1A61 str r2, [r3, #16] + 674:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** + 675:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** /* Set the SYNCDIV[2:0] bits according to Prescaler value */ + 676:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** /* Set the SYNCSRC[1:0] bits according to Source value */ + 677:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** /* Set the SYNCSPOL bit according to Polarity value */ + 678:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** value = (pInit->Prescaler | pInit->Source | pInit->Polarity); + 883 .loc 1 678 3 view .LVU257 + 884 .loc 1 678 17 is_stmt 0 view .LVU258 + 885 0014 0368 ldr r3, [r0] + 886 .loc 1 678 36 view .LVU259 + 887 0016 4268 ldr r2, [r0, #4] + 888 .loc 1 678 29 view .LVU260 + 889 0018 1343 orrs r3, r2 + 890 .loc 1 678 52 view .LVU261 + 891 001a 8268 ldr r2, [r0, #8] + 892 .loc 1 678 9 view .LVU262 + 893 001c 1343 orrs r3, r2 + 894 .LVL83: + 679:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** /* Set the RELOAD[15:0] bits according to ReloadValue value */ + 680:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** value |= pInit->ReloadValue; + 895 .loc 1 680 3 is_stmt 1 view .LVU263 + 896 .loc 1 680 17 is_stmt 0 view .LVU264 + 897 001e C268 ldr r2, [r0, #12] + 898 .loc 1 680 9 view .LVU265 + 899 0020 1343 orrs r3, r2 + 900 .LVL84: + 681:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** /* Set the FELIM[7:0] bits according to ErrorLimitValue value */ + 682:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** value |= (pInit->ErrorLimitValue << CRS_CFGR_FELIM_BITNUMBER); + 901 .loc 1 682 3 is_stmt 1 view .LVU266 + 902 .loc 1 682 18 is_stmt 0 view .LVU267 + 903 0022 0269 ldr r2, [r0, #16] + 904 .loc 1 682 36 view .LVU268 + 905 0024 1204 lsls r2, r2, #16 + 906 .loc 1 682 9 view .LVU269 + 907 0026 1A43 orrs r2, r3 + 908 .LVL85: + 683:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** WRITE_REG(CRS->CFGR, value); + 909 .loc 1 683 3 is_stmt 1 view .LVU270 + 910 0028 084B ldr r3, .L74+8 + 911 002a 5A60 str r2, [r3, #4] + 684:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** + 685:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** /* Adjust HSI48 oscillator smooth trimming */ + 686:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** /* Set the TRIM[5:0] bits according to RCC_CRS_HSI48CalibrationValue value */ + 687:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** MODIFY_REG(CRS->CR, CRS_CR_TRIM, (pInit->HSI48CalibrationValue << CRS_CR_TRIM_BITNUMBER)); + 912 .loc 1 687 3 view .LVU271 + ARM GAS /tmp/ccHuuDpT.s page 31 + + + 913 002c 1A68 ldr r2, [r3] + 914 .LVL86: + 915 .loc 1 687 3 is_stmt 0 view .LVU272 + 916 002e 0849 ldr r1, .L74+12 + 917 0030 0A40 ands r2, r1 + 918 0032 4169 ldr r1, [r0, #20] + 919 0034 0902 lsls r1, r1, #8 + 920 0036 0A43 orrs r2, r1 + 921 0038 1A60 str r2, [r3] + 922 .LVL87: + 688:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** + 689:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** /* START AUTOMATIC SYNCHRONIZATION*/ + 690:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** + 691:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** /* Enable Automatic trimming & Frequency error counter */ + 692:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** SET_BIT(CRS->CR, CRS_CR_AUTOTRIMEN | CRS_CR_CEN); + 923 .loc 1 692 3 is_stmt 1 view .LVU273 + 924 003a 1A68 ldr r2, [r3] + 925 003c 6021 movs r1, #96 + 926 003e 0A43 orrs r2, r1 + 927 0040 1A60 str r2, [r3] + 693:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** } + 928 .loc 1 693 1 is_stmt 0 view .LVU274 + 929 @ sp needed + 930 0042 7047 bx lr + 931 .L75: + 932 .align 2 + 933 .L74: + 934 0044 00100240 .word 1073876992 + 935 0048 FFFFFFF7 .word -134217729 + 936 004c 006C0040 .word 1073769472 + 937 0050 FFC0FFFF .word -16129 + 938 .cfi_endproc + 939 .LFE43: + 941 .section .text.HAL_RCCEx_CRSSoftwareSynchronizationGenerate,"ax",%progbits + 942 .align 1 + 943 .global HAL_RCCEx_CRSSoftwareSynchronizationGenerate + 944 .syntax unified + 945 .code 16 + 946 .thumb_func + 948 HAL_RCCEx_CRSSoftwareSynchronizationGenerate: + 949 .LFB44: + 694:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** + 695:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** /** + 696:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** * @brief Generate the software synchronization event + 697:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** * @retval None + 698:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** */ + 699:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** void HAL_RCCEx_CRSSoftwareSynchronizationGenerate(void) + 700:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** { + 950 .loc 1 700 1 is_stmt 1 view -0 + 951 .cfi_startproc + 952 @ args = 0, pretend = 0, frame = 0 + 953 @ frame_needed = 0, uses_anonymous_args = 0 + 954 @ link register save eliminated. + 701:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** SET_BIT(CRS->CR, CRS_CR_SWSYNC); + 955 .loc 1 701 3 view .LVU276 + 956 0000 024A ldr r2, .L77 + 957 0002 1368 ldr r3, [r2] + ARM GAS /tmp/ccHuuDpT.s page 32 + + + 958 0004 8021 movs r1, #128 + 959 0006 0B43 orrs r3, r1 + 960 0008 1360 str r3, [r2] + 702:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** } + 961 .loc 1 702 1 is_stmt 0 view .LVU277 + 962 @ sp needed + 963 000a 7047 bx lr + 964 .L78: + 965 .align 2 + 966 .L77: + 967 000c 006C0040 .word 1073769472 + 968 .cfi_endproc + 969 .LFE44: + 971 .section .text.HAL_RCCEx_CRSGetSynchronizationInfo,"ax",%progbits + 972 .align 1 + 973 .global HAL_RCCEx_CRSGetSynchronizationInfo + 974 .syntax unified + 975 .code 16 + 976 .thumb_func + 978 HAL_RCCEx_CRSGetSynchronizationInfo: + 979 .LVL88: + 980 .LFB45: + 703:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** + 704:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** /** + 705:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** * @brief Return synchronization info + 706:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** * @param pSynchroInfo Pointer on RCC_CRSSynchroInfoTypeDef structure + 707:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** * @retval None + 708:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** */ + 709:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** void HAL_RCCEx_CRSGetSynchronizationInfo(RCC_CRSSynchroInfoTypeDef *pSynchroInfo) + 710:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** { + 981 .loc 1 710 1 is_stmt 1 view -0 + 982 .cfi_startproc + 983 @ args = 0, pretend = 0, frame = 0 + 984 @ frame_needed = 0, uses_anonymous_args = 0 + 985 @ link register save eliminated. + 711:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** /* Check the parameter */ + 712:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** assert_param(pSynchroInfo != NULL); + 986 .loc 1 712 3 view .LVU279 + 713:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** + 714:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** /* Get the reload value */ + 715:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** pSynchroInfo->ReloadValue = (uint32_t)(READ_BIT(CRS->CFGR, CRS_CFGR_RELOAD)); + 987 .loc 1 715 3 view .LVU280 + 988 .loc 1 715 42 is_stmt 0 view .LVU281 + 989 0000 094A ldr r2, .L80 + 990 0002 5368 ldr r3, [r2, #4] + 991 .loc 1 715 31 view .LVU282 + 992 0004 1B04 lsls r3, r3, #16 + 993 0006 1B0C lsrs r3, r3, #16 + 994 .loc 1 715 29 view .LVU283 + 995 0008 0360 str r3, [r0] + 716:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** + 717:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** /* Get HSI48 oscillator smooth trimming */ + 718:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** pSynchroInfo->HSI48CalibrationValue = (uint32_t)(READ_BIT(CRS->CR, CRS_CR_TRIM) >> CRS_CR_TRIM_BI + 996 .loc 1 718 3 is_stmt 1 view .LVU284 + 997 .loc 1 718 52 is_stmt 0 view .LVU285 + 998 000a 1168 ldr r1, [r2] + 999 .loc 1 718 41 view .LVU286 + ARM GAS /tmp/ccHuuDpT.s page 33 + + + 1000 000c 090A lsrs r1, r1, #8 + 1001 000e 3F23 movs r3, #63 + 1002 0010 0B40 ands r3, r1 + 1003 .loc 1 718 39 view .LVU287 + 1004 0012 4360 str r3, [r0, #4] + 719:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** + 720:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** /* Get Frequency error capture */ + 721:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** pSynchroInfo->FreqErrorCapture = (uint32_t)(READ_BIT(CRS->ISR, CRS_ISR_FECAP) >> CRS_ISR_FECAP_BI + 1005 .loc 1 721 3 is_stmt 1 view .LVU288 + 1006 .loc 1 721 47 is_stmt 0 view .LVU289 + 1007 0014 9368 ldr r3, [r2, #8] + 1008 .loc 1 721 36 view .LVU290 + 1009 0016 1B0C lsrs r3, r3, #16 + 1010 .loc 1 721 34 view .LVU291 + 1011 0018 8360 str r3, [r0, #8] + 722:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** + 723:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** /* Get Frequency error direction */ + 724:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** pSynchroInfo->FreqErrorDirection = (uint32_t)(READ_BIT(CRS->ISR, CRS_ISR_FEDIR)); + 1012 .loc 1 724 3 is_stmt 1 view .LVU292 + 1013 .loc 1 724 49 is_stmt 0 view .LVU293 + 1014 001a 9368 ldr r3, [r2, #8] + 1015 .loc 1 724 38 view .LVU294 + 1016 001c 8022 movs r2, #128 + 1017 001e 1202 lsls r2, r2, #8 + 1018 0020 1340 ands r3, r2 + 1019 .loc 1 724 36 view .LVU295 + 1020 0022 C360 str r3, [r0, #12] + 725:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** } + 1021 .loc 1 725 1 view .LVU296 + 1022 @ sp needed + 1023 0024 7047 bx lr + 1024 .L81: + 1025 0026 C046 .align 2 + 1026 .L80: + 1027 0028 006C0040 .word 1073769472 + 1028 .cfi_endproc + 1029 .LFE45: + 1031 .section .text.HAL_RCCEx_CRSWaitSynchronization,"ax",%progbits + 1032 .align 1 + 1033 .global HAL_RCCEx_CRSWaitSynchronization + 1034 .syntax unified + 1035 .code 16 + 1036 .thumb_func + 1038 HAL_RCCEx_CRSWaitSynchronization: + 1039 .LVL89: + 1040 .LFB46: + 726:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** + 727:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** /** + 728:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** * @brief Wait for CRS Synchronization status. + 729:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** * @param Timeout Duration of the timeout + 730:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** * @note Timeout is based on the maximum time to receive a SYNC event based on synchronization + 731:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** * frequency. + 732:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** * @note If Timeout set to HAL_MAX_DELAY, HAL_TIMEOUT will be never returned. + 733:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** * @retval Combination of Synchronization status + 734:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** * This parameter can be a combination of the following values: + 735:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** * @arg @ref RCC_CRS_TIMEOUT + 736:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** * @arg @ref RCC_CRS_SYNCOK + ARM GAS /tmp/ccHuuDpT.s page 34 + + + 737:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** * @arg @ref RCC_CRS_SYNCWARN + 738:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** * @arg @ref RCC_CRS_SYNCERR + 739:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** * @arg @ref RCC_CRS_SYNCMISS + 740:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** * @arg @ref RCC_CRS_TRIMOVF + 741:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** */ + 742:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** uint32_t HAL_RCCEx_CRSWaitSynchronization(uint32_t Timeout) + 743:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** { + 1041 .loc 1 743 1 is_stmt 1 view -0 + 1042 .cfi_startproc + 1043 @ args = 0, pretend = 0, frame = 0 + 1044 @ frame_needed = 0, uses_anonymous_args = 0 + 1045 .loc 1 743 1 is_stmt 0 view .LVU298 + 1046 0000 70B5 push {r4, r5, r6, lr} + 1047 .cfi_def_cfa_offset 16 + 1048 .cfi_offset 4, -16 + 1049 .cfi_offset 5, -12 + 1050 .cfi_offset 6, -8 + 1051 .cfi_offset 14, -4 + 1052 0002 0500 movs r5, r0 + 744:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** uint32_t crsstatus = RCC_CRS_NONE; + 1053 .loc 1 744 3 is_stmt 1 view .LVU299 + 1054 .LVL90: + 745:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** uint32_t tickstart = 0U; + 1055 .loc 1 745 3 view .LVU300 + 746:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** + 747:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** /* Get timeout */ + 748:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** tickstart = HAL_GetTick(); + 1056 .loc 1 748 3 view .LVU301 + 1057 .loc 1 748 15 is_stmt 0 view .LVU302 + 1058 0004 FFF7FEFF bl HAL_GetTick + 1059 .LVL91: + 1060 .loc 1 748 15 view .LVU303 + 1061 0008 0600 movs r6, r0 + 1062 .LVL92: + 744:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** uint32_t tickstart = 0U; + 1063 .loc 1 744 12 view .LVU304 + 1064 000a 0024 movs r4, #0 + 1065 000c 3AE0 b .L90 + 1066 .LVL93: + 1067 .L101: + 749:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** + 750:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** /* Wait for CRS flag or timeout detection */ + 751:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** do + 752:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** { + 753:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** if(Timeout != HAL_MAX_DELAY) + 754:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** { + 755:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** if((Timeout == 0U) || ((HAL_GetTick() - tickstart) > Timeout)) + 1068 .loc 1 755 31 discriminator 1 view .LVU305 + 1069 000e FFF7FEFF bl HAL_GetTick + 1070 .LVL94: + 1071 .loc 1 755 45 discriminator 1 view .LVU306 + 1072 0012 801B subs r0, r0, r6 + 1073 .loc 1 755 26 discriminator 1 view .LVU307 + 1074 0014 A842 cmp r0, r5 + 1075 0016 3BD8 bhi .L92 + 1076 .LVL95: + 1077 .L83: + ARM GAS /tmp/ccHuuDpT.s page 35 + + + 756:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** { + 757:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** crsstatus = RCC_CRS_TIMEOUT; + 758:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** } + 759:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** } + 760:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** /* Check CRS SYNCOK flag */ + 761:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** if(__HAL_RCC_CRS_GET_FLAG(RCC_CRS_FLAG_SYNCOK)) + 1078 .loc 1 761 5 is_stmt 1 view .LVU308 + 1079 .loc 1 761 8 is_stmt 0 view .LVU309 + 1080 0018 1F4B ldr r3, .L102 + 1081 001a 9B68 ldr r3, [r3, #8] + 1082 .loc 1 761 7 view .LVU310 + 1083 001c DB07 lsls r3, r3, #31 + 1084 001e 04D5 bpl .L84 + 762:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** { + 763:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** /* CRS SYNC event OK */ + 764:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** crsstatus |= RCC_CRS_SYNCOK; + 1085 .loc 1 764 7 is_stmt 1 view .LVU311 + 1086 .loc 1 764 17 is_stmt 0 view .LVU312 + 1087 0020 0223 movs r3, #2 + 1088 0022 1C43 orrs r4, r3 + 1089 .LVL96: + 765:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** + 766:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** /* Clear CRS SYNC event OK bit */ + 767:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** __HAL_RCC_CRS_CLEAR_FLAG(RCC_CRS_FLAG_SYNCOK); + 1090 .loc 1 767 7 is_stmt 1 view .LVU313 + 1091 .loc 1 767 7 view .LVU314 + 1092 .loc 1 767 7 discriminator 2 view .LVU315 + 1093 0024 1C4B ldr r3, .L102 + 1094 0026 0122 movs r2, #1 + 1095 0028 DA60 str r2, [r3, #12] + 1096 .L84: + 1097 .loc 1 767 7 discriminator 4 view .LVU316 + 768:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** } + 769:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** + 770:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** /* Check CRS SYNCWARN flag */ + 771:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** if(__HAL_RCC_CRS_GET_FLAG(RCC_CRS_FLAG_SYNCWARN)) + 1098 .loc 1 771 5 view .LVU317 + 1099 .loc 1 771 8 is_stmt 0 view .LVU318 + 1100 002a 1B4B ldr r3, .L102 + 1101 002c 9B68 ldr r3, [r3, #8] + 1102 .loc 1 771 7 view .LVU319 + 1103 002e 9B07 lsls r3, r3, #30 + 1104 0030 04D5 bpl .L85 + 772:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** { + 773:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** /* CRS SYNC warning */ + 774:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** crsstatus |= RCC_CRS_SYNCWARN; + 1105 .loc 1 774 7 is_stmt 1 view .LVU320 + 1106 .loc 1 774 17 is_stmt 0 view .LVU321 + 1107 0032 0423 movs r3, #4 + 1108 0034 1C43 orrs r4, r3 + 1109 .LVL97: + 775:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** + 776:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** /* Clear CRS SYNCWARN bit */ + 777:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** __HAL_RCC_CRS_CLEAR_FLAG(RCC_CRS_FLAG_SYNCWARN); + 1110 .loc 1 777 7 is_stmt 1 view .LVU322 + 1111 .loc 1 777 7 view .LVU323 + 1112 .loc 1 777 7 discriminator 2 view .LVU324 + ARM GAS /tmp/ccHuuDpT.s page 36 + + + 1113 0036 184B ldr r3, .L102 + 1114 0038 0222 movs r2, #2 + 1115 003a DA60 str r2, [r3, #12] + 1116 .L85: + 1117 .loc 1 777 7 discriminator 4 view .LVU325 + 778:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** } + 779:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** + 780:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** /* Check CRS TRIM overflow flag */ + 781:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** if(__HAL_RCC_CRS_GET_FLAG(RCC_CRS_FLAG_TRIMOVF)) + 1118 .loc 1 781 5 view .LVU326 + 1119 .loc 1 781 8 is_stmt 0 view .LVU327 + 1120 003c 164B ldr r3, .L102 + 1121 003e 9B68 ldr r3, [r3, #8] + 1122 .loc 1 781 7 view .LVU328 + 1123 0040 5B05 lsls r3, r3, #21 + 1124 0042 04D5 bpl .L86 + 782:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** { + 783:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** /* CRS SYNC Error */ + 784:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** crsstatus |= RCC_CRS_TRIMOVF; + 1125 .loc 1 784 7 is_stmt 1 view .LVU329 + 1126 .loc 1 784 17 is_stmt 0 view .LVU330 + 1127 0044 2023 movs r3, #32 + 1128 0046 1C43 orrs r4, r3 + 1129 .LVL98: + 785:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** + 786:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** /* Clear CRS Error bit */ + 787:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** __HAL_RCC_CRS_CLEAR_FLAG(RCC_CRS_FLAG_TRIMOVF); + 1130 .loc 1 787 7 is_stmt 1 view .LVU331 + 1131 .loc 1 787 7 view .LVU332 + 1132 .loc 1 787 7 discriminator 1 view .LVU333 + 1133 0048 134B ldr r3, .L102 + 1134 004a 0422 movs r2, #4 + 1135 004c DA60 str r2, [r3, #12] + 1136 .L86: + 1137 .loc 1 787 7 discriminator 4 view .LVU334 + 788:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** } + 789:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** + 790:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** /* Check CRS Error flag */ + 791:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** if(__HAL_RCC_CRS_GET_FLAG(RCC_CRS_FLAG_SYNCERR)) + 1138 .loc 1 791 5 view .LVU335 + 1139 .loc 1 791 8 is_stmt 0 view .LVU336 + 1140 004e 124B ldr r3, .L102 + 1141 0050 9B68 ldr r3, [r3, #8] + 1142 .loc 1 791 7 view .LVU337 + 1143 0052 DB05 lsls r3, r3, #23 + 1144 0054 04D5 bpl .L87 + 792:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** { + 793:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** /* CRS SYNC Error */ + 794:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** crsstatus |= RCC_CRS_SYNCERR; + 1145 .loc 1 794 7 is_stmt 1 view .LVU338 + 1146 .loc 1 794 17 is_stmt 0 view .LVU339 + 1147 0056 0823 movs r3, #8 + 1148 0058 1C43 orrs r4, r3 + 1149 .LVL99: + 795:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** + 796:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** /* Clear CRS Error bit */ + 797:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** __HAL_RCC_CRS_CLEAR_FLAG(RCC_CRS_FLAG_SYNCERR); + ARM GAS /tmp/ccHuuDpT.s page 37 + + + 1150 .loc 1 797 7 is_stmt 1 view .LVU340 + 1151 .loc 1 797 7 view .LVU341 + 1152 .loc 1 797 7 discriminator 1 view .LVU342 + 1153 005a 0F4B ldr r3, .L102 + 1154 005c 0422 movs r2, #4 + 1155 005e DA60 str r2, [r3, #12] + 1156 .L87: + 1157 .loc 1 797 7 discriminator 4 view .LVU343 + 798:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** } + 799:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** + 800:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** /* Check CRS SYNC Missed flag */ + 801:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** if(__HAL_RCC_CRS_GET_FLAG(RCC_CRS_FLAG_SYNCMISS)) + 1158 .loc 1 801 5 view .LVU344 + 1159 .loc 1 801 8 is_stmt 0 view .LVU345 + 1160 0060 0D4B ldr r3, .L102 + 1161 0062 9B68 ldr r3, [r3, #8] + 1162 .loc 1 801 7 view .LVU346 + 1163 0064 9B05 lsls r3, r3, #22 + 1164 0066 04D5 bpl .L88 + 802:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** { + 803:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** /* CRS SYNC Missed */ + 804:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** crsstatus |= RCC_CRS_SYNCMISS; + 1165 .loc 1 804 7 is_stmt 1 view .LVU347 + 1166 .loc 1 804 17 is_stmt 0 view .LVU348 + 1167 0068 1023 movs r3, #16 + 1168 006a 1C43 orrs r4, r3 + 1169 .LVL100: + 805:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** + 806:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** /* Clear CRS SYNC Missed bit */ + 807:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** __HAL_RCC_CRS_CLEAR_FLAG(RCC_CRS_FLAG_SYNCMISS); + 1170 .loc 1 807 7 is_stmt 1 view .LVU349 + 1171 .loc 1 807 7 view .LVU350 + 1172 .loc 1 807 7 discriminator 1 view .LVU351 + 1173 006c 0A4B ldr r3, .L102 + 1174 006e 0422 movs r2, #4 + 1175 0070 DA60 str r2, [r3, #12] + 1176 .L88: + 1177 .loc 1 807 7 discriminator 4 view .LVU352 + 808:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** } + 809:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** + 810:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** /* Check CRS Expected SYNC flag */ + 811:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** if(__HAL_RCC_CRS_GET_FLAG(RCC_CRS_FLAG_ESYNC)) + 1178 .loc 1 811 5 view .LVU353 + 1179 .loc 1 811 8 is_stmt 0 view .LVU354 + 1180 0072 094B ldr r3, .L102 + 1181 0074 9B68 ldr r3, [r3, #8] + 1182 .loc 1 811 7 view .LVU355 + 1183 0076 1B07 lsls r3, r3, #28 + 1184 0078 02D5 bpl .L89 + 812:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** { + 813:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** /* frequency error counter reached a zero value */ + 814:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** __HAL_RCC_CRS_CLEAR_FLAG(RCC_CRS_FLAG_ESYNC); + 1185 .loc 1 814 7 is_stmt 1 view .LVU356 + 1186 .loc 1 814 7 view .LVU357 + 1187 .loc 1 814 7 discriminator 2 view .LVU358 + 1188 007a 074B ldr r3, .L102 + 1189 007c 0822 movs r2, #8 + ARM GAS /tmp/ccHuuDpT.s page 38 + + + 1190 007e DA60 str r2, [r3, #12] + 1191 .L89: + 1192 .loc 1 814 7 discriminator 4 view .LVU359 + 815:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** } + 816:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** } while(RCC_CRS_NONE == crsstatus); + 1193 .loc 1 816 24 view .LVU360 + 1194 0080 002C cmp r4, #0 + 1195 0082 07D1 bne .L100 + 1196 .LVL101: + 1197 .L90: + 751:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** { + 1198 .loc 1 751 3 view .LVU361 + 753:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** { + 1199 .loc 1 753 5 view .LVU362 + 753:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** { + 1200 .loc 1 753 7 is_stmt 0 view .LVU363 + 1201 0084 6B1C adds r3, r5, #1 + 1202 0086 C7D0 beq .L83 + 755:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** { + 1203 .loc 1 755 7 is_stmt 1 view .LVU364 + 755:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** { + 1204 .loc 1 755 9 is_stmt 0 view .LVU365 + 1205 0088 002D cmp r5, #0 + 1206 008a C0D1 bne .L101 + 757:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** } + 1207 .loc 1 757 19 view .LVU366 + 1208 008c 0124 movs r4, #1 + 1209 .LVL102: + 757:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** } + 1210 .loc 1 757 19 view .LVU367 + 1211 008e C3E7 b .L83 + 1212 .LVL103: + 1213 .L92: + 757:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** } + 1214 .loc 1 757 19 view .LVU368 + 1215 0090 0124 movs r4, #1 + 1216 .LVL104: + 757:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** } + 1217 .loc 1 757 19 view .LVU369 + 1218 0092 C1E7 b .L83 + 1219 .LVL105: + 1220 .L100: + 817:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** + 818:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** return crsstatus; + 1221 .loc 1 818 3 is_stmt 1 view .LVU370 + 819:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** } + 1222 .loc 1 819 1 is_stmt 0 view .LVU371 + 1223 0094 2000 movs r0, r4 + 1224 @ sp needed + 1225 .LVL106: + 1226 .LVL107: + 1227 .LVL108: + 1228 .loc 1 819 1 view .LVU372 + 1229 0096 70BD pop {r4, r5, r6, pc} + 1230 .L103: + 1231 .align 2 + 1232 .L102: + ARM GAS /tmp/ccHuuDpT.s page 39 + + + 1233 0098 006C0040 .word 1073769472 + 1234 .cfi_endproc + 1235 .LFE46: + 1237 .section .text.HAL_RCCEx_CRS_SyncOkCallback,"ax",%progbits + 1238 .align 1 + 1239 .weak HAL_RCCEx_CRS_SyncOkCallback + 1240 .syntax unified + 1241 .code 16 + 1242 .thumb_func + 1244 HAL_RCCEx_CRS_SyncOkCallback: + 1245 .LFB48: + 820:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** + 821:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** /** + 822:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** * @brief Handle the Clock Recovery System interrupt request. + 823:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** * @retval None + 824:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** */ + 825:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** void HAL_RCCEx_CRS_IRQHandler(void) + 826:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** { + 827:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** uint32_t crserror = RCC_CRS_NONE; + 828:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** /* Get current IT flags and IT sources values */ + 829:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** uint32_t itflags = READ_REG(CRS->ISR); + 830:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** uint32_t itsources = READ_REG(CRS->CR); + 831:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** + 832:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** /* Check CRS SYNCOK flag */ + 833:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** if(((itflags & RCC_CRS_FLAG_SYNCOK) != RESET) && ((itsources & RCC_CRS_IT_SYNCOK) != RESET)) + 834:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** { + 835:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** /* Clear CRS SYNC event OK flag */ + 836:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** WRITE_REG(CRS->ICR, CRS_ICR_SYNCOKC); + 837:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** + 838:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** /* user callback */ + 839:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** HAL_RCCEx_CRS_SyncOkCallback(); + 840:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** } + 841:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** /* Check CRS SYNCWARN flag */ + 842:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** else if(((itflags & RCC_CRS_FLAG_SYNCWARN) != RESET) && ((itsources & RCC_CRS_IT_SYNCWARN) != RES + 843:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** { + 844:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** /* Clear CRS SYNCWARN flag */ + 845:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** WRITE_REG(CRS->ICR, CRS_ICR_SYNCWARNC); + 846:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** + 847:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** /* user callback */ + 848:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** HAL_RCCEx_CRS_SyncWarnCallback(); + 849:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** } + 850:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** /* Check CRS Expected SYNC flag */ + 851:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** else if(((itflags & RCC_CRS_FLAG_ESYNC) != RESET) && ((itsources & RCC_CRS_IT_ESYNC) != RESET)) + 852:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** { + 853:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** /* frequency error counter reached a zero value */ + 854:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** WRITE_REG(CRS->ICR, CRS_ICR_ESYNCC); + 855:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** + 856:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** /* user callback */ + 857:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** HAL_RCCEx_CRS_ExpectedSyncCallback(); + 858:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** } + 859:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** /* Check CRS Error flags */ + 860:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** else + 861:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** { + 862:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** if(((itflags & RCC_CRS_FLAG_ERR) != RESET) && ((itsources & RCC_CRS_IT_ERR) != RESET)) + 863:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** { + 864:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** if((itflags & RCC_CRS_FLAG_SYNCERR) != RESET) + 865:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** { + ARM GAS /tmp/ccHuuDpT.s page 40 + + + 866:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** crserror |= RCC_CRS_SYNCERR; + 867:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** } + 868:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** if((itflags & RCC_CRS_FLAG_SYNCMISS) != RESET) + 869:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** { + 870:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** crserror |= RCC_CRS_SYNCMISS; + 871:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** } + 872:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** if((itflags & RCC_CRS_FLAG_TRIMOVF) != RESET) + 873:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** { + 874:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** crserror |= RCC_CRS_TRIMOVF; + 875:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** } + 876:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** + 877:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** /* Clear CRS Error flags */ + 878:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** WRITE_REG(CRS->ICR, CRS_ICR_ERRC); + 879:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** + 880:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** /* user error callback */ + 881:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** HAL_RCCEx_CRS_ErrorCallback(crserror); + 882:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** } + 883:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** } + 884:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** } + 885:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** + 886:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** /** + 887:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** * @brief RCCEx Clock Recovery System SYNCOK interrupt callback. + 888:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** * @retval none + 889:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** */ + 890:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** __weak void HAL_RCCEx_CRS_SyncOkCallback(void) + 891:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** { + 1246 .loc 1 891 1 is_stmt 1 view -0 + 1247 .cfi_startproc + 1248 @ args = 0, pretend = 0, frame = 0 + 1249 @ frame_needed = 0, uses_anonymous_args = 0 + 1250 @ link register save eliminated. + 892:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** /* NOTE : This function should not be modified, when the callback is needed, + 893:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** the @ref HAL_RCCEx_CRS_SyncOkCallback should be implemented in the user file + 894:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** */ + 895:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** } + 1251 .loc 1 895 1 view .LVU374 + 1252 @ sp needed + 1253 0000 7047 bx lr + 1254 .cfi_endproc + 1255 .LFE48: + 1257 .section .text.HAL_RCCEx_CRS_SyncWarnCallback,"ax",%progbits + 1258 .align 1 + 1259 .weak HAL_RCCEx_CRS_SyncWarnCallback + 1260 .syntax unified + 1261 .code 16 + 1262 .thumb_func + 1264 HAL_RCCEx_CRS_SyncWarnCallback: + 1265 .LFB49: + 896:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** + 897:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** /** + 898:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** * @brief RCCEx Clock Recovery System SYNCWARN interrupt callback. + 899:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** * @retval none + 900:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** */ + 901:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** __weak void HAL_RCCEx_CRS_SyncWarnCallback(void) + 902:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** { + 1266 .loc 1 902 1 view -0 + 1267 .cfi_startproc + ARM GAS /tmp/ccHuuDpT.s page 41 + + + 1268 @ args = 0, pretend = 0, frame = 0 + 1269 @ frame_needed = 0, uses_anonymous_args = 0 + 1270 @ link register save eliminated. + 903:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** /* NOTE : This function should not be modified, when the callback is needed, + 904:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** the @ref HAL_RCCEx_CRS_SyncWarnCallback should be implemented in the user file + 905:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** */ + 906:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** } + 1271 .loc 1 906 1 view .LVU376 + 1272 @ sp needed + 1273 0000 7047 bx lr + 1274 .cfi_endproc + 1275 .LFE49: + 1277 .section .text.HAL_RCCEx_CRS_ExpectedSyncCallback,"ax",%progbits + 1278 .align 1 + 1279 .weak HAL_RCCEx_CRS_ExpectedSyncCallback + 1280 .syntax unified + 1281 .code 16 + 1282 .thumb_func + 1284 HAL_RCCEx_CRS_ExpectedSyncCallback: + 1285 .LFB50: + 907:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** + 908:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** /** + 909:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** * @brief RCCEx Clock Recovery System Expected SYNC interrupt callback. + 910:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** * @retval none + 911:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** */ + 912:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** __weak void HAL_RCCEx_CRS_ExpectedSyncCallback(void) + 913:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** { + 1286 .loc 1 913 1 view -0 + 1287 .cfi_startproc + 1288 @ args = 0, pretend = 0, frame = 0 + 1289 @ frame_needed = 0, uses_anonymous_args = 0 + 1290 @ link register save eliminated. + 914:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** /* NOTE : This function should not be modified, when the callback is needed, + 915:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** the @ref HAL_RCCEx_CRS_ExpectedSyncCallback should be implemented in the user file + 916:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** */ + 917:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** } + 1291 .loc 1 917 1 view .LVU378 + 1292 @ sp needed + 1293 0000 7047 bx lr + 1294 .cfi_endproc + 1295 .LFE50: + 1297 .section .text.HAL_RCCEx_CRS_ErrorCallback,"ax",%progbits + 1298 .align 1 + 1299 .weak HAL_RCCEx_CRS_ErrorCallback + 1300 .syntax unified + 1301 .code 16 + 1302 .thumb_func + 1304 HAL_RCCEx_CRS_ErrorCallback: + 1305 .LVL109: + 1306 .LFB51: + 918:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** + 919:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** /** + 920:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** * @brief RCCEx Clock Recovery System Error interrupt callback. + 921:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** * @param Error Combination of Error status. + 922:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** * This parameter can be a combination of the following values: + 923:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** * @arg @ref RCC_CRS_SYNCERR + 924:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** * @arg @ref RCC_CRS_SYNCMISS + ARM GAS /tmp/ccHuuDpT.s page 42 + + + 925:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** * @arg @ref RCC_CRS_TRIMOVF + 926:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** * @retval none + 927:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** */ + 928:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** __weak void HAL_RCCEx_CRS_ErrorCallback(uint32_t Error) + 929:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** { + 1307 .loc 1 929 1 view -0 + 1308 .cfi_startproc + 1309 @ args = 0, pretend = 0, frame = 0 + 1310 @ frame_needed = 0, uses_anonymous_args = 0 + 1311 @ link register save eliminated. + 930:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** /* Prevent unused argument(s) compilation warning */ + 931:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** UNUSED(Error); + 1312 .loc 1 931 3 view .LVU380 + 932:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** + 933:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** /* NOTE : This function should not be modified, when the callback is needed, + 934:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** the @ref HAL_RCCEx_CRS_ErrorCallback should be implemented in the user file + 935:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** */ + 936:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** } + 1313 .loc 1 936 1 is_stmt 0 view .LVU381 + 1314 @ sp needed + 1315 0000 7047 bx lr + 1316 .cfi_endproc + 1317 .LFE51: + 1319 .section .text.HAL_RCCEx_CRS_IRQHandler,"ax",%progbits + 1320 .align 1 + 1321 .global HAL_RCCEx_CRS_IRQHandler + 1322 .syntax unified + 1323 .code 16 + 1324 .thumb_func + 1326 HAL_RCCEx_CRS_IRQHandler: + 1327 .LFB47: + 826:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** uint32_t crserror = RCC_CRS_NONE; + 1328 .loc 1 826 1 is_stmt 1 view -0 + 1329 .cfi_startproc + 1330 @ args = 0, pretend = 0, frame = 0 + 1331 @ frame_needed = 0, uses_anonymous_args = 0 + 1332 0000 10B5 push {r4, lr} + 1333 .cfi_def_cfa_offset 8 + 1334 .cfi_offset 4, -8 + 1335 .cfi_offset 14, -4 + 827:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** /* Get current IT flags and IT sources values */ + 1336 .loc 1 827 3 view .LVU383 + 1337 .LVL110: + 829:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** uint32_t itsources = READ_REG(CRS->CR); + 1338 .loc 1 829 3 view .LVU384 + 829:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** uint32_t itsources = READ_REG(CRS->CR); + 1339 .loc 1 829 12 is_stmt 0 view .LVU385 + 1340 0002 1D4A ldr r2, .L130 + 1341 0004 9368 ldr r3, [r2, #8] + 1342 .LVL111: + 830:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** + 1343 .loc 1 830 3 is_stmt 1 view .LVU386 + 830:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** + 1344 .loc 1 830 12 is_stmt 0 view .LVU387 + 1345 0006 1268 ldr r2, [r2] + 1346 .LVL112: + 833:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** { + ARM GAS /tmp/ccHuuDpT.s page 43 + + + 1347 .loc 1 833 3 is_stmt 1 view .LVU388 + 833:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** { + 1348 .loc 1 833 5 is_stmt 0 view .LVU389 + 1349 0008 D907 lsls r1, r3, #31 + 1350 000a 01D5 bpl .L109 + 833:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** { + 1351 .loc 1 833 49 discriminator 1 view .LVU390 + 1352 000c D107 lsls r1, r2, #31 + 1353 000e 20D4 bmi .L127 + 1354 .L109: + 842:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** { + 1355 .loc 1 842 8 is_stmt 1 view .LVU391 + 842:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** { + 1356 .loc 1 842 10 is_stmt 0 view .LVU392 + 1357 0010 9907 lsls r1, r3, #30 + 1358 0012 01D5 bpl .L111 + 842:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** { + 1359 .loc 1 842 56 discriminator 1 view .LVU393 + 1360 0014 9107 lsls r1, r2, #30 + 1361 0016 22D4 bmi .L128 + 1362 .L111: + 851:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** { + 1363 .loc 1 851 8 is_stmt 1 view .LVU394 + 851:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** { + 1364 .loc 1 851 10 is_stmt 0 view .LVU395 + 1365 0018 1907 lsls r1, r3, #28 + 1366 001a 01D5 bpl .L112 + 851:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** { + 1367 .loc 1 851 53 discriminator 1 view .LVU396 + 1368 001c 1107 lsls r1, r2, #28 + 1369 001e 24D4 bmi .L129 + 1370 .L112: + 862:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** { + 1371 .loc 1 862 5 is_stmt 1 view .LVU397 + 862:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** { + 1372 .loc 1 862 7 is_stmt 0 view .LVU398 + 1373 0020 5907 lsls r1, r3, #29 + 1374 0022 1BD5 bpl .L108 + 862:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** { + 1375 .loc 1 862 48 discriminator 1 view .LVU399 + 1376 0024 5207 lsls r2, r2, #29 + 1377 0026 19D5 bpl .L108 + 1378 .LVL113: + 864:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** { + 1379 .loc 1 864 7 is_stmt 1 view .LVU400 + 864:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** { + 1380 .loc 1 864 19 is_stmt 0 view .LVU401 + 1381 0028 8022 movs r2, #128 + 1382 002a 5200 lsls r2, r2, #1 + 1383 002c 1800 movs r0, r3 + 1384 002e 1040 ands r0, r2 + 864:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** { + 1385 .loc 1 864 9 view .LVU402 + 1386 0030 1342 tst r3, r2 + 1387 0032 00D0 beq .L113 + 866:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** } + 1388 .loc 1 866 18 view .LVU403 + ARM GAS /tmp/ccHuuDpT.s page 44 + + + 1389 0034 0820 movs r0, #8 + 1390 .L113: + 1391 .LVL114: + 868:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** { + 1392 .loc 1 868 7 is_stmt 1 view .LVU404 + 868:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** { + 1393 .loc 1 868 9 is_stmt 0 view .LVU405 + 1394 0036 9A05 lsls r2, r3, #22 + 1395 0038 01D5 bpl .L114 + 870:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** } + 1396 .loc 1 870 9 is_stmt 1 view .LVU406 + 870:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** } + 1397 .loc 1 870 18 is_stmt 0 view .LVU407 + 1398 003a 1022 movs r2, #16 + 1399 003c 1043 orrs r0, r2 + 1400 .LVL115: + 1401 .L114: + 872:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** { + 1402 .loc 1 872 7 is_stmt 1 view .LVU408 + 872:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** { + 1403 .loc 1 872 9 is_stmt 0 view .LVU409 + 1404 003e 5B05 lsls r3, r3, #21 + 1405 0040 01D5 bpl .L115 + 1406 .LVL116: + 874:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** } + 1407 .loc 1 874 9 is_stmt 1 view .LVU410 + 874:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** } + 1408 .loc 1 874 18 is_stmt 0 view .LVU411 + 1409 0042 2023 movs r3, #32 + 1410 0044 1843 orrs r0, r3 + 1411 .LVL117: + 1412 .L115: + 878:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** + 1413 .loc 1 878 7 is_stmt 1 view .LVU412 + 1414 0046 0C4B ldr r3, .L130 + 1415 0048 0422 movs r2, #4 + 1416 004a DA60 str r2, [r3, #12] + 881:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** } + 1417 .loc 1 881 7 view .LVU413 + 1418 004c FFF7FEFF bl HAL_RCCEx_CRS_ErrorCallback + 1419 .LVL118: + 884:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** + 1420 .loc 1 884 1 is_stmt 0 view .LVU414 + 1421 0050 04E0 b .L108 + 1422 .LVL119: + 1423 .L127: + 836:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** + 1424 .loc 1 836 5 is_stmt 1 view .LVU415 + 1425 0052 094B ldr r3, .L130 + 1426 .LVL120: + 836:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** + 1427 .loc 1 836 5 is_stmt 0 view .LVU416 + 1428 0054 0122 movs r2, #1 + 1429 .LVL121: + 836:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** + 1430 .loc 1 836 5 view .LVU417 + 1431 0056 DA60 str r2, [r3, #12] + ARM GAS /tmp/ccHuuDpT.s page 45 + + + 839:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** } + 1432 .loc 1 839 5 is_stmt 1 view .LVU418 + 1433 0058 FFF7FEFF bl HAL_RCCEx_CRS_SyncOkCallback + 1434 .LVL122: + 1435 .L108: + 884:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** + 1436 .loc 1 884 1 is_stmt 0 view .LVU419 + 1437 @ sp needed + 1438 005c 10BD pop {r4, pc} + 1439 .LVL123: + 1440 .L128: + 845:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** + 1441 .loc 1 845 5 is_stmt 1 view .LVU420 + 1442 005e 064B ldr r3, .L130 + 1443 .LVL124: + 845:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** + 1444 .loc 1 845 5 is_stmt 0 view .LVU421 + 1445 0060 0222 movs r2, #2 + 1446 .LVL125: + 845:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** + 1447 .loc 1 845 5 view .LVU422 + 1448 0062 DA60 str r2, [r3, #12] + 848:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** } + 1449 .loc 1 848 5 is_stmt 1 view .LVU423 + 1450 0064 FFF7FEFF bl HAL_RCCEx_CRS_SyncWarnCallback + 1451 .LVL126: + 1452 0068 F8E7 b .L108 + 1453 .LVL127: + 1454 .L129: + 854:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** + 1455 .loc 1 854 5 view .LVU424 + 1456 006a 034B ldr r3, .L130 + 1457 .LVL128: + 854:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** + 1458 .loc 1 854 5 is_stmt 0 view .LVU425 + 1459 006c 0822 movs r2, #8 + 1460 .LVL129: + 854:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** + 1461 .loc 1 854 5 view .LVU426 + 1462 006e DA60 str r2, [r3, #12] + 857:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** } + 1463 .loc 1 857 5 is_stmt 1 view .LVU427 + 1464 0070 FFF7FEFF bl HAL_RCCEx_CRS_ExpectedSyncCallback + 1465 .LVL130: + 1466 0074 F2E7 b .L108 + 1467 .L131: + 1468 0076 C046 .align 2 + 1469 .L130: + 1470 0078 006C0040 .word 1073769472 + 1471 .cfi_endproc + 1472 .LFE47: + 1474 .text + 1475 .Letext0: + 1476 .file 2 "/home/chiangni/.config/VSCodium/User/globalStorage/bmd.stm32-for-vscode/@xpack-dev-tools/ + 1477 .file 3 "/home/chiangni/.config/VSCodium/User/globalStorage/bmd.stm32-for-vscode/@xpack-dev-tools/ + 1478 .file 4 "Drivers/CMSIS/Device/ST/STM32F0xx/Include/stm32f042x6.h" + 1479 .file 5 "Drivers/CMSIS/Device/ST/STM32F0xx/Include/stm32f0xx.h" + ARM GAS /tmp/ccHuuDpT.s page 46 + + + 1480 .file 6 "Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_def.h" + 1481 .file 7 "Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_rcc_ex.h" + 1482 .file 8 "Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_rcc.h" + 1483 .file 9 "Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal.h" + ARM GAS /tmp/ccHuuDpT.s page 47 + + +DEFINED SYMBOLS + *ABS*:00000000 stm32f0xx_hal_rcc_ex.c + /tmp/ccHuuDpT.s:19 .text.HAL_RCCEx_PeriphCLKConfig:00000000 $t + /tmp/ccHuuDpT.s:25 .text.HAL_RCCEx_PeriphCLKConfig:00000000 HAL_RCCEx_PeriphCLKConfig + /tmp/ccHuuDpT.s:327 .text.HAL_RCCEx_PeriphCLKConfig:00000130 $d + /tmp/ccHuuDpT.s:337 .text.HAL_RCCEx_GetPeriphCLKConfig:00000000 $t + /tmp/ccHuuDpT.s:343 .text.HAL_RCCEx_GetPeriphCLKConfig:00000000 HAL_RCCEx_GetPeriphCLKConfig + /tmp/ccHuuDpT.s:406 .text.HAL_RCCEx_GetPeriphCLKConfig:0000003c $d + /tmp/ccHuuDpT.s:415 .text.HAL_RCCEx_GetPeriphCLKFreq:00000000 $t + /tmp/ccHuuDpT.s:421 .text.HAL_RCCEx_GetPeriphCLKFreq:00000000 HAL_RCCEx_GetPeriphCLKFreq + /tmp/ccHuuDpT.s:841 .text.HAL_RCCEx_GetPeriphCLKFreq:00000194 $d + /tmp/ccHuuDpT.s:850 .text.HAL_RCCEx_CRSConfig:00000000 $t + /tmp/ccHuuDpT.s:856 .text.HAL_RCCEx_CRSConfig:00000000 HAL_RCCEx_CRSConfig + /tmp/ccHuuDpT.s:934 .text.HAL_RCCEx_CRSConfig:00000044 $d + /tmp/ccHuuDpT.s:942 .text.HAL_RCCEx_CRSSoftwareSynchronizationGenerate:00000000 $t + /tmp/ccHuuDpT.s:948 .text.HAL_RCCEx_CRSSoftwareSynchronizationGenerate:00000000 HAL_RCCEx_CRSSoftwareSynchronizationGenerate + /tmp/ccHuuDpT.s:967 .text.HAL_RCCEx_CRSSoftwareSynchronizationGenerate:0000000c $d + /tmp/ccHuuDpT.s:972 .text.HAL_RCCEx_CRSGetSynchronizationInfo:00000000 $t + /tmp/ccHuuDpT.s:978 .text.HAL_RCCEx_CRSGetSynchronizationInfo:00000000 HAL_RCCEx_CRSGetSynchronizationInfo + /tmp/ccHuuDpT.s:1027 .text.HAL_RCCEx_CRSGetSynchronizationInfo:00000028 $d + /tmp/ccHuuDpT.s:1032 .text.HAL_RCCEx_CRSWaitSynchronization:00000000 $t + /tmp/ccHuuDpT.s:1038 .text.HAL_RCCEx_CRSWaitSynchronization:00000000 HAL_RCCEx_CRSWaitSynchronization + /tmp/ccHuuDpT.s:1233 .text.HAL_RCCEx_CRSWaitSynchronization:00000098 $d + /tmp/ccHuuDpT.s:1238 .text.HAL_RCCEx_CRS_SyncOkCallback:00000000 $t + /tmp/ccHuuDpT.s:1244 .text.HAL_RCCEx_CRS_SyncOkCallback:00000000 HAL_RCCEx_CRS_SyncOkCallback + /tmp/ccHuuDpT.s:1258 .text.HAL_RCCEx_CRS_SyncWarnCallback:00000000 $t + /tmp/ccHuuDpT.s:1264 .text.HAL_RCCEx_CRS_SyncWarnCallback:00000000 HAL_RCCEx_CRS_SyncWarnCallback + /tmp/ccHuuDpT.s:1278 .text.HAL_RCCEx_CRS_ExpectedSyncCallback:00000000 $t + /tmp/ccHuuDpT.s:1284 .text.HAL_RCCEx_CRS_ExpectedSyncCallback:00000000 HAL_RCCEx_CRS_ExpectedSyncCallback + /tmp/ccHuuDpT.s:1298 .text.HAL_RCCEx_CRS_ErrorCallback:00000000 $t + /tmp/ccHuuDpT.s:1304 .text.HAL_RCCEx_CRS_ErrorCallback:00000000 HAL_RCCEx_CRS_ErrorCallback + /tmp/ccHuuDpT.s:1320 .text.HAL_RCCEx_CRS_IRQHandler:00000000 $t + /tmp/ccHuuDpT.s:1326 .text.HAL_RCCEx_CRS_IRQHandler:00000000 HAL_RCCEx_CRS_IRQHandler + /tmp/ccHuuDpT.s:1470 .text.HAL_RCCEx_CRS_IRQHandler:00000078 $d + +UNDEFINED SYMBOLS +HAL_GetTick +__aeabi_uidiv +HAL_RCC_GetPCLK1Freq +HAL_RCC_GetSysClockFreq diff --git a/Software/build/stm32f0xx_hal_rcc_ex.o b/Software/build/stm32f0xx_hal_rcc_ex.o new file mode 100644 index 0000000..4d6fef6 Binary files /dev/null and b/Software/build/stm32f0xx_hal_rcc_ex.o differ diff --git a/Software/build/stm32f0xx_hal_tim.d b/Software/build/stm32f0xx_hal_tim.d new file mode 100644 index 0000000..963c3de --- /dev/null +++ b/Software/build/stm32f0xx_hal_tim.d @@ -0,0 +1,60 @@ +build/stm32f0xx_hal_tim.o: \ + Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c \ + Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal.h \ + Core/Inc/stm32f0xx_hal_conf.h \ + Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_rcc.h \ + Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_def.h \ + Drivers/CMSIS/Device/ST/STM32F0xx/Include/stm32f0xx.h \ + Drivers/CMSIS/Device/ST/STM32F0xx/Include/stm32f042x6.h \ + Drivers/CMSIS/Include/core_cm0.h Drivers/CMSIS/Include/cmsis_version.h \ + Drivers/CMSIS/Include/cmsis_compiler.h Drivers/CMSIS/Include/cmsis_gcc.h \ + Drivers/CMSIS/Device/ST/STM32F0xx/Include/system_stm32f0xx.h \ + Drivers/STM32F0xx_HAL_Driver/Inc/Legacy/stm32_hal_legacy.h \ + Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_rcc_ex.h \ + Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_gpio.h \ + Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_gpio_ex.h \ + Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_exti.h \ + Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_dma.h \ + Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_dma_ex.h \ + Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_cortex.h \ + Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_adc.h \ + Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_adc_ex.h \ + Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_can.h \ + Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_flash.h \ + Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_flash_ex.h \ + Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_i2c.h \ + Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_i2c_ex.h \ + Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_pwr.h \ + Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_pwr_ex.h \ + Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_tim.h \ + Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_tim_ex.h +Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal.h: +Core/Inc/stm32f0xx_hal_conf.h: +Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_rcc.h: +Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_def.h: +Drivers/CMSIS/Device/ST/STM32F0xx/Include/stm32f0xx.h: +Drivers/CMSIS/Device/ST/STM32F0xx/Include/stm32f042x6.h: +Drivers/CMSIS/Include/core_cm0.h: +Drivers/CMSIS/Include/cmsis_version.h: +Drivers/CMSIS/Include/cmsis_compiler.h: +Drivers/CMSIS/Include/cmsis_gcc.h: +Drivers/CMSIS/Device/ST/STM32F0xx/Include/system_stm32f0xx.h: +Drivers/STM32F0xx_HAL_Driver/Inc/Legacy/stm32_hal_legacy.h: +Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_rcc_ex.h: +Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_gpio.h: +Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_gpio_ex.h: +Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_exti.h: +Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_dma.h: +Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_dma_ex.h: +Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_cortex.h: +Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_adc.h: +Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_adc_ex.h: +Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_can.h: +Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_flash.h: +Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_flash_ex.h: +Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_i2c.h: +Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_i2c_ex.h: +Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_pwr.h: +Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_pwr_ex.h: +Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_tim.h: +Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_tim_ex.h: diff --git a/Software/build/stm32f0xx_hal_tim.lst b/Software/build/stm32f0xx_hal_tim.lst new file mode 100644 index 0000000..b34f536 --- /dev/null +++ b/Software/build/stm32f0xx_hal_tim.lst @@ -0,0 +1,29585 @@ +ARM GAS /tmp/ccMtK8ce.s page 1 + + + 1 .cpu cortex-m0 + 2 .arch armv6s-m + 3 .fpu softvfp + 4 .eabi_attribute 20, 1 + 5 .eabi_attribute 21, 1 + 6 .eabi_attribute 23, 3 + 7 .eabi_attribute 24, 1 + 8 .eabi_attribute 25, 1 + 9 .eabi_attribute 26, 1 + 10 .eabi_attribute 30, 1 + 11 .eabi_attribute 34, 0 + 12 .eabi_attribute 18, 4 + 13 .file "stm32f0xx_hal_tim.c" + 14 .text + 15 .Ltext0: + 16 .cfi_sections .debug_frame + 17 .file 1 "Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c" + 18 .section .text.TIM_OC1_SetConfig,"ax",%progbits + 19 .align 1 + 20 .syntax unified + 21 .code 16 + 22 .thumb_func + 24 TIM_OC1_SetConfig: + 25 .LVL0: + 26 .LFB145: + 1:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** /** + 2:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** ****************************************************************************** + 3:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** * @file stm32f0xx_hal_tim.c + 4:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** * @author MCD Application Team + 5:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** * @brief TIM HAL module driver. + 6:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** * This file provides firmware functions to manage the following + 7:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** * functionalities of the Timer (TIM) peripheral: + 8:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** * + TIM Time Base Initialization + 9:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** * + TIM Time Base Start + 10:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** * + TIM Time Base Start Interruption + 11:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** * + TIM Time Base Start DMA + 12:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** * + TIM Output Compare/PWM Initialization + 13:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** * + TIM Output Compare/PWM Channel Configuration + 14:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** * + TIM Output Compare/PWM Start + 15:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** * + TIM Output Compare/PWM Start Interruption + 16:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** * + TIM Output Compare/PWM Start DMA + 17:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** * + TIM Input Capture Initialization + 18:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** * + TIM Input Capture Channel Configuration + 19:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** * + TIM Input Capture Start + 20:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** * + TIM Input Capture Start Interruption + 21:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** * + TIM Input Capture Start DMA + 22:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** * + TIM One Pulse Initialization + 23:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** * + TIM One Pulse Channel Configuration + 24:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** * + TIM One Pulse Start + 25:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** * + TIM Encoder Interface Initialization + 26:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** * + TIM Encoder Interface Start + 27:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** * + TIM Encoder Interface Start Interruption + 28:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** * + TIM Encoder Interface Start DMA + 29:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** * + Commutation Event configuration with Interruption and DMA + 30:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** * + TIM OCRef clear configuration + 31:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** * + TIM External Clock configuration + 32:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** ****************************************************************************** + ARM GAS /tmp/ccMtK8ce.s page 2 + + + 33:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** * @attention + 34:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** * + 35:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** * Copyright (c) 2016 STMicroelectronics. + 36:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** * All rights reserved. + 37:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** * + 38:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** * This software is licensed under terms that can be found in the LICENSE file + 39:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** * in the root directory of this software component. + 40:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** * If no LICENSE file comes with this software, it is provided AS-IS. + 41:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** * + 42:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** ****************************************************************************** + 43:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** @verbatim + 44:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** ============================================================================== + 45:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** ##### TIMER Generic features ##### + 46:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** ============================================================================== + 47:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** [..] The Timer features include: + 48:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** (#) 16-bit up, down, up/down auto-reload counter. + 49:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** (#) 16-bit programmable prescaler allowing dividing (also on the fly) the + 50:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** counter clock frequency either by any factor between 1 and 65536. + 51:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** (#) Up to 4 independent channels for: + 52:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** (++) Input Capture + 53:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** (++) Output Compare + 54:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** (++) PWM generation (Edge and Center-aligned Mode) + 55:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** (++) One-pulse mode output + 56:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** (#) Synchronization circuit to control the timer with external signals and to interconnect + 57:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** several timers together. + 58:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** (#) Supports incremental encoder for positioning purposes + 59:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 60:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** ##### How to use this driver ##### + 61:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** ============================================================================== + 62:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** [..] + 63:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** (#) Initialize the TIM low level resources by implementing the following functions + 64:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** depending on the selected feature: + 65:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** (++) Time Base : HAL_TIM_Base_MspInit() + 66:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** (++) Input Capture : HAL_TIM_IC_MspInit() + 67:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** (++) Output Compare : HAL_TIM_OC_MspInit() + 68:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** (++) PWM generation : HAL_TIM_PWM_MspInit() + 69:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** (++) One-pulse mode output : HAL_TIM_OnePulse_MspInit() + 70:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** (++) Encoder mode output : HAL_TIM_Encoder_MspInit() + 71:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 72:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** (#) Initialize the TIM low level resources : + 73:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** (##) Enable the TIM interface clock using __HAL_RCC_TIMx_CLK_ENABLE(); + 74:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** (##) TIM pins configuration + 75:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** (+++) Enable the clock for the TIM GPIOs using the following function: + 76:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** __HAL_RCC_GPIOx_CLK_ENABLE(); + 77:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** (+++) Configure these TIM pins in Alternate function mode using HAL_GPIO_Init(); + 78:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 79:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** (#) The external Clock can be configured, if needed (the default clock is the + 80:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** internal clock from the APBx), using the following function: + 81:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** HAL_TIM_ConfigClockSource, the clock configuration should be done before + 82:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** any start function. + 83:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 84:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** (#) Configure the TIM in the desired functioning mode using one of the + 85:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** Initialization function of this driver: + 86:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** (++) HAL_TIM_Base_Init: to use the Timer to generate a simple time base + 87:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** (++) HAL_TIM_OC_Init and HAL_TIM_OC_ConfigChannel: to use the Timer to generate an + 88:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** Output Compare signal. + 89:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** (++) HAL_TIM_PWM_Init and HAL_TIM_PWM_ConfigChannel: to use the Timer to generate a + ARM GAS /tmp/ccMtK8ce.s page 3 + + + 90:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** PWM signal. + 91:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** (++) HAL_TIM_IC_Init and HAL_TIM_IC_ConfigChannel: to use the Timer to measure an + 92:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** external signal. + 93:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** (++) HAL_TIM_OnePulse_Init and HAL_TIM_OnePulse_ConfigChannel: to use the Timer + 94:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** in One Pulse Mode. + 95:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** (++) HAL_TIM_Encoder_Init: to use the Timer Encoder Interface. + 96:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 97:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** (#) Activate the TIM peripheral using one of the start functions depending from the feature us + 98:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** (++) Time Base : HAL_TIM_Base_Start(), HAL_TIM_Base_Start_DMA(), HAL_TIM_Base_Start_IT() + 99:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** (++) Input Capture : HAL_TIM_IC_Start(), HAL_TIM_IC_Start_DMA(), HAL_TIM_IC_Start_IT() + 100:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** (++) Output Compare : HAL_TIM_OC_Start(), HAL_TIM_OC_Start_DMA(), HAL_TIM_OC_Start_IT() + 101:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** (++) PWM generation : HAL_TIM_PWM_Start(), HAL_TIM_PWM_Start_DMA(), HAL_TIM_PWM_Start_IT + 102:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** (++) One-pulse mode output : HAL_TIM_OnePulse_Start(), HAL_TIM_OnePulse_Start_IT() + 103:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** (++) Encoder mode output : HAL_TIM_Encoder_Start(), HAL_TIM_Encoder_Start_DMA(), HAL_TIM + 104:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 105:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** (#) The DMA Burst is managed with the two following functions: + 106:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** HAL_TIM_DMABurst_WriteStart() + 107:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** HAL_TIM_DMABurst_ReadStart() + 108:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 109:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** *** Callback registration *** + 110:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** ============================================= + 111:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 112:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** [..] + 113:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** The compilation define USE_HAL_TIM_REGISTER_CALLBACKS when set to 1 + 114:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** allows the user to configure dynamically the driver callbacks. + 115:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 116:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** [..] + 117:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** Use Function HAL_TIM_RegisterCallback() to register a callback. + 118:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** HAL_TIM_RegisterCallback() takes as parameters the HAL peripheral handle, + 119:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** the Callback ID and a pointer to the user callback function. + 120:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 121:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** [..] + 122:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** Use function HAL_TIM_UnRegisterCallback() to reset a callback to the default + 123:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** weak function. + 124:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** HAL_TIM_UnRegisterCallback takes as parameters the HAL peripheral handle, + 125:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** and the Callback ID. + 126:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 127:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** [..] + 128:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** These functions allow to register/unregister following callbacks: + 129:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** (+) Base_MspInitCallback : TIM Base Msp Init Callback. + 130:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** (+) Base_MspDeInitCallback : TIM Base Msp DeInit Callback. + 131:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** (+) IC_MspInitCallback : TIM IC Msp Init Callback. + 132:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** (+) IC_MspDeInitCallback : TIM IC Msp DeInit Callback. + 133:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** (+) OC_MspInitCallback : TIM OC Msp Init Callback. + 134:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** (+) OC_MspDeInitCallback : TIM OC Msp DeInit Callback. + 135:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** (+) PWM_MspInitCallback : TIM PWM Msp Init Callback. + 136:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** (+) PWM_MspDeInitCallback : TIM PWM Msp DeInit Callback. + 137:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** (+) OnePulse_MspInitCallback : TIM One Pulse Msp Init Callback. + 138:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** (+) OnePulse_MspDeInitCallback : TIM One Pulse Msp DeInit Callback. + 139:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** (+) Encoder_MspInitCallback : TIM Encoder Msp Init Callback. + 140:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** (+) Encoder_MspDeInitCallback : TIM Encoder Msp DeInit Callback. + 141:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** (+) HallSensor_MspInitCallback : TIM Hall Sensor Msp Init Callback. + 142:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** (+) HallSensor_MspDeInitCallback : TIM Hall Sensor Msp DeInit Callback. + 143:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** (+) PeriodElapsedCallback : TIM Period Elapsed Callback. + 144:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** (+) PeriodElapsedHalfCpltCallback : TIM Period Elapsed half complete Callback. + 145:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** (+) TriggerCallback : TIM Trigger Callback. + 146:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** (+) TriggerHalfCpltCallback : TIM Trigger half complete Callback. + ARM GAS /tmp/ccMtK8ce.s page 4 + + + 147:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** (+) IC_CaptureCallback : TIM Input Capture Callback. + 148:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** (+) IC_CaptureHalfCpltCallback : TIM Input Capture half complete Callback. + 149:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** (+) OC_DelayElapsedCallback : TIM Output Compare Delay Elapsed Callback. + 150:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** (+) PWM_PulseFinishedCallback : TIM PWM Pulse Finished Callback. + 151:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** (+) PWM_PulseFinishedHalfCpltCallback : TIM PWM Pulse Finished half complete Callback. + 152:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** (+) ErrorCallback : TIM Error Callback. + 153:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** (+) CommutationCallback : TIM Commutation Callback. + 154:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** (+) CommutationHalfCpltCallback : TIM Commutation half complete Callback. + 155:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** (+) BreakCallback : TIM Break Callback. + 156:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 157:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** [..] + 158:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** By default, after the Init and when the state is HAL_TIM_STATE_RESET + 159:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** all interrupt callbacks are set to the corresponding weak functions: + 160:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** examples HAL_TIM_TriggerCallback(), HAL_TIM_ErrorCallback(). + 161:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 162:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** [..] + 163:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** Exception done for MspInit and MspDeInit functions that are reset to the legacy weak + 164:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** functionalities in the Init / DeInit only when these callbacks are null + 165:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** (not registered beforehand). If not, MspInit or MspDeInit are not null, the Init / DeInit + 166:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** keep and use the user MspInit / MspDeInit callbacks(registered beforehand) + 167:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 168:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** [..] + 169:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** Callbacks can be registered / unregistered in HAL_TIM_STATE_READY state only. + 170:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** Exception done MspInit / MspDeInit that can be registered / unregistered + 171:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** in HAL_TIM_STATE_READY or HAL_TIM_STATE_RESET state, + 172:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** thus registered(user) MspInit / DeInit callbacks can be used during the Init / DeInit. + 173:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** In that case first register the MspInit/MspDeInit user callbacks + 174:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** using HAL_TIM_RegisterCallback() before calling DeInit or Init function. + 175:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 176:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** [..] + 177:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** When The compilation define USE_HAL_TIM_REGISTER_CALLBACKS is set to 0 or + 178:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** not defined, the callback registration feature is not available and all callbacks + 179:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** are set to the corresponding weak functions. + 180:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 181:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** @endverbatim + 182:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** ****************************************************************************** + 183:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** */ + 184:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 185:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** /* Includes ------------------------------------------------------------------*/ + 186:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** #include "stm32f0xx_hal.h" + 187:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 188:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** /** @addtogroup STM32F0xx_HAL_Driver + 189:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** * @{ + 190:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** */ + 191:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 192:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** /** @defgroup TIM TIM + 193:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** * @brief TIM HAL module driver + 194:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** * @{ + 195:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** */ + 196:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 197:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** #ifdef HAL_TIM_MODULE_ENABLED + 198:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 199:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** /* Private typedef -----------------------------------------------------------*/ + 200:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** /* Private define ------------------------------------------------------------*/ + 201:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** /* Private macros ------------------------------------------------------------*/ + 202:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** /* Private variables ---------------------------------------------------------*/ + 203:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** /* Private function prototypes -----------------------------------------------*/ + ARM GAS /tmp/ccMtK8ce.s page 5 + + + 204:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** /** @addtogroup TIM_Private_Functions + 205:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** * @{ + 206:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** */ + 207:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** static void TIM_OC1_SetConfig(TIM_TypeDef *TIMx, const TIM_OC_InitTypeDef *OC_Config); + 208:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** static void TIM_OC3_SetConfig(TIM_TypeDef *TIMx, const TIM_OC_InitTypeDef *OC_Config); + 209:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** static void TIM_OC4_SetConfig(TIM_TypeDef *TIMx, const TIM_OC_InitTypeDef *OC_Config); + 210:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** static void TIM_TI1_ConfigInputStage(TIM_TypeDef *TIMx, uint32_t TIM_ICPolarity, uint32_t TIM_ICFil + 211:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** static void TIM_TI2_SetConfig(TIM_TypeDef *TIMx, uint32_t TIM_ICPolarity, uint32_t TIM_ICSelection, + 212:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** uint32_t TIM_ICFilter); + 213:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** static void TIM_TI2_ConfigInputStage(TIM_TypeDef *TIMx, uint32_t TIM_ICPolarity, uint32_t TIM_ICFil + 214:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** static void TIM_TI3_SetConfig(TIM_TypeDef *TIMx, uint32_t TIM_ICPolarity, uint32_t TIM_ICSelection, + 215:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** uint32_t TIM_ICFilter); + 216:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** static void TIM_TI4_SetConfig(TIM_TypeDef *TIMx, uint32_t TIM_ICPolarity, uint32_t TIM_ICSelection, + 217:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** uint32_t TIM_ICFilter); + 218:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** static void TIM_ITRx_SetConfig(TIM_TypeDef *TIMx, uint32_t InputTriggerSource); + 219:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** static void TIM_DMAPeriodElapsedCplt(DMA_HandleTypeDef *hdma); + 220:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** static void TIM_DMAPeriodElapsedHalfCplt(DMA_HandleTypeDef *hdma); + 221:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** static void TIM_DMADelayPulseCplt(DMA_HandleTypeDef *hdma); + 222:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** static void TIM_DMATriggerCplt(DMA_HandleTypeDef *hdma); + 223:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** static void TIM_DMATriggerHalfCplt(DMA_HandleTypeDef *hdma); + 224:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** static HAL_StatusTypeDef TIM_SlaveTimer_SetConfig(TIM_HandleTypeDef *htim, + 225:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** const TIM_SlaveConfigTypeDef *sSlaveConfig); + 226:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** /** + 227:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** * @} + 228:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** */ + 229:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** /* Exported functions --------------------------------------------------------*/ + 230:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 231:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** /** @defgroup TIM_Exported_Functions TIM Exported Functions + 232:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** * @{ + 233:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** */ + 234:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 235:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** /** @defgroup TIM_Exported_Functions_Group1 TIM Time Base functions + 236:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** * @brief Time Base functions + 237:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** * + 238:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** @verbatim + 239:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** ============================================================================== + 240:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** ##### Time Base functions ##### + 241:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** ============================================================================== + 242:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** [..] + 243:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** This section provides functions allowing to: + 244:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** (+) Initialize and configure the TIM base. + 245:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** (+) De-initialize the TIM base. + 246:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** (+) Start the Time Base. + 247:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** (+) Stop the Time Base. + 248:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** (+) Start the Time Base and enable interrupt. + 249:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** (+) Stop the Time Base and disable interrupt. + 250:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** (+) Start the Time Base and enable DMA transfer. + 251:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** (+) Stop the Time Base and disable DMA transfer. + 252:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 253:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** @endverbatim + 254:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** * @{ + 255:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** */ + 256:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** /** + 257:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** * @brief Initializes the TIM Time base Unit according to the specified + 258:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** * parameters in the TIM_HandleTypeDef and initialize the associated handle. + 259:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** * @note Switching from Center Aligned counter mode to Edge counter mode (or reverse) + 260:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** * requires a timer reset to avoid unexpected direction + ARM GAS /tmp/ccMtK8ce.s page 6 + + + 261:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** * due to DIR bit readonly in center aligned mode. + 262:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** * Ex: call @ref HAL_TIM_Base_DeInit() before HAL_TIM_Base_Init() + 263:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** * @param htim TIM Base handle + 264:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** * @retval HAL status + 265:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** */ + 266:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** HAL_StatusTypeDef HAL_TIM_Base_Init(TIM_HandleTypeDef *htim) + 267:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** { + 268:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** /* Check the TIM handle allocation */ + 269:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** if (htim == NULL) + 270:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** { + 271:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** return HAL_ERROR; + 272:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** } + 273:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 274:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** /* Check the parameters */ + 275:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** assert_param(IS_TIM_INSTANCE(htim->Instance)); + 276:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** assert_param(IS_TIM_COUNTER_MODE(htim->Init.CounterMode)); + 277:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** assert_param(IS_TIM_CLOCKDIVISION_DIV(htim->Init.ClockDivision)); + 278:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** assert_param(IS_TIM_PERIOD(htim, htim->Init.Period)); + 279:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** assert_param(IS_TIM_AUTORELOAD_PRELOAD(htim->Init.AutoReloadPreload)); + 280:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 281:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** if (htim->State == HAL_TIM_STATE_RESET) + 282:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** { + 283:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** /* Allocate lock resource and initialize it */ + 284:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** htim->Lock = HAL_UNLOCKED; + 285:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 286:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** #if (USE_HAL_TIM_REGISTER_CALLBACKS == 1) + 287:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** /* Reset interrupt callbacks to legacy weak callbacks */ + 288:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** TIM_ResetCallback(htim); + 289:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 290:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** if (htim->Base_MspInitCallback == NULL) + 291:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** { + 292:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** htim->Base_MspInitCallback = HAL_TIM_Base_MspInit; + 293:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** } + 294:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** /* Init the low level hardware : GPIO, CLOCK, NVIC */ + 295:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** htim->Base_MspInitCallback(htim); + 296:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** #else + 297:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** /* Init the low level hardware : GPIO, CLOCK, NVIC */ + 298:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** HAL_TIM_Base_MspInit(htim); + 299:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** #endif /* USE_HAL_TIM_REGISTER_CALLBACKS */ + 300:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** } + 301:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 302:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** /* Set the TIM state */ + 303:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** htim->State = HAL_TIM_STATE_BUSY; + 304:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 305:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** /* Set the Time Base configuration */ + 306:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** TIM_Base_SetConfig(htim->Instance, &htim->Init); + 307:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 308:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** /* Initialize the DMA burst operation state */ + 309:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** htim->DMABurstState = HAL_DMA_BURST_STATE_READY; + 310:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 311:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** /* Initialize the TIM channels state */ + 312:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** TIM_CHANNEL_STATE_SET_ALL(htim, HAL_TIM_CHANNEL_STATE_READY); + 313:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** TIM_CHANNEL_N_STATE_SET_ALL(htim, HAL_TIM_CHANNEL_STATE_READY); + 314:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 315:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** /* Initialize the TIM state*/ + 316:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** htim->State = HAL_TIM_STATE_READY; + 317:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + ARM GAS /tmp/ccMtK8ce.s page 7 + + + 318:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** return HAL_OK; + 319:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** } + 320:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 321:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** /** + 322:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** * @brief DeInitializes the TIM Base peripheral + 323:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** * @param htim TIM Base handle + 324:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** * @retval HAL status + 325:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** */ + 326:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** HAL_StatusTypeDef HAL_TIM_Base_DeInit(TIM_HandleTypeDef *htim) + 327:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** { + 328:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** /* Check the parameters */ + 329:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** assert_param(IS_TIM_INSTANCE(htim->Instance)); + 330:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 331:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** htim->State = HAL_TIM_STATE_BUSY; + 332:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 333:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** /* Disable the TIM Peripheral Clock */ + 334:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** __HAL_TIM_DISABLE(htim); + 335:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 336:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** #if (USE_HAL_TIM_REGISTER_CALLBACKS == 1) + 337:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** if (htim->Base_MspDeInitCallback == NULL) + 338:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** { + 339:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** htim->Base_MspDeInitCallback = HAL_TIM_Base_MspDeInit; + 340:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** } + 341:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** /* DeInit the low level hardware */ + 342:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** htim->Base_MspDeInitCallback(htim); + 343:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** #else + 344:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** /* DeInit the low level hardware: GPIO, CLOCK, NVIC */ + 345:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** HAL_TIM_Base_MspDeInit(htim); + 346:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** #endif /* USE_HAL_TIM_REGISTER_CALLBACKS */ + 347:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 348:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** /* Change the DMA burst operation state */ + 349:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** htim->DMABurstState = HAL_DMA_BURST_STATE_RESET; + 350:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 351:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** /* Change the TIM channels state */ + 352:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** TIM_CHANNEL_STATE_SET_ALL(htim, HAL_TIM_CHANNEL_STATE_RESET); + 353:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** TIM_CHANNEL_N_STATE_SET_ALL(htim, HAL_TIM_CHANNEL_STATE_RESET); + 354:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 355:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** /* Change TIM state */ + 356:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** htim->State = HAL_TIM_STATE_RESET; + 357:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 358:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** /* Release Lock */ + 359:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** __HAL_UNLOCK(htim); + 360:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 361:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** return HAL_OK; + 362:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** } + 363:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 364:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** /** + 365:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** * @brief Initializes the TIM Base MSP. + 366:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** * @param htim TIM Base handle + 367:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** * @retval None + 368:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** */ + 369:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** __weak void HAL_TIM_Base_MspInit(TIM_HandleTypeDef *htim) + 370:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** { + 371:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** /* Prevent unused argument(s) compilation warning */ + 372:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** UNUSED(htim); + 373:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 374:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** /* NOTE : This function should not be modified, when the callback is needed, + ARM GAS /tmp/ccMtK8ce.s page 8 + + + 375:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** the HAL_TIM_Base_MspInit could be implemented in the user file + 376:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** */ + 377:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** } + 378:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 379:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** /** + 380:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** * @brief DeInitializes TIM Base MSP. + 381:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** * @param htim TIM Base handle + 382:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** * @retval None + 383:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** */ + 384:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** __weak void HAL_TIM_Base_MspDeInit(TIM_HandleTypeDef *htim) + 385:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** { + 386:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** /* Prevent unused argument(s) compilation warning */ + 387:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** UNUSED(htim); + 388:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 389:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** /* NOTE : This function should not be modified, when the callback is needed, + 390:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** the HAL_TIM_Base_MspDeInit could be implemented in the user file + 391:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** */ + 392:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** } + 393:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 394:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 395:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** /** + 396:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** * @brief Starts the TIM Base generation. + 397:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** * @param htim TIM Base handle + 398:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** * @retval HAL status + 399:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** */ + 400:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** HAL_StatusTypeDef HAL_TIM_Base_Start(TIM_HandleTypeDef *htim) + 401:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** { + 402:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** uint32_t tmpsmcr; + 403:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 404:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** /* Check the parameters */ + 405:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** assert_param(IS_TIM_INSTANCE(htim->Instance)); + 406:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 407:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** /* Check the TIM state */ + 408:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** if (htim->State != HAL_TIM_STATE_READY) + 409:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** { + 410:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** return HAL_ERROR; + 411:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** } + 412:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 413:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** /* Set the TIM state */ + 414:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** htim->State = HAL_TIM_STATE_BUSY; + 415:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 416:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** /* Enable the Peripheral, except in trigger mode where enable is automatically done with trigger + 417:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** if (IS_TIM_SLAVE_INSTANCE(htim->Instance)) + 418:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** { + 419:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** tmpsmcr = htim->Instance->SMCR & TIM_SMCR_SMS; + 420:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** if (!IS_TIM_SLAVEMODE_TRIGGER_ENABLED(tmpsmcr)) + 421:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** { + 422:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** __HAL_TIM_ENABLE(htim); + 423:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** } + 424:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** } + 425:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** else + 426:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** { + 427:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** __HAL_TIM_ENABLE(htim); + 428:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** } + 429:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 430:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** /* Return function status */ + 431:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** return HAL_OK; + ARM GAS /tmp/ccMtK8ce.s page 9 + + + 432:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** } + 433:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 434:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** /** + 435:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** * @brief Stops the TIM Base generation. + 436:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** * @param htim TIM Base handle + 437:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** * @retval HAL status + 438:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** */ + 439:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** HAL_StatusTypeDef HAL_TIM_Base_Stop(TIM_HandleTypeDef *htim) + 440:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** { + 441:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** /* Check the parameters */ + 442:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** assert_param(IS_TIM_INSTANCE(htim->Instance)); + 443:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 444:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** /* Disable the Peripheral */ + 445:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** __HAL_TIM_DISABLE(htim); + 446:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 447:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** /* Set the TIM state */ + 448:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** htim->State = HAL_TIM_STATE_READY; + 449:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 450:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** /* Return function status */ + 451:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** return HAL_OK; + 452:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** } + 453:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 454:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** /** + 455:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** * @brief Starts the TIM Base generation in interrupt mode. + 456:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** * @param htim TIM Base handle + 457:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** * @retval HAL status + 458:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** */ + 459:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** HAL_StatusTypeDef HAL_TIM_Base_Start_IT(TIM_HandleTypeDef *htim) + 460:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** { + 461:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** uint32_t tmpsmcr; + 462:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 463:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** /* Check the parameters */ + 464:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** assert_param(IS_TIM_INSTANCE(htim->Instance)); + 465:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 466:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** /* Check the TIM state */ + 467:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** if (htim->State != HAL_TIM_STATE_READY) + 468:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** { + 469:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** return HAL_ERROR; + 470:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** } + 471:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 472:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** /* Set the TIM state */ + 473:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** htim->State = HAL_TIM_STATE_BUSY; + 474:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 475:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** /* Enable the TIM Update interrupt */ + 476:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** __HAL_TIM_ENABLE_IT(htim, TIM_IT_UPDATE); + 477:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 478:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** /* Enable the Peripheral, except in trigger mode where enable is automatically done with trigger + 479:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** if (IS_TIM_SLAVE_INSTANCE(htim->Instance)) + 480:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** { + 481:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** tmpsmcr = htim->Instance->SMCR & TIM_SMCR_SMS; + 482:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** if (!IS_TIM_SLAVEMODE_TRIGGER_ENABLED(tmpsmcr)) + 483:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** { + 484:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** __HAL_TIM_ENABLE(htim); + 485:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** } + 486:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** } + 487:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** else + 488:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** { + ARM GAS /tmp/ccMtK8ce.s page 10 + + + 489:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** __HAL_TIM_ENABLE(htim); + 490:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** } + 491:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 492:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** /* Return function status */ + 493:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** return HAL_OK; + 494:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** } + 495:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 496:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** /** + 497:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** * @brief Stops the TIM Base generation in interrupt mode. + 498:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** * @param htim TIM Base handle + 499:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** * @retval HAL status + 500:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** */ + 501:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** HAL_StatusTypeDef HAL_TIM_Base_Stop_IT(TIM_HandleTypeDef *htim) + 502:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** { + 503:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** /* Check the parameters */ + 504:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** assert_param(IS_TIM_INSTANCE(htim->Instance)); + 505:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 506:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** /* Disable the TIM Update interrupt */ + 507:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** __HAL_TIM_DISABLE_IT(htim, TIM_IT_UPDATE); + 508:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 509:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** /* Disable the Peripheral */ + 510:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** __HAL_TIM_DISABLE(htim); + 511:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 512:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** /* Set the TIM state */ + 513:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** htim->State = HAL_TIM_STATE_READY; + 514:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 515:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** /* Return function status */ + 516:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** return HAL_OK; + 517:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** } + 518:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 519:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** /** + 520:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** * @brief Starts the TIM Base generation in DMA mode. + 521:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** * @param htim TIM Base handle + 522:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** * @param pData The source Buffer address. + 523:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** * @param Length The length of data to be transferred from memory to peripheral. + 524:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** * @retval HAL status + 525:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** */ + 526:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** HAL_StatusTypeDef HAL_TIM_Base_Start_DMA(TIM_HandleTypeDef *htim, const uint32_t *pData, uint16_t L + 527:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** { + 528:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** uint32_t tmpsmcr; + 529:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 530:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** /* Check the parameters */ + 531:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** assert_param(IS_TIM_DMA_INSTANCE(htim->Instance)); + 532:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 533:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** /* Set the TIM state */ + 534:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** if (htim->State == HAL_TIM_STATE_BUSY) + 535:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** { + 536:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** return HAL_BUSY; + 537:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** } + 538:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** else if (htim->State == HAL_TIM_STATE_READY) + 539:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** { + 540:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** if ((pData == NULL) || (Length == 0U)) + 541:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** { + 542:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** return HAL_ERROR; + 543:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** } + 544:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** else + 545:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** { + ARM GAS /tmp/ccMtK8ce.s page 11 + + + 546:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** htim->State = HAL_TIM_STATE_BUSY; + 547:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** } + 548:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** } + 549:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** else + 550:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** { + 551:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** return HAL_ERROR; + 552:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** } + 553:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 554:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** /* Set the DMA Period elapsed callbacks */ + 555:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** htim->hdma[TIM_DMA_ID_UPDATE]->XferCpltCallback = TIM_DMAPeriodElapsedCplt; + 556:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** htim->hdma[TIM_DMA_ID_UPDATE]->XferHalfCpltCallback = TIM_DMAPeriodElapsedHalfCplt; + 557:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 558:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** /* Set the DMA error callback */ + 559:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** htim->hdma[TIM_DMA_ID_UPDATE]->XferErrorCallback = TIM_DMAError ; + 560:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 561:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** /* Enable the DMA channel */ + 562:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** if (HAL_DMA_Start_IT(htim->hdma[TIM_DMA_ID_UPDATE], (uint32_t)pData, (uint32_t)&htim->Instance->A + 563:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** Length) != HAL_OK) + 564:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** { + 565:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** /* Return error status */ + 566:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** return HAL_ERROR; + 567:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** } + 568:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 569:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** /* Enable the TIM Update DMA request */ + 570:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** __HAL_TIM_ENABLE_DMA(htim, TIM_DMA_UPDATE); + 571:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 572:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** /* Enable the Peripheral, except in trigger mode where enable is automatically done with trigger + 573:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** if (IS_TIM_SLAVE_INSTANCE(htim->Instance)) + 574:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** { + 575:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** tmpsmcr = htim->Instance->SMCR & TIM_SMCR_SMS; + 576:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** if (!IS_TIM_SLAVEMODE_TRIGGER_ENABLED(tmpsmcr)) + 577:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** { + 578:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** __HAL_TIM_ENABLE(htim); + 579:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** } + 580:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** } + 581:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** else + 582:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** { + 583:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** __HAL_TIM_ENABLE(htim); + 584:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** } + 585:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 586:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** /* Return function status */ + 587:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** return HAL_OK; + 588:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** } + 589:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 590:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** /** + 591:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** * @brief Stops the TIM Base generation in DMA mode. + 592:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** * @param htim TIM Base handle + 593:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** * @retval HAL status + 594:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** */ + 595:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** HAL_StatusTypeDef HAL_TIM_Base_Stop_DMA(TIM_HandleTypeDef *htim) + 596:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** { + 597:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** /* Check the parameters */ + 598:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** assert_param(IS_TIM_DMA_INSTANCE(htim->Instance)); + 599:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 600:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** /* Disable the TIM Update DMA request */ + 601:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** __HAL_TIM_DISABLE_DMA(htim, TIM_DMA_UPDATE); + 602:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + ARM GAS /tmp/ccMtK8ce.s page 12 + + + 603:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** (void)HAL_DMA_Abort_IT(htim->hdma[TIM_DMA_ID_UPDATE]); + 604:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 605:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** /* Disable the Peripheral */ + 606:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** __HAL_TIM_DISABLE(htim); + 607:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 608:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** /* Set the TIM state */ + 609:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** htim->State = HAL_TIM_STATE_READY; + 610:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 611:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** /* Return function status */ + 612:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** return HAL_OK; + 613:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** } + 614:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 615:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** /** + 616:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** * @} + 617:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** */ + 618:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 619:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** /** @defgroup TIM_Exported_Functions_Group2 TIM Output Compare functions + 620:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** * @brief TIM Output Compare functions + 621:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** * + 622:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** @verbatim + 623:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** ============================================================================== + 624:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** ##### TIM Output Compare functions ##### + 625:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** ============================================================================== + 626:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** [..] + 627:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** This section provides functions allowing to: + 628:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** (+) Initialize and configure the TIM Output Compare. + 629:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** (+) De-initialize the TIM Output Compare. + 630:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** (+) Start the TIM Output Compare. + 631:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** (+) Stop the TIM Output Compare. + 632:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** (+) Start the TIM Output Compare and enable interrupt. + 633:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** (+) Stop the TIM Output Compare and disable interrupt. + 634:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** (+) Start the TIM Output Compare and enable DMA transfer. + 635:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** (+) Stop the TIM Output Compare and disable DMA transfer. + 636:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 637:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** @endverbatim + 638:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** * @{ + 639:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** */ + 640:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** /** + 641:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** * @brief Initializes the TIM Output Compare according to the specified + 642:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** * parameters in the TIM_HandleTypeDef and initializes the associated handle. + 643:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** * @note Switching from Center Aligned counter mode to Edge counter mode (or reverse) + 644:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** * requires a timer reset to avoid unexpected direction + 645:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** * due to DIR bit readonly in center aligned mode. + 646:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** * Ex: call @ref HAL_TIM_OC_DeInit() before HAL_TIM_OC_Init() + 647:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** * @param htim TIM Output Compare handle + 648:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** * @retval HAL status + 649:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** */ + 650:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** HAL_StatusTypeDef HAL_TIM_OC_Init(TIM_HandleTypeDef *htim) + 651:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** { + 652:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** /* Check the TIM handle allocation */ + 653:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** if (htim == NULL) + 654:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** { + 655:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** return HAL_ERROR; + 656:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** } + 657:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 658:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** /* Check the parameters */ + 659:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** assert_param(IS_TIM_INSTANCE(htim->Instance)); + ARM GAS /tmp/ccMtK8ce.s page 13 + + + 660:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** assert_param(IS_TIM_COUNTER_MODE(htim->Init.CounterMode)); + 661:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** assert_param(IS_TIM_CLOCKDIVISION_DIV(htim->Init.ClockDivision)); + 662:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** assert_param(IS_TIM_PERIOD(htim, htim->Init.Period)); + 663:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** assert_param(IS_TIM_AUTORELOAD_PRELOAD(htim->Init.AutoReloadPreload)); + 664:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 665:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** if (htim->State == HAL_TIM_STATE_RESET) + 666:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** { + 667:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** /* Allocate lock resource and initialize it */ + 668:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** htim->Lock = HAL_UNLOCKED; + 669:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 670:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** #if (USE_HAL_TIM_REGISTER_CALLBACKS == 1) + 671:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** /* Reset interrupt callbacks to legacy weak callbacks */ + 672:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** TIM_ResetCallback(htim); + 673:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 674:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** if (htim->OC_MspInitCallback == NULL) + 675:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** { + 676:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** htim->OC_MspInitCallback = HAL_TIM_OC_MspInit; + 677:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** } + 678:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** /* Init the low level hardware : GPIO, CLOCK, NVIC */ + 679:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** htim->OC_MspInitCallback(htim); + 680:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** #else + 681:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** /* Init the low level hardware : GPIO, CLOCK, NVIC and DMA */ + 682:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** HAL_TIM_OC_MspInit(htim); + 683:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** #endif /* USE_HAL_TIM_REGISTER_CALLBACKS */ + 684:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** } + 685:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 686:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** /* Set the TIM state */ + 687:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** htim->State = HAL_TIM_STATE_BUSY; + 688:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 689:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** /* Init the base time for the Output Compare */ + 690:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** TIM_Base_SetConfig(htim->Instance, &htim->Init); + 691:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 692:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** /* Initialize the DMA burst operation state */ + 693:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** htim->DMABurstState = HAL_DMA_BURST_STATE_READY; + 694:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 695:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** /* Initialize the TIM channels state */ + 696:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** TIM_CHANNEL_STATE_SET_ALL(htim, HAL_TIM_CHANNEL_STATE_READY); + 697:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** TIM_CHANNEL_N_STATE_SET_ALL(htim, HAL_TIM_CHANNEL_STATE_READY); + 698:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 699:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** /* Initialize the TIM state*/ + 700:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** htim->State = HAL_TIM_STATE_READY; + 701:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 702:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** return HAL_OK; + 703:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** } + 704:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 705:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** /** + 706:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** * @brief DeInitializes the TIM peripheral + 707:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** * @param htim TIM Output Compare handle + 708:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** * @retval HAL status + 709:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** */ + 710:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** HAL_StatusTypeDef HAL_TIM_OC_DeInit(TIM_HandleTypeDef *htim) + 711:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** { + 712:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** /* Check the parameters */ + 713:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** assert_param(IS_TIM_INSTANCE(htim->Instance)); + 714:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 715:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** htim->State = HAL_TIM_STATE_BUSY; + 716:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + ARM GAS /tmp/ccMtK8ce.s page 14 + + + 717:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** /* Disable the TIM Peripheral Clock */ + 718:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** __HAL_TIM_DISABLE(htim); + 719:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 720:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** #if (USE_HAL_TIM_REGISTER_CALLBACKS == 1) + 721:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** if (htim->OC_MspDeInitCallback == NULL) + 722:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** { + 723:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** htim->OC_MspDeInitCallback = HAL_TIM_OC_MspDeInit; + 724:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** } + 725:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** /* DeInit the low level hardware */ + 726:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** htim->OC_MspDeInitCallback(htim); + 727:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** #else + 728:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** /* DeInit the low level hardware: GPIO, CLOCK, NVIC and DMA */ + 729:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** HAL_TIM_OC_MspDeInit(htim); + 730:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** #endif /* USE_HAL_TIM_REGISTER_CALLBACKS */ + 731:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 732:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** /* Change the DMA burst operation state */ + 733:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** htim->DMABurstState = HAL_DMA_BURST_STATE_RESET; + 734:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 735:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** /* Change the TIM channels state */ + 736:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** TIM_CHANNEL_STATE_SET_ALL(htim, HAL_TIM_CHANNEL_STATE_RESET); + 737:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** TIM_CHANNEL_N_STATE_SET_ALL(htim, HAL_TIM_CHANNEL_STATE_RESET); + 738:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 739:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** /* Change TIM state */ + 740:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** htim->State = HAL_TIM_STATE_RESET; + 741:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 742:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** /* Release Lock */ + 743:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** __HAL_UNLOCK(htim); + 744:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 745:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** return HAL_OK; + 746:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** } + 747:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 748:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** /** + 749:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** * @brief Initializes the TIM Output Compare MSP. + 750:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** * @param htim TIM Output Compare handle + 751:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** * @retval None + 752:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** */ + 753:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** __weak void HAL_TIM_OC_MspInit(TIM_HandleTypeDef *htim) + 754:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** { + 755:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** /* Prevent unused argument(s) compilation warning */ + 756:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** UNUSED(htim); + 757:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 758:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** /* NOTE : This function should not be modified, when the callback is needed, + 759:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** the HAL_TIM_OC_MspInit could be implemented in the user file + 760:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** */ + 761:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** } + 762:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 763:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** /** + 764:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** * @brief DeInitializes TIM Output Compare MSP. + 765:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** * @param htim TIM Output Compare handle + 766:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** * @retval None + 767:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** */ + 768:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** __weak void HAL_TIM_OC_MspDeInit(TIM_HandleTypeDef *htim) + 769:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** { + 770:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** /* Prevent unused argument(s) compilation warning */ + 771:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** UNUSED(htim); + 772:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 773:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** /* NOTE : This function should not be modified, when the callback is needed, + ARM GAS /tmp/ccMtK8ce.s page 15 + + + 774:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** the HAL_TIM_OC_MspDeInit could be implemented in the user file + 775:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** */ + 776:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** } + 777:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 778:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** /** + 779:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** * @brief Starts the TIM Output Compare signal generation. + 780:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** * @param htim TIM Output Compare handle + 781:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** * @param Channel TIM Channel to be enabled + 782:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** * This parameter can be one of the following values: + 783:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** * @arg TIM_CHANNEL_1: TIM Channel 1 selected + 784:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** * @arg TIM_CHANNEL_2: TIM Channel 2 selected + 785:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** * @arg TIM_CHANNEL_3: TIM Channel 3 selected + 786:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** * @arg TIM_CHANNEL_4: TIM Channel 4 selected + 787:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** * @retval HAL status + 788:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** */ + 789:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** HAL_StatusTypeDef HAL_TIM_OC_Start(TIM_HandleTypeDef *htim, uint32_t Channel) + 790:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** { + 791:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** uint32_t tmpsmcr; + 792:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 793:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** /* Check the parameters */ + 794:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** assert_param(IS_TIM_CCX_INSTANCE(htim->Instance, Channel)); + 795:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 796:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** /* Check the TIM channel state */ + 797:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** if (TIM_CHANNEL_STATE_GET(htim, Channel) != HAL_TIM_CHANNEL_STATE_READY) + 798:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** { + 799:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** return HAL_ERROR; + 800:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** } + 801:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 802:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** /* Set the TIM channel state */ + 803:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** TIM_CHANNEL_STATE_SET(htim, Channel, HAL_TIM_CHANNEL_STATE_BUSY); + 804:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 805:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** /* Enable the Output compare channel */ + 806:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** TIM_CCxChannelCmd(htim->Instance, Channel, TIM_CCx_ENABLE); + 807:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 808:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** if (IS_TIM_BREAK_INSTANCE(htim->Instance) != RESET) + 809:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** { + 810:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** /* Enable the main output */ + 811:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** __HAL_TIM_MOE_ENABLE(htim); + 812:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** } + 813:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 814:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** /* Enable the Peripheral, except in trigger mode where enable is automatically done with trigger + 815:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** if (IS_TIM_SLAVE_INSTANCE(htim->Instance)) + 816:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** { + 817:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** tmpsmcr = htim->Instance->SMCR & TIM_SMCR_SMS; + 818:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** if (!IS_TIM_SLAVEMODE_TRIGGER_ENABLED(tmpsmcr)) + 819:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** { + 820:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** __HAL_TIM_ENABLE(htim); + 821:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** } + 822:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** } + 823:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** else + 824:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** { + 825:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** __HAL_TIM_ENABLE(htim); + 826:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** } + 827:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 828:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** /* Return function status */ + 829:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** return HAL_OK; + 830:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** } + ARM GAS /tmp/ccMtK8ce.s page 16 + + + 831:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 832:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** /** + 833:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** * @brief Stops the TIM Output Compare signal generation. + 834:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** * @param htim TIM Output Compare handle + 835:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** * @param Channel TIM Channel to be disabled + 836:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** * This parameter can be one of the following values: + 837:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** * @arg TIM_CHANNEL_1: TIM Channel 1 selected + 838:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** * @arg TIM_CHANNEL_2: TIM Channel 2 selected + 839:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** * @arg TIM_CHANNEL_3: TIM Channel 3 selected + 840:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** * @arg TIM_CHANNEL_4: TIM Channel 4 selected + 841:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** * @retval HAL status + 842:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** */ + 843:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** HAL_StatusTypeDef HAL_TIM_OC_Stop(TIM_HandleTypeDef *htim, uint32_t Channel) + 844:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** { + 845:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** /* Check the parameters */ + 846:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** assert_param(IS_TIM_CCX_INSTANCE(htim->Instance, Channel)); + 847:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 848:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** /* Disable the Output compare channel */ + 849:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** TIM_CCxChannelCmd(htim->Instance, Channel, TIM_CCx_DISABLE); + 850:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 851:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** if (IS_TIM_BREAK_INSTANCE(htim->Instance) != RESET) + 852:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** { + 853:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** /* Disable the Main Output */ + 854:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** __HAL_TIM_MOE_DISABLE(htim); + 855:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** } + 856:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 857:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** /* Disable the Peripheral */ + 858:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** __HAL_TIM_DISABLE(htim); + 859:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 860:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** /* Set the TIM channel state */ + 861:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** TIM_CHANNEL_STATE_SET(htim, Channel, HAL_TIM_CHANNEL_STATE_READY); + 862:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 863:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** /* Return function status */ + 864:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** return HAL_OK; + 865:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** } + 866:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 867:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** /** + 868:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** * @brief Starts the TIM Output Compare signal generation in interrupt mode. + 869:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** * @param htim TIM Output Compare handle + 870:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** * @param Channel TIM Channel to be enabled + 871:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** * This parameter can be one of the following values: + 872:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** * @arg TIM_CHANNEL_1: TIM Channel 1 selected + 873:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** * @arg TIM_CHANNEL_2: TIM Channel 2 selected + 874:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** * @arg TIM_CHANNEL_3: TIM Channel 3 selected + 875:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** * @arg TIM_CHANNEL_4: TIM Channel 4 selected + 876:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** * @retval HAL status + 877:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** */ + 878:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** HAL_StatusTypeDef HAL_TIM_OC_Start_IT(TIM_HandleTypeDef *htim, uint32_t Channel) + 879:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** { + 880:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** HAL_StatusTypeDef status = HAL_OK; + 881:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** uint32_t tmpsmcr; + 882:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 883:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** /* Check the parameters */ + 884:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** assert_param(IS_TIM_CCX_INSTANCE(htim->Instance, Channel)); + 885:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 886:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** /* Check the TIM channel state */ + 887:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** if (TIM_CHANNEL_STATE_GET(htim, Channel) != HAL_TIM_CHANNEL_STATE_READY) + ARM GAS /tmp/ccMtK8ce.s page 17 + + + 888:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** { + 889:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** return HAL_ERROR; + 890:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** } + 891:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 892:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** /* Set the TIM channel state */ + 893:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** TIM_CHANNEL_STATE_SET(htim, Channel, HAL_TIM_CHANNEL_STATE_BUSY); + 894:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 895:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** switch (Channel) + 896:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** { + 897:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** case TIM_CHANNEL_1: + 898:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** { + 899:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** /* Enable the TIM Capture/Compare 1 interrupt */ + 900:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** __HAL_TIM_ENABLE_IT(htim, TIM_IT_CC1); + 901:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** break; + 902:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** } + 903:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 904:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** case TIM_CHANNEL_2: + 905:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** { + 906:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** /* Enable the TIM Capture/Compare 2 interrupt */ + 907:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** __HAL_TIM_ENABLE_IT(htim, TIM_IT_CC2); + 908:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** break; + 909:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** } + 910:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 911:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** case TIM_CHANNEL_3: + 912:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** { + 913:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** /* Enable the TIM Capture/Compare 3 interrupt */ + 914:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** __HAL_TIM_ENABLE_IT(htim, TIM_IT_CC3); + 915:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** break; + 916:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** } + 917:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 918:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** case TIM_CHANNEL_4: + 919:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** { + 920:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** /* Enable the TIM Capture/Compare 4 interrupt */ + 921:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** __HAL_TIM_ENABLE_IT(htim, TIM_IT_CC4); + 922:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** break; + 923:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** } + 924:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 925:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** default: + 926:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** status = HAL_ERROR; + 927:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** break; + 928:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** } + 929:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 930:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** if (status == HAL_OK) + 931:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** { + 932:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** /* Enable the Output compare channel */ + 933:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** TIM_CCxChannelCmd(htim->Instance, Channel, TIM_CCx_ENABLE); + 934:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 935:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** if (IS_TIM_BREAK_INSTANCE(htim->Instance) != RESET) + 936:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** { + 937:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** /* Enable the main output */ + 938:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** __HAL_TIM_MOE_ENABLE(htim); + 939:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** } + 940:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 941:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** /* Enable the Peripheral, except in trigger mode where enable is automatically done with trigge + 942:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** if (IS_TIM_SLAVE_INSTANCE(htim->Instance)) + 943:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** { + 944:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** tmpsmcr = htim->Instance->SMCR & TIM_SMCR_SMS; + ARM GAS /tmp/ccMtK8ce.s page 18 + + + 945:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** if (!IS_TIM_SLAVEMODE_TRIGGER_ENABLED(tmpsmcr)) + 946:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** { + 947:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** __HAL_TIM_ENABLE(htim); + 948:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** } + 949:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** } + 950:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** else + 951:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** { + 952:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** __HAL_TIM_ENABLE(htim); + 953:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** } + 954:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** } + 955:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 956:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** /* Return function status */ + 957:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** return status; + 958:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** } + 959:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 960:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** /** + 961:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** * @brief Stops the TIM Output Compare signal generation in interrupt mode. + 962:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** * @param htim TIM Output Compare handle + 963:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** * @param Channel TIM Channel to be disabled + 964:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** * This parameter can be one of the following values: + 965:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** * @arg TIM_CHANNEL_1: TIM Channel 1 selected + 966:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** * @arg TIM_CHANNEL_2: TIM Channel 2 selected + 967:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** * @arg TIM_CHANNEL_3: TIM Channel 3 selected + 968:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** * @arg TIM_CHANNEL_4: TIM Channel 4 selected + 969:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** * @retval HAL status + 970:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** */ + 971:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** HAL_StatusTypeDef HAL_TIM_OC_Stop_IT(TIM_HandleTypeDef *htim, uint32_t Channel) + 972:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** { + 973:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** HAL_StatusTypeDef status = HAL_OK; + 974:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 975:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** /* Check the parameters */ + 976:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** assert_param(IS_TIM_CCX_INSTANCE(htim->Instance, Channel)); + 977:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 978:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** switch (Channel) + 979:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** { + 980:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** case TIM_CHANNEL_1: + 981:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** { + 982:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** /* Disable the TIM Capture/Compare 1 interrupt */ + 983:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** __HAL_TIM_DISABLE_IT(htim, TIM_IT_CC1); + 984:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** break; + 985:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** } + 986:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 987:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** case TIM_CHANNEL_2: + 988:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** { + 989:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** /* Disable the TIM Capture/Compare 2 interrupt */ + 990:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** __HAL_TIM_DISABLE_IT(htim, TIM_IT_CC2); + 991:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** break; + 992:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** } + 993:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 994:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** case TIM_CHANNEL_3: + 995:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** { + 996:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** /* Disable the TIM Capture/Compare 3 interrupt */ + 997:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** __HAL_TIM_DISABLE_IT(htim, TIM_IT_CC3); + 998:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** break; + 999:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** } +1000:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** +1001:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** case TIM_CHANNEL_4: + ARM GAS /tmp/ccMtK8ce.s page 19 + + +1002:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** { +1003:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** /* Disable the TIM Capture/Compare 4 interrupt */ +1004:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** __HAL_TIM_DISABLE_IT(htim, TIM_IT_CC4); +1005:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** break; +1006:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** } +1007:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** +1008:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** default: +1009:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** status = HAL_ERROR; +1010:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** break; +1011:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** } +1012:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** +1013:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** if (status == HAL_OK) +1014:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** { +1015:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** /* Disable the Output compare channel */ +1016:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** TIM_CCxChannelCmd(htim->Instance, Channel, TIM_CCx_DISABLE); +1017:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** +1018:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** if (IS_TIM_BREAK_INSTANCE(htim->Instance) != RESET) +1019:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** { +1020:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** /* Disable the Main Output */ +1021:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** __HAL_TIM_MOE_DISABLE(htim); +1022:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** } +1023:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** +1024:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** /* Disable the Peripheral */ +1025:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** __HAL_TIM_DISABLE(htim); +1026:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** +1027:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** /* Set the TIM channel state */ +1028:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** TIM_CHANNEL_STATE_SET(htim, Channel, HAL_TIM_CHANNEL_STATE_READY); +1029:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** } +1030:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** +1031:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** /* Return function status */ +1032:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** return status; +1033:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** } +1034:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** +1035:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** /** +1036:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** * @brief Starts the TIM Output Compare signal generation in DMA mode. +1037:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** * @param htim TIM Output Compare handle +1038:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** * @param Channel TIM Channel to be enabled +1039:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** * This parameter can be one of the following values: +1040:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** * @arg TIM_CHANNEL_1: TIM Channel 1 selected +1041:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** * @arg TIM_CHANNEL_2: TIM Channel 2 selected +1042:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** * @arg TIM_CHANNEL_3: TIM Channel 3 selected +1043:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** * @arg TIM_CHANNEL_4: TIM Channel 4 selected +1044:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** * @param pData The source Buffer address. +1045:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** * @param Length The length of data to be transferred from memory to TIM peripheral +1046:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** * @retval HAL status +1047:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** */ +1048:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** HAL_StatusTypeDef HAL_TIM_OC_Start_DMA(TIM_HandleTypeDef *htim, uint32_t Channel, const uint32_t *p +1049:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** uint16_t Length) +1050:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** { +1051:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** HAL_StatusTypeDef status = HAL_OK; +1052:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** uint32_t tmpsmcr; +1053:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** +1054:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** /* Check the parameters */ +1055:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** assert_param(IS_TIM_CCX_INSTANCE(htim->Instance, Channel)); +1056:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** +1057:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** /* Set the TIM channel state */ +1058:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** if (TIM_CHANNEL_STATE_GET(htim, Channel) == HAL_TIM_CHANNEL_STATE_BUSY) + ARM GAS /tmp/ccMtK8ce.s page 20 + + +1059:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** { +1060:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** return HAL_BUSY; +1061:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** } +1062:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** else if (TIM_CHANNEL_STATE_GET(htim, Channel) == HAL_TIM_CHANNEL_STATE_READY) +1063:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** { +1064:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** if ((pData == NULL) || (Length == 0U)) +1065:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** { +1066:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** return HAL_ERROR; +1067:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** } +1068:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** else +1069:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** { +1070:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** TIM_CHANNEL_STATE_SET(htim, Channel, HAL_TIM_CHANNEL_STATE_BUSY); +1071:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** } +1072:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** } +1073:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** else +1074:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** { +1075:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** return HAL_ERROR; +1076:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** } +1077:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** +1078:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** switch (Channel) +1079:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** { +1080:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** case TIM_CHANNEL_1: +1081:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** { +1082:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** /* Set the DMA compare callbacks */ +1083:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** htim->hdma[TIM_DMA_ID_CC1]->XferCpltCallback = TIM_DMADelayPulseCplt; +1084:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** htim->hdma[TIM_DMA_ID_CC1]->XferHalfCpltCallback = TIM_DMADelayPulseHalfCplt; +1085:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** +1086:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** /* Set the DMA error callback */ +1087:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** htim->hdma[TIM_DMA_ID_CC1]->XferErrorCallback = TIM_DMAError ; +1088:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** +1089:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** /* Enable the DMA channel */ +1090:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** if (HAL_DMA_Start_IT(htim->hdma[TIM_DMA_ID_CC1], (uint32_t)pData, (uint32_t)&htim->Instance-> +1091:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** Length) != HAL_OK) +1092:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** { +1093:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** /* Return error status */ +1094:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** return HAL_ERROR; +1095:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** } +1096:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** +1097:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** /* Enable the TIM Capture/Compare 1 DMA request */ +1098:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** __HAL_TIM_ENABLE_DMA(htim, TIM_DMA_CC1); +1099:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** break; +1100:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** } +1101:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** +1102:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** case TIM_CHANNEL_2: +1103:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** { +1104:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** /* Set the DMA compare callbacks */ +1105:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** htim->hdma[TIM_DMA_ID_CC2]->XferCpltCallback = TIM_DMADelayPulseCplt; +1106:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** htim->hdma[TIM_DMA_ID_CC2]->XferHalfCpltCallback = TIM_DMADelayPulseHalfCplt; +1107:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** +1108:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** /* Set the DMA error callback */ +1109:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** htim->hdma[TIM_DMA_ID_CC2]->XferErrorCallback = TIM_DMAError ; +1110:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** +1111:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** /* Enable the DMA channel */ +1112:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** if (HAL_DMA_Start_IT(htim->hdma[TIM_DMA_ID_CC2], (uint32_t)pData, (uint32_t)&htim->Instance-> +1113:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** Length) != HAL_OK) +1114:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** { +1115:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** /* Return error status */ + ARM GAS /tmp/ccMtK8ce.s page 21 + + +1116:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** return HAL_ERROR; +1117:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** } +1118:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** +1119:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** /* Enable the TIM Capture/Compare 2 DMA request */ +1120:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** __HAL_TIM_ENABLE_DMA(htim, TIM_DMA_CC2); +1121:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** break; +1122:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** } +1123:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** +1124:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** case TIM_CHANNEL_3: +1125:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** { +1126:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** /* Set the DMA compare callbacks */ +1127:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** htim->hdma[TIM_DMA_ID_CC3]->XferCpltCallback = TIM_DMADelayPulseCplt; +1128:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** htim->hdma[TIM_DMA_ID_CC3]->XferHalfCpltCallback = TIM_DMADelayPulseHalfCplt; +1129:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** +1130:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** /* Set the DMA error callback */ +1131:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** htim->hdma[TIM_DMA_ID_CC3]->XferErrorCallback = TIM_DMAError ; +1132:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** +1133:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** /* Enable the DMA channel */ +1134:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** if (HAL_DMA_Start_IT(htim->hdma[TIM_DMA_ID_CC3], (uint32_t)pData, (uint32_t)&htim->Instance-> +1135:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** Length) != HAL_OK) +1136:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** { +1137:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** /* Return error status */ +1138:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** return HAL_ERROR; +1139:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** } +1140:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** /* Enable the TIM Capture/Compare 3 DMA request */ +1141:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** __HAL_TIM_ENABLE_DMA(htim, TIM_DMA_CC3); +1142:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** break; +1143:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** } +1144:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** +1145:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** case TIM_CHANNEL_4: +1146:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** { +1147:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** /* Set the DMA compare callbacks */ +1148:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** htim->hdma[TIM_DMA_ID_CC4]->XferCpltCallback = TIM_DMADelayPulseCplt; +1149:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** htim->hdma[TIM_DMA_ID_CC4]->XferHalfCpltCallback = TIM_DMADelayPulseHalfCplt; +1150:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** +1151:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** /* Set the DMA error callback */ +1152:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** htim->hdma[TIM_DMA_ID_CC4]->XferErrorCallback = TIM_DMAError ; +1153:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** +1154:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** /* Enable the DMA channel */ +1155:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** if (HAL_DMA_Start_IT(htim->hdma[TIM_DMA_ID_CC4], (uint32_t)pData, (uint32_t)&htim->Instance-> +1156:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** Length) != HAL_OK) +1157:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** { +1158:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** /* Return error status */ +1159:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** return HAL_ERROR; +1160:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** } +1161:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** /* Enable the TIM Capture/Compare 4 DMA request */ +1162:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** __HAL_TIM_ENABLE_DMA(htim, TIM_DMA_CC4); +1163:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** break; +1164:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** } +1165:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** +1166:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** default: +1167:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** status = HAL_ERROR; +1168:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** break; +1169:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** } +1170:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** +1171:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** if (status == HAL_OK) +1172:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** { + ARM GAS /tmp/ccMtK8ce.s page 22 + + +1173:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** /* Enable the Output compare channel */ +1174:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** TIM_CCxChannelCmd(htim->Instance, Channel, TIM_CCx_ENABLE); +1175:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** +1176:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** if (IS_TIM_BREAK_INSTANCE(htim->Instance) != RESET) +1177:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** { +1178:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** /* Enable the main output */ +1179:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** __HAL_TIM_MOE_ENABLE(htim); +1180:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** } +1181:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** +1182:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** /* Enable the Peripheral, except in trigger mode where enable is automatically done with trigge +1183:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** if (IS_TIM_SLAVE_INSTANCE(htim->Instance)) +1184:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** { +1185:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** tmpsmcr = htim->Instance->SMCR & TIM_SMCR_SMS; +1186:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** if (!IS_TIM_SLAVEMODE_TRIGGER_ENABLED(tmpsmcr)) +1187:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** { +1188:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** __HAL_TIM_ENABLE(htim); +1189:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** } +1190:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** } +1191:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** else +1192:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** { +1193:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** __HAL_TIM_ENABLE(htim); +1194:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** } +1195:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** } +1196:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** +1197:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** /* Return function status */ +1198:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** return status; +1199:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** } +1200:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** +1201:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** /** +1202:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** * @brief Stops the TIM Output Compare signal generation in DMA mode. +1203:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** * @param htim TIM Output Compare handle +1204:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** * @param Channel TIM Channel to be disabled +1205:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** * This parameter can be one of the following values: +1206:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** * @arg TIM_CHANNEL_1: TIM Channel 1 selected +1207:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** * @arg TIM_CHANNEL_2: TIM Channel 2 selected +1208:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** * @arg TIM_CHANNEL_3: TIM Channel 3 selected +1209:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** * @arg TIM_CHANNEL_4: TIM Channel 4 selected +1210:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** * @retval HAL status +1211:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** */ +1212:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** HAL_StatusTypeDef HAL_TIM_OC_Stop_DMA(TIM_HandleTypeDef *htim, uint32_t Channel) +1213:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** { +1214:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** HAL_StatusTypeDef status = HAL_OK; +1215:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** +1216:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** /* Check the parameters */ +1217:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** assert_param(IS_TIM_CCX_INSTANCE(htim->Instance, Channel)); +1218:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** +1219:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** switch (Channel) +1220:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** { +1221:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** case TIM_CHANNEL_1: +1222:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** { +1223:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** /* Disable the TIM Capture/Compare 1 DMA request */ +1224:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** __HAL_TIM_DISABLE_DMA(htim, TIM_DMA_CC1); +1225:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** (void)HAL_DMA_Abort_IT(htim->hdma[TIM_DMA_ID_CC1]); +1226:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** break; +1227:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** } +1228:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** +1229:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** case TIM_CHANNEL_2: + ARM GAS /tmp/ccMtK8ce.s page 23 + + +1230:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** { +1231:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** /* Disable the TIM Capture/Compare 2 DMA request */ +1232:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** __HAL_TIM_DISABLE_DMA(htim, TIM_DMA_CC2); +1233:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** (void)HAL_DMA_Abort_IT(htim->hdma[TIM_DMA_ID_CC2]); +1234:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** break; +1235:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** } +1236:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** +1237:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** case TIM_CHANNEL_3: +1238:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** { +1239:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** /* Disable the TIM Capture/Compare 3 DMA request */ +1240:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** __HAL_TIM_DISABLE_DMA(htim, TIM_DMA_CC3); +1241:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** (void)HAL_DMA_Abort_IT(htim->hdma[TIM_DMA_ID_CC3]); +1242:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** break; +1243:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** } +1244:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** +1245:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** case TIM_CHANNEL_4: +1246:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** { +1247:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** /* Disable the TIM Capture/Compare 4 interrupt */ +1248:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** __HAL_TIM_DISABLE_DMA(htim, TIM_DMA_CC4); +1249:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** (void)HAL_DMA_Abort_IT(htim->hdma[TIM_DMA_ID_CC4]); +1250:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** break; +1251:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** } +1252:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** +1253:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** default: +1254:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** status = HAL_ERROR; +1255:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** break; +1256:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** } +1257:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** +1258:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** if (status == HAL_OK) +1259:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** { +1260:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** /* Disable the Output compare channel */ +1261:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** TIM_CCxChannelCmd(htim->Instance, Channel, TIM_CCx_DISABLE); +1262:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** +1263:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** if (IS_TIM_BREAK_INSTANCE(htim->Instance) != RESET) +1264:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** { +1265:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** /* Disable the Main Output */ +1266:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** __HAL_TIM_MOE_DISABLE(htim); +1267:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** } +1268:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** +1269:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** /* Disable the Peripheral */ +1270:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** __HAL_TIM_DISABLE(htim); +1271:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** +1272:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** /* Set the TIM channel state */ +1273:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** TIM_CHANNEL_STATE_SET(htim, Channel, HAL_TIM_CHANNEL_STATE_READY); +1274:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** } +1275:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** +1276:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** /* Return function status */ +1277:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** return status; +1278:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** } +1279:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** +1280:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** /** +1281:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** * @} +1282:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** */ +1283:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** +1284:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** /** @defgroup TIM_Exported_Functions_Group3 TIM PWM functions +1285:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** * @brief TIM PWM functions +1286:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** * + ARM GAS /tmp/ccMtK8ce.s page 24 + + +1287:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** @verbatim +1288:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** ============================================================================== +1289:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** ##### TIM PWM functions ##### +1290:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** ============================================================================== +1291:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** [..] +1292:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** This section provides functions allowing to: +1293:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** (+) Initialize and configure the TIM PWM. +1294:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** (+) De-initialize the TIM PWM. +1295:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** (+) Start the TIM PWM. +1296:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** (+) Stop the TIM PWM. +1297:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** (+) Start the TIM PWM and enable interrupt. +1298:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** (+) Stop the TIM PWM and disable interrupt. +1299:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** (+) Start the TIM PWM and enable DMA transfer. +1300:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** (+) Stop the TIM PWM and disable DMA transfer. +1301:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** +1302:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** @endverbatim +1303:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** * @{ +1304:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** */ +1305:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** /** +1306:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** * @brief Initializes the TIM PWM Time Base according to the specified +1307:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** * parameters in the TIM_HandleTypeDef and initializes the associated handle. +1308:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** * @note Switching from Center Aligned counter mode to Edge counter mode (or reverse) +1309:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** * requires a timer reset to avoid unexpected direction +1310:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** * due to DIR bit readonly in center aligned mode. +1311:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** * Ex: call @ref HAL_TIM_PWM_DeInit() before HAL_TIM_PWM_Init() +1312:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** * @param htim TIM PWM handle +1313:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** * @retval HAL status +1314:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** */ +1315:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** HAL_StatusTypeDef HAL_TIM_PWM_Init(TIM_HandleTypeDef *htim) +1316:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** { +1317:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** /* Check the TIM handle allocation */ +1318:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** if (htim == NULL) +1319:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** { +1320:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** return HAL_ERROR; +1321:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** } +1322:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** +1323:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** /* Check the parameters */ +1324:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** assert_param(IS_TIM_INSTANCE(htim->Instance)); +1325:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** assert_param(IS_TIM_COUNTER_MODE(htim->Init.CounterMode)); +1326:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** assert_param(IS_TIM_CLOCKDIVISION_DIV(htim->Init.ClockDivision)); +1327:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** assert_param(IS_TIM_PERIOD(htim, htim->Init.Period)); +1328:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** assert_param(IS_TIM_AUTORELOAD_PRELOAD(htim->Init.AutoReloadPreload)); +1329:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** +1330:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** if (htim->State == HAL_TIM_STATE_RESET) +1331:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** { +1332:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** /* Allocate lock resource and initialize it */ +1333:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** htim->Lock = HAL_UNLOCKED; +1334:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** +1335:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** #if (USE_HAL_TIM_REGISTER_CALLBACKS == 1) +1336:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** /* Reset interrupt callbacks to legacy weak callbacks */ +1337:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** TIM_ResetCallback(htim); +1338:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** +1339:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** if (htim->PWM_MspInitCallback == NULL) +1340:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** { +1341:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** htim->PWM_MspInitCallback = HAL_TIM_PWM_MspInit; +1342:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** } +1343:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** /* Init the low level hardware : GPIO, CLOCK, NVIC */ + ARM GAS /tmp/ccMtK8ce.s page 25 + + +1344:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** htim->PWM_MspInitCallback(htim); +1345:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** #else +1346:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** /* Init the low level hardware : GPIO, CLOCK, NVIC and DMA */ +1347:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** HAL_TIM_PWM_MspInit(htim); +1348:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** #endif /* USE_HAL_TIM_REGISTER_CALLBACKS */ +1349:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** } +1350:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** +1351:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** /* Set the TIM state */ +1352:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** htim->State = HAL_TIM_STATE_BUSY; +1353:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** +1354:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** /* Init the base time for the PWM */ +1355:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** TIM_Base_SetConfig(htim->Instance, &htim->Init); +1356:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** +1357:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** /* Initialize the DMA burst operation state */ +1358:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** htim->DMABurstState = HAL_DMA_BURST_STATE_READY; +1359:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** +1360:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** /* Initialize the TIM channels state */ +1361:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** TIM_CHANNEL_STATE_SET_ALL(htim, HAL_TIM_CHANNEL_STATE_READY); +1362:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** TIM_CHANNEL_N_STATE_SET_ALL(htim, HAL_TIM_CHANNEL_STATE_READY); +1363:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** +1364:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** /* Initialize the TIM state*/ +1365:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** htim->State = HAL_TIM_STATE_READY; +1366:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** +1367:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** return HAL_OK; +1368:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** } +1369:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** +1370:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** /** +1371:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** * @brief DeInitializes the TIM peripheral +1372:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** * @param htim TIM PWM handle +1373:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** * @retval HAL status +1374:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** */ +1375:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** HAL_StatusTypeDef HAL_TIM_PWM_DeInit(TIM_HandleTypeDef *htim) +1376:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** { +1377:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** /* Check the parameters */ +1378:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** assert_param(IS_TIM_INSTANCE(htim->Instance)); +1379:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** +1380:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** htim->State = HAL_TIM_STATE_BUSY; +1381:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** +1382:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** /* Disable the TIM Peripheral Clock */ +1383:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** __HAL_TIM_DISABLE(htim); +1384:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** +1385:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** #if (USE_HAL_TIM_REGISTER_CALLBACKS == 1) +1386:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** if (htim->PWM_MspDeInitCallback == NULL) +1387:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** { +1388:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** htim->PWM_MspDeInitCallback = HAL_TIM_PWM_MspDeInit; +1389:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** } +1390:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** /* DeInit the low level hardware */ +1391:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** htim->PWM_MspDeInitCallback(htim); +1392:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** #else +1393:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** /* DeInit the low level hardware: GPIO, CLOCK, NVIC and DMA */ +1394:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** HAL_TIM_PWM_MspDeInit(htim); +1395:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** #endif /* USE_HAL_TIM_REGISTER_CALLBACKS */ +1396:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** +1397:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** /* Change the DMA burst operation state */ +1398:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** htim->DMABurstState = HAL_DMA_BURST_STATE_RESET; +1399:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** +1400:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** /* Change the TIM channels state */ + ARM GAS /tmp/ccMtK8ce.s page 26 + + +1401:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** TIM_CHANNEL_STATE_SET_ALL(htim, HAL_TIM_CHANNEL_STATE_RESET); +1402:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** TIM_CHANNEL_N_STATE_SET_ALL(htim, HAL_TIM_CHANNEL_STATE_RESET); +1403:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** +1404:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** /* Change TIM state */ +1405:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** htim->State = HAL_TIM_STATE_RESET; +1406:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** +1407:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** /* Release Lock */ +1408:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** __HAL_UNLOCK(htim); +1409:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** +1410:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** return HAL_OK; +1411:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** } +1412:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** +1413:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** /** +1414:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** * @brief Initializes the TIM PWM MSP. +1415:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** * @param htim TIM PWM handle +1416:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** * @retval None +1417:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** */ +1418:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** __weak void HAL_TIM_PWM_MspInit(TIM_HandleTypeDef *htim) +1419:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** { +1420:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** /* Prevent unused argument(s) compilation warning */ +1421:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** UNUSED(htim); +1422:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** +1423:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** /* NOTE : This function should not be modified, when the callback is needed, +1424:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** the HAL_TIM_PWM_MspInit could be implemented in the user file +1425:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** */ +1426:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** } +1427:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** +1428:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** /** +1429:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** * @brief DeInitializes TIM PWM MSP. +1430:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** * @param htim TIM PWM handle +1431:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** * @retval None +1432:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** */ +1433:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** __weak void HAL_TIM_PWM_MspDeInit(TIM_HandleTypeDef *htim) +1434:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** { +1435:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** /* Prevent unused argument(s) compilation warning */ +1436:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** UNUSED(htim); +1437:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** +1438:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** /* NOTE : This function should not be modified, when the callback is needed, +1439:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** the HAL_TIM_PWM_MspDeInit could be implemented in the user file +1440:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** */ +1441:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** } +1442:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** +1443:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** /** +1444:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** * @brief Starts the PWM signal generation. +1445:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** * @param htim TIM handle +1446:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** * @param Channel TIM Channels to be enabled +1447:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** * This parameter can be one of the following values: +1448:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** * @arg TIM_CHANNEL_1: TIM Channel 1 selected +1449:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** * @arg TIM_CHANNEL_2: TIM Channel 2 selected +1450:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** * @arg TIM_CHANNEL_3: TIM Channel 3 selected +1451:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** * @arg TIM_CHANNEL_4: TIM Channel 4 selected +1452:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** * @retval HAL status +1453:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** */ +1454:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** HAL_StatusTypeDef HAL_TIM_PWM_Start(TIM_HandleTypeDef *htim, uint32_t Channel) +1455:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** { +1456:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** uint32_t tmpsmcr; +1457:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + ARM GAS /tmp/ccMtK8ce.s page 27 + + +1458:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** /* Check the parameters */ +1459:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** assert_param(IS_TIM_CCX_INSTANCE(htim->Instance, Channel)); +1460:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** +1461:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** /* Check the TIM channel state */ +1462:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** if (TIM_CHANNEL_STATE_GET(htim, Channel) != HAL_TIM_CHANNEL_STATE_READY) +1463:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** { +1464:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** return HAL_ERROR; +1465:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** } +1466:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** +1467:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** /* Set the TIM channel state */ +1468:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** TIM_CHANNEL_STATE_SET(htim, Channel, HAL_TIM_CHANNEL_STATE_BUSY); +1469:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** +1470:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** /* Enable the Capture compare channel */ +1471:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** TIM_CCxChannelCmd(htim->Instance, Channel, TIM_CCx_ENABLE); +1472:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** +1473:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** if (IS_TIM_BREAK_INSTANCE(htim->Instance) != RESET) +1474:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** { +1475:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** /* Enable the main output */ +1476:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** __HAL_TIM_MOE_ENABLE(htim); +1477:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** } +1478:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** +1479:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** /* Enable the Peripheral, except in trigger mode where enable is automatically done with trigger +1480:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** if (IS_TIM_SLAVE_INSTANCE(htim->Instance)) +1481:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** { +1482:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** tmpsmcr = htim->Instance->SMCR & TIM_SMCR_SMS; +1483:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** if (!IS_TIM_SLAVEMODE_TRIGGER_ENABLED(tmpsmcr)) +1484:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** { +1485:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** __HAL_TIM_ENABLE(htim); +1486:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** } +1487:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** } +1488:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** else +1489:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** { +1490:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** __HAL_TIM_ENABLE(htim); +1491:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** } +1492:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** +1493:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** /* Return function status */ +1494:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** return HAL_OK; +1495:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** } +1496:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** +1497:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** /** +1498:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** * @brief Stops the PWM signal generation. +1499:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** * @param htim TIM PWM handle +1500:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** * @param Channel TIM Channels to be disabled +1501:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** * This parameter can be one of the following values: +1502:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** * @arg TIM_CHANNEL_1: TIM Channel 1 selected +1503:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** * @arg TIM_CHANNEL_2: TIM Channel 2 selected +1504:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** * @arg TIM_CHANNEL_3: TIM Channel 3 selected +1505:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** * @arg TIM_CHANNEL_4: TIM Channel 4 selected +1506:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** * @retval HAL status +1507:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** */ +1508:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** HAL_StatusTypeDef HAL_TIM_PWM_Stop(TIM_HandleTypeDef *htim, uint32_t Channel) +1509:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** { +1510:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** /* Check the parameters */ +1511:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** assert_param(IS_TIM_CCX_INSTANCE(htim->Instance, Channel)); +1512:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** +1513:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** /* Disable the Capture compare channel */ +1514:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** TIM_CCxChannelCmd(htim->Instance, Channel, TIM_CCx_DISABLE); + ARM GAS /tmp/ccMtK8ce.s page 28 + + +1515:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** +1516:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** if (IS_TIM_BREAK_INSTANCE(htim->Instance) != RESET) +1517:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** { +1518:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** /* Disable the Main Output */ +1519:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** __HAL_TIM_MOE_DISABLE(htim); +1520:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** } +1521:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** +1522:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** /* Disable the Peripheral */ +1523:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** __HAL_TIM_DISABLE(htim); +1524:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** +1525:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** /* Set the TIM channel state */ +1526:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** TIM_CHANNEL_STATE_SET(htim, Channel, HAL_TIM_CHANNEL_STATE_READY); +1527:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** +1528:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** /* Return function status */ +1529:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** return HAL_OK; +1530:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** } +1531:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** +1532:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** /** +1533:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** * @brief Starts the PWM signal generation in interrupt mode. +1534:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** * @param htim TIM PWM handle +1535:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** * @param Channel TIM Channel to be enabled +1536:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** * This parameter can be one of the following values: +1537:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** * @arg TIM_CHANNEL_1: TIM Channel 1 selected +1538:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** * @arg TIM_CHANNEL_2: TIM Channel 2 selected +1539:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** * @arg TIM_CHANNEL_3: TIM Channel 3 selected +1540:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** * @arg TIM_CHANNEL_4: TIM Channel 4 selected +1541:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** * @retval HAL status +1542:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** */ +1543:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** HAL_StatusTypeDef HAL_TIM_PWM_Start_IT(TIM_HandleTypeDef *htim, uint32_t Channel) +1544:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** { +1545:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** HAL_StatusTypeDef status = HAL_OK; +1546:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** uint32_t tmpsmcr; +1547:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** +1548:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** /* Check the parameters */ +1549:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** assert_param(IS_TIM_CCX_INSTANCE(htim->Instance, Channel)); +1550:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** +1551:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** /* Check the TIM channel state */ +1552:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** if (TIM_CHANNEL_STATE_GET(htim, Channel) != HAL_TIM_CHANNEL_STATE_READY) +1553:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** { +1554:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** return HAL_ERROR; +1555:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** } +1556:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** +1557:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** /* Set the TIM channel state */ +1558:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** TIM_CHANNEL_STATE_SET(htim, Channel, HAL_TIM_CHANNEL_STATE_BUSY); +1559:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** +1560:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** switch (Channel) +1561:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** { +1562:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** case TIM_CHANNEL_1: +1563:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** { +1564:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** /* Enable the TIM Capture/Compare 1 interrupt */ +1565:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** __HAL_TIM_ENABLE_IT(htim, TIM_IT_CC1); +1566:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** break; +1567:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** } +1568:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** +1569:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** case TIM_CHANNEL_2: +1570:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** { +1571:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** /* Enable the TIM Capture/Compare 2 interrupt */ + ARM GAS /tmp/ccMtK8ce.s page 29 + + +1572:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** __HAL_TIM_ENABLE_IT(htim, TIM_IT_CC2); +1573:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** break; +1574:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** } +1575:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** +1576:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** case TIM_CHANNEL_3: +1577:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** { +1578:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** /* Enable the TIM Capture/Compare 3 interrupt */ +1579:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** __HAL_TIM_ENABLE_IT(htim, TIM_IT_CC3); +1580:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** break; +1581:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** } +1582:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** +1583:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** case TIM_CHANNEL_4: +1584:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** { +1585:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** /* Enable the TIM Capture/Compare 4 interrupt */ +1586:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** __HAL_TIM_ENABLE_IT(htim, TIM_IT_CC4); +1587:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** break; +1588:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** } +1589:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** +1590:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** default: +1591:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** status = HAL_ERROR; +1592:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** break; +1593:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** } +1594:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** +1595:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** if (status == HAL_OK) +1596:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** { +1597:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** /* Enable the Capture compare channel */ +1598:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** TIM_CCxChannelCmd(htim->Instance, Channel, TIM_CCx_ENABLE); +1599:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** +1600:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** if (IS_TIM_BREAK_INSTANCE(htim->Instance) != RESET) +1601:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** { +1602:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** /* Enable the main output */ +1603:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** __HAL_TIM_MOE_ENABLE(htim); +1604:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** } +1605:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** +1606:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** /* Enable the Peripheral, except in trigger mode where enable is automatically done with trigge +1607:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** if (IS_TIM_SLAVE_INSTANCE(htim->Instance)) +1608:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** { +1609:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** tmpsmcr = htim->Instance->SMCR & TIM_SMCR_SMS; +1610:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** if (!IS_TIM_SLAVEMODE_TRIGGER_ENABLED(tmpsmcr)) +1611:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** { +1612:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** __HAL_TIM_ENABLE(htim); +1613:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** } +1614:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** } +1615:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** else +1616:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** { +1617:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** __HAL_TIM_ENABLE(htim); +1618:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** } +1619:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** } +1620:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** +1621:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** /* Return function status */ +1622:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** return status; +1623:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** } +1624:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** +1625:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** /** +1626:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** * @brief Stops the PWM signal generation in interrupt mode. +1627:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** * @param htim TIM PWM handle +1628:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** * @param Channel TIM Channels to be disabled + ARM GAS /tmp/ccMtK8ce.s page 30 + + +1629:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** * This parameter can be one of the following values: +1630:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** * @arg TIM_CHANNEL_1: TIM Channel 1 selected +1631:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** * @arg TIM_CHANNEL_2: TIM Channel 2 selected +1632:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** * @arg TIM_CHANNEL_3: TIM Channel 3 selected +1633:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** * @arg TIM_CHANNEL_4: TIM Channel 4 selected +1634:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** * @retval HAL status +1635:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** */ +1636:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** HAL_StatusTypeDef HAL_TIM_PWM_Stop_IT(TIM_HandleTypeDef *htim, uint32_t Channel) +1637:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** { +1638:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** HAL_StatusTypeDef status = HAL_OK; +1639:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** +1640:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** /* Check the parameters */ +1641:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** assert_param(IS_TIM_CCX_INSTANCE(htim->Instance, Channel)); +1642:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** +1643:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** switch (Channel) +1644:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** { +1645:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** case TIM_CHANNEL_1: +1646:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** { +1647:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** /* Disable the TIM Capture/Compare 1 interrupt */ +1648:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** __HAL_TIM_DISABLE_IT(htim, TIM_IT_CC1); +1649:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** break; +1650:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** } +1651:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** +1652:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** case TIM_CHANNEL_2: +1653:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** { +1654:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** /* Disable the TIM Capture/Compare 2 interrupt */ +1655:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** __HAL_TIM_DISABLE_IT(htim, TIM_IT_CC2); +1656:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** break; +1657:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** } +1658:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** +1659:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** case TIM_CHANNEL_3: +1660:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** { +1661:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** /* Disable the TIM Capture/Compare 3 interrupt */ +1662:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** __HAL_TIM_DISABLE_IT(htim, TIM_IT_CC3); +1663:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** break; +1664:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** } +1665:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** +1666:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** case TIM_CHANNEL_4: +1667:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** { +1668:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** /* Disable the TIM Capture/Compare 4 interrupt */ +1669:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** __HAL_TIM_DISABLE_IT(htim, TIM_IT_CC4); +1670:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** break; +1671:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** } +1672:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** +1673:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** default: +1674:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** status = HAL_ERROR; +1675:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** break; +1676:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** } +1677:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** +1678:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** if (status == HAL_OK) +1679:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** { +1680:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** /* Disable the Capture compare channel */ +1681:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** TIM_CCxChannelCmd(htim->Instance, Channel, TIM_CCx_DISABLE); +1682:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** +1683:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** if (IS_TIM_BREAK_INSTANCE(htim->Instance) != RESET) +1684:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** { +1685:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** /* Disable the Main Output */ + ARM GAS /tmp/ccMtK8ce.s page 31 + + +1686:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** __HAL_TIM_MOE_DISABLE(htim); +1687:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** } +1688:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** +1689:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** /* Disable the Peripheral */ +1690:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** __HAL_TIM_DISABLE(htim); +1691:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** +1692:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** /* Set the TIM channel state */ +1693:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** TIM_CHANNEL_STATE_SET(htim, Channel, HAL_TIM_CHANNEL_STATE_READY); +1694:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** } +1695:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** +1696:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** /* Return function status */ +1697:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** return status; +1698:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** } +1699:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** +1700:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** /** +1701:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** * @brief Starts the TIM PWM signal generation in DMA mode. +1702:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** * @param htim TIM PWM handle +1703:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** * @param Channel TIM Channels to be enabled +1704:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** * This parameter can be one of the following values: +1705:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** * @arg TIM_CHANNEL_1: TIM Channel 1 selected +1706:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** * @arg TIM_CHANNEL_2: TIM Channel 2 selected +1707:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** * @arg TIM_CHANNEL_3: TIM Channel 3 selected +1708:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** * @arg TIM_CHANNEL_4: TIM Channel 4 selected +1709:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** * @param pData The source Buffer address. +1710:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** * @param Length The length of data to be transferred from memory to TIM peripheral +1711:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** * @retval HAL status +1712:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** */ +1713:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** HAL_StatusTypeDef HAL_TIM_PWM_Start_DMA(TIM_HandleTypeDef *htim, uint32_t Channel, const uint32_t * +1714:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** uint16_t Length) +1715:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** { +1716:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** HAL_StatusTypeDef status = HAL_OK; +1717:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** uint32_t tmpsmcr; +1718:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** +1719:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** /* Check the parameters */ +1720:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** assert_param(IS_TIM_CCX_INSTANCE(htim->Instance, Channel)); +1721:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** +1722:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** /* Set the TIM channel state */ +1723:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** if (TIM_CHANNEL_STATE_GET(htim, Channel) == HAL_TIM_CHANNEL_STATE_BUSY) +1724:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** { +1725:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** return HAL_BUSY; +1726:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** } +1727:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** else if (TIM_CHANNEL_STATE_GET(htim, Channel) == HAL_TIM_CHANNEL_STATE_READY) +1728:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** { +1729:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** if ((pData == NULL) || (Length == 0U)) +1730:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** { +1731:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** return HAL_ERROR; +1732:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** } +1733:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** else +1734:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** { +1735:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** TIM_CHANNEL_STATE_SET(htim, Channel, HAL_TIM_CHANNEL_STATE_BUSY); +1736:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** } +1737:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** } +1738:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** else +1739:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** { +1740:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** return HAL_ERROR; +1741:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** } +1742:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + ARM GAS /tmp/ccMtK8ce.s page 32 + + +1743:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** switch (Channel) +1744:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** { +1745:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** case TIM_CHANNEL_1: +1746:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** { +1747:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** /* Set the DMA compare callbacks */ +1748:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** htim->hdma[TIM_DMA_ID_CC1]->XferCpltCallback = TIM_DMADelayPulseCplt; +1749:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** htim->hdma[TIM_DMA_ID_CC1]->XferHalfCpltCallback = TIM_DMADelayPulseHalfCplt; +1750:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** +1751:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** /* Set the DMA error callback */ +1752:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** htim->hdma[TIM_DMA_ID_CC1]->XferErrorCallback = TIM_DMAError ; +1753:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** +1754:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** /* Enable the DMA channel */ +1755:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** if (HAL_DMA_Start_IT(htim->hdma[TIM_DMA_ID_CC1], (uint32_t)pData, (uint32_t)&htim->Instance-> +1756:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** Length) != HAL_OK) +1757:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** { +1758:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** /* Return error status */ +1759:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** return HAL_ERROR; +1760:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** } +1761:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** +1762:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** /* Enable the TIM Capture/Compare 1 DMA request */ +1763:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** __HAL_TIM_ENABLE_DMA(htim, TIM_DMA_CC1); +1764:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** break; +1765:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** } +1766:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** +1767:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** case TIM_CHANNEL_2: +1768:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** { +1769:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** /* Set the DMA compare callbacks */ +1770:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** htim->hdma[TIM_DMA_ID_CC2]->XferCpltCallback = TIM_DMADelayPulseCplt; +1771:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** htim->hdma[TIM_DMA_ID_CC2]->XferHalfCpltCallback = TIM_DMADelayPulseHalfCplt; +1772:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** +1773:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** /* Set the DMA error callback */ +1774:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** htim->hdma[TIM_DMA_ID_CC2]->XferErrorCallback = TIM_DMAError ; +1775:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** +1776:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** /* Enable the DMA channel */ +1777:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** if (HAL_DMA_Start_IT(htim->hdma[TIM_DMA_ID_CC2], (uint32_t)pData, (uint32_t)&htim->Instance-> +1778:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** Length) != HAL_OK) +1779:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** { +1780:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** /* Return error status */ +1781:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** return HAL_ERROR; +1782:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** } +1783:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** /* Enable the TIM Capture/Compare 2 DMA request */ +1784:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** __HAL_TIM_ENABLE_DMA(htim, TIM_DMA_CC2); +1785:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** break; +1786:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** } +1787:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** +1788:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** case TIM_CHANNEL_3: +1789:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** { +1790:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** /* Set the DMA compare callbacks */ +1791:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** htim->hdma[TIM_DMA_ID_CC3]->XferCpltCallback = TIM_DMADelayPulseCplt; +1792:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** htim->hdma[TIM_DMA_ID_CC3]->XferHalfCpltCallback = TIM_DMADelayPulseHalfCplt; +1793:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** +1794:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** /* Set the DMA error callback */ +1795:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** htim->hdma[TIM_DMA_ID_CC3]->XferErrorCallback = TIM_DMAError ; +1796:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** +1797:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** /* Enable the DMA channel */ +1798:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** if (HAL_DMA_Start_IT(htim->hdma[TIM_DMA_ID_CC3], (uint32_t)pData, (uint32_t)&htim->Instance-> +1799:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** Length) != HAL_OK) + ARM GAS /tmp/ccMtK8ce.s page 33 + + +1800:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** { +1801:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** /* Return error status */ +1802:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** return HAL_ERROR; +1803:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** } +1804:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** /* Enable the TIM Output Capture/Compare 3 request */ +1805:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** __HAL_TIM_ENABLE_DMA(htim, TIM_DMA_CC3); +1806:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** break; +1807:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** } +1808:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** +1809:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** case TIM_CHANNEL_4: +1810:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** { +1811:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** /* Set the DMA compare callbacks */ +1812:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** htim->hdma[TIM_DMA_ID_CC4]->XferCpltCallback = TIM_DMADelayPulseCplt; +1813:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** htim->hdma[TIM_DMA_ID_CC4]->XferHalfCpltCallback = TIM_DMADelayPulseHalfCplt; +1814:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** +1815:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** /* Set the DMA error callback */ +1816:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** htim->hdma[TIM_DMA_ID_CC4]->XferErrorCallback = TIM_DMAError ; +1817:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** +1818:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** /* Enable the DMA channel */ +1819:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** if (HAL_DMA_Start_IT(htim->hdma[TIM_DMA_ID_CC4], (uint32_t)pData, (uint32_t)&htim->Instance-> +1820:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** Length) != HAL_OK) +1821:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** { +1822:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** /* Return error status */ +1823:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** return HAL_ERROR; +1824:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** } +1825:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** /* Enable the TIM Capture/Compare 4 DMA request */ +1826:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** __HAL_TIM_ENABLE_DMA(htim, TIM_DMA_CC4); +1827:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** break; +1828:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** } +1829:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** +1830:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** default: +1831:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** status = HAL_ERROR; +1832:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** break; +1833:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** } +1834:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** +1835:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** if (status == HAL_OK) +1836:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** { +1837:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** /* Enable the Capture compare channel */ +1838:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** TIM_CCxChannelCmd(htim->Instance, Channel, TIM_CCx_ENABLE); +1839:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** +1840:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** if (IS_TIM_BREAK_INSTANCE(htim->Instance) != RESET) +1841:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** { +1842:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** /* Enable the main output */ +1843:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** __HAL_TIM_MOE_ENABLE(htim); +1844:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** } +1845:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** +1846:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** /* Enable the Peripheral, except in trigger mode where enable is automatically done with trigge +1847:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** if (IS_TIM_SLAVE_INSTANCE(htim->Instance)) +1848:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** { +1849:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** tmpsmcr = htim->Instance->SMCR & TIM_SMCR_SMS; +1850:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** if (!IS_TIM_SLAVEMODE_TRIGGER_ENABLED(tmpsmcr)) +1851:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** { +1852:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** __HAL_TIM_ENABLE(htim); +1853:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** } +1854:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** } +1855:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** else +1856:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** { + ARM GAS /tmp/ccMtK8ce.s page 34 + + +1857:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** __HAL_TIM_ENABLE(htim); +1858:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** } +1859:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** } +1860:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** +1861:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** /* Return function status */ +1862:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** return status; +1863:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** } +1864:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** +1865:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** /** +1866:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** * @brief Stops the TIM PWM signal generation in DMA mode. +1867:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** * @param htim TIM PWM handle +1868:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** * @param Channel TIM Channels to be disabled +1869:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** * This parameter can be one of the following values: +1870:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** * @arg TIM_CHANNEL_1: TIM Channel 1 selected +1871:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** * @arg TIM_CHANNEL_2: TIM Channel 2 selected +1872:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** * @arg TIM_CHANNEL_3: TIM Channel 3 selected +1873:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** * @arg TIM_CHANNEL_4: TIM Channel 4 selected +1874:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** * @retval HAL status +1875:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** */ +1876:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** HAL_StatusTypeDef HAL_TIM_PWM_Stop_DMA(TIM_HandleTypeDef *htim, uint32_t Channel) +1877:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** { +1878:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** HAL_StatusTypeDef status = HAL_OK; +1879:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** +1880:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** /* Check the parameters */ +1881:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** assert_param(IS_TIM_CCX_INSTANCE(htim->Instance, Channel)); +1882:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** +1883:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** switch (Channel) +1884:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** { +1885:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** case TIM_CHANNEL_1: +1886:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** { +1887:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** /* Disable the TIM Capture/Compare 1 DMA request */ +1888:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** __HAL_TIM_DISABLE_DMA(htim, TIM_DMA_CC1); +1889:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** (void)HAL_DMA_Abort_IT(htim->hdma[TIM_DMA_ID_CC1]); +1890:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** break; +1891:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** } +1892:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** +1893:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** case TIM_CHANNEL_2: +1894:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** { +1895:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** /* Disable the TIM Capture/Compare 2 DMA request */ +1896:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** __HAL_TIM_DISABLE_DMA(htim, TIM_DMA_CC2); +1897:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** (void)HAL_DMA_Abort_IT(htim->hdma[TIM_DMA_ID_CC2]); +1898:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** break; +1899:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** } +1900:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** +1901:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** case TIM_CHANNEL_3: +1902:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** { +1903:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** /* Disable the TIM Capture/Compare 3 DMA request */ +1904:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** __HAL_TIM_DISABLE_DMA(htim, TIM_DMA_CC3); +1905:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** (void)HAL_DMA_Abort_IT(htim->hdma[TIM_DMA_ID_CC3]); +1906:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** break; +1907:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** } +1908:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** +1909:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** case TIM_CHANNEL_4: +1910:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** { +1911:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** /* Disable the TIM Capture/Compare 4 interrupt */ +1912:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** __HAL_TIM_DISABLE_DMA(htim, TIM_DMA_CC4); +1913:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** (void)HAL_DMA_Abort_IT(htim->hdma[TIM_DMA_ID_CC4]); + ARM GAS /tmp/ccMtK8ce.s page 35 + + +1914:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** break; +1915:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** } +1916:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** +1917:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** default: +1918:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** status = HAL_ERROR; +1919:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** break; +1920:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** } +1921:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** +1922:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** if (status == HAL_OK) +1923:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** { +1924:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** /* Disable the Capture compare channel */ +1925:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** TIM_CCxChannelCmd(htim->Instance, Channel, TIM_CCx_DISABLE); +1926:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** +1927:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** if (IS_TIM_BREAK_INSTANCE(htim->Instance) != RESET) +1928:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** { +1929:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** /* Disable the Main Output */ +1930:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** __HAL_TIM_MOE_DISABLE(htim); +1931:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** } +1932:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** +1933:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** /* Disable the Peripheral */ +1934:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** __HAL_TIM_DISABLE(htim); +1935:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** +1936:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** /* Set the TIM channel state */ +1937:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** TIM_CHANNEL_STATE_SET(htim, Channel, HAL_TIM_CHANNEL_STATE_READY); +1938:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** } +1939:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** +1940:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** /* Return function status */ +1941:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** return status; +1942:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** } +1943:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** +1944:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** /** +1945:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** * @} +1946:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** */ +1947:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** +1948:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** /** @defgroup TIM_Exported_Functions_Group4 TIM Input Capture functions +1949:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** * @brief TIM Input Capture functions +1950:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** * +1951:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** @verbatim +1952:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** ============================================================================== +1953:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** ##### TIM Input Capture functions ##### +1954:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** ============================================================================== +1955:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** [..] +1956:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** This section provides functions allowing to: +1957:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** (+) Initialize and configure the TIM Input Capture. +1958:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** (+) De-initialize the TIM Input Capture. +1959:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** (+) Start the TIM Input Capture. +1960:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** (+) Stop the TIM Input Capture. +1961:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** (+) Start the TIM Input Capture and enable interrupt. +1962:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** (+) Stop the TIM Input Capture and disable interrupt. +1963:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** (+) Start the TIM Input Capture and enable DMA transfer. +1964:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** (+) Stop the TIM Input Capture and disable DMA transfer. +1965:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** +1966:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** @endverbatim +1967:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** * @{ +1968:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** */ +1969:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** /** +1970:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** * @brief Initializes the TIM Input Capture Time base according to the specified + ARM GAS /tmp/ccMtK8ce.s page 36 + + +1971:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** * parameters in the TIM_HandleTypeDef and initializes the associated handle. +1972:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** * @note Switching from Center Aligned counter mode to Edge counter mode (or reverse) +1973:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** * requires a timer reset to avoid unexpected direction +1974:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** * due to DIR bit readonly in center aligned mode. +1975:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** * Ex: call @ref HAL_TIM_IC_DeInit() before HAL_TIM_IC_Init() +1976:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** * @param htim TIM Input Capture handle +1977:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** * @retval HAL status +1978:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** */ +1979:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** HAL_StatusTypeDef HAL_TIM_IC_Init(TIM_HandleTypeDef *htim) +1980:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** { +1981:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** /* Check the TIM handle allocation */ +1982:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** if (htim == NULL) +1983:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** { +1984:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** return HAL_ERROR; +1985:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** } +1986:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** +1987:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** /* Check the parameters */ +1988:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** assert_param(IS_TIM_INSTANCE(htim->Instance)); +1989:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** assert_param(IS_TIM_COUNTER_MODE(htim->Init.CounterMode)); +1990:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** assert_param(IS_TIM_CLOCKDIVISION_DIV(htim->Init.ClockDivision)); +1991:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** assert_param(IS_TIM_PERIOD(htim, htim->Init.Period)); +1992:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** assert_param(IS_TIM_AUTORELOAD_PRELOAD(htim->Init.AutoReloadPreload)); +1993:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** +1994:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** if (htim->State == HAL_TIM_STATE_RESET) +1995:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** { +1996:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** /* Allocate lock resource and initialize it */ +1997:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** htim->Lock = HAL_UNLOCKED; +1998:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** +1999:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** #if (USE_HAL_TIM_REGISTER_CALLBACKS == 1) +2000:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** /* Reset interrupt callbacks to legacy weak callbacks */ +2001:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** TIM_ResetCallback(htim); +2002:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** +2003:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** if (htim->IC_MspInitCallback == NULL) +2004:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** { +2005:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** htim->IC_MspInitCallback = HAL_TIM_IC_MspInit; +2006:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** } +2007:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** /* Init the low level hardware : GPIO, CLOCK, NVIC */ +2008:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** htim->IC_MspInitCallback(htim); +2009:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** #else +2010:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** /* Init the low level hardware : GPIO, CLOCK, NVIC and DMA */ +2011:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** HAL_TIM_IC_MspInit(htim); +2012:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** #endif /* USE_HAL_TIM_REGISTER_CALLBACKS */ +2013:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** } +2014:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** +2015:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** /* Set the TIM state */ +2016:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** htim->State = HAL_TIM_STATE_BUSY; +2017:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** +2018:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** /* Init the base time for the input capture */ +2019:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** TIM_Base_SetConfig(htim->Instance, &htim->Init); +2020:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** +2021:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** /* Initialize the DMA burst operation state */ +2022:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** htim->DMABurstState = HAL_DMA_BURST_STATE_READY; +2023:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** +2024:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** /* Initialize the TIM channels state */ +2025:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** TIM_CHANNEL_STATE_SET_ALL(htim, HAL_TIM_CHANNEL_STATE_READY); +2026:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** TIM_CHANNEL_N_STATE_SET_ALL(htim, HAL_TIM_CHANNEL_STATE_READY); +2027:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + ARM GAS /tmp/ccMtK8ce.s page 37 + + +2028:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** /* Initialize the TIM state*/ +2029:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** htim->State = HAL_TIM_STATE_READY; +2030:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** +2031:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** return HAL_OK; +2032:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** } +2033:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** +2034:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** /** +2035:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** * @brief DeInitializes the TIM peripheral +2036:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** * @param htim TIM Input Capture handle +2037:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** * @retval HAL status +2038:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** */ +2039:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** HAL_StatusTypeDef HAL_TIM_IC_DeInit(TIM_HandleTypeDef *htim) +2040:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** { +2041:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** /* Check the parameters */ +2042:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** assert_param(IS_TIM_INSTANCE(htim->Instance)); +2043:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** +2044:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** htim->State = HAL_TIM_STATE_BUSY; +2045:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** +2046:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** /* Disable the TIM Peripheral Clock */ +2047:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** __HAL_TIM_DISABLE(htim); +2048:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** +2049:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** #if (USE_HAL_TIM_REGISTER_CALLBACKS == 1) +2050:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** if (htim->IC_MspDeInitCallback == NULL) +2051:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** { +2052:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** htim->IC_MspDeInitCallback = HAL_TIM_IC_MspDeInit; +2053:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** } +2054:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** /* DeInit the low level hardware */ +2055:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** htim->IC_MspDeInitCallback(htim); +2056:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** #else +2057:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** /* DeInit the low level hardware: GPIO, CLOCK, NVIC and DMA */ +2058:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** HAL_TIM_IC_MspDeInit(htim); +2059:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** #endif /* USE_HAL_TIM_REGISTER_CALLBACKS */ +2060:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** +2061:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** /* Change the DMA burst operation state */ +2062:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** htim->DMABurstState = HAL_DMA_BURST_STATE_RESET; +2063:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** +2064:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** /* Change the TIM channels state */ +2065:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** TIM_CHANNEL_STATE_SET_ALL(htim, HAL_TIM_CHANNEL_STATE_RESET); +2066:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** TIM_CHANNEL_N_STATE_SET_ALL(htim, HAL_TIM_CHANNEL_STATE_RESET); +2067:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** +2068:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** /* Change TIM state */ +2069:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** htim->State = HAL_TIM_STATE_RESET; +2070:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** +2071:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** /* Release Lock */ +2072:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** __HAL_UNLOCK(htim); +2073:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** +2074:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** return HAL_OK; +2075:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** } +2076:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** +2077:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** /** +2078:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** * @brief Initializes the TIM Input Capture MSP. +2079:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** * @param htim TIM Input Capture handle +2080:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** * @retval None +2081:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** */ +2082:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** __weak void HAL_TIM_IC_MspInit(TIM_HandleTypeDef *htim) +2083:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** { +2084:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** /* Prevent unused argument(s) compilation warning */ + ARM GAS /tmp/ccMtK8ce.s page 38 + + +2085:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** UNUSED(htim); +2086:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** +2087:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** /* NOTE : This function should not be modified, when the callback is needed, +2088:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** the HAL_TIM_IC_MspInit could be implemented in the user file +2089:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** */ +2090:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** } +2091:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** +2092:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** /** +2093:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** * @brief DeInitializes TIM Input Capture MSP. +2094:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** * @param htim TIM handle +2095:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** * @retval None +2096:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** */ +2097:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** __weak void HAL_TIM_IC_MspDeInit(TIM_HandleTypeDef *htim) +2098:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** { +2099:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** /* Prevent unused argument(s) compilation warning */ +2100:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** UNUSED(htim); +2101:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** +2102:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** /* NOTE : This function should not be modified, when the callback is needed, +2103:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** the HAL_TIM_IC_MspDeInit could be implemented in the user file +2104:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** */ +2105:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** } +2106:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** +2107:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** /** +2108:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** * @brief Starts the TIM Input Capture measurement. +2109:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** * @param htim TIM Input Capture handle +2110:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** * @param Channel TIM Channels to be enabled +2111:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** * This parameter can be one of the following values: +2112:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** * @arg TIM_CHANNEL_1: TIM Channel 1 selected +2113:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** * @arg TIM_CHANNEL_2: TIM Channel 2 selected +2114:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** * @arg TIM_CHANNEL_3: TIM Channel 3 selected +2115:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** * @arg TIM_CHANNEL_4: TIM Channel 4 selected +2116:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** * @retval HAL status +2117:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** */ +2118:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** HAL_StatusTypeDef HAL_TIM_IC_Start(TIM_HandleTypeDef *htim, uint32_t Channel) +2119:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** { +2120:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** uint32_t tmpsmcr; +2121:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** HAL_TIM_ChannelStateTypeDef channel_state = TIM_CHANNEL_STATE_GET(htim, Channel); +2122:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** HAL_TIM_ChannelStateTypeDef complementary_channel_state = TIM_CHANNEL_N_STATE_GET(htim, Channel); +2123:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** +2124:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** /* Check the parameters */ +2125:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** assert_param(IS_TIM_CCX_INSTANCE(htim->Instance, Channel)); +2126:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** +2127:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** /* Check the TIM channel state */ +2128:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** if ((channel_state != HAL_TIM_CHANNEL_STATE_READY) +2129:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** || (complementary_channel_state != HAL_TIM_CHANNEL_STATE_READY)) +2130:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** { +2131:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** return HAL_ERROR; +2132:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** } +2133:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** +2134:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** /* Set the TIM channel state */ +2135:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** TIM_CHANNEL_STATE_SET(htim, Channel, HAL_TIM_CHANNEL_STATE_BUSY); +2136:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** TIM_CHANNEL_N_STATE_SET(htim, Channel, HAL_TIM_CHANNEL_STATE_BUSY); +2137:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** +2138:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** /* Enable the Input Capture channel */ +2139:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** TIM_CCxChannelCmd(htim->Instance, Channel, TIM_CCx_ENABLE); +2140:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** +2141:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** /* Enable the Peripheral, except in trigger mode where enable is automatically done with trigger + ARM GAS /tmp/ccMtK8ce.s page 39 + + +2142:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** if (IS_TIM_SLAVE_INSTANCE(htim->Instance)) +2143:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** { +2144:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** tmpsmcr = htim->Instance->SMCR & TIM_SMCR_SMS; +2145:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** if (!IS_TIM_SLAVEMODE_TRIGGER_ENABLED(tmpsmcr)) +2146:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** { +2147:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** __HAL_TIM_ENABLE(htim); +2148:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** } +2149:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** } +2150:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** else +2151:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** { +2152:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** __HAL_TIM_ENABLE(htim); +2153:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** } +2154:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** +2155:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** /* Return function status */ +2156:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** return HAL_OK; +2157:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** } +2158:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** +2159:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** /** +2160:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** * @brief Stops the TIM Input Capture measurement. +2161:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** * @param htim TIM Input Capture handle +2162:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** * @param Channel TIM Channels to be disabled +2163:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** * This parameter can be one of the following values: +2164:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** * @arg TIM_CHANNEL_1: TIM Channel 1 selected +2165:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** * @arg TIM_CHANNEL_2: TIM Channel 2 selected +2166:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** * @arg TIM_CHANNEL_3: TIM Channel 3 selected +2167:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** * @arg TIM_CHANNEL_4: TIM Channel 4 selected +2168:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** * @retval HAL status +2169:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** */ +2170:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** HAL_StatusTypeDef HAL_TIM_IC_Stop(TIM_HandleTypeDef *htim, uint32_t Channel) +2171:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** { +2172:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** /* Check the parameters */ +2173:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** assert_param(IS_TIM_CCX_INSTANCE(htim->Instance, Channel)); +2174:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** +2175:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** /* Disable the Input Capture channel */ +2176:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** TIM_CCxChannelCmd(htim->Instance, Channel, TIM_CCx_DISABLE); +2177:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** +2178:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** /* Disable the Peripheral */ +2179:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** __HAL_TIM_DISABLE(htim); +2180:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** +2181:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** /* Set the TIM channel state */ +2182:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** TIM_CHANNEL_STATE_SET(htim, Channel, HAL_TIM_CHANNEL_STATE_READY); +2183:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** TIM_CHANNEL_N_STATE_SET(htim, Channel, HAL_TIM_CHANNEL_STATE_READY); +2184:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** +2185:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** /* Return function status */ +2186:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** return HAL_OK; +2187:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** } +2188:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** +2189:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** /** +2190:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** * @brief Starts the TIM Input Capture measurement in interrupt mode. +2191:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** * @param htim TIM Input Capture handle +2192:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** * @param Channel TIM Channels to be enabled +2193:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** * This parameter can be one of the following values: +2194:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** * @arg TIM_CHANNEL_1: TIM Channel 1 selected +2195:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** * @arg TIM_CHANNEL_2: TIM Channel 2 selected +2196:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** * @arg TIM_CHANNEL_3: TIM Channel 3 selected +2197:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** * @arg TIM_CHANNEL_4: TIM Channel 4 selected +2198:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** * @retval HAL status + ARM GAS /tmp/ccMtK8ce.s page 40 + + +2199:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** */ +2200:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** HAL_StatusTypeDef HAL_TIM_IC_Start_IT(TIM_HandleTypeDef *htim, uint32_t Channel) +2201:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** { +2202:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** HAL_StatusTypeDef status = HAL_OK; +2203:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** uint32_t tmpsmcr; +2204:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** +2205:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** HAL_TIM_ChannelStateTypeDef channel_state = TIM_CHANNEL_STATE_GET(htim, Channel); +2206:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** HAL_TIM_ChannelStateTypeDef complementary_channel_state = TIM_CHANNEL_N_STATE_GET(htim, Channel); +2207:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** +2208:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** /* Check the parameters */ +2209:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** assert_param(IS_TIM_CCX_INSTANCE(htim->Instance, Channel)); +2210:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** +2211:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** /* Check the TIM channel state */ +2212:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** if ((channel_state != HAL_TIM_CHANNEL_STATE_READY) +2213:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** || (complementary_channel_state != HAL_TIM_CHANNEL_STATE_READY)) +2214:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** { +2215:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** return HAL_ERROR; +2216:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** } +2217:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** +2218:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** /* Set the TIM channel state */ +2219:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** TIM_CHANNEL_STATE_SET(htim, Channel, HAL_TIM_CHANNEL_STATE_BUSY); +2220:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** TIM_CHANNEL_N_STATE_SET(htim, Channel, HAL_TIM_CHANNEL_STATE_BUSY); +2221:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** +2222:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** switch (Channel) +2223:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** { +2224:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** case TIM_CHANNEL_1: +2225:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** { +2226:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** /* Enable the TIM Capture/Compare 1 interrupt */ +2227:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** __HAL_TIM_ENABLE_IT(htim, TIM_IT_CC1); +2228:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** break; +2229:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** } +2230:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** +2231:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** case TIM_CHANNEL_2: +2232:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** { +2233:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** /* Enable the TIM Capture/Compare 2 interrupt */ +2234:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** __HAL_TIM_ENABLE_IT(htim, TIM_IT_CC2); +2235:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** break; +2236:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** } +2237:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** +2238:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** case TIM_CHANNEL_3: +2239:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** { +2240:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** /* Enable the TIM Capture/Compare 3 interrupt */ +2241:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** __HAL_TIM_ENABLE_IT(htim, TIM_IT_CC3); +2242:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** break; +2243:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** } +2244:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** +2245:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** case TIM_CHANNEL_4: +2246:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** { +2247:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** /* Enable the TIM Capture/Compare 4 interrupt */ +2248:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** __HAL_TIM_ENABLE_IT(htim, TIM_IT_CC4); +2249:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** break; +2250:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** } +2251:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** +2252:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** default: +2253:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** status = HAL_ERROR; +2254:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** break; +2255:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** } + ARM GAS /tmp/ccMtK8ce.s page 41 + + +2256:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** +2257:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** if (status == HAL_OK) +2258:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** { +2259:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** /* Enable the Input Capture channel */ +2260:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** TIM_CCxChannelCmd(htim->Instance, Channel, TIM_CCx_ENABLE); +2261:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** +2262:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** /* Enable the Peripheral, except in trigger mode where enable is automatically done with trigge +2263:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** if (IS_TIM_SLAVE_INSTANCE(htim->Instance)) +2264:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** { +2265:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** tmpsmcr = htim->Instance->SMCR & TIM_SMCR_SMS; +2266:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** if (!IS_TIM_SLAVEMODE_TRIGGER_ENABLED(tmpsmcr)) +2267:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** { +2268:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** __HAL_TIM_ENABLE(htim); +2269:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** } +2270:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** } +2271:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** else +2272:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** { +2273:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** __HAL_TIM_ENABLE(htim); +2274:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** } +2275:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** } +2276:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** +2277:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** /* Return function status */ +2278:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** return status; +2279:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** } +2280:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** +2281:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** /** +2282:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** * @brief Stops the TIM Input Capture measurement in interrupt mode. +2283:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** * @param htim TIM Input Capture handle +2284:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** * @param Channel TIM Channels to be disabled +2285:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** * This parameter can be one of the following values: +2286:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** * @arg TIM_CHANNEL_1: TIM Channel 1 selected +2287:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** * @arg TIM_CHANNEL_2: TIM Channel 2 selected +2288:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** * @arg TIM_CHANNEL_3: TIM Channel 3 selected +2289:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** * @arg TIM_CHANNEL_4: TIM Channel 4 selected +2290:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** * @retval HAL status +2291:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** */ +2292:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** HAL_StatusTypeDef HAL_TIM_IC_Stop_IT(TIM_HandleTypeDef *htim, uint32_t Channel) +2293:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** { +2294:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** HAL_StatusTypeDef status = HAL_OK; +2295:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** +2296:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** /* Check the parameters */ +2297:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** assert_param(IS_TIM_CCX_INSTANCE(htim->Instance, Channel)); +2298:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** +2299:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** switch (Channel) +2300:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** { +2301:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** case TIM_CHANNEL_1: +2302:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** { +2303:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** /* Disable the TIM Capture/Compare 1 interrupt */ +2304:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** __HAL_TIM_DISABLE_IT(htim, TIM_IT_CC1); +2305:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** break; +2306:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** } +2307:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** +2308:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** case TIM_CHANNEL_2: +2309:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** { +2310:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** /* Disable the TIM Capture/Compare 2 interrupt */ +2311:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** __HAL_TIM_DISABLE_IT(htim, TIM_IT_CC2); +2312:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** break; + ARM GAS /tmp/ccMtK8ce.s page 42 + + +2313:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** } +2314:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** +2315:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** case TIM_CHANNEL_3: +2316:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** { +2317:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** /* Disable the TIM Capture/Compare 3 interrupt */ +2318:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** __HAL_TIM_DISABLE_IT(htim, TIM_IT_CC3); +2319:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** break; +2320:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** } +2321:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** +2322:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** case TIM_CHANNEL_4: +2323:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** { +2324:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** /* Disable the TIM Capture/Compare 4 interrupt */ +2325:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** __HAL_TIM_DISABLE_IT(htim, TIM_IT_CC4); +2326:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** break; +2327:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** } +2328:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** +2329:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** default: +2330:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** status = HAL_ERROR; +2331:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** break; +2332:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** } +2333:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** +2334:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** if (status == HAL_OK) +2335:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** { +2336:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** /* Disable the Input Capture channel */ +2337:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** TIM_CCxChannelCmd(htim->Instance, Channel, TIM_CCx_DISABLE); +2338:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** +2339:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** /* Disable the Peripheral */ +2340:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** __HAL_TIM_DISABLE(htim); +2341:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** +2342:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** /* Set the TIM channel state */ +2343:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** TIM_CHANNEL_STATE_SET(htim, Channel, HAL_TIM_CHANNEL_STATE_READY); +2344:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** TIM_CHANNEL_N_STATE_SET(htim, Channel, HAL_TIM_CHANNEL_STATE_READY); +2345:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** } +2346:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** +2347:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** /* Return function status */ +2348:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** return status; +2349:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** } +2350:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** +2351:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** /** +2352:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** * @brief Starts the TIM Input Capture measurement in DMA mode. +2353:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** * @param htim TIM Input Capture handle +2354:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** * @param Channel TIM Channels to be enabled +2355:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** * This parameter can be one of the following values: +2356:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** * @arg TIM_CHANNEL_1: TIM Channel 1 selected +2357:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** * @arg TIM_CHANNEL_2: TIM Channel 2 selected +2358:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** * @arg TIM_CHANNEL_3: TIM Channel 3 selected +2359:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** * @arg TIM_CHANNEL_4: TIM Channel 4 selected +2360:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** * @param pData The destination Buffer address. +2361:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** * @param Length The length of data to be transferred from TIM peripheral to memory. +2362:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** * @retval HAL status +2363:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** */ +2364:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** HAL_StatusTypeDef HAL_TIM_IC_Start_DMA(TIM_HandleTypeDef *htim, uint32_t Channel, uint32_t *pData, +2365:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** { +2366:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** HAL_StatusTypeDef status = HAL_OK; +2367:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** uint32_t tmpsmcr; +2368:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** +2369:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** HAL_TIM_ChannelStateTypeDef channel_state = TIM_CHANNEL_STATE_GET(htim, Channel); + ARM GAS /tmp/ccMtK8ce.s page 43 + + +2370:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** HAL_TIM_ChannelStateTypeDef complementary_channel_state = TIM_CHANNEL_N_STATE_GET(htim, Channel); +2371:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** +2372:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** /* Check the parameters */ +2373:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** assert_param(IS_TIM_CCX_INSTANCE(htim->Instance, Channel)); +2374:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** assert_param(IS_TIM_DMA_CC_INSTANCE(htim->Instance)); +2375:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** +2376:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** /* Set the TIM channel state */ +2377:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** if ((channel_state == HAL_TIM_CHANNEL_STATE_BUSY) +2378:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** || (complementary_channel_state == HAL_TIM_CHANNEL_STATE_BUSY)) +2379:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** { +2380:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** return HAL_BUSY; +2381:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** } +2382:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** else if ((channel_state == HAL_TIM_CHANNEL_STATE_READY) +2383:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** && (complementary_channel_state == HAL_TIM_CHANNEL_STATE_READY)) +2384:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** { +2385:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** if ((pData == NULL) || (Length == 0U)) +2386:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** { +2387:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** return HAL_ERROR; +2388:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** } +2389:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** else +2390:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** { +2391:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** TIM_CHANNEL_STATE_SET(htim, Channel, HAL_TIM_CHANNEL_STATE_BUSY); +2392:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** TIM_CHANNEL_N_STATE_SET(htim, Channel, HAL_TIM_CHANNEL_STATE_BUSY); +2393:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** } +2394:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** } +2395:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** else +2396:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** { +2397:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** return HAL_ERROR; +2398:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** } +2399:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** +2400:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** /* Enable the Input Capture channel */ +2401:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** TIM_CCxChannelCmd(htim->Instance, Channel, TIM_CCx_ENABLE); +2402:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** +2403:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** switch (Channel) +2404:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** { +2405:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** case TIM_CHANNEL_1: +2406:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** { +2407:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** /* Set the DMA capture callbacks */ +2408:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** htim->hdma[TIM_DMA_ID_CC1]->XferCpltCallback = TIM_DMACaptureCplt; +2409:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** htim->hdma[TIM_DMA_ID_CC1]->XferHalfCpltCallback = TIM_DMACaptureHalfCplt; +2410:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** +2411:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** /* Set the DMA error callback */ +2412:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** htim->hdma[TIM_DMA_ID_CC1]->XferErrorCallback = TIM_DMAError ; +2413:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** +2414:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** /* Enable the DMA channel */ +2415:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** if (HAL_DMA_Start_IT(htim->hdma[TIM_DMA_ID_CC1], (uint32_t)&htim->Instance->CCR1, (uint32_t)p +2416:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** Length) != HAL_OK) +2417:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** { +2418:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** /* Return error status */ +2419:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** return HAL_ERROR; +2420:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** } +2421:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** /* Enable the TIM Capture/Compare 1 DMA request */ +2422:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** __HAL_TIM_ENABLE_DMA(htim, TIM_DMA_CC1); +2423:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** break; +2424:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** } +2425:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** +2426:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** case TIM_CHANNEL_2: + ARM GAS /tmp/ccMtK8ce.s page 44 + + +2427:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** { +2428:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** /* Set the DMA capture callbacks */ +2429:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** htim->hdma[TIM_DMA_ID_CC2]->XferCpltCallback = TIM_DMACaptureCplt; +2430:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** htim->hdma[TIM_DMA_ID_CC2]->XferHalfCpltCallback = TIM_DMACaptureHalfCplt; +2431:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** +2432:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** /* Set the DMA error callback */ +2433:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** htim->hdma[TIM_DMA_ID_CC2]->XferErrorCallback = TIM_DMAError ; +2434:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** +2435:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** /* Enable the DMA channel */ +2436:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** if (HAL_DMA_Start_IT(htim->hdma[TIM_DMA_ID_CC2], (uint32_t)&htim->Instance->CCR2, (uint32_t)p +2437:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** Length) != HAL_OK) +2438:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** { +2439:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** /* Return error status */ +2440:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** return HAL_ERROR; +2441:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** } +2442:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** /* Enable the TIM Capture/Compare 2 DMA request */ +2443:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** __HAL_TIM_ENABLE_DMA(htim, TIM_DMA_CC2); +2444:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** break; +2445:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** } +2446:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** +2447:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** case TIM_CHANNEL_3: +2448:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** { +2449:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** /* Set the DMA capture callbacks */ +2450:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** htim->hdma[TIM_DMA_ID_CC3]->XferCpltCallback = TIM_DMACaptureCplt; +2451:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** htim->hdma[TIM_DMA_ID_CC3]->XferHalfCpltCallback = TIM_DMACaptureHalfCplt; +2452:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** +2453:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** /* Set the DMA error callback */ +2454:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** htim->hdma[TIM_DMA_ID_CC3]->XferErrorCallback = TIM_DMAError ; +2455:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** +2456:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** /* Enable the DMA channel */ +2457:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** if (HAL_DMA_Start_IT(htim->hdma[TIM_DMA_ID_CC3], (uint32_t)&htim->Instance->CCR3, (uint32_t)p +2458:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** Length) != HAL_OK) +2459:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** { +2460:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** /* Return error status */ +2461:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** return HAL_ERROR; +2462:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** } +2463:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** /* Enable the TIM Capture/Compare 3 DMA request */ +2464:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** __HAL_TIM_ENABLE_DMA(htim, TIM_DMA_CC3); +2465:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** break; +2466:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** } +2467:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** +2468:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** case TIM_CHANNEL_4: +2469:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** { +2470:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** /* Set the DMA capture callbacks */ +2471:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** htim->hdma[TIM_DMA_ID_CC4]->XferCpltCallback = TIM_DMACaptureCplt; +2472:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** htim->hdma[TIM_DMA_ID_CC4]->XferHalfCpltCallback = TIM_DMACaptureHalfCplt; +2473:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** +2474:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** /* Set the DMA error callback */ +2475:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** htim->hdma[TIM_DMA_ID_CC4]->XferErrorCallback = TIM_DMAError ; +2476:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** +2477:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** /* Enable the DMA channel */ +2478:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** if (HAL_DMA_Start_IT(htim->hdma[TIM_DMA_ID_CC4], (uint32_t)&htim->Instance->CCR4, (uint32_t)p +2479:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** Length) != HAL_OK) +2480:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** { +2481:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** /* Return error status */ +2482:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** return HAL_ERROR; +2483:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** } + ARM GAS /tmp/ccMtK8ce.s page 45 + + +2484:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** /* Enable the TIM Capture/Compare 4 DMA request */ +2485:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** __HAL_TIM_ENABLE_DMA(htim, TIM_DMA_CC4); +2486:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** break; +2487:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** } +2488:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** +2489:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** default: +2490:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** status = HAL_ERROR; +2491:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** break; +2492:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** } +2493:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** +2494:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** /* Enable the Peripheral, except in trigger mode where enable is automatically done with trigger +2495:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** if (IS_TIM_SLAVE_INSTANCE(htim->Instance)) +2496:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** { +2497:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** tmpsmcr = htim->Instance->SMCR & TIM_SMCR_SMS; +2498:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** if (!IS_TIM_SLAVEMODE_TRIGGER_ENABLED(tmpsmcr)) +2499:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** { +2500:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** __HAL_TIM_ENABLE(htim); +2501:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** } +2502:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** } +2503:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** else +2504:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** { +2505:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** __HAL_TIM_ENABLE(htim); +2506:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** } +2507:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** +2508:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** /* Return function status */ +2509:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** return status; +2510:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** } +2511:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** +2512:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** /** +2513:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** * @brief Stops the TIM Input Capture measurement in DMA mode. +2514:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** * @param htim TIM Input Capture handle +2515:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** * @param Channel TIM Channels to be disabled +2516:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** * This parameter can be one of the following values: +2517:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** * @arg TIM_CHANNEL_1: TIM Channel 1 selected +2518:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** * @arg TIM_CHANNEL_2: TIM Channel 2 selected +2519:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** * @arg TIM_CHANNEL_3: TIM Channel 3 selected +2520:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** * @arg TIM_CHANNEL_4: TIM Channel 4 selected +2521:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** * @retval HAL status +2522:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** */ +2523:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** HAL_StatusTypeDef HAL_TIM_IC_Stop_DMA(TIM_HandleTypeDef *htim, uint32_t Channel) +2524:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** { +2525:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** HAL_StatusTypeDef status = HAL_OK; +2526:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** +2527:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** /* Check the parameters */ +2528:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** assert_param(IS_TIM_CCX_INSTANCE(htim->Instance, Channel)); +2529:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** assert_param(IS_TIM_DMA_CC_INSTANCE(htim->Instance)); +2530:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** +2531:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** /* Disable the Input Capture channel */ +2532:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** TIM_CCxChannelCmd(htim->Instance, Channel, TIM_CCx_DISABLE); +2533:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** +2534:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** switch (Channel) +2535:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** { +2536:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** case TIM_CHANNEL_1: +2537:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** { +2538:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** /* Disable the TIM Capture/Compare 1 DMA request */ +2539:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** __HAL_TIM_DISABLE_DMA(htim, TIM_DMA_CC1); +2540:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** (void)HAL_DMA_Abort_IT(htim->hdma[TIM_DMA_ID_CC1]); + ARM GAS /tmp/ccMtK8ce.s page 46 + + +2541:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** break; +2542:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** } +2543:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** +2544:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** case TIM_CHANNEL_2: +2545:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** { +2546:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** /* Disable the TIM Capture/Compare 2 DMA request */ +2547:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** __HAL_TIM_DISABLE_DMA(htim, TIM_DMA_CC2); +2548:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** (void)HAL_DMA_Abort_IT(htim->hdma[TIM_DMA_ID_CC2]); +2549:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** break; +2550:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** } +2551:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** +2552:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** case TIM_CHANNEL_3: +2553:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** { +2554:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** /* Disable the TIM Capture/Compare 3 DMA request */ +2555:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** __HAL_TIM_DISABLE_DMA(htim, TIM_DMA_CC3); +2556:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** (void)HAL_DMA_Abort_IT(htim->hdma[TIM_DMA_ID_CC3]); +2557:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** break; +2558:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** } +2559:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** +2560:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** case TIM_CHANNEL_4: +2561:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** { +2562:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** /* Disable the TIM Capture/Compare 4 DMA request */ +2563:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** __HAL_TIM_DISABLE_DMA(htim, TIM_DMA_CC4); +2564:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** (void)HAL_DMA_Abort_IT(htim->hdma[TIM_DMA_ID_CC4]); +2565:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** break; +2566:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** } +2567:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** +2568:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** default: +2569:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** status = HAL_ERROR; +2570:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** break; +2571:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** } +2572:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** +2573:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** if (status == HAL_OK) +2574:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** { +2575:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** /* Disable the Peripheral */ +2576:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** __HAL_TIM_DISABLE(htim); +2577:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** +2578:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** /* Set the TIM channel state */ +2579:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** TIM_CHANNEL_STATE_SET(htim, Channel, HAL_TIM_CHANNEL_STATE_READY); +2580:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** TIM_CHANNEL_N_STATE_SET(htim, Channel, HAL_TIM_CHANNEL_STATE_READY); +2581:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** } +2582:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** +2583:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** /* Return function status */ +2584:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** return status; +2585:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** } +2586:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** /** +2587:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** * @} +2588:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** */ +2589:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** +2590:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** /** @defgroup TIM_Exported_Functions_Group5 TIM One Pulse functions +2591:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** * @brief TIM One Pulse functions +2592:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** * +2593:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** @verbatim +2594:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** ============================================================================== +2595:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** ##### TIM One Pulse functions ##### +2596:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** ============================================================================== +2597:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** [..] + ARM GAS /tmp/ccMtK8ce.s page 47 + + +2598:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** This section provides functions allowing to: +2599:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** (+) Initialize and configure the TIM One Pulse. +2600:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** (+) De-initialize the TIM One Pulse. +2601:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** (+) Start the TIM One Pulse. +2602:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** (+) Stop the TIM One Pulse. +2603:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** (+) Start the TIM One Pulse and enable interrupt. +2604:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** (+) Stop the TIM One Pulse and disable interrupt. +2605:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** (+) Start the TIM One Pulse and enable DMA transfer. +2606:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** (+) Stop the TIM One Pulse and disable DMA transfer. +2607:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** +2608:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** @endverbatim +2609:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** * @{ +2610:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** */ +2611:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** /** +2612:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** * @brief Initializes the TIM One Pulse Time Base according to the specified +2613:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** * parameters in the TIM_HandleTypeDef and initializes the associated handle. +2614:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** * @note Switching from Center Aligned counter mode to Edge counter mode (or reverse) +2615:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** * requires a timer reset to avoid unexpected direction +2616:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** * due to DIR bit readonly in center aligned mode. +2617:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** * Ex: call @ref HAL_TIM_OnePulse_DeInit() before HAL_TIM_OnePulse_Init() +2618:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** * @note When the timer instance is initialized in One Pulse mode, timer +2619:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** * channels 1 and channel 2 are reserved and cannot be used for other +2620:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** * purpose. +2621:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** * @param htim TIM One Pulse handle +2622:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** * @param OnePulseMode Select the One pulse mode. +2623:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** * This parameter can be one of the following values: +2624:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** * @arg TIM_OPMODE_SINGLE: Only one pulse will be generated. +2625:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** * @arg TIM_OPMODE_REPETITIVE: Repetitive pulses will be generated. +2626:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** * @retval HAL status +2627:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** */ +2628:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** HAL_StatusTypeDef HAL_TIM_OnePulse_Init(TIM_HandleTypeDef *htim, uint32_t OnePulseMode) +2629:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** { +2630:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** /* Check the TIM handle allocation */ +2631:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** if (htim == NULL) +2632:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** { +2633:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** return HAL_ERROR; +2634:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** } +2635:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** +2636:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** /* Check the parameters */ +2637:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** assert_param(IS_TIM_INSTANCE(htim->Instance)); +2638:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** assert_param(IS_TIM_COUNTER_MODE(htim->Init.CounterMode)); +2639:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** assert_param(IS_TIM_CLOCKDIVISION_DIV(htim->Init.ClockDivision)); +2640:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** assert_param(IS_TIM_OPM_MODE(OnePulseMode)); +2641:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** assert_param(IS_TIM_PERIOD(htim, htim->Init.Period)); +2642:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** assert_param(IS_TIM_AUTORELOAD_PRELOAD(htim->Init.AutoReloadPreload)); +2643:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** +2644:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** if (htim->State == HAL_TIM_STATE_RESET) +2645:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** { +2646:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** /* Allocate lock resource and initialize it */ +2647:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** htim->Lock = HAL_UNLOCKED; +2648:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** +2649:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** #if (USE_HAL_TIM_REGISTER_CALLBACKS == 1) +2650:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** /* Reset interrupt callbacks to legacy weak callbacks */ +2651:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** TIM_ResetCallback(htim); +2652:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** +2653:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** if (htim->OnePulse_MspInitCallback == NULL) +2654:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** { + ARM GAS /tmp/ccMtK8ce.s page 48 + + +2655:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** htim->OnePulse_MspInitCallback = HAL_TIM_OnePulse_MspInit; +2656:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** } +2657:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** /* Init the low level hardware : GPIO, CLOCK, NVIC */ +2658:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** htim->OnePulse_MspInitCallback(htim); +2659:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** #else +2660:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** /* Init the low level hardware : GPIO, CLOCK, NVIC and DMA */ +2661:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** HAL_TIM_OnePulse_MspInit(htim); +2662:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** #endif /* USE_HAL_TIM_REGISTER_CALLBACKS */ +2663:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** } +2664:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** +2665:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** /* Set the TIM state */ +2666:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** htim->State = HAL_TIM_STATE_BUSY; +2667:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** +2668:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** /* Configure the Time base in the One Pulse Mode */ +2669:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** TIM_Base_SetConfig(htim->Instance, &htim->Init); +2670:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** +2671:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** /* Reset the OPM Bit */ +2672:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** htim->Instance->CR1 &= ~TIM_CR1_OPM; +2673:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** +2674:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** /* Configure the OPM Mode */ +2675:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** htim->Instance->CR1 |= OnePulseMode; +2676:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** +2677:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** /* Initialize the DMA burst operation state */ +2678:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** htim->DMABurstState = HAL_DMA_BURST_STATE_READY; +2679:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** +2680:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** /* Initialize the TIM channels state */ +2681:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** TIM_CHANNEL_STATE_SET(htim, TIM_CHANNEL_1, HAL_TIM_CHANNEL_STATE_READY); +2682:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** TIM_CHANNEL_STATE_SET(htim, TIM_CHANNEL_2, HAL_TIM_CHANNEL_STATE_READY); +2683:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** TIM_CHANNEL_N_STATE_SET(htim, TIM_CHANNEL_1, HAL_TIM_CHANNEL_STATE_READY); +2684:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** TIM_CHANNEL_N_STATE_SET(htim, TIM_CHANNEL_2, HAL_TIM_CHANNEL_STATE_READY); +2685:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** +2686:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** /* Initialize the TIM state*/ +2687:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** htim->State = HAL_TIM_STATE_READY; +2688:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** +2689:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** return HAL_OK; +2690:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** } +2691:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** +2692:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** /** +2693:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** * @brief DeInitializes the TIM One Pulse +2694:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** * @param htim TIM One Pulse handle +2695:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** * @retval HAL status +2696:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** */ +2697:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** HAL_StatusTypeDef HAL_TIM_OnePulse_DeInit(TIM_HandleTypeDef *htim) +2698:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** { +2699:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** /* Check the parameters */ +2700:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** assert_param(IS_TIM_INSTANCE(htim->Instance)); +2701:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** +2702:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** htim->State = HAL_TIM_STATE_BUSY; +2703:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** +2704:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** /* Disable the TIM Peripheral Clock */ +2705:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** __HAL_TIM_DISABLE(htim); +2706:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** +2707:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** #if (USE_HAL_TIM_REGISTER_CALLBACKS == 1) +2708:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** if (htim->OnePulse_MspDeInitCallback == NULL) +2709:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** { +2710:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** htim->OnePulse_MspDeInitCallback = HAL_TIM_OnePulse_MspDeInit; +2711:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** } + ARM GAS /tmp/ccMtK8ce.s page 49 + + +2712:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** /* DeInit the low level hardware */ +2713:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** htim->OnePulse_MspDeInitCallback(htim); +2714:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** #else +2715:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** /* DeInit the low level hardware: GPIO, CLOCK, NVIC */ +2716:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** HAL_TIM_OnePulse_MspDeInit(htim); +2717:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** #endif /* USE_HAL_TIM_REGISTER_CALLBACKS */ +2718:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** +2719:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** /* Change the DMA burst operation state */ +2720:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** htim->DMABurstState = HAL_DMA_BURST_STATE_RESET; +2721:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** +2722:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** /* Set the TIM channel state */ +2723:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** TIM_CHANNEL_STATE_SET(htim, TIM_CHANNEL_1, HAL_TIM_CHANNEL_STATE_RESET); +2724:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** TIM_CHANNEL_STATE_SET(htim, TIM_CHANNEL_2, HAL_TIM_CHANNEL_STATE_RESET); +2725:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** TIM_CHANNEL_N_STATE_SET(htim, TIM_CHANNEL_1, HAL_TIM_CHANNEL_STATE_RESET); +2726:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** TIM_CHANNEL_N_STATE_SET(htim, TIM_CHANNEL_2, HAL_TIM_CHANNEL_STATE_RESET); +2727:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** +2728:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** /* Change TIM state */ +2729:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** htim->State = HAL_TIM_STATE_RESET; +2730:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** +2731:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** /* Release Lock */ +2732:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** __HAL_UNLOCK(htim); +2733:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** +2734:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** return HAL_OK; +2735:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** } +2736:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** +2737:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** /** +2738:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** * @brief Initializes the TIM One Pulse MSP. +2739:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** * @param htim TIM One Pulse handle +2740:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** * @retval None +2741:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** */ +2742:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** __weak void HAL_TIM_OnePulse_MspInit(TIM_HandleTypeDef *htim) +2743:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** { +2744:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** /* Prevent unused argument(s) compilation warning */ +2745:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** UNUSED(htim); +2746:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** +2747:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** /* NOTE : This function should not be modified, when the callback is needed, +2748:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** the HAL_TIM_OnePulse_MspInit could be implemented in the user file +2749:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** */ +2750:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** } +2751:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** +2752:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** /** +2753:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** * @brief DeInitializes TIM One Pulse MSP. +2754:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** * @param htim TIM One Pulse handle +2755:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** * @retval None +2756:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** */ +2757:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** __weak void HAL_TIM_OnePulse_MspDeInit(TIM_HandleTypeDef *htim) +2758:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** { +2759:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** /* Prevent unused argument(s) compilation warning */ +2760:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** UNUSED(htim); +2761:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** +2762:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** /* NOTE : This function should not be modified, when the callback is needed, +2763:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** the HAL_TIM_OnePulse_MspDeInit could be implemented in the user file +2764:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** */ +2765:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** } +2766:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** +2767:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** /** +2768:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** * @brief Starts the TIM One Pulse signal generation. + ARM GAS /tmp/ccMtK8ce.s page 50 + + +2769:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** * @note Though OutputChannel parameter is deprecated and ignored by the function +2770:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** * it has been kept to avoid HAL_TIM API compatibility break. +2771:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** * @note The pulse output channel is determined when calling +2772:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** * @ref HAL_TIM_OnePulse_ConfigChannel(). +2773:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** * @param htim TIM One Pulse handle +2774:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** * @param OutputChannel See note above +2775:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** * @retval HAL status +2776:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** */ +2777:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** HAL_StatusTypeDef HAL_TIM_OnePulse_Start(TIM_HandleTypeDef *htim, uint32_t OutputChannel) +2778:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** { +2779:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** HAL_TIM_ChannelStateTypeDef channel_1_state = TIM_CHANNEL_STATE_GET(htim, TIM_CHANNEL_1); +2780:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** HAL_TIM_ChannelStateTypeDef channel_2_state = TIM_CHANNEL_STATE_GET(htim, TIM_CHANNEL_2); +2781:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** HAL_TIM_ChannelStateTypeDef complementary_channel_1_state = TIM_CHANNEL_N_STATE_GET(htim, TIM_CHA +2782:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** HAL_TIM_ChannelStateTypeDef complementary_channel_2_state = TIM_CHANNEL_N_STATE_GET(htim, TIM_CHA +2783:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** +2784:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** /* Prevent unused argument(s) compilation warning */ +2785:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** UNUSED(OutputChannel); +2786:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** +2787:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** /* Check the TIM channels state */ +2788:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** if ((channel_1_state != HAL_TIM_CHANNEL_STATE_READY) +2789:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** || (channel_2_state != HAL_TIM_CHANNEL_STATE_READY) +2790:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** || (complementary_channel_1_state != HAL_TIM_CHANNEL_STATE_READY) +2791:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** || (complementary_channel_2_state != HAL_TIM_CHANNEL_STATE_READY)) +2792:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** { +2793:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** return HAL_ERROR; +2794:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** } +2795:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** +2796:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** /* Set the TIM channels state */ +2797:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** TIM_CHANNEL_STATE_SET(htim, TIM_CHANNEL_1, HAL_TIM_CHANNEL_STATE_BUSY); +2798:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** TIM_CHANNEL_STATE_SET(htim, TIM_CHANNEL_2, HAL_TIM_CHANNEL_STATE_BUSY); +2799:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** TIM_CHANNEL_N_STATE_SET(htim, TIM_CHANNEL_1, HAL_TIM_CHANNEL_STATE_BUSY); +2800:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** TIM_CHANNEL_N_STATE_SET(htim, TIM_CHANNEL_2, HAL_TIM_CHANNEL_STATE_BUSY); +2801:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** +2802:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** /* Enable the Capture compare and the Input Capture channels +2803:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** (in the OPM Mode the two possible channels that can be used are TIM_CHANNEL_1 and TIM_CHANNEL_2 +2804:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** if TIM_CHANNEL_1 is used as output, the TIM_CHANNEL_2 will be used as input and +2805:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** if TIM_CHANNEL_1 is used as input, the TIM_CHANNEL_2 will be used as output +2806:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** whatever the combination, the TIM_CHANNEL_1 and TIM_CHANNEL_2 should be enabled together +2807:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** +2808:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** No need to enable the counter, it's enabled automatically by hardware +2809:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** (the counter starts in response to a stimulus and generate a pulse */ +2810:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** +2811:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** TIM_CCxChannelCmd(htim->Instance, TIM_CHANNEL_1, TIM_CCx_ENABLE); +2812:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** TIM_CCxChannelCmd(htim->Instance, TIM_CHANNEL_2, TIM_CCx_ENABLE); +2813:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** +2814:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** if (IS_TIM_BREAK_INSTANCE(htim->Instance) != RESET) +2815:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** { +2816:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** /* Enable the main output */ +2817:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** __HAL_TIM_MOE_ENABLE(htim); +2818:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** } +2819:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** +2820:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** /* Return function status */ +2821:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** return HAL_OK; +2822:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** } +2823:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** +2824:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** /** +2825:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** * @brief Stops the TIM One Pulse signal generation. + ARM GAS /tmp/ccMtK8ce.s page 51 + + +2826:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** * @note Though OutputChannel parameter is deprecated and ignored by the function +2827:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** * it has been kept to avoid HAL_TIM API compatibility break. +2828:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** * @note The pulse output channel is determined when calling +2829:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** * @ref HAL_TIM_OnePulse_ConfigChannel(). +2830:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** * @param htim TIM One Pulse handle +2831:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** * @param OutputChannel See note above +2832:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** * @retval HAL status +2833:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** */ +2834:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** HAL_StatusTypeDef HAL_TIM_OnePulse_Stop(TIM_HandleTypeDef *htim, uint32_t OutputChannel) +2835:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** { +2836:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** /* Prevent unused argument(s) compilation warning */ +2837:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** UNUSED(OutputChannel); +2838:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** +2839:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** /* Disable the Capture compare and the Input Capture channels +2840:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** (in the OPM Mode the two possible channels that can be used are TIM_CHANNEL_1 and TIM_CHANNEL_2) +2841:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** if TIM_CHANNEL_1 is used as output, the TIM_CHANNEL_2 will be used as input and +2842:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** if TIM_CHANNEL_1 is used as input, the TIM_CHANNEL_2 will be used as output +2843:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** whatever the combination, the TIM_CHANNEL_1 and TIM_CHANNEL_2 should be disabled together */ +2844:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** +2845:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** TIM_CCxChannelCmd(htim->Instance, TIM_CHANNEL_1, TIM_CCx_DISABLE); +2846:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** TIM_CCxChannelCmd(htim->Instance, TIM_CHANNEL_2, TIM_CCx_DISABLE); +2847:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** +2848:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** if (IS_TIM_BREAK_INSTANCE(htim->Instance) != RESET) +2849:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** { +2850:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** /* Disable the Main Output */ +2851:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** __HAL_TIM_MOE_DISABLE(htim); +2852:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** } +2853:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** +2854:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** /* Disable the Peripheral */ +2855:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** __HAL_TIM_DISABLE(htim); +2856:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** +2857:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** /* Set the TIM channels state */ +2858:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** TIM_CHANNEL_STATE_SET(htim, TIM_CHANNEL_1, HAL_TIM_CHANNEL_STATE_READY); +2859:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** TIM_CHANNEL_STATE_SET(htim, TIM_CHANNEL_2, HAL_TIM_CHANNEL_STATE_READY); +2860:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** TIM_CHANNEL_N_STATE_SET(htim, TIM_CHANNEL_1, HAL_TIM_CHANNEL_STATE_READY); +2861:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** TIM_CHANNEL_N_STATE_SET(htim, TIM_CHANNEL_2, HAL_TIM_CHANNEL_STATE_READY); +2862:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** +2863:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** /* Return function status */ +2864:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** return HAL_OK; +2865:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** } +2866:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** +2867:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** /** +2868:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** * @brief Starts the TIM One Pulse signal generation in interrupt mode. +2869:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** * @note Though OutputChannel parameter is deprecated and ignored by the function +2870:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** * it has been kept to avoid HAL_TIM API compatibility break. +2871:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** * @note The pulse output channel is determined when calling +2872:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** * @ref HAL_TIM_OnePulse_ConfigChannel(). +2873:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** * @param htim TIM One Pulse handle +2874:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** * @param OutputChannel See note above +2875:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** * @retval HAL status +2876:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** */ +2877:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** HAL_StatusTypeDef HAL_TIM_OnePulse_Start_IT(TIM_HandleTypeDef *htim, uint32_t OutputChannel) +2878:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** { +2879:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** HAL_TIM_ChannelStateTypeDef channel_1_state = TIM_CHANNEL_STATE_GET(htim, TIM_CHANNEL_1); +2880:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** HAL_TIM_ChannelStateTypeDef channel_2_state = TIM_CHANNEL_STATE_GET(htim, TIM_CHANNEL_2); +2881:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** HAL_TIM_ChannelStateTypeDef complementary_channel_1_state = TIM_CHANNEL_N_STATE_GET(htim, TIM_CHA +2882:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** HAL_TIM_ChannelStateTypeDef complementary_channel_2_state = TIM_CHANNEL_N_STATE_GET(htim, TIM_CHA + ARM GAS /tmp/ccMtK8ce.s page 52 + + +2883:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** +2884:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** /* Prevent unused argument(s) compilation warning */ +2885:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** UNUSED(OutputChannel); +2886:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** +2887:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** /* Check the TIM channels state */ +2888:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** if ((channel_1_state != HAL_TIM_CHANNEL_STATE_READY) +2889:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** || (channel_2_state != HAL_TIM_CHANNEL_STATE_READY) +2890:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** || (complementary_channel_1_state != HAL_TIM_CHANNEL_STATE_READY) +2891:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** || (complementary_channel_2_state != HAL_TIM_CHANNEL_STATE_READY)) +2892:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** { +2893:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** return HAL_ERROR; +2894:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** } +2895:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** +2896:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** /* Set the TIM channels state */ +2897:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** TIM_CHANNEL_STATE_SET(htim, TIM_CHANNEL_1, HAL_TIM_CHANNEL_STATE_BUSY); +2898:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** TIM_CHANNEL_STATE_SET(htim, TIM_CHANNEL_2, HAL_TIM_CHANNEL_STATE_BUSY); +2899:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** TIM_CHANNEL_N_STATE_SET(htim, TIM_CHANNEL_1, HAL_TIM_CHANNEL_STATE_BUSY); +2900:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** TIM_CHANNEL_N_STATE_SET(htim, TIM_CHANNEL_2, HAL_TIM_CHANNEL_STATE_BUSY); +2901:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** +2902:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** /* Enable the Capture compare and the Input Capture channels +2903:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** (in the OPM Mode the two possible channels that can be used are TIM_CHANNEL_1 and TIM_CHANNEL_2 +2904:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** if TIM_CHANNEL_1 is used as output, the TIM_CHANNEL_2 will be used as input and +2905:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** if TIM_CHANNEL_1 is used as input, the TIM_CHANNEL_2 will be used as output +2906:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** whatever the combination, the TIM_CHANNEL_1 and TIM_CHANNEL_2 should be enabled together +2907:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** +2908:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** No need to enable the counter, it's enabled automatically by hardware +2909:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** (the counter starts in response to a stimulus and generate a pulse */ +2910:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** +2911:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** /* Enable the TIM Capture/Compare 1 interrupt */ +2912:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** __HAL_TIM_ENABLE_IT(htim, TIM_IT_CC1); +2913:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** +2914:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** /* Enable the TIM Capture/Compare 2 interrupt */ +2915:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** __HAL_TIM_ENABLE_IT(htim, TIM_IT_CC2); +2916:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** +2917:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** TIM_CCxChannelCmd(htim->Instance, TIM_CHANNEL_1, TIM_CCx_ENABLE); +2918:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** TIM_CCxChannelCmd(htim->Instance, TIM_CHANNEL_2, TIM_CCx_ENABLE); +2919:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** +2920:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** if (IS_TIM_BREAK_INSTANCE(htim->Instance) != RESET) +2921:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** { +2922:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** /* Enable the main output */ +2923:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** __HAL_TIM_MOE_ENABLE(htim); +2924:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** } +2925:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** +2926:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** /* Return function status */ +2927:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** return HAL_OK; +2928:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** } +2929:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** +2930:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** /** +2931:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** * @brief Stops the TIM One Pulse signal generation in interrupt mode. +2932:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** * @note Though OutputChannel parameter is deprecated and ignored by the function +2933:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** * it has been kept to avoid HAL_TIM API compatibility break. +2934:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** * @note The pulse output channel is determined when calling +2935:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** * @ref HAL_TIM_OnePulse_ConfigChannel(). +2936:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** * @param htim TIM One Pulse handle +2937:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** * @param OutputChannel See note above +2938:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** * @retval HAL status +2939:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** */ + ARM GAS /tmp/ccMtK8ce.s page 53 + + +2940:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** HAL_StatusTypeDef HAL_TIM_OnePulse_Stop_IT(TIM_HandleTypeDef *htim, uint32_t OutputChannel) +2941:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** { +2942:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** /* Prevent unused argument(s) compilation warning */ +2943:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** UNUSED(OutputChannel); +2944:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** +2945:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** /* Disable the TIM Capture/Compare 1 interrupt */ +2946:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** __HAL_TIM_DISABLE_IT(htim, TIM_IT_CC1); +2947:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** +2948:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** /* Disable the TIM Capture/Compare 2 interrupt */ +2949:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** __HAL_TIM_DISABLE_IT(htim, TIM_IT_CC2); +2950:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** +2951:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** /* Disable the Capture compare and the Input Capture channels +2952:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** (in the OPM Mode the two possible channels that can be used are TIM_CHANNEL_1 and TIM_CHANNEL_2) +2953:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** if TIM_CHANNEL_1 is used as output, the TIM_CHANNEL_2 will be used as input and +2954:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** if TIM_CHANNEL_1 is used as input, the TIM_CHANNEL_2 will be used as output +2955:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** whatever the combination, the TIM_CHANNEL_1 and TIM_CHANNEL_2 should be disabled together */ +2956:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** TIM_CCxChannelCmd(htim->Instance, TIM_CHANNEL_1, TIM_CCx_DISABLE); +2957:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** TIM_CCxChannelCmd(htim->Instance, TIM_CHANNEL_2, TIM_CCx_DISABLE); +2958:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** +2959:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** if (IS_TIM_BREAK_INSTANCE(htim->Instance) != RESET) +2960:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** { +2961:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** /* Disable the Main Output */ +2962:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** __HAL_TIM_MOE_DISABLE(htim); +2963:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** } +2964:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** +2965:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** /* Disable the Peripheral */ +2966:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** __HAL_TIM_DISABLE(htim); +2967:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** +2968:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** /* Set the TIM channels state */ +2969:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** TIM_CHANNEL_STATE_SET(htim, TIM_CHANNEL_1, HAL_TIM_CHANNEL_STATE_READY); +2970:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** TIM_CHANNEL_STATE_SET(htim, TIM_CHANNEL_2, HAL_TIM_CHANNEL_STATE_READY); +2971:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** TIM_CHANNEL_N_STATE_SET(htim, TIM_CHANNEL_1, HAL_TIM_CHANNEL_STATE_READY); +2972:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** TIM_CHANNEL_N_STATE_SET(htim, TIM_CHANNEL_2, HAL_TIM_CHANNEL_STATE_READY); +2973:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** +2974:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** /* Return function status */ +2975:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** return HAL_OK; +2976:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** } +2977:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** +2978:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** /** +2979:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** * @} +2980:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** */ +2981:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** +2982:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** /** @defgroup TIM_Exported_Functions_Group6 TIM Encoder functions +2983:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** * @brief TIM Encoder functions +2984:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** * +2985:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** @verbatim +2986:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** ============================================================================== +2987:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** ##### TIM Encoder functions ##### +2988:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** ============================================================================== +2989:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** [..] +2990:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** This section provides functions allowing to: +2991:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** (+) Initialize and configure the TIM Encoder. +2992:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** (+) De-initialize the TIM Encoder. +2993:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** (+) Start the TIM Encoder. +2994:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** (+) Stop the TIM Encoder. +2995:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** (+) Start the TIM Encoder and enable interrupt. +2996:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** (+) Stop the TIM Encoder and disable interrupt. + ARM GAS /tmp/ccMtK8ce.s page 54 + + +2997:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** (+) Start the TIM Encoder and enable DMA transfer. +2998:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** (+) Stop the TIM Encoder and disable DMA transfer. +2999:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** +3000:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** @endverbatim +3001:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** * @{ +3002:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** */ +3003:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** /** +3004:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** * @brief Initializes the TIM Encoder Interface and initialize the associated handle. +3005:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** * @note Switching from Center Aligned counter mode to Edge counter mode (or reverse) +3006:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** * requires a timer reset to avoid unexpected direction +3007:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** * due to DIR bit readonly in center aligned mode. +3008:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** * Ex: call @ref HAL_TIM_Encoder_DeInit() before HAL_TIM_Encoder_Init() +3009:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** * @note Encoder mode and External clock mode 2 are not compatible and must not be selected toge +3010:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** * Ex: A call for @ref HAL_TIM_Encoder_Init will erase the settings of @ref HAL_TIM_Config +3011:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** * using TIM_CLOCKSOURCE_ETRMODE2 and vice versa +3012:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** * @note When the timer instance is initialized in Encoder mode, timer +3013:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** * channels 1 and channel 2 are reserved and cannot be used for other +3014:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** * purpose. +3015:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** * @param htim TIM Encoder Interface handle +3016:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** * @param sConfig TIM Encoder Interface configuration structure +3017:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** * @retval HAL status +3018:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** */ +3019:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** HAL_StatusTypeDef HAL_TIM_Encoder_Init(TIM_HandleTypeDef *htim, const TIM_Encoder_InitTypeDef *sCon +3020:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** { +3021:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** uint32_t tmpsmcr; +3022:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** uint32_t tmpccmr1; +3023:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** uint32_t tmpccer; +3024:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** +3025:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** /* Check the TIM handle allocation */ +3026:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** if (htim == NULL) +3027:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** { +3028:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** return HAL_ERROR; +3029:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** } +3030:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** +3031:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** /* Check the parameters */ +3032:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** assert_param(IS_TIM_ENCODER_INTERFACE_INSTANCE(htim->Instance)); +3033:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** assert_param(IS_TIM_COUNTER_MODE(htim->Init.CounterMode)); +3034:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** assert_param(IS_TIM_CLOCKDIVISION_DIV(htim->Init.ClockDivision)); +3035:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** assert_param(IS_TIM_AUTORELOAD_PRELOAD(htim->Init.AutoReloadPreload)); +3036:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** assert_param(IS_TIM_ENCODER_MODE(sConfig->EncoderMode)); +3037:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** assert_param(IS_TIM_IC_SELECTION(sConfig->IC1Selection)); +3038:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** assert_param(IS_TIM_IC_SELECTION(sConfig->IC2Selection)); +3039:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** assert_param(IS_TIM_ENCODERINPUT_POLARITY(sConfig->IC1Polarity)); +3040:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** assert_param(IS_TIM_ENCODERINPUT_POLARITY(sConfig->IC2Polarity)); +3041:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** assert_param(IS_TIM_IC_PRESCALER(sConfig->IC1Prescaler)); +3042:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** assert_param(IS_TIM_IC_PRESCALER(sConfig->IC2Prescaler)); +3043:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** assert_param(IS_TIM_IC_FILTER(sConfig->IC1Filter)); +3044:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** assert_param(IS_TIM_IC_FILTER(sConfig->IC2Filter)); +3045:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** assert_param(IS_TIM_PERIOD(htim, htim->Init.Period)); +3046:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** +3047:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** if (htim->State == HAL_TIM_STATE_RESET) +3048:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** { +3049:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** /* Allocate lock resource and initialize it */ +3050:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** htim->Lock = HAL_UNLOCKED; +3051:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** +3052:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** #if (USE_HAL_TIM_REGISTER_CALLBACKS == 1) +3053:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** /* Reset interrupt callbacks to legacy weak callbacks */ + ARM GAS /tmp/ccMtK8ce.s page 55 + + +3054:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** TIM_ResetCallback(htim); +3055:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** +3056:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** if (htim->Encoder_MspInitCallback == NULL) +3057:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** { +3058:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** htim->Encoder_MspInitCallback = HAL_TIM_Encoder_MspInit; +3059:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** } +3060:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** /* Init the low level hardware : GPIO, CLOCK, NVIC */ +3061:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** htim->Encoder_MspInitCallback(htim); +3062:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** #else +3063:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** /* Init the low level hardware : GPIO, CLOCK, NVIC and DMA */ +3064:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** HAL_TIM_Encoder_MspInit(htim); +3065:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** #endif /* USE_HAL_TIM_REGISTER_CALLBACKS */ +3066:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** } +3067:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** +3068:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** /* Set the TIM state */ +3069:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** htim->State = HAL_TIM_STATE_BUSY; +3070:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** +3071:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** /* Reset the SMS and ECE bits */ +3072:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** htim->Instance->SMCR &= ~(TIM_SMCR_SMS | TIM_SMCR_ECE); +3073:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** +3074:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** /* Configure the Time base in the Encoder Mode */ +3075:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** TIM_Base_SetConfig(htim->Instance, &htim->Init); +3076:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** +3077:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** /* Get the TIMx SMCR register value */ +3078:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** tmpsmcr = htim->Instance->SMCR; +3079:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** +3080:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** /* Get the TIMx CCMR1 register value */ +3081:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** tmpccmr1 = htim->Instance->CCMR1; +3082:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** +3083:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** /* Get the TIMx CCER register value */ +3084:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** tmpccer = htim->Instance->CCER; +3085:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** +3086:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** /* Set the encoder Mode */ +3087:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** tmpsmcr |= sConfig->EncoderMode; +3088:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** +3089:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** /* Select the Capture Compare 1 and the Capture Compare 2 as input */ +3090:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** tmpccmr1 &= ~(TIM_CCMR1_CC1S | TIM_CCMR1_CC2S); +3091:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** tmpccmr1 |= (sConfig->IC1Selection | (sConfig->IC2Selection << 8U)); +3092:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** +3093:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** /* Set the Capture Compare 1 and the Capture Compare 2 prescalers and filters */ +3094:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** tmpccmr1 &= ~(TIM_CCMR1_IC1PSC | TIM_CCMR1_IC2PSC); +3095:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** tmpccmr1 &= ~(TIM_CCMR1_IC1F | TIM_CCMR1_IC2F); +3096:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** tmpccmr1 |= sConfig->IC1Prescaler | (sConfig->IC2Prescaler << 8U); +3097:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** tmpccmr1 |= (sConfig->IC1Filter << 4U) | (sConfig->IC2Filter << 12U); +3098:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** +3099:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** /* Set the TI1 and the TI2 Polarities */ +3100:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** tmpccer &= ~(TIM_CCER_CC1P | TIM_CCER_CC2P); +3101:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** tmpccer &= ~(TIM_CCER_CC1NP | TIM_CCER_CC2NP); +3102:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** tmpccer |= sConfig->IC1Polarity | (sConfig->IC2Polarity << 4U); +3103:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** +3104:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** /* Write to TIMx SMCR */ +3105:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** htim->Instance->SMCR = tmpsmcr; +3106:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** +3107:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** /* Write to TIMx CCMR1 */ +3108:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** htim->Instance->CCMR1 = tmpccmr1; +3109:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** +3110:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** /* Write to TIMx CCER */ + ARM GAS /tmp/ccMtK8ce.s page 56 + + +3111:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** htim->Instance->CCER = tmpccer; +3112:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** +3113:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** /* Initialize the DMA burst operation state */ +3114:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** htim->DMABurstState = HAL_DMA_BURST_STATE_READY; +3115:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** +3116:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** /* Set the TIM channels state */ +3117:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** TIM_CHANNEL_STATE_SET(htim, TIM_CHANNEL_1, HAL_TIM_CHANNEL_STATE_READY); +3118:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** TIM_CHANNEL_STATE_SET(htim, TIM_CHANNEL_2, HAL_TIM_CHANNEL_STATE_READY); +3119:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** TIM_CHANNEL_N_STATE_SET(htim, TIM_CHANNEL_1, HAL_TIM_CHANNEL_STATE_READY); +3120:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** TIM_CHANNEL_N_STATE_SET(htim, TIM_CHANNEL_2, HAL_TIM_CHANNEL_STATE_READY); +3121:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** +3122:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** /* Initialize the TIM state*/ +3123:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** htim->State = HAL_TIM_STATE_READY; +3124:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** +3125:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** return HAL_OK; +3126:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** } +3127:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** +3128:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** +3129:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** /** +3130:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** * @brief DeInitializes the TIM Encoder interface +3131:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** * @param htim TIM Encoder Interface handle +3132:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** * @retval HAL status +3133:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** */ +3134:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** HAL_StatusTypeDef HAL_TIM_Encoder_DeInit(TIM_HandleTypeDef *htim) +3135:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** { +3136:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** /* Check the parameters */ +3137:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** assert_param(IS_TIM_INSTANCE(htim->Instance)); +3138:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** +3139:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** htim->State = HAL_TIM_STATE_BUSY; +3140:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** +3141:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** /* Disable the TIM Peripheral Clock */ +3142:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** __HAL_TIM_DISABLE(htim); +3143:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** +3144:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** #if (USE_HAL_TIM_REGISTER_CALLBACKS == 1) +3145:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** if (htim->Encoder_MspDeInitCallback == NULL) +3146:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** { +3147:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** htim->Encoder_MspDeInitCallback = HAL_TIM_Encoder_MspDeInit; +3148:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** } +3149:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** /* DeInit the low level hardware */ +3150:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** htim->Encoder_MspDeInitCallback(htim); +3151:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** #else +3152:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** /* DeInit the low level hardware: GPIO, CLOCK, NVIC */ +3153:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** HAL_TIM_Encoder_MspDeInit(htim); +3154:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** #endif /* USE_HAL_TIM_REGISTER_CALLBACKS */ +3155:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** +3156:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** /* Change the DMA burst operation state */ +3157:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** htim->DMABurstState = HAL_DMA_BURST_STATE_RESET; +3158:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** +3159:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** /* Set the TIM channels state */ +3160:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** TIM_CHANNEL_STATE_SET(htim, TIM_CHANNEL_1, HAL_TIM_CHANNEL_STATE_RESET); +3161:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** TIM_CHANNEL_STATE_SET(htim, TIM_CHANNEL_2, HAL_TIM_CHANNEL_STATE_RESET); +3162:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** TIM_CHANNEL_N_STATE_SET(htim, TIM_CHANNEL_1, HAL_TIM_CHANNEL_STATE_RESET); +3163:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** TIM_CHANNEL_N_STATE_SET(htim, TIM_CHANNEL_2, HAL_TIM_CHANNEL_STATE_RESET); +3164:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** +3165:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** /* Change TIM state */ +3166:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** htim->State = HAL_TIM_STATE_RESET; +3167:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + ARM GAS /tmp/ccMtK8ce.s page 57 + + +3168:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** /* Release Lock */ +3169:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** __HAL_UNLOCK(htim); +3170:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** +3171:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** return HAL_OK; +3172:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** } +3173:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** +3174:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** /** +3175:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** * @brief Initializes the TIM Encoder Interface MSP. +3176:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** * @param htim TIM Encoder Interface handle +3177:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** * @retval None +3178:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** */ +3179:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** __weak void HAL_TIM_Encoder_MspInit(TIM_HandleTypeDef *htim) +3180:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** { +3181:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** /* Prevent unused argument(s) compilation warning */ +3182:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** UNUSED(htim); +3183:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** +3184:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** /* NOTE : This function should not be modified, when the callback is needed, +3185:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** the HAL_TIM_Encoder_MspInit could be implemented in the user file +3186:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** */ +3187:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** } +3188:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** +3189:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** /** +3190:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** * @brief DeInitializes TIM Encoder Interface MSP. +3191:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** * @param htim TIM Encoder Interface handle +3192:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** * @retval None +3193:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** */ +3194:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** __weak void HAL_TIM_Encoder_MspDeInit(TIM_HandleTypeDef *htim) +3195:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** { +3196:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** /* Prevent unused argument(s) compilation warning */ +3197:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** UNUSED(htim); +3198:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** +3199:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** /* NOTE : This function should not be modified, when the callback is needed, +3200:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** the HAL_TIM_Encoder_MspDeInit could be implemented in the user file +3201:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** */ +3202:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** } +3203:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** +3204:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** /** +3205:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** * @brief Starts the TIM Encoder Interface. +3206:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** * @param htim TIM Encoder Interface handle +3207:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** * @param Channel TIM Channels to be enabled +3208:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** * This parameter can be one of the following values: +3209:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** * @arg TIM_CHANNEL_1: TIM Channel 1 selected +3210:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** * @arg TIM_CHANNEL_2: TIM Channel 2 selected +3211:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** * @arg TIM_CHANNEL_ALL: TIM Channel 1 and TIM Channel 2 are selected +3212:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** * @retval HAL status +3213:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** */ +3214:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** HAL_StatusTypeDef HAL_TIM_Encoder_Start(TIM_HandleTypeDef *htim, uint32_t Channel) +3215:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** { +3216:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** HAL_TIM_ChannelStateTypeDef channel_1_state = TIM_CHANNEL_STATE_GET(htim, TIM_CHANNEL_1); +3217:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** HAL_TIM_ChannelStateTypeDef channel_2_state = TIM_CHANNEL_STATE_GET(htim, TIM_CHANNEL_2); +3218:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** HAL_TIM_ChannelStateTypeDef complementary_channel_1_state = TIM_CHANNEL_N_STATE_GET(htim, TIM_CHA +3219:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** HAL_TIM_ChannelStateTypeDef complementary_channel_2_state = TIM_CHANNEL_N_STATE_GET(htim, TIM_CHA +3220:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** +3221:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** /* Check the parameters */ +3222:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** assert_param(IS_TIM_ENCODER_INTERFACE_INSTANCE(htim->Instance)); +3223:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** +3224:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** /* Set the TIM channel(s) state */ + ARM GAS /tmp/ccMtK8ce.s page 58 + + +3225:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** if (Channel == TIM_CHANNEL_1) +3226:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** { +3227:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** if ((channel_1_state != HAL_TIM_CHANNEL_STATE_READY) +3228:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** || (complementary_channel_1_state != HAL_TIM_CHANNEL_STATE_READY)) +3229:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** { +3230:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** return HAL_ERROR; +3231:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** } +3232:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** else +3233:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** { +3234:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** TIM_CHANNEL_STATE_SET(htim, TIM_CHANNEL_1, HAL_TIM_CHANNEL_STATE_BUSY); +3235:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** TIM_CHANNEL_N_STATE_SET(htim, TIM_CHANNEL_1, HAL_TIM_CHANNEL_STATE_BUSY); +3236:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** } +3237:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** } +3238:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** else if (Channel == TIM_CHANNEL_2) +3239:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** { +3240:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** if ((channel_2_state != HAL_TIM_CHANNEL_STATE_READY) +3241:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** || (complementary_channel_2_state != HAL_TIM_CHANNEL_STATE_READY)) +3242:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** { +3243:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** return HAL_ERROR; +3244:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** } +3245:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** else +3246:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** { +3247:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** TIM_CHANNEL_STATE_SET(htim, TIM_CHANNEL_2, HAL_TIM_CHANNEL_STATE_BUSY); +3248:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** TIM_CHANNEL_N_STATE_SET(htim, TIM_CHANNEL_2, HAL_TIM_CHANNEL_STATE_BUSY); +3249:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** } +3250:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** } +3251:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** else +3252:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** { +3253:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** if ((channel_1_state != HAL_TIM_CHANNEL_STATE_READY) +3254:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** || (channel_2_state != HAL_TIM_CHANNEL_STATE_READY) +3255:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** || (complementary_channel_1_state != HAL_TIM_CHANNEL_STATE_READY) +3256:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** || (complementary_channel_2_state != HAL_TIM_CHANNEL_STATE_READY)) +3257:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** { +3258:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** return HAL_ERROR; +3259:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** } +3260:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** else +3261:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** { +3262:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** TIM_CHANNEL_STATE_SET(htim, TIM_CHANNEL_1, HAL_TIM_CHANNEL_STATE_BUSY); +3263:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** TIM_CHANNEL_STATE_SET(htim, TIM_CHANNEL_2, HAL_TIM_CHANNEL_STATE_BUSY); +3264:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** TIM_CHANNEL_N_STATE_SET(htim, TIM_CHANNEL_1, HAL_TIM_CHANNEL_STATE_BUSY); +3265:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** TIM_CHANNEL_N_STATE_SET(htim, TIM_CHANNEL_2, HAL_TIM_CHANNEL_STATE_BUSY); +3266:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** } +3267:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** } +3268:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** +3269:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** /* Enable the encoder interface channels */ +3270:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** switch (Channel) +3271:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** { +3272:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** case TIM_CHANNEL_1: +3273:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** { +3274:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** TIM_CCxChannelCmd(htim->Instance, TIM_CHANNEL_1, TIM_CCx_ENABLE); +3275:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** break; +3276:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** } +3277:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** +3278:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** case TIM_CHANNEL_2: +3279:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** { +3280:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** TIM_CCxChannelCmd(htim->Instance, TIM_CHANNEL_2, TIM_CCx_ENABLE); +3281:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** break; + ARM GAS /tmp/ccMtK8ce.s page 59 + + +3282:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** } +3283:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** +3284:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** default : +3285:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** { +3286:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** TIM_CCxChannelCmd(htim->Instance, TIM_CHANNEL_1, TIM_CCx_ENABLE); +3287:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** TIM_CCxChannelCmd(htim->Instance, TIM_CHANNEL_2, TIM_CCx_ENABLE); +3288:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** break; +3289:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** } +3290:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** } +3291:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** /* Enable the Peripheral */ +3292:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** __HAL_TIM_ENABLE(htim); +3293:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** +3294:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** /* Return function status */ +3295:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** return HAL_OK; +3296:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** } +3297:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** +3298:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** /** +3299:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** * @brief Stops the TIM Encoder Interface. +3300:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** * @param htim TIM Encoder Interface handle +3301:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** * @param Channel TIM Channels to be disabled +3302:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** * This parameter can be one of the following values: +3303:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** * @arg TIM_CHANNEL_1: TIM Channel 1 selected +3304:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** * @arg TIM_CHANNEL_2: TIM Channel 2 selected +3305:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** * @arg TIM_CHANNEL_ALL: TIM Channel 1 and TIM Channel 2 are selected +3306:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** * @retval HAL status +3307:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** */ +3308:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** HAL_StatusTypeDef HAL_TIM_Encoder_Stop(TIM_HandleTypeDef *htim, uint32_t Channel) +3309:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** { +3310:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** /* Check the parameters */ +3311:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** assert_param(IS_TIM_ENCODER_INTERFACE_INSTANCE(htim->Instance)); +3312:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** +3313:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** /* Disable the Input Capture channels 1 and 2 +3314:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** (in the EncoderInterface the two possible channels that can be used are TIM_CHANNEL_1 and TIM_C +3315:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** switch (Channel) +3316:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** { +3317:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** case TIM_CHANNEL_1: +3318:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** { +3319:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** TIM_CCxChannelCmd(htim->Instance, TIM_CHANNEL_1, TIM_CCx_DISABLE); +3320:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** break; +3321:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** } +3322:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** +3323:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** case TIM_CHANNEL_2: +3324:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** { +3325:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** TIM_CCxChannelCmd(htim->Instance, TIM_CHANNEL_2, TIM_CCx_DISABLE); +3326:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** break; +3327:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** } +3328:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** +3329:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** default : +3330:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** { +3331:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** TIM_CCxChannelCmd(htim->Instance, TIM_CHANNEL_1, TIM_CCx_DISABLE); +3332:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** TIM_CCxChannelCmd(htim->Instance, TIM_CHANNEL_2, TIM_CCx_DISABLE); +3333:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** break; +3334:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** } +3335:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** } +3336:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** +3337:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** /* Disable the Peripheral */ +3338:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** __HAL_TIM_DISABLE(htim); + ARM GAS /tmp/ccMtK8ce.s page 60 + + +3339:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** +3340:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** /* Set the TIM channel(s) state */ +3341:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** if ((Channel == TIM_CHANNEL_1) || (Channel == TIM_CHANNEL_2)) +3342:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** { +3343:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** TIM_CHANNEL_STATE_SET(htim, Channel, HAL_TIM_CHANNEL_STATE_READY); +3344:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** TIM_CHANNEL_N_STATE_SET(htim, Channel, HAL_TIM_CHANNEL_STATE_READY); +3345:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** } +3346:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** else +3347:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** { +3348:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** TIM_CHANNEL_STATE_SET(htim, TIM_CHANNEL_1, HAL_TIM_CHANNEL_STATE_READY); +3349:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** TIM_CHANNEL_STATE_SET(htim, TIM_CHANNEL_2, HAL_TIM_CHANNEL_STATE_READY); +3350:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** TIM_CHANNEL_N_STATE_SET(htim, TIM_CHANNEL_1, HAL_TIM_CHANNEL_STATE_READY); +3351:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** TIM_CHANNEL_N_STATE_SET(htim, TIM_CHANNEL_2, HAL_TIM_CHANNEL_STATE_READY); +3352:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** } +3353:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** +3354:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** /* Return function status */ +3355:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** return HAL_OK; +3356:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** } +3357:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** +3358:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** /** +3359:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** * @brief Starts the TIM Encoder Interface in interrupt mode. +3360:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** * @param htim TIM Encoder Interface handle +3361:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** * @param Channel TIM Channels to be enabled +3362:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** * This parameter can be one of the following values: +3363:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** * @arg TIM_CHANNEL_1: TIM Channel 1 selected +3364:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** * @arg TIM_CHANNEL_2: TIM Channel 2 selected +3365:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** * @arg TIM_CHANNEL_ALL: TIM Channel 1 and TIM Channel 2 are selected +3366:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** * @retval HAL status +3367:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** */ +3368:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** HAL_StatusTypeDef HAL_TIM_Encoder_Start_IT(TIM_HandleTypeDef *htim, uint32_t Channel) +3369:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** { +3370:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** HAL_TIM_ChannelStateTypeDef channel_1_state = TIM_CHANNEL_STATE_GET(htim, TIM_CHANNEL_1); +3371:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** HAL_TIM_ChannelStateTypeDef channel_2_state = TIM_CHANNEL_STATE_GET(htim, TIM_CHANNEL_2); +3372:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** HAL_TIM_ChannelStateTypeDef complementary_channel_1_state = TIM_CHANNEL_N_STATE_GET(htim, TIM_CHA +3373:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** HAL_TIM_ChannelStateTypeDef complementary_channel_2_state = TIM_CHANNEL_N_STATE_GET(htim, TIM_CHA +3374:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** +3375:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** /* Check the parameters */ +3376:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** assert_param(IS_TIM_ENCODER_INTERFACE_INSTANCE(htim->Instance)); +3377:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** +3378:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** /* Set the TIM channel(s) state */ +3379:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** if (Channel == TIM_CHANNEL_1) +3380:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** { +3381:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** if ((channel_1_state != HAL_TIM_CHANNEL_STATE_READY) +3382:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** || (complementary_channel_1_state != HAL_TIM_CHANNEL_STATE_READY)) +3383:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** { +3384:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** return HAL_ERROR; +3385:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** } +3386:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** else +3387:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** { +3388:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** TIM_CHANNEL_STATE_SET(htim, TIM_CHANNEL_1, HAL_TIM_CHANNEL_STATE_BUSY); +3389:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** TIM_CHANNEL_N_STATE_SET(htim, TIM_CHANNEL_1, HAL_TIM_CHANNEL_STATE_BUSY); +3390:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** } +3391:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** } +3392:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** else if (Channel == TIM_CHANNEL_2) +3393:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** { +3394:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** if ((channel_2_state != HAL_TIM_CHANNEL_STATE_READY) +3395:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** || (complementary_channel_2_state != HAL_TIM_CHANNEL_STATE_READY)) + ARM GAS /tmp/ccMtK8ce.s page 61 + + +3396:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** { +3397:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** return HAL_ERROR; +3398:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** } +3399:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** else +3400:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** { +3401:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** TIM_CHANNEL_STATE_SET(htim, TIM_CHANNEL_2, HAL_TIM_CHANNEL_STATE_BUSY); +3402:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** TIM_CHANNEL_N_STATE_SET(htim, TIM_CHANNEL_2, HAL_TIM_CHANNEL_STATE_BUSY); +3403:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** } +3404:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** } +3405:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** else +3406:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** { +3407:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** if ((channel_1_state != HAL_TIM_CHANNEL_STATE_READY) +3408:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** || (channel_2_state != HAL_TIM_CHANNEL_STATE_READY) +3409:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** || (complementary_channel_1_state != HAL_TIM_CHANNEL_STATE_READY) +3410:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** || (complementary_channel_2_state != HAL_TIM_CHANNEL_STATE_READY)) +3411:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** { +3412:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** return HAL_ERROR; +3413:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** } +3414:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** else +3415:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** { +3416:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** TIM_CHANNEL_STATE_SET(htim, TIM_CHANNEL_1, HAL_TIM_CHANNEL_STATE_BUSY); +3417:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** TIM_CHANNEL_STATE_SET(htim, TIM_CHANNEL_2, HAL_TIM_CHANNEL_STATE_BUSY); +3418:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** TIM_CHANNEL_N_STATE_SET(htim, TIM_CHANNEL_1, HAL_TIM_CHANNEL_STATE_BUSY); +3419:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** TIM_CHANNEL_N_STATE_SET(htim, TIM_CHANNEL_2, HAL_TIM_CHANNEL_STATE_BUSY); +3420:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** } +3421:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** } +3422:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** +3423:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** /* Enable the encoder interface channels */ +3424:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** /* Enable the capture compare Interrupts 1 and/or 2 */ +3425:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** switch (Channel) +3426:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** { +3427:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** case TIM_CHANNEL_1: +3428:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** { +3429:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** TIM_CCxChannelCmd(htim->Instance, TIM_CHANNEL_1, TIM_CCx_ENABLE); +3430:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** __HAL_TIM_ENABLE_IT(htim, TIM_IT_CC1); +3431:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** break; +3432:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** } +3433:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** +3434:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** case TIM_CHANNEL_2: +3435:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** { +3436:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** TIM_CCxChannelCmd(htim->Instance, TIM_CHANNEL_2, TIM_CCx_ENABLE); +3437:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** __HAL_TIM_ENABLE_IT(htim, TIM_IT_CC2); +3438:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** break; +3439:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** } +3440:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** +3441:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** default : +3442:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** { +3443:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** TIM_CCxChannelCmd(htim->Instance, TIM_CHANNEL_1, TIM_CCx_ENABLE); +3444:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** TIM_CCxChannelCmd(htim->Instance, TIM_CHANNEL_2, TIM_CCx_ENABLE); +3445:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** __HAL_TIM_ENABLE_IT(htim, TIM_IT_CC1); +3446:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** __HAL_TIM_ENABLE_IT(htim, TIM_IT_CC2); +3447:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** break; +3448:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** } +3449:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** } +3450:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** +3451:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** /* Enable the Peripheral */ +3452:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** __HAL_TIM_ENABLE(htim); + ARM GAS /tmp/ccMtK8ce.s page 62 + + +3453:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** +3454:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** /* Return function status */ +3455:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** return HAL_OK; +3456:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** } +3457:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** +3458:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** /** +3459:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** * @brief Stops the TIM Encoder Interface in interrupt mode. +3460:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** * @param htim TIM Encoder Interface handle +3461:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** * @param Channel TIM Channels to be disabled +3462:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** * This parameter can be one of the following values: +3463:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** * @arg TIM_CHANNEL_1: TIM Channel 1 selected +3464:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** * @arg TIM_CHANNEL_2: TIM Channel 2 selected +3465:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** * @arg TIM_CHANNEL_ALL: TIM Channel 1 and TIM Channel 2 are selected +3466:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** * @retval HAL status +3467:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** */ +3468:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** HAL_StatusTypeDef HAL_TIM_Encoder_Stop_IT(TIM_HandleTypeDef *htim, uint32_t Channel) +3469:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** { +3470:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** /* Check the parameters */ +3471:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** assert_param(IS_TIM_ENCODER_INTERFACE_INSTANCE(htim->Instance)); +3472:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** +3473:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** /* Disable the Input Capture channels 1 and 2 +3474:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** (in the EncoderInterface the two possible channels that can be used are TIM_CHANNEL_1 and TIM_C +3475:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** if (Channel == TIM_CHANNEL_1) +3476:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** { +3477:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** TIM_CCxChannelCmd(htim->Instance, TIM_CHANNEL_1, TIM_CCx_DISABLE); +3478:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** +3479:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** /* Disable the capture compare Interrupts 1 */ +3480:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** __HAL_TIM_DISABLE_IT(htim, TIM_IT_CC1); +3481:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** } +3482:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** else if (Channel == TIM_CHANNEL_2) +3483:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** { +3484:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** TIM_CCxChannelCmd(htim->Instance, TIM_CHANNEL_2, TIM_CCx_DISABLE); +3485:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** +3486:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** /* Disable the capture compare Interrupts 2 */ +3487:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** __HAL_TIM_DISABLE_IT(htim, TIM_IT_CC2); +3488:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** } +3489:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** else +3490:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** { +3491:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** TIM_CCxChannelCmd(htim->Instance, TIM_CHANNEL_1, TIM_CCx_DISABLE); +3492:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** TIM_CCxChannelCmd(htim->Instance, TIM_CHANNEL_2, TIM_CCx_DISABLE); +3493:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** +3494:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** /* Disable the capture compare Interrupts 1 and 2 */ +3495:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** __HAL_TIM_DISABLE_IT(htim, TIM_IT_CC1); +3496:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** __HAL_TIM_DISABLE_IT(htim, TIM_IT_CC2); +3497:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** } +3498:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** +3499:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** /* Disable the Peripheral */ +3500:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** __HAL_TIM_DISABLE(htim); +3501:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** +3502:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** /* Set the TIM channel(s) state */ +3503:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** if ((Channel == TIM_CHANNEL_1) || (Channel == TIM_CHANNEL_2)) +3504:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** { +3505:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** TIM_CHANNEL_STATE_SET(htim, Channel, HAL_TIM_CHANNEL_STATE_READY); +3506:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** TIM_CHANNEL_N_STATE_SET(htim, Channel, HAL_TIM_CHANNEL_STATE_READY); +3507:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** } +3508:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** else +3509:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** { + ARM GAS /tmp/ccMtK8ce.s page 63 + + +3510:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** TIM_CHANNEL_STATE_SET(htim, TIM_CHANNEL_1, HAL_TIM_CHANNEL_STATE_READY); +3511:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** TIM_CHANNEL_STATE_SET(htim, TIM_CHANNEL_2, HAL_TIM_CHANNEL_STATE_READY); +3512:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** TIM_CHANNEL_N_STATE_SET(htim, TIM_CHANNEL_1, HAL_TIM_CHANNEL_STATE_READY); +3513:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** TIM_CHANNEL_N_STATE_SET(htim, TIM_CHANNEL_2, HAL_TIM_CHANNEL_STATE_READY); +3514:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** } +3515:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** +3516:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** /* Return function status */ +3517:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** return HAL_OK; +3518:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** } +3519:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** +3520:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** /** +3521:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** * @brief Starts the TIM Encoder Interface in DMA mode. +3522:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** * @param htim TIM Encoder Interface handle +3523:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** * @param Channel TIM Channels to be enabled +3524:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** * This parameter can be one of the following values: +3525:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** * @arg TIM_CHANNEL_1: TIM Channel 1 selected +3526:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** * @arg TIM_CHANNEL_2: TIM Channel 2 selected +3527:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** * @arg TIM_CHANNEL_ALL: TIM Channel 1 and TIM Channel 2 are selected +3528:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** * @param pData1 The destination Buffer address for IC1. +3529:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** * @param pData2 The destination Buffer address for IC2. +3530:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** * @param Length The length of data to be transferred from TIM peripheral to memory. +3531:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** * @retval HAL status +3532:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** */ +3533:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** HAL_StatusTypeDef HAL_TIM_Encoder_Start_DMA(TIM_HandleTypeDef *htim, uint32_t Channel, uint32_t *pD +3534:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** uint32_t *pData2, uint16_t Length) +3535:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** { +3536:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** HAL_TIM_ChannelStateTypeDef channel_1_state = TIM_CHANNEL_STATE_GET(htim, TIM_CHANNEL_1); +3537:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** HAL_TIM_ChannelStateTypeDef channel_2_state = TIM_CHANNEL_STATE_GET(htim, TIM_CHANNEL_2); +3538:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** HAL_TIM_ChannelStateTypeDef complementary_channel_1_state = TIM_CHANNEL_N_STATE_GET(htim, TIM_CHA +3539:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** HAL_TIM_ChannelStateTypeDef complementary_channel_2_state = TIM_CHANNEL_N_STATE_GET(htim, TIM_CHA +3540:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** +3541:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** /* Check the parameters */ +3542:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** assert_param(IS_TIM_ENCODER_INTERFACE_INSTANCE(htim->Instance)); +3543:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** +3544:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** /* Set the TIM channel(s) state */ +3545:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** if (Channel == TIM_CHANNEL_1) +3546:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** { +3547:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** if ((channel_1_state == HAL_TIM_CHANNEL_STATE_BUSY) +3548:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** || (complementary_channel_1_state == HAL_TIM_CHANNEL_STATE_BUSY)) +3549:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** { +3550:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** return HAL_BUSY; +3551:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** } +3552:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** else if ((channel_1_state == HAL_TIM_CHANNEL_STATE_READY) +3553:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** && (complementary_channel_1_state == HAL_TIM_CHANNEL_STATE_READY)) +3554:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** { +3555:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** if ((pData1 == NULL) || (Length == 0U)) +3556:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** { +3557:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** return HAL_ERROR; +3558:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** } +3559:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** else +3560:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** { +3561:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** TIM_CHANNEL_STATE_SET(htim, TIM_CHANNEL_1, HAL_TIM_CHANNEL_STATE_BUSY); +3562:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** TIM_CHANNEL_N_STATE_SET(htim, TIM_CHANNEL_1, HAL_TIM_CHANNEL_STATE_BUSY); +3563:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** } +3564:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** } +3565:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** else +3566:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** { + ARM GAS /tmp/ccMtK8ce.s page 64 + + +3567:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** return HAL_ERROR; +3568:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** } +3569:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** } +3570:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** else if (Channel == TIM_CHANNEL_2) +3571:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** { +3572:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** if ((channel_2_state == HAL_TIM_CHANNEL_STATE_BUSY) +3573:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** || (complementary_channel_2_state == HAL_TIM_CHANNEL_STATE_BUSY)) +3574:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** { +3575:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** return HAL_BUSY; +3576:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** } +3577:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** else if ((channel_2_state == HAL_TIM_CHANNEL_STATE_READY) +3578:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** && (complementary_channel_2_state == HAL_TIM_CHANNEL_STATE_READY)) +3579:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** { +3580:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** if ((pData2 == NULL) || (Length == 0U)) +3581:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** { +3582:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** return HAL_ERROR; +3583:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** } +3584:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** else +3585:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** { +3586:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** TIM_CHANNEL_STATE_SET(htim, TIM_CHANNEL_2, HAL_TIM_CHANNEL_STATE_BUSY); +3587:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** TIM_CHANNEL_N_STATE_SET(htim, TIM_CHANNEL_2, HAL_TIM_CHANNEL_STATE_BUSY); +3588:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** } +3589:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** } +3590:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** else +3591:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** { +3592:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** return HAL_ERROR; +3593:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** } +3594:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** } +3595:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** else +3596:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** { +3597:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** if ((channel_1_state == HAL_TIM_CHANNEL_STATE_BUSY) +3598:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** || (channel_2_state == HAL_TIM_CHANNEL_STATE_BUSY) +3599:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** || (complementary_channel_1_state == HAL_TIM_CHANNEL_STATE_BUSY) +3600:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** || (complementary_channel_2_state == HAL_TIM_CHANNEL_STATE_BUSY)) +3601:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** { +3602:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** return HAL_BUSY; +3603:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** } +3604:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** else if ((channel_1_state == HAL_TIM_CHANNEL_STATE_READY) +3605:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** && (channel_2_state == HAL_TIM_CHANNEL_STATE_READY) +3606:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** && (complementary_channel_1_state == HAL_TIM_CHANNEL_STATE_READY) +3607:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** && (complementary_channel_2_state == HAL_TIM_CHANNEL_STATE_READY)) +3608:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** { +3609:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** if ((((pData1 == NULL) || (pData2 == NULL))) || (Length == 0U)) +3610:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** { +3611:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** return HAL_ERROR; +3612:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** } +3613:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** else +3614:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** { +3615:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** TIM_CHANNEL_STATE_SET(htim, TIM_CHANNEL_1, HAL_TIM_CHANNEL_STATE_BUSY); +3616:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** TIM_CHANNEL_STATE_SET(htim, TIM_CHANNEL_2, HAL_TIM_CHANNEL_STATE_BUSY); +3617:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** TIM_CHANNEL_N_STATE_SET(htim, TIM_CHANNEL_1, HAL_TIM_CHANNEL_STATE_BUSY); +3618:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** TIM_CHANNEL_N_STATE_SET(htim, TIM_CHANNEL_2, HAL_TIM_CHANNEL_STATE_BUSY); +3619:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** } +3620:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** } +3621:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** else +3622:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** { +3623:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** return HAL_ERROR; + ARM GAS /tmp/ccMtK8ce.s page 65 + + +3624:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** } +3625:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** } +3626:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** +3627:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** switch (Channel) +3628:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** { +3629:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** case TIM_CHANNEL_1: +3630:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** { +3631:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** /* Set the DMA capture callbacks */ +3632:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** htim->hdma[TIM_DMA_ID_CC1]->XferCpltCallback = TIM_DMACaptureCplt; +3633:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** htim->hdma[TIM_DMA_ID_CC1]->XferHalfCpltCallback = TIM_DMACaptureHalfCplt; +3634:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** +3635:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** /* Set the DMA error callback */ +3636:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** htim->hdma[TIM_DMA_ID_CC1]->XferErrorCallback = TIM_DMAError ; +3637:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** +3638:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** /* Enable the DMA channel */ +3639:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** if (HAL_DMA_Start_IT(htim->hdma[TIM_DMA_ID_CC1], (uint32_t)&htim->Instance->CCR1, (uint32_t)p +3640:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** Length) != HAL_OK) +3641:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** { +3642:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** /* Return error status */ +3643:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** return HAL_ERROR; +3644:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** } +3645:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** /* Enable the TIM Input Capture DMA request */ +3646:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** __HAL_TIM_ENABLE_DMA(htim, TIM_DMA_CC1); +3647:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** +3648:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** /* Enable the Capture compare channel */ +3649:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** TIM_CCxChannelCmd(htim->Instance, TIM_CHANNEL_1, TIM_CCx_ENABLE); +3650:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** +3651:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** /* Enable the Peripheral */ +3652:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** __HAL_TIM_ENABLE(htim); +3653:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** +3654:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** break; +3655:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** } +3656:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** +3657:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** case TIM_CHANNEL_2: +3658:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** { +3659:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** /* Set the DMA capture callbacks */ +3660:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** htim->hdma[TIM_DMA_ID_CC2]->XferCpltCallback = TIM_DMACaptureCplt; +3661:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** htim->hdma[TIM_DMA_ID_CC2]->XferHalfCpltCallback = TIM_DMACaptureHalfCplt; +3662:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** +3663:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** /* Set the DMA error callback */ +3664:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** htim->hdma[TIM_DMA_ID_CC2]->XferErrorCallback = TIM_DMAError; +3665:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** /* Enable the DMA channel */ +3666:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** if (HAL_DMA_Start_IT(htim->hdma[TIM_DMA_ID_CC2], (uint32_t)&htim->Instance->CCR2, (uint32_t)p +3667:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** Length) != HAL_OK) +3668:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** { +3669:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** /* Return error status */ +3670:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** return HAL_ERROR; +3671:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** } +3672:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** /* Enable the TIM Input Capture DMA request */ +3673:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** __HAL_TIM_ENABLE_DMA(htim, TIM_DMA_CC2); +3674:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** +3675:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** /* Enable the Capture compare channel */ +3676:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** TIM_CCxChannelCmd(htim->Instance, TIM_CHANNEL_2, TIM_CCx_ENABLE); +3677:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** +3678:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** /* Enable the Peripheral */ +3679:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** __HAL_TIM_ENABLE(htim); +3680:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + ARM GAS /tmp/ccMtK8ce.s page 66 + + +3681:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** break; +3682:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** } +3683:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** +3684:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** default: +3685:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** { +3686:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** /* Set the DMA capture callbacks */ +3687:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** htim->hdma[TIM_DMA_ID_CC1]->XferCpltCallback = TIM_DMACaptureCplt; +3688:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** htim->hdma[TIM_DMA_ID_CC1]->XferHalfCpltCallback = TIM_DMACaptureHalfCplt; +3689:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** +3690:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** /* Set the DMA error callback */ +3691:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** htim->hdma[TIM_DMA_ID_CC1]->XferErrorCallback = TIM_DMAError ; +3692:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** +3693:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** /* Enable the DMA channel */ +3694:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** if (HAL_DMA_Start_IT(htim->hdma[TIM_DMA_ID_CC1], (uint32_t)&htim->Instance->CCR1, (uint32_t)p +3695:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** Length) != HAL_OK) +3696:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** { +3697:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** /* Return error status */ +3698:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** return HAL_ERROR; +3699:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** } +3700:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** +3701:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** /* Set the DMA capture callbacks */ +3702:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** htim->hdma[TIM_DMA_ID_CC2]->XferCpltCallback = TIM_DMACaptureCplt; +3703:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** htim->hdma[TIM_DMA_ID_CC2]->XferHalfCpltCallback = TIM_DMACaptureHalfCplt; +3704:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** +3705:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** /* Set the DMA error callback */ +3706:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** htim->hdma[TIM_DMA_ID_CC2]->XferErrorCallback = TIM_DMAError ; +3707:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** +3708:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** /* Enable the DMA channel */ +3709:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** if (HAL_DMA_Start_IT(htim->hdma[TIM_DMA_ID_CC2], (uint32_t)&htim->Instance->CCR2, (uint32_t)p +3710:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** Length) != HAL_OK) +3711:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** { +3712:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** /* Return error status */ +3713:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** return HAL_ERROR; +3714:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** } +3715:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** +3716:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** /* Enable the TIM Input Capture DMA request */ +3717:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** __HAL_TIM_ENABLE_DMA(htim, TIM_DMA_CC1); +3718:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** /* Enable the TIM Input Capture DMA request */ +3719:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** __HAL_TIM_ENABLE_DMA(htim, TIM_DMA_CC2); +3720:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** +3721:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** /* Enable the Capture compare channel */ +3722:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** TIM_CCxChannelCmd(htim->Instance, TIM_CHANNEL_1, TIM_CCx_ENABLE); +3723:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** TIM_CCxChannelCmd(htim->Instance, TIM_CHANNEL_2, TIM_CCx_ENABLE); +3724:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** +3725:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** /* Enable the Peripheral */ +3726:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** __HAL_TIM_ENABLE(htim); +3727:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** +3728:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** break; +3729:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** } +3730:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** } +3731:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** +3732:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** /* Return function status */ +3733:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** return HAL_OK; +3734:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** } +3735:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** +3736:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** /** +3737:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** * @brief Stops the TIM Encoder Interface in DMA mode. + ARM GAS /tmp/ccMtK8ce.s page 67 + + +3738:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** * @param htim TIM Encoder Interface handle +3739:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** * @param Channel TIM Channels to be enabled +3740:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** * This parameter can be one of the following values: +3741:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** * @arg TIM_CHANNEL_1: TIM Channel 1 selected +3742:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** * @arg TIM_CHANNEL_2: TIM Channel 2 selected +3743:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** * @arg TIM_CHANNEL_ALL: TIM Channel 1 and TIM Channel 2 are selected +3744:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** * @retval HAL status +3745:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** */ +3746:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** HAL_StatusTypeDef HAL_TIM_Encoder_Stop_DMA(TIM_HandleTypeDef *htim, uint32_t Channel) +3747:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** { +3748:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** /* Check the parameters */ +3749:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** assert_param(IS_TIM_ENCODER_INTERFACE_INSTANCE(htim->Instance)); +3750:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** +3751:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** /* Disable the Input Capture channels 1 and 2 +3752:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** (in the EncoderInterface the two possible channels that can be used are TIM_CHANNEL_1 and TIM_C +3753:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** if (Channel == TIM_CHANNEL_1) +3754:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** { +3755:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** TIM_CCxChannelCmd(htim->Instance, TIM_CHANNEL_1, TIM_CCx_DISABLE); +3756:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** +3757:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** /* Disable the capture compare DMA Request 1 */ +3758:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** __HAL_TIM_DISABLE_DMA(htim, TIM_DMA_CC1); +3759:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** (void)HAL_DMA_Abort_IT(htim->hdma[TIM_DMA_ID_CC1]); +3760:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** } +3761:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** else if (Channel == TIM_CHANNEL_2) +3762:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** { +3763:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** TIM_CCxChannelCmd(htim->Instance, TIM_CHANNEL_2, TIM_CCx_DISABLE); +3764:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** +3765:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** /* Disable the capture compare DMA Request 2 */ +3766:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** __HAL_TIM_DISABLE_DMA(htim, TIM_DMA_CC2); +3767:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** (void)HAL_DMA_Abort_IT(htim->hdma[TIM_DMA_ID_CC2]); +3768:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** } +3769:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** else +3770:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** { +3771:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** TIM_CCxChannelCmd(htim->Instance, TIM_CHANNEL_1, TIM_CCx_DISABLE); +3772:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** TIM_CCxChannelCmd(htim->Instance, TIM_CHANNEL_2, TIM_CCx_DISABLE); +3773:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** +3774:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** /* Disable the capture compare DMA Request 1 and 2 */ +3775:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** __HAL_TIM_DISABLE_DMA(htim, TIM_DMA_CC1); +3776:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** __HAL_TIM_DISABLE_DMA(htim, TIM_DMA_CC2); +3777:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** (void)HAL_DMA_Abort_IT(htim->hdma[TIM_DMA_ID_CC1]); +3778:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** (void)HAL_DMA_Abort_IT(htim->hdma[TIM_DMA_ID_CC2]); +3779:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** } +3780:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** +3781:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** /* Disable the Peripheral */ +3782:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** __HAL_TIM_DISABLE(htim); +3783:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** +3784:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** /* Set the TIM channel(s) state */ +3785:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** if ((Channel == TIM_CHANNEL_1) || (Channel == TIM_CHANNEL_2)) +3786:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** { +3787:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** TIM_CHANNEL_STATE_SET(htim, Channel, HAL_TIM_CHANNEL_STATE_READY); +3788:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** TIM_CHANNEL_N_STATE_SET(htim, Channel, HAL_TIM_CHANNEL_STATE_READY); +3789:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** } +3790:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** else +3791:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** { +3792:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** TIM_CHANNEL_STATE_SET(htim, TIM_CHANNEL_1, HAL_TIM_CHANNEL_STATE_READY); +3793:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** TIM_CHANNEL_STATE_SET(htim, TIM_CHANNEL_2, HAL_TIM_CHANNEL_STATE_READY); +3794:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** TIM_CHANNEL_N_STATE_SET(htim, TIM_CHANNEL_1, HAL_TIM_CHANNEL_STATE_READY); + ARM GAS /tmp/ccMtK8ce.s page 68 + + +3795:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** TIM_CHANNEL_N_STATE_SET(htim, TIM_CHANNEL_2, HAL_TIM_CHANNEL_STATE_READY); +3796:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** } +3797:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** +3798:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** /* Return function status */ +3799:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** return HAL_OK; +3800:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** } +3801:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** +3802:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** /** +3803:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** * @} +3804:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** */ +3805:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** /** @defgroup TIM_Exported_Functions_Group7 TIM IRQ handler management +3806:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** * @brief TIM IRQ handler management +3807:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** * +3808:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** @verbatim +3809:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** ============================================================================== +3810:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** ##### IRQ handler management ##### +3811:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** ============================================================================== +3812:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** [..] +3813:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** This section provides Timer IRQ handler function. +3814:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** +3815:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** @endverbatim +3816:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** * @{ +3817:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** */ +3818:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** /** +3819:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** * @brief This function handles TIM interrupts requests. +3820:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** * @param htim TIM handle +3821:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** * @retval None +3822:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** */ +3823:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** void HAL_TIM_IRQHandler(TIM_HandleTypeDef *htim) +3824:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** { +3825:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** /* Capture compare 1 event */ +3826:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** if (__HAL_TIM_GET_FLAG(htim, TIM_FLAG_CC1) != RESET) +3827:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** { +3828:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** if (__HAL_TIM_GET_IT_SOURCE(htim, TIM_IT_CC1) != RESET) +3829:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** { +3830:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** { +3831:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** __HAL_TIM_CLEAR_IT(htim, TIM_IT_CC1); +3832:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** htim->Channel = HAL_TIM_ACTIVE_CHANNEL_1; +3833:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** +3834:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** /* Input capture event */ +3835:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** if ((htim->Instance->CCMR1 & TIM_CCMR1_CC1S) != 0x00U) +3836:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** { +3837:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** #if (USE_HAL_TIM_REGISTER_CALLBACKS == 1) +3838:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** htim->IC_CaptureCallback(htim); +3839:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** #else +3840:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** HAL_TIM_IC_CaptureCallback(htim); +3841:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** #endif /* USE_HAL_TIM_REGISTER_CALLBACKS */ +3842:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** } +3843:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** /* Output compare event */ +3844:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** else +3845:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** { +3846:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** #if (USE_HAL_TIM_REGISTER_CALLBACKS == 1) +3847:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** htim->OC_DelayElapsedCallback(htim); +3848:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** htim->PWM_PulseFinishedCallback(htim); +3849:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** #else +3850:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** HAL_TIM_OC_DelayElapsedCallback(htim); +3851:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** HAL_TIM_PWM_PulseFinishedCallback(htim); + ARM GAS /tmp/ccMtK8ce.s page 69 + + +3852:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** #endif /* USE_HAL_TIM_REGISTER_CALLBACKS */ +3853:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** } +3854:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** htim->Channel = HAL_TIM_ACTIVE_CHANNEL_CLEARED; +3855:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** } +3856:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** } +3857:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** } +3858:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** /* Capture compare 2 event */ +3859:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** if (__HAL_TIM_GET_FLAG(htim, TIM_FLAG_CC2) != RESET) +3860:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** { +3861:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** if (__HAL_TIM_GET_IT_SOURCE(htim, TIM_IT_CC2) != RESET) +3862:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** { +3863:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** __HAL_TIM_CLEAR_IT(htim, TIM_IT_CC2); +3864:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** htim->Channel = HAL_TIM_ACTIVE_CHANNEL_2; +3865:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** /* Input capture event */ +3866:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** if ((htim->Instance->CCMR1 & TIM_CCMR1_CC2S) != 0x00U) +3867:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** { +3868:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** #if (USE_HAL_TIM_REGISTER_CALLBACKS == 1) +3869:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** htim->IC_CaptureCallback(htim); +3870:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** #else +3871:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** HAL_TIM_IC_CaptureCallback(htim); +3872:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** #endif /* USE_HAL_TIM_REGISTER_CALLBACKS */ +3873:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** } +3874:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** /* Output compare event */ +3875:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** else +3876:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** { +3877:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** #if (USE_HAL_TIM_REGISTER_CALLBACKS == 1) +3878:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** htim->OC_DelayElapsedCallback(htim); +3879:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** htim->PWM_PulseFinishedCallback(htim); +3880:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** #else +3881:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** HAL_TIM_OC_DelayElapsedCallback(htim); +3882:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** HAL_TIM_PWM_PulseFinishedCallback(htim); +3883:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** #endif /* USE_HAL_TIM_REGISTER_CALLBACKS */ +3884:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** } +3885:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** htim->Channel = HAL_TIM_ACTIVE_CHANNEL_CLEARED; +3886:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** } +3887:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** } +3888:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** /* Capture compare 3 event */ +3889:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** if (__HAL_TIM_GET_FLAG(htim, TIM_FLAG_CC3) != RESET) +3890:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** { +3891:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** if (__HAL_TIM_GET_IT_SOURCE(htim, TIM_IT_CC3) != RESET) +3892:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** { +3893:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** __HAL_TIM_CLEAR_IT(htim, TIM_IT_CC3); +3894:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** htim->Channel = HAL_TIM_ACTIVE_CHANNEL_3; +3895:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** /* Input capture event */ +3896:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** if ((htim->Instance->CCMR2 & TIM_CCMR2_CC3S) != 0x00U) +3897:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** { +3898:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** #if (USE_HAL_TIM_REGISTER_CALLBACKS == 1) +3899:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** htim->IC_CaptureCallback(htim); +3900:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** #else +3901:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** HAL_TIM_IC_CaptureCallback(htim); +3902:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** #endif /* USE_HAL_TIM_REGISTER_CALLBACKS */ +3903:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** } +3904:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** /* Output compare event */ +3905:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** else +3906:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** { +3907:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** #if (USE_HAL_TIM_REGISTER_CALLBACKS == 1) +3908:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** htim->OC_DelayElapsedCallback(htim); + ARM GAS /tmp/ccMtK8ce.s page 70 + + +3909:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** htim->PWM_PulseFinishedCallback(htim); +3910:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** #else +3911:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** HAL_TIM_OC_DelayElapsedCallback(htim); +3912:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** HAL_TIM_PWM_PulseFinishedCallback(htim); +3913:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** #endif /* USE_HAL_TIM_REGISTER_CALLBACKS */ +3914:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** } +3915:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** htim->Channel = HAL_TIM_ACTIVE_CHANNEL_CLEARED; +3916:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** } +3917:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** } +3918:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** /* Capture compare 4 event */ +3919:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** if (__HAL_TIM_GET_FLAG(htim, TIM_FLAG_CC4) != RESET) +3920:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** { +3921:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** if (__HAL_TIM_GET_IT_SOURCE(htim, TIM_IT_CC4) != RESET) +3922:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** { +3923:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** __HAL_TIM_CLEAR_IT(htim, TIM_IT_CC4); +3924:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** htim->Channel = HAL_TIM_ACTIVE_CHANNEL_4; +3925:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** /* Input capture event */ +3926:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** if ((htim->Instance->CCMR2 & TIM_CCMR2_CC4S) != 0x00U) +3927:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** { +3928:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** #if (USE_HAL_TIM_REGISTER_CALLBACKS == 1) +3929:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** htim->IC_CaptureCallback(htim); +3930:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** #else +3931:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** HAL_TIM_IC_CaptureCallback(htim); +3932:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** #endif /* USE_HAL_TIM_REGISTER_CALLBACKS */ +3933:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** } +3934:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** /* Output compare event */ +3935:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** else +3936:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** { +3937:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** #if (USE_HAL_TIM_REGISTER_CALLBACKS == 1) +3938:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** htim->OC_DelayElapsedCallback(htim); +3939:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** htim->PWM_PulseFinishedCallback(htim); +3940:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** #else +3941:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** HAL_TIM_OC_DelayElapsedCallback(htim); +3942:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** HAL_TIM_PWM_PulseFinishedCallback(htim); +3943:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** #endif /* USE_HAL_TIM_REGISTER_CALLBACKS */ +3944:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** } +3945:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** htim->Channel = HAL_TIM_ACTIVE_CHANNEL_CLEARED; +3946:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** } +3947:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** } +3948:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** /* TIM Update event */ +3949:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** if (__HAL_TIM_GET_FLAG(htim, TIM_FLAG_UPDATE) != RESET) +3950:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** { +3951:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** if (__HAL_TIM_GET_IT_SOURCE(htim, TIM_IT_UPDATE) != RESET) +3952:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** { +3953:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** __HAL_TIM_CLEAR_IT(htim, TIM_IT_UPDATE); +3954:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** #if (USE_HAL_TIM_REGISTER_CALLBACKS == 1) +3955:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** htim->PeriodElapsedCallback(htim); +3956:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** #else +3957:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** HAL_TIM_PeriodElapsedCallback(htim); +3958:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** #endif /* USE_HAL_TIM_REGISTER_CALLBACKS */ +3959:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** } +3960:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** } +3961:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** /* TIM Break input event */ +3962:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** if (__HAL_TIM_GET_FLAG(htim, TIM_FLAG_BREAK) != RESET) +3963:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** { +3964:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** if (__HAL_TIM_GET_IT_SOURCE(htim, TIM_IT_BREAK) != RESET) +3965:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** { + ARM GAS /tmp/ccMtK8ce.s page 71 + + +3966:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** __HAL_TIM_CLEAR_IT(htim, TIM_IT_BREAK); +3967:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** #if (USE_HAL_TIM_REGISTER_CALLBACKS == 1) +3968:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** htim->BreakCallback(htim); +3969:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** #else +3970:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** HAL_TIMEx_BreakCallback(htim); +3971:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** #endif /* USE_HAL_TIM_REGISTER_CALLBACKS */ +3972:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** } +3973:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** } +3974:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** /* TIM Trigger detection event */ +3975:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** if (__HAL_TIM_GET_FLAG(htim, TIM_FLAG_TRIGGER) != RESET) +3976:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** { +3977:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** if (__HAL_TIM_GET_IT_SOURCE(htim, TIM_IT_TRIGGER) != RESET) +3978:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** { +3979:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** __HAL_TIM_CLEAR_IT(htim, TIM_IT_TRIGGER); +3980:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** #if (USE_HAL_TIM_REGISTER_CALLBACKS == 1) +3981:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** htim->TriggerCallback(htim); +3982:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** #else +3983:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** HAL_TIM_TriggerCallback(htim); +3984:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** #endif /* USE_HAL_TIM_REGISTER_CALLBACKS */ +3985:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** } +3986:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** } +3987:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** /* TIM commutation event */ +3988:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** if (__HAL_TIM_GET_FLAG(htim, TIM_FLAG_COM) != RESET) +3989:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** { +3990:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** if (__HAL_TIM_GET_IT_SOURCE(htim, TIM_IT_COM) != RESET) +3991:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** { +3992:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** __HAL_TIM_CLEAR_IT(htim, TIM_FLAG_COM); +3993:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** #if (USE_HAL_TIM_REGISTER_CALLBACKS == 1) +3994:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** htim->CommutationCallback(htim); +3995:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** #else +3996:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** HAL_TIMEx_CommutCallback(htim); +3997:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** #endif /* USE_HAL_TIM_REGISTER_CALLBACKS */ +3998:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** } +3999:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** } +4000:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** } +4001:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** +4002:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** /** +4003:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** * @} +4004:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** */ +4005:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** +4006:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** /** @defgroup TIM_Exported_Functions_Group8 TIM Peripheral Control functions +4007:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** * @brief TIM Peripheral Control functions +4008:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** * +4009:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** @verbatim +4010:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** ============================================================================== +4011:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** ##### Peripheral Control functions ##### +4012:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** ============================================================================== +4013:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** [..] +4014:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** This section provides functions allowing to: +4015:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** (+) Configure The Input Output channels for OC, PWM, IC or One Pulse mode. +4016:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** (+) Configure External Clock source. +4017:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** (+) Configure Complementary channels, break features and dead time. +4018:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** (+) Configure Master and the Slave synchronization. +4019:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** (+) Configure the DMA Burst Mode. +4020:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** +4021:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** @endverbatim +4022:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** * @{ + ARM GAS /tmp/ccMtK8ce.s page 72 + + +4023:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** */ +4024:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** +4025:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** /** +4026:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** * @brief Initializes the TIM Output Compare Channels according to the specified +4027:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** * parameters in the TIM_OC_InitTypeDef. +4028:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** * @param htim TIM Output Compare handle +4029:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** * @param sConfig TIM Output Compare configuration structure +4030:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** * @param Channel TIM Channels to configure +4031:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** * This parameter can be one of the following values: +4032:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** * @arg TIM_CHANNEL_1: TIM Channel 1 selected +4033:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** * @arg TIM_CHANNEL_2: TIM Channel 2 selected +4034:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** * @arg TIM_CHANNEL_3: TIM Channel 3 selected +4035:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** * @arg TIM_CHANNEL_4: TIM Channel 4 selected +4036:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** * @retval HAL status +4037:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** */ +4038:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** HAL_StatusTypeDef HAL_TIM_OC_ConfigChannel(TIM_HandleTypeDef *htim, +4039:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** const TIM_OC_InitTypeDef *sConfig, +4040:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** uint32_t Channel) +4041:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** { +4042:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** HAL_StatusTypeDef status = HAL_OK; +4043:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** +4044:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** /* Check the parameters */ +4045:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** assert_param(IS_TIM_CHANNELS(Channel)); +4046:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** assert_param(IS_TIM_OC_MODE(sConfig->OCMode)); +4047:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** assert_param(IS_TIM_OC_POLARITY(sConfig->OCPolarity)); +4048:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** +4049:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** /* Process Locked */ +4050:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** __HAL_LOCK(htim); +4051:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** +4052:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** switch (Channel) +4053:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** { +4054:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** case TIM_CHANNEL_1: +4055:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** { +4056:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** /* Check the parameters */ +4057:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** assert_param(IS_TIM_CC1_INSTANCE(htim->Instance)); +4058:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** +4059:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** /* Configure the TIM Channel 1 in Output Compare */ +4060:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** TIM_OC1_SetConfig(htim->Instance, sConfig); +4061:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** break; +4062:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** } +4063:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** +4064:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** case TIM_CHANNEL_2: +4065:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** { +4066:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** /* Check the parameters */ +4067:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** assert_param(IS_TIM_CC2_INSTANCE(htim->Instance)); +4068:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** +4069:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** /* Configure the TIM Channel 2 in Output Compare */ +4070:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** TIM_OC2_SetConfig(htim->Instance, sConfig); +4071:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** break; +4072:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** } +4073:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** +4074:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** case TIM_CHANNEL_3: +4075:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** { +4076:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** /* Check the parameters */ +4077:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** assert_param(IS_TIM_CC3_INSTANCE(htim->Instance)); +4078:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** +4079:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** /* Configure the TIM Channel 3 in Output Compare */ + ARM GAS /tmp/ccMtK8ce.s page 73 + + +4080:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** TIM_OC3_SetConfig(htim->Instance, sConfig); +4081:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** break; +4082:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** } +4083:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** +4084:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** case TIM_CHANNEL_4: +4085:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** { +4086:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** /* Check the parameters */ +4087:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** assert_param(IS_TIM_CC4_INSTANCE(htim->Instance)); +4088:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** +4089:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** /* Configure the TIM Channel 4 in Output Compare */ +4090:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** TIM_OC4_SetConfig(htim->Instance, sConfig); +4091:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** break; +4092:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** } +4093:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** +4094:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** default: +4095:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** status = HAL_ERROR; +4096:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** break; +4097:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** } +4098:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** +4099:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** __HAL_UNLOCK(htim); +4100:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** +4101:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** return status; +4102:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** } +4103:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** +4104:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** /** +4105:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** * @brief Initializes the TIM Input Capture Channels according to the specified +4106:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** * parameters in the TIM_IC_InitTypeDef. +4107:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** * @param htim TIM IC handle +4108:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** * @param sConfig TIM Input Capture configuration structure +4109:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** * @param Channel TIM Channel to configure +4110:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** * This parameter can be one of the following values: +4111:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** * @arg TIM_CHANNEL_1: TIM Channel 1 selected +4112:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** * @arg TIM_CHANNEL_2: TIM Channel 2 selected +4113:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** * @arg TIM_CHANNEL_3: TIM Channel 3 selected +4114:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** * @arg TIM_CHANNEL_4: TIM Channel 4 selected +4115:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** * @retval HAL status +4116:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** */ +4117:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** HAL_StatusTypeDef HAL_TIM_IC_ConfigChannel(TIM_HandleTypeDef *htim, const TIM_IC_InitTypeDef *sConf +4118:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** { +4119:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** HAL_StatusTypeDef status = HAL_OK; +4120:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** +4121:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** /* Check the parameters */ +4122:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** assert_param(IS_TIM_CC1_INSTANCE(htim->Instance)); +4123:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** assert_param(IS_TIM_IC_POLARITY(sConfig->ICPolarity)); +4124:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** assert_param(IS_TIM_IC_SELECTION(sConfig->ICSelection)); +4125:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** assert_param(IS_TIM_IC_PRESCALER(sConfig->ICPrescaler)); +4126:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** assert_param(IS_TIM_IC_FILTER(sConfig->ICFilter)); +4127:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** +4128:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** /* Process Locked */ +4129:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** __HAL_LOCK(htim); +4130:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** +4131:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** if (Channel == TIM_CHANNEL_1) +4132:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** { +4133:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** /* TI1 Configuration */ +4134:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** TIM_TI1_SetConfig(htim->Instance, +4135:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** sConfig->ICPolarity, +4136:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** sConfig->ICSelection, + ARM GAS /tmp/ccMtK8ce.s page 74 + + +4137:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** sConfig->ICFilter); +4138:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** +4139:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** /* Reset the IC1PSC Bits */ +4140:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** htim->Instance->CCMR1 &= ~TIM_CCMR1_IC1PSC; +4141:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** +4142:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** /* Set the IC1PSC value */ +4143:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** htim->Instance->CCMR1 |= sConfig->ICPrescaler; +4144:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** } +4145:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** else if (Channel == TIM_CHANNEL_2) +4146:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** { +4147:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** /* TI2 Configuration */ +4148:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** assert_param(IS_TIM_CC2_INSTANCE(htim->Instance)); +4149:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** +4150:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** TIM_TI2_SetConfig(htim->Instance, +4151:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** sConfig->ICPolarity, +4152:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** sConfig->ICSelection, +4153:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** sConfig->ICFilter); +4154:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** +4155:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** /* Reset the IC2PSC Bits */ +4156:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** htim->Instance->CCMR1 &= ~TIM_CCMR1_IC2PSC; +4157:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** +4158:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** /* Set the IC2PSC value */ +4159:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** htim->Instance->CCMR1 |= (sConfig->ICPrescaler << 8U); +4160:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** } +4161:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** else if (Channel == TIM_CHANNEL_3) +4162:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** { +4163:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** /* TI3 Configuration */ +4164:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** assert_param(IS_TIM_CC3_INSTANCE(htim->Instance)); +4165:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** +4166:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** TIM_TI3_SetConfig(htim->Instance, +4167:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** sConfig->ICPolarity, +4168:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** sConfig->ICSelection, +4169:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** sConfig->ICFilter); +4170:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** +4171:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** /* Reset the IC3PSC Bits */ +4172:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** htim->Instance->CCMR2 &= ~TIM_CCMR2_IC3PSC; +4173:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** +4174:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** /* Set the IC3PSC value */ +4175:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** htim->Instance->CCMR2 |= sConfig->ICPrescaler; +4176:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** } +4177:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** else if (Channel == TIM_CHANNEL_4) +4178:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** { +4179:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** /* TI4 Configuration */ +4180:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** assert_param(IS_TIM_CC4_INSTANCE(htim->Instance)); +4181:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** +4182:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** TIM_TI4_SetConfig(htim->Instance, +4183:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** sConfig->ICPolarity, +4184:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** sConfig->ICSelection, +4185:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** sConfig->ICFilter); +4186:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** +4187:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** /* Reset the IC4PSC Bits */ +4188:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** htim->Instance->CCMR2 &= ~TIM_CCMR2_IC4PSC; +4189:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** +4190:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** /* Set the IC4PSC value */ +4191:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** htim->Instance->CCMR2 |= (sConfig->ICPrescaler << 8U); +4192:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** } +4193:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** else + ARM GAS /tmp/ccMtK8ce.s page 75 + + +4194:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** { +4195:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** status = HAL_ERROR; +4196:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** } +4197:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** +4198:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** __HAL_UNLOCK(htim); +4199:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** +4200:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** return status; +4201:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** } +4202:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** +4203:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** /** +4204:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** * @brief Initializes the TIM PWM channels according to the specified +4205:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** * parameters in the TIM_OC_InitTypeDef. +4206:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** * @param htim TIM PWM handle +4207:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** * @param sConfig TIM PWM configuration structure +4208:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** * @param Channel TIM Channels to be configured +4209:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** * This parameter can be one of the following values: +4210:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** * @arg TIM_CHANNEL_1: TIM Channel 1 selected +4211:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** * @arg TIM_CHANNEL_2: TIM Channel 2 selected +4212:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** * @arg TIM_CHANNEL_3: TIM Channel 3 selected +4213:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** * @arg TIM_CHANNEL_4: TIM Channel 4 selected +4214:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** * @retval HAL status +4215:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** */ +4216:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** HAL_StatusTypeDef HAL_TIM_PWM_ConfigChannel(TIM_HandleTypeDef *htim, +4217:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** const TIM_OC_InitTypeDef *sConfig, +4218:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** uint32_t Channel) +4219:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** { +4220:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** HAL_StatusTypeDef status = HAL_OK; +4221:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** +4222:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** /* Check the parameters */ +4223:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** assert_param(IS_TIM_CHANNELS(Channel)); +4224:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** assert_param(IS_TIM_PWM_MODE(sConfig->OCMode)); +4225:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** assert_param(IS_TIM_OC_POLARITY(sConfig->OCPolarity)); +4226:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** assert_param(IS_TIM_FAST_STATE(sConfig->OCFastMode)); +4227:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** +4228:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** /* Process Locked */ +4229:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** __HAL_LOCK(htim); +4230:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** +4231:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** switch (Channel) +4232:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** { +4233:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** case TIM_CHANNEL_1: +4234:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** { +4235:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** /* Check the parameters */ +4236:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** assert_param(IS_TIM_CC1_INSTANCE(htim->Instance)); +4237:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** +4238:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** /* Configure the Channel 1 in PWM mode */ +4239:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** TIM_OC1_SetConfig(htim->Instance, sConfig); +4240:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** +4241:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** /* Set the Preload enable bit for channel1 */ +4242:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** htim->Instance->CCMR1 |= TIM_CCMR1_OC1PE; +4243:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** +4244:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** /* Configure the Output Fast mode */ +4245:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** htim->Instance->CCMR1 &= ~TIM_CCMR1_OC1FE; +4246:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** htim->Instance->CCMR1 |= sConfig->OCFastMode; +4247:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** break; +4248:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** } +4249:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** +4250:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** case TIM_CHANNEL_2: + ARM GAS /tmp/ccMtK8ce.s page 76 + + +4251:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** { +4252:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** /* Check the parameters */ +4253:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** assert_param(IS_TIM_CC2_INSTANCE(htim->Instance)); +4254:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** +4255:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** /* Configure the Channel 2 in PWM mode */ +4256:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** TIM_OC2_SetConfig(htim->Instance, sConfig); +4257:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** +4258:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** /* Set the Preload enable bit for channel2 */ +4259:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** htim->Instance->CCMR1 |= TIM_CCMR1_OC2PE; +4260:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** +4261:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** /* Configure the Output Fast mode */ +4262:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** htim->Instance->CCMR1 &= ~TIM_CCMR1_OC2FE; +4263:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** htim->Instance->CCMR1 |= sConfig->OCFastMode << 8U; +4264:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** break; +4265:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** } +4266:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** +4267:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** case TIM_CHANNEL_3: +4268:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** { +4269:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** /* Check the parameters */ +4270:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** assert_param(IS_TIM_CC3_INSTANCE(htim->Instance)); +4271:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** +4272:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** /* Configure the Channel 3 in PWM mode */ +4273:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** TIM_OC3_SetConfig(htim->Instance, sConfig); +4274:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** +4275:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** /* Set the Preload enable bit for channel3 */ +4276:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** htim->Instance->CCMR2 |= TIM_CCMR2_OC3PE; +4277:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** +4278:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** /* Configure the Output Fast mode */ +4279:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** htim->Instance->CCMR2 &= ~TIM_CCMR2_OC3FE; +4280:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** htim->Instance->CCMR2 |= sConfig->OCFastMode; +4281:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** break; +4282:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** } +4283:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** +4284:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** case TIM_CHANNEL_4: +4285:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** { +4286:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** /* Check the parameters */ +4287:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** assert_param(IS_TIM_CC4_INSTANCE(htim->Instance)); +4288:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** +4289:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** /* Configure the Channel 4 in PWM mode */ +4290:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** TIM_OC4_SetConfig(htim->Instance, sConfig); +4291:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** +4292:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** /* Set the Preload enable bit for channel4 */ +4293:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** htim->Instance->CCMR2 |= TIM_CCMR2_OC4PE; +4294:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** +4295:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** /* Configure the Output Fast mode */ +4296:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** htim->Instance->CCMR2 &= ~TIM_CCMR2_OC4FE; +4297:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** htim->Instance->CCMR2 |= sConfig->OCFastMode << 8U; +4298:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** break; +4299:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** } +4300:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** +4301:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** default: +4302:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** status = HAL_ERROR; +4303:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** break; +4304:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** } +4305:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** +4306:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** __HAL_UNLOCK(htim); +4307:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + ARM GAS /tmp/ccMtK8ce.s page 77 + + +4308:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** return status; +4309:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** } +4310:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** +4311:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** /** +4312:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** * @brief Initializes the TIM One Pulse Channels according to the specified +4313:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** * parameters in the TIM_OnePulse_InitTypeDef. +4314:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** * @param htim TIM One Pulse handle +4315:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** * @param sConfig TIM One Pulse configuration structure +4316:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** * @param OutputChannel TIM output channel to configure +4317:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** * This parameter can be one of the following values: +4318:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** * @arg TIM_CHANNEL_1: TIM Channel 1 selected +4319:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** * @arg TIM_CHANNEL_2: TIM Channel 2 selected +4320:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** * @param InputChannel TIM input Channel to configure +4321:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** * This parameter can be one of the following values: +4322:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** * @arg TIM_CHANNEL_1: TIM Channel 1 selected +4323:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** * @arg TIM_CHANNEL_2: TIM Channel 2 selected +4324:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** * @note To output a waveform with a minimum delay user can enable the fast +4325:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** * mode by calling the @ref __HAL_TIM_ENABLE_OCxFAST macro. Then CCx +4326:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** * output is forced in response to the edge detection on TIx input, +4327:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** * without taking in account the comparison. +4328:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** * @retval HAL status +4329:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** */ +4330:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** HAL_StatusTypeDef HAL_TIM_OnePulse_ConfigChannel(TIM_HandleTypeDef *htim, TIM_OnePulse_InitTypeDef +4331:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** uint32_t OutputChannel, uint32_t InputChannel) +4332:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** { +4333:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** HAL_StatusTypeDef status = HAL_OK; +4334:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** TIM_OC_InitTypeDef temp1; +4335:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** +4336:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** /* Check the parameters */ +4337:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** assert_param(IS_TIM_OPM_CHANNELS(OutputChannel)); +4338:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** assert_param(IS_TIM_OPM_CHANNELS(InputChannel)); +4339:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** +4340:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** if (OutputChannel != InputChannel) +4341:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** { +4342:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** /* Process Locked */ +4343:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** __HAL_LOCK(htim); +4344:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** +4345:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** htim->State = HAL_TIM_STATE_BUSY; +4346:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** +4347:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** /* Extract the Output compare configuration from sConfig structure */ +4348:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** temp1.OCMode = sConfig->OCMode; +4349:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** temp1.Pulse = sConfig->Pulse; +4350:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** temp1.OCPolarity = sConfig->OCPolarity; +4351:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** temp1.OCNPolarity = sConfig->OCNPolarity; +4352:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** temp1.OCIdleState = sConfig->OCIdleState; +4353:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** temp1.OCNIdleState = sConfig->OCNIdleState; +4354:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** +4355:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** switch (OutputChannel) +4356:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** { +4357:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** case TIM_CHANNEL_1: +4358:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** { +4359:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** assert_param(IS_TIM_CC1_INSTANCE(htim->Instance)); +4360:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** +4361:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** TIM_OC1_SetConfig(htim->Instance, &temp1); +4362:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** break; +4363:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** } +4364:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + ARM GAS /tmp/ccMtK8ce.s page 78 + + +4365:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** case TIM_CHANNEL_2: +4366:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** { +4367:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** assert_param(IS_TIM_CC2_INSTANCE(htim->Instance)); +4368:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** +4369:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** TIM_OC2_SetConfig(htim->Instance, &temp1); +4370:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** break; +4371:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** } +4372:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** +4373:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** default: +4374:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** status = HAL_ERROR; +4375:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** break; +4376:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** } +4377:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** +4378:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** if (status == HAL_OK) +4379:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** { +4380:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** switch (InputChannel) +4381:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** { +4382:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** case TIM_CHANNEL_1: +4383:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** { +4384:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** assert_param(IS_TIM_CC1_INSTANCE(htim->Instance)); +4385:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** +4386:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** TIM_TI1_SetConfig(htim->Instance, sConfig->ICPolarity, +4387:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** sConfig->ICSelection, sConfig->ICFilter); +4388:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** +4389:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** /* Reset the IC1PSC Bits */ +4390:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** htim->Instance->CCMR1 &= ~TIM_CCMR1_IC1PSC; +4391:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** +4392:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** /* Select the Trigger source */ +4393:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** htim->Instance->SMCR &= ~TIM_SMCR_TS; +4394:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** htim->Instance->SMCR |= TIM_TS_TI1FP1; +4395:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** +4396:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** /* Select the Slave Mode */ +4397:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** htim->Instance->SMCR &= ~TIM_SMCR_SMS; +4398:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** htim->Instance->SMCR |= TIM_SLAVEMODE_TRIGGER; +4399:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** break; +4400:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** } +4401:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** +4402:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** case TIM_CHANNEL_2: +4403:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** { +4404:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** assert_param(IS_TIM_CC2_INSTANCE(htim->Instance)); +4405:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** +4406:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** TIM_TI2_SetConfig(htim->Instance, sConfig->ICPolarity, +4407:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** sConfig->ICSelection, sConfig->ICFilter); +4408:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** +4409:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** /* Reset the IC2PSC Bits */ +4410:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** htim->Instance->CCMR1 &= ~TIM_CCMR1_IC2PSC; +4411:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** +4412:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** /* Select the Trigger source */ +4413:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** htim->Instance->SMCR &= ~TIM_SMCR_TS; +4414:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** htim->Instance->SMCR |= TIM_TS_TI2FP2; +4415:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** +4416:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** /* Select the Slave Mode */ +4417:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** htim->Instance->SMCR &= ~TIM_SMCR_SMS; +4418:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** htim->Instance->SMCR |= TIM_SLAVEMODE_TRIGGER; +4419:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** break; +4420:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** } +4421:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + ARM GAS /tmp/ccMtK8ce.s page 79 + + +4422:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** default: +4423:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** status = HAL_ERROR; +4424:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** break; +4425:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** } +4426:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** } +4427:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** +4428:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** htim->State = HAL_TIM_STATE_READY; +4429:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** +4430:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** __HAL_UNLOCK(htim); +4431:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** +4432:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** return status; +4433:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** } +4434:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** else +4435:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** { +4436:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** return HAL_ERROR; +4437:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** } +4438:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** } +4439:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** +4440:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** /** +4441:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** * @brief Configure the DMA Burst to transfer Data from the memory to the TIM peripheral +4442:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** * @param htim TIM handle +4443:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** * @param BurstBaseAddress TIM Base address from where the DMA will start the Data write +4444:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** * This parameter can be one of the following values: +4445:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** * @arg TIM_DMABASE_CR1 +4446:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** * @arg TIM_DMABASE_CR2 +4447:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** * @arg TIM_DMABASE_SMCR +4448:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** * @arg TIM_DMABASE_DIER +4449:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** * @arg TIM_DMABASE_SR +4450:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** * @arg TIM_DMABASE_EGR +4451:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** * @arg TIM_DMABASE_CCMR1 +4452:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** * @arg TIM_DMABASE_CCMR2 +4453:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** * @arg TIM_DMABASE_CCER +4454:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** * @arg TIM_DMABASE_CNT +4455:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** * @arg TIM_DMABASE_PSC +4456:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** * @arg TIM_DMABASE_ARR +4457:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** * @arg TIM_DMABASE_RCR +4458:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** * @arg TIM_DMABASE_CCR1 +4459:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** * @arg TIM_DMABASE_CCR2 +4460:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** * @arg TIM_DMABASE_CCR3 +4461:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** * @arg TIM_DMABASE_CCR4 +4462:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** * @arg TIM_DMABASE_BDTR +4463:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** * @param BurstRequestSrc TIM DMA Request sources +4464:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** * This parameter can be one of the following values: +4465:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** * @arg TIM_DMA_UPDATE: TIM update Interrupt source +4466:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** * @arg TIM_DMA_CC1: TIM Capture Compare 1 DMA source +4467:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** * @arg TIM_DMA_CC2: TIM Capture Compare 2 DMA source +4468:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** * @arg TIM_DMA_CC3: TIM Capture Compare 3 DMA source +4469:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** * @arg TIM_DMA_CC4: TIM Capture Compare 4 DMA source +4470:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** * @arg TIM_DMA_COM: TIM Commutation DMA source +4471:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** * @arg TIM_DMA_TRIGGER: TIM Trigger DMA source +4472:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** * @param BurstBuffer The Buffer address. +4473:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** * @param BurstLength DMA Burst length. This parameter can be one value +4474:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** * between: TIM_DMABURSTLENGTH_1TRANSFER and TIM_DMABURSTLENGTH_18TRANSFERS. +4475:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** * @note This function should be used only when BurstLength is equal to DMA data transfer length +4476:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** * @retval HAL status +4477:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** */ +4478:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** HAL_StatusTypeDef HAL_TIM_DMABurst_WriteStart(TIM_HandleTypeDef *htim, uint32_t BurstBaseAddress, + ARM GAS /tmp/ccMtK8ce.s page 80 + + +4479:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** uint32_t BurstRequestSrc, const uint32_t *BurstBuffer +4480:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** { +4481:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** HAL_StatusTypeDef status; +4482:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** +4483:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** status = HAL_TIM_DMABurst_MultiWriteStart(htim, BurstBaseAddress, BurstRequestSrc, BurstBuffer, B +4484:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** ((BurstLength) >> 8U) + 1U); +4485:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** +4486:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** +4487:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** +4488:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** return status; +4489:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** } +4490:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** +4491:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** /** +4492:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** * @brief Configure the DMA Burst to transfer multiple Data from the memory to the TIM peripheral +4493:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** * @param htim TIM handle +4494:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** * @param BurstBaseAddress TIM Base address from where the DMA will start the Data write +4495:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** * This parameter can be one of the following values: +4496:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** * @arg TIM_DMABASE_CR1 +4497:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** * @arg TIM_DMABASE_CR2 +4498:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** * @arg TIM_DMABASE_SMCR +4499:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** * @arg TIM_DMABASE_DIER +4500:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** * @arg TIM_DMABASE_SR +4501:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** * @arg TIM_DMABASE_EGR +4502:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** * @arg TIM_DMABASE_CCMR1 +4503:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** * @arg TIM_DMABASE_CCMR2 +4504:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** * @arg TIM_DMABASE_CCER +4505:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** * @arg TIM_DMABASE_CNT +4506:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** * @arg TIM_DMABASE_PSC +4507:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** * @arg TIM_DMABASE_ARR +4508:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** * @arg TIM_DMABASE_RCR +4509:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** * @arg TIM_DMABASE_CCR1 +4510:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** * @arg TIM_DMABASE_CCR2 +4511:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** * @arg TIM_DMABASE_CCR3 +4512:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** * @arg TIM_DMABASE_CCR4 +4513:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** * @arg TIM_DMABASE_BDTR +4514:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** * @param BurstRequestSrc TIM DMA Request sources +4515:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** * This parameter can be one of the following values: +4516:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** * @arg TIM_DMA_UPDATE: TIM update Interrupt source +4517:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** * @arg TIM_DMA_CC1: TIM Capture Compare 1 DMA source +4518:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** * @arg TIM_DMA_CC2: TIM Capture Compare 2 DMA source +4519:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** * @arg TIM_DMA_CC3: TIM Capture Compare 3 DMA source +4520:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** * @arg TIM_DMA_CC4: TIM Capture Compare 4 DMA source +4521:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** * @arg TIM_DMA_COM: TIM Commutation DMA source +4522:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** * @arg TIM_DMA_TRIGGER: TIM Trigger DMA source +4523:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** * @param BurstBuffer The Buffer address. +4524:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** * @param BurstLength DMA Burst length. This parameter can be one value +4525:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** * between: TIM_DMABURSTLENGTH_1TRANSFER and TIM_DMABURSTLENGTH_18TRANSFERS. +4526:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** * @param DataLength Data length. This parameter can be one value +4527:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** * between 1 and 0xFFFF. +4528:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** * @retval HAL status +4529:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** */ +4530:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** HAL_StatusTypeDef HAL_TIM_DMABurst_MultiWriteStart(TIM_HandleTypeDef *htim, uint32_t BurstBaseAddre +4531:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** uint32_t BurstRequestSrc, const uint32_t *BurstB +4532:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** uint32_t BurstLength, uint32_t DataLength) +4533:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** { +4534:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** HAL_StatusTypeDef status = HAL_OK; +4535:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + ARM GAS /tmp/ccMtK8ce.s page 81 + + +4536:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** /* Check the parameters */ +4537:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** assert_param(IS_TIM_DMABURST_INSTANCE(htim->Instance)); +4538:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** assert_param(IS_TIM_DMA_BASE(BurstBaseAddress)); +4539:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** assert_param(IS_TIM_DMA_SOURCE(BurstRequestSrc)); +4540:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** assert_param(IS_TIM_DMA_LENGTH(BurstLength)); +4541:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** assert_param(IS_TIM_DMA_DATA_LENGTH(DataLength)); +4542:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** +4543:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** if (htim->DMABurstState == HAL_DMA_BURST_STATE_BUSY) +4544:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** { +4545:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** return HAL_BUSY; +4546:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** } +4547:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** else if (htim->DMABurstState == HAL_DMA_BURST_STATE_READY) +4548:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** { +4549:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** if ((BurstBuffer == NULL) && (BurstLength > 0U)) +4550:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** { +4551:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** return HAL_ERROR; +4552:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** } +4553:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** else +4554:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** { +4555:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** htim->DMABurstState = HAL_DMA_BURST_STATE_BUSY; +4556:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** } +4557:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** } +4558:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** else +4559:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** { +4560:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** /* nothing to do */ +4561:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** } +4562:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** +4563:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** switch (BurstRequestSrc) +4564:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** { +4565:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** case TIM_DMA_UPDATE: +4566:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** { +4567:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** /* Set the DMA Period elapsed callbacks */ +4568:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** htim->hdma[TIM_DMA_ID_UPDATE]->XferCpltCallback = TIM_DMAPeriodElapsedCplt; +4569:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** htim->hdma[TIM_DMA_ID_UPDATE]->XferHalfCpltCallback = TIM_DMAPeriodElapsedHalfCplt; +4570:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** +4571:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** /* Set the DMA error callback */ +4572:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** htim->hdma[TIM_DMA_ID_UPDATE]->XferErrorCallback = TIM_DMAError ; +4573:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** +4574:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** /* Enable the DMA channel */ +4575:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** if (HAL_DMA_Start_IT(htim->hdma[TIM_DMA_ID_UPDATE], (uint32_t)BurstBuffer, +4576:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** (uint32_t)&htim->Instance->DMAR, DataLength) != HAL_OK) +4577:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** { +4578:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** /* Return error status */ +4579:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** return HAL_ERROR; +4580:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** } +4581:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** break; +4582:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** } +4583:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** case TIM_DMA_CC1: +4584:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** { +4585:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** /* Set the DMA compare callbacks */ +4586:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** htim->hdma[TIM_DMA_ID_CC1]->XferCpltCallback = TIM_DMADelayPulseCplt; +4587:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** htim->hdma[TIM_DMA_ID_CC1]->XferHalfCpltCallback = TIM_DMADelayPulseHalfCplt; +4588:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** +4589:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** /* Set the DMA error callback */ +4590:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** htim->hdma[TIM_DMA_ID_CC1]->XferErrorCallback = TIM_DMAError ; +4591:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** +4592:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** /* Enable the DMA channel */ + ARM GAS /tmp/ccMtK8ce.s page 82 + + +4593:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** if (HAL_DMA_Start_IT(htim->hdma[TIM_DMA_ID_CC1], (uint32_t)BurstBuffer, +4594:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** (uint32_t)&htim->Instance->DMAR, DataLength) != HAL_OK) +4595:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** { +4596:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** /* Return error status */ +4597:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** return HAL_ERROR; +4598:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** } +4599:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** break; +4600:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** } +4601:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** case TIM_DMA_CC2: +4602:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** { +4603:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** /* Set the DMA compare callbacks */ +4604:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** htim->hdma[TIM_DMA_ID_CC2]->XferCpltCallback = TIM_DMADelayPulseCplt; +4605:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** htim->hdma[TIM_DMA_ID_CC2]->XferHalfCpltCallback = TIM_DMADelayPulseHalfCplt; +4606:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** +4607:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** /* Set the DMA error callback */ +4608:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** htim->hdma[TIM_DMA_ID_CC2]->XferErrorCallback = TIM_DMAError ; +4609:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** +4610:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** /* Enable the DMA channel */ +4611:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** if (HAL_DMA_Start_IT(htim->hdma[TIM_DMA_ID_CC2], (uint32_t)BurstBuffer, +4612:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** (uint32_t)&htim->Instance->DMAR, DataLength) != HAL_OK) +4613:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** { +4614:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** /* Return error status */ +4615:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** return HAL_ERROR; +4616:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** } +4617:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** break; +4618:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** } +4619:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** case TIM_DMA_CC3: +4620:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** { +4621:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** /* Set the DMA compare callbacks */ +4622:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** htim->hdma[TIM_DMA_ID_CC3]->XferCpltCallback = TIM_DMADelayPulseCplt; +4623:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** htim->hdma[TIM_DMA_ID_CC3]->XferHalfCpltCallback = TIM_DMADelayPulseHalfCplt; +4624:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** +4625:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** /* Set the DMA error callback */ +4626:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** htim->hdma[TIM_DMA_ID_CC3]->XferErrorCallback = TIM_DMAError ; +4627:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** +4628:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** /* Enable the DMA channel */ +4629:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** if (HAL_DMA_Start_IT(htim->hdma[TIM_DMA_ID_CC3], (uint32_t)BurstBuffer, +4630:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** (uint32_t)&htim->Instance->DMAR, DataLength) != HAL_OK) +4631:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** { +4632:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** /* Return error status */ +4633:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** return HAL_ERROR; +4634:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** } +4635:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** break; +4636:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** } +4637:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** case TIM_DMA_CC4: +4638:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** { +4639:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** /* Set the DMA compare callbacks */ +4640:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** htim->hdma[TIM_DMA_ID_CC4]->XferCpltCallback = TIM_DMADelayPulseCplt; +4641:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** htim->hdma[TIM_DMA_ID_CC4]->XferHalfCpltCallback = TIM_DMADelayPulseHalfCplt; +4642:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** +4643:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** /* Set the DMA error callback */ +4644:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** htim->hdma[TIM_DMA_ID_CC4]->XferErrorCallback = TIM_DMAError ; +4645:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** +4646:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** /* Enable the DMA channel */ +4647:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** if (HAL_DMA_Start_IT(htim->hdma[TIM_DMA_ID_CC4], (uint32_t)BurstBuffer, +4648:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** (uint32_t)&htim->Instance->DMAR, DataLength) != HAL_OK) +4649:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** { + ARM GAS /tmp/ccMtK8ce.s page 83 + + +4650:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** /* Return error status */ +4651:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** return HAL_ERROR; +4652:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** } +4653:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** break; +4654:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** } +4655:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** case TIM_DMA_COM: +4656:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** { +4657:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** /* Set the DMA commutation callbacks */ +4658:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** htim->hdma[TIM_DMA_ID_COMMUTATION]->XferCpltCallback = TIMEx_DMACommutationCplt; +4659:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** htim->hdma[TIM_DMA_ID_COMMUTATION]->XferHalfCpltCallback = TIMEx_DMACommutationHalfCplt; +4660:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** +4661:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** /* Set the DMA error callback */ +4662:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** htim->hdma[TIM_DMA_ID_COMMUTATION]->XferErrorCallback = TIM_DMAError ; +4663:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** +4664:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** /* Enable the DMA channel */ +4665:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** if (HAL_DMA_Start_IT(htim->hdma[TIM_DMA_ID_COMMUTATION], (uint32_t)BurstBuffer, +4666:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** (uint32_t)&htim->Instance->DMAR, DataLength) != HAL_OK) +4667:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** { +4668:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** /* Return error status */ +4669:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** return HAL_ERROR; +4670:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** } +4671:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** break; +4672:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** } +4673:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** case TIM_DMA_TRIGGER: +4674:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** { +4675:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** /* Set the DMA trigger callbacks */ +4676:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** htim->hdma[TIM_DMA_ID_TRIGGER]->XferCpltCallback = TIM_DMATriggerCplt; +4677:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** htim->hdma[TIM_DMA_ID_TRIGGER]->XferHalfCpltCallback = TIM_DMATriggerHalfCplt; +4678:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** +4679:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** /* Set the DMA error callback */ +4680:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** htim->hdma[TIM_DMA_ID_TRIGGER]->XferErrorCallback = TIM_DMAError ; +4681:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** +4682:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** /* Enable the DMA channel */ +4683:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** if (HAL_DMA_Start_IT(htim->hdma[TIM_DMA_ID_TRIGGER], (uint32_t)BurstBuffer, +4684:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** (uint32_t)&htim->Instance->DMAR, DataLength) != HAL_OK) +4685:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** { +4686:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** /* Return error status */ +4687:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** return HAL_ERROR; +4688:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** } +4689:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** break; +4690:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** } +4691:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** default: +4692:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** status = HAL_ERROR; +4693:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** break; +4694:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** } +4695:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** +4696:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** if (status == HAL_OK) +4697:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** { +4698:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** /* Configure the DMA Burst Mode */ +4699:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** htim->Instance->DCR = (BurstBaseAddress | BurstLength); +4700:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** /* Enable the TIM DMA Request */ +4701:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** __HAL_TIM_ENABLE_DMA(htim, BurstRequestSrc); +4702:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** } +4703:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** +4704:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** /* Return function status */ +4705:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** return status; +4706:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** } + ARM GAS /tmp/ccMtK8ce.s page 84 + + +4707:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** +4708:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** /** +4709:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** * @brief Stops the TIM DMA Burst mode +4710:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** * @param htim TIM handle +4711:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** * @param BurstRequestSrc TIM DMA Request sources to disable +4712:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** * @retval HAL status +4713:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** */ +4714:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** HAL_StatusTypeDef HAL_TIM_DMABurst_WriteStop(TIM_HandleTypeDef *htim, uint32_t BurstRequestSrc) +4715:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** { +4716:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** HAL_StatusTypeDef status = HAL_OK; +4717:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** +4718:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** /* Check the parameters */ +4719:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** assert_param(IS_TIM_DMA_SOURCE(BurstRequestSrc)); +4720:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** +4721:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** /* Abort the DMA transfer (at least disable the DMA channel) */ +4722:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** switch (BurstRequestSrc) +4723:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** { +4724:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** case TIM_DMA_UPDATE: +4725:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** { +4726:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** (void)HAL_DMA_Abort_IT(htim->hdma[TIM_DMA_ID_UPDATE]); +4727:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** break; +4728:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** } +4729:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** case TIM_DMA_CC1: +4730:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** { +4731:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** (void)HAL_DMA_Abort_IT(htim->hdma[TIM_DMA_ID_CC1]); +4732:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** break; +4733:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** } +4734:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** case TIM_DMA_CC2: +4735:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** { +4736:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** (void)HAL_DMA_Abort_IT(htim->hdma[TIM_DMA_ID_CC2]); +4737:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** break; +4738:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** } +4739:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** case TIM_DMA_CC3: +4740:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** { +4741:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** (void)HAL_DMA_Abort_IT(htim->hdma[TIM_DMA_ID_CC3]); +4742:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** break; +4743:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** } +4744:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** case TIM_DMA_CC4: +4745:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** { +4746:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** (void)HAL_DMA_Abort_IT(htim->hdma[TIM_DMA_ID_CC4]); +4747:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** break; +4748:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** } +4749:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** case TIM_DMA_COM: +4750:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** { +4751:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** (void)HAL_DMA_Abort_IT(htim->hdma[TIM_DMA_ID_COMMUTATION]); +4752:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** break; +4753:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** } +4754:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** case TIM_DMA_TRIGGER: +4755:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** { +4756:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** (void)HAL_DMA_Abort_IT(htim->hdma[TIM_DMA_ID_TRIGGER]); +4757:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** break; +4758:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** } +4759:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** default: +4760:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** status = HAL_ERROR; +4761:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** break; +4762:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** } +4763:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + ARM GAS /tmp/ccMtK8ce.s page 85 + + +4764:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** if (status == HAL_OK) +4765:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** { +4766:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** /* Disable the TIM Update DMA request */ +4767:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** __HAL_TIM_DISABLE_DMA(htim, BurstRequestSrc); +4768:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** +4769:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** /* Change the DMA burst operation state */ +4770:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** htim->DMABurstState = HAL_DMA_BURST_STATE_READY; +4771:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** } +4772:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** +4773:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** /* Return function status */ +4774:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** return status; +4775:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** } +4776:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** +4777:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** /** +4778:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** * @brief Configure the DMA Burst to transfer Data from the TIM peripheral to the memory +4779:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** * @param htim TIM handle +4780:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** * @param BurstBaseAddress TIM Base address from where the DMA will start the Data read +4781:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** * This parameter can be one of the following values: +4782:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** * @arg TIM_DMABASE_CR1 +4783:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** * @arg TIM_DMABASE_CR2 +4784:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** * @arg TIM_DMABASE_SMCR +4785:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** * @arg TIM_DMABASE_DIER +4786:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** * @arg TIM_DMABASE_SR +4787:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** * @arg TIM_DMABASE_EGR +4788:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** * @arg TIM_DMABASE_CCMR1 +4789:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** * @arg TIM_DMABASE_CCMR2 +4790:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** * @arg TIM_DMABASE_CCER +4791:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** * @arg TIM_DMABASE_CNT +4792:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** * @arg TIM_DMABASE_PSC +4793:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** * @arg TIM_DMABASE_ARR +4794:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** * @arg TIM_DMABASE_RCR +4795:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** * @arg TIM_DMABASE_CCR1 +4796:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** * @arg TIM_DMABASE_CCR2 +4797:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** * @arg TIM_DMABASE_CCR3 +4798:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** * @arg TIM_DMABASE_CCR4 +4799:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** * @arg TIM_DMABASE_BDTR +4800:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** * @param BurstRequestSrc TIM DMA Request sources +4801:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** * This parameter can be one of the following values: +4802:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** * @arg TIM_DMA_UPDATE: TIM update Interrupt source +4803:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** * @arg TIM_DMA_CC1: TIM Capture Compare 1 DMA source +4804:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** * @arg TIM_DMA_CC2: TIM Capture Compare 2 DMA source +4805:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** * @arg TIM_DMA_CC3: TIM Capture Compare 3 DMA source +4806:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** * @arg TIM_DMA_CC4: TIM Capture Compare 4 DMA source +4807:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** * @arg TIM_DMA_COM: TIM Commutation DMA source +4808:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** * @arg TIM_DMA_TRIGGER: TIM Trigger DMA source +4809:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** * @param BurstBuffer The Buffer address. +4810:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** * @param BurstLength DMA Burst length. This parameter can be one value +4811:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** * between: TIM_DMABURSTLENGTH_1TRANSFER and TIM_DMABURSTLENGTH_18TRANSFERS. +4812:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** * @note This function should be used only when BurstLength is equal to DMA data transfer length +4813:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** * @retval HAL status +4814:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** */ +4815:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** HAL_StatusTypeDef HAL_TIM_DMABurst_ReadStart(TIM_HandleTypeDef *htim, uint32_t BurstBaseAddress, +4816:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** uint32_t BurstRequestSrc, uint32_t *BurstBuffer, uint +4817:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** { +4818:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** HAL_StatusTypeDef status; +4819:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** +4820:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** status = HAL_TIM_DMABurst_MultiReadStart(htim, BurstBaseAddress, BurstRequestSrc, BurstBuffer, Bu + ARM GAS /tmp/ccMtK8ce.s page 86 + + +4821:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** ((BurstLength) >> 8U) + 1U); +4822:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** +4823:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** +4824:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** return status; +4825:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** } +4826:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** +4827:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** /** +4828:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** * @brief Configure the DMA Burst to transfer Data from the TIM peripheral to the memory +4829:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** * @param htim TIM handle +4830:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** * @param BurstBaseAddress TIM Base address from where the DMA will start the Data read +4831:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** * This parameter can be one of the following values: +4832:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** * @arg TIM_DMABASE_CR1 +4833:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** * @arg TIM_DMABASE_CR2 +4834:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** * @arg TIM_DMABASE_SMCR +4835:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** * @arg TIM_DMABASE_DIER +4836:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** * @arg TIM_DMABASE_SR +4837:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** * @arg TIM_DMABASE_EGR +4838:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** * @arg TIM_DMABASE_CCMR1 +4839:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** * @arg TIM_DMABASE_CCMR2 +4840:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** * @arg TIM_DMABASE_CCER +4841:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** * @arg TIM_DMABASE_CNT +4842:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** * @arg TIM_DMABASE_PSC +4843:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** * @arg TIM_DMABASE_ARR +4844:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** * @arg TIM_DMABASE_RCR +4845:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** * @arg TIM_DMABASE_CCR1 +4846:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** * @arg TIM_DMABASE_CCR2 +4847:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** * @arg TIM_DMABASE_CCR3 +4848:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** * @arg TIM_DMABASE_CCR4 +4849:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** * @arg TIM_DMABASE_BDTR +4850:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** * @param BurstRequestSrc TIM DMA Request sources +4851:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** * This parameter can be one of the following values: +4852:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** * @arg TIM_DMA_UPDATE: TIM update Interrupt source +4853:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** * @arg TIM_DMA_CC1: TIM Capture Compare 1 DMA source +4854:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** * @arg TIM_DMA_CC2: TIM Capture Compare 2 DMA source +4855:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** * @arg TIM_DMA_CC3: TIM Capture Compare 3 DMA source +4856:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** * @arg TIM_DMA_CC4: TIM Capture Compare 4 DMA source +4857:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** * @arg TIM_DMA_COM: TIM Commutation DMA source +4858:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** * @arg TIM_DMA_TRIGGER: TIM Trigger DMA source +4859:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** * @param BurstBuffer The Buffer address. +4860:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** * @param BurstLength DMA Burst length. This parameter can be one value +4861:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** * between: TIM_DMABURSTLENGTH_1TRANSFER and TIM_DMABURSTLENGTH_18TRANSFERS. +4862:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** * @param DataLength Data length. This parameter can be one value +4863:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** * between 1 and 0xFFFF. +4864:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** * @retval HAL status +4865:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** */ +4866:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** HAL_StatusTypeDef HAL_TIM_DMABurst_MultiReadStart(TIM_HandleTypeDef *htim, uint32_t BurstBaseAddres +4867:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** uint32_t BurstRequestSrc, uint32_t *BurstBuffer, +4868:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** uint32_t BurstLength, uint32_t DataLength) +4869:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** { +4870:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** HAL_StatusTypeDef status = HAL_OK; +4871:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** +4872:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** /* Check the parameters */ +4873:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** assert_param(IS_TIM_DMABURST_INSTANCE(htim->Instance)); +4874:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** assert_param(IS_TIM_DMA_BASE(BurstBaseAddress)); +4875:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** assert_param(IS_TIM_DMA_SOURCE(BurstRequestSrc)); +4876:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** assert_param(IS_TIM_DMA_LENGTH(BurstLength)); +4877:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** assert_param(IS_TIM_DMA_DATA_LENGTH(DataLength)); + ARM GAS /tmp/ccMtK8ce.s page 87 + + +4878:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** +4879:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** if (htim->DMABurstState == HAL_DMA_BURST_STATE_BUSY) +4880:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** { +4881:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** return HAL_BUSY; +4882:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** } +4883:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** else if (htim->DMABurstState == HAL_DMA_BURST_STATE_READY) +4884:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** { +4885:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** if ((BurstBuffer == NULL) && (BurstLength > 0U)) +4886:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** { +4887:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** return HAL_ERROR; +4888:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** } +4889:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** else +4890:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** { +4891:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** htim->DMABurstState = HAL_DMA_BURST_STATE_BUSY; +4892:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** } +4893:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** } +4894:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** else +4895:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** { +4896:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** /* nothing to do */ +4897:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** } +4898:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** switch (BurstRequestSrc) +4899:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** { +4900:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** case TIM_DMA_UPDATE: +4901:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** { +4902:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** /* Set the DMA Period elapsed callbacks */ +4903:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** htim->hdma[TIM_DMA_ID_UPDATE]->XferCpltCallback = TIM_DMAPeriodElapsedCplt; +4904:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** htim->hdma[TIM_DMA_ID_UPDATE]->XferHalfCpltCallback = TIM_DMAPeriodElapsedHalfCplt; +4905:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** +4906:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** /* Set the DMA error callback */ +4907:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** htim->hdma[TIM_DMA_ID_UPDATE]->XferErrorCallback = TIM_DMAError ; +4908:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** +4909:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** /* Enable the DMA channel */ +4910:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** if (HAL_DMA_Start_IT(htim->hdma[TIM_DMA_ID_UPDATE], (uint32_t)&htim->Instance->DMAR, (uint32_ +4911:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** DataLength) != HAL_OK) +4912:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** { +4913:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** /* Return error status */ +4914:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** return HAL_ERROR; +4915:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** } +4916:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** break; +4917:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** } +4918:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** case TIM_DMA_CC1: +4919:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** { +4920:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** /* Set the DMA capture callbacks */ +4921:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** htim->hdma[TIM_DMA_ID_CC1]->XferCpltCallback = TIM_DMACaptureCplt; +4922:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** htim->hdma[TIM_DMA_ID_CC1]->XferHalfCpltCallback = TIM_DMACaptureHalfCplt; +4923:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** +4924:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** /* Set the DMA error callback */ +4925:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** htim->hdma[TIM_DMA_ID_CC1]->XferErrorCallback = TIM_DMAError ; +4926:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** +4927:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** /* Enable the DMA channel */ +4928:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** if (HAL_DMA_Start_IT(htim->hdma[TIM_DMA_ID_CC1], (uint32_t)&htim->Instance->DMAR, (uint32_t)B +4929:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** DataLength) != HAL_OK) +4930:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** { +4931:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** /* Return error status */ +4932:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** return HAL_ERROR; +4933:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** } +4934:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** break; + ARM GAS /tmp/ccMtK8ce.s page 88 + + +4935:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** } +4936:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** case TIM_DMA_CC2: +4937:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** { +4938:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** /* Set the DMA capture callbacks */ +4939:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** htim->hdma[TIM_DMA_ID_CC2]->XferCpltCallback = TIM_DMACaptureCplt; +4940:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** htim->hdma[TIM_DMA_ID_CC2]->XferHalfCpltCallback = TIM_DMACaptureHalfCplt; +4941:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** +4942:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** /* Set the DMA error callback */ +4943:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** htim->hdma[TIM_DMA_ID_CC2]->XferErrorCallback = TIM_DMAError ; +4944:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** +4945:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** /* Enable the DMA channel */ +4946:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** if (HAL_DMA_Start_IT(htim->hdma[TIM_DMA_ID_CC2], (uint32_t)&htim->Instance->DMAR, (uint32_t)B +4947:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** DataLength) != HAL_OK) +4948:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** { +4949:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** /* Return error status */ +4950:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** return HAL_ERROR; +4951:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** } +4952:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** break; +4953:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** } +4954:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** case TIM_DMA_CC3: +4955:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** { +4956:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** /* Set the DMA capture callbacks */ +4957:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** htim->hdma[TIM_DMA_ID_CC3]->XferCpltCallback = TIM_DMACaptureCplt; +4958:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** htim->hdma[TIM_DMA_ID_CC3]->XferHalfCpltCallback = TIM_DMACaptureHalfCplt; +4959:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** +4960:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** /* Set the DMA error callback */ +4961:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** htim->hdma[TIM_DMA_ID_CC3]->XferErrorCallback = TIM_DMAError ; +4962:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** +4963:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** /* Enable the DMA channel */ +4964:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** if (HAL_DMA_Start_IT(htim->hdma[TIM_DMA_ID_CC3], (uint32_t)&htim->Instance->DMAR, (uint32_t)B +4965:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** DataLength) != HAL_OK) +4966:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** { +4967:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** /* Return error status */ +4968:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** return HAL_ERROR; +4969:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** } +4970:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** break; +4971:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** } +4972:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** case TIM_DMA_CC4: +4973:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** { +4974:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** /* Set the DMA capture callbacks */ +4975:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** htim->hdma[TIM_DMA_ID_CC4]->XferCpltCallback = TIM_DMACaptureCplt; +4976:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** htim->hdma[TIM_DMA_ID_CC4]->XferHalfCpltCallback = TIM_DMACaptureHalfCplt; +4977:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** +4978:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** /* Set the DMA error callback */ +4979:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** htim->hdma[TIM_DMA_ID_CC4]->XferErrorCallback = TIM_DMAError ; +4980:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** +4981:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** /* Enable the DMA channel */ +4982:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** if (HAL_DMA_Start_IT(htim->hdma[TIM_DMA_ID_CC4], (uint32_t)&htim->Instance->DMAR, (uint32_t)B +4983:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** DataLength) != HAL_OK) +4984:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** { +4985:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** /* Return error status */ +4986:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** return HAL_ERROR; +4987:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** } +4988:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** break; +4989:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** } +4990:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** case TIM_DMA_COM: +4991:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** { + ARM GAS /tmp/ccMtK8ce.s page 89 + + +4992:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** /* Set the DMA commutation callbacks */ +4993:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** htim->hdma[TIM_DMA_ID_COMMUTATION]->XferCpltCallback = TIMEx_DMACommutationCplt; +4994:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** htim->hdma[TIM_DMA_ID_COMMUTATION]->XferHalfCpltCallback = TIMEx_DMACommutationHalfCplt; +4995:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** +4996:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** /* Set the DMA error callback */ +4997:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** htim->hdma[TIM_DMA_ID_COMMUTATION]->XferErrorCallback = TIM_DMAError ; +4998:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** +4999:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** /* Enable the DMA channel */ +5000:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** if (HAL_DMA_Start_IT(htim->hdma[TIM_DMA_ID_COMMUTATION], (uint32_t)&htim->Instance->DMAR, (ui +5001:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** DataLength) != HAL_OK) +5002:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** { +5003:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** /* Return error status */ +5004:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** return HAL_ERROR; +5005:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** } +5006:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** break; +5007:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** } +5008:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** case TIM_DMA_TRIGGER: +5009:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** { +5010:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** /* Set the DMA trigger callbacks */ +5011:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** htim->hdma[TIM_DMA_ID_TRIGGER]->XferCpltCallback = TIM_DMATriggerCplt; +5012:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** htim->hdma[TIM_DMA_ID_TRIGGER]->XferHalfCpltCallback = TIM_DMATriggerHalfCplt; +5013:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** +5014:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** /* Set the DMA error callback */ +5015:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** htim->hdma[TIM_DMA_ID_TRIGGER]->XferErrorCallback = TIM_DMAError ; +5016:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** +5017:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** /* Enable the DMA channel */ +5018:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** if (HAL_DMA_Start_IT(htim->hdma[TIM_DMA_ID_TRIGGER], (uint32_t)&htim->Instance->DMAR, (uint32 +5019:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** DataLength) != HAL_OK) +5020:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** { +5021:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** /* Return error status */ +5022:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** return HAL_ERROR; +5023:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** } +5024:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** break; +5025:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** } +5026:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** default: +5027:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** status = HAL_ERROR; +5028:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** break; +5029:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** } +5030:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** +5031:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** if (status == HAL_OK) +5032:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** { +5033:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** /* Configure the DMA Burst Mode */ +5034:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** htim->Instance->DCR = (BurstBaseAddress | BurstLength); +5035:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** +5036:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** /* Enable the TIM DMA Request */ +5037:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** __HAL_TIM_ENABLE_DMA(htim, BurstRequestSrc); +5038:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** } +5039:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** +5040:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** /* Return function status */ +5041:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** return status; +5042:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** } +5043:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** +5044:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** /** +5045:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** * @brief Stop the DMA burst reading +5046:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** * @param htim TIM handle +5047:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** * @param BurstRequestSrc TIM DMA Request sources to disable. +5048:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** * @retval HAL status + ARM GAS /tmp/ccMtK8ce.s page 90 + + +5049:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** */ +5050:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** HAL_StatusTypeDef HAL_TIM_DMABurst_ReadStop(TIM_HandleTypeDef *htim, uint32_t BurstRequestSrc) +5051:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** { +5052:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** HAL_StatusTypeDef status = HAL_OK; +5053:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** +5054:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** /* Check the parameters */ +5055:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** assert_param(IS_TIM_DMA_SOURCE(BurstRequestSrc)); +5056:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** +5057:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** /* Abort the DMA transfer (at least disable the DMA channel) */ +5058:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** switch (BurstRequestSrc) +5059:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** { +5060:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** case TIM_DMA_UPDATE: +5061:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** { +5062:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** (void)HAL_DMA_Abort_IT(htim->hdma[TIM_DMA_ID_UPDATE]); +5063:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** break; +5064:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** } +5065:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** case TIM_DMA_CC1: +5066:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** { +5067:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** (void)HAL_DMA_Abort_IT(htim->hdma[TIM_DMA_ID_CC1]); +5068:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** break; +5069:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** } +5070:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** case TIM_DMA_CC2: +5071:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** { +5072:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** (void)HAL_DMA_Abort_IT(htim->hdma[TIM_DMA_ID_CC2]); +5073:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** break; +5074:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** } +5075:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** case TIM_DMA_CC3: +5076:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** { +5077:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** (void)HAL_DMA_Abort_IT(htim->hdma[TIM_DMA_ID_CC3]); +5078:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** break; +5079:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** } +5080:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** case TIM_DMA_CC4: +5081:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** { +5082:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** (void)HAL_DMA_Abort_IT(htim->hdma[TIM_DMA_ID_CC4]); +5083:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** break; +5084:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** } +5085:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** case TIM_DMA_COM: +5086:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** { +5087:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** (void)HAL_DMA_Abort_IT(htim->hdma[TIM_DMA_ID_COMMUTATION]); +5088:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** break; +5089:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** } +5090:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** case TIM_DMA_TRIGGER: +5091:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** { +5092:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** (void)HAL_DMA_Abort_IT(htim->hdma[TIM_DMA_ID_TRIGGER]); +5093:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** break; +5094:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** } +5095:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** default: +5096:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** status = HAL_ERROR; +5097:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** break; +5098:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** } +5099:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** +5100:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** if (status == HAL_OK) +5101:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** { +5102:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** /* Disable the TIM Update DMA request */ +5103:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** __HAL_TIM_DISABLE_DMA(htim, BurstRequestSrc); +5104:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** +5105:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** /* Change the DMA burst operation state */ + ARM GAS /tmp/ccMtK8ce.s page 91 + + +5106:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** htim->DMABurstState = HAL_DMA_BURST_STATE_READY; +5107:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** } +5108:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** +5109:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** /* Return function status */ +5110:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** return status; +5111:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** } +5112:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** +5113:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** /** +5114:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** * @brief Generate a software event +5115:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** * @param htim TIM handle +5116:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** * @param EventSource specifies the event source. +5117:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** * This parameter can be one of the following values: +5118:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** * @arg TIM_EVENTSOURCE_UPDATE: Timer update Event source +5119:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** * @arg TIM_EVENTSOURCE_CC1: Timer Capture Compare 1 Event source +5120:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** * @arg TIM_EVENTSOURCE_CC2: Timer Capture Compare 2 Event source +5121:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** * @arg TIM_EVENTSOURCE_CC3: Timer Capture Compare 3 Event source +5122:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** * @arg TIM_EVENTSOURCE_CC4: Timer Capture Compare 4 Event source +5123:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** * @arg TIM_EVENTSOURCE_COM: Timer COM event source +5124:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** * @arg TIM_EVENTSOURCE_TRIGGER: Timer Trigger Event source +5125:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** * @arg TIM_EVENTSOURCE_BREAK: Timer Break event source +5126:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** * @note Basic timers can only generate an update event. +5127:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** * @note TIM_EVENTSOURCE_COM is relevant only with advanced timer instances. +5128:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** * @note TIM_EVENTSOURCE_BREAK are relevant only for timer instances +5129:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** * supporting a break input. +5130:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** * @retval HAL status +5131:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** */ +5132:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** +5133:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** HAL_StatusTypeDef HAL_TIM_GenerateEvent(TIM_HandleTypeDef *htim, uint32_t EventSource) +5134:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** { +5135:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** /* Check the parameters */ +5136:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** assert_param(IS_TIM_INSTANCE(htim->Instance)); +5137:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** assert_param(IS_TIM_EVENT_SOURCE(EventSource)); +5138:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** +5139:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** /* Process Locked */ +5140:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** __HAL_LOCK(htim); +5141:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** +5142:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** /* Change the TIM state */ +5143:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** htim->State = HAL_TIM_STATE_BUSY; +5144:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** +5145:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** /* Set the event sources */ +5146:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** htim->Instance->EGR = EventSource; +5147:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** +5148:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** /* Change the TIM state */ +5149:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** htim->State = HAL_TIM_STATE_READY; +5150:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** +5151:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** __HAL_UNLOCK(htim); +5152:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** +5153:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** /* Return function status */ +5154:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** return HAL_OK; +5155:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** } +5156:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** +5157:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** /** +5158:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** * @brief Configures the OCRef clear feature +5159:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** * @param htim TIM handle +5160:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** * @param sClearInputConfig pointer to a TIM_ClearInputConfigTypeDef structure that +5161:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** * contains the OCREF clear feature and parameters for the TIM peripheral. +5162:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** * @param Channel specifies the TIM Channel + ARM GAS /tmp/ccMtK8ce.s page 92 + + +5163:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** * This parameter can be one of the following values: +5164:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** * @arg TIM_CHANNEL_1: TIM Channel 1 +5165:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** * @arg TIM_CHANNEL_2: TIM Channel 2 +5166:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** * @arg TIM_CHANNEL_3: TIM Channel 3 +5167:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** * @arg TIM_CHANNEL_4: TIM Channel 4 +5168:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** * @retval HAL status +5169:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** */ +5170:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** HAL_StatusTypeDef HAL_TIM_ConfigOCrefClear(TIM_HandleTypeDef *htim, +5171:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** const TIM_ClearInputConfigTypeDef *sClearInputConfig, +5172:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** uint32_t Channel) +5173:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** { +5174:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** HAL_StatusTypeDef status = HAL_OK; +5175:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** +5176:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** /* Check the parameters */ +5177:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** assert_param(IS_TIM_OCXREF_CLEAR_INSTANCE(htim->Instance)); +5178:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** assert_param(IS_TIM_CLEARINPUT_SOURCE(sClearInputConfig->ClearInputSource)); +5179:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** +5180:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** /* Process Locked */ +5181:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** __HAL_LOCK(htim); +5182:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** +5183:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** htim->State = HAL_TIM_STATE_BUSY; +5184:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** +5185:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** switch (sClearInputConfig->ClearInputSource) +5186:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** { +5187:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** case TIM_CLEARINPUTSOURCE_NONE: +5188:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** { +5189:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** /* Clear the OCREF clear selection bit and the the ETR Bits */ +5190:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** CLEAR_BIT(htim->Instance->SMCR, (TIM_SMCR_OCCS | TIM_SMCR_ETF | TIM_SMCR_ETPS | TIM_SMCR_ECE +5191:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** break; +5192:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** } +5193:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** case TIM_CLEARINPUTSOURCE_OCREFCLR: +5194:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** { +5195:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** /* Clear the OCREF clear selection bit */ +5196:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** CLEAR_BIT(htim->Instance->SMCR, TIM_SMCR_OCCS); +5197:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** break; +5198:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** } +5199:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** +5200:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** case TIM_CLEARINPUTSOURCE_ETR: +5201:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** { +5202:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** /* Check the parameters */ +5203:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** assert_param(IS_TIM_CLEARINPUT_POLARITY(sClearInputConfig->ClearInputPolarity)); +5204:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** assert_param(IS_TIM_CLEARINPUT_PRESCALER(sClearInputConfig->ClearInputPrescaler)); +5205:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** assert_param(IS_TIM_CLEARINPUT_FILTER(sClearInputConfig->ClearInputFilter)); +5206:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** +5207:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** /* When OCRef clear feature is used with ETR source, ETR prescaler must be off */ +5208:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** if (sClearInputConfig->ClearInputPrescaler != TIM_CLEARINPUTPRESCALER_DIV1) +5209:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** { +5210:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** htim->State = HAL_TIM_STATE_READY; +5211:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** __HAL_UNLOCK(htim); +5212:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** return HAL_ERROR; +5213:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** } +5214:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** +5215:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** TIM_ETR_SetConfig(htim->Instance, +5216:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** sClearInputConfig->ClearInputPrescaler, +5217:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** sClearInputConfig->ClearInputPolarity, +5218:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** sClearInputConfig->ClearInputFilter); +5219:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + ARM GAS /tmp/ccMtK8ce.s page 93 + + +5220:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** /* Set the OCREF clear selection bit */ +5221:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** SET_BIT(htim->Instance->SMCR, TIM_SMCR_OCCS); +5222:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** break; +5223:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** } +5224:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** +5225:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** default: +5226:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** status = HAL_ERROR; +5227:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** break; +5228:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** } +5229:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** +5230:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** if (status == HAL_OK) +5231:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** { +5232:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** switch (Channel) +5233:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** { +5234:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** case TIM_CHANNEL_1: +5235:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** { +5236:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** if (sClearInputConfig->ClearInputState != (uint32_t)DISABLE) +5237:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** { +5238:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** /* Enable the OCREF clear feature for Channel 1 */ +5239:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** SET_BIT(htim->Instance->CCMR1, TIM_CCMR1_OC1CE); +5240:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** } +5241:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** else +5242:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** { +5243:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** /* Disable the OCREF clear feature for Channel 1 */ +5244:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** CLEAR_BIT(htim->Instance->CCMR1, TIM_CCMR1_OC1CE); +5245:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** } +5246:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** break; +5247:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** } +5248:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** case TIM_CHANNEL_2: +5249:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** { +5250:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** if (sClearInputConfig->ClearInputState != (uint32_t)DISABLE) +5251:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** { +5252:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** /* Enable the OCREF clear feature for Channel 2 */ +5253:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** SET_BIT(htim->Instance->CCMR1, TIM_CCMR1_OC2CE); +5254:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** } +5255:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** else +5256:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** { +5257:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** /* Disable the OCREF clear feature for Channel 2 */ +5258:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** CLEAR_BIT(htim->Instance->CCMR1, TIM_CCMR1_OC2CE); +5259:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** } +5260:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** break; +5261:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** } +5262:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** case TIM_CHANNEL_3: +5263:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** { +5264:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** if (sClearInputConfig->ClearInputState != (uint32_t)DISABLE) +5265:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** { +5266:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** /* Enable the OCREF clear feature for Channel 3 */ +5267:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** SET_BIT(htim->Instance->CCMR2, TIM_CCMR2_OC3CE); +5268:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** } +5269:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** else +5270:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** { +5271:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** /* Disable the OCREF clear feature for Channel 3 */ +5272:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** CLEAR_BIT(htim->Instance->CCMR2, TIM_CCMR2_OC3CE); +5273:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** } +5274:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** break; +5275:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** } +5276:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** case TIM_CHANNEL_4: + ARM GAS /tmp/ccMtK8ce.s page 94 + + +5277:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** { +5278:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** if (sClearInputConfig->ClearInputState != (uint32_t)DISABLE) +5279:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** { +5280:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** /* Enable the OCREF clear feature for Channel 4 */ +5281:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** SET_BIT(htim->Instance->CCMR2, TIM_CCMR2_OC4CE); +5282:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** } +5283:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** else +5284:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** { +5285:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** /* Disable the OCREF clear feature for Channel 4 */ +5286:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** CLEAR_BIT(htim->Instance->CCMR2, TIM_CCMR2_OC4CE); +5287:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** } +5288:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** break; +5289:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** } +5290:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** default: +5291:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** break; +5292:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** } +5293:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** } +5294:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** +5295:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** htim->State = HAL_TIM_STATE_READY; +5296:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** +5297:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** __HAL_UNLOCK(htim); +5298:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** +5299:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** return status; +5300:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** } +5301:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** +5302:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** /** +5303:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** * @brief Configures the clock source to be used +5304:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** * @param htim TIM handle +5305:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** * @param sClockSourceConfig pointer to a TIM_ClockConfigTypeDef structure that +5306:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** * contains the clock source information for the TIM peripheral. +5307:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** * @retval HAL status +5308:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** */ +5309:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** HAL_StatusTypeDef HAL_TIM_ConfigClockSource(TIM_HandleTypeDef *htim, const TIM_ClockConfigTypeDef * +5310:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** { +5311:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** HAL_StatusTypeDef status = HAL_OK; +5312:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** uint32_t tmpsmcr; +5313:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** +5314:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** /* Process Locked */ +5315:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** __HAL_LOCK(htim); +5316:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** +5317:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** htim->State = HAL_TIM_STATE_BUSY; +5318:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** +5319:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** /* Check the parameters */ +5320:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** assert_param(IS_TIM_CLOCKSOURCE(sClockSourceConfig->ClockSource)); +5321:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** +5322:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** /* Reset the SMS, TS, ECE, ETPS and ETRF bits */ +5323:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** tmpsmcr = htim->Instance->SMCR; +5324:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** tmpsmcr &= ~(TIM_SMCR_SMS | TIM_SMCR_TS); +5325:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** tmpsmcr &= ~(TIM_SMCR_ETF | TIM_SMCR_ETPS | TIM_SMCR_ECE | TIM_SMCR_ETP); +5326:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** htim->Instance->SMCR = tmpsmcr; +5327:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** +5328:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** switch (sClockSourceConfig->ClockSource) +5329:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** { +5330:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** case TIM_CLOCKSOURCE_INTERNAL: +5331:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** { +5332:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** assert_param(IS_TIM_INSTANCE(htim->Instance)); +5333:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** break; + ARM GAS /tmp/ccMtK8ce.s page 95 + + +5334:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** } +5335:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** +5336:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** case TIM_CLOCKSOURCE_ETRMODE1: +5337:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** { +5338:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** /* Check whether or not the timer instance supports external trigger input mode 1 (ETRF)*/ +5339:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** assert_param(IS_TIM_CLOCKSOURCE_ETRMODE1_INSTANCE(htim->Instance)); +5340:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** +5341:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** /* Check ETR input conditioning related parameters */ +5342:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** assert_param(IS_TIM_CLOCKPRESCALER(sClockSourceConfig->ClockPrescaler)); +5343:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** assert_param(IS_TIM_CLOCKPOLARITY(sClockSourceConfig->ClockPolarity)); +5344:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** assert_param(IS_TIM_CLOCKFILTER(sClockSourceConfig->ClockFilter)); +5345:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** +5346:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** /* Configure the ETR Clock source */ +5347:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** TIM_ETR_SetConfig(htim->Instance, +5348:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** sClockSourceConfig->ClockPrescaler, +5349:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** sClockSourceConfig->ClockPolarity, +5350:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** sClockSourceConfig->ClockFilter); +5351:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** +5352:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** /* Select the External clock mode1 and the ETRF trigger */ +5353:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** tmpsmcr = htim->Instance->SMCR; +5354:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** tmpsmcr |= (TIM_SLAVEMODE_EXTERNAL1 | TIM_CLOCKSOURCE_ETRMODE1); +5355:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** /* Write to TIMx SMCR */ +5356:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** htim->Instance->SMCR = tmpsmcr; +5357:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** break; +5358:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** } +5359:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** +5360:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** case TIM_CLOCKSOURCE_ETRMODE2: +5361:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** { +5362:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** /* Check whether or not the timer instance supports external trigger input mode 2 (ETRF)*/ +5363:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** assert_param(IS_TIM_CLOCKSOURCE_ETRMODE2_INSTANCE(htim->Instance)); +5364:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** +5365:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** /* Check ETR input conditioning related parameters */ +5366:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** assert_param(IS_TIM_CLOCKPRESCALER(sClockSourceConfig->ClockPrescaler)); +5367:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** assert_param(IS_TIM_CLOCKPOLARITY(sClockSourceConfig->ClockPolarity)); +5368:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** assert_param(IS_TIM_CLOCKFILTER(sClockSourceConfig->ClockFilter)); +5369:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** +5370:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** /* Configure the ETR Clock source */ +5371:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** TIM_ETR_SetConfig(htim->Instance, +5372:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** sClockSourceConfig->ClockPrescaler, +5373:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** sClockSourceConfig->ClockPolarity, +5374:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** sClockSourceConfig->ClockFilter); +5375:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** /* Enable the External clock mode2 */ +5376:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** htim->Instance->SMCR |= TIM_SMCR_ECE; +5377:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** break; +5378:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** } +5379:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** +5380:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** case TIM_CLOCKSOURCE_TI1: +5381:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** { +5382:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** /* Check whether or not the timer instance supports external clock mode 1 */ +5383:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** assert_param(IS_TIM_CLOCKSOURCE_TIX_INSTANCE(htim->Instance)); +5384:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** +5385:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** /* Check TI1 input conditioning related parameters */ +5386:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** assert_param(IS_TIM_CLOCKPOLARITY(sClockSourceConfig->ClockPolarity)); +5387:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** assert_param(IS_TIM_CLOCKFILTER(sClockSourceConfig->ClockFilter)); +5388:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** +5389:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** TIM_TI1_ConfigInputStage(htim->Instance, +5390:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** sClockSourceConfig->ClockPolarity, + ARM GAS /tmp/ccMtK8ce.s page 96 + + +5391:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** sClockSourceConfig->ClockFilter); +5392:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** TIM_ITRx_SetConfig(htim->Instance, TIM_CLOCKSOURCE_TI1); +5393:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** break; +5394:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** } +5395:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** +5396:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** case TIM_CLOCKSOURCE_TI2: +5397:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** { +5398:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** /* Check whether or not the timer instance supports external clock mode 1 (ETRF)*/ +5399:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** assert_param(IS_TIM_CLOCKSOURCE_TIX_INSTANCE(htim->Instance)); +5400:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** +5401:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** /* Check TI2 input conditioning related parameters */ +5402:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** assert_param(IS_TIM_CLOCKPOLARITY(sClockSourceConfig->ClockPolarity)); +5403:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** assert_param(IS_TIM_CLOCKFILTER(sClockSourceConfig->ClockFilter)); +5404:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** +5405:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** TIM_TI2_ConfigInputStage(htim->Instance, +5406:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** sClockSourceConfig->ClockPolarity, +5407:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** sClockSourceConfig->ClockFilter); +5408:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** TIM_ITRx_SetConfig(htim->Instance, TIM_CLOCKSOURCE_TI2); +5409:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** break; +5410:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** } +5411:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** +5412:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** case TIM_CLOCKSOURCE_TI1ED: +5413:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** { +5414:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** /* Check whether or not the timer instance supports external clock mode 1 */ +5415:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** assert_param(IS_TIM_CLOCKSOURCE_TIX_INSTANCE(htim->Instance)); +5416:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** +5417:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** /* Check TI1 input conditioning related parameters */ +5418:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** assert_param(IS_TIM_CLOCKPOLARITY(sClockSourceConfig->ClockPolarity)); +5419:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** assert_param(IS_TIM_CLOCKFILTER(sClockSourceConfig->ClockFilter)); +5420:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** +5421:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** TIM_TI1_ConfigInputStage(htim->Instance, +5422:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** sClockSourceConfig->ClockPolarity, +5423:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** sClockSourceConfig->ClockFilter); +5424:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** TIM_ITRx_SetConfig(htim->Instance, TIM_CLOCKSOURCE_TI1ED); +5425:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** break; +5426:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** } +5427:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** +5428:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** case TIM_CLOCKSOURCE_ITR0: +5429:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** case TIM_CLOCKSOURCE_ITR1: +5430:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** case TIM_CLOCKSOURCE_ITR2: +5431:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** case TIM_CLOCKSOURCE_ITR3: +5432:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** { +5433:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** /* Check whether or not the timer instance supports internal trigger input */ +5434:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** assert_param(IS_TIM_CLOCKSOURCE_ITRX_INSTANCE(htim->Instance)); +5435:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** +5436:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** TIM_ITRx_SetConfig(htim->Instance, sClockSourceConfig->ClockSource); +5437:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** break; +5438:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** } +5439:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** +5440:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** default: +5441:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** status = HAL_ERROR; +5442:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** break; +5443:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** } +5444:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** htim->State = HAL_TIM_STATE_READY; +5445:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** +5446:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** __HAL_UNLOCK(htim); +5447:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + ARM GAS /tmp/ccMtK8ce.s page 97 + + +5448:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** return status; +5449:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** } +5450:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** +5451:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** /** +5452:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** * @brief Selects the signal connected to the TI1 input: direct from CH1_input +5453:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** * or a XOR combination between CH1_input, CH2_input & CH3_input +5454:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** * @param htim TIM handle. +5455:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** * @param TI1_Selection Indicate whether or not channel 1 is connected to the +5456:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** * output of a XOR gate. +5457:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** * This parameter can be one of the following values: +5458:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** * @arg TIM_TI1SELECTION_CH1: The TIMx_CH1 pin is connected to TI1 input +5459:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** * @arg TIM_TI1SELECTION_XORCOMBINATION: The TIMx_CH1, CH2 and CH3 +5460:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** * pins are connected to the TI1 input (XOR combination) +5461:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** * @retval HAL status +5462:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** */ +5463:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** HAL_StatusTypeDef HAL_TIM_ConfigTI1Input(TIM_HandleTypeDef *htim, uint32_t TI1_Selection) +5464:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** { +5465:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** uint32_t tmpcr2; +5466:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** +5467:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** /* Check the parameters */ +5468:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** assert_param(IS_TIM_XOR_INSTANCE(htim->Instance)); +5469:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** assert_param(IS_TIM_TI1SELECTION(TI1_Selection)); +5470:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** +5471:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** /* Get the TIMx CR2 register value */ +5472:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** tmpcr2 = htim->Instance->CR2; +5473:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** +5474:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** /* Reset the TI1 selection */ +5475:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** tmpcr2 &= ~TIM_CR2_TI1S; +5476:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** +5477:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** /* Set the TI1 selection */ +5478:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** tmpcr2 |= TI1_Selection; +5479:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** +5480:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** /* Write to TIMxCR2 */ +5481:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** htim->Instance->CR2 = tmpcr2; +5482:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** +5483:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** return HAL_OK; +5484:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** } +5485:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** +5486:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** /** +5487:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** * @brief Configures the TIM in Slave mode +5488:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** * @param htim TIM handle. +5489:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** * @param sSlaveConfig pointer to a TIM_SlaveConfigTypeDef structure that +5490:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** * contains the selected trigger (internal trigger input, filtered +5491:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** * timer input or external trigger input) and the Slave mode +5492:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** * (Disable, Reset, Gated, Trigger, External clock mode 1). +5493:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** * @retval HAL status +5494:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** */ +5495:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** HAL_StatusTypeDef HAL_TIM_SlaveConfigSynchro(TIM_HandleTypeDef *htim, const TIM_SlaveConfigTypeDef +5496:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** { +5497:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** /* Check the parameters */ +5498:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** assert_param(IS_TIM_SLAVE_INSTANCE(htim->Instance)); +5499:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** assert_param(IS_TIM_SLAVE_MODE(sSlaveConfig->SlaveMode)); +5500:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** assert_param(IS_TIM_TRIGGER_SELECTION(sSlaveConfig->InputTrigger)); +5501:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** +5502:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** __HAL_LOCK(htim); +5503:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** +5504:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** htim->State = HAL_TIM_STATE_BUSY; + ARM GAS /tmp/ccMtK8ce.s page 98 + + +5505:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** +5506:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** if (TIM_SlaveTimer_SetConfig(htim, sSlaveConfig) != HAL_OK) +5507:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** { +5508:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** htim->State = HAL_TIM_STATE_READY; +5509:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** __HAL_UNLOCK(htim); +5510:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** return HAL_ERROR; +5511:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** } +5512:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** +5513:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** /* Disable Trigger Interrupt */ +5514:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** __HAL_TIM_DISABLE_IT(htim, TIM_IT_TRIGGER); +5515:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** +5516:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** /* Disable Trigger DMA request */ +5517:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** __HAL_TIM_DISABLE_DMA(htim, TIM_DMA_TRIGGER); +5518:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** +5519:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** htim->State = HAL_TIM_STATE_READY; +5520:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** +5521:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** __HAL_UNLOCK(htim); +5522:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** +5523:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** return HAL_OK; +5524:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** } +5525:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** +5526:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** /** +5527:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** * @brief Configures the TIM in Slave mode in interrupt mode +5528:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** * @param htim TIM handle. +5529:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** * @param sSlaveConfig pointer to a TIM_SlaveConfigTypeDef structure that +5530:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** * contains the selected trigger (internal trigger input, filtered +5531:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** * timer input or external trigger input) and the Slave mode +5532:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** * (Disable, Reset, Gated, Trigger, External clock mode 1). +5533:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** * @retval HAL status +5534:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** */ +5535:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** HAL_StatusTypeDef HAL_TIM_SlaveConfigSynchro_IT(TIM_HandleTypeDef *htim, +5536:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** const TIM_SlaveConfigTypeDef *sSlaveConfig) +5537:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** { +5538:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** /* Check the parameters */ +5539:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** assert_param(IS_TIM_SLAVE_INSTANCE(htim->Instance)); +5540:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** assert_param(IS_TIM_SLAVE_MODE(sSlaveConfig->SlaveMode)); +5541:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** assert_param(IS_TIM_TRIGGER_SELECTION(sSlaveConfig->InputTrigger)); +5542:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** +5543:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** __HAL_LOCK(htim); +5544:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** +5545:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** htim->State = HAL_TIM_STATE_BUSY; +5546:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** +5547:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** if (TIM_SlaveTimer_SetConfig(htim, sSlaveConfig) != HAL_OK) +5548:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** { +5549:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** htim->State = HAL_TIM_STATE_READY; +5550:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** __HAL_UNLOCK(htim); +5551:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** return HAL_ERROR; +5552:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** } +5553:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** +5554:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** /* Enable Trigger Interrupt */ +5555:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** __HAL_TIM_ENABLE_IT(htim, TIM_IT_TRIGGER); +5556:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** +5557:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** /* Disable Trigger DMA request */ +5558:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** __HAL_TIM_DISABLE_DMA(htim, TIM_DMA_TRIGGER); +5559:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** +5560:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** htim->State = HAL_TIM_STATE_READY; +5561:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + ARM GAS /tmp/ccMtK8ce.s page 99 + + +5562:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** __HAL_UNLOCK(htim); +5563:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** +5564:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** return HAL_OK; +5565:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** } +5566:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** +5567:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** /** +5568:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** * @brief Read the captured value from Capture Compare unit +5569:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** * @param htim TIM handle. +5570:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** * @param Channel TIM Channels to be enabled +5571:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** * This parameter can be one of the following values: +5572:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** * @arg TIM_CHANNEL_1: TIM Channel 1 selected +5573:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** * @arg TIM_CHANNEL_2: TIM Channel 2 selected +5574:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** * @arg TIM_CHANNEL_3: TIM Channel 3 selected +5575:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** * @arg TIM_CHANNEL_4: TIM Channel 4 selected +5576:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** * @retval Captured value +5577:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** */ +5578:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** uint32_t HAL_TIM_ReadCapturedValue(const TIM_HandleTypeDef *htim, uint32_t Channel) +5579:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** { +5580:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** uint32_t tmpreg = 0U; +5581:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** +5582:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** switch (Channel) +5583:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** { +5584:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** case TIM_CHANNEL_1: +5585:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** { +5586:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** /* Check the parameters */ +5587:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** assert_param(IS_TIM_CC1_INSTANCE(htim->Instance)); +5588:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** +5589:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** /* Return the capture 1 value */ +5590:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** tmpreg = htim->Instance->CCR1; +5591:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** +5592:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** break; +5593:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** } +5594:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** case TIM_CHANNEL_2: +5595:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** { +5596:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** /* Check the parameters */ +5597:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** assert_param(IS_TIM_CC2_INSTANCE(htim->Instance)); +5598:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** +5599:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** /* Return the capture 2 value */ +5600:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** tmpreg = htim->Instance->CCR2; +5601:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** +5602:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** break; +5603:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** } +5604:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** +5605:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** case TIM_CHANNEL_3: +5606:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** { +5607:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** /* Check the parameters */ +5608:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** assert_param(IS_TIM_CC3_INSTANCE(htim->Instance)); +5609:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** +5610:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** /* Return the capture 3 value */ +5611:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** tmpreg = htim->Instance->CCR3; +5612:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** +5613:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** break; +5614:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** } +5615:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** +5616:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** case TIM_CHANNEL_4: +5617:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** { +5618:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** /* Check the parameters */ + ARM GAS /tmp/ccMtK8ce.s page 100 + + +5619:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** assert_param(IS_TIM_CC4_INSTANCE(htim->Instance)); +5620:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** +5621:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** /* Return the capture 4 value */ +5622:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** tmpreg = htim->Instance->CCR4; +5623:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** +5624:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** break; +5625:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** } +5626:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** +5627:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** default: +5628:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** break; +5629:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** } +5630:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** +5631:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** return tmpreg; +5632:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** } +5633:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** +5634:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** /** +5635:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** * @} +5636:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** */ +5637:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** +5638:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** /** @defgroup TIM_Exported_Functions_Group9 TIM Callbacks functions +5639:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** * @brief TIM Callbacks functions +5640:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** * +5641:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** @verbatim +5642:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** ============================================================================== +5643:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** ##### TIM Callbacks functions ##### +5644:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** ============================================================================== +5645:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** [..] +5646:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** This section provides TIM callback functions: +5647:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** (+) TIM Period elapsed callback +5648:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** (+) TIM Output Compare callback +5649:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** (+) TIM Input capture callback +5650:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** (+) TIM Trigger callback +5651:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** (+) TIM Error callback +5652:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** +5653:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** @endverbatim +5654:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** * @{ +5655:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** */ +5656:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** +5657:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** /** +5658:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** * @brief Period elapsed callback in non-blocking mode +5659:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** * @param htim TIM handle +5660:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** * @retval None +5661:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** */ +5662:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** __weak void HAL_TIM_PeriodElapsedCallback(TIM_HandleTypeDef *htim) +5663:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** { +5664:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** /* Prevent unused argument(s) compilation warning */ +5665:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** UNUSED(htim); +5666:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** +5667:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** /* NOTE : This function should not be modified, when the callback is needed, +5668:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** the HAL_TIM_PeriodElapsedCallback could be implemented in the user file +5669:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** */ +5670:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** } +5671:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** +5672:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** /** +5673:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** * @brief Period elapsed half complete callback in non-blocking mode +5674:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** * @param htim TIM handle +5675:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** * @retval None + ARM GAS /tmp/ccMtK8ce.s page 101 + + +5676:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** */ +5677:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** __weak void HAL_TIM_PeriodElapsedHalfCpltCallback(TIM_HandleTypeDef *htim) +5678:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** { +5679:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** /* Prevent unused argument(s) compilation warning */ +5680:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** UNUSED(htim); +5681:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** +5682:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** /* NOTE : This function should not be modified, when the callback is needed, +5683:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** the HAL_TIM_PeriodElapsedHalfCpltCallback could be implemented in the user file +5684:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** */ +5685:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** } +5686:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** +5687:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** /** +5688:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** * @brief Output Compare callback in non-blocking mode +5689:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** * @param htim TIM OC handle +5690:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** * @retval None +5691:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** */ +5692:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** __weak void HAL_TIM_OC_DelayElapsedCallback(TIM_HandleTypeDef *htim) +5693:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** { +5694:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** /* Prevent unused argument(s) compilation warning */ +5695:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** UNUSED(htim); +5696:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** +5697:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** /* NOTE : This function should not be modified, when the callback is needed, +5698:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** the HAL_TIM_OC_DelayElapsedCallback could be implemented in the user file +5699:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** */ +5700:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** } +5701:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** +5702:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** /** +5703:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** * @brief Input Capture callback in non-blocking mode +5704:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** * @param htim TIM IC handle +5705:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** * @retval None +5706:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** */ +5707:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** __weak void HAL_TIM_IC_CaptureCallback(TIM_HandleTypeDef *htim) +5708:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** { +5709:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** /* Prevent unused argument(s) compilation warning */ +5710:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** UNUSED(htim); +5711:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** +5712:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** /* NOTE : This function should not be modified, when the callback is needed, +5713:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** the HAL_TIM_IC_CaptureCallback could be implemented in the user file +5714:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** */ +5715:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** } +5716:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** +5717:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** /** +5718:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** * @brief Input Capture half complete callback in non-blocking mode +5719:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** * @param htim TIM IC handle +5720:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** * @retval None +5721:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** */ +5722:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** __weak void HAL_TIM_IC_CaptureHalfCpltCallback(TIM_HandleTypeDef *htim) +5723:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** { +5724:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** /* Prevent unused argument(s) compilation warning */ +5725:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** UNUSED(htim); +5726:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** +5727:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** /* NOTE : This function should not be modified, when the callback is needed, +5728:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** the HAL_TIM_IC_CaptureHalfCpltCallback could be implemented in the user file +5729:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** */ +5730:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** } +5731:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** +5732:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** /** + ARM GAS /tmp/ccMtK8ce.s page 102 + + +5733:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** * @brief PWM Pulse finished callback in non-blocking mode +5734:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** * @param htim TIM handle +5735:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** * @retval None +5736:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** */ +5737:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** __weak void HAL_TIM_PWM_PulseFinishedCallback(TIM_HandleTypeDef *htim) +5738:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** { +5739:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** /* Prevent unused argument(s) compilation warning */ +5740:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** UNUSED(htim); +5741:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** +5742:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** /* NOTE : This function should not be modified, when the callback is needed, +5743:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** the HAL_TIM_PWM_PulseFinishedCallback could be implemented in the user file +5744:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** */ +5745:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** } +5746:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** +5747:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** /** +5748:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** * @brief PWM Pulse finished half complete callback in non-blocking mode +5749:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** * @param htim TIM handle +5750:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** * @retval None +5751:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** */ +5752:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** __weak void HAL_TIM_PWM_PulseFinishedHalfCpltCallback(TIM_HandleTypeDef *htim) +5753:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** { +5754:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** /* Prevent unused argument(s) compilation warning */ +5755:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** UNUSED(htim); +5756:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** +5757:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** /* NOTE : This function should not be modified, when the callback is needed, +5758:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** the HAL_TIM_PWM_PulseFinishedHalfCpltCallback could be implemented in the user file +5759:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** */ +5760:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** } +5761:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** +5762:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** /** +5763:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** * @brief Hall Trigger detection callback in non-blocking mode +5764:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** * @param htim TIM handle +5765:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** * @retval None +5766:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** */ +5767:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** __weak void HAL_TIM_TriggerCallback(TIM_HandleTypeDef *htim) +5768:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** { +5769:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** /* Prevent unused argument(s) compilation warning */ +5770:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** UNUSED(htim); +5771:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** +5772:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** /* NOTE : This function should not be modified, when the callback is needed, +5773:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** the HAL_TIM_TriggerCallback could be implemented in the user file +5774:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** */ +5775:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** } +5776:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** +5777:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** /** +5778:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** * @brief Hall Trigger detection half complete callback in non-blocking mode +5779:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** * @param htim TIM handle +5780:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** * @retval None +5781:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** */ +5782:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** __weak void HAL_TIM_TriggerHalfCpltCallback(TIM_HandleTypeDef *htim) +5783:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** { +5784:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** /* Prevent unused argument(s) compilation warning */ +5785:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** UNUSED(htim); +5786:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** +5787:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** /* NOTE : This function should not be modified, when the callback is needed, +5788:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** the HAL_TIM_TriggerHalfCpltCallback could be implemented in the user file +5789:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** */ + ARM GAS /tmp/ccMtK8ce.s page 103 + + +5790:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** } +5791:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** +5792:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** /** +5793:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** * @brief Timer error callback in non-blocking mode +5794:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** * @param htim TIM handle +5795:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** * @retval None +5796:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** */ +5797:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** __weak void HAL_TIM_ErrorCallback(TIM_HandleTypeDef *htim) +5798:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** { +5799:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** /* Prevent unused argument(s) compilation warning */ +5800:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** UNUSED(htim); +5801:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** +5802:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** /* NOTE : This function should not be modified, when the callback is needed, +5803:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** the HAL_TIM_ErrorCallback could be implemented in the user file +5804:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** */ +5805:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** } +5806:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** +5807:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** #if (USE_HAL_TIM_REGISTER_CALLBACKS == 1) +5808:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** /** +5809:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** * @brief Register a User TIM callback to be used instead of the weak predefined callback +5810:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** * @param htim tim handle +5811:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** * @param CallbackID ID of the callback to be registered +5812:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** * This parameter can be one of the following values: +5813:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** * @arg @ref HAL_TIM_BASE_MSPINIT_CB_ID Base MspInit Callback ID +5814:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** * @arg @ref HAL_TIM_BASE_MSPDEINIT_CB_ID Base MspDeInit Callback ID +5815:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** * @arg @ref HAL_TIM_IC_MSPINIT_CB_ID IC MspInit Callback ID +5816:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** * @arg @ref HAL_TIM_IC_MSPDEINIT_CB_ID IC MspDeInit Callback ID +5817:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** * @arg @ref HAL_TIM_OC_MSPINIT_CB_ID OC MspInit Callback ID +5818:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** * @arg @ref HAL_TIM_OC_MSPDEINIT_CB_ID OC MspDeInit Callback ID +5819:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** * @arg @ref HAL_TIM_PWM_MSPINIT_CB_ID PWM MspInit Callback ID +5820:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** * @arg @ref HAL_TIM_PWM_MSPDEINIT_CB_ID PWM MspDeInit Callback ID +5821:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** * @arg @ref HAL_TIM_ONE_PULSE_MSPINIT_CB_ID One Pulse MspInit Callback ID +5822:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** * @arg @ref HAL_TIM_ONE_PULSE_MSPDEINIT_CB_ID One Pulse MspDeInit Callback ID +5823:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** * @arg @ref HAL_TIM_ENCODER_MSPINIT_CB_ID Encoder MspInit Callback ID +5824:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** * @arg @ref HAL_TIM_ENCODER_MSPDEINIT_CB_ID Encoder MspDeInit Callback ID +5825:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** * @arg @ref HAL_TIM_HALL_SENSOR_MSPINIT_CB_ID Hall Sensor MspInit Callback ID +5826:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** * @arg @ref HAL_TIM_HALL_SENSOR_MSPDEINIT_CB_ID Hall Sensor MspDeInit Callback ID +5827:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** * @arg @ref HAL_TIM_PERIOD_ELAPSED_CB_ID Period Elapsed Callback ID +5828:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** * @arg @ref HAL_TIM_PERIOD_ELAPSED_HALF_CB_ID Period Elapsed half complete Callback ID +5829:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** * @arg @ref HAL_TIM_TRIGGER_CB_ID Trigger Callback ID +5830:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** * @arg @ref HAL_TIM_TRIGGER_HALF_CB_ID Trigger half complete Callback ID +5831:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** * @arg @ref HAL_TIM_IC_CAPTURE_CB_ID Input Capture Callback ID +5832:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** * @arg @ref HAL_TIM_IC_CAPTURE_HALF_CB_ID Input Capture half complete Callback ID +5833:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** * @arg @ref HAL_TIM_OC_DELAY_ELAPSED_CB_ID Output Compare Delay Elapsed Callback ID +5834:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** * @arg @ref HAL_TIM_PWM_PULSE_FINISHED_CB_ID PWM Pulse Finished Callback ID +5835:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** * @arg @ref HAL_TIM_PWM_PULSE_FINISHED_HALF_CB_ID PWM Pulse Finished half complete Callb +5836:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** * @arg @ref HAL_TIM_ERROR_CB_ID Error Callback ID +5837:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** * @arg @ref HAL_TIM_COMMUTATION_CB_ID Commutation Callback ID +5838:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** * @arg @ref HAL_TIM_COMMUTATION_HALF_CB_ID Commutation half complete Callback ID +5839:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** * @arg @ref HAL_TIM_BREAK_CB_ID Break Callback ID +5840:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** * @param pCallback pointer to the callback function +5841:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** * @retval status +5842:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** */ +5843:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** HAL_StatusTypeDef HAL_TIM_RegisterCallback(TIM_HandleTypeDef *htim, HAL_TIM_CallbackIDTypeDef Callb +5844:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** pTIM_CallbackTypeDef pCallback) +5845:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** { +5846:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** HAL_StatusTypeDef status = HAL_OK; + ARM GAS /tmp/ccMtK8ce.s page 104 + + +5847:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** +5848:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** if (pCallback == NULL) +5849:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** { +5850:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** return HAL_ERROR; +5851:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** } +5852:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** +5853:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** if (htim->State == HAL_TIM_STATE_READY) +5854:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** { +5855:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** switch (CallbackID) +5856:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** { +5857:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** case HAL_TIM_BASE_MSPINIT_CB_ID : +5858:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** htim->Base_MspInitCallback = pCallback; +5859:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** break; +5860:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** +5861:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** case HAL_TIM_BASE_MSPDEINIT_CB_ID : +5862:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** htim->Base_MspDeInitCallback = pCallback; +5863:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** break; +5864:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** +5865:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** case HAL_TIM_IC_MSPINIT_CB_ID : +5866:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** htim->IC_MspInitCallback = pCallback; +5867:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** break; +5868:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** +5869:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** case HAL_TIM_IC_MSPDEINIT_CB_ID : +5870:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** htim->IC_MspDeInitCallback = pCallback; +5871:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** break; +5872:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** +5873:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** case HAL_TIM_OC_MSPINIT_CB_ID : +5874:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** htim->OC_MspInitCallback = pCallback; +5875:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** break; +5876:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** +5877:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** case HAL_TIM_OC_MSPDEINIT_CB_ID : +5878:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** htim->OC_MspDeInitCallback = pCallback; +5879:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** break; +5880:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** +5881:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** case HAL_TIM_PWM_MSPINIT_CB_ID : +5882:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** htim->PWM_MspInitCallback = pCallback; +5883:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** break; +5884:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** +5885:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** case HAL_TIM_PWM_MSPDEINIT_CB_ID : +5886:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** htim->PWM_MspDeInitCallback = pCallback; +5887:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** break; +5888:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** +5889:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** case HAL_TIM_ONE_PULSE_MSPINIT_CB_ID : +5890:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** htim->OnePulse_MspInitCallback = pCallback; +5891:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** break; +5892:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** +5893:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** case HAL_TIM_ONE_PULSE_MSPDEINIT_CB_ID : +5894:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** htim->OnePulse_MspDeInitCallback = pCallback; +5895:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** break; +5896:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** +5897:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** case HAL_TIM_ENCODER_MSPINIT_CB_ID : +5898:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** htim->Encoder_MspInitCallback = pCallback; +5899:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** break; +5900:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** +5901:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** case HAL_TIM_ENCODER_MSPDEINIT_CB_ID : +5902:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** htim->Encoder_MspDeInitCallback = pCallback; +5903:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** break; + ARM GAS /tmp/ccMtK8ce.s page 105 + + +5904:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** +5905:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** case HAL_TIM_HALL_SENSOR_MSPINIT_CB_ID : +5906:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** htim->HallSensor_MspInitCallback = pCallback; +5907:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** break; +5908:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** +5909:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** case HAL_TIM_HALL_SENSOR_MSPDEINIT_CB_ID : +5910:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** htim->HallSensor_MspDeInitCallback = pCallback; +5911:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** break; +5912:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** +5913:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** case HAL_TIM_PERIOD_ELAPSED_CB_ID : +5914:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** htim->PeriodElapsedCallback = pCallback; +5915:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** break; +5916:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** +5917:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** case HAL_TIM_PERIOD_ELAPSED_HALF_CB_ID : +5918:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** htim->PeriodElapsedHalfCpltCallback = pCallback; +5919:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** break; +5920:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** +5921:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** case HAL_TIM_TRIGGER_CB_ID : +5922:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** htim->TriggerCallback = pCallback; +5923:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** break; +5924:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** +5925:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** case HAL_TIM_TRIGGER_HALF_CB_ID : +5926:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** htim->TriggerHalfCpltCallback = pCallback; +5927:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** break; +5928:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** +5929:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** case HAL_TIM_IC_CAPTURE_CB_ID : +5930:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** htim->IC_CaptureCallback = pCallback; +5931:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** break; +5932:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** +5933:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** case HAL_TIM_IC_CAPTURE_HALF_CB_ID : +5934:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** htim->IC_CaptureHalfCpltCallback = pCallback; +5935:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** break; +5936:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** +5937:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** case HAL_TIM_OC_DELAY_ELAPSED_CB_ID : +5938:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** htim->OC_DelayElapsedCallback = pCallback; +5939:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** break; +5940:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** +5941:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** case HAL_TIM_PWM_PULSE_FINISHED_CB_ID : +5942:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** htim->PWM_PulseFinishedCallback = pCallback; +5943:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** break; +5944:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** +5945:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** case HAL_TIM_PWM_PULSE_FINISHED_HALF_CB_ID : +5946:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** htim->PWM_PulseFinishedHalfCpltCallback = pCallback; +5947:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** break; +5948:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** +5949:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** case HAL_TIM_ERROR_CB_ID : +5950:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** htim->ErrorCallback = pCallback; +5951:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** break; +5952:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** +5953:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** case HAL_TIM_COMMUTATION_CB_ID : +5954:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** htim->CommutationCallback = pCallback; +5955:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** break; +5956:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** +5957:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** case HAL_TIM_COMMUTATION_HALF_CB_ID : +5958:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** htim->CommutationHalfCpltCallback = pCallback; +5959:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** break; +5960:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + ARM GAS /tmp/ccMtK8ce.s page 106 + + +5961:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** case HAL_TIM_BREAK_CB_ID : +5962:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** htim->BreakCallback = pCallback; +5963:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** break; +5964:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** +5965:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** default : +5966:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** /* Return error status */ +5967:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** status = HAL_ERROR; +5968:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** break; +5969:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** } +5970:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** } +5971:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** else if (htim->State == HAL_TIM_STATE_RESET) +5972:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** { +5973:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** switch (CallbackID) +5974:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** { +5975:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** case HAL_TIM_BASE_MSPINIT_CB_ID : +5976:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** htim->Base_MspInitCallback = pCallback; +5977:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** break; +5978:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** +5979:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** case HAL_TIM_BASE_MSPDEINIT_CB_ID : +5980:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** htim->Base_MspDeInitCallback = pCallback; +5981:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** break; +5982:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** +5983:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** case HAL_TIM_IC_MSPINIT_CB_ID : +5984:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** htim->IC_MspInitCallback = pCallback; +5985:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** break; +5986:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** +5987:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** case HAL_TIM_IC_MSPDEINIT_CB_ID : +5988:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** htim->IC_MspDeInitCallback = pCallback; +5989:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** break; +5990:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** +5991:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** case HAL_TIM_OC_MSPINIT_CB_ID : +5992:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** htim->OC_MspInitCallback = pCallback; +5993:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** break; +5994:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** +5995:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** case HAL_TIM_OC_MSPDEINIT_CB_ID : +5996:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** htim->OC_MspDeInitCallback = pCallback; +5997:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** break; +5998:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** +5999:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** case HAL_TIM_PWM_MSPINIT_CB_ID : +6000:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** htim->PWM_MspInitCallback = pCallback; +6001:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** break; +6002:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** +6003:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** case HAL_TIM_PWM_MSPDEINIT_CB_ID : +6004:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** htim->PWM_MspDeInitCallback = pCallback; +6005:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** break; +6006:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** +6007:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** case HAL_TIM_ONE_PULSE_MSPINIT_CB_ID : +6008:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** htim->OnePulse_MspInitCallback = pCallback; +6009:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** break; +6010:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** +6011:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** case HAL_TIM_ONE_PULSE_MSPDEINIT_CB_ID : +6012:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** htim->OnePulse_MspDeInitCallback = pCallback; +6013:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** break; +6014:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** +6015:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** case HAL_TIM_ENCODER_MSPINIT_CB_ID : +6016:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** htim->Encoder_MspInitCallback = pCallback; +6017:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** break; + ARM GAS /tmp/ccMtK8ce.s page 107 + + +6018:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** +6019:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** case HAL_TIM_ENCODER_MSPDEINIT_CB_ID : +6020:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** htim->Encoder_MspDeInitCallback = pCallback; +6021:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** break; +6022:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** +6023:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** case HAL_TIM_HALL_SENSOR_MSPINIT_CB_ID : +6024:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** htim->HallSensor_MspInitCallback = pCallback; +6025:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** break; +6026:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** +6027:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** case HAL_TIM_HALL_SENSOR_MSPDEINIT_CB_ID : +6028:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** htim->HallSensor_MspDeInitCallback = pCallback; +6029:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** break; +6030:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** +6031:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** default : +6032:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** /* Return error status */ +6033:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** status = HAL_ERROR; +6034:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** break; +6035:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** } +6036:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** } +6037:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** else +6038:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** { +6039:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** /* Return error status */ +6040:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** status = HAL_ERROR; +6041:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** } +6042:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** +6043:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** return status; +6044:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** } +6045:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** +6046:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** /** +6047:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** * @brief Unregister a TIM callback +6048:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** * TIM callback is redirected to the weak predefined callback +6049:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** * @param htim tim handle +6050:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** * @param CallbackID ID of the callback to be unregistered +6051:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** * This parameter can be one of the following values: +6052:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** * @arg @ref HAL_TIM_BASE_MSPINIT_CB_ID Base MspInit Callback ID +6053:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** * @arg @ref HAL_TIM_BASE_MSPDEINIT_CB_ID Base MspDeInit Callback ID +6054:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** * @arg @ref HAL_TIM_IC_MSPINIT_CB_ID IC MspInit Callback ID +6055:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** * @arg @ref HAL_TIM_IC_MSPDEINIT_CB_ID IC MspDeInit Callback ID +6056:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** * @arg @ref HAL_TIM_OC_MSPINIT_CB_ID OC MspInit Callback ID +6057:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** * @arg @ref HAL_TIM_OC_MSPDEINIT_CB_ID OC MspDeInit Callback ID +6058:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** * @arg @ref HAL_TIM_PWM_MSPINIT_CB_ID PWM MspInit Callback ID +6059:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** * @arg @ref HAL_TIM_PWM_MSPDEINIT_CB_ID PWM MspDeInit Callback ID +6060:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** * @arg @ref HAL_TIM_ONE_PULSE_MSPINIT_CB_ID One Pulse MspInit Callback ID +6061:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** * @arg @ref HAL_TIM_ONE_PULSE_MSPDEINIT_CB_ID One Pulse MspDeInit Callback ID +6062:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** * @arg @ref HAL_TIM_ENCODER_MSPINIT_CB_ID Encoder MspInit Callback ID +6063:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** * @arg @ref HAL_TIM_ENCODER_MSPDEINIT_CB_ID Encoder MspDeInit Callback ID +6064:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** * @arg @ref HAL_TIM_HALL_SENSOR_MSPINIT_CB_ID Hall Sensor MspInit Callback ID +6065:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** * @arg @ref HAL_TIM_HALL_SENSOR_MSPDEINIT_CB_ID Hall Sensor MspDeInit Callback ID +6066:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** * @arg @ref HAL_TIM_PERIOD_ELAPSED_CB_ID Period Elapsed Callback ID +6067:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** * @arg @ref HAL_TIM_PERIOD_ELAPSED_HALF_CB_ID Period Elapsed half complete Callback ID +6068:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** * @arg @ref HAL_TIM_TRIGGER_CB_ID Trigger Callback ID +6069:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** * @arg @ref HAL_TIM_TRIGGER_HALF_CB_ID Trigger half complete Callback ID +6070:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** * @arg @ref HAL_TIM_IC_CAPTURE_CB_ID Input Capture Callback ID +6071:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** * @arg @ref HAL_TIM_IC_CAPTURE_HALF_CB_ID Input Capture half complete Callback ID +6072:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** * @arg @ref HAL_TIM_OC_DELAY_ELAPSED_CB_ID Output Compare Delay Elapsed Callback ID +6073:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** * @arg @ref HAL_TIM_PWM_PULSE_FINISHED_CB_ID PWM Pulse Finished Callback ID +6074:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** * @arg @ref HAL_TIM_PWM_PULSE_FINISHED_HALF_CB_ID PWM Pulse Finished half complete Callb + ARM GAS /tmp/ccMtK8ce.s page 108 + + +6075:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** * @arg @ref HAL_TIM_ERROR_CB_ID Error Callback ID +6076:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** * @arg @ref HAL_TIM_COMMUTATION_CB_ID Commutation Callback ID +6077:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** * @arg @ref HAL_TIM_COMMUTATION_HALF_CB_ID Commutation half complete Callback ID +6078:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** * @arg @ref HAL_TIM_BREAK_CB_ID Break Callback ID +6079:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** * @retval status +6080:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** */ +6081:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** HAL_StatusTypeDef HAL_TIM_UnRegisterCallback(TIM_HandleTypeDef *htim, HAL_TIM_CallbackIDTypeDef Cal +6082:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** { +6083:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** HAL_StatusTypeDef status = HAL_OK; +6084:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** +6085:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** if (htim->State == HAL_TIM_STATE_READY) +6086:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** { +6087:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** switch (CallbackID) +6088:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** { +6089:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** case HAL_TIM_BASE_MSPINIT_CB_ID : +6090:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** /* Legacy weak Base MspInit Callback */ +6091:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** htim->Base_MspInitCallback = HAL_TIM_Base_MspInit; +6092:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** break; +6093:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** +6094:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** case HAL_TIM_BASE_MSPDEINIT_CB_ID : +6095:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** /* Legacy weak Base Msp DeInit Callback */ +6096:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** htim->Base_MspDeInitCallback = HAL_TIM_Base_MspDeInit; +6097:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** break; +6098:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** +6099:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** case HAL_TIM_IC_MSPINIT_CB_ID : +6100:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** /* Legacy weak IC Msp Init Callback */ +6101:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** htim->IC_MspInitCallback = HAL_TIM_IC_MspInit; +6102:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** break; +6103:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** +6104:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** case HAL_TIM_IC_MSPDEINIT_CB_ID : +6105:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** /* Legacy weak IC Msp DeInit Callback */ +6106:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** htim->IC_MspDeInitCallback = HAL_TIM_IC_MspDeInit; +6107:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** break; +6108:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** +6109:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** case HAL_TIM_OC_MSPINIT_CB_ID : +6110:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** /* Legacy weak OC Msp Init Callback */ +6111:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** htim->OC_MspInitCallback = HAL_TIM_OC_MspInit; +6112:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** break; +6113:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** +6114:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** case HAL_TIM_OC_MSPDEINIT_CB_ID : +6115:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** /* Legacy weak OC Msp DeInit Callback */ +6116:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** htim->OC_MspDeInitCallback = HAL_TIM_OC_MspDeInit; +6117:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** break; +6118:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** +6119:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** case HAL_TIM_PWM_MSPINIT_CB_ID : +6120:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** /* Legacy weak PWM Msp Init Callback */ +6121:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** htim->PWM_MspInitCallback = HAL_TIM_PWM_MspInit; +6122:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** break; +6123:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** +6124:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** case HAL_TIM_PWM_MSPDEINIT_CB_ID : +6125:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** /* Legacy weak PWM Msp DeInit Callback */ +6126:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** htim->PWM_MspDeInitCallback = HAL_TIM_PWM_MspDeInit; +6127:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** break; +6128:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** +6129:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** case HAL_TIM_ONE_PULSE_MSPINIT_CB_ID : +6130:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** /* Legacy weak One Pulse Msp Init Callback */ +6131:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** htim->OnePulse_MspInitCallback = HAL_TIM_OnePulse_MspInit; + ARM GAS /tmp/ccMtK8ce.s page 109 + + +6132:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** break; +6133:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** +6134:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** case HAL_TIM_ONE_PULSE_MSPDEINIT_CB_ID : +6135:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** /* Legacy weak One Pulse Msp DeInit Callback */ +6136:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** htim->OnePulse_MspDeInitCallback = HAL_TIM_OnePulse_MspDeInit; +6137:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** break; +6138:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** +6139:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** case HAL_TIM_ENCODER_MSPINIT_CB_ID : +6140:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** /* Legacy weak Encoder Msp Init Callback */ +6141:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** htim->Encoder_MspInitCallback = HAL_TIM_Encoder_MspInit; +6142:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** break; +6143:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** +6144:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** case HAL_TIM_ENCODER_MSPDEINIT_CB_ID : +6145:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** /* Legacy weak Encoder Msp DeInit Callback */ +6146:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** htim->Encoder_MspDeInitCallback = HAL_TIM_Encoder_MspDeInit; +6147:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** break; +6148:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** +6149:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** case HAL_TIM_HALL_SENSOR_MSPINIT_CB_ID : +6150:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** /* Legacy weak Hall Sensor Msp Init Callback */ +6151:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** htim->HallSensor_MspInitCallback = HAL_TIMEx_HallSensor_MspInit; +6152:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** break; +6153:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** +6154:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** case HAL_TIM_HALL_SENSOR_MSPDEINIT_CB_ID : +6155:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** /* Legacy weak Hall Sensor Msp DeInit Callback */ +6156:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** htim->HallSensor_MspDeInitCallback = HAL_TIMEx_HallSensor_MspDeInit; +6157:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** break; +6158:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** +6159:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** case HAL_TIM_PERIOD_ELAPSED_CB_ID : +6160:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** /* Legacy weak Period Elapsed Callback */ +6161:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** htim->PeriodElapsedCallback = HAL_TIM_PeriodElapsedCallback; +6162:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** break; +6163:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** +6164:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** case HAL_TIM_PERIOD_ELAPSED_HALF_CB_ID : +6165:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** /* Legacy weak Period Elapsed half complete Callback */ +6166:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** htim->PeriodElapsedHalfCpltCallback = HAL_TIM_PeriodElapsedHalfCpltCallback; +6167:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** break; +6168:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** +6169:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** case HAL_TIM_TRIGGER_CB_ID : +6170:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** /* Legacy weak Trigger Callback */ +6171:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** htim->TriggerCallback = HAL_TIM_TriggerCallback; +6172:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** break; +6173:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** +6174:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** case HAL_TIM_TRIGGER_HALF_CB_ID : +6175:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** /* Legacy weak Trigger half complete Callback */ +6176:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** htim->TriggerHalfCpltCallback = HAL_TIM_TriggerHalfCpltCallback; +6177:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** break; +6178:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** +6179:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** case HAL_TIM_IC_CAPTURE_CB_ID : +6180:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** /* Legacy weak IC Capture Callback */ +6181:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** htim->IC_CaptureCallback = HAL_TIM_IC_CaptureCallback; +6182:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** break; +6183:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** +6184:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** case HAL_TIM_IC_CAPTURE_HALF_CB_ID : +6185:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** /* Legacy weak IC Capture half complete Callback */ +6186:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** htim->IC_CaptureHalfCpltCallback = HAL_TIM_IC_CaptureHalfCpltCallback; +6187:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** break; +6188:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + ARM GAS /tmp/ccMtK8ce.s page 110 + + +6189:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** case HAL_TIM_OC_DELAY_ELAPSED_CB_ID : +6190:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** /* Legacy weak OC Delay Elapsed Callback */ +6191:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** htim->OC_DelayElapsedCallback = HAL_TIM_OC_DelayElapsedCallback; +6192:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** break; +6193:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** +6194:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** case HAL_TIM_PWM_PULSE_FINISHED_CB_ID : +6195:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** /* Legacy weak PWM Pulse Finished Callback */ +6196:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** htim->PWM_PulseFinishedCallback = HAL_TIM_PWM_PulseFinishedCallback; +6197:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** break; +6198:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** +6199:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** case HAL_TIM_PWM_PULSE_FINISHED_HALF_CB_ID : +6200:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** /* Legacy weak PWM Pulse Finished half complete Callback */ +6201:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** htim->PWM_PulseFinishedHalfCpltCallback = HAL_TIM_PWM_PulseFinishedHalfCpltCallback; +6202:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** break; +6203:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** +6204:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** case HAL_TIM_ERROR_CB_ID : +6205:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** /* Legacy weak Error Callback */ +6206:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** htim->ErrorCallback = HAL_TIM_ErrorCallback; +6207:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** break; +6208:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** +6209:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** case HAL_TIM_COMMUTATION_CB_ID : +6210:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** /* Legacy weak Commutation Callback */ +6211:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** htim->CommutationCallback = HAL_TIMEx_CommutCallback; +6212:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** break; +6213:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** +6214:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** case HAL_TIM_COMMUTATION_HALF_CB_ID : +6215:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** /* Legacy weak Commutation half complete Callback */ +6216:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** htim->CommutationHalfCpltCallback = HAL_TIMEx_CommutHalfCpltCallback; +6217:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** break; +6218:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** +6219:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** case HAL_TIM_BREAK_CB_ID : +6220:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** /* Legacy weak Break Callback */ +6221:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** htim->BreakCallback = HAL_TIMEx_BreakCallback; +6222:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** break; +6223:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** +6224:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** default : +6225:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** /* Return error status */ +6226:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** status = HAL_ERROR; +6227:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** break; +6228:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** } +6229:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** } +6230:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** else if (htim->State == HAL_TIM_STATE_RESET) +6231:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** { +6232:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** switch (CallbackID) +6233:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** { +6234:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** case HAL_TIM_BASE_MSPINIT_CB_ID : +6235:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** /* Legacy weak Base MspInit Callback */ +6236:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** htim->Base_MspInitCallback = HAL_TIM_Base_MspInit; +6237:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** break; +6238:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** +6239:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** case HAL_TIM_BASE_MSPDEINIT_CB_ID : +6240:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** /* Legacy weak Base Msp DeInit Callback */ +6241:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** htim->Base_MspDeInitCallback = HAL_TIM_Base_MspDeInit; +6242:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** break; +6243:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** +6244:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** case HAL_TIM_IC_MSPINIT_CB_ID : +6245:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** /* Legacy weak IC Msp Init Callback */ + ARM GAS /tmp/ccMtK8ce.s page 111 + + +6246:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** htim->IC_MspInitCallback = HAL_TIM_IC_MspInit; +6247:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** break; +6248:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** +6249:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** case HAL_TIM_IC_MSPDEINIT_CB_ID : +6250:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** /* Legacy weak IC Msp DeInit Callback */ +6251:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** htim->IC_MspDeInitCallback = HAL_TIM_IC_MspDeInit; +6252:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** break; +6253:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** +6254:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** case HAL_TIM_OC_MSPINIT_CB_ID : +6255:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** /* Legacy weak OC Msp Init Callback */ +6256:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** htim->OC_MspInitCallback = HAL_TIM_OC_MspInit; +6257:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** break; +6258:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** +6259:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** case HAL_TIM_OC_MSPDEINIT_CB_ID : +6260:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** /* Legacy weak OC Msp DeInit Callback */ +6261:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** htim->OC_MspDeInitCallback = HAL_TIM_OC_MspDeInit; +6262:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** break; +6263:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** +6264:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** case HAL_TIM_PWM_MSPINIT_CB_ID : +6265:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** /* Legacy weak PWM Msp Init Callback */ +6266:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** htim->PWM_MspInitCallback = HAL_TIM_PWM_MspInit; +6267:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** break; +6268:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** +6269:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** case HAL_TIM_PWM_MSPDEINIT_CB_ID : +6270:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** /* Legacy weak PWM Msp DeInit Callback */ +6271:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** htim->PWM_MspDeInitCallback = HAL_TIM_PWM_MspDeInit; +6272:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** break; +6273:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** +6274:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** case HAL_TIM_ONE_PULSE_MSPINIT_CB_ID : +6275:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** /* Legacy weak One Pulse Msp Init Callback */ +6276:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** htim->OnePulse_MspInitCallback = HAL_TIM_OnePulse_MspInit; +6277:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** break; +6278:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** +6279:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** case HAL_TIM_ONE_PULSE_MSPDEINIT_CB_ID : +6280:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** /* Legacy weak One Pulse Msp DeInit Callback */ +6281:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** htim->OnePulse_MspDeInitCallback = HAL_TIM_OnePulse_MspDeInit; +6282:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** break; +6283:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** +6284:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** case HAL_TIM_ENCODER_MSPINIT_CB_ID : +6285:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** /* Legacy weak Encoder Msp Init Callback */ +6286:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** htim->Encoder_MspInitCallback = HAL_TIM_Encoder_MspInit; +6287:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** break; +6288:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** +6289:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** case HAL_TIM_ENCODER_MSPDEINIT_CB_ID : +6290:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** /* Legacy weak Encoder Msp DeInit Callback */ +6291:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** htim->Encoder_MspDeInitCallback = HAL_TIM_Encoder_MspDeInit; +6292:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** break; +6293:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** +6294:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** case HAL_TIM_HALL_SENSOR_MSPINIT_CB_ID : +6295:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** /* Legacy weak Hall Sensor Msp Init Callback */ +6296:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** htim->HallSensor_MspInitCallback = HAL_TIMEx_HallSensor_MspInit; +6297:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** break; +6298:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** +6299:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** case HAL_TIM_HALL_SENSOR_MSPDEINIT_CB_ID : +6300:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** /* Legacy weak Hall Sensor Msp DeInit Callback */ +6301:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** htim->HallSensor_MspDeInitCallback = HAL_TIMEx_HallSensor_MspDeInit; +6302:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** break; + ARM GAS /tmp/ccMtK8ce.s page 112 + + +6303:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** +6304:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** default : +6305:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** /* Return error status */ +6306:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** status = HAL_ERROR; +6307:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** break; +6308:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** } +6309:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** } +6310:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** else +6311:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** { +6312:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** /* Return error status */ +6313:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** status = HAL_ERROR; +6314:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** } +6315:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** +6316:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** return status; +6317:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** } +6318:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** #endif /* USE_HAL_TIM_REGISTER_CALLBACKS */ +6319:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** +6320:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** /** +6321:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** * @} +6322:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** */ +6323:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** +6324:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** /** @defgroup TIM_Exported_Functions_Group10 TIM Peripheral State functions +6325:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** * @brief TIM Peripheral State functions +6326:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** * +6327:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** @verbatim +6328:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** ============================================================================== +6329:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** ##### Peripheral State functions ##### +6330:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** ============================================================================== +6331:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** [..] +6332:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** This subsection permits to get in run-time the status of the peripheral +6333:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** and the data flow. +6334:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** +6335:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** @endverbatim +6336:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** * @{ +6337:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** */ +6338:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** +6339:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** /** +6340:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** * @brief Return the TIM Base handle state. +6341:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** * @param htim TIM Base handle +6342:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** * @retval HAL state +6343:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** */ +6344:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** HAL_TIM_StateTypeDef HAL_TIM_Base_GetState(const TIM_HandleTypeDef *htim) +6345:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** { +6346:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** return htim->State; +6347:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** } +6348:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** +6349:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** /** +6350:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** * @brief Return the TIM OC handle state. +6351:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** * @param htim TIM Output Compare handle +6352:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** * @retval HAL state +6353:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** */ +6354:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** HAL_TIM_StateTypeDef HAL_TIM_OC_GetState(const TIM_HandleTypeDef *htim) +6355:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** { +6356:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** return htim->State; +6357:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** } +6358:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** +6359:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** /** + ARM GAS /tmp/ccMtK8ce.s page 113 + + +6360:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** * @brief Return the TIM PWM handle state. +6361:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** * @param htim TIM handle +6362:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** * @retval HAL state +6363:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** */ +6364:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** HAL_TIM_StateTypeDef HAL_TIM_PWM_GetState(const TIM_HandleTypeDef *htim) +6365:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** { +6366:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** return htim->State; +6367:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** } +6368:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** +6369:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** /** +6370:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** * @brief Return the TIM Input Capture handle state. +6371:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** * @param htim TIM IC handle +6372:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** * @retval HAL state +6373:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** */ +6374:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** HAL_TIM_StateTypeDef HAL_TIM_IC_GetState(const TIM_HandleTypeDef *htim) +6375:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** { +6376:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** return htim->State; +6377:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** } +6378:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** +6379:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** /** +6380:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** * @brief Return the TIM One Pulse Mode handle state. +6381:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** * @param htim TIM OPM handle +6382:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** * @retval HAL state +6383:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** */ +6384:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** HAL_TIM_StateTypeDef HAL_TIM_OnePulse_GetState(const TIM_HandleTypeDef *htim) +6385:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** { +6386:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** return htim->State; +6387:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** } +6388:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** +6389:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** /** +6390:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** * @brief Return the TIM Encoder Mode handle state. +6391:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** * @param htim TIM Encoder Interface handle +6392:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** * @retval HAL state +6393:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** */ +6394:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** HAL_TIM_StateTypeDef HAL_TIM_Encoder_GetState(const TIM_HandleTypeDef *htim) +6395:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** { +6396:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** return htim->State; +6397:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** } +6398:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** +6399:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** /** +6400:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** * @brief Return the TIM Encoder Mode handle state. +6401:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** * @param htim TIM handle +6402:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** * @retval Active channel +6403:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** */ +6404:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** HAL_TIM_ActiveChannel HAL_TIM_GetActiveChannel(const TIM_HandleTypeDef *htim) +6405:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** { +6406:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** return htim->Channel; +6407:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** } +6408:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** +6409:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** /** +6410:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** * @brief Return actual state of the TIM channel. +6411:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** * @param htim TIM handle +6412:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** * @param Channel TIM Channel +6413:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** * This parameter can be one of the following values: +6414:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** * @arg TIM_CHANNEL_1: TIM Channel 1 +6415:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** * @arg TIM_CHANNEL_2: TIM Channel 2 +6416:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** * @arg TIM_CHANNEL_3: TIM Channel 3 + ARM GAS /tmp/ccMtK8ce.s page 114 + + +6417:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** * @arg TIM_CHANNEL_4: TIM Channel 4 +6418:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** * @arg TIM_CHANNEL_5: TIM Channel 5 +6419:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** * @arg TIM_CHANNEL_6: TIM Channel 6 +6420:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** * @retval TIM Channel state +6421:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** */ +6422:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** HAL_TIM_ChannelStateTypeDef HAL_TIM_GetChannelState(const TIM_HandleTypeDef *htim, uint32_t Channe +6423:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** { +6424:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** HAL_TIM_ChannelStateTypeDef channel_state; +6425:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** +6426:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** /* Check the parameters */ +6427:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** assert_param(IS_TIM_CCX_INSTANCE(htim->Instance, Channel)); +6428:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** +6429:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** channel_state = TIM_CHANNEL_STATE_GET(htim, Channel); +6430:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** +6431:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** return channel_state; +6432:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** } +6433:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** +6434:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** /** +6435:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** * @brief Return actual state of a DMA burst operation. +6436:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** * @param htim TIM handle +6437:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** * @retval DMA burst state +6438:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** */ +6439:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** HAL_TIM_DMABurstStateTypeDef HAL_TIM_DMABurstState(const TIM_HandleTypeDef *htim) +6440:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** { +6441:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** /* Check the parameters */ +6442:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** assert_param(IS_TIM_DMABURST_INSTANCE(htim->Instance)); +6443:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** +6444:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** return htim->DMABurstState; +6445:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** } +6446:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** +6447:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** /** +6448:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** * @} +6449:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** */ +6450:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** +6451:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** /** +6452:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** * @} +6453:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** */ +6454:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** +6455:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** /** @defgroup TIM_Private_Functions TIM Private Functions +6456:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** * @{ +6457:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** */ +6458:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** +6459:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** /** +6460:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** * @brief TIM DMA error callback +6461:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** * @param hdma pointer to DMA handle. +6462:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** * @retval None +6463:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** */ +6464:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** void TIM_DMAError(DMA_HandleTypeDef *hdma) +6465:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** { +6466:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** TIM_HandleTypeDef *htim = (TIM_HandleTypeDef *)((DMA_HandleTypeDef *)hdma)->Parent; +6467:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** +6468:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** if (hdma == htim->hdma[TIM_DMA_ID_CC1]) +6469:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** { +6470:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** htim->Channel = HAL_TIM_ACTIVE_CHANNEL_1; +6471:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** TIM_CHANNEL_STATE_SET(htim, TIM_CHANNEL_1, HAL_TIM_CHANNEL_STATE_READY); +6472:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** } +6473:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** else if (hdma == htim->hdma[TIM_DMA_ID_CC2]) + ARM GAS /tmp/ccMtK8ce.s page 115 + + +6474:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** { +6475:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** htim->Channel = HAL_TIM_ACTIVE_CHANNEL_2; +6476:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** TIM_CHANNEL_STATE_SET(htim, TIM_CHANNEL_2, HAL_TIM_CHANNEL_STATE_READY); +6477:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** } +6478:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** else if (hdma == htim->hdma[TIM_DMA_ID_CC3]) +6479:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** { +6480:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** htim->Channel = HAL_TIM_ACTIVE_CHANNEL_3; +6481:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** TIM_CHANNEL_STATE_SET(htim, TIM_CHANNEL_3, HAL_TIM_CHANNEL_STATE_READY); +6482:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** } +6483:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** else if (hdma == htim->hdma[TIM_DMA_ID_CC4]) +6484:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** { +6485:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** htim->Channel = HAL_TIM_ACTIVE_CHANNEL_4; +6486:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** TIM_CHANNEL_STATE_SET(htim, TIM_CHANNEL_4, HAL_TIM_CHANNEL_STATE_READY); +6487:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** } +6488:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** else +6489:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** { +6490:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** htim->State = HAL_TIM_STATE_READY; +6491:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** } +6492:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** +6493:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** #if (USE_HAL_TIM_REGISTER_CALLBACKS == 1) +6494:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** htim->ErrorCallback(htim); +6495:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** #else +6496:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** HAL_TIM_ErrorCallback(htim); +6497:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** #endif /* USE_HAL_TIM_REGISTER_CALLBACKS */ +6498:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** +6499:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** htim->Channel = HAL_TIM_ACTIVE_CHANNEL_CLEARED; +6500:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** } +6501:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** +6502:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** /** +6503:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** * @brief TIM DMA Delay Pulse complete callback. +6504:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** * @param hdma pointer to DMA handle. +6505:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** * @retval None +6506:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** */ +6507:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** static void TIM_DMADelayPulseCplt(DMA_HandleTypeDef *hdma) +6508:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** { +6509:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** TIM_HandleTypeDef *htim = (TIM_HandleTypeDef *)((DMA_HandleTypeDef *)hdma)->Parent; +6510:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** +6511:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** if (hdma == htim->hdma[TIM_DMA_ID_CC1]) +6512:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** { +6513:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** htim->Channel = HAL_TIM_ACTIVE_CHANNEL_1; +6514:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** +6515:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** if (hdma->Init.Mode == DMA_NORMAL) +6516:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** { +6517:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** TIM_CHANNEL_STATE_SET(htim, TIM_CHANNEL_1, HAL_TIM_CHANNEL_STATE_READY); +6518:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** } +6519:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** } +6520:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** else if (hdma == htim->hdma[TIM_DMA_ID_CC2]) +6521:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** { +6522:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** htim->Channel = HAL_TIM_ACTIVE_CHANNEL_2; +6523:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** +6524:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** if (hdma->Init.Mode == DMA_NORMAL) +6525:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** { +6526:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** TIM_CHANNEL_STATE_SET(htim, TIM_CHANNEL_2, HAL_TIM_CHANNEL_STATE_READY); +6527:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** } +6528:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** } +6529:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** else if (hdma == htim->hdma[TIM_DMA_ID_CC3]) +6530:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** { + ARM GAS /tmp/ccMtK8ce.s page 116 + + +6531:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** htim->Channel = HAL_TIM_ACTIVE_CHANNEL_3; +6532:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** +6533:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** if (hdma->Init.Mode == DMA_NORMAL) +6534:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** { +6535:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** TIM_CHANNEL_STATE_SET(htim, TIM_CHANNEL_3, HAL_TIM_CHANNEL_STATE_READY); +6536:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** } +6537:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** } +6538:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** else if (hdma == htim->hdma[TIM_DMA_ID_CC4]) +6539:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** { +6540:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** htim->Channel = HAL_TIM_ACTIVE_CHANNEL_4; +6541:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** +6542:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** if (hdma->Init.Mode == DMA_NORMAL) +6543:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** { +6544:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** TIM_CHANNEL_STATE_SET(htim, TIM_CHANNEL_4, HAL_TIM_CHANNEL_STATE_READY); +6545:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** } +6546:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** } +6547:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** else +6548:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** { +6549:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** /* nothing to do */ +6550:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** } +6551:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** +6552:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** #if (USE_HAL_TIM_REGISTER_CALLBACKS == 1) +6553:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** htim->PWM_PulseFinishedCallback(htim); +6554:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** #else +6555:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** HAL_TIM_PWM_PulseFinishedCallback(htim); +6556:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** #endif /* USE_HAL_TIM_REGISTER_CALLBACKS */ +6557:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** +6558:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** htim->Channel = HAL_TIM_ACTIVE_CHANNEL_CLEARED; +6559:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** } +6560:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** +6561:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** /** +6562:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** * @brief TIM DMA Delay Pulse half complete callback. +6563:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** * @param hdma pointer to DMA handle. +6564:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** * @retval None +6565:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** */ +6566:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** void TIM_DMADelayPulseHalfCplt(DMA_HandleTypeDef *hdma) +6567:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** { +6568:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** TIM_HandleTypeDef *htim = (TIM_HandleTypeDef *)((DMA_HandleTypeDef *)hdma)->Parent; +6569:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** +6570:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** if (hdma == htim->hdma[TIM_DMA_ID_CC1]) +6571:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** { +6572:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** htim->Channel = HAL_TIM_ACTIVE_CHANNEL_1; +6573:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** } +6574:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** else if (hdma == htim->hdma[TIM_DMA_ID_CC2]) +6575:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** { +6576:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** htim->Channel = HAL_TIM_ACTIVE_CHANNEL_2; +6577:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** } +6578:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** else if (hdma == htim->hdma[TIM_DMA_ID_CC3]) +6579:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** { +6580:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** htim->Channel = HAL_TIM_ACTIVE_CHANNEL_3; +6581:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** } +6582:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** else if (hdma == htim->hdma[TIM_DMA_ID_CC4]) +6583:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** { +6584:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** htim->Channel = HAL_TIM_ACTIVE_CHANNEL_4; +6585:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** } +6586:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** else +6587:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** { + ARM GAS /tmp/ccMtK8ce.s page 117 + + +6588:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** /* nothing to do */ +6589:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** } +6590:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** +6591:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** #if (USE_HAL_TIM_REGISTER_CALLBACKS == 1) +6592:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** htim->PWM_PulseFinishedHalfCpltCallback(htim); +6593:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** #else +6594:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** HAL_TIM_PWM_PulseFinishedHalfCpltCallback(htim); +6595:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** #endif /* USE_HAL_TIM_REGISTER_CALLBACKS */ +6596:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** +6597:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** htim->Channel = HAL_TIM_ACTIVE_CHANNEL_CLEARED; +6598:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** } +6599:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** +6600:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** /** +6601:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** * @brief TIM DMA Capture complete callback. +6602:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** * @param hdma pointer to DMA handle. +6603:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** * @retval None +6604:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** */ +6605:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** void TIM_DMACaptureCplt(DMA_HandleTypeDef *hdma) +6606:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** { +6607:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** TIM_HandleTypeDef *htim = (TIM_HandleTypeDef *)((DMA_HandleTypeDef *)hdma)->Parent; +6608:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** +6609:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** if (hdma == htim->hdma[TIM_DMA_ID_CC1]) +6610:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** { +6611:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** htim->Channel = HAL_TIM_ACTIVE_CHANNEL_1; +6612:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** +6613:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** if (hdma->Init.Mode == DMA_NORMAL) +6614:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** { +6615:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** TIM_CHANNEL_STATE_SET(htim, TIM_CHANNEL_1, HAL_TIM_CHANNEL_STATE_READY); +6616:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** TIM_CHANNEL_N_STATE_SET(htim, TIM_CHANNEL_1, HAL_TIM_CHANNEL_STATE_READY); +6617:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** } +6618:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** } +6619:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** else if (hdma == htim->hdma[TIM_DMA_ID_CC2]) +6620:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** { +6621:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** htim->Channel = HAL_TIM_ACTIVE_CHANNEL_2; +6622:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** +6623:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** if (hdma->Init.Mode == DMA_NORMAL) +6624:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** { +6625:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** TIM_CHANNEL_STATE_SET(htim, TIM_CHANNEL_2, HAL_TIM_CHANNEL_STATE_READY); +6626:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** TIM_CHANNEL_N_STATE_SET(htim, TIM_CHANNEL_2, HAL_TIM_CHANNEL_STATE_READY); +6627:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** } +6628:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** } +6629:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** else if (hdma == htim->hdma[TIM_DMA_ID_CC3]) +6630:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** { +6631:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** htim->Channel = HAL_TIM_ACTIVE_CHANNEL_3; +6632:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** +6633:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** if (hdma->Init.Mode == DMA_NORMAL) +6634:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** { +6635:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** TIM_CHANNEL_STATE_SET(htim, TIM_CHANNEL_3, HAL_TIM_CHANNEL_STATE_READY); +6636:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** TIM_CHANNEL_N_STATE_SET(htim, TIM_CHANNEL_3, HAL_TIM_CHANNEL_STATE_READY); +6637:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** } +6638:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** } +6639:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** else if (hdma == htim->hdma[TIM_DMA_ID_CC4]) +6640:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** { +6641:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** htim->Channel = HAL_TIM_ACTIVE_CHANNEL_4; +6642:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** +6643:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** if (hdma->Init.Mode == DMA_NORMAL) +6644:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** { + ARM GAS /tmp/ccMtK8ce.s page 118 + + +6645:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** TIM_CHANNEL_STATE_SET(htim, TIM_CHANNEL_4, HAL_TIM_CHANNEL_STATE_READY); +6646:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** TIM_CHANNEL_N_STATE_SET(htim, TIM_CHANNEL_4, HAL_TIM_CHANNEL_STATE_READY); +6647:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** } +6648:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** } +6649:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** else +6650:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** { +6651:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** /* nothing to do */ +6652:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** } +6653:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** +6654:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** #if (USE_HAL_TIM_REGISTER_CALLBACKS == 1) +6655:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** htim->IC_CaptureCallback(htim); +6656:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** #else +6657:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** HAL_TIM_IC_CaptureCallback(htim); +6658:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** #endif /* USE_HAL_TIM_REGISTER_CALLBACKS */ +6659:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** +6660:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** htim->Channel = HAL_TIM_ACTIVE_CHANNEL_CLEARED; +6661:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** } +6662:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** +6663:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** /** +6664:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** * @brief TIM DMA Capture half complete callback. +6665:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** * @param hdma pointer to DMA handle. +6666:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** * @retval None +6667:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** */ +6668:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** void TIM_DMACaptureHalfCplt(DMA_HandleTypeDef *hdma) +6669:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** { +6670:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** TIM_HandleTypeDef *htim = (TIM_HandleTypeDef *)((DMA_HandleTypeDef *)hdma)->Parent; +6671:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** +6672:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** if (hdma == htim->hdma[TIM_DMA_ID_CC1]) +6673:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** { +6674:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** htim->Channel = HAL_TIM_ACTIVE_CHANNEL_1; +6675:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** } +6676:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** else if (hdma == htim->hdma[TIM_DMA_ID_CC2]) +6677:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** { +6678:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** htim->Channel = HAL_TIM_ACTIVE_CHANNEL_2; +6679:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** } +6680:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** else if (hdma == htim->hdma[TIM_DMA_ID_CC3]) +6681:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** { +6682:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** htim->Channel = HAL_TIM_ACTIVE_CHANNEL_3; +6683:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** } +6684:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** else if (hdma == htim->hdma[TIM_DMA_ID_CC4]) +6685:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** { +6686:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** htim->Channel = HAL_TIM_ACTIVE_CHANNEL_4; +6687:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** } +6688:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** else +6689:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** { +6690:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** /* nothing to do */ +6691:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** } +6692:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** +6693:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** #if (USE_HAL_TIM_REGISTER_CALLBACKS == 1) +6694:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** htim->IC_CaptureHalfCpltCallback(htim); +6695:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** #else +6696:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** HAL_TIM_IC_CaptureHalfCpltCallback(htim); +6697:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** #endif /* USE_HAL_TIM_REGISTER_CALLBACKS */ +6698:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** +6699:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** htim->Channel = HAL_TIM_ACTIVE_CHANNEL_CLEARED; +6700:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** } +6701:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + ARM GAS /tmp/ccMtK8ce.s page 119 + + +6702:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** /** +6703:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** * @brief TIM DMA Period Elapse complete callback. +6704:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** * @param hdma pointer to DMA handle. +6705:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** * @retval None +6706:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** */ +6707:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** static void TIM_DMAPeriodElapsedCplt(DMA_HandleTypeDef *hdma) +6708:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** { +6709:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** TIM_HandleTypeDef *htim = (TIM_HandleTypeDef *)((DMA_HandleTypeDef *)hdma)->Parent; +6710:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** +6711:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** if (htim->hdma[TIM_DMA_ID_UPDATE]->Init.Mode == DMA_NORMAL) +6712:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** { +6713:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** htim->State = HAL_TIM_STATE_READY; +6714:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** } +6715:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** +6716:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** #if (USE_HAL_TIM_REGISTER_CALLBACKS == 1) +6717:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** htim->PeriodElapsedCallback(htim); +6718:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** #else +6719:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** HAL_TIM_PeriodElapsedCallback(htim); +6720:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** #endif /* USE_HAL_TIM_REGISTER_CALLBACKS */ +6721:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** } +6722:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** +6723:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** /** +6724:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** * @brief TIM DMA Period Elapse half complete callback. +6725:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** * @param hdma pointer to DMA handle. +6726:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** * @retval None +6727:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** */ +6728:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** static void TIM_DMAPeriodElapsedHalfCplt(DMA_HandleTypeDef *hdma) +6729:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** { +6730:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** TIM_HandleTypeDef *htim = (TIM_HandleTypeDef *)((DMA_HandleTypeDef *)hdma)->Parent; +6731:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** +6732:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** #if (USE_HAL_TIM_REGISTER_CALLBACKS == 1) +6733:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** htim->PeriodElapsedHalfCpltCallback(htim); +6734:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** #else +6735:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** HAL_TIM_PeriodElapsedHalfCpltCallback(htim); +6736:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** #endif /* USE_HAL_TIM_REGISTER_CALLBACKS */ +6737:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** } +6738:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** +6739:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** /** +6740:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** * @brief TIM DMA Trigger callback. +6741:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** * @param hdma pointer to DMA handle. +6742:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** * @retval None +6743:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** */ +6744:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** static void TIM_DMATriggerCplt(DMA_HandleTypeDef *hdma) +6745:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** { +6746:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** TIM_HandleTypeDef *htim = (TIM_HandleTypeDef *)((DMA_HandleTypeDef *)hdma)->Parent; +6747:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** +6748:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** if (htim->hdma[TIM_DMA_ID_TRIGGER]->Init.Mode == DMA_NORMAL) +6749:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** { +6750:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** htim->State = HAL_TIM_STATE_READY; +6751:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** } +6752:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** +6753:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** #if (USE_HAL_TIM_REGISTER_CALLBACKS == 1) +6754:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** htim->TriggerCallback(htim); +6755:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** #else +6756:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** HAL_TIM_TriggerCallback(htim); +6757:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** #endif /* USE_HAL_TIM_REGISTER_CALLBACKS */ +6758:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** } + ARM GAS /tmp/ccMtK8ce.s page 120 + + +6759:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** +6760:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** /** +6761:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** * @brief TIM DMA Trigger half complete callback. +6762:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** * @param hdma pointer to DMA handle. +6763:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** * @retval None +6764:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** */ +6765:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** static void TIM_DMATriggerHalfCplt(DMA_HandleTypeDef *hdma) +6766:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** { +6767:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** TIM_HandleTypeDef *htim = (TIM_HandleTypeDef *)((DMA_HandleTypeDef *)hdma)->Parent; +6768:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** +6769:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** #if (USE_HAL_TIM_REGISTER_CALLBACKS == 1) +6770:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** htim->TriggerHalfCpltCallback(htim); +6771:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** #else +6772:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** HAL_TIM_TriggerHalfCpltCallback(htim); +6773:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** #endif /* USE_HAL_TIM_REGISTER_CALLBACKS */ +6774:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** } +6775:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** +6776:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** /** +6777:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** * @brief Time Base configuration +6778:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** * @param TIMx TIM peripheral +6779:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** * @param Structure TIM Base configuration structure +6780:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** * @retval None +6781:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** */ +6782:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** void TIM_Base_SetConfig(TIM_TypeDef *TIMx, const TIM_Base_InitTypeDef *Structure) +6783:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** { +6784:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** uint32_t tmpcr1; +6785:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** tmpcr1 = TIMx->CR1; +6786:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** +6787:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** /* Set TIM Time Base Unit parameters ---------------------------------------*/ +6788:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** if (IS_TIM_COUNTER_MODE_SELECT_INSTANCE(TIMx)) +6789:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** { +6790:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** /* Select the Counter Mode */ +6791:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** tmpcr1 &= ~(TIM_CR1_DIR | TIM_CR1_CMS); +6792:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** tmpcr1 |= Structure->CounterMode; +6793:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** } +6794:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** +6795:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** if (IS_TIM_CLOCK_DIVISION_INSTANCE(TIMx)) +6796:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** { +6797:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** /* Set the clock division */ +6798:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** tmpcr1 &= ~TIM_CR1_CKD; +6799:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** tmpcr1 |= (uint32_t)Structure->ClockDivision; +6800:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** } +6801:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** +6802:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** /* Set the auto-reload preload */ +6803:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** MODIFY_REG(tmpcr1, TIM_CR1_ARPE, Structure->AutoReloadPreload); +6804:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** +6805:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** TIMx->CR1 = tmpcr1; +6806:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** +6807:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** /* Set the Autoreload value */ +6808:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** TIMx->ARR = (uint32_t)Structure->Period ; +6809:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** +6810:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** /* Set the Prescaler value */ +6811:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** TIMx->PSC = Structure->Prescaler; +6812:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** +6813:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** if (IS_TIM_REPETITION_COUNTER_INSTANCE(TIMx)) +6814:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** { +6815:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** /* Set the Repetition Counter value */ + ARM GAS /tmp/ccMtK8ce.s page 121 + + +6816:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** TIMx->RCR = Structure->RepetitionCounter; +6817:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** } +6818:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** +6819:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** /* Generate an update event to reload the Prescaler +6820:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** and the repetition counter (only for advanced timer) value immediately */ +6821:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** TIMx->EGR = TIM_EGR_UG; +6822:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** } +6823:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** +6824:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** /** +6825:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** * @brief Timer Output Compare 1 configuration +6826:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** * @param TIMx to select the TIM peripheral +6827:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** * @param OC_Config The output configuration structure +6828:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** * @retval None +6829:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** */ +6830:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** static void TIM_OC1_SetConfig(TIM_TypeDef *TIMx, const TIM_OC_InitTypeDef *OC_Config) +6831:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** { + 27 .loc 1 6831 1 view -0 + 28 .cfi_startproc + 29 @ args = 0, pretend = 0, frame = 0 + 30 @ frame_needed = 0, uses_anonymous_args = 0 + 31 .loc 1 6831 1 is_stmt 0 view .LVU1 + 32 0000 30B5 push {r4, r5, lr} + 33 .cfi_def_cfa_offset 12 + 34 .cfi_offset 4, -12 + 35 .cfi_offset 5, -8 + 36 .cfi_offset 14, -4 +6832:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** uint32_t tmpccmrx; + 37 .loc 1 6832 3 is_stmt 1 view .LVU2 +6833:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** uint32_t tmpccer; + 38 .loc 1 6833 3 view .LVU3 +6834:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** uint32_t tmpcr2; + 39 .loc 1 6834 3 view .LVU4 +6835:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** +6836:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** /* Disable the Channel 1: Reset the CC1E Bit */ +6837:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** TIMx->CCER &= ~TIM_CCER_CC1E; + 40 .loc 1 6837 3 view .LVU5 + 41 .loc 1 6837 7 is_stmt 0 view .LVU6 + 42 0002 036A ldr r3, [r0, #32] + 43 .loc 1 6837 14 view .LVU7 + 44 0004 0122 movs r2, #1 + 45 0006 9343 bics r3, r2 + 46 0008 0362 str r3, [r0, #32] +6838:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** +6839:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** /* Get the TIMx CCER register value */ +6840:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** tmpccer = TIMx->CCER; + 47 .loc 1 6840 3 is_stmt 1 view .LVU8 + 48 .loc 1 6840 11 is_stmt 0 view .LVU9 + 49 000a 056A ldr r5, [r0, #32] + 50 .LVL1: +6841:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** /* Get the TIMx CR2 register value */ +6842:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** tmpcr2 = TIMx->CR2; + 51 .loc 1 6842 3 is_stmt 1 view .LVU10 + 52 .loc 1 6842 10 is_stmt 0 view .LVU11 + 53 000c 4268 ldr r2, [r0, #4] + 54 .LVL2: +6843:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** +6844:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** /* Get the TIMx CCMR1 register value */ + ARM GAS /tmp/ccMtK8ce.s page 122 + + +6845:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** tmpccmrx = TIMx->CCMR1; + 55 .loc 1 6845 3 is_stmt 1 view .LVU12 + 56 .loc 1 6845 12 is_stmt 0 view .LVU13 + 57 000e 8369 ldr r3, [r0, #24] + 58 .LVL3: +6846:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** +6847:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** /* Reset the Output Compare Mode Bits */ +6848:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** tmpccmrx &= ~TIM_CCMR1_OC1M; + 59 .loc 1 6848 3 is_stmt 1 view .LVU14 +6849:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** tmpccmrx &= ~TIM_CCMR1_CC1S; + 60 .loc 1 6849 3 view .LVU15 + 61 .loc 1 6849 12 is_stmt 0 view .LVU16 + 62 0010 7324 movs r4, #115 + 63 0012 A343 bics r3, r4 + 64 .LVL4: +6850:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** /* Select the Output Compare Mode */ +6851:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** tmpccmrx |= OC_Config->OCMode; + 65 .loc 1 6851 3 is_stmt 1 view .LVU17 + 66 .loc 1 6851 24 is_stmt 0 view .LVU18 + 67 0014 0C68 ldr r4, [r1] + 68 .loc 1 6851 12 view .LVU19 + 69 0016 1C43 orrs r4, r3 + 70 .LVL5: +6852:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** +6853:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** /* Reset the Output Polarity level */ +6854:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** tmpccer &= ~TIM_CCER_CC1P; + 71 .loc 1 6854 3 is_stmt 1 view .LVU20 + 72 .loc 1 6854 11 is_stmt 0 view .LVU21 + 73 0018 0223 movs r3, #2 + 74 001a 9D43 bics r5, r3 + 75 .LVL6: +6855:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** /* Set the Output Compare Polarity */ +6856:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** tmpccer |= OC_Config->OCPolarity; + 76 .loc 1 6856 3 is_stmt 1 view .LVU22 + 77 .loc 1 6856 23 is_stmt 0 view .LVU23 + 78 001c 8B68 ldr r3, [r1, #8] + 79 .loc 1 6856 11 view .LVU24 + 80 001e 2B43 orrs r3, r5 + 81 .LVL7: +6857:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** +6858:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** if (IS_TIM_CCXN_INSTANCE(TIMx, TIM_CHANNEL_1)) + 82 .loc 1 6858 3 is_stmt 1 view .LVU25 + 83 .loc 1 6858 6 is_stmt 0 view .LVU26 + 84 0020 124D ldr r5, .L6 + 85 0022 A842 cmp r0, r5 + 86 0024 05D0 beq .L2 + 87 .loc 1 6858 7 discriminator 1 view .LVU27 + 88 0026 124D ldr r5, .L6+4 + 89 0028 A842 cmp r0, r5 + 90 002a 02D0 beq .L2 + 91 .loc 1 6858 7 discriminator 2 view .LVU28 + 92 002c 114D ldr r5, .L6+8 + 93 002e A842 cmp r0, r5 + 94 0030 06D1 bne .L3 + 95 .L2: +6859:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** { +6860:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** /* Check parameters */ + ARM GAS /tmp/ccMtK8ce.s page 123 + + +6861:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** assert_param(IS_TIM_OCN_POLARITY(OC_Config->OCNPolarity)); + 96 .loc 1 6861 5 is_stmt 1 view .LVU29 +6862:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** +6863:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** /* Reset the Output N Polarity level */ +6864:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** tmpccer &= ~TIM_CCER_CC1NP; + 97 .loc 1 6864 5 view .LVU30 + 98 .loc 1 6864 13 is_stmt 0 view .LVU31 + 99 0032 0825 movs r5, #8 + 100 0034 AB43 bics r3, r5 + 101 .LVL8: + 102 .loc 1 6864 13 view .LVU32 + 103 0036 1D00 movs r5, r3 + 104 .LVL9: +6865:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** /* Set the Output N Polarity */ +6866:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** tmpccer |= OC_Config->OCNPolarity; + 105 .loc 1 6866 5 is_stmt 1 view .LVU33 + 106 .loc 1 6866 25 is_stmt 0 view .LVU34 + 107 0038 CB68 ldr r3, [r1, #12] + 108 .LVL10: + 109 .loc 1 6866 13 view .LVU35 + 110 003a 2B43 orrs r3, r5 + 111 .LVL11: +6867:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** /* Reset the Output N State */ +6868:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** tmpccer &= ~TIM_CCER_CC1NE; + 112 .loc 1 6868 5 is_stmt 1 view .LVU36 + 113 .loc 1 6868 13 is_stmt 0 view .LVU37 + 114 003c 0425 movs r5, #4 + 115 003e AB43 bics r3, r5 + 116 .LVL12: + 117 .L3: +6869:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** } +6870:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** +6871:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** if (IS_TIM_BREAK_INSTANCE(TIMx)) + 118 .loc 1 6871 3 is_stmt 1 view .LVU38 + 119 .loc 1 6871 6 is_stmt 0 view .LVU39 + 120 0040 0A4D ldr r5, .L6 + 121 0042 A842 cmp r0, r5 + 122 0044 05D0 beq .L4 + 123 .loc 1 6871 7 discriminator 1 view .LVU40 + 124 0046 0A4D ldr r5, .L6+4 + 125 0048 A842 cmp r0, r5 + 126 004a 02D0 beq .L4 + 127 .loc 1 6871 7 discriminator 2 view .LVU41 + 128 004c 094D ldr r5, .L6+8 + 129 004e A842 cmp r0, r5 + 130 0050 05D1 bne .L5 + 131 .L4: +6872:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** { +6873:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** /* Check parameters */ +6874:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** assert_param(IS_TIM_OCNIDLE_STATE(OC_Config->OCNIdleState)); + 132 .loc 1 6874 5 is_stmt 1 view .LVU42 +6875:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** assert_param(IS_TIM_OCIDLE_STATE(OC_Config->OCIdleState)); + 133 .loc 1 6875 5 view .LVU43 +6876:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** +6877:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** /* Reset the Output Compare and Output Compare N IDLE State */ +6878:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** tmpcr2 &= ~TIM_CR2_OIS1; + 134 .loc 1 6878 5 view .LVU44 + ARM GAS /tmp/ccMtK8ce.s page 124 + + + 135 .LVL13: +6879:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** tmpcr2 &= ~TIM_CR2_OIS1N; + 136 .loc 1 6879 5 view .LVU45 + 137 .loc 1 6879 12 is_stmt 0 view .LVU46 + 138 0052 094D ldr r5, .L6+12 + 139 0054 2A40 ands r2, r5 + 140 .LVL14: +6880:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** /* Set the Output Idle state */ +6881:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** tmpcr2 |= OC_Config->OCIdleState; + 141 .loc 1 6881 5 is_stmt 1 view .LVU47 + 142 .loc 1 6881 24 is_stmt 0 view .LVU48 + 143 0056 4D69 ldr r5, [r1, #20] + 144 .loc 1 6881 12 view .LVU49 + 145 0058 1543 orrs r5, r2 + 146 .LVL15: +6882:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** /* Set the Output N Idle state */ +6883:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** tmpcr2 |= OC_Config->OCNIdleState; + 147 .loc 1 6883 5 is_stmt 1 view .LVU50 + 148 .loc 1 6883 24 is_stmt 0 view .LVU51 + 149 005a 8A69 ldr r2, [r1, #24] + 150 .loc 1 6883 12 view .LVU52 + 151 005c 2A43 orrs r2, r5 + 152 .LVL16: + 153 .L5: +6884:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** } +6885:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** +6886:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** /* Write to TIMx CR2 */ +6887:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** TIMx->CR2 = tmpcr2; + 154 .loc 1 6887 3 is_stmt 1 view .LVU53 + 155 .loc 1 6887 13 is_stmt 0 view .LVU54 + 156 005e 4260 str r2, [r0, #4] +6888:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** +6889:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** /* Write to TIMx CCMR1 */ +6890:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** TIMx->CCMR1 = tmpccmrx; + 157 .loc 1 6890 3 is_stmt 1 view .LVU55 + 158 .loc 1 6890 15 is_stmt 0 view .LVU56 + 159 0060 8461 str r4, [r0, #24] +6891:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** +6892:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** /* Set the Capture Compare Register value */ +6893:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** TIMx->CCR1 = OC_Config->Pulse; + 160 .loc 1 6893 3 is_stmt 1 view .LVU57 + 161 .loc 1 6893 25 is_stmt 0 view .LVU58 + 162 0062 4A68 ldr r2, [r1, #4] + 163 .LVL17: + 164 .loc 1 6893 14 view .LVU59 + 165 0064 4263 str r2, [r0, #52] +6894:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** +6895:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** /* Write to TIMx CCER */ +6896:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** TIMx->CCER = tmpccer; + 166 .loc 1 6896 3 is_stmt 1 view .LVU60 + 167 .loc 1 6896 14 is_stmt 0 view .LVU61 + 168 0066 0362 str r3, [r0, #32] +6897:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** } + 169 .loc 1 6897 1 view .LVU62 + 170 @ sp needed + 171 .LVL18: + 172 .loc 1 6897 1 view .LVU63 + ARM GAS /tmp/ccMtK8ce.s page 125 + + + 173 0068 30BD pop {r4, r5, pc} + 174 .L7: + 175 006a C046 .align 2 + 176 .L6: + 177 006c 002C0140 .word 1073818624 + 178 0070 00440140 .word 1073824768 + 179 0074 00480140 .word 1073825792 + 180 0078 FFFCFFFF .word -769 + 181 .cfi_endproc + 182 .LFE145: + 184 .section .text.TIM_OC3_SetConfig,"ax",%progbits + 185 .align 1 + 186 .syntax unified + 187 .code 16 + 188 .thumb_func + 190 TIM_OC3_SetConfig: + 191 .LVL19: + 192 .LFB147: +6898:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** +6899:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** /** +6900:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** * @brief Timer Output Compare 2 configuration +6901:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** * @param TIMx to select the TIM peripheral +6902:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** * @param OC_Config The output configuration structure +6903:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** * @retval None +6904:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** */ +6905:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** void TIM_OC2_SetConfig(TIM_TypeDef *TIMx, const TIM_OC_InitTypeDef *OC_Config) +6906:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** { +6907:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** uint32_t tmpccmrx; +6908:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** uint32_t tmpccer; +6909:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** uint32_t tmpcr2; +6910:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** +6911:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** /* Disable the Channel 2: Reset the CC2E Bit */ +6912:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** TIMx->CCER &= ~TIM_CCER_CC2E; +6913:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** +6914:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** /* Get the TIMx CCER register value */ +6915:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** tmpccer = TIMx->CCER; +6916:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** /* Get the TIMx CR2 register value */ +6917:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** tmpcr2 = TIMx->CR2; +6918:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** +6919:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** /* Get the TIMx CCMR1 register value */ +6920:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** tmpccmrx = TIMx->CCMR1; +6921:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** +6922:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** /* Reset the Output Compare mode and Capture/Compare selection Bits */ +6923:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** tmpccmrx &= ~TIM_CCMR1_OC2M; +6924:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** tmpccmrx &= ~TIM_CCMR1_CC2S; +6925:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** +6926:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** /* Select the Output Compare Mode */ +6927:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** tmpccmrx |= (OC_Config->OCMode << 8U); +6928:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** +6929:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** /* Reset the Output Polarity level */ +6930:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** tmpccer &= ~TIM_CCER_CC2P; +6931:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** /* Set the Output Compare Polarity */ +6932:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** tmpccer |= (OC_Config->OCPolarity << 4U); +6933:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** +6934:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** if (IS_TIM_CCXN_INSTANCE(TIMx, TIM_CHANNEL_2)) +6935:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** { +6936:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** assert_param(IS_TIM_OCN_POLARITY(OC_Config->OCNPolarity)); + ARM GAS /tmp/ccMtK8ce.s page 126 + + +6937:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** +6938:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** /* Reset the Output N Polarity level */ +6939:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** tmpccer &= ~TIM_CCER_CC2NP; +6940:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** /* Set the Output N Polarity */ +6941:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** tmpccer |= (OC_Config->OCNPolarity << 4U); +6942:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** /* Reset the Output N State */ +6943:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** tmpccer &= ~TIM_CCER_CC2NE; +6944:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** +6945:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** } +6946:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** +6947:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** if (IS_TIM_BREAK_INSTANCE(TIMx)) +6948:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** { +6949:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** /* Check parameters */ +6950:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** assert_param(IS_TIM_OCNIDLE_STATE(OC_Config->OCNIdleState)); +6951:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** assert_param(IS_TIM_OCIDLE_STATE(OC_Config->OCIdleState)); +6952:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** +6953:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** /* Reset the Output Compare and Output Compare N IDLE State */ +6954:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** tmpcr2 &= ~TIM_CR2_OIS2; +6955:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** tmpcr2 &= ~TIM_CR2_OIS2N; +6956:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** /* Set the Output Idle state */ +6957:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** tmpcr2 |= (OC_Config->OCIdleState << 2U); +6958:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** /* Set the Output N Idle state */ +6959:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** tmpcr2 |= (OC_Config->OCNIdleState << 2U); +6960:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** } +6961:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** +6962:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** /* Write to TIMx CR2 */ +6963:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** TIMx->CR2 = tmpcr2; +6964:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** +6965:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** /* Write to TIMx CCMR1 */ +6966:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** TIMx->CCMR1 = tmpccmrx; +6967:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** +6968:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** /* Set the Capture Compare Register value */ +6969:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** TIMx->CCR2 = OC_Config->Pulse; +6970:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** +6971:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** /* Write to TIMx CCER */ +6972:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** TIMx->CCER = tmpccer; +6973:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** } +6974:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** +6975:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** /** +6976:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** * @brief Timer Output Compare 3 configuration +6977:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** * @param TIMx to select the TIM peripheral +6978:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** * @param OC_Config The output configuration structure +6979:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** * @retval None +6980:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** */ +6981:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** static void TIM_OC3_SetConfig(TIM_TypeDef *TIMx, const TIM_OC_InitTypeDef *OC_Config) +6982:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** { + 193 .loc 1 6982 1 is_stmt 1 view -0 + 194 .cfi_startproc + 195 @ args = 0, pretend = 0, frame = 0 + 196 @ frame_needed = 0, uses_anonymous_args = 0 + 197 .loc 1 6982 1 is_stmt 0 view .LVU65 + 198 0000 30B5 push {r4, r5, lr} + 199 .cfi_def_cfa_offset 12 + 200 .cfi_offset 4, -12 + 201 .cfi_offset 5, -8 + 202 .cfi_offset 14, -4 +6983:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** uint32_t tmpccmrx; + ARM GAS /tmp/ccMtK8ce.s page 127 + + + 203 .loc 1 6983 3 is_stmt 1 view .LVU66 +6984:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** uint32_t tmpccer; + 204 .loc 1 6984 3 view .LVU67 +6985:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** uint32_t tmpcr2; + 205 .loc 1 6985 3 view .LVU68 +6986:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** +6987:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** /* Disable the Channel 3: Reset the CC2E Bit */ +6988:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** TIMx->CCER &= ~TIM_CCER_CC3E; + 206 .loc 1 6988 3 view .LVU69 + 207 .loc 1 6988 7 is_stmt 0 view .LVU70 + 208 0002 036A ldr r3, [r0, #32] + 209 .loc 1 6988 14 view .LVU71 + 210 0004 164A ldr r2, .L13 + 211 0006 1340 ands r3, r2 + 212 0008 0362 str r3, [r0, #32] +6989:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** +6990:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** /* Get the TIMx CCER register value */ +6991:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** tmpccer = TIMx->CCER; + 213 .loc 1 6991 3 is_stmt 1 view .LVU72 + 214 .loc 1 6991 11 is_stmt 0 view .LVU73 + 215 000a 046A ldr r4, [r0, #32] + 216 .LVL20: +6992:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** /* Get the TIMx CR2 register value */ +6993:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** tmpcr2 = TIMx->CR2; + 217 .loc 1 6993 3 is_stmt 1 view .LVU74 + 218 .loc 1 6993 10 is_stmt 0 view .LVU75 + 219 000c 4268 ldr r2, [r0, #4] + 220 .LVL21: +6994:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** +6995:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** /* Get the TIMx CCMR2 register value */ +6996:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** tmpccmrx = TIMx->CCMR2; + 221 .loc 1 6996 3 is_stmt 1 view .LVU76 + 222 .loc 1 6996 12 is_stmt 0 view .LVU77 + 223 000e C369 ldr r3, [r0, #28] + 224 .LVL22: +6997:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** +6998:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** /* Reset the Output Compare mode and Capture/Compare selection Bits */ +6999:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** tmpccmrx &= ~TIM_CCMR2_OC3M; + 225 .loc 1 6999 3 is_stmt 1 view .LVU78 +7000:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** tmpccmrx &= ~TIM_CCMR2_CC3S; + 226 .loc 1 7000 3 view .LVU79 + 227 .loc 1 7000 12 is_stmt 0 view .LVU80 + 228 0010 7325 movs r5, #115 + 229 0012 AB43 bics r3, r5 + 230 .LVL23: +7001:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** /* Select the Output Compare Mode */ +7002:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** tmpccmrx |= OC_Config->OCMode; + 231 .loc 1 7002 3 is_stmt 1 view .LVU81 + 232 .loc 1 7002 24 is_stmt 0 view .LVU82 + 233 0014 0D68 ldr r5, [r1] + 234 .loc 1 7002 12 view .LVU83 + 235 0016 1D43 orrs r5, r3 + 236 .LVL24: +7003:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** +7004:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** /* Reset the Output Polarity level */ +7005:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** tmpccer &= ~TIM_CCER_CC3P; + 237 .loc 1 7005 3 is_stmt 1 view .LVU84 + ARM GAS /tmp/ccMtK8ce.s page 128 + + + 238 .loc 1 7005 11 is_stmt 0 view .LVU85 + 239 0018 124B ldr r3, .L13+4 + 240 001a 1C40 ands r4, r3 + 241 .LVL25: +7006:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** /* Set the Output Compare Polarity */ +7007:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** tmpccer |= (OC_Config->OCPolarity << 8U); + 242 .loc 1 7007 3 is_stmt 1 view .LVU86 + 243 .loc 1 7007 24 is_stmt 0 view .LVU87 + 244 001c 8B68 ldr r3, [r1, #8] + 245 .loc 1 7007 37 view .LVU88 + 246 001e 1B02 lsls r3, r3, #8 + 247 .loc 1 7007 11 view .LVU89 + 248 0020 2343 orrs r3, r4 + 249 .LVL26: +7008:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** +7009:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** if (IS_TIM_CCXN_INSTANCE(TIMx, TIM_CHANNEL_3)) + 250 .loc 1 7009 3 is_stmt 1 view .LVU90 + 251 .loc 1 7009 6 is_stmt 0 view .LVU91 + 252 0022 114C ldr r4, .L13+8 + 253 0024 A042 cmp r0, r4 + 254 0026 06D0 beq .L12 +7010:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** { +7011:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** assert_param(IS_TIM_OCN_POLARITY(OC_Config->OCNPolarity)); +7012:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** +7013:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** /* Reset the Output N Polarity level */ +7014:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** tmpccer &= ~TIM_CCER_CC3NP; +7015:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** /* Set the Output N Polarity */ +7016:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** tmpccer |= (OC_Config->OCNPolarity << 8U); +7017:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** /* Reset the Output N State */ +7018:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** tmpccer &= ~TIM_CCER_CC3NE; +7019:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** } +7020:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** +7021:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** if (IS_TIM_BREAK_INSTANCE(TIMx)) + 255 .loc 1 7021 3 is_stmt 1 view .LVU92 + 256 .loc 1 7021 7 is_stmt 0 discriminator 1 view .LVU93 + 257 0028 104C ldr r4, .L13+12 + 258 002a A042 cmp r0, r4 + 259 002c 0AD0 beq .L10 + 260 .loc 1 7021 7 discriminator 2 view .LVU94 + 261 002e 104C ldr r4, .L13+16 + 262 0030 A042 cmp r0, r4 + 263 0032 0FD1 bne .L11 + 264 0034 06E0 b .L10 + 265 .L12: +7011:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 266 .loc 1 7011 5 is_stmt 1 view .LVU95 +7014:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** /* Set the Output N Polarity */ + 267 .loc 1 7014 5 view .LVU96 +7014:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** /* Set the Output N Polarity */ + 268 .loc 1 7014 13 is_stmt 0 view .LVU97 + 269 0036 0F4C ldr r4, .L13+20 + 270 0038 1C40 ands r4, r3 + 271 .LVL27: +7016:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** /* Reset the Output N State */ + 272 .loc 1 7016 5 is_stmt 1 view .LVU98 +7016:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** /* Reset the Output N State */ + 273 .loc 1 7016 26 is_stmt 0 view .LVU99 + ARM GAS /tmp/ccMtK8ce.s page 129 + + + 274 003a CB68 ldr r3, [r1, #12] +7016:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** /* Reset the Output N State */ + 275 .loc 1 7016 40 view .LVU100 + 276 003c 1B02 lsls r3, r3, #8 +7016:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** /* Reset the Output N State */ + 277 .loc 1 7016 13 view .LVU101 + 278 003e 2343 orrs r3, r4 + 279 .LVL28: +7018:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** } + 280 .loc 1 7018 5 is_stmt 1 view .LVU102 +7018:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** } + 281 .loc 1 7018 13 is_stmt 0 view .LVU103 + 282 0040 0D4C ldr r4, .L13+24 + 283 0042 2340 ands r3, r4 + 284 .LVL29: + 285 .loc 1 7021 3 is_stmt 1 view .LVU104 + 286 .L10: +7022:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** { +7023:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** /* Check parameters */ +7024:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** assert_param(IS_TIM_OCNIDLE_STATE(OC_Config->OCNIdleState)); + 287 .loc 1 7024 5 view .LVU105 +7025:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** assert_param(IS_TIM_OCIDLE_STATE(OC_Config->OCIdleState)); + 288 .loc 1 7025 5 view .LVU106 +7026:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** +7027:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** /* Reset the Output Compare and Output Compare N IDLE State */ +7028:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** tmpcr2 &= ~TIM_CR2_OIS3; + 289 .loc 1 7028 5 view .LVU107 +7029:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** tmpcr2 &= ~TIM_CR2_OIS3N; + 290 .loc 1 7029 5 view .LVU108 + 291 .loc 1 7029 12 is_stmt 0 view .LVU109 + 292 0044 0D4C ldr r4, .L13+28 + 293 0046 2240 ands r2, r4 + 294 .LVL30: +7030:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** /* Set the Output Idle state */ +7031:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** tmpcr2 |= (OC_Config->OCIdleState << 4U); + 295 .loc 1 7031 5 is_stmt 1 view .LVU110 + 296 .loc 1 7031 25 is_stmt 0 view .LVU111 + 297 0048 4C69 ldr r4, [r1, #20] + 298 .loc 1 7031 39 view .LVU112 + 299 004a 2401 lsls r4, r4, #4 + 300 .loc 1 7031 12 view .LVU113 + 301 004c 1443 orrs r4, r2 + 302 .LVL31: +7032:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** /* Set the Output N Idle state */ +7033:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** tmpcr2 |= (OC_Config->OCNIdleState << 4U); + 303 .loc 1 7033 5 is_stmt 1 view .LVU114 + 304 .loc 1 7033 25 is_stmt 0 view .LVU115 + 305 004e 8A69 ldr r2, [r1, #24] + 306 .loc 1 7033 40 view .LVU116 + 307 0050 1201 lsls r2, r2, #4 + 308 .loc 1 7033 12 view .LVU117 + 309 0052 2243 orrs r2, r4 + 310 .LVL32: + 311 .L11: +7034:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** } +7035:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** +7036:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** /* Write to TIMx CR2 */ + ARM GAS /tmp/ccMtK8ce.s page 130 + + +7037:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** TIMx->CR2 = tmpcr2; + 312 .loc 1 7037 3 is_stmt 1 view .LVU118 + 313 .loc 1 7037 13 is_stmt 0 view .LVU119 + 314 0054 4260 str r2, [r0, #4] +7038:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** +7039:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** /* Write to TIMx CCMR2 */ +7040:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** TIMx->CCMR2 = tmpccmrx; + 315 .loc 1 7040 3 is_stmt 1 view .LVU120 + 316 .loc 1 7040 15 is_stmt 0 view .LVU121 + 317 0056 C561 str r5, [r0, #28] +7041:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** +7042:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** /* Set the Capture Compare Register value */ +7043:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** TIMx->CCR3 = OC_Config->Pulse; + 318 .loc 1 7043 3 is_stmt 1 view .LVU122 + 319 .loc 1 7043 25 is_stmt 0 view .LVU123 + 320 0058 4A68 ldr r2, [r1, #4] + 321 .LVL33: + 322 .loc 1 7043 14 view .LVU124 + 323 005a C263 str r2, [r0, #60] +7044:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** +7045:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** /* Write to TIMx CCER */ +7046:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** TIMx->CCER = tmpccer; + 324 .loc 1 7046 3 is_stmt 1 view .LVU125 + 325 .loc 1 7046 14 is_stmt 0 view .LVU126 + 326 005c 0362 str r3, [r0, #32] +7047:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** } + 327 .loc 1 7047 1 view .LVU127 + 328 @ sp needed + 329 .LVL34: + 330 .loc 1 7047 1 view .LVU128 + 331 005e 30BD pop {r4, r5, pc} + 332 .L14: + 333 .align 2 + 334 .L13: + 335 0060 FFFEFFFF .word -257 + 336 0064 FFFDFFFF .word -513 + 337 0068 002C0140 .word 1073818624 + 338 006c 00440140 .word 1073824768 + 339 0070 00480140 .word 1073825792 + 340 0074 FFF7FFFF .word -2049 + 341 0078 FFFBFFFF .word -1025 + 342 007c FFCFFFFF .word -12289 + 343 .cfi_endproc + 344 .LFE147: + 346 .section .text.TIM_OC4_SetConfig,"ax",%progbits + 347 .align 1 + 348 .syntax unified + 349 .code 16 + 350 .thumb_func + 352 TIM_OC4_SetConfig: + 353 .LVL35: + 354 .LFB148: +7048:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** +7049:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** /** +7050:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** * @brief Timer Output Compare 4 configuration +7051:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** * @param TIMx to select the TIM peripheral +7052:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** * @param OC_Config The output configuration structure + ARM GAS /tmp/ccMtK8ce.s page 131 + + +7053:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** * @retval None +7054:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** */ +7055:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** static void TIM_OC4_SetConfig(TIM_TypeDef *TIMx, const TIM_OC_InitTypeDef *OC_Config) +7056:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** { + 355 .loc 1 7056 1 is_stmt 1 view -0 + 356 .cfi_startproc + 357 @ args = 0, pretend = 0, frame = 0 + 358 @ frame_needed = 0, uses_anonymous_args = 0 + 359 .loc 1 7056 1 is_stmt 0 view .LVU130 + 360 0000 30B5 push {r4, r5, lr} + 361 .cfi_def_cfa_offset 12 + 362 .cfi_offset 4, -12 + 363 .cfi_offset 5, -8 + 364 .cfi_offset 14, -4 +7057:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** uint32_t tmpccmrx; + 365 .loc 1 7057 3 is_stmt 1 view .LVU131 +7058:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** uint32_t tmpccer; + 366 .loc 1 7058 3 view .LVU132 +7059:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** uint32_t tmpcr2; + 367 .loc 1 7059 3 view .LVU133 +7060:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** +7061:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** /* Disable the Channel 4: Reset the CC4E Bit */ +7062:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** TIMx->CCER &= ~TIM_CCER_CC4E; + 368 .loc 1 7062 3 view .LVU134 + 369 .loc 1 7062 7 is_stmt 0 view .LVU135 + 370 0002 036A ldr r3, [r0, #32] + 371 .loc 1 7062 14 view .LVU136 + 372 0004 114A ldr r2, .L18 + 373 0006 1340 ands r3, r2 + 374 0008 0362 str r3, [r0, #32] +7063:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** +7064:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** /* Get the TIMx CCER register value */ +7065:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** tmpccer = TIMx->CCER; + 375 .loc 1 7065 3 is_stmt 1 view .LVU137 + 376 .loc 1 7065 11 is_stmt 0 view .LVU138 + 377 000a 046A ldr r4, [r0, #32] + 378 .LVL36: +7066:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** /* Get the TIMx CR2 register value */ +7067:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** tmpcr2 = TIMx->CR2; + 379 .loc 1 7067 3 is_stmt 1 view .LVU139 + 380 .loc 1 7067 10 is_stmt 0 view .LVU140 + 381 000c 4568 ldr r5, [r0, #4] + 382 .LVL37: +7068:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** +7069:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** /* Get the TIMx CCMR2 register value */ +7070:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** tmpccmrx = TIMx->CCMR2; + 383 .loc 1 7070 3 is_stmt 1 view .LVU141 + 384 .loc 1 7070 12 is_stmt 0 view .LVU142 + 385 000e C369 ldr r3, [r0, #28] + 386 .LVL38: +7071:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** +7072:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** /* Reset the Output Compare mode and Capture/Compare selection Bits */ +7073:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** tmpccmrx &= ~TIM_CCMR2_OC4M; + 387 .loc 1 7073 3 is_stmt 1 view .LVU143 +7074:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** tmpccmrx &= ~TIM_CCMR2_CC4S; + 388 .loc 1 7074 3 view .LVU144 + 389 .loc 1 7074 12 is_stmt 0 view .LVU145 + ARM GAS /tmp/ccMtK8ce.s page 132 + + + 390 0010 0F4A ldr r2, .L18+4 + 391 0012 1340 ands r3, r2 + 392 .LVL39: +7075:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** +7076:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** /* Select the Output Compare Mode */ +7077:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** tmpccmrx |= (OC_Config->OCMode << 8U); + 393 .loc 1 7077 3 is_stmt 1 view .LVU146 + 394 .loc 1 7077 25 is_stmt 0 view .LVU147 + 395 0014 0A68 ldr r2, [r1] + 396 .loc 1 7077 34 view .LVU148 + 397 0016 1202 lsls r2, r2, #8 + 398 .loc 1 7077 12 view .LVU149 + 399 0018 1A43 orrs r2, r3 + 400 .LVL40: +7078:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** +7079:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** /* Reset the Output Polarity level */ +7080:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** tmpccer &= ~TIM_CCER_CC4P; + 401 .loc 1 7080 3 is_stmt 1 view .LVU150 + 402 .loc 1 7080 11 is_stmt 0 view .LVU151 + 403 001a 0E4B ldr r3, .L18+8 + 404 001c 1C40 ands r4, r3 + 405 .LVL41: +7081:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** /* Set the Output Compare Polarity */ +7082:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** tmpccer |= (OC_Config->OCPolarity << 12U); + 406 .loc 1 7082 3 is_stmt 1 view .LVU152 + 407 .loc 1 7082 24 is_stmt 0 view .LVU153 + 408 001e 8B68 ldr r3, [r1, #8] + 409 .loc 1 7082 37 view .LVU154 + 410 0020 1B03 lsls r3, r3, #12 + 411 .loc 1 7082 11 view .LVU155 + 412 0022 2343 orrs r3, r4 + 413 .LVL42: +7083:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** +7084:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** if (IS_TIM_BREAK_INSTANCE(TIMx)) + 414 .loc 1 7084 3 is_stmt 1 view .LVU156 + 415 .loc 1 7084 6 is_stmt 0 view .LVU157 + 416 0024 0C4C ldr r4, .L18+12 + 417 0026 A042 cmp r0, r4 + 418 0028 05D0 beq .L16 + 419 .loc 1 7084 7 discriminator 1 view .LVU158 + 420 002a 0C4C ldr r4, .L18+16 + 421 002c A042 cmp r0, r4 + 422 002e 02D0 beq .L16 + 423 .loc 1 7084 7 discriminator 2 view .LVU159 + 424 0030 0B4C ldr r4, .L18+20 + 425 0032 A042 cmp r0, r4 + 426 0034 04D1 bne .L17 + 427 .L16: +7085:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** { +7086:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** /* Check parameters */ +7087:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** assert_param(IS_TIM_OCIDLE_STATE(OC_Config->OCIdleState)); + 428 .loc 1 7087 5 is_stmt 1 view .LVU160 +7088:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** +7089:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** /* Reset the Output Compare IDLE State */ +7090:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** tmpcr2 &= ~TIM_CR2_OIS4; + 429 .loc 1 7090 5 view .LVU161 + 430 .loc 1 7090 12 is_stmt 0 view .LVU162 + ARM GAS /tmp/ccMtK8ce.s page 133 + + + 431 0036 0B4C ldr r4, .L18+24 + 432 0038 2C40 ands r4, r5 + 433 .LVL43: +7091:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** +7092:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** /* Set the Output Idle state */ +7093:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** tmpcr2 |= (OC_Config->OCIdleState << 6U); + 434 .loc 1 7093 5 is_stmt 1 view .LVU163 + 435 .loc 1 7093 25 is_stmt 0 view .LVU164 + 436 003a 4D69 ldr r5, [r1, #20] + 437 .loc 1 7093 39 view .LVU165 + 438 003c AD01 lsls r5, r5, #6 + 439 .loc 1 7093 12 view .LVU166 + 440 003e 2543 orrs r5, r4 + 441 .LVL44: + 442 .L17: +7094:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** } +7095:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** +7096:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** /* Write to TIMx CR2 */ +7097:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** TIMx->CR2 = tmpcr2; + 443 .loc 1 7097 3 is_stmt 1 view .LVU167 + 444 .loc 1 7097 13 is_stmt 0 view .LVU168 + 445 0040 4560 str r5, [r0, #4] +7098:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** +7099:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** /* Write to TIMx CCMR2 */ +7100:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** TIMx->CCMR2 = tmpccmrx; + 446 .loc 1 7100 3 is_stmt 1 view .LVU169 + 447 .loc 1 7100 15 is_stmt 0 view .LVU170 + 448 0042 C261 str r2, [r0, #28] +7101:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** +7102:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** /* Set the Capture Compare Register value */ +7103:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** TIMx->CCR4 = OC_Config->Pulse; + 449 .loc 1 7103 3 is_stmt 1 view .LVU171 + 450 .loc 1 7103 25 is_stmt 0 view .LVU172 + 451 0044 4A68 ldr r2, [r1, #4] + 452 .LVL45: + 453 .loc 1 7103 14 view .LVU173 + 454 0046 0264 str r2, [r0, #64] + 455 .LVL46: +7104:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** +7105:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** /* Write to TIMx CCER */ +7106:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** TIMx->CCER = tmpccer; + 456 .loc 1 7106 3 is_stmt 1 view .LVU174 + 457 .loc 1 7106 14 is_stmt 0 view .LVU175 + 458 0048 0362 str r3, [r0, #32] +7107:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** } + 459 .loc 1 7107 1 view .LVU176 + 460 @ sp needed + 461 .LVL47: + 462 .loc 1 7107 1 view .LVU177 + 463 004a 30BD pop {r4, r5, pc} + 464 .L19: + 465 .align 2 + 466 .L18: + 467 004c FFEFFFFF .word -4097 + 468 0050 FF8CFFFF .word -29441 + 469 0054 FFDFFFFF .word -8193 + 470 0058 002C0140 .word 1073818624 + ARM GAS /tmp/ccMtK8ce.s page 134 + + + 471 005c 00440140 .word 1073824768 + 472 0060 00480140 .word 1073825792 + 473 0064 FFBFFFFF .word -16385 + 474 .cfi_endproc + 475 .LFE148: + 477 .section .text.TIM_TI1_ConfigInputStage,"ax",%progbits + 478 .align 1 + 479 .syntax unified + 480 .code 16 + 481 .thumb_func + 483 TIM_TI1_ConfigInputStage: + 484 .LVL48: + 485 .LFB151: +7108:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** +7109:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** /** +7110:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** * @brief Slave Timer configuration function +7111:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** * @param htim TIM handle +7112:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** * @param sSlaveConfig Slave timer configuration +7113:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** * @retval None +7114:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** */ +7115:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** static HAL_StatusTypeDef TIM_SlaveTimer_SetConfig(TIM_HandleTypeDef *htim, +7116:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** const TIM_SlaveConfigTypeDef *sSlaveConfig) +7117:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** { +7118:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** HAL_StatusTypeDef status = HAL_OK; +7119:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** uint32_t tmpsmcr; +7120:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** uint32_t tmpccmr1; +7121:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** uint32_t tmpccer; +7122:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** +7123:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** /* Get the TIMx SMCR register value */ +7124:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** tmpsmcr = htim->Instance->SMCR; +7125:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** +7126:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** /* Reset the Trigger Selection Bits */ +7127:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** tmpsmcr &= ~TIM_SMCR_TS; +7128:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** /* Set the Input Trigger source */ +7129:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** tmpsmcr |= sSlaveConfig->InputTrigger; +7130:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** +7131:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** /* Reset the slave mode Bits */ +7132:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** tmpsmcr &= ~TIM_SMCR_SMS; +7133:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** /* Set the slave mode */ +7134:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** tmpsmcr |= sSlaveConfig->SlaveMode; +7135:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** +7136:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** /* Write to TIMx SMCR */ +7137:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** htim->Instance->SMCR = tmpsmcr; +7138:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** +7139:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** /* Configure the trigger prescaler, filter, and polarity */ +7140:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** switch (sSlaveConfig->InputTrigger) +7141:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** { +7142:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** case TIM_TS_ETRF: +7143:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** { +7144:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** /* Check the parameters */ +7145:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** assert_param(IS_TIM_CLOCKSOURCE_ETRMODE1_INSTANCE(htim->Instance)); +7146:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** assert_param(IS_TIM_TRIGGERPRESCALER(sSlaveConfig->TriggerPrescaler)); +7147:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** assert_param(IS_TIM_TRIGGERPOLARITY(sSlaveConfig->TriggerPolarity)); +7148:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** assert_param(IS_TIM_TRIGGERFILTER(sSlaveConfig->TriggerFilter)); +7149:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** /* Configure the ETR Trigger source */ +7150:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** TIM_ETR_SetConfig(htim->Instance, +7151:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** sSlaveConfig->TriggerPrescaler, + ARM GAS /tmp/ccMtK8ce.s page 135 + + +7152:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** sSlaveConfig->TriggerPolarity, +7153:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** sSlaveConfig->TriggerFilter); +7154:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** break; +7155:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** } +7156:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** +7157:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** case TIM_TS_TI1F_ED: +7158:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** { +7159:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** /* Check the parameters */ +7160:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** assert_param(IS_TIM_CC1_INSTANCE(htim->Instance)); +7161:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** assert_param(IS_TIM_TRIGGERFILTER(sSlaveConfig->TriggerFilter)); +7162:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** +7163:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** if (sSlaveConfig->SlaveMode == TIM_SLAVEMODE_GATED) +7164:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** { +7165:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** return HAL_ERROR; +7166:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** } +7167:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** +7168:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** /* Disable the Channel 1: Reset the CC1E Bit */ +7169:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** tmpccer = htim->Instance->CCER; +7170:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** htim->Instance->CCER &= ~TIM_CCER_CC1E; +7171:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** tmpccmr1 = htim->Instance->CCMR1; +7172:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** +7173:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** /* Set the filter */ +7174:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** tmpccmr1 &= ~TIM_CCMR1_IC1F; +7175:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** tmpccmr1 |= ((sSlaveConfig->TriggerFilter) << 4U); +7176:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** +7177:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** /* Write to TIMx CCMR1 and CCER registers */ +7178:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** htim->Instance->CCMR1 = tmpccmr1; +7179:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** htim->Instance->CCER = tmpccer; +7180:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** break; +7181:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** } +7182:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** +7183:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** case TIM_TS_TI1FP1: +7184:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** { +7185:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** /* Check the parameters */ +7186:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** assert_param(IS_TIM_CC1_INSTANCE(htim->Instance)); +7187:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** assert_param(IS_TIM_TRIGGERPOLARITY(sSlaveConfig->TriggerPolarity)); +7188:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** assert_param(IS_TIM_TRIGGERFILTER(sSlaveConfig->TriggerFilter)); +7189:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** +7190:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** /* Configure TI1 Filter and Polarity */ +7191:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** TIM_TI1_ConfigInputStage(htim->Instance, +7192:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** sSlaveConfig->TriggerPolarity, +7193:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** sSlaveConfig->TriggerFilter); +7194:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** break; +7195:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** } +7196:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** +7197:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** case TIM_TS_TI2FP2: +7198:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** { +7199:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** /* Check the parameters */ +7200:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** assert_param(IS_TIM_CC2_INSTANCE(htim->Instance)); +7201:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** assert_param(IS_TIM_TRIGGERPOLARITY(sSlaveConfig->TriggerPolarity)); +7202:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** assert_param(IS_TIM_TRIGGERFILTER(sSlaveConfig->TriggerFilter)); +7203:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** +7204:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** /* Configure TI2 Filter and Polarity */ +7205:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** TIM_TI2_ConfigInputStage(htim->Instance, +7206:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** sSlaveConfig->TriggerPolarity, +7207:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** sSlaveConfig->TriggerFilter); +7208:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** break; + ARM GAS /tmp/ccMtK8ce.s page 136 + + +7209:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** } +7210:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** +7211:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** case TIM_TS_ITR0: +7212:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** case TIM_TS_ITR1: +7213:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** case TIM_TS_ITR2: +7214:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** case TIM_TS_ITR3: +7215:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** { +7216:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** /* Check the parameter */ +7217:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** assert_param(IS_TIM_CC2_INSTANCE(htim->Instance)); +7218:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** break; +7219:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** } +7220:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** +7221:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** default: +7222:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** status = HAL_ERROR; +7223:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** break; +7224:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** } +7225:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** +7226:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** return status; +7227:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** } +7228:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** +7229:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** /** +7230:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** * @brief Configure the TI1 as Input. +7231:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** * @param TIMx to select the TIM peripheral. +7232:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** * @param TIM_ICPolarity The Input Polarity. +7233:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** * This parameter can be one of the following values: +7234:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** * @arg TIM_ICPOLARITY_RISING +7235:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** * @arg TIM_ICPOLARITY_FALLING +7236:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** * @arg TIM_ICPOLARITY_BOTHEDGE +7237:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** * @param TIM_ICSelection specifies the input to be used. +7238:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** * This parameter can be one of the following values: +7239:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** * @arg TIM_ICSELECTION_DIRECTTI: TIM Input 1 is selected to be connected to IC1. +7240:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** * @arg TIM_ICSELECTION_INDIRECTTI: TIM Input 1 is selected to be connected to IC2. +7241:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** * @arg TIM_ICSELECTION_TRC: TIM Input 1 is selected to be connected to TRC. +7242:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** * @param TIM_ICFilter Specifies the Input Capture Filter. +7243:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** * This parameter must be a value between 0x00 and 0x0F. +7244:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** * @retval None +7245:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** * @note TIM_ICFilter and TIM_ICPolarity are not used in INDIRECT mode as TI2FP1 +7246:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** * (on channel2 path) is used as the input signal. Therefore CCMR1 must be +7247:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** * protected against un-initialized filter and polarity values. +7248:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** */ +7249:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** void TIM_TI1_SetConfig(TIM_TypeDef *TIMx, uint32_t TIM_ICPolarity, uint32_t TIM_ICSelection, +7250:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** uint32_t TIM_ICFilter) +7251:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** { +7252:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** uint32_t tmpccmr1; +7253:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** uint32_t tmpccer; +7254:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** +7255:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** /* Disable the Channel 1: Reset the CC1E Bit */ +7256:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** TIMx->CCER &= ~TIM_CCER_CC1E; +7257:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** tmpccmr1 = TIMx->CCMR1; +7258:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** tmpccer = TIMx->CCER; +7259:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** +7260:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** /* Select the Input */ +7261:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** if (IS_TIM_CC2_INSTANCE(TIMx) != RESET) +7262:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** { +7263:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** tmpccmr1 &= ~TIM_CCMR1_CC1S; +7264:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** tmpccmr1 |= TIM_ICSelection; +7265:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** } + ARM GAS /tmp/ccMtK8ce.s page 137 + + +7266:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** else +7267:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** { +7268:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** tmpccmr1 |= TIM_CCMR1_CC1S_0; +7269:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** } +7270:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** +7271:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** /* Set the filter */ +7272:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** tmpccmr1 &= ~TIM_CCMR1_IC1F; +7273:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** tmpccmr1 |= ((TIM_ICFilter << 4U) & TIM_CCMR1_IC1F); +7274:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** +7275:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** /* Select the Polarity and set the CC1E Bit */ +7276:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** tmpccer &= ~(TIM_CCER_CC1P | TIM_CCER_CC1NP); +7277:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** tmpccer |= (TIM_ICPolarity & (TIM_CCER_CC1P | TIM_CCER_CC1NP)); +7278:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** +7279:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** /* Write to TIMx CCMR1 and CCER registers */ +7280:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** TIMx->CCMR1 = tmpccmr1; +7281:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** TIMx->CCER = tmpccer; +7282:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** } +7283:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** +7284:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** /** +7285:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** * @brief Configure the Polarity and Filter for TI1. +7286:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** * @param TIMx to select the TIM peripheral. +7287:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** * @param TIM_ICPolarity The Input Polarity. +7288:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** * This parameter can be one of the following values: +7289:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** * @arg TIM_ICPOLARITY_RISING +7290:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** * @arg TIM_ICPOLARITY_FALLING +7291:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** * @arg TIM_ICPOLARITY_BOTHEDGE +7292:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** * @param TIM_ICFilter Specifies the Input Capture Filter. +7293:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** * This parameter must be a value between 0x00 and 0x0F. +7294:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** * @retval None +7295:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** */ +7296:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** static void TIM_TI1_ConfigInputStage(TIM_TypeDef *TIMx, uint32_t TIM_ICPolarity, uint32_t TIM_ICFil +7297:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** { + 486 .loc 1 7297 1 is_stmt 1 view -0 + 487 .cfi_startproc + 488 @ args = 0, pretend = 0, frame = 0 + 489 @ frame_needed = 0, uses_anonymous_args = 0 + 490 .loc 1 7297 1 is_stmt 0 view .LVU179 + 491 0000 30B5 push {r4, r5, lr} + 492 .cfi_def_cfa_offset 12 + 493 .cfi_offset 4, -12 + 494 .cfi_offset 5, -8 + 495 .cfi_offset 14, -4 +7298:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** uint32_t tmpccmr1; + 496 .loc 1 7298 3 is_stmt 1 view .LVU180 +7299:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** uint32_t tmpccer; + 497 .loc 1 7299 3 view .LVU181 +7300:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** +7301:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** /* Disable the Channel 1: Reset the CC1E Bit */ +7302:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** tmpccer = TIMx->CCER; + 498 .loc 1 7302 3 view .LVU182 + 499 .loc 1 7302 11 is_stmt 0 view .LVU183 + 500 0002 036A ldr r3, [r0, #32] + 501 .LVL49: +7303:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** TIMx->CCER &= ~TIM_CCER_CC1E; + 502 .loc 1 7303 3 is_stmt 1 view .LVU184 + 503 .loc 1 7303 7 is_stmt 0 view .LVU185 + 504 0004 046A ldr r4, [r0, #32] + ARM GAS /tmp/ccMtK8ce.s page 138 + + + 505 .loc 1 7303 14 view .LVU186 + 506 0006 0125 movs r5, #1 + 507 0008 AC43 bics r4, r5 + 508 000a 0462 str r4, [r0, #32] +7304:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** tmpccmr1 = TIMx->CCMR1; + 509 .loc 1 7304 3 is_stmt 1 view .LVU187 + 510 .loc 1 7304 12 is_stmt 0 view .LVU188 + 511 000c 8469 ldr r4, [r0, #24] + 512 .LVL50: +7305:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** +7306:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** /* Set the filter */ +7307:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** tmpccmr1 &= ~TIM_CCMR1_IC1F; + 513 .loc 1 7307 3 is_stmt 1 view .LVU189 + 514 .loc 1 7307 12 is_stmt 0 view .LVU190 + 515 000e EF35 adds r5, r5, #239 + 516 0010 AC43 bics r4, r5 + 517 .LVL51: +7308:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** tmpccmr1 |= (TIM_ICFilter << 4U); + 518 .loc 1 7308 3 is_stmt 1 view .LVU191 + 519 .loc 1 7308 29 is_stmt 0 view .LVU192 + 520 0012 1201 lsls r2, r2, #4 + 521 .LVL52: + 522 .loc 1 7308 12 view .LVU193 + 523 0014 2243 orrs r2, r4 + 524 .LVL53: +7309:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** +7310:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** /* Select the Polarity and set the CC1E Bit */ +7311:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** tmpccer &= ~(TIM_CCER_CC1P | TIM_CCER_CC1NP); + 525 .loc 1 7311 3 is_stmt 1 view .LVU194 + 526 .loc 1 7311 11 is_stmt 0 view .LVU195 + 527 0016 0A24 movs r4, #10 + 528 0018 A343 bics r3, r4 + 529 .LVL54: +7312:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** tmpccer |= TIM_ICPolarity; + 530 .loc 1 7312 3 is_stmt 1 view .LVU196 + 531 .loc 1 7312 11 is_stmt 0 view .LVU197 + 532 001a 0B43 orrs r3, r1 + 533 .LVL55: +7313:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** +7314:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** /* Write to TIMx CCMR1 and CCER registers */ +7315:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** TIMx->CCMR1 = tmpccmr1; + 534 .loc 1 7315 3 is_stmt 1 view .LVU198 + 535 .loc 1 7315 15 is_stmt 0 view .LVU199 + 536 001c 8261 str r2, [r0, #24] +7316:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** TIMx->CCER = tmpccer; + 537 .loc 1 7316 3 is_stmt 1 view .LVU200 + 538 .loc 1 7316 14 is_stmt 0 view .LVU201 + 539 001e 0362 str r3, [r0, #32] +7317:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** } + 540 .loc 1 7317 1 view .LVU202 + 541 @ sp needed + 542 0020 30BD pop {r4, r5, pc} + 543 .cfi_endproc + 544 .LFE151: + 546 .section .text.TIM_TI2_SetConfig,"ax",%progbits + 547 .align 1 + 548 .syntax unified + ARM GAS /tmp/ccMtK8ce.s page 139 + + + 549 .code 16 + 550 .thumb_func + 552 TIM_TI2_SetConfig: + 553 .LVL56: + 554 .LFB152: +7318:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** +7319:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** /** +7320:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** * @brief Configure the TI2 as Input. +7321:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** * @param TIMx to select the TIM peripheral +7322:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** * @param TIM_ICPolarity The Input Polarity. +7323:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** * This parameter can be one of the following values: +7324:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** * @arg TIM_ICPOLARITY_RISING +7325:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** * @arg TIM_ICPOLARITY_FALLING +7326:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** * @arg TIM_ICPOLARITY_BOTHEDGE +7327:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** * @param TIM_ICSelection specifies the input to be used. +7328:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** * This parameter can be one of the following values: +7329:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** * @arg TIM_ICSELECTION_DIRECTTI: TIM Input 2 is selected to be connected to IC2. +7330:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** * @arg TIM_ICSELECTION_INDIRECTTI: TIM Input 2 is selected to be connected to IC1. +7331:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** * @arg TIM_ICSELECTION_TRC: TIM Input 2 is selected to be connected to TRC. +7332:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** * @param TIM_ICFilter Specifies the Input Capture Filter. +7333:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** * This parameter must be a value between 0x00 and 0x0F. +7334:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** * @retval None +7335:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** * @note TIM_ICFilter and TIM_ICPolarity are not used in INDIRECT mode as TI1FP2 +7336:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** * (on channel1 path) is used as the input signal. Therefore CCMR1 must be +7337:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** * protected against un-initialized filter and polarity values. +7338:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** */ +7339:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** static void TIM_TI2_SetConfig(TIM_TypeDef *TIMx, uint32_t TIM_ICPolarity, uint32_t TIM_ICSelection, +7340:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** uint32_t TIM_ICFilter) +7341:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** { + 555 .loc 1 7341 1 is_stmt 1 view -0 + 556 .cfi_startproc + 557 @ args = 0, pretend = 0, frame = 0 + 558 @ frame_needed = 0, uses_anonymous_args = 0 + 559 .loc 1 7341 1 is_stmt 0 view .LVU204 + 560 0000 70B5 push {r4, r5, r6, lr} + 561 .cfi_def_cfa_offset 16 + 562 .cfi_offset 4, -16 + 563 .cfi_offset 5, -12 + 564 .cfi_offset 6, -8 + 565 .cfi_offset 14, -4 +7342:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** uint32_t tmpccmr1; + 566 .loc 1 7342 3 is_stmt 1 view .LVU205 +7343:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** uint32_t tmpccer; + 567 .loc 1 7343 3 view .LVU206 +7344:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** +7345:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** /* Disable the Channel 2: Reset the CC2E Bit */ +7346:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** TIMx->CCER &= ~TIM_CCER_CC2E; + 568 .loc 1 7346 3 view .LVU207 + 569 .loc 1 7346 7 is_stmt 0 view .LVU208 + 570 0002 046A ldr r4, [r0, #32] + 571 .loc 1 7346 14 view .LVU209 + 572 0004 1025 movs r5, #16 + 573 0006 AC43 bics r4, r5 + 574 0008 0462 str r4, [r0, #32] +7347:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** tmpccmr1 = TIMx->CCMR1; + 575 .loc 1 7347 3 is_stmt 1 view .LVU210 + 576 .loc 1 7347 12 is_stmt 0 view .LVU211 + ARM GAS /tmp/ccMtK8ce.s page 140 + + + 577 000a 8569 ldr r5, [r0, #24] + 578 .LVL57: +7348:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** tmpccer = TIMx->CCER; + 579 .loc 1 7348 3 is_stmt 1 view .LVU212 + 580 .loc 1 7348 11 is_stmt 0 view .LVU213 + 581 000c 046A ldr r4, [r0, #32] + 582 .LVL58: +7349:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** +7350:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** /* Select the Input */ +7351:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** tmpccmr1 &= ~TIM_CCMR1_CC2S; + 583 .loc 1 7351 3 is_stmt 1 view .LVU214 + 584 .loc 1 7351 12 is_stmt 0 view .LVU215 + 585 000e 084E ldr r6, .L22 + 586 0010 3540 ands r5, r6 + 587 .LVL59: +7352:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** tmpccmr1 |= (TIM_ICSelection << 8U); + 588 .loc 1 7352 3 is_stmt 1 view .LVU216 + 589 .loc 1 7352 32 is_stmt 0 view .LVU217 + 590 0012 1202 lsls r2, r2, #8 + 591 .LVL60: + 592 .loc 1 7352 12 view .LVU218 + 593 0014 2A43 orrs r2, r5 + 594 .LVL61: +7353:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** +7354:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** /* Set the filter */ +7355:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** tmpccmr1 &= ~TIM_CCMR1_IC2F; + 595 .loc 1 7355 3 is_stmt 1 view .LVU219 + 596 .loc 1 7355 12 is_stmt 0 view .LVU220 + 597 0016 074D ldr r5, .L22+4 + 598 0018 2A40 ands r2, r5 + 599 .LVL62: +7356:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** tmpccmr1 |= ((TIM_ICFilter << 12U) & TIM_CCMR1_IC2F); + 600 .loc 1 7356 3 is_stmt 1 view .LVU221 + 601 .loc 1 7356 38 is_stmt 0 view .LVU222 + 602 001a 1B07 lsls r3, r3, #28 + 603 .LVL63: + 604 .loc 1 7356 38 view .LVU223 + 605 001c 1B0C lsrs r3, r3, #16 + 606 .loc 1 7356 12 view .LVU224 + 607 001e 1343 orrs r3, r2 + 608 .LVL64: +7357:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** +7358:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** /* Select the Polarity and set the CC2E Bit */ +7359:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** tmpccer &= ~(TIM_CCER_CC2P | TIM_CCER_CC2NP); + 609 .loc 1 7359 3 is_stmt 1 view .LVU225 + 610 .loc 1 7359 11 is_stmt 0 view .LVU226 + 611 0020 A022 movs r2, #160 + 612 0022 9443 bics r4, r2 + 613 .LVL65: +7360:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** tmpccer |= ((TIM_ICPolarity << 4U) & (TIM_CCER_CC2P | TIM_CCER_CC2NP)); + 614 .loc 1 7360 3 is_stmt 1 view .LVU227 + 615 .loc 1 7360 31 is_stmt 0 view .LVU228 + 616 0024 0901 lsls r1, r1, #4 + 617 .LVL66: + 618 .loc 1 7360 38 view .LVU229 + 619 0026 0A40 ands r2, r1 + 620 .loc 1 7360 11 view .LVU230 + ARM GAS /tmp/ccMtK8ce.s page 141 + + + 621 0028 2243 orrs r2, r4 + 622 .LVL67: +7361:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** +7362:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** /* Write to TIMx CCMR1 and CCER registers */ +7363:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** TIMx->CCMR1 = tmpccmr1 ; + 623 .loc 1 7363 3 is_stmt 1 view .LVU231 + 624 .loc 1 7363 15 is_stmt 0 view .LVU232 + 625 002a 8361 str r3, [r0, #24] +7364:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** TIMx->CCER = tmpccer; + 626 .loc 1 7364 3 is_stmt 1 view .LVU233 + 627 .loc 1 7364 14 is_stmt 0 view .LVU234 + 628 002c 0262 str r2, [r0, #32] +7365:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** } + 629 .loc 1 7365 1 view .LVU235 + 630 @ sp needed + 631 002e 70BD pop {r4, r5, r6, pc} + 632 .L23: + 633 .align 2 + 634 .L22: + 635 0030 FFFCFFFF .word -769 + 636 0034 FF0FFFFF .word -61441 + 637 .cfi_endproc + 638 .LFE152: + 640 .section .text.TIM_TI2_ConfigInputStage,"ax",%progbits + 641 .align 1 + 642 .syntax unified + 643 .code 16 + 644 .thumb_func + 646 TIM_TI2_ConfigInputStage: + 647 .LVL68: + 648 .LFB153: +7366:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** +7367:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** /** +7368:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** * @brief Configure the Polarity and Filter for TI2. +7369:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** * @param TIMx to select the TIM peripheral. +7370:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** * @param TIM_ICPolarity The Input Polarity. +7371:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** * This parameter can be one of the following values: +7372:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** * @arg TIM_ICPOLARITY_RISING +7373:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** * @arg TIM_ICPOLARITY_FALLING +7374:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** * @arg TIM_ICPOLARITY_BOTHEDGE +7375:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** * @param TIM_ICFilter Specifies the Input Capture Filter. +7376:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** * This parameter must be a value between 0x00 and 0x0F. +7377:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** * @retval None +7378:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** */ +7379:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** static void TIM_TI2_ConfigInputStage(TIM_TypeDef *TIMx, uint32_t TIM_ICPolarity, uint32_t TIM_ICFil +7380:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** { + 649 .loc 1 7380 1 is_stmt 1 view -0 + 650 .cfi_startproc + 651 @ args = 0, pretend = 0, frame = 0 + 652 @ frame_needed = 0, uses_anonymous_args = 0 + 653 .loc 1 7380 1 is_stmt 0 view .LVU237 + 654 0000 30B5 push {r4, r5, lr} + 655 .cfi_def_cfa_offset 12 + 656 .cfi_offset 4, -12 + 657 .cfi_offset 5, -8 + 658 .cfi_offset 14, -4 +7381:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** uint32_t tmpccmr1; + ARM GAS /tmp/ccMtK8ce.s page 142 + + + 659 .loc 1 7381 3 is_stmt 1 view .LVU238 +7382:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** uint32_t tmpccer; + 660 .loc 1 7382 3 view .LVU239 +7383:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** +7384:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** /* Disable the Channel 2: Reset the CC2E Bit */ +7385:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** TIMx->CCER &= ~TIM_CCER_CC2E; + 661 .loc 1 7385 3 view .LVU240 + 662 .loc 1 7385 7 is_stmt 0 view .LVU241 + 663 0002 036A ldr r3, [r0, #32] + 664 .loc 1 7385 14 view .LVU242 + 665 0004 1024 movs r4, #16 + 666 0006 A343 bics r3, r4 + 667 0008 0362 str r3, [r0, #32] +7386:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** tmpccmr1 = TIMx->CCMR1; + 668 .loc 1 7386 3 is_stmt 1 view .LVU243 + 669 .loc 1 7386 12 is_stmt 0 view .LVU244 + 670 000a 8469 ldr r4, [r0, #24] + 671 .LVL69: +7387:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** tmpccer = TIMx->CCER; + 672 .loc 1 7387 3 is_stmt 1 view .LVU245 + 673 .loc 1 7387 11 is_stmt 0 view .LVU246 + 674 000c 036A ldr r3, [r0, #32] + 675 .LVL70: +7388:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** +7389:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** /* Set the filter */ +7390:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** tmpccmr1 &= ~TIM_CCMR1_IC2F; + 676 .loc 1 7390 3 is_stmt 1 view .LVU247 + 677 .loc 1 7390 12 is_stmt 0 view .LVU248 + 678 000e 054D ldr r5, .L25 + 679 0010 2C40 ands r4, r5 + 680 .LVL71: +7391:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** tmpccmr1 |= (TIM_ICFilter << 12U); + 681 .loc 1 7391 3 is_stmt 1 view .LVU249 + 682 .loc 1 7391 29 is_stmt 0 view .LVU250 + 683 0012 1203 lsls r2, r2, #12 + 684 .LVL72: + 685 .loc 1 7391 12 view .LVU251 + 686 0014 2243 orrs r2, r4 + 687 .LVL73: +7392:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** +7393:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** /* Select the Polarity and set the CC2E Bit */ +7394:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** tmpccer &= ~(TIM_CCER_CC2P | TIM_CCER_CC2NP); + 688 .loc 1 7394 3 is_stmt 1 view .LVU252 + 689 .loc 1 7394 11 is_stmt 0 view .LVU253 + 690 0016 A024 movs r4, #160 + 691 0018 A343 bics r3, r4 + 692 .LVL74: +7395:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** tmpccer |= (TIM_ICPolarity << 4U); + 693 .loc 1 7395 3 is_stmt 1 view .LVU254 + 694 .loc 1 7395 30 is_stmt 0 view .LVU255 + 695 001a 0901 lsls r1, r1, #4 + 696 .LVL75: + 697 .loc 1 7395 11 view .LVU256 + 698 001c 1943 orrs r1, r3 + 699 .LVL76: +7396:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** +7397:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** /* Write to TIMx CCMR1 and CCER registers */ + ARM GAS /tmp/ccMtK8ce.s page 143 + + +7398:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** TIMx->CCMR1 = tmpccmr1 ; + 700 .loc 1 7398 3 is_stmt 1 view .LVU257 + 701 .loc 1 7398 15 is_stmt 0 view .LVU258 + 702 001e 8261 str r2, [r0, #24] +7399:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** TIMx->CCER = tmpccer; + 703 .loc 1 7399 3 is_stmt 1 view .LVU259 + 704 .loc 1 7399 14 is_stmt 0 view .LVU260 + 705 0020 0162 str r1, [r0, #32] +7400:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** } + 706 .loc 1 7400 1 view .LVU261 + 707 @ sp needed + 708 0022 30BD pop {r4, r5, pc} + 709 .L26: + 710 .align 2 + 711 .L25: + 712 0024 FF0FFFFF .word -61441 + 713 .cfi_endproc + 714 .LFE153: + 716 .section .text.TIM_TI3_SetConfig,"ax",%progbits + 717 .align 1 + 718 .syntax unified + 719 .code 16 + 720 .thumb_func + 722 TIM_TI3_SetConfig: + 723 .LVL77: + 724 .LFB154: +7401:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** +7402:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** /** +7403:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** * @brief Configure the TI3 as Input. +7404:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** * @param TIMx to select the TIM peripheral +7405:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** * @param TIM_ICPolarity The Input Polarity. +7406:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** * This parameter can be one of the following values: +7407:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** * @arg TIM_ICPOLARITY_RISING +7408:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** * @arg TIM_ICPOLARITY_FALLING +7409:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** * @arg TIM_ICPOLARITY_BOTHEDGE +7410:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** * @param TIM_ICSelection specifies the input to be used. +7411:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** * This parameter can be one of the following values: +7412:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** * @arg TIM_ICSELECTION_DIRECTTI: TIM Input 3 is selected to be connected to IC3. +7413:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** * @arg TIM_ICSELECTION_INDIRECTTI: TIM Input 3 is selected to be connected to IC4. +7414:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** * @arg TIM_ICSELECTION_TRC: TIM Input 3 is selected to be connected to TRC. +7415:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** * @param TIM_ICFilter Specifies the Input Capture Filter. +7416:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** * This parameter must be a value between 0x00 and 0x0F. +7417:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** * @retval None +7418:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** * @note TIM_ICFilter and TIM_ICPolarity are not used in INDIRECT mode as TI3FP4 +7419:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** * (on channel1 path) is used as the input signal. Therefore CCMR2 must be +7420:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** * protected against un-initialized filter and polarity values. +7421:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** */ +7422:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** static void TIM_TI3_SetConfig(TIM_TypeDef *TIMx, uint32_t TIM_ICPolarity, uint32_t TIM_ICSelection, +7423:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** uint32_t TIM_ICFilter) +7424:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** { + 725 .loc 1 7424 1 is_stmt 1 view -0 + 726 .cfi_startproc + 727 @ args = 0, pretend = 0, frame = 0 + 728 @ frame_needed = 0, uses_anonymous_args = 0 + 729 .loc 1 7424 1 is_stmt 0 view .LVU263 + 730 0000 70B5 push {r4, r5, r6, lr} + 731 .cfi_def_cfa_offset 16 + ARM GAS /tmp/ccMtK8ce.s page 144 + + + 732 .cfi_offset 4, -16 + 733 .cfi_offset 5, -12 + 734 .cfi_offset 6, -8 + 735 .cfi_offset 14, -4 +7425:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** uint32_t tmpccmr2; + 736 .loc 1 7425 3 is_stmt 1 view .LVU264 +7426:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** uint32_t tmpccer; + 737 .loc 1 7426 3 view .LVU265 +7427:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** +7428:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** /* Disable the Channel 3: Reset the CC3E Bit */ +7429:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** TIMx->CCER &= ~TIM_CCER_CC3E; + 738 .loc 1 7429 3 view .LVU266 + 739 .loc 1 7429 7 is_stmt 0 view .LVU267 + 740 0002 046A ldr r4, [r0, #32] + 741 .loc 1 7429 14 view .LVU268 + 742 0004 0B4D ldr r5, .L28 + 743 0006 2C40 ands r4, r5 + 744 0008 0462 str r4, [r0, #32] +7430:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** tmpccmr2 = TIMx->CCMR2; + 745 .loc 1 7430 3 is_stmt 1 view .LVU269 + 746 .loc 1 7430 12 is_stmt 0 view .LVU270 + 747 000a C469 ldr r4, [r0, #28] + 748 .LVL78: +7431:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** tmpccer = TIMx->CCER; + 749 .loc 1 7431 3 is_stmt 1 view .LVU271 + 750 .loc 1 7431 11 is_stmt 0 view .LVU272 + 751 000c 056A ldr r5, [r0, #32] + 752 .LVL79: +7432:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** +7433:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** /* Select the Input */ +7434:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** tmpccmr2 &= ~TIM_CCMR2_CC3S; + 753 .loc 1 7434 3 is_stmt 1 view .LVU273 + 754 .loc 1 7434 12 is_stmt 0 view .LVU274 + 755 000e 0326 movs r6, #3 + 756 0010 B443 bics r4, r6 + 757 .LVL80: +7435:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** tmpccmr2 |= TIM_ICSelection; + 758 .loc 1 7435 3 is_stmt 1 view .LVU275 + 759 .loc 1 7435 12 is_stmt 0 view .LVU276 + 760 0012 1443 orrs r4, r2 + 761 .LVL81: +7436:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** +7437:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** /* Set the filter */ +7438:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** tmpccmr2 &= ~TIM_CCMR2_IC3F; + 762 .loc 1 7438 3 is_stmt 1 view .LVU277 + 763 .loc 1 7438 12 is_stmt 0 view .LVU278 + 764 0014 F022 movs r2, #240 + 765 .LVL82: + 766 .loc 1 7438 12 view .LVU279 + 767 0016 9443 bics r4, r2 + 768 .LVL83: +7439:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** tmpccmr2 |= ((TIM_ICFilter << 4U) & TIM_CCMR2_IC3F); + 769 .loc 1 7439 3 is_stmt 1 view .LVU280 + 770 .loc 1 7439 30 is_stmt 0 view .LVU281 + 771 0018 1A01 lsls r2, r3, #4 + 772 .loc 1 7439 37 view .LVU282 + 773 001a FF23 movs r3, #255 + ARM GAS /tmp/ccMtK8ce.s page 145 + + + 774 .LVL84: + 775 .loc 1 7439 37 view .LVU283 + 776 001c 1340 ands r3, r2 + 777 .loc 1 7439 12 view .LVU284 + 778 001e 2343 orrs r3, r4 + 779 .LVL85: +7440:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** +7441:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** /* Select the Polarity and set the CC3E Bit */ +7442:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** tmpccer &= ~(TIM_CCER_CC3P | TIM_CCER_CC3NP); + 780 .loc 1 7442 3 is_stmt 1 view .LVU285 + 781 .loc 1 7442 11 is_stmt 0 view .LVU286 + 782 0020 054A ldr r2, .L28+4 + 783 0022 1540 ands r5, r2 + 784 .LVL86: +7443:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** tmpccer |= ((TIM_ICPolarity << 8U) & (TIM_CCER_CC3P | TIM_CCER_CC3NP)); + 785 .loc 1 7443 3 is_stmt 1 view .LVU287 + 786 .loc 1 7443 31 is_stmt 0 view .LVU288 + 787 0024 0902 lsls r1, r1, #8 + 788 .LVL87: + 789 .loc 1 7443 38 view .LVU289 + 790 0026 A022 movs r2, #160 + 791 0028 1201 lsls r2, r2, #4 + 792 002a 1140 ands r1, r2 + 793 .loc 1 7443 11 view .LVU290 + 794 002c 2943 orrs r1, r5 + 795 .LVL88: +7444:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** +7445:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** /* Write to TIMx CCMR2 and CCER registers */ +7446:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** TIMx->CCMR2 = tmpccmr2; + 796 .loc 1 7446 3 is_stmt 1 view .LVU291 + 797 .loc 1 7446 15 is_stmt 0 view .LVU292 + 798 002e C361 str r3, [r0, #28] +7447:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** TIMx->CCER = tmpccer; + 799 .loc 1 7447 3 is_stmt 1 view .LVU293 + 800 .loc 1 7447 14 is_stmt 0 view .LVU294 + 801 0030 0162 str r1, [r0, #32] +7448:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** } + 802 .loc 1 7448 1 view .LVU295 + 803 @ sp needed + 804 0032 70BD pop {r4, r5, r6, pc} + 805 .L29: + 806 .align 2 + 807 .L28: + 808 0034 FFFEFFFF .word -257 + 809 0038 FFF5FFFF .word -2561 + 810 .cfi_endproc + 811 .LFE154: + 813 .section .text.TIM_TI4_SetConfig,"ax",%progbits + 814 .align 1 + 815 .syntax unified + 816 .code 16 + 817 .thumb_func + 819 TIM_TI4_SetConfig: + 820 .LVL89: + 821 .LFB155: +7449:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** +7450:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** /** + ARM GAS /tmp/ccMtK8ce.s page 146 + + +7451:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** * @brief Configure the TI4 as Input. +7452:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** * @param TIMx to select the TIM peripheral +7453:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** * @param TIM_ICPolarity The Input Polarity. +7454:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** * This parameter can be one of the following values: +7455:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** * @arg TIM_ICPOLARITY_RISING +7456:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** * @arg TIM_ICPOLARITY_FALLING +7457:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** * @arg TIM_ICPOLARITY_BOTHEDGE +7458:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** * @param TIM_ICSelection specifies the input to be used. +7459:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** * This parameter can be one of the following values: +7460:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** * @arg TIM_ICSELECTION_DIRECTTI: TIM Input 4 is selected to be connected to IC4. +7461:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** * @arg TIM_ICSELECTION_INDIRECTTI: TIM Input 4 is selected to be connected to IC3. +7462:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** * @arg TIM_ICSELECTION_TRC: TIM Input 4 is selected to be connected to TRC. +7463:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** * @param TIM_ICFilter Specifies the Input Capture Filter. +7464:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** * This parameter must be a value between 0x00 and 0x0F. +7465:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** * @note TIM_ICFilter and TIM_ICPolarity are not used in INDIRECT mode as TI4FP3 +7466:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** * (on channel1 path) is used as the input signal. Therefore CCMR2 must be +7467:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** * protected against un-initialized filter and polarity values. +7468:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** * @retval None +7469:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** */ +7470:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** static void TIM_TI4_SetConfig(TIM_TypeDef *TIMx, uint32_t TIM_ICPolarity, uint32_t TIM_ICSelection, +7471:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** uint32_t TIM_ICFilter) +7472:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** { + 822 .loc 1 7472 1 is_stmt 1 view -0 + 823 .cfi_startproc + 824 @ args = 0, pretend = 0, frame = 0 + 825 @ frame_needed = 0, uses_anonymous_args = 0 + 826 .loc 1 7472 1 is_stmt 0 view .LVU297 + 827 0000 70B5 push {r4, r5, r6, lr} + 828 .cfi_def_cfa_offset 16 + 829 .cfi_offset 4, -16 + 830 .cfi_offset 5, -12 + 831 .cfi_offset 6, -8 + 832 .cfi_offset 14, -4 +7473:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** uint32_t tmpccmr2; + 833 .loc 1 7473 3 is_stmt 1 view .LVU298 +7474:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** uint32_t tmpccer; + 834 .loc 1 7474 3 view .LVU299 +7475:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** +7476:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** /* Disable the Channel 4: Reset the CC4E Bit */ +7477:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** TIMx->CCER &= ~TIM_CCER_CC4E; + 835 .loc 1 7477 3 view .LVU300 + 836 .loc 1 7477 7 is_stmt 0 view .LVU301 + 837 0002 046A ldr r4, [r0, #32] + 838 .loc 1 7477 14 view .LVU302 + 839 0004 0B4D ldr r5, .L31 + 840 0006 2C40 ands r4, r5 + 841 0008 0462 str r4, [r0, #32] +7478:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** tmpccmr2 = TIMx->CCMR2; + 842 .loc 1 7478 3 is_stmt 1 view .LVU303 + 843 .loc 1 7478 12 is_stmt 0 view .LVU304 + 844 000a C569 ldr r5, [r0, #28] + 845 .LVL90: +7479:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** tmpccer = TIMx->CCER; + 846 .loc 1 7479 3 is_stmt 1 view .LVU305 + 847 .loc 1 7479 11 is_stmt 0 view .LVU306 + 848 000c 046A ldr r4, [r0, #32] + 849 .LVL91: + ARM GAS /tmp/ccMtK8ce.s page 147 + + +7480:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** +7481:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** /* Select the Input */ +7482:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** tmpccmr2 &= ~TIM_CCMR2_CC4S; + 850 .loc 1 7482 3 is_stmt 1 view .LVU307 + 851 .loc 1 7482 12 is_stmt 0 view .LVU308 + 852 000e 0A4E ldr r6, .L31+4 + 853 0010 3540 ands r5, r6 + 854 .LVL92: +7483:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** tmpccmr2 |= (TIM_ICSelection << 8U); + 855 .loc 1 7483 3 is_stmt 1 view .LVU309 + 856 .loc 1 7483 32 is_stmt 0 view .LVU310 + 857 0012 1202 lsls r2, r2, #8 + 858 .LVL93: + 859 .loc 1 7483 12 view .LVU311 + 860 0014 2A43 orrs r2, r5 + 861 .LVL94: +7484:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** +7485:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** /* Set the filter */ +7486:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** tmpccmr2 &= ~TIM_CCMR2_IC4F; + 862 .loc 1 7486 3 is_stmt 1 view .LVU312 + 863 .loc 1 7486 12 is_stmt 0 view .LVU313 + 864 0016 094D ldr r5, .L31+8 + 865 0018 2A40 ands r2, r5 + 866 .LVL95: +7487:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** tmpccmr2 |= ((TIM_ICFilter << 12U) & TIM_CCMR2_IC4F); + 867 .loc 1 7487 3 is_stmt 1 view .LVU314 + 868 .loc 1 7487 38 is_stmt 0 view .LVU315 + 869 001a 1B07 lsls r3, r3, #28 + 870 .LVL96: + 871 .loc 1 7487 38 view .LVU316 + 872 001c 1B0C lsrs r3, r3, #16 + 873 .loc 1 7487 12 view .LVU317 + 874 001e 1343 orrs r3, r2 + 875 .LVL97: +7488:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** +7489:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** /* Select the Polarity and set the CC4E Bit */ +7490:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** tmpccer &= ~(TIM_CCER_CC4P | TIM_CCER_CC4NP); + 876 .loc 1 7490 3 is_stmt 1 view .LVU318 + 877 .loc 1 7490 11 is_stmt 0 view .LVU319 + 878 0020 074A ldr r2, .L31+12 + 879 0022 1440 ands r4, r2 + 880 .LVL98: +7491:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** tmpccer |= ((TIM_ICPolarity << 12U) & (TIM_CCER_CC4P | TIM_CCER_CC4NP)); + 881 .loc 1 7491 3 is_stmt 1 view .LVU320 + 882 .loc 1 7491 31 is_stmt 0 view .LVU321 + 883 0024 0903 lsls r1, r1, #12 + 884 .LVL99: + 885 .loc 1 7491 39 view .LVU322 + 886 0026 A022 movs r2, #160 + 887 0028 1202 lsls r2, r2, #8 + 888 002a 1140 ands r1, r2 + 889 .loc 1 7491 11 view .LVU323 + 890 002c 2143 orrs r1, r4 + 891 .LVL100: +7492:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** +7493:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** /* Write to TIMx CCMR2 and CCER registers */ +7494:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** TIMx->CCMR2 = tmpccmr2; + ARM GAS /tmp/ccMtK8ce.s page 148 + + + 892 .loc 1 7494 3 is_stmt 1 view .LVU324 + 893 .loc 1 7494 15 is_stmt 0 view .LVU325 + 894 002e C361 str r3, [r0, #28] +7495:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** TIMx->CCER = tmpccer ; + 895 .loc 1 7495 3 is_stmt 1 view .LVU326 + 896 .loc 1 7495 14 is_stmt 0 view .LVU327 + 897 0030 0162 str r1, [r0, #32] +7496:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** } + 898 .loc 1 7496 1 view .LVU328 + 899 @ sp needed + 900 0032 70BD pop {r4, r5, r6, pc} + 901 .L32: + 902 .align 2 + 903 .L31: + 904 0034 FFEFFFFF .word -4097 + 905 0038 FFFCFFFF .word -769 + 906 003c FF0FFFFF .word -61441 + 907 0040 FF5FFFFF .word -40961 + 908 .cfi_endproc + 909 .LFE155: + 911 .section .text.TIM_ITRx_SetConfig,"ax",%progbits + 912 .align 1 + 913 .syntax unified + 914 .code 16 + 915 .thumb_func + 917 TIM_ITRx_SetConfig: + 918 .LVL101: + 919 .LFB156: +7497:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** +7498:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** /** +7499:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** * @brief Selects the Input Trigger source +7500:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** * @param TIMx to select the TIM peripheral +7501:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** * @param InputTriggerSource The Input Trigger source. +7502:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** * This parameter can be one of the following values: +7503:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** * @arg TIM_TS_ITR0: Internal Trigger 0 +7504:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** * @arg TIM_TS_ITR1: Internal Trigger 1 +7505:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** * @arg TIM_TS_ITR2: Internal Trigger 2 +7506:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** * @arg TIM_TS_ITR3: Internal Trigger 3 +7507:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** * @arg TIM_TS_TI1F_ED: TI1 Edge Detector +7508:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** * @arg TIM_TS_TI1FP1: Filtered Timer Input 1 +7509:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** * @arg TIM_TS_TI2FP2: Filtered Timer Input 2 +7510:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** * @arg TIM_TS_ETRF: External Trigger input +7511:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** * @retval None +7512:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** */ +7513:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** static void TIM_ITRx_SetConfig(TIM_TypeDef *TIMx, uint32_t InputTriggerSource) +7514:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** { + 920 .loc 1 7514 1 is_stmt 1 view -0 + 921 .cfi_startproc + 922 @ args = 0, pretend = 0, frame = 0 + 923 @ frame_needed = 0, uses_anonymous_args = 0 + 924 @ link register save eliminated. +7515:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** uint32_t tmpsmcr; + 925 .loc 1 7515 3 view .LVU330 +7516:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** +7517:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** /* Get the TIMx SMCR register value */ +7518:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** tmpsmcr = TIMx->SMCR; + 926 .loc 1 7518 3 view .LVU331 + ARM GAS /tmp/ccMtK8ce.s page 149 + + + 927 .loc 1 7518 11 is_stmt 0 view .LVU332 + 928 0000 8368 ldr r3, [r0, #8] + 929 .LVL102: +7519:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** /* Reset the TS Bits */ +7520:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** tmpsmcr &= ~TIM_SMCR_TS; + 930 .loc 1 7520 3 is_stmt 1 view .LVU333 + 931 .loc 1 7520 11 is_stmt 0 view .LVU334 + 932 0002 7022 movs r2, #112 + 933 0004 9343 bics r3, r2 + 934 .LVL103: +7521:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** /* Set the Input Trigger source and the slave mode*/ +7522:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** tmpsmcr |= (InputTriggerSource | TIM_SLAVEMODE_EXTERNAL1); + 935 .loc 1 7522 3 is_stmt 1 view .LVU335 + 936 .loc 1 7522 11 is_stmt 0 view .LVU336 + 937 0006 0B43 orrs r3, r1 + 938 .LVL104: + 939 .loc 1 7522 11 view .LVU337 + 940 0008 693A subs r2, r2, #105 + 941 .loc 1 7522 11 view .LVU338 + 942 000a 1343 orrs r3, r2 + 943 .LVL105: +7523:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** /* Write to TIMx SMCR */ +7524:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** TIMx->SMCR = tmpsmcr; + 944 .loc 1 7524 3 is_stmt 1 view .LVU339 + 945 .loc 1 7524 14 is_stmt 0 view .LVU340 + 946 000c 8360 str r3, [r0, #8] +7525:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** } + 947 .loc 1 7525 1 view .LVU341 + 948 @ sp needed + 949 000e 7047 bx lr + 950 .cfi_endproc + 951 .LFE156: + 953 .section .text.HAL_TIM_Base_MspInit,"ax",%progbits + 954 .align 1 + 955 .weak HAL_TIM_Base_MspInit + 956 .syntax unified + 957 .code 16 + 958 .thumb_func + 960 HAL_TIM_Base_MspInit: + 961 .LVL106: + 962 .LFB42: + 370:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** /* Prevent unused argument(s) compilation warning */ + 963 .loc 1 370 1 is_stmt 1 view -0 + 964 .cfi_startproc + 965 @ args = 0, pretend = 0, frame = 0 + 966 @ frame_needed = 0, uses_anonymous_args = 0 + 967 @ link register save eliminated. + 372:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 968 .loc 1 372 3 view .LVU343 + 377:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 969 .loc 1 377 1 is_stmt 0 view .LVU344 + 970 @ sp needed + 971 0000 7047 bx lr + 972 .cfi_endproc + 973 .LFE42: + 975 .section .text.HAL_TIM_Base_MspDeInit,"ax",%progbits + 976 .align 1 + ARM GAS /tmp/ccMtK8ce.s page 150 + + + 977 .weak HAL_TIM_Base_MspDeInit + 978 .syntax unified + 979 .code 16 + 980 .thumb_func + 982 HAL_TIM_Base_MspDeInit: + 983 .LVL107: + 984 .LFB43: + 385:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** /* Prevent unused argument(s) compilation warning */ + 985 .loc 1 385 1 is_stmt 1 view -0 + 986 .cfi_startproc + 987 @ args = 0, pretend = 0, frame = 0 + 988 @ frame_needed = 0, uses_anonymous_args = 0 + 989 @ link register save eliminated. + 387:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 990 .loc 1 387 3 view .LVU346 + 392:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 991 .loc 1 392 1 is_stmt 0 view .LVU347 + 992 @ sp needed + 993 0000 7047 bx lr + 994 .cfi_endproc + 995 .LFE43: + 997 .section .text.HAL_TIM_Base_DeInit,"ax",%progbits + 998 .align 1 + 999 .global HAL_TIM_Base_DeInit + 1000 .syntax unified + 1001 .code 16 + 1002 .thumb_func + 1004 HAL_TIM_Base_DeInit: + 1005 .LVL108: + 1006 .LFB41: + 327:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** /* Check the parameters */ + 1007 .loc 1 327 1 is_stmt 1 view -0 + 1008 .cfi_startproc + 1009 @ args = 0, pretend = 0, frame = 0 + 1010 @ frame_needed = 0, uses_anonymous_args = 0 + 327:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** /* Check the parameters */ + 1011 .loc 1 327 1 is_stmt 0 view .LVU349 + 1012 0000 10B5 push {r4, lr} + 1013 .cfi_def_cfa_offset 8 + 1014 .cfi_offset 4, -8 + 1015 .cfi_offset 14, -4 + 1016 0002 0400 movs r4, r0 + 329:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 1017 .loc 1 329 3 is_stmt 1 view .LVU350 + 331:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 1018 .loc 1 331 3 view .LVU351 + 331:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 1019 .loc 1 331 15 is_stmt 0 view .LVU352 + 1020 0004 3D23 movs r3, #61 + 1021 0006 0222 movs r2, #2 + 1022 0008 C254 strb r2, [r0, r3] + 334:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 1023 .loc 1 334 3 is_stmt 1 view .LVU353 + 334:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 1024 .loc 1 334 3 view .LVU354 + 1025 000a 0368 ldr r3, [r0] + 1026 000c 196A ldr r1, [r3, #32] + ARM GAS /tmp/ccMtK8ce.s page 151 + + + 1027 000e 134A ldr r2, .L38 + 1028 0010 1142 tst r1, r2 + 1029 0012 07D1 bne .L37 + 334:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 1030 .loc 1 334 3 discriminator 1 view .LVU355 + 1031 0014 196A ldr r1, [r3, #32] + 1032 0016 124A ldr r2, .L38+4 + 1033 0018 1142 tst r1, r2 + 1034 001a 03D1 bne .L37 + 334:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 1035 .loc 1 334 3 discriminator 3 view .LVU356 + 1036 001c 1A68 ldr r2, [r3] + 1037 001e 0121 movs r1, #1 + 1038 0020 8A43 bics r2, r1 + 1039 0022 1A60 str r2, [r3] + 1040 .L37: + 334:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 1041 .loc 1 334 3 discriminator 5 view .LVU357 + 345:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** #endif /* USE_HAL_TIM_REGISTER_CALLBACKS */ + 1042 .loc 1 345 3 view .LVU358 + 1043 0024 2000 movs r0, r4 + 1044 .LVL109: + 345:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** #endif /* USE_HAL_TIM_REGISTER_CALLBACKS */ + 1045 .loc 1 345 3 is_stmt 0 view .LVU359 + 1046 0026 FFF7FEFF bl HAL_TIM_Base_MspDeInit + 1047 .LVL110: + 349:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 1048 .loc 1 349 3 is_stmt 1 view .LVU360 + 349:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 1049 .loc 1 349 23 is_stmt 0 view .LVU361 + 1050 002a 0023 movs r3, #0 + 1051 002c 4622 movs r2, #70 + 1052 002e A354 strb r3, [r4, r2] + 352:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** TIM_CHANNEL_N_STATE_SET_ALL(htim, HAL_TIM_CHANNEL_STATE_RESET); + 1053 .loc 1 352 3 is_stmt 1 view .LVU362 + 352:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** TIM_CHANNEL_N_STATE_SET_ALL(htim, HAL_TIM_CHANNEL_STATE_RESET); + 1054 .loc 1 352 3 view .LVU363 + 1055 0030 083A subs r2, r2, #8 + 1056 0032 A354 strb r3, [r4, r2] + 352:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** TIM_CHANNEL_N_STATE_SET_ALL(htim, HAL_TIM_CHANNEL_STATE_RESET); + 1057 .loc 1 352 3 view .LVU364 + 1058 0034 0132 adds r2, r2, #1 + 1059 0036 A354 strb r3, [r4, r2] + 352:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** TIM_CHANNEL_N_STATE_SET_ALL(htim, HAL_TIM_CHANNEL_STATE_RESET); + 1060 .loc 1 352 3 view .LVU365 + 1061 0038 0132 adds r2, r2, #1 + 1062 003a A354 strb r3, [r4, r2] + 352:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** TIM_CHANNEL_N_STATE_SET_ALL(htim, HAL_TIM_CHANNEL_STATE_RESET); + 1063 .loc 1 352 3 view .LVU366 + 1064 003c 0132 adds r2, r2, #1 + 1065 003e A354 strb r3, [r4, r2] + 352:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** TIM_CHANNEL_N_STATE_SET_ALL(htim, HAL_TIM_CHANNEL_STATE_RESET); + 1066 .loc 1 352 3 view .LVU367 + 353:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 1067 .loc 1 353 3 view .LVU368 + 353:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 1068 .loc 1 353 3 view .LVU369 + ARM GAS /tmp/ccMtK8ce.s page 152 + + + 1069 0040 0132 adds r2, r2, #1 + 1070 0042 A354 strb r3, [r4, r2] + 353:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 1071 .loc 1 353 3 view .LVU370 + 1072 0044 0132 adds r2, r2, #1 + 1073 0046 A354 strb r3, [r4, r2] + 353:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 1074 .loc 1 353 3 view .LVU371 + 1075 0048 0132 adds r2, r2, #1 + 1076 004a A354 strb r3, [r4, r2] + 353:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 1077 .loc 1 353 3 view .LVU372 + 1078 004c 0132 adds r2, r2, #1 + 1079 004e A354 strb r3, [r4, r2] + 353:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 1080 .loc 1 353 3 view .LVU373 + 356:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 1081 .loc 1 356 3 view .LVU374 + 356:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 1082 .loc 1 356 15 is_stmt 0 view .LVU375 + 1083 0050 083A subs r2, r2, #8 + 1084 0052 A354 strb r3, [r4, r2] + 359:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 1085 .loc 1 359 3 is_stmt 1 view .LVU376 + 359:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 1086 .loc 1 359 3 view .LVU377 + 1087 0054 013A subs r2, r2, #1 + 1088 0056 A354 strb r3, [r4, r2] + 359:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 1089 .loc 1 359 3 view .LVU378 + 361:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** } + 1090 .loc 1 361 3 view .LVU379 + 362:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 1091 .loc 1 362 1 is_stmt 0 view .LVU380 + 1092 0058 0020 movs r0, #0 + 1093 @ sp needed + 1094 .LVL111: + 362:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 1095 .loc 1 362 1 view .LVU381 + 1096 005a 10BD pop {r4, pc} + 1097 .L39: + 1098 .align 2 + 1099 .L38: + 1100 005c 11110000 .word 4369 + 1101 0060 44040000 .word 1092 + 1102 .cfi_endproc + 1103 .LFE41: + 1105 .section .text.HAL_TIM_Base_Start,"ax",%progbits + 1106 .align 1 + 1107 .global HAL_TIM_Base_Start + 1108 .syntax unified + 1109 .code 16 + 1110 .thumb_func + 1112 HAL_TIM_Base_Start: + 1113 .LVL112: + 1114 .LFB44: + 401:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** uint32_t tmpsmcr; + ARM GAS /tmp/ccMtK8ce.s page 153 + + + 1115 .loc 1 401 1 is_stmt 1 view -0 + 1116 .cfi_startproc + 1117 @ args = 0, pretend = 0, frame = 0 + 1118 @ frame_needed = 0, uses_anonymous_args = 0 + 1119 @ link register save eliminated. + 402:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 1120 .loc 1 402 3 view .LVU383 + 405:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 1121 .loc 1 405 3 view .LVU384 + 408:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** { + 1122 .loc 1 408 3 view .LVU385 + 408:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** { + 1123 .loc 1 408 11 is_stmt 0 view .LVU386 + 1124 0000 3D23 movs r3, #61 + 1125 0002 C35C ldrb r3, [r0, r3] + 408:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** { + 1126 .loc 1 408 6 view .LVU387 + 1127 0004 012B cmp r3, #1 + 1128 0006 1ED1 bne .L44 + 414:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 1129 .loc 1 414 3 is_stmt 1 view .LVU388 + 414:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 1130 .loc 1 414 15 is_stmt 0 view .LVU389 + 1131 0008 3C33 adds r3, r3, #60 + 1132 000a 0222 movs r2, #2 + 1133 000c C254 strb r2, [r0, r3] + 417:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** { + 1134 .loc 1 417 3 is_stmt 1 view .LVU390 + 417:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** { + 1135 .loc 1 417 7 is_stmt 0 view .LVU391 + 1136 000e 0368 ldr r3, [r0] + 417:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** { + 1137 .loc 1 417 6 view .LVU392 + 1138 0010 0F4A ldr r2, .L46 + 1139 0012 9342 cmp r3, r2 + 1140 0014 0CD0 beq .L42 + 417:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** { + 1141 .loc 1 417 7 discriminator 1 view .LVU393 + 1142 0016 8022 movs r2, #128 + 1143 0018 D205 lsls r2, r2, #23 + 1144 001a 9342 cmp r3, r2 + 1145 001c 08D0 beq .L42 + 417:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** { + 1146 .loc 1 417 7 discriminator 2 view .LVU394 + 1147 001e 0D4A ldr r2, .L46+4 + 1148 0020 9342 cmp r3, r2 + 1149 0022 05D0 beq .L42 + 427:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** } + 1150 .loc 1 427 5 is_stmt 1 view .LVU395 + 1151 0024 1A68 ldr r2, [r3] + 1152 0026 0121 movs r1, #1 + 1153 0028 0A43 orrs r2, r1 + 1154 002a 1A60 str r2, [r3] + 431:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** } + 1155 .loc 1 431 10 is_stmt 0 view .LVU396 + 1156 002c 0020 movs r0, #0 + 1157 .LVL113: + ARM GAS /tmp/ccMtK8ce.s page 154 + + + 431:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** } + 1158 .loc 1 431 10 view .LVU397 + 1159 002e 0BE0 b .L41 + 1160 .LVL114: + 1161 .L42: + 419:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** if (!IS_TIM_SLAVEMODE_TRIGGER_ENABLED(tmpsmcr)) + 1162 .loc 1 419 5 is_stmt 1 view .LVU398 + 419:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** if (!IS_TIM_SLAVEMODE_TRIGGER_ENABLED(tmpsmcr)) + 1163 .loc 1 419 29 is_stmt 0 view .LVU399 + 1164 0030 9968 ldr r1, [r3, #8] + 419:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** if (!IS_TIM_SLAVEMODE_TRIGGER_ENABLED(tmpsmcr)) + 1165 .loc 1 419 13 view .LVU400 + 1166 0032 0722 movs r2, #7 + 1167 0034 0A40 ands r2, r1 + 1168 .LVL115: + 420:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** { + 1169 .loc 1 420 5 is_stmt 1 view .LVU401 + 420:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** { + 1170 .loc 1 420 8 is_stmt 0 view .LVU402 + 1171 0036 062A cmp r2, #6 + 1172 0038 07D0 beq .L45 + 422:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** } + 1173 .loc 1 422 7 is_stmt 1 view .LVU403 + 1174 003a 1A68 ldr r2, [r3] + 1175 .LVL116: + 422:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** } + 1176 .loc 1 422 7 is_stmt 0 view .LVU404 + 1177 003c 0121 movs r1, #1 + 1178 .LVL117: + 422:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** } + 1179 .loc 1 422 7 view .LVU405 + 1180 003e 0A43 orrs r2, r1 + 1181 0040 1A60 str r2, [r3] + 431:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** } + 1182 .loc 1 431 10 view .LVU406 + 1183 0042 0020 movs r0, #0 + 1184 .LVL118: + 431:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** } + 1185 .loc 1 431 10 view .LVU407 + 1186 0044 00E0 b .L41 + 1187 .LVL119: + 1188 .L44: + 410:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** } + 1189 .loc 1 410 12 view .LVU408 + 1190 0046 0120 movs r0, #1 + 1191 .LVL120: + 1192 .L41: + 432:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 1193 .loc 1 432 1 view .LVU409 + 1194 @ sp needed + 1195 0048 7047 bx lr + 1196 .LVL121: + 1197 .L45: + 431:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** } + 1198 .loc 1 431 10 view .LVU410 + 1199 004a 0020 movs r0, #0 + 1200 .LVL122: + ARM GAS /tmp/ccMtK8ce.s page 155 + + + 431:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** } + 1201 .loc 1 431 10 view .LVU411 + 1202 004c FCE7 b .L41 + 1203 .L47: + 1204 004e C046 .align 2 + 1205 .L46: + 1206 0050 002C0140 .word 1073818624 + 1207 0054 00040040 .word 1073742848 + 1208 .cfi_endproc + 1209 .LFE44: + 1211 .section .text.HAL_TIM_Base_Stop,"ax",%progbits + 1212 .align 1 + 1213 .global HAL_TIM_Base_Stop + 1214 .syntax unified + 1215 .code 16 + 1216 .thumb_func + 1218 HAL_TIM_Base_Stop: + 1219 .LVL123: + 1220 .LFB45: + 440:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** /* Check the parameters */ + 1221 .loc 1 440 1 is_stmt 1 view -0 + 1222 .cfi_startproc + 1223 @ args = 0, pretend = 0, frame = 0 + 1224 @ frame_needed = 0, uses_anonymous_args = 0 + 1225 @ link register save eliminated. + 442:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 1226 .loc 1 442 3 view .LVU413 + 445:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 1227 .loc 1 445 3 view .LVU414 + 445:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 1228 .loc 1 445 3 view .LVU415 + 1229 0000 0368 ldr r3, [r0] + 1230 0002 196A ldr r1, [r3, #32] + 1231 0004 074A ldr r2, .L50 + 1232 0006 1142 tst r1, r2 + 1233 0008 07D1 bne .L49 + 445:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 1234 .loc 1 445 3 discriminator 1 view .LVU416 + 1235 000a 196A ldr r1, [r3, #32] + 1236 000c 064A ldr r2, .L50+4 + 1237 000e 1142 tst r1, r2 + 1238 0010 03D1 bne .L49 + 445:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 1239 .loc 1 445 3 discriminator 3 view .LVU417 + 1240 0012 1A68 ldr r2, [r3] + 1241 0014 0121 movs r1, #1 + 1242 0016 8A43 bics r2, r1 + 1243 0018 1A60 str r2, [r3] + 1244 .L49: + 445:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 1245 .loc 1 445 3 discriminator 5 view .LVU418 + 448:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 1246 .loc 1 448 3 view .LVU419 + 448:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 1247 .loc 1 448 15 is_stmt 0 view .LVU420 + 1248 001a 3D23 movs r3, #61 + 1249 001c 0122 movs r2, #1 + ARM GAS /tmp/ccMtK8ce.s page 156 + + + 1250 001e C254 strb r2, [r0, r3] + 451:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** } + 1251 .loc 1 451 3 is_stmt 1 view .LVU421 + 452:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 1252 .loc 1 452 1 is_stmt 0 view .LVU422 + 1253 0020 0020 movs r0, #0 + 1254 .LVL124: + 452:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 1255 .loc 1 452 1 view .LVU423 + 1256 @ sp needed + 1257 0022 7047 bx lr + 1258 .L51: + 1259 .align 2 + 1260 .L50: + 1261 0024 11110000 .word 4369 + 1262 0028 44040000 .word 1092 + 1263 .cfi_endproc + 1264 .LFE45: + 1266 .section .text.HAL_TIM_Base_Start_IT,"ax",%progbits + 1267 .align 1 + 1268 .global HAL_TIM_Base_Start_IT + 1269 .syntax unified + 1270 .code 16 + 1271 .thumb_func + 1273 HAL_TIM_Base_Start_IT: + 1274 .LVL125: + 1275 .LFB46: + 460:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** uint32_t tmpsmcr; + 1276 .loc 1 460 1 is_stmt 1 view -0 + 1277 .cfi_startproc + 1278 @ args = 0, pretend = 0, frame = 0 + 1279 @ frame_needed = 0, uses_anonymous_args = 0 + 1280 @ link register save eliminated. + 461:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 1281 .loc 1 461 3 view .LVU425 + 464:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 1282 .loc 1 464 3 view .LVU426 + 467:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** { + 1283 .loc 1 467 3 view .LVU427 + 467:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** { + 1284 .loc 1 467 11 is_stmt 0 view .LVU428 + 1285 0000 3D23 movs r3, #61 + 1286 0002 C35C ldrb r3, [r0, r3] + 467:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** { + 1287 .loc 1 467 6 view .LVU429 + 1288 0004 012B cmp r3, #1 + 1289 0006 23D1 bne .L56 + 473:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 1290 .loc 1 473 3 is_stmt 1 view .LVU430 + 473:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 1291 .loc 1 473 15 is_stmt 0 view .LVU431 + 1292 0008 3C33 adds r3, r3, #60 + 1293 000a 0222 movs r2, #2 + 1294 000c C254 strb r2, [r0, r3] + 476:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 1295 .loc 1 476 3 is_stmt 1 view .LVU432 + 1296 000e 0268 ldr r2, [r0] + ARM GAS /tmp/ccMtK8ce.s page 157 + + + 1297 0010 D368 ldr r3, [r2, #12] + 1298 0012 0121 movs r1, #1 + 1299 0014 0B43 orrs r3, r1 + 1300 0016 D360 str r3, [r2, #12] + 479:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** { + 1301 .loc 1 479 3 view .LVU433 + 479:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** { + 1302 .loc 1 479 7 is_stmt 0 view .LVU434 + 1303 0018 0368 ldr r3, [r0] + 479:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** { + 1304 .loc 1 479 6 view .LVU435 + 1305 001a 0F4A ldr r2, .L58 + 1306 001c 9342 cmp r3, r2 + 1307 001e 0CD0 beq .L54 + 479:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** { + 1308 .loc 1 479 7 discriminator 1 view .LVU436 + 1309 0020 8022 movs r2, #128 + 1310 0022 D205 lsls r2, r2, #23 + 1311 0024 9342 cmp r3, r2 + 1312 0026 08D0 beq .L54 + 479:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** { + 1313 .loc 1 479 7 discriminator 2 view .LVU437 + 1314 0028 0C4A ldr r2, .L58+4 + 1315 002a 9342 cmp r3, r2 + 1316 002c 05D0 beq .L54 + 489:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** } + 1317 .loc 1 489 5 is_stmt 1 view .LVU438 + 1318 002e 1A68 ldr r2, [r3] + 1319 0030 0121 movs r1, #1 + 1320 0032 0A43 orrs r2, r1 + 1321 0034 1A60 str r2, [r3] + 493:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** } + 1322 .loc 1 493 10 is_stmt 0 view .LVU439 + 1323 0036 0020 movs r0, #0 + 1324 .LVL126: + 493:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** } + 1325 .loc 1 493 10 view .LVU440 + 1326 0038 0BE0 b .L53 + 1327 .LVL127: + 1328 .L54: + 481:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** if (!IS_TIM_SLAVEMODE_TRIGGER_ENABLED(tmpsmcr)) + 1329 .loc 1 481 5 is_stmt 1 view .LVU441 + 481:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** if (!IS_TIM_SLAVEMODE_TRIGGER_ENABLED(tmpsmcr)) + 1330 .loc 1 481 29 is_stmt 0 view .LVU442 + 1331 003a 9968 ldr r1, [r3, #8] + 481:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** if (!IS_TIM_SLAVEMODE_TRIGGER_ENABLED(tmpsmcr)) + 1332 .loc 1 481 13 view .LVU443 + 1333 003c 0722 movs r2, #7 + 1334 003e 0A40 ands r2, r1 + 1335 .LVL128: + 482:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** { + 1336 .loc 1 482 5 is_stmt 1 view .LVU444 + 482:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** { + 1337 .loc 1 482 8 is_stmt 0 view .LVU445 + 1338 0040 062A cmp r2, #6 + 1339 0042 07D0 beq .L57 + 484:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** } + ARM GAS /tmp/ccMtK8ce.s page 158 + + + 1340 .loc 1 484 7 is_stmt 1 view .LVU446 + 1341 0044 1A68 ldr r2, [r3] + 1342 .LVL129: + 484:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** } + 1343 .loc 1 484 7 is_stmt 0 view .LVU447 + 1344 0046 0121 movs r1, #1 + 1345 .LVL130: + 484:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** } + 1346 .loc 1 484 7 view .LVU448 + 1347 0048 0A43 orrs r2, r1 + 1348 004a 1A60 str r2, [r3] + 493:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** } + 1349 .loc 1 493 10 view .LVU449 + 1350 004c 0020 movs r0, #0 + 1351 .LVL131: + 493:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** } + 1352 .loc 1 493 10 view .LVU450 + 1353 004e 00E0 b .L53 + 1354 .LVL132: + 1355 .L56: + 469:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** } + 1356 .loc 1 469 12 view .LVU451 + 1357 0050 0120 movs r0, #1 + 1358 .LVL133: + 1359 .L53: + 494:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 1360 .loc 1 494 1 view .LVU452 + 1361 @ sp needed + 1362 0052 7047 bx lr + 1363 .LVL134: + 1364 .L57: + 493:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** } + 1365 .loc 1 493 10 view .LVU453 + 1366 0054 0020 movs r0, #0 + 1367 .LVL135: + 493:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** } + 1368 .loc 1 493 10 view .LVU454 + 1369 0056 FCE7 b .L53 + 1370 .L59: + 1371 .align 2 + 1372 .L58: + 1373 0058 002C0140 .word 1073818624 + 1374 005c 00040040 .word 1073742848 + 1375 .cfi_endproc + 1376 .LFE46: + 1378 .section .text.HAL_TIM_Base_Stop_IT,"ax",%progbits + 1379 .align 1 + 1380 .global HAL_TIM_Base_Stop_IT + 1381 .syntax unified + 1382 .code 16 + 1383 .thumb_func + 1385 HAL_TIM_Base_Stop_IT: + 1386 .LVL136: + 1387 .LFB47: + 502:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** /* Check the parameters */ + 1388 .loc 1 502 1 is_stmt 1 view -0 + 1389 .cfi_startproc + ARM GAS /tmp/ccMtK8ce.s page 159 + + + 1390 @ args = 0, pretend = 0, frame = 0 + 1391 @ frame_needed = 0, uses_anonymous_args = 0 + 1392 @ link register save eliminated. + 504:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 1393 .loc 1 504 3 view .LVU456 + 507:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 1394 .loc 1 507 3 view .LVU457 + 1395 0000 0268 ldr r2, [r0] + 1396 0002 D368 ldr r3, [r2, #12] + 1397 0004 0121 movs r1, #1 + 1398 0006 8B43 bics r3, r1 + 1399 0008 D360 str r3, [r2, #12] + 510:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 1400 .loc 1 510 3 view .LVU458 + 510:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 1401 .loc 1 510 3 view .LVU459 + 1402 000a 0368 ldr r3, [r0] + 1403 000c 196A ldr r1, [r3, #32] + 1404 000e 084A ldr r2, .L62 + 1405 0010 1142 tst r1, r2 + 1406 0012 07D1 bne .L61 + 510:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 1407 .loc 1 510 3 discriminator 1 view .LVU460 + 1408 0014 196A ldr r1, [r3, #32] + 1409 0016 074A ldr r2, .L62+4 + 1410 0018 1142 tst r1, r2 + 1411 001a 03D1 bne .L61 + 510:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 1412 .loc 1 510 3 discriminator 3 view .LVU461 + 1413 001c 1A68 ldr r2, [r3] + 1414 001e 0121 movs r1, #1 + 1415 0020 8A43 bics r2, r1 + 1416 0022 1A60 str r2, [r3] + 1417 .L61: + 510:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 1418 .loc 1 510 3 discriminator 5 view .LVU462 + 513:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 1419 .loc 1 513 3 view .LVU463 + 513:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 1420 .loc 1 513 15 is_stmt 0 view .LVU464 + 1421 0024 3D23 movs r3, #61 + 1422 0026 0122 movs r2, #1 + 1423 0028 C254 strb r2, [r0, r3] + 516:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** } + 1424 .loc 1 516 3 is_stmt 1 view .LVU465 + 517:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 1425 .loc 1 517 1 is_stmt 0 view .LVU466 + 1426 002a 0020 movs r0, #0 + 1427 .LVL137: + 517:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 1428 .loc 1 517 1 view .LVU467 + 1429 @ sp needed + 1430 002c 7047 bx lr + 1431 .L63: + 1432 002e C046 .align 2 + 1433 .L62: + 1434 0030 11110000 .word 4369 + ARM GAS /tmp/ccMtK8ce.s page 160 + + + 1435 0034 44040000 .word 1092 + 1436 .cfi_endproc + 1437 .LFE47: + 1439 .section .text.HAL_TIM_Base_Start_DMA,"ax",%progbits + 1440 .align 1 + 1441 .global HAL_TIM_Base_Start_DMA + 1442 .syntax unified + 1443 .code 16 + 1444 .thumb_func + 1446 HAL_TIM_Base_Start_DMA: + 1447 .LVL138: + 1448 .LFB48: + 527:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** uint32_t tmpsmcr; + 1449 .loc 1 527 1 is_stmt 1 view -0 + 1450 .cfi_startproc + 1451 @ args = 0, pretend = 0, frame = 0 + 1452 @ frame_needed = 0, uses_anonymous_args = 0 + 527:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** uint32_t tmpsmcr; + 1453 .loc 1 527 1 is_stmt 0 view .LVU469 + 1454 0000 70B5 push {r4, r5, r6, lr} + 1455 .cfi_def_cfa_offset 16 + 1456 .cfi_offset 4, -16 + 1457 .cfi_offset 5, -12 + 1458 .cfi_offset 6, -8 + 1459 .cfi_offset 14, -4 + 1460 0002 0400 movs r4, r0 + 1461 0004 1300 movs r3, r2 + 528:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 1462 .loc 1 528 3 is_stmt 1 view .LVU470 + 531:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 1463 .loc 1 531 3 view .LVU471 + 534:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** { + 1464 .loc 1 534 3 view .LVU472 + 534:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** { + 1465 .loc 1 534 11 is_stmt 0 view .LVU473 + 1466 0006 3D20 movs r0, #61 + 1467 .LVL139: + 534:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** { + 1468 .loc 1 534 11 view .LVU474 + 1469 0008 205C ldrb r0, [r4, r0] + 1470 000a C5B2 uxtb r5, r0 + 534:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** { + 1471 .loc 1 534 6 view .LVU475 + 1472 000c 0228 cmp r0, #2 + 1473 000e 3DD0 beq .L65 + 538:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** { + 1474 .loc 1 538 8 is_stmt 1 view .LVU476 + 538:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** { + 1475 .loc 1 538 16 is_stmt 0 view .LVU477 + 1476 0010 3D22 movs r2, #61 + 1477 .LVL140: + 538:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** { + 1478 .loc 1 538 16 view .LVU478 + 1479 0012 A05C ldrb r0, [r4, r2] + 1480 0014 C5B2 uxtb r5, r0 + 538:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** { + 1481 .loc 1 538 11 view .LVU479 + ARM GAS /tmp/ccMtK8ce.s page 161 + + + 1482 0016 0128 cmp r0, #1 + 1483 0018 37D1 bne .L68 + 540:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** { + 1484 .loc 1 540 5 is_stmt 1 view .LVU480 + 540:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** { + 1485 .loc 1 540 8 is_stmt 0 view .LVU481 + 1486 001a 0029 cmp r1, #0 + 1487 001c 36D0 beq .L65 + 540:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** { + 1488 .loc 1 540 25 discriminator 1 view .LVU482 + 1489 001e 002B cmp r3, #0 + 1490 0020 34D0 beq .L65 + 546:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** } + 1491 .loc 1 546 7 is_stmt 1 view .LVU483 + 546:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** } + 1492 .loc 1 546 19 is_stmt 0 view .LVU484 + 1493 0022 0130 adds r0, r0, #1 + 1494 0024 A054 strb r0, [r4, r2] + 555:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** htim->hdma[TIM_DMA_ID_UPDATE]->XferHalfCpltCallback = TIM_DMAPeriodElapsedHalfCplt; + 1495 .loc 1 555 3 is_stmt 1 view .LVU485 + 555:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** htim->hdma[TIM_DMA_ID_UPDATE]->XferHalfCpltCallback = TIM_DMAPeriodElapsedHalfCplt; + 1496 .loc 1 555 13 is_stmt 0 view .LVU486 + 1497 0026 226A ldr r2, [r4, #32] + 555:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** htim->hdma[TIM_DMA_ID_UPDATE]->XferHalfCpltCallback = TIM_DMAPeriodElapsedHalfCplt; + 1498 .loc 1 555 51 view .LVU487 + 1499 0028 1A48 ldr r0, .L70 + 1500 002a 9062 str r0, [r2, #40] + 556:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 1501 .loc 1 556 3 is_stmt 1 view .LVU488 + 556:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 1502 .loc 1 556 13 is_stmt 0 view .LVU489 + 1503 002c 226A ldr r2, [r4, #32] + 556:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 1504 .loc 1 556 55 view .LVU490 + 1505 002e 1A48 ldr r0, .L70+4 + 1506 0030 D062 str r0, [r2, #44] + 559:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 1507 .loc 1 559 3 is_stmt 1 view .LVU491 + 559:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 1508 .loc 1 559 13 is_stmt 0 view .LVU492 + 1509 0032 226A ldr r2, [r4, #32] + 559:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 1510 .loc 1 559 52 view .LVU493 + 1511 0034 1948 ldr r0, .L70+8 + 1512 0036 1063 str r0, [r2, #48] + 562:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** Length) != HAL_OK) + 1513 .loc 1 562 3 is_stmt 1 view .LVU494 + 562:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** Length) != HAL_OK) + 1514 .loc 1 562 87 is_stmt 0 view .LVU495 + 1515 0038 2268 ldr r2, [r4] + 562:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** Length) != HAL_OK) + 1516 .loc 1 562 82 view .LVU496 + 1517 003a 2C32 adds r2, r2, #44 + 562:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** Length) != HAL_OK) + 1518 .loc 1 562 7 view .LVU497 + 1519 003c 206A ldr r0, [r4, #32] + 1520 003e FFF7FEFF bl HAL_DMA_Start_IT + ARM GAS /tmp/ccMtK8ce.s page 162 + + + 1521 .LVL141: + 562:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** Length) != HAL_OK) + 1522 .loc 1 562 6 discriminator 1 view .LVU498 + 1523 0042 0028 cmp r0, #0 + 1524 0044 22D1 bne .L65 + 570:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 1525 .loc 1 570 3 is_stmt 1 view .LVU499 + 1526 0046 2268 ldr r2, [r4] + 1527 0048 D168 ldr r1, [r2, #12] + 1528 004a 8023 movs r3, #128 + 1529 004c 5B00 lsls r3, r3, #1 + 1530 004e 0B43 orrs r3, r1 + 1531 0050 D360 str r3, [r2, #12] + 573:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** { + 1532 .loc 1 573 3 view .LVU500 + 573:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** { + 1533 .loc 1 573 7 is_stmt 0 view .LVU501 + 1534 0052 2368 ldr r3, [r4] + 573:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** { + 1535 .loc 1 573 6 view .LVU502 + 1536 0054 124A ldr r2, .L70+12 + 1537 0056 9342 cmp r3, r2 + 1538 0058 0CD0 beq .L66 + 573:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** { + 1539 .loc 1 573 7 discriminator 1 view .LVU503 + 1540 005a 8022 movs r2, #128 + 1541 005c D205 lsls r2, r2, #23 + 1542 005e 9342 cmp r3, r2 + 1543 0060 08D0 beq .L66 + 573:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** { + 1544 .loc 1 573 7 discriminator 2 view .LVU504 + 1545 0062 104A ldr r2, .L70+16 + 1546 0064 9342 cmp r3, r2 + 1547 0066 05D0 beq .L66 + 583:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** } + 1548 .loc 1 583 5 is_stmt 1 view .LVU505 + 1549 0068 1A68 ldr r2, [r3] + 1550 006a 0121 movs r1, #1 + 1551 006c 0A43 orrs r2, r1 + 1552 006e 1A60 str r2, [r3] + 587:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** } + 1553 .loc 1 587 10 is_stmt 0 view .LVU506 + 1554 0070 0500 movs r5, r0 + 1555 0072 0BE0 b .L65 + 1556 .L66: + 575:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** if (!IS_TIM_SLAVEMODE_TRIGGER_ENABLED(tmpsmcr)) + 1557 .loc 1 575 5 is_stmt 1 view .LVU507 + 575:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** if (!IS_TIM_SLAVEMODE_TRIGGER_ENABLED(tmpsmcr)) + 1558 .loc 1 575 29 is_stmt 0 view .LVU508 + 1559 0074 9968 ldr r1, [r3, #8] + 575:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** if (!IS_TIM_SLAVEMODE_TRIGGER_ENABLED(tmpsmcr)) + 1560 .loc 1 575 13 view .LVU509 + 1561 0076 0722 movs r2, #7 + 1562 0078 0A40 ands r2, r1 + 1563 .LVL142: + 576:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** { + 1564 .loc 1 576 5 is_stmt 1 view .LVU510 + ARM GAS /tmp/ccMtK8ce.s page 163 + + + 576:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** { + 1565 .loc 1 576 8 is_stmt 0 view .LVU511 + 1566 007a 062A cmp r2, #6 + 1567 007c 08D0 beq .L69 + 578:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** } + 1568 .loc 1 578 7 is_stmt 1 view .LVU512 + 1569 007e 1A68 ldr r2, [r3] + 1570 .LVL143: + 578:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** } + 1571 .loc 1 578 7 is_stmt 0 view .LVU513 + 1572 0080 0121 movs r1, #1 + 1573 .LVL144: + 578:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** } + 1574 .loc 1 578 7 view .LVU514 + 1575 0082 0A43 orrs r2, r1 + 1576 0084 1A60 str r2, [r3] + 587:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** } + 1577 .loc 1 587 10 view .LVU515 + 1578 0086 0500 movs r5, r0 + 1579 0088 00E0 b .L65 + 1580 .LVL145: + 1581 .L68: + 551:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** } + 1582 .loc 1 551 12 view .LVU516 + 1583 008a 0125 movs r5, #1 + 1584 .LVL146: + 1585 .L65: + 588:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 1586 .loc 1 588 1 view .LVU517 + 1587 008c 2800 movs r0, r5 + 1588 @ sp needed + 1589 .LVL147: + 588:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 1590 .loc 1 588 1 view .LVU518 + 1591 008e 70BD pop {r4, r5, r6, pc} + 1592 .LVL148: + 1593 .L69: + 587:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** } + 1594 .loc 1 587 10 view .LVU519 + 1595 0090 0500 movs r5, r0 + 1596 0092 FBE7 b .L65 + 1597 .L71: + 1598 .align 2 + 1599 .L70: + 1600 0094 00000000 .word TIM_DMAPeriodElapsedCplt + 1601 0098 00000000 .word TIM_DMAPeriodElapsedHalfCplt + 1602 009c 00000000 .word TIM_DMAError + 1603 00a0 002C0140 .word 1073818624 + 1604 00a4 00040040 .word 1073742848 + 1605 .cfi_endproc + 1606 .LFE48: + 1608 .section .text.HAL_TIM_Base_Stop_DMA,"ax",%progbits + 1609 .align 1 + 1610 .global HAL_TIM_Base_Stop_DMA + 1611 .syntax unified + 1612 .code 16 + 1613 .thumb_func + ARM GAS /tmp/ccMtK8ce.s page 164 + + + 1615 HAL_TIM_Base_Stop_DMA: + 1616 .LVL149: + 1617 .LFB49: + 596:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** /* Check the parameters */ + 1618 .loc 1 596 1 is_stmt 1 view -0 + 1619 .cfi_startproc + 1620 @ args = 0, pretend = 0, frame = 0 + 1621 @ frame_needed = 0, uses_anonymous_args = 0 + 596:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** /* Check the parameters */ + 1622 .loc 1 596 1 is_stmt 0 view .LVU521 + 1623 0000 10B5 push {r4, lr} + 1624 .cfi_def_cfa_offset 8 + 1625 .cfi_offset 4, -8 + 1626 .cfi_offset 14, -4 + 1627 0002 0400 movs r4, r0 + 598:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 1628 .loc 1 598 3 is_stmt 1 view .LVU522 + 601:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 1629 .loc 1 601 3 view .LVU523 + 1630 0004 0268 ldr r2, [r0] + 1631 0006 D368 ldr r3, [r2, #12] + 1632 0008 0B49 ldr r1, .L74 + 1633 000a 0B40 ands r3, r1 + 1634 000c D360 str r3, [r2, #12] + 603:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 1635 .loc 1 603 3 view .LVU524 + 603:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 1636 .loc 1 603 9 is_stmt 0 view .LVU525 + 1637 000e 006A ldr r0, [r0, #32] + 1638 .LVL150: + 603:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 1639 .loc 1 603 9 view .LVU526 + 1640 0010 FFF7FEFF bl HAL_DMA_Abort_IT + 1641 .LVL151: + 606:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 1642 .loc 1 606 3 is_stmt 1 view .LVU527 + 606:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 1643 .loc 1 606 3 view .LVU528 + 1644 0014 2368 ldr r3, [r4] + 1645 0016 196A ldr r1, [r3, #32] + 1646 0018 084A ldr r2, .L74+4 + 1647 001a 1142 tst r1, r2 + 1648 001c 07D1 bne .L73 + 606:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 1649 .loc 1 606 3 discriminator 1 view .LVU529 + 1650 001e 196A ldr r1, [r3, #32] + 1651 0020 074A ldr r2, .L74+8 + 1652 0022 1142 tst r1, r2 + 1653 0024 03D1 bne .L73 + 606:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 1654 .loc 1 606 3 discriminator 3 view .LVU530 + 1655 0026 1A68 ldr r2, [r3] + 1656 0028 0121 movs r1, #1 + 1657 002a 8A43 bics r2, r1 + 1658 002c 1A60 str r2, [r3] + 1659 .L73: + 606:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + ARM GAS /tmp/ccMtK8ce.s page 165 + + + 1660 .loc 1 606 3 discriminator 5 view .LVU531 + 609:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 1661 .loc 1 609 3 view .LVU532 + 609:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 1662 .loc 1 609 15 is_stmt 0 view .LVU533 + 1663 002e 3D23 movs r3, #61 + 1664 0030 0122 movs r2, #1 + 1665 0032 E254 strb r2, [r4, r3] + 612:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** } + 1666 .loc 1 612 3 is_stmt 1 view .LVU534 + 613:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 1667 .loc 1 613 1 is_stmt 0 view .LVU535 + 1668 0034 0020 movs r0, #0 + 1669 @ sp needed + 1670 .LVL152: + 613:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 1671 .loc 1 613 1 view .LVU536 + 1672 0036 10BD pop {r4, pc} + 1673 .L75: + 1674 .align 2 + 1675 .L74: + 1676 0038 FFFEFFFF .word -257 + 1677 003c 11110000 .word 4369 + 1678 0040 44040000 .word 1092 + 1679 .cfi_endproc + 1680 .LFE49: + 1682 .section .text.HAL_TIM_OC_MspInit,"ax",%progbits + 1683 .align 1 + 1684 .weak HAL_TIM_OC_MspInit + 1685 .syntax unified + 1686 .code 16 + 1687 .thumb_func + 1689 HAL_TIM_OC_MspInit: + 1690 .LVL153: + 1691 .LFB52: + 754:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** /* Prevent unused argument(s) compilation warning */ + 1692 .loc 1 754 1 is_stmt 1 view -0 + 1693 .cfi_startproc + 1694 @ args = 0, pretend = 0, frame = 0 + 1695 @ frame_needed = 0, uses_anonymous_args = 0 + 1696 @ link register save eliminated. + 756:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 1697 .loc 1 756 3 view .LVU538 + 761:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 1698 .loc 1 761 1 is_stmt 0 view .LVU539 + 1699 @ sp needed + 1700 0000 7047 bx lr + 1701 .cfi_endproc + 1702 .LFE52: + 1704 .section .text.HAL_TIM_OC_MspDeInit,"ax",%progbits + 1705 .align 1 + 1706 .weak HAL_TIM_OC_MspDeInit + 1707 .syntax unified + 1708 .code 16 + 1709 .thumb_func + 1711 HAL_TIM_OC_MspDeInit: + 1712 .LVL154: + ARM GAS /tmp/ccMtK8ce.s page 166 + + + 1713 .LFB53: + 769:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** /* Prevent unused argument(s) compilation warning */ + 1714 .loc 1 769 1 is_stmt 1 view -0 + 1715 .cfi_startproc + 1716 @ args = 0, pretend = 0, frame = 0 + 1717 @ frame_needed = 0, uses_anonymous_args = 0 + 1718 @ link register save eliminated. + 771:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 1719 .loc 1 771 3 view .LVU541 + 776:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 1720 .loc 1 776 1 is_stmt 0 view .LVU542 + 1721 @ sp needed + 1722 0000 7047 bx lr + 1723 .cfi_endproc + 1724 .LFE53: + 1726 .section .text.HAL_TIM_OC_DeInit,"ax",%progbits + 1727 .align 1 + 1728 .global HAL_TIM_OC_DeInit + 1729 .syntax unified + 1730 .code 16 + 1731 .thumb_func + 1733 HAL_TIM_OC_DeInit: + 1734 .LVL155: + 1735 .LFB51: + 711:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** /* Check the parameters */ + 1736 .loc 1 711 1 is_stmt 1 view -0 + 1737 .cfi_startproc + 1738 @ args = 0, pretend = 0, frame = 0 + 1739 @ frame_needed = 0, uses_anonymous_args = 0 + 711:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** /* Check the parameters */ + 1740 .loc 1 711 1 is_stmt 0 view .LVU544 + 1741 0000 10B5 push {r4, lr} + 1742 .cfi_def_cfa_offset 8 + 1743 .cfi_offset 4, -8 + 1744 .cfi_offset 14, -4 + 1745 0002 0400 movs r4, r0 + 713:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 1746 .loc 1 713 3 is_stmt 1 view .LVU545 + 715:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 1747 .loc 1 715 3 view .LVU546 + 715:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 1748 .loc 1 715 15 is_stmt 0 view .LVU547 + 1749 0004 3D23 movs r3, #61 + 1750 0006 0222 movs r2, #2 + 1751 0008 C254 strb r2, [r0, r3] + 718:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 1752 .loc 1 718 3 is_stmt 1 view .LVU548 + 718:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 1753 .loc 1 718 3 view .LVU549 + 1754 000a 0368 ldr r3, [r0] + 1755 000c 196A ldr r1, [r3, #32] + 1756 000e 134A ldr r2, .L80 + 1757 0010 1142 tst r1, r2 + 1758 0012 07D1 bne .L79 + 718:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 1759 .loc 1 718 3 discriminator 1 view .LVU550 + 1760 0014 196A ldr r1, [r3, #32] + ARM GAS /tmp/ccMtK8ce.s page 167 + + + 1761 0016 124A ldr r2, .L80+4 + 1762 0018 1142 tst r1, r2 + 1763 001a 03D1 bne .L79 + 718:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 1764 .loc 1 718 3 discriminator 3 view .LVU551 + 1765 001c 1A68 ldr r2, [r3] + 1766 001e 0121 movs r1, #1 + 1767 0020 8A43 bics r2, r1 + 1768 0022 1A60 str r2, [r3] + 1769 .L79: + 718:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 1770 .loc 1 718 3 discriminator 5 view .LVU552 + 729:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** #endif /* USE_HAL_TIM_REGISTER_CALLBACKS */ + 1771 .loc 1 729 3 view .LVU553 + 1772 0024 2000 movs r0, r4 + 1773 .LVL156: + 729:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** #endif /* USE_HAL_TIM_REGISTER_CALLBACKS */ + 1774 .loc 1 729 3 is_stmt 0 view .LVU554 + 1775 0026 FFF7FEFF bl HAL_TIM_OC_MspDeInit + 1776 .LVL157: + 733:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 1777 .loc 1 733 3 is_stmt 1 view .LVU555 + 733:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 1778 .loc 1 733 23 is_stmt 0 view .LVU556 + 1779 002a 0023 movs r3, #0 + 1780 002c 4622 movs r2, #70 + 1781 002e A354 strb r3, [r4, r2] + 736:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** TIM_CHANNEL_N_STATE_SET_ALL(htim, HAL_TIM_CHANNEL_STATE_RESET); + 1782 .loc 1 736 3 is_stmt 1 view .LVU557 + 736:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** TIM_CHANNEL_N_STATE_SET_ALL(htim, HAL_TIM_CHANNEL_STATE_RESET); + 1783 .loc 1 736 3 view .LVU558 + 1784 0030 083A subs r2, r2, #8 + 1785 0032 A354 strb r3, [r4, r2] + 736:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** TIM_CHANNEL_N_STATE_SET_ALL(htim, HAL_TIM_CHANNEL_STATE_RESET); + 1786 .loc 1 736 3 view .LVU559 + 1787 0034 0132 adds r2, r2, #1 + 1788 0036 A354 strb r3, [r4, r2] + 736:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** TIM_CHANNEL_N_STATE_SET_ALL(htim, HAL_TIM_CHANNEL_STATE_RESET); + 1789 .loc 1 736 3 view .LVU560 + 1790 0038 0132 adds r2, r2, #1 + 1791 003a A354 strb r3, [r4, r2] + 736:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** TIM_CHANNEL_N_STATE_SET_ALL(htim, HAL_TIM_CHANNEL_STATE_RESET); + 1792 .loc 1 736 3 view .LVU561 + 1793 003c 0132 adds r2, r2, #1 + 1794 003e A354 strb r3, [r4, r2] + 736:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** TIM_CHANNEL_N_STATE_SET_ALL(htim, HAL_TIM_CHANNEL_STATE_RESET); + 1795 .loc 1 736 3 view .LVU562 + 737:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 1796 .loc 1 737 3 view .LVU563 + 737:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 1797 .loc 1 737 3 view .LVU564 + 1798 0040 0132 adds r2, r2, #1 + 1799 0042 A354 strb r3, [r4, r2] + 737:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 1800 .loc 1 737 3 view .LVU565 + 1801 0044 0132 adds r2, r2, #1 + 1802 0046 A354 strb r3, [r4, r2] + ARM GAS /tmp/ccMtK8ce.s page 168 + + + 737:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 1803 .loc 1 737 3 view .LVU566 + 1804 0048 0132 adds r2, r2, #1 + 1805 004a A354 strb r3, [r4, r2] + 737:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 1806 .loc 1 737 3 view .LVU567 + 1807 004c 0132 adds r2, r2, #1 + 1808 004e A354 strb r3, [r4, r2] + 737:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 1809 .loc 1 737 3 view .LVU568 + 740:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 1810 .loc 1 740 3 view .LVU569 + 740:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 1811 .loc 1 740 15 is_stmt 0 view .LVU570 + 1812 0050 083A subs r2, r2, #8 + 1813 0052 A354 strb r3, [r4, r2] + 743:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 1814 .loc 1 743 3 is_stmt 1 view .LVU571 + 743:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 1815 .loc 1 743 3 view .LVU572 + 1816 0054 013A subs r2, r2, #1 + 1817 0056 A354 strb r3, [r4, r2] + 743:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 1818 .loc 1 743 3 view .LVU573 + 745:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** } + 1819 .loc 1 745 3 view .LVU574 + 746:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 1820 .loc 1 746 1 is_stmt 0 view .LVU575 + 1821 0058 0020 movs r0, #0 + 1822 @ sp needed + 1823 .LVL158: + 746:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 1824 .loc 1 746 1 view .LVU576 + 1825 005a 10BD pop {r4, pc} + 1826 .L81: + 1827 .align 2 + 1828 .L80: + 1829 005c 11110000 .word 4369 + 1830 0060 44040000 .word 1092 + 1831 .cfi_endproc + 1832 .LFE51: + 1834 .section .text.HAL_TIM_PWM_MspInit,"ax",%progbits + 1835 .align 1 + 1836 .weak HAL_TIM_PWM_MspInit + 1837 .syntax unified + 1838 .code 16 + 1839 .thumb_func + 1841 HAL_TIM_PWM_MspInit: + 1842 .LVL159: + 1843 .LFB62: +1419:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** /* Prevent unused argument(s) compilation warning */ + 1844 .loc 1 1419 1 is_stmt 1 view -0 + 1845 .cfi_startproc + 1846 @ args = 0, pretend = 0, frame = 0 + 1847 @ frame_needed = 0, uses_anonymous_args = 0 + 1848 @ link register save eliminated. +1421:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + ARM GAS /tmp/ccMtK8ce.s page 169 + + + 1849 .loc 1 1421 3 view .LVU578 +1426:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 1850 .loc 1 1426 1 is_stmt 0 view .LVU579 + 1851 @ sp needed + 1852 0000 7047 bx lr + 1853 .cfi_endproc + 1854 .LFE62: + 1856 .section .text.HAL_TIM_PWM_MspDeInit,"ax",%progbits + 1857 .align 1 + 1858 .weak HAL_TIM_PWM_MspDeInit + 1859 .syntax unified + 1860 .code 16 + 1861 .thumb_func + 1863 HAL_TIM_PWM_MspDeInit: + 1864 .LVL160: + 1865 .LFB63: +1434:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** /* Prevent unused argument(s) compilation warning */ + 1866 .loc 1 1434 1 is_stmt 1 view -0 + 1867 .cfi_startproc + 1868 @ args = 0, pretend = 0, frame = 0 + 1869 @ frame_needed = 0, uses_anonymous_args = 0 + 1870 @ link register save eliminated. +1436:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 1871 .loc 1 1436 3 view .LVU581 +1441:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 1872 .loc 1 1441 1 is_stmt 0 view .LVU582 + 1873 @ sp needed + 1874 0000 7047 bx lr + 1875 .cfi_endproc + 1876 .LFE63: + 1878 .section .text.HAL_TIM_PWM_DeInit,"ax",%progbits + 1879 .align 1 + 1880 .global HAL_TIM_PWM_DeInit + 1881 .syntax unified + 1882 .code 16 + 1883 .thumb_func + 1885 HAL_TIM_PWM_DeInit: + 1886 .LVL161: + 1887 .LFB61: +1376:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** /* Check the parameters */ + 1888 .loc 1 1376 1 is_stmt 1 view -0 + 1889 .cfi_startproc + 1890 @ args = 0, pretend = 0, frame = 0 + 1891 @ frame_needed = 0, uses_anonymous_args = 0 +1376:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** /* Check the parameters */ + 1892 .loc 1 1376 1 is_stmt 0 view .LVU584 + 1893 0000 10B5 push {r4, lr} + 1894 .cfi_def_cfa_offset 8 + 1895 .cfi_offset 4, -8 + 1896 .cfi_offset 14, -4 + 1897 0002 0400 movs r4, r0 +1378:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 1898 .loc 1 1378 3 is_stmt 1 view .LVU585 +1380:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 1899 .loc 1 1380 3 view .LVU586 +1380:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 1900 .loc 1 1380 15 is_stmt 0 view .LVU587 + ARM GAS /tmp/ccMtK8ce.s page 170 + + + 1901 0004 3D23 movs r3, #61 + 1902 0006 0222 movs r2, #2 + 1903 0008 C254 strb r2, [r0, r3] +1383:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 1904 .loc 1 1383 3 is_stmt 1 view .LVU588 +1383:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 1905 .loc 1 1383 3 view .LVU589 + 1906 000a 0368 ldr r3, [r0] + 1907 000c 196A ldr r1, [r3, #32] + 1908 000e 134A ldr r2, .L86 + 1909 0010 1142 tst r1, r2 + 1910 0012 07D1 bne .L85 +1383:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 1911 .loc 1 1383 3 discriminator 1 view .LVU590 + 1912 0014 196A ldr r1, [r3, #32] + 1913 0016 124A ldr r2, .L86+4 + 1914 0018 1142 tst r1, r2 + 1915 001a 03D1 bne .L85 +1383:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 1916 .loc 1 1383 3 discriminator 3 view .LVU591 + 1917 001c 1A68 ldr r2, [r3] + 1918 001e 0121 movs r1, #1 + 1919 0020 8A43 bics r2, r1 + 1920 0022 1A60 str r2, [r3] + 1921 .L85: +1383:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 1922 .loc 1 1383 3 discriminator 5 view .LVU592 +1394:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** #endif /* USE_HAL_TIM_REGISTER_CALLBACKS */ + 1923 .loc 1 1394 3 view .LVU593 + 1924 0024 2000 movs r0, r4 + 1925 .LVL162: +1394:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** #endif /* USE_HAL_TIM_REGISTER_CALLBACKS */ + 1926 .loc 1 1394 3 is_stmt 0 view .LVU594 + 1927 0026 FFF7FEFF bl HAL_TIM_PWM_MspDeInit + 1928 .LVL163: +1398:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 1929 .loc 1 1398 3 is_stmt 1 view .LVU595 +1398:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 1930 .loc 1 1398 23 is_stmt 0 view .LVU596 + 1931 002a 0023 movs r3, #0 + 1932 002c 4622 movs r2, #70 + 1933 002e A354 strb r3, [r4, r2] +1401:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** TIM_CHANNEL_N_STATE_SET_ALL(htim, HAL_TIM_CHANNEL_STATE_RESET); + 1934 .loc 1 1401 3 is_stmt 1 view .LVU597 +1401:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** TIM_CHANNEL_N_STATE_SET_ALL(htim, HAL_TIM_CHANNEL_STATE_RESET); + 1935 .loc 1 1401 3 view .LVU598 + 1936 0030 083A subs r2, r2, #8 + 1937 0032 A354 strb r3, [r4, r2] +1401:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** TIM_CHANNEL_N_STATE_SET_ALL(htim, HAL_TIM_CHANNEL_STATE_RESET); + 1938 .loc 1 1401 3 view .LVU599 + 1939 0034 0132 adds r2, r2, #1 + 1940 0036 A354 strb r3, [r4, r2] +1401:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** TIM_CHANNEL_N_STATE_SET_ALL(htim, HAL_TIM_CHANNEL_STATE_RESET); + 1941 .loc 1 1401 3 view .LVU600 + 1942 0038 0132 adds r2, r2, #1 + 1943 003a A354 strb r3, [r4, r2] +1401:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** TIM_CHANNEL_N_STATE_SET_ALL(htim, HAL_TIM_CHANNEL_STATE_RESET); + ARM GAS /tmp/ccMtK8ce.s page 171 + + + 1944 .loc 1 1401 3 view .LVU601 + 1945 003c 0132 adds r2, r2, #1 + 1946 003e A354 strb r3, [r4, r2] +1401:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** TIM_CHANNEL_N_STATE_SET_ALL(htim, HAL_TIM_CHANNEL_STATE_RESET); + 1947 .loc 1 1401 3 view .LVU602 +1402:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 1948 .loc 1 1402 3 view .LVU603 +1402:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 1949 .loc 1 1402 3 view .LVU604 + 1950 0040 0132 adds r2, r2, #1 + 1951 0042 A354 strb r3, [r4, r2] +1402:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 1952 .loc 1 1402 3 view .LVU605 + 1953 0044 0132 adds r2, r2, #1 + 1954 0046 A354 strb r3, [r4, r2] +1402:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 1955 .loc 1 1402 3 view .LVU606 + 1956 0048 0132 adds r2, r2, #1 + 1957 004a A354 strb r3, [r4, r2] +1402:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 1958 .loc 1 1402 3 view .LVU607 + 1959 004c 0132 adds r2, r2, #1 + 1960 004e A354 strb r3, [r4, r2] +1402:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 1961 .loc 1 1402 3 view .LVU608 +1405:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 1962 .loc 1 1405 3 view .LVU609 +1405:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 1963 .loc 1 1405 15 is_stmt 0 view .LVU610 + 1964 0050 083A subs r2, r2, #8 + 1965 0052 A354 strb r3, [r4, r2] +1408:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 1966 .loc 1 1408 3 is_stmt 1 view .LVU611 +1408:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 1967 .loc 1 1408 3 view .LVU612 + 1968 0054 013A subs r2, r2, #1 + 1969 0056 A354 strb r3, [r4, r2] +1408:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 1970 .loc 1 1408 3 view .LVU613 +1410:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** } + 1971 .loc 1 1410 3 view .LVU614 +1411:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 1972 .loc 1 1411 1 is_stmt 0 view .LVU615 + 1973 0058 0020 movs r0, #0 + 1974 @ sp needed + 1975 .LVL164: +1411:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 1976 .loc 1 1411 1 view .LVU616 + 1977 005a 10BD pop {r4, pc} + 1978 .L87: + 1979 .align 2 + 1980 .L86: + 1981 005c 11110000 .word 4369 + 1982 0060 44040000 .word 1092 + 1983 .cfi_endproc + 1984 .LFE61: + 1986 .section .text.HAL_TIM_IC_MspInit,"ax",%progbits + ARM GAS /tmp/ccMtK8ce.s page 172 + + + 1987 .align 1 + 1988 .weak HAL_TIM_IC_MspInit + 1989 .syntax unified + 1990 .code 16 + 1991 .thumb_func + 1993 HAL_TIM_IC_MspInit: + 1994 .LVL165: + 1995 .LFB72: +2083:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** /* Prevent unused argument(s) compilation warning */ + 1996 .loc 1 2083 1 is_stmt 1 view -0 + 1997 .cfi_startproc + 1998 @ args = 0, pretend = 0, frame = 0 + 1999 @ frame_needed = 0, uses_anonymous_args = 0 + 2000 @ link register save eliminated. +2085:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 2001 .loc 1 2085 3 view .LVU618 +2090:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 2002 .loc 1 2090 1 is_stmt 0 view .LVU619 + 2003 @ sp needed + 2004 0000 7047 bx lr + 2005 .cfi_endproc + 2006 .LFE72: + 2008 .section .text.HAL_TIM_IC_MspDeInit,"ax",%progbits + 2009 .align 1 + 2010 .weak HAL_TIM_IC_MspDeInit + 2011 .syntax unified + 2012 .code 16 + 2013 .thumb_func + 2015 HAL_TIM_IC_MspDeInit: + 2016 .LVL166: + 2017 .LFB73: +2098:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** /* Prevent unused argument(s) compilation warning */ + 2018 .loc 1 2098 1 is_stmt 1 view -0 + 2019 .cfi_startproc + 2020 @ args = 0, pretend = 0, frame = 0 + 2021 @ frame_needed = 0, uses_anonymous_args = 0 + 2022 @ link register save eliminated. +2100:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 2023 .loc 1 2100 3 view .LVU621 +2105:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 2024 .loc 1 2105 1 is_stmt 0 view .LVU622 + 2025 @ sp needed + 2026 0000 7047 bx lr + 2027 .cfi_endproc + 2028 .LFE73: + 2030 .section .text.HAL_TIM_IC_DeInit,"ax",%progbits + 2031 .align 1 + 2032 .global HAL_TIM_IC_DeInit + 2033 .syntax unified + 2034 .code 16 + 2035 .thumb_func + 2037 HAL_TIM_IC_DeInit: + 2038 .LVL167: + 2039 .LFB71: +2040:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** /* Check the parameters */ + 2040 .loc 1 2040 1 is_stmt 1 view -0 + 2041 .cfi_startproc + ARM GAS /tmp/ccMtK8ce.s page 173 + + + 2042 @ args = 0, pretend = 0, frame = 0 + 2043 @ frame_needed = 0, uses_anonymous_args = 0 +2040:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** /* Check the parameters */ + 2044 .loc 1 2040 1 is_stmt 0 view .LVU624 + 2045 0000 10B5 push {r4, lr} + 2046 .cfi_def_cfa_offset 8 + 2047 .cfi_offset 4, -8 + 2048 .cfi_offset 14, -4 + 2049 0002 0400 movs r4, r0 +2042:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 2050 .loc 1 2042 3 is_stmt 1 view .LVU625 +2044:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 2051 .loc 1 2044 3 view .LVU626 +2044:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 2052 .loc 1 2044 15 is_stmt 0 view .LVU627 + 2053 0004 3D23 movs r3, #61 + 2054 0006 0222 movs r2, #2 + 2055 0008 C254 strb r2, [r0, r3] +2047:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 2056 .loc 1 2047 3 is_stmt 1 view .LVU628 +2047:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 2057 .loc 1 2047 3 view .LVU629 + 2058 000a 0368 ldr r3, [r0] + 2059 000c 196A ldr r1, [r3, #32] + 2060 000e 134A ldr r2, .L92 + 2061 0010 1142 tst r1, r2 + 2062 0012 07D1 bne .L91 +2047:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 2063 .loc 1 2047 3 discriminator 1 view .LVU630 + 2064 0014 196A ldr r1, [r3, #32] + 2065 0016 124A ldr r2, .L92+4 + 2066 0018 1142 tst r1, r2 + 2067 001a 03D1 bne .L91 +2047:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 2068 .loc 1 2047 3 discriminator 3 view .LVU631 + 2069 001c 1A68 ldr r2, [r3] + 2070 001e 0121 movs r1, #1 + 2071 0020 8A43 bics r2, r1 + 2072 0022 1A60 str r2, [r3] + 2073 .L91: +2047:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 2074 .loc 1 2047 3 discriminator 5 view .LVU632 +2058:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** #endif /* USE_HAL_TIM_REGISTER_CALLBACKS */ + 2075 .loc 1 2058 3 view .LVU633 + 2076 0024 2000 movs r0, r4 + 2077 .LVL168: +2058:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** #endif /* USE_HAL_TIM_REGISTER_CALLBACKS */ + 2078 .loc 1 2058 3 is_stmt 0 view .LVU634 + 2079 0026 FFF7FEFF bl HAL_TIM_IC_MspDeInit + 2080 .LVL169: +2062:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 2081 .loc 1 2062 3 is_stmt 1 view .LVU635 +2062:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 2082 .loc 1 2062 23 is_stmt 0 view .LVU636 + 2083 002a 0023 movs r3, #0 + 2084 002c 4622 movs r2, #70 + 2085 002e A354 strb r3, [r4, r2] + ARM GAS /tmp/ccMtK8ce.s page 174 + + +2065:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** TIM_CHANNEL_N_STATE_SET_ALL(htim, HAL_TIM_CHANNEL_STATE_RESET); + 2086 .loc 1 2065 3 is_stmt 1 view .LVU637 +2065:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** TIM_CHANNEL_N_STATE_SET_ALL(htim, HAL_TIM_CHANNEL_STATE_RESET); + 2087 .loc 1 2065 3 view .LVU638 + 2088 0030 083A subs r2, r2, #8 + 2089 0032 A354 strb r3, [r4, r2] +2065:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** TIM_CHANNEL_N_STATE_SET_ALL(htim, HAL_TIM_CHANNEL_STATE_RESET); + 2090 .loc 1 2065 3 view .LVU639 + 2091 0034 0132 adds r2, r2, #1 + 2092 0036 A354 strb r3, [r4, r2] +2065:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** TIM_CHANNEL_N_STATE_SET_ALL(htim, HAL_TIM_CHANNEL_STATE_RESET); + 2093 .loc 1 2065 3 view .LVU640 + 2094 0038 0132 adds r2, r2, #1 + 2095 003a A354 strb r3, [r4, r2] +2065:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** TIM_CHANNEL_N_STATE_SET_ALL(htim, HAL_TIM_CHANNEL_STATE_RESET); + 2096 .loc 1 2065 3 view .LVU641 + 2097 003c 0132 adds r2, r2, #1 + 2098 003e A354 strb r3, [r4, r2] +2065:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** TIM_CHANNEL_N_STATE_SET_ALL(htim, HAL_TIM_CHANNEL_STATE_RESET); + 2099 .loc 1 2065 3 view .LVU642 +2066:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 2100 .loc 1 2066 3 view .LVU643 +2066:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 2101 .loc 1 2066 3 view .LVU644 + 2102 0040 0132 adds r2, r2, #1 + 2103 0042 A354 strb r3, [r4, r2] +2066:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 2104 .loc 1 2066 3 view .LVU645 + 2105 0044 0132 adds r2, r2, #1 + 2106 0046 A354 strb r3, [r4, r2] +2066:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 2107 .loc 1 2066 3 view .LVU646 + 2108 0048 0132 adds r2, r2, #1 + 2109 004a A354 strb r3, [r4, r2] +2066:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 2110 .loc 1 2066 3 view .LVU647 + 2111 004c 0132 adds r2, r2, #1 + 2112 004e A354 strb r3, [r4, r2] +2066:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 2113 .loc 1 2066 3 view .LVU648 +2069:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 2114 .loc 1 2069 3 view .LVU649 +2069:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 2115 .loc 1 2069 15 is_stmt 0 view .LVU650 + 2116 0050 083A subs r2, r2, #8 + 2117 0052 A354 strb r3, [r4, r2] +2072:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 2118 .loc 1 2072 3 is_stmt 1 view .LVU651 +2072:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 2119 .loc 1 2072 3 view .LVU652 + 2120 0054 013A subs r2, r2, #1 + 2121 0056 A354 strb r3, [r4, r2] +2072:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 2122 .loc 1 2072 3 view .LVU653 +2074:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** } + 2123 .loc 1 2074 3 view .LVU654 +2075:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + ARM GAS /tmp/ccMtK8ce.s page 175 + + + 2124 .loc 1 2075 1 is_stmt 0 view .LVU655 + 2125 0058 0020 movs r0, #0 + 2126 @ sp needed + 2127 .LVL170: +2075:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 2128 .loc 1 2075 1 view .LVU656 + 2129 005a 10BD pop {r4, pc} + 2130 .L93: + 2131 .align 2 + 2132 .L92: + 2133 005c 11110000 .word 4369 + 2134 0060 44040000 .word 1092 + 2135 .cfi_endproc + 2136 .LFE71: + 2138 .section .text.HAL_TIM_OnePulse_MspInit,"ax",%progbits + 2139 .align 1 + 2140 .weak HAL_TIM_OnePulse_MspInit + 2141 .syntax unified + 2142 .code 16 + 2143 .thumb_func + 2145 HAL_TIM_OnePulse_MspInit: + 2146 .LVL171: + 2147 .LFB82: +2743:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** /* Prevent unused argument(s) compilation warning */ + 2148 .loc 1 2743 1 is_stmt 1 view -0 + 2149 .cfi_startproc + 2150 @ args = 0, pretend = 0, frame = 0 + 2151 @ frame_needed = 0, uses_anonymous_args = 0 + 2152 @ link register save eliminated. +2745:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 2153 .loc 1 2745 3 view .LVU658 +2750:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 2154 .loc 1 2750 1 is_stmt 0 view .LVU659 + 2155 @ sp needed + 2156 0000 7047 bx lr + 2157 .cfi_endproc + 2158 .LFE82: + 2160 .section .text.HAL_TIM_OnePulse_MspDeInit,"ax",%progbits + 2161 .align 1 + 2162 .weak HAL_TIM_OnePulse_MspDeInit + 2163 .syntax unified + 2164 .code 16 + 2165 .thumb_func + 2167 HAL_TIM_OnePulse_MspDeInit: + 2168 .LVL172: + 2169 .LFB83: +2758:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** /* Prevent unused argument(s) compilation warning */ + 2170 .loc 1 2758 1 is_stmt 1 view -0 + 2171 .cfi_startproc + 2172 @ args = 0, pretend = 0, frame = 0 + 2173 @ frame_needed = 0, uses_anonymous_args = 0 + 2174 @ link register save eliminated. +2760:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 2175 .loc 1 2760 3 view .LVU661 +2765:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 2176 .loc 1 2765 1 is_stmt 0 view .LVU662 + 2177 @ sp needed + ARM GAS /tmp/ccMtK8ce.s page 176 + + + 2178 0000 7047 bx lr + 2179 .cfi_endproc + 2180 .LFE83: + 2182 .section .text.HAL_TIM_OnePulse_DeInit,"ax",%progbits + 2183 .align 1 + 2184 .global HAL_TIM_OnePulse_DeInit + 2185 .syntax unified + 2186 .code 16 + 2187 .thumb_func + 2189 HAL_TIM_OnePulse_DeInit: + 2190 .LVL173: + 2191 .LFB81: +2698:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** /* Check the parameters */ + 2192 .loc 1 2698 1 is_stmt 1 view -0 + 2193 .cfi_startproc + 2194 @ args = 0, pretend = 0, frame = 0 + 2195 @ frame_needed = 0, uses_anonymous_args = 0 +2698:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** /* Check the parameters */ + 2196 .loc 1 2698 1 is_stmt 0 view .LVU664 + 2197 0000 10B5 push {r4, lr} + 2198 .cfi_def_cfa_offset 8 + 2199 .cfi_offset 4, -8 + 2200 .cfi_offset 14, -4 + 2201 0002 0400 movs r4, r0 +2700:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 2202 .loc 1 2700 3 is_stmt 1 view .LVU665 +2702:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 2203 .loc 1 2702 3 view .LVU666 +2702:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 2204 .loc 1 2702 15 is_stmt 0 view .LVU667 + 2205 0004 3D23 movs r3, #61 + 2206 0006 0222 movs r2, #2 + 2207 0008 C254 strb r2, [r0, r3] +2705:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 2208 .loc 1 2705 3 is_stmt 1 view .LVU668 +2705:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 2209 .loc 1 2705 3 view .LVU669 + 2210 000a 0368 ldr r3, [r0] + 2211 000c 196A ldr r1, [r3, #32] + 2212 000e 0F4A ldr r2, .L98 + 2213 0010 1142 tst r1, r2 + 2214 0012 07D1 bne .L97 +2705:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 2215 .loc 1 2705 3 discriminator 1 view .LVU670 + 2216 0014 196A ldr r1, [r3, #32] + 2217 0016 0E4A ldr r2, .L98+4 + 2218 0018 1142 tst r1, r2 + 2219 001a 03D1 bne .L97 +2705:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 2220 .loc 1 2705 3 discriminator 3 view .LVU671 + 2221 001c 1A68 ldr r2, [r3] + 2222 001e 0121 movs r1, #1 + 2223 0020 8A43 bics r2, r1 + 2224 0022 1A60 str r2, [r3] + 2225 .L97: +2705:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 2226 .loc 1 2705 3 discriminator 5 view .LVU672 + ARM GAS /tmp/ccMtK8ce.s page 177 + + +2716:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** #endif /* USE_HAL_TIM_REGISTER_CALLBACKS */ + 2227 .loc 1 2716 3 view .LVU673 + 2228 0024 2000 movs r0, r4 + 2229 .LVL174: +2716:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** #endif /* USE_HAL_TIM_REGISTER_CALLBACKS */ + 2230 .loc 1 2716 3 is_stmt 0 view .LVU674 + 2231 0026 FFF7FEFF bl HAL_TIM_OnePulse_MspDeInit + 2232 .LVL175: +2720:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 2233 .loc 1 2720 3 is_stmt 1 view .LVU675 +2720:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 2234 .loc 1 2720 23 is_stmt 0 view .LVU676 + 2235 002a 0023 movs r3, #0 + 2236 002c 4622 movs r2, #70 + 2237 002e A354 strb r3, [r4, r2] +2723:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** TIM_CHANNEL_STATE_SET(htim, TIM_CHANNEL_2, HAL_TIM_CHANNEL_STATE_RESET); + 2238 .loc 1 2723 3 is_stmt 1 view .LVU677 + 2239 0030 083A subs r2, r2, #8 + 2240 0032 A354 strb r3, [r4, r2] +2724:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** TIM_CHANNEL_N_STATE_SET(htim, TIM_CHANNEL_1, HAL_TIM_CHANNEL_STATE_RESET); + 2241 .loc 1 2724 3 view .LVU678 + 2242 0034 0132 adds r2, r2, #1 + 2243 0036 A354 strb r3, [r4, r2] +2725:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** TIM_CHANNEL_N_STATE_SET(htim, TIM_CHANNEL_2, HAL_TIM_CHANNEL_STATE_RESET); + 2244 .loc 1 2725 3 view .LVU679 + 2245 0038 0332 adds r2, r2, #3 + 2246 003a A354 strb r3, [r4, r2] +2726:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 2247 .loc 1 2726 3 view .LVU680 + 2248 003c 0132 adds r2, r2, #1 + 2249 003e A354 strb r3, [r4, r2] +2729:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 2250 .loc 1 2729 3 view .LVU681 +2729:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 2251 .loc 1 2729 15 is_stmt 0 view .LVU682 + 2252 0040 063A subs r2, r2, #6 + 2253 0042 A354 strb r3, [r4, r2] +2732:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 2254 .loc 1 2732 3 is_stmt 1 view .LVU683 +2732:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 2255 .loc 1 2732 3 view .LVU684 + 2256 0044 013A subs r2, r2, #1 + 2257 0046 A354 strb r3, [r4, r2] +2732:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 2258 .loc 1 2732 3 view .LVU685 +2734:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** } + 2259 .loc 1 2734 3 view .LVU686 +2735:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 2260 .loc 1 2735 1 is_stmt 0 view .LVU687 + 2261 0048 0020 movs r0, #0 + 2262 @ sp needed + 2263 .LVL176: +2735:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 2264 .loc 1 2735 1 view .LVU688 + 2265 004a 10BD pop {r4, pc} + 2266 .L99: + 2267 .align 2 + ARM GAS /tmp/ccMtK8ce.s page 178 + + + 2268 .L98: + 2269 004c 11110000 .word 4369 + 2270 0050 44040000 .word 1092 + 2271 .cfi_endproc + 2272 .LFE81: + 2274 .section .text.HAL_TIM_Encoder_MspInit,"ax",%progbits + 2275 .align 1 + 2276 .weak HAL_TIM_Encoder_MspInit + 2277 .syntax unified + 2278 .code 16 + 2279 .thumb_func + 2281 HAL_TIM_Encoder_MspInit: + 2282 .LVL177: + 2283 .LFB90: +3180:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** /* Prevent unused argument(s) compilation warning */ + 2284 .loc 1 3180 1 is_stmt 1 view -0 + 2285 .cfi_startproc + 2286 @ args = 0, pretend = 0, frame = 0 + 2287 @ frame_needed = 0, uses_anonymous_args = 0 + 2288 @ link register save eliminated. +3182:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 2289 .loc 1 3182 3 view .LVU690 +3187:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 2290 .loc 1 3187 1 is_stmt 0 view .LVU691 + 2291 @ sp needed + 2292 0000 7047 bx lr + 2293 .cfi_endproc + 2294 .LFE90: + 2296 .section .text.HAL_TIM_Encoder_MspDeInit,"ax",%progbits + 2297 .align 1 + 2298 .weak HAL_TIM_Encoder_MspDeInit + 2299 .syntax unified + 2300 .code 16 + 2301 .thumb_func + 2303 HAL_TIM_Encoder_MspDeInit: + 2304 .LVL178: + 2305 .LFB91: +3195:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** /* Prevent unused argument(s) compilation warning */ + 2306 .loc 1 3195 1 is_stmt 1 view -0 + 2307 .cfi_startproc + 2308 @ args = 0, pretend = 0, frame = 0 + 2309 @ frame_needed = 0, uses_anonymous_args = 0 + 2310 @ link register save eliminated. +3197:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 2311 .loc 1 3197 3 view .LVU693 +3202:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 2312 .loc 1 3202 1 is_stmt 0 view .LVU694 + 2313 @ sp needed + 2314 0000 7047 bx lr + 2315 .cfi_endproc + 2316 .LFE91: + 2318 .section .text.HAL_TIM_Encoder_DeInit,"ax",%progbits + 2319 .align 1 + 2320 .global HAL_TIM_Encoder_DeInit + 2321 .syntax unified + 2322 .code 16 + 2323 .thumb_func + ARM GAS /tmp/ccMtK8ce.s page 179 + + + 2325 HAL_TIM_Encoder_DeInit: + 2326 .LVL179: + 2327 .LFB89: +3135:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** /* Check the parameters */ + 2328 .loc 1 3135 1 is_stmt 1 view -0 + 2329 .cfi_startproc + 2330 @ args = 0, pretend = 0, frame = 0 + 2331 @ frame_needed = 0, uses_anonymous_args = 0 +3135:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** /* Check the parameters */ + 2332 .loc 1 3135 1 is_stmt 0 view .LVU696 + 2333 0000 10B5 push {r4, lr} + 2334 .cfi_def_cfa_offset 8 + 2335 .cfi_offset 4, -8 + 2336 .cfi_offset 14, -4 + 2337 0002 0400 movs r4, r0 +3137:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 2338 .loc 1 3137 3 is_stmt 1 view .LVU697 +3139:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 2339 .loc 1 3139 3 view .LVU698 +3139:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 2340 .loc 1 3139 15 is_stmt 0 view .LVU699 + 2341 0004 3D23 movs r3, #61 + 2342 0006 0222 movs r2, #2 + 2343 0008 C254 strb r2, [r0, r3] +3142:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 2344 .loc 1 3142 3 is_stmt 1 view .LVU700 +3142:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 2345 .loc 1 3142 3 view .LVU701 + 2346 000a 0368 ldr r3, [r0] + 2347 000c 196A ldr r1, [r3, #32] + 2348 000e 0F4A ldr r2, .L104 + 2349 0010 1142 tst r1, r2 + 2350 0012 07D1 bne .L103 +3142:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 2351 .loc 1 3142 3 discriminator 1 view .LVU702 + 2352 0014 196A ldr r1, [r3, #32] + 2353 0016 0E4A ldr r2, .L104+4 + 2354 0018 1142 tst r1, r2 + 2355 001a 03D1 bne .L103 +3142:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 2356 .loc 1 3142 3 discriminator 3 view .LVU703 + 2357 001c 1A68 ldr r2, [r3] + 2358 001e 0121 movs r1, #1 + 2359 0020 8A43 bics r2, r1 + 2360 0022 1A60 str r2, [r3] + 2361 .L103: +3142:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 2362 .loc 1 3142 3 discriminator 5 view .LVU704 +3153:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** #endif /* USE_HAL_TIM_REGISTER_CALLBACKS */ + 2363 .loc 1 3153 3 view .LVU705 + 2364 0024 2000 movs r0, r4 + 2365 .LVL180: +3153:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** #endif /* USE_HAL_TIM_REGISTER_CALLBACKS */ + 2366 .loc 1 3153 3 is_stmt 0 view .LVU706 + 2367 0026 FFF7FEFF bl HAL_TIM_Encoder_MspDeInit + 2368 .LVL181: +3157:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + ARM GAS /tmp/ccMtK8ce.s page 180 + + + 2369 .loc 1 3157 3 is_stmt 1 view .LVU707 +3157:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 2370 .loc 1 3157 23 is_stmt 0 view .LVU708 + 2371 002a 0023 movs r3, #0 + 2372 002c 4622 movs r2, #70 + 2373 002e A354 strb r3, [r4, r2] +3160:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** TIM_CHANNEL_STATE_SET(htim, TIM_CHANNEL_2, HAL_TIM_CHANNEL_STATE_RESET); + 2374 .loc 1 3160 3 is_stmt 1 view .LVU709 + 2375 0030 083A subs r2, r2, #8 + 2376 0032 A354 strb r3, [r4, r2] +3161:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** TIM_CHANNEL_N_STATE_SET(htim, TIM_CHANNEL_1, HAL_TIM_CHANNEL_STATE_RESET); + 2377 .loc 1 3161 3 view .LVU710 + 2378 0034 0132 adds r2, r2, #1 + 2379 0036 A354 strb r3, [r4, r2] +3162:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** TIM_CHANNEL_N_STATE_SET(htim, TIM_CHANNEL_2, HAL_TIM_CHANNEL_STATE_RESET); + 2380 .loc 1 3162 3 view .LVU711 + 2381 0038 0332 adds r2, r2, #3 + 2382 003a A354 strb r3, [r4, r2] +3163:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 2383 .loc 1 3163 3 view .LVU712 + 2384 003c 0132 adds r2, r2, #1 + 2385 003e A354 strb r3, [r4, r2] +3166:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 2386 .loc 1 3166 3 view .LVU713 +3166:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 2387 .loc 1 3166 15 is_stmt 0 view .LVU714 + 2388 0040 063A subs r2, r2, #6 + 2389 0042 A354 strb r3, [r4, r2] +3169:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 2390 .loc 1 3169 3 is_stmt 1 view .LVU715 +3169:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 2391 .loc 1 3169 3 view .LVU716 + 2392 0044 013A subs r2, r2, #1 + 2393 0046 A354 strb r3, [r4, r2] +3169:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 2394 .loc 1 3169 3 view .LVU717 +3171:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** } + 2395 .loc 1 3171 3 view .LVU718 +3172:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 2396 .loc 1 3172 1 is_stmt 0 view .LVU719 + 2397 0048 0020 movs r0, #0 + 2398 @ sp needed + 2399 .LVL182: +3172:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 2400 .loc 1 3172 1 view .LVU720 + 2401 004a 10BD pop {r4, pc} + 2402 .L105: + 2403 .align 2 + 2404 .L104: + 2405 004c 11110000 .word 4369 + 2406 0050 44040000 .word 1092 + 2407 .cfi_endproc + 2408 .LFE89: + 2410 .section .text.HAL_TIM_DMABurst_MultiWriteStart,"ax",%progbits + 2411 .align 1 + 2412 .global HAL_TIM_DMABurst_MultiWriteStart + 2413 .syntax unified + ARM GAS /tmp/ccMtK8ce.s page 181 + + + 2414 .code 16 + 2415 .thumb_func + 2417 HAL_TIM_DMABurst_MultiWriteStart: + 2418 .LVL183: + 2419 .LFB104: +4533:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** HAL_StatusTypeDef status = HAL_OK; + 2420 .loc 1 4533 1 is_stmt 1 view -0 + 2421 .cfi_startproc + 2422 @ args = 8, pretend = 0, frame = 0 + 2423 @ frame_needed = 0, uses_anonymous_args = 0 +4533:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** HAL_StatusTypeDef status = HAL_OK; + 2424 .loc 1 4533 1 is_stmt 0 view .LVU722 + 2425 0000 70B5 push {r4, r5, r6, lr} + 2426 .cfi_def_cfa_offset 16 + 2427 .cfi_offset 4, -16 + 2428 .cfi_offset 5, -12 + 2429 .cfi_offset 6, -8 + 2430 .cfi_offset 14, -4 + 2431 0002 0400 movs r4, r0 + 2432 0004 0E00 movs r6, r1 + 2433 0006 1500 movs r5, r2 + 2434 0008 1900 movs r1, r3 + 2435 .LVL184: +4534:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 2436 .loc 1 4534 3 is_stmt 1 view .LVU723 +4537:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** assert_param(IS_TIM_DMA_BASE(BurstBaseAddress)); + 2437 .loc 1 4537 3 view .LVU724 +4538:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** assert_param(IS_TIM_DMA_SOURCE(BurstRequestSrc)); + 2438 .loc 1 4538 3 view .LVU725 +4539:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** assert_param(IS_TIM_DMA_LENGTH(BurstLength)); + 2439 .loc 1 4539 3 view .LVU726 +4540:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** assert_param(IS_TIM_DMA_DATA_LENGTH(DataLength)); + 2440 .loc 1 4540 3 view .LVU727 +4541:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 2441 .loc 1 4541 3 view .LVU728 +4543:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** { + 2442 .loc 1 4543 3 view .LVU729 +4543:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** { + 2443 .loc 1 4543 11 is_stmt 0 view .LVU730 + 2444 000a 4623 movs r3, #70 + 2445 .LVL185: +4543:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** { + 2446 .loc 1 4543 11 view .LVU731 + 2447 000c C35C ldrb r3, [r0, r3] + 2448 000e D8B2 uxtb r0, r3 + 2449 .LVL186: +4543:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** { + 2450 .loc 1 4543 6 view .LVU732 + 2451 0010 022B cmp r3, #2 + 2452 0012 31D0 beq .L107 +4547:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** { + 2453 .loc 1 4547 8 is_stmt 1 view .LVU733 +4547:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** { + 2454 .loc 1 4547 16 is_stmt 0 view .LVU734 + 2455 0014 4623 movs r3, #70 + 2456 0016 E35C ldrb r3, [r4, r3] + 2457 0018 D8B2 uxtb r0, r3 + ARM GAS /tmp/ccMtK8ce.s page 182 + + +4547:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** { + 2458 .loc 1 4547 11 view .LVU735 + 2459 001a 012B cmp r3, #1 + 2460 001c 2DD0 beq .L126 + 2461 .LVL187: + 2462 .L108: +4561:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 2463 .loc 1 4561 3 is_stmt 1 view .LVU736 +4563:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** { + 2464 .loc 1 4563 3 view .LVU737 + 2465 001e 8023 movs r3, #128 + 2466 0020 1B01 lsls r3, r3, #4 + 2467 0022 9D42 cmp r5, r3 + 2468 0024 00D1 bne .LCB2049 + 2469 0026 7BE0 b .L110 @long jump + 2470 .LCB2049: + 2471 0028 33D8 bhi .L111 + 2472 002a 8023 movs r3, #128 + 2473 002c 9B00 lsls r3, r3, #2 + 2474 002e 9D42 cmp r5, r3 + 2475 0030 50D0 beq .L112 + 2476 0032 8023 movs r3, #128 + 2477 0034 DB00 lsls r3, r3, #3 + 2478 0036 9D42 cmp r5, r3 + 2479 0038 5FD0 beq .L113 + 2480 003a 8023 movs r3, #128 + 2481 003c 5B00 lsls r3, r3, #1 + 2482 003e 9D42 cmp r5, r3 + 2483 0040 25D1 bne .L127 +4568:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** htim->hdma[TIM_DMA_ID_UPDATE]->XferHalfCpltCallback = TIM_DMAPeriodElapsedHalfCplt; + 2484 .loc 1 4568 7 view .LVU738 +4568:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** htim->hdma[TIM_DMA_ID_UPDATE]->XferHalfCpltCallback = TIM_DMAPeriodElapsedHalfCplt; + 2485 .loc 1 4568 17 is_stmt 0 view .LVU739 + 2486 0042 236A ldr r3, [r4, #32] +4568:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** htim->hdma[TIM_DMA_ID_UPDATE]->XferHalfCpltCallback = TIM_DMAPeriodElapsedHalfCplt; + 2487 .loc 1 4568 55 view .LVU740 + 2488 0044 554A ldr r2, .L131 + 2489 0046 9A62 str r2, [r3, #40] +4569:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 2490 .loc 1 4569 7 is_stmt 1 view .LVU741 +4569:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 2491 .loc 1 4569 17 is_stmt 0 view .LVU742 + 2492 0048 236A ldr r3, [r4, #32] +4569:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 2493 .loc 1 4569 59 view .LVU743 + 2494 004a 554A ldr r2, .L131+4 + 2495 004c DA62 str r2, [r3, #44] +4572:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 2496 .loc 1 4572 7 is_stmt 1 view .LVU744 +4572:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 2497 .loc 1 4572 17 is_stmt 0 view .LVU745 + 2498 004e 236A ldr r3, [r4, #32] +4572:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 2499 .loc 1 4572 56 view .LVU746 + 2500 0050 544A ldr r2, .L131+8 + 2501 0052 1A63 str r2, [r3, #48] +4575:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** (uint32_t)&htim->Instance->DMAR, DataLength) != HAL_OK) + ARM GAS /tmp/ccMtK8ce.s page 183 + + + 2502 .loc 1 4575 7 is_stmt 1 view .LVU747 +4576:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** { + 2503 .loc 1 4576 43 is_stmt 0 view .LVU748 + 2504 0054 2268 ldr r2, [r4] +4576:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** { + 2505 .loc 1 4576 38 view .LVU749 + 2506 0056 4C32 adds r2, r2, #76 +4575:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** (uint32_t)&htim->Instance->DMAR, DataLength) != HAL_OK) + 2507 .loc 1 4575 11 view .LVU750 + 2508 0058 206A ldr r0, [r4, #32] + 2509 005a 059B ldr r3, [sp, #20] + 2510 005c FFF7FEFF bl HAL_DMA_Start_IT + 2511 .LVL188: +4575:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** (uint32_t)&htim->Instance->DMAR, DataLength) != HAL_OK) + 2512 .loc 1 4575 10 discriminator 1 view .LVU751 + 2513 0060 0028 cmp r0, #0 + 2514 0062 00D0 beq .LCB2085 + 2515 0064 98E0 b .L128 @long jump + 2516 .LCB2085: + 2517 .L118: + 2518 .LVL189: +4699:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** /* Enable the TIM DMA Request */ + 2519 .loc 1 4699 5 is_stmt 1 view .LVU752 +4699:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** /* Enable the TIM DMA Request */ + 2520 .loc 1 4699 9 is_stmt 0 view .LVU753 + 2521 0066 2268 ldr r2, [r4] +4699:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** /* Enable the TIM DMA Request */ + 2522 .loc 1 4699 45 view .LVU754 + 2523 0068 049B ldr r3, [sp, #16] + 2524 006a 1E43 orrs r6, r3 + 2525 .LVL190: +4699:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** /* Enable the TIM DMA Request */ + 2526 .loc 1 4699 25 view .LVU755 + 2527 006c 9664 str r6, [r2, #72] +4701:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** } + 2528 .loc 1 4701 5 is_stmt 1 view .LVU756 + 2529 006e 2268 ldr r2, [r4] + 2530 0070 D368 ldr r3, [r2, #12] + 2531 0072 2B43 orrs r3, r5 + 2532 0074 D360 str r3, [r2, #12] + 2533 0076 0020 movs r0, #0 + 2534 .L107: +4706:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 2535 .loc 1 4706 1 is_stmt 0 view .LVU757 + 2536 @ sp needed + 2537 .LVL191: + 2538 .LVL192: +4706:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 2539 .loc 1 4706 1 view .LVU758 + 2540 0078 70BD pop {r4, r5, r6, pc} + 2541 .LVL193: + 2542 .L126: +4549:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** { + 2543 .loc 1 4549 5 is_stmt 1 view .LVU759 +4549:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** { + 2544 .loc 1 4549 8 is_stmt 0 view .LVU760 + 2545 007a 0029 cmp r1, #0 + ARM GAS /tmp/ccMtK8ce.s page 184 + + + 2546 007c 03D0 beq .L129 + 2547 .L109: +4555:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** } + 2548 .loc 1 4555 7 is_stmt 1 view .LVU761 +4555:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** } + 2549 .loc 1 4555 27 is_stmt 0 view .LVU762 + 2550 007e 4623 movs r3, #70 + 2551 0080 0222 movs r2, #2 + 2552 .LVL194: +4555:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** } + 2553 .loc 1 4555 27 view .LVU763 + 2554 0082 E254 strb r2, [r4, r3] + 2555 0084 CBE7 b .L108 + 2556 .LVL195: + 2557 .L129: +4549:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** { + 2558 .loc 1 4549 31 discriminator 1 view .LVU764 + 2559 0086 049B ldr r3, [sp, #16] + 2560 0088 002B cmp r3, #0 + 2561 008a F8D0 beq .L109 + 2562 008c F4E7 b .L107 + 2563 .LVL196: + 2564 .L127: +4563:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** { + 2565 .loc 1 4563 3 view .LVU765 + 2566 008e 0120 movs r0, #1 + 2567 0090 F2E7 b .L107 + 2568 .L111: + 2569 0092 8023 movs r3, #128 + 2570 0094 9B01 lsls r3, r3, #6 + 2571 0096 9D42 cmp r5, r3 + 2572 0098 56D0 beq .L115 + 2573 009a 8023 movs r3, #128 + 2574 009c DB01 lsls r3, r3, #7 + 2575 009e 9D42 cmp r5, r3 + 2576 00a0 66D0 beq .L116 + 2577 00a2 8023 movs r3, #128 + 2578 00a4 5B01 lsls r3, r3, #5 + 2579 00a6 9D42 cmp r5, r3 + 2580 00a8 12D1 bne .L130 +4640:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** htim->hdma[TIM_DMA_ID_CC4]->XferHalfCpltCallback = TIM_DMADelayPulseHalfCplt; + 2581 .loc 1 4640 7 is_stmt 1 view .LVU766 +4640:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** htim->hdma[TIM_DMA_ID_CC4]->XferHalfCpltCallback = TIM_DMADelayPulseHalfCplt; + 2582 .loc 1 4640 17 is_stmt 0 view .LVU767 + 2583 00aa 236B ldr r3, [r4, #48] +4640:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** htim->hdma[TIM_DMA_ID_CC4]->XferHalfCpltCallback = TIM_DMADelayPulseHalfCplt; + 2584 .loc 1 4640 52 view .LVU768 + 2585 00ac 3E4A ldr r2, .L131+12 + 2586 00ae 9A62 str r2, [r3, #40] +4641:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 2587 .loc 1 4641 7 is_stmt 1 view .LVU769 +4641:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 2588 .loc 1 4641 17 is_stmt 0 view .LVU770 + 2589 00b0 236B ldr r3, [r4, #48] +4641:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 2590 .loc 1 4641 56 view .LVU771 + 2591 00b2 3E4A ldr r2, .L131+16 + ARM GAS /tmp/ccMtK8ce.s page 185 + + + 2592 00b4 DA62 str r2, [r3, #44] +4644:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 2593 .loc 1 4644 7 is_stmt 1 view .LVU772 +4644:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 2594 .loc 1 4644 17 is_stmt 0 view .LVU773 + 2595 00b6 236B ldr r3, [r4, #48] +4644:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 2596 .loc 1 4644 53 view .LVU774 + 2597 00b8 3A4A ldr r2, .L131+8 + 2598 00ba 1A63 str r2, [r3, #48] +4647:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** (uint32_t)&htim->Instance->DMAR, DataLength) != HAL_OK) + 2599 .loc 1 4647 7 is_stmt 1 view .LVU775 +4648:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** { + 2600 .loc 1 4648 43 is_stmt 0 view .LVU776 + 2601 00bc 2268 ldr r2, [r4] +4648:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** { + 2602 .loc 1 4648 38 view .LVU777 + 2603 00be 4C32 adds r2, r2, #76 +4647:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** (uint32_t)&htim->Instance->DMAR, DataLength) != HAL_OK) + 2604 .loc 1 4647 11 view .LVU778 + 2605 00c0 206B ldr r0, [r4, #48] + 2606 00c2 059B ldr r3, [sp, #20] + 2607 00c4 FFF7FEFF bl HAL_DMA_Start_IT + 2608 .LVL197: +4647:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** (uint32_t)&htim->Instance->DMAR, DataLength) != HAL_OK) + 2609 .loc 1 4647 10 discriminator 1 view .LVU779 + 2610 00c8 0028 cmp r0, #0 + 2611 00ca CCD0 beq .L118 +4651:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** } + 2612 .loc 1 4651 16 view .LVU780 + 2613 00cc 0120 movs r0, #1 + 2614 00ce D3E7 b .L107 + 2615 .LVL198: + 2616 .L130: +4563:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** { + 2617 .loc 1 4563 3 view .LVU781 + 2618 00d0 0120 movs r0, #1 + 2619 00d2 D1E7 b .L107 + 2620 .L112: +4586:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** htim->hdma[TIM_DMA_ID_CC1]->XferHalfCpltCallback = TIM_DMADelayPulseHalfCplt; + 2621 .loc 1 4586 7 is_stmt 1 view .LVU782 +4586:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** htim->hdma[TIM_DMA_ID_CC1]->XferHalfCpltCallback = TIM_DMADelayPulseHalfCplt; + 2622 .loc 1 4586 17 is_stmt 0 view .LVU783 + 2623 00d4 636A ldr r3, [r4, #36] +4586:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** htim->hdma[TIM_DMA_ID_CC1]->XferHalfCpltCallback = TIM_DMADelayPulseHalfCplt; + 2624 .loc 1 4586 52 view .LVU784 + 2625 00d6 344A ldr r2, .L131+12 + 2626 00d8 9A62 str r2, [r3, #40] +4587:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 2627 .loc 1 4587 7 is_stmt 1 view .LVU785 +4587:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 2628 .loc 1 4587 17 is_stmt 0 view .LVU786 + 2629 00da 636A ldr r3, [r4, #36] +4587:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 2630 .loc 1 4587 56 view .LVU787 + 2631 00dc 334A ldr r2, .L131+16 + 2632 00de DA62 str r2, [r3, #44] + ARM GAS /tmp/ccMtK8ce.s page 186 + + +4590:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 2633 .loc 1 4590 7 is_stmt 1 view .LVU788 +4590:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 2634 .loc 1 4590 17 is_stmt 0 view .LVU789 + 2635 00e0 636A ldr r3, [r4, #36] +4590:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 2636 .loc 1 4590 53 view .LVU790 + 2637 00e2 304A ldr r2, .L131+8 + 2638 00e4 1A63 str r2, [r3, #48] +4593:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** (uint32_t)&htim->Instance->DMAR, DataLength) != HAL_OK) + 2639 .loc 1 4593 7 is_stmt 1 view .LVU791 +4594:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** { + 2640 .loc 1 4594 43 is_stmt 0 view .LVU792 + 2641 00e6 2268 ldr r2, [r4] +4594:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** { + 2642 .loc 1 4594 38 view .LVU793 + 2643 00e8 4C32 adds r2, r2, #76 +4593:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** (uint32_t)&htim->Instance->DMAR, DataLength) != HAL_OK) + 2644 .loc 1 4593 11 view .LVU794 + 2645 00ea 606A ldr r0, [r4, #36] + 2646 00ec 059B ldr r3, [sp, #20] + 2647 00ee FFF7FEFF bl HAL_DMA_Start_IT + 2648 .LVL199: +4593:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** (uint32_t)&htim->Instance->DMAR, DataLength) != HAL_OK) + 2649 .loc 1 4593 10 discriminator 1 view .LVU795 + 2650 00f2 0028 cmp r0, #0 + 2651 00f4 B7D0 beq .L118 +4597:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** } + 2652 .loc 1 4597 16 view .LVU796 + 2653 00f6 0120 movs r0, #1 + 2654 00f8 BEE7 b .L107 + 2655 .LVL200: + 2656 .L113: +4604:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** htim->hdma[TIM_DMA_ID_CC2]->XferHalfCpltCallback = TIM_DMADelayPulseHalfCplt; + 2657 .loc 1 4604 7 is_stmt 1 view .LVU797 +4604:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** htim->hdma[TIM_DMA_ID_CC2]->XferHalfCpltCallback = TIM_DMADelayPulseHalfCplt; + 2658 .loc 1 4604 17 is_stmt 0 view .LVU798 + 2659 00fa A36A ldr r3, [r4, #40] +4604:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** htim->hdma[TIM_DMA_ID_CC2]->XferHalfCpltCallback = TIM_DMADelayPulseHalfCplt; + 2660 .loc 1 4604 52 view .LVU799 + 2661 00fc 2A4A ldr r2, .L131+12 + 2662 00fe 9A62 str r2, [r3, #40] +4605:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 2663 .loc 1 4605 7 is_stmt 1 view .LVU800 +4605:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 2664 .loc 1 4605 17 is_stmt 0 view .LVU801 + 2665 0100 A36A ldr r3, [r4, #40] +4605:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 2666 .loc 1 4605 56 view .LVU802 + 2667 0102 2A4A ldr r2, .L131+16 + 2668 0104 DA62 str r2, [r3, #44] +4608:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 2669 .loc 1 4608 7 is_stmt 1 view .LVU803 +4608:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 2670 .loc 1 4608 17 is_stmt 0 view .LVU804 + 2671 0106 A36A ldr r3, [r4, #40] +4608:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + ARM GAS /tmp/ccMtK8ce.s page 187 + + + 2672 .loc 1 4608 53 view .LVU805 + 2673 0108 264A ldr r2, .L131+8 + 2674 010a 1A63 str r2, [r3, #48] +4611:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** (uint32_t)&htim->Instance->DMAR, DataLength) != HAL_OK) + 2675 .loc 1 4611 7 is_stmt 1 view .LVU806 +4612:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** { + 2676 .loc 1 4612 43 is_stmt 0 view .LVU807 + 2677 010c 2268 ldr r2, [r4] +4612:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** { + 2678 .loc 1 4612 38 view .LVU808 + 2679 010e 4C32 adds r2, r2, #76 +4611:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** (uint32_t)&htim->Instance->DMAR, DataLength) != HAL_OK) + 2680 .loc 1 4611 11 view .LVU809 + 2681 0110 A06A ldr r0, [r4, #40] + 2682 0112 059B ldr r3, [sp, #20] + 2683 0114 FFF7FEFF bl HAL_DMA_Start_IT + 2684 .LVL201: +4611:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** (uint32_t)&htim->Instance->DMAR, DataLength) != HAL_OK) + 2685 .loc 1 4611 10 discriminator 1 view .LVU810 + 2686 0118 0028 cmp r0, #0 + 2687 011a A4D0 beq .L118 +4615:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** } + 2688 .loc 1 4615 16 view .LVU811 + 2689 011c 0120 movs r0, #1 + 2690 011e ABE7 b .L107 + 2691 .LVL202: + 2692 .L110: +4622:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** htim->hdma[TIM_DMA_ID_CC3]->XferHalfCpltCallback = TIM_DMADelayPulseHalfCplt; + 2693 .loc 1 4622 7 is_stmt 1 view .LVU812 +4622:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** htim->hdma[TIM_DMA_ID_CC3]->XferHalfCpltCallback = TIM_DMADelayPulseHalfCplt; + 2694 .loc 1 4622 17 is_stmt 0 view .LVU813 + 2695 0120 E36A ldr r3, [r4, #44] +4622:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** htim->hdma[TIM_DMA_ID_CC3]->XferHalfCpltCallback = TIM_DMADelayPulseHalfCplt; + 2696 .loc 1 4622 52 view .LVU814 + 2697 0122 214A ldr r2, .L131+12 + 2698 0124 9A62 str r2, [r3, #40] +4623:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 2699 .loc 1 4623 7 is_stmt 1 view .LVU815 +4623:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 2700 .loc 1 4623 17 is_stmt 0 view .LVU816 + 2701 0126 E36A ldr r3, [r4, #44] +4623:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 2702 .loc 1 4623 56 view .LVU817 + 2703 0128 204A ldr r2, .L131+16 + 2704 012a DA62 str r2, [r3, #44] +4626:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 2705 .loc 1 4626 7 is_stmt 1 view .LVU818 +4626:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 2706 .loc 1 4626 17 is_stmt 0 view .LVU819 + 2707 012c E36A ldr r3, [r4, #44] +4626:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 2708 .loc 1 4626 53 view .LVU820 + 2709 012e 1D4A ldr r2, .L131+8 + 2710 0130 1A63 str r2, [r3, #48] +4629:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** (uint32_t)&htim->Instance->DMAR, DataLength) != HAL_OK) + 2711 .loc 1 4629 7 is_stmt 1 view .LVU821 +4630:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** { + ARM GAS /tmp/ccMtK8ce.s page 188 + + + 2712 .loc 1 4630 43 is_stmt 0 view .LVU822 + 2713 0132 2268 ldr r2, [r4] +4630:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** { + 2714 .loc 1 4630 38 view .LVU823 + 2715 0134 4C32 adds r2, r2, #76 +4629:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** (uint32_t)&htim->Instance->DMAR, DataLength) != HAL_OK) + 2716 .loc 1 4629 11 view .LVU824 + 2717 0136 E06A ldr r0, [r4, #44] + 2718 0138 059B ldr r3, [sp, #20] + 2719 013a FFF7FEFF bl HAL_DMA_Start_IT + 2720 .LVL203: +4629:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** (uint32_t)&htim->Instance->DMAR, DataLength) != HAL_OK) + 2721 .loc 1 4629 10 discriminator 1 view .LVU825 + 2722 013e 0028 cmp r0, #0 + 2723 0140 00D1 bne .LCB2284 + 2724 0142 90E7 b .L118 @long jump + 2725 .LCB2284: +4633:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** } + 2726 .loc 1 4633 16 view .LVU826 + 2727 0144 0120 movs r0, #1 + 2728 0146 97E7 b .L107 + 2729 .LVL204: + 2730 .L115: +4658:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** htim->hdma[TIM_DMA_ID_COMMUTATION]->XferHalfCpltCallback = TIMEx_DMACommutationHalfCplt; + 2731 .loc 1 4658 7 is_stmt 1 view .LVU827 +4658:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** htim->hdma[TIM_DMA_ID_COMMUTATION]->XferHalfCpltCallback = TIMEx_DMACommutationHalfCplt; + 2732 .loc 1 4658 17 is_stmt 0 view .LVU828 + 2733 0148 636B ldr r3, [r4, #52] +4658:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** htim->hdma[TIM_DMA_ID_COMMUTATION]->XferHalfCpltCallback = TIMEx_DMACommutationHalfCplt; + 2734 .loc 1 4658 60 view .LVU829 + 2735 014a 194A ldr r2, .L131+20 + 2736 014c 9A62 str r2, [r3, #40] +4659:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 2737 .loc 1 4659 7 is_stmt 1 view .LVU830 +4659:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 2738 .loc 1 4659 17 is_stmt 0 view .LVU831 + 2739 014e 636B ldr r3, [r4, #52] +4659:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 2740 .loc 1 4659 64 view .LVU832 + 2741 0150 184A ldr r2, .L131+24 + 2742 0152 DA62 str r2, [r3, #44] +4662:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 2743 .loc 1 4662 7 is_stmt 1 view .LVU833 +4662:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 2744 .loc 1 4662 17 is_stmt 0 view .LVU834 + 2745 0154 636B ldr r3, [r4, #52] +4662:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 2746 .loc 1 4662 61 view .LVU835 + 2747 0156 134A ldr r2, .L131+8 + 2748 0158 1A63 str r2, [r3, #48] +4665:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** (uint32_t)&htim->Instance->DMAR, DataLength) != HAL_OK) + 2749 .loc 1 4665 7 is_stmt 1 view .LVU836 +4666:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** { + 2750 .loc 1 4666 43 is_stmt 0 view .LVU837 + 2751 015a 2268 ldr r2, [r4] +4666:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** { + 2752 .loc 1 4666 38 view .LVU838 + ARM GAS /tmp/ccMtK8ce.s page 189 + + + 2753 015c 4C32 adds r2, r2, #76 +4665:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** (uint32_t)&htim->Instance->DMAR, DataLength) != HAL_OK) + 2754 .loc 1 4665 11 view .LVU839 + 2755 015e 606B ldr r0, [r4, #52] + 2756 0160 059B ldr r3, [sp, #20] + 2757 0162 FFF7FEFF bl HAL_DMA_Start_IT + 2758 .LVL205: +4665:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** (uint32_t)&htim->Instance->DMAR, DataLength) != HAL_OK) + 2759 .loc 1 4665 10 discriminator 1 view .LVU840 + 2760 0166 0028 cmp r0, #0 + 2761 0168 00D1 bne .LCB2315 + 2762 016a 7CE7 b .L118 @long jump + 2763 .LCB2315: +4669:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** } + 2764 .loc 1 4669 16 view .LVU841 + 2765 016c 0120 movs r0, #1 + 2766 016e 83E7 b .L107 + 2767 .LVL206: + 2768 .L116: +4676:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** htim->hdma[TIM_DMA_ID_TRIGGER]->XferHalfCpltCallback = TIM_DMATriggerHalfCplt; + 2769 .loc 1 4676 7 is_stmt 1 view .LVU842 +4676:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** htim->hdma[TIM_DMA_ID_TRIGGER]->XferHalfCpltCallback = TIM_DMATriggerHalfCplt; + 2770 .loc 1 4676 17 is_stmt 0 view .LVU843 + 2771 0170 A36B ldr r3, [r4, #56] +4676:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** htim->hdma[TIM_DMA_ID_TRIGGER]->XferHalfCpltCallback = TIM_DMATriggerHalfCplt; + 2772 .loc 1 4676 56 view .LVU844 + 2773 0172 114A ldr r2, .L131+28 + 2774 0174 9A62 str r2, [r3, #40] +4677:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 2775 .loc 1 4677 7 is_stmt 1 view .LVU845 +4677:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 2776 .loc 1 4677 17 is_stmt 0 view .LVU846 + 2777 0176 A36B ldr r3, [r4, #56] +4677:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 2778 .loc 1 4677 60 view .LVU847 + 2779 0178 104A ldr r2, .L131+32 + 2780 017a DA62 str r2, [r3, #44] +4680:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 2781 .loc 1 4680 7 is_stmt 1 view .LVU848 +4680:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 2782 .loc 1 4680 17 is_stmt 0 view .LVU849 + 2783 017c A36B ldr r3, [r4, #56] +4680:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 2784 .loc 1 4680 57 view .LVU850 + 2785 017e 094A ldr r2, .L131+8 + 2786 0180 1A63 str r2, [r3, #48] +4683:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** (uint32_t)&htim->Instance->DMAR, DataLength) != HAL_OK) + 2787 .loc 1 4683 7 is_stmt 1 view .LVU851 +4684:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** { + 2788 .loc 1 4684 43 is_stmt 0 view .LVU852 + 2789 0182 2268 ldr r2, [r4] +4684:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** { + 2790 .loc 1 4684 38 view .LVU853 + 2791 0184 4C32 adds r2, r2, #76 +4683:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** (uint32_t)&htim->Instance->DMAR, DataLength) != HAL_OK) + 2792 .loc 1 4683 11 view .LVU854 + 2793 0186 A06B ldr r0, [r4, #56] + ARM GAS /tmp/ccMtK8ce.s page 190 + + + 2794 0188 059B ldr r3, [sp, #20] + 2795 018a FFF7FEFF bl HAL_DMA_Start_IT + 2796 .LVL207: +4683:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** (uint32_t)&htim->Instance->DMAR, DataLength) != HAL_OK) + 2797 .loc 1 4683 10 discriminator 1 view .LVU855 + 2798 018e 0028 cmp r0, #0 + 2799 0190 00D1 bne .LCB2346 + 2800 0192 68E7 b .L118 @long jump + 2801 .LCB2346: +4687:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** } + 2802 .loc 1 4687 16 view .LVU856 + 2803 0194 0120 movs r0, #1 + 2804 0196 6FE7 b .L107 + 2805 .L128: +4579:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** } + 2806 .loc 1 4579 16 view .LVU857 + 2807 0198 0120 movs r0, #1 + 2808 019a 6DE7 b .L107 + 2809 .L132: + 2810 .align 2 + 2811 .L131: + 2812 019c 00000000 .word TIM_DMAPeriodElapsedCplt + 2813 01a0 00000000 .word TIM_DMAPeriodElapsedHalfCplt + 2814 01a4 00000000 .word TIM_DMAError + 2815 01a8 00000000 .word TIM_DMADelayPulseCplt + 2816 01ac 00000000 .word TIM_DMADelayPulseHalfCplt + 2817 01b0 00000000 .word TIMEx_DMACommutationCplt + 2818 01b4 00000000 .word TIMEx_DMACommutationHalfCplt + 2819 01b8 00000000 .word TIM_DMATriggerCplt + 2820 01bc 00000000 .word TIM_DMATriggerHalfCplt + 2821 .cfi_endproc + 2822 .LFE104: + 2824 .section .text.HAL_TIM_DMABurst_WriteStart,"ax",%progbits + 2825 .align 1 + 2826 .global HAL_TIM_DMABurst_WriteStart + 2827 .syntax unified + 2828 .code 16 + 2829 .thumb_func + 2831 HAL_TIM_DMABurst_WriteStart: + 2832 .LVL208: + 2833 .LFB103: +4480:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** HAL_StatusTypeDef status; + 2834 .loc 1 4480 1 is_stmt 1 view -0 + 2835 .cfi_startproc + 2836 @ args = 4, pretend = 0, frame = 0 + 2837 @ frame_needed = 0, uses_anonymous_args = 0 +4480:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** HAL_StatusTypeDef status; + 2838 .loc 1 4480 1 is_stmt 0 view .LVU859 + 2839 0000 10B5 push {r4, lr} + 2840 .cfi_def_cfa_offset 8 + 2841 .cfi_offset 4, -8 + 2842 .cfi_offset 14, -4 + 2843 0002 82B0 sub sp, sp, #8 + 2844 .cfi_def_cfa_offset 16 +4481:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 2845 .loc 1 4481 3 is_stmt 1 view .LVU860 +4483:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** ((BurstLength) >> 8U) + 1U); + ARM GAS /tmp/ccMtK8ce.s page 191 + + + 2846 .loc 1 4483 3 view .LVU861 +4484:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 2847 .loc 1 4484 60 is_stmt 0 view .LVU862 + 2848 0004 049C ldr r4, [sp, #16] + 2849 0006 240A lsrs r4, r4, #8 +4483:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** ((BurstLength) >> 8U) + 1U); + 2850 .loc 1 4483 12 view .LVU863 + 2851 0008 0134 adds r4, r4, #1 + 2852 000a 0194 str r4, [sp, #4] + 2853 000c 049C ldr r4, [sp, #16] + 2854 000e 0094 str r4, [sp] + 2855 0010 FFF7FEFF bl HAL_TIM_DMABurst_MultiWriteStart + 2856 .LVL209: +4488:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** } + 2857 .loc 1 4488 3 is_stmt 1 view .LVU864 +4489:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 2858 .loc 1 4489 1 is_stmt 0 view .LVU865 + 2859 0014 02B0 add sp, sp, #8 + 2860 @ sp needed + 2861 0016 10BD pop {r4, pc} + 2862 .cfi_endproc + 2863 .LFE103: + 2865 .section .text.HAL_TIM_DMABurst_WriteStop,"ax",%progbits + 2866 .align 1 + 2867 .global HAL_TIM_DMABurst_WriteStop + 2868 .syntax unified + 2869 .code 16 + 2870 .thumb_func + 2872 HAL_TIM_DMABurst_WriteStop: + 2873 .LVL210: + 2874 .LFB105: +4715:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** HAL_StatusTypeDef status = HAL_OK; + 2875 .loc 1 4715 1 is_stmt 1 view -0 + 2876 .cfi_startproc + 2877 @ args = 0, pretend = 0, frame = 0 + 2878 @ frame_needed = 0, uses_anonymous_args = 0 +4715:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** HAL_StatusTypeDef status = HAL_OK; + 2879 .loc 1 4715 1 is_stmt 0 view .LVU867 + 2880 0000 70B5 push {r4, r5, r6, lr} + 2881 .cfi_def_cfa_offset 16 + 2882 .cfi_offset 4, -16 + 2883 .cfi_offset 5, -12 + 2884 .cfi_offset 6, -8 + 2885 .cfi_offset 14, -4 + 2886 0002 0500 movs r5, r0 + 2887 0004 0C00 movs r4, r1 +4716:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 2888 .loc 1 4716 3 is_stmt 1 view .LVU868 + 2889 .LVL211: +4719:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 2890 .loc 1 4719 3 view .LVU869 +4722:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** { + 2891 .loc 1 4722 3 view .LVU870 + 2892 0006 8023 movs r3, #128 + 2893 0008 1B01 lsls r3, r3, #4 + 2894 000a 9942 cmp r1, r3 + 2895 000c 34D0 beq .L135 + ARM GAS /tmp/ccMtK8ce.s page 192 + + + 2896 000e 19D8 bhi .L136 + 2897 0010 8023 movs r3, #128 + 2898 0012 9B00 lsls r3, r3, #2 + 2899 0014 9942 cmp r1, r3 + 2900 0016 27D0 beq .L137 + 2901 0018 8023 movs r3, #128 + 2902 001a DB00 lsls r3, r3, #3 + 2903 001c 9942 cmp r1, r3 + 2904 001e 27D0 beq .L138 + 2905 0020 8023 movs r3, #128 + 2906 0022 5B00 lsls r3, r3, #1 + 2907 0024 9942 cmp r1, r3 + 2908 0026 0BD1 bne .L145 +4726:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** break; + 2909 .loc 1 4726 7 view .LVU871 +4726:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** break; + 2910 .loc 1 4726 13 is_stmt 0 view .LVU872 + 2911 0028 006A ldr r0, [r0, #32] + 2912 .LVL212: +4726:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** break; + 2913 .loc 1 4726 13 view .LVU873 + 2914 002a FFF7FEFF bl HAL_DMA_Abort_IT + 2915 .LVL213: +4727:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** } + 2916 .loc 1 4727 7 is_stmt 1 view .LVU874 +4764:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** { + 2917 .loc 1 4764 3 view .LVU875 + 2918 .L144: +4767:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 2919 .loc 1 4767 5 view .LVU876 + 2920 002e 2A68 ldr r2, [r5] + 2921 0030 D368 ldr r3, [r2, #12] + 2922 0032 A343 bics r3, r4 + 2923 0034 D360 str r3, [r2, #12] +4770:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** } + 2924 .loc 1 4770 5 view .LVU877 +4770:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** } + 2925 .loc 1 4770 25 is_stmt 0 view .LVU878 + 2926 0036 4623 movs r3, #70 + 2927 0038 0122 movs r2, #1 + 2928 003a EA54 strb r2, [r5, r3] + 2929 003c 0020 movs r0, #0 + 2930 .L140: + 2931 .LVL214: +4774:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** } + 2932 .loc 1 4774 3 is_stmt 1 view .LVU879 +4775:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 2933 .loc 1 4775 1 is_stmt 0 view .LVU880 + 2934 @ sp needed + 2935 .LVL215: + 2936 .LVL216: +4775:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 2937 .loc 1 4775 1 view .LVU881 + 2938 003e 70BD pop {r4, r5, r6, pc} + 2939 .LVL217: + 2940 .L145: +4722:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** { + ARM GAS /tmp/ccMtK8ce.s page 193 + + + 2941 .loc 1 4722 3 view .LVU882 + 2942 0040 0120 movs r0, #1 + 2943 .LVL218: +4722:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** { + 2944 .loc 1 4722 3 view .LVU883 + 2945 0042 FCE7 b .L140 + 2946 .LVL219: + 2947 .L136: +4722:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** { + 2948 .loc 1 4722 3 view .LVU884 + 2949 0044 8023 movs r3, #128 + 2950 0046 9B01 lsls r3, r3, #6 + 2951 0048 9942 cmp r1, r3 + 2952 004a 19D0 beq .L141 + 2953 004c 8023 movs r3, #128 + 2954 004e DB01 lsls r3, r3, #7 + 2955 0050 9942 cmp r1, r3 + 2956 0052 19D0 beq .L142 + 2957 0054 8023 movs r3, #128 + 2958 0056 5B01 lsls r3, r3, #5 + 2959 0058 9942 cmp r1, r3 + 2960 005a 03D1 bne .L146 +4746:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** break; + 2961 .loc 1 4746 7 is_stmt 1 view .LVU885 +4746:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** break; + 2962 .loc 1 4746 13 is_stmt 0 view .LVU886 + 2963 005c 006B ldr r0, [r0, #48] + 2964 .LVL220: +4746:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** break; + 2965 .loc 1 4746 13 view .LVU887 + 2966 005e FFF7FEFF bl HAL_DMA_Abort_IT + 2967 .LVL221: +4747:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** } + 2968 .loc 1 4747 7 is_stmt 1 view .LVU888 +4764:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** { + 2969 .loc 1 4764 3 view .LVU889 + 2970 0062 E4E7 b .L144 + 2971 .LVL222: + 2972 .L146: +4722:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** { + 2973 .loc 1 4722 3 is_stmt 0 view .LVU890 + 2974 0064 0120 movs r0, #1 + 2975 .LVL223: +4722:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** { + 2976 .loc 1 4722 3 view .LVU891 + 2977 0066 EAE7 b .L140 + 2978 .LVL224: + 2979 .L137: +4731:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** break; + 2980 .loc 1 4731 7 is_stmt 1 view .LVU892 +4731:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** break; + 2981 .loc 1 4731 13 is_stmt 0 view .LVU893 + 2982 0068 406A ldr r0, [r0, #36] + 2983 .LVL225: +4731:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** break; + 2984 .loc 1 4731 13 view .LVU894 + 2985 006a FFF7FEFF bl HAL_DMA_Abort_IT + ARM GAS /tmp/ccMtK8ce.s page 194 + + + 2986 .LVL226: +4732:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** } + 2987 .loc 1 4732 7 is_stmt 1 view .LVU895 +4764:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** { + 2988 .loc 1 4764 3 view .LVU896 + 2989 006e DEE7 b .L144 + 2990 .LVL227: + 2991 .L138: +4736:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** break; + 2992 .loc 1 4736 7 view .LVU897 +4736:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** break; + 2993 .loc 1 4736 13 is_stmt 0 view .LVU898 + 2994 0070 806A ldr r0, [r0, #40] + 2995 .LVL228: +4736:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** break; + 2996 .loc 1 4736 13 view .LVU899 + 2997 0072 FFF7FEFF bl HAL_DMA_Abort_IT + 2998 .LVL229: +4737:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** } + 2999 .loc 1 4737 7 is_stmt 1 view .LVU900 +4764:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** { + 3000 .loc 1 4764 3 view .LVU901 + 3001 0076 DAE7 b .L144 + 3002 .LVL230: + 3003 .L135: +4741:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** break; + 3004 .loc 1 4741 7 view .LVU902 +4741:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** break; + 3005 .loc 1 4741 13 is_stmt 0 view .LVU903 + 3006 0078 C06A ldr r0, [r0, #44] + 3007 .LVL231: +4741:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** break; + 3008 .loc 1 4741 13 view .LVU904 + 3009 007a FFF7FEFF bl HAL_DMA_Abort_IT + 3010 .LVL232: +4742:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** } + 3011 .loc 1 4742 7 is_stmt 1 view .LVU905 +4764:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** { + 3012 .loc 1 4764 3 view .LVU906 + 3013 007e D6E7 b .L144 + 3014 .LVL233: + 3015 .L141: +4751:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** break; + 3016 .loc 1 4751 7 view .LVU907 +4751:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** break; + 3017 .loc 1 4751 13 is_stmt 0 view .LVU908 + 3018 0080 406B ldr r0, [r0, #52] + 3019 .LVL234: +4751:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** break; + 3020 .loc 1 4751 13 view .LVU909 + 3021 0082 FFF7FEFF bl HAL_DMA_Abort_IT + 3022 .LVL235: +4752:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** } + 3023 .loc 1 4752 7 is_stmt 1 view .LVU910 +4764:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** { + 3024 .loc 1 4764 3 view .LVU911 + 3025 0086 D2E7 b .L144 + ARM GAS /tmp/ccMtK8ce.s page 195 + + + 3026 .LVL236: + 3027 .L142: +4756:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** break; + 3028 .loc 1 4756 7 view .LVU912 +4756:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** break; + 3029 .loc 1 4756 13 is_stmt 0 view .LVU913 + 3030 0088 806B ldr r0, [r0, #56] + 3031 .LVL237: +4756:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** break; + 3032 .loc 1 4756 13 view .LVU914 + 3033 008a FFF7FEFF bl HAL_DMA_Abort_IT + 3034 .LVL238: +4757:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** } + 3035 .loc 1 4757 7 is_stmt 1 view .LVU915 +4764:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** { + 3036 .loc 1 4764 3 view .LVU916 + 3037 008e CEE7 b .L144 + 3038 .cfi_endproc + 3039 .LFE105: + 3041 .section .text.HAL_TIM_DMABurst_MultiReadStart,"ax",%progbits + 3042 .align 1 + 3043 .global HAL_TIM_DMABurst_MultiReadStart + 3044 .syntax unified + 3045 .code 16 + 3046 .thumb_func + 3048 HAL_TIM_DMABurst_MultiReadStart: + 3049 .LVL239: + 3050 .LFB107: +4869:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** HAL_StatusTypeDef status = HAL_OK; + 3051 .loc 1 4869 1 view -0 + 3052 .cfi_startproc + 3053 @ args = 8, pretend = 0, frame = 0 + 3054 @ frame_needed = 0, uses_anonymous_args = 0 +4869:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** HAL_StatusTypeDef status = HAL_OK; + 3055 .loc 1 4869 1 is_stmt 0 view .LVU918 + 3056 0000 70B5 push {r4, r5, r6, lr} + 3057 .cfi_def_cfa_offset 16 + 3058 .cfi_offset 4, -16 + 3059 .cfi_offset 5, -12 + 3060 .cfi_offset 6, -8 + 3061 .cfi_offset 14, -4 + 3062 0002 0400 movs r4, r0 + 3063 0004 0E00 movs r6, r1 + 3064 0006 1500 movs r5, r2 + 3065 0008 1A00 movs r2, r3 + 3066 .LVL240: +4870:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 3067 .loc 1 4870 3 is_stmt 1 view .LVU919 +4873:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** assert_param(IS_TIM_DMA_BASE(BurstBaseAddress)); + 3068 .loc 1 4873 3 view .LVU920 +4874:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** assert_param(IS_TIM_DMA_SOURCE(BurstRequestSrc)); + 3069 .loc 1 4874 3 view .LVU921 +4875:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** assert_param(IS_TIM_DMA_LENGTH(BurstLength)); + 3070 .loc 1 4875 3 view .LVU922 +4876:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** assert_param(IS_TIM_DMA_DATA_LENGTH(DataLength)); + 3071 .loc 1 4876 3 view .LVU923 +4877:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + ARM GAS /tmp/ccMtK8ce.s page 196 + + + 3072 .loc 1 4877 3 view .LVU924 +4879:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** { + 3073 .loc 1 4879 3 view .LVU925 +4879:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** { + 3074 .loc 1 4879 11 is_stmt 0 view .LVU926 + 3075 000a 4623 movs r3, #70 + 3076 .LVL241: +4879:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** { + 3077 .loc 1 4879 11 view .LVU927 + 3078 000c C35C ldrb r3, [r0, r3] + 3079 000e D8B2 uxtb r0, r3 + 3080 .LVL242: +4879:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** { + 3081 .loc 1 4879 6 view .LVU928 + 3082 0010 022B cmp r3, #2 + 3083 0012 31D0 beq .L148 +4883:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** { + 3084 .loc 1 4883 8 is_stmt 1 view .LVU929 +4883:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** { + 3085 .loc 1 4883 16 is_stmt 0 view .LVU930 + 3086 0014 4623 movs r3, #70 + 3087 0016 E35C ldrb r3, [r4, r3] + 3088 0018 D8B2 uxtb r0, r3 +4883:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** { + 3089 .loc 1 4883 11 view .LVU931 + 3090 001a 012B cmp r3, #1 + 3091 001c 2DD0 beq .L167 + 3092 .LVL243: + 3093 .L149: +4897:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** switch (BurstRequestSrc) + 3094 .loc 1 4897 3 is_stmt 1 view .LVU932 +4898:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** { + 3095 .loc 1 4898 3 view .LVU933 + 3096 001e 8023 movs r3, #128 + 3097 0020 1B01 lsls r3, r3, #4 + 3098 0022 9D42 cmp r5, r3 + 3099 0024 00D1 bne .LCB2646 + 3100 0026 7BE0 b .L151 @long jump + 3101 .LCB2646: + 3102 0028 33D8 bhi .L152 + 3103 002a 8023 movs r3, #128 + 3104 002c 9B00 lsls r3, r3, #2 + 3105 002e 9D42 cmp r5, r3 + 3106 0030 50D0 beq .L153 + 3107 0032 8023 movs r3, #128 + 3108 0034 DB00 lsls r3, r3, #3 + 3109 0036 9D42 cmp r5, r3 + 3110 0038 5FD0 beq .L154 + 3111 003a 8023 movs r3, #128 + 3112 003c 5B00 lsls r3, r3, #1 + 3113 003e 9D42 cmp r5, r3 + 3114 0040 25D1 bne .L168 +4903:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** htim->hdma[TIM_DMA_ID_UPDATE]->XferHalfCpltCallback = TIM_DMAPeriodElapsedHalfCplt; + 3115 .loc 1 4903 7 view .LVU934 +4903:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** htim->hdma[TIM_DMA_ID_UPDATE]->XferHalfCpltCallback = TIM_DMAPeriodElapsedHalfCplt; + 3116 .loc 1 4903 17 is_stmt 0 view .LVU935 + 3117 0042 236A ldr r3, [r4, #32] + ARM GAS /tmp/ccMtK8ce.s page 197 + + +4903:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** htim->hdma[TIM_DMA_ID_UPDATE]->XferHalfCpltCallback = TIM_DMAPeriodElapsedHalfCplt; + 3118 .loc 1 4903 55 view .LVU936 + 3119 0044 5549 ldr r1, .L172 + 3120 0046 9962 str r1, [r3, #40] +4904:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 3121 .loc 1 4904 7 is_stmt 1 view .LVU937 +4904:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 3122 .loc 1 4904 17 is_stmt 0 view .LVU938 + 3123 0048 236A ldr r3, [r4, #32] +4904:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 3124 .loc 1 4904 59 view .LVU939 + 3125 004a 5549 ldr r1, .L172+4 + 3126 004c D962 str r1, [r3, #44] +4907:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 3127 .loc 1 4907 7 is_stmt 1 view .LVU940 +4907:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 3128 .loc 1 4907 17 is_stmt 0 view .LVU941 + 3129 004e 236A ldr r3, [r4, #32] +4907:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 3130 .loc 1 4907 56 view .LVU942 + 3131 0050 5449 ldr r1, .L172+8 + 3132 0052 1963 str r1, [r3, #48] +4910:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** DataLength) != HAL_OK) + 3133 .loc 1 4910 7 is_stmt 1 view .LVU943 +4910:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** DataLength) != HAL_OK) + 3134 .loc 1 4910 74 is_stmt 0 view .LVU944 + 3135 0054 2168 ldr r1, [r4] +4910:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** DataLength) != HAL_OK) + 3136 .loc 1 4910 69 view .LVU945 + 3137 0056 4C31 adds r1, r1, #76 +4910:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** DataLength) != HAL_OK) + 3138 .loc 1 4910 11 view .LVU946 + 3139 0058 206A ldr r0, [r4, #32] + 3140 005a 059B ldr r3, [sp, #20] + 3141 005c FFF7FEFF bl HAL_DMA_Start_IT + 3142 .LVL244: +4910:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** DataLength) != HAL_OK) + 3143 .loc 1 4910 10 discriminator 1 view .LVU947 + 3144 0060 0028 cmp r0, #0 + 3145 0062 00D0 beq .LCB2682 + 3146 0064 98E0 b .L169 @long jump + 3147 .LCB2682: + 3148 .L159: + 3149 .LVL245: +5034:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 3150 .loc 1 5034 5 is_stmt 1 view .LVU948 +5034:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 3151 .loc 1 5034 9 is_stmt 0 view .LVU949 + 3152 0066 2268 ldr r2, [r4] +5034:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 3153 .loc 1 5034 45 view .LVU950 + 3154 0068 049B ldr r3, [sp, #16] + 3155 006a 1E43 orrs r6, r3 + 3156 .LVL246: +5034:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 3157 .loc 1 5034 25 view .LVU951 + 3158 006c 9664 str r6, [r2, #72] + ARM GAS /tmp/ccMtK8ce.s page 198 + + +5037:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** } + 3159 .loc 1 5037 5 is_stmt 1 view .LVU952 + 3160 006e 2268 ldr r2, [r4] + 3161 0070 D368 ldr r3, [r2, #12] + 3162 0072 2B43 orrs r3, r5 + 3163 0074 D360 str r3, [r2, #12] + 3164 0076 0020 movs r0, #0 + 3165 .L148: +5042:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 3166 .loc 1 5042 1 is_stmt 0 view .LVU953 + 3167 @ sp needed + 3168 .LVL247: + 3169 .LVL248: +5042:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 3170 .loc 1 5042 1 view .LVU954 + 3171 0078 70BD pop {r4, r5, r6, pc} + 3172 .LVL249: + 3173 .L167: +4885:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** { + 3174 .loc 1 4885 5 is_stmt 1 view .LVU955 +4885:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** { + 3175 .loc 1 4885 8 is_stmt 0 view .LVU956 + 3176 007a 002A cmp r2, #0 + 3177 007c 03D0 beq .L170 + 3178 .L150: +4891:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** } + 3179 .loc 1 4891 7 is_stmt 1 view .LVU957 +4891:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** } + 3180 .loc 1 4891 27 is_stmt 0 view .LVU958 + 3181 007e 4623 movs r3, #70 + 3182 0080 0221 movs r1, #2 + 3183 .LVL250: +4891:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** } + 3184 .loc 1 4891 27 view .LVU959 + 3185 0082 E154 strb r1, [r4, r3] + 3186 0084 CBE7 b .L149 + 3187 .LVL251: + 3188 .L170: +4885:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** { + 3189 .loc 1 4885 31 discriminator 1 view .LVU960 + 3190 0086 049B ldr r3, [sp, #16] + 3191 0088 002B cmp r3, #0 + 3192 008a F8D0 beq .L150 + 3193 008c F4E7 b .L148 + 3194 .LVL252: + 3195 .L168: +4898:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** { + 3196 .loc 1 4898 3 view .LVU961 + 3197 008e 0120 movs r0, #1 + 3198 0090 F2E7 b .L148 + 3199 .L152: + 3200 0092 8023 movs r3, #128 + 3201 0094 9B01 lsls r3, r3, #6 + 3202 0096 9D42 cmp r5, r3 + 3203 0098 56D0 beq .L156 + 3204 009a 8023 movs r3, #128 + 3205 009c DB01 lsls r3, r3, #7 + ARM GAS /tmp/ccMtK8ce.s page 199 + + + 3206 009e 9D42 cmp r5, r3 + 3207 00a0 66D0 beq .L157 + 3208 00a2 8023 movs r3, #128 + 3209 00a4 5B01 lsls r3, r3, #5 + 3210 00a6 9D42 cmp r5, r3 + 3211 00a8 12D1 bne .L171 +4975:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** htim->hdma[TIM_DMA_ID_CC4]->XferHalfCpltCallback = TIM_DMACaptureHalfCplt; + 3212 .loc 1 4975 7 is_stmt 1 view .LVU962 +4975:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** htim->hdma[TIM_DMA_ID_CC4]->XferHalfCpltCallback = TIM_DMACaptureHalfCplt; + 3213 .loc 1 4975 17 is_stmt 0 view .LVU963 + 3214 00aa 236B ldr r3, [r4, #48] +4975:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** htim->hdma[TIM_DMA_ID_CC4]->XferHalfCpltCallback = TIM_DMACaptureHalfCplt; + 3215 .loc 1 4975 52 view .LVU964 + 3216 00ac 3E49 ldr r1, .L172+12 + 3217 00ae 9962 str r1, [r3, #40] +4976:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 3218 .loc 1 4976 7 is_stmt 1 view .LVU965 +4976:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 3219 .loc 1 4976 17 is_stmt 0 view .LVU966 + 3220 00b0 236B ldr r3, [r4, #48] +4976:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 3221 .loc 1 4976 56 view .LVU967 + 3222 00b2 3E49 ldr r1, .L172+16 + 3223 00b4 D962 str r1, [r3, #44] +4979:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 3224 .loc 1 4979 7 is_stmt 1 view .LVU968 +4979:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 3225 .loc 1 4979 17 is_stmt 0 view .LVU969 + 3226 00b6 236B ldr r3, [r4, #48] +4979:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 3227 .loc 1 4979 53 view .LVU970 + 3228 00b8 3A49 ldr r1, .L172+8 + 3229 00ba 1963 str r1, [r3, #48] +4982:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** DataLength) != HAL_OK) + 3230 .loc 1 4982 7 is_stmt 1 view .LVU971 +4982:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** DataLength) != HAL_OK) + 3231 .loc 1 4982 71 is_stmt 0 view .LVU972 + 3232 00bc 2168 ldr r1, [r4] +4982:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** DataLength) != HAL_OK) + 3233 .loc 1 4982 66 view .LVU973 + 3234 00be 4C31 adds r1, r1, #76 +4982:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** DataLength) != HAL_OK) + 3235 .loc 1 4982 11 view .LVU974 + 3236 00c0 206B ldr r0, [r4, #48] + 3237 00c2 059B ldr r3, [sp, #20] + 3238 00c4 FFF7FEFF bl HAL_DMA_Start_IT + 3239 .LVL253: +4982:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** DataLength) != HAL_OK) + 3240 .loc 1 4982 10 discriminator 1 view .LVU975 + 3241 00c8 0028 cmp r0, #0 + 3242 00ca CCD0 beq .L159 +4986:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** } + 3243 .loc 1 4986 16 view .LVU976 + 3244 00cc 0120 movs r0, #1 + 3245 00ce D3E7 b .L148 + 3246 .LVL254: + 3247 .L171: + ARM GAS /tmp/ccMtK8ce.s page 200 + + +4898:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** { + 3248 .loc 1 4898 3 view .LVU977 + 3249 00d0 0120 movs r0, #1 + 3250 00d2 D1E7 b .L148 + 3251 .L153: +4921:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** htim->hdma[TIM_DMA_ID_CC1]->XferHalfCpltCallback = TIM_DMACaptureHalfCplt; + 3252 .loc 1 4921 7 is_stmt 1 view .LVU978 +4921:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** htim->hdma[TIM_DMA_ID_CC1]->XferHalfCpltCallback = TIM_DMACaptureHalfCplt; + 3253 .loc 1 4921 17 is_stmt 0 view .LVU979 + 3254 00d4 636A ldr r3, [r4, #36] +4921:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** htim->hdma[TIM_DMA_ID_CC1]->XferHalfCpltCallback = TIM_DMACaptureHalfCplt; + 3255 .loc 1 4921 52 view .LVU980 + 3256 00d6 3449 ldr r1, .L172+12 + 3257 00d8 9962 str r1, [r3, #40] +4922:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 3258 .loc 1 4922 7 is_stmt 1 view .LVU981 +4922:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 3259 .loc 1 4922 17 is_stmt 0 view .LVU982 + 3260 00da 636A ldr r3, [r4, #36] +4922:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 3261 .loc 1 4922 56 view .LVU983 + 3262 00dc 3349 ldr r1, .L172+16 + 3263 00de D962 str r1, [r3, #44] +4925:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 3264 .loc 1 4925 7 is_stmt 1 view .LVU984 +4925:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 3265 .loc 1 4925 17 is_stmt 0 view .LVU985 + 3266 00e0 636A ldr r3, [r4, #36] +4925:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 3267 .loc 1 4925 53 view .LVU986 + 3268 00e2 3049 ldr r1, .L172+8 + 3269 00e4 1963 str r1, [r3, #48] +4928:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** DataLength) != HAL_OK) + 3270 .loc 1 4928 7 is_stmt 1 view .LVU987 +4928:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** DataLength) != HAL_OK) + 3271 .loc 1 4928 71 is_stmt 0 view .LVU988 + 3272 00e6 2168 ldr r1, [r4] +4928:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** DataLength) != HAL_OK) + 3273 .loc 1 4928 66 view .LVU989 + 3274 00e8 4C31 adds r1, r1, #76 +4928:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** DataLength) != HAL_OK) + 3275 .loc 1 4928 11 view .LVU990 + 3276 00ea 606A ldr r0, [r4, #36] + 3277 00ec 059B ldr r3, [sp, #20] + 3278 00ee FFF7FEFF bl HAL_DMA_Start_IT + 3279 .LVL255: +4928:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** DataLength) != HAL_OK) + 3280 .loc 1 4928 10 discriminator 1 view .LVU991 + 3281 00f2 0028 cmp r0, #0 + 3282 00f4 B7D0 beq .L159 +4932:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** } + 3283 .loc 1 4932 16 view .LVU992 + 3284 00f6 0120 movs r0, #1 + 3285 00f8 BEE7 b .L148 + 3286 .LVL256: + 3287 .L154: +4939:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** htim->hdma[TIM_DMA_ID_CC2]->XferHalfCpltCallback = TIM_DMACaptureHalfCplt; + ARM GAS /tmp/ccMtK8ce.s page 201 + + + 3288 .loc 1 4939 7 is_stmt 1 view .LVU993 +4939:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** htim->hdma[TIM_DMA_ID_CC2]->XferHalfCpltCallback = TIM_DMACaptureHalfCplt; + 3289 .loc 1 4939 17 is_stmt 0 view .LVU994 + 3290 00fa A36A ldr r3, [r4, #40] +4939:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** htim->hdma[TIM_DMA_ID_CC2]->XferHalfCpltCallback = TIM_DMACaptureHalfCplt; + 3291 .loc 1 4939 52 view .LVU995 + 3292 00fc 2A49 ldr r1, .L172+12 + 3293 00fe 9962 str r1, [r3, #40] +4940:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 3294 .loc 1 4940 7 is_stmt 1 view .LVU996 +4940:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 3295 .loc 1 4940 17 is_stmt 0 view .LVU997 + 3296 0100 A36A ldr r3, [r4, #40] +4940:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 3297 .loc 1 4940 56 view .LVU998 + 3298 0102 2A49 ldr r1, .L172+16 + 3299 0104 D962 str r1, [r3, #44] +4943:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 3300 .loc 1 4943 7 is_stmt 1 view .LVU999 +4943:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 3301 .loc 1 4943 17 is_stmt 0 view .LVU1000 + 3302 0106 A36A ldr r3, [r4, #40] +4943:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 3303 .loc 1 4943 53 view .LVU1001 + 3304 0108 2649 ldr r1, .L172+8 + 3305 010a 1963 str r1, [r3, #48] +4946:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** DataLength) != HAL_OK) + 3306 .loc 1 4946 7 is_stmt 1 view .LVU1002 +4946:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** DataLength) != HAL_OK) + 3307 .loc 1 4946 71 is_stmt 0 view .LVU1003 + 3308 010c 2168 ldr r1, [r4] +4946:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** DataLength) != HAL_OK) + 3309 .loc 1 4946 66 view .LVU1004 + 3310 010e 4C31 adds r1, r1, #76 +4946:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** DataLength) != HAL_OK) + 3311 .loc 1 4946 11 view .LVU1005 + 3312 0110 A06A ldr r0, [r4, #40] + 3313 0112 059B ldr r3, [sp, #20] + 3314 0114 FFF7FEFF bl HAL_DMA_Start_IT + 3315 .LVL257: +4946:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** DataLength) != HAL_OK) + 3316 .loc 1 4946 10 discriminator 1 view .LVU1006 + 3317 0118 0028 cmp r0, #0 + 3318 011a A4D0 beq .L159 +4950:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** } + 3319 .loc 1 4950 16 view .LVU1007 + 3320 011c 0120 movs r0, #1 + 3321 011e ABE7 b .L148 + 3322 .LVL258: + 3323 .L151: +4957:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** htim->hdma[TIM_DMA_ID_CC3]->XferHalfCpltCallback = TIM_DMACaptureHalfCplt; + 3324 .loc 1 4957 7 is_stmt 1 view .LVU1008 +4957:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** htim->hdma[TIM_DMA_ID_CC3]->XferHalfCpltCallback = TIM_DMACaptureHalfCplt; + 3325 .loc 1 4957 17 is_stmt 0 view .LVU1009 + 3326 0120 E36A ldr r3, [r4, #44] +4957:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** htim->hdma[TIM_DMA_ID_CC3]->XferHalfCpltCallback = TIM_DMACaptureHalfCplt; + 3327 .loc 1 4957 52 view .LVU1010 + ARM GAS /tmp/ccMtK8ce.s page 202 + + + 3328 0122 2149 ldr r1, .L172+12 + 3329 0124 9962 str r1, [r3, #40] +4958:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 3330 .loc 1 4958 7 is_stmt 1 view .LVU1011 +4958:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 3331 .loc 1 4958 17 is_stmt 0 view .LVU1012 + 3332 0126 E36A ldr r3, [r4, #44] +4958:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 3333 .loc 1 4958 56 view .LVU1013 + 3334 0128 2049 ldr r1, .L172+16 + 3335 012a D962 str r1, [r3, #44] +4961:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 3336 .loc 1 4961 7 is_stmt 1 view .LVU1014 +4961:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 3337 .loc 1 4961 17 is_stmt 0 view .LVU1015 + 3338 012c E36A ldr r3, [r4, #44] +4961:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 3339 .loc 1 4961 53 view .LVU1016 + 3340 012e 1D49 ldr r1, .L172+8 + 3341 0130 1963 str r1, [r3, #48] +4964:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** DataLength) != HAL_OK) + 3342 .loc 1 4964 7 is_stmt 1 view .LVU1017 +4964:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** DataLength) != HAL_OK) + 3343 .loc 1 4964 71 is_stmt 0 view .LVU1018 + 3344 0132 2168 ldr r1, [r4] +4964:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** DataLength) != HAL_OK) + 3345 .loc 1 4964 66 view .LVU1019 + 3346 0134 4C31 adds r1, r1, #76 +4964:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** DataLength) != HAL_OK) + 3347 .loc 1 4964 11 view .LVU1020 + 3348 0136 E06A ldr r0, [r4, #44] + 3349 0138 059B ldr r3, [sp, #20] + 3350 013a FFF7FEFF bl HAL_DMA_Start_IT + 3351 .LVL259: +4964:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** DataLength) != HAL_OK) + 3352 .loc 1 4964 10 discriminator 1 view .LVU1021 + 3353 013e 0028 cmp r0, #0 + 3354 0140 00D1 bne .LCB2881 + 3355 0142 90E7 b .L159 @long jump + 3356 .LCB2881: +4968:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** } + 3357 .loc 1 4968 16 view .LVU1022 + 3358 0144 0120 movs r0, #1 + 3359 0146 97E7 b .L148 + 3360 .LVL260: + 3361 .L156: +4993:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** htim->hdma[TIM_DMA_ID_COMMUTATION]->XferHalfCpltCallback = TIMEx_DMACommutationHalfCplt; + 3362 .loc 1 4993 7 is_stmt 1 view .LVU1023 +4993:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** htim->hdma[TIM_DMA_ID_COMMUTATION]->XferHalfCpltCallback = TIMEx_DMACommutationHalfCplt; + 3363 .loc 1 4993 17 is_stmt 0 view .LVU1024 + 3364 0148 636B ldr r3, [r4, #52] +4993:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** htim->hdma[TIM_DMA_ID_COMMUTATION]->XferHalfCpltCallback = TIMEx_DMACommutationHalfCplt; + 3365 .loc 1 4993 60 view .LVU1025 + 3366 014a 1949 ldr r1, .L172+20 + 3367 014c 9962 str r1, [r3, #40] +4994:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 3368 .loc 1 4994 7 is_stmt 1 view .LVU1026 + ARM GAS /tmp/ccMtK8ce.s page 203 + + +4994:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 3369 .loc 1 4994 17 is_stmt 0 view .LVU1027 + 3370 014e 636B ldr r3, [r4, #52] +4994:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 3371 .loc 1 4994 64 view .LVU1028 + 3372 0150 1849 ldr r1, .L172+24 + 3373 0152 D962 str r1, [r3, #44] +4997:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 3374 .loc 1 4997 7 is_stmt 1 view .LVU1029 +4997:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 3375 .loc 1 4997 17 is_stmt 0 view .LVU1030 + 3376 0154 636B ldr r3, [r4, #52] +4997:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 3377 .loc 1 4997 61 view .LVU1031 + 3378 0156 1349 ldr r1, .L172+8 + 3379 0158 1963 str r1, [r3, #48] +5000:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** DataLength) != HAL_OK) + 3380 .loc 1 5000 7 is_stmt 1 view .LVU1032 +5000:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** DataLength) != HAL_OK) + 3381 .loc 1 5000 79 is_stmt 0 view .LVU1033 + 3382 015a 2168 ldr r1, [r4] +5000:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** DataLength) != HAL_OK) + 3383 .loc 1 5000 74 view .LVU1034 + 3384 015c 4C31 adds r1, r1, #76 +5000:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** DataLength) != HAL_OK) + 3385 .loc 1 5000 11 view .LVU1035 + 3386 015e 606B ldr r0, [r4, #52] + 3387 0160 059B ldr r3, [sp, #20] + 3388 0162 FFF7FEFF bl HAL_DMA_Start_IT + 3389 .LVL261: +5000:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** DataLength) != HAL_OK) + 3390 .loc 1 5000 10 discriminator 1 view .LVU1036 + 3391 0166 0028 cmp r0, #0 + 3392 0168 00D1 bne .LCB2912 + 3393 016a 7CE7 b .L159 @long jump + 3394 .LCB2912: +5004:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** } + 3395 .loc 1 5004 16 view .LVU1037 + 3396 016c 0120 movs r0, #1 + 3397 016e 83E7 b .L148 + 3398 .LVL262: + 3399 .L157: +5011:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** htim->hdma[TIM_DMA_ID_TRIGGER]->XferHalfCpltCallback = TIM_DMATriggerHalfCplt; + 3400 .loc 1 5011 7 is_stmt 1 view .LVU1038 +5011:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** htim->hdma[TIM_DMA_ID_TRIGGER]->XferHalfCpltCallback = TIM_DMATriggerHalfCplt; + 3401 .loc 1 5011 17 is_stmt 0 view .LVU1039 + 3402 0170 A36B ldr r3, [r4, #56] +5011:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** htim->hdma[TIM_DMA_ID_TRIGGER]->XferHalfCpltCallback = TIM_DMATriggerHalfCplt; + 3403 .loc 1 5011 56 view .LVU1040 + 3404 0172 1149 ldr r1, .L172+28 + 3405 0174 9962 str r1, [r3, #40] +5012:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 3406 .loc 1 5012 7 is_stmt 1 view .LVU1041 +5012:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 3407 .loc 1 5012 17 is_stmt 0 view .LVU1042 + 3408 0176 A36B ldr r3, [r4, #56] +5012:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + ARM GAS /tmp/ccMtK8ce.s page 204 + + + 3409 .loc 1 5012 60 view .LVU1043 + 3410 0178 1049 ldr r1, .L172+32 + 3411 017a D962 str r1, [r3, #44] +5015:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 3412 .loc 1 5015 7 is_stmt 1 view .LVU1044 +5015:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 3413 .loc 1 5015 17 is_stmt 0 view .LVU1045 + 3414 017c A36B ldr r3, [r4, #56] +5015:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 3415 .loc 1 5015 57 view .LVU1046 + 3416 017e 0949 ldr r1, .L172+8 + 3417 0180 1963 str r1, [r3, #48] +5018:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** DataLength) != HAL_OK) + 3418 .loc 1 5018 7 is_stmt 1 view .LVU1047 +5018:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** DataLength) != HAL_OK) + 3419 .loc 1 5018 75 is_stmt 0 view .LVU1048 + 3420 0182 2168 ldr r1, [r4] +5018:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** DataLength) != HAL_OK) + 3421 .loc 1 5018 70 view .LVU1049 + 3422 0184 4C31 adds r1, r1, #76 +5018:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** DataLength) != HAL_OK) + 3423 .loc 1 5018 11 view .LVU1050 + 3424 0186 A06B ldr r0, [r4, #56] + 3425 0188 059B ldr r3, [sp, #20] + 3426 018a FFF7FEFF bl HAL_DMA_Start_IT + 3427 .LVL263: +5018:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** DataLength) != HAL_OK) + 3428 .loc 1 5018 10 discriminator 1 view .LVU1051 + 3429 018e 0028 cmp r0, #0 + 3430 0190 00D1 bne .LCB2943 + 3431 0192 68E7 b .L159 @long jump + 3432 .LCB2943: +5022:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** } + 3433 .loc 1 5022 16 view .LVU1052 + 3434 0194 0120 movs r0, #1 + 3435 0196 6FE7 b .L148 + 3436 .L169: +4914:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** } + 3437 .loc 1 4914 16 view .LVU1053 + 3438 0198 0120 movs r0, #1 + 3439 019a 6DE7 b .L148 + 3440 .L173: + 3441 .align 2 + 3442 .L172: + 3443 019c 00000000 .word TIM_DMAPeriodElapsedCplt + 3444 01a0 00000000 .word TIM_DMAPeriodElapsedHalfCplt + 3445 01a4 00000000 .word TIM_DMAError + 3446 01a8 00000000 .word TIM_DMACaptureCplt + 3447 01ac 00000000 .word TIM_DMACaptureHalfCplt + 3448 01b0 00000000 .word TIMEx_DMACommutationCplt + 3449 01b4 00000000 .word TIMEx_DMACommutationHalfCplt + 3450 01b8 00000000 .word TIM_DMATriggerCplt + 3451 01bc 00000000 .word TIM_DMATriggerHalfCplt + 3452 .cfi_endproc + 3453 .LFE107: + 3455 .section .text.HAL_TIM_DMABurst_ReadStart,"ax",%progbits + 3456 .align 1 + ARM GAS /tmp/ccMtK8ce.s page 205 + + + 3457 .global HAL_TIM_DMABurst_ReadStart + 3458 .syntax unified + 3459 .code 16 + 3460 .thumb_func + 3462 HAL_TIM_DMABurst_ReadStart: + 3463 .LVL264: + 3464 .LFB106: +4817:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** HAL_StatusTypeDef status; + 3465 .loc 1 4817 1 is_stmt 1 view -0 + 3466 .cfi_startproc + 3467 @ args = 4, pretend = 0, frame = 0 + 3468 @ frame_needed = 0, uses_anonymous_args = 0 +4817:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** HAL_StatusTypeDef status; + 3469 .loc 1 4817 1 is_stmt 0 view .LVU1055 + 3470 0000 10B5 push {r4, lr} + 3471 .cfi_def_cfa_offset 8 + 3472 .cfi_offset 4, -8 + 3473 .cfi_offset 14, -4 + 3474 0002 82B0 sub sp, sp, #8 + 3475 .cfi_def_cfa_offset 16 +4818:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 3476 .loc 1 4818 3 is_stmt 1 view .LVU1056 +4820:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** ((BurstLength) >> 8U) + 1U); + 3477 .loc 1 4820 3 view .LVU1057 +4821:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 3478 .loc 1 4821 59 is_stmt 0 view .LVU1058 + 3479 0004 049C ldr r4, [sp, #16] + 3480 0006 240A lsrs r4, r4, #8 +4820:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** ((BurstLength) >> 8U) + 1U); + 3481 .loc 1 4820 12 view .LVU1059 + 3482 0008 0134 adds r4, r4, #1 + 3483 000a 0194 str r4, [sp, #4] + 3484 000c 049C ldr r4, [sp, #16] + 3485 000e 0094 str r4, [sp] + 3486 0010 FFF7FEFF bl HAL_TIM_DMABurst_MultiReadStart + 3487 .LVL265: +4824:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** } + 3488 .loc 1 4824 3 is_stmt 1 view .LVU1060 +4825:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 3489 .loc 1 4825 1 is_stmt 0 view .LVU1061 + 3490 0014 02B0 add sp, sp, #8 + 3491 @ sp needed + 3492 0016 10BD pop {r4, pc} + 3493 .cfi_endproc + 3494 .LFE106: + 3496 .section .text.HAL_TIM_DMABurst_ReadStop,"ax",%progbits + 3497 .align 1 + 3498 .global HAL_TIM_DMABurst_ReadStop + 3499 .syntax unified + 3500 .code 16 + 3501 .thumb_func + 3503 HAL_TIM_DMABurst_ReadStop: + 3504 .LVL266: + 3505 .LFB108: +5051:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** HAL_StatusTypeDef status = HAL_OK; + 3506 .loc 1 5051 1 is_stmt 1 view -0 + 3507 .cfi_startproc + ARM GAS /tmp/ccMtK8ce.s page 206 + + + 3508 @ args = 0, pretend = 0, frame = 0 + 3509 @ frame_needed = 0, uses_anonymous_args = 0 +5051:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** HAL_StatusTypeDef status = HAL_OK; + 3510 .loc 1 5051 1 is_stmt 0 view .LVU1063 + 3511 0000 70B5 push {r4, r5, r6, lr} + 3512 .cfi_def_cfa_offset 16 + 3513 .cfi_offset 4, -16 + 3514 .cfi_offset 5, -12 + 3515 .cfi_offset 6, -8 + 3516 .cfi_offset 14, -4 + 3517 0002 0500 movs r5, r0 + 3518 0004 0C00 movs r4, r1 +5052:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 3519 .loc 1 5052 3 is_stmt 1 view .LVU1064 + 3520 .LVL267: +5055:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 3521 .loc 1 5055 3 view .LVU1065 +5058:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** { + 3522 .loc 1 5058 3 view .LVU1066 + 3523 0006 8023 movs r3, #128 + 3524 0008 1B01 lsls r3, r3, #4 + 3525 000a 9942 cmp r1, r3 + 3526 000c 34D0 beq .L176 + 3527 000e 19D8 bhi .L177 + 3528 0010 8023 movs r3, #128 + 3529 0012 9B00 lsls r3, r3, #2 + 3530 0014 9942 cmp r1, r3 + 3531 0016 27D0 beq .L178 + 3532 0018 8023 movs r3, #128 + 3533 001a DB00 lsls r3, r3, #3 + 3534 001c 9942 cmp r1, r3 + 3535 001e 27D0 beq .L179 + 3536 0020 8023 movs r3, #128 + 3537 0022 5B00 lsls r3, r3, #1 + 3538 0024 9942 cmp r1, r3 + 3539 0026 0BD1 bne .L186 +5062:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** break; + 3540 .loc 1 5062 7 view .LVU1067 +5062:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** break; + 3541 .loc 1 5062 13 is_stmt 0 view .LVU1068 + 3542 0028 006A ldr r0, [r0, #32] + 3543 .LVL268: +5062:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** break; + 3544 .loc 1 5062 13 view .LVU1069 + 3545 002a FFF7FEFF bl HAL_DMA_Abort_IT + 3546 .LVL269: +5063:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** } + 3547 .loc 1 5063 7 is_stmt 1 view .LVU1070 +5100:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** { + 3548 .loc 1 5100 3 view .LVU1071 + 3549 .L185: +5103:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 3550 .loc 1 5103 5 view .LVU1072 + 3551 002e 2A68 ldr r2, [r5] + 3552 0030 D368 ldr r3, [r2, #12] + 3553 0032 A343 bics r3, r4 + 3554 0034 D360 str r3, [r2, #12] + ARM GAS /tmp/ccMtK8ce.s page 207 + + +5106:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** } + 3555 .loc 1 5106 5 view .LVU1073 +5106:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** } + 3556 .loc 1 5106 25 is_stmt 0 view .LVU1074 + 3557 0036 4623 movs r3, #70 + 3558 0038 0122 movs r2, #1 + 3559 003a EA54 strb r2, [r5, r3] + 3560 003c 0020 movs r0, #0 + 3561 .L181: + 3562 .LVL270: +5110:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** } + 3563 .loc 1 5110 3 is_stmt 1 view .LVU1075 +5111:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 3564 .loc 1 5111 1 is_stmt 0 view .LVU1076 + 3565 @ sp needed + 3566 .LVL271: + 3567 .LVL272: +5111:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 3568 .loc 1 5111 1 view .LVU1077 + 3569 003e 70BD pop {r4, r5, r6, pc} + 3570 .LVL273: + 3571 .L186: +5058:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** { + 3572 .loc 1 5058 3 view .LVU1078 + 3573 0040 0120 movs r0, #1 + 3574 .LVL274: +5058:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** { + 3575 .loc 1 5058 3 view .LVU1079 + 3576 0042 FCE7 b .L181 + 3577 .LVL275: + 3578 .L177: +5058:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** { + 3579 .loc 1 5058 3 view .LVU1080 + 3580 0044 8023 movs r3, #128 + 3581 0046 9B01 lsls r3, r3, #6 + 3582 0048 9942 cmp r1, r3 + 3583 004a 19D0 beq .L182 + 3584 004c 8023 movs r3, #128 + 3585 004e DB01 lsls r3, r3, #7 + 3586 0050 9942 cmp r1, r3 + 3587 0052 19D0 beq .L183 + 3588 0054 8023 movs r3, #128 + 3589 0056 5B01 lsls r3, r3, #5 + 3590 0058 9942 cmp r1, r3 + 3591 005a 03D1 bne .L187 +5082:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** break; + 3592 .loc 1 5082 7 is_stmt 1 view .LVU1081 +5082:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** break; + 3593 .loc 1 5082 13 is_stmt 0 view .LVU1082 + 3594 005c 006B ldr r0, [r0, #48] + 3595 .LVL276: +5082:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** break; + 3596 .loc 1 5082 13 view .LVU1083 + 3597 005e FFF7FEFF bl HAL_DMA_Abort_IT + 3598 .LVL277: +5083:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** } + 3599 .loc 1 5083 7 is_stmt 1 view .LVU1084 + ARM GAS /tmp/ccMtK8ce.s page 208 + + +5100:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** { + 3600 .loc 1 5100 3 view .LVU1085 + 3601 0062 E4E7 b .L185 + 3602 .LVL278: + 3603 .L187: +5058:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** { + 3604 .loc 1 5058 3 is_stmt 0 view .LVU1086 + 3605 0064 0120 movs r0, #1 + 3606 .LVL279: +5058:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** { + 3607 .loc 1 5058 3 view .LVU1087 + 3608 0066 EAE7 b .L181 + 3609 .LVL280: + 3610 .L178: +5067:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** break; + 3611 .loc 1 5067 7 is_stmt 1 view .LVU1088 +5067:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** break; + 3612 .loc 1 5067 13 is_stmt 0 view .LVU1089 + 3613 0068 406A ldr r0, [r0, #36] + 3614 .LVL281: +5067:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** break; + 3615 .loc 1 5067 13 view .LVU1090 + 3616 006a FFF7FEFF bl HAL_DMA_Abort_IT + 3617 .LVL282: +5068:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** } + 3618 .loc 1 5068 7 is_stmt 1 view .LVU1091 +5100:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** { + 3619 .loc 1 5100 3 view .LVU1092 + 3620 006e DEE7 b .L185 + 3621 .LVL283: + 3622 .L179: +5072:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** break; + 3623 .loc 1 5072 7 view .LVU1093 +5072:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** break; + 3624 .loc 1 5072 13 is_stmt 0 view .LVU1094 + 3625 0070 806A ldr r0, [r0, #40] + 3626 .LVL284: +5072:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** break; + 3627 .loc 1 5072 13 view .LVU1095 + 3628 0072 FFF7FEFF bl HAL_DMA_Abort_IT + 3629 .LVL285: +5073:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** } + 3630 .loc 1 5073 7 is_stmt 1 view .LVU1096 +5100:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** { + 3631 .loc 1 5100 3 view .LVU1097 + 3632 0076 DAE7 b .L185 + 3633 .LVL286: + 3634 .L176: +5077:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** break; + 3635 .loc 1 5077 7 view .LVU1098 +5077:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** break; + 3636 .loc 1 5077 13 is_stmt 0 view .LVU1099 + 3637 0078 C06A ldr r0, [r0, #44] + 3638 .LVL287: +5077:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** break; + 3639 .loc 1 5077 13 view .LVU1100 + 3640 007a FFF7FEFF bl HAL_DMA_Abort_IT + ARM GAS /tmp/ccMtK8ce.s page 209 + + + 3641 .LVL288: +5078:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** } + 3642 .loc 1 5078 7 is_stmt 1 view .LVU1101 +5100:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** { + 3643 .loc 1 5100 3 view .LVU1102 + 3644 007e D6E7 b .L185 + 3645 .LVL289: + 3646 .L182: +5087:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** break; + 3647 .loc 1 5087 7 view .LVU1103 +5087:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** break; + 3648 .loc 1 5087 13 is_stmt 0 view .LVU1104 + 3649 0080 406B ldr r0, [r0, #52] + 3650 .LVL290: +5087:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** break; + 3651 .loc 1 5087 13 view .LVU1105 + 3652 0082 FFF7FEFF bl HAL_DMA_Abort_IT + 3653 .LVL291: +5088:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** } + 3654 .loc 1 5088 7 is_stmt 1 view .LVU1106 +5100:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** { + 3655 .loc 1 5100 3 view .LVU1107 + 3656 0086 D2E7 b .L185 + 3657 .LVL292: + 3658 .L183: +5092:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** break; + 3659 .loc 1 5092 7 view .LVU1108 +5092:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** break; + 3660 .loc 1 5092 13 is_stmt 0 view .LVU1109 + 3661 0088 806B ldr r0, [r0, #56] + 3662 .LVL293: +5092:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** break; + 3663 .loc 1 5092 13 view .LVU1110 + 3664 008a FFF7FEFF bl HAL_DMA_Abort_IT + 3665 .LVL294: +5093:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** } + 3666 .loc 1 5093 7 is_stmt 1 view .LVU1111 +5100:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** { + 3667 .loc 1 5100 3 view .LVU1112 + 3668 008e CEE7 b .L185 + 3669 .cfi_endproc + 3670 .LFE108: + 3672 .section .text.HAL_TIM_GenerateEvent,"ax",%progbits + 3673 .align 1 + 3674 .global HAL_TIM_GenerateEvent + 3675 .syntax unified + 3676 .code 16 + 3677 .thumb_func + 3679 HAL_TIM_GenerateEvent: + 3680 .LVL295: + 3681 .LFB109: +5134:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** /* Check the parameters */ + 3682 .loc 1 5134 1 view -0 + 3683 .cfi_startproc + 3684 @ args = 0, pretend = 0, frame = 0 + 3685 @ frame_needed = 0, uses_anonymous_args = 0 +5134:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** /* Check the parameters */ + ARM GAS /tmp/ccMtK8ce.s page 210 + + + 3686 .loc 1 5134 1 is_stmt 0 view .LVU1114 + 3687 0000 30B5 push {r4, r5, lr} + 3688 .cfi_def_cfa_offset 12 + 3689 .cfi_offset 4, -12 + 3690 .cfi_offset 5, -8 + 3691 .cfi_offset 14, -4 +5136:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** assert_param(IS_TIM_EVENT_SOURCE(EventSource)); + 3692 .loc 1 5136 3 is_stmt 1 view .LVU1115 +5137:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 3693 .loc 1 5137 3 view .LVU1116 +5140:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 3694 .loc 1 5140 3 view .LVU1117 +5140:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 3695 .loc 1 5140 3 view .LVU1118 + 3696 0002 3C23 movs r3, #60 + 3697 0004 C35C ldrb r3, [r0, r3] + 3698 0006 012B cmp r3, #1 + 3699 0008 0CD0 beq .L190 +5140:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 3700 .loc 1 5140 3 discriminator 2 view .LVU1119 + 3701 000a 3C23 movs r3, #60 + 3702 000c 0124 movs r4, #1 + 3703 000e C454 strb r4, [r0, r3] +5140:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 3704 .loc 1 5140 3 discriminator 2 view .LVU1120 +5143:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 3705 .loc 1 5143 3 view .LVU1121 +5143:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 3706 .loc 1 5143 15 is_stmt 0 view .LVU1122 + 3707 0010 3D22 movs r2, #61 + 3708 0012 0225 movs r5, #2 + 3709 0014 8554 strb r5, [r0, r2] +5146:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 3710 .loc 1 5146 3 is_stmt 1 view .LVU1123 +5146:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 3711 .loc 1 5146 7 is_stmt 0 view .LVU1124 + 3712 0016 0568 ldr r5, [r0] +5146:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 3713 .loc 1 5146 23 view .LVU1125 + 3714 0018 6961 str r1, [r5, #20] +5149:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 3715 .loc 1 5149 3 is_stmt 1 view .LVU1126 +5149:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 3716 .loc 1 5149 15 is_stmt 0 view .LVU1127 + 3717 001a 8454 strb r4, [r0, r2] +5151:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 3718 .loc 1 5151 3 is_stmt 1 view .LVU1128 +5151:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 3719 .loc 1 5151 3 view .LVU1129 + 3720 001c 0022 movs r2, #0 + 3721 001e C254 strb r2, [r0, r3] +5151:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 3722 .loc 1 5151 3 view .LVU1130 +5154:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** } + 3723 .loc 1 5154 3 view .LVU1131 +5154:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** } + 3724 .loc 1 5154 10 is_stmt 0 view .LVU1132 + ARM GAS /tmp/ccMtK8ce.s page 211 + + + 3725 0020 0020 movs r0, #0 + 3726 .LVL296: + 3727 .L189: +5155:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 3728 .loc 1 5155 1 view .LVU1133 + 3729 @ sp needed + 3730 0022 30BD pop {r4, r5, pc} + 3731 .LVL297: + 3732 .L190: +5140:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 3733 .loc 1 5140 3 discriminator 1 view .LVU1134 + 3734 0024 0220 movs r0, #2 + 3735 .LVL298: +5140:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 3736 .loc 1 5140 3 discriminator 1 view .LVU1135 + 3737 0026 FCE7 b .L189 + 3738 .cfi_endproc + 3739 .LFE109: + 3741 .section .text.HAL_TIM_ConfigTI1Input,"ax",%progbits + 3742 .align 1 + 3743 .global HAL_TIM_ConfigTI1Input + 3744 .syntax unified + 3745 .code 16 + 3746 .thumb_func + 3748 HAL_TIM_ConfigTI1Input: + 3749 .LVL299: + 3750 .LFB112: +5464:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** uint32_t tmpcr2; + 3751 .loc 1 5464 1 is_stmt 1 view -0 + 3752 .cfi_startproc + 3753 @ args = 0, pretend = 0, frame = 0 + 3754 @ frame_needed = 0, uses_anonymous_args = 0 + 3755 @ link register save eliminated. +5465:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 3756 .loc 1 5465 3 view .LVU1137 +5468:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** assert_param(IS_TIM_TI1SELECTION(TI1_Selection)); + 3757 .loc 1 5468 3 view .LVU1138 +5469:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 3758 .loc 1 5469 3 view .LVU1139 +5472:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 3759 .loc 1 5472 3 view .LVU1140 +5472:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 3760 .loc 1 5472 16 is_stmt 0 view .LVU1141 + 3761 0000 0268 ldr r2, [r0] +5472:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 3762 .loc 1 5472 10 view .LVU1142 + 3763 0002 5368 ldr r3, [r2, #4] + 3764 .LVL300: +5475:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 3765 .loc 1 5475 3 is_stmt 1 view .LVU1143 +5475:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 3766 .loc 1 5475 10 is_stmt 0 view .LVU1144 + 3767 0004 8020 movs r0, #128 + 3768 .LVL301: +5475:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 3769 .loc 1 5475 10 view .LVU1145 + 3770 0006 8343 bics r3, r0 + ARM GAS /tmp/ccMtK8ce.s page 212 + + + 3771 .LVL302: +5478:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 3772 .loc 1 5478 3 is_stmt 1 view .LVU1146 +5478:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 3773 .loc 1 5478 10 is_stmt 0 view .LVU1147 + 3774 0008 0B43 orrs r3, r1 + 3775 .LVL303: +5481:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 3776 .loc 1 5481 3 is_stmt 1 view .LVU1148 +5481:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 3777 .loc 1 5481 23 is_stmt 0 view .LVU1149 + 3778 000a 5360 str r3, [r2, #4] +5483:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** } + 3779 .loc 1 5483 3 is_stmt 1 view .LVU1150 +5484:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 3780 .loc 1 5484 1 is_stmt 0 view .LVU1151 + 3781 000c 0020 movs r0, #0 + 3782 @ sp needed + 3783 000e 7047 bx lr + 3784 .cfi_endproc + 3785 .LFE112: + 3787 .section .text.HAL_TIM_ReadCapturedValue,"ax",%progbits + 3788 .align 1 + 3789 .global HAL_TIM_ReadCapturedValue + 3790 .syntax unified + 3791 .code 16 + 3792 .thumb_func + 3794 HAL_TIM_ReadCapturedValue: + 3795 .LVL304: + 3796 .LFB115: +5579:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** uint32_t tmpreg = 0U; + 3797 .loc 1 5579 1 is_stmt 1 view -0 + 3798 .cfi_startproc + 3799 @ args = 0, pretend = 0, frame = 0 + 3800 @ frame_needed = 0, uses_anonymous_args = 0 + 3801 @ link register save eliminated. +5580:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 3802 .loc 1 5580 3 view .LVU1153 +5582:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** { + 3803 .loc 1 5582 3 view .LVU1154 + 3804 0000 0829 cmp r1, #8 + 3805 0002 13D0 beq .L193 + 3806 0004 08D8 bhi .L194 + 3807 0006 0029 cmp r1, #0 + 3808 0008 0DD0 beq .L195 + 3809 000a 0429 cmp r1, #4 + 3810 000c 02D1 bne .L199 +5597:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 3811 .loc 1 5597 7 view .LVU1155 +5600:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 3812 .loc 1 5600 7 view .LVU1156 +5600:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 3813 .loc 1 5600 22 is_stmt 0 view .LVU1157 + 3814 000e 0368 ldr r3, [r0] +5600:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 3815 .loc 1 5600 14 view .LVU1158 + 3816 0010 986B ldr r0, [r3, #56] + ARM GAS /tmp/ccMtK8ce.s page 213 + + + 3817 .LVL305: +5602:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** } + 3818 .loc 1 5602 7 is_stmt 1 view .LVU1159 + 3819 0012 0AE0 b .L192 + 3820 .LVL306: + 3821 .L199: +5582:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** { + 3822 .loc 1 5582 3 is_stmt 0 view .LVU1160 + 3823 0014 0020 movs r0, #0 + 3824 .LVL307: +5582:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** { + 3825 .loc 1 5582 3 view .LVU1161 + 3826 0016 08E0 b .L192 + 3827 .LVL308: + 3828 .L194: +5582:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** { + 3829 .loc 1 5582 3 view .LVU1162 + 3830 0018 0C29 cmp r1, #12 + 3831 001a 02D1 bne .L200 +5619:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 3832 .loc 1 5619 7 is_stmt 1 view .LVU1163 +5622:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 3833 .loc 1 5622 7 view .LVU1164 +5622:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 3834 .loc 1 5622 22 is_stmt 0 view .LVU1165 + 3835 001c 0368 ldr r3, [r0] +5622:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 3836 .loc 1 5622 14 view .LVU1166 + 3837 001e 186C ldr r0, [r3, #64] + 3838 .LVL309: +5624:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** } + 3839 .loc 1 5624 7 is_stmt 1 view .LVU1167 +5631:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** } + 3840 .loc 1 5631 3 view .LVU1168 +5631:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** } + 3841 .loc 1 5631 10 is_stmt 0 view .LVU1169 + 3842 0020 03E0 b .L192 + 3843 .LVL310: + 3844 .L200: +5582:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** { + 3845 .loc 1 5582 3 view .LVU1170 + 3846 0022 0020 movs r0, #0 + 3847 .LVL311: +5582:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** { + 3848 .loc 1 5582 3 view .LVU1171 + 3849 0024 01E0 b .L192 + 3850 .LVL312: + 3851 .L195: +5587:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 3852 .loc 1 5587 7 is_stmt 1 view .LVU1172 +5590:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 3853 .loc 1 5590 7 view .LVU1173 +5590:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 3854 .loc 1 5590 21 is_stmt 0 view .LVU1174 + 3855 0026 0368 ldr r3, [r0] +5590:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 3856 .loc 1 5590 14 view .LVU1175 + ARM GAS /tmp/ccMtK8ce.s page 214 + + + 3857 0028 586B ldr r0, [r3, #52] + 3858 .LVL313: +5592:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** } + 3859 .loc 1 5592 7 is_stmt 1 view .LVU1176 + 3860 .L192: +5632:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 3861 .loc 1 5632 1 is_stmt 0 view .LVU1177 + 3862 @ sp needed + 3863 002a 7047 bx lr + 3864 .LVL314: + 3865 .L193: +5608:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 3866 .loc 1 5608 7 is_stmt 1 view .LVU1178 +5611:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 3867 .loc 1 5611 7 view .LVU1179 +5611:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 3868 .loc 1 5611 22 is_stmt 0 view .LVU1180 + 3869 002c 0368 ldr r3, [r0] +5611:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 3870 .loc 1 5611 14 view .LVU1181 + 3871 002e D86B ldr r0, [r3, #60] + 3872 .LVL315: +5613:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** } + 3873 .loc 1 5613 7 is_stmt 1 view .LVU1182 + 3874 0030 FBE7 b .L192 + 3875 .cfi_endproc + 3876 .LFE115: + 3878 .section .text.HAL_TIM_PeriodElapsedCallback,"ax",%progbits + 3879 .align 1 + 3880 .weak HAL_TIM_PeriodElapsedCallback + 3881 .syntax unified + 3882 .code 16 + 3883 .thumb_func + 3885 HAL_TIM_PeriodElapsedCallback: + 3886 .LVL316: + 3887 .LFB116: +5663:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** /* Prevent unused argument(s) compilation warning */ + 3888 .loc 1 5663 1 view -0 + 3889 .cfi_startproc + 3890 @ args = 0, pretend = 0, frame = 0 + 3891 @ frame_needed = 0, uses_anonymous_args = 0 + 3892 @ link register save eliminated. +5665:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 3893 .loc 1 5665 3 view .LVU1184 +5670:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 3894 .loc 1 5670 1 is_stmt 0 view .LVU1185 + 3895 @ sp needed + 3896 0000 7047 bx lr + 3897 .cfi_endproc + 3898 .LFE116: + 3900 .section .text.TIM_DMAPeriodElapsedCplt,"ax",%progbits + 3901 .align 1 + 3902 .syntax unified + 3903 .code 16 + 3904 .thumb_func + 3906 TIM_DMAPeriodElapsedCplt: + 3907 .LVL317: + ARM GAS /tmp/ccMtK8ce.s page 215 + + + 3908 .LFB140: +6708:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** TIM_HandleTypeDef *htim = (TIM_HandleTypeDef *)((DMA_HandleTypeDef *)hdma)->Parent; + 3909 .loc 1 6708 1 is_stmt 1 view -0 + 3910 .cfi_startproc + 3911 @ args = 0, pretend = 0, frame = 0 + 3912 @ frame_needed = 0, uses_anonymous_args = 0 +6708:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** TIM_HandleTypeDef *htim = (TIM_HandleTypeDef *)((DMA_HandleTypeDef *)hdma)->Parent; + 3913 .loc 1 6708 1 is_stmt 0 view .LVU1187 + 3914 0000 10B5 push {r4, lr} + 3915 .cfi_def_cfa_offset 8 + 3916 .cfi_offset 4, -8 + 3917 .cfi_offset 14, -4 +6709:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 3918 .loc 1 6709 3 is_stmt 1 view .LVU1188 +6709:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 3919 .loc 1 6709 22 is_stmt 0 view .LVU1189 + 3920 0002 406A ldr r0, [r0, #36] + 3921 .LVL318: +6711:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** { + 3922 .loc 1 6711 3 is_stmt 1 view .LVU1190 +6711:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** { + 3923 .loc 1 6711 17 is_stmt 0 view .LVU1191 + 3924 0004 036A ldr r3, [r0, #32] +6711:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** { + 3925 .loc 1 6711 42 view .LVU1192 + 3926 0006 9B69 ldr r3, [r3, #24] +6711:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** { + 3927 .loc 1 6711 6 view .LVU1193 + 3928 0008 002B cmp r3, #0 + 3929 000a 02D1 bne .L203 +6713:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** } + 3930 .loc 1 6713 5 is_stmt 1 view .LVU1194 +6713:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** } + 3931 .loc 1 6713 17 is_stmt 0 view .LVU1195 + 3932 000c 3D33 adds r3, r3, #61 + 3933 000e 0122 movs r2, #1 + 3934 0010 C254 strb r2, [r0, r3] + 3935 .L203: +6719:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** #endif /* USE_HAL_TIM_REGISTER_CALLBACKS */ + 3936 .loc 1 6719 3 is_stmt 1 view .LVU1196 + 3937 0012 FFF7FEFF bl HAL_TIM_PeriodElapsedCallback + 3938 .LVL319: +6721:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 3939 .loc 1 6721 1 is_stmt 0 view .LVU1197 + 3940 @ sp needed + 3941 0016 10BD pop {r4, pc} + 3942 .cfi_endproc + 3943 .LFE140: + 3945 .section .text.HAL_TIM_PeriodElapsedHalfCpltCallback,"ax",%progbits + 3946 .align 1 + 3947 .weak HAL_TIM_PeriodElapsedHalfCpltCallback + 3948 .syntax unified + 3949 .code 16 + 3950 .thumb_func + 3952 HAL_TIM_PeriodElapsedHalfCpltCallback: + 3953 .LVL320: + 3954 .LFB117: + ARM GAS /tmp/ccMtK8ce.s page 216 + + +5678:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** /* Prevent unused argument(s) compilation warning */ + 3955 .loc 1 5678 1 is_stmt 1 view -0 + 3956 .cfi_startproc + 3957 @ args = 0, pretend = 0, frame = 0 + 3958 @ frame_needed = 0, uses_anonymous_args = 0 + 3959 @ link register save eliminated. +5680:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 3960 .loc 1 5680 3 view .LVU1199 +5685:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 3961 .loc 1 5685 1 is_stmt 0 view .LVU1200 + 3962 @ sp needed + 3963 0000 7047 bx lr + 3964 .cfi_endproc + 3965 .LFE117: + 3967 .section .text.TIM_DMAPeriodElapsedHalfCplt,"ax",%progbits + 3968 .align 1 + 3969 .syntax unified + 3970 .code 16 + 3971 .thumb_func + 3973 TIM_DMAPeriodElapsedHalfCplt: + 3974 .LVL321: + 3975 .LFB141: +6729:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** TIM_HandleTypeDef *htim = (TIM_HandleTypeDef *)((DMA_HandleTypeDef *)hdma)->Parent; + 3976 .loc 1 6729 1 is_stmt 1 view -0 + 3977 .cfi_startproc + 3978 @ args = 0, pretend = 0, frame = 0 + 3979 @ frame_needed = 0, uses_anonymous_args = 0 +6729:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** TIM_HandleTypeDef *htim = (TIM_HandleTypeDef *)((DMA_HandleTypeDef *)hdma)->Parent; + 3980 .loc 1 6729 1 is_stmt 0 view .LVU1202 + 3981 0000 10B5 push {r4, lr} + 3982 .cfi_def_cfa_offset 8 + 3983 .cfi_offset 4, -8 + 3984 .cfi_offset 14, -4 +6730:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 3985 .loc 1 6730 3 is_stmt 1 view .LVU1203 +6730:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 3986 .loc 1 6730 22 is_stmt 0 view .LVU1204 + 3987 0002 406A ldr r0, [r0, #36] + 3988 .LVL322: +6735:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** #endif /* USE_HAL_TIM_REGISTER_CALLBACKS */ + 3989 .loc 1 6735 3 is_stmt 1 view .LVU1205 + 3990 0004 FFF7FEFF bl HAL_TIM_PeriodElapsedHalfCpltCallback + 3991 .LVL323: +6737:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 3992 .loc 1 6737 1 is_stmt 0 view .LVU1206 + 3993 @ sp needed + 3994 0008 10BD pop {r4, pc} + 3995 .cfi_endproc + 3996 .LFE141: + 3998 .section .text.HAL_TIM_OC_DelayElapsedCallback,"ax",%progbits + 3999 .align 1 + 4000 .weak HAL_TIM_OC_DelayElapsedCallback + 4001 .syntax unified + 4002 .code 16 + 4003 .thumb_func + 4005 HAL_TIM_OC_DelayElapsedCallback: + 4006 .LVL324: + ARM GAS /tmp/ccMtK8ce.s page 217 + + + 4007 .LFB118: +5693:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** /* Prevent unused argument(s) compilation warning */ + 4008 .loc 1 5693 1 is_stmt 1 view -0 + 4009 .cfi_startproc + 4010 @ args = 0, pretend = 0, frame = 0 + 4011 @ frame_needed = 0, uses_anonymous_args = 0 + 4012 @ link register save eliminated. +5695:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 4013 .loc 1 5695 3 view .LVU1208 +5700:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 4014 .loc 1 5700 1 is_stmt 0 view .LVU1209 + 4015 @ sp needed + 4016 0000 7047 bx lr + 4017 .cfi_endproc + 4018 .LFE118: + 4020 .section .text.HAL_TIM_IC_CaptureCallback,"ax",%progbits + 4021 .align 1 + 4022 .weak HAL_TIM_IC_CaptureCallback + 4023 .syntax unified + 4024 .code 16 + 4025 .thumb_func + 4027 HAL_TIM_IC_CaptureCallback: + 4028 .LVL325: + 4029 .LFB119: +5708:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** /* Prevent unused argument(s) compilation warning */ + 4030 .loc 1 5708 1 is_stmt 1 view -0 + 4031 .cfi_startproc + 4032 @ args = 0, pretend = 0, frame = 0 + 4033 @ frame_needed = 0, uses_anonymous_args = 0 + 4034 @ link register save eliminated. +5710:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 4035 .loc 1 5710 3 view .LVU1211 +5715:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 4036 .loc 1 5715 1 is_stmt 0 view .LVU1212 + 4037 @ sp needed + 4038 0000 7047 bx lr + 4039 .cfi_endproc + 4040 .LFE119: + 4042 .section .text.TIM_DMACaptureCplt,"ax",%progbits + 4043 .align 1 + 4044 .global TIM_DMACaptureCplt + 4045 .syntax unified + 4046 .code 16 + 4047 .thumb_func + 4049 TIM_DMACaptureCplt: + 4050 .LVL326: + 4051 .LFB138: +6606:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** TIM_HandleTypeDef *htim = (TIM_HandleTypeDef *)((DMA_HandleTypeDef *)hdma)->Parent; + 4052 .loc 1 6606 1 is_stmt 1 view -0 + 4053 .cfi_startproc + 4054 @ args = 0, pretend = 0, frame = 0 + 4055 @ frame_needed = 0, uses_anonymous_args = 0 +6606:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** TIM_HandleTypeDef *htim = (TIM_HandleTypeDef *)((DMA_HandleTypeDef *)hdma)->Parent; + 4056 .loc 1 6606 1 is_stmt 0 view .LVU1214 + 4057 0000 10B5 push {r4, lr} + 4058 .cfi_def_cfa_offset 8 + 4059 .cfi_offset 4, -8 + ARM GAS /tmp/ccMtK8ce.s page 218 + + + 4060 .cfi_offset 14, -4 +6607:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 4061 .loc 1 6607 3 is_stmt 1 view .LVU1215 +6607:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 4062 .loc 1 6607 22 is_stmt 0 view .LVU1216 + 4063 0002 446A ldr r4, [r0, #36] + 4064 .LVL327: +6609:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** { + 4065 .loc 1 6609 3 is_stmt 1 view .LVU1217 +6609:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** { + 4066 .loc 1 6609 25 is_stmt 0 view .LVU1218 + 4067 0004 636A ldr r3, [r4, #36] +6609:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** { + 4068 .loc 1 6609 6 view .LVU1219 + 4069 0006 8342 cmp r3, r0 + 4070 0008 0ED0 beq .L213 +6619:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** { + 4071 .loc 1 6619 8 is_stmt 1 view .LVU1220 +6619:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** { + 4072 .loc 1 6619 30 is_stmt 0 view .LVU1221 + 4073 000a A36A ldr r3, [r4, #40] +6619:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** { + 4074 .loc 1 6619 11 view .LVU1222 + 4075 000c 8342 cmp r3, r0 + 4076 000e 16D0 beq .L214 +6629:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** { + 4077 .loc 1 6629 8 is_stmt 1 view .LVU1223 +6629:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** { + 4078 .loc 1 6629 30 is_stmt 0 view .LVU1224 + 4079 0010 E36A ldr r3, [r4, #44] +6629:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** { + 4080 .loc 1 6629 11 view .LVU1225 + 4081 0012 8342 cmp r3, r0 + 4082 0014 1ED0 beq .L215 +6639:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** { + 4083 .loc 1 6639 8 is_stmt 1 view .LVU1226 +6639:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** { + 4084 .loc 1 6639 30 is_stmt 0 view .LVU1227 + 4085 0016 236B ldr r3, [r4, #48] +6639:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** { + 4086 .loc 1 6639 11 view .LVU1228 + 4087 0018 8342 cmp r3, r0 + 4088 001a 26D0 beq .L216 + 4089 .L210: +6652:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 4090 .loc 1 6652 3 is_stmt 1 view .LVU1229 +6657:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** #endif /* USE_HAL_TIM_REGISTER_CALLBACKS */ + 4091 .loc 1 6657 3 view .LVU1230 + 4092 001c 2000 movs r0, r4 + 4093 .LVL328: +6657:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** #endif /* USE_HAL_TIM_REGISTER_CALLBACKS */ + 4094 .loc 1 6657 3 is_stmt 0 view .LVU1231 + 4095 001e FFF7FEFF bl HAL_TIM_IC_CaptureCallback + 4096 .LVL329: +6660:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** } + 4097 .loc 1 6660 3 is_stmt 1 view .LVU1232 +6660:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** } + ARM GAS /tmp/ccMtK8ce.s page 219 + + + 4098 .loc 1 6660 17 is_stmt 0 view .LVU1233 + 4099 0022 0023 movs r3, #0 + 4100 0024 2377 strb r3, [r4, #28] +6661:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 4101 .loc 1 6661 1 view .LVU1234 + 4102 @ sp needed + 4103 .LVL330: +6661:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 4104 .loc 1 6661 1 view .LVU1235 + 4105 0026 10BD pop {r4, pc} + 4106 .LVL331: + 4107 .L213: +6611:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 4108 .loc 1 6611 5 is_stmt 1 view .LVU1236 +6611:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 4109 .loc 1 6611 19 is_stmt 0 view .LVU1237 + 4110 0028 0123 movs r3, #1 + 4111 002a 2377 strb r3, [r4, #28] +6613:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** { + 4112 .loc 1 6613 5 is_stmt 1 view .LVU1238 +6613:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** { + 4113 .loc 1 6613 19 is_stmt 0 view .LVU1239 + 4114 002c 8369 ldr r3, [r0, #24] +6613:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** { + 4115 .loc 1 6613 8 view .LVU1240 + 4116 002e 002B cmp r3, #0 + 4117 0030 F4D1 bne .L210 +6615:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** TIM_CHANNEL_N_STATE_SET(htim, TIM_CHANNEL_1, HAL_TIM_CHANNEL_STATE_READY); + 4118 .loc 1 6615 7 is_stmt 1 view .LVU1241 + 4119 0032 0133 adds r3, r3, #1 + 4120 0034 3E22 movs r2, #62 + 4121 0036 A354 strb r3, [r4, r2] +6616:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** } + 4122 .loc 1 6616 7 view .LVU1242 + 4123 0038 0432 adds r2, r2, #4 + 4124 003a A354 strb r3, [r4, r2] + 4125 003c EEE7 b .L210 + 4126 .L214: +6621:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 4127 .loc 1 6621 5 view .LVU1243 +6621:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 4128 .loc 1 6621 19 is_stmt 0 view .LVU1244 + 4129 003e 0223 movs r3, #2 + 4130 0040 2377 strb r3, [r4, #28] +6623:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** { + 4131 .loc 1 6623 5 is_stmt 1 view .LVU1245 +6623:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** { + 4132 .loc 1 6623 19 is_stmt 0 view .LVU1246 + 4133 0042 8369 ldr r3, [r0, #24] +6623:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** { + 4134 .loc 1 6623 8 view .LVU1247 + 4135 0044 002B cmp r3, #0 + 4136 0046 E9D1 bne .L210 +6625:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** TIM_CHANNEL_N_STATE_SET(htim, TIM_CHANNEL_2, HAL_TIM_CHANNEL_STATE_READY); + 4137 .loc 1 6625 7 is_stmt 1 view .LVU1248 + 4138 0048 0133 adds r3, r3, #1 + 4139 004a 3F22 movs r2, #63 + ARM GAS /tmp/ccMtK8ce.s page 220 + + + 4140 004c A354 strb r3, [r4, r2] +6626:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** } + 4141 .loc 1 6626 7 view .LVU1249 + 4142 004e 0432 adds r2, r2, #4 + 4143 0050 A354 strb r3, [r4, r2] + 4144 0052 E3E7 b .L210 + 4145 .L215: +6631:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 4146 .loc 1 6631 5 view .LVU1250 +6631:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 4147 .loc 1 6631 19 is_stmt 0 view .LVU1251 + 4148 0054 0423 movs r3, #4 + 4149 0056 2377 strb r3, [r4, #28] +6633:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** { + 4150 .loc 1 6633 5 is_stmt 1 view .LVU1252 +6633:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** { + 4151 .loc 1 6633 19 is_stmt 0 view .LVU1253 + 4152 0058 8369 ldr r3, [r0, #24] +6633:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** { + 4153 .loc 1 6633 8 view .LVU1254 + 4154 005a 002B cmp r3, #0 + 4155 005c DED1 bne .L210 +6635:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** TIM_CHANNEL_N_STATE_SET(htim, TIM_CHANNEL_3, HAL_TIM_CHANNEL_STATE_READY); + 4156 .loc 1 6635 7 is_stmt 1 view .LVU1255 + 4157 005e 0133 adds r3, r3, #1 + 4158 0060 4022 movs r2, #64 + 4159 0062 A354 strb r3, [r4, r2] +6636:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** } + 4160 .loc 1 6636 7 view .LVU1256 + 4161 0064 0432 adds r2, r2, #4 + 4162 0066 A354 strb r3, [r4, r2] + 4163 0068 D8E7 b .L210 + 4164 .L216: +6641:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 4165 .loc 1 6641 5 view .LVU1257 +6641:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 4166 .loc 1 6641 19 is_stmt 0 view .LVU1258 + 4167 006a 0823 movs r3, #8 + 4168 006c 2377 strb r3, [r4, #28] +6643:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** { + 4169 .loc 1 6643 5 is_stmt 1 view .LVU1259 +6643:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** { + 4170 .loc 1 6643 19 is_stmt 0 view .LVU1260 + 4171 006e 8369 ldr r3, [r0, #24] +6643:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** { + 4172 .loc 1 6643 8 view .LVU1261 + 4173 0070 002B cmp r3, #0 + 4174 0072 D3D1 bne .L210 +6645:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** TIM_CHANNEL_N_STATE_SET(htim, TIM_CHANNEL_4, HAL_TIM_CHANNEL_STATE_READY); + 4175 .loc 1 6645 7 is_stmt 1 view .LVU1262 + 4176 0074 0133 adds r3, r3, #1 + 4177 0076 4122 movs r2, #65 + 4178 0078 A354 strb r3, [r4, r2] +6646:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** } + 4179 .loc 1 6646 7 view .LVU1263 + 4180 007a 0432 adds r2, r2, #4 + 4181 007c A354 strb r3, [r4, r2] + ARM GAS /tmp/ccMtK8ce.s page 221 + + + 4182 007e CDE7 b .L210 + 4183 .cfi_endproc + 4184 .LFE138: + 4186 .section .text.HAL_TIM_IC_CaptureHalfCpltCallback,"ax",%progbits + 4187 .align 1 + 4188 .weak HAL_TIM_IC_CaptureHalfCpltCallback + 4189 .syntax unified + 4190 .code 16 + 4191 .thumb_func + 4193 HAL_TIM_IC_CaptureHalfCpltCallback: + 4194 .LVL332: + 4195 .LFB120: +5723:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** /* Prevent unused argument(s) compilation warning */ + 4196 .loc 1 5723 1 view -0 + 4197 .cfi_startproc + 4198 @ args = 0, pretend = 0, frame = 0 + 4199 @ frame_needed = 0, uses_anonymous_args = 0 + 4200 @ link register save eliminated. +5725:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 4201 .loc 1 5725 3 view .LVU1265 +5730:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 4202 .loc 1 5730 1 is_stmt 0 view .LVU1266 + 4203 @ sp needed + 4204 0000 7047 bx lr + 4205 .cfi_endproc + 4206 .LFE120: + 4208 .section .text.TIM_DMACaptureHalfCplt,"ax",%progbits + 4209 .align 1 + 4210 .global TIM_DMACaptureHalfCplt + 4211 .syntax unified + 4212 .code 16 + 4213 .thumb_func + 4215 TIM_DMACaptureHalfCplt: + 4216 .LVL333: + 4217 .LFB139: +6669:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** TIM_HandleTypeDef *htim = (TIM_HandleTypeDef *)((DMA_HandleTypeDef *)hdma)->Parent; + 4218 .loc 1 6669 1 is_stmt 1 view -0 + 4219 .cfi_startproc + 4220 @ args = 0, pretend = 0, frame = 0 + 4221 @ frame_needed = 0, uses_anonymous_args = 0 +6669:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** TIM_HandleTypeDef *htim = (TIM_HandleTypeDef *)((DMA_HandleTypeDef *)hdma)->Parent; + 4222 .loc 1 6669 1 is_stmt 0 view .LVU1268 + 4223 0000 10B5 push {r4, lr} + 4224 .cfi_def_cfa_offset 8 + 4225 .cfi_offset 4, -8 + 4226 .cfi_offset 14, -4 +6670:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 4227 .loc 1 6670 3 is_stmt 1 view .LVU1269 +6670:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 4228 .loc 1 6670 22 is_stmt 0 view .LVU1270 + 4229 0002 446A ldr r4, [r0, #36] + 4230 .LVL334: +6672:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** { + 4231 .loc 1 6672 3 is_stmt 1 view .LVU1271 +6672:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** { + 4232 .loc 1 6672 25 is_stmt 0 view .LVU1272 + 4233 0004 636A ldr r3, [r4, #36] + ARM GAS /tmp/ccMtK8ce.s page 222 + + +6672:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** { + 4234 .loc 1 6672 6 view .LVU1273 + 4235 0006 8342 cmp r3, r0 + 4236 0008 0BD0 beq .L223 +6676:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** { + 4237 .loc 1 6676 8 is_stmt 1 view .LVU1274 +6676:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** { + 4238 .loc 1 6676 30 is_stmt 0 view .LVU1275 + 4239 000a A36A ldr r3, [r4, #40] +6676:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** { + 4240 .loc 1 6676 11 view .LVU1276 + 4241 000c 8342 cmp r3, r0 + 4242 000e 10D0 beq .L224 +6680:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** { + 4243 .loc 1 6680 8 is_stmt 1 view .LVU1277 +6680:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** { + 4244 .loc 1 6680 30 is_stmt 0 view .LVU1278 + 4245 0010 E36A ldr r3, [r4, #44] +6680:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** { + 4246 .loc 1 6680 11 view .LVU1279 + 4247 0012 8342 cmp r3, r0 + 4248 0014 10D0 beq .L225 +6684:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** { + 4249 .loc 1 6684 8 is_stmt 1 view .LVU1280 +6684:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** { + 4250 .loc 1 6684 30 is_stmt 0 view .LVU1281 + 4251 0016 236B ldr r3, [r4, #48] +6684:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** { + 4252 .loc 1 6684 11 view .LVU1282 + 4253 0018 8342 cmp r3, r0 + 4254 001a 04D1 bne .L220 +6686:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** } + 4255 .loc 1 6686 5 is_stmt 1 view .LVU1283 +6686:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** } + 4256 .loc 1 6686 19 is_stmt 0 view .LVU1284 + 4257 001c 0823 movs r3, #8 + 4258 001e 2377 strb r3, [r4, #28] + 4259 0020 01E0 b .L220 + 4260 .L223: +6674:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** } + 4261 .loc 1 6674 5 is_stmt 1 view .LVU1285 +6674:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** } + 4262 .loc 1 6674 19 is_stmt 0 view .LVU1286 + 4263 0022 0123 movs r3, #1 + 4264 0024 2377 strb r3, [r4, #28] + 4265 .L220: +6691:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 4266 .loc 1 6691 3 is_stmt 1 view .LVU1287 +6696:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** #endif /* USE_HAL_TIM_REGISTER_CALLBACKS */ + 4267 .loc 1 6696 3 view .LVU1288 + 4268 0026 2000 movs r0, r4 + 4269 .LVL335: +6696:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** #endif /* USE_HAL_TIM_REGISTER_CALLBACKS */ + 4270 .loc 1 6696 3 is_stmt 0 view .LVU1289 + 4271 0028 FFF7FEFF bl HAL_TIM_IC_CaptureHalfCpltCallback + 4272 .LVL336: +6699:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** } + ARM GAS /tmp/ccMtK8ce.s page 223 + + + 4273 .loc 1 6699 3 is_stmt 1 view .LVU1290 +6699:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** } + 4274 .loc 1 6699 17 is_stmt 0 view .LVU1291 + 4275 002c 0023 movs r3, #0 + 4276 002e 2377 strb r3, [r4, #28] +6700:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 4277 .loc 1 6700 1 view .LVU1292 + 4278 @ sp needed + 4279 .LVL337: +6700:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 4280 .loc 1 6700 1 view .LVU1293 + 4281 0030 10BD pop {r4, pc} + 4282 .LVL338: + 4283 .L224: +6678:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** } + 4284 .loc 1 6678 5 is_stmt 1 view .LVU1294 +6678:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** } + 4285 .loc 1 6678 19 is_stmt 0 view .LVU1295 + 4286 0032 0223 movs r3, #2 + 4287 0034 2377 strb r3, [r4, #28] + 4288 0036 F6E7 b .L220 + 4289 .L225: +6682:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** } + 4290 .loc 1 6682 5 is_stmt 1 view .LVU1296 +6682:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** } + 4291 .loc 1 6682 19 is_stmt 0 view .LVU1297 + 4292 0038 0423 movs r3, #4 + 4293 003a 2377 strb r3, [r4, #28] + 4294 003c F3E7 b .L220 + 4295 .cfi_endproc + 4296 .LFE139: + 4298 .section .text.HAL_TIM_PWM_PulseFinishedCallback,"ax",%progbits + 4299 .align 1 + 4300 .weak HAL_TIM_PWM_PulseFinishedCallback + 4301 .syntax unified + 4302 .code 16 + 4303 .thumb_func + 4305 HAL_TIM_PWM_PulseFinishedCallback: + 4306 .LVL339: + 4307 .LFB121: +5738:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** /* Prevent unused argument(s) compilation warning */ + 4308 .loc 1 5738 1 is_stmt 1 view -0 + 4309 .cfi_startproc + 4310 @ args = 0, pretend = 0, frame = 0 + 4311 @ frame_needed = 0, uses_anonymous_args = 0 + 4312 @ link register save eliminated. +5740:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 4313 .loc 1 5740 3 view .LVU1299 +5745:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 4314 .loc 1 5745 1 is_stmt 0 view .LVU1300 + 4315 @ sp needed + 4316 0000 7047 bx lr + 4317 .cfi_endproc + 4318 .LFE121: + 4320 .section .text.TIM_DMADelayPulseCplt,"ax",%progbits + 4321 .align 1 + 4322 .syntax unified + ARM GAS /tmp/ccMtK8ce.s page 224 + + + 4323 .code 16 + 4324 .thumb_func + 4326 TIM_DMADelayPulseCplt: + 4327 .LVL340: + 4328 .LFB136: +6508:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** TIM_HandleTypeDef *htim = (TIM_HandleTypeDef *)((DMA_HandleTypeDef *)hdma)->Parent; + 4329 .loc 1 6508 1 is_stmt 1 view -0 + 4330 .cfi_startproc + 4331 @ args = 0, pretend = 0, frame = 0 + 4332 @ frame_needed = 0, uses_anonymous_args = 0 +6508:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** TIM_HandleTypeDef *htim = (TIM_HandleTypeDef *)((DMA_HandleTypeDef *)hdma)->Parent; + 4333 .loc 1 6508 1 is_stmt 0 view .LVU1302 + 4334 0000 10B5 push {r4, lr} + 4335 .cfi_def_cfa_offset 8 + 4336 .cfi_offset 4, -8 + 4337 .cfi_offset 14, -4 +6509:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 4338 .loc 1 6509 3 is_stmt 1 view .LVU1303 +6509:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 4339 .loc 1 6509 22 is_stmt 0 view .LVU1304 + 4340 0002 446A ldr r4, [r0, #36] + 4341 .LVL341: +6511:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** { + 4342 .loc 1 6511 3 is_stmt 1 view .LVU1305 +6511:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** { + 4343 .loc 1 6511 25 is_stmt 0 view .LVU1306 + 4344 0004 636A ldr r3, [r4, #36] +6511:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** { + 4345 .loc 1 6511 6 view .LVU1307 + 4346 0006 8342 cmp r3, r0 + 4347 0008 0ED0 beq .L232 +6520:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** { + 4348 .loc 1 6520 8 is_stmt 1 view .LVU1308 +6520:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** { + 4349 .loc 1 6520 30 is_stmt 0 view .LVU1309 + 4350 000a A36A ldr r3, [r4, #40] +6520:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** { + 4351 .loc 1 6520 11 view .LVU1310 + 4352 000c 8342 cmp r3, r0 + 4353 000e 14D0 beq .L233 +6529:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** { + 4354 .loc 1 6529 8 is_stmt 1 view .LVU1311 +6529:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** { + 4355 .loc 1 6529 30 is_stmt 0 view .LVU1312 + 4356 0010 E36A ldr r3, [r4, #44] +6529:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** { + 4357 .loc 1 6529 11 view .LVU1313 + 4358 0012 8342 cmp r3, r0 + 4359 0014 1AD0 beq .L234 +6538:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** { + 4360 .loc 1 6538 8 is_stmt 1 view .LVU1314 +6538:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** { + 4361 .loc 1 6538 30 is_stmt 0 view .LVU1315 + 4362 0016 236B ldr r3, [r4, #48] +6538:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** { + 4363 .loc 1 6538 11 view .LVU1316 + 4364 0018 8342 cmp r3, r0 + ARM GAS /tmp/ccMtK8ce.s page 225 + + + 4365 001a 20D0 beq .L235 + 4366 .L229: +6550:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 4367 .loc 1 6550 3 is_stmt 1 view .LVU1317 +6555:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** #endif /* USE_HAL_TIM_REGISTER_CALLBACKS */ + 4368 .loc 1 6555 3 view .LVU1318 + 4369 001c 2000 movs r0, r4 + 4370 .LVL342: +6555:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** #endif /* USE_HAL_TIM_REGISTER_CALLBACKS */ + 4371 .loc 1 6555 3 is_stmt 0 view .LVU1319 + 4372 001e FFF7FEFF bl HAL_TIM_PWM_PulseFinishedCallback + 4373 .LVL343: +6558:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** } + 4374 .loc 1 6558 3 is_stmt 1 view .LVU1320 +6558:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** } + 4375 .loc 1 6558 17 is_stmt 0 view .LVU1321 + 4376 0022 0023 movs r3, #0 + 4377 0024 2377 strb r3, [r4, #28] +6559:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 4378 .loc 1 6559 1 view .LVU1322 + 4379 @ sp needed + 4380 .LVL344: +6559:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 4381 .loc 1 6559 1 view .LVU1323 + 4382 0026 10BD pop {r4, pc} + 4383 .LVL345: + 4384 .L232: +6513:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 4385 .loc 1 6513 5 is_stmt 1 view .LVU1324 +6513:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 4386 .loc 1 6513 19 is_stmt 0 view .LVU1325 + 4387 0028 0123 movs r3, #1 + 4388 002a 2377 strb r3, [r4, #28] +6515:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** { + 4389 .loc 1 6515 5 is_stmt 1 view .LVU1326 +6515:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** { + 4390 .loc 1 6515 19 is_stmt 0 view .LVU1327 + 4391 002c 8369 ldr r3, [r0, #24] +6515:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** { + 4392 .loc 1 6515 8 view .LVU1328 + 4393 002e 002B cmp r3, #0 + 4394 0030 F4D1 bne .L229 +6517:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** } + 4395 .loc 1 6517 7 is_stmt 1 view .LVU1329 + 4396 0032 3E33 adds r3, r3, #62 + 4397 0034 0122 movs r2, #1 + 4398 0036 E254 strb r2, [r4, r3] + 4399 0038 F0E7 b .L229 + 4400 .L233: +6522:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 4401 .loc 1 6522 5 view .LVU1330 +6522:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 4402 .loc 1 6522 19 is_stmt 0 view .LVU1331 + 4403 003a 0223 movs r3, #2 + 4404 003c 2377 strb r3, [r4, #28] +6524:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** { + 4405 .loc 1 6524 5 is_stmt 1 view .LVU1332 + ARM GAS /tmp/ccMtK8ce.s page 226 + + +6524:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** { + 4406 .loc 1 6524 19 is_stmt 0 view .LVU1333 + 4407 003e 8369 ldr r3, [r0, #24] +6524:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** { + 4408 .loc 1 6524 8 view .LVU1334 + 4409 0040 002B cmp r3, #0 + 4410 0042 EBD1 bne .L229 +6526:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** } + 4411 .loc 1 6526 7 is_stmt 1 view .LVU1335 + 4412 0044 3F33 adds r3, r3, #63 + 4413 0046 0122 movs r2, #1 + 4414 0048 E254 strb r2, [r4, r3] + 4415 004a E7E7 b .L229 + 4416 .L234: +6531:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 4417 .loc 1 6531 5 view .LVU1336 +6531:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 4418 .loc 1 6531 19 is_stmt 0 view .LVU1337 + 4419 004c 0423 movs r3, #4 + 4420 004e 2377 strb r3, [r4, #28] +6533:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** { + 4421 .loc 1 6533 5 is_stmt 1 view .LVU1338 +6533:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** { + 4422 .loc 1 6533 19 is_stmt 0 view .LVU1339 + 4423 0050 8369 ldr r3, [r0, #24] +6533:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** { + 4424 .loc 1 6533 8 view .LVU1340 + 4425 0052 002B cmp r3, #0 + 4426 0054 E2D1 bne .L229 +6535:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** } + 4427 .loc 1 6535 7 is_stmt 1 view .LVU1341 + 4428 0056 4033 adds r3, r3, #64 + 4429 0058 0122 movs r2, #1 + 4430 005a E254 strb r2, [r4, r3] + 4431 005c DEE7 b .L229 + 4432 .L235: +6540:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 4433 .loc 1 6540 5 view .LVU1342 +6540:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 4434 .loc 1 6540 19 is_stmt 0 view .LVU1343 + 4435 005e 0823 movs r3, #8 + 4436 0060 2377 strb r3, [r4, #28] +6542:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** { + 4437 .loc 1 6542 5 is_stmt 1 view .LVU1344 +6542:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** { + 4438 .loc 1 6542 19 is_stmt 0 view .LVU1345 + 4439 0062 8369 ldr r3, [r0, #24] +6542:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** { + 4440 .loc 1 6542 8 view .LVU1346 + 4441 0064 002B cmp r3, #0 + 4442 0066 D9D1 bne .L229 +6544:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** } + 4443 .loc 1 6544 7 is_stmt 1 view .LVU1347 + 4444 0068 4133 adds r3, r3, #65 + 4445 006a 0122 movs r2, #1 + 4446 006c E254 strb r2, [r4, r3] + 4447 006e D5E7 b .L229 + ARM GAS /tmp/ccMtK8ce.s page 227 + + + 4448 .cfi_endproc + 4449 .LFE136: + 4451 .section .text.HAL_TIM_PWM_PulseFinishedHalfCpltCallback,"ax",%progbits + 4452 .align 1 + 4453 .weak HAL_TIM_PWM_PulseFinishedHalfCpltCallback + 4454 .syntax unified + 4455 .code 16 + 4456 .thumb_func + 4458 HAL_TIM_PWM_PulseFinishedHalfCpltCallback: + 4459 .LVL346: + 4460 .LFB122: +5753:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** /* Prevent unused argument(s) compilation warning */ + 4461 .loc 1 5753 1 view -0 + 4462 .cfi_startproc + 4463 @ args = 0, pretend = 0, frame = 0 + 4464 @ frame_needed = 0, uses_anonymous_args = 0 + 4465 @ link register save eliminated. +5755:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 4466 .loc 1 5755 3 view .LVU1349 +5760:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 4467 .loc 1 5760 1 is_stmt 0 view .LVU1350 + 4468 @ sp needed + 4469 0000 7047 bx lr + 4470 .cfi_endproc + 4471 .LFE122: + 4473 .section .text.TIM_DMADelayPulseHalfCplt,"ax",%progbits + 4474 .align 1 + 4475 .global TIM_DMADelayPulseHalfCplt + 4476 .syntax unified + 4477 .code 16 + 4478 .thumb_func + 4480 TIM_DMADelayPulseHalfCplt: + 4481 .LVL347: + 4482 .LFB137: +6567:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** TIM_HandleTypeDef *htim = (TIM_HandleTypeDef *)((DMA_HandleTypeDef *)hdma)->Parent; + 4483 .loc 1 6567 1 is_stmt 1 view -0 + 4484 .cfi_startproc + 4485 @ args = 0, pretend = 0, frame = 0 + 4486 @ frame_needed = 0, uses_anonymous_args = 0 +6567:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** TIM_HandleTypeDef *htim = (TIM_HandleTypeDef *)((DMA_HandleTypeDef *)hdma)->Parent; + 4487 .loc 1 6567 1 is_stmt 0 view .LVU1352 + 4488 0000 10B5 push {r4, lr} + 4489 .cfi_def_cfa_offset 8 + 4490 .cfi_offset 4, -8 + 4491 .cfi_offset 14, -4 +6568:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 4492 .loc 1 6568 3 is_stmt 1 view .LVU1353 +6568:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 4493 .loc 1 6568 22 is_stmt 0 view .LVU1354 + 4494 0002 446A ldr r4, [r0, #36] + 4495 .LVL348: +6570:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** { + 4496 .loc 1 6570 3 is_stmt 1 view .LVU1355 +6570:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** { + 4497 .loc 1 6570 25 is_stmt 0 view .LVU1356 + 4498 0004 636A ldr r3, [r4, #36] +6570:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** { + ARM GAS /tmp/ccMtK8ce.s page 228 + + + 4499 .loc 1 6570 6 view .LVU1357 + 4500 0006 8342 cmp r3, r0 + 4501 0008 0BD0 beq .L242 +6574:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** { + 4502 .loc 1 6574 8 is_stmt 1 view .LVU1358 +6574:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** { + 4503 .loc 1 6574 30 is_stmt 0 view .LVU1359 + 4504 000a A36A ldr r3, [r4, #40] +6574:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** { + 4505 .loc 1 6574 11 view .LVU1360 + 4506 000c 8342 cmp r3, r0 + 4507 000e 10D0 beq .L243 +6578:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** { + 4508 .loc 1 6578 8 is_stmt 1 view .LVU1361 +6578:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** { + 4509 .loc 1 6578 30 is_stmt 0 view .LVU1362 + 4510 0010 E36A ldr r3, [r4, #44] +6578:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** { + 4511 .loc 1 6578 11 view .LVU1363 + 4512 0012 8342 cmp r3, r0 + 4513 0014 10D0 beq .L244 +6582:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** { + 4514 .loc 1 6582 8 is_stmt 1 view .LVU1364 +6582:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** { + 4515 .loc 1 6582 30 is_stmt 0 view .LVU1365 + 4516 0016 236B ldr r3, [r4, #48] +6582:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** { + 4517 .loc 1 6582 11 view .LVU1366 + 4518 0018 8342 cmp r3, r0 + 4519 001a 04D1 bne .L239 +6584:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** } + 4520 .loc 1 6584 5 is_stmt 1 view .LVU1367 +6584:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** } + 4521 .loc 1 6584 19 is_stmt 0 view .LVU1368 + 4522 001c 0823 movs r3, #8 + 4523 001e 2377 strb r3, [r4, #28] + 4524 0020 01E0 b .L239 + 4525 .L242: +6572:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** } + 4526 .loc 1 6572 5 is_stmt 1 view .LVU1369 +6572:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** } + 4527 .loc 1 6572 19 is_stmt 0 view .LVU1370 + 4528 0022 0123 movs r3, #1 + 4529 0024 2377 strb r3, [r4, #28] + 4530 .L239: +6589:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 4531 .loc 1 6589 3 is_stmt 1 view .LVU1371 +6594:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** #endif /* USE_HAL_TIM_REGISTER_CALLBACKS */ + 4532 .loc 1 6594 3 view .LVU1372 + 4533 0026 2000 movs r0, r4 + 4534 .LVL349: +6594:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** #endif /* USE_HAL_TIM_REGISTER_CALLBACKS */ + 4535 .loc 1 6594 3 is_stmt 0 view .LVU1373 + 4536 0028 FFF7FEFF bl HAL_TIM_PWM_PulseFinishedHalfCpltCallback + 4537 .LVL350: +6597:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** } + 4538 .loc 1 6597 3 is_stmt 1 view .LVU1374 + ARM GAS /tmp/ccMtK8ce.s page 229 + + +6597:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** } + 4539 .loc 1 6597 17 is_stmt 0 view .LVU1375 + 4540 002c 0023 movs r3, #0 + 4541 002e 2377 strb r3, [r4, #28] +6598:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 4542 .loc 1 6598 1 view .LVU1376 + 4543 @ sp needed + 4544 .LVL351: +6598:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 4545 .loc 1 6598 1 view .LVU1377 + 4546 0030 10BD pop {r4, pc} + 4547 .LVL352: + 4548 .L243: +6576:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** } + 4549 .loc 1 6576 5 is_stmt 1 view .LVU1378 +6576:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** } + 4550 .loc 1 6576 19 is_stmt 0 view .LVU1379 + 4551 0032 0223 movs r3, #2 + 4552 0034 2377 strb r3, [r4, #28] + 4553 0036 F6E7 b .L239 + 4554 .L244: +6580:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** } + 4555 .loc 1 6580 5 is_stmt 1 view .LVU1380 +6580:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** } + 4556 .loc 1 6580 19 is_stmt 0 view .LVU1381 + 4557 0038 0423 movs r3, #4 + 4558 003a 2377 strb r3, [r4, #28] + 4559 003c F3E7 b .L239 + 4560 .cfi_endproc + 4561 .LFE137: + 4563 .section .text.HAL_TIM_TriggerCallback,"ax",%progbits + 4564 .align 1 + 4565 .weak HAL_TIM_TriggerCallback + 4566 .syntax unified + 4567 .code 16 + 4568 .thumb_func + 4570 HAL_TIM_TriggerCallback: + 4571 .LVL353: + 4572 .LFB123: +5768:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** /* Prevent unused argument(s) compilation warning */ + 4573 .loc 1 5768 1 is_stmt 1 view -0 + 4574 .cfi_startproc + 4575 @ args = 0, pretend = 0, frame = 0 + 4576 @ frame_needed = 0, uses_anonymous_args = 0 + 4577 @ link register save eliminated. +5770:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 4578 .loc 1 5770 3 view .LVU1383 +5775:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 4579 .loc 1 5775 1 is_stmt 0 view .LVU1384 + 4580 @ sp needed + 4581 0000 7047 bx lr + 4582 .cfi_endproc + 4583 .LFE123: + 4585 .section .text.HAL_TIM_IRQHandler,"ax",%progbits + 4586 .align 1 + 4587 .global HAL_TIM_IRQHandler + 4588 .syntax unified + ARM GAS /tmp/ccMtK8ce.s page 230 + + + 4589 .code 16 + 4590 .thumb_func + 4592 HAL_TIM_IRQHandler: + 4593 .LVL354: + 4594 .LFB98: +3824:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** /* Capture compare 1 event */ + 4595 .loc 1 3824 1 is_stmt 1 view -0 + 4596 .cfi_startproc + 4597 @ args = 0, pretend = 0, frame = 0 + 4598 @ frame_needed = 0, uses_anonymous_args = 0 +3824:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** /* Capture compare 1 event */ + 4599 .loc 1 3824 1 is_stmt 0 view .LVU1386 + 4600 0000 10B5 push {r4, lr} + 4601 .cfi_def_cfa_offset 8 + 4602 .cfi_offset 4, -8 + 4603 .cfi_offset 14, -4 + 4604 0002 0400 movs r4, r0 +3826:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** { + 4605 .loc 1 3826 3 is_stmt 1 view .LVU1387 +3826:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** { + 4606 .loc 1 3826 7 is_stmt 0 view .LVU1388 + 4607 0004 0268 ldr r2, [r0] + 4608 0006 1369 ldr r3, [r2, #16] +3826:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** { + 4609 .loc 1 3826 6 view .LVU1389 + 4610 0008 9B07 lsls r3, r3, #30 + 4611 000a 0FD5 bpl .L247 +3828:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** { + 4612 .loc 1 3828 5 is_stmt 1 view .LVU1390 +3828:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** { + 4613 .loc 1 3828 9 is_stmt 0 view .LVU1391 + 4614 000c D368 ldr r3, [r2, #12] +3828:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** { + 4615 .loc 1 3828 8 view .LVU1392 + 4616 000e 9B07 lsls r3, r3, #30 + 4617 0010 0CD5 bpl .L247 +3831:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** htim->Channel = HAL_TIM_ACTIVE_CHANNEL_1; + 4618 .loc 1 3831 9 is_stmt 1 view .LVU1393 + 4619 0012 0323 movs r3, #3 + 4620 0014 5B42 rsbs r3, r3, #0 + 4621 0016 1361 str r3, [r2, #16] +3832:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 4622 .loc 1 3832 9 view .LVU1394 +3832:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 4623 .loc 1 3832 23 is_stmt 0 view .LVU1395 + 4624 0018 0433 adds r3, r3, #4 + 4625 001a 0377 strb r3, [r0, #28] +3835:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** { + 4626 .loc 1 3835 9 is_stmt 1 view .LVU1396 +3835:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** { + 4627 .loc 1 3835 18 is_stmt 0 view .LVU1397 + 4628 001c 0368 ldr r3, [r0] +3835:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** { + 4629 .loc 1 3835 28 view .LVU1398 + 4630 001e 9B69 ldr r3, [r3, #24] +3835:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** { + 4631 .loc 1 3835 12 view .LVU1399 + ARM GAS /tmp/ccMtK8ce.s page 231 + + + 4632 0020 9B07 lsls r3, r3, #30 + 4633 0022 63D0 beq .L248 +3840:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** #endif /* USE_HAL_TIM_REGISTER_CALLBACKS */ + 4634 .loc 1 3840 11 is_stmt 1 view .LVU1400 + 4635 0024 FFF7FEFF bl HAL_TIM_IC_CaptureCallback + 4636 .LVL355: + 4637 .L249: +3854:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** } + 4638 .loc 1 3854 9 view .LVU1401 +3854:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** } + 4639 .loc 1 3854 23 is_stmt 0 view .LVU1402 + 4640 0028 0023 movs r3, #0 + 4641 002a 2377 strb r3, [r4, #28] + 4642 .L247: +3859:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** { + 4643 .loc 1 3859 3 is_stmt 1 view .LVU1403 +3859:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** { + 4644 .loc 1 3859 7 is_stmt 0 view .LVU1404 + 4645 002c 2268 ldr r2, [r4] + 4646 002e 1369 ldr r3, [r2, #16] +3859:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** { + 4647 .loc 1 3859 6 view .LVU1405 + 4648 0030 5B07 lsls r3, r3, #29 + 4649 0032 12D5 bpl .L250 +3861:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** { + 4650 .loc 1 3861 5 is_stmt 1 view .LVU1406 +3861:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** { + 4651 .loc 1 3861 9 is_stmt 0 view .LVU1407 + 4652 0034 D368 ldr r3, [r2, #12] +3861:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** { + 4653 .loc 1 3861 8 view .LVU1408 + 4654 0036 5B07 lsls r3, r3, #29 + 4655 0038 0FD5 bpl .L250 +3863:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** htim->Channel = HAL_TIM_ACTIVE_CHANNEL_2; + 4656 .loc 1 3863 7 is_stmt 1 view .LVU1409 + 4657 003a 0523 movs r3, #5 + 4658 003c 5B42 rsbs r3, r3, #0 + 4659 003e 1361 str r3, [r2, #16] +3864:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** /* Input capture event */ + 4660 .loc 1 3864 7 view .LVU1410 +3864:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** /* Input capture event */ + 4661 .loc 1 3864 21 is_stmt 0 view .LVU1411 + 4662 0040 0733 adds r3, r3, #7 + 4663 0042 2377 strb r3, [r4, #28] +3866:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** { + 4664 .loc 1 3866 7 is_stmt 1 view .LVU1412 +3866:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** { + 4665 .loc 1 3866 16 is_stmt 0 view .LVU1413 + 4666 0044 2368 ldr r3, [r4] +3866:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** { + 4667 .loc 1 3866 26 view .LVU1414 + 4668 0046 9A69 ldr r2, [r3, #24] +3866:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** { + 4669 .loc 1 3866 34 view .LVU1415 + 4670 0048 C023 movs r3, #192 + 4671 004a 9B00 lsls r3, r3, #2 +3866:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** { + ARM GAS /tmp/ccMtK8ce.s page 232 + + + 4672 .loc 1 3866 10 view .LVU1416 + 4673 004c 1A42 tst r2, r3 + 4674 004e 53D0 beq .L251 +3871:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** #endif /* USE_HAL_TIM_REGISTER_CALLBACKS */ + 4675 .loc 1 3871 9 is_stmt 1 view .LVU1417 + 4676 0050 2000 movs r0, r4 + 4677 0052 FFF7FEFF bl HAL_TIM_IC_CaptureCallback + 4678 .LVL356: + 4679 .L252: +3885:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** } + 4680 .loc 1 3885 7 view .LVU1418 +3885:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** } + 4681 .loc 1 3885 21 is_stmt 0 view .LVU1419 + 4682 0056 0023 movs r3, #0 + 4683 0058 2377 strb r3, [r4, #28] + 4684 .L250: +3889:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** { + 4685 .loc 1 3889 3 is_stmt 1 view .LVU1420 +3889:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** { + 4686 .loc 1 3889 7 is_stmt 0 view .LVU1421 + 4687 005a 2268 ldr r2, [r4] + 4688 005c 1369 ldr r3, [r2, #16] +3889:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** { + 4689 .loc 1 3889 6 view .LVU1422 + 4690 005e 1B07 lsls r3, r3, #28 + 4691 0060 10D5 bpl .L253 +3891:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** { + 4692 .loc 1 3891 5 is_stmt 1 view .LVU1423 +3891:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** { + 4693 .loc 1 3891 9 is_stmt 0 view .LVU1424 + 4694 0062 D368 ldr r3, [r2, #12] +3891:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** { + 4695 .loc 1 3891 8 view .LVU1425 + 4696 0064 1B07 lsls r3, r3, #28 + 4697 0066 0DD5 bpl .L253 +3893:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** htim->Channel = HAL_TIM_ACTIVE_CHANNEL_3; + 4698 .loc 1 3893 7 is_stmt 1 view .LVU1426 + 4699 0068 0923 movs r3, #9 + 4700 006a 5B42 rsbs r3, r3, #0 + 4701 006c 1361 str r3, [r2, #16] +3894:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** /* Input capture event */ + 4702 .loc 1 3894 7 view .LVU1427 +3894:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** /* Input capture event */ + 4703 .loc 1 3894 21 is_stmt 0 view .LVU1428 + 4704 006e 0D33 adds r3, r3, #13 + 4705 0070 2377 strb r3, [r4, #28] +3896:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** { + 4706 .loc 1 3896 7 is_stmt 1 view .LVU1429 +3896:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** { + 4707 .loc 1 3896 16 is_stmt 0 view .LVU1430 + 4708 0072 2368 ldr r3, [r4] +3896:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** { + 4709 .loc 1 3896 26 view .LVU1431 + 4710 0074 DB69 ldr r3, [r3, #28] +3896:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** { + 4711 .loc 1 3896 10 view .LVU1432 + 4712 0076 9B07 lsls r3, r3, #30 + ARM GAS /tmp/ccMtK8ce.s page 233 + + + 4713 0078 45D0 beq .L254 +3901:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** #endif /* USE_HAL_TIM_REGISTER_CALLBACKS */ + 4714 .loc 1 3901 9 is_stmt 1 view .LVU1433 + 4715 007a 2000 movs r0, r4 + 4716 007c FFF7FEFF bl HAL_TIM_IC_CaptureCallback + 4717 .LVL357: + 4718 .L255: +3915:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** } + 4719 .loc 1 3915 7 view .LVU1434 +3915:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** } + 4720 .loc 1 3915 21 is_stmt 0 view .LVU1435 + 4721 0080 0023 movs r3, #0 + 4722 0082 2377 strb r3, [r4, #28] + 4723 .L253: +3919:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** { + 4724 .loc 1 3919 3 is_stmt 1 view .LVU1436 +3919:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** { + 4725 .loc 1 3919 7 is_stmt 0 view .LVU1437 + 4726 0084 2268 ldr r2, [r4] + 4727 0086 1369 ldr r3, [r2, #16] +3919:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** { + 4728 .loc 1 3919 6 view .LVU1438 + 4729 0088 DB06 lsls r3, r3, #27 + 4730 008a 12D5 bpl .L256 +3921:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** { + 4731 .loc 1 3921 5 is_stmt 1 view .LVU1439 +3921:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** { + 4732 .loc 1 3921 9 is_stmt 0 view .LVU1440 + 4733 008c D368 ldr r3, [r2, #12] +3921:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** { + 4734 .loc 1 3921 8 view .LVU1441 + 4735 008e DB06 lsls r3, r3, #27 + 4736 0090 0FD5 bpl .L256 +3923:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** htim->Channel = HAL_TIM_ACTIVE_CHANNEL_4; + 4737 .loc 1 3923 7 is_stmt 1 view .LVU1442 + 4738 0092 1123 movs r3, #17 + 4739 0094 5B42 rsbs r3, r3, #0 + 4740 0096 1361 str r3, [r2, #16] +3924:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** /* Input capture event */ + 4741 .loc 1 3924 7 view .LVU1443 +3924:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** /* Input capture event */ + 4742 .loc 1 3924 21 is_stmt 0 view .LVU1444 + 4743 0098 1933 adds r3, r3, #25 + 4744 009a 2377 strb r3, [r4, #28] +3926:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** { + 4745 .loc 1 3926 7 is_stmt 1 view .LVU1445 +3926:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** { + 4746 .loc 1 3926 16 is_stmt 0 view .LVU1446 + 4747 009c 2368 ldr r3, [r4] +3926:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** { + 4748 .loc 1 3926 26 view .LVU1447 + 4749 009e DA69 ldr r2, [r3, #28] +3926:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** { + 4750 .loc 1 3926 34 view .LVU1448 + 4751 00a0 C023 movs r3, #192 + 4752 00a2 9B00 lsls r3, r3, #2 +3926:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** { + ARM GAS /tmp/ccMtK8ce.s page 234 + + + 4753 .loc 1 3926 10 view .LVU1449 + 4754 00a4 1A42 tst r2, r3 + 4755 00a6 35D0 beq .L257 +3931:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** #endif /* USE_HAL_TIM_REGISTER_CALLBACKS */ + 4756 .loc 1 3931 9 is_stmt 1 view .LVU1450 + 4757 00a8 2000 movs r0, r4 + 4758 00aa FFF7FEFF bl HAL_TIM_IC_CaptureCallback + 4759 .LVL358: + 4760 .L258: +3945:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** } + 4761 .loc 1 3945 7 view .LVU1451 +3945:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** } + 4762 .loc 1 3945 21 is_stmt 0 view .LVU1452 + 4763 00ae 0023 movs r3, #0 + 4764 00b0 2377 strb r3, [r4, #28] + 4765 .L256: +3949:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** { + 4766 .loc 1 3949 3 is_stmt 1 view .LVU1453 +3949:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** { + 4767 .loc 1 3949 7 is_stmt 0 view .LVU1454 + 4768 00b2 2268 ldr r2, [r4] + 4769 00b4 1369 ldr r3, [r2, #16] +3949:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** { + 4770 .loc 1 3949 6 view .LVU1455 + 4771 00b6 DB07 lsls r3, r3, #31 + 4772 00b8 02D5 bpl .L259 +3951:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** { + 4773 .loc 1 3951 5 is_stmt 1 view .LVU1456 +3951:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** { + 4774 .loc 1 3951 9 is_stmt 0 view .LVU1457 + 4775 00ba D368 ldr r3, [r2, #12] +3951:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** { + 4776 .loc 1 3951 8 view .LVU1458 + 4777 00bc DB07 lsls r3, r3, #31 + 4778 00be 30D4 bmi .L279 + 4779 .L259: +3962:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** { + 4780 .loc 1 3962 3 is_stmt 1 view .LVU1459 +3962:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** { + 4781 .loc 1 3962 7 is_stmt 0 view .LVU1460 + 4782 00c0 2268 ldr r2, [r4] + 4783 00c2 1369 ldr r3, [r2, #16] +3962:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** { + 4784 .loc 1 3962 6 view .LVU1461 + 4785 00c4 1B06 lsls r3, r3, #24 + 4786 00c6 02D5 bpl .L260 +3964:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** { + 4787 .loc 1 3964 5 is_stmt 1 view .LVU1462 +3964:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** { + 4788 .loc 1 3964 9 is_stmt 0 view .LVU1463 + 4789 00c8 D368 ldr r3, [r2, #12] +3964:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** { + 4790 .loc 1 3964 8 view .LVU1464 + 4791 00ca 1B06 lsls r3, r3, #24 + 4792 00cc 30D4 bmi .L280 + 4793 .L260: +3975:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** { + ARM GAS /tmp/ccMtK8ce.s page 235 + + + 4794 .loc 1 3975 3 is_stmt 1 view .LVU1465 +3975:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** { + 4795 .loc 1 3975 7 is_stmt 0 view .LVU1466 + 4796 00ce 2268 ldr r2, [r4] + 4797 00d0 1369 ldr r3, [r2, #16] +3975:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** { + 4798 .loc 1 3975 6 view .LVU1467 + 4799 00d2 5B06 lsls r3, r3, #25 + 4800 00d4 02D5 bpl .L261 +3977:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** { + 4801 .loc 1 3977 5 is_stmt 1 view .LVU1468 +3977:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** { + 4802 .loc 1 3977 9 is_stmt 0 view .LVU1469 + 4803 00d6 D368 ldr r3, [r2, #12] +3977:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** { + 4804 .loc 1 3977 8 view .LVU1470 + 4805 00d8 5B06 lsls r3, r3, #25 + 4806 00da 30D4 bmi .L281 + 4807 .L261: +3988:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** { + 4808 .loc 1 3988 3 is_stmt 1 view .LVU1471 +3988:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** { + 4809 .loc 1 3988 7 is_stmt 0 view .LVU1472 + 4810 00dc 2268 ldr r2, [r4] + 4811 00de 1369 ldr r3, [r2, #16] +3988:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** { + 4812 .loc 1 3988 6 view .LVU1473 + 4813 00e0 9B06 lsls r3, r3, #26 + 4814 00e2 02D5 bpl .L246 +3990:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** { + 4815 .loc 1 3990 5 is_stmt 1 view .LVU1474 +3990:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** { + 4816 .loc 1 3990 9 is_stmt 0 view .LVU1475 + 4817 00e4 D368 ldr r3, [r2, #12] +3990:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** { + 4818 .loc 1 3990 8 view .LVU1476 + 4819 00e6 9B06 lsls r3, r3, #26 + 4820 00e8 30D4 bmi .L282 + 4821 .L246: +4000:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 4822 .loc 1 4000 1 view .LVU1477 + 4823 @ sp needed + 4824 .LVL359: +4000:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 4825 .loc 1 4000 1 view .LVU1478 + 4826 00ea 10BD pop {r4, pc} + 4827 .LVL360: + 4828 .L248: +3850:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** HAL_TIM_PWM_PulseFinishedCallback(htim); + 4829 .loc 1 3850 11 is_stmt 1 view .LVU1479 + 4830 00ec FFF7FEFF bl HAL_TIM_OC_DelayElapsedCallback + 4831 .LVL361: +3851:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** #endif /* USE_HAL_TIM_REGISTER_CALLBACKS */ + 4832 .loc 1 3851 11 view .LVU1480 + 4833 00f0 2000 movs r0, r4 + 4834 00f2 FFF7FEFF bl HAL_TIM_PWM_PulseFinishedCallback + 4835 .LVL362: + ARM GAS /tmp/ccMtK8ce.s page 236 + + + 4836 00f6 97E7 b .L249 + 4837 .L251: +3881:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** HAL_TIM_PWM_PulseFinishedCallback(htim); + 4838 .loc 1 3881 9 view .LVU1481 + 4839 00f8 2000 movs r0, r4 + 4840 00fa FFF7FEFF bl HAL_TIM_OC_DelayElapsedCallback + 4841 .LVL363: +3882:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** #endif /* USE_HAL_TIM_REGISTER_CALLBACKS */ + 4842 .loc 1 3882 9 view .LVU1482 + 4843 00fe 2000 movs r0, r4 + 4844 0100 FFF7FEFF bl HAL_TIM_PWM_PulseFinishedCallback + 4845 .LVL364: + 4846 0104 A7E7 b .L252 + 4847 .L254: +3911:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** HAL_TIM_PWM_PulseFinishedCallback(htim); + 4848 .loc 1 3911 9 view .LVU1483 + 4849 0106 2000 movs r0, r4 + 4850 0108 FFF7FEFF bl HAL_TIM_OC_DelayElapsedCallback + 4851 .LVL365: +3912:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** #endif /* USE_HAL_TIM_REGISTER_CALLBACKS */ + 4852 .loc 1 3912 9 view .LVU1484 + 4853 010c 2000 movs r0, r4 + 4854 010e FFF7FEFF bl HAL_TIM_PWM_PulseFinishedCallback + 4855 .LVL366: + 4856 0112 B5E7 b .L255 + 4857 .L257: +3941:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** HAL_TIM_PWM_PulseFinishedCallback(htim); + 4858 .loc 1 3941 9 view .LVU1485 + 4859 0114 2000 movs r0, r4 + 4860 0116 FFF7FEFF bl HAL_TIM_OC_DelayElapsedCallback + 4861 .LVL367: +3942:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** #endif /* USE_HAL_TIM_REGISTER_CALLBACKS */ + 4862 .loc 1 3942 9 view .LVU1486 + 4863 011a 2000 movs r0, r4 + 4864 011c FFF7FEFF bl HAL_TIM_PWM_PulseFinishedCallback + 4865 .LVL368: + 4866 0120 C5E7 b .L258 + 4867 .L279: +3953:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** #if (USE_HAL_TIM_REGISTER_CALLBACKS == 1) + 4868 .loc 1 3953 7 view .LVU1487 + 4869 0122 0223 movs r3, #2 + 4870 0124 5B42 rsbs r3, r3, #0 + 4871 0126 1361 str r3, [r2, #16] +3957:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** #endif /* USE_HAL_TIM_REGISTER_CALLBACKS */ + 4872 .loc 1 3957 7 view .LVU1488 + 4873 0128 2000 movs r0, r4 + 4874 012a FFF7FEFF bl HAL_TIM_PeriodElapsedCallback + 4875 .LVL369: + 4876 012e C7E7 b .L259 + 4877 .L280: +3966:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** #if (USE_HAL_TIM_REGISTER_CALLBACKS == 1) + 4878 .loc 1 3966 7 view .LVU1489 + 4879 0130 8123 movs r3, #129 + 4880 0132 5B42 rsbs r3, r3, #0 + 4881 0134 1361 str r3, [r2, #16] +3970:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** #endif /* USE_HAL_TIM_REGISTER_CALLBACKS */ + 4882 .loc 1 3970 7 view .LVU1490 + ARM GAS /tmp/ccMtK8ce.s page 237 + + + 4883 0136 2000 movs r0, r4 + 4884 0138 FFF7FEFF bl HAL_TIMEx_BreakCallback + 4885 .LVL370: + 4886 013c C7E7 b .L260 + 4887 .L281: +3979:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** #if (USE_HAL_TIM_REGISTER_CALLBACKS == 1) + 4888 .loc 1 3979 7 view .LVU1491 + 4889 013e 4123 movs r3, #65 + 4890 0140 5B42 rsbs r3, r3, #0 + 4891 0142 1361 str r3, [r2, #16] +3983:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** #endif /* USE_HAL_TIM_REGISTER_CALLBACKS */ + 4892 .loc 1 3983 7 view .LVU1492 + 4893 0144 2000 movs r0, r4 + 4894 0146 FFF7FEFF bl HAL_TIM_TriggerCallback + 4895 .LVL371: + 4896 014a C7E7 b .L261 + 4897 .L282: +3992:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** #if (USE_HAL_TIM_REGISTER_CALLBACKS == 1) + 4898 .loc 1 3992 7 view .LVU1493 + 4899 014c 2123 movs r3, #33 + 4900 014e 5B42 rsbs r3, r3, #0 + 4901 0150 1361 str r3, [r2, #16] +3996:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** #endif /* USE_HAL_TIM_REGISTER_CALLBACKS */ + 4902 .loc 1 3996 7 view .LVU1494 + 4903 0152 2000 movs r0, r4 + 4904 0154 FFF7FEFF bl HAL_TIMEx_CommutCallback + 4905 .LVL372: +4000:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 4906 .loc 1 4000 1 is_stmt 0 view .LVU1495 + 4907 0158 C7E7 b .L246 + 4908 .cfi_endproc + 4909 .LFE98: + 4911 .section .text.TIM_DMATriggerCplt,"ax",%progbits + 4912 .align 1 + 4913 .syntax unified + 4914 .code 16 + 4915 .thumb_func + 4917 TIM_DMATriggerCplt: + 4918 .LVL373: + 4919 .LFB142: +6745:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** TIM_HandleTypeDef *htim = (TIM_HandleTypeDef *)((DMA_HandleTypeDef *)hdma)->Parent; + 4920 .loc 1 6745 1 is_stmt 1 view -0 + 4921 .cfi_startproc + 4922 @ args = 0, pretend = 0, frame = 0 + 4923 @ frame_needed = 0, uses_anonymous_args = 0 +6745:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** TIM_HandleTypeDef *htim = (TIM_HandleTypeDef *)((DMA_HandleTypeDef *)hdma)->Parent; + 4924 .loc 1 6745 1 is_stmt 0 view .LVU1497 + 4925 0000 10B5 push {r4, lr} + 4926 .cfi_def_cfa_offset 8 + 4927 .cfi_offset 4, -8 + 4928 .cfi_offset 14, -4 +6746:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 4929 .loc 1 6746 3 is_stmt 1 view .LVU1498 +6746:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 4930 .loc 1 6746 22 is_stmt 0 view .LVU1499 + 4931 0002 406A ldr r0, [r0, #36] + 4932 .LVL374: + ARM GAS /tmp/ccMtK8ce.s page 238 + + +6748:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** { + 4933 .loc 1 6748 3 is_stmt 1 view .LVU1500 +6748:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** { + 4934 .loc 1 6748 17 is_stmt 0 view .LVU1501 + 4935 0004 836B ldr r3, [r0, #56] +6748:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** { + 4936 .loc 1 6748 43 view .LVU1502 + 4937 0006 9B69 ldr r3, [r3, #24] +6748:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** { + 4938 .loc 1 6748 6 view .LVU1503 + 4939 0008 002B cmp r3, #0 + 4940 000a 02D1 bne .L284 +6750:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** } + 4941 .loc 1 6750 5 is_stmt 1 view .LVU1504 +6750:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** } + 4942 .loc 1 6750 17 is_stmt 0 view .LVU1505 + 4943 000c 3D33 adds r3, r3, #61 + 4944 000e 0122 movs r2, #1 + 4945 0010 C254 strb r2, [r0, r3] + 4946 .L284: +6756:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** #endif /* USE_HAL_TIM_REGISTER_CALLBACKS */ + 4947 .loc 1 6756 3 is_stmt 1 view .LVU1506 + 4948 0012 FFF7FEFF bl HAL_TIM_TriggerCallback + 4949 .LVL375: +6758:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 4950 .loc 1 6758 1 is_stmt 0 view .LVU1507 + 4951 @ sp needed + 4952 0016 10BD pop {r4, pc} + 4953 .cfi_endproc + 4954 .LFE142: + 4956 .section .text.HAL_TIM_TriggerHalfCpltCallback,"ax",%progbits + 4957 .align 1 + 4958 .weak HAL_TIM_TriggerHalfCpltCallback + 4959 .syntax unified + 4960 .code 16 + 4961 .thumb_func + 4963 HAL_TIM_TriggerHalfCpltCallback: + 4964 .LVL376: + 4965 .LFB124: +5783:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** /* Prevent unused argument(s) compilation warning */ + 4966 .loc 1 5783 1 is_stmt 1 view -0 + 4967 .cfi_startproc + 4968 @ args = 0, pretend = 0, frame = 0 + 4969 @ frame_needed = 0, uses_anonymous_args = 0 + 4970 @ link register save eliminated. +5785:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 4971 .loc 1 5785 3 view .LVU1509 +5790:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 4972 .loc 1 5790 1 is_stmt 0 view .LVU1510 + 4973 @ sp needed + 4974 0000 7047 bx lr + 4975 .cfi_endproc + 4976 .LFE124: + 4978 .section .text.TIM_DMATriggerHalfCplt,"ax",%progbits + 4979 .align 1 + 4980 .syntax unified + 4981 .code 16 + ARM GAS /tmp/ccMtK8ce.s page 239 + + + 4982 .thumb_func + 4984 TIM_DMATriggerHalfCplt: + 4985 .LVL377: + 4986 .LFB143: +6766:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** TIM_HandleTypeDef *htim = (TIM_HandleTypeDef *)((DMA_HandleTypeDef *)hdma)->Parent; + 4987 .loc 1 6766 1 is_stmt 1 view -0 + 4988 .cfi_startproc + 4989 @ args = 0, pretend = 0, frame = 0 + 4990 @ frame_needed = 0, uses_anonymous_args = 0 +6766:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** TIM_HandleTypeDef *htim = (TIM_HandleTypeDef *)((DMA_HandleTypeDef *)hdma)->Parent; + 4991 .loc 1 6766 1 is_stmt 0 view .LVU1512 + 4992 0000 10B5 push {r4, lr} + 4993 .cfi_def_cfa_offset 8 + 4994 .cfi_offset 4, -8 + 4995 .cfi_offset 14, -4 +6767:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 4996 .loc 1 6767 3 is_stmt 1 view .LVU1513 +6767:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 4997 .loc 1 6767 22 is_stmt 0 view .LVU1514 + 4998 0002 406A ldr r0, [r0, #36] + 4999 .LVL378: +6772:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** #endif /* USE_HAL_TIM_REGISTER_CALLBACKS */ + 5000 .loc 1 6772 3 is_stmt 1 view .LVU1515 + 5001 0004 FFF7FEFF bl HAL_TIM_TriggerHalfCpltCallback + 5002 .LVL379: +6774:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 5003 .loc 1 6774 1 is_stmt 0 view .LVU1516 + 5004 @ sp needed + 5005 0008 10BD pop {r4, pc} + 5006 .cfi_endproc + 5007 .LFE143: + 5009 .section .text.HAL_TIM_ErrorCallback,"ax",%progbits + 5010 .align 1 + 5011 .weak HAL_TIM_ErrorCallback + 5012 .syntax unified + 5013 .code 16 + 5014 .thumb_func + 5016 HAL_TIM_ErrorCallback: + 5017 .LVL380: + 5018 .LFB125: +5798:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** /* Prevent unused argument(s) compilation warning */ + 5019 .loc 1 5798 1 is_stmt 1 view -0 + 5020 .cfi_startproc + 5021 @ args = 0, pretend = 0, frame = 0 + 5022 @ frame_needed = 0, uses_anonymous_args = 0 + 5023 @ link register save eliminated. +5800:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 5024 .loc 1 5800 3 view .LVU1518 +5805:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 5025 .loc 1 5805 1 is_stmt 0 view .LVU1519 + 5026 @ sp needed + 5027 0000 7047 bx lr + 5028 .cfi_endproc + 5029 .LFE125: + 5031 .section .text.TIM_DMAError,"ax",%progbits + 5032 .align 1 + 5033 .global TIM_DMAError + ARM GAS /tmp/ccMtK8ce.s page 240 + + + 5034 .syntax unified + 5035 .code 16 + 5036 .thumb_func + 5038 TIM_DMAError: + 5039 .LVL381: + 5040 .LFB135: +6465:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** TIM_HandleTypeDef *htim = (TIM_HandleTypeDef *)((DMA_HandleTypeDef *)hdma)->Parent; + 5041 .loc 1 6465 1 is_stmt 1 view -0 + 5042 .cfi_startproc + 5043 @ args = 0, pretend = 0, frame = 0 + 5044 @ frame_needed = 0, uses_anonymous_args = 0 +6465:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** TIM_HandleTypeDef *htim = (TIM_HandleTypeDef *)((DMA_HandleTypeDef *)hdma)->Parent; + 5045 .loc 1 6465 1 is_stmt 0 view .LVU1521 + 5046 0000 10B5 push {r4, lr} + 5047 .cfi_def_cfa_offset 8 + 5048 .cfi_offset 4, -8 + 5049 .cfi_offset 14, -4 +6466:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 5050 .loc 1 6466 3 is_stmt 1 view .LVU1522 +6466:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 5051 .loc 1 6466 22 is_stmt 0 view .LVU1523 + 5052 0002 446A ldr r4, [r0, #36] + 5053 .LVL382: +6468:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** { + 5054 .loc 1 6468 3 is_stmt 1 view .LVU1524 +6468:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** { + 5055 .loc 1 6468 25 is_stmt 0 view .LVU1525 + 5056 0004 636A ldr r3, [r4, #36] +6468:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** { + 5057 .loc 1 6468 6 view .LVU1526 + 5058 0006 8342 cmp r3, r0 + 5059 0008 0CD0 beq .L294 +6473:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** { + 5060 .loc 1 6473 8 is_stmt 1 view .LVU1527 +6473:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** { + 5061 .loc 1 6473 30 is_stmt 0 view .LVU1528 + 5062 000a A36A ldr r3, [r4, #40] +6473:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** { + 5063 .loc 1 6473 11 view .LVU1529 + 5064 000c 8342 cmp r3, r0 + 5065 000e 13D0 beq .L295 +6478:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** { + 5066 .loc 1 6478 8 is_stmt 1 view .LVU1530 +6478:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** { + 5067 .loc 1 6478 30 is_stmt 0 view .LVU1531 + 5068 0010 E36A ldr r3, [r4, #44] +6478:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** { + 5069 .loc 1 6478 11 view .LVU1532 + 5070 0012 8342 cmp r3, r0 + 5071 0014 16D0 beq .L296 +6483:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** { + 5072 .loc 1 6483 8 is_stmt 1 view .LVU1533 +6483:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** { + 5073 .loc 1 6483 30 is_stmt 0 view .LVU1534 + 5074 0016 236B ldr r3, [r4, #48] +6483:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** { + 5075 .loc 1 6483 11 view .LVU1535 + ARM GAS /tmp/ccMtK8ce.s page 241 + + + 5076 0018 8342 cmp r3, r0 + 5077 001a 19D0 beq .L297 +6490:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** } + 5078 .loc 1 6490 5 is_stmt 1 view .LVU1536 +6490:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** } + 5079 .loc 1 6490 17 is_stmt 0 view .LVU1537 + 5080 001c 3D23 movs r3, #61 + 5081 001e 0122 movs r2, #1 + 5082 0020 E254 strb r2, [r4, r3] + 5083 0022 03E0 b .L290 + 5084 .L294: +6470:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** TIM_CHANNEL_STATE_SET(htim, TIM_CHANNEL_1, HAL_TIM_CHANNEL_STATE_READY); + 5085 .loc 1 6470 5 is_stmt 1 view .LVU1538 +6470:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** TIM_CHANNEL_STATE_SET(htim, TIM_CHANNEL_1, HAL_TIM_CHANNEL_STATE_READY); + 5086 .loc 1 6470 19 is_stmt 0 view .LVU1539 + 5087 0024 0123 movs r3, #1 + 5088 0026 2377 strb r3, [r4, #28] +6471:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** } + 5089 .loc 1 6471 5 is_stmt 1 view .LVU1540 + 5090 0028 3E22 movs r2, #62 + 5091 002a A354 strb r3, [r4, r2] + 5092 .L290: +6496:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** #endif /* USE_HAL_TIM_REGISTER_CALLBACKS */ + 5093 .loc 1 6496 3 view .LVU1541 + 5094 002c 2000 movs r0, r4 + 5095 .LVL383: +6496:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** #endif /* USE_HAL_TIM_REGISTER_CALLBACKS */ + 5096 .loc 1 6496 3 is_stmt 0 view .LVU1542 + 5097 002e FFF7FEFF bl HAL_TIM_ErrorCallback + 5098 .LVL384: +6499:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** } + 5099 .loc 1 6499 3 is_stmt 1 view .LVU1543 +6499:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** } + 5100 .loc 1 6499 17 is_stmt 0 view .LVU1544 + 5101 0032 0023 movs r3, #0 + 5102 0034 2377 strb r3, [r4, #28] +6500:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 5103 .loc 1 6500 1 view .LVU1545 + 5104 @ sp needed + 5105 .LVL385: +6500:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 5106 .loc 1 6500 1 view .LVU1546 + 5107 0036 10BD pop {r4, pc} + 5108 .LVL386: + 5109 .L295: +6475:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** TIM_CHANNEL_STATE_SET(htim, TIM_CHANNEL_2, HAL_TIM_CHANNEL_STATE_READY); + 5110 .loc 1 6475 5 is_stmt 1 view .LVU1547 +6475:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** TIM_CHANNEL_STATE_SET(htim, TIM_CHANNEL_2, HAL_TIM_CHANNEL_STATE_READY); + 5111 .loc 1 6475 19 is_stmt 0 view .LVU1548 + 5112 0038 0223 movs r3, #2 + 5113 003a 2377 strb r3, [r4, #28] +6476:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** } + 5114 .loc 1 6476 5 is_stmt 1 view .LVU1549 + 5115 003c 3D33 adds r3, r3, #61 + 5116 003e 0122 movs r2, #1 + 5117 0040 E254 strb r2, [r4, r3] + 5118 0042 F3E7 b .L290 + ARM GAS /tmp/ccMtK8ce.s page 242 + + + 5119 .L296: +6480:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** TIM_CHANNEL_STATE_SET(htim, TIM_CHANNEL_3, HAL_TIM_CHANNEL_STATE_READY); + 5120 .loc 1 6480 5 view .LVU1550 +6480:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** TIM_CHANNEL_STATE_SET(htim, TIM_CHANNEL_3, HAL_TIM_CHANNEL_STATE_READY); + 5121 .loc 1 6480 19 is_stmt 0 view .LVU1551 + 5122 0044 0423 movs r3, #4 + 5123 0046 2377 strb r3, [r4, #28] +6481:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** } + 5124 .loc 1 6481 5 is_stmt 1 view .LVU1552 + 5125 0048 3C33 adds r3, r3, #60 + 5126 004a 0122 movs r2, #1 + 5127 004c E254 strb r2, [r4, r3] + 5128 004e EDE7 b .L290 + 5129 .L297: +6485:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** TIM_CHANNEL_STATE_SET(htim, TIM_CHANNEL_4, HAL_TIM_CHANNEL_STATE_READY); + 5130 .loc 1 6485 5 view .LVU1553 +6485:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** TIM_CHANNEL_STATE_SET(htim, TIM_CHANNEL_4, HAL_TIM_CHANNEL_STATE_READY); + 5131 .loc 1 6485 19 is_stmt 0 view .LVU1554 + 5132 0050 0823 movs r3, #8 + 5133 0052 2377 strb r3, [r4, #28] +6486:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** } + 5134 .loc 1 6486 5 is_stmt 1 view .LVU1555 + 5135 0054 3933 adds r3, r3, #57 + 5136 0056 0122 movs r2, #1 + 5137 0058 E254 strb r2, [r4, r3] + 5138 005a E7E7 b .L290 + 5139 .cfi_endproc + 5140 .LFE135: + 5142 .section .text.HAL_TIM_Base_GetState,"ax",%progbits + 5143 .align 1 + 5144 .global HAL_TIM_Base_GetState + 5145 .syntax unified + 5146 .code 16 + 5147 .thumb_func + 5149 HAL_TIM_Base_GetState: + 5150 .LVL387: + 5151 .LFB126: +6345:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** return htim->State; + 5152 .loc 1 6345 1 view -0 + 5153 .cfi_startproc + 5154 @ args = 0, pretend = 0, frame = 0 + 5155 @ frame_needed = 0, uses_anonymous_args = 0 + 5156 @ link register save eliminated. +6346:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** } + 5157 .loc 1 6346 3 view .LVU1557 +6346:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** } + 5158 .loc 1 6346 14 is_stmt 0 view .LVU1558 + 5159 0000 3D23 movs r3, #61 + 5160 0002 C05C ldrb r0, [r0, r3] + 5161 .LVL388: +6346:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** } + 5162 .loc 1 6346 14 view .LVU1559 + 5163 0004 C0B2 uxtb r0, r0 +6347:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 5164 .loc 1 6347 1 view .LVU1560 + 5165 @ sp needed + 5166 0006 7047 bx lr + ARM GAS /tmp/ccMtK8ce.s page 243 + + + 5167 .cfi_endproc + 5168 .LFE126: + 5170 .section .text.HAL_TIM_OC_GetState,"ax",%progbits + 5171 .align 1 + 5172 .global HAL_TIM_OC_GetState + 5173 .syntax unified + 5174 .code 16 + 5175 .thumb_func + 5177 HAL_TIM_OC_GetState: + 5178 .LVL389: + 5179 .LFB127: +6355:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** return htim->State; + 5180 .loc 1 6355 1 is_stmt 1 view -0 + 5181 .cfi_startproc + 5182 @ args = 0, pretend = 0, frame = 0 + 5183 @ frame_needed = 0, uses_anonymous_args = 0 + 5184 @ link register save eliminated. +6356:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** } + 5185 .loc 1 6356 3 view .LVU1562 +6356:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** } + 5186 .loc 1 6356 14 is_stmt 0 view .LVU1563 + 5187 0000 3D23 movs r3, #61 + 5188 0002 C05C ldrb r0, [r0, r3] + 5189 .LVL390: +6356:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** } + 5190 .loc 1 6356 14 view .LVU1564 + 5191 0004 C0B2 uxtb r0, r0 +6357:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 5192 .loc 1 6357 1 view .LVU1565 + 5193 @ sp needed + 5194 0006 7047 bx lr + 5195 .cfi_endproc + 5196 .LFE127: + 5198 .section .text.HAL_TIM_PWM_GetState,"ax",%progbits + 5199 .align 1 + 5200 .global HAL_TIM_PWM_GetState + 5201 .syntax unified + 5202 .code 16 + 5203 .thumb_func + 5205 HAL_TIM_PWM_GetState: + 5206 .LVL391: + 5207 .LFB128: +6365:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** return htim->State; + 5208 .loc 1 6365 1 is_stmt 1 view -0 + 5209 .cfi_startproc + 5210 @ args = 0, pretend = 0, frame = 0 + 5211 @ frame_needed = 0, uses_anonymous_args = 0 + 5212 @ link register save eliminated. +6366:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** } + 5213 .loc 1 6366 3 view .LVU1567 +6366:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** } + 5214 .loc 1 6366 14 is_stmt 0 view .LVU1568 + 5215 0000 3D23 movs r3, #61 + 5216 0002 C05C ldrb r0, [r0, r3] + 5217 .LVL392: +6366:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** } + 5218 .loc 1 6366 14 view .LVU1569 + ARM GAS /tmp/ccMtK8ce.s page 244 + + + 5219 0004 C0B2 uxtb r0, r0 +6367:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 5220 .loc 1 6367 1 view .LVU1570 + 5221 @ sp needed + 5222 0006 7047 bx lr + 5223 .cfi_endproc + 5224 .LFE128: + 5226 .section .text.HAL_TIM_IC_GetState,"ax",%progbits + 5227 .align 1 + 5228 .global HAL_TIM_IC_GetState + 5229 .syntax unified + 5230 .code 16 + 5231 .thumb_func + 5233 HAL_TIM_IC_GetState: + 5234 .LVL393: + 5235 .LFB129: +6375:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** return htim->State; + 5236 .loc 1 6375 1 is_stmt 1 view -0 + 5237 .cfi_startproc + 5238 @ args = 0, pretend = 0, frame = 0 + 5239 @ frame_needed = 0, uses_anonymous_args = 0 + 5240 @ link register save eliminated. +6376:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** } + 5241 .loc 1 6376 3 view .LVU1572 +6376:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** } + 5242 .loc 1 6376 14 is_stmt 0 view .LVU1573 + 5243 0000 3D23 movs r3, #61 + 5244 0002 C05C ldrb r0, [r0, r3] + 5245 .LVL394: +6376:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** } + 5246 .loc 1 6376 14 view .LVU1574 + 5247 0004 C0B2 uxtb r0, r0 +6377:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 5248 .loc 1 6377 1 view .LVU1575 + 5249 @ sp needed + 5250 0006 7047 bx lr + 5251 .cfi_endproc + 5252 .LFE129: + 5254 .section .text.HAL_TIM_OnePulse_GetState,"ax",%progbits + 5255 .align 1 + 5256 .global HAL_TIM_OnePulse_GetState + 5257 .syntax unified + 5258 .code 16 + 5259 .thumb_func + 5261 HAL_TIM_OnePulse_GetState: + 5262 .LVL395: + 5263 .LFB130: +6385:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** return htim->State; + 5264 .loc 1 6385 1 is_stmt 1 view -0 + 5265 .cfi_startproc + 5266 @ args = 0, pretend = 0, frame = 0 + 5267 @ frame_needed = 0, uses_anonymous_args = 0 + 5268 @ link register save eliminated. +6386:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** } + 5269 .loc 1 6386 3 view .LVU1577 +6386:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** } + 5270 .loc 1 6386 14 is_stmt 0 view .LVU1578 + ARM GAS /tmp/ccMtK8ce.s page 245 + + + 5271 0000 3D23 movs r3, #61 + 5272 0002 C05C ldrb r0, [r0, r3] + 5273 .LVL396: +6386:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** } + 5274 .loc 1 6386 14 view .LVU1579 + 5275 0004 C0B2 uxtb r0, r0 +6387:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 5276 .loc 1 6387 1 view .LVU1580 + 5277 @ sp needed + 5278 0006 7047 bx lr + 5279 .cfi_endproc + 5280 .LFE130: + 5282 .section .text.HAL_TIM_Encoder_GetState,"ax",%progbits + 5283 .align 1 + 5284 .global HAL_TIM_Encoder_GetState + 5285 .syntax unified + 5286 .code 16 + 5287 .thumb_func + 5289 HAL_TIM_Encoder_GetState: + 5290 .LVL397: + 5291 .LFB131: +6395:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** return htim->State; + 5292 .loc 1 6395 1 is_stmt 1 view -0 + 5293 .cfi_startproc + 5294 @ args = 0, pretend = 0, frame = 0 + 5295 @ frame_needed = 0, uses_anonymous_args = 0 + 5296 @ link register save eliminated. +6396:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** } + 5297 .loc 1 6396 3 view .LVU1582 +6396:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** } + 5298 .loc 1 6396 14 is_stmt 0 view .LVU1583 + 5299 0000 3D23 movs r3, #61 + 5300 0002 C05C ldrb r0, [r0, r3] + 5301 .LVL398: +6396:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** } + 5302 .loc 1 6396 14 view .LVU1584 + 5303 0004 C0B2 uxtb r0, r0 +6397:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 5304 .loc 1 6397 1 view .LVU1585 + 5305 @ sp needed + 5306 0006 7047 bx lr + 5307 .cfi_endproc + 5308 .LFE131: + 5310 .section .text.HAL_TIM_GetActiveChannel,"ax",%progbits + 5311 .align 1 + 5312 .global HAL_TIM_GetActiveChannel + 5313 .syntax unified + 5314 .code 16 + 5315 .thumb_func + 5317 HAL_TIM_GetActiveChannel: + 5318 .LVL399: + 5319 .LFB132: +6405:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** return htim->Channel; + 5320 .loc 1 6405 1 is_stmt 1 view -0 + 5321 .cfi_startproc + 5322 @ args = 0, pretend = 0, frame = 0 + 5323 @ frame_needed = 0, uses_anonymous_args = 0 + ARM GAS /tmp/ccMtK8ce.s page 246 + + + 5324 @ link register save eliminated. +6406:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** } + 5325 .loc 1 6406 3 view .LVU1587 +6406:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** } + 5326 .loc 1 6406 14 is_stmt 0 discriminator 1 view .LVU1588 + 5327 0000 007F ldrb r0, [r0, #28] + 5328 .LVL400: +6407:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 5329 .loc 1 6407 1 view .LVU1589 + 5330 @ sp needed + 5331 0002 7047 bx lr + 5332 .cfi_endproc + 5333 .LFE132: + 5335 .section .text.HAL_TIM_GetChannelState,"ax",%progbits + 5336 .align 1 + 5337 .global HAL_TIM_GetChannelState + 5338 .syntax unified + 5339 .code 16 + 5340 .thumb_func + 5342 HAL_TIM_GetChannelState: + 5343 .LVL401: + 5344 .LFB133: +6423:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** HAL_TIM_ChannelStateTypeDef channel_state; + 5345 .loc 1 6423 1 is_stmt 1 view -0 + 5346 .cfi_startproc + 5347 @ args = 0, pretend = 0, frame = 0 + 5348 @ frame_needed = 0, uses_anonymous_args = 0 + 5349 @ link register save eliminated. +6424:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 5350 .loc 1 6424 3 view .LVU1591 +6427:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 5351 .loc 1 6427 3 view .LVU1592 +6429:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 5352 .loc 1 6429 3 view .LVU1593 +6429:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 5353 .loc 1 6429 19 is_stmt 0 view .LVU1594 + 5354 0000 0029 cmp r1, #0 + 5355 0002 03D1 bne .L306 +6429:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 5356 .loc 1 6429 19 discriminator 1 view .LVU1595 + 5357 0004 3E23 movs r3, #62 + 5358 0006 C05C ldrb r0, [r0, r3] + 5359 .LVL402: +6429:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 5360 .loc 1 6429 19 discriminator 1 view .LVU1596 + 5361 0008 C0B2 uxtb r0, r0 + 5362 .L307: + 5363 .LVL403: +6431:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** } + 5364 .loc 1 6431 3 is_stmt 1 view .LVU1597 +6432:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 5365 .loc 1 6432 1 is_stmt 0 view .LVU1598 + 5366 @ sp needed + 5367 000a 7047 bx lr + 5368 .LVL404: + 5369 .L306: +6429:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + ARM GAS /tmp/ccMtK8ce.s page 247 + + + 5370 .loc 1 6429 19 discriminator 2 view .LVU1599 + 5371 000c 0429 cmp r1, #4 + 5372 000e 05D0 beq .L310 +6429:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 5373 .loc 1 6429 19 discriminator 5 view .LVU1600 + 5374 0010 0829 cmp r1, #8 + 5375 0012 07D0 beq .L311 +6429:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 5376 .loc 1 6429 19 discriminator 8 view .LVU1601 + 5377 0014 4123 movs r3, #65 + 5378 0016 C05C ldrb r0, [r0, r3] + 5379 .LVL405: +6429:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 5380 .loc 1 6429 19 discriminator 8 view .LVU1602 + 5381 0018 C0B2 uxtb r0, r0 + 5382 001a F6E7 b .L307 + 5383 .LVL406: + 5384 .L310: +6429:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 5385 .loc 1 6429 19 discriminator 4 view .LVU1603 + 5386 001c 3F23 movs r3, #63 + 5387 001e C05C ldrb r0, [r0, r3] + 5388 .LVL407: +6429:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 5389 .loc 1 6429 19 discriminator 4 view .LVU1604 + 5390 0020 C0B2 uxtb r0, r0 + 5391 0022 F2E7 b .L307 + 5392 .LVL408: + 5393 .L311: +6429:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 5394 .loc 1 6429 19 discriminator 7 view .LVU1605 + 5395 0024 4023 movs r3, #64 + 5396 0026 C05C ldrb r0, [r0, r3] + 5397 .LVL409: +6429:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 5398 .loc 1 6429 19 discriminator 7 view .LVU1606 + 5399 0028 C0B2 uxtb r0, r0 + 5400 002a EEE7 b .L307 + 5401 .cfi_endproc + 5402 .LFE133: + 5404 .section .text.HAL_TIM_DMABurstState,"ax",%progbits + 5405 .align 1 + 5406 .global HAL_TIM_DMABurstState + 5407 .syntax unified + 5408 .code 16 + 5409 .thumb_func + 5411 HAL_TIM_DMABurstState: + 5412 .LVL410: + 5413 .LFB134: +6440:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** /* Check the parameters */ + 5414 .loc 1 6440 1 is_stmt 1 view -0 + 5415 .cfi_startproc + 5416 @ args = 0, pretend = 0, frame = 0 + 5417 @ frame_needed = 0, uses_anonymous_args = 0 + 5418 @ link register save eliminated. +6442:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 5419 .loc 1 6442 3 view .LVU1608 + ARM GAS /tmp/ccMtK8ce.s page 248 + + +6444:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** } + 5420 .loc 1 6444 3 view .LVU1609 +6444:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** } + 5421 .loc 1 6444 14 is_stmt 0 view .LVU1610 + 5422 0000 4623 movs r3, #70 + 5423 0002 C05C ldrb r0, [r0, r3] + 5424 .LVL411: +6444:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** } + 5425 .loc 1 6444 14 view .LVU1611 + 5426 0004 C0B2 uxtb r0, r0 +6445:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 5427 .loc 1 6445 1 view .LVU1612 + 5428 @ sp needed + 5429 0006 7047 bx lr + 5430 .cfi_endproc + 5431 .LFE134: + 5433 .section .text.TIM_Base_SetConfig,"ax",%progbits + 5434 .align 1 + 5435 .global TIM_Base_SetConfig + 5436 .syntax unified + 5437 .code 16 + 5438 .thumb_func + 5440 TIM_Base_SetConfig: + 5441 .LVL412: + 5442 .LFB144: +6783:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** uint32_t tmpcr1; + 5443 .loc 1 6783 1 is_stmt 1 view -0 + 5444 .cfi_startproc + 5445 @ args = 0, pretend = 0, frame = 0 + 5446 @ frame_needed = 0, uses_anonymous_args = 0 + 5447 @ link register save eliminated. +6784:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** tmpcr1 = TIMx->CR1; + 5448 .loc 1 6784 3 view .LVU1614 +6785:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 5449 .loc 1 6785 3 view .LVU1615 +6785:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 5450 .loc 1 6785 10 is_stmt 0 view .LVU1616 + 5451 0000 0368 ldr r3, [r0] + 5452 .LVL413: +6788:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** { + 5453 .loc 1 6788 3 is_stmt 1 view .LVU1617 +6788:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** { + 5454 .loc 1 6788 6 is_stmt 0 view .LVU1618 + 5455 0002 1E4A ldr r2, .L320 + 5456 0004 9042 cmp r0, r2 + 5457 0006 06D0 beq .L314 +6788:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** { + 5458 .loc 1 6788 7 discriminator 1 view .LVU1619 + 5459 0008 8022 movs r2, #128 + 5460 000a D205 lsls r2, r2, #23 + 5461 000c 9042 cmp r0, r2 + 5462 000e 02D0 beq .L314 +6788:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** { + 5463 .loc 1 6788 7 discriminator 2 view .LVU1620 + 5464 0010 1B4A ldr r2, .L320+4 + 5465 0012 9042 cmp r0, r2 + 5466 0014 03D1 bne .L315 + ARM GAS /tmp/ccMtK8ce.s page 249 + + + 5467 .L314: +6791:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** tmpcr1 |= Structure->CounterMode; + 5468 .loc 1 6791 5 is_stmt 1 view .LVU1621 +6791:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** tmpcr1 |= Structure->CounterMode; + 5469 .loc 1 6791 12 is_stmt 0 view .LVU1622 + 5470 0016 7022 movs r2, #112 + 5471 0018 9343 bics r3, r2 + 5472 .LVL414: +6792:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** } + 5473 .loc 1 6792 5 is_stmt 1 view .LVU1623 +6792:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** } + 5474 .loc 1 6792 24 is_stmt 0 view .LVU1624 + 5475 001a 4A68 ldr r2, [r1, #4] +6792:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** } + 5476 .loc 1 6792 12 view .LVU1625 + 5477 001c 1343 orrs r3, r2 + 5478 .LVL415: + 5479 .L315: +6795:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** { + 5480 .loc 1 6795 3 is_stmt 1 view .LVU1626 +6795:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** { + 5481 .loc 1 6795 6 is_stmt 0 view .LVU1627 + 5482 001e 174A ldr r2, .L320 + 5483 0020 9042 cmp r0, r2 + 5484 0022 0FD0 beq .L316 +6795:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** { + 5485 .loc 1 6795 7 discriminator 1 view .LVU1628 + 5486 0024 8022 movs r2, #128 + 5487 0026 D205 lsls r2, r2, #23 + 5488 0028 9042 cmp r0, r2 + 5489 002a 0BD0 beq .L316 +6795:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** { + 5490 .loc 1 6795 7 discriminator 2 view .LVU1629 + 5491 002c 144A ldr r2, .L320+4 + 5492 002e 9042 cmp r0, r2 + 5493 0030 08D0 beq .L316 +6795:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** { + 5494 .loc 1 6795 7 discriminator 3 view .LVU1630 + 5495 0032 144A ldr r2, .L320+8 + 5496 0034 9042 cmp r0, r2 + 5497 0036 05D0 beq .L316 +6795:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** { + 5498 .loc 1 6795 7 discriminator 4 view .LVU1631 + 5499 0038 134A ldr r2, .L320+12 + 5500 003a 9042 cmp r0, r2 + 5501 003c 02D0 beq .L316 +6795:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** { + 5502 .loc 1 6795 7 discriminator 5 view .LVU1632 + 5503 003e 134A ldr r2, .L320+16 + 5504 0040 9042 cmp r0, r2 + 5505 0042 03D1 bne .L317 + 5506 .L316: +6798:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** tmpcr1 |= (uint32_t)Structure->ClockDivision; + 5507 .loc 1 6798 5 is_stmt 1 view .LVU1633 +6798:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** tmpcr1 |= (uint32_t)Structure->ClockDivision; + 5508 .loc 1 6798 12 is_stmt 0 view .LVU1634 + 5509 0044 124A ldr r2, .L320+20 + ARM GAS /tmp/ccMtK8ce.s page 250 + + + 5510 0046 1A40 ands r2, r3 + 5511 .LVL416: +6799:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** } + 5512 .loc 1 6799 5 is_stmt 1 view .LVU1635 +6799:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** } + 5513 .loc 1 6799 34 is_stmt 0 view .LVU1636 + 5514 0048 CB68 ldr r3, [r1, #12] +6799:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** } + 5515 .loc 1 6799 12 view .LVU1637 + 5516 004a 1343 orrs r3, r2 + 5517 .LVL417: + 5518 .L317: +6803:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 5519 .loc 1 6803 3 is_stmt 1 view .LVU1638 + 5520 004c 8022 movs r2, #128 + 5521 004e 9343 bics r3, r2 + 5522 .LVL418: +6803:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 5523 .loc 1 6803 3 is_stmt 0 view .LVU1639 + 5524 0050 4A69 ldr r2, [r1, #20] + 5525 0052 1343 orrs r3, r2 + 5526 .LVL419: +6805:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 5527 .loc 1 6805 3 is_stmt 1 view .LVU1640 +6805:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 5528 .loc 1 6805 13 is_stmt 0 view .LVU1641 + 5529 0054 0360 str r3, [r0] +6808:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 5530 .loc 1 6808 3 is_stmt 1 view .LVU1642 +6808:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 5531 .loc 1 6808 34 is_stmt 0 view .LVU1643 + 5532 0056 8B68 ldr r3, [r1, #8] + 5533 .LVL420: +6808:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 5534 .loc 1 6808 13 view .LVU1644 + 5535 0058 C362 str r3, [r0, #44] + 5536 .LVL421: +6811:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 5537 .loc 1 6811 3 is_stmt 1 view .LVU1645 +6811:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 5538 .loc 1 6811 24 is_stmt 0 view .LVU1646 + 5539 005a 0B68 ldr r3, [r1] +6811:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 5540 .loc 1 6811 13 view .LVU1647 + 5541 005c 8362 str r3, [r0, #40] +6813:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** { + 5542 .loc 1 6813 3 is_stmt 1 view .LVU1648 +6813:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** { + 5543 .loc 1 6813 6 is_stmt 0 view .LVU1649 + 5544 005e 074B ldr r3, .L320 + 5545 0060 9842 cmp r0, r3 + 5546 0062 05D0 beq .L318 +6813:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** { + 5547 .loc 1 6813 7 discriminator 1 view .LVU1650 + 5548 0064 084B ldr r3, .L320+12 + 5549 0066 9842 cmp r0, r3 + 5550 0068 02D0 beq .L318 + ARM GAS /tmp/ccMtK8ce.s page 251 + + +6813:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** { + 5551 .loc 1 6813 7 discriminator 2 view .LVU1651 + 5552 006a 084B ldr r3, .L320+16 + 5553 006c 9842 cmp r0, r3 + 5554 006e 01D1 bne .L319 + 5555 .L318: +6816:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** } + 5556 .loc 1 6816 5 is_stmt 1 view .LVU1652 +6816:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** } + 5557 .loc 1 6816 26 is_stmt 0 view .LVU1653 + 5558 0070 0B69 ldr r3, [r1, #16] +6816:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** } + 5559 .loc 1 6816 15 view .LVU1654 + 5560 0072 0363 str r3, [r0, #48] + 5561 .L319: +6821:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** } + 5562 .loc 1 6821 3 is_stmt 1 view .LVU1655 +6821:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** } + 5563 .loc 1 6821 13 is_stmt 0 view .LVU1656 + 5564 0074 0123 movs r3, #1 + 5565 0076 4361 str r3, [r0, #20] +6822:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 5566 .loc 1 6822 1 view .LVU1657 + 5567 @ sp needed + 5568 0078 7047 bx lr + 5569 .L321: + 5570 007a C046 .align 2 + 5571 .L320: + 5572 007c 002C0140 .word 1073818624 + 5573 0080 00040040 .word 1073742848 + 5574 0084 00200040 .word 1073750016 + 5575 0088 00440140 .word 1073824768 + 5576 008c 00480140 .word 1073825792 + 5577 0090 FFFCFFFF .word -769 + 5578 .cfi_endproc + 5579 .LFE144: + 5581 .section .text.HAL_TIM_Base_Init,"ax",%progbits + 5582 .align 1 + 5583 .global HAL_TIM_Base_Init + 5584 .syntax unified + 5585 .code 16 + 5586 .thumb_func + 5588 HAL_TIM_Base_Init: + 5589 .LVL422: + 5590 .LFB40: + 267:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** /* Check the TIM handle allocation */ + 5591 .loc 1 267 1 is_stmt 1 view -0 + 5592 .cfi_startproc + 5593 @ args = 0, pretend = 0, frame = 0 + 5594 @ frame_needed = 0, uses_anonymous_args = 0 + 267:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** /* Check the TIM handle allocation */ + 5595 .loc 1 267 1 is_stmt 0 view .LVU1659 + 5596 0000 70B5 push {r4, r5, r6, lr} + 5597 .cfi_def_cfa_offset 16 + 5598 .cfi_offset 4, -16 + 5599 .cfi_offset 5, -12 + 5600 .cfi_offset 6, -8 + ARM GAS /tmp/ccMtK8ce.s page 252 + + + 5601 .cfi_offset 14, -4 + 5602 0002 041E subs r4, r0, #0 + 269:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** { + 5603 .loc 1 269 3 is_stmt 1 view .LVU1660 + 269:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** { + 5604 .loc 1 269 6 is_stmt 0 view .LVU1661 + 5605 0004 26D0 beq .L325 + 275:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** assert_param(IS_TIM_COUNTER_MODE(htim->Init.CounterMode)); + 5606 .loc 1 275 3 is_stmt 1 view .LVU1662 + 276:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** assert_param(IS_TIM_CLOCKDIVISION_DIV(htim->Init.ClockDivision)); + 5607 .loc 1 276 3 view .LVU1663 + 277:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** assert_param(IS_TIM_PERIOD(htim, htim->Init.Period)); + 5608 .loc 1 277 3 view .LVU1664 + 278:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** assert_param(IS_TIM_AUTORELOAD_PRELOAD(htim->Init.AutoReloadPreload)); + 5609 .loc 1 278 3 view .LVU1665 + 279:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 5610 .loc 1 279 3 view .LVU1666 + 281:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** { + 5611 .loc 1 281 3 view .LVU1667 + 281:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** { + 5612 .loc 1 281 11 is_stmt 0 view .LVU1668 + 5613 0006 3D23 movs r3, #61 + 5614 0008 C35C ldrb r3, [r0, r3] + 281:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** { + 5615 .loc 1 281 6 view .LVU1669 + 5616 000a 002B cmp r3, #0 + 5617 000c 1CD0 beq .L326 + 5618 .LVL423: + 5619 .L324: + 303:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 5620 .loc 1 303 3 is_stmt 1 view .LVU1670 + 303:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 5621 .loc 1 303 15 is_stmt 0 view .LVU1671 + 5622 000e 3D25 movs r5, #61 + 5623 0010 0223 movs r3, #2 + 5624 0012 6355 strb r3, [r4, r5] + 306:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 5625 .loc 1 306 3 is_stmt 1 view .LVU1672 + 306:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 5626 .loc 1 306 38 is_stmt 0 view .LVU1673 + 5627 0014 2100 movs r1, r4 + 306:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 5628 .loc 1 306 3 view .LVU1674 + 5629 0016 01C9 ldmia r1!, {r0} + 5630 0018 FFF7FEFF bl TIM_Base_SetConfig + 5631 .LVL424: + 309:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 5632 .loc 1 309 3 is_stmt 1 view .LVU1675 + 309:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 5633 .loc 1 309 23 is_stmt 0 view .LVU1676 + 5634 001c 0123 movs r3, #1 + 5635 001e 4622 movs r2, #70 + 5636 0020 A354 strb r3, [r4, r2] + 312:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** TIM_CHANNEL_N_STATE_SET_ALL(htim, HAL_TIM_CHANNEL_STATE_READY); + 5637 .loc 1 312 3 is_stmt 1 view .LVU1677 + 312:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** TIM_CHANNEL_N_STATE_SET_ALL(htim, HAL_TIM_CHANNEL_STATE_READY); + 5638 .loc 1 312 3 view .LVU1678 + ARM GAS /tmp/ccMtK8ce.s page 253 + + + 5639 0022 083A subs r2, r2, #8 + 5640 0024 A354 strb r3, [r4, r2] + 312:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** TIM_CHANNEL_N_STATE_SET_ALL(htim, HAL_TIM_CHANNEL_STATE_READY); + 5641 .loc 1 312 3 view .LVU1679 + 5642 0026 0132 adds r2, r2, #1 + 5643 0028 A354 strb r3, [r4, r2] + 312:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** TIM_CHANNEL_N_STATE_SET_ALL(htim, HAL_TIM_CHANNEL_STATE_READY); + 5644 .loc 1 312 3 view .LVU1680 + 5645 002a 0132 adds r2, r2, #1 + 5646 002c A354 strb r3, [r4, r2] + 312:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** TIM_CHANNEL_N_STATE_SET_ALL(htim, HAL_TIM_CHANNEL_STATE_READY); + 5647 .loc 1 312 3 view .LVU1681 + 5648 002e 0132 adds r2, r2, #1 + 5649 0030 A354 strb r3, [r4, r2] + 312:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** TIM_CHANNEL_N_STATE_SET_ALL(htim, HAL_TIM_CHANNEL_STATE_READY); + 5650 .loc 1 312 3 view .LVU1682 + 313:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 5651 .loc 1 313 3 view .LVU1683 + 313:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 5652 .loc 1 313 3 view .LVU1684 + 5653 0032 0132 adds r2, r2, #1 + 5654 0034 A354 strb r3, [r4, r2] + 313:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 5655 .loc 1 313 3 view .LVU1685 + 5656 0036 0132 adds r2, r2, #1 + 5657 0038 A354 strb r3, [r4, r2] + 313:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 5658 .loc 1 313 3 view .LVU1686 + 5659 003a 0132 adds r2, r2, #1 + 5660 003c A354 strb r3, [r4, r2] + 313:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 5661 .loc 1 313 3 view .LVU1687 + 5662 003e 0132 adds r2, r2, #1 + 5663 0040 A354 strb r3, [r4, r2] + 313:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 5664 .loc 1 313 3 view .LVU1688 + 316:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 5665 .loc 1 316 3 view .LVU1689 + 316:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 5666 .loc 1 316 15 is_stmt 0 view .LVU1690 + 5667 0042 6355 strb r3, [r4, r5] + 318:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** } + 5668 .loc 1 318 3 is_stmt 1 view .LVU1691 + 318:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** } + 5669 .loc 1 318 10 is_stmt 0 view .LVU1692 + 5670 0044 0020 movs r0, #0 + 5671 .L323: + 319:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 5672 .loc 1 319 1 view .LVU1693 + 5673 @ sp needed + 5674 .LVL425: + 319:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 5675 .loc 1 319 1 view .LVU1694 + 5676 0046 70BD pop {r4, r5, r6, pc} + 5677 .LVL426: + 5678 .L326: + 284:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + ARM GAS /tmp/ccMtK8ce.s page 254 + + + 5679 .loc 1 284 5 is_stmt 1 view .LVU1695 + 284:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 5680 .loc 1 284 16 is_stmt 0 view .LVU1696 + 5681 0048 3C33 adds r3, r3, #60 + 5682 004a 0022 movs r2, #0 + 5683 004c C254 strb r2, [r0, r3] + 298:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** #endif /* USE_HAL_TIM_REGISTER_CALLBACKS */ + 5684 .loc 1 298 5 is_stmt 1 view .LVU1697 + 5685 004e FFF7FEFF bl HAL_TIM_Base_MspInit + 5686 .LVL427: + 298:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** #endif /* USE_HAL_TIM_REGISTER_CALLBACKS */ + 5687 .loc 1 298 5 is_stmt 0 view .LVU1698 + 5688 0052 DCE7 b .L324 + 5689 .LVL428: + 5690 .L325: + 271:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** } + 5691 .loc 1 271 12 view .LVU1699 + 5692 0054 0120 movs r0, #1 + 5693 .LVL429: + 271:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** } + 5694 .loc 1 271 12 view .LVU1700 + 5695 0056 F6E7 b .L323 + 5696 .cfi_endproc + 5697 .LFE40: + 5699 .section .text.HAL_TIM_OC_Init,"ax",%progbits + 5700 .align 1 + 5701 .global HAL_TIM_OC_Init + 5702 .syntax unified + 5703 .code 16 + 5704 .thumb_func + 5706 HAL_TIM_OC_Init: + 5707 .LVL430: + 5708 .LFB50: + 651:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** /* Check the TIM handle allocation */ + 5709 .loc 1 651 1 is_stmt 1 view -0 + 5710 .cfi_startproc + 5711 @ args = 0, pretend = 0, frame = 0 + 5712 @ frame_needed = 0, uses_anonymous_args = 0 + 651:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** /* Check the TIM handle allocation */ + 5713 .loc 1 651 1 is_stmt 0 view .LVU1702 + 5714 0000 70B5 push {r4, r5, r6, lr} + 5715 .cfi_def_cfa_offset 16 + 5716 .cfi_offset 4, -16 + 5717 .cfi_offset 5, -12 + 5718 .cfi_offset 6, -8 + 5719 .cfi_offset 14, -4 + 5720 0002 041E subs r4, r0, #0 + 653:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** { + 5721 .loc 1 653 3 is_stmt 1 view .LVU1703 + 653:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** { + 5722 .loc 1 653 6 is_stmt 0 view .LVU1704 + 5723 0004 26D0 beq .L330 + 659:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** assert_param(IS_TIM_COUNTER_MODE(htim->Init.CounterMode)); + 5724 .loc 1 659 3 is_stmt 1 view .LVU1705 + 660:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** assert_param(IS_TIM_CLOCKDIVISION_DIV(htim->Init.ClockDivision)); + 5725 .loc 1 660 3 view .LVU1706 + 661:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** assert_param(IS_TIM_PERIOD(htim, htim->Init.Period)); + ARM GAS /tmp/ccMtK8ce.s page 255 + + + 5726 .loc 1 661 3 view .LVU1707 + 662:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** assert_param(IS_TIM_AUTORELOAD_PRELOAD(htim->Init.AutoReloadPreload)); + 5727 .loc 1 662 3 view .LVU1708 + 663:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 5728 .loc 1 663 3 view .LVU1709 + 665:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** { + 5729 .loc 1 665 3 view .LVU1710 + 665:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** { + 5730 .loc 1 665 11 is_stmt 0 view .LVU1711 + 5731 0006 3D23 movs r3, #61 + 5732 0008 C35C ldrb r3, [r0, r3] + 665:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** { + 5733 .loc 1 665 6 view .LVU1712 + 5734 000a 002B cmp r3, #0 + 5735 000c 1CD0 beq .L331 + 5736 .LVL431: + 5737 .L329: + 687:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 5738 .loc 1 687 3 is_stmt 1 view .LVU1713 + 687:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 5739 .loc 1 687 15 is_stmt 0 view .LVU1714 + 5740 000e 3D25 movs r5, #61 + 5741 0010 0223 movs r3, #2 + 5742 0012 6355 strb r3, [r4, r5] + 690:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 5743 .loc 1 690 3 is_stmt 1 view .LVU1715 + 690:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 5744 .loc 1 690 39 is_stmt 0 view .LVU1716 + 5745 0014 2100 movs r1, r4 + 690:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 5746 .loc 1 690 3 view .LVU1717 + 5747 0016 01C9 ldmia r1!, {r0} + 5748 0018 FFF7FEFF bl TIM_Base_SetConfig + 5749 .LVL432: + 693:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 5750 .loc 1 693 3 is_stmt 1 view .LVU1718 + 693:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 5751 .loc 1 693 23 is_stmt 0 view .LVU1719 + 5752 001c 0123 movs r3, #1 + 5753 001e 4622 movs r2, #70 + 5754 0020 A354 strb r3, [r4, r2] + 696:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** TIM_CHANNEL_N_STATE_SET_ALL(htim, HAL_TIM_CHANNEL_STATE_READY); + 5755 .loc 1 696 3 is_stmt 1 view .LVU1720 + 696:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** TIM_CHANNEL_N_STATE_SET_ALL(htim, HAL_TIM_CHANNEL_STATE_READY); + 5756 .loc 1 696 3 view .LVU1721 + 5757 0022 083A subs r2, r2, #8 + 5758 0024 A354 strb r3, [r4, r2] + 696:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** TIM_CHANNEL_N_STATE_SET_ALL(htim, HAL_TIM_CHANNEL_STATE_READY); + 5759 .loc 1 696 3 view .LVU1722 + 5760 0026 0132 adds r2, r2, #1 + 5761 0028 A354 strb r3, [r4, r2] + 696:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** TIM_CHANNEL_N_STATE_SET_ALL(htim, HAL_TIM_CHANNEL_STATE_READY); + 5762 .loc 1 696 3 view .LVU1723 + 5763 002a 0132 adds r2, r2, #1 + 5764 002c A354 strb r3, [r4, r2] + 696:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** TIM_CHANNEL_N_STATE_SET_ALL(htim, HAL_TIM_CHANNEL_STATE_READY); + 5765 .loc 1 696 3 view .LVU1724 + ARM GAS /tmp/ccMtK8ce.s page 256 + + + 5766 002e 0132 adds r2, r2, #1 + 5767 0030 A354 strb r3, [r4, r2] + 696:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** TIM_CHANNEL_N_STATE_SET_ALL(htim, HAL_TIM_CHANNEL_STATE_READY); + 5768 .loc 1 696 3 view .LVU1725 + 697:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 5769 .loc 1 697 3 view .LVU1726 + 697:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 5770 .loc 1 697 3 view .LVU1727 + 5771 0032 0132 adds r2, r2, #1 + 5772 0034 A354 strb r3, [r4, r2] + 697:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 5773 .loc 1 697 3 view .LVU1728 + 5774 0036 0132 adds r2, r2, #1 + 5775 0038 A354 strb r3, [r4, r2] + 697:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 5776 .loc 1 697 3 view .LVU1729 + 5777 003a 0132 adds r2, r2, #1 + 5778 003c A354 strb r3, [r4, r2] + 697:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 5779 .loc 1 697 3 view .LVU1730 + 5780 003e 0132 adds r2, r2, #1 + 5781 0040 A354 strb r3, [r4, r2] + 697:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 5782 .loc 1 697 3 view .LVU1731 + 700:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 5783 .loc 1 700 3 view .LVU1732 + 700:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 5784 .loc 1 700 15 is_stmt 0 view .LVU1733 + 5785 0042 6355 strb r3, [r4, r5] + 702:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** } + 5786 .loc 1 702 3 is_stmt 1 view .LVU1734 + 702:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** } + 5787 .loc 1 702 10 is_stmt 0 view .LVU1735 + 5788 0044 0020 movs r0, #0 + 5789 .L328: + 703:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 5790 .loc 1 703 1 view .LVU1736 + 5791 @ sp needed + 5792 .LVL433: + 703:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 5793 .loc 1 703 1 view .LVU1737 + 5794 0046 70BD pop {r4, r5, r6, pc} + 5795 .LVL434: + 5796 .L331: + 668:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 5797 .loc 1 668 5 is_stmt 1 view .LVU1738 + 668:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 5798 .loc 1 668 16 is_stmt 0 view .LVU1739 + 5799 0048 3C33 adds r3, r3, #60 + 5800 004a 0022 movs r2, #0 + 5801 004c C254 strb r2, [r0, r3] + 682:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** #endif /* USE_HAL_TIM_REGISTER_CALLBACKS */ + 5802 .loc 1 682 5 is_stmt 1 view .LVU1740 + 5803 004e FFF7FEFF bl HAL_TIM_OC_MspInit + 5804 .LVL435: + 682:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** #endif /* USE_HAL_TIM_REGISTER_CALLBACKS */ + 5805 .loc 1 682 5 is_stmt 0 view .LVU1741 + ARM GAS /tmp/ccMtK8ce.s page 257 + + + 5806 0052 DCE7 b .L329 + 5807 .LVL436: + 5808 .L330: + 655:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** } + 5809 .loc 1 655 12 view .LVU1742 + 5810 0054 0120 movs r0, #1 + 5811 .LVL437: + 655:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** } + 5812 .loc 1 655 12 view .LVU1743 + 5813 0056 F6E7 b .L328 + 5814 .cfi_endproc + 5815 .LFE50: + 5817 .section .text.HAL_TIM_PWM_Init,"ax",%progbits + 5818 .align 1 + 5819 .global HAL_TIM_PWM_Init + 5820 .syntax unified + 5821 .code 16 + 5822 .thumb_func + 5824 HAL_TIM_PWM_Init: + 5825 .LVL438: + 5826 .LFB60: +1316:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** /* Check the TIM handle allocation */ + 5827 .loc 1 1316 1 is_stmt 1 view -0 + 5828 .cfi_startproc + 5829 @ args = 0, pretend = 0, frame = 0 + 5830 @ frame_needed = 0, uses_anonymous_args = 0 +1316:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** /* Check the TIM handle allocation */ + 5831 .loc 1 1316 1 is_stmt 0 view .LVU1745 + 5832 0000 70B5 push {r4, r5, r6, lr} + 5833 .cfi_def_cfa_offset 16 + 5834 .cfi_offset 4, -16 + 5835 .cfi_offset 5, -12 + 5836 .cfi_offset 6, -8 + 5837 .cfi_offset 14, -4 + 5838 0002 041E subs r4, r0, #0 +1318:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** { + 5839 .loc 1 1318 3 is_stmt 1 view .LVU1746 +1318:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** { + 5840 .loc 1 1318 6 is_stmt 0 view .LVU1747 + 5841 0004 26D0 beq .L335 +1324:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** assert_param(IS_TIM_COUNTER_MODE(htim->Init.CounterMode)); + 5842 .loc 1 1324 3 is_stmt 1 view .LVU1748 +1325:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** assert_param(IS_TIM_CLOCKDIVISION_DIV(htim->Init.ClockDivision)); + 5843 .loc 1 1325 3 view .LVU1749 +1326:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** assert_param(IS_TIM_PERIOD(htim, htim->Init.Period)); + 5844 .loc 1 1326 3 view .LVU1750 +1327:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** assert_param(IS_TIM_AUTORELOAD_PRELOAD(htim->Init.AutoReloadPreload)); + 5845 .loc 1 1327 3 view .LVU1751 +1328:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 5846 .loc 1 1328 3 view .LVU1752 +1330:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** { + 5847 .loc 1 1330 3 view .LVU1753 +1330:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** { + 5848 .loc 1 1330 11 is_stmt 0 view .LVU1754 + 5849 0006 3D23 movs r3, #61 + 5850 0008 C35C ldrb r3, [r0, r3] +1330:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** { + ARM GAS /tmp/ccMtK8ce.s page 258 + + + 5851 .loc 1 1330 6 view .LVU1755 + 5852 000a 002B cmp r3, #0 + 5853 000c 1CD0 beq .L336 + 5854 .LVL439: + 5855 .L334: +1352:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 5856 .loc 1 1352 3 is_stmt 1 view .LVU1756 +1352:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 5857 .loc 1 1352 15 is_stmt 0 view .LVU1757 + 5858 000e 3D25 movs r5, #61 + 5859 0010 0223 movs r3, #2 + 5860 0012 6355 strb r3, [r4, r5] +1355:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 5861 .loc 1 1355 3 is_stmt 1 view .LVU1758 +1355:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 5862 .loc 1 1355 38 is_stmt 0 view .LVU1759 + 5863 0014 2100 movs r1, r4 +1355:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 5864 .loc 1 1355 3 view .LVU1760 + 5865 0016 01C9 ldmia r1!, {r0} + 5866 0018 FFF7FEFF bl TIM_Base_SetConfig + 5867 .LVL440: +1358:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 5868 .loc 1 1358 3 is_stmt 1 view .LVU1761 +1358:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 5869 .loc 1 1358 23 is_stmt 0 view .LVU1762 + 5870 001c 0123 movs r3, #1 + 5871 001e 4622 movs r2, #70 + 5872 0020 A354 strb r3, [r4, r2] +1361:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** TIM_CHANNEL_N_STATE_SET_ALL(htim, HAL_TIM_CHANNEL_STATE_READY); + 5873 .loc 1 1361 3 is_stmt 1 view .LVU1763 +1361:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** TIM_CHANNEL_N_STATE_SET_ALL(htim, HAL_TIM_CHANNEL_STATE_READY); + 5874 .loc 1 1361 3 view .LVU1764 + 5875 0022 083A subs r2, r2, #8 + 5876 0024 A354 strb r3, [r4, r2] +1361:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** TIM_CHANNEL_N_STATE_SET_ALL(htim, HAL_TIM_CHANNEL_STATE_READY); + 5877 .loc 1 1361 3 view .LVU1765 + 5878 0026 0132 adds r2, r2, #1 + 5879 0028 A354 strb r3, [r4, r2] +1361:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** TIM_CHANNEL_N_STATE_SET_ALL(htim, HAL_TIM_CHANNEL_STATE_READY); + 5880 .loc 1 1361 3 view .LVU1766 + 5881 002a 0132 adds r2, r2, #1 + 5882 002c A354 strb r3, [r4, r2] +1361:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** TIM_CHANNEL_N_STATE_SET_ALL(htim, HAL_TIM_CHANNEL_STATE_READY); + 5883 .loc 1 1361 3 view .LVU1767 + 5884 002e 0132 adds r2, r2, #1 + 5885 0030 A354 strb r3, [r4, r2] +1361:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** TIM_CHANNEL_N_STATE_SET_ALL(htim, HAL_TIM_CHANNEL_STATE_READY); + 5886 .loc 1 1361 3 view .LVU1768 +1362:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 5887 .loc 1 1362 3 view .LVU1769 +1362:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 5888 .loc 1 1362 3 view .LVU1770 + 5889 0032 0132 adds r2, r2, #1 + 5890 0034 A354 strb r3, [r4, r2] +1362:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 5891 .loc 1 1362 3 view .LVU1771 + ARM GAS /tmp/ccMtK8ce.s page 259 + + + 5892 0036 0132 adds r2, r2, #1 + 5893 0038 A354 strb r3, [r4, r2] +1362:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 5894 .loc 1 1362 3 view .LVU1772 + 5895 003a 0132 adds r2, r2, #1 + 5896 003c A354 strb r3, [r4, r2] +1362:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 5897 .loc 1 1362 3 view .LVU1773 + 5898 003e 0132 adds r2, r2, #1 + 5899 0040 A354 strb r3, [r4, r2] +1362:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 5900 .loc 1 1362 3 view .LVU1774 +1365:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 5901 .loc 1 1365 3 view .LVU1775 +1365:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 5902 .loc 1 1365 15 is_stmt 0 view .LVU1776 + 5903 0042 6355 strb r3, [r4, r5] +1367:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** } + 5904 .loc 1 1367 3 is_stmt 1 view .LVU1777 +1367:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** } + 5905 .loc 1 1367 10 is_stmt 0 view .LVU1778 + 5906 0044 0020 movs r0, #0 + 5907 .L333: +1368:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 5908 .loc 1 1368 1 view .LVU1779 + 5909 @ sp needed + 5910 .LVL441: +1368:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 5911 .loc 1 1368 1 view .LVU1780 + 5912 0046 70BD pop {r4, r5, r6, pc} + 5913 .LVL442: + 5914 .L336: +1333:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 5915 .loc 1 1333 5 is_stmt 1 view .LVU1781 +1333:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 5916 .loc 1 1333 16 is_stmt 0 view .LVU1782 + 5917 0048 3C33 adds r3, r3, #60 + 5918 004a 0022 movs r2, #0 + 5919 004c C254 strb r2, [r0, r3] +1347:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** #endif /* USE_HAL_TIM_REGISTER_CALLBACKS */ + 5920 .loc 1 1347 5 is_stmt 1 view .LVU1783 + 5921 004e FFF7FEFF bl HAL_TIM_PWM_MspInit + 5922 .LVL443: +1347:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** #endif /* USE_HAL_TIM_REGISTER_CALLBACKS */ + 5923 .loc 1 1347 5 is_stmt 0 view .LVU1784 + 5924 0052 DCE7 b .L334 + 5925 .LVL444: + 5926 .L335: +1320:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** } + 5927 .loc 1 1320 12 view .LVU1785 + 5928 0054 0120 movs r0, #1 + 5929 .LVL445: +1320:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** } + 5930 .loc 1 1320 12 view .LVU1786 + 5931 0056 F6E7 b .L333 + 5932 .cfi_endproc + 5933 .LFE60: + ARM GAS /tmp/ccMtK8ce.s page 260 + + + 5935 .section .text.HAL_TIM_IC_Init,"ax",%progbits + 5936 .align 1 + 5937 .global HAL_TIM_IC_Init + 5938 .syntax unified + 5939 .code 16 + 5940 .thumb_func + 5942 HAL_TIM_IC_Init: + 5943 .LVL446: + 5944 .LFB70: +1980:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** /* Check the TIM handle allocation */ + 5945 .loc 1 1980 1 is_stmt 1 view -0 + 5946 .cfi_startproc + 5947 @ args = 0, pretend = 0, frame = 0 + 5948 @ frame_needed = 0, uses_anonymous_args = 0 +1980:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** /* Check the TIM handle allocation */ + 5949 .loc 1 1980 1 is_stmt 0 view .LVU1788 + 5950 0000 70B5 push {r4, r5, r6, lr} + 5951 .cfi_def_cfa_offset 16 + 5952 .cfi_offset 4, -16 + 5953 .cfi_offset 5, -12 + 5954 .cfi_offset 6, -8 + 5955 .cfi_offset 14, -4 + 5956 0002 041E subs r4, r0, #0 +1982:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** { + 5957 .loc 1 1982 3 is_stmt 1 view .LVU1789 +1982:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** { + 5958 .loc 1 1982 6 is_stmt 0 view .LVU1790 + 5959 0004 26D0 beq .L340 +1988:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** assert_param(IS_TIM_COUNTER_MODE(htim->Init.CounterMode)); + 5960 .loc 1 1988 3 is_stmt 1 view .LVU1791 +1989:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** assert_param(IS_TIM_CLOCKDIVISION_DIV(htim->Init.ClockDivision)); + 5961 .loc 1 1989 3 view .LVU1792 +1990:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** assert_param(IS_TIM_PERIOD(htim, htim->Init.Period)); + 5962 .loc 1 1990 3 view .LVU1793 +1991:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** assert_param(IS_TIM_AUTORELOAD_PRELOAD(htim->Init.AutoReloadPreload)); + 5963 .loc 1 1991 3 view .LVU1794 +1992:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 5964 .loc 1 1992 3 view .LVU1795 +1994:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** { + 5965 .loc 1 1994 3 view .LVU1796 +1994:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** { + 5966 .loc 1 1994 11 is_stmt 0 view .LVU1797 + 5967 0006 3D23 movs r3, #61 + 5968 0008 C35C ldrb r3, [r0, r3] +1994:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** { + 5969 .loc 1 1994 6 view .LVU1798 + 5970 000a 002B cmp r3, #0 + 5971 000c 1CD0 beq .L341 + 5972 .LVL447: + 5973 .L339: +2016:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 5974 .loc 1 2016 3 is_stmt 1 view .LVU1799 +2016:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 5975 .loc 1 2016 15 is_stmt 0 view .LVU1800 + 5976 000e 3D25 movs r5, #61 + 5977 0010 0223 movs r3, #2 + 5978 0012 6355 strb r3, [r4, r5] + ARM GAS /tmp/ccMtK8ce.s page 261 + + +2019:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 5979 .loc 1 2019 3 is_stmt 1 view .LVU1801 +2019:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 5980 .loc 1 2019 38 is_stmt 0 view .LVU1802 + 5981 0014 2100 movs r1, r4 +2019:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 5982 .loc 1 2019 3 view .LVU1803 + 5983 0016 01C9 ldmia r1!, {r0} + 5984 0018 FFF7FEFF bl TIM_Base_SetConfig + 5985 .LVL448: +2022:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 5986 .loc 1 2022 3 is_stmt 1 view .LVU1804 +2022:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 5987 .loc 1 2022 23 is_stmt 0 view .LVU1805 + 5988 001c 0123 movs r3, #1 + 5989 001e 4622 movs r2, #70 + 5990 0020 A354 strb r3, [r4, r2] +2025:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** TIM_CHANNEL_N_STATE_SET_ALL(htim, HAL_TIM_CHANNEL_STATE_READY); + 5991 .loc 1 2025 3 is_stmt 1 view .LVU1806 +2025:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** TIM_CHANNEL_N_STATE_SET_ALL(htim, HAL_TIM_CHANNEL_STATE_READY); + 5992 .loc 1 2025 3 view .LVU1807 + 5993 0022 083A subs r2, r2, #8 + 5994 0024 A354 strb r3, [r4, r2] +2025:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** TIM_CHANNEL_N_STATE_SET_ALL(htim, HAL_TIM_CHANNEL_STATE_READY); + 5995 .loc 1 2025 3 view .LVU1808 + 5996 0026 0132 adds r2, r2, #1 + 5997 0028 A354 strb r3, [r4, r2] +2025:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** TIM_CHANNEL_N_STATE_SET_ALL(htim, HAL_TIM_CHANNEL_STATE_READY); + 5998 .loc 1 2025 3 view .LVU1809 + 5999 002a 0132 adds r2, r2, #1 + 6000 002c A354 strb r3, [r4, r2] +2025:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** TIM_CHANNEL_N_STATE_SET_ALL(htim, HAL_TIM_CHANNEL_STATE_READY); + 6001 .loc 1 2025 3 view .LVU1810 + 6002 002e 0132 adds r2, r2, #1 + 6003 0030 A354 strb r3, [r4, r2] +2025:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** TIM_CHANNEL_N_STATE_SET_ALL(htim, HAL_TIM_CHANNEL_STATE_READY); + 6004 .loc 1 2025 3 view .LVU1811 +2026:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 6005 .loc 1 2026 3 view .LVU1812 +2026:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 6006 .loc 1 2026 3 view .LVU1813 + 6007 0032 0132 adds r2, r2, #1 + 6008 0034 A354 strb r3, [r4, r2] +2026:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 6009 .loc 1 2026 3 view .LVU1814 + 6010 0036 0132 adds r2, r2, #1 + 6011 0038 A354 strb r3, [r4, r2] +2026:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 6012 .loc 1 2026 3 view .LVU1815 + 6013 003a 0132 adds r2, r2, #1 + 6014 003c A354 strb r3, [r4, r2] +2026:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 6015 .loc 1 2026 3 view .LVU1816 + 6016 003e 0132 adds r2, r2, #1 + 6017 0040 A354 strb r3, [r4, r2] +2026:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 6018 .loc 1 2026 3 view .LVU1817 + ARM GAS /tmp/ccMtK8ce.s page 262 + + +2029:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 6019 .loc 1 2029 3 view .LVU1818 +2029:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 6020 .loc 1 2029 15 is_stmt 0 view .LVU1819 + 6021 0042 6355 strb r3, [r4, r5] +2031:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** } + 6022 .loc 1 2031 3 is_stmt 1 view .LVU1820 +2031:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** } + 6023 .loc 1 2031 10 is_stmt 0 view .LVU1821 + 6024 0044 0020 movs r0, #0 + 6025 .L338: +2032:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 6026 .loc 1 2032 1 view .LVU1822 + 6027 @ sp needed + 6028 .LVL449: +2032:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 6029 .loc 1 2032 1 view .LVU1823 + 6030 0046 70BD pop {r4, r5, r6, pc} + 6031 .LVL450: + 6032 .L341: +1997:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 6033 .loc 1 1997 5 is_stmt 1 view .LVU1824 +1997:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 6034 .loc 1 1997 16 is_stmt 0 view .LVU1825 + 6035 0048 3C33 adds r3, r3, #60 + 6036 004a 0022 movs r2, #0 + 6037 004c C254 strb r2, [r0, r3] +2011:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** #endif /* USE_HAL_TIM_REGISTER_CALLBACKS */ + 6038 .loc 1 2011 5 is_stmt 1 view .LVU1826 + 6039 004e FFF7FEFF bl HAL_TIM_IC_MspInit + 6040 .LVL451: +2011:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** #endif /* USE_HAL_TIM_REGISTER_CALLBACKS */ + 6041 .loc 1 2011 5 is_stmt 0 view .LVU1827 + 6042 0052 DCE7 b .L339 + 6043 .LVL452: + 6044 .L340: +1984:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** } + 6045 .loc 1 1984 12 view .LVU1828 + 6046 0054 0120 movs r0, #1 + 6047 .LVL453: +1984:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** } + 6048 .loc 1 1984 12 view .LVU1829 + 6049 0056 F6E7 b .L338 + 6050 .cfi_endproc + 6051 .LFE70: + 6053 .section .text.HAL_TIM_OnePulse_Init,"ax",%progbits + 6054 .align 1 + 6055 .global HAL_TIM_OnePulse_Init + 6056 .syntax unified + 6057 .code 16 + 6058 .thumb_func + 6060 HAL_TIM_OnePulse_Init: + 6061 .LVL454: + 6062 .LFB80: +2629:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** /* Check the TIM handle allocation */ + 6063 .loc 1 2629 1 is_stmt 1 view -0 + 6064 .cfi_startproc + ARM GAS /tmp/ccMtK8ce.s page 263 + + + 6065 @ args = 0, pretend = 0, frame = 0 + 6066 @ frame_needed = 0, uses_anonymous_args = 0 +2629:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** /* Check the TIM handle allocation */ + 6067 .loc 1 2629 1 is_stmt 0 view .LVU1831 + 6068 0000 70B5 push {r4, r5, r6, lr} + 6069 .cfi_def_cfa_offset 16 + 6070 .cfi_offset 4, -16 + 6071 .cfi_offset 5, -12 + 6072 .cfi_offset 6, -8 + 6073 .cfi_offset 14, -4 + 6074 0002 0400 movs r4, r0 + 6075 0004 0D00 movs r5, r1 +2631:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** { + 6076 .loc 1 2631 3 is_stmt 1 view .LVU1832 +2631:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** { + 6077 .loc 1 2631 6 is_stmt 0 view .LVU1833 + 6078 0006 0028 cmp r0, #0 + 6079 0008 27D0 beq .L345 +2637:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** assert_param(IS_TIM_COUNTER_MODE(htim->Init.CounterMode)); + 6080 .loc 1 2637 3 is_stmt 1 view .LVU1834 +2638:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** assert_param(IS_TIM_CLOCKDIVISION_DIV(htim->Init.ClockDivision)); + 6081 .loc 1 2638 3 view .LVU1835 +2639:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** assert_param(IS_TIM_OPM_MODE(OnePulseMode)); + 6082 .loc 1 2639 3 view .LVU1836 +2640:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** assert_param(IS_TIM_PERIOD(htim, htim->Init.Period)); + 6083 .loc 1 2640 3 view .LVU1837 +2641:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** assert_param(IS_TIM_AUTORELOAD_PRELOAD(htim->Init.AutoReloadPreload)); + 6084 .loc 1 2641 3 view .LVU1838 +2642:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 6085 .loc 1 2642 3 view .LVU1839 +2644:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** { + 6086 .loc 1 2644 3 view .LVU1840 +2644:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** { + 6087 .loc 1 2644 11 is_stmt 0 view .LVU1841 + 6088 000a 3D23 movs r3, #61 + 6089 000c C35C ldrb r3, [r0, r3] +2644:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** { + 6090 .loc 1 2644 6 view .LVU1842 + 6091 000e 002B cmp r3, #0 + 6092 0010 1DD0 beq .L346 + 6093 .LVL455: + 6094 .L344: +2666:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 6095 .loc 1 2666 3 is_stmt 1 view .LVU1843 +2666:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 6096 .loc 1 2666 15 is_stmt 0 view .LVU1844 + 6097 0012 3D26 movs r6, #61 + 6098 0014 0223 movs r3, #2 + 6099 0016 A355 strb r3, [r4, r6] +2669:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 6100 .loc 1 2669 3 is_stmt 1 view .LVU1845 +2669:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 6101 .loc 1 2669 38 is_stmt 0 view .LVU1846 + 6102 0018 2100 movs r1, r4 +2669:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 6103 .loc 1 2669 3 view .LVU1847 + 6104 001a 01C9 ldmia r1!, {r0} + ARM GAS /tmp/ccMtK8ce.s page 264 + + + 6105 001c FFF7FEFF bl TIM_Base_SetConfig + 6106 .LVL456: +2672:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 6107 .loc 1 2672 3 is_stmt 1 view .LVU1848 +2672:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 6108 .loc 1 2672 7 is_stmt 0 view .LVU1849 + 6109 0020 2268 ldr r2, [r4] +2672:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 6110 .loc 1 2672 17 view .LVU1850 + 6111 0022 1368 ldr r3, [r2] +2672:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 6112 .loc 1 2672 23 view .LVU1851 + 6113 0024 0821 movs r1, #8 + 6114 0026 8B43 bics r3, r1 + 6115 0028 1360 str r3, [r2] +2675:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 6116 .loc 1 2675 3 is_stmt 1 view .LVU1852 +2675:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 6117 .loc 1 2675 7 is_stmt 0 view .LVU1853 + 6118 002a 2268 ldr r2, [r4] +2675:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 6119 .loc 1 2675 17 view .LVU1854 + 6120 002c 1368 ldr r3, [r2] +2675:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 6121 .loc 1 2675 23 view .LVU1855 + 6122 002e 2B43 orrs r3, r5 + 6123 0030 1360 str r3, [r2] +2678:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 6124 .loc 1 2678 3 is_stmt 1 view .LVU1856 +2678:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 6125 .loc 1 2678 23 is_stmt 0 view .LVU1857 + 6126 0032 0123 movs r3, #1 + 6127 0034 4622 movs r2, #70 + 6128 0036 A354 strb r3, [r4, r2] +2681:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** TIM_CHANNEL_STATE_SET(htim, TIM_CHANNEL_2, HAL_TIM_CHANNEL_STATE_READY); + 6129 .loc 1 2681 3 is_stmt 1 view .LVU1858 + 6130 0038 083A subs r2, r2, #8 + 6131 003a A354 strb r3, [r4, r2] +2682:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** TIM_CHANNEL_N_STATE_SET(htim, TIM_CHANNEL_1, HAL_TIM_CHANNEL_STATE_READY); + 6132 .loc 1 2682 3 view .LVU1859 + 6133 003c 0132 adds r2, r2, #1 + 6134 003e A354 strb r3, [r4, r2] +2683:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** TIM_CHANNEL_N_STATE_SET(htim, TIM_CHANNEL_2, HAL_TIM_CHANNEL_STATE_READY); + 6135 .loc 1 2683 3 view .LVU1860 + 6136 0040 0332 adds r2, r2, #3 + 6137 0042 A354 strb r3, [r4, r2] +2684:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 6138 .loc 1 2684 3 view .LVU1861 + 6139 0044 0132 adds r2, r2, #1 + 6140 0046 A354 strb r3, [r4, r2] +2687:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 6141 .loc 1 2687 3 view .LVU1862 +2687:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 6142 .loc 1 2687 15 is_stmt 0 view .LVU1863 + 6143 0048 A355 strb r3, [r4, r6] +2689:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** } + 6144 .loc 1 2689 3 is_stmt 1 view .LVU1864 + ARM GAS /tmp/ccMtK8ce.s page 265 + + +2689:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** } + 6145 .loc 1 2689 10 is_stmt 0 view .LVU1865 + 6146 004a 0020 movs r0, #0 + 6147 .L343: +2690:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 6148 .loc 1 2690 1 view .LVU1866 + 6149 @ sp needed + 6150 .LVL457: + 6151 .LVL458: +2690:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 6152 .loc 1 2690 1 view .LVU1867 + 6153 004c 70BD pop {r4, r5, r6, pc} + 6154 .LVL459: + 6155 .L346: +2647:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 6156 .loc 1 2647 5 is_stmt 1 view .LVU1868 +2647:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 6157 .loc 1 2647 16 is_stmt 0 view .LVU1869 + 6158 004e 3C33 adds r3, r3, #60 + 6159 0050 0022 movs r2, #0 + 6160 0052 C254 strb r2, [r0, r3] +2661:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** #endif /* USE_HAL_TIM_REGISTER_CALLBACKS */ + 6161 .loc 1 2661 5 is_stmt 1 view .LVU1870 + 6162 0054 FFF7FEFF bl HAL_TIM_OnePulse_MspInit + 6163 .LVL460: +2661:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** #endif /* USE_HAL_TIM_REGISTER_CALLBACKS */ + 6164 .loc 1 2661 5 is_stmt 0 view .LVU1871 + 6165 0058 DBE7 b .L344 + 6166 .LVL461: + 6167 .L345: +2633:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** } + 6168 .loc 1 2633 12 view .LVU1872 + 6169 005a 0120 movs r0, #1 + 6170 .LVL462: +2633:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** } + 6171 .loc 1 2633 12 view .LVU1873 + 6172 005c F6E7 b .L343 + 6173 .cfi_endproc + 6174 .LFE80: + 6176 .section .text.HAL_TIM_Encoder_Init,"ax",%progbits + 6177 .align 1 + 6178 .global HAL_TIM_Encoder_Init + 6179 .syntax unified + 6180 .code 16 + 6181 .thumb_func + 6183 HAL_TIM_Encoder_Init: + 6184 .LVL463: + 6185 .LFB88: +3020:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** uint32_t tmpsmcr; + 6186 .loc 1 3020 1 is_stmt 1 view -0 + 6187 .cfi_startproc + 6188 @ args = 0, pretend = 0, frame = 0 + 6189 @ frame_needed = 0, uses_anonymous_args = 0 +3020:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** uint32_t tmpsmcr; + 6190 .loc 1 3020 1 is_stmt 0 view .LVU1875 + 6191 0000 F0B5 push {r4, r5, r6, r7, lr} + 6192 .cfi_def_cfa_offset 20 + ARM GAS /tmp/ccMtK8ce.s page 266 + + + 6193 .cfi_offset 4, -20 + 6194 .cfi_offset 5, -16 + 6195 .cfi_offset 6, -12 + 6196 .cfi_offset 7, -8 + 6197 .cfi_offset 14, -4 + 6198 0002 C646 mov lr, r8 + 6199 0004 00B5 push {lr} + 6200 .cfi_def_cfa_offset 24 + 6201 .cfi_offset 8, -24 + 6202 0006 0400 movs r4, r0 + 6203 0008 0D00 movs r5, r1 +3021:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** uint32_t tmpccmr1; + 6204 .loc 1 3021 3 is_stmt 1 view .LVU1876 +3022:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** uint32_t tmpccer; + 6205 .loc 1 3022 3 view .LVU1877 +3023:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 6206 .loc 1 3023 3 view .LVU1878 +3026:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** { + 6207 .loc 1 3026 3 view .LVU1879 +3026:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** { + 6208 .loc 1 3026 6 is_stmt 0 view .LVU1880 + 6209 000a 0028 cmp r0, #0 + 6210 000c 4DD0 beq .L350 +3032:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** assert_param(IS_TIM_COUNTER_MODE(htim->Init.CounterMode)); + 6211 .loc 1 3032 3 is_stmt 1 view .LVU1881 +3033:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** assert_param(IS_TIM_CLOCKDIVISION_DIV(htim->Init.ClockDivision)); + 6212 .loc 1 3033 3 view .LVU1882 +3034:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** assert_param(IS_TIM_AUTORELOAD_PRELOAD(htim->Init.AutoReloadPreload)); + 6213 .loc 1 3034 3 view .LVU1883 +3035:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** assert_param(IS_TIM_ENCODER_MODE(sConfig->EncoderMode)); + 6214 .loc 1 3035 3 view .LVU1884 +3036:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** assert_param(IS_TIM_IC_SELECTION(sConfig->IC1Selection)); + 6215 .loc 1 3036 3 view .LVU1885 +3037:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** assert_param(IS_TIM_IC_SELECTION(sConfig->IC2Selection)); + 6216 .loc 1 3037 3 view .LVU1886 +3038:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** assert_param(IS_TIM_ENCODERINPUT_POLARITY(sConfig->IC1Polarity)); + 6217 .loc 1 3038 3 view .LVU1887 +3039:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** assert_param(IS_TIM_ENCODERINPUT_POLARITY(sConfig->IC2Polarity)); + 6218 .loc 1 3039 3 view .LVU1888 +3040:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** assert_param(IS_TIM_IC_PRESCALER(sConfig->IC1Prescaler)); + 6219 .loc 1 3040 3 view .LVU1889 +3041:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** assert_param(IS_TIM_IC_PRESCALER(sConfig->IC2Prescaler)); + 6220 .loc 1 3041 3 view .LVU1890 +3042:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** assert_param(IS_TIM_IC_FILTER(sConfig->IC1Filter)); + 6221 .loc 1 3042 3 view .LVU1891 +3043:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** assert_param(IS_TIM_IC_FILTER(sConfig->IC2Filter)); + 6222 .loc 1 3043 3 view .LVU1892 +3044:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** assert_param(IS_TIM_PERIOD(htim, htim->Init.Period)); + 6223 .loc 1 3044 3 view .LVU1893 +3045:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 6224 .loc 1 3045 3 view .LVU1894 +3047:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** { + 6225 .loc 1 3047 3 view .LVU1895 +3047:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** { + 6226 .loc 1 3047 11 is_stmt 0 view .LVU1896 + 6227 000e 3D23 movs r3, #61 + 6228 0010 C35C ldrb r3, [r0, r3] + ARM GAS /tmp/ccMtK8ce.s page 267 + + +3047:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** { + 6229 .loc 1 3047 6 view .LVU1897 + 6230 0012 002B cmp r3, #0 + 6231 0014 43D0 beq .L351 + 6232 .LVL464: + 6233 .L349: +3069:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 6234 .loc 1 3069 3 is_stmt 1 view .LVU1898 +3069:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 6235 .loc 1 3069 15 is_stmt 0 view .LVU1899 + 6236 0016 3D26 movs r6, #61 + 6237 0018 0223 movs r3, #2 + 6238 001a A355 strb r3, [r4, r6] +3072:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 6239 .loc 1 3072 3 is_stmt 1 view .LVU1900 +3072:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 6240 .loc 1 3072 7 is_stmt 0 view .LVU1901 + 6241 001c 2268 ldr r2, [r4] +3072:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 6242 .loc 1 3072 17 view .LVU1902 + 6243 001e 9368 ldr r3, [r2, #8] +3072:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 6244 .loc 1 3072 24 view .LVU1903 + 6245 0020 2349 ldr r1, .L352 + 6246 0022 0B40 ands r3, r1 + 6247 0024 9360 str r3, [r2, #8] +3075:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 6248 .loc 1 3075 3 is_stmt 1 view .LVU1904 +3075:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 6249 .loc 1 3075 38 is_stmt 0 view .LVU1905 + 6250 0026 2100 movs r1, r4 +3075:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 6251 .loc 1 3075 3 view .LVU1906 + 6252 0028 01C9 ldmia r1!, {r0} + 6253 002a FFF7FEFF bl TIM_Base_SetConfig + 6254 .LVL465: +3078:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 6255 .loc 1 3078 3 is_stmt 1 view .LVU1907 +3078:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 6256 .loc 1 3078 17 is_stmt 0 view .LVU1908 + 6257 002e 2168 ldr r1, [r4] +3078:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 6258 .loc 1 3078 11 view .LVU1909 + 6259 0030 8B68 ldr r3, [r1, #8] + 6260 .LVL466: +3081:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 6261 .loc 1 3081 3 is_stmt 1 view .LVU1910 +3081:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 6262 .loc 1 3081 12 is_stmt 0 view .LVU1911 + 6263 0032 8A69 ldr r2, [r1, #24] + 6264 .LVL467: +3084:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 6265 .loc 1 3084 3 is_stmt 1 view .LVU1912 +3084:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 6266 .loc 1 3084 11 is_stmt 0 view .LVU1913 + 6267 0034 0F6A ldr r7, [r1, #32] + 6268 .LVL468: + ARM GAS /tmp/ccMtK8ce.s page 268 + + +3087:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 6269 .loc 1 3087 3 is_stmt 1 view .LVU1914 +3087:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 6270 .loc 1 3087 21 is_stmt 0 view .LVU1915 + 6271 0036 2868 ldr r0, [r5] +3087:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 6272 .loc 1 3087 11 view .LVU1916 + 6273 0038 1843 orrs r0, r3 + 6274 003a 8046 mov r8, r0 + 6275 .LVL469: +3090:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** tmpccmr1 |= (sConfig->IC1Selection | (sConfig->IC2Selection << 8U)); + 6276 .loc 1 3090 3 is_stmt 1 view .LVU1917 +3090:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** tmpccmr1 |= (sConfig->IC1Selection | (sConfig->IC2Selection << 8U)); + 6277 .loc 1 3090 12 is_stmt 0 view .LVU1918 + 6278 003c 1D4B ldr r3, .L352+4 + 6279 003e 1A40 ands r2, r3 + 6280 .LVL470: +3091:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 6281 .loc 1 3091 3 is_stmt 1 view .LVU1919 +3091:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 6282 .loc 1 3091 23 is_stmt 0 view .LVU1920 + 6283 0040 AB68 ldr r3, [r5, #8] +3091:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 6284 .loc 1 3091 48 view .LVU1921 + 6285 0042 A869 ldr r0, [r5, #24] + 6286 .LVL471: +3091:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 6287 .loc 1 3091 63 view .LVU1922 + 6288 0044 0002 lsls r0, r0, #8 +3091:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 6289 .loc 1 3091 38 view .LVU1923 + 6290 0046 0343 orrs r3, r0 +3091:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 6291 .loc 1 3091 12 view .LVU1924 + 6292 0048 1343 orrs r3, r2 + 6293 .LVL472: +3094:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** tmpccmr1 &= ~(TIM_CCMR1_IC1F | TIM_CCMR1_IC2F); + 6294 .loc 1 3094 3 is_stmt 1 view .LVU1925 +3095:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** tmpccmr1 |= sConfig->IC1Prescaler | (sConfig->IC2Prescaler << 8U); + 6295 .loc 1 3095 3 view .LVU1926 +3095:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** tmpccmr1 |= sConfig->IC1Prescaler | (sConfig->IC2Prescaler << 8U); + 6296 .loc 1 3095 12 is_stmt 0 view .LVU1927 + 6297 004a 1B4A ldr r2, .L352+8 + 6298 004c 1340 ands r3, r2 + 6299 .LVL473: +3096:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** tmpccmr1 |= (sConfig->IC1Filter << 4U) | (sConfig->IC2Filter << 12U); + 6300 .loc 1 3096 3 is_stmt 1 view .LVU1928 +3096:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** tmpccmr1 |= (sConfig->IC1Filter << 4U) | (sConfig->IC2Filter << 12U); + 6301 .loc 1 3096 22 is_stmt 0 view .LVU1929 + 6302 004e EA68 ldr r2, [r5, #12] +3096:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** tmpccmr1 |= (sConfig->IC1Filter << 4U) | (sConfig->IC2Filter << 12U); + 6303 .loc 1 3096 47 view .LVU1930 + 6304 0050 E869 ldr r0, [r5, #28] +3096:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** tmpccmr1 |= (sConfig->IC1Filter << 4U) | (sConfig->IC2Filter << 12U); + 6305 .loc 1 3096 62 view .LVU1931 + 6306 0052 0002 lsls r0, r0, #8 +3096:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** tmpccmr1 |= (sConfig->IC1Filter << 4U) | (sConfig->IC2Filter << 12U); + ARM GAS /tmp/ccMtK8ce.s page 269 + + + 6307 .loc 1 3096 37 view .LVU1932 + 6308 0054 0243 orrs r2, r0 +3096:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** tmpccmr1 |= (sConfig->IC1Filter << 4U) | (sConfig->IC2Filter << 12U); + 6309 .loc 1 3096 12 view .LVU1933 + 6310 0056 1A43 orrs r2, r3 + 6311 .LVL474: +3097:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 6312 .loc 1 3097 3 is_stmt 1 view .LVU1934 +3097:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 6313 .loc 1 3097 23 is_stmt 0 view .LVU1935 + 6314 0058 2B69 ldr r3, [r5, #16] +3097:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 6315 .loc 1 3097 35 view .LVU1936 + 6316 005a 1B01 lsls r3, r3, #4 +3097:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 6317 .loc 1 3097 52 view .LVU1937 + 6318 005c 286A ldr r0, [r5, #32] +3097:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 6319 .loc 1 3097 64 view .LVU1938 + 6320 005e 0003 lsls r0, r0, #12 +3097:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 6321 .loc 1 3097 42 view .LVU1939 + 6322 0060 0343 orrs r3, r0 +3097:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 6323 .loc 1 3097 12 view .LVU1940 + 6324 0062 1343 orrs r3, r2 + 6325 .LVL475: +3100:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** tmpccer &= ~(TIM_CCER_CC1NP | TIM_CCER_CC2NP); + 6326 .loc 1 3100 3 is_stmt 1 view .LVU1941 +3101:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** tmpccer |= sConfig->IC1Polarity | (sConfig->IC2Polarity << 4U); + 6327 .loc 1 3101 3 view .LVU1942 +3101:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** tmpccer |= sConfig->IC1Polarity | (sConfig->IC2Polarity << 4U); + 6328 .loc 1 3101 11 is_stmt 0 view .LVU1943 + 6329 0064 AA22 movs r2, #170 + 6330 0066 9743 bics r7, r2 + 6331 .LVL476: +3102:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 6332 .loc 1 3102 3 is_stmt 1 view .LVU1944 +3102:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 6333 .loc 1 3102 21 is_stmt 0 view .LVU1945 + 6334 0068 6A68 ldr r2, [r5, #4] +3102:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 6335 .loc 1 3102 45 view .LVU1946 + 6336 006a 6D69 ldr r5, [r5, #20] + 6337 .LVL477: +3102:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 6338 .loc 1 3102 59 view .LVU1947 + 6339 006c 2D01 lsls r5, r5, #4 +3102:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 6340 .loc 1 3102 35 view .LVU1948 + 6341 006e 2A43 orrs r2, r5 +3102:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 6342 .loc 1 3102 11 view .LVU1949 + 6343 0070 3A43 orrs r2, r7 + 6344 .LVL478: +3105:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 6345 .loc 1 3105 3 is_stmt 1 view .LVU1950 + ARM GAS /tmp/ccMtK8ce.s page 270 + + +3105:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 6346 .loc 1 3105 24 is_stmt 0 view .LVU1951 + 6347 0072 4046 mov r0, r8 + 6348 0074 8860 str r0, [r1, #8] +3108:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 6349 .loc 1 3108 3 is_stmt 1 view .LVU1952 +3108:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 6350 .loc 1 3108 7 is_stmt 0 view .LVU1953 + 6351 0076 2168 ldr r1, [r4] +3108:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 6352 .loc 1 3108 25 view .LVU1954 + 6353 0078 8B61 str r3, [r1, #24] +3111:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 6354 .loc 1 3111 3 is_stmt 1 view .LVU1955 +3111:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 6355 .loc 1 3111 7 is_stmt 0 view .LVU1956 + 6356 007a 2368 ldr r3, [r4] + 6357 .LVL479: +3111:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 6358 .loc 1 3111 24 view .LVU1957 + 6359 007c 1A62 str r2, [r3, #32] + 6360 .LVL480: +3114:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 6361 .loc 1 3114 3 is_stmt 1 view .LVU1958 +3114:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 6362 .loc 1 3114 23 is_stmt 0 view .LVU1959 + 6363 007e 0123 movs r3, #1 + 6364 0080 4622 movs r2, #70 + 6365 .LVL481: +3114:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 6366 .loc 1 3114 23 view .LVU1960 + 6367 0082 A354 strb r3, [r4, r2] +3117:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** TIM_CHANNEL_STATE_SET(htim, TIM_CHANNEL_2, HAL_TIM_CHANNEL_STATE_READY); + 6368 .loc 1 3117 3 is_stmt 1 view .LVU1961 + 6369 0084 083A subs r2, r2, #8 + 6370 0086 A354 strb r3, [r4, r2] +3118:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** TIM_CHANNEL_N_STATE_SET(htim, TIM_CHANNEL_1, HAL_TIM_CHANNEL_STATE_READY); + 6371 .loc 1 3118 3 view .LVU1962 + 6372 0088 0132 adds r2, r2, #1 + 6373 008a A354 strb r3, [r4, r2] +3119:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** TIM_CHANNEL_N_STATE_SET(htim, TIM_CHANNEL_2, HAL_TIM_CHANNEL_STATE_READY); + 6374 .loc 1 3119 3 view .LVU1963 + 6375 008c 0332 adds r2, r2, #3 + 6376 008e A354 strb r3, [r4, r2] +3120:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 6377 .loc 1 3120 3 view .LVU1964 + 6378 0090 0132 adds r2, r2, #1 + 6379 0092 A354 strb r3, [r4, r2] +3123:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 6380 .loc 1 3123 3 view .LVU1965 +3123:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 6381 .loc 1 3123 15 is_stmt 0 view .LVU1966 + 6382 0094 A355 strb r3, [r4, r6] +3125:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** } + 6383 .loc 1 3125 3 is_stmt 1 view .LVU1967 +3125:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** } + 6384 .loc 1 3125 10 is_stmt 0 view .LVU1968 + ARM GAS /tmp/ccMtK8ce.s page 271 + + + 6385 0096 0020 movs r0, #0 + 6386 .LVL482: + 6387 .L348: +3126:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 6388 .loc 1 3126 1 view .LVU1969 + 6389 @ sp needed + 6390 .LVL483: +3126:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 6391 .loc 1 3126 1 view .LVU1970 + 6392 0098 80BC pop {r7} + 6393 009a B846 mov r8, r7 + 6394 009c F0BD pop {r4, r5, r6, r7, pc} + 6395 .LVL484: + 6396 .L351: +3050:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 6397 .loc 1 3050 5 is_stmt 1 view .LVU1971 +3050:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 6398 .loc 1 3050 16 is_stmt 0 view .LVU1972 + 6399 009e 3C33 adds r3, r3, #60 + 6400 00a0 0022 movs r2, #0 + 6401 00a2 C254 strb r2, [r0, r3] +3064:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** #endif /* USE_HAL_TIM_REGISTER_CALLBACKS */ + 6402 .loc 1 3064 5 is_stmt 1 view .LVU1973 + 6403 00a4 FFF7FEFF bl HAL_TIM_Encoder_MspInit + 6404 .LVL485: +3064:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** #endif /* USE_HAL_TIM_REGISTER_CALLBACKS */ + 6405 .loc 1 3064 5 is_stmt 0 view .LVU1974 + 6406 00a8 B5E7 b .L349 + 6407 .LVL486: + 6408 .L350: +3028:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** } + 6409 .loc 1 3028 12 view .LVU1975 + 6410 00aa 0120 movs r0, #1 + 6411 .LVL487: +3028:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** } + 6412 .loc 1 3028 12 view .LVU1976 + 6413 00ac F4E7 b .L348 + 6414 .L353: + 6415 00ae C046 .align 2 + 6416 .L352: + 6417 00b0 F8BFFFFF .word -16392 + 6418 00b4 FCFCFFFF .word -772 + 6419 00b8 0303FFFF .word -64765 + 6420 .cfi_endproc + 6421 .LFE88: + 6423 .section .text.TIM_OC2_SetConfig,"ax",%progbits + 6424 .align 1 + 6425 .global TIM_OC2_SetConfig + 6426 .syntax unified + 6427 .code 16 + 6428 .thumb_func + 6430 TIM_OC2_SetConfig: + 6431 .LVL488: + 6432 .LFB146: +6906:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** uint32_t tmpccmrx; + 6433 .loc 1 6906 1 is_stmt 1 view -0 + 6434 .cfi_startproc + ARM GAS /tmp/ccMtK8ce.s page 272 + + + 6435 @ args = 0, pretend = 0, frame = 0 + 6436 @ frame_needed = 0, uses_anonymous_args = 0 +6906:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** uint32_t tmpccmrx; + 6437 .loc 1 6906 1 is_stmt 0 view .LVU1978 + 6438 0000 70B5 push {r4, r5, r6, lr} + 6439 .cfi_def_cfa_offset 16 + 6440 .cfi_offset 4, -16 + 6441 .cfi_offset 5, -12 + 6442 .cfi_offset 6, -8 + 6443 .cfi_offset 14, -4 +6907:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** uint32_t tmpccer; + 6444 .loc 1 6907 3 is_stmt 1 view .LVU1979 +6908:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** uint32_t tmpcr2; + 6445 .loc 1 6908 3 view .LVU1980 +6909:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 6446 .loc 1 6909 3 view .LVU1981 +6912:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 6447 .loc 1 6912 3 view .LVU1982 +6912:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 6448 .loc 1 6912 7 is_stmt 0 view .LVU1983 + 6449 0002 036A ldr r3, [r0, #32] +6912:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 6450 .loc 1 6912 14 view .LVU1984 + 6451 0004 1022 movs r2, #16 + 6452 0006 9343 bics r3, r2 + 6453 0008 0362 str r3, [r0, #32] +6915:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** /* Get the TIMx CR2 register value */ + 6454 .loc 1 6915 3 is_stmt 1 view .LVU1985 +6915:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** /* Get the TIMx CR2 register value */ + 6455 .loc 1 6915 11 is_stmt 0 view .LVU1986 + 6456 000a 026A ldr r2, [r0, #32] + 6457 .LVL489: +6917:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 6458 .loc 1 6917 3 is_stmt 1 view .LVU1987 +6917:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 6459 .loc 1 6917 10 is_stmt 0 view .LVU1988 + 6460 000c 4568 ldr r5, [r0, #4] + 6461 .LVL490: +6920:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 6462 .loc 1 6920 3 is_stmt 1 view .LVU1989 +6920:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 6463 .loc 1 6920 12 is_stmt 0 view .LVU1990 + 6464 000e 8369 ldr r3, [r0, #24] + 6465 .LVL491: +6923:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** tmpccmrx &= ~TIM_CCMR1_CC2S; + 6466 .loc 1 6923 3 is_stmt 1 view .LVU1991 +6924:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 6467 .loc 1 6924 3 view .LVU1992 +6924:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 6468 .loc 1 6924 12 is_stmt 0 view .LVU1993 + 6469 0010 144C ldr r4, .L359 + 6470 0012 2340 ands r3, r4 + 6471 .LVL492: +6927:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 6472 .loc 1 6927 3 is_stmt 1 view .LVU1994 +6927:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 6473 .loc 1 6927 25 is_stmt 0 view .LVU1995 + ARM GAS /tmp/ccMtK8ce.s page 273 + + + 6474 0014 0C68 ldr r4, [r1] +6927:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 6475 .loc 1 6927 34 view .LVU1996 + 6476 0016 2402 lsls r4, r4, #8 +6927:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 6477 .loc 1 6927 12 view .LVU1997 + 6478 0018 1C43 orrs r4, r3 + 6479 .LVL493: +6930:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** /* Set the Output Compare Polarity */ + 6480 .loc 1 6930 3 is_stmt 1 view .LVU1998 +6930:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** /* Set the Output Compare Polarity */ + 6481 .loc 1 6930 11 is_stmt 0 view .LVU1999 + 6482 001a 2023 movs r3, #32 + 6483 001c 9A43 bics r2, r3 + 6484 .LVL494: +6932:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 6485 .loc 1 6932 3 is_stmt 1 view .LVU2000 +6932:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 6486 .loc 1 6932 24 is_stmt 0 view .LVU2001 + 6487 001e 8B68 ldr r3, [r1, #8] +6932:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 6488 .loc 1 6932 37 view .LVU2002 + 6489 0020 1B01 lsls r3, r3, #4 +6932:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 6490 .loc 1 6932 11 view .LVU2003 + 6491 0022 1343 orrs r3, r2 + 6492 .LVL495: +6934:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** { + 6493 .loc 1 6934 3 is_stmt 1 view .LVU2004 +6934:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** { + 6494 .loc 1 6934 6 is_stmt 0 view .LVU2005 + 6495 0024 104A ldr r2, .L359+4 + 6496 0026 9042 cmp r0, r2 + 6497 0028 06D0 beq .L358 +6947:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** { + 6498 .loc 1 6947 3 is_stmt 1 view .LVU2006 +6947:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** { + 6499 .loc 1 6947 7 is_stmt 0 discriminator 1 view .LVU2007 + 6500 002a 104A ldr r2, .L359+8 + 6501 002c 9042 cmp r0, r2 + 6502 002e 0BD0 beq .L356 +6947:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** { + 6503 .loc 1 6947 7 discriminator 2 view .LVU2008 + 6504 0030 0F4A ldr r2, .L359+12 + 6505 0032 9042 cmp r0, r2 + 6506 0034 10D1 bne .L357 + 6507 0036 07E0 b .L356 + 6508 .L358: +6936:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 6509 .loc 1 6936 5 is_stmt 1 view .LVU2009 +6939:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** /* Set the Output N Polarity */ + 6510 .loc 1 6939 5 view .LVU2010 +6939:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** /* Set the Output N Polarity */ + 6511 .loc 1 6939 13 is_stmt 0 view .LVU2011 + 6512 0038 8022 movs r2, #128 + 6513 003a 9343 bics r3, r2 + 6514 .LVL496: + ARM GAS /tmp/ccMtK8ce.s page 274 + + +6939:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** /* Set the Output N Polarity */ + 6515 .loc 1 6939 13 view .LVU2012 + 6516 003c 1E00 movs r6, r3 + 6517 .LVL497: +6941:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** /* Reset the Output N State */ + 6518 .loc 1 6941 5 is_stmt 1 view .LVU2013 +6941:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** /* Reset the Output N State */ + 6519 .loc 1 6941 26 is_stmt 0 view .LVU2014 + 6520 003e CB68 ldr r3, [r1, #12] + 6521 .LVL498: +6941:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** /* Reset the Output N State */ + 6522 .loc 1 6941 40 view .LVU2015 + 6523 0040 1B01 lsls r3, r3, #4 +6941:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** /* Reset the Output N State */ + 6524 .loc 1 6941 13 view .LVU2016 + 6525 0042 3343 orrs r3, r6 + 6526 .LVL499: +6943:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 6527 .loc 1 6943 5 is_stmt 1 view .LVU2017 +6943:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 6528 .loc 1 6943 13 is_stmt 0 view .LVU2018 + 6529 0044 403A subs r2, r2, #64 + 6530 0046 9343 bics r3, r2 + 6531 .LVL500: +6947:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** { + 6532 .loc 1 6947 3 is_stmt 1 view .LVU2019 + 6533 .L356: +6950:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** assert_param(IS_TIM_OCIDLE_STATE(OC_Config->OCIdleState)); + 6534 .loc 1 6950 5 view .LVU2020 +6951:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 6535 .loc 1 6951 5 view .LVU2021 +6954:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** tmpcr2 &= ~TIM_CR2_OIS2N; + 6536 .loc 1 6954 5 view .LVU2022 +6955:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** /* Set the Output Idle state */ + 6537 .loc 1 6955 5 view .LVU2023 +6955:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** /* Set the Output Idle state */ + 6538 .loc 1 6955 12 is_stmt 0 view .LVU2024 + 6539 0048 0A4A ldr r2, .L359+16 + 6540 004a 1540 ands r5, r2 + 6541 .LVL501: +6957:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** /* Set the Output N Idle state */ + 6542 .loc 1 6957 5 is_stmt 1 view .LVU2025 +6957:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** /* Set the Output N Idle state */ + 6543 .loc 1 6957 25 is_stmt 0 view .LVU2026 + 6544 004c 4A69 ldr r2, [r1, #20] +6957:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** /* Set the Output N Idle state */ + 6545 .loc 1 6957 39 view .LVU2027 + 6546 004e 9200 lsls r2, r2, #2 +6957:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** /* Set the Output N Idle state */ + 6547 .loc 1 6957 12 view .LVU2028 + 6548 0050 2A43 orrs r2, r5 + 6549 .LVL502: +6959:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** } + 6550 .loc 1 6959 5 is_stmt 1 view .LVU2029 +6959:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** } + 6551 .loc 1 6959 25 is_stmt 0 view .LVU2030 + 6552 0052 8D69 ldr r5, [r1, #24] + ARM GAS /tmp/ccMtK8ce.s page 275 + + +6959:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** } + 6553 .loc 1 6959 40 view .LVU2031 + 6554 0054 AD00 lsls r5, r5, #2 +6959:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** } + 6555 .loc 1 6959 12 view .LVU2032 + 6556 0056 1543 orrs r5, r2 + 6557 .LVL503: + 6558 .L357: +6963:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 6559 .loc 1 6963 3 is_stmt 1 view .LVU2033 +6963:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 6560 .loc 1 6963 13 is_stmt 0 view .LVU2034 + 6561 0058 4560 str r5, [r0, #4] +6966:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 6562 .loc 1 6966 3 is_stmt 1 view .LVU2035 +6966:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 6563 .loc 1 6966 15 is_stmt 0 view .LVU2036 + 6564 005a 8461 str r4, [r0, #24] +6969:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 6565 .loc 1 6969 3 is_stmt 1 view .LVU2037 +6969:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 6566 .loc 1 6969 25 is_stmt 0 view .LVU2038 + 6567 005c 4A68 ldr r2, [r1, #4] +6969:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 6568 .loc 1 6969 14 view .LVU2039 + 6569 005e 8263 str r2, [r0, #56] +6972:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** } + 6570 .loc 1 6972 3 is_stmt 1 view .LVU2040 +6972:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** } + 6571 .loc 1 6972 14 is_stmt 0 view .LVU2041 + 6572 0060 0362 str r3, [r0, #32] +6973:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 6573 .loc 1 6973 1 view .LVU2042 + 6574 @ sp needed + 6575 .LVL504: + 6576 .LVL505: +6973:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 6577 .loc 1 6973 1 view .LVU2043 + 6578 0062 70BD pop {r4, r5, r6, pc} + 6579 .L360: + 6580 .align 2 + 6581 .L359: + 6582 0064 FF8CFFFF .word -29441 + 6583 0068 002C0140 .word 1073818624 + 6584 006c 00440140 .word 1073824768 + 6585 0070 00480140 .word 1073825792 + 6586 0074 FFF3FFFF .word -3073 + 6587 .cfi_endproc + 6588 .LFE146: + 6590 .section .text.HAL_TIM_OC_ConfigChannel,"ax",%progbits + 6591 .align 1 + 6592 .global HAL_TIM_OC_ConfigChannel + 6593 .syntax unified + 6594 .code 16 + 6595 .thumb_func + 6597 HAL_TIM_OC_ConfigChannel: + 6598 .LVL506: + ARM GAS /tmp/ccMtK8ce.s page 276 + + + 6599 .LFB99: +4041:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** HAL_StatusTypeDef status = HAL_OK; + 6600 .loc 1 4041 1 is_stmt 1 view -0 + 6601 .cfi_startproc + 6602 @ args = 0, pretend = 0, frame = 0 + 6603 @ frame_needed = 0, uses_anonymous_args = 0 +4041:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** HAL_StatusTypeDef status = HAL_OK; + 6604 .loc 1 4041 1 is_stmt 0 view .LVU2045 + 6605 0000 10B5 push {r4, lr} + 6606 .cfi_def_cfa_offset 8 + 6607 .cfi_offset 4, -8 + 6608 .cfi_offset 14, -4 + 6609 0002 0400 movs r4, r0 +4042:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 6610 .loc 1 4042 3 is_stmt 1 view .LVU2046 + 6611 .LVL507: +4045:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** assert_param(IS_TIM_OC_MODE(sConfig->OCMode)); + 6612 .loc 1 4045 3 view .LVU2047 +4046:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** assert_param(IS_TIM_OC_POLARITY(sConfig->OCPolarity)); + 6613 .loc 1 4046 3 view .LVU2048 +4047:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 6614 .loc 1 4047 3 view .LVU2049 +4050:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 6615 .loc 1 4050 3 view .LVU2050 +4050:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 6616 .loc 1 4050 3 view .LVU2051 + 6617 0004 3C23 movs r3, #60 + 6618 0006 C35C ldrb r3, [r0, r3] + 6619 0008 012B cmp r3, #1 + 6620 000a 24D0 beq .L369 +4050:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 6621 .loc 1 4050 3 discriminator 2 view .LVU2052 + 6622 000c 3C23 movs r3, #60 + 6623 000e 0120 movs r0, #1 + 6624 .LVL508: +4050:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 6625 .loc 1 4050 3 is_stmt 0 discriminator 2 view .LVU2053 + 6626 0010 E054 strb r0, [r4, r3] +4050:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 6627 .loc 1 4050 3 is_stmt 1 discriminator 2 view .LVU2054 +4052:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** { + 6628 .loc 1 4052 3 view .LVU2055 + 6629 0012 082A cmp r2, #8 + 6630 0014 1AD0 beq .L363 + 6631 0016 08D8 bhi .L364 + 6632 0018 002A cmp r2, #0 + 6633 001a 0FD0 beq .L365 + 6634 001c 042A cmp r2, #4 + 6635 001e 11D1 bne .L367 +4067:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 6636 .loc 1 4067 7 view .LVU2056 +4070:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** break; + 6637 .loc 1 4070 7 view .LVU2057 + 6638 0020 2068 ldr r0, [r4] + 6639 0022 FFF7FEFF bl TIM_OC2_SetConfig + 6640 .LVL509: +4071:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** } + ARM GAS /tmp/ccMtK8ce.s page 277 + + + 6641 .loc 1 4071 7 view .LVU2058 +4042:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 6642 .loc 1 4042 21 is_stmt 0 view .LVU2059 + 6643 0026 0020 movs r0, #0 +4071:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** } + 6644 .loc 1 4071 7 view .LVU2060 + 6645 0028 0CE0 b .L367 + 6646 .LVL510: + 6647 .L364: +4052:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** { + 6648 .loc 1 4052 3 view .LVU2061 + 6649 002a 0C2A cmp r2, #12 + 6650 002c 04D1 bne .L370 +4087:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 6651 .loc 1 4087 7 is_stmt 1 view .LVU2062 +4090:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** break; + 6652 .loc 1 4090 7 view .LVU2063 + 6653 002e 2068 ldr r0, [r4] + 6654 0030 FFF7FEFF bl TIM_OC4_SetConfig + 6655 .LVL511: +4091:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** } + 6656 .loc 1 4091 7 view .LVU2064 +4042:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 6657 .loc 1 4042 21 is_stmt 0 view .LVU2065 + 6658 0034 0020 movs r0, #0 +4091:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** } + 6659 .loc 1 4091 7 view .LVU2066 + 6660 0036 05E0 b .L367 + 6661 .LVL512: + 6662 .L370: +4052:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** { + 6663 .loc 1 4052 3 view .LVU2067 + 6664 0038 0120 movs r0, #1 + 6665 003a 03E0 b .L367 + 6666 .L365: +4057:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 6667 .loc 1 4057 7 is_stmt 1 view .LVU2068 +4060:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** break; + 6668 .loc 1 4060 7 view .LVU2069 + 6669 003c 2068 ldr r0, [r4] + 6670 003e FFF7FEFF bl TIM_OC1_SetConfig + 6671 .LVL513: +4061:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** } + 6672 .loc 1 4061 7 view .LVU2070 +4042:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 6673 .loc 1 4042 21 is_stmt 0 view .LVU2071 + 6674 0042 0020 movs r0, #0 + 6675 .L367: + 6676 .LVL514: +4099:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 6677 .loc 1 4099 3 is_stmt 1 view .LVU2072 +4099:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 6678 .loc 1 4099 3 view .LVU2073 + 6679 0044 3C23 movs r3, #60 + 6680 0046 0022 movs r2, #0 + 6681 0048 E254 strb r2, [r4, r3] +4099:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + ARM GAS /tmp/ccMtK8ce.s page 278 + + + 6682 .loc 1 4099 3 view .LVU2074 +4101:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** } + 6683 .loc 1 4101 3 view .LVU2075 + 6684 .LVL515: + 6685 .L362: +4102:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 6686 .loc 1 4102 1 is_stmt 0 view .LVU2076 + 6687 @ sp needed + 6688 .LVL516: +4102:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 6689 .loc 1 4102 1 view .LVU2077 + 6690 004a 10BD pop {r4, pc} + 6691 .LVL517: + 6692 .L363: +4077:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 6693 .loc 1 4077 7 is_stmt 1 view .LVU2078 +4080:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** break; + 6694 .loc 1 4080 7 view .LVU2079 + 6695 004c 2068 ldr r0, [r4] + 6696 004e FFF7FEFF bl TIM_OC3_SetConfig + 6697 .LVL518: +4081:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** } + 6698 .loc 1 4081 7 view .LVU2080 +4042:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 6699 .loc 1 4042 21 is_stmt 0 view .LVU2081 + 6700 0052 0020 movs r0, #0 +4081:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** } + 6701 .loc 1 4081 7 view .LVU2082 + 6702 0054 F6E7 b .L367 + 6703 .LVL519: + 6704 .L369: +4050:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 6705 .loc 1 4050 3 discriminator 1 view .LVU2083 + 6706 0056 0220 movs r0, #2 + 6707 .LVL520: +4050:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 6708 .loc 1 4050 3 discriminator 1 view .LVU2084 + 6709 0058 F7E7 b .L362 + 6710 .cfi_endproc + 6711 .LFE99: + 6713 .section .text.HAL_TIM_PWM_ConfigChannel,"ax",%progbits + 6714 .align 1 + 6715 .global HAL_TIM_PWM_ConfigChannel + 6716 .syntax unified + 6717 .code 16 + 6718 .thumb_func + 6720 HAL_TIM_PWM_ConfigChannel: + 6721 .LVL521: + 6722 .LFB101: +4219:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** HAL_StatusTypeDef status = HAL_OK; + 6723 .loc 1 4219 1 is_stmt 1 view -0 + 6724 .cfi_startproc + 6725 @ args = 0, pretend = 0, frame = 0 + 6726 @ frame_needed = 0, uses_anonymous_args = 0 +4219:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** HAL_StatusTypeDef status = HAL_OK; + 6727 .loc 1 4219 1 is_stmt 0 view .LVU2086 + 6728 0000 70B5 push {r4, r5, r6, lr} + ARM GAS /tmp/ccMtK8ce.s page 279 + + + 6729 .cfi_def_cfa_offset 16 + 6730 .cfi_offset 4, -16 + 6731 .cfi_offset 5, -12 + 6732 .cfi_offset 6, -8 + 6733 .cfi_offset 14, -4 + 6734 0002 0400 movs r4, r0 + 6735 0004 0D00 movs r5, r1 +4220:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 6736 .loc 1 4220 3 is_stmt 1 view .LVU2087 + 6737 .LVL522: +4223:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** assert_param(IS_TIM_PWM_MODE(sConfig->OCMode)); + 6738 .loc 1 4223 3 view .LVU2088 +4224:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** assert_param(IS_TIM_OC_POLARITY(sConfig->OCPolarity)); + 6739 .loc 1 4224 3 view .LVU2089 +4225:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** assert_param(IS_TIM_FAST_STATE(sConfig->OCFastMode)); + 6740 .loc 1 4225 3 view .LVU2090 +4226:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 6741 .loc 1 4226 3 view .LVU2091 +4229:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 6742 .loc 1 4229 3 view .LVU2092 +4229:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 6743 .loc 1 4229 3 view .LVU2093 + 6744 0006 3C23 movs r3, #60 + 6745 0008 C35C ldrb r3, [r0, r3] + 6746 000a 012B cmp r3, #1 + 6747 000c 00D1 bne .LCB5763 + 6748 000e 6AE0 b .L379 @long jump + 6749 .LCB5763: +4229:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 6750 .loc 1 4229 3 discriminator 2 view .LVU2094 + 6751 0010 3C23 movs r3, #60 + 6752 0012 0121 movs r1, #1 + 6753 .LVL523: +4229:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 6754 .loc 1 4229 3 is_stmt 0 discriminator 2 view .LVU2095 + 6755 0014 C154 strb r1, [r0, r3] +4229:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 6756 .loc 1 4229 3 is_stmt 1 discriminator 2 view .LVU2096 +4231:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** { + 6757 .loc 1 4231 3 view .LVU2097 + 6758 0016 082A cmp r2, #8 + 6759 0018 50D0 beq .L373 + 6760 001a 1CD8 bhi .L374 + 6761 001c 002A cmp r2, #0 + 6762 001e 35D0 beq .L375 + 6763 0020 042A cmp r2, #4 + 6764 0022 16D1 bne .L380 +4253:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 6765 .loc 1 4253 7 view .LVU2098 +4256:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 6766 .loc 1 4256 7 view .LVU2099 + 6767 0024 0068 ldr r0, [r0] + 6768 .LVL524: +4256:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 6769 .loc 1 4256 7 is_stmt 0 view .LVU2100 + 6770 0026 2900 movs r1, r5 + 6771 0028 FFF7FEFF bl TIM_OC2_SetConfig + ARM GAS /tmp/ccMtK8ce.s page 280 + + + 6772 .LVL525: +4259:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 6773 .loc 1 4259 7 is_stmt 1 view .LVU2101 +4259:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 6774 .loc 1 4259 11 is_stmt 0 view .LVU2102 + 6775 002c 2268 ldr r2, [r4] +4259:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 6776 .loc 1 4259 21 view .LVU2103 + 6777 002e 9169 ldr r1, [r2, #24] +4259:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 6778 .loc 1 4259 29 view .LVU2104 + 6779 0030 8023 movs r3, #128 + 6780 0032 1B01 lsls r3, r3, #4 + 6781 0034 0B43 orrs r3, r1 + 6782 0036 9361 str r3, [r2, #24] +4262:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** htim->Instance->CCMR1 |= sConfig->OCFastMode << 8U; + 6783 .loc 1 4262 7 is_stmt 1 view .LVU2105 +4262:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** htim->Instance->CCMR1 |= sConfig->OCFastMode << 8U; + 6784 .loc 1 4262 11 is_stmt 0 view .LVU2106 + 6785 0038 2268 ldr r2, [r4] +4262:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** htim->Instance->CCMR1 |= sConfig->OCFastMode << 8U; + 6786 .loc 1 4262 21 view .LVU2107 + 6787 003a 9369 ldr r3, [r2, #24] +4262:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** htim->Instance->CCMR1 |= sConfig->OCFastMode << 8U; + 6788 .loc 1 4262 29 view .LVU2108 + 6789 003c 2B49 ldr r1, .L382 + 6790 003e 0B40 ands r3, r1 + 6791 0040 9361 str r3, [r2, #24] +4263:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** break; + 6792 .loc 1 4263 7 is_stmt 1 view .LVU2109 +4263:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** break; + 6793 .loc 1 4263 11 is_stmt 0 view .LVU2110 + 6794 0042 2168 ldr r1, [r4] +4263:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** break; + 6795 .loc 1 4263 21 view .LVU2111 + 6796 0044 8B69 ldr r3, [r1, #24] +4263:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** break; + 6797 .loc 1 4263 39 view .LVU2112 + 6798 0046 2A69 ldr r2, [r5, #16] +4263:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** break; + 6799 .loc 1 4263 52 view .LVU2113 + 6800 0048 1202 lsls r2, r2, #8 +4263:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** break; + 6801 .loc 1 4263 29 view .LVU2114 + 6802 004a 1343 orrs r3, r2 + 6803 004c 8B61 str r3, [r1, #24] +4264:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** } + 6804 .loc 1 4264 7 is_stmt 1 view .LVU2115 +4220:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 6805 .loc 1 4220 21 is_stmt 0 view .LVU2116 + 6806 004e 0020 movs r0, #0 +4264:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** } + 6807 .loc 1 4264 7 view .LVU2117 + 6808 0050 30E0 b .L377 + 6809 .LVL526: + 6810 .L380: +4231:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** { + ARM GAS /tmp/ccMtK8ce.s page 281 + + + 6811 .loc 1 4231 3 view .LVU2118 + 6812 0052 0120 movs r0, #1 + 6813 .LVL527: +4231:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** { + 6814 .loc 1 4231 3 view .LVU2119 + 6815 0054 2EE0 b .L377 + 6816 .LVL528: + 6817 .L374: +4231:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** { + 6818 .loc 1 4231 3 view .LVU2120 + 6819 0056 0C2A cmp r2, #12 + 6820 0058 16D1 bne .L381 +4287:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 6821 .loc 1 4287 7 is_stmt 1 view .LVU2121 +4290:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 6822 .loc 1 4290 7 view .LVU2122 + 6823 005a 0068 ldr r0, [r0] + 6824 .LVL529: +4290:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 6825 .loc 1 4290 7 is_stmt 0 view .LVU2123 + 6826 005c 2900 movs r1, r5 + 6827 005e FFF7FEFF bl TIM_OC4_SetConfig + 6828 .LVL530: +4293:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 6829 .loc 1 4293 7 is_stmt 1 view .LVU2124 +4293:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 6830 .loc 1 4293 11 is_stmt 0 view .LVU2125 + 6831 0062 2268 ldr r2, [r4] +4293:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 6832 .loc 1 4293 21 view .LVU2126 + 6833 0064 D169 ldr r1, [r2, #28] +4293:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 6834 .loc 1 4293 29 view .LVU2127 + 6835 0066 8023 movs r3, #128 + 6836 0068 1B01 lsls r3, r3, #4 + 6837 006a 0B43 orrs r3, r1 + 6838 006c D361 str r3, [r2, #28] +4296:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** htim->Instance->CCMR2 |= sConfig->OCFastMode << 8U; + 6839 .loc 1 4296 7 is_stmt 1 view .LVU2128 +4296:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** htim->Instance->CCMR2 |= sConfig->OCFastMode << 8U; + 6840 .loc 1 4296 11 is_stmt 0 view .LVU2129 + 6841 006e 2268 ldr r2, [r4] +4296:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** htim->Instance->CCMR2 |= sConfig->OCFastMode << 8U; + 6842 .loc 1 4296 21 view .LVU2130 + 6843 0070 D369 ldr r3, [r2, #28] +4296:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** htim->Instance->CCMR2 |= sConfig->OCFastMode << 8U; + 6844 .loc 1 4296 29 view .LVU2131 + 6845 0072 1E49 ldr r1, .L382 + 6846 0074 0B40 ands r3, r1 + 6847 0076 D361 str r3, [r2, #28] +4297:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** break; + 6848 .loc 1 4297 7 is_stmt 1 view .LVU2132 +4297:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** break; + 6849 .loc 1 4297 11 is_stmt 0 view .LVU2133 + 6850 0078 2168 ldr r1, [r4] +4297:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** break; + 6851 .loc 1 4297 21 view .LVU2134 + ARM GAS /tmp/ccMtK8ce.s page 282 + + + 6852 007a CB69 ldr r3, [r1, #28] +4297:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** break; + 6853 .loc 1 4297 39 view .LVU2135 + 6854 007c 2A69 ldr r2, [r5, #16] +4297:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** break; + 6855 .loc 1 4297 52 view .LVU2136 + 6856 007e 1202 lsls r2, r2, #8 +4297:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** break; + 6857 .loc 1 4297 29 view .LVU2137 + 6858 0080 1343 orrs r3, r2 + 6859 0082 CB61 str r3, [r1, #28] +4298:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** } + 6860 .loc 1 4298 7 is_stmt 1 view .LVU2138 +4220:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 6861 .loc 1 4220 21 is_stmt 0 view .LVU2139 + 6862 0084 0020 movs r0, #0 +4298:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** } + 6863 .loc 1 4298 7 view .LVU2140 + 6864 0086 15E0 b .L377 + 6865 .LVL531: + 6866 .L381: +4231:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** { + 6867 .loc 1 4231 3 view .LVU2141 + 6868 0088 0120 movs r0, #1 + 6869 .LVL532: +4231:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** { + 6870 .loc 1 4231 3 view .LVU2142 + 6871 008a 13E0 b .L377 + 6872 .LVL533: + 6873 .L375: +4236:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 6874 .loc 1 4236 7 is_stmt 1 view .LVU2143 +4239:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 6875 .loc 1 4239 7 view .LVU2144 + 6876 008c 0068 ldr r0, [r0] + 6877 .LVL534: +4239:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 6878 .loc 1 4239 7 is_stmt 0 view .LVU2145 + 6879 008e 2900 movs r1, r5 + 6880 0090 FFF7FEFF bl TIM_OC1_SetConfig + 6881 .LVL535: +4242:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 6882 .loc 1 4242 7 is_stmt 1 view .LVU2146 +4242:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 6883 .loc 1 4242 11 is_stmt 0 view .LVU2147 + 6884 0094 2268 ldr r2, [r4] +4242:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 6885 .loc 1 4242 21 view .LVU2148 + 6886 0096 9369 ldr r3, [r2, #24] +4242:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 6887 .loc 1 4242 29 view .LVU2149 + 6888 0098 0821 movs r1, #8 + 6889 009a 0B43 orrs r3, r1 + 6890 009c 9361 str r3, [r2, #24] +4245:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** htim->Instance->CCMR1 |= sConfig->OCFastMode; + 6891 .loc 1 4245 7 is_stmt 1 view .LVU2150 +4245:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** htim->Instance->CCMR1 |= sConfig->OCFastMode; + ARM GAS /tmp/ccMtK8ce.s page 283 + + + 6892 .loc 1 4245 11 is_stmt 0 view .LVU2151 + 6893 009e 2268 ldr r2, [r4] +4245:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** htim->Instance->CCMR1 |= sConfig->OCFastMode; + 6894 .loc 1 4245 21 view .LVU2152 + 6895 00a0 9369 ldr r3, [r2, #24] +4245:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** htim->Instance->CCMR1 |= sConfig->OCFastMode; + 6896 .loc 1 4245 29 view .LVU2153 + 6897 00a2 0439 subs r1, r1, #4 + 6898 00a4 8B43 bics r3, r1 + 6899 00a6 9361 str r3, [r2, #24] +4246:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** break; + 6900 .loc 1 4246 7 is_stmt 1 view .LVU2154 +4246:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** break; + 6901 .loc 1 4246 11 is_stmt 0 view .LVU2155 + 6902 00a8 2268 ldr r2, [r4] +4246:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** break; + 6903 .loc 1 4246 21 view .LVU2156 + 6904 00aa 9369 ldr r3, [r2, #24] +4246:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** break; + 6905 .loc 1 4246 39 view .LVU2157 + 6906 00ac 2969 ldr r1, [r5, #16] +4246:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** break; + 6907 .loc 1 4246 29 view .LVU2158 + 6908 00ae 0B43 orrs r3, r1 + 6909 00b0 9361 str r3, [r2, #24] +4247:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** } + 6910 .loc 1 4247 7 is_stmt 1 view .LVU2159 +4220:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 6911 .loc 1 4220 21 is_stmt 0 view .LVU2160 + 6912 00b2 0020 movs r0, #0 + 6913 .L377: + 6914 .LVL536: +4306:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 6915 .loc 1 4306 3 is_stmt 1 view .LVU2161 +4306:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 6916 .loc 1 4306 3 view .LVU2162 + 6917 00b4 3C23 movs r3, #60 + 6918 00b6 0022 movs r2, #0 + 6919 00b8 E254 strb r2, [r4, r3] +4306:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 6920 .loc 1 4306 3 view .LVU2163 +4308:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** } + 6921 .loc 1 4308 3 view .LVU2164 + 6922 .LVL537: + 6923 .L372: +4309:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 6924 .loc 1 4309 1 is_stmt 0 view .LVU2165 + 6925 @ sp needed + 6926 .LVL538: + 6927 .LVL539: +4309:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 6928 .loc 1 4309 1 view .LVU2166 + 6929 00ba 70BD pop {r4, r5, r6, pc} + 6930 .LVL540: + 6931 .L373: +4270:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 6932 .loc 1 4270 7 is_stmt 1 view .LVU2167 + ARM GAS /tmp/ccMtK8ce.s page 284 + + +4273:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 6933 .loc 1 4273 7 view .LVU2168 + 6934 00bc 0068 ldr r0, [r0] + 6935 .LVL541: +4273:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 6936 .loc 1 4273 7 is_stmt 0 view .LVU2169 + 6937 00be 2900 movs r1, r5 + 6938 00c0 FFF7FEFF bl TIM_OC3_SetConfig + 6939 .LVL542: +4276:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 6940 .loc 1 4276 7 is_stmt 1 view .LVU2170 +4276:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 6941 .loc 1 4276 11 is_stmt 0 view .LVU2171 + 6942 00c4 2268 ldr r2, [r4] +4276:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 6943 .loc 1 4276 21 view .LVU2172 + 6944 00c6 D369 ldr r3, [r2, #28] +4276:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 6945 .loc 1 4276 29 view .LVU2173 + 6946 00c8 0821 movs r1, #8 + 6947 00ca 0B43 orrs r3, r1 + 6948 00cc D361 str r3, [r2, #28] +4279:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** htim->Instance->CCMR2 |= sConfig->OCFastMode; + 6949 .loc 1 4279 7 is_stmt 1 view .LVU2174 +4279:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** htim->Instance->CCMR2 |= sConfig->OCFastMode; + 6950 .loc 1 4279 11 is_stmt 0 view .LVU2175 + 6951 00ce 2268 ldr r2, [r4] +4279:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** htim->Instance->CCMR2 |= sConfig->OCFastMode; + 6952 .loc 1 4279 21 view .LVU2176 + 6953 00d0 D369 ldr r3, [r2, #28] +4279:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** htim->Instance->CCMR2 |= sConfig->OCFastMode; + 6954 .loc 1 4279 29 view .LVU2177 + 6955 00d2 0439 subs r1, r1, #4 + 6956 00d4 8B43 bics r3, r1 + 6957 00d6 D361 str r3, [r2, #28] +4280:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** break; + 6958 .loc 1 4280 7 is_stmt 1 view .LVU2178 +4280:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** break; + 6959 .loc 1 4280 11 is_stmt 0 view .LVU2179 + 6960 00d8 2268 ldr r2, [r4] +4280:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** break; + 6961 .loc 1 4280 21 view .LVU2180 + 6962 00da D369 ldr r3, [r2, #28] +4280:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** break; + 6963 .loc 1 4280 39 view .LVU2181 + 6964 00dc 2969 ldr r1, [r5, #16] +4280:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** break; + 6965 .loc 1 4280 29 view .LVU2182 + 6966 00de 0B43 orrs r3, r1 + 6967 00e0 D361 str r3, [r2, #28] +4281:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** } + 6968 .loc 1 4281 7 is_stmt 1 view .LVU2183 +4220:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 6969 .loc 1 4220 21 is_stmt 0 view .LVU2184 + 6970 00e2 0020 movs r0, #0 +4281:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** } + 6971 .loc 1 4281 7 view .LVU2185 + ARM GAS /tmp/ccMtK8ce.s page 285 + + + 6972 00e4 E6E7 b .L377 + 6973 .LVL543: + 6974 .L379: +4229:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 6975 .loc 1 4229 3 discriminator 1 view .LVU2186 + 6976 00e6 0220 movs r0, #2 + 6977 .LVL544: +4229:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 6978 .loc 1 4229 3 discriminator 1 view .LVU2187 + 6979 00e8 E7E7 b .L372 + 6980 .L383: + 6981 00ea C046 .align 2 + 6982 .L382: + 6983 00ec FFFBFFFF .word -1025 + 6984 .cfi_endproc + 6985 .LFE101: + 6987 .section .text.TIM_TI1_SetConfig,"ax",%progbits + 6988 .align 1 + 6989 .global TIM_TI1_SetConfig + 6990 .syntax unified + 6991 .code 16 + 6992 .thumb_func + 6994 TIM_TI1_SetConfig: + 6995 .LVL545: + 6996 .LFB150: +7251:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** uint32_t tmpccmr1; + 6997 .loc 1 7251 1 is_stmt 1 view -0 + 6998 .cfi_startproc + 6999 @ args = 0, pretend = 0, frame = 0 + 7000 @ frame_needed = 0, uses_anonymous_args = 0 +7251:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** uint32_t tmpccmr1; + 7001 .loc 1 7251 1 is_stmt 0 view .LVU2189 + 7002 0000 70B5 push {r4, r5, r6, lr} + 7003 .cfi_def_cfa_offset 16 + 7004 .cfi_offset 4, -16 + 7005 .cfi_offset 5, -12 + 7006 .cfi_offset 6, -8 + 7007 .cfi_offset 14, -4 + 7008 0002 1600 movs r6, r2 +7252:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** uint32_t tmpccer; + 7009 .loc 1 7252 3 is_stmt 1 view .LVU2190 +7253:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 7010 .loc 1 7253 3 view .LVU2191 +7256:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** tmpccmr1 = TIMx->CCMR1; + 7011 .loc 1 7256 3 view .LVU2192 +7256:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** tmpccmr1 = TIMx->CCMR1; + 7012 .loc 1 7256 7 is_stmt 0 view .LVU2193 + 7013 0004 026A ldr r2, [r0, #32] + 7014 .LVL546: +7256:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** tmpccmr1 = TIMx->CCMR1; + 7015 .loc 1 7256 14 view .LVU2194 + 7016 0006 0124 movs r4, #1 + 7017 0008 A243 bics r2, r4 + 7018 000a 0262 str r2, [r0, #32] +7257:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** tmpccer = TIMx->CCER; + 7019 .loc 1 7257 3 is_stmt 1 view .LVU2195 +7257:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** tmpccer = TIMx->CCER; + ARM GAS /tmp/ccMtK8ce.s page 286 + + + 7020 .loc 1 7257 12 is_stmt 0 view .LVU2196 + 7021 000c 8269 ldr r2, [r0, #24] + 7022 .LVL547: +7258:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 7023 .loc 1 7258 3 is_stmt 1 view .LVU2197 +7258:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 7024 .loc 1 7258 11 is_stmt 0 view .LVU2198 + 7025 000e 046A ldr r4, [r0, #32] + 7026 .LVL548: +7261:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** { + 7027 .loc 1 7261 3 is_stmt 1 view .LVU2199 +7261:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** { + 7028 .loc 1 7261 7 is_stmt 0 view .LVU2200 + 7029 0010 0E4D ldr r5, .L387 + 7030 0012 A842 cmp r0, r5 + 7031 0014 09D0 beq .L385 +7261:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** { + 7032 .loc 1 7261 7 discriminator 2 view .LVU2201 + 7033 0016 8025 movs r5, #128 + 7034 0018 ED05 lsls r5, r5, #23 + 7035 001a A842 cmp r0, r5 + 7036 001c 05D0 beq .L385 +7261:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** { + 7037 .loc 1 7261 7 discriminator 4 view .LVU2202 + 7038 001e 0C4D ldr r5, .L387+4 + 7039 0020 A842 cmp r0, r5 + 7040 0022 02D0 beq .L385 +7268:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** } + 7041 .loc 1 7268 5 is_stmt 1 view .LVU2203 +7268:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** } + 7042 .loc 1 7268 14 is_stmt 0 view .LVU2204 + 7043 0024 0125 movs r5, #1 + 7044 0026 2A43 orrs r2, r5 + 7045 .LVL549: +7268:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** } + 7046 .loc 1 7268 14 view .LVU2205 + 7047 0028 02E0 b .L386 + 7048 .L385: +7263:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** tmpccmr1 |= TIM_ICSelection; + 7049 .loc 1 7263 5 is_stmt 1 view .LVU2206 +7263:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** tmpccmr1 |= TIM_ICSelection; + 7050 .loc 1 7263 14 is_stmt 0 view .LVU2207 + 7051 002a 0325 movs r5, #3 + 7052 002c AA43 bics r2, r5 + 7053 .LVL550: +7264:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** } + 7054 .loc 1 7264 5 is_stmt 1 view .LVU2208 +7264:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** } + 7055 .loc 1 7264 14 is_stmt 0 view .LVU2209 + 7056 002e 3243 orrs r2, r6 + 7057 .LVL551: + 7058 .L386: +7272:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** tmpccmr1 |= ((TIM_ICFilter << 4U) & TIM_CCMR1_IC1F); + 7059 .loc 1 7272 3 is_stmt 1 view .LVU2210 +7272:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** tmpccmr1 |= ((TIM_ICFilter << 4U) & TIM_CCMR1_IC1F); + 7060 .loc 1 7272 12 is_stmt 0 view .LVU2211 + 7061 0030 F025 movs r5, #240 + ARM GAS /tmp/ccMtK8ce.s page 287 + + + 7062 0032 AA43 bics r2, r5 + 7063 .LVL552: +7273:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 7064 .loc 1 7273 3 is_stmt 1 view .LVU2212 +7273:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 7065 .loc 1 7273 30 is_stmt 0 view .LVU2213 + 7066 0034 1D01 lsls r5, r3, #4 +7273:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 7067 .loc 1 7273 37 view .LVU2214 + 7068 0036 FF23 movs r3, #255 + 7069 .LVL553: +7273:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 7070 .loc 1 7273 37 view .LVU2215 + 7071 0038 2B40 ands r3, r5 +7273:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 7072 .loc 1 7273 12 view .LVU2216 + 7073 003a 1343 orrs r3, r2 + 7074 .LVL554: +7276:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** tmpccer |= (TIM_ICPolarity & (TIM_CCER_CC1P | TIM_CCER_CC1NP)); + 7075 .loc 1 7276 3 is_stmt 1 view .LVU2217 +7276:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** tmpccer |= (TIM_ICPolarity & (TIM_CCER_CC1P | TIM_CCER_CC1NP)); + 7076 .loc 1 7276 11 is_stmt 0 view .LVU2218 + 7077 003c 0A22 movs r2, #10 + 7078 003e 9443 bics r4, r2 + 7079 .LVL555: +7277:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 7080 .loc 1 7277 3 is_stmt 1 view .LVU2219 +7277:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 7081 .loc 1 7277 30 is_stmt 0 view .LVU2220 + 7082 0040 0A40 ands r2, r1 +7277:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 7083 .loc 1 7277 11 view .LVU2221 + 7084 0042 2243 orrs r2, r4 + 7085 .LVL556: +7280:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** TIMx->CCER = tmpccer; + 7086 .loc 1 7280 3 is_stmt 1 view .LVU2222 +7280:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** TIMx->CCER = tmpccer; + 7087 .loc 1 7280 15 is_stmt 0 view .LVU2223 + 7088 0044 8361 str r3, [r0, #24] +7281:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** } + 7089 .loc 1 7281 3 is_stmt 1 view .LVU2224 +7281:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** } + 7090 .loc 1 7281 14 is_stmt 0 view .LVU2225 + 7091 0046 0262 str r2, [r0, #32] +7282:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 7092 .loc 1 7282 1 view .LVU2226 + 7093 @ sp needed + 7094 .LVL557: +7282:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 7095 .loc 1 7282 1 view .LVU2227 + 7096 0048 70BD pop {r4, r5, r6, pc} + 7097 .L388: + 7098 004a C046 .align 2 + 7099 .L387: + 7100 004c 002C0140 .word 1073818624 + 7101 0050 00040040 .word 1073742848 + 7102 .cfi_endproc + ARM GAS /tmp/ccMtK8ce.s page 288 + + + 7103 .LFE150: + 7105 .section .text.HAL_TIM_IC_ConfigChannel,"ax",%progbits + 7106 .align 1 + 7107 .global HAL_TIM_IC_ConfigChannel + 7108 .syntax unified + 7109 .code 16 + 7110 .thumb_func + 7112 HAL_TIM_IC_ConfigChannel: + 7113 .LVL558: + 7114 .LFB100: +4118:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** HAL_StatusTypeDef status = HAL_OK; + 7115 .loc 1 4118 1 is_stmt 1 view -0 + 7116 .cfi_startproc + 7117 @ args = 0, pretend = 0, frame = 0 + 7118 @ frame_needed = 0, uses_anonymous_args = 0 +4118:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** HAL_StatusTypeDef status = HAL_OK; + 7119 .loc 1 4118 1 is_stmt 0 view .LVU2229 + 7120 0000 70B5 push {r4, r5, r6, lr} + 7121 .cfi_def_cfa_offset 16 + 7122 .cfi_offset 4, -16 + 7123 .cfi_offset 5, -12 + 7124 .cfi_offset 6, -8 + 7125 .cfi_offset 14, -4 + 7126 0002 0400 movs r4, r0 + 7127 0004 0D00 movs r5, r1 +4119:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 7128 .loc 1 4119 3 is_stmt 1 view .LVU2230 + 7129 .LVL559: +4122:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** assert_param(IS_TIM_IC_POLARITY(sConfig->ICPolarity)); + 7130 .loc 1 4122 3 view .LVU2231 +4123:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** assert_param(IS_TIM_IC_SELECTION(sConfig->ICSelection)); + 7131 .loc 1 4123 3 view .LVU2232 +4124:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** assert_param(IS_TIM_IC_PRESCALER(sConfig->ICPrescaler)); + 7132 .loc 1 4124 3 view .LVU2233 +4125:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** assert_param(IS_TIM_IC_FILTER(sConfig->ICFilter)); + 7133 .loc 1 4125 3 view .LVU2234 +4126:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 7134 .loc 1 4126 3 view .LVU2235 +4129:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 7135 .loc 1 4129 3 view .LVU2236 +4129:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 7136 .loc 1 4129 3 view .LVU2237 + 7137 0006 3C23 movs r3, #60 + 7138 0008 C35C ldrb r3, [r0, r3] + 7139 000a 012B cmp r3, #1 + 7140 000c 59D0 beq .L395 +4129:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 7141 .loc 1 4129 3 discriminator 2 view .LVU2238 + 7142 000e 3C23 movs r3, #60 + 7143 0010 0121 movs r1, #1 + 7144 .LVL560: +4129:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 7145 .loc 1 4129 3 is_stmt 0 discriminator 2 view .LVU2239 + 7146 0012 C154 strb r1, [r0, r3] +4129:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 7147 .loc 1 4129 3 is_stmt 1 discriminator 2 view .LVU2240 +4131:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** { + ARM GAS /tmp/ccMtK8ce.s page 289 + + + 7148 .loc 1 4131 3 view .LVU2241 +4131:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** { + 7149 .loc 1 4131 6 is_stmt 0 view .LVU2242 + 7150 0014 002A cmp r2, #0 + 7151 0016 0AD0 beq .L397 +4145:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** { + 7152 .loc 1 4145 8 is_stmt 1 view .LVU2243 +4145:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** { + 7153 .loc 1 4145 11 is_stmt 0 view .LVU2244 + 7154 0018 042A cmp r2, #4 + 7155 001a 1AD0 beq .L398 +4161:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** { + 7156 .loc 1 4161 8 is_stmt 1 view .LVU2245 +4161:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** { + 7157 .loc 1 4161 11 is_stmt 0 view .LVU2246 + 7158 001c 082A cmp r2, #8 + 7159 001e 2BD0 beq .L399 +4177:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** { + 7160 .loc 1 4177 8 is_stmt 1 view .LVU2247 +4177:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** { + 7161 .loc 1 4177 11 is_stmt 0 view .LVU2248 + 7162 0020 0C2A cmp r2, #12 + 7163 0022 3BD0 beq .L400 +4195:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** } + 7164 .loc 1 4195 12 view .LVU2249 + 7165 0024 0120 movs r0, #1 + 7166 .LVL561: + 7167 .L392: +4198:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 7168 .loc 1 4198 3 is_stmt 1 view .LVU2250 +4198:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 7169 .loc 1 4198 3 view .LVU2251 + 7170 0026 3C23 movs r3, #60 + 7171 0028 0022 movs r2, #0 + 7172 002a E254 strb r2, [r4, r3] +4198:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 7173 .loc 1 4198 3 view .LVU2252 +4200:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** } + 7174 .loc 1 4200 3 view .LVU2253 + 7175 .LVL562: + 7176 .L390: +4201:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 7177 .loc 1 4201 1 is_stmt 0 view .LVU2254 + 7178 @ sp needed + 7179 .LVL563: + 7180 .LVL564: +4201:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 7181 .loc 1 4201 1 view .LVU2255 + 7182 002c 70BD pop {r4, r5, r6, pc} + 7183 .LVL565: + 7184 .L397: +4134:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** sConfig->ICPolarity, + 7185 .loc 1 4134 5 is_stmt 1 view .LVU2256 +4135:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** sConfig->ICSelection, + 7186 .loc 1 4135 30 is_stmt 0 view .LVU2257 + 7187 002e 2968 ldr r1, [r5] +4136:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** sConfig->ICFilter); + ARM GAS /tmp/ccMtK8ce.s page 290 + + + 7188 .loc 1 4136 30 view .LVU2258 + 7189 0030 6A68 ldr r2, [r5, #4] + 7190 .LVL566: +4137:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 7191 .loc 1 4137 30 view .LVU2259 + 7192 0032 EB68 ldr r3, [r5, #12] +4134:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** sConfig->ICPolarity, + 7193 .loc 1 4134 5 view .LVU2260 + 7194 0034 0068 ldr r0, [r0] + 7195 .LVL567: +4134:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** sConfig->ICPolarity, + 7196 .loc 1 4134 5 view .LVU2261 + 7197 0036 FFF7FEFF bl TIM_TI1_SetConfig + 7198 .LVL568: +4140:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 7199 .loc 1 4140 5 is_stmt 1 view .LVU2262 +4140:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 7200 .loc 1 4140 9 is_stmt 0 view .LVU2263 + 7201 003a 2268 ldr r2, [r4] +4140:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 7202 .loc 1 4140 19 view .LVU2264 + 7203 003c 9369 ldr r3, [r2, #24] +4140:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 7204 .loc 1 4140 27 view .LVU2265 + 7205 003e 0C21 movs r1, #12 + 7206 0040 8B43 bics r3, r1 + 7207 0042 9361 str r3, [r2, #24] +4143:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** } + 7208 .loc 1 4143 5 is_stmt 1 view .LVU2266 +4143:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** } + 7209 .loc 1 4143 9 is_stmt 0 view .LVU2267 + 7210 0044 2268 ldr r2, [r4] +4143:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** } + 7211 .loc 1 4143 19 view .LVU2268 + 7212 0046 9369 ldr r3, [r2, #24] +4143:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** } + 7213 .loc 1 4143 37 view .LVU2269 + 7214 0048 A968 ldr r1, [r5, #8] +4143:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** } + 7215 .loc 1 4143 27 view .LVU2270 + 7216 004a 0B43 orrs r3, r1 + 7217 004c 9361 str r3, [r2, #24] +4119:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 7218 .loc 1 4119 21 view .LVU2271 + 7219 004e 0020 movs r0, #0 + 7220 0050 E9E7 b .L392 + 7221 .LVL569: + 7222 .L398: +4148:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 7223 .loc 1 4148 5 is_stmt 1 view .LVU2272 +4150:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** sConfig->ICPolarity, + 7224 .loc 1 4150 5 view .LVU2273 +4151:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** sConfig->ICSelection, + 7225 .loc 1 4151 30 is_stmt 0 view .LVU2274 + 7226 0052 2968 ldr r1, [r5] +4152:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** sConfig->ICFilter); + 7227 .loc 1 4152 30 view .LVU2275 + ARM GAS /tmp/ccMtK8ce.s page 291 + + + 7228 0054 6A68 ldr r2, [r5, #4] + 7229 .LVL570: +4153:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 7230 .loc 1 4153 30 view .LVU2276 + 7231 0056 EB68 ldr r3, [r5, #12] +4150:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** sConfig->ICPolarity, + 7232 .loc 1 4150 5 view .LVU2277 + 7233 0058 0068 ldr r0, [r0] + 7234 .LVL571: +4150:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** sConfig->ICPolarity, + 7235 .loc 1 4150 5 view .LVU2278 + 7236 005a FFF7FEFF bl TIM_TI2_SetConfig + 7237 .LVL572: +4156:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 7238 .loc 1 4156 5 is_stmt 1 view .LVU2279 +4156:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 7239 .loc 1 4156 9 is_stmt 0 view .LVU2280 + 7240 005e 2268 ldr r2, [r4] +4156:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 7241 .loc 1 4156 19 view .LVU2281 + 7242 0060 9369 ldr r3, [r2, #24] +4156:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 7243 .loc 1 4156 27 view .LVU2282 + 7244 0062 1949 ldr r1, .L401 + 7245 0064 0B40 ands r3, r1 + 7246 0066 9361 str r3, [r2, #24] +4159:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** } + 7247 .loc 1 4159 5 is_stmt 1 view .LVU2283 +4159:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** } + 7248 .loc 1 4159 9 is_stmt 0 view .LVU2284 + 7249 0068 2168 ldr r1, [r4] +4159:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** } + 7250 .loc 1 4159 19 view .LVU2285 + 7251 006a 8B69 ldr r3, [r1, #24] +4159:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** } + 7252 .loc 1 4159 38 view .LVU2286 + 7253 006c AA68 ldr r2, [r5, #8] +4159:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** } + 7254 .loc 1 4159 52 view .LVU2287 + 7255 006e 1202 lsls r2, r2, #8 +4159:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** } + 7256 .loc 1 4159 27 view .LVU2288 + 7257 0070 1343 orrs r3, r2 + 7258 0072 8B61 str r3, [r1, #24] +4119:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 7259 .loc 1 4119 21 view .LVU2289 + 7260 0074 0020 movs r0, #0 + 7261 0076 D6E7 b .L392 + 7262 .LVL573: + 7263 .L399: +4164:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 7264 .loc 1 4164 5 is_stmt 1 view .LVU2290 +4166:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** sConfig->ICPolarity, + 7265 .loc 1 4166 5 view .LVU2291 +4167:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** sConfig->ICSelection, + 7266 .loc 1 4167 30 is_stmt 0 view .LVU2292 + 7267 0078 2968 ldr r1, [r5] + ARM GAS /tmp/ccMtK8ce.s page 292 + + +4168:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** sConfig->ICFilter); + 7268 .loc 1 4168 30 view .LVU2293 + 7269 007a 6A68 ldr r2, [r5, #4] + 7270 .LVL574: +4169:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 7271 .loc 1 4169 30 view .LVU2294 + 7272 007c EB68 ldr r3, [r5, #12] +4166:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** sConfig->ICPolarity, + 7273 .loc 1 4166 5 view .LVU2295 + 7274 007e 0068 ldr r0, [r0] + 7275 .LVL575: +4166:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** sConfig->ICPolarity, + 7276 .loc 1 4166 5 view .LVU2296 + 7277 0080 FFF7FEFF bl TIM_TI3_SetConfig + 7278 .LVL576: +4172:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 7279 .loc 1 4172 5 is_stmt 1 view .LVU2297 +4172:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 7280 .loc 1 4172 9 is_stmt 0 view .LVU2298 + 7281 0084 2268 ldr r2, [r4] +4172:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 7282 .loc 1 4172 19 view .LVU2299 + 7283 0086 D369 ldr r3, [r2, #28] +4172:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 7284 .loc 1 4172 27 view .LVU2300 + 7285 0088 0C21 movs r1, #12 + 7286 008a 8B43 bics r3, r1 + 7287 008c D361 str r3, [r2, #28] +4175:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** } + 7288 .loc 1 4175 5 is_stmt 1 view .LVU2301 +4175:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** } + 7289 .loc 1 4175 9 is_stmt 0 view .LVU2302 + 7290 008e 2268 ldr r2, [r4] +4175:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** } + 7291 .loc 1 4175 19 view .LVU2303 + 7292 0090 D369 ldr r3, [r2, #28] +4175:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** } + 7293 .loc 1 4175 37 view .LVU2304 + 7294 0092 A968 ldr r1, [r5, #8] +4175:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** } + 7295 .loc 1 4175 27 view .LVU2305 + 7296 0094 0B43 orrs r3, r1 + 7297 0096 D361 str r3, [r2, #28] +4119:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 7298 .loc 1 4119 21 view .LVU2306 + 7299 0098 0020 movs r0, #0 + 7300 009a C4E7 b .L392 + 7301 .LVL577: + 7302 .L400: +4180:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 7303 .loc 1 4180 5 is_stmt 1 view .LVU2307 +4182:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** sConfig->ICPolarity, + 7304 .loc 1 4182 5 view .LVU2308 +4183:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** sConfig->ICSelection, + 7305 .loc 1 4183 30 is_stmt 0 view .LVU2309 + 7306 009c 2968 ldr r1, [r5] +4184:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** sConfig->ICFilter); + ARM GAS /tmp/ccMtK8ce.s page 293 + + + 7307 .loc 1 4184 30 view .LVU2310 + 7308 009e 6A68 ldr r2, [r5, #4] + 7309 .LVL578: +4185:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 7310 .loc 1 4185 30 view .LVU2311 + 7311 00a0 EB68 ldr r3, [r5, #12] +4182:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** sConfig->ICPolarity, + 7312 .loc 1 4182 5 view .LVU2312 + 7313 00a2 0068 ldr r0, [r0] + 7314 .LVL579: +4182:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** sConfig->ICPolarity, + 7315 .loc 1 4182 5 view .LVU2313 + 7316 00a4 FFF7FEFF bl TIM_TI4_SetConfig + 7317 .LVL580: +4188:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 7318 .loc 1 4188 5 is_stmt 1 view .LVU2314 +4188:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 7319 .loc 1 4188 9 is_stmt 0 view .LVU2315 + 7320 00a8 2268 ldr r2, [r4] +4188:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 7321 .loc 1 4188 19 view .LVU2316 + 7322 00aa D369 ldr r3, [r2, #28] +4188:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 7323 .loc 1 4188 27 view .LVU2317 + 7324 00ac 0649 ldr r1, .L401 + 7325 00ae 0B40 ands r3, r1 + 7326 00b0 D361 str r3, [r2, #28] +4191:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** } + 7327 .loc 1 4191 5 is_stmt 1 view .LVU2318 +4191:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** } + 7328 .loc 1 4191 9 is_stmt 0 view .LVU2319 + 7329 00b2 2168 ldr r1, [r4] +4191:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** } + 7330 .loc 1 4191 19 view .LVU2320 + 7331 00b4 CB69 ldr r3, [r1, #28] +4191:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** } + 7332 .loc 1 4191 38 view .LVU2321 + 7333 00b6 AA68 ldr r2, [r5, #8] +4191:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** } + 7334 .loc 1 4191 52 view .LVU2322 + 7335 00b8 1202 lsls r2, r2, #8 +4191:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** } + 7336 .loc 1 4191 27 view .LVU2323 + 7337 00ba 1343 orrs r3, r2 + 7338 00bc CB61 str r3, [r1, #28] +4119:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 7339 .loc 1 4119 21 view .LVU2324 + 7340 00be 0020 movs r0, #0 + 7341 00c0 B1E7 b .L392 + 7342 .LVL581: + 7343 .L395: +4129:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 7344 .loc 1 4129 3 discriminator 1 view .LVU2325 + 7345 00c2 0220 movs r0, #2 + 7346 .LVL582: +4129:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 7347 .loc 1 4129 3 discriminator 1 view .LVU2326 + ARM GAS /tmp/ccMtK8ce.s page 294 + + + 7348 00c4 B2E7 b .L390 + 7349 .L402: + 7350 00c6 C046 .align 2 + 7351 .L401: + 7352 00c8 FFF3FFFF .word -3073 + 7353 .cfi_endproc + 7354 .LFE100: + 7356 .section .text.HAL_TIM_OnePulse_ConfigChannel,"ax",%progbits + 7357 .align 1 + 7358 .global HAL_TIM_OnePulse_ConfigChannel + 7359 .syntax unified + 7360 .code 16 + 7361 .thumb_func + 7363 HAL_TIM_OnePulse_ConfigChannel: + 7364 .LVL583: + 7365 .LFB102: +4332:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** HAL_StatusTypeDef status = HAL_OK; + 7366 .loc 1 4332 1 is_stmt 1 view -0 + 7367 .cfi_startproc + 7368 @ args = 0, pretend = 0, frame = 32 + 7369 @ frame_needed = 0, uses_anonymous_args = 0 +4332:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** HAL_StatusTypeDef status = HAL_OK; + 7370 .loc 1 4332 1 is_stmt 0 view .LVU2328 + 7371 0000 70B5 push {r4, r5, r6, lr} + 7372 .cfi_def_cfa_offset 16 + 7373 .cfi_offset 4, -16 + 7374 .cfi_offset 5, -12 + 7375 .cfi_offset 6, -8 + 7376 .cfi_offset 14, -4 + 7377 0002 88B0 sub sp, sp, #32 + 7378 .cfi_def_cfa_offset 48 + 7379 0004 0400 movs r4, r0 + 7380 0006 0D00 movs r5, r1 + 7381 0008 1E00 movs r6, r3 +4333:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** TIM_OC_InitTypeDef temp1; + 7382 .loc 1 4333 3 is_stmt 1 view .LVU2329 + 7383 .LVL584: +4334:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 7384 .loc 1 4334 3 view .LVU2330 +4337:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** assert_param(IS_TIM_OPM_CHANNELS(InputChannel)); + 7385 .loc 1 4337 3 view .LVU2331 +4338:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 7386 .loc 1 4338 3 view .LVU2332 +4340:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** { + 7387 .loc 1 4340 3 view .LVU2333 +4340:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** { + 7388 .loc 1 4340 6 is_stmt 0 view .LVU2334 + 7389 000a 9A42 cmp r2, r3 + 7390 000c 00D1 bne .LCB6307 + 7391 000e 74E0 b .L411 @long jump + 7392 .LCB6307: +4343:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 7393 .loc 1 4343 5 is_stmt 1 view .LVU2335 +4343:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 7394 .loc 1 4343 5 view .LVU2336 + 7395 0010 3C23 movs r3, #60 + 7396 .LVL585: + ARM GAS /tmp/ccMtK8ce.s page 295 + + +4343:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 7397 .loc 1 4343 5 is_stmt 0 view .LVU2337 + 7398 0012 C35C ldrb r3, [r0, r3] + 7399 0014 012B cmp r3, #1 + 7400 0016 00D1 bne .LCB6314 + 7401 0018 71E0 b .L412 @long jump + 7402 .LCB6314: +4343:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 7403 .loc 1 4343 5 is_stmt 1 discriminator 2 view .LVU2338 + 7404 001a 3C23 movs r3, #60 + 7405 001c 0121 movs r1, #1 + 7406 .LVL586: +4343:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 7407 .loc 1 4343 5 is_stmt 0 discriminator 2 view .LVU2339 + 7408 001e C154 strb r1, [r0, r3] +4343:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 7409 .loc 1 4343 5 is_stmt 1 discriminator 2 view .LVU2340 +4345:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 7410 .loc 1 4345 5 view .LVU2341 +4345:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 7411 .loc 1 4345 17 is_stmt 0 view .LVU2342 + 7412 0020 0133 adds r3, r3, #1 + 7413 0022 0131 adds r1, r1, #1 + 7414 0024 C154 strb r1, [r0, r3] +4348:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** temp1.Pulse = sConfig->Pulse; + 7415 .loc 1 4348 5 is_stmt 1 view .LVU2343 +4348:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** temp1.Pulse = sConfig->Pulse; + 7416 .loc 1 4348 27 is_stmt 0 view .LVU2344 + 7417 0026 2B68 ldr r3, [r5] +4348:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** temp1.Pulse = sConfig->Pulse; + 7418 .loc 1 4348 18 view .LVU2345 + 7419 0028 0193 str r3, [sp, #4] +4349:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** temp1.OCPolarity = sConfig->OCPolarity; + 7420 .loc 1 4349 5 is_stmt 1 view .LVU2346 +4349:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** temp1.OCPolarity = sConfig->OCPolarity; + 7421 .loc 1 4349 26 is_stmt 0 view .LVU2347 + 7422 002a 6B68 ldr r3, [r5, #4] +4349:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** temp1.OCPolarity = sConfig->OCPolarity; + 7423 .loc 1 4349 17 view .LVU2348 + 7424 002c 0293 str r3, [sp, #8] +4350:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** temp1.OCNPolarity = sConfig->OCNPolarity; + 7425 .loc 1 4350 5 is_stmt 1 view .LVU2349 +4350:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** temp1.OCNPolarity = sConfig->OCNPolarity; + 7426 .loc 1 4350 31 is_stmt 0 view .LVU2350 + 7427 002e AB68 ldr r3, [r5, #8] +4350:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** temp1.OCNPolarity = sConfig->OCNPolarity; + 7428 .loc 1 4350 22 view .LVU2351 + 7429 0030 0393 str r3, [sp, #12] +4351:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** temp1.OCIdleState = sConfig->OCIdleState; + 7430 .loc 1 4351 5 is_stmt 1 view .LVU2352 +4351:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** temp1.OCIdleState = sConfig->OCIdleState; + 7431 .loc 1 4351 32 is_stmt 0 view .LVU2353 + 7432 0032 EB68 ldr r3, [r5, #12] +4351:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** temp1.OCIdleState = sConfig->OCIdleState; + 7433 .loc 1 4351 23 view .LVU2354 + 7434 0034 0493 str r3, [sp, #16] +4352:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** temp1.OCNIdleState = sConfig->OCNIdleState; + ARM GAS /tmp/ccMtK8ce.s page 296 + + + 7435 .loc 1 4352 5 is_stmt 1 view .LVU2355 +4352:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** temp1.OCNIdleState = sConfig->OCNIdleState; + 7436 .loc 1 4352 32 is_stmt 0 view .LVU2356 + 7437 0036 2B69 ldr r3, [r5, #16] +4352:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** temp1.OCNIdleState = sConfig->OCNIdleState; + 7438 .loc 1 4352 23 view .LVU2357 + 7439 0038 0693 str r3, [sp, #24] +4353:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 7440 .loc 1 4353 5 is_stmt 1 view .LVU2358 +4353:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 7441 .loc 1 4353 33 is_stmt 0 view .LVU2359 + 7442 003a 6B69 ldr r3, [r5, #20] +4353:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 7443 .loc 1 4353 24 view .LVU2360 + 7444 003c 0793 str r3, [sp, #28] +4355:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** { + 7445 .loc 1 4355 5 is_stmt 1 view .LVU2361 + 7446 003e 002A cmp r2, #0 + 7447 0040 0AD0 beq .L405 + 7448 0042 042A cmp r2, #4 + 7449 0044 12D0 beq .L406 + 7450 0046 0120 movs r0, #1 + 7451 .LVL587: + 7452 .L407: +4428:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 7453 .loc 1 4428 5 view .LVU2362 +4428:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 7454 .loc 1 4428 17 is_stmt 0 view .LVU2363 + 7455 0048 3D23 movs r3, #61 + 7456 004a 0122 movs r2, #1 + 7457 004c E254 strb r2, [r4, r3] +4430:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 7458 .loc 1 4430 5 is_stmt 1 view .LVU2364 +4430:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 7459 .loc 1 4430 5 view .LVU2365 + 7460 004e 013B subs r3, r3, #1 + 7461 0050 0022 movs r2, #0 + 7462 0052 E254 strb r2, [r4, r3] +4430:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 7463 .loc 1 4430 5 view .LVU2366 +4432:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** } + 7464 .loc 1 4432 5 view .LVU2367 + 7465 .LVL588: + 7466 .L404: +4438:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 7467 .loc 1 4438 1 is_stmt 0 view .LVU2368 + 7468 0054 08B0 add sp, sp, #32 + 7469 @ sp needed + 7470 .LVL589: + 7471 .LVL590: + 7472 .LVL591: +4438:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 7473 .loc 1 4438 1 view .LVU2369 + 7474 0056 70BD pop {r4, r5, r6, pc} + 7475 .LVL592: + 7476 .L405: +4359:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + ARM GAS /tmp/ccMtK8ce.s page 297 + + + 7477 .loc 1 4359 9 is_stmt 1 view .LVU2370 +4361:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** break; + 7478 .loc 1 4361 9 view .LVU2371 + 7479 0058 0068 ldr r0, [r0] + 7480 .LVL593: +4361:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** break; + 7481 .loc 1 4361 9 is_stmt 0 view .LVU2372 + 7482 005a 01A9 add r1, sp, #4 + 7483 005c FFF7FEFF bl TIM_OC1_SetConfig + 7484 .LVL594: +4362:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** } + 7485 .loc 1 4362 9 is_stmt 1 view .LVU2373 +4378:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** { + 7486 .loc 1 4378 5 view .LVU2374 + 7487 .L408: +4380:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** { + 7488 .loc 1 4380 7 view .LVU2375 + 7489 0060 002E cmp r6, #0 + 7490 0062 08D0 beq .L409 + 7491 0064 042E cmp r6, #4 + 7492 0066 27D0 beq .L410 + 7493 0068 0120 movs r0, #1 + 7494 006a EDE7 b .L407 + 7495 .LVL595: + 7496 .L406: +4367:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 7497 .loc 1 4367 9 view .LVU2376 +4369:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** break; + 7498 .loc 1 4369 9 view .LVU2377 + 7499 006c 0068 ldr r0, [r0] + 7500 .LVL596: +4369:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** break; + 7501 .loc 1 4369 9 is_stmt 0 view .LVU2378 + 7502 006e 01A9 add r1, sp, #4 + 7503 0070 FFF7FEFF bl TIM_OC2_SetConfig + 7504 .LVL597: +4370:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** } + 7505 .loc 1 4370 9 is_stmt 1 view .LVU2379 +4378:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** { + 7506 .loc 1 4378 5 view .LVU2380 + 7507 0074 F4E7 b .L408 + 7508 .L409: +4384:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 7509 .loc 1 4384 11 view .LVU2381 +4386:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** sConfig->ICSelection, sConfig->ICFilter); + 7510 .loc 1 4386 11 view .LVU2382 + 7511 0076 2B6A ldr r3, [r5, #32] + 7512 0078 EA69 ldr r2, [r5, #28] + 7513 007a A969 ldr r1, [r5, #24] + 7514 007c 2068 ldr r0, [r4] + 7515 007e FFF7FEFF bl TIM_TI1_SetConfig + 7516 .LVL598: +4390:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 7517 .loc 1 4390 11 view .LVU2383 +4390:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 7518 .loc 1 4390 15 is_stmt 0 view .LVU2384 + 7519 0082 2268 ldr r2, [r4] + ARM GAS /tmp/ccMtK8ce.s page 298 + + +4390:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 7520 .loc 1 4390 25 view .LVU2385 + 7521 0084 9369 ldr r3, [r2, #24] +4390:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 7522 .loc 1 4390 33 view .LVU2386 + 7523 0086 0C21 movs r1, #12 + 7524 0088 8B43 bics r3, r1 + 7525 008a 9361 str r3, [r2, #24] +4393:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** htim->Instance->SMCR |= TIM_TS_TI1FP1; + 7526 .loc 1 4393 11 is_stmt 1 view .LVU2387 +4393:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** htim->Instance->SMCR |= TIM_TS_TI1FP1; + 7527 .loc 1 4393 15 is_stmt 0 view .LVU2388 + 7528 008c 2268 ldr r2, [r4] +4393:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** htim->Instance->SMCR |= TIM_TS_TI1FP1; + 7529 .loc 1 4393 25 view .LVU2389 + 7530 008e 9368 ldr r3, [r2, #8] +4393:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** htim->Instance->SMCR |= TIM_TS_TI1FP1; + 7531 .loc 1 4393 32 view .LVU2390 + 7532 0090 6431 adds r1, r1, #100 + 7533 0092 8B43 bics r3, r1 + 7534 0094 9360 str r3, [r2, #8] +4394:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 7535 .loc 1 4394 11 is_stmt 1 view .LVU2391 +4394:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 7536 .loc 1 4394 15 is_stmt 0 view .LVU2392 + 7537 0096 2268 ldr r2, [r4] +4394:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 7538 .loc 1 4394 25 view .LVU2393 + 7539 0098 9368 ldr r3, [r2, #8] +4394:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 7540 .loc 1 4394 32 view .LVU2394 + 7541 009a 2039 subs r1, r1, #32 + 7542 009c 0B43 orrs r3, r1 + 7543 009e 9360 str r3, [r2, #8] +4397:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** htim->Instance->SMCR |= TIM_SLAVEMODE_TRIGGER; + 7544 .loc 1 4397 11 is_stmt 1 view .LVU2395 +4397:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** htim->Instance->SMCR |= TIM_SLAVEMODE_TRIGGER; + 7545 .loc 1 4397 15 is_stmt 0 view .LVU2396 + 7546 00a0 2268 ldr r2, [r4] +4397:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** htim->Instance->SMCR |= TIM_SLAVEMODE_TRIGGER; + 7547 .loc 1 4397 25 view .LVU2397 + 7548 00a2 9368 ldr r3, [r2, #8] +4397:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** htim->Instance->SMCR |= TIM_SLAVEMODE_TRIGGER; + 7549 .loc 1 4397 32 view .LVU2398 + 7550 00a4 4939 subs r1, r1, #73 + 7551 00a6 8B43 bics r3, r1 + 7552 00a8 9360 str r3, [r2, #8] +4398:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** break; + 7553 .loc 1 4398 11 is_stmt 1 view .LVU2399 +4398:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** break; + 7554 .loc 1 4398 15 is_stmt 0 view .LVU2400 + 7555 00aa 2268 ldr r2, [r4] +4398:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** break; + 7556 .loc 1 4398 25 view .LVU2401 + 7557 00ac 9368 ldr r3, [r2, #8] +4398:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** break; + 7558 .loc 1 4398 32 view .LVU2402 + ARM GAS /tmp/ccMtK8ce.s page 299 + + + 7559 00ae 0139 subs r1, r1, #1 + 7560 00b0 0B43 orrs r3, r1 + 7561 00b2 9360 str r3, [r2, #8] +4399:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** } + 7562 .loc 1 4399 11 is_stmt 1 view .LVU2403 + 7563 00b4 0020 movs r0, #0 + 7564 00b6 C7E7 b .L407 + 7565 .L410: +4404:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 7566 .loc 1 4404 11 view .LVU2404 +4406:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** sConfig->ICSelection, sConfig->ICFilter); + 7567 .loc 1 4406 11 view .LVU2405 + 7568 00b8 2B6A ldr r3, [r5, #32] + 7569 00ba EA69 ldr r2, [r5, #28] + 7570 00bc A969 ldr r1, [r5, #24] + 7571 00be 2068 ldr r0, [r4] + 7572 00c0 FFF7FEFF bl TIM_TI2_SetConfig + 7573 .LVL599: +4410:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 7574 .loc 1 4410 11 view .LVU2406 +4410:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 7575 .loc 1 4410 15 is_stmt 0 view .LVU2407 + 7576 00c4 2268 ldr r2, [r4] +4410:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 7577 .loc 1 4410 25 view .LVU2408 + 7578 00c6 9369 ldr r3, [r2, #24] +4410:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 7579 .loc 1 4410 33 view .LVU2409 + 7580 00c8 0E49 ldr r1, .L413 + 7581 00ca 0B40 ands r3, r1 + 7582 00cc 9361 str r3, [r2, #24] +4413:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** htim->Instance->SMCR |= TIM_TS_TI2FP2; + 7583 .loc 1 4413 11 is_stmt 1 view .LVU2410 +4413:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** htim->Instance->SMCR |= TIM_TS_TI2FP2; + 7584 .loc 1 4413 15 is_stmt 0 view .LVU2411 + 7585 00ce 2268 ldr r2, [r4] +4413:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** htim->Instance->SMCR |= TIM_TS_TI2FP2; + 7586 .loc 1 4413 25 view .LVU2412 + 7587 00d0 9368 ldr r3, [r2, #8] +4413:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** htim->Instance->SMCR |= TIM_TS_TI2FP2; + 7588 .loc 1 4413 32 view .LVU2413 + 7589 00d2 7021 movs r1, #112 + 7590 00d4 8B43 bics r3, r1 + 7591 00d6 9360 str r3, [r2, #8] +4414:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 7592 .loc 1 4414 11 is_stmt 1 view .LVU2414 +4414:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 7593 .loc 1 4414 15 is_stmt 0 view .LVU2415 + 7594 00d8 2268 ldr r2, [r4] +4414:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 7595 .loc 1 4414 25 view .LVU2416 + 7596 00da 9368 ldr r3, [r2, #8] +4414:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 7597 .loc 1 4414 32 view .LVU2417 + 7598 00dc 1039 subs r1, r1, #16 + 7599 00de 0B43 orrs r3, r1 + 7600 00e0 9360 str r3, [r2, #8] + ARM GAS /tmp/ccMtK8ce.s page 300 + + +4417:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** htim->Instance->SMCR |= TIM_SLAVEMODE_TRIGGER; + 7601 .loc 1 4417 11 is_stmt 1 view .LVU2418 +4417:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** htim->Instance->SMCR |= TIM_SLAVEMODE_TRIGGER; + 7602 .loc 1 4417 15 is_stmt 0 view .LVU2419 + 7603 00e2 2268 ldr r2, [r4] +4417:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** htim->Instance->SMCR |= TIM_SLAVEMODE_TRIGGER; + 7604 .loc 1 4417 25 view .LVU2420 + 7605 00e4 9368 ldr r3, [r2, #8] +4417:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** htim->Instance->SMCR |= TIM_SLAVEMODE_TRIGGER; + 7606 .loc 1 4417 32 view .LVU2421 + 7607 00e6 5939 subs r1, r1, #89 + 7608 00e8 8B43 bics r3, r1 + 7609 00ea 9360 str r3, [r2, #8] +4418:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** break; + 7610 .loc 1 4418 11 is_stmt 1 view .LVU2422 +4418:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** break; + 7611 .loc 1 4418 15 is_stmt 0 view .LVU2423 + 7612 00ec 2268 ldr r2, [r4] +4418:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** break; + 7613 .loc 1 4418 25 view .LVU2424 + 7614 00ee 9368 ldr r3, [r2, #8] +4418:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** break; + 7615 .loc 1 4418 32 view .LVU2425 + 7616 00f0 0139 subs r1, r1, #1 + 7617 00f2 0B43 orrs r3, r1 + 7618 00f4 9360 str r3, [r2, #8] +4419:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** } + 7619 .loc 1 4419 11 is_stmt 1 view .LVU2426 + 7620 00f6 0020 movs r0, #0 + 7621 00f8 A6E7 b .L407 + 7622 .LVL600: + 7623 .L411: +4436:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** } + 7624 .loc 1 4436 12 is_stmt 0 view .LVU2427 + 7625 00fa 0120 movs r0, #1 + 7626 .LVL601: +4436:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** } + 7627 .loc 1 4436 12 view .LVU2428 + 7628 00fc AAE7 b .L404 + 7629 .LVL602: + 7630 .L412: +4343:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 7631 .loc 1 4343 5 discriminator 1 view .LVU2429 + 7632 00fe 0220 movs r0, #2 + 7633 .LVL603: +4343:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 7634 .loc 1 4343 5 discriminator 1 view .LVU2430 + 7635 0100 A8E7 b .L404 + 7636 .L414: + 7637 0102 C046 .align 2 + 7638 .L413: + 7639 0104 FFF3FFFF .word -3073 + 7640 .cfi_endproc + 7641 .LFE102: + 7643 .section .text.TIM_ETR_SetConfig,"ax",%progbits + 7644 .align 1 + 7645 .global TIM_ETR_SetConfig + ARM GAS /tmp/ccMtK8ce.s page 301 + + + 7646 .syntax unified + 7647 .code 16 + 7648 .thumb_func + 7650 TIM_ETR_SetConfig: + 7651 .LVL604: + 7652 .LFB157: +7526:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** /** +7527:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** * @brief Configures the TIMx External Trigger (ETR). +7528:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** * @param TIMx to select the TIM peripheral +7529:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** * @param TIM_ExtTRGPrescaler The external Trigger Prescaler. +7530:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** * This parameter can be one of the following values: +7531:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** * @arg TIM_ETRPRESCALER_DIV1: ETRP Prescaler OFF. +7532:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** * @arg TIM_ETRPRESCALER_DIV2: ETRP frequency divided by 2. +7533:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** * @arg TIM_ETRPRESCALER_DIV4: ETRP frequency divided by 4. +7534:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** * @arg TIM_ETRPRESCALER_DIV8: ETRP frequency divided by 8. +7535:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** * @param TIM_ExtTRGPolarity The external Trigger Polarity. +7536:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** * This parameter can be one of the following values: +7537:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** * @arg TIM_ETRPOLARITY_INVERTED: active low or falling edge active. +7538:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** * @arg TIM_ETRPOLARITY_NONINVERTED: active high or rising edge active. +7539:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** * @param ExtTRGFilter External Trigger Filter. +7540:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** * This parameter must be a value between 0x00 and 0x0F +7541:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** * @retval None +7542:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** */ +7543:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** void TIM_ETR_SetConfig(TIM_TypeDef *TIMx, uint32_t TIM_ExtTRGPrescaler, +7544:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** uint32_t TIM_ExtTRGPolarity, uint32_t ExtTRGFilter) +7545:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** { + 7653 .loc 1 7545 1 is_stmt 1 view -0 + 7654 .cfi_startproc + 7655 @ args = 0, pretend = 0, frame = 0 + 7656 @ frame_needed = 0, uses_anonymous_args = 0 + 7657 .loc 1 7545 1 is_stmt 0 view .LVU2432 + 7658 0000 30B5 push {r4, r5, lr} + 7659 .cfi_def_cfa_offset 12 + 7660 .cfi_offset 4, -12 + 7661 .cfi_offset 5, -8 + 7662 .cfi_offset 14, -4 +7546:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** uint32_t tmpsmcr; + 7663 .loc 1 7546 3 is_stmt 1 view .LVU2433 +7547:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** +7548:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** tmpsmcr = TIMx->SMCR; + 7664 .loc 1 7548 3 view .LVU2434 + 7665 .loc 1 7548 11 is_stmt 0 view .LVU2435 + 7666 0002 8468 ldr r4, [r0, #8] + 7667 .LVL605: +7549:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** +7550:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** /* Reset the ETR Bits */ +7551:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** tmpsmcr &= ~(TIM_SMCR_ETF | TIM_SMCR_ETPS | TIM_SMCR_ECE | TIM_SMCR_ETP); + 7668 .loc 1 7551 3 is_stmt 1 view .LVU2436 + 7669 .loc 1 7551 11 is_stmt 0 view .LVU2437 + 7670 0004 034D ldr r5, .L416 + 7671 0006 2C40 ands r4, r5 + 7672 .LVL606: +7552:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** +7553:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** /* Set the Prescaler, the Filter value and the Polarity */ +7554:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** tmpsmcr |= (uint32_t)(TIM_ExtTRGPrescaler | (TIM_ExtTRGPolarity | (ExtTRGFilter << 8U))); + 7673 .loc 1 7554 3 is_stmt 1 view .LVU2438 + 7674 .loc 1 7554 83 is_stmt 0 view .LVU2439 + ARM GAS /tmp/ccMtK8ce.s page 302 + + + 7675 0008 1B02 lsls r3, r3, #8 + 7676 .LVL607: + 7677 .loc 1 7554 67 view .LVU2440 + 7678 000a 1343 orrs r3, r2 + 7679 .loc 1 7554 45 view .LVU2441 + 7680 000c 0B43 orrs r3, r1 + 7681 .loc 1 7554 11 view .LVU2442 + 7682 000e 2343 orrs r3, r4 + 7683 .LVL608: +7555:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** +7556:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** /* Write to TIMx SMCR */ +7557:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** TIMx->SMCR = tmpsmcr; + 7684 .loc 1 7557 3 is_stmt 1 view .LVU2443 + 7685 .loc 1 7557 14 is_stmt 0 view .LVU2444 + 7686 0010 8360 str r3, [r0, #8] +7558:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** } + 7687 .loc 1 7558 1 view .LVU2445 + 7688 @ sp needed + 7689 0012 30BD pop {r4, r5, pc} + 7690 .L417: + 7691 .align 2 + 7692 .L416: + 7693 0014 FF00FFFF .word -65281 + 7694 .cfi_endproc + 7695 .LFE157: + 7697 .section .text.HAL_TIM_ConfigOCrefClear,"ax",%progbits + 7698 .align 1 + 7699 .global HAL_TIM_ConfigOCrefClear + 7700 .syntax unified + 7701 .code 16 + 7702 .thumb_func + 7704 HAL_TIM_ConfigOCrefClear: + 7705 .LVL609: + 7706 .LFB110: +5173:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** HAL_StatusTypeDef status = HAL_OK; + 7707 .loc 1 5173 1 is_stmt 1 view -0 + 7708 .cfi_startproc + 7709 @ args = 0, pretend = 0, frame = 0 + 7710 @ frame_needed = 0, uses_anonymous_args = 0 +5173:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** HAL_StatusTypeDef status = HAL_OK; + 7711 .loc 1 5173 1 is_stmt 0 view .LVU2447 + 7712 0000 70B5 push {r4, r5, r6, lr} + 7713 .cfi_def_cfa_offset 16 + 7714 .cfi_offset 4, -16 + 7715 .cfi_offset 5, -12 + 7716 .cfi_offset 6, -8 + 7717 .cfi_offset 14, -4 + 7718 0002 0400 movs r4, r0 + 7719 0004 0D00 movs r5, r1 + 7720 0006 1600 movs r6, r2 +5174:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 7721 .loc 1 5174 3 is_stmt 1 view .LVU2448 + 7722 .LVL610: +5177:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** assert_param(IS_TIM_CLEARINPUT_SOURCE(sClearInputConfig->ClearInputSource)); + 7723 .loc 1 5177 3 view .LVU2449 +5178:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 7724 .loc 1 5178 3 view .LVU2450 + ARM GAS /tmp/ccMtK8ce.s page 303 + + +5181:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 7725 .loc 1 5181 3 view .LVU2451 +5181:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 7726 .loc 1 5181 3 view .LVU2452 + 7727 0008 3C23 movs r3, #60 + 7728 000a C35C ldrb r3, [r0, r3] + 7729 000c 012B cmp r3, #1 + 7730 000e 00D1 bne .LCB6614 + 7731 0010 88E0 b .L434 @long jump + 7732 .LCB6614: +5181:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 7733 .loc 1 5181 3 discriminator 2 view .LVU2453 + 7734 0012 3C23 movs r3, #60 + 7735 0014 0122 movs r2, #1 + 7736 .LVL611: +5181:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 7737 .loc 1 5181 3 is_stmt 0 discriminator 2 view .LVU2454 + 7738 0016 C254 strb r2, [r0, r3] +5181:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 7739 .loc 1 5181 3 is_stmt 1 discriminator 2 view .LVU2455 +5183:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 7740 .loc 1 5183 3 view .LVU2456 +5183:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 7741 .loc 1 5183 15 is_stmt 0 view .LVU2457 + 7742 0018 0133 adds r3, r3, #1 + 7743 001a 0132 adds r2, r2, #1 + 7744 001c C254 strb r2, [r0, r3] +5185:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** { + 7745 .loc 1 5185 3 is_stmt 1 view .LVU2458 +5185:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** { + 7746 .loc 1 5185 28 is_stmt 0 view .LVU2459 + 7747 001e 4B68 ldr r3, [r1, #4] +5185:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** { + 7748 .loc 1 5185 3 view .LVU2460 + 7749 0020 012B cmp r3, #1 + 7750 0022 20D0 beq .L420 + 7751 0024 022B cmp r3, #2 + 7752 0026 18D0 beq .L421 + 7753 0028 002B cmp r3, #0 + 7754 002a 73D1 bne .L435 +5190:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** break; + 7755 .loc 1 5190 7 is_stmt 1 view .LVU2461 + 7756 002c 0268 ldr r2, [r0] + 7757 002e 9368 ldr r3, [r2, #8] + 7758 0030 3D49 ldr r1, .L438 + 7759 .LVL612: +5190:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** break; + 7760 .loc 1 5190 7 is_stmt 0 view .LVU2462 + 7761 0032 0B40 ands r3, r1 + 7762 0034 9360 str r3, [r2, #8] +5191:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** } + 7763 .loc 1 5191 7 is_stmt 1 view .LVU2463 +5230:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** { + 7764 .loc 1 5230 3 view .LVU2464 + 7765 .LVL613: + 7766 .L423: +5232:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** { + ARM GAS /tmp/ccMtK8ce.s page 304 + + + 7767 .loc 1 5232 5 view .LVU2465 + 7768 0036 082E cmp r6, #8 + 7769 0038 54D0 beq .L425 + 7770 003a 2CD8 bhi .L426 + 7771 003c 002E cmp r6, #0 + 7772 003e 39D0 beq .L427 + 7773 0040 042E cmp r6, #4 + 7774 0042 26D1 bne .L436 +5250:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** { + 7775 .loc 1 5250 9 view .LVU2466 +5250:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** { + 7776 .loc 1 5250 30 is_stmt 0 view .LVU2467 + 7777 0044 2B68 ldr r3, [r5] +5250:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** { + 7778 .loc 1 5250 12 view .LVU2468 + 7779 0046 002B cmp r3, #0 + 7780 0048 45D0 beq .L431 +5253:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** } + 7781 .loc 1 5253 11 is_stmt 1 view .LVU2469 + 7782 004a 2268 ldr r2, [r4] + 7783 004c 9169 ldr r1, [r2, #24] + 7784 004e 8023 movs r3, #128 + 7785 0050 1B02 lsls r3, r3, #8 + 7786 0052 0B43 orrs r3, r1 + 7787 0054 9361 str r3, [r2, #24] + 7788 0056 0020 movs r0, #0 + 7789 0058 5DE0 b .L422 + 7790 .LVL614: + 7791 .L421: +5196:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** break; + 7792 .loc 1 5196 7 view .LVU2470 + 7793 005a 0268 ldr r2, [r0] + 7794 005c 9368 ldr r3, [r2, #8] + 7795 005e 0821 movs r1, #8 + 7796 .LVL615: +5196:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** break; + 7797 .loc 1 5196 7 is_stmt 0 view .LVU2471 + 7798 0060 8B43 bics r3, r1 + 7799 0062 9360 str r3, [r2, #8] +5197:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** } + 7800 .loc 1 5197 7 is_stmt 1 view .LVU2472 +5230:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** { + 7801 .loc 1 5230 3 view .LVU2473 + 7802 0064 E7E7 b .L423 + 7803 .LVL616: + 7804 .L420: +5203:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** assert_param(IS_TIM_CLEARINPUT_PRESCALER(sClearInputConfig->ClearInputPrescaler)); + 7805 .loc 1 5203 7 view .LVU2474 +5204:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** assert_param(IS_TIM_CLEARINPUT_FILTER(sClearInputConfig->ClearInputFilter)); + 7806 .loc 1 5204 7 view .LVU2475 +5205:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 7807 .loc 1 5205 7 view .LVU2476 +5208:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** { + 7808 .loc 1 5208 7 view .LVU2477 +5208:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** { + 7809 .loc 1 5208 28 is_stmt 0 view .LVU2478 + 7810 0066 C968 ldr r1, [r1, #12] + ARM GAS /tmp/ccMtK8ce.s page 305 + + + 7811 .LVL617: +5208:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** { + 7812 .loc 1 5208 10 view .LVU2479 + 7813 0068 0029 cmp r1, #0 + 7814 006a 07D0 beq .L424 +5210:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** __HAL_UNLOCK(htim); + 7815 .loc 1 5210 9 is_stmt 1 view .LVU2480 +5210:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** __HAL_UNLOCK(htim); + 7816 .loc 1 5210 21 is_stmt 0 view .LVU2481 + 7817 006c 3D23 movs r3, #61 + 7818 006e 0122 movs r2, #1 + 7819 0070 C254 strb r2, [r0, r3] +5211:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** return HAL_ERROR; + 7820 .loc 1 5211 9 is_stmt 1 view .LVU2482 +5211:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** return HAL_ERROR; + 7821 .loc 1 5211 9 view .LVU2483 + 7822 0072 013B subs r3, r3, #1 + 7823 0074 0022 movs r2, #0 + 7824 0076 C254 strb r2, [r0, r3] +5211:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** return HAL_ERROR; + 7825 .loc 1 5211 9 view .LVU2484 +5212:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** } + 7826 .loc 1 5212 9 view .LVU2485 +5212:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** } + 7827 .loc 1 5212 16 is_stmt 0 view .LVU2486 + 7828 0078 0120 movs r0, #1 + 7829 .LVL618: +5212:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** } + 7830 .loc 1 5212 16 view .LVU2487 + 7831 007a 52E0 b .L419 + 7832 .LVL619: + 7833 .L424: +5215:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** sClearInputConfig->ClearInputPrescaler, + 7834 .loc 1 5215 7 is_stmt 1 view .LVU2488 +5217:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** sClearInputConfig->ClearInputFilter); + 7835 .loc 1 5217 42 is_stmt 0 view .LVU2489 + 7836 007c AA68 ldr r2, [r5, #8] +5218:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 7837 .loc 1 5218 42 view .LVU2490 + 7838 007e 2B69 ldr r3, [r5, #16] +5215:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** sClearInputConfig->ClearInputPrescaler, + 7839 .loc 1 5215 7 view .LVU2491 + 7840 0080 0068 ldr r0, [r0] + 7841 .LVL620: +5215:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** sClearInputConfig->ClearInputPrescaler, + 7842 .loc 1 5215 7 view .LVU2492 + 7843 0082 FFF7FEFF bl TIM_ETR_SetConfig + 7844 .LVL621: +5221:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** break; + 7845 .loc 1 5221 7 is_stmt 1 view .LVU2493 + 7846 0086 2268 ldr r2, [r4] + 7847 0088 9368 ldr r3, [r2, #8] + 7848 008a 0821 movs r1, #8 + 7849 008c 0B43 orrs r3, r1 + 7850 008e 9360 str r3, [r2, #8] +5222:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** } + 7851 .loc 1 5222 7 view .LVU2494 + ARM GAS /tmp/ccMtK8ce.s page 306 + + +5230:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** { + 7852 .loc 1 5230 3 view .LVU2495 + 7853 0090 D1E7 b .L423 + 7854 .L436: +5232:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** { + 7855 .loc 1 5232 5 is_stmt 0 view .LVU2496 + 7856 0092 0020 movs r0, #0 + 7857 0094 3FE0 b .L422 + 7858 .L426: + 7859 0096 0C2E cmp r6, #12 + 7860 0098 0AD1 bne .L437 +5278:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** { + 7861 .loc 1 5278 9 is_stmt 1 view .LVU2497 +5278:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** { + 7862 .loc 1 5278 30 is_stmt 0 view .LVU2498 + 7863 009a 2B68 ldr r3, [r5] +5278:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** { + 7864 .loc 1 5278 12 view .LVU2499 + 7865 009c 002B cmp r3, #0 + 7866 009e 32D0 beq .L433 +5281:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** } + 7867 .loc 1 5281 11 is_stmt 1 view .LVU2500 + 7868 00a0 2268 ldr r2, [r4] + 7869 00a2 D169 ldr r1, [r2, #28] + 7870 00a4 8023 movs r3, #128 + 7871 00a6 1B02 lsls r3, r3, #8 + 7872 00a8 0B43 orrs r3, r1 + 7873 00aa D361 str r3, [r2, #28] + 7874 00ac 0020 movs r0, #0 + 7875 00ae 32E0 b .L422 + 7876 .L437: +5232:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** { + 7877 .loc 1 5232 5 is_stmt 0 view .LVU2501 + 7878 00b0 0020 movs r0, #0 + 7879 00b2 30E0 b .L422 + 7880 .L427: +5236:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** { + 7881 .loc 1 5236 9 is_stmt 1 view .LVU2502 +5236:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** { + 7882 .loc 1 5236 30 is_stmt 0 view .LVU2503 + 7883 00b4 2B68 ldr r3, [r5] +5236:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** { + 7884 .loc 1 5236 12 view .LVU2504 + 7885 00b6 002B cmp r3, #0 + 7886 00b8 06D0 beq .L430 +5239:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** } + 7887 .loc 1 5239 11 is_stmt 1 view .LVU2505 + 7888 00ba 2268 ldr r2, [r4] + 7889 00bc 9369 ldr r3, [r2, #24] + 7890 00be 8021 movs r1, #128 + 7891 00c0 0B43 orrs r3, r1 + 7892 00c2 9361 str r3, [r2, #24] + 7893 00c4 0020 movs r0, #0 + 7894 00c6 26E0 b .L422 + 7895 .L430: +5244:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** } + 7896 .loc 1 5244 11 view .LVU2506 + ARM GAS /tmp/ccMtK8ce.s page 307 + + + 7897 00c8 2268 ldr r2, [r4] + 7898 00ca 9369 ldr r3, [r2, #24] + 7899 00cc 8021 movs r1, #128 + 7900 00ce 8B43 bics r3, r1 + 7901 00d0 9361 str r3, [r2, #24] + 7902 00d2 0020 movs r0, #0 + 7903 00d4 1FE0 b .L422 + 7904 .L431: +5258:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** } + 7905 .loc 1 5258 11 view .LVU2507 + 7906 00d6 2268 ldr r2, [r4] + 7907 00d8 9369 ldr r3, [r2, #24] + 7908 00da 1449 ldr r1, .L438+4 + 7909 00dc 0B40 ands r3, r1 + 7910 00de 9361 str r3, [r2, #24] + 7911 00e0 0020 movs r0, #0 + 7912 00e2 18E0 b .L422 + 7913 .L425: +5264:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** { + 7914 .loc 1 5264 9 view .LVU2508 +5264:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** { + 7915 .loc 1 5264 30 is_stmt 0 view .LVU2509 + 7916 00e4 2B68 ldr r3, [r5] +5264:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** { + 7917 .loc 1 5264 12 view .LVU2510 + 7918 00e6 002B cmp r3, #0 + 7919 00e8 06D0 beq .L432 +5267:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** } + 7920 .loc 1 5267 11 is_stmt 1 view .LVU2511 + 7921 00ea 2268 ldr r2, [r4] + 7922 00ec D369 ldr r3, [r2, #28] + 7923 00ee 8021 movs r1, #128 + 7924 00f0 0B43 orrs r3, r1 + 7925 00f2 D361 str r3, [r2, #28] + 7926 00f4 0020 movs r0, #0 + 7927 00f6 0EE0 b .L422 + 7928 .L432: +5272:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** } + 7929 .loc 1 5272 11 view .LVU2512 + 7930 00f8 2268 ldr r2, [r4] + 7931 00fa D369 ldr r3, [r2, #28] + 7932 00fc 8021 movs r1, #128 + 7933 00fe 8B43 bics r3, r1 + 7934 0100 D361 str r3, [r2, #28] + 7935 0102 0020 movs r0, #0 + 7936 0104 07E0 b .L422 + 7937 .L433: +5286:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** } + 7938 .loc 1 5286 11 view .LVU2513 + 7939 0106 2268 ldr r2, [r4] + 7940 0108 D369 ldr r3, [r2, #28] + 7941 010a 0849 ldr r1, .L438+4 + 7942 010c 0B40 ands r3, r1 + 7943 010e D361 str r3, [r2, #28] + 7944 0110 0020 movs r0, #0 + 7945 0112 00E0 b .L422 + 7946 .LVL622: + ARM GAS /tmp/ccMtK8ce.s page 308 + + + 7947 .L435: +5185:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** { + 7948 .loc 1 5185 3 is_stmt 0 view .LVU2514 + 7949 0114 0120 movs r0, #1 + 7950 .LVL623: + 7951 .L422: +5295:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 7952 .loc 1 5295 3 is_stmt 1 view .LVU2515 +5295:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 7953 .loc 1 5295 15 is_stmt 0 view .LVU2516 + 7954 0116 3D23 movs r3, #61 + 7955 0118 0122 movs r2, #1 + 7956 011a E254 strb r2, [r4, r3] +5297:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 7957 .loc 1 5297 3 is_stmt 1 view .LVU2517 +5297:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 7958 .loc 1 5297 3 view .LVU2518 + 7959 011c 013B subs r3, r3, #1 + 7960 011e 0022 movs r2, #0 + 7961 0120 E254 strb r2, [r4, r3] +5297:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 7962 .loc 1 5297 3 view .LVU2519 +5299:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** } + 7963 .loc 1 5299 3 view .LVU2520 + 7964 .L419: +5300:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 7965 .loc 1 5300 1 is_stmt 0 view .LVU2521 + 7966 @ sp needed + 7967 .LVL624: + 7968 .LVL625: + 7969 .LVL626: +5300:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 7970 .loc 1 5300 1 view .LVU2522 + 7971 0122 70BD pop {r4, r5, r6, pc} + 7972 .LVL627: + 7973 .L434: +5181:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 7974 .loc 1 5181 3 discriminator 1 view .LVU2523 + 7975 0124 0220 movs r0, #2 + 7976 .LVL628: +5181:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 7977 .loc 1 5181 3 discriminator 1 view .LVU2524 + 7978 0126 FCE7 b .L419 + 7979 .L439: + 7980 .align 2 + 7981 .L438: + 7982 0128 F700FFFF .word -65289 + 7983 012c FF7FFFFF .word -32769 + 7984 .cfi_endproc + 7985 .LFE110: + 7987 .section .text.HAL_TIM_ConfigClockSource,"ax",%progbits + 7988 .align 1 + 7989 .global HAL_TIM_ConfigClockSource + 7990 .syntax unified + 7991 .code 16 + 7992 .thumb_func + 7994 HAL_TIM_ConfigClockSource: + ARM GAS /tmp/ccMtK8ce.s page 309 + + + 7995 .LVL629: + 7996 .LFB111: +5310:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** HAL_StatusTypeDef status = HAL_OK; + 7997 .loc 1 5310 1 is_stmt 1 view -0 + 7998 .cfi_startproc + 7999 @ args = 0, pretend = 0, frame = 0 + 8000 @ frame_needed = 0, uses_anonymous_args = 0 +5310:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** HAL_StatusTypeDef status = HAL_OK; + 8001 .loc 1 5310 1 is_stmt 0 view .LVU2526 + 8002 0000 10B5 push {r4, lr} + 8003 .cfi_def_cfa_offset 8 + 8004 .cfi_offset 4, -8 + 8005 .cfi_offset 14, -4 + 8006 0002 0400 movs r4, r0 + 8007 0004 0B00 movs r3, r1 +5311:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** uint32_t tmpsmcr; + 8008 .loc 1 5311 3 is_stmt 1 view .LVU2527 + 8009 .LVL630: +5312:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 8010 .loc 1 5312 3 view .LVU2528 +5315:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 8011 .loc 1 5315 3 view .LVU2529 +5315:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 8012 .loc 1 5315 3 view .LVU2530 + 8013 0006 3C22 movs r2, #60 + 8014 0008 825C ldrb r2, [r0, r2] + 8015 000a 012A cmp r2, #1 + 8016 000c 00D1 bne .LCB6919 + 8017 000e 77E0 b .L451 @long jump + 8018 .LCB6919: +5315:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 8019 .loc 1 5315 3 discriminator 2 view .LVU2531 + 8020 0010 3C22 movs r2, #60 + 8021 0012 0121 movs r1, #1 + 8022 .LVL631: +5315:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 8023 .loc 1 5315 3 is_stmt 0 discriminator 2 view .LVU2532 + 8024 0014 8154 strb r1, [r0, r2] +5315:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 8025 .loc 1 5315 3 is_stmt 1 discriminator 2 view .LVU2533 +5317:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 8026 .loc 1 5317 3 view .LVU2534 +5317:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 8027 .loc 1 5317 15 is_stmt 0 view .LVU2535 + 8028 0016 0132 adds r2, r2, #1 + 8029 0018 0131 adds r1, r1, #1 + 8030 001a 8154 strb r1, [r0, r2] +5320:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 8031 .loc 1 5320 3 is_stmt 1 view .LVU2536 +5323:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** tmpsmcr &= ~(TIM_SMCR_SMS | TIM_SMCR_TS); + 8032 .loc 1 5323 3 view .LVU2537 +5323:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** tmpsmcr &= ~(TIM_SMCR_SMS | TIM_SMCR_TS); + 8033 .loc 1 5323 17 is_stmt 0 view .LVU2538 + 8034 001c 0168 ldr r1, [r0] +5323:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** tmpsmcr &= ~(TIM_SMCR_SMS | TIM_SMCR_TS); + 8035 .loc 1 5323 11 view .LVU2539 + 8036 001e 8A68 ldr r2, [r1, #8] + ARM GAS /tmp/ccMtK8ce.s page 310 + + + 8037 .LVL632: +5324:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** tmpsmcr &= ~(TIM_SMCR_ETF | TIM_SMCR_ETPS | TIM_SMCR_ECE | TIM_SMCR_ETP); + 8038 .loc 1 5324 3 is_stmt 1 view .LVU2540 +5325:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** htim->Instance->SMCR = tmpsmcr; + 8039 .loc 1 5325 3 view .LVU2541 +5325:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** htim->Instance->SMCR = tmpsmcr; + 8040 .loc 1 5325 11 is_stmt 0 view .LVU2542 + 8041 0020 3848 ldr r0, .L456 + 8042 .LVL633: +5325:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** htim->Instance->SMCR = tmpsmcr; + 8043 .loc 1 5325 11 view .LVU2543 + 8044 0022 0240 ands r2, r0 + 8045 .LVL634: +5326:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 8046 .loc 1 5326 3 is_stmt 1 view .LVU2544 +5326:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 8047 .loc 1 5326 24 is_stmt 0 view .LVU2545 + 8048 0024 8A60 str r2, [r1, #8] +5328:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** { + 8049 .loc 1 5328 3 is_stmt 1 view .LVU2546 +5328:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** { + 8050 .loc 1 5328 29 is_stmt 0 view .LVU2547 + 8051 0026 1968 ldr r1, [r3] +5328:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** { + 8052 .loc 1 5328 3 view .LVU2548 + 8053 0028 6029 cmp r1, #96 + 8054 002a 4FD0 beq .L442 + 8055 002c 23D8 bhi .L443 + 8056 002e 4029 cmp r1, #64 + 8057 0030 57D0 beq .L444 + 8058 0032 11D8 bhi .L445 + 8059 0034 2029 cmp r1, #32 + 8060 0036 04D0 beq .L446 + 8061 0038 0AD8 bhi .L447 + 8062 003a 0029 cmp r1, #0 + 8063 003c 01D0 beq .L446 + 8064 003e 1029 cmp r1, #16 + 8065 0040 04D1 bne .L454 + 8066 .L446: +5434:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 8067 .loc 1 5434 7 is_stmt 1 view .LVU2549 +5436:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** break; + 8068 .loc 1 5436 7 view .LVU2550 + 8069 0042 2068 ldr r0, [r4] + 8070 0044 FFF7FEFF bl TIM_ITRx_SetConfig + 8071 .LVL635: +5437:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** } + 8072 .loc 1 5437 7 view .LVU2551 +5311:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** uint32_t tmpsmcr; + 8073 .loc 1 5311 21 is_stmt 0 view .LVU2552 + 8074 0048 0020 movs r0, #0 +5437:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** } + 8075 .loc 1 5437 7 view .LVU2553 + 8076 004a 2AE0 b .L448 + 8077 .LVL636: + 8078 .L454: +5441:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** break; + ARM GAS /tmp/ccMtK8ce.s page 311 + + + 8079 .loc 1 5441 14 view .LVU2554 + 8080 004c 0120 movs r0, #1 + 8081 004e 28E0 b .L448 + 8082 .L447: +5328:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** { + 8083 .loc 1 5328 3 view .LVU2555 + 8084 0050 3029 cmp r1, #48 + 8085 0052 F6D0 beq .L446 +5441:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** break; + 8086 .loc 1 5441 14 view .LVU2556 + 8087 0054 0120 movs r0, #1 + 8088 0056 24E0 b .L448 + 8089 .L445: +5328:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** { + 8090 .loc 1 5328 3 view .LVU2557 + 8091 0058 5029 cmp r1, #80 + 8092 005a 0AD1 bne .L455 +5383:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 8093 .loc 1 5383 7 is_stmt 1 view .LVU2558 +5386:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** assert_param(IS_TIM_CLOCKFILTER(sClockSourceConfig->ClockFilter)); + 8094 .loc 1 5386 7 view .LVU2559 +5387:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 8095 .loc 1 5387 7 view .LVU2560 +5389:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** sClockSourceConfig->ClockPolarity, + 8096 .loc 1 5389 7 view .LVU2561 +5390:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** sClockSourceConfig->ClockFilter); + 8097 .loc 1 5390 50 is_stmt 0 view .LVU2562 + 8098 005c 5968 ldr r1, [r3, #4] +5391:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** TIM_ITRx_SetConfig(htim->Instance, TIM_CLOCKSOURCE_TI1); + 8099 .loc 1 5391 50 view .LVU2563 + 8100 005e DA68 ldr r2, [r3, #12] + 8101 .LVL637: +5389:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** sClockSourceConfig->ClockPolarity, + 8102 .loc 1 5389 7 view .LVU2564 + 8103 0060 2068 ldr r0, [r4] + 8104 0062 FFF7FEFF bl TIM_TI1_ConfigInputStage + 8105 .LVL638: +5392:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** break; + 8106 .loc 1 5392 7 is_stmt 1 view .LVU2565 + 8107 0066 2068 ldr r0, [r4] + 8108 0068 5021 movs r1, #80 + 8109 006a FFF7FEFF bl TIM_ITRx_SetConfig + 8110 .LVL639: +5393:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** } + 8111 .loc 1 5393 7 view .LVU2566 +5311:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** uint32_t tmpsmcr; + 8112 .loc 1 5311 21 is_stmt 0 view .LVU2567 + 8113 006e 0020 movs r0, #0 +5393:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** } + 8114 .loc 1 5393 7 view .LVU2568 + 8115 0070 17E0 b .L448 + 8116 .LVL640: + 8117 .L455: +5441:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** break; + 8118 .loc 1 5441 14 view .LVU2569 + 8119 0072 0120 movs r0, #1 + 8120 0074 15E0 b .L448 + ARM GAS /tmp/ccMtK8ce.s page 312 + + + 8121 .L443: +5328:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** { + 8122 .loc 1 5328 3 view .LVU2570 + 8123 0076 8022 movs r2, #128 + 8124 .LVL641: +5328:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** { + 8125 .loc 1 5328 3 view .LVU2571 + 8126 0078 5201 lsls r2, r2, #5 + 8127 007a 9142 cmp r1, r2 + 8128 007c 3CD0 beq .L452 + 8129 007e 8022 movs r2, #128 + 8130 0080 9201 lsls r2, r2, #6 + 8131 0082 9142 cmp r1, r2 + 8132 0084 14D0 beq .L450 + 8133 0086 7029 cmp r1, #112 + 8134 0088 38D1 bne .L453 +5339:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 8135 .loc 1 5339 7 is_stmt 1 view .LVU2572 +5342:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** assert_param(IS_TIM_CLOCKPOLARITY(sClockSourceConfig->ClockPolarity)); + 8136 .loc 1 5342 7 view .LVU2573 +5343:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** assert_param(IS_TIM_CLOCKFILTER(sClockSourceConfig->ClockFilter)); + 8137 .loc 1 5343 7 view .LVU2574 +5344:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 8138 .loc 1 5344 7 view .LVU2575 +5347:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** sClockSourceConfig->ClockPrescaler, + 8139 .loc 1 5347 7 view .LVU2576 +5348:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** sClockSourceConfig->ClockPolarity, + 8140 .loc 1 5348 43 is_stmt 0 view .LVU2577 + 8141 008a 9968 ldr r1, [r3, #8] +5349:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** sClockSourceConfig->ClockFilter); + 8142 .loc 1 5349 43 view .LVU2578 + 8143 008c 5A68 ldr r2, [r3, #4] +5350:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 8144 .loc 1 5350 43 view .LVU2579 + 8145 008e DB68 ldr r3, [r3, #12] + 8146 .LVL642: +5347:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** sClockSourceConfig->ClockPrescaler, + 8147 .loc 1 5347 7 view .LVU2580 + 8148 0090 2068 ldr r0, [r4] + 8149 0092 FFF7FEFF bl TIM_ETR_SetConfig + 8150 .LVL643: +5353:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** tmpsmcr |= (TIM_SLAVEMODE_EXTERNAL1 | TIM_CLOCKSOURCE_ETRMODE1); + 8151 .loc 1 5353 7 is_stmt 1 view .LVU2581 +5353:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** tmpsmcr |= (TIM_SLAVEMODE_EXTERNAL1 | TIM_CLOCKSOURCE_ETRMODE1); + 8152 .loc 1 5353 21 is_stmt 0 view .LVU2582 + 8153 0096 2268 ldr r2, [r4] +5353:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** tmpsmcr |= (TIM_SLAVEMODE_EXTERNAL1 | TIM_CLOCKSOURCE_ETRMODE1); + 8154 .loc 1 5353 15 view .LVU2583 + 8155 0098 9368 ldr r3, [r2, #8] + 8156 .LVL644: +5354:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** /* Write to TIMx SMCR */ + 8157 .loc 1 5354 7 is_stmt 1 view .LVU2584 +5354:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** /* Write to TIMx SMCR */ + 8158 .loc 1 5354 15 is_stmt 0 view .LVU2585 + 8159 009a 7721 movs r1, #119 + 8160 009c 0B43 orrs r3, r1 + 8161 .LVL645: + ARM GAS /tmp/ccMtK8ce.s page 313 + + +5356:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** break; + 8162 .loc 1 5356 7 is_stmt 1 view .LVU2586 +5356:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** break; + 8163 .loc 1 5356 28 is_stmt 0 view .LVU2587 + 8164 009e 9360 str r3, [r2, #8] +5357:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** } + 8165 .loc 1 5357 7 is_stmt 1 view .LVU2588 +5311:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** uint32_t tmpsmcr; + 8166 .loc 1 5311 21 is_stmt 0 view .LVU2589 + 8167 00a0 0020 movs r0, #0 + 8168 .LVL646: + 8169 .L448: +5444:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 8170 .loc 1 5444 3 is_stmt 1 view .LVU2590 +5444:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 8171 .loc 1 5444 15 is_stmt 0 view .LVU2591 + 8172 00a2 3D23 movs r3, #61 + 8173 00a4 0122 movs r2, #1 + 8174 00a6 E254 strb r2, [r4, r3] +5446:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 8175 .loc 1 5446 3 is_stmt 1 view .LVU2592 +5446:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 8176 .loc 1 5446 3 view .LVU2593 + 8177 00a8 013B subs r3, r3, #1 + 8178 00aa 0022 movs r2, #0 + 8179 00ac E254 strb r2, [r4, r3] +5446:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 8180 .loc 1 5446 3 view .LVU2594 +5448:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** } + 8181 .loc 1 5448 3 view .LVU2595 + 8182 .LVL647: + 8183 .L441: +5449:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 8184 .loc 1 5449 1 is_stmt 0 view .LVU2596 + 8185 @ sp needed + 8186 .LVL648: +5449:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 8187 .loc 1 5449 1 view .LVU2597 + 8188 00ae 10BD pop {r4, pc} + 8189 .LVL649: + 8190 .L450: +5363:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 8191 .loc 1 5363 7 is_stmt 1 view .LVU2598 +5366:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** assert_param(IS_TIM_CLOCKPOLARITY(sClockSourceConfig->ClockPolarity)); + 8192 .loc 1 5366 7 view .LVU2599 +5367:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** assert_param(IS_TIM_CLOCKFILTER(sClockSourceConfig->ClockFilter)); + 8193 .loc 1 5367 7 view .LVU2600 +5368:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 8194 .loc 1 5368 7 view .LVU2601 +5371:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** sClockSourceConfig->ClockPrescaler, + 8195 .loc 1 5371 7 view .LVU2602 +5372:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** sClockSourceConfig->ClockPolarity, + 8196 .loc 1 5372 43 is_stmt 0 view .LVU2603 + 8197 00b0 9968 ldr r1, [r3, #8] +5373:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** sClockSourceConfig->ClockFilter); + 8198 .loc 1 5373 43 view .LVU2604 + 8199 00b2 5A68 ldr r2, [r3, #4] + ARM GAS /tmp/ccMtK8ce.s page 314 + + +5374:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** /* Enable the External clock mode2 */ + 8200 .loc 1 5374 43 view .LVU2605 + 8201 00b4 DB68 ldr r3, [r3, #12] + 8202 .LVL650: +5371:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** sClockSourceConfig->ClockPrescaler, + 8203 .loc 1 5371 7 view .LVU2606 + 8204 00b6 2068 ldr r0, [r4] + 8205 00b8 FFF7FEFF bl TIM_ETR_SetConfig + 8206 .LVL651: +5376:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** break; + 8207 .loc 1 5376 7 is_stmt 1 view .LVU2607 +5376:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** break; + 8208 .loc 1 5376 11 is_stmt 0 view .LVU2608 + 8209 00bc 2268 ldr r2, [r4] +5376:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** break; + 8210 .loc 1 5376 21 view .LVU2609 + 8211 00be 9168 ldr r1, [r2, #8] +5376:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** break; + 8212 .loc 1 5376 28 view .LVU2610 + 8213 00c0 8023 movs r3, #128 + 8214 00c2 DB01 lsls r3, r3, #7 + 8215 00c4 0B43 orrs r3, r1 + 8216 00c6 9360 str r3, [r2, #8] +5377:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** } + 8217 .loc 1 5377 7 is_stmt 1 view .LVU2611 +5311:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** uint32_t tmpsmcr; + 8218 .loc 1 5311 21 is_stmt 0 view .LVU2612 + 8219 00c8 0020 movs r0, #0 +5377:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** } + 8220 .loc 1 5377 7 view .LVU2613 + 8221 00ca EAE7 b .L448 + 8222 .LVL652: + 8223 .L442: +5399:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 8224 .loc 1 5399 7 is_stmt 1 view .LVU2614 +5402:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** assert_param(IS_TIM_CLOCKFILTER(sClockSourceConfig->ClockFilter)); + 8225 .loc 1 5402 7 view .LVU2615 +5403:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 8226 .loc 1 5403 7 view .LVU2616 +5405:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** sClockSourceConfig->ClockPolarity, + 8227 .loc 1 5405 7 view .LVU2617 +5406:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** sClockSourceConfig->ClockFilter); + 8228 .loc 1 5406 50 is_stmt 0 view .LVU2618 + 8229 00cc 5968 ldr r1, [r3, #4] +5407:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** TIM_ITRx_SetConfig(htim->Instance, TIM_CLOCKSOURCE_TI2); + 8230 .loc 1 5407 50 view .LVU2619 + 8231 00ce DA68 ldr r2, [r3, #12] + 8232 .LVL653: +5405:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** sClockSourceConfig->ClockPolarity, + 8233 .loc 1 5405 7 view .LVU2620 + 8234 00d0 2068 ldr r0, [r4] + 8235 00d2 FFF7FEFF bl TIM_TI2_ConfigInputStage + 8236 .LVL654: +5408:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** break; + 8237 .loc 1 5408 7 is_stmt 1 view .LVU2621 + 8238 00d6 2068 ldr r0, [r4] + 8239 00d8 6021 movs r1, #96 + ARM GAS /tmp/ccMtK8ce.s page 315 + + + 8240 00da FFF7FEFF bl TIM_ITRx_SetConfig + 8241 .LVL655: +5409:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** } + 8242 .loc 1 5409 7 view .LVU2622 +5311:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** uint32_t tmpsmcr; + 8243 .loc 1 5311 21 is_stmt 0 view .LVU2623 + 8244 00de 0020 movs r0, #0 +5409:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** } + 8245 .loc 1 5409 7 view .LVU2624 + 8246 00e0 DFE7 b .L448 + 8247 .LVL656: + 8248 .L444: +5415:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 8249 .loc 1 5415 7 is_stmt 1 view .LVU2625 +5418:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** assert_param(IS_TIM_CLOCKFILTER(sClockSourceConfig->ClockFilter)); + 8250 .loc 1 5418 7 view .LVU2626 +5419:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 8251 .loc 1 5419 7 view .LVU2627 +5421:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** sClockSourceConfig->ClockPolarity, + 8252 .loc 1 5421 7 view .LVU2628 +5422:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** sClockSourceConfig->ClockFilter); + 8253 .loc 1 5422 50 is_stmt 0 view .LVU2629 + 8254 00e2 5968 ldr r1, [r3, #4] +5423:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** TIM_ITRx_SetConfig(htim->Instance, TIM_CLOCKSOURCE_TI1ED); + 8255 .loc 1 5423 50 view .LVU2630 + 8256 00e4 DA68 ldr r2, [r3, #12] + 8257 .LVL657: +5421:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** sClockSourceConfig->ClockPolarity, + 8258 .loc 1 5421 7 view .LVU2631 + 8259 00e6 2068 ldr r0, [r4] + 8260 00e8 FFF7FEFF bl TIM_TI1_ConfigInputStage + 8261 .LVL658: +5424:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** break; + 8262 .loc 1 5424 7 is_stmt 1 view .LVU2632 + 8263 00ec 2068 ldr r0, [r4] + 8264 00ee 4021 movs r1, #64 + 8265 00f0 FFF7FEFF bl TIM_ITRx_SetConfig + 8266 .LVL659: +5425:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** } + 8267 .loc 1 5425 7 view .LVU2633 +5311:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** uint32_t tmpsmcr; + 8268 .loc 1 5311 21 is_stmt 0 view .LVU2634 + 8269 00f4 0020 movs r0, #0 +5425:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** } + 8270 .loc 1 5425 7 view .LVU2635 + 8271 00f6 D4E7 b .L448 + 8272 .LVL660: + 8273 .L452: +5328:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** { + 8274 .loc 1 5328 3 view .LVU2636 + 8275 00f8 0020 movs r0, #0 + 8276 00fa D2E7 b .L448 + 8277 .L453: +5441:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** break; + 8278 .loc 1 5441 14 view .LVU2637 + 8279 00fc 0120 movs r0, #1 + 8280 00fe D0E7 b .L448 + ARM GAS /tmp/ccMtK8ce.s page 316 + + + 8281 .LVL661: + 8282 .L451: +5315:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 8283 .loc 1 5315 3 discriminator 1 view .LVU2638 + 8284 0100 0220 movs r0, #2 + 8285 .LVL662: +5315:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 8286 .loc 1 5315 3 discriminator 1 view .LVU2639 + 8287 0102 D4E7 b .L441 + 8288 .L457: + 8289 .align 2 + 8290 .L456: + 8291 0104 8800FFFF .word -65400 + 8292 .cfi_endproc + 8293 .LFE111: + 8295 .section .text.TIM_SlaveTimer_SetConfig,"ax",%progbits + 8296 .align 1 + 8297 .syntax unified + 8298 .code 16 + 8299 .thumb_func + 8301 TIM_SlaveTimer_SetConfig: + 8302 .LVL663: + 8303 .LFB149: +7117:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** HAL_StatusTypeDef status = HAL_OK; + 8304 .loc 1 7117 1 is_stmt 1 view -0 + 8305 .cfi_startproc + 8306 @ args = 0, pretend = 0, frame = 0 + 8307 @ frame_needed = 0, uses_anonymous_args = 0 +7117:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** HAL_StatusTypeDef status = HAL_OK; + 8308 .loc 1 7117 1 is_stmt 0 view .LVU2641 + 8309 0000 70B5 push {r4, r5, r6, lr} + 8310 .cfi_def_cfa_offset 16 + 8311 .cfi_offset 4, -16 + 8312 .cfi_offset 5, -12 + 8313 .cfi_offset 6, -8 + 8314 .cfi_offset 14, -4 + 8315 0002 0B00 movs r3, r1 +7118:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** uint32_t tmpsmcr; + 8316 .loc 1 7118 3 is_stmt 1 view .LVU2642 + 8317 .LVL664: +7119:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** uint32_t tmpccmr1; + 8318 .loc 1 7119 3 view .LVU2643 +7120:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** uint32_t tmpccer; + 8319 .loc 1 7120 3 view .LVU2644 +7121:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 8320 .loc 1 7121 3 view .LVU2645 +7124:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 8321 .loc 1 7124 3 view .LVU2646 +7124:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 8322 .loc 1 7124 17 is_stmt 0 view .LVU2647 + 8323 0004 0468 ldr r4, [r0] +7124:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 8324 .loc 1 7124 11 view .LVU2648 + 8325 0006 A168 ldr r1, [r4, #8] + 8326 .LVL665: +7127:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** /* Set the Input Trigger source */ + 8327 .loc 1 7127 3 is_stmt 1 view .LVU2649 + ARM GAS /tmp/ccMtK8ce.s page 317 + + +7127:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** /* Set the Input Trigger source */ + 8328 .loc 1 7127 11 is_stmt 0 view .LVU2650 + 8329 0008 7022 movs r2, #112 + 8330 000a 9143 bics r1, r2 + 8331 .LVL666: +7129:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 8332 .loc 1 7129 3 is_stmt 1 view .LVU2651 +7129:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 8333 .loc 1 7129 26 is_stmt 0 view .LVU2652 + 8334 000c 5A68 ldr r2, [r3, #4] +7129:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 8335 .loc 1 7129 11 view .LVU2653 + 8336 000e 0A43 orrs r2, r1 + 8337 .LVL667: +7132:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** /* Set the slave mode */ + 8338 .loc 1 7132 3 is_stmt 1 view .LVU2654 +7132:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** /* Set the slave mode */ + 8339 .loc 1 7132 11 is_stmt 0 view .LVU2655 + 8340 0010 0721 movs r1, #7 + 8341 0012 8A43 bics r2, r1 + 8342 .LVL668: +7134:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 8343 .loc 1 7134 3 is_stmt 1 view .LVU2656 +7134:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 8344 .loc 1 7134 26 is_stmt 0 view .LVU2657 + 8345 0014 1968 ldr r1, [r3] +7134:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 8346 .loc 1 7134 11 view .LVU2658 + 8347 0016 0A43 orrs r2, r1 + 8348 .LVL669: +7137:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 8349 .loc 1 7137 3 is_stmt 1 view .LVU2659 +7137:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 8350 .loc 1 7137 24 is_stmt 0 view .LVU2660 + 8351 0018 A260 str r2, [r4, #8] +7140:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** { + 8352 .loc 1 7140 3 is_stmt 1 view .LVU2661 +7140:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** { + 8353 .loc 1 7140 23 is_stmt 0 view .LVU2662 + 8354 001a 5A68 ldr r2, [r3, #4] + 8355 .LVL670: +7140:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** { + 8356 .loc 1 7140 3 view .LVU2663 + 8357 001c 502A cmp r2, #80 + 8358 001e 31D0 beq .L459 + 8359 0020 0BD9 bls .L472 + 8360 0022 602A cmp r2, #96 + 8361 0024 35D0 beq .L464 + 8362 0026 702A cmp r2, #112 + 8363 0028 44D1 bne .L470 +7145:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** assert_param(IS_TIM_TRIGGERPRESCALER(sSlaveConfig->TriggerPrescaler)); + 8364 .loc 1 7145 7 is_stmt 1 view .LVU2664 +7146:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** assert_param(IS_TIM_TRIGGERPOLARITY(sSlaveConfig->TriggerPolarity)); + 8365 .loc 1 7146 7 view .LVU2665 +7147:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** assert_param(IS_TIM_TRIGGERFILTER(sSlaveConfig->TriggerFilter)); + 8366 .loc 1 7147 7 view .LVU2666 +7148:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** /* Configure the ETR Trigger source */ + ARM GAS /tmp/ccMtK8ce.s page 318 + + + 8367 .loc 1 7148 7 view .LVU2667 +7150:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** sSlaveConfig->TriggerPrescaler, + 8368 .loc 1 7150 7 view .LVU2668 +7151:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** sSlaveConfig->TriggerPolarity, + 8369 .loc 1 7151 37 is_stmt 0 view .LVU2669 + 8370 002a D968 ldr r1, [r3, #12] +7152:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** sSlaveConfig->TriggerFilter); + 8371 .loc 1 7152 37 view .LVU2670 + 8372 002c 9A68 ldr r2, [r3, #8] +7153:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** break; + 8373 .loc 1 7153 37 view .LVU2671 + 8374 002e 1B69 ldr r3, [r3, #16] + 8375 .LVL671: +7150:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** sSlaveConfig->TriggerPrescaler, + 8376 .loc 1 7150 7 view .LVU2672 + 8377 0030 0068 ldr r0, [r0] + 8378 .LVL672: +7150:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** sSlaveConfig->TriggerPrescaler, + 8379 .loc 1 7150 7 view .LVU2673 + 8380 0032 FFF7FEFF bl TIM_ETR_SetConfig + 8381 .LVL673: +7154:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** } + 8382 .loc 1 7154 7 is_stmt 1 view .LVU2674 +7118:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** uint32_t tmpsmcr; + 8383 .loc 1 7118 21 is_stmt 0 view .LVU2675 + 8384 0036 0020 movs r0, #0 + 8385 .L462: + 8386 .LVL674: +7227:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 8387 .loc 1 7227 1 view .LVU2676 + 8388 @ sp needed + 8389 0038 70BD pop {r4, r5, r6, pc} + 8390 .LVL675: + 8391 .L472: +7140:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** { + 8392 .loc 1 7140 3 view .LVU2677 + 8393 003a 402A cmp r2, #64 + 8394 003c 0DD0 beq .L461 + 8395 003e 2FD8 bhi .L465 + 8396 0040 202A cmp r2, #32 + 8397 0042 2FD0 beq .L466 + 8398 0044 05D8 bhi .L463 + 8399 0046 002A cmp r2, #0 + 8400 0048 2ED0 beq .L467 + 8401 004a 102A cmp r2, #16 + 8402 004c 2ED1 bne .L468 + 8403 004e 0020 movs r0, #0 + 8404 .LVL676: +7140:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** { + 8405 .loc 1 7140 3 view .LVU2678 + 8406 0050 F2E7 b .L462 + 8407 .LVL677: + 8408 .L463: +7140:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** { + 8409 .loc 1 7140 3 view .LVU2679 + 8410 0052 302A cmp r2, #48 + 8411 0054 2CD1 bne .L469 + ARM GAS /tmp/ccMtK8ce.s page 319 + + + 8412 0056 0020 movs r0, #0 + 8413 .LVL678: +7140:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** { + 8414 .loc 1 7140 3 view .LVU2680 + 8415 0058 EEE7 b .L462 + 8416 .LVL679: + 8417 .L461: +7160:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** assert_param(IS_TIM_TRIGGERFILTER(sSlaveConfig->TriggerFilter)); + 8418 .loc 1 7160 7 is_stmt 1 view .LVU2681 +7161:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 8419 .loc 1 7161 7 view .LVU2682 +7163:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** { + 8420 .loc 1 7163 7 view .LVU2683 +7163:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** { + 8421 .loc 1 7163 23 is_stmt 0 view .LVU2684 + 8422 005a 1A68 ldr r2, [r3] +7163:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** { + 8423 .loc 1 7163 10 view .LVU2685 + 8424 005c 052A cmp r2, #5 + 8425 005e 2BD0 beq .L471 +7169:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** htim->Instance->CCER &= ~TIM_CCER_CC1E; + 8426 .loc 1 7169 7 is_stmt 1 view .LVU2686 +7169:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** htim->Instance->CCER &= ~TIM_CCER_CC1E; + 8427 .loc 1 7169 21 is_stmt 0 view .LVU2687 + 8428 0060 0268 ldr r2, [r0] +7169:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** htim->Instance->CCER &= ~TIM_CCER_CC1E; + 8429 .loc 1 7169 15 view .LVU2688 + 8430 0062 146A ldr r4, [r2, #32] + 8431 .LVL680: +7170:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** tmpccmr1 = htim->Instance->CCMR1; + 8432 .loc 1 7170 7 is_stmt 1 view .LVU2689 +7170:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** tmpccmr1 = htim->Instance->CCMR1; + 8433 .loc 1 7170 21 is_stmt 0 view .LVU2690 + 8434 0064 116A ldr r1, [r2, #32] +7170:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** tmpccmr1 = htim->Instance->CCMR1; + 8435 .loc 1 7170 28 view .LVU2691 + 8436 0066 0125 movs r5, #1 + 8437 0068 A943 bics r1, r5 + 8438 006a 1162 str r1, [r2, #32] +7171:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 8439 .loc 1 7171 7 is_stmt 1 view .LVU2692 +7171:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 8440 .loc 1 7171 22 is_stmt 0 view .LVU2693 + 8441 006c 0168 ldr r1, [r0] +7171:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 8442 .loc 1 7171 16 view .LVU2694 + 8443 006e 8A69 ldr r2, [r1, #24] + 8444 .LVL681: +7174:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** tmpccmr1 |= ((sSlaveConfig->TriggerFilter) << 4U); + 8445 .loc 1 7174 7 is_stmt 1 view .LVU2695 +7174:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** tmpccmr1 |= ((sSlaveConfig->TriggerFilter) << 4U); + 8446 .loc 1 7174 16 is_stmt 0 view .LVU2696 + 8447 0070 EF35 adds r5, r5, #239 + 8448 0072 AA43 bics r2, r5 + 8449 .LVL682: +7175:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 8450 .loc 1 7175 7 is_stmt 1 view .LVU2697 + ARM GAS /tmp/ccMtK8ce.s page 320 + + +7175:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 8451 .loc 1 7175 33 is_stmt 0 view .LVU2698 + 8452 0074 1B69 ldr r3, [r3, #16] + 8453 .LVL683: +7175:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 8454 .loc 1 7175 50 view .LVU2699 + 8455 0076 1B01 lsls r3, r3, #4 +7175:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 8456 .loc 1 7175 16 view .LVU2700 + 8457 0078 1343 orrs r3, r2 + 8458 .LVL684: +7178:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** htim->Instance->CCER = tmpccer; + 8459 .loc 1 7178 7 is_stmt 1 view .LVU2701 +7178:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** htim->Instance->CCER = tmpccer; + 8460 .loc 1 7178 29 is_stmt 0 view .LVU2702 + 8461 007a 8B61 str r3, [r1, #24] +7179:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** break; + 8462 .loc 1 7179 7 is_stmt 1 view .LVU2703 +7179:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** break; + 8463 .loc 1 7179 11 is_stmt 0 view .LVU2704 + 8464 007c 0368 ldr r3, [r0] + 8465 .LVL685: +7179:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** break; + 8466 .loc 1 7179 28 view .LVU2705 + 8467 007e 1C62 str r4, [r3, #32] + 8468 .LVL686: +7180:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** } + 8469 .loc 1 7180 7 is_stmt 1 view .LVU2706 +7118:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** uint32_t tmpsmcr; + 8470 .loc 1 7118 21 is_stmt 0 view .LVU2707 + 8471 0080 0020 movs r0, #0 + 8472 .LVL687: +7180:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** } + 8473 .loc 1 7180 7 view .LVU2708 + 8474 0082 D9E7 b .L462 + 8475 .LVL688: + 8476 .L459: +7186:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** assert_param(IS_TIM_TRIGGERPOLARITY(sSlaveConfig->TriggerPolarity)); + 8477 .loc 1 7186 7 is_stmt 1 view .LVU2709 +7187:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** assert_param(IS_TIM_TRIGGERFILTER(sSlaveConfig->TriggerFilter)); + 8478 .loc 1 7187 7 view .LVU2710 +7188:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 8479 .loc 1 7188 7 view .LVU2711 +7191:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** sSlaveConfig->TriggerPolarity, + 8480 .loc 1 7191 7 view .LVU2712 +7192:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** sSlaveConfig->TriggerFilter); + 8481 .loc 1 7192 44 is_stmt 0 view .LVU2713 + 8482 0084 9968 ldr r1, [r3, #8] +7193:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** break; + 8483 .loc 1 7193 44 view .LVU2714 + 8484 0086 1A69 ldr r2, [r3, #16] +7191:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** sSlaveConfig->TriggerPolarity, + 8485 .loc 1 7191 7 view .LVU2715 + 8486 0088 0068 ldr r0, [r0] + 8487 .LVL689: +7191:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** sSlaveConfig->TriggerPolarity, + 8488 .loc 1 7191 7 view .LVU2716 + ARM GAS /tmp/ccMtK8ce.s page 321 + + + 8489 008a FFF7FEFF bl TIM_TI1_ConfigInputStage + 8490 .LVL690: +7194:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** } + 8491 .loc 1 7194 7 is_stmt 1 view .LVU2717 +7118:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** uint32_t tmpsmcr; + 8492 .loc 1 7118 21 is_stmt 0 view .LVU2718 + 8493 008e 0020 movs r0, #0 +7194:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** } + 8494 .loc 1 7194 7 view .LVU2719 + 8495 0090 D2E7 b .L462 + 8496 .LVL691: + 8497 .L464: +7200:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** assert_param(IS_TIM_TRIGGERPOLARITY(sSlaveConfig->TriggerPolarity)); + 8498 .loc 1 7200 7 is_stmt 1 view .LVU2720 +7201:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** assert_param(IS_TIM_TRIGGERFILTER(sSlaveConfig->TriggerFilter)); + 8499 .loc 1 7201 7 view .LVU2721 +7202:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 8500 .loc 1 7202 7 view .LVU2722 +7205:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** sSlaveConfig->TriggerPolarity, + 8501 .loc 1 7205 7 view .LVU2723 +7206:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** sSlaveConfig->TriggerFilter); + 8502 .loc 1 7206 44 is_stmt 0 view .LVU2724 + 8503 0092 9968 ldr r1, [r3, #8] +7207:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** break; + 8504 .loc 1 7207 44 view .LVU2725 + 8505 0094 1A69 ldr r2, [r3, #16] +7205:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** sSlaveConfig->TriggerPolarity, + 8506 .loc 1 7205 7 view .LVU2726 + 8507 0096 0068 ldr r0, [r0] + 8508 .LVL692: +7205:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** sSlaveConfig->TriggerPolarity, + 8509 .loc 1 7205 7 view .LVU2727 + 8510 0098 FFF7FEFF bl TIM_TI2_ConfigInputStage + 8511 .LVL693: +7208:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** } + 8512 .loc 1 7208 7 is_stmt 1 view .LVU2728 +7118:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** uint32_t tmpsmcr; + 8513 .loc 1 7118 21 is_stmt 0 view .LVU2729 + 8514 009c 0020 movs r0, #0 +7208:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** } + 8515 .loc 1 7208 7 view .LVU2730 + 8516 009e CBE7 b .L462 + 8517 .LVL694: + 8518 .L465: +7222:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** break; + 8519 .loc 1 7222 14 view .LVU2731 + 8520 00a0 0120 movs r0, #1 + 8521 .LVL695: +7222:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** break; + 8522 .loc 1 7222 14 view .LVU2732 + 8523 00a2 C9E7 b .L462 + 8524 .LVL696: + 8525 .L466: +7140:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** { + 8526 .loc 1 7140 3 view .LVU2733 + 8527 00a4 0020 movs r0, #0 + 8528 .LVL697: + ARM GAS /tmp/ccMtK8ce.s page 322 + + +7140:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** { + 8529 .loc 1 7140 3 view .LVU2734 + 8530 00a6 C7E7 b .L462 + 8531 .LVL698: + 8532 .L467: +7140:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** { + 8533 .loc 1 7140 3 view .LVU2735 + 8534 00a8 0020 movs r0, #0 + 8535 .LVL699: +7140:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** { + 8536 .loc 1 7140 3 view .LVU2736 + 8537 00aa C5E7 b .L462 + 8538 .LVL700: + 8539 .L468: +7222:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** break; + 8540 .loc 1 7222 14 view .LVU2737 + 8541 00ac 0120 movs r0, #1 + 8542 .LVL701: +7222:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** break; + 8543 .loc 1 7222 14 view .LVU2738 + 8544 00ae C3E7 b .L462 + 8545 .LVL702: + 8546 .L469: +7222:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** break; + 8547 .loc 1 7222 14 view .LVU2739 + 8548 00b0 0120 movs r0, #1 + 8549 .LVL703: +7222:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** break; + 8550 .loc 1 7222 14 view .LVU2740 + 8551 00b2 C1E7 b .L462 + 8552 .LVL704: + 8553 .L470: +7222:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** break; + 8554 .loc 1 7222 14 view .LVU2741 + 8555 00b4 0120 movs r0, #1 + 8556 .LVL705: +7222:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** break; + 8557 .loc 1 7222 14 view .LVU2742 + 8558 00b6 BFE7 b .L462 + 8559 .LVL706: + 8560 .L471: +7165:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** } + 8561 .loc 1 7165 16 view .LVU2743 + 8562 00b8 0120 movs r0, #1 + 8563 .LVL707: +7165:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** } + 8564 .loc 1 7165 16 view .LVU2744 + 8565 00ba BDE7 b .L462 + 8566 .cfi_endproc + 8567 .LFE149: + 8569 .section .text.HAL_TIM_SlaveConfigSynchro,"ax",%progbits + 8570 .align 1 + 8571 .global HAL_TIM_SlaveConfigSynchro + 8572 .syntax unified + 8573 .code 16 + 8574 .thumb_func + 8576 HAL_TIM_SlaveConfigSynchro: + ARM GAS /tmp/ccMtK8ce.s page 323 + + + 8577 .LVL708: + 8578 .LFB113: +5496:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** /* Check the parameters */ + 8579 .loc 1 5496 1 is_stmt 1 view -0 + 8580 .cfi_startproc + 8581 @ args = 0, pretend = 0, frame = 0 + 8582 @ frame_needed = 0, uses_anonymous_args = 0 +5496:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** /* Check the parameters */ + 8583 .loc 1 5496 1 is_stmt 0 view .LVU2746 + 8584 0000 10B5 push {r4, lr} + 8585 .cfi_def_cfa_offset 8 + 8586 .cfi_offset 4, -8 + 8587 .cfi_offset 14, -4 + 8588 0002 0400 movs r4, r0 +5498:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** assert_param(IS_TIM_SLAVE_MODE(sSlaveConfig->SlaveMode)); + 8589 .loc 1 5498 3 is_stmt 1 view .LVU2747 +5499:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** assert_param(IS_TIM_TRIGGER_SELECTION(sSlaveConfig->InputTrigger)); + 8590 .loc 1 5499 3 view .LVU2748 +5500:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 8591 .loc 1 5500 3 view .LVU2749 +5502:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 8592 .loc 1 5502 3 view .LVU2750 +5502:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 8593 .loc 1 5502 3 view .LVU2751 + 8594 0004 3C23 movs r3, #60 + 8595 0006 C35C ldrb r3, [r0, r3] + 8596 0008 012B cmp r3, #1 + 8597 000a 22D0 beq .L476 +5502:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 8598 .loc 1 5502 3 discriminator 2 view .LVU2752 + 8599 000c 3C23 movs r3, #60 + 8600 000e 0122 movs r2, #1 + 8601 0010 C254 strb r2, [r0, r3] +5502:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 8602 .loc 1 5502 3 discriminator 2 view .LVU2753 +5504:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 8603 .loc 1 5504 3 view .LVU2754 +5504:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 8604 .loc 1 5504 15 is_stmt 0 view .LVU2755 + 8605 0012 0133 adds r3, r3, #1 + 8606 0014 0132 adds r2, r2, #1 + 8607 0016 C254 strb r2, [r0, r3] +5506:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** { + 8608 .loc 1 5506 3 is_stmt 1 view .LVU2756 +5506:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** { + 8609 .loc 1 5506 7 is_stmt 0 view .LVU2757 + 8610 0018 FFF7FEFF bl TIM_SlaveTimer_SetConfig + 8611 .LVL709: +5506:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** { + 8612 .loc 1 5506 6 discriminator 1 view .LVU2758 + 8613 001c 0028 cmp r0, #0 + 8614 001e 10D1 bne .L477 +5514:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 8615 .loc 1 5514 3 is_stmt 1 view .LVU2759 + 8616 0020 2268 ldr r2, [r4] + 8617 0022 D368 ldr r3, [r2, #12] + 8618 0024 4021 movs r1, #64 + ARM GAS /tmp/ccMtK8ce.s page 324 + + + 8619 0026 8B43 bics r3, r1 + 8620 0028 D360 str r3, [r2, #12] +5517:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 8621 .loc 1 5517 3 view .LVU2760 + 8622 002a 2268 ldr r2, [r4] + 8623 002c D368 ldr r3, [r2, #12] + 8624 002e 0A49 ldr r1, .L478 + 8625 0030 0B40 ands r3, r1 + 8626 0032 D360 str r3, [r2, #12] +5519:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 8627 .loc 1 5519 3 view .LVU2761 +5519:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 8628 .loc 1 5519 15 is_stmt 0 view .LVU2762 + 8629 0034 3D23 movs r3, #61 + 8630 0036 0122 movs r2, #1 + 8631 0038 E254 strb r2, [r4, r3] +5521:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 8632 .loc 1 5521 3 is_stmt 1 view .LVU2763 +5521:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 8633 .loc 1 5521 3 view .LVU2764 + 8634 003a 013B subs r3, r3, #1 + 8635 003c 0022 movs r2, #0 + 8636 003e E254 strb r2, [r4, r3] +5521:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 8637 .loc 1 5521 3 view .LVU2765 +5523:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** } + 8638 .loc 1 5523 3 view .LVU2766 + 8639 .L474: +5524:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 8640 .loc 1 5524 1 is_stmt 0 view .LVU2767 + 8641 @ sp needed + 8642 .LVL710: +5524:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 8643 .loc 1 5524 1 view .LVU2768 + 8644 0040 10BD pop {r4, pc} + 8645 .LVL711: + 8646 .L477: +5508:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** __HAL_UNLOCK(htim); + 8647 .loc 1 5508 5 is_stmt 1 view .LVU2769 +5508:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** __HAL_UNLOCK(htim); + 8648 .loc 1 5508 17 is_stmt 0 view .LVU2770 + 8649 0042 3D23 movs r3, #61 + 8650 0044 0122 movs r2, #1 + 8651 0046 E254 strb r2, [r4, r3] +5509:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** return HAL_ERROR; + 8652 .loc 1 5509 5 is_stmt 1 view .LVU2771 +5509:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** return HAL_ERROR; + 8653 .loc 1 5509 5 view .LVU2772 + 8654 0048 013B subs r3, r3, #1 + 8655 004a 0022 movs r2, #0 + 8656 004c E254 strb r2, [r4, r3] +5509:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** return HAL_ERROR; + 8657 .loc 1 5509 5 view .LVU2773 +5510:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** } + 8658 .loc 1 5510 5 view .LVU2774 +5510:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** } + 8659 .loc 1 5510 12 is_stmt 0 view .LVU2775 + ARM GAS /tmp/ccMtK8ce.s page 325 + + + 8660 004e 0120 movs r0, #1 + 8661 0050 F6E7 b .L474 + 8662 .LVL712: + 8663 .L476: +5502:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 8664 .loc 1 5502 3 discriminator 1 view .LVU2776 + 8665 0052 0220 movs r0, #2 + 8666 .LVL713: +5502:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 8667 .loc 1 5502 3 discriminator 1 view .LVU2777 + 8668 0054 F4E7 b .L474 + 8669 .L479: + 8670 0056 C046 .align 2 + 8671 .L478: + 8672 0058 FFBFFFFF .word -16385 + 8673 .cfi_endproc + 8674 .LFE113: + 8676 .section .text.HAL_TIM_SlaveConfigSynchro_IT,"ax",%progbits + 8677 .align 1 + 8678 .global HAL_TIM_SlaveConfigSynchro_IT + 8679 .syntax unified + 8680 .code 16 + 8681 .thumb_func + 8683 HAL_TIM_SlaveConfigSynchro_IT: + 8684 .LVL714: + 8685 .LFB114: +5537:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** /* Check the parameters */ + 8686 .loc 1 5537 1 is_stmt 1 view -0 + 8687 .cfi_startproc + 8688 @ args = 0, pretend = 0, frame = 0 + 8689 @ frame_needed = 0, uses_anonymous_args = 0 +5537:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** /* Check the parameters */ + 8690 .loc 1 5537 1 is_stmt 0 view .LVU2779 + 8691 0000 10B5 push {r4, lr} + 8692 .cfi_def_cfa_offset 8 + 8693 .cfi_offset 4, -8 + 8694 .cfi_offset 14, -4 + 8695 0002 0400 movs r4, r0 +5539:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** assert_param(IS_TIM_SLAVE_MODE(sSlaveConfig->SlaveMode)); + 8696 .loc 1 5539 3 is_stmt 1 view .LVU2780 +5540:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** assert_param(IS_TIM_TRIGGER_SELECTION(sSlaveConfig->InputTrigger)); + 8697 .loc 1 5540 3 view .LVU2781 +5541:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 8698 .loc 1 5541 3 view .LVU2782 +5543:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 8699 .loc 1 5543 3 view .LVU2783 +5543:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 8700 .loc 1 5543 3 view .LVU2784 + 8701 0004 3C23 movs r3, #60 + 8702 0006 C35C ldrb r3, [r0, r3] + 8703 0008 012B cmp r3, #1 + 8704 000a 22D0 beq .L483 +5543:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 8705 .loc 1 5543 3 discriminator 2 view .LVU2785 + 8706 000c 3C23 movs r3, #60 + 8707 000e 0122 movs r2, #1 + 8708 0010 C254 strb r2, [r0, r3] + ARM GAS /tmp/ccMtK8ce.s page 326 + + +5543:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 8709 .loc 1 5543 3 discriminator 2 view .LVU2786 +5545:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 8710 .loc 1 5545 3 view .LVU2787 +5545:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 8711 .loc 1 5545 15 is_stmt 0 view .LVU2788 + 8712 0012 0133 adds r3, r3, #1 + 8713 0014 0132 adds r2, r2, #1 + 8714 0016 C254 strb r2, [r0, r3] +5547:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** { + 8715 .loc 1 5547 3 is_stmt 1 view .LVU2789 +5547:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** { + 8716 .loc 1 5547 7 is_stmt 0 view .LVU2790 + 8717 0018 FFF7FEFF bl TIM_SlaveTimer_SetConfig + 8718 .LVL715: +5547:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** { + 8719 .loc 1 5547 6 discriminator 1 view .LVU2791 + 8720 001c 0028 cmp r0, #0 + 8721 001e 10D1 bne .L484 +5555:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 8722 .loc 1 5555 3 is_stmt 1 view .LVU2792 + 8723 0020 2268 ldr r2, [r4] + 8724 0022 D368 ldr r3, [r2, #12] + 8725 0024 4021 movs r1, #64 + 8726 0026 0B43 orrs r3, r1 + 8727 0028 D360 str r3, [r2, #12] +5558:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 8728 .loc 1 5558 3 view .LVU2793 + 8729 002a 2268 ldr r2, [r4] + 8730 002c D368 ldr r3, [r2, #12] + 8731 002e 0A49 ldr r1, .L485 + 8732 0030 0B40 ands r3, r1 + 8733 0032 D360 str r3, [r2, #12] +5560:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 8734 .loc 1 5560 3 view .LVU2794 +5560:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 8735 .loc 1 5560 15 is_stmt 0 view .LVU2795 + 8736 0034 3D23 movs r3, #61 + 8737 0036 0122 movs r2, #1 + 8738 0038 E254 strb r2, [r4, r3] +5562:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 8739 .loc 1 5562 3 is_stmt 1 view .LVU2796 +5562:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 8740 .loc 1 5562 3 view .LVU2797 + 8741 003a 013B subs r3, r3, #1 + 8742 003c 0022 movs r2, #0 + 8743 003e E254 strb r2, [r4, r3] +5562:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 8744 .loc 1 5562 3 view .LVU2798 +5564:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** } + 8745 .loc 1 5564 3 view .LVU2799 + 8746 .L481: +5565:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 8747 .loc 1 5565 1 is_stmt 0 view .LVU2800 + 8748 @ sp needed + 8749 .LVL716: +5565:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + ARM GAS /tmp/ccMtK8ce.s page 327 + + + 8750 .loc 1 5565 1 view .LVU2801 + 8751 0040 10BD pop {r4, pc} + 8752 .LVL717: + 8753 .L484: +5549:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** __HAL_UNLOCK(htim); + 8754 .loc 1 5549 5 is_stmt 1 view .LVU2802 +5549:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** __HAL_UNLOCK(htim); + 8755 .loc 1 5549 17 is_stmt 0 view .LVU2803 + 8756 0042 3D23 movs r3, #61 + 8757 0044 0122 movs r2, #1 + 8758 0046 E254 strb r2, [r4, r3] +5550:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** return HAL_ERROR; + 8759 .loc 1 5550 5 is_stmt 1 view .LVU2804 +5550:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** return HAL_ERROR; + 8760 .loc 1 5550 5 view .LVU2805 + 8761 0048 013B subs r3, r3, #1 + 8762 004a 0022 movs r2, #0 + 8763 004c E254 strb r2, [r4, r3] +5550:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** return HAL_ERROR; + 8764 .loc 1 5550 5 view .LVU2806 +5551:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** } + 8765 .loc 1 5551 5 view .LVU2807 +5551:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** } + 8766 .loc 1 5551 12 is_stmt 0 view .LVU2808 + 8767 004e 0120 movs r0, #1 + 8768 0050 F6E7 b .L481 + 8769 .LVL718: + 8770 .L483: +5543:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 8771 .loc 1 5543 3 discriminator 1 view .LVU2809 + 8772 0052 0220 movs r0, #2 + 8773 .LVL719: +5543:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 8774 .loc 1 5543 3 discriminator 1 view .LVU2810 + 8775 0054 F4E7 b .L481 + 8776 .L486: + 8777 0056 C046 .align 2 + 8778 .L485: + 8779 0058 FFBFFFFF .word -16385 + 8780 .cfi_endproc + 8781 .LFE114: + 8783 .section .text.TIM_CCxChannelCmd,"ax",%progbits + 8784 .align 1 + 8785 .global TIM_CCxChannelCmd + 8786 .syntax unified + 8787 .code 16 + 8788 .thumb_func + 8790 TIM_CCxChannelCmd: + 8791 .LVL720: + 8792 .LFB158: +7559:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** +7560:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** /** +7561:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** * @brief Enables or disables the TIM Capture Compare Channel x. +7562:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** * @param TIMx to select the TIM peripheral +7563:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** * @param Channel specifies the TIM Channel +7564:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** * This parameter can be one of the following values: +7565:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** * @arg TIM_CHANNEL_1: TIM Channel 1 + ARM GAS /tmp/ccMtK8ce.s page 328 + + +7566:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** * @arg TIM_CHANNEL_2: TIM Channel 2 +7567:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** * @arg TIM_CHANNEL_3: TIM Channel 3 +7568:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** * @arg TIM_CHANNEL_4: TIM Channel 4 +7569:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** * @param ChannelState specifies the TIM Channel CCxE bit new state. +7570:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** * This parameter can be: TIM_CCx_ENABLE or TIM_CCx_DISABLE. +7571:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** * @retval None +7572:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** */ +7573:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** void TIM_CCxChannelCmd(TIM_TypeDef *TIMx, uint32_t Channel, uint32_t ChannelState) +7574:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** { + 8793 .loc 1 7574 1 is_stmt 1 view -0 + 8794 .cfi_startproc + 8795 @ args = 0, pretend = 0, frame = 0 + 8796 @ frame_needed = 0, uses_anonymous_args = 0 + 8797 .loc 1 7574 1 is_stmt 0 view .LVU2812 + 8798 0000 10B5 push {r4, lr} + 8799 .cfi_def_cfa_offset 8 + 8800 .cfi_offset 4, -8 + 8801 .cfi_offset 14, -4 +7575:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** uint32_t tmp; + 8802 .loc 1 7575 3 is_stmt 1 view .LVU2813 +7576:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** +7577:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** /* Check the parameters */ +7578:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** assert_param(IS_TIM_CC1_INSTANCE(TIMx)); + 8803 .loc 1 7578 3 view .LVU2814 +7579:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** assert_param(IS_TIM_CHANNELS(Channel)); + 8804 .loc 1 7579 3 view .LVU2815 +7580:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** +7581:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** tmp = TIM_CCER_CC1E << (Channel & 0x1FU); /* 0x1FU = 31 bits max shift */ + 8805 .loc 1 7581 3 view .LVU2816 + 8806 .loc 1 7581 35 is_stmt 0 view .LVU2817 + 8807 0002 1F23 movs r3, #31 + 8808 0004 1940 ands r1, r3 + 8809 .LVL721: + 8810 .loc 1 7581 7 view .LVU2818 + 8811 0006 0124 movs r4, #1 + 8812 0008 8C40 lsls r4, r4, r1 + 8813 .LVL722: +7582:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** +7583:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** /* Reset the CCxE Bit */ +7584:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** TIMx->CCER &= ~tmp; + 8814 .loc 1 7584 3 is_stmt 1 view .LVU2819 + 8815 .loc 1 7584 7 is_stmt 0 view .LVU2820 + 8816 000a 036A ldr r3, [r0, #32] + 8817 .loc 1 7584 14 view .LVU2821 + 8818 000c A343 bics r3, r4 + 8819 000e 0362 str r3, [r0, #32] +7585:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** +7586:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** /* Set or reset the CCxE Bit */ +7587:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** TIMx->CCER |= (uint32_t)(ChannelState << (Channel & 0x1FU)); /* 0x1FU = 31 bits max shift */ + 8820 .loc 1 7587 3 is_stmt 1 view .LVU2822 + 8821 .loc 1 7587 7 is_stmt 0 view .LVU2823 + 8822 0010 036A ldr r3, [r0, #32] + 8823 .loc 1 7587 41 view .LVU2824 + 8824 0012 8A40 lsls r2, r2, r1 + 8825 .LVL723: + 8826 .loc 1 7587 14 view .LVU2825 + 8827 0014 1343 orrs r3, r2 + ARM GAS /tmp/ccMtK8ce.s page 329 + + + 8828 0016 0362 str r3, [r0, #32] +7588:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** } + 8829 .loc 1 7588 1 view .LVU2826 + 8830 @ sp needed + 8831 .LVL724: + 8832 .loc 1 7588 1 view .LVU2827 + 8833 0018 10BD pop {r4, pc} + 8834 .cfi_endproc + 8835 .LFE158: + 8837 .section .text.HAL_TIM_OC_Start,"ax",%progbits + 8838 .align 1 + 8839 .global HAL_TIM_OC_Start + 8840 .syntax unified + 8841 .code 16 + 8842 .thumb_func + 8844 HAL_TIM_OC_Start: + 8845 .LVL725: + 8846 .LFB54: + 790:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** uint32_t tmpsmcr; + 8847 .loc 1 790 1 is_stmt 1 view -0 + 8848 .cfi_startproc + 8849 @ args = 0, pretend = 0, frame = 0 + 8850 @ frame_needed = 0, uses_anonymous_args = 0 + 790:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** uint32_t tmpsmcr; + 8851 .loc 1 790 1 is_stmt 0 view .LVU2829 + 8852 0000 10B5 push {r4, lr} + 8853 .cfi_def_cfa_offset 8 + 8854 .cfi_offset 4, -8 + 8855 .cfi_offset 14, -4 + 8856 0002 0400 movs r4, r0 + 791:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 8857 .loc 1 791 3 is_stmt 1 view .LVU2830 + 794:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 8858 .loc 1 794 3 view .LVU2831 + 797:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** { + 8859 .loc 1 797 3 view .LVU2832 + 797:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** { + 8860 .loc 1 797 44 is_stmt 0 view .LVU2833 + 8861 0004 0029 cmp r1, #0 + 8862 0006 30D1 bne .L489 + 797:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** { + 8863 .loc 1 797 7 discriminator 1 view .LVU2834 + 8864 0008 3E23 movs r3, #62 + 8865 000a C35C ldrb r3, [r0, r3] + 797:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** { + 8866 .loc 1 797 44 discriminator 1 view .LVU2835 + 8867 000c 013B subs r3, r3, #1 + 8868 000e 5A1E subs r2, r3, #1 + 8869 0010 9341 sbcs r3, r3, r2 + 8870 0012 DBB2 uxtb r3, r3 + 8871 .L490: + 797:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** { + 8872 .loc 1 797 6 discriminator 12 view .LVU2836 + 8873 0014 002B cmp r3, #0 + 8874 0016 5CD1 bne .L502 + 803:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 8875 .loc 1 803 3 is_stmt 1 view .LVU2837 + ARM GAS /tmp/ccMtK8ce.s page 330 + + + 8876 0018 0029 cmp r1, #0 + 8877 001a 3FD1 bne .L494 + 803:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 8878 .loc 1 803 3 is_stmt 0 discriminator 1 view .LVU2838 + 8879 001c 3E33 adds r3, r3, #62 + 8880 001e 0222 movs r2, #2 + 8881 0020 E254 strb r2, [r4, r3] + 8882 .L495: + 806:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 8883 .loc 1 806 3 is_stmt 1 view .LVU2839 + 8884 0022 2068 ldr r0, [r4] + 8885 .LVL726: + 806:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 8886 .loc 1 806 3 is_stmt 0 view .LVU2840 + 8887 0024 0122 movs r2, #1 + 8888 0026 FFF7FEFF bl TIM_CCxChannelCmd + 8889 .LVL727: + 808:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** { + 8890 .loc 1 808 3 is_stmt 1 view .LVU2841 + 808:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** { + 8891 .loc 1 808 7 is_stmt 0 view .LVU2842 + 8892 002a 2368 ldr r3, [r4] + 8893 002c 2B4A ldr r2, .L508 + 8894 002e 9342 cmp r3, r2 + 8895 0030 05D0 beq .L498 + 808:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** { + 8896 .loc 1 808 7 discriminator 2 view .LVU2843 + 8897 0032 2B4A ldr r2, .L508+4 + 8898 0034 9342 cmp r3, r2 + 8899 0036 02D0 beq .L498 + 808:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** { + 8900 .loc 1 808 7 discriminator 4 view .LVU2844 + 8901 0038 2A4A ldr r2, .L508+8 + 8902 003a 9342 cmp r3, r2 + 8903 003c 04D1 bne .L499 + 8904 .L498: + 811:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** } + 8905 .loc 1 811 5 is_stmt 1 view .LVU2845 + 8906 003e 596C ldr r1, [r3, #68] + 8907 0040 8022 movs r2, #128 + 8908 0042 1202 lsls r2, r2, #8 + 8909 0044 0A43 orrs r2, r1 + 8910 0046 5A64 str r2, [r3, #68] + 8911 .L499: + 815:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** { + 8912 .loc 1 815 3 view .LVU2846 + 815:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** { + 8913 .loc 1 815 7 is_stmt 0 view .LVU2847 + 8914 0048 2368 ldr r3, [r4] + 815:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** { + 8915 .loc 1 815 6 view .LVU2848 + 8916 004a 244A ldr r2, .L508 + 8917 004c 9342 cmp r3, r2 + 8918 004e 35D0 beq .L500 + 815:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** { + 8919 .loc 1 815 7 discriminator 1 view .LVU2849 + 8920 0050 8022 movs r2, #128 + ARM GAS /tmp/ccMtK8ce.s page 331 + + + 8921 0052 D205 lsls r2, r2, #23 + 8922 0054 9342 cmp r3, r2 + 8923 0056 31D0 beq .L500 + 815:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** { + 8924 .loc 1 815 7 discriminator 2 view .LVU2850 + 8925 0058 234A ldr r2, .L508+12 + 8926 005a 9342 cmp r3, r2 + 8927 005c 2ED0 beq .L500 + 825:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** } + 8928 .loc 1 825 5 is_stmt 1 view .LVU2851 + 8929 005e 1A68 ldr r2, [r3] + 8930 0060 0121 movs r1, #1 + 8931 0062 0A43 orrs r2, r1 + 8932 0064 1A60 str r2, [r3] + 829:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** } + 8933 .loc 1 829 10 is_stmt 0 view .LVU2852 + 8934 0066 0020 movs r0, #0 + 8935 0068 34E0 b .L493 + 8936 .LVL728: + 8937 .L489: + 797:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** { + 8938 .loc 1 797 44 discriminator 2 view .LVU2853 + 8939 006a 0429 cmp r1, #4 + 8940 006c 08D0 beq .L504 + 797:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** { + 8941 .loc 1 797 44 discriminator 5 view .LVU2854 + 8942 006e 0829 cmp r1, #8 + 8943 0070 0DD0 beq .L505 + 797:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** { + 8944 .loc 1 797 7 discriminator 8 view .LVU2855 + 8945 0072 4123 movs r3, #65 + 8946 0074 C35C ldrb r3, [r0, r3] + 797:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** { + 8947 .loc 1 797 44 discriminator 8 view .LVU2856 + 8948 0076 013B subs r3, r3, #1 + 8949 0078 5A1E subs r2, r3, #1 + 8950 007a 9341 sbcs r3, r3, r2 + 8951 007c DBB2 uxtb r3, r3 + 8952 007e C9E7 b .L490 + 8953 .L504: + 797:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** { + 8954 .loc 1 797 7 discriminator 4 view .LVU2857 + 8955 0080 3F23 movs r3, #63 + 8956 0082 C35C ldrb r3, [r0, r3] + 797:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** { + 8957 .loc 1 797 44 discriminator 4 view .LVU2858 + 8958 0084 013B subs r3, r3, #1 + 8959 0086 5A1E subs r2, r3, #1 + 8960 0088 9341 sbcs r3, r3, r2 + 8961 008a DBB2 uxtb r3, r3 + 8962 008c C2E7 b .L490 + 8963 .L505: + 797:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** { + 8964 .loc 1 797 7 discriminator 7 view .LVU2859 + 8965 008e 4023 movs r3, #64 + 8966 0090 C35C ldrb r3, [r0, r3] + 797:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** { + ARM GAS /tmp/ccMtK8ce.s page 332 + + + 8967 .loc 1 797 44 discriminator 7 view .LVU2860 + 8968 0092 013B subs r3, r3, #1 + 8969 0094 5A1E subs r2, r3, #1 + 8970 0096 9341 sbcs r3, r3, r2 + 8971 0098 DBB2 uxtb r3, r3 + 8972 009a BBE7 b .L490 + 8973 .L494: + 803:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 8974 .loc 1 803 3 discriminator 2 view .LVU2861 + 8975 009c 0429 cmp r1, #4 + 8976 009e 05D0 beq .L506 + 803:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 8977 .loc 1 803 3 discriminator 4 view .LVU2862 + 8978 00a0 0829 cmp r1, #8 + 8979 00a2 07D0 beq .L507 + 803:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 8980 .loc 1 803 3 discriminator 7 view .LVU2863 + 8981 00a4 4123 movs r3, #65 + 8982 00a6 0222 movs r2, #2 + 8983 00a8 E254 strb r2, [r4, r3] + 8984 00aa BAE7 b .L495 + 8985 .L506: + 803:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 8986 .loc 1 803 3 discriminator 3 view .LVU2864 + 8987 00ac 3F23 movs r3, #63 + 8988 00ae 0222 movs r2, #2 + 8989 00b0 E254 strb r2, [r4, r3] + 8990 00b2 B6E7 b .L495 + 8991 .L507: + 803:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 8992 .loc 1 803 3 discriminator 6 view .LVU2865 + 8993 00b4 4023 movs r3, #64 + 8994 00b6 0222 movs r2, #2 + 8995 00b8 E254 strb r2, [r4, r3] + 8996 00ba B2E7 b .L495 + 8997 .LVL729: + 8998 .L500: + 817:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** if (!IS_TIM_SLAVEMODE_TRIGGER_ENABLED(tmpsmcr)) + 8999 .loc 1 817 5 is_stmt 1 view .LVU2866 + 817:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** if (!IS_TIM_SLAVEMODE_TRIGGER_ENABLED(tmpsmcr)) + 9000 .loc 1 817 29 is_stmt 0 view .LVU2867 + 9001 00bc 9968 ldr r1, [r3, #8] + 817:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** if (!IS_TIM_SLAVEMODE_TRIGGER_ENABLED(tmpsmcr)) + 9002 .loc 1 817 13 view .LVU2868 + 9003 00be 0722 movs r2, #7 + 9004 00c0 0A40 ands r2, r1 + 9005 .LVL730: + 818:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** { + 9006 .loc 1 818 5 is_stmt 1 view .LVU2869 + 818:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** { + 9007 .loc 1 818 8 is_stmt 0 view .LVU2870 + 9008 00c2 062A cmp r2, #6 + 9009 00c4 07D0 beq .L503 + 820:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** } + 9010 .loc 1 820 7 is_stmt 1 view .LVU2871 + 9011 00c6 1A68 ldr r2, [r3] + 9012 .LVL731: + ARM GAS /tmp/ccMtK8ce.s page 333 + + + 820:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** } + 9013 .loc 1 820 7 is_stmt 0 view .LVU2872 + 9014 00c8 0121 movs r1, #1 + 9015 .LVL732: + 820:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** } + 9016 .loc 1 820 7 view .LVU2873 + 9017 00ca 0A43 orrs r2, r1 + 9018 00cc 1A60 str r2, [r3] + 829:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** } + 9019 .loc 1 829 10 view .LVU2874 + 9020 00ce 0020 movs r0, #0 + 9021 00d0 00E0 b .L493 + 9022 .LVL733: + 9023 .L502: + 799:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** } + 9024 .loc 1 799 12 view .LVU2875 + 9025 00d2 0120 movs r0, #1 + 9026 .LVL734: + 9027 .L493: + 830:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 9028 .loc 1 830 1 view .LVU2876 + 9029 @ sp needed + 9030 .LVL735: + 830:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 9031 .loc 1 830 1 view .LVU2877 + 9032 00d4 10BD pop {r4, pc} + 9033 .LVL736: + 9034 .L503: + 829:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** } + 9035 .loc 1 829 10 view .LVU2878 + 9036 00d6 0020 movs r0, #0 + 9037 00d8 FCE7 b .L493 + 9038 .L509: + 9039 00da C046 .align 2 + 9040 .L508: + 9041 00dc 002C0140 .word 1073818624 + 9042 00e0 00440140 .word 1073824768 + 9043 00e4 00480140 .word 1073825792 + 9044 00e8 00040040 .word 1073742848 + 9045 .cfi_endproc + 9046 .LFE54: + 9048 .section .text.HAL_TIM_OC_Stop,"ax",%progbits + 9049 .align 1 + 9050 .global HAL_TIM_OC_Stop + 9051 .syntax unified + 9052 .code 16 + 9053 .thumb_func + 9055 HAL_TIM_OC_Stop: + 9056 .LVL737: + 9057 .LFB55: + 844:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** /* Check the parameters */ + 9058 .loc 1 844 1 is_stmt 1 view -0 + 9059 .cfi_startproc + 9060 @ args = 0, pretend = 0, frame = 0 + 9061 @ frame_needed = 0, uses_anonymous_args = 0 + 844:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** /* Check the parameters */ + 9062 .loc 1 844 1 is_stmt 0 view .LVU2880 + ARM GAS /tmp/ccMtK8ce.s page 334 + + + 9063 0000 70B5 push {r4, r5, r6, lr} + 9064 .cfi_def_cfa_offset 16 + 9065 .cfi_offset 4, -16 + 9066 .cfi_offset 5, -12 + 9067 .cfi_offset 6, -8 + 9068 .cfi_offset 14, -4 + 9069 0002 0400 movs r4, r0 + 9070 0004 0D00 movs r5, r1 + 846:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 9071 .loc 1 846 3 is_stmt 1 view .LVU2881 + 849:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 9072 .loc 1 849 3 view .LVU2882 + 9073 0006 0068 ldr r0, [r0] + 9074 .LVL738: + 849:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 9075 .loc 1 849 3 is_stmt 0 view .LVU2883 + 9076 0008 0022 movs r2, #0 + 9077 000a FFF7FEFF bl TIM_CCxChannelCmd + 9078 .LVL739: + 851:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** { + 9079 .loc 1 851 3 is_stmt 1 view .LVU2884 + 851:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** { + 9080 .loc 1 851 7 is_stmt 0 view .LVU2885 + 9081 000e 2368 ldr r3, [r4] + 9082 0010 1C4A ldr r2, .L520 + 9083 0012 9342 cmp r3, r2 + 9084 0014 19D0 beq .L511 + 851:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** { + 9085 .loc 1 851 7 discriminator 2 view .LVU2886 + 9086 0016 1C4A ldr r2, .L520+4 + 9087 0018 9342 cmp r3, r2 + 9088 001a 16D0 beq .L511 + 851:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** { + 9089 .loc 1 851 7 discriminator 4 view .LVU2887 + 9090 001c 1B4A ldr r2, .L520+8 + 9091 001e 9342 cmp r3, r2 + 9092 0020 13D0 beq .L511 + 9093 .L512: + 854:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** } + 9094 .loc 1 854 5 is_stmt 1 discriminator 5 view .LVU2888 + 858:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 9095 .loc 1 858 3 view .LVU2889 + 858:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 9096 .loc 1 858 3 view .LVU2890 + 9097 0022 2368 ldr r3, [r4] + 9098 0024 196A ldr r1, [r3, #32] + 9099 0026 1A4A ldr r2, .L520+12 + 9100 0028 1142 tst r1, r2 + 9101 002a 07D1 bne .L513 + 858:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 9102 .loc 1 858 3 discriminator 1 view .LVU2891 + 9103 002c 196A ldr r1, [r3, #32] + 9104 002e 194A ldr r2, .L520+16 + 9105 0030 1142 tst r1, r2 + 9106 0032 03D1 bne .L513 + 858:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 9107 .loc 1 858 3 discriminator 3 view .LVU2892 + ARM GAS /tmp/ccMtK8ce.s page 335 + + + 9108 0034 1A68 ldr r2, [r3] + 9109 0036 0121 movs r1, #1 + 9110 0038 8A43 bics r2, r1 + 9111 003a 1A60 str r2, [r3] + 9112 .L513: + 858:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 9113 .loc 1 858 3 discriminator 5 view .LVU2893 + 861:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 9114 .loc 1 861 3 view .LVU2894 + 9115 003c 002D cmp r5, #0 + 9116 003e 11D1 bne .L514 + 861:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 9117 .loc 1 861 3 is_stmt 0 discriminator 1 view .LVU2895 + 9118 0040 3E23 movs r3, #62 + 9119 0042 0122 movs r2, #1 + 9120 0044 E254 strb r2, [r4, r3] + 9121 .L515: + 864:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** } + 9122 .loc 1 864 3 is_stmt 1 view .LVU2896 + 865:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 9123 .loc 1 865 1 is_stmt 0 view .LVU2897 + 9124 0046 0020 movs r0, #0 + 9125 @ sp needed + 9126 .LVL740: + 9127 .LVL741: + 865:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 9128 .loc 1 865 1 view .LVU2898 + 9129 0048 70BD pop {r4, r5, r6, pc} + 9130 .LVL742: + 9131 .L511: + 854:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** } + 9132 .loc 1 854 5 is_stmt 1 view .LVU2899 + 854:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** } + 9133 .loc 1 854 5 view .LVU2900 + 9134 004a 196A ldr r1, [r3, #32] + 9135 004c 104A ldr r2, .L520+12 + 9136 004e 1142 tst r1, r2 + 9137 0050 E7D1 bne .L512 + 854:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** } + 9138 .loc 1 854 5 discriminator 1 view .LVU2901 + 9139 0052 196A ldr r1, [r3, #32] + 9140 0054 0F4A ldr r2, .L520+16 + 9141 0056 1142 tst r1, r2 + 9142 0058 E3D1 bne .L512 + 854:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** } + 9143 .loc 1 854 5 discriminator 3 view .LVU2902 + 9144 005a 5A6C ldr r2, [r3, #68] + 9145 005c 0E49 ldr r1, .L520+20 + 9146 005e 0A40 ands r2, r1 + 9147 0060 5A64 str r2, [r3, #68] + 9148 0062 DEE7 b .L512 + 9149 .L514: + 861:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 9150 .loc 1 861 3 is_stmt 0 discriminator 2 view .LVU2903 + 9151 0064 042D cmp r5, #4 + 9152 0066 05D0 beq .L518 + 861:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + ARM GAS /tmp/ccMtK8ce.s page 336 + + + 9153 .loc 1 861 3 discriminator 4 view .LVU2904 + 9154 0068 082D cmp r5, #8 + 9155 006a 07D0 beq .L519 + 861:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 9156 .loc 1 861 3 discriminator 7 view .LVU2905 + 9157 006c 4123 movs r3, #65 + 9158 006e 0122 movs r2, #1 + 9159 0070 E254 strb r2, [r4, r3] + 9160 0072 E8E7 b .L515 + 9161 .L518: + 861:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 9162 .loc 1 861 3 discriminator 3 view .LVU2906 + 9163 0074 3F23 movs r3, #63 + 9164 0076 0122 movs r2, #1 + 9165 0078 E254 strb r2, [r4, r3] + 9166 007a E4E7 b .L515 + 9167 .L519: + 861:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 9168 .loc 1 861 3 discriminator 6 view .LVU2907 + 9169 007c 4023 movs r3, #64 + 9170 007e 0122 movs r2, #1 + 9171 0080 E254 strb r2, [r4, r3] + 9172 0082 E0E7 b .L515 + 9173 .L521: + 9174 .align 2 + 9175 .L520: + 9176 0084 002C0140 .word 1073818624 + 9177 0088 00440140 .word 1073824768 + 9178 008c 00480140 .word 1073825792 + 9179 0090 11110000 .word 4369 + 9180 0094 44040000 .word 1092 + 9181 0098 FF7FFFFF .word -32769 + 9182 .cfi_endproc + 9183 .LFE55: + 9185 .section .text.HAL_TIM_OC_Start_IT,"ax",%progbits + 9186 .align 1 + 9187 .global HAL_TIM_OC_Start_IT + 9188 .syntax unified + 9189 .code 16 + 9190 .thumb_func + 9192 HAL_TIM_OC_Start_IT: + 9193 .LVL743: + 9194 .LFB56: + 879:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** HAL_StatusTypeDef status = HAL_OK; + 9195 .loc 1 879 1 is_stmt 1 view -0 + 9196 .cfi_startproc + 9197 @ args = 0, pretend = 0, frame = 0 + 9198 @ frame_needed = 0, uses_anonymous_args = 0 + 879:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** HAL_StatusTypeDef status = HAL_OK; + 9199 .loc 1 879 1 is_stmt 0 view .LVU2909 + 9200 0000 10B5 push {r4, lr} + 9201 .cfi_def_cfa_offset 8 + 9202 .cfi_offset 4, -8 + 9203 .cfi_offset 14, -4 + 9204 0002 0400 movs r4, r0 + 880:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** uint32_t tmpsmcr; + 9205 .loc 1 880 3 is_stmt 1 view .LVU2910 + ARM GAS /tmp/ccMtK8ce.s page 337 + + + 9206 .LVL744: + 881:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 9207 .loc 1 881 3 view .LVU2911 + 884:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 9208 .loc 1 884 3 view .LVU2912 + 887:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** { + 9209 .loc 1 887 3 view .LVU2913 + 887:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** { + 9210 .loc 1 887 44 is_stmt 0 view .LVU2914 + 9211 0004 0029 cmp r1, #0 + 9212 0006 35D1 bne .L523 + 887:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** { + 9213 .loc 1 887 7 discriminator 1 view .LVU2915 + 9214 0008 3E23 movs r3, #62 + 9215 000a C35C ldrb r3, [r0, r3] + 887:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** { + 9216 .loc 1 887 44 discriminator 1 view .LVU2916 + 9217 000c 013B subs r3, r3, #1 + 9218 000e 5A1E subs r2, r3, #1 + 9219 0010 9341 sbcs r3, r3, r2 + 9220 0012 DBB2 uxtb r3, r3 + 9221 .L524: + 887:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** { + 9222 .loc 1 887 6 discriminator 12 view .LVU2917 + 9223 0014 002B cmp r3, #0 + 9224 0016 7DD1 bne .L541 + 893:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 9225 .loc 1 893 3 is_stmt 1 view .LVU2918 + 9226 0018 0029 cmp r1, #0 + 9227 001a 44D1 bne .L528 + 893:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 9228 .loc 1 893 3 is_stmt 0 discriminator 1 view .LVU2919 + 9229 001c 3E33 adds r3, r3, #62 + 9230 001e 0222 movs r2, #2 + 9231 0020 E254 strb r2, [r4, r3] + 895:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** { + 9232 .loc 1 895 3 is_stmt 1 view .LVU2920 + 9233 .L529: + 900:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** break; + 9234 .loc 1 900 7 view .LVU2921 + 9235 0022 2268 ldr r2, [r4] + 9236 0024 D368 ldr r3, [r2, #12] + 9237 0026 0220 movs r0, #2 + 9238 .LVL745: + 900:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** break; + 9239 .loc 1 900 7 is_stmt 0 view .LVU2922 + 9240 0028 0343 orrs r3, r0 + 9241 002a D360 str r3, [r2, #12] + 901:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** } + 9242 .loc 1 901 7 is_stmt 1 view .LVU2923 + 930:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** { + 9243 .loc 1 930 3 view .LVU2924 + 9244 .L536: + 933:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 9245 .loc 1 933 5 view .LVU2925 + 9246 002c 2068 ldr r0, [r4] + 9247 002e 0122 movs r2, #1 + ARM GAS /tmp/ccMtK8ce.s page 338 + + + 9248 0030 FFF7FEFF bl TIM_CCxChannelCmd + 9249 .LVL746: + 935:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** { + 9250 .loc 1 935 5 view .LVU2926 + 935:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** { + 9251 .loc 1 935 9 is_stmt 0 view .LVU2927 + 9252 0034 2368 ldr r3, [r4] + 9253 0036 394A ldr r2, .L548 + 9254 0038 9342 cmp r3, r2 + 9255 003a 05D0 beq .L537 + 935:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** { + 9256 .loc 1 935 9 discriminator 2 view .LVU2928 + 9257 003c 384A ldr r2, .L548+4 + 9258 003e 9342 cmp r3, r2 + 9259 0040 02D0 beq .L537 + 935:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** { + 9260 .loc 1 935 9 discriminator 4 view .LVU2929 + 9261 0042 384A ldr r2, .L548+8 + 9262 0044 9342 cmp r3, r2 + 9263 0046 04D1 bne .L538 + 9264 .L537: + 938:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** } + 9265 .loc 1 938 7 is_stmt 1 view .LVU2930 + 9266 0048 596C ldr r1, [r3, #68] + 9267 004a 8022 movs r2, #128 + 9268 004c 1202 lsls r2, r2, #8 + 9269 004e 0A43 orrs r2, r1 + 9270 0050 5A64 str r2, [r3, #68] + 9271 .L538: + 942:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** { + 9272 .loc 1 942 5 view .LVU2931 + 942:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** { + 9273 .loc 1 942 9 is_stmt 0 view .LVU2932 + 9274 0052 2368 ldr r3, [r4] + 942:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** { + 9275 .loc 1 942 8 view .LVU2933 + 9276 0054 314A ldr r2, .L548 + 9277 0056 9342 cmp r3, r2 + 9278 0058 51D0 beq .L539 + 942:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** { + 9279 .loc 1 942 9 discriminator 1 view .LVU2934 + 9280 005a 8022 movs r2, #128 + 9281 005c D205 lsls r2, r2, #23 + 9282 005e 9342 cmp r3, r2 + 9283 0060 4DD0 beq .L539 + 942:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** { + 9284 .loc 1 942 9 discriminator 2 view .LVU2935 + 9285 0062 314A ldr r2, .L548+12 + 9286 0064 9342 cmp r3, r2 + 9287 0066 4AD0 beq .L539 + 952:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** } + 9288 .loc 1 952 7 is_stmt 1 view .LVU2936 + 9289 0068 1A68 ldr r2, [r3] + 9290 006a 0121 movs r1, #1 + 9291 006c 0A43 orrs r2, r1 + 9292 006e 1A60 str r2, [r3] + 9293 0070 0020 movs r0, #0 + ARM GAS /tmp/ccMtK8ce.s page 339 + + + 9294 0072 50E0 b .L527 + 9295 .LVL747: + 9296 .L523: + 887:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** { + 9297 .loc 1 887 44 is_stmt 0 discriminator 2 view .LVU2937 + 9298 0074 0429 cmp r1, #4 + 9299 0076 08D0 beq .L543 + 887:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** { + 9300 .loc 1 887 44 discriminator 5 view .LVU2938 + 9301 0078 0829 cmp r1, #8 + 9302 007a 0DD0 beq .L544 + 887:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** { + 9303 .loc 1 887 7 discriminator 8 view .LVU2939 + 9304 007c 4123 movs r3, #65 + 9305 007e C35C ldrb r3, [r0, r3] + 887:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** { + 9306 .loc 1 887 44 discriminator 8 view .LVU2940 + 9307 0080 013B subs r3, r3, #1 + 9308 0082 5A1E subs r2, r3, #1 + 9309 0084 9341 sbcs r3, r3, r2 + 9310 0086 DBB2 uxtb r3, r3 + 9311 0088 C4E7 b .L524 + 9312 .L543: + 887:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** { + 9313 .loc 1 887 7 discriminator 4 view .LVU2941 + 9314 008a 3F23 movs r3, #63 + 9315 008c C35C ldrb r3, [r0, r3] + 887:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** { + 9316 .loc 1 887 44 discriminator 4 view .LVU2942 + 9317 008e 013B subs r3, r3, #1 + 9318 0090 5A1E subs r2, r3, #1 + 9319 0092 9341 sbcs r3, r3, r2 + 9320 0094 DBB2 uxtb r3, r3 + 9321 0096 BDE7 b .L524 + 9322 .L544: + 887:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** { + 9323 .loc 1 887 7 discriminator 7 view .LVU2943 + 9324 0098 4023 movs r3, #64 + 9325 009a C35C ldrb r3, [r0, r3] + 887:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** { + 9326 .loc 1 887 44 discriminator 7 view .LVU2944 + 9327 009c 013B subs r3, r3, #1 + 9328 009e 5A1E subs r2, r3, #1 + 9329 00a0 9341 sbcs r3, r3, r2 + 9330 00a2 DBB2 uxtb r3, r3 + 9331 00a4 B6E7 b .L524 + 9332 .L528: + 893:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 9333 .loc 1 893 3 discriminator 2 view .LVU2945 + 9334 00a6 0429 cmp r1, #4 + 9335 00a8 0DD0 beq .L545 + 893:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 9336 .loc 1 893 3 discriminator 4 view .LVU2946 + 9337 00aa 0829 cmp r1, #8 + 9338 00ac 14D0 beq .L546 + 893:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 9339 .loc 1 893 3 discriminator 7 view .LVU2947 + ARM GAS /tmp/ccMtK8ce.s page 340 + + + 9340 00ae 4123 movs r3, #65 + 9341 00b0 0222 movs r2, #2 + 9342 00b2 E254 strb r2, [r4, r3] + 895:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** { + 9343 .loc 1 895 3 is_stmt 1 view .LVU2948 + 9344 00b4 0829 cmp r1, #8 + 9345 00b6 12D0 beq .L533 + 9346 00b8 17D8 bhi .L534 + 9347 00ba 0029 cmp r1, #0 + 9348 00bc B1D0 beq .L529 + 9349 00be 0429 cmp r1, #4 + 9350 00c0 04D0 beq .L531 + 9351 00c2 0120 movs r0, #1 + 9352 .LVL748: + 895:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** { + 9353 .loc 1 895 3 is_stmt 0 view .LVU2949 + 9354 00c4 27E0 b .L527 + 9355 .LVL749: + 9356 .L545: + 893:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 9357 .loc 1 893 3 discriminator 3 view .LVU2950 + 9358 00c6 3F23 movs r3, #63 + 9359 00c8 0222 movs r2, #2 + 9360 00ca E254 strb r2, [r4, r3] + 895:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** { + 9361 .loc 1 895 3 is_stmt 1 view .LVU2951 + 9362 .L531: + 907:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** break; + 9363 .loc 1 907 7 view .LVU2952 + 9364 00cc 2268 ldr r2, [r4] + 9365 00ce D368 ldr r3, [r2, #12] + 9366 00d0 0420 movs r0, #4 + 9367 .LVL750: + 907:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** break; + 9368 .loc 1 907 7 is_stmt 0 view .LVU2953 + 9369 00d2 0343 orrs r3, r0 + 9370 00d4 D360 str r3, [r2, #12] + 908:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** } + 9371 .loc 1 908 7 is_stmt 1 view .LVU2954 + 930:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** { + 9372 .loc 1 930 3 view .LVU2955 + 9373 00d6 A9E7 b .L536 + 9374 .LVL751: + 9375 .L546: + 893:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 9376 .loc 1 893 3 is_stmt 0 discriminator 6 view .LVU2956 + 9377 00d8 4023 movs r3, #64 + 9378 00da 0222 movs r2, #2 + 9379 00dc E254 strb r2, [r4, r3] + 895:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** { + 9380 .loc 1 895 3 is_stmt 1 view .LVU2957 + 9381 .L533: + 914:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** break; + 9382 .loc 1 914 7 view .LVU2958 + 9383 00de 2268 ldr r2, [r4] + 9384 00e0 D368 ldr r3, [r2, #12] + 9385 00e2 0820 movs r0, #8 + ARM GAS /tmp/ccMtK8ce.s page 341 + + + 9386 .LVL752: + 914:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** break; + 9387 .loc 1 914 7 is_stmt 0 view .LVU2959 + 9388 00e4 0343 orrs r3, r0 + 9389 00e6 D360 str r3, [r2, #12] + 915:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** } + 9390 .loc 1 915 7 is_stmt 1 view .LVU2960 + 930:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** { + 9391 .loc 1 930 3 view .LVU2961 + 9392 00e8 A0E7 b .L536 + 9393 .LVL753: + 9394 .L534: + 895:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** { + 9395 .loc 1 895 3 is_stmt 0 view .LVU2962 + 9396 00ea 0C29 cmp r1, #12 + 9397 00ec 05D1 bne .L547 + 921:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** break; + 9398 .loc 1 921 7 is_stmt 1 view .LVU2963 + 9399 00ee 2268 ldr r2, [r4] + 9400 00f0 D368 ldr r3, [r2, #12] + 9401 00f2 1020 movs r0, #16 + 9402 .LVL754: + 921:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** break; + 9403 .loc 1 921 7 is_stmt 0 view .LVU2964 + 9404 00f4 0343 orrs r3, r0 + 9405 00f6 D360 str r3, [r2, #12] + 922:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** } + 9406 .loc 1 922 7 is_stmt 1 view .LVU2965 + 930:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** { + 9407 .loc 1 930 3 view .LVU2966 + 9408 00f8 98E7 b .L536 + 9409 .LVL755: + 9410 .L547: + 895:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** { + 9411 .loc 1 895 3 is_stmt 0 view .LVU2967 + 9412 00fa 0120 movs r0, #1 + 9413 .LVL756: + 895:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** { + 9414 .loc 1 895 3 view .LVU2968 + 9415 00fc 0BE0 b .L527 + 9416 .LVL757: + 9417 .L539: + 944:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** if (!IS_TIM_SLAVEMODE_TRIGGER_ENABLED(tmpsmcr)) + 9418 .loc 1 944 7 is_stmt 1 view .LVU2969 + 944:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** if (!IS_TIM_SLAVEMODE_TRIGGER_ENABLED(tmpsmcr)) + 9419 .loc 1 944 31 is_stmt 0 view .LVU2970 + 9420 00fe 9968 ldr r1, [r3, #8] + 944:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** if (!IS_TIM_SLAVEMODE_TRIGGER_ENABLED(tmpsmcr)) + 9421 .loc 1 944 15 view .LVU2971 + 9422 0100 0722 movs r2, #7 + 9423 0102 0A40 ands r2, r1 + 9424 .LVL758: + 945:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** { + 9425 .loc 1 945 7 is_stmt 1 view .LVU2972 + 945:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** { + 9426 .loc 1 945 10 is_stmt 0 view .LVU2973 + 9427 0104 062A cmp r2, #6 + ARM GAS /tmp/ccMtK8ce.s page 342 + + + 9428 0106 07D0 beq .L542 + 947:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** } + 9429 .loc 1 947 9 is_stmt 1 view .LVU2974 + 9430 0108 1A68 ldr r2, [r3] + 9431 .LVL759: + 947:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** } + 9432 .loc 1 947 9 is_stmt 0 view .LVU2975 + 9433 010a 0121 movs r1, #1 + 9434 .LVL760: + 947:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** } + 9435 .loc 1 947 9 view .LVU2976 + 9436 010c 0A43 orrs r2, r1 + 9437 010e 1A60 str r2, [r3] + 9438 0110 0020 movs r0, #0 + 9439 0112 00E0 b .L527 + 9440 .LVL761: + 9441 .L541: + 889:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** } + 9442 .loc 1 889 12 view .LVU2977 + 9443 0114 0120 movs r0, #1 + 9444 .LVL762: + 9445 .L527: + 958:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 9446 .loc 1 958 1 view .LVU2978 + 9447 @ sp needed + 9448 .LVL763: + 958:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 9449 .loc 1 958 1 view .LVU2979 + 9450 0116 10BD pop {r4, pc} + 9451 .LVL764: + 9452 .L542: + 958:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 9453 .loc 1 958 1 view .LVU2980 + 9454 0118 0020 movs r0, #0 + 9455 011a FCE7 b .L527 + 9456 .L549: + 9457 .align 2 + 9458 .L548: + 9459 011c 002C0140 .word 1073818624 + 9460 0120 00440140 .word 1073824768 + 9461 0124 00480140 .word 1073825792 + 9462 0128 00040040 .word 1073742848 + 9463 .cfi_endproc + 9464 .LFE56: + 9466 .section .text.HAL_TIM_OC_Stop_IT,"ax",%progbits + 9467 .align 1 + 9468 .global HAL_TIM_OC_Stop_IT + 9469 .syntax unified + 9470 .code 16 + 9471 .thumb_func + 9473 HAL_TIM_OC_Stop_IT: + 9474 .LVL765: + 9475 .LFB57: + 972:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** HAL_StatusTypeDef status = HAL_OK; + 9476 .loc 1 972 1 is_stmt 1 view -0 + 9477 .cfi_startproc + 9478 @ args = 0, pretend = 0, frame = 0 + ARM GAS /tmp/ccMtK8ce.s page 343 + + + 9479 @ frame_needed = 0, uses_anonymous_args = 0 + 972:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** HAL_StatusTypeDef status = HAL_OK; + 9480 .loc 1 972 1 is_stmt 0 view .LVU2982 + 9481 0000 70B5 push {r4, r5, r6, lr} + 9482 .cfi_def_cfa_offset 16 + 9483 .cfi_offset 4, -16 + 9484 .cfi_offset 5, -12 + 9485 .cfi_offset 6, -8 + 9486 .cfi_offset 14, -4 + 9487 0002 0500 movs r5, r0 + 9488 0004 0C00 movs r4, r1 + 973:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 9489 .loc 1 973 3 is_stmt 1 view .LVU2983 + 9490 .LVL766: + 976:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 9491 .loc 1 976 3 view .LVU2984 + 978:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** { + 9492 .loc 1 978 3 view .LVU2985 + 9493 0006 0829 cmp r1, #8 + 9494 0008 3ED0 beq .L551 + 9495 000a 0BD8 bhi .L552 + 9496 000c 0029 cmp r1, #0 + 9497 000e 13D0 beq .L553 + 9498 0010 0429 cmp r1, #4 + 9499 0012 05D1 bne .L564 + 990:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** break; + 9500 .loc 1 990 7 view .LVU2986 + 9501 0014 0268 ldr r2, [r0] + 9502 0016 D368 ldr r3, [r2, #12] + 9503 0018 0421 movs r1, #4 + 9504 .LVL767: + 990:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** break; + 9505 .loc 1 990 7 is_stmt 0 view .LVU2987 + 9506 001a 8B43 bics r3, r1 + 9507 001c D360 str r3, [r2, #12] + 991:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** } + 9508 .loc 1 991 7 is_stmt 1 view .LVU2988 +1013:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** { + 9509 .loc 1 1013 3 view .LVU2989 + 9510 001e 10E0 b .L557 + 9511 .LVL768: + 9512 .L564: + 978:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** { + 9513 .loc 1 978 3 is_stmt 0 view .LVU2990 + 9514 0020 0120 movs r0, #1 + 9515 .LVL769: + 978:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** { + 9516 .loc 1 978 3 view .LVU2991 + 9517 0022 30E0 b .L555 + 9518 .LVL770: + 9519 .L552: + 978:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** { + 9520 .loc 1 978 3 view .LVU2992 + 9521 0024 0C29 cmp r1, #12 + 9522 0026 05D1 bne .L565 +1004:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** break; + 9523 .loc 1 1004 7 is_stmt 1 view .LVU2993 + ARM GAS /tmp/ccMtK8ce.s page 344 + + + 9524 0028 0268 ldr r2, [r0] + 9525 002a D368 ldr r3, [r2, #12] + 9526 002c 1021 movs r1, #16 + 9527 .LVL771: +1004:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** break; + 9528 .loc 1 1004 7 is_stmt 0 view .LVU2994 + 9529 002e 8B43 bics r3, r1 + 9530 0030 D360 str r3, [r2, #12] +1005:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** } + 9531 .loc 1 1005 7 is_stmt 1 view .LVU2995 +1013:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** { + 9532 .loc 1 1013 3 view .LVU2996 + 9533 0032 06E0 b .L557 + 9534 .LVL772: + 9535 .L565: + 978:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** { + 9536 .loc 1 978 3 is_stmt 0 view .LVU2997 + 9537 0034 0120 movs r0, #1 + 9538 .LVL773: + 978:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** { + 9539 .loc 1 978 3 view .LVU2998 + 9540 0036 26E0 b .L555 + 9541 .LVL774: + 9542 .L553: + 983:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** break; + 9543 .loc 1 983 7 is_stmt 1 view .LVU2999 + 9544 0038 0268 ldr r2, [r0] + 9545 003a D368 ldr r3, [r2, #12] + 9546 003c 0221 movs r1, #2 + 9547 .LVL775: + 983:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** break; + 9548 .loc 1 983 7 is_stmt 0 view .LVU3000 + 9549 003e 8B43 bics r3, r1 + 9550 0040 D360 str r3, [r2, #12] + 984:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** } + 9551 .loc 1 984 7 is_stmt 1 view .LVU3001 +1013:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** { + 9552 .loc 1 1013 3 view .LVU3002 + 9553 .L557: +1016:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 9554 .loc 1 1016 5 view .LVU3003 + 9555 0042 2868 ldr r0, [r5] + 9556 .LVL776: +1016:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 9557 .loc 1 1016 5 is_stmt 0 view .LVU3004 + 9558 0044 0022 movs r2, #0 + 9559 0046 2100 movs r1, r4 + 9560 0048 FFF7FEFF bl TIM_CCxChannelCmd + 9561 .LVL777: +1018:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** { + 9562 .loc 1 1018 5 is_stmt 1 view .LVU3005 +1018:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** { + 9563 .loc 1 1018 9 is_stmt 0 view .LVU3006 + 9564 004c 2B68 ldr r3, [r5] + 9565 004e 214A ldr r2, .L568 + 9566 0050 9342 cmp r3, r2 + 9567 0052 1FD0 beq .L558 + ARM GAS /tmp/ccMtK8ce.s page 345 + + +1018:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** { + 9568 .loc 1 1018 9 discriminator 2 view .LVU3007 + 9569 0054 204A ldr r2, .L568+4 + 9570 0056 9342 cmp r3, r2 + 9571 0058 1CD0 beq .L558 +1018:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** { + 9572 .loc 1 1018 9 discriminator 4 view .LVU3008 + 9573 005a 204A ldr r2, .L568+8 + 9574 005c 9342 cmp r3, r2 + 9575 005e 19D0 beq .L558 + 9576 .L559: +1021:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** } + 9577 .loc 1 1021 7 is_stmt 1 discriminator 5 view .LVU3009 +1025:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 9578 .loc 1 1025 5 view .LVU3010 +1025:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 9579 .loc 1 1025 5 view .LVU3011 + 9580 0060 2B68 ldr r3, [r5] + 9581 0062 196A ldr r1, [r3, #32] + 9582 0064 1E4A ldr r2, .L568+12 + 9583 0066 1142 tst r1, r2 + 9584 0068 07D1 bne .L560 +1025:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 9585 .loc 1 1025 5 discriminator 1 view .LVU3012 + 9586 006a 196A ldr r1, [r3, #32] + 9587 006c 1D4A ldr r2, .L568+16 + 9588 006e 1142 tst r1, r2 + 9589 0070 03D1 bne .L560 +1025:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 9590 .loc 1 1025 5 discriminator 3 view .LVU3013 + 9591 0072 1A68 ldr r2, [r3] + 9592 0074 0121 movs r1, #1 + 9593 0076 8A43 bics r2, r1 + 9594 0078 1A60 str r2, [r3] + 9595 .L560: +1025:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 9596 .loc 1 1025 5 discriminator 5 view .LVU3014 +1028:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** } + 9597 .loc 1 1028 5 view .LVU3015 + 9598 007a 002C cmp r4, #0 + 9599 007c 17D1 bne .L561 +1028:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** } + 9600 .loc 1 1028 5 is_stmt 0 discriminator 1 view .LVU3016 + 9601 007e 3E23 movs r3, #62 + 9602 0080 0122 movs r2, #1 + 9603 0082 EA54 strb r2, [r5, r3] + 9604 0084 0020 movs r0, #0 + 9605 .L555: + 9606 .LVL778: +1032:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** } + 9607 .loc 1 1032 3 is_stmt 1 view .LVU3017 +1033:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 9608 .loc 1 1033 1 is_stmt 0 view .LVU3018 + 9609 @ sp needed + 9610 .LVL779: + 9611 .LVL780: +1033:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + ARM GAS /tmp/ccMtK8ce.s page 346 + + + 9612 .loc 1 1033 1 view .LVU3019 + 9613 0086 70BD pop {r4, r5, r6, pc} + 9614 .LVL781: + 9615 .L551: + 997:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** break; + 9616 .loc 1 997 7 is_stmt 1 view .LVU3020 + 9617 0088 0268 ldr r2, [r0] + 9618 008a D368 ldr r3, [r2, #12] + 9619 008c 0821 movs r1, #8 + 9620 .LVL782: + 997:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** break; + 9621 .loc 1 997 7 is_stmt 0 view .LVU3021 + 9622 008e 8B43 bics r3, r1 + 9623 0090 D360 str r3, [r2, #12] + 998:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** } + 9624 .loc 1 998 7 is_stmt 1 view .LVU3022 +1013:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** { + 9625 .loc 1 1013 3 view .LVU3023 + 9626 0092 D6E7 b .L557 + 9627 .LVL783: + 9628 .L558: +1021:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** } + 9629 .loc 1 1021 7 view .LVU3024 +1021:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** } + 9630 .loc 1 1021 7 view .LVU3025 + 9631 0094 196A ldr r1, [r3, #32] + 9632 0096 124A ldr r2, .L568+12 + 9633 0098 1142 tst r1, r2 + 9634 009a E1D1 bne .L559 +1021:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** } + 9635 .loc 1 1021 7 discriminator 1 view .LVU3026 + 9636 009c 196A ldr r1, [r3, #32] + 9637 009e 114A ldr r2, .L568+16 + 9638 00a0 1142 tst r1, r2 + 9639 00a2 DDD1 bne .L559 +1021:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** } + 9640 .loc 1 1021 7 discriminator 3 view .LVU3027 + 9641 00a4 5A6C ldr r2, [r3, #68] + 9642 00a6 1049 ldr r1, .L568+20 + 9643 00a8 0A40 ands r2, r1 + 9644 00aa 5A64 str r2, [r3, #68] + 9645 00ac D8E7 b .L559 + 9646 .L561: +1028:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** } + 9647 .loc 1 1028 5 is_stmt 0 discriminator 2 view .LVU3028 + 9648 00ae 042C cmp r4, #4 + 9649 00b0 06D0 beq .L566 +1028:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** } + 9650 .loc 1 1028 5 discriminator 4 view .LVU3029 + 9651 00b2 082C cmp r4, #8 + 9652 00b4 09D0 beq .L567 +1028:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** } + 9653 .loc 1 1028 5 discriminator 7 view .LVU3030 + 9654 00b6 4123 movs r3, #65 + 9655 00b8 0122 movs r2, #1 + 9656 00ba EA54 strb r2, [r5, r3] + 9657 00bc 0020 movs r0, #0 + ARM GAS /tmp/ccMtK8ce.s page 347 + + + 9658 00be E2E7 b .L555 + 9659 .L566: +1028:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** } + 9660 .loc 1 1028 5 discriminator 3 view .LVU3031 + 9661 00c0 3F23 movs r3, #63 + 9662 00c2 0122 movs r2, #1 + 9663 00c4 EA54 strb r2, [r5, r3] + 9664 00c6 0020 movs r0, #0 + 9665 00c8 DDE7 b .L555 + 9666 .L567: +1028:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** } + 9667 .loc 1 1028 5 discriminator 6 view .LVU3032 + 9668 00ca 4023 movs r3, #64 + 9669 00cc 0122 movs r2, #1 + 9670 00ce EA54 strb r2, [r5, r3] + 9671 00d0 0020 movs r0, #0 + 9672 00d2 D8E7 b .L555 + 9673 .L569: + 9674 .align 2 + 9675 .L568: + 9676 00d4 002C0140 .word 1073818624 + 9677 00d8 00440140 .word 1073824768 + 9678 00dc 00480140 .word 1073825792 + 9679 00e0 11110000 .word 4369 + 9680 00e4 44040000 .word 1092 + 9681 00e8 FF7FFFFF .word -32769 + 9682 .cfi_endproc + 9683 .LFE57: + 9685 .section .text.HAL_TIM_OC_Start_DMA,"ax",%progbits + 9686 .align 1 + 9687 .global HAL_TIM_OC_Start_DMA + 9688 .syntax unified + 9689 .code 16 + 9690 .thumb_func + 9692 HAL_TIM_OC_Start_DMA: + 9693 .LVL784: + 9694 .LFB58: +1050:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** HAL_StatusTypeDef status = HAL_OK; + 9695 .loc 1 1050 1 is_stmt 1 view -0 + 9696 .cfi_startproc + 9697 @ args = 0, pretend = 0, frame = 0 + 9698 @ frame_needed = 0, uses_anonymous_args = 0 +1050:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** HAL_StatusTypeDef status = HAL_OK; + 9699 .loc 1 1050 1 is_stmt 0 view .LVU3034 + 9700 0000 70B5 push {r4, r5, r6, lr} + 9701 .cfi_def_cfa_offset 16 + 9702 .cfi_offset 4, -16 + 9703 .cfi_offset 5, -12 + 9704 .cfi_offset 6, -8 + 9705 .cfi_offset 14, -4 + 9706 0002 0600 movs r6, r0 + 9707 0004 0D00 movs r5, r1 + 9708 0006 1100 movs r1, r2 + 9709 .LVL785: +1051:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** uint32_t tmpsmcr; + 9710 .loc 1 1051 3 is_stmt 1 view .LVU3035 +1052:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + ARM GAS /tmp/ccMtK8ce.s page 348 + + + 9711 .loc 1 1052 3 view .LVU3036 +1055:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 9712 .loc 1 1055 3 view .LVU3037 +1058:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** { + 9713 .loc 1 1058 3 view .LVU3038 +1058:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** { + 9714 .loc 1 1058 44 is_stmt 0 view .LVU3039 + 9715 0008 002D cmp r5, #0 + 9716 000a 5DD1 bne .L571 +1058:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** { + 9717 .loc 1 1058 7 discriminator 1 view .LVU3040 + 9718 000c 3E22 movs r2, #62 + 9719 .LVL786: +1058:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** { + 9720 .loc 1 1058 7 discriminator 1 view .LVU3041 + 9721 000e 845C ldrb r4, [r0, r2] +1058:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** { + 9722 .loc 1 1058 44 discriminator 1 view .LVU3042 + 9723 0010 023C subs r4, r4, #2 + 9724 0012 6242 rsbs r2, r4, #0 + 9725 0014 5441 adcs r4, r4, r2 + 9726 0016 E4B2 uxtb r4, r4 + 9727 .L572: +1058:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** { + 9728 .loc 1 1058 6 discriminator 12 view .LVU3043 + 9729 0018 002C cmp r4, #0 + 9730 001a 00D0 beq .LCB8576 + 9731 001c F0E0 b .L593 @long jump + 9732 .LCB8576: +1062:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** { + 9733 .loc 1 1062 8 is_stmt 1 view .LVU3044 +1062:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** { + 9734 .loc 1 1062 49 is_stmt 0 view .LVU3045 + 9735 001e 002D cmp r5, #0 + 9736 0020 6BD1 bne .L576 +1062:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** { + 9737 .loc 1 1062 12 discriminator 1 view .LVU3046 + 9738 0022 3E22 movs r2, #62 + 9739 0024 B25C ldrb r2, [r6, r2] +1062:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** { + 9740 .loc 1 1062 49 discriminator 1 view .LVU3047 + 9741 0026 013A subs r2, r2, #1 + 9742 0028 5042 rsbs r0, r2, #0 + 9743 002a 4241 adcs r2, r2, r0 + 9744 .LVL787: +1062:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** { + 9745 .loc 1 1062 49 discriminator 1 view .LVU3048 + 9746 002c D2B2 uxtb r2, r2 + 9747 .L577: +1062:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** { + 9748 .loc 1 1062 11 discriminator 12 view .LVU3049 + 9749 002e 002A cmp r2, #0 + 9750 0030 00D1 bne .LCB8590 + 9751 0032 E7E0 b .L594 @long jump + 9752 .LCB8590: +1064:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** { + 9753 .loc 1 1064 5 is_stmt 1 view .LVU3050 + ARM GAS /tmp/ccMtK8ce.s page 349 + + +1064:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** { + 9754 .loc 1 1064 8 is_stmt 0 view .LVU3051 + 9755 0034 0029 cmp r1, #0 + 9756 0036 00D1 bne .LCB8593 + 9757 0038 E6E0 b .L595 @long jump + 9758 .LCB8593: +1064:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** { + 9759 .loc 1 1064 25 discriminator 1 view .LVU3052 + 9760 003a 002B cmp r3, #0 + 9761 003c 00D1 bne .LCB8595 + 9762 003e E5E0 b .L596 @long jump + 9763 .LCB8595: +1070:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** } + 9764 .loc 1 1070 7 is_stmt 1 view .LVU3053 + 9765 0040 002D cmp r5, #0 + 9766 0042 73D1 bne .L580 +1070:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** } + 9767 .loc 1 1070 7 is_stmt 0 discriminator 1 view .LVU3054 + 9768 0044 3E22 movs r2, #62 + 9769 0046 0220 movs r0, #2 + 9770 0048 B054 strb r0, [r6, r2] +1078:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** { + 9771 .loc 1 1078 3 is_stmt 1 view .LVU3055 + 9772 .L581: +1083:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** htim->hdma[TIM_DMA_ID_CC1]->XferHalfCpltCallback = TIM_DMADelayPulseHalfCplt; + 9773 .loc 1 1083 7 view .LVU3056 +1083:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** htim->hdma[TIM_DMA_ID_CC1]->XferHalfCpltCallback = TIM_DMADelayPulseHalfCplt; + 9774 .loc 1 1083 17 is_stmt 0 view .LVU3057 + 9775 004a 726A ldr r2, [r6, #36] +1083:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** htim->hdma[TIM_DMA_ID_CC1]->XferHalfCpltCallback = TIM_DMADelayPulseHalfCplt; + 9776 .loc 1 1083 52 view .LVU3058 + 9777 004c 7548 ldr r0, .L609 + 9778 004e 9062 str r0, [r2, #40] +1084:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 9779 .loc 1 1084 7 is_stmt 1 view .LVU3059 +1084:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 9780 .loc 1 1084 17 is_stmt 0 view .LVU3060 + 9781 0050 726A ldr r2, [r6, #36] +1084:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 9782 .loc 1 1084 56 view .LVU3061 + 9783 0052 7548 ldr r0, .L609+4 + 9784 0054 D062 str r0, [r2, #44] +1087:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 9785 .loc 1 1087 7 is_stmt 1 view .LVU3062 +1087:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 9786 .loc 1 1087 17 is_stmt 0 view .LVU3063 + 9787 0056 726A ldr r2, [r6, #36] +1087:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 9788 .loc 1 1087 53 view .LVU3064 + 9789 0058 7448 ldr r0, .L609+8 + 9790 005a 1063 str r0, [r2, #48] +1090:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** Length) != HAL_OK) + 9791 .loc 1 1090 7 is_stmt 1 view .LVU3065 +1090:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** Length) != HAL_OK) + 9792 .loc 1 1090 88 is_stmt 0 view .LVU3066 + 9793 005c 3268 ldr r2, [r6] +1090:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** Length) != HAL_OK) + ARM GAS /tmp/ccMtK8ce.s page 350 + + + 9794 .loc 1 1090 83 view .LVU3067 + 9795 005e 3432 adds r2, r2, #52 +1090:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** Length) != HAL_OK) + 9796 .loc 1 1090 11 view .LVU3068 + 9797 0060 706A ldr r0, [r6, #36] + 9798 0062 FFF7FEFF bl HAL_DMA_Start_IT + 9799 .LVL788: +1090:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** Length) != HAL_OK) + 9800 .loc 1 1090 10 discriminator 1 view .LVU3069 + 9801 0066 0028 cmp r0, #0 + 9802 0068 00D0 beq .LCB8627 + 9803 006a D1E0 b .L597 @long jump + 9804 .LCB8627: +1098:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** break; + 9805 .loc 1 1098 7 is_stmt 1 view .LVU3070 + 9806 006c 3268 ldr r2, [r6] + 9807 006e D168 ldr r1, [r2, #12] + 9808 0070 8023 movs r3, #128 + 9809 0072 9B00 lsls r3, r3, #2 + 9810 0074 0B43 orrs r3, r1 + 9811 0076 D360 str r3, [r2, #12] +1099:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** } + 9812 .loc 1 1099 7 view .LVU3071 +1171:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** { + 9813 .loc 1 1171 3 view .LVU3072 + 9814 .L588: +1174:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 9815 .loc 1 1174 5 view .LVU3073 + 9816 0078 3068 ldr r0, [r6] + 9817 007a 0122 movs r2, #1 + 9818 007c 2900 movs r1, r5 + 9819 007e FFF7FEFF bl TIM_CCxChannelCmd + 9820 .LVL789: +1176:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** { + 9821 .loc 1 1176 5 view .LVU3074 +1176:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** { + 9822 .loc 1 1176 9 is_stmt 0 view .LVU3075 + 9823 0082 3368 ldr r3, [r6] + 9824 0084 6A4A ldr r2, .L609+12 + 9825 0086 9342 cmp r3, r2 + 9826 0088 05D0 beq .L589 +1176:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** { + 9827 .loc 1 1176 9 discriminator 2 view .LVU3076 + 9828 008a 6A4A ldr r2, .L609+16 + 9829 008c 9342 cmp r3, r2 + 9830 008e 02D0 beq .L589 +1176:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** { + 9831 .loc 1 1176 9 discriminator 4 view .LVU3077 + 9832 0090 694A ldr r2, .L609+20 + 9833 0092 9342 cmp r3, r2 + 9834 0094 04D1 bne .L590 + 9835 .L589: +1179:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** } + 9836 .loc 1 1179 7 is_stmt 1 view .LVU3078 + 9837 0096 596C ldr r1, [r3, #68] + 9838 0098 8022 movs r2, #128 + 9839 009a 1202 lsls r2, r2, #8 + ARM GAS /tmp/ccMtK8ce.s page 351 + + + 9840 009c 0A43 orrs r2, r1 + 9841 009e 5A64 str r2, [r3, #68] + 9842 .L590: +1183:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** { + 9843 .loc 1 1183 5 view .LVU3079 +1183:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** { + 9844 .loc 1 1183 9 is_stmt 0 view .LVU3080 + 9845 00a0 3368 ldr r3, [r6] +1183:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** { + 9846 .loc 1 1183 8 view .LVU3081 + 9847 00a2 634A ldr r2, .L609+12 + 9848 00a4 9342 cmp r3, r2 + 9849 00a6 00D1 bne .LCB8670 + 9850 00a8 9FE0 b .L591 @long jump + 9851 .LCB8670: +1183:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** { + 9852 .loc 1 1183 9 discriminator 1 view .LVU3082 + 9853 00aa 8022 movs r2, #128 + 9854 00ac D205 lsls r2, r2, #23 + 9855 00ae 9342 cmp r3, r2 + 9856 00b0 00D1 bne .LCB8674 + 9857 00b2 9AE0 b .L591 @long jump + 9858 .LCB8674: +1183:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** { + 9859 .loc 1 1183 9 discriminator 2 view .LVU3083 + 9860 00b4 614A ldr r2, .L609+24 + 9861 00b6 9342 cmp r3, r2 + 9862 00b8 00D1 bne .LCB8677 + 9863 00ba 96E0 b .L591 @long jump + 9864 .LCB8677: +1193:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** } + 9865 .loc 1 1193 7 is_stmt 1 view .LVU3084 + 9866 00bc 1A68 ldr r2, [r3] + 9867 00be 0121 movs r1, #1 + 9868 00c0 0A43 orrs r2, r1 + 9869 00c2 1A60 str r2, [r3] + 9870 00c4 0020 movs r0, #0 + 9871 00c6 9EE0 b .L575 + 9872 .LVL790: + 9873 .L571: +1058:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** { + 9874 .loc 1 1058 44 is_stmt 0 discriminator 2 view .LVU3085 + 9875 00c8 042D cmp r5, #4 + 9876 00ca 08D0 beq .L602 +1058:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** { + 9877 .loc 1 1058 44 discriminator 5 view .LVU3086 + 9878 00cc 082D cmp r5, #8 + 9879 00ce 0DD0 beq .L603 +1058:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** { + 9880 .loc 1 1058 7 discriminator 8 view .LVU3087 + 9881 00d0 4122 movs r2, #65 + 9882 00d2 845C ldrb r4, [r0, r2] +1058:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** { + 9883 .loc 1 1058 44 discriminator 8 view .LVU3088 + 9884 00d4 023C subs r4, r4, #2 + 9885 00d6 6242 rsbs r2, r4, #0 + 9886 00d8 5441 adcs r4, r4, r2 + ARM GAS /tmp/ccMtK8ce.s page 352 + + + 9887 00da E4B2 uxtb r4, r4 + 9888 00dc 9CE7 b .L572 + 9889 .L602: +1058:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** { + 9890 .loc 1 1058 7 discriminator 4 view .LVU3089 + 9891 00de 3F22 movs r2, #63 + 9892 00e0 845C ldrb r4, [r0, r2] +1058:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** { + 9893 .loc 1 1058 44 discriminator 4 view .LVU3090 + 9894 00e2 023C subs r4, r4, #2 + 9895 00e4 6242 rsbs r2, r4, #0 + 9896 00e6 5441 adcs r4, r4, r2 + 9897 00e8 E4B2 uxtb r4, r4 + 9898 00ea 95E7 b .L572 + 9899 .L603: +1058:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** { + 9900 .loc 1 1058 7 discriminator 7 view .LVU3091 + 9901 00ec 4022 movs r2, #64 + 9902 00ee 845C ldrb r4, [r0, r2] +1058:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** { + 9903 .loc 1 1058 44 discriminator 7 view .LVU3092 + 9904 00f0 023C subs r4, r4, #2 + 9905 00f2 6242 rsbs r2, r4, #0 + 9906 00f4 5441 adcs r4, r4, r2 + 9907 00f6 E4B2 uxtb r4, r4 + 9908 00f8 8EE7 b .L572 + 9909 .L576: +1062:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** { + 9910 .loc 1 1062 49 discriminator 2 view .LVU3093 + 9911 00fa 042D cmp r5, #4 + 9912 00fc 08D0 beq .L604 +1062:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** { + 9913 .loc 1 1062 49 discriminator 5 view .LVU3094 + 9914 00fe 082D cmp r5, #8 + 9915 0100 0DD0 beq .L605 +1062:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** { + 9916 .loc 1 1062 12 discriminator 8 view .LVU3095 + 9917 0102 4122 movs r2, #65 + 9918 0104 B25C ldrb r2, [r6, r2] +1062:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** { + 9919 .loc 1 1062 49 discriminator 8 view .LVU3096 + 9920 0106 013A subs r2, r2, #1 + 9921 0108 5042 rsbs r0, r2, #0 + 9922 010a 4241 adcs r2, r2, r0 + 9923 .LVL791: +1062:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** { + 9924 .loc 1 1062 49 discriminator 8 view .LVU3097 + 9925 010c D2B2 uxtb r2, r2 + 9926 010e 8EE7 b .L577 + 9927 .LVL792: + 9928 .L604: +1062:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** { + 9929 .loc 1 1062 12 discriminator 4 view .LVU3098 + 9930 0110 3F22 movs r2, #63 + 9931 0112 B25C ldrb r2, [r6, r2] +1062:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** { + 9932 .loc 1 1062 49 discriminator 4 view .LVU3099 + ARM GAS /tmp/ccMtK8ce.s page 353 + + + 9933 0114 013A subs r2, r2, #1 + 9934 0116 5042 rsbs r0, r2, #0 + 9935 0118 4241 adcs r2, r2, r0 + 9936 .LVL793: +1062:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** { + 9937 .loc 1 1062 49 discriminator 4 view .LVU3100 + 9938 011a D2B2 uxtb r2, r2 + 9939 011c 87E7 b .L577 + 9940 .LVL794: + 9941 .L605: +1062:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** { + 9942 .loc 1 1062 12 discriminator 7 view .LVU3101 + 9943 011e 4022 movs r2, #64 + 9944 0120 B25C ldrb r2, [r6, r2] +1062:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** { + 9945 .loc 1 1062 49 discriminator 7 view .LVU3102 + 9946 0122 013A subs r2, r2, #1 + 9947 0124 5042 rsbs r0, r2, #0 + 9948 0126 4241 adcs r2, r2, r0 + 9949 .LVL795: +1062:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** { + 9950 .loc 1 1062 49 discriminator 7 view .LVU3103 + 9951 0128 D2B2 uxtb r2, r2 + 9952 012a 80E7 b .L577 + 9953 .L580: +1070:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** } + 9954 .loc 1 1070 7 discriminator 2 view .LVU3104 + 9955 012c 042D cmp r5, #4 + 9956 012e 0DD0 beq .L606 +1070:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** } + 9957 .loc 1 1070 7 discriminator 4 view .LVU3105 + 9958 0130 082D cmp r5, #8 + 9959 0132 25D0 beq .L607 +1070:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** } + 9960 .loc 1 1070 7 discriminator 7 view .LVU3106 + 9961 0134 4122 movs r2, #65 + 9962 0136 0220 movs r0, #2 + 9963 0138 B054 strb r0, [r6, r2] +1078:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** { + 9964 .loc 1 1078 3 is_stmt 1 view .LVU3107 + 9965 013a 082D cmp r5, #8 + 9966 013c 23D0 beq .L585 + 9967 013e 39D8 bhi .L586 + 9968 0140 002D cmp r5, #0 + 9969 0142 82D0 beq .L581 + 9970 0144 042D cmp r5, #4 + 9971 0146 04D0 beq .L583 + 9972 0148 0138 subs r0, r0, #1 + 9973 014a 5CE0 b .L575 + 9974 .L606: +1070:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** } + 9975 .loc 1 1070 7 is_stmt 0 discriminator 3 view .LVU3108 + 9976 014c 3F22 movs r2, #63 + 9977 014e 0220 movs r0, #2 + 9978 0150 B054 strb r0, [r6, r2] +1078:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** { + 9979 .loc 1 1078 3 is_stmt 1 view .LVU3109 + ARM GAS /tmp/ccMtK8ce.s page 354 + + + 9980 .L583: +1105:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** htim->hdma[TIM_DMA_ID_CC2]->XferHalfCpltCallback = TIM_DMADelayPulseHalfCplt; + 9981 .loc 1 1105 7 view .LVU3110 +1105:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** htim->hdma[TIM_DMA_ID_CC2]->XferHalfCpltCallback = TIM_DMADelayPulseHalfCplt; + 9982 .loc 1 1105 17 is_stmt 0 view .LVU3111 + 9983 0152 B26A ldr r2, [r6, #40] +1105:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** htim->hdma[TIM_DMA_ID_CC2]->XferHalfCpltCallback = TIM_DMADelayPulseHalfCplt; + 9984 .loc 1 1105 52 view .LVU3112 + 9985 0154 3348 ldr r0, .L609 + 9986 0156 9062 str r0, [r2, #40] +1106:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 9987 .loc 1 1106 7 is_stmt 1 view .LVU3113 +1106:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 9988 .loc 1 1106 17 is_stmt 0 view .LVU3114 + 9989 0158 B26A ldr r2, [r6, #40] +1106:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 9990 .loc 1 1106 56 view .LVU3115 + 9991 015a 3348 ldr r0, .L609+4 + 9992 015c D062 str r0, [r2, #44] +1109:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 9993 .loc 1 1109 7 is_stmt 1 view .LVU3116 +1109:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 9994 .loc 1 1109 17 is_stmt 0 view .LVU3117 + 9995 015e B26A ldr r2, [r6, #40] +1109:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 9996 .loc 1 1109 53 view .LVU3118 + 9997 0160 3248 ldr r0, .L609+8 + 9998 0162 1063 str r0, [r2, #48] +1112:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** Length) != HAL_OK) + 9999 .loc 1 1112 7 is_stmt 1 view .LVU3119 +1112:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** Length) != HAL_OK) + 10000 .loc 1 1112 88 is_stmt 0 view .LVU3120 + 10001 0164 3268 ldr r2, [r6] +1112:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** Length) != HAL_OK) + 10002 .loc 1 1112 83 view .LVU3121 + 10003 0166 3832 adds r2, r2, #56 +1112:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** Length) != HAL_OK) + 10004 .loc 1 1112 11 view .LVU3122 + 10005 0168 B06A ldr r0, [r6, #40] + 10006 016a FFF7FEFF bl HAL_DMA_Start_IT + 10007 .LVL796: +1112:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** Length) != HAL_OK) + 10008 .loc 1 1112 10 discriminator 1 view .LVU3123 + 10009 016e 0028 cmp r0, #0 + 10010 0170 50D1 bne .L598 +1120:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** break; + 10011 .loc 1 1120 7 is_stmt 1 view .LVU3124 + 10012 0172 3268 ldr r2, [r6] + 10013 0174 D168 ldr r1, [r2, #12] + 10014 0176 8023 movs r3, #128 + 10015 0178 DB00 lsls r3, r3, #3 + 10016 017a 0B43 orrs r3, r1 + 10017 017c D360 str r3, [r2, #12] +1121:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** } + 10018 .loc 1 1121 7 view .LVU3125 +1171:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** { + 10019 .loc 1 1171 3 view .LVU3126 + ARM GAS /tmp/ccMtK8ce.s page 355 + + + 10020 017e 7BE7 b .L588 + 10021 .LVL797: + 10022 .L607: +1070:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** } + 10023 .loc 1 1070 7 is_stmt 0 discriminator 6 view .LVU3127 + 10024 0180 4022 movs r2, #64 + 10025 0182 0220 movs r0, #2 + 10026 0184 B054 strb r0, [r6, r2] +1078:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** { + 10027 .loc 1 1078 3 is_stmt 1 view .LVU3128 + 10028 .L585: +1127:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** htim->hdma[TIM_DMA_ID_CC3]->XferHalfCpltCallback = TIM_DMADelayPulseHalfCplt; + 10029 .loc 1 1127 7 view .LVU3129 +1127:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** htim->hdma[TIM_DMA_ID_CC3]->XferHalfCpltCallback = TIM_DMADelayPulseHalfCplt; + 10030 .loc 1 1127 17 is_stmt 0 view .LVU3130 + 10031 0186 F26A ldr r2, [r6, #44] +1127:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** htim->hdma[TIM_DMA_ID_CC3]->XferHalfCpltCallback = TIM_DMADelayPulseHalfCplt; + 10032 .loc 1 1127 52 view .LVU3131 + 10033 0188 2648 ldr r0, .L609 + 10034 018a 9062 str r0, [r2, #40] +1128:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 10035 .loc 1 1128 7 is_stmt 1 view .LVU3132 +1128:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 10036 .loc 1 1128 17 is_stmt 0 view .LVU3133 + 10037 018c F26A ldr r2, [r6, #44] +1128:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 10038 .loc 1 1128 56 view .LVU3134 + 10039 018e 2648 ldr r0, .L609+4 + 10040 0190 D062 str r0, [r2, #44] +1131:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 10041 .loc 1 1131 7 is_stmt 1 view .LVU3135 +1131:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 10042 .loc 1 1131 17 is_stmt 0 view .LVU3136 + 10043 0192 F26A ldr r2, [r6, #44] +1131:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 10044 .loc 1 1131 53 view .LVU3137 + 10045 0194 2548 ldr r0, .L609+8 + 10046 0196 1063 str r0, [r2, #48] +1134:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** Length) != HAL_OK) + 10047 .loc 1 1134 7 is_stmt 1 view .LVU3138 +1134:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** Length) != HAL_OK) + 10048 .loc 1 1134 88 is_stmt 0 view .LVU3139 + 10049 0198 3268 ldr r2, [r6] +1134:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** Length) != HAL_OK) + 10050 .loc 1 1134 83 view .LVU3140 + 10051 019a 3C32 adds r2, r2, #60 +1134:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** Length) != HAL_OK) + 10052 .loc 1 1134 11 view .LVU3141 + 10053 019c F06A ldr r0, [r6, #44] + 10054 019e FFF7FEFF bl HAL_DMA_Start_IT + 10055 .LVL798: +1134:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** Length) != HAL_OK) + 10056 .loc 1 1134 10 discriminator 1 view .LVU3142 + 10057 01a2 0028 cmp r0, #0 + 10058 01a4 38D1 bne .L599 +1141:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** break; + 10059 .loc 1 1141 7 is_stmt 1 view .LVU3143 + ARM GAS /tmp/ccMtK8ce.s page 356 + + + 10060 01a6 3268 ldr r2, [r6] + 10061 01a8 D168 ldr r1, [r2, #12] + 10062 01aa 8023 movs r3, #128 + 10063 01ac 1B01 lsls r3, r3, #4 + 10064 01ae 0B43 orrs r3, r1 + 10065 01b0 D360 str r3, [r2, #12] +1142:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** } + 10066 .loc 1 1142 7 view .LVU3144 +1171:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** { + 10067 .loc 1 1171 3 view .LVU3145 + 10068 01b2 61E7 b .L588 + 10069 .LVL799: + 10070 .L586: +1078:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** { + 10071 .loc 1 1078 3 is_stmt 0 view .LVU3146 + 10072 01b4 0C2D cmp r5, #12 + 10073 01b6 16D1 bne .L608 +1148:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** htim->hdma[TIM_DMA_ID_CC4]->XferHalfCpltCallback = TIM_DMADelayPulseHalfCplt; + 10074 .loc 1 1148 7 is_stmt 1 view .LVU3147 +1148:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** htim->hdma[TIM_DMA_ID_CC4]->XferHalfCpltCallback = TIM_DMADelayPulseHalfCplt; + 10075 .loc 1 1148 17 is_stmt 0 view .LVU3148 + 10076 01b8 326B ldr r2, [r6, #48] +1148:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** htim->hdma[TIM_DMA_ID_CC4]->XferHalfCpltCallback = TIM_DMADelayPulseHalfCplt; + 10077 .loc 1 1148 52 view .LVU3149 + 10078 01ba 1A48 ldr r0, .L609 + 10079 01bc 9062 str r0, [r2, #40] +1149:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 10080 .loc 1 1149 7 is_stmt 1 view .LVU3150 +1149:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 10081 .loc 1 1149 17 is_stmt 0 view .LVU3151 + 10082 01be 326B ldr r2, [r6, #48] +1149:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 10083 .loc 1 1149 56 view .LVU3152 + 10084 01c0 1948 ldr r0, .L609+4 + 10085 01c2 D062 str r0, [r2, #44] +1152:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 10086 .loc 1 1152 7 is_stmt 1 view .LVU3153 +1152:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 10087 .loc 1 1152 17 is_stmt 0 view .LVU3154 + 10088 01c4 326B ldr r2, [r6, #48] +1152:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 10089 .loc 1 1152 53 view .LVU3155 + 10090 01c6 1948 ldr r0, .L609+8 + 10091 01c8 1063 str r0, [r2, #48] +1155:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** Length) != HAL_OK) + 10092 .loc 1 1155 7 is_stmt 1 view .LVU3156 +1155:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** Length) != HAL_OK) + 10093 .loc 1 1155 88 is_stmt 0 view .LVU3157 + 10094 01ca 3268 ldr r2, [r6] +1155:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** Length) != HAL_OK) + 10095 .loc 1 1155 83 view .LVU3158 + 10096 01cc 4032 adds r2, r2, #64 +1155:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** Length) != HAL_OK) + 10097 .loc 1 1155 11 view .LVU3159 + 10098 01ce 306B ldr r0, [r6, #48] + 10099 01d0 FFF7FEFF bl HAL_DMA_Start_IT + 10100 .LVL800: + ARM GAS /tmp/ccMtK8ce.s page 357 + + +1155:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** Length) != HAL_OK) + 10101 .loc 1 1155 10 discriminator 1 view .LVU3160 + 10102 01d4 0028 cmp r0, #0 + 10103 01d6 21D1 bne .L600 +1162:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** break; + 10104 .loc 1 1162 7 is_stmt 1 view .LVU3161 + 10105 01d8 3268 ldr r2, [r6] + 10106 01da D168 ldr r1, [r2, #12] + 10107 01dc 8023 movs r3, #128 + 10108 01de 5B01 lsls r3, r3, #5 + 10109 01e0 0B43 orrs r3, r1 + 10110 01e2 D360 str r3, [r2, #12] +1163:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** } + 10111 .loc 1 1163 7 view .LVU3162 +1171:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** { + 10112 .loc 1 1171 3 view .LVU3163 + 10113 01e4 48E7 b .L588 + 10114 .LVL801: + 10115 .L608: +1078:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** { + 10116 .loc 1 1078 3 is_stmt 0 view .LVU3164 + 10117 01e6 0120 movs r0, #1 + 10118 01e8 0DE0 b .L575 + 10119 .LVL802: + 10120 .L591: +1185:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** if (!IS_TIM_SLAVEMODE_TRIGGER_ENABLED(tmpsmcr)) + 10121 .loc 1 1185 7 is_stmt 1 view .LVU3165 +1185:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** if (!IS_TIM_SLAVEMODE_TRIGGER_ENABLED(tmpsmcr)) + 10122 .loc 1 1185 31 is_stmt 0 view .LVU3166 + 10123 01ea 9968 ldr r1, [r3, #8] +1185:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** if (!IS_TIM_SLAVEMODE_TRIGGER_ENABLED(tmpsmcr)) + 10124 .loc 1 1185 15 view .LVU3167 + 10125 01ec 0722 movs r2, #7 + 10126 01ee 0A40 ands r2, r1 + 10127 .LVL803: +1186:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** { + 10128 .loc 1 1186 7 is_stmt 1 view .LVU3168 +1186:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** { + 10129 .loc 1 1186 10 is_stmt 0 view .LVU3169 + 10130 01f0 062A cmp r2, #6 + 10131 01f2 15D0 beq .L601 +1188:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** } + 10132 .loc 1 1188 9 is_stmt 1 view .LVU3170 + 10133 01f4 1A68 ldr r2, [r3] + 10134 .LVL804: +1188:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** } + 10135 .loc 1 1188 9 is_stmt 0 view .LVU3171 + 10136 01f6 0121 movs r1, #1 + 10137 .LVL805: +1188:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** } + 10138 .loc 1 1188 9 view .LVU3172 + 10139 01f8 0A43 orrs r2, r1 + 10140 01fa 1A60 str r2, [r3] + 10141 01fc 0020 movs r0, #0 + 10142 01fe 02E0 b .L575 + 10143 .LVL806: + 10144 .L593: + ARM GAS /tmp/ccMtK8ce.s page 358 + + +1060:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** } + 10145 .loc 1 1060 12 view .LVU3173 + 10146 0200 0220 movs r0, #2 + 10147 .LVL807: +1060:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** } + 10148 .loc 1 1060 12 view .LVU3174 + 10149 0202 00E0 b .L575 + 10150 .L594: +1075:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** } + 10151 .loc 1 1075 12 view .LVU3175 + 10152 0204 0120 movs r0, #1 + 10153 .LVL808: + 10154 .L575: +1199:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 10155 .loc 1 1199 1 view .LVU3176 + 10156 @ sp needed + 10157 .LVL809: + 10158 .LVL810: +1199:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 10159 .loc 1 1199 1 view .LVU3177 + 10160 0206 70BD pop {r4, r5, r6, pc} + 10161 .LVL811: + 10162 .L595: +1066:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** } + 10163 .loc 1 1066 14 view .LVU3178 + 10164 0208 0120 movs r0, #1 + 10165 020a FCE7 b .L575 + 10166 .L596: + 10167 020c 0120 movs r0, #1 + 10168 020e FAE7 b .L575 + 10169 .LVL812: + 10170 .L597: +1094:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** } + 10171 .loc 1 1094 16 view .LVU3179 + 10172 0210 0120 movs r0, #1 + 10173 0212 F8E7 b .L575 + 10174 .L598: +1116:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** } + 10175 .loc 1 1116 16 view .LVU3180 + 10176 0214 0120 movs r0, #1 + 10177 0216 F6E7 b .L575 + 10178 .L599: +1138:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** } + 10179 .loc 1 1138 16 view .LVU3181 + 10180 0218 0120 movs r0, #1 + 10181 021a F4E7 b .L575 + 10182 .L600: +1159:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** } + 10183 .loc 1 1159 16 view .LVU3182 + 10184 021c 0120 movs r0, #1 + 10185 021e F2E7 b .L575 + 10186 .LVL813: + 10187 .L601: +1159:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** } + 10188 .loc 1 1159 16 view .LVU3183 + 10189 0220 0020 movs r0, #0 + 10190 0222 F0E7 b .L575 + ARM GAS /tmp/ccMtK8ce.s page 359 + + + 10191 .L610: + 10192 .align 2 + 10193 .L609: + 10194 0224 00000000 .word TIM_DMADelayPulseCplt + 10195 0228 00000000 .word TIM_DMADelayPulseHalfCplt + 10196 022c 00000000 .word TIM_DMAError + 10197 0230 002C0140 .word 1073818624 + 10198 0234 00440140 .word 1073824768 + 10199 0238 00480140 .word 1073825792 + 10200 023c 00040040 .word 1073742848 + 10201 .cfi_endproc + 10202 .LFE58: + 10204 .section .text.HAL_TIM_OC_Stop_DMA,"ax",%progbits + 10205 .align 1 + 10206 .global HAL_TIM_OC_Stop_DMA + 10207 .syntax unified + 10208 .code 16 + 10209 .thumb_func + 10211 HAL_TIM_OC_Stop_DMA: + 10212 .LVL814: + 10213 .LFB59: +1213:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** HAL_StatusTypeDef status = HAL_OK; + 10214 .loc 1 1213 1 is_stmt 1 view -0 + 10215 .cfi_startproc + 10216 @ args = 0, pretend = 0, frame = 0 + 10217 @ frame_needed = 0, uses_anonymous_args = 0 +1213:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** HAL_StatusTypeDef status = HAL_OK; + 10218 .loc 1 1213 1 is_stmt 0 view .LVU3185 + 10219 0000 70B5 push {r4, r5, r6, lr} + 10220 .cfi_def_cfa_offset 16 + 10221 .cfi_offset 4, -16 + 10222 .cfi_offset 5, -12 + 10223 .cfi_offset 6, -8 + 10224 .cfi_offset 14, -4 + 10225 0002 0500 movs r5, r0 + 10226 0004 0C00 movs r4, r1 +1214:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 10227 .loc 1 1214 3 is_stmt 1 view .LVU3186 + 10228 .LVL815: +1217:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 10229 .loc 1 1217 3 view .LVU3187 +1219:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** { + 10230 .loc 1 1219 3 view .LVU3188 + 10231 0006 0829 cmp r1, #8 + 10232 0008 47D0 beq .L612 + 10233 000a 0ED8 bhi .L613 + 10234 000c 0029 cmp r1, #0 + 10235 000e 19D0 beq .L614 + 10236 0010 0429 cmp r1, #4 + 10237 0012 08D1 bne .L625 +1232:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** (void)HAL_DMA_Abort_IT(htim->hdma[TIM_DMA_ID_CC2]); + 10238 .loc 1 1232 7 view .LVU3189 + 10239 0014 0268 ldr r2, [r0] + 10240 0016 D368 ldr r3, [r2, #12] + 10241 0018 3449 ldr r1, .L629 + 10242 .LVL816: +1232:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** (void)HAL_DMA_Abort_IT(htim->hdma[TIM_DMA_ID_CC2]); + ARM GAS /tmp/ccMtK8ce.s page 360 + + + 10243 .loc 1 1232 7 is_stmt 0 view .LVU3190 + 10244 001a 0B40 ands r3, r1 + 10245 001c D360 str r3, [r2, #12] +1233:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** break; + 10246 .loc 1 1233 7 is_stmt 1 view .LVU3191 +1233:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** break; + 10247 .loc 1 1233 13 is_stmt 0 view .LVU3192 + 10248 001e 806A ldr r0, [r0, #40] + 10249 .LVL817: +1233:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** break; + 10250 .loc 1 1233 13 view .LVU3193 + 10251 0020 FFF7FEFF bl HAL_DMA_Abort_IT + 10252 .LVL818: +1234:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** } + 10253 .loc 1 1234 7 is_stmt 1 view .LVU3194 +1258:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** { + 10254 .loc 1 1258 3 view .LVU3195 + 10255 0024 16E0 b .L618 + 10256 .LVL819: + 10257 .L625: +1219:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** { + 10258 .loc 1 1219 3 is_stmt 0 view .LVU3196 + 10259 0026 0120 movs r0, #1 + 10260 .LVL820: +1219:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** { + 10261 .loc 1 1219 3 view .LVU3197 + 10262 0028 36E0 b .L616 + 10263 .LVL821: + 10264 .L613: +1219:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** { + 10265 .loc 1 1219 3 view .LVU3198 + 10266 002a 0C29 cmp r1, #12 + 10267 002c 08D1 bne .L626 +1248:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** (void)HAL_DMA_Abort_IT(htim->hdma[TIM_DMA_ID_CC4]); + 10268 .loc 1 1248 7 is_stmt 1 view .LVU3199 + 10269 002e 0268 ldr r2, [r0] + 10270 0030 D368 ldr r3, [r2, #12] + 10271 0032 2F49 ldr r1, .L629+4 + 10272 .LVL822: +1248:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** (void)HAL_DMA_Abort_IT(htim->hdma[TIM_DMA_ID_CC4]); + 10273 .loc 1 1248 7 is_stmt 0 view .LVU3200 + 10274 0034 0B40 ands r3, r1 + 10275 0036 D360 str r3, [r2, #12] +1249:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** break; + 10276 .loc 1 1249 7 is_stmt 1 view .LVU3201 +1249:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** break; + 10277 .loc 1 1249 13 is_stmt 0 view .LVU3202 + 10278 0038 006B ldr r0, [r0, #48] + 10279 .LVL823: +1249:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** break; + 10280 .loc 1 1249 13 view .LVU3203 + 10281 003a FFF7FEFF bl HAL_DMA_Abort_IT + 10282 .LVL824: +1250:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** } + 10283 .loc 1 1250 7 is_stmt 1 view .LVU3204 +1258:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** { + 10284 .loc 1 1258 3 view .LVU3205 + ARM GAS /tmp/ccMtK8ce.s page 361 + + + 10285 003e 09E0 b .L618 + 10286 .LVL825: + 10287 .L626: +1219:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** { + 10288 .loc 1 1219 3 is_stmt 0 view .LVU3206 + 10289 0040 0120 movs r0, #1 + 10290 .LVL826: +1219:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** { + 10291 .loc 1 1219 3 view .LVU3207 + 10292 0042 29E0 b .L616 + 10293 .LVL827: + 10294 .L614: +1224:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** (void)HAL_DMA_Abort_IT(htim->hdma[TIM_DMA_ID_CC1]); + 10295 .loc 1 1224 7 is_stmt 1 view .LVU3208 + 10296 0044 0268 ldr r2, [r0] + 10297 0046 D368 ldr r3, [r2, #12] + 10298 0048 2A49 ldr r1, .L629+8 + 10299 .LVL828: +1224:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** (void)HAL_DMA_Abort_IT(htim->hdma[TIM_DMA_ID_CC1]); + 10300 .loc 1 1224 7 is_stmt 0 view .LVU3209 + 10301 004a 0B40 ands r3, r1 + 10302 004c D360 str r3, [r2, #12] +1225:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** break; + 10303 .loc 1 1225 7 is_stmt 1 view .LVU3210 +1225:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** break; + 10304 .loc 1 1225 13 is_stmt 0 view .LVU3211 + 10305 004e 406A ldr r0, [r0, #36] + 10306 .LVL829: +1225:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** break; + 10307 .loc 1 1225 13 view .LVU3212 + 10308 0050 FFF7FEFF bl HAL_DMA_Abort_IT + 10309 .LVL830: +1226:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** } + 10310 .loc 1 1226 7 is_stmt 1 view .LVU3213 +1258:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** { + 10311 .loc 1 1258 3 view .LVU3214 + 10312 .L618: +1261:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 10313 .loc 1 1261 5 view .LVU3215 + 10314 0054 2868 ldr r0, [r5] + 10315 0056 0022 movs r2, #0 + 10316 0058 2100 movs r1, r4 + 10317 005a FFF7FEFF bl TIM_CCxChannelCmd + 10318 .LVL831: +1263:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** { + 10319 .loc 1 1263 5 view .LVU3216 +1263:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** { + 10320 .loc 1 1263 9 is_stmt 0 view .LVU3217 + 10321 005e 2B68 ldr r3, [r5] + 10322 0060 254A ldr r2, .L629+12 + 10323 0062 9342 cmp r3, r2 + 10324 0064 22D0 beq .L619 +1263:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** { + 10325 .loc 1 1263 9 discriminator 2 view .LVU3218 + 10326 0066 254A ldr r2, .L629+16 + 10327 0068 9342 cmp r3, r2 + 10328 006a 1FD0 beq .L619 + ARM GAS /tmp/ccMtK8ce.s page 362 + + +1263:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** { + 10329 .loc 1 1263 9 discriminator 4 view .LVU3219 + 10330 006c 244A ldr r2, .L629+20 + 10331 006e 9342 cmp r3, r2 + 10332 0070 1CD0 beq .L619 + 10333 .L620: +1266:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** } + 10334 .loc 1 1266 7 is_stmt 1 discriminator 5 view .LVU3220 +1270:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 10335 .loc 1 1270 5 view .LVU3221 +1270:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 10336 .loc 1 1270 5 view .LVU3222 + 10337 0072 2B68 ldr r3, [r5] + 10338 0074 196A ldr r1, [r3, #32] + 10339 0076 234A ldr r2, .L629+24 + 10340 0078 1142 tst r1, r2 + 10341 007a 07D1 bne .L621 +1270:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 10342 .loc 1 1270 5 discriminator 1 view .LVU3223 + 10343 007c 196A ldr r1, [r3, #32] + 10344 007e 224A ldr r2, .L629+28 + 10345 0080 1142 tst r1, r2 + 10346 0082 03D1 bne .L621 +1270:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 10347 .loc 1 1270 5 discriminator 3 view .LVU3224 + 10348 0084 1A68 ldr r2, [r3] + 10349 0086 0121 movs r1, #1 + 10350 0088 8A43 bics r2, r1 + 10351 008a 1A60 str r2, [r3] + 10352 .L621: +1270:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 10353 .loc 1 1270 5 discriminator 5 view .LVU3225 +1273:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** } + 10354 .loc 1 1273 5 view .LVU3226 + 10355 008c 002C cmp r4, #0 + 10356 008e 1AD1 bne .L622 +1273:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** } + 10357 .loc 1 1273 5 is_stmt 0 discriminator 1 view .LVU3227 + 10358 0090 3E23 movs r3, #62 + 10359 0092 0122 movs r2, #1 + 10360 0094 EA54 strb r2, [r5, r3] + 10361 0096 0020 movs r0, #0 + 10362 .L616: + 10363 .LVL832: +1277:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** } + 10364 .loc 1 1277 3 is_stmt 1 view .LVU3228 +1278:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 10365 .loc 1 1278 1 is_stmt 0 view .LVU3229 + 10366 @ sp needed + 10367 .LVL833: + 10368 .LVL834: +1278:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 10369 .loc 1 1278 1 view .LVU3230 + 10370 0098 70BD pop {r4, r5, r6, pc} + 10371 .LVL835: + 10372 .L612: +1240:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** (void)HAL_DMA_Abort_IT(htim->hdma[TIM_DMA_ID_CC3]); + ARM GAS /tmp/ccMtK8ce.s page 363 + + + 10373 .loc 1 1240 7 is_stmt 1 view .LVU3231 + 10374 009a 0268 ldr r2, [r0] + 10375 009c D368 ldr r3, [r2, #12] + 10376 009e 1B49 ldr r1, .L629+32 + 10377 .LVL836: +1240:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** (void)HAL_DMA_Abort_IT(htim->hdma[TIM_DMA_ID_CC3]); + 10378 .loc 1 1240 7 is_stmt 0 view .LVU3232 + 10379 00a0 0B40 ands r3, r1 + 10380 00a2 D360 str r3, [r2, #12] +1241:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** break; + 10381 .loc 1 1241 7 is_stmt 1 view .LVU3233 +1241:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** break; + 10382 .loc 1 1241 13 is_stmt 0 view .LVU3234 + 10383 00a4 C06A ldr r0, [r0, #44] + 10384 .LVL837: +1241:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** break; + 10385 .loc 1 1241 13 view .LVU3235 + 10386 00a6 FFF7FEFF bl HAL_DMA_Abort_IT + 10387 .LVL838: +1242:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** } + 10388 .loc 1 1242 7 is_stmt 1 view .LVU3236 +1258:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** { + 10389 .loc 1 1258 3 view .LVU3237 + 10390 00aa D3E7 b .L618 + 10391 .L619: +1266:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** } + 10392 .loc 1 1266 7 view .LVU3238 +1266:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** } + 10393 .loc 1 1266 7 view .LVU3239 + 10394 00ac 196A ldr r1, [r3, #32] + 10395 00ae 154A ldr r2, .L629+24 + 10396 00b0 1142 tst r1, r2 + 10397 00b2 DED1 bne .L620 +1266:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** } + 10398 .loc 1 1266 7 discriminator 1 view .LVU3240 + 10399 00b4 196A ldr r1, [r3, #32] + 10400 00b6 144A ldr r2, .L629+28 + 10401 00b8 1142 tst r1, r2 + 10402 00ba DAD1 bne .L620 +1266:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** } + 10403 .loc 1 1266 7 discriminator 3 view .LVU3241 + 10404 00bc 5A6C ldr r2, [r3, #68] + 10405 00be 1449 ldr r1, .L629+36 + 10406 00c0 0A40 ands r2, r1 + 10407 00c2 5A64 str r2, [r3, #68] + 10408 00c4 D5E7 b .L620 + 10409 .L622: +1273:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** } + 10410 .loc 1 1273 5 is_stmt 0 discriminator 2 view .LVU3242 + 10411 00c6 042C cmp r4, #4 + 10412 00c8 06D0 beq .L627 +1273:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** } + 10413 .loc 1 1273 5 discriminator 4 view .LVU3243 + 10414 00ca 082C cmp r4, #8 + 10415 00cc 09D0 beq .L628 +1273:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** } + 10416 .loc 1 1273 5 discriminator 7 view .LVU3244 + ARM GAS /tmp/ccMtK8ce.s page 364 + + + 10417 00ce 4123 movs r3, #65 + 10418 00d0 0122 movs r2, #1 + 10419 00d2 EA54 strb r2, [r5, r3] + 10420 00d4 0020 movs r0, #0 + 10421 00d6 DFE7 b .L616 + 10422 .L627: +1273:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** } + 10423 .loc 1 1273 5 discriminator 3 view .LVU3245 + 10424 00d8 3F23 movs r3, #63 + 10425 00da 0122 movs r2, #1 + 10426 00dc EA54 strb r2, [r5, r3] + 10427 00de 0020 movs r0, #0 + 10428 00e0 DAE7 b .L616 + 10429 .L628: +1273:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** } + 10430 .loc 1 1273 5 discriminator 6 view .LVU3246 + 10431 00e2 4023 movs r3, #64 + 10432 00e4 0122 movs r2, #1 + 10433 00e6 EA54 strb r2, [r5, r3] + 10434 00e8 0020 movs r0, #0 + 10435 00ea D5E7 b .L616 + 10436 .L630: + 10437 .align 2 + 10438 .L629: + 10439 00ec FFFBFFFF .word -1025 + 10440 00f0 FFEFFFFF .word -4097 + 10441 00f4 FFFDFFFF .word -513 + 10442 00f8 002C0140 .word 1073818624 + 10443 00fc 00440140 .word 1073824768 + 10444 0100 00480140 .word 1073825792 + 10445 0104 11110000 .word 4369 + 10446 0108 44040000 .word 1092 + 10447 010c FFF7FFFF .word -2049 + 10448 0110 FF7FFFFF .word -32769 + 10449 .cfi_endproc + 10450 .LFE59: + 10452 .section .text.HAL_TIM_PWM_Start,"ax",%progbits + 10453 .align 1 + 10454 .global HAL_TIM_PWM_Start + 10455 .syntax unified + 10456 .code 16 + 10457 .thumb_func + 10459 HAL_TIM_PWM_Start: + 10460 .LVL839: + 10461 .LFB64: +1455:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** uint32_t tmpsmcr; + 10462 .loc 1 1455 1 is_stmt 1 view -0 + 10463 .cfi_startproc + 10464 @ args = 0, pretend = 0, frame = 0 + 10465 @ frame_needed = 0, uses_anonymous_args = 0 +1455:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** uint32_t tmpsmcr; + 10466 .loc 1 1455 1 is_stmt 0 view .LVU3248 + 10467 0000 10B5 push {r4, lr} + 10468 .cfi_def_cfa_offset 8 + 10469 .cfi_offset 4, -8 + 10470 .cfi_offset 14, -4 + 10471 0002 0400 movs r4, r0 + ARM GAS /tmp/ccMtK8ce.s page 365 + + +1456:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 10472 .loc 1 1456 3 is_stmt 1 view .LVU3249 +1459:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 10473 .loc 1 1459 3 view .LVU3250 +1462:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** { + 10474 .loc 1 1462 3 view .LVU3251 +1462:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** { + 10475 .loc 1 1462 44 is_stmt 0 view .LVU3252 + 10476 0004 0029 cmp r1, #0 + 10477 0006 30D1 bne .L632 +1462:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** { + 10478 .loc 1 1462 7 discriminator 1 view .LVU3253 + 10479 0008 3E23 movs r3, #62 + 10480 000a C35C ldrb r3, [r0, r3] +1462:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** { + 10481 .loc 1 1462 44 discriminator 1 view .LVU3254 + 10482 000c 013B subs r3, r3, #1 + 10483 000e 5A1E subs r2, r3, #1 + 10484 0010 9341 sbcs r3, r3, r2 + 10485 0012 DBB2 uxtb r3, r3 + 10486 .L633: +1462:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** { + 10487 .loc 1 1462 6 discriminator 12 view .LVU3255 + 10488 0014 002B cmp r3, #0 + 10489 0016 5CD1 bne .L645 +1468:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 10490 .loc 1 1468 3 is_stmt 1 view .LVU3256 + 10491 0018 0029 cmp r1, #0 + 10492 001a 3FD1 bne .L637 +1468:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 10493 .loc 1 1468 3 is_stmt 0 discriminator 1 view .LVU3257 + 10494 001c 3E33 adds r3, r3, #62 + 10495 001e 0222 movs r2, #2 + 10496 0020 E254 strb r2, [r4, r3] + 10497 .L638: +1471:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 10498 .loc 1 1471 3 is_stmt 1 view .LVU3258 + 10499 0022 2068 ldr r0, [r4] + 10500 .LVL840: +1471:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 10501 .loc 1 1471 3 is_stmt 0 view .LVU3259 + 10502 0024 0122 movs r2, #1 + 10503 0026 FFF7FEFF bl TIM_CCxChannelCmd + 10504 .LVL841: +1473:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** { + 10505 .loc 1 1473 3 is_stmt 1 view .LVU3260 +1473:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** { + 10506 .loc 1 1473 7 is_stmt 0 view .LVU3261 + 10507 002a 2368 ldr r3, [r4] + 10508 002c 2B4A ldr r2, .L651 + 10509 002e 9342 cmp r3, r2 + 10510 0030 05D0 beq .L641 +1473:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** { + 10511 .loc 1 1473 7 discriminator 2 view .LVU3262 + 10512 0032 2B4A ldr r2, .L651+4 + 10513 0034 9342 cmp r3, r2 + 10514 0036 02D0 beq .L641 + ARM GAS /tmp/ccMtK8ce.s page 366 + + +1473:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** { + 10515 .loc 1 1473 7 discriminator 4 view .LVU3263 + 10516 0038 2A4A ldr r2, .L651+8 + 10517 003a 9342 cmp r3, r2 + 10518 003c 04D1 bne .L642 + 10519 .L641: +1476:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** } + 10520 .loc 1 1476 5 is_stmt 1 view .LVU3264 + 10521 003e 596C ldr r1, [r3, #68] + 10522 0040 8022 movs r2, #128 + 10523 0042 1202 lsls r2, r2, #8 + 10524 0044 0A43 orrs r2, r1 + 10525 0046 5A64 str r2, [r3, #68] + 10526 .L642: +1480:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** { + 10527 .loc 1 1480 3 view .LVU3265 +1480:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** { + 10528 .loc 1 1480 7 is_stmt 0 view .LVU3266 + 10529 0048 2368 ldr r3, [r4] +1480:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** { + 10530 .loc 1 1480 6 view .LVU3267 + 10531 004a 244A ldr r2, .L651 + 10532 004c 9342 cmp r3, r2 + 10533 004e 35D0 beq .L643 +1480:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** { + 10534 .loc 1 1480 7 discriminator 1 view .LVU3268 + 10535 0050 8022 movs r2, #128 + 10536 0052 D205 lsls r2, r2, #23 + 10537 0054 9342 cmp r3, r2 + 10538 0056 31D0 beq .L643 +1480:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** { + 10539 .loc 1 1480 7 discriminator 2 view .LVU3269 + 10540 0058 234A ldr r2, .L651+12 + 10541 005a 9342 cmp r3, r2 + 10542 005c 2ED0 beq .L643 +1490:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** } + 10543 .loc 1 1490 5 is_stmt 1 view .LVU3270 + 10544 005e 1A68 ldr r2, [r3] + 10545 0060 0121 movs r1, #1 + 10546 0062 0A43 orrs r2, r1 + 10547 0064 1A60 str r2, [r3] +1494:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** } + 10548 .loc 1 1494 10 is_stmt 0 view .LVU3271 + 10549 0066 0020 movs r0, #0 + 10550 0068 34E0 b .L636 + 10551 .LVL842: + 10552 .L632: +1462:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** { + 10553 .loc 1 1462 44 discriminator 2 view .LVU3272 + 10554 006a 0429 cmp r1, #4 + 10555 006c 08D0 beq .L647 +1462:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** { + 10556 .loc 1 1462 44 discriminator 5 view .LVU3273 + 10557 006e 0829 cmp r1, #8 + 10558 0070 0DD0 beq .L648 +1462:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** { + 10559 .loc 1 1462 7 discriminator 8 view .LVU3274 + ARM GAS /tmp/ccMtK8ce.s page 367 + + + 10560 0072 4123 movs r3, #65 + 10561 0074 C35C ldrb r3, [r0, r3] +1462:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** { + 10562 .loc 1 1462 44 discriminator 8 view .LVU3275 + 10563 0076 013B subs r3, r3, #1 + 10564 0078 5A1E subs r2, r3, #1 + 10565 007a 9341 sbcs r3, r3, r2 + 10566 007c DBB2 uxtb r3, r3 + 10567 007e C9E7 b .L633 + 10568 .L647: +1462:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** { + 10569 .loc 1 1462 7 discriminator 4 view .LVU3276 + 10570 0080 3F23 movs r3, #63 + 10571 0082 C35C ldrb r3, [r0, r3] +1462:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** { + 10572 .loc 1 1462 44 discriminator 4 view .LVU3277 + 10573 0084 013B subs r3, r3, #1 + 10574 0086 5A1E subs r2, r3, #1 + 10575 0088 9341 sbcs r3, r3, r2 + 10576 008a DBB2 uxtb r3, r3 + 10577 008c C2E7 b .L633 + 10578 .L648: +1462:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** { + 10579 .loc 1 1462 7 discriminator 7 view .LVU3278 + 10580 008e 4023 movs r3, #64 + 10581 0090 C35C ldrb r3, [r0, r3] +1462:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** { + 10582 .loc 1 1462 44 discriminator 7 view .LVU3279 + 10583 0092 013B subs r3, r3, #1 + 10584 0094 5A1E subs r2, r3, #1 + 10585 0096 9341 sbcs r3, r3, r2 + 10586 0098 DBB2 uxtb r3, r3 + 10587 009a BBE7 b .L633 + 10588 .L637: +1468:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 10589 .loc 1 1468 3 discriminator 2 view .LVU3280 + 10590 009c 0429 cmp r1, #4 + 10591 009e 05D0 beq .L649 +1468:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 10592 .loc 1 1468 3 discriminator 4 view .LVU3281 + 10593 00a0 0829 cmp r1, #8 + 10594 00a2 07D0 beq .L650 +1468:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 10595 .loc 1 1468 3 discriminator 7 view .LVU3282 + 10596 00a4 4123 movs r3, #65 + 10597 00a6 0222 movs r2, #2 + 10598 00a8 E254 strb r2, [r4, r3] + 10599 00aa BAE7 b .L638 + 10600 .L649: +1468:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 10601 .loc 1 1468 3 discriminator 3 view .LVU3283 + 10602 00ac 3F23 movs r3, #63 + 10603 00ae 0222 movs r2, #2 + 10604 00b0 E254 strb r2, [r4, r3] + 10605 00b2 B6E7 b .L638 + 10606 .L650: +1468:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + ARM GAS /tmp/ccMtK8ce.s page 368 + + + 10607 .loc 1 1468 3 discriminator 6 view .LVU3284 + 10608 00b4 4023 movs r3, #64 + 10609 00b6 0222 movs r2, #2 + 10610 00b8 E254 strb r2, [r4, r3] + 10611 00ba B2E7 b .L638 + 10612 .LVL843: + 10613 .L643: +1482:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** if (!IS_TIM_SLAVEMODE_TRIGGER_ENABLED(tmpsmcr)) + 10614 .loc 1 1482 5 is_stmt 1 view .LVU3285 +1482:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** if (!IS_TIM_SLAVEMODE_TRIGGER_ENABLED(tmpsmcr)) + 10615 .loc 1 1482 29 is_stmt 0 view .LVU3286 + 10616 00bc 9968 ldr r1, [r3, #8] +1482:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** if (!IS_TIM_SLAVEMODE_TRIGGER_ENABLED(tmpsmcr)) + 10617 .loc 1 1482 13 view .LVU3287 + 10618 00be 0722 movs r2, #7 + 10619 00c0 0A40 ands r2, r1 + 10620 .LVL844: +1483:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** { + 10621 .loc 1 1483 5 is_stmt 1 view .LVU3288 +1483:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** { + 10622 .loc 1 1483 8 is_stmt 0 view .LVU3289 + 10623 00c2 062A cmp r2, #6 + 10624 00c4 07D0 beq .L646 +1485:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** } + 10625 .loc 1 1485 7 is_stmt 1 view .LVU3290 + 10626 00c6 1A68 ldr r2, [r3] + 10627 .LVL845: +1485:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** } + 10628 .loc 1 1485 7 is_stmt 0 view .LVU3291 + 10629 00c8 0121 movs r1, #1 + 10630 .LVL846: +1485:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** } + 10631 .loc 1 1485 7 view .LVU3292 + 10632 00ca 0A43 orrs r2, r1 + 10633 00cc 1A60 str r2, [r3] +1494:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** } + 10634 .loc 1 1494 10 view .LVU3293 + 10635 00ce 0020 movs r0, #0 + 10636 00d0 00E0 b .L636 + 10637 .LVL847: + 10638 .L645: +1464:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** } + 10639 .loc 1 1464 12 view .LVU3294 + 10640 00d2 0120 movs r0, #1 + 10641 .LVL848: + 10642 .L636: +1495:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 10643 .loc 1 1495 1 view .LVU3295 + 10644 @ sp needed + 10645 .LVL849: +1495:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 10646 .loc 1 1495 1 view .LVU3296 + 10647 00d4 10BD pop {r4, pc} + 10648 .LVL850: + 10649 .L646: +1494:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** } + 10650 .loc 1 1494 10 view .LVU3297 + ARM GAS /tmp/ccMtK8ce.s page 369 + + + 10651 00d6 0020 movs r0, #0 + 10652 00d8 FCE7 b .L636 + 10653 .L652: + 10654 00da C046 .align 2 + 10655 .L651: + 10656 00dc 002C0140 .word 1073818624 + 10657 00e0 00440140 .word 1073824768 + 10658 00e4 00480140 .word 1073825792 + 10659 00e8 00040040 .word 1073742848 + 10660 .cfi_endproc + 10661 .LFE64: + 10663 .section .text.HAL_TIM_PWM_Stop,"ax",%progbits + 10664 .align 1 + 10665 .global HAL_TIM_PWM_Stop + 10666 .syntax unified + 10667 .code 16 + 10668 .thumb_func + 10670 HAL_TIM_PWM_Stop: + 10671 .LVL851: + 10672 .LFB65: +1509:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** /* Check the parameters */ + 10673 .loc 1 1509 1 is_stmt 1 view -0 + 10674 .cfi_startproc + 10675 @ args = 0, pretend = 0, frame = 0 + 10676 @ frame_needed = 0, uses_anonymous_args = 0 +1509:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** /* Check the parameters */ + 10677 .loc 1 1509 1 is_stmt 0 view .LVU3299 + 10678 0000 70B5 push {r4, r5, r6, lr} + 10679 .cfi_def_cfa_offset 16 + 10680 .cfi_offset 4, -16 + 10681 .cfi_offset 5, -12 + 10682 .cfi_offset 6, -8 + 10683 .cfi_offset 14, -4 + 10684 0002 0400 movs r4, r0 + 10685 0004 0D00 movs r5, r1 +1511:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 10686 .loc 1 1511 3 is_stmt 1 view .LVU3300 +1514:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 10687 .loc 1 1514 3 view .LVU3301 + 10688 0006 0068 ldr r0, [r0] + 10689 .LVL852: +1514:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 10690 .loc 1 1514 3 is_stmt 0 view .LVU3302 + 10691 0008 0022 movs r2, #0 + 10692 000a FFF7FEFF bl TIM_CCxChannelCmd + 10693 .LVL853: +1516:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** { + 10694 .loc 1 1516 3 is_stmt 1 view .LVU3303 +1516:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** { + 10695 .loc 1 1516 7 is_stmt 0 view .LVU3304 + 10696 000e 2368 ldr r3, [r4] + 10697 0010 1C4A ldr r2, .L663 + 10698 0012 9342 cmp r3, r2 + 10699 0014 19D0 beq .L654 +1516:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** { + 10700 .loc 1 1516 7 discriminator 2 view .LVU3305 + 10701 0016 1C4A ldr r2, .L663+4 + ARM GAS /tmp/ccMtK8ce.s page 370 + + + 10702 0018 9342 cmp r3, r2 + 10703 001a 16D0 beq .L654 +1516:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** { + 10704 .loc 1 1516 7 discriminator 4 view .LVU3306 + 10705 001c 1B4A ldr r2, .L663+8 + 10706 001e 9342 cmp r3, r2 + 10707 0020 13D0 beq .L654 + 10708 .L655: +1519:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** } + 10709 .loc 1 1519 5 is_stmt 1 discriminator 5 view .LVU3307 +1523:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 10710 .loc 1 1523 3 view .LVU3308 +1523:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 10711 .loc 1 1523 3 view .LVU3309 + 10712 0022 2368 ldr r3, [r4] + 10713 0024 196A ldr r1, [r3, #32] + 10714 0026 1A4A ldr r2, .L663+12 + 10715 0028 1142 tst r1, r2 + 10716 002a 07D1 bne .L656 +1523:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 10717 .loc 1 1523 3 discriminator 1 view .LVU3310 + 10718 002c 196A ldr r1, [r3, #32] + 10719 002e 194A ldr r2, .L663+16 + 10720 0030 1142 tst r1, r2 + 10721 0032 03D1 bne .L656 +1523:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 10722 .loc 1 1523 3 discriminator 3 view .LVU3311 + 10723 0034 1A68 ldr r2, [r3] + 10724 0036 0121 movs r1, #1 + 10725 0038 8A43 bics r2, r1 + 10726 003a 1A60 str r2, [r3] + 10727 .L656: +1523:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 10728 .loc 1 1523 3 discriminator 5 view .LVU3312 +1526:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 10729 .loc 1 1526 3 view .LVU3313 + 10730 003c 002D cmp r5, #0 + 10731 003e 11D1 bne .L657 +1526:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 10732 .loc 1 1526 3 is_stmt 0 discriminator 1 view .LVU3314 + 10733 0040 3E23 movs r3, #62 + 10734 0042 0122 movs r2, #1 + 10735 0044 E254 strb r2, [r4, r3] + 10736 .L658: +1529:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** } + 10737 .loc 1 1529 3 is_stmt 1 view .LVU3315 +1530:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 10738 .loc 1 1530 1 is_stmt 0 view .LVU3316 + 10739 0046 0020 movs r0, #0 + 10740 @ sp needed + 10741 .LVL854: + 10742 .LVL855: +1530:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 10743 .loc 1 1530 1 view .LVU3317 + 10744 0048 70BD pop {r4, r5, r6, pc} + 10745 .LVL856: + 10746 .L654: + ARM GAS /tmp/ccMtK8ce.s page 371 + + +1519:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** } + 10747 .loc 1 1519 5 is_stmt 1 view .LVU3318 +1519:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** } + 10748 .loc 1 1519 5 view .LVU3319 + 10749 004a 196A ldr r1, [r3, #32] + 10750 004c 104A ldr r2, .L663+12 + 10751 004e 1142 tst r1, r2 + 10752 0050 E7D1 bne .L655 +1519:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** } + 10753 .loc 1 1519 5 discriminator 1 view .LVU3320 + 10754 0052 196A ldr r1, [r3, #32] + 10755 0054 0F4A ldr r2, .L663+16 + 10756 0056 1142 tst r1, r2 + 10757 0058 E3D1 bne .L655 +1519:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** } + 10758 .loc 1 1519 5 discriminator 3 view .LVU3321 + 10759 005a 5A6C ldr r2, [r3, #68] + 10760 005c 0E49 ldr r1, .L663+20 + 10761 005e 0A40 ands r2, r1 + 10762 0060 5A64 str r2, [r3, #68] + 10763 0062 DEE7 b .L655 + 10764 .L657: +1526:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 10765 .loc 1 1526 3 is_stmt 0 discriminator 2 view .LVU3322 + 10766 0064 042D cmp r5, #4 + 10767 0066 05D0 beq .L661 +1526:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 10768 .loc 1 1526 3 discriminator 4 view .LVU3323 + 10769 0068 082D cmp r5, #8 + 10770 006a 07D0 beq .L662 +1526:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 10771 .loc 1 1526 3 discriminator 7 view .LVU3324 + 10772 006c 4123 movs r3, #65 + 10773 006e 0122 movs r2, #1 + 10774 0070 E254 strb r2, [r4, r3] + 10775 0072 E8E7 b .L658 + 10776 .L661: +1526:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 10777 .loc 1 1526 3 discriminator 3 view .LVU3325 + 10778 0074 3F23 movs r3, #63 + 10779 0076 0122 movs r2, #1 + 10780 0078 E254 strb r2, [r4, r3] + 10781 007a E4E7 b .L658 + 10782 .L662: +1526:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 10783 .loc 1 1526 3 discriminator 6 view .LVU3326 + 10784 007c 4023 movs r3, #64 + 10785 007e 0122 movs r2, #1 + 10786 0080 E254 strb r2, [r4, r3] + 10787 0082 E0E7 b .L658 + 10788 .L664: + 10789 .align 2 + 10790 .L663: + 10791 0084 002C0140 .word 1073818624 + 10792 0088 00440140 .word 1073824768 + 10793 008c 00480140 .word 1073825792 + 10794 0090 11110000 .word 4369 + ARM GAS /tmp/ccMtK8ce.s page 372 + + + 10795 0094 44040000 .word 1092 + 10796 0098 FF7FFFFF .word -32769 + 10797 .cfi_endproc + 10798 .LFE65: + 10800 .section .text.HAL_TIM_PWM_Start_IT,"ax",%progbits + 10801 .align 1 + 10802 .global HAL_TIM_PWM_Start_IT + 10803 .syntax unified + 10804 .code 16 + 10805 .thumb_func + 10807 HAL_TIM_PWM_Start_IT: + 10808 .LVL857: + 10809 .LFB66: +1544:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** HAL_StatusTypeDef status = HAL_OK; + 10810 .loc 1 1544 1 is_stmt 1 view -0 + 10811 .cfi_startproc + 10812 @ args = 0, pretend = 0, frame = 0 + 10813 @ frame_needed = 0, uses_anonymous_args = 0 +1544:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** HAL_StatusTypeDef status = HAL_OK; + 10814 .loc 1 1544 1 is_stmt 0 view .LVU3328 + 10815 0000 10B5 push {r4, lr} + 10816 .cfi_def_cfa_offset 8 + 10817 .cfi_offset 4, -8 + 10818 .cfi_offset 14, -4 + 10819 0002 0400 movs r4, r0 +1545:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** uint32_t tmpsmcr; + 10820 .loc 1 1545 3 is_stmt 1 view .LVU3329 + 10821 .LVL858: +1546:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 10822 .loc 1 1546 3 view .LVU3330 +1549:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 10823 .loc 1 1549 3 view .LVU3331 +1552:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** { + 10824 .loc 1 1552 3 view .LVU3332 +1552:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** { + 10825 .loc 1 1552 44 is_stmt 0 view .LVU3333 + 10826 0004 0029 cmp r1, #0 + 10827 0006 35D1 bne .L666 +1552:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** { + 10828 .loc 1 1552 7 discriminator 1 view .LVU3334 + 10829 0008 3E23 movs r3, #62 + 10830 000a C35C ldrb r3, [r0, r3] +1552:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** { + 10831 .loc 1 1552 44 discriminator 1 view .LVU3335 + 10832 000c 013B subs r3, r3, #1 + 10833 000e 5A1E subs r2, r3, #1 + 10834 0010 9341 sbcs r3, r3, r2 + 10835 0012 DBB2 uxtb r3, r3 + 10836 .L667: +1552:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** { + 10837 .loc 1 1552 6 discriminator 12 view .LVU3336 + 10838 0014 002B cmp r3, #0 + 10839 0016 7DD1 bne .L684 +1558:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 10840 .loc 1 1558 3 is_stmt 1 view .LVU3337 + 10841 0018 0029 cmp r1, #0 + 10842 001a 44D1 bne .L671 + ARM GAS /tmp/ccMtK8ce.s page 373 + + +1558:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 10843 .loc 1 1558 3 is_stmt 0 discriminator 1 view .LVU3338 + 10844 001c 3E33 adds r3, r3, #62 + 10845 001e 0222 movs r2, #2 + 10846 0020 E254 strb r2, [r4, r3] +1560:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** { + 10847 .loc 1 1560 3 is_stmt 1 view .LVU3339 + 10848 .L672: +1565:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** break; + 10849 .loc 1 1565 7 view .LVU3340 + 10850 0022 2268 ldr r2, [r4] + 10851 0024 D368 ldr r3, [r2, #12] + 10852 0026 0220 movs r0, #2 + 10853 .LVL859: +1565:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** break; + 10854 .loc 1 1565 7 is_stmt 0 view .LVU3341 + 10855 0028 0343 orrs r3, r0 + 10856 002a D360 str r3, [r2, #12] +1566:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** } + 10857 .loc 1 1566 7 is_stmt 1 view .LVU3342 +1595:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** { + 10858 .loc 1 1595 3 view .LVU3343 + 10859 .L679: +1598:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 10860 .loc 1 1598 5 view .LVU3344 + 10861 002c 2068 ldr r0, [r4] + 10862 002e 0122 movs r2, #1 + 10863 0030 FFF7FEFF bl TIM_CCxChannelCmd + 10864 .LVL860: +1600:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** { + 10865 .loc 1 1600 5 view .LVU3345 +1600:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** { + 10866 .loc 1 1600 9 is_stmt 0 view .LVU3346 + 10867 0034 2368 ldr r3, [r4] + 10868 0036 394A ldr r2, .L691 + 10869 0038 9342 cmp r3, r2 + 10870 003a 05D0 beq .L680 +1600:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** { + 10871 .loc 1 1600 9 discriminator 2 view .LVU3347 + 10872 003c 384A ldr r2, .L691+4 + 10873 003e 9342 cmp r3, r2 + 10874 0040 02D0 beq .L680 +1600:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** { + 10875 .loc 1 1600 9 discriminator 4 view .LVU3348 + 10876 0042 384A ldr r2, .L691+8 + 10877 0044 9342 cmp r3, r2 + 10878 0046 04D1 bne .L681 + 10879 .L680: +1603:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** } + 10880 .loc 1 1603 7 is_stmt 1 view .LVU3349 + 10881 0048 596C ldr r1, [r3, #68] + 10882 004a 8022 movs r2, #128 + 10883 004c 1202 lsls r2, r2, #8 + 10884 004e 0A43 orrs r2, r1 + 10885 0050 5A64 str r2, [r3, #68] + 10886 .L681: +1607:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** { + ARM GAS /tmp/ccMtK8ce.s page 374 + + + 10887 .loc 1 1607 5 view .LVU3350 +1607:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** { + 10888 .loc 1 1607 9 is_stmt 0 view .LVU3351 + 10889 0052 2368 ldr r3, [r4] +1607:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** { + 10890 .loc 1 1607 8 view .LVU3352 + 10891 0054 314A ldr r2, .L691 + 10892 0056 9342 cmp r3, r2 + 10893 0058 51D0 beq .L682 +1607:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** { + 10894 .loc 1 1607 9 discriminator 1 view .LVU3353 + 10895 005a 8022 movs r2, #128 + 10896 005c D205 lsls r2, r2, #23 + 10897 005e 9342 cmp r3, r2 + 10898 0060 4DD0 beq .L682 +1607:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** { + 10899 .loc 1 1607 9 discriminator 2 view .LVU3354 + 10900 0062 314A ldr r2, .L691+12 + 10901 0064 9342 cmp r3, r2 + 10902 0066 4AD0 beq .L682 +1617:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** } + 10903 .loc 1 1617 7 is_stmt 1 view .LVU3355 + 10904 0068 1A68 ldr r2, [r3] + 10905 006a 0121 movs r1, #1 + 10906 006c 0A43 orrs r2, r1 + 10907 006e 1A60 str r2, [r3] + 10908 0070 0020 movs r0, #0 + 10909 0072 50E0 b .L670 + 10910 .LVL861: + 10911 .L666: +1552:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** { + 10912 .loc 1 1552 44 is_stmt 0 discriminator 2 view .LVU3356 + 10913 0074 0429 cmp r1, #4 + 10914 0076 08D0 beq .L686 +1552:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** { + 10915 .loc 1 1552 44 discriminator 5 view .LVU3357 + 10916 0078 0829 cmp r1, #8 + 10917 007a 0DD0 beq .L687 +1552:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** { + 10918 .loc 1 1552 7 discriminator 8 view .LVU3358 + 10919 007c 4123 movs r3, #65 + 10920 007e C35C ldrb r3, [r0, r3] +1552:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** { + 10921 .loc 1 1552 44 discriminator 8 view .LVU3359 + 10922 0080 013B subs r3, r3, #1 + 10923 0082 5A1E subs r2, r3, #1 + 10924 0084 9341 sbcs r3, r3, r2 + 10925 0086 DBB2 uxtb r3, r3 + 10926 0088 C4E7 b .L667 + 10927 .L686: +1552:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** { + 10928 .loc 1 1552 7 discriminator 4 view .LVU3360 + 10929 008a 3F23 movs r3, #63 + 10930 008c C35C ldrb r3, [r0, r3] +1552:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** { + 10931 .loc 1 1552 44 discriminator 4 view .LVU3361 + 10932 008e 013B subs r3, r3, #1 + ARM GAS /tmp/ccMtK8ce.s page 375 + + + 10933 0090 5A1E subs r2, r3, #1 + 10934 0092 9341 sbcs r3, r3, r2 + 10935 0094 DBB2 uxtb r3, r3 + 10936 0096 BDE7 b .L667 + 10937 .L687: +1552:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** { + 10938 .loc 1 1552 7 discriminator 7 view .LVU3362 + 10939 0098 4023 movs r3, #64 + 10940 009a C35C ldrb r3, [r0, r3] +1552:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** { + 10941 .loc 1 1552 44 discriminator 7 view .LVU3363 + 10942 009c 013B subs r3, r3, #1 + 10943 009e 5A1E subs r2, r3, #1 + 10944 00a0 9341 sbcs r3, r3, r2 + 10945 00a2 DBB2 uxtb r3, r3 + 10946 00a4 B6E7 b .L667 + 10947 .L671: +1558:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 10948 .loc 1 1558 3 discriminator 2 view .LVU3364 + 10949 00a6 0429 cmp r1, #4 + 10950 00a8 0DD0 beq .L688 +1558:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 10951 .loc 1 1558 3 discriminator 4 view .LVU3365 + 10952 00aa 0829 cmp r1, #8 + 10953 00ac 14D0 beq .L689 +1558:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 10954 .loc 1 1558 3 discriminator 7 view .LVU3366 + 10955 00ae 4123 movs r3, #65 + 10956 00b0 0222 movs r2, #2 + 10957 00b2 E254 strb r2, [r4, r3] +1560:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** { + 10958 .loc 1 1560 3 is_stmt 1 view .LVU3367 + 10959 00b4 0829 cmp r1, #8 + 10960 00b6 12D0 beq .L676 + 10961 00b8 17D8 bhi .L677 + 10962 00ba 0029 cmp r1, #0 + 10963 00bc B1D0 beq .L672 + 10964 00be 0429 cmp r1, #4 + 10965 00c0 04D0 beq .L674 + 10966 00c2 0120 movs r0, #1 + 10967 .LVL862: +1560:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** { + 10968 .loc 1 1560 3 is_stmt 0 view .LVU3368 + 10969 00c4 27E0 b .L670 + 10970 .LVL863: + 10971 .L688: +1558:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 10972 .loc 1 1558 3 discriminator 3 view .LVU3369 + 10973 00c6 3F23 movs r3, #63 + 10974 00c8 0222 movs r2, #2 + 10975 00ca E254 strb r2, [r4, r3] +1560:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** { + 10976 .loc 1 1560 3 is_stmt 1 view .LVU3370 + 10977 .L674: +1572:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** break; + 10978 .loc 1 1572 7 view .LVU3371 + 10979 00cc 2268 ldr r2, [r4] + ARM GAS /tmp/ccMtK8ce.s page 376 + + + 10980 00ce D368 ldr r3, [r2, #12] + 10981 00d0 0420 movs r0, #4 + 10982 .LVL864: +1572:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** break; + 10983 .loc 1 1572 7 is_stmt 0 view .LVU3372 + 10984 00d2 0343 orrs r3, r0 + 10985 00d4 D360 str r3, [r2, #12] +1573:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** } + 10986 .loc 1 1573 7 is_stmt 1 view .LVU3373 +1595:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** { + 10987 .loc 1 1595 3 view .LVU3374 + 10988 00d6 A9E7 b .L679 + 10989 .LVL865: + 10990 .L689: +1558:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 10991 .loc 1 1558 3 is_stmt 0 discriminator 6 view .LVU3375 + 10992 00d8 4023 movs r3, #64 + 10993 00da 0222 movs r2, #2 + 10994 00dc E254 strb r2, [r4, r3] +1560:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** { + 10995 .loc 1 1560 3 is_stmt 1 view .LVU3376 + 10996 .L676: +1579:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** break; + 10997 .loc 1 1579 7 view .LVU3377 + 10998 00de 2268 ldr r2, [r4] + 10999 00e0 D368 ldr r3, [r2, #12] + 11000 00e2 0820 movs r0, #8 + 11001 .LVL866: +1579:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** break; + 11002 .loc 1 1579 7 is_stmt 0 view .LVU3378 + 11003 00e4 0343 orrs r3, r0 + 11004 00e6 D360 str r3, [r2, #12] +1580:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** } + 11005 .loc 1 1580 7 is_stmt 1 view .LVU3379 +1595:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** { + 11006 .loc 1 1595 3 view .LVU3380 + 11007 00e8 A0E7 b .L679 + 11008 .LVL867: + 11009 .L677: +1560:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** { + 11010 .loc 1 1560 3 is_stmt 0 view .LVU3381 + 11011 00ea 0C29 cmp r1, #12 + 11012 00ec 05D1 bne .L690 +1586:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** break; + 11013 .loc 1 1586 7 is_stmt 1 view .LVU3382 + 11014 00ee 2268 ldr r2, [r4] + 11015 00f0 D368 ldr r3, [r2, #12] + 11016 00f2 1020 movs r0, #16 + 11017 .LVL868: +1586:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** break; + 11018 .loc 1 1586 7 is_stmt 0 view .LVU3383 + 11019 00f4 0343 orrs r3, r0 + 11020 00f6 D360 str r3, [r2, #12] +1587:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** } + 11021 .loc 1 1587 7 is_stmt 1 view .LVU3384 +1595:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** { + 11022 .loc 1 1595 3 view .LVU3385 + ARM GAS /tmp/ccMtK8ce.s page 377 + + + 11023 00f8 98E7 b .L679 + 11024 .LVL869: + 11025 .L690: +1560:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** { + 11026 .loc 1 1560 3 is_stmt 0 view .LVU3386 + 11027 00fa 0120 movs r0, #1 + 11028 .LVL870: +1560:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** { + 11029 .loc 1 1560 3 view .LVU3387 + 11030 00fc 0BE0 b .L670 + 11031 .LVL871: + 11032 .L682: +1609:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** if (!IS_TIM_SLAVEMODE_TRIGGER_ENABLED(tmpsmcr)) + 11033 .loc 1 1609 7 is_stmt 1 view .LVU3388 +1609:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** if (!IS_TIM_SLAVEMODE_TRIGGER_ENABLED(tmpsmcr)) + 11034 .loc 1 1609 31 is_stmt 0 view .LVU3389 + 11035 00fe 9968 ldr r1, [r3, #8] +1609:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** if (!IS_TIM_SLAVEMODE_TRIGGER_ENABLED(tmpsmcr)) + 11036 .loc 1 1609 15 view .LVU3390 + 11037 0100 0722 movs r2, #7 + 11038 0102 0A40 ands r2, r1 + 11039 .LVL872: +1610:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** { + 11040 .loc 1 1610 7 is_stmt 1 view .LVU3391 +1610:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** { + 11041 .loc 1 1610 10 is_stmt 0 view .LVU3392 + 11042 0104 062A cmp r2, #6 + 11043 0106 07D0 beq .L685 +1612:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** } + 11044 .loc 1 1612 9 is_stmt 1 view .LVU3393 + 11045 0108 1A68 ldr r2, [r3] + 11046 .LVL873: +1612:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** } + 11047 .loc 1 1612 9 is_stmt 0 view .LVU3394 + 11048 010a 0121 movs r1, #1 + 11049 .LVL874: +1612:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** } + 11050 .loc 1 1612 9 view .LVU3395 + 11051 010c 0A43 orrs r2, r1 + 11052 010e 1A60 str r2, [r3] + 11053 0110 0020 movs r0, #0 + 11054 0112 00E0 b .L670 + 11055 .LVL875: + 11056 .L684: +1554:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** } + 11057 .loc 1 1554 12 view .LVU3396 + 11058 0114 0120 movs r0, #1 + 11059 .LVL876: + 11060 .L670: +1623:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 11061 .loc 1 1623 1 view .LVU3397 + 11062 @ sp needed + 11063 .LVL877: +1623:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 11064 .loc 1 1623 1 view .LVU3398 + 11065 0116 10BD pop {r4, pc} + 11066 .LVL878: + ARM GAS /tmp/ccMtK8ce.s page 378 + + + 11067 .L685: +1623:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 11068 .loc 1 1623 1 view .LVU3399 + 11069 0118 0020 movs r0, #0 + 11070 011a FCE7 b .L670 + 11071 .L692: + 11072 .align 2 + 11073 .L691: + 11074 011c 002C0140 .word 1073818624 + 11075 0120 00440140 .word 1073824768 + 11076 0124 00480140 .word 1073825792 + 11077 0128 00040040 .word 1073742848 + 11078 .cfi_endproc + 11079 .LFE66: + 11081 .section .text.HAL_TIM_PWM_Stop_IT,"ax",%progbits + 11082 .align 1 + 11083 .global HAL_TIM_PWM_Stop_IT + 11084 .syntax unified + 11085 .code 16 + 11086 .thumb_func + 11088 HAL_TIM_PWM_Stop_IT: + 11089 .LVL879: + 11090 .LFB67: +1637:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** HAL_StatusTypeDef status = HAL_OK; + 11091 .loc 1 1637 1 is_stmt 1 view -0 + 11092 .cfi_startproc + 11093 @ args = 0, pretend = 0, frame = 0 + 11094 @ frame_needed = 0, uses_anonymous_args = 0 +1637:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** HAL_StatusTypeDef status = HAL_OK; + 11095 .loc 1 1637 1 is_stmt 0 view .LVU3401 + 11096 0000 70B5 push {r4, r5, r6, lr} + 11097 .cfi_def_cfa_offset 16 + 11098 .cfi_offset 4, -16 + 11099 .cfi_offset 5, -12 + 11100 .cfi_offset 6, -8 + 11101 .cfi_offset 14, -4 + 11102 0002 0500 movs r5, r0 + 11103 0004 0C00 movs r4, r1 +1638:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 11104 .loc 1 1638 3 is_stmt 1 view .LVU3402 + 11105 .LVL880: +1641:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 11106 .loc 1 1641 3 view .LVU3403 +1643:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** { + 11107 .loc 1 1643 3 view .LVU3404 + 11108 0006 0829 cmp r1, #8 + 11109 0008 3ED0 beq .L694 + 11110 000a 0BD8 bhi .L695 + 11111 000c 0029 cmp r1, #0 + 11112 000e 13D0 beq .L696 + 11113 0010 0429 cmp r1, #4 + 11114 0012 05D1 bne .L707 +1655:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** break; + 11115 .loc 1 1655 7 view .LVU3405 + 11116 0014 0268 ldr r2, [r0] + 11117 0016 D368 ldr r3, [r2, #12] + 11118 0018 0421 movs r1, #4 + ARM GAS /tmp/ccMtK8ce.s page 379 + + + 11119 .LVL881: +1655:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** break; + 11120 .loc 1 1655 7 is_stmt 0 view .LVU3406 + 11121 001a 8B43 bics r3, r1 + 11122 001c D360 str r3, [r2, #12] +1656:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** } + 11123 .loc 1 1656 7 is_stmt 1 view .LVU3407 +1678:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** { + 11124 .loc 1 1678 3 view .LVU3408 + 11125 001e 10E0 b .L700 + 11126 .LVL882: + 11127 .L707: +1643:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** { + 11128 .loc 1 1643 3 is_stmt 0 view .LVU3409 + 11129 0020 0120 movs r0, #1 + 11130 .LVL883: +1643:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** { + 11131 .loc 1 1643 3 view .LVU3410 + 11132 0022 30E0 b .L698 + 11133 .LVL884: + 11134 .L695: +1643:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** { + 11135 .loc 1 1643 3 view .LVU3411 + 11136 0024 0C29 cmp r1, #12 + 11137 0026 05D1 bne .L708 +1669:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** break; + 11138 .loc 1 1669 7 is_stmt 1 view .LVU3412 + 11139 0028 0268 ldr r2, [r0] + 11140 002a D368 ldr r3, [r2, #12] + 11141 002c 1021 movs r1, #16 + 11142 .LVL885: +1669:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** break; + 11143 .loc 1 1669 7 is_stmt 0 view .LVU3413 + 11144 002e 8B43 bics r3, r1 + 11145 0030 D360 str r3, [r2, #12] +1670:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** } + 11146 .loc 1 1670 7 is_stmt 1 view .LVU3414 +1678:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** { + 11147 .loc 1 1678 3 view .LVU3415 + 11148 0032 06E0 b .L700 + 11149 .LVL886: + 11150 .L708: +1643:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** { + 11151 .loc 1 1643 3 is_stmt 0 view .LVU3416 + 11152 0034 0120 movs r0, #1 + 11153 .LVL887: +1643:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** { + 11154 .loc 1 1643 3 view .LVU3417 + 11155 0036 26E0 b .L698 + 11156 .LVL888: + 11157 .L696: +1648:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** break; + 11158 .loc 1 1648 7 is_stmt 1 view .LVU3418 + 11159 0038 0268 ldr r2, [r0] + 11160 003a D368 ldr r3, [r2, #12] + 11161 003c 0221 movs r1, #2 + 11162 .LVL889: + ARM GAS /tmp/ccMtK8ce.s page 380 + + +1648:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** break; + 11163 .loc 1 1648 7 is_stmt 0 view .LVU3419 + 11164 003e 8B43 bics r3, r1 + 11165 0040 D360 str r3, [r2, #12] +1649:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** } + 11166 .loc 1 1649 7 is_stmt 1 view .LVU3420 +1678:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** { + 11167 .loc 1 1678 3 view .LVU3421 + 11168 .L700: +1681:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 11169 .loc 1 1681 5 view .LVU3422 + 11170 0042 2868 ldr r0, [r5] + 11171 .LVL890: +1681:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 11172 .loc 1 1681 5 is_stmt 0 view .LVU3423 + 11173 0044 0022 movs r2, #0 + 11174 0046 2100 movs r1, r4 + 11175 0048 FFF7FEFF bl TIM_CCxChannelCmd + 11176 .LVL891: +1683:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** { + 11177 .loc 1 1683 5 is_stmt 1 view .LVU3424 +1683:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** { + 11178 .loc 1 1683 9 is_stmt 0 view .LVU3425 + 11179 004c 2B68 ldr r3, [r5] + 11180 004e 214A ldr r2, .L711 + 11181 0050 9342 cmp r3, r2 + 11182 0052 1FD0 beq .L701 +1683:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** { + 11183 .loc 1 1683 9 discriminator 2 view .LVU3426 + 11184 0054 204A ldr r2, .L711+4 + 11185 0056 9342 cmp r3, r2 + 11186 0058 1CD0 beq .L701 +1683:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** { + 11187 .loc 1 1683 9 discriminator 4 view .LVU3427 + 11188 005a 204A ldr r2, .L711+8 + 11189 005c 9342 cmp r3, r2 + 11190 005e 19D0 beq .L701 + 11191 .L702: +1686:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** } + 11192 .loc 1 1686 7 is_stmt 1 discriminator 5 view .LVU3428 +1690:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 11193 .loc 1 1690 5 view .LVU3429 +1690:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 11194 .loc 1 1690 5 view .LVU3430 + 11195 0060 2B68 ldr r3, [r5] + 11196 0062 196A ldr r1, [r3, #32] + 11197 0064 1E4A ldr r2, .L711+12 + 11198 0066 1142 tst r1, r2 + 11199 0068 07D1 bne .L703 +1690:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 11200 .loc 1 1690 5 discriminator 1 view .LVU3431 + 11201 006a 196A ldr r1, [r3, #32] + 11202 006c 1D4A ldr r2, .L711+16 + 11203 006e 1142 tst r1, r2 + 11204 0070 03D1 bne .L703 +1690:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 11205 .loc 1 1690 5 discriminator 3 view .LVU3432 + ARM GAS /tmp/ccMtK8ce.s page 381 + + + 11206 0072 1A68 ldr r2, [r3] + 11207 0074 0121 movs r1, #1 + 11208 0076 8A43 bics r2, r1 + 11209 0078 1A60 str r2, [r3] + 11210 .L703: +1690:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 11211 .loc 1 1690 5 discriminator 5 view .LVU3433 +1693:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** } + 11212 .loc 1 1693 5 view .LVU3434 + 11213 007a 002C cmp r4, #0 + 11214 007c 17D1 bne .L704 +1693:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** } + 11215 .loc 1 1693 5 is_stmt 0 discriminator 1 view .LVU3435 + 11216 007e 3E23 movs r3, #62 + 11217 0080 0122 movs r2, #1 + 11218 0082 EA54 strb r2, [r5, r3] + 11219 0084 0020 movs r0, #0 + 11220 .L698: + 11221 .LVL892: +1697:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** } + 11222 .loc 1 1697 3 is_stmt 1 view .LVU3436 +1698:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 11223 .loc 1 1698 1 is_stmt 0 view .LVU3437 + 11224 @ sp needed + 11225 .LVL893: + 11226 .LVL894: +1698:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 11227 .loc 1 1698 1 view .LVU3438 + 11228 0086 70BD pop {r4, r5, r6, pc} + 11229 .LVL895: + 11230 .L694: +1662:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** break; + 11231 .loc 1 1662 7 is_stmt 1 view .LVU3439 + 11232 0088 0268 ldr r2, [r0] + 11233 008a D368 ldr r3, [r2, #12] + 11234 008c 0821 movs r1, #8 + 11235 .LVL896: +1662:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** break; + 11236 .loc 1 1662 7 is_stmt 0 view .LVU3440 + 11237 008e 8B43 bics r3, r1 + 11238 0090 D360 str r3, [r2, #12] +1663:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** } + 11239 .loc 1 1663 7 is_stmt 1 view .LVU3441 +1678:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** { + 11240 .loc 1 1678 3 view .LVU3442 + 11241 0092 D6E7 b .L700 + 11242 .LVL897: + 11243 .L701: +1686:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** } + 11244 .loc 1 1686 7 view .LVU3443 +1686:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** } + 11245 .loc 1 1686 7 view .LVU3444 + 11246 0094 196A ldr r1, [r3, #32] + 11247 0096 124A ldr r2, .L711+12 + 11248 0098 1142 tst r1, r2 + 11249 009a E1D1 bne .L702 +1686:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** } + ARM GAS /tmp/ccMtK8ce.s page 382 + + + 11250 .loc 1 1686 7 discriminator 1 view .LVU3445 + 11251 009c 196A ldr r1, [r3, #32] + 11252 009e 114A ldr r2, .L711+16 + 11253 00a0 1142 tst r1, r2 + 11254 00a2 DDD1 bne .L702 +1686:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** } + 11255 .loc 1 1686 7 discriminator 3 view .LVU3446 + 11256 00a4 5A6C ldr r2, [r3, #68] + 11257 00a6 1049 ldr r1, .L711+20 + 11258 00a8 0A40 ands r2, r1 + 11259 00aa 5A64 str r2, [r3, #68] + 11260 00ac D8E7 b .L702 + 11261 .L704: +1693:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** } + 11262 .loc 1 1693 5 is_stmt 0 discriminator 2 view .LVU3447 + 11263 00ae 042C cmp r4, #4 + 11264 00b0 06D0 beq .L709 +1693:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** } + 11265 .loc 1 1693 5 discriminator 4 view .LVU3448 + 11266 00b2 082C cmp r4, #8 + 11267 00b4 09D0 beq .L710 +1693:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** } + 11268 .loc 1 1693 5 discriminator 7 view .LVU3449 + 11269 00b6 4123 movs r3, #65 + 11270 00b8 0122 movs r2, #1 + 11271 00ba EA54 strb r2, [r5, r3] + 11272 00bc 0020 movs r0, #0 + 11273 00be E2E7 b .L698 + 11274 .L709: +1693:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** } + 11275 .loc 1 1693 5 discriminator 3 view .LVU3450 + 11276 00c0 3F23 movs r3, #63 + 11277 00c2 0122 movs r2, #1 + 11278 00c4 EA54 strb r2, [r5, r3] + 11279 00c6 0020 movs r0, #0 + 11280 00c8 DDE7 b .L698 + 11281 .L710: +1693:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** } + 11282 .loc 1 1693 5 discriminator 6 view .LVU3451 + 11283 00ca 4023 movs r3, #64 + 11284 00cc 0122 movs r2, #1 + 11285 00ce EA54 strb r2, [r5, r3] + 11286 00d0 0020 movs r0, #0 + 11287 00d2 D8E7 b .L698 + 11288 .L712: + 11289 .align 2 + 11290 .L711: + 11291 00d4 002C0140 .word 1073818624 + 11292 00d8 00440140 .word 1073824768 + 11293 00dc 00480140 .word 1073825792 + 11294 00e0 11110000 .word 4369 + 11295 00e4 44040000 .word 1092 + 11296 00e8 FF7FFFFF .word -32769 + 11297 .cfi_endproc + 11298 .LFE67: + 11300 .section .text.HAL_TIM_PWM_Start_DMA,"ax",%progbits + 11301 .align 1 + ARM GAS /tmp/ccMtK8ce.s page 383 + + + 11302 .global HAL_TIM_PWM_Start_DMA + 11303 .syntax unified + 11304 .code 16 + 11305 .thumb_func + 11307 HAL_TIM_PWM_Start_DMA: + 11308 .LVL898: + 11309 .LFB68: +1715:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** HAL_StatusTypeDef status = HAL_OK; + 11310 .loc 1 1715 1 is_stmt 1 view -0 + 11311 .cfi_startproc + 11312 @ args = 0, pretend = 0, frame = 0 + 11313 @ frame_needed = 0, uses_anonymous_args = 0 +1715:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** HAL_StatusTypeDef status = HAL_OK; + 11314 .loc 1 1715 1 is_stmt 0 view .LVU3453 + 11315 0000 70B5 push {r4, r5, r6, lr} + 11316 .cfi_def_cfa_offset 16 + 11317 .cfi_offset 4, -16 + 11318 .cfi_offset 5, -12 + 11319 .cfi_offset 6, -8 + 11320 .cfi_offset 14, -4 + 11321 0002 0600 movs r6, r0 + 11322 0004 0D00 movs r5, r1 + 11323 0006 1100 movs r1, r2 + 11324 .LVL899: +1716:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** uint32_t tmpsmcr; + 11325 .loc 1 1716 3 is_stmt 1 view .LVU3454 +1717:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 11326 .loc 1 1717 3 view .LVU3455 +1720:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 11327 .loc 1 1720 3 view .LVU3456 +1723:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** { + 11328 .loc 1 1723 3 view .LVU3457 +1723:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** { + 11329 .loc 1 1723 44 is_stmt 0 view .LVU3458 + 11330 0008 002D cmp r5, #0 + 11331 000a 5DD1 bne .L714 +1723:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** { + 11332 .loc 1 1723 7 discriminator 1 view .LVU3459 + 11333 000c 3E22 movs r2, #62 + 11334 .LVL900: +1723:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** { + 11335 .loc 1 1723 7 discriminator 1 view .LVU3460 + 11336 000e 845C ldrb r4, [r0, r2] +1723:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** { + 11337 .loc 1 1723 44 discriminator 1 view .LVU3461 + 11338 0010 023C subs r4, r4, #2 + 11339 0012 6242 rsbs r2, r4, #0 + 11340 0014 5441 adcs r4, r4, r2 + 11341 0016 E4B2 uxtb r4, r4 + 11342 .L715: +1723:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** { + 11343 .loc 1 1723 6 discriminator 12 view .LVU3462 + 11344 0018 002C cmp r4, #0 + 11345 001a 00D0 beq .LCB10181 + 11346 001c F0E0 b .L736 @long jump + 11347 .LCB10181: +1727:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** { + ARM GAS /tmp/ccMtK8ce.s page 384 + + + 11348 .loc 1 1727 8 is_stmt 1 view .LVU3463 +1727:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** { + 11349 .loc 1 1727 49 is_stmt 0 view .LVU3464 + 11350 001e 002D cmp r5, #0 + 11351 0020 6BD1 bne .L719 +1727:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** { + 11352 .loc 1 1727 12 discriminator 1 view .LVU3465 + 11353 0022 3E22 movs r2, #62 + 11354 0024 B25C ldrb r2, [r6, r2] +1727:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** { + 11355 .loc 1 1727 49 discriminator 1 view .LVU3466 + 11356 0026 013A subs r2, r2, #1 + 11357 0028 5042 rsbs r0, r2, #0 + 11358 002a 4241 adcs r2, r2, r0 + 11359 .LVL901: +1727:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** { + 11360 .loc 1 1727 49 discriminator 1 view .LVU3467 + 11361 002c D2B2 uxtb r2, r2 + 11362 .L720: +1727:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** { + 11363 .loc 1 1727 11 discriminator 12 view .LVU3468 + 11364 002e 002A cmp r2, #0 + 11365 0030 00D1 bne .LCB10195 + 11366 0032 E7E0 b .L737 @long jump + 11367 .LCB10195: +1729:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** { + 11368 .loc 1 1729 5 is_stmt 1 view .LVU3469 +1729:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** { + 11369 .loc 1 1729 8 is_stmt 0 view .LVU3470 + 11370 0034 0029 cmp r1, #0 + 11371 0036 00D1 bne .LCB10198 + 11372 0038 E6E0 b .L738 @long jump + 11373 .LCB10198: +1729:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** { + 11374 .loc 1 1729 25 discriminator 1 view .LVU3471 + 11375 003a 002B cmp r3, #0 + 11376 003c 00D1 bne .LCB10200 + 11377 003e E5E0 b .L739 @long jump + 11378 .LCB10200: +1735:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** } + 11379 .loc 1 1735 7 is_stmt 1 view .LVU3472 + 11380 0040 002D cmp r5, #0 + 11381 0042 73D1 bne .L723 +1735:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** } + 11382 .loc 1 1735 7 is_stmt 0 discriminator 1 view .LVU3473 + 11383 0044 3E22 movs r2, #62 + 11384 0046 0220 movs r0, #2 + 11385 0048 B054 strb r0, [r6, r2] +1743:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** { + 11386 .loc 1 1743 3 is_stmt 1 view .LVU3474 + 11387 .L724: +1748:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** htim->hdma[TIM_DMA_ID_CC1]->XferHalfCpltCallback = TIM_DMADelayPulseHalfCplt; + 11388 .loc 1 1748 7 view .LVU3475 +1748:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** htim->hdma[TIM_DMA_ID_CC1]->XferHalfCpltCallback = TIM_DMADelayPulseHalfCplt; + 11389 .loc 1 1748 17 is_stmt 0 view .LVU3476 + 11390 004a 726A ldr r2, [r6, #36] +1748:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** htim->hdma[TIM_DMA_ID_CC1]->XferHalfCpltCallback = TIM_DMADelayPulseHalfCplt; + ARM GAS /tmp/ccMtK8ce.s page 385 + + + 11391 .loc 1 1748 52 view .LVU3477 + 11392 004c 7548 ldr r0, .L752 + 11393 004e 9062 str r0, [r2, #40] +1749:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 11394 .loc 1 1749 7 is_stmt 1 view .LVU3478 +1749:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 11395 .loc 1 1749 17 is_stmt 0 view .LVU3479 + 11396 0050 726A ldr r2, [r6, #36] +1749:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 11397 .loc 1 1749 56 view .LVU3480 + 11398 0052 7548 ldr r0, .L752+4 + 11399 0054 D062 str r0, [r2, #44] +1752:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 11400 .loc 1 1752 7 is_stmt 1 view .LVU3481 +1752:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 11401 .loc 1 1752 17 is_stmt 0 view .LVU3482 + 11402 0056 726A ldr r2, [r6, #36] +1752:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 11403 .loc 1 1752 53 view .LVU3483 + 11404 0058 7448 ldr r0, .L752+8 + 11405 005a 1063 str r0, [r2, #48] +1755:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** Length) != HAL_OK) + 11406 .loc 1 1755 7 is_stmt 1 view .LVU3484 +1755:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** Length) != HAL_OK) + 11407 .loc 1 1755 88 is_stmt 0 view .LVU3485 + 11408 005c 3268 ldr r2, [r6] +1755:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** Length) != HAL_OK) + 11409 .loc 1 1755 83 view .LVU3486 + 11410 005e 3432 adds r2, r2, #52 +1755:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** Length) != HAL_OK) + 11411 .loc 1 1755 11 view .LVU3487 + 11412 0060 706A ldr r0, [r6, #36] + 11413 0062 FFF7FEFF bl HAL_DMA_Start_IT + 11414 .LVL902: +1755:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** Length) != HAL_OK) + 11415 .loc 1 1755 10 discriminator 1 view .LVU3488 + 11416 0066 0028 cmp r0, #0 + 11417 0068 00D0 beq .LCB10232 + 11418 006a D1E0 b .L740 @long jump + 11419 .LCB10232: +1763:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** break; + 11420 .loc 1 1763 7 is_stmt 1 view .LVU3489 + 11421 006c 3268 ldr r2, [r6] + 11422 006e D168 ldr r1, [r2, #12] + 11423 0070 8023 movs r3, #128 + 11424 0072 9B00 lsls r3, r3, #2 + 11425 0074 0B43 orrs r3, r1 + 11426 0076 D360 str r3, [r2, #12] +1764:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** } + 11427 .loc 1 1764 7 view .LVU3490 +1835:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** { + 11428 .loc 1 1835 3 view .LVU3491 + 11429 .L731: +1838:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 11430 .loc 1 1838 5 view .LVU3492 + 11431 0078 3068 ldr r0, [r6] + 11432 007a 0122 movs r2, #1 + ARM GAS /tmp/ccMtK8ce.s page 386 + + + 11433 007c 2900 movs r1, r5 + 11434 007e FFF7FEFF bl TIM_CCxChannelCmd + 11435 .LVL903: +1840:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** { + 11436 .loc 1 1840 5 view .LVU3493 +1840:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** { + 11437 .loc 1 1840 9 is_stmt 0 view .LVU3494 + 11438 0082 3368 ldr r3, [r6] + 11439 0084 6A4A ldr r2, .L752+12 + 11440 0086 9342 cmp r3, r2 + 11441 0088 05D0 beq .L732 +1840:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** { + 11442 .loc 1 1840 9 discriminator 2 view .LVU3495 + 11443 008a 6A4A ldr r2, .L752+16 + 11444 008c 9342 cmp r3, r2 + 11445 008e 02D0 beq .L732 +1840:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** { + 11446 .loc 1 1840 9 discriminator 4 view .LVU3496 + 11447 0090 694A ldr r2, .L752+20 + 11448 0092 9342 cmp r3, r2 + 11449 0094 04D1 bne .L733 + 11450 .L732: +1843:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** } + 11451 .loc 1 1843 7 is_stmt 1 view .LVU3497 + 11452 0096 596C ldr r1, [r3, #68] + 11453 0098 8022 movs r2, #128 + 11454 009a 1202 lsls r2, r2, #8 + 11455 009c 0A43 orrs r2, r1 + 11456 009e 5A64 str r2, [r3, #68] + 11457 .L733: +1847:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** { + 11458 .loc 1 1847 5 view .LVU3498 +1847:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** { + 11459 .loc 1 1847 9 is_stmt 0 view .LVU3499 + 11460 00a0 3368 ldr r3, [r6] +1847:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** { + 11461 .loc 1 1847 8 view .LVU3500 + 11462 00a2 634A ldr r2, .L752+12 + 11463 00a4 9342 cmp r3, r2 + 11464 00a6 00D1 bne .LCB10275 + 11465 00a8 9FE0 b .L734 @long jump + 11466 .LCB10275: +1847:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** { + 11467 .loc 1 1847 9 discriminator 1 view .LVU3501 + 11468 00aa 8022 movs r2, #128 + 11469 00ac D205 lsls r2, r2, #23 + 11470 00ae 9342 cmp r3, r2 + 11471 00b0 00D1 bne .LCB10279 + 11472 00b2 9AE0 b .L734 @long jump + 11473 .LCB10279: +1847:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** { + 11474 .loc 1 1847 9 discriminator 2 view .LVU3502 + 11475 00b4 614A ldr r2, .L752+24 + 11476 00b6 9342 cmp r3, r2 + 11477 00b8 00D1 bne .LCB10282 + 11478 00ba 96E0 b .L734 @long jump + 11479 .LCB10282: + ARM GAS /tmp/ccMtK8ce.s page 387 + + +1857:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** } + 11480 .loc 1 1857 7 is_stmt 1 view .LVU3503 + 11481 00bc 1A68 ldr r2, [r3] + 11482 00be 0121 movs r1, #1 + 11483 00c0 0A43 orrs r2, r1 + 11484 00c2 1A60 str r2, [r3] + 11485 00c4 0020 movs r0, #0 + 11486 00c6 9EE0 b .L718 + 11487 .LVL904: + 11488 .L714: +1723:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** { + 11489 .loc 1 1723 44 is_stmt 0 discriminator 2 view .LVU3504 + 11490 00c8 042D cmp r5, #4 + 11491 00ca 08D0 beq .L745 +1723:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** { + 11492 .loc 1 1723 44 discriminator 5 view .LVU3505 + 11493 00cc 082D cmp r5, #8 + 11494 00ce 0DD0 beq .L746 +1723:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** { + 11495 .loc 1 1723 7 discriminator 8 view .LVU3506 + 11496 00d0 4122 movs r2, #65 + 11497 00d2 845C ldrb r4, [r0, r2] +1723:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** { + 11498 .loc 1 1723 44 discriminator 8 view .LVU3507 + 11499 00d4 023C subs r4, r4, #2 + 11500 00d6 6242 rsbs r2, r4, #0 + 11501 00d8 5441 adcs r4, r4, r2 + 11502 00da E4B2 uxtb r4, r4 + 11503 00dc 9CE7 b .L715 + 11504 .L745: +1723:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** { + 11505 .loc 1 1723 7 discriminator 4 view .LVU3508 + 11506 00de 3F22 movs r2, #63 + 11507 00e0 845C ldrb r4, [r0, r2] +1723:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** { + 11508 .loc 1 1723 44 discriminator 4 view .LVU3509 + 11509 00e2 023C subs r4, r4, #2 + 11510 00e4 6242 rsbs r2, r4, #0 + 11511 00e6 5441 adcs r4, r4, r2 + 11512 00e8 E4B2 uxtb r4, r4 + 11513 00ea 95E7 b .L715 + 11514 .L746: +1723:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** { + 11515 .loc 1 1723 7 discriminator 7 view .LVU3510 + 11516 00ec 4022 movs r2, #64 + 11517 00ee 845C ldrb r4, [r0, r2] +1723:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** { + 11518 .loc 1 1723 44 discriminator 7 view .LVU3511 + 11519 00f0 023C subs r4, r4, #2 + 11520 00f2 6242 rsbs r2, r4, #0 + 11521 00f4 5441 adcs r4, r4, r2 + 11522 00f6 E4B2 uxtb r4, r4 + 11523 00f8 8EE7 b .L715 + 11524 .L719: +1727:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** { + 11525 .loc 1 1727 49 discriminator 2 view .LVU3512 + 11526 00fa 042D cmp r5, #4 + ARM GAS /tmp/ccMtK8ce.s page 388 + + + 11527 00fc 08D0 beq .L747 +1727:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** { + 11528 .loc 1 1727 49 discriminator 5 view .LVU3513 + 11529 00fe 082D cmp r5, #8 + 11530 0100 0DD0 beq .L748 +1727:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** { + 11531 .loc 1 1727 12 discriminator 8 view .LVU3514 + 11532 0102 4122 movs r2, #65 + 11533 0104 B25C ldrb r2, [r6, r2] +1727:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** { + 11534 .loc 1 1727 49 discriminator 8 view .LVU3515 + 11535 0106 013A subs r2, r2, #1 + 11536 0108 5042 rsbs r0, r2, #0 + 11537 010a 4241 adcs r2, r2, r0 + 11538 .LVL905: +1727:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** { + 11539 .loc 1 1727 49 discriminator 8 view .LVU3516 + 11540 010c D2B2 uxtb r2, r2 + 11541 010e 8EE7 b .L720 + 11542 .LVL906: + 11543 .L747: +1727:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** { + 11544 .loc 1 1727 12 discriminator 4 view .LVU3517 + 11545 0110 3F22 movs r2, #63 + 11546 0112 B25C ldrb r2, [r6, r2] +1727:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** { + 11547 .loc 1 1727 49 discriminator 4 view .LVU3518 + 11548 0114 013A subs r2, r2, #1 + 11549 0116 5042 rsbs r0, r2, #0 + 11550 0118 4241 adcs r2, r2, r0 + 11551 .LVL907: +1727:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** { + 11552 .loc 1 1727 49 discriminator 4 view .LVU3519 + 11553 011a D2B2 uxtb r2, r2 + 11554 011c 87E7 b .L720 + 11555 .LVL908: + 11556 .L748: +1727:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** { + 11557 .loc 1 1727 12 discriminator 7 view .LVU3520 + 11558 011e 4022 movs r2, #64 + 11559 0120 B25C ldrb r2, [r6, r2] +1727:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** { + 11560 .loc 1 1727 49 discriminator 7 view .LVU3521 + 11561 0122 013A subs r2, r2, #1 + 11562 0124 5042 rsbs r0, r2, #0 + 11563 0126 4241 adcs r2, r2, r0 + 11564 .LVL909: +1727:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** { + 11565 .loc 1 1727 49 discriminator 7 view .LVU3522 + 11566 0128 D2B2 uxtb r2, r2 + 11567 012a 80E7 b .L720 + 11568 .L723: +1735:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** } + 11569 .loc 1 1735 7 discriminator 2 view .LVU3523 + 11570 012c 042D cmp r5, #4 + 11571 012e 0DD0 beq .L749 +1735:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** } + ARM GAS /tmp/ccMtK8ce.s page 389 + + + 11572 .loc 1 1735 7 discriminator 4 view .LVU3524 + 11573 0130 082D cmp r5, #8 + 11574 0132 25D0 beq .L750 +1735:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** } + 11575 .loc 1 1735 7 discriminator 7 view .LVU3525 + 11576 0134 4122 movs r2, #65 + 11577 0136 0220 movs r0, #2 + 11578 0138 B054 strb r0, [r6, r2] +1743:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** { + 11579 .loc 1 1743 3 is_stmt 1 view .LVU3526 + 11580 013a 082D cmp r5, #8 + 11581 013c 23D0 beq .L728 + 11582 013e 39D8 bhi .L729 + 11583 0140 002D cmp r5, #0 + 11584 0142 82D0 beq .L724 + 11585 0144 042D cmp r5, #4 + 11586 0146 04D0 beq .L726 + 11587 0148 0138 subs r0, r0, #1 + 11588 014a 5CE0 b .L718 + 11589 .L749: +1735:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** } + 11590 .loc 1 1735 7 is_stmt 0 discriminator 3 view .LVU3527 + 11591 014c 3F22 movs r2, #63 + 11592 014e 0220 movs r0, #2 + 11593 0150 B054 strb r0, [r6, r2] +1743:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** { + 11594 .loc 1 1743 3 is_stmt 1 view .LVU3528 + 11595 .L726: +1770:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** htim->hdma[TIM_DMA_ID_CC2]->XferHalfCpltCallback = TIM_DMADelayPulseHalfCplt; + 11596 .loc 1 1770 7 view .LVU3529 +1770:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** htim->hdma[TIM_DMA_ID_CC2]->XferHalfCpltCallback = TIM_DMADelayPulseHalfCplt; + 11597 .loc 1 1770 17 is_stmt 0 view .LVU3530 + 11598 0152 B26A ldr r2, [r6, #40] +1770:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** htim->hdma[TIM_DMA_ID_CC2]->XferHalfCpltCallback = TIM_DMADelayPulseHalfCplt; + 11599 .loc 1 1770 52 view .LVU3531 + 11600 0154 3348 ldr r0, .L752 + 11601 0156 9062 str r0, [r2, #40] +1771:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 11602 .loc 1 1771 7 is_stmt 1 view .LVU3532 +1771:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 11603 .loc 1 1771 17 is_stmt 0 view .LVU3533 + 11604 0158 B26A ldr r2, [r6, #40] +1771:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 11605 .loc 1 1771 56 view .LVU3534 + 11606 015a 3348 ldr r0, .L752+4 + 11607 015c D062 str r0, [r2, #44] +1774:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 11608 .loc 1 1774 7 is_stmt 1 view .LVU3535 +1774:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 11609 .loc 1 1774 17 is_stmt 0 view .LVU3536 + 11610 015e B26A ldr r2, [r6, #40] +1774:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 11611 .loc 1 1774 53 view .LVU3537 + 11612 0160 3248 ldr r0, .L752+8 + 11613 0162 1063 str r0, [r2, #48] +1777:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** Length) != HAL_OK) + 11614 .loc 1 1777 7 is_stmt 1 view .LVU3538 + ARM GAS /tmp/ccMtK8ce.s page 390 + + +1777:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** Length) != HAL_OK) + 11615 .loc 1 1777 88 is_stmt 0 view .LVU3539 + 11616 0164 3268 ldr r2, [r6] +1777:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** Length) != HAL_OK) + 11617 .loc 1 1777 83 view .LVU3540 + 11618 0166 3832 adds r2, r2, #56 +1777:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** Length) != HAL_OK) + 11619 .loc 1 1777 11 view .LVU3541 + 11620 0168 B06A ldr r0, [r6, #40] + 11621 016a FFF7FEFF bl HAL_DMA_Start_IT + 11622 .LVL910: +1777:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** Length) != HAL_OK) + 11623 .loc 1 1777 10 discriminator 1 view .LVU3542 + 11624 016e 0028 cmp r0, #0 + 11625 0170 50D1 bne .L741 +1784:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** break; + 11626 .loc 1 1784 7 is_stmt 1 view .LVU3543 + 11627 0172 3268 ldr r2, [r6] + 11628 0174 D168 ldr r1, [r2, #12] + 11629 0176 8023 movs r3, #128 + 11630 0178 DB00 lsls r3, r3, #3 + 11631 017a 0B43 orrs r3, r1 + 11632 017c D360 str r3, [r2, #12] +1785:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** } + 11633 .loc 1 1785 7 view .LVU3544 +1835:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** { + 11634 .loc 1 1835 3 view .LVU3545 + 11635 017e 7BE7 b .L731 + 11636 .LVL911: + 11637 .L750: +1735:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** } + 11638 .loc 1 1735 7 is_stmt 0 discriminator 6 view .LVU3546 + 11639 0180 4022 movs r2, #64 + 11640 0182 0220 movs r0, #2 + 11641 0184 B054 strb r0, [r6, r2] +1743:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** { + 11642 .loc 1 1743 3 is_stmt 1 view .LVU3547 + 11643 .L728: +1791:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** htim->hdma[TIM_DMA_ID_CC3]->XferHalfCpltCallback = TIM_DMADelayPulseHalfCplt; + 11644 .loc 1 1791 7 view .LVU3548 +1791:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** htim->hdma[TIM_DMA_ID_CC3]->XferHalfCpltCallback = TIM_DMADelayPulseHalfCplt; + 11645 .loc 1 1791 17 is_stmt 0 view .LVU3549 + 11646 0186 F26A ldr r2, [r6, #44] +1791:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** htim->hdma[TIM_DMA_ID_CC3]->XferHalfCpltCallback = TIM_DMADelayPulseHalfCplt; + 11647 .loc 1 1791 52 view .LVU3550 + 11648 0188 2648 ldr r0, .L752 + 11649 018a 9062 str r0, [r2, #40] +1792:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 11650 .loc 1 1792 7 is_stmt 1 view .LVU3551 +1792:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 11651 .loc 1 1792 17 is_stmt 0 view .LVU3552 + 11652 018c F26A ldr r2, [r6, #44] +1792:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 11653 .loc 1 1792 56 view .LVU3553 + 11654 018e 2648 ldr r0, .L752+4 + 11655 0190 D062 str r0, [r2, #44] +1795:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + ARM GAS /tmp/ccMtK8ce.s page 391 + + + 11656 .loc 1 1795 7 is_stmt 1 view .LVU3554 +1795:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 11657 .loc 1 1795 17 is_stmt 0 view .LVU3555 + 11658 0192 F26A ldr r2, [r6, #44] +1795:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 11659 .loc 1 1795 53 view .LVU3556 + 11660 0194 2548 ldr r0, .L752+8 + 11661 0196 1063 str r0, [r2, #48] +1798:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** Length) != HAL_OK) + 11662 .loc 1 1798 7 is_stmt 1 view .LVU3557 +1798:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** Length) != HAL_OK) + 11663 .loc 1 1798 88 is_stmt 0 view .LVU3558 + 11664 0198 3268 ldr r2, [r6] +1798:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** Length) != HAL_OK) + 11665 .loc 1 1798 83 view .LVU3559 + 11666 019a 3C32 adds r2, r2, #60 +1798:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** Length) != HAL_OK) + 11667 .loc 1 1798 11 view .LVU3560 + 11668 019c F06A ldr r0, [r6, #44] + 11669 019e FFF7FEFF bl HAL_DMA_Start_IT + 11670 .LVL912: +1798:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** Length) != HAL_OK) + 11671 .loc 1 1798 10 discriminator 1 view .LVU3561 + 11672 01a2 0028 cmp r0, #0 + 11673 01a4 38D1 bne .L742 +1805:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** break; + 11674 .loc 1 1805 7 is_stmt 1 view .LVU3562 + 11675 01a6 3268 ldr r2, [r6] + 11676 01a8 D168 ldr r1, [r2, #12] + 11677 01aa 8023 movs r3, #128 + 11678 01ac 1B01 lsls r3, r3, #4 + 11679 01ae 0B43 orrs r3, r1 + 11680 01b0 D360 str r3, [r2, #12] +1806:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** } + 11681 .loc 1 1806 7 view .LVU3563 +1835:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** { + 11682 .loc 1 1835 3 view .LVU3564 + 11683 01b2 61E7 b .L731 + 11684 .LVL913: + 11685 .L729: +1743:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** { + 11686 .loc 1 1743 3 is_stmt 0 view .LVU3565 + 11687 01b4 0C2D cmp r5, #12 + 11688 01b6 16D1 bne .L751 +1812:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** htim->hdma[TIM_DMA_ID_CC4]->XferHalfCpltCallback = TIM_DMADelayPulseHalfCplt; + 11689 .loc 1 1812 7 is_stmt 1 view .LVU3566 +1812:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** htim->hdma[TIM_DMA_ID_CC4]->XferHalfCpltCallback = TIM_DMADelayPulseHalfCplt; + 11690 .loc 1 1812 17 is_stmt 0 view .LVU3567 + 11691 01b8 326B ldr r2, [r6, #48] +1812:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** htim->hdma[TIM_DMA_ID_CC4]->XferHalfCpltCallback = TIM_DMADelayPulseHalfCplt; + 11692 .loc 1 1812 52 view .LVU3568 + 11693 01ba 1A48 ldr r0, .L752 + 11694 01bc 9062 str r0, [r2, #40] +1813:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 11695 .loc 1 1813 7 is_stmt 1 view .LVU3569 +1813:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 11696 .loc 1 1813 17 is_stmt 0 view .LVU3570 + ARM GAS /tmp/ccMtK8ce.s page 392 + + + 11697 01be 326B ldr r2, [r6, #48] +1813:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 11698 .loc 1 1813 56 view .LVU3571 + 11699 01c0 1948 ldr r0, .L752+4 + 11700 01c2 D062 str r0, [r2, #44] +1816:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 11701 .loc 1 1816 7 is_stmt 1 view .LVU3572 +1816:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 11702 .loc 1 1816 17 is_stmt 0 view .LVU3573 + 11703 01c4 326B ldr r2, [r6, #48] +1816:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 11704 .loc 1 1816 53 view .LVU3574 + 11705 01c6 1948 ldr r0, .L752+8 + 11706 01c8 1063 str r0, [r2, #48] +1819:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** Length) != HAL_OK) + 11707 .loc 1 1819 7 is_stmt 1 view .LVU3575 +1819:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** Length) != HAL_OK) + 11708 .loc 1 1819 88 is_stmt 0 view .LVU3576 + 11709 01ca 3268 ldr r2, [r6] +1819:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** Length) != HAL_OK) + 11710 .loc 1 1819 83 view .LVU3577 + 11711 01cc 4032 adds r2, r2, #64 +1819:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** Length) != HAL_OK) + 11712 .loc 1 1819 11 view .LVU3578 + 11713 01ce 306B ldr r0, [r6, #48] + 11714 01d0 FFF7FEFF bl HAL_DMA_Start_IT + 11715 .LVL914: +1819:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** Length) != HAL_OK) + 11716 .loc 1 1819 10 discriminator 1 view .LVU3579 + 11717 01d4 0028 cmp r0, #0 + 11718 01d6 21D1 bne .L743 +1826:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** break; + 11719 .loc 1 1826 7 is_stmt 1 view .LVU3580 + 11720 01d8 3268 ldr r2, [r6] + 11721 01da D168 ldr r1, [r2, #12] + 11722 01dc 8023 movs r3, #128 + 11723 01de 5B01 lsls r3, r3, #5 + 11724 01e0 0B43 orrs r3, r1 + 11725 01e2 D360 str r3, [r2, #12] +1827:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** } + 11726 .loc 1 1827 7 view .LVU3581 +1835:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** { + 11727 .loc 1 1835 3 view .LVU3582 + 11728 01e4 48E7 b .L731 + 11729 .LVL915: + 11730 .L751: +1743:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** { + 11731 .loc 1 1743 3 is_stmt 0 view .LVU3583 + 11732 01e6 0120 movs r0, #1 + 11733 01e8 0DE0 b .L718 + 11734 .LVL916: + 11735 .L734: +1849:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** if (!IS_TIM_SLAVEMODE_TRIGGER_ENABLED(tmpsmcr)) + 11736 .loc 1 1849 7 is_stmt 1 view .LVU3584 +1849:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** if (!IS_TIM_SLAVEMODE_TRIGGER_ENABLED(tmpsmcr)) + 11737 .loc 1 1849 31 is_stmt 0 view .LVU3585 + 11738 01ea 9968 ldr r1, [r3, #8] + ARM GAS /tmp/ccMtK8ce.s page 393 + + +1849:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** if (!IS_TIM_SLAVEMODE_TRIGGER_ENABLED(tmpsmcr)) + 11739 .loc 1 1849 15 view .LVU3586 + 11740 01ec 0722 movs r2, #7 + 11741 01ee 0A40 ands r2, r1 + 11742 .LVL917: +1850:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** { + 11743 .loc 1 1850 7 is_stmt 1 view .LVU3587 +1850:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** { + 11744 .loc 1 1850 10 is_stmt 0 view .LVU3588 + 11745 01f0 062A cmp r2, #6 + 11746 01f2 15D0 beq .L744 +1852:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** } + 11747 .loc 1 1852 9 is_stmt 1 view .LVU3589 + 11748 01f4 1A68 ldr r2, [r3] + 11749 .LVL918: +1852:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** } + 11750 .loc 1 1852 9 is_stmt 0 view .LVU3590 + 11751 01f6 0121 movs r1, #1 + 11752 .LVL919: +1852:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** } + 11753 .loc 1 1852 9 view .LVU3591 + 11754 01f8 0A43 orrs r2, r1 + 11755 01fa 1A60 str r2, [r3] + 11756 01fc 0020 movs r0, #0 + 11757 01fe 02E0 b .L718 + 11758 .LVL920: + 11759 .L736: +1725:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** } + 11760 .loc 1 1725 12 view .LVU3592 + 11761 0200 0220 movs r0, #2 + 11762 .LVL921: +1725:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** } + 11763 .loc 1 1725 12 view .LVU3593 + 11764 0202 00E0 b .L718 + 11765 .L737: +1740:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** } + 11766 .loc 1 1740 12 view .LVU3594 + 11767 0204 0120 movs r0, #1 + 11768 .LVL922: + 11769 .L718: +1863:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 11770 .loc 1 1863 1 view .LVU3595 + 11771 @ sp needed + 11772 .LVL923: + 11773 .LVL924: +1863:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 11774 .loc 1 1863 1 view .LVU3596 + 11775 0206 70BD pop {r4, r5, r6, pc} + 11776 .LVL925: + 11777 .L738: +1731:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** } + 11778 .loc 1 1731 14 view .LVU3597 + 11779 0208 0120 movs r0, #1 + 11780 020a FCE7 b .L718 + 11781 .L739: + 11782 020c 0120 movs r0, #1 + 11783 020e FAE7 b .L718 + ARM GAS /tmp/ccMtK8ce.s page 394 + + + 11784 .LVL926: + 11785 .L740: +1759:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** } + 11786 .loc 1 1759 16 view .LVU3598 + 11787 0210 0120 movs r0, #1 + 11788 0212 F8E7 b .L718 + 11789 .L741: +1781:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** } + 11790 .loc 1 1781 16 view .LVU3599 + 11791 0214 0120 movs r0, #1 + 11792 0216 F6E7 b .L718 + 11793 .L742: +1802:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** } + 11794 .loc 1 1802 16 view .LVU3600 + 11795 0218 0120 movs r0, #1 + 11796 021a F4E7 b .L718 + 11797 .L743: +1823:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** } + 11798 .loc 1 1823 16 view .LVU3601 + 11799 021c 0120 movs r0, #1 + 11800 021e F2E7 b .L718 + 11801 .LVL927: + 11802 .L744: +1823:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** } + 11803 .loc 1 1823 16 view .LVU3602 + 11804 0220 0020 movs r0, #0 + 11805 0222 F0E7 b .L718 + 11806 .L753: + 11807 .align 2 + 11808 .L752: + 11809 0224 00000000 .word TIM_DMADelayPulseCplt + 11810 0228 00000000 .word TIM_DMADelayPulseHalfCplt + 11811 022c 00000000 .word TIM_DMAError + 11812 0230 002C0140 .word 1073818624 + 11813 0234 00440140 .word 1073824768 + 11814 0238 00480140 .word 1073825792 + 11815 023c 00040040 .word 1073742848 + 11816 .cfi_endproc + 11817 .LFE68: + 11819 .section .text.HAL_TIM_PWM_Stop_DMA,"ax",%progbits + 11820 .align 1 + 11821 .global HAL_TIM_PWM_Stop_DMA + 11822 .syntax unified + 11823 .code 16 + 11824 .thumb_func + 11826 HAL_TIM_PWM_Stop_DMA: + 11827 .LVL928: + 11828 .LFB69: +1877:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** HAL_StatusTypeDef status = HAL_OK; + 11829 .loc 1 1877 1 is_stmt 1 view -0 + 11830 .cfi_startproc + 11831 @ args = 0, pretend = 0, frame = 0 + 11832 @ frame_needed = 0, uses_anonymous_args = 0 +1877:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** HAL_StatusTypeDef status = HAL_OK; + 11833 .loc 1 1877 1 is_stmt 0 view .LVU3604 + 11834 0000 70B5 push {r4, r5, r6, lr} + 11835 .cfi_def_cfa_offset 16 + ARM GAS /tmp/ccMtK8ce.s page 395 + + + 11836 .cfi_offset 4, -16 + 11837 .cfi_offset 5, -12 + 11838 .cfi_offset 6, -8 + 11839 .cfi_offset 14, -4 + 11840 0002 0500 movs r5, r0 + 11841 0004 0C00 movs r4, r1 +1878:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 11842 .loc 1 1878 3 is_stmt 1 view .LVU3605 + 11843 .LVL929: +1881:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 11844 .loc 1 1881 3 view .LVU3606 +1883:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** { + 11845 .loc 1 1883 3 view .LVU3607 + 11846 0006 0829 cmp r1, #8 + 11847 0008 47D0 beq .L755 + 11848 000a 0ED8 bhi .L756 + 11849 000c 0029 cmp r1, #0 + 11850 000e 19D0 beq .L757 + 11851 0010 0429 cmp r1, #4 + 11852 0012 08D1 bne .L768 +1896:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** (void)HAL_DMA_Abort_IT(htim->hdma[TIM_DMA_ID_CC2]); + 11853 .loc 1 1896 7 view .LVU3608 + 11854 0014 0268 ldr r2, [r0] + 11855 0016 D368 ldr r3, [r2, #12] + 11856 0018 3449 ldr r1, .L772 + 11857 .LVL930: +1896:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** (void)HAL_DMA_Abort_IT(htim->hdma[TIM_DMA_ID_CC2]); + 11858 .loc 1 1896 7 is_stmt 0 view .LVU3609 + 11859 001a 0B40 ands r3, r1 + 11860 001c D360 str r3, [r2, #12] +1897:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** break; + 11861 .loc 1 1897 7 is_stmt 1 view .LVU3610 +1897:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** break; + 11862 .loc 1 1897 13 is_stmt 0 view .LVU3611 + 11863 001e 806A ldr r0, [r0, #40] + 11864 .LVL931: +1897:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** break; + 11865 .loc 1 1897 13 view .LVU3612 + 11866 0020 FFF7FEFF bl HAL_DMA_Abort_IT + 11867 .LVL932: +1898:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** } + 11868 .loc 1 1898 7 is_stmt 1 view .LVU3613 +1922:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** { + 11869 .loc 1 1922 3 view .LVU3614 + 11870 0024 16E0 b .L761 + 11871 .LVL933: + 11872 .L768: +1883:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** { + 11873 .loc 1 1883 3 is_stmt 0 view .LVU3615 + 11874 0026 0120 movs r0, #1 + 11875 .LVL934: +1883:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** { + 11876 .loc 1 1883 3 view .LVU3616 + 11877 0028 36E0 b .L759 + 11878 .LVL935: + 11879 .L756: +1883:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** { + ARM GAS /tmp/ccMtK8ce.s page 396 + + + 11880 .loc 1 1883 3 view .LVU3617 + 11881 002a 0C29 cmp r1, #12 + 11882 002c 08D1 bne .L769 +1912:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** (void)HAL_DMA_Abort_IT(htim->hdma[TIM_DMA_ID_CC4]); + 11883 .loc 1 1912 7 is_stmt 1 view .LVU3618 + 11884 002e 0268 ldr r2, [r0] + 11885 0030 D368 ldr r3, [r2, #12] + 11886 0032 2F49 ldr r1, .L772+4 + 11887 .LVL936: +1912:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** (void)HAL_DMA_Abort_IT(htim->hdma[TIM_DMA_ID_CC4]); + 11888 .loc 1 1912 7 is_stmt 0 view .LVU3619 + 11889 0034 0B40 ands r3, r1 + 11890 0036 D360 str r3, [r2, #12] +1913:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** break; + 11891 .loc 1 1913 7 is_stmt 1 view .LVU3620 +1913:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** break; + 11892 .loc 1 1913 13 is_stmt 0 view .LVU3621 + 11893 0038 006B ldr r0, [r0, #48] + 11894 .LVL937: +1913:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** break; + 11895 .loc 1 1913 13 view .LVU3622 + 11896 003a FFF7FEFF bl HAL_DMA_Abort_IT + 11897 .LVL938: +1914:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** } + 11898 .loc 1 1914 7 is_stmt 1 view .LVU3623 +1922:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** { + 11899 .loc 1 1922 3 view .LVU3624 + 11900 003e 09E0 b .L761 + 11901 .LVL939: + 11902 .L769: +1883:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** { + 11903 .loc 1 1883 3 is_stmt 0 view .LVU3625 + 11904 0040 0120 movs r0, #1 + 11905 .LVL940: +1883:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** { + 11906 .loc 1 1883 3 view .LVU3626 + 11907 0042 29E0 b .L759 + 11908 .LVL941: + 11909 .L757: +1888:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** (void)HAL_DMA_Abort_IT(htim->hdma[TIM_DMA_ID_CC1]); + 11910 .loc 1 1888 7 is_stmt 1 view .LVU3627 + 11911 0044 0268 ldr r2, [r0] + 11912 0046 D368 ldr r3, [r2, #12] + 11913 0048 2A49 ldr r1, .L772+8 + 11914 .LVL942: +1888:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** (void)HAL_DMA_Abort_IT(htim->hdma[TIM_DMA_ID_CC1]); + 11915 .loc 1 1888 7 is_stmt 0 view .LVU3628 + 11916 004a 0B40 ands r3, r1 + 11917 004c D360 str r3, [r2, #12] +1889:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** break; + 11918 .loc 1 1889 7 is_stmt 1 view .LVU3629 +1889:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** break; + 11919 .loc 1 1889 13 is_stmt 0 view .LVU3630 + 11920 004e 406A ldr r0, [r0, #36] + 11921 .LVL943: +1889:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** break; + 11922 .loc 1 1889 13 view .LVU3631 + ARM GAS /tmp/ccMtK8ce.s page 397 + + + 11923 0050 FFF7FEFF bl HAL_DMA_Abort_IT + 11924 .LVL944: +1890:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** } + 11925 .loc 1 1890 7 is_stmt 1 view .LVU3632 +1922:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** { + 11926 .loc 1 1922 3 view .LVU3633 + 11927 .L761: +1925:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 11928 .loc 1 1925 5 view .LVU3634 + 11929 0054 2868 ldr r0, [r5] + 11930 0056 0022 movs r2, #0 + 11931 0058 2100 movs r1, r4 + 11932 005a FFF7FEFF bl TIM_CCxChannelCmd + 11933 .LVL945: +1927:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** { + 11934 .loc 1 1927 5 view .LVU3635 +1927:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** { + 11935 .loc 1 1927 9 is_stmt 0 view .LVU3636 + 11936 005e 2B68 ldr r3, [r5] + 11937 0060 254A ldr r2, .L772+12 + 11938 0062 9342 cmp r3, r2 + 11939 0064 22D0 beq .L762 +1927:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** { + 11940 .loc 1 1927 9 discriminator 2 view .LVU3637 + 11941 0066 254A ldr r2, .L772+16 + 11942 0068 9342 cmp r3, r2 + 11943 006a 1FD0 beq .L762 +1927:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** { + 11944 .loc 1 1927 9 discriminator 4 view .LVU3638 + 11945 006c 244A ldr r2, .L772+20 + 11946 006e 9342 cmp r3, r2 + 11947 0070 1CD0 beq .L762 + 11948 .L763: +1930:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** } + 11949 .loc 1 1930 7 is_stmt 1 discriminator 5 view .LVU3639 +1934:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 11950 .loc 1 1934 5 view .LVU3640 +1934:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 11951 .loc 1 1934 5 view .LVU3641 + 11952 0072 2B68 ldr r3, [r5] + 11953 0074 196A ldr r1, [r3, #32] + 11954 0076 234A ldr r2, .L772+24 + 11955 0078 1142 tst r1, r2 + 11956 007a 07D1 bne .L764 +1934:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 11957 .loc 1 1934 5 discriminator 1 view .LVU3642 + 11958 007c 196A ldr r1, [r3, #32] + 11959 007e 224A ldr r2, .L772+28 + 11960 0080 1142 tst r1, r2 + 11961 0082 03D1 bne .L764 +1934:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 11962 .loc 1 1934 5 discriminator 3 view .LVU3643 + 11963 0084 1A68 ldr r2, [r3] + 11964 0086 0121 movs r1, #1 + 11965 0088 8A43 bics r2, r1 + 11966 008a 1A60 str r2, [r3] + 11967 .L764: + ARM GAS /tmp/ccMtK8ce.s page 398 + + +1934:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 11968 .loc 1 1934 5 discriminator 5 view .LVU3644 +1937:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** } + 11969 .loc 1 1937 5 view .LVU3645 + 11970 008c 002C cmp r4, #0 + 11971 008e 1AD1 bne .L765 +1937:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** } + 11972 .loc 1 1937 5 is_stmt 0 discriminator 1 view .LVU3646 + 11973 0090 3E23 movs r3, #62 + 11974 0092 0122 movs r2, #1 + 11975 0094 EA54 strb r2, [r5, r3] + 11976 0096 0020 movs r0, #0 + 11977 .L759: + 11978 .LVL946: +1941:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** } + 11979 .loc 1 1941 3 is_stmt 1 view .LVU3647 +1942:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 11980 .loc 1 1942 1 is_stmt 0 view .LVU3648 + 11981 @ sp needed + 11982 .LVL947: + 11983 .LVL948: +1942:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 11984 .loc 1 1942 1 view .LVU3649 + 11985 0098 70BD pop {r4, r5, r6, pc} + 11986 .LVL949: + 11987 .L755: +1904:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** (void)HAL_DMA_Abort_IT(htim->hdma[TIM_DMA_ID_CC3]); + 11988 .loc 1 1904 7 is_stmt 1 view .LVU3650 + 11989 009a 0268 ldr r2, [r0] + 11990 009c D368 ldr r3, [r2, #12] + 11991 009e 1B49 ldr r1, .L772+32 + 11992 .LVL950: +1904:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** (void)HAL_DMA_Abort_IT(htim->hdma[TIM_DMA_ID_CC3]); + 11993 .loc 1 1904 7 is_stmt 0 view .LVU3651 + 11994 00a0 0B40 ands r3, r1 + 11995 00a2 D360 str r3, [r2, #12] +1905:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** break; + 11996 .loc 1 1905 7 is_stmt 1 view .LVU3652 +1905:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** break; + 11997 .loc 1 1905 13 is_stmt 0 view .LVU3653 + 11998 00a4 C06A ldr r0, [r0, #44] + 11999 .LVL951: +1905:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** break; + 12000 .loc 1 1905 13 view .LVU3654 + 12001 00a6 FFF7FEFF bl HAL_DMA_Abort_IT + 12002 .LVL952: +1906:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** } + 12003 .loc 1 1906 7 is_stmt 1 view .LVU3655 +1922:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** { + 12004 .loc 1 1922 3 view .LVU3656 + 12005 00aa D3E7 b .L761 + 12006 .L762: +1930:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** } + 12007 .loc 1 1930 7 view .LVU3657 +1930:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** } + 12008 .loc 1 1930 7 view .LVU3658 + 12009 00ac 196A ldr r1, [r3, #32] + ARM GAS /tmp/ccMtK8ce.s page 399 + + + 12010 00ae 154A ldr r2, .L772+24 + 12011 00b0 1142 tst r1, r2 + 12012 00b2 DED1 bne .L763 +1930:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** } + 12013 .loc 1 1930 7 discriminator 1 view .LVU3659 + 12014 00b4 196A ldr r1, [r3, #32] + 12015 00b6 144A ldr r2, .L772+28 + 12016 00b8 1142 tst r1, r2 + 12017 00ba DAD1 bne .L763 +1930:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** } + 12018 .loc 1 1930 7 discriminator 3 view .LVU3660 + 12019 00bc 5A6C ldr r2, [r3, #68] + 12020 00be 1449 ldr r1, .L772+36 + 12021 00c0 0A40 ands r2, r1 + 12022 00c2 5A64 str r2, [r3, #68] + 12023 00c4 D5E7 b .L763 + 12024 .L765: +1937:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** } + 12025 .loc 1 1937 5 is_stmt 0 discriminator 2 view .LVU3661 + 12026 00c6 042C cmp r4, #4 + 12027 00c8 06D0 beq .L770 +1937:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** } + 12028 .loc 1 1937 5 discriminator 4 view .LVU3662 + 12029 00ca 082C cmp r4, #8 + 12030 00cc 09D0 beq .L771 +1937:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** } + 12031 .loc 1 1937 5 discriminator 7 view .LVU3663 + 12032 00ce 4123 movs r3, #65 + 12033 00d0 0122 movs r2, #1 + 12034 00d2 EA54 strb r2, [r5, r3] + 12035 00d4 0020 movs r0, #0 + 12036 00d6 DFE7 b .L759 + 12037 .L770: +1937:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** } + 12038 .loc 1 1937 5 discriminator 3 view .LVU3664 + 12039 00d8 3F23 movs r3, #63 + 12040 00da 0122 movs r2, #1 + 12041 00dc EA54 strb r2, [r5, r3] + 12042 00de 0020 movs r0, #0 + 12043 00e0 DAE7 b .L759 + 12044 .L771: +1937:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** } + 12045 .loc 1 1937 5 discriminator 6 view .LVU3665 + 12046 00e2 4023 movs r3, #64 + 12047 00e4 0122 movs r2, #1 + 12048 00e6 EA54 strb r2, [r5, r3] + 12049 00e8 0020 movs r0, #0 + 12050 00ea D5E7 b .L759 + 12051 .L773: + 12052 .align 2 + 12053 .L772: + 12054 00ec FFFBFFFF .word -1025 + 12055 00f0 FFEFFFFF .word -4097 + 12056 00f4 FFFDFFFF .word -513 + 12057 00f8 002C0140 .word 1073818624 + 12058 00fc 00440140 .word 1073824768 + 12059 0100 00480140 .word 1073825792 + ARM GAS /tmp/ccMtK8ce.s page 400 + + + 12060 0104 11110000 .word 4369 + 12061 0108 44040000 .word 1092 + 12062 010c FFF7FFFF .word -2049 + 12063 0110 FF7FFFFF .word -32769 + 12064 .cfi_endproc + 12065 .LFE69: + 12067 .section .text.HAL_TIM_IC_Start,"ax",%progbits + 12068 .align 1 + 12069 .global HAL_TIM_IC_Start + 12070 .syntax unified + 12071 .code 16 + 12072 .thumb_func + 12074 HAL_TIM_IC_Start: + 12075 .LVL953: + 12076 .LFB74: +2119:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** uint32_t tmpsmcr; + 12077 .loc 1 2119 1 is_stmt 1 view -0 + 12078 .cfi_startproc + 12079 @ args = 0, pretend = 0, frame = 0 + 12080 @ frame_needed = 0, uses_anonymous_args = 0 +2119:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** uint32_t tmpsmcr; + 12081 .loc 1 2119 1 is_stmt 0 view .LVU3667 + 12082 0000 10B5 push {r4, lr} + 12083 .cfi_def_cfa_offset 8 + 12084 .cfi_offset 4, -8 + 12085 .cfi_offset 14, -4 + 12086 0002 0400 movs r4, r0 +2120:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** HAL_TIM_ChannelStateTypeDef channel_state = TIM_CHANNEL_STATE_GET(htim, Channel); + 12087 .loc 1 2120 3 is_stmt 1 view .LVU3668 +2121:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** HAL_TIM_ChannelStateTypeDef complementary_channel_state = TIM_CHANNEL_N_STATE_GET(htim, Channel); + 12088 .loc 1 2121 3 view .LVU3669 +2121:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** HAL_TIM_ChannelStateTypeDef complementary_channel_state = TIM_CHANNEL_N_STATE_GET(htim, Channel); + 12089 .loc 1 2121 47 is_stmt 0 view .LVU3670 + 12090 0004 0029 cmp r1, #0 + 12091 0006 27D1 bne .L775 +2121:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** HAL_TIM_ChannelStateTypeDef complementary_channel_state = TIM_CHANNEL_N_STATE_GET(htim, Channel); + 12092 .loc 1 2121 47 discriminator 1 view .LVU3671 + 12093 0008 3E23 movs r3, #62 + 12094 000a C05C ldrb r0, [r0, r3] + 12095 .LVL954: +2121:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** HAL_TIM_ChannelStateTypeDef complementary_channel_state = TIM_CHANNEL_N_STATE_GET(htim, Channel); + 12096 .loc 1 2121 47 discriminator 1 view .LVU3672 + 12097 000c C0B2 uxtb r0, r0 + 12098 .L776: + 12099 .LVL955: +2122:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 12100 .loc 1 2122 3 is_stmt 1 view .LVU3673 +2122:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 12101 .loc 1 2122 61 is_stmt 0 view .LVU3674 + 12102 000e 0029 cmp r1, #0 + 12103 0010 32D1 bne .L779 +2122:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 12104 .loc 1 2122 61 discriminator 1 view .LVU3675 + 12105 0012 4223 movs r3, #66 + 12106 0014 E35C ldrb r3, [r4, r3] + 12107 0016 DBB2 uxtb r3, r3 + 12108 .L780: + ARM GAS /tmp/ccMtK8ce.s page 401 + + + 12109 .LVL956: +2125:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 12110 .loc 1 2125 3 is_stmt 1 view .LVU3676 +2128:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** || (complementary_channel_state != HAL_TIM_CHANNEL_STATE_READY)) + 12111 .loc 1 2128 3 view .LVU3677 +2128:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** || (complementary_channel_state != HAL_TIM_CHANNEL_STATE_READY)) + 12112 .loc 1 2128 6 is_stmt 0 view .LVU3678 + 12113 0018 0128 cmp r0, #1 + 12114 001a 67D1 bne .L793 +2129:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** { + 12115 .loc 1 2129 7 view .LVU3679 + 12116 001c 012B cmp r3, #1 + 12117 001e 66D1 bne .L783 +2135:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** TIM_CHANNEL_N_STATE_SET(htim, Channel, HAL_TIM_CHANNEL_STATE_BUSY); + 12118 .loc 1 2135 3 is_stmt 1 view .LVU3680 + 12119 0020 0029 cmp r1, #0 + 12120 0022 39D1 bne .L784 +2135:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** TIM_CHANNEL_N_STATE_SET(htim, Channel, HAL_TIM_CHANNEL_STATE_BUSY); + 12121 .loc 1 2135 3 is_stmt 0 discriminator 1 view .LVU3681 + 12122 0024 0133 adds r3, r3, #1 + 12123 .LVL957: +2135:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** TIM_CHANNEL_N_STATE_SET(htim, Channel, HAL_TIM_CHANNEL_STATE_BUSY); + 12124 .loc 1 2135 3 discriminator 1 view .LVU3682 + 12125 0026 3E22 movs r2, #62 + 12126 0028 A354 strb r3, [r4, r2] +2136:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 12127 .loc 1 2136 3 is_stmt 1 view .LVU3683 +2136:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 12128 .loc 1 2136 3 is_stmt 0 discriminator 1 view .LVU3684 + 12129 002a 0432 adds r2, r2, #4 + 12130 002c A354 strb r3, [r4, r2] + 12131 .LVL958: + 12132 .L785: +2139:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 12133 .loc 1 2139 3 is_stmt 1 view .LVU3685 + 12134 002e 2068 ldr r0, [r4] + 12135 .LVL959: +2139:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 12136 .loc 1 2139 3 is_stmt 0 view .LVU3686 + 12137 0030 0122 movs r2, #1 + 12138 0032 FFF7FEFF bl TIM_CCxChannelCmd + 12139 .LVL960: +2142:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** { + 12140 .loc 1 2142 3 is_stmt 1 view .LVU3687 +2142:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** { + 12141 .loc 1 2142 7 is_stmt 0 view .LVU3688 + 12142 0036 2368 ldr r3, [r4] +2142:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** { + 12143 .loc 1 2142 6 view .LVU3689 + 12144 0038 2E4A ldr r2, .L803 + 12145 003a 9342 cmp r3, r2 + 12146 003c 4BD0 beq .L791 +2142:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** { + 12147 .loc 1 2142 7 discriminator 1 view .LVU3690 + 12148 003e 8022 movs r2, #128 + 12149 0040 D205 lsls r2, r2, #23 + 12150 0042 9342 cmp r3, r2 + ARM GAS /tmp/ccMtK8ce.s page 402 + + + 12151 0044 47D0 beq .L791 +2142:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** { + 12152 .loc 1 2142 7 discriminator 2 view .LVU3691 + 12153 0046 2C4A ldr r2, .L803+4 + 12154 0048 9342 cmp r3, r2 + 12155 004a 44D0 beq .L791 +2152:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** } + 12156 .loc 1 2152 5 is_stmt 1 view .LVU3692 + 12157 004c 1A68 ldr r2, [r3] + 12158 004e 0121 movs r1, #1 + 12159 0050 0A43 orrs r2, r1 + 12160 0052 1A60 str r2, [r3] +2156:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** } + 12161 .loc 1 2156 10 is_stmt 0 view .LVU3693 + 12162 0054 0020 movs r0, #0 + 12163 0056 4AE0 b .L783 + 12164 .LVL961: + 12165 .L775: +2121:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** HAL_TIM_ChannelStateTypeDef complementary_channel_state = TIM_CHANNEL_N_STATE_GET(htim, Channel); + 12166 .loc 1 2121 47 discriminator 2 view .LVU3694 + 12167 0058 0429 cmp r1, #4 + 12168 005a 05D0 beq .L795 +2121:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** HAL_TIM_ChannelStateTypeDef complementary_channel_state = TIM_CHANNEL_N_STATE_GET(htim, Channel); + 12169 .loc 1 2121 47 discriminator 5 view .LVU3695 + 12170 005c 0829 cmp r1, #8 + 12171 005e 07D0 beq .L796 +2121:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** HAL_TIM_ChannelStateTypeDef complementary_channel_state = TIM_CHANNEL_N_STATE_GET(htim, Channel); + 12172 .loc 1 2121 47 discriminator 8 view .LVU3696 + 12173 0060 4123 movs r3, #65 + 12174 0062 C05C ldrb r0, [r0, r3] + 12175 .LVL962: +2121:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** HAL_TIM_ChannelStateTypeDef complementary_channel_state = TIM_CHANNEL_N_STATE_GET(htim, Channel); + 12176 .loc 1 2121 47 discriminator 8 view .LVU3697 + 12177 0064 C0B2 uxtb r0, r0 + 12178 0066 D2E7 b .L776 + 12179 .LVL963: + 12180 .L795: +2121:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** HAL_TIM_ChannelStateTypeDef complementary_channel_state = TIM_CHANNEL_N_STATE_GET(htim, Channel); + 12181 .loc 1 2121 47 discriminator 4 view .LVU3698 + 12182 0068 3F23 movs r3, #63 + 12183 006a C05C ldrb r0, [r0, r3] + 12184 .LVL964: +2121:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** HAL_TIM_ChannelStateTypeDef complementary_channel_state = TIM_CHANNEL_N_STATE_GET(htim, Channel); + 12185 .loc 1 2121 47 discriminator 4 view .LVU3699 + 12186 006c C0B2 uxtb r0, r0 + 12187 006e CEE7 b .L776 + 12188 .LVL965: + 12189 .L796: +2121:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** HAL_TIM_ChannelStateTypeDef complementary_channel_state = TIM_CHANNEL_N_STATE_GET(htim, Channel); + 12190 .loc 1 2121 47 discriminator 7 view .LVU3700 + 12191 0070 4023 movs r3, #64 + 12192 0072 C05C ldrb r0, [r0, r3] + 12193 .LVL966: +2121:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** HAL_TIM_ChannelStateTypeDef complementary_channel_state = TIM_CHANNEL_N_STATE_GET(htim, Channel); + 12194 .loc 1 2121 47 discriminator 7 view .LVU3701 + 12195 0074 C0B2 uxtb r0, r0 + 12196 0076 CAE7 b .L776 + ARM GAS /tmp/ccMtK8ce.s page 403 + + + 12197 .LVL967: + 12198 .L779: +2122:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 12199 .loc 1 2122 61 discriminator 2 view .LVU3702 + 12200 0078 0429 cmp r1, #4 + 12201 007a 05D0 beq .L797 +2122:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 12202 .loc 1 2122 61 discriminator 5 view .LVU3703 + 12203 007c 0829 cmp r1, #8 + 12204 007e 07D0 beq .L798 +2122:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 12205 .loc 1 2122 61 discriminator 8 view .LVU3704 + 12206 0080 4523 movs r3, #69 + 12207 0082 E35C ldrb r3, [r4, r3] + 12208 0084 DBB2 uxtb r3, r3 + 12209 0086 C7E7 b .L780 + 12210 .L797: +2122:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 12211 .loc 1 2122 61 discriminator 4 view .LVU3705 + 12212 0088 4323 movs r3, #67 + 12213 008a E35C ldrb r3, [r4, r3] + 12214 008c DBB2 uxtb r3, r3 + 12215 008e C3E7 b .L780 + 12216 .L798: +2122:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 12217 .loc 1 2122 61 discriminator 7 view .LVU3706 + 12218 0090 4423 movs r3, #68 + 12219 0092 E35C ldrb r3, [r4, r3] + 12220 0094 DBB2 uxtb r3, r3 + 12221 0096 BFE7 b .L780 + 12222 .LVL968: + 12223 .L784: +2135:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** TIM_CHANNEL_N_STATE_SET(htim, Channel, HAL_TIM_CHANNEL_STATE_BUSY); + 12224 .loc 1 2135 3 discriminator 2 view .LVU3707 + 12225 0098 0429 cmp r1, #4 + 12226 009a 0CD0 beq .L799 +2135:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** TIM_CHANNEL_N_STATE_SET(htim, Channel, HAL_TIM_CHANNEL_STATE_BUSY); + 12227 .loc 1 2135 3 discriminator 4 view .LVU3708 + 12228 009c 0829 cmp r1, #8 + 12229 009e 0ED0 beq .L800 +2135:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** TIM_CHANNEL_N_STATE_SET(htim, Channel, HAL_TIM_CHANNEL_STATE_BUSY); + 12230 .loc 1 2135 3 discriminator 7 view .LVU3709 + 12231 00a0 4123 movs r3, #65 + 12232 .LVL969: +2135:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** TIM_CHANNEL_N_STATE_SET(htim, Channel, HAL_TIM_CHANNEL_STATE_BUSY); + 12233 .loc 1 2135 3 discriminator 7 view .LVU3710 + 12234 00a2 0222 movs r2, #2 + 12235 00a4 E254 strb r2, [r4, r3] +2136:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 12236 .loc 1 2136 3 is_stmt 1 view .LVU3711 + 12237 .L787: +2136:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 12238 .loc 1 2136 3 is_stmt 0 discriminator 2 view .LVU3712 + 12239 00a6 0429 cmp r1, #4 + 12240 00a8 0DD0 beq .L801 +2136:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 12241 .loc 1 2136 3 discriminator 4 view .LVU3713 + ARM GAS /tmp/ccMtK8ce.s page 404 + + + 12242 00aa 0829 cmp r1, #8 + 12243 00ac 0FD0 beq .L802 +2136:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 12244 .loc 1 2136 3 discriminator 7 view .LVU3714 + 12245 00ae 4523 movs r3, #69 + 12246 00b0 0222 movs r2, #2 + 12247 00b2 E254 strb r2, [r4, r3] + 12248 00b4 BBE7 b .L785 + 12249 .LVL970: + 12250 .L799: +2135:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** TIM_CHANNEL_N_STATE_SET(htim, Channel, HAL_TIM_CHANNEL_STATE_BUSY); + 12251 .loc 1 2135 3 discriminator 3 view .LVU3715 + 12252 00b6 3F23 movs r3, #63 + 12253 .LVL971: +2135:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** TIM_CHANNEL_N_STATE_SET(htim, Channel, HAL_TIM_CHANNEL_STATE_BUSY); + 12254 .loc 1 2135 3 discriminator 3 view .LVU3716 + 12255 00b8 0222 movs r2, #2 + 12256 00ba E254 strb r2, [r4, r3] +2136:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 12257 .loc 1 2136 3 is_stmt 1 view .LVU3717 + 12258 00bc F3E7 b .L787 + 12259 .LVL972: + 12260 .L800: +2135:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** TIM_CHANNEL_N_STATE_SET(htim, Channel, HAL_TIM_CHANNEL_STATE_BUSY); + 12261 .loc 1 2135 3 is_stmt 0 discriminator 6 view .LVU3718 + 12262 00be 4023 movs r3, #64 + 12263 .LVL973: +2135:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** TIM_CHANNEL_N_STATE_SET(htim, Channel, HAL_TIM_CHANNEL_STATE_BUSY); + 12264 .loc 1 2135 3 discriminator 6 view .LVU3719 + 12265 00c0 0222 movs r2, #2 + 12266 00c2 E254 strb r2, [r4, r3] +2136:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 12267 .loc 1 2136 3 is_stmt 1 view .LVU3720 + 12268 00c4 EFE7 b .L787 + 12269 .L801: +2136:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 12270 .loc 1 2136 3 is_stmt 0 discriminator 3 view .LVU3721 + 12271 00c6 4323 movs r3, #67 + 12272 00c8 0222 movs r2, #2 + 12273 00ca E254 strb r2, [r4, r3] + 12274 00cc AFE7 b .L785 + 12275 .L802: +2136:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 12276 .loc 1 2136 3 discriminator 6 view .LVU3722 + 12277 00ce 4423 movs r3, #68 + 12278 00d0 0222 movs r2, #2 + 12279 00d2 E254 strb r2, [r4, r3] + 12280 00d4 ABE7 b .L785 + 12281 .LVL974: + 12282 .L791: +2144:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** if (!IS_TIM_SLAVEMODE_TRIGGER_ENABLED(tmpsmcr)) + 12283 .loc 1 2144 5 is_stmt 1 view .LVU3723 +2144:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** if (!IS_TIM_SLAVEMODE_TRIGGER_ENABLED(tmpsmcr)) + 12284 .loc 1 2144 29 is_stmt 0 view .LVU3724 + 12285 00d6 9968 ldr r1, [r3, #8] +2144:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** if (!IS_TIM_SLAVEMODE_TRIGGER_ENABLED(tmpsmcr)) + 12286 .loc 1 2144 13 view .LVU3725 + ARM GAS /tmp/ccMtK8ce.s page 405 + + + 12287 00d8 0722 movs r2, #7 + 12288 00da 0A40 ands r2, r1 + 12289 .LVL975: +2145:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** { + 12290 .loc 1 2145 5 is_stmt 1 view .LVU3726 +2145:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** { + 12291 .loc 1 2145 8 is_stmt 0 view .LVU3727 + 12292 00dc 062A cmp r2, #6 + 12293 00de 07D0 beq .L794 +2147:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** } + 12294 .loc 1 2147 7 is_stmt 1 view .LVU3728 + 12295 00e0 1A68 ldr r2, [r3] + 12296 .LVL976: +2147:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** } + 12297 .loc 1 2147 7 is_stmt 0 view .LVU3729 + 12298 00e2 0121 movs r1, #1 + 12299 .LVL977: +2147:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** } + 12300 .loc 1 2147 7 view .LVU3730 + 12301 00e4 0A43 orrs r2, r1 + 12302 00e6 1A60 str r2, [r3] +2156:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** } + 12303 .loc 1 2156 10 view .LVU3731 + 12304 00e8 0020 movs r0, #0 + 12305 00ea 00E0 b .L783 + 12306 .LVL978: + 12307 .L793: +2131:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** } + 12308 .loc 1 2131 12 view .LVU3732 + 12309 00ec 0120 movs r0, #1 + 12310 .LVL979: + 12311 .L783: +2157:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 12312 .loc 1 2157 1 view .LVU3733 + 12313 @ sp needed + 12314 .LVL980: +2157:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 12315 .loc 1 2157 1 view .LVU3734 + 12316 00ee 10BD pop {r4, pc} + 12317 .LVL981: + 12318 .L794: +2156:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** } + 12319 .loc 1 2156 10 view .LVU3735 + 12320 00f0 0020 movs r0, #0 + 12321 00f2 FCE7 b .L783 + 12322 .L804: + 12323 .align 2 + 12324 .L803: + 12325 00f4 002C0140 .word 1073818624 + 12326 00f8 00040040 .word 1073742848 + 12327 .cfi_endproc + 12328 .LFE74: + 12330 .section .text.HAL_TIM_IC_Stop,"ax",%progbits + 12331 .align 1 + 12332 .global HAL_TIM_IC_Stop + 12333 .syntax unified + 12334 .code 16 + ARM GAS /tmp/ccMtK8ce.s page 406 + + + 12335 .thumb_func + 12337 HAL_TIM_IC_Stop: + 12338 .LVL982: + 12339 .LFB75: +2171:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** /* Check the parameters */ + 12340 .loc 1 2171 1 is_stmt 1 view -0 + 12341 .cfi_startproc + 12342 @ args = 0, pretend = 0, frame = 0 + 12343 @ frame_needed = 0, uses_anonymous_args = 0 +2171:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** /* Check the parameters */ + 12344 .loc 1 2171 1 is_stmt 0 view .LVU3737 + 12345 0000 70B5 push {r4, r5, r6, lr} + 12346 .cfi_def_cfa_offset 16 + 12347 .cfi_offset 4, -16 + 12348 .cfi_offset 5, -12 + 12349 .cfi_offset 6, -8 + 12350 .cfi_offset 14, -4 + 12351 0002 0400 movs r4, r0 + 12352 0004 0D00 movs r5, r1 +2173:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 12353 .loc 1 2173 3 is_stmt 1 view .LVU3738 +2176:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 12354 .loc 1 2176 3 view .LVU3739 + 12355 0006 0068 ldr r0, [r0] + 12356 .LVL983: +2176:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 12357 .loc 1 2176 3 is_stmt 0 view .LVU3740 + 12358 0008 0022 movs r2, #0 + 12359 000a FFF7FEFF bl TIM_CCxChannelCmd + 12360 .LVL984: +2179:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 12361 .loc 1 2179 3 is_stmt 1 view .LVU3741 +2179:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 12362 .loc 1 2179 3 view .LVU3742 + 12363 000e 2368 ldr r3, [r4] + 12364 0010 196A ldr r1, [r3, #32] + 12365 0012 194A ldr r2, .L818 + 12366 0014 1142 tst r1, r2 + 12367 0016 07D1 bne .L806 +2179:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 12368 .loc 1 2179 3 discriminator 1 view .LVU3743 + 12369 0018 196A ldr r1, [r3, #32] + 12370 001a 184A ldr r2, .L818+4 + 12371 001c 1142 tst r1, r2 + 12372 001e 03D1 bne .L806 +2179:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 12373 .loc 1 2179 3 discriminator 3 view .LVU3744 + 12374 0020 1A68 ldr r2, [r3] + 12375 0022 0121 movs r1, #1 + 12376 0024 8A43 bics r2, r1 + 12377 0026 1A60 str r2, [r3] + 12378 .L806: +2179:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 12379 .loc 1 2179 3 discriminator 5 view .LVU3745 +2182:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** TIM_CHANNEL_N_STATE_SET(htim, Channel, HAL_TIM_CHANNEL_STATE_READY); + 12380 .loc 1 2182 3 view .LVU3746 + 12381 0028 002D cmp r5, #0 + ARM GAS /tmp/ccMtK8ce.s page 407 + + + 12382 002a 06D1 bne .L807 +2182:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** TIM_CHANNEL_N_STATE_SET(htim, Channel, HAL_TIM_CHANNEL_STATE_READY); + 12383 .loc 1 2182 3 is_stmt 0 discriminator 1 view .LVU3747 + 12384 002c 0123 movs r3, #1 + 12385 002e 3E22 movs r2, #62 + 12386 0030 A354 strb r3, [r4, r2] +2183:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 12387 .loc 1 2183 3 is_stmt 1 view .LVU3748 +2183:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 12388 .loc 1 2183 3 is_stmt 0 discriminator 1 view .LVU3749 + 12389 0032 0432 adds r2, r2, #4 + 12390 0034 A354 strb r3, [r4, r2] + 12391 .L808: +2186:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** } + 12392 .loc 1 2186 3 is_stmt 1 view .LVU3750 +2187:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 12393 .loc 1 2187 1 is_stmt 0 view .LVU3751 + 12394 0036 0020 movs r0, #0 + 12395 @ sp needed + 12396 .LVL985: + 12397 .LVL986: +2187:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 12398 .loc 1 2187 1 view .LVU3752 + 12399 0038 70BD pop {r4, r5, r6, pc} + 12400 .LVL987: + 12401 .L807: +2182:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** TIM_CHANNEL_N_STATE_SET(htim, Channel, HAL_TIM_CHANNEL_STATE_READY); + 12402 .loc 1 2182 3 discriminator 2 view .LVU3753 + 12403 003a 042D cmp r5, #4 + 12404 003c 0CD0 beq .L814 +2182:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** TIM_CHANNEL_N_STATE_SET(htim, Channel, HAL_TIM_CHANNEL_STATE_READY); + 12405 .loc 1 2182 3 discriminator 4 view .LVU3754 + 12406 003e 082D cmp r5, #8 + 12407 0040 0ED0 beq .L815 +2182:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** TIM_CHANNEL_N_STATE_SET(htim, Channel, HAL_TIM_CHANNEL_STATE_READY); + 12408 .loc 1 2182 3 discriminator 7 view .LVU3755 + 12409 0042 4123 movs r3, #65 + 12410 0044 0122 movs r2, #1 + 12411 0046 E254 strb r2, [r4, r3] +2183:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 12412 .loc 1 2183 3 is_stmt 1 view .LVU3756 + 12413 .L810: +2183:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 12414 .loc 1 2183 3 is_stmt 0 discriminator 2 view .LVU3757 + 12415 0048 042D cmp r5, #4 + 12416 004a 0DD0 beq .L816 +2183:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 12417 .loc 1 2183 3 discriminator 4 view .LVU3758 + 12418 004c 082D cmp r5, #8 + 12419 004e 0FD0 beq .L817 +2183:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 12420 .loc 1 2183 3 discriminator 7 view .LVU3759 + 12421 0050 4523 movs r3, #69 + 12422 0052 0122 movs r2, #1 + 12423 0054 E254 strb r2, [r4, r3] + 12424 0056 EEE7 b .L808 + 12425 .L814: + ARM GAS /tmp/ccMtK8ce.s page 408 + + +2182:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** TIM_CHANNEL_N_STATE_SET(htim, Channel, HAL_TIM_CHANNEL_STATE_READY); + 12426 .loc 1 2182 3 discriminator 3 view .LVU3760 + 12427 0058 3F23 movs r3, #63 + 12428 005a 0122 movs r2, #1 + 12429 005c E254 strb r2, [r4, r3] +2183:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 12430 .loc 1 2183 3 is_stmt 1 view .LVU3761 + 12431 005e F3E7 b .L810 + 12432 .L815: +2182:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** TIM_CHANNEL_N_STATE_SET(htim, Channel, HAL_TIM_CHANNEL_STATE_READY); + 12433 .loc 1 2182 3 is_stmt 0 discriminator 6 view .LVU3762 + 12434 0060 4023 movs r3, #64 + 12435 0062 0122 movs r2, #1 + 12436 0064 E254 strb r2, [r4, r3] +2183:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 12437 .loc 1 2183 3 is_stmt 1 view .LVU3763 + 12438 0066 EFE7 b .L810 + 12439 .L816: +2183:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 12440 .loc 1 2183 3 is_stmt 0 discriminator 3 view .LVU3764 + 12441 0068 4323 movs r3, #67 + 12442 006a 0122 movs r2, #1 + 12443 006c E254 strb r2, [r4, r3] + 12444 006e E2E7 b .L808 + 12445 .L817: +2183:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 12446 .loc 1 2183 3 discriminator 6 view .LVU3765 + 12447 0070 4423 movs r3, #68 + 12448 0072 0122 movs r2, #1 + 12449 0074 E254 strb r2, [r4, r3] + 12450 0076 DEE7 b .L808 + 12451 .L819: + 12452 .align 2 + 12453 .L818: + 12454 0078 11110000 .word 4369 + 12455 007c 44040000 .word 1092 + 12456 .cfi_endproc + 12457 .LFE75: + 12459 .section .text.HAL_TIM_IC_Start_IT,"ax",%progbits + 12460 .align 1 + 12461 .global HAL_TIM_IC_Start_IT + 12462 .syntax unified + 12463 .code 16 + 12464 .thumb_func + 12466 HAL_TIM_IC_Start_IT: + 12467 .LVL988: + 12468 .LFB76: +2201:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** HAL_StatusTypeDef status = HAL_OK; + 12469 .loc 1 2201 1 is_stmt 1 view -0 + 12470 .cfi_startproc + 12471 @ args = 0, pretend = 0, frame = 0 + 12472 @ frame_needed = 0, uses_anonymous_args = 0 +2201:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** HAL_StatusTypeDef status = HAL_OK; + 12473 .loc 1 2201 1 is_stmt 0 view .LVU3767 + 12474 0000 10B5 push {r4, lr} + 12475 .cfi_def_cfa_offset 8 + 12476 .cfi_offset 4, -8 + ARM GAS /tmp/ccMtK8ce.s page 409 + + + 12477 .cfi_offset 14, -4 + 12478 0002 0400 movs r4, r0 +2202:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** uint32_t tmpsmcr; + 12479 .loc 1 2202 3 is_stmt 1 view .LVU3768 + 12480 .LVL989: +2203:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 12481 .loc 1 2203 3 view .LVU3769 +2205:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** HAL_TIM_ChannelStateTypeDef complementary_channel_state = TIM_CHANNEL_N_STATE_GET(htim, Channel); + 12482 .loc 1 2205 3 view .LVU3770 +2205:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** HAL_TIM_ChannelStateTypeDef complementary_channel_state = TIM_CHANNEL_N_STATE_GET(htim, Channel); + 12483 .loc 1 2205 47 is_stmt 0 view .LVU3771 + 12484 0004 0029 cmp r1, #0 + 12485 0006 1DD1 bne .L821 +2205:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** HAL_TIM_ChannelStateTypeDef complementary_channel_state = TIM_CHANNEL_N_STATE_GET(htim, Channel); + 12486 .loc 1 2205 47 discriminator 1 view .LVU3772 + 12487 0008 3E23 movs r3, #62 + 12488 000a C05C ldrb r0, [r0, r3] + 12489 .LVL990: +2205:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** HAL_TIM_ChannelStateTypeDef complementary_channel_state = TIM_CHANNEL_N_STATE_GET(htim, Channel); + 12490 .loc 1 2205 47 discriminator 1 view .LVU3773 + 12491 000c C0B2 uxtb r0, r0 + 12492 .L822: + 12493 .LVL991: +2206:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 12494 .loc 1 2206 3 is_stmt 1 view .LVU3774 +2206:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 12495 .loc 1 2206 61 is_stmt 0 view .LVU3775 + 12496 000e 0029 cmp r1, #0 + 12497 0010 28D1 bne .L825 +2206:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 12498 .loc 1 2206 61 discriminator 1 view .LVU3776 + 12499 0012 4223 movs r3, #66 + 12500 0014 E35C ldrb r3, [r4, r3] + 12501 0016 DBB2 uxtb r3, r3 + 12502 .L826: + 12503 .LVL992: +2209:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 12504 .loc 1 2209 3 is_stmt 1 view .LVU3777 +2212:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** || (complementary_channel_state != HAL_TIM_CHANNEL_STATE_READY)) + 12505 .loc 1 2212 3 view .LVU3778 +2212:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** || (complementary_channel_state != HAL_TIM_CHANNEL_STATE_READY)) + 12506 .loc 1 2212 6 is_stmt 0 view .LVU3779 + 12507 0018 0128 cmp r0, #1 + 12508 001a 00D0 beq .LCB11323 + 12509 001c 8AE0 b .L845 @long jump + 12510 .LCB11323: +2213:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** { + 12511 .loc 1 2213 7 view .LVU3780 + 12512 001e 012B cmp r3, #1 + 12513 0020 00D0 beq .LCB11325 + 12514 0022 88E0 b .L829 @long jump + 12515 .LCB11325: +2219:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** TIM_CHANNEL_N_STATE_SET(htim, Channel, HAL_TIM_CHANNEL_STATE_BUSY); + 12516 .loc 1 2219 3 is_stmt 1 view .LVU3781 + 12517 0024 0029 cmp r1, #0 + 12518 0026 2DD1 bne .L830 +2219:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** TIM_CHANNEL_N_STATE_SET(htim, Channel, HAL_TIM_CHANNEL_STATE_BUSY); + ARM GAS /tmp/ccMtK8ce.s page 410 + + + 12519 .loc 1 2219 3 is_stmt 0 discriminator 1 view .LVU3782 + 12520 0028 0222 movs r2, #2 + 12521 002a 3D30 adds r0, r0, #61 + 12522 .LVL993: +2219:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** TIM_CHANNEL_N_STATE_SET(htim, Channel, HAL_TIM_CHANNEL_STATE_BUSY); + 12523 .loc 1 2219 3 discriminator 1 view .LVU3783 + 12524 002c 2254 strb r2, [r4, r0] +2220:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 12525 .loc 1 2220 3 is_stmt 1 view .LVU3784 +2220:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 12526 .loc 1 2220 3 is_stmt 0 discriminator 1 view .LVU3785 + 12527 002e 0430 adds r0, r0, #4 + 12528 0030 2254 strb r2, [r4, r0] + 12529 .L831: +2222:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** { + 12530 .loc 1 2222 3 is_stmt 1 view .LVU3786 + 12531 0032 0829 cmp r1, #8 + 12532 0034 5DD0 beq .L838 + 12533 0036 62D8 bhi .L839 + 12534 0038 0029 cmp r1, #0 + 12535 003a 6AD0 beq .L840 + 12536 003c 0429 cmp r1, #4 + 12537 003e 3BD0 beq .L836 + 12538 0040 1800 movs r0, r3 + 12539 0042 78E0 b .L829 + 12540 .LVL994: + 12541 .L821: +2205:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** HAL_TIM_ChannelStateTypeDef complementary_channel_state = TIM_CHANNEL_N_STATE_GET(htim, Channel); + 12542 .loc 1 2205 47 is_stmt 0 discriminator 2 view .LVU3787 + 12543 0044 0429 cmp r1, #4 + 12544 0046 05D0 beq .L847 +2205:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** HAL_TIM_ChannelStateTypeDef complementary_channel_state = TIM_CHANNEL_N_STATE_GET(htim, Channel); + 12545 .loc 1 2205 47 discriminator 5 view .LVU3788 + 12546 0048 0829 cmp r1, #8 + 12547 004a 07D0 beq .L848 +2205:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** HAL_TIM_ChannelStateTypeDef complementary_channel_state = TIM_CHANNEL_N_STATE_GET(htim, Channel); + 12548 .loc 1 2205 47 discriminator 8 view .LVU3789 + 12549 004c 4123 movs r3, #65 + 12550 004e C05C ldrb r0, [r0, r3] + 12551 .LVL995: +2205:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** HAL_TIM_ChannelStateTypeDef complementary_channel_state = TIM_CHANNEL_N_STATE_GET(htim, Channel); + 12552 .loc 1 2205 47 discriminator 8 view .LVU3790 + 12553 0050 C0B2 uxtb r0, r0 + 12554 0052 DCE7 b .L822 + 12555 .LVL996: + 12556 .L847: +2205:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** HAL_TIM_ChannelStateTypeDef complementary_channel_state = TIM_CHANNEL_N_STATE_GET(htim, Channel); + 12557 .loc 1 2205 47 discriminator 4 view .LVU3791 + 12558 0054 3F23 movs r3, #63 + 12559 0056 C05C ldrb r0, [r0, r3] + 12560 .LVL997: +2205:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** HAL_TIM_ChannelStateTypeDef complementary_channel_state = TIM_CHANNEL_N_STATE_GET(htim, Channel); + 12561 .loc 1 2205 47 discriminator 4 view .LVU3792 + 12562 0058 C0B2 uxtb r0, r0 + 12563 005a D8E7 b .L822 + 12564 .LVL998: + 12565 .L848: + ARM GAS /tmp/ccMtK8ce.s page 411 + + +2205:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** HAL_TIM_ChannelStateTypeDef complementary_channel_state = TIM_CHANNEL_N_STATE_GET(htim, Channel); + 12566 .loc 1 2205 47 discriminator 7 view .LVU3793 + 12567 005c 4023 movs r3, #64 + 12568 005e C05C ldrb r0, [r0, r3] + 12569 .LVL999: +2205:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** HAL_TIM_ChannelStateTypeDef complementary_channel_state = TIM_CHANNEL_N_STATE_GET(htim, Channel); + 12570 .loc 1 2205 47 discriminator 7 view .LVU3794 + 12571 0060 C0B2 uxtb r0, r0 + 12572 0062 D4E7 b .L822 + 12573 .LVL1000: + 12574 .L825: +2206:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 12575 .loc 1 2206 61 discriminator 2 view .LVU3795 + 12576 0064 0429 cmp r1, #4 + 12577 0066 05D0 beq .L849 +2206:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 12578 .loc 1 2206 61 discriminator 5 view .LVU3796 + 12579 0068 0829 cmp r1, #8 + 12580 006a 07D0 beq .L850 +2206:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 12581 .loc 1 2206 61 discriminator 8 view .LVU3797 + 12582 006c 4523 movs r3, #69 + 12583 006e E35C ldrb r3, [r4, r3] + 12584 0070 DBB2 uxtb r3, r3 + 12585 0072 D1E7 b .L826 + 12586 .L849: +2206:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 12587 .loc 1 2206 61 discriminator 4 view .LVU3798 + 12588 0074 4323 movs r3, #67 + 12589 0076 E35C ldrb r3, [r4, r3] + 12590 0078 DBB2 uxtb r3, r3 + 12591 007a CDE7 b .L826 + 12592 .L850: +2206:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 12593 .loc 1 2206 61 discriminator 7 view .LVU3799 + 12594 007c 4423 movs r3, #68 + 12595 007e E35C ldrb r3, [r4, r3] + 12596 0080 DBB2 uxtb r3, r3 + 12597 0082 C9E7 b .L826 + 12598 .LVL1001: + 12599 .L830: +2219:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** TIM_CHANNEL_N_STATE_SET(htim, Channel, HAL_TIM_CHANNEL_STATE_BUSY); + 12600 .loc 1 2219 3 discriminator 2 view .LVU3800 + 12601 0084 0429 cmp r1, #4 + 12602 0086 0CD0 beq .L851 +2219:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** TIM_CHANNEL_N_STATE_SET(htim, Channel, HAL_TIM_CHANNEL_STATE_BUSY); + 12603 .loc 1 2219 3 discriminator 4 view .LVU3801 + 12604 0088 0829 cmp r1, #8 + 12605 008a 0ED0 beq .L852 +2219:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** TIM_CHANNEL_N_STATE_SET(htim, Channel, HAL_TIM_CHANNEL_STATE_BUSY); + 12606 .loc 1 2219 3 discriminator 7 view .LVU3802 + 12607 008c 4122 movs r2, #65 + 12608 008e 0220 movs r0, #2 + 12609 .LVL1002: +2219:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** TIM_CHANNEL_N_STATE_SET(htim, Channel, HAL_TIM_CHANNEL_STATE_BUSY); + 12610 .loc 1 2219 3 discriminator 7 view .LVU3803 + 12611 0090 A054 strb r0, [r4, r2] + ARM GAS /tmp/ccMtK8ce.s page 412 + + +2220:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 12612 .loc 1 2220 3 is_stmt 1 view .LVU3804 + 12613 .L833: +2220:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 12614 .loc 1 2220 3 is_stmt 0 discriminator 2 view .LVU3805 + 12615 0092 0429 cmp r1, #4 + 12616 0094 0DD0 beq .L853 +2220:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 12617 .loc 1 2220 3 discriminator 4 view .LVU3806 + 12618 0096 0829 cmp r1, #8 + 12619 0098 28D0 beq .L854 +2220:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 12620 .loc 1 2220 3 discriminator 7 view .LVU3807 + 12621 009a 4522 movs r2, #69 + 12622 009c 0220 movs r0, #2 + 12623 009e A054 strb r0, [r4, r2] + 12624 00a0 C7E7 b .L831 + 12625 .LVL1003: + 12626 .L851: +2219:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** TIM_CHANNEL_N_STATE_SET(htim, Channel, HAL_TIM_CHANNEL_STATE_BUSY); + 12627 .loc 1 2219 3 discriminator 3 view .LVU3808 + 12628 00a2 3F22 movs r2, #63 + 12629 00a4 0220 movs r0, #2 + 12630 .LVL1004: +2219:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** TIM_CHANNEL_N_STATE_SET(htim, Channel, HAL_TIM_CHANNEL_STATE_BUSY); + 12631 .loc 1 2219 3 discriminator 3 view .LVU3809 + 12632 00a6 A054 strb r0, [r4, r2] +2220:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 12633 .loc 1 2220 3 is_stmt 1 view .LVU3810 + 12634 00a8 F3E7 b .L833 + 12635 .LVL1005: + 12636 .L852: +2219:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** TIM_CHANNEL_N_STATE_SET(htim, Channel, HAL_TIM_CHANNEL_STATE_BUSY); + 12637 .loc 1 2219 3 is_stmt 0 discriminator 6 view .LVU3811 + 12638 00aa 4022 movs r2, #64 + 12639 00ac 0220 movs r0, #2 + 12640 .LVL1006: +2219:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** TIM_CHANNEL_N_STATE_SET(htim, Channel, HAL_TIM_CHANNEL_STATE_BUSY); + 12641 .loc 1 2219 3 discriminator 6 view .LVU3812 + 12642 00ae A054 strb r0, [r4, r2] +2220:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 12643 .loc 1 2220 3 is_stmt 1 view .LVU3813 + 12644 00b0 EFE7 b .L833 + 12645 .L853: +2220:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 12646 .loc 1 2220 3 is_stmt 0 discriminator 3 view .LVU3814 + 12647 00b2 4323 movs r3, #67 + 12648 .LVL1007: +2220:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 12649 .loc 1 2220 3 discriminator 3 view .LVU3815 + 12650 00b4 0222 movs r2, #2 + 12651 00b6 E254 strb r2, [r4, r3] +2222:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** { + 12652 .loc 1 2222 3 is_stmt 1 view .LVU3816 + 12653 .L836: +2234:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** break; + 12654 .loc 1 2234 7 view .LVU3817 + ARM GAS /tmp/ccMtK8ce.s page 413 + + + 12655 00b8 2268 ldr r2, [r4] + 12656 00ba D368 ldr r3, [r2, #12] + 12657 00bc 0420 movs r0, #4 + 12658 00be 0343 orrs r3, r0 + 12659 00c0 D360 str r3, [r2, #12] +2235:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** } + 12660 .loc 1 2235 7 view .LVU3818 +2257:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** { + 12661 .loc 1 2257 3 view .LVU3819 + 12662 .L842: +2260:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 12663 .loc 1 2260 5 view .LVU3820 + 12664 00c2 2068 ldr r0, [r4] + 12665 00c4 0122 movs r2, #1 + 12666 00c6 FFF7FEFF bl TIM_CCxChannelCmd + 12667 .LVL1008: +2263:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** { + 12668 .loc 1 2263 5 view .LVU3821 +2263:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** { + 12669 .loc 1 2263 9 is_stmt 0 view .LVU3822 + 12670 00ca 2368 ldr r3, [r4] +2263:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** { + 12671 .loc 1 2263 8 view .LVU3823 + 12672 00cc 1B4A ldr r2, .L856 + 12673 00ce 9342 cmp r3, r2 + 12674 00d0 25D0 beq .L843 +2263:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** { + 12675 .loc 1 2263 9 discriminator 1 view .LVU3824 + 12676 00d2 8022 movs r2, #128 + 12677 00d4 D205 lsls r2, r2, #23 + 12678 00d6 9342 cmp r3, r2 + 12679 00d8 21D0 beq .L843 +2263:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** { + 12680 .loc 1 2263 9 discriminator 2 view .LVU3825 + 12681 00da 194A ldr r2, .L856+4 + 12682 00dc 9342 cmp r3, r2 + 12683 00de 1ED0 beq .L843 +2273:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** } + 12684 .loc 1 2273 7 is_stmt 1 view .LVU3826 + 12685 00e0 1A68 ldr r2, [r3] + 12686 00e2 0121 movs r1, #1 + 12687 00e4 0A43 orrs r2, r1 + 12688 00e6 1A60 str r2, [r3] + 12689 00e8 0020 movs r0, #0 + 12690 00ea 24E0 b .L829 + 12691 .LVL1009: + 12692 .L854: +2220:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 12693 .loc 1 2220 3 is_stmt 0 discriminator 6 view .LVU3827 + 12694 00ec 4423 movs r3, #68 + 12695 .LVL1010: +2220:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 12696 .loc 1 2220 3 discriminator 6 view .LVU3828 + 12697 00ee 0222 movs r2, #2 + 12698 00f0 E254 strb r2, [r4, r3] +2222:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** { + 12699 .loc 1 2222 3 is_stmt 1 view .LVU3829 + ARM GAS /tmp/ccMtK8ce.s page 414 + + + 12700 .L838: +2241:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** break; + 12701 .loc 1 2241 7 view .LVU3830 + 12702 00f2 2268 ldr r2, [r4] + 12703 00f4 D368 ldr r3, [r2, #12] + 12704 00f6 0820 movs r0, #8 + 12705 00f8 0343 orrs r3, r0 + 12706 00fa D360 str r3, [r2, #12] +2242:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** } + 12707 .loc 1 2242 7 view .LVU3831 +2257:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** { + 12708 .loc 1 2257 3 view .LVU3832 + 12709 00fc E1E7 b .L842 + 12710 .LVL1011: + 12711 .L839: +2222:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** { + 12712 .loc 1 2222 3 is_stmt 0 view .LVU3833 + 12713 00fe 0C29 cmp r1, #12 + 12714 0100 05D1 bne .L855 +2248:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** break; + 12715 .loc 1 2248 7 is_stmt 1 view .LVU3834 + 12716 0102 2268 ldr r2, [r4] + 12717 0104 D368 ldr r3, [r2, #12] + 12718 .LVL1012: +2248:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** break; + 12719 .loc 1 2248 7 is_stmt 0 view .LVU3835 + 12720 0106 1020 movs r0, #16 + 12721 0108 0343 orrs r3, r0 + 12722 010a D360 str r3, [r2, #12] +2249:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** } + 12723 .loc 1 2249 7 is_stmt 1 view .LVU3836 +2257:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** { + 12724 .loc 1 2257 3 view .LVU3837 + 12725 010c D9E7 b .L842 + 12726 .LVL1013: + 12727 .L855: +2222:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** { + 12728 .loc 1 2222 3 is_stmt 0 view .LVU3838 + 12729 010e 1800 movs r0, r3 + 12730 0110 11E0 b .L829 + 12731 .L840: +2227:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** break; + 12732 .loc 1 2227 7 is_stmt 1 view .LVU3839 + 12733 0112 2268 ldr r2, [r4] + 12734 0114 D368 ldr r3, [r2, #12] + 12735 .LVL1014: +2227:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** break; + 12736 .loc 1 2227 7 is_stmt 0 view .LVU3840 + 12737 0116 0220 movs r0, #2 + 12738 0118 0343 orrs r3, r0 + 12739 011a D360 str r3, [r2, #12] +2228:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** } + 12740 .loc 1 2228 7 is_stmt 1 view .LVU3841 +2257:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** { + 12741 .loc 1 2257 3 view .LVU3842 + 12742 011c D1E7 b .L842 + 12743 .LVL1015: + ARM GAS /tmp/ccMtK8ce.s page 415 + + + 12744 .L843: +2265:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** if (!IS_TIM_SLAVEMODE_TRIGGER_ENABLED(tmpsmcr)) + 12745 .loc 1 2265 7 view .LVU3843 +2265:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** if (!IS_TIM_SLAVEMODE_TRIGGER_ENABLED(tmpsmcr)) + 12746 .loc 1 2265 31 is_stmt 0 view .LVU3844 + 12747 011e 9968 ldr r1, [r3, #8] +2265:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** if (!IS_TIM_SLAVEMODE_TRIGGER_ENABLED(tmpsmcr)) + 12748 .loc 1 2265 15 view .LVU3845 + 12749 0120 0722 movs r2, #7 + 12750 0122 0A40 ands r2, r1 + 12751 .LVL1016: +2266:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** { + 12752 .loc 1 2266 7 is_stmt 1 view .LVU3846 +2266:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** { + 12753 .loc 1 2266 10 is_stmt 0 view .LVU3847 + 12754 0124 062A cmp r2, #6 + 12755 0126 07D0 beq .L846 +2268:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** } + 12756 .loc 1 2268 9 is_stmt 1 view .LVU3848 + 12757 0128 1A68 ldr r2, [r3] + 12758 .LVL1017: +2268:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** } + 12759 .loc 1 2268 9 is_stmt 0 view .LVU3849 + 12760 012a 0121 movs r1, #1 + 12761 .LVL1018: +2268:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** } + 12762 .loc 1 2268 9 view .LVU3850 + 12763 012c 0A43 orrs r2, r1 + 12764 012e 1A60 str r2, [r3] + 12765 0130 0020 movs r0, #0 + 12766 0132 00E0 b .L829 + 12767 .LVL1019: + 12768 .L845: +2215:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** } + 12769 .loc 1 2215 12 view .LVU3851 + 12770 0134 0120 movs r0, #1 + 12771 .LVL1020: + 12772 .L829: +2279:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 12773 .loc 1 2279 1 view .LVU3852 + 12774 @ sp needed + 12775 .LVL1021: +2279:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 12776 .loc 1 2279 1 view .LVU3853 + 12777 0136 10BD pop {r4, pc} + 12778 .LVL1022: + 12779 .L846: +2279:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 12780 .loc 1 2279 1 view .LVU3854 + 12781 0138 0020 movs r0, #0 + 12782 013a FCE7 b .L829 + 12783 .L857: + 12784 .align 2 + 12785 .L856: + 12786 013c 002C0140 .word 1073818624 + 12787 0140 00040040 .word 1073742848 + 12788 .cfi_endproc + ARM GAS /tmp/ccMtK8ce.s page 416 + + + 12789 .LFE76: + 12791 .section .text.HAL_TIM_IC_Stop_IT,"ax",%progbits + 12792 .align 1 + 12793 .global HAL_TIM_IC_Stop_IT + 12794 .syntax unified + 12795 .code 16 + 12796 .thumb_func + 12798 HAL_TIM_IC_Stop_IT: + 12799 .LVL1023: + 12800 .LFB77: +2293:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** HAL_StatusTypeDef status = HAL_OK; + 12801 .loc 1 2293 1 is_stmt 1 view -0 + 12802 .cfi_startproc + 12803 @ args = 0, pretend = 0, frame = 0 + 12804 @ frame_needed = 0, uses_anonymous_args = 0 +2293:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** HAL_StatusTypeDef status = HAL_OK; + 12805 .loc 1 2293 1 is_stmt 0 view .LVU3856 + 12806 0000 70B5 push {r4, r5, r6, lr} + 12807 .cfi_def_cfa_offset 16 + 12808 .cfi_offset 4, -16 + 12809 .cfi_offset 5, -12 + 12810 .cfi_offset 6, -8 + 12811 .cfi_offset 14, -4 + 12812 0002 0500 movs r5, r0 + 12813 0004 0C00 movs r4, r1 +2294:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 12814 .loc 1 2294 3 is_stmt 1 view .LVU3857 + 12815 .LVL1024: +2297:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 12816 .loc 1 2297 3 view .LVU3858 +2299:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** { + 12817 .loc 1 2299 3 view .LVU3859 + 12818 0006 0829 cmp r1, #8 + 12819 0008 36D0 beq .L859 + 12820 000a 0BD8 bhi .L860 + 12821 000c 0029 cmp r1, #0 + 12822 000e 13D0 beq .L861 + 12823 0010 0429 cmp r1, #4 + 12824 0012 05D1 bne .L873 +2311:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** break; + 12825 .loc 1 2311 7 view .LVU3860 + 12826 0014 0268 ldr r2, [r0] + 12827 0016 D368 ldr r3, [r2, #12] + 12828 0018 0421 movs r1, #4 + 12829 .LVL1025: +2311:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** break; + 12830 .loc 1 2311 7 is_stmt 0 view .LVU3861 + 12831 001a 8B43 bics r3, r1 + 12832 001c D360 str r3, [r2, #12] +2312:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** } + 12833 .loc 1 2312 7 is_stmt 1 view .LVU3862 +2334:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** { + 12834 .loc 1 2334 3 view .LVU3863 + 12835 001e 10E0 b .L865 + 12836 .LVL1026: + 12837 .L873: +2299:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** { + ARM GAS /tmp/ccMtK8ce.s page 417 + + + 12838 .loc 1 2299 3 is_stmt 0 view .LVU3864 + 12839 0020 0120 movs r0, #1 + 12840 .LVL1027: +2299:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** { + 12841 .loc 1 2299 3 view .LVU3865 + 12842 0022 28E0 b .L863 + 12843 .LVL1028: + 12844 .L860: +2299:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** { + 12845 .loc 1 2299 3 view .LVU3866 + 12846 0024 0C29 cmp r1, #12 + 12847 0026 05D1 bne .L874 +2325:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** break; + 12848 .loc 1 2325 7 is_stmt 1 view .LVU3867 + 12849 0028 0268 ldr r2, [r0] + 12850 002a D368 ldr r3, [r2, #12] + 12851 002c 1021 movs r1, #16 + 12852 .LVL1029: +2325:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** break; + 12853 .loc 1 2325 7 is_stmt 0 view .LVU3868 + 12854 002e 8B43 bics r3, r1 + 12855 0030 D360 str r3, [r2, #12] +2326:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** } + 12856 .loc 1 2326 7 is_stmt 1 view .LVU3869 +2334:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** { + 12857 .loc 1 2334 3 view .LVU3870 + 12858 0032 06E0 b .L865 + 12859 .LVL1030: + 12860 .L874: +2299:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** { + 12861 .loc 1 2299 3 is_stmt 0 view .LVU3871 + 12862 0034 0120 movs r0, #1 + 12863 .LVL1031: +2299:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** { + 12864 .loc 1 2299 3 view .LVU3872 + 12865 0036 1EE0 b .L863 + 12866 .LVL1032: + 12867 .L861: +2304:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** break; + 12868 .loc 1 2304 7 is_stmt 1 view .LVU3873 + 12869 0038 0268 ldr r2, [r0] + 12870 003a D368 ldr r3, [r2, #12] + 12871 003c 0221 movs r1, #2 + 12872 .LVL1033: +2304:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** break; + 12873 .loc 1 2304 7 is_stmt 0 view .LVU3874 + 12874 003e 8B43 bics r3, r1 + 12875 0040 D360 str r3, [r2, #12] +2305:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** } + 12876 .loc 1 2305 7 is_stmt 1 view .LVU3875 +2334:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** { + 12877 .loc 1 2334 3 view .LVU3876 + 12878 .L865: +2337:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 12879 .loc 1 2337 5 view .LVU3877 + 12880 0042 2868 ldr r0, [r5] + 12881 .LVL1034: + ARM GAS /tmp/ccMtK8ce.s page 418 + + +2337:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 12882 .loc 1 2337 5 is_stmt 0 view .LVU3878 + 12883 0044 0022 movs r2, #0 + 12884 0046 2100 movs r1, r4 + 12885 0048 FFF7FEFF bl TIM_CCxChannelCmd + 12886 .LVL1035: +2340:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 12887 .loc 1 2340 5 is_stmt 1 view .LVU3879 +2340:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 12888 .loc 1 2340 5 view .LVU3880 + 12889 004c 2B68 ldr r3, [r5] + 12890 004e 196A ldr r1, [r3, #32] + 12891 0050 1D4A ldr r2, .L879 + 12892 0052 1142 tst r1, r2 + 12893 0054 07D1 bne .L866 +2340:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 12894 .loc 1 2340 5 discriminator 1 view .LVU3881 + 12895 0056 196A ldr r1, [r3, #32] + 12896 0058 1C4A ldr r2, .L879+4 + 12897 005a 1142 tst r1, r2 + 12898 005c 03D1 bne .L866 +2340:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 12899 .loc 1 2340 5 discriminator 3 view .LVU3882 + 12900 005e 1A68 ldr r2, [r3] + 12901 0060 0121 movs r1, #1 + 12902 0062 8A43 bics r2, r1 + 12903 0064 1A60 str r2, [r3] + 12904 .L866: +2340:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 12905 .loc 1 2340 5 discriminator 5 view .LVU3883 +2343:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** TIM_CHANNEL_N_STATE_SET(htim, Channel, HAL_TIM_CHANNEL_STATE_READY); + 12906 .loc 1 2343 5 view .LVU3884 + 12907 0066 002C cmp r4, #0 + 12908 0068 0CD1 bne .L867 +2343:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** TIM_CHANNEL_N_STATE_SET(htim, Channel, HAL_TIM_CHANNEL_STATE_READY); + 12909 .loc 1 2343 5 is_stmt 0 discriminator 1 view .LVU3885 + 12910 006a 0123 movs r3, #1 + 12911 006c 3E22 movs r2, #62 + 12912 006e AB54 strb r3, [r5, r2] +2344:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** } + 12913 .loc 1 2344 5 is_stmt 1 view .LVU3886 +2344:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** } + 12914 .loc 1 2344 5 is_stmt 0 discriminator 1 view .LVU3887 + 12915 0070 0432 adds r2, r2, #4 + 12916 0072 AB54 strb r3, [r5, r2] + 12917 0074 0020 movs r0, #0 + 12918 .L863: + 12919 .LVL1036: +2348:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** } + 12920 .loc 1 2348 3 is_stmt 1 view .LVU3888 +2349:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 12921 .loc 1 2349 1 is_stmt 0 view .LVU3889 + 12922 @ sp needed + 12923 .LVL1037: + 12924 .LVL1038: +2349:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 12925 .loc 1 2349 1 view .LVU3890 + ARM GAS /tmp/ccMtK8ce.s page 419 + + + 12926 0076 70BD pop {r4, r5, r6, pc} + 12927 .LVL1039: + 12928 .L859: +2318:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** break; + 12929 .loc 1 2318 7 is_stmt 1 view .LVU3891 + 12930 0078 0268 ldr r2, [r0] + 12931 007a D368 ldr r3, [r2, #12] + 12932 007c 0821 movs r1, #8 + 12933 .LVL1040: +2318:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** break; + 12934 .loc 1 2318 7 is_stmt 0 view .LVU3892 + 12935 007e 8B43 bics r3, r1 + 12936 0080 D360 str r3, [r2, #12] +2319:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** } + 12937 .loc 1 2319 7 is_stmt 1 view .LVU3893 +2334:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** { + 12938 .loc 1 2334 3 view .LVU3894 + 12939 0082 DEE7 b .L865 + 12940 .LVL1041: + 12941 .L867: +2343:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** TIM_CHANNEL_N_STATE_SET(htim, Channel, HAL_TIM_CHANNEL_STATE_READY); + 12942 .loc 1 2343 5 is_stmt 0 discriminator 2 view .LVU3895 + 12943 0084 042C cmp r4, #4 + 12944 0086 0DD0 beq .L875 +2343:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** TIM_CHANNEL_N_STATE_SET(htim, Channel, HAL_TIM_CHANNEL_STATE_READY); + 12945 .loc 1 2343 5 discriminator 4 view .LVU3896 + 12946 0088 082C cmp r4, #8 + 12947 008a 0FD0 beq .L876 +2343:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** TIM_CHANNEL_N_STATE_SET(htim, Channel, HAL_TIM_CHANNEL_STATE_READY); + 12948 .loc 1 2343 5 discriminator 7 view .LVU3897 + 12949 008c 4123 movs r3, #65 + 12950 008e 0122 movs r2, #1 + 12951 0090 EA54 strb r2, [r5, r3] +2344:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** } + 12952 .loc 1 2344 5 is_stmt 1 view .LVU3898 + 12953 .L869: +2344:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** } + 12954 .loc 1 2344 5 is_stmt 0 discriminator 2 view .LVU3899 + 12955 0092 042C cmp r4, #4 + 12956 0094 0ED0 beq .L877 +2344:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** } + 12957 .loc 1 2344 5 discriminator 4 view .LVU3900 + 12958 0096 082C cmp r4, #8 + 12959 0098 11D0 beq .L878 +2344:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** } + 12960 .loc 1 2344 5 discriminator 7 view .LVU3901 + 12961 009a 4523 movs r3, #69 + 12962 009c 0122 movs r2, #1 + 12963 009e EA54 strb r2, [r5, r3] + 12964 00a0 0020 movs r0, #0 + 12965 00a2 E8E7 b .L863 + 12966 .L875: +2343:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** TIM_CHANNEL_N_STATE_SET(htim, Channel, HAL_TIM_CHANNEL_STATE_READY); + 12967 .loc 1 2343 5 discriminator 3 view .LVU3902 + 12968 00a4 3F23 movs r3, #63 + 12969 00a6 0122 movs r2, #1 + 12970 00a8 EA54 strb r2, [r5, r3] + ARM GAS /tmp/ccMtK8ce.s page 420 + + +2344:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** } + 12971 .loc 1 2344 5 is_stmt 1 view .LVU3903 + 12972 00aa F2E7 b .L869 + 12973 .L876: +2343:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** TIM_CHANNEL_N_STATE_SET(htim, Channel, HAL_TIM_CHANNEL_STATE_READY); + 12974 .loc 1 2343 5 is_stmt 0 discriminator 6 view .LVU3904 + 12975 00ac 4023 movs r3, #64 + 12976 00ae 0122 movs r2, #1 + 12977 00b0 EA54 strb r2, [r5, r3] +2344:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** } + 12978 .loc 1 2344 5 is_stmt 1 view .LVU3905 + 12979 00b2 EEE7 b .L869 + 12980 .L877: +2344:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** } + 12981 .loc 1 2344 5 is_stmt 0 discriminator 3 view .LVU3906 + 12982 00b4 4323 movs r3, #67 + 12983 00b6 0122 movs r2, #1 + 12984 00b8 EA54 strb r2, [r5, r3] + 12985 00ba 0020 movs r0, #0 + 12986 00bc DBE7 b .L863 + 12987 .L878: +2344:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** } + 12988 .loc 1 2344 5 discriminator 6 view .LVU3907 + 12989 00be 4423 movs r3, #68 + 12990 00c0 0122 movs r2, #1 + 12991 00c2 EA54 strb r2, [r5, r3] + 12992 00c4 0020 movs r0, #0 + 12993 00c6 D6E7 b .L863 + 12994 .L880: + 12995 .align 2 + 12996 .L879: + 12997 00c8 11110000 .word 4369 + 12998 00cc 44040000 .word 1092 + 12999 .cfi_endproc + 13000 .LFE77: + 13002 .section .text.HAL_TIM_IC_Start_DMA,"ax",%progbits + 13003 .align 1 + 13004 .global HAL_TIM_IC_Start_DMA + 13005 .syntax unified + 13006 .code 16 + 13007 .thumb_func + 13009 HAL_TIM_IC_Start_DMA: + 13010 .LVL1042: + 13011 .LFB78: +2365:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** HAL_StatusTypeDef status = HAL_OK; + 13012 .loc 1 2365 1 is_stmt 1 view -0 + 13013 .cfi_startproc + 13014 @ args = 0, pretend = 0, frame = 8 + 13015 @ frame_needed = 0, uses_anonymous_args = 0 +2365:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** HAL_StatusTypeDef status = HAL_OK; + 13016 .loc 1 2365 1 is_stmt 0 view .LVU3909 + 13017 0000 F0B5 push {r4, r5, r6, r7, lr} + 13018 .cfi_def_cfa_offset 20 + 13019 .cfi_offset 4, -20 + 13020 .cfi_offset 5, -16 + 13021 .cfi_offset 6, -12 + 13022 .cfi_offset 7, -8 + ARM GAS /tmp/ccMtK8ce.s page 421 + + + 13023 .cfi_offset 14, -4 + 13024 0002 83B0 sub sp, sp, #12 + 13025 .cfi_def_cfa_offset 32 + 13026 0004 0700 movs r7, r0 + 13027 0006 0C00 movs r4, r1 + 13028 0008 1500 movs r5, r2 + 13029 000a 0193 str r3, [sp, #4] +2366:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** uint32_t tmpsmcr; + 13030 .loc 1 2366 3 is_stmt 1 view .LVU3910 + 13031 .LVL1043: +2367:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 13032 .loc 1 2367 3 view .LVU3911 +2369:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** HAL_TIM_ChannelStateTypeDef complementary_channel_state = TIM_CHANNEL_N_STATE_GET(htim, Channel); + 13033 .loc 1 2369 3 view .LVU3912 +2369:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** HAL_TIM_ChannelStateTypeDef complementary_channel_state = TIM_CHANNEL_N_STATE_GET(htim, Channel); + 13034 .loc 1 2369 47 is_stmt 0 view .LVU3913 + 13035 000c 0029 cmp r1, #0 + 13036 000e 48D1 bne .L882 +2369:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** HAL_TIM_ChannelStateTypeDef complementary_channel_state = TIM_CHANNEL_N_STATE_GET(htim, Channel); + 13037 .loc 1 2369 47 discriminator 1 view .LVU3914 + 13038 0010 3E23 movs r3, #62 + 13039 .LVL1044: +2369:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** HAL_TIM_ChannelStateTypeDef complementary_channel_state = TIM_CHANNEL_N_STATE_GET(htim, Channel); + 13040 .loc 1 2369 47 discriminator 1 view .LVU3915 + 13041 0012 C05C ldrb r0, [r0, r3] + 13042 .LVL1045: +2369:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** HAL_TIM_ChannelStateTypeDef complementary_channel_state = TIM_CHANNEL_N_STATE_GET(htim, Channel); + 13043 .loc 1 2369 47 discriminator 1 view .LVU3916 + 13044 0014 C0B2 uxtb r0, r0 + 13045 .L883: + 13046 .LVL1046: +2370:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 13047 .loc 1 2370 3 is_stmt 1 view .LVU3917 +2370:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 13048 .loc 1 2370 61 is_stmt 0 view .LVU3918 + 13049 0016 002C cmp r4, #0 + 13050 0018 53D1 bne .L886 +2370:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 13051 .loc 1 2370 61 discriminator 1 view .LVU3919 + 13052 001a 4223 movs r3, #66 + 13053 001c FE5C ldrb r6, [r7, r3] + 13054 001e F6B2 uxtb r6, r6 + 13055 .L887: + 13056 .LVL1047: +2373:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** assert_param(IS_TIM_DMA_CC_INSTANCE(htim->Instance)); + 13057 .loc 1 2373 3 is_stmt 1 view .LVU3920 +2374:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 13058 .loc 1 2374 3 view .LVU3921 +2377:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** || (complementary_channel_state == HAL_TIM_CHANNEL_STATE_BUSY)) + 13059 .loc 1 2377 3 view .LVU3922 +2377:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** || (complementary_channel_state == HAL_TIM_CHANNEL_STATE_BUSY)) + 13060 .loc 1 2377 6 is_stmt 0 view .LVU3923 + 13061 0020 0228 cmp r0, #2 + 13062 0022 00D1 bne .LCB11899 + 13063 0024 E9E0 b .L890 @long jump + 13064 .LCB11899: +2378:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** { + ARM GAS /tmp/ccMtK8ce.s page 422 + + + 13065 .loc 1 2378 7 view .LVU3924 + 13066 0026 022E cmp r6, #2 + 13067 0028 00D1 bne .LCB11901 + 13068 002a E3E0 b .L906 @long jump + 13069 .LCB11901: +2382:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** && (complementary_channel_state == HAL_TIM_CHANNEL_STATE_READY)) + 13070 .loc 1 2382 8 is_stmt 1 view .LVU3925 +2382:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** && (complementary_channel_state == HAL_TIM_CHANNEL_STATE_READY)) + 13071 .loc 1 2382 11 is_stmt 0 view .LVU3926 + 13072 002c 0128 cmp r0, #1 + 13073 002e 00D0 beq .LCB11904 + 13074 0030 E2E0 b .L907 @long jump + 13075 .LCB11904: +2383:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** { + 13076 .loc 1 2383 12 view .LVU3927 + 13077 0032 012E cmp r6, #1 + 13078 0034 00D0 beq .LCB11906 + 13079 0036 E0E0 b .L890 @long jump + 13080 .LCB11906: +2385:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** { + 13081 .loc 1 2385 5 is_stmt 1 view .LVU3928 +2385:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** { + 13082 .loc 1 2385 8 is_stmt 0 view .LVU3929 + 13083 0038 002D cmp r5, #0 + 13084 003a 00D1 bne .LCB11909 + 13085 003c DFE0 b .L908 @long jump + 13086 .LCB11909: +2385:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** { + 13087 .loc 1 2385 25 discriminator 1 view .LVU3930 + 13088 003e 019B ldr r3, [sp, #4] + 13089 0040 002B cmp r3, #0 + 13090 0042 00D1 bne .LCB11912 + 13091 0044 DDE0 b .L909 @long jump + 13092 .LCB11912: +2391:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** TIM_CHANNEL_N_STATE_SET(htim, Channel, HAL_TIM_CHANNEL_STATE_BUSY); + 13093 .loc 1 2391 7 is_stmt 1 view .LVU3931 + 13094 0046 002C cmp r4, #0 + 13095 0048 4BD1 bne .L891 +2391:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** TIM_CHANNEL_N_STATE_SET(htim, Channel, HAL_TIM_CHANNEL_STATE_BUSY); + 13096 .loc 1 2391 7 is_stmt 0 discriminator 1 view .LVU3932 + 13097 004a 0223 movs r3, #2 + 13098 004c 3E22 movs r2, #62 + 13099 .LVL1048: +2391:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** TIM_CHANNEL_N_STATE_SET(htim, Channel, HAL_TIM_CHANNEL_STATE_BUSY); + 13100 .loc 1 2391 7 discriminator 1 view .LVU3933 + 13101 004e BB54 strb r3, [r7, r2] +2392:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** } + 13102 .loc 1 2392 7 is_stmt 1 view .LVU3934 +2392:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** } + 13103 .loc 1 2392 7 is_stmt 0 discriminator 1 view .LVU3935 + 13104 0050 0432 adds r2, r2, #4 + 13105 0052 BB54 strb r3, [r7, r2] + 13106 .L892: +2401:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 13107 .loc 1 2401 3 is_stmt 1 view .LVU3936 + 13108 0054 3868 ldr r0, [r7] + 13109 .LVL1049: + ARM GAS /tmp/ccMtK8ce.s page 423 + + +2401:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 13110 .loc 1 2401 3 is_stmt 0 view .LVU3937 + 13111 0056 0122 movs r2, #1 + 13112 0058 2100 movs r1, r4 + 13113 .LVL1050: +2401:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 13114 .loc 1 2401 3 view .LVU3938 + 13115 005a FFF7FEFF bl TIM_CCxChannelCmd + 13116 .LVL1051: +2403:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** { + 13117 .loc 1 2403 3 is_stmt 1 view .LVU3939 + 13118 005e 082C cmp r4, #8 + 13119 0060 00D1 bne .LCB11935 + 13120 0062 A4E0 b .L898 @long jump + 13121 .LCB11935: + 13122 0064 5ED8 bhi .L899 + 13123 0066 002C cmp r4, #0 + 13124 0068 79D0 beq .L900 + 13125 006a 042C cmp r4, #4 + 13126 006c 58D1 bne .L914 +2429:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** htim->hdma[TIM_DMA_ID_CC2]->XferHalfCpltCallback = TIM_DMACaptureHalfCplt; + 13127 .loc 1 2429 7 view .LVU3940 +2429:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** htim->hdma[TIM_DMA_ID_CC2]->XferHalfCpltCallback = TIM_DMACaptureHalfCplt; + 13128 .loc 1 2429 17 is_stmt 0 view .LVU3941 + 13129 006e BB6A ldr r3, [r7, #40] +2429:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** htim->hdma[TIM_DMA_ID_CC2]->XferHalfCpltCallback = TIM_DMACaptureHalfCplt; + 13130 .loc 1 2429 52 view .LVU3942 + 13131 0070 694A ldr r2, .L924 + 13132 0072 9A62 str r2, [r3, #40] +2430:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 13133 .loc 1 2430 7 is_stmt 1 view .LVU3943 +2430:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 13134 .loc 1 2430 17 is_stmt 0 view .LVU3944 + 13135 0074 BB6A ldr r3, [r7, #40] +2430:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 13136 .loc 1 2430 56 view .LVU3945 + 13137 0076 694A ldr r2, .L924+4 + 13138 0078 DA62 str r2, [r3, #44] +2433:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 13139 .loc 1 2433 7 is_stmt 1 view .LVU3946 +2433:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 13140 .loc 1 2433 17 is_stmt 0 view .LVU3947 + 13141 007a BB6A ldr r3, [r7, #40] +2433:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 13142 .loc 1 2433 53 view .LVU3948 + 13143 007c 684A ldr r2, .L924+8 + 13144 007e 1A63 str r2, [r3, #48] +2436:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** Length) != HAL_OK) + 13145 .loc 1 2436 7 is_stmt 1 view .LVU3949 +2436:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** Length) != HAL_OK) + 13146 .loc 1 2436 71 is_stmt 0 view .LVU3950 + 13147 0080 3968 ldr r1, [r7] +2436:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** Length) != HAL_OK) + 13148 .loc 1 2436 66 view .LVU3951 + 13149 0082 3831 adds r1, r1, #56 +2436:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** Length) != HAL_OK) + 13150 .loc 1 2436 11 view .LVU3952 + ARM GAS /tmp/ccMtK8ce.s page 424 + + + 13151 0084 B86A ldr r0, [r7, #40] + 13152 0086 019B ldr r3, [sp, #4] + 13153 0088 2A00 movs r2, r5 + 13154 008a FFF7FEFF bl HAL_DMA_Start_IT + 13155 .LVL1052: +2436:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** Length) != HAL_OK) + 13156 .loc 1 2436 10 discriminator 1 view .LVU3953 + 13157 008e 0028 cmp r0, #0 + 13158 0090 00D0 beq .LCB11963 + 13159 0092 BAE0 b .L911 @long jump + 13160 .LCB11963: +2443:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** break; + 13161 .loc 1 2443 7 is_stmt 1 view .LVU3954 + 13162 0094 3A68 ldr r2, [r7] + 13163 0096 D168 ldr r1, [r2, #12] + 13164 0098 8023 movs r3, #128 + 13165 009a DB00 lsls r3, r3, #3 + 13166 009c 0B43 orrs r3, r1 + 13167 009e D360 str r3, [r2, #12] +2444:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** } + 13168 .loc 1 2444 7 view .LVU3955 + 13169 00a0 75E0 b .L902 + 13170 .LVL1053: + 13171 .L882: +2369:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** HAL_TIM_ChannelStateTypeDef complementary_channel_state = TIM_CHANNEL_N_STATE_GET(htim, Channel); + 13172 .loc 1 2369 47 is_stmt 0 discriminator 2 view .LVU3956 + 13173 00a2 0429 cmp r1, #4 + 13174 00a4 05D0 beq .L915 +2369:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** HAL_TIM_ChannelStateTypeDef complementary_channel_state = TIM_CHANNEL_N_STATE_GET(htim, Channel); + 13175 .loc 1 2369 47 discriminator 5 view .LVU3957 + 13176 00a6 0829 cmp r1, #8 + 13177 00a8 07D0 beq .L916 +2369:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** HAL_TIM_ChannelStateTypeDef complementary_channel_state = TIM_CHANNEL_N_STATE_GET(htim, Channel); + 13178 .loc 1 2369 47 discriminator 8 view .LVU3958 + 13179 00aa 4123 movs r3, #65 + 13180 .LVL1054: +2369:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** HAL_TIM_ChannelStateTypeDef complementary_channel_state = TIM_CHANNEL_N_STATE_GET(htim, Channel); + 13181 .loc 1 2369 47 discriminator 8 view .LVU3959 + 13182 00ac C05C ldrb r0, [r0, r3] + 13183 .LVL1055: +2369:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** HAL_TIM_ChannelStateTypeDef complementary_channel_state = TIM_CHANNEL_N_STATE_GET(htim, Channel); + 13184 .loc 1 2369 47 discriminator 8 view .LVU3960 + 13185 00ae C0B2 uxtb r0, r0 + 13186 00b0 B1E7 b .L883 + 13187 .LVL1056: + 13188 .L915: +2369:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** HAL_TIM_ChannelStateTypeDef complementary_channel_state = TIM_CHANNEL_N_STATE_GET(htim, Channel); + 13189 .loc 1 2369 47 discriminator 4 view .LVU3961 + 13190 00b2 3F23 movs r3, #63 + 13191 .LVL1057: +2369:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** HAL_TIM_ChannelStateTypeDef complementary_channel_state = TIM_CHANNEL_N_STATE_GET(htim, Channel); + 13192 .loc 1 2369 47 discriminator 4 view .LVU3962 + 13193 00b4 C05C ldrb r0, [r0, r3] + 13194 .LVL1058: +2369:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** HAL_TIM_ChannelStateTypeDef complementary_channel_state = TIM_CHANNEL_N_STATE_GET(htim, Channel); + 13195 .loc 1 2369 47 discriminator 4 view .LVU3963 + 13196 00b6 C0B2 uxtb r0, r0 + ARM GAS /tmp/ccMtK8ce.s page 425 + + + 13197 00b8 ADE7 b .L883 + 13198 .LVL1059: + 13199 .L916: +2369:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** HAL_TIM_ChannelStateTypeDef complementary_channel_state = TIM_CHANNEL_N_STATE_GET(htim, Channel); + 13200 .loc 1 2369 47 discriminator 7 view .LVU3964 + 13201 00ba 4023 movs r3, #64 + 13202 .LVL1060: +2369:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** HAL_TIM_ChannelStateTypeDef complementary_channel_state = TIM_CHANNEL_N_STATE_GET(htim, Channel); + 13203 .loc 1 2369 47 discriminator 7 view .LVU3965 + 13204 00bc C05C ldrb r0, [r0, r3] + 13205 .LVL1061: +2369:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** HAL_TIM_ChannelStateTypeDef complementary_channel_state = TIM_CHANNEL_N_STATE_GET(htim, Channel); + 13206 .loc 1 2369 47 discriminator 7 view .LVU3966 + 13207 00be C0B2 uxtb r0, r0 + 13208 00c0 A9E7 b .L883 + 13209 .LVL1062: + 13210 .L886: +2370:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 13211 .loc 1 2370 61 discriminator 2 view .LVU3967 + 13212 00c2 042C cmp r4, #4 + 13213 00c4 05D0 beq .L917 +2370:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 13214 .loc 1 2370 61 discriminator 5 view .LVU3968 + 13215 00c6 082C cmp r4, #8 + 13216 00c8 07D0 beq .L918 +2370:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 13217 .loc 1 2370 61 discriminator 8 view .LVU3969 + 13218 00ca 4523 movs r3, #69 + 13219 00cc FE5C ldrb r6, [r7, r3] + 13220 00ce F6B2 uxtb r6, r6 + 13221 00d0 A6E7 b .L887 + 13222 .L917: +2370:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 13223 .loc 1 2370 61 discriminator 4 view .LVU3970 + 13224 00d2 4323 movs r3, #67 + 13225 00d4 FE5C ldrb r6, [r7, r3] + 13226 00d6 F6B2 uxtb r6, r6 + 13227 00d8 A2E7 b .L887 + 13228 .L918: +2370:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 13229 .loc 1 2370 61 discriminator 7 view .LVU3971 + 13230 00da 4423 movs r3, #68 + 13231 00dc FE5C ldrb r6, [r7, r3] + 13232 00de F6B2 uxtb r6, r6 + 13233 00e0 9EE7 b .L887 + 13234 .LVL1063: + 13235 .L891: +2391:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** TIM_CHANNEL_N_STATE_SET(htim, Channel, HAL_TIM_CHANNEL_STATE_BUSY); + 13236 .loc 1 2391 7 discriminator 2 view .LVU3972 + 13237 00e2 042C cmp r4, #4 + 13238 00e4 0CD0 beq .L919 +2391:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** TIM_CHANNEL_N_STATE_SET(htim, Channel, HAL_TIM_CHANNEL_STATE_BUSY); + 13239 .loc 1 2391 7 discriminator 4 view .LVU3973 + 13240 00e6 082C cmp r4, #8 + 13241 00e8 0ED0 beq .L920 +2391:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** TIM_CHANNEL_N_STATE_SET(htim, Channel, HAL_TIM_CHANNEL_STATE_BUSY); + 13242 .loc 1 2391 7 discriminator 7 view .LVU3974 + ARM GAS /tmp/ccMtK8ce.s page 426 + + + 13243 00ea 4123 movs r3, #65 + 13244 00ec 0222 movs r2, #2 + 13245 .LVL1064: +2391:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** TIM_CHANNEL_N_STATE_SET(htim, Channel, HAL_TIM_CHANNEL_STATE_BUSY); + 13246 .loc 1 2391 7 discriminator 7 view .LVU3975 + 13247 00ee FA54 strb r2, [r7, r3] +2392:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** } + 13248 .loc 1 2392 7 is_stmt 1 view .LVU3976 + 13249 .L894: +2392:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** } + 13250 .loc 1 2392 7 is_stmt 0 discriminator 2 view .LVU3977 + 13251 00f0 042C cmp r4, #4 + 13252 00f2 0DD0 beq .L921 +2392:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** } + 13253 .loc 1 2392 7 discriminator 4 view .LVU3978 + 13254 00f4 082C cmp r4, #8 + 13255 00f6 0FD0 beq .L922 +2392:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** } + 13256 .loc 1 2392 7 discriminator 7 view .LVU3979 + 13257 00f8 4523 movs r3, #69 + 13258 00fa 0222 movs r2, #2 + 13259 00fc FA54 strb r2, [r7, r3] + 13260 00fe A9E7 b .L892 + 13261 .LVL1065: + 13262 .L919: +2391:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** TIM_CHANNEL_N_STATE_SET(htim, Channel, HAL_TIM_CHANNEL_STATE_BUSY); + 13263 .loc 1 2391 7 discriminator 3 view .LVU3980 + 13264 0100 3F23 movs r3, #63 + 13265 0102 0222 movs r2, #2 + 13266 .LVL1066: +2391:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** TIM_CHANNEL_N_STATE_SET(htim, Channel, HAL_TIM_CHANNEL_STATE_BUSY); + 13267 .loc 1 2391 7 discriminator 3 view .LVU3981 + 13268 0104 FA54 strb r2, [r7, r3] +2392:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** } + 13269 .loc 1 2392 7 is_stmt 1 view .LVU3982 + 13270 0106 F3E7 b .L894 + 13271 .LVL1067: + 13272 .L920: +2391:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** TIM_CHANNEL_N_STATE_SET(htim, Channel, HAL_TIM_CHANNEL_STATE_BUSY); + 13273 .loc 1 2391 7 is_stmt 0 discriminator 6 view .LVU3983 + 13274 0108 4023 movs r3, #64 + 13275 010a 0222 movs r2, #2 + 13276 .LVL1068: +2391:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** TIM_CHANNEL_N_STATE_SET(htim, Channel, HAL_TIM_CHANNEL_STATE_BUSY); + 13277 .loc 1 2391 7 discriminator 6 view .LVU3984 + 13278 010c FA54 strb r2, [r7, r3] +2392:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** } + 13279 .loc 1 2392 7 is_stmt 1 view .LVU3985 + 13280 010e EFE7 b .L894 + 13281 .L921: +2392:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** } + 13282 .loc 1 2392 7 is_stmt 0 discriminator 3 view .LVU3986 + 13283 0110 4323 movs r3, #67 + 13284 0112 0222 movs r2, #2 + 13285 0114 FA54 strb r2, [r7, r3] + 13286 0116 9DE7 b .L892 + 13287 .L922: + ARM GAS /tmp/ccMtK8ce.s page 427 + + +2392:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** } + 13288 .loc 1 2392 7 discriminator 6 view .LVU3987 + 13289 0118 4423 movs r3, #68 + 13290 011a 0222 movs r2, #2 + 13291 011c FA54 strb r2, [r7, r3] + 13292 011e 99E7 b .L892 + 13293 .LVL1069: + 13294 .L914: +2403:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** { + 13295 .loc 1 2403 3 view .LVU3988 + 13296 0120 3000 movs r0, r6 + 13297 0122 34E0 b .L902 + 13298 .L899: + 13299 0124 0C2C cmp r4, #12 + 13300 0126 18D1 bne .L923 +2471:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** htim->hdma[TIM_DMA_ID_CC4]->XferHalfCpltCallback = TIM_DMACaptureHalfCplt; + 13301 .loc 1 2471 7 is_stmt 1 view .LVU3989 +2471:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** htim->hdma[TIM_DMA_ID_CC4]->XferHalfCpltCallback = TIM_DMACaptureHalfCplt; + 13302 .loc 1 2471 17 is_stmt 0 view .LVU3990 + 13303 0128 3B6B ldr r3, [r7, #48] +2471:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** htim->hdma[TIM_DMA_ID_CC4]->XferHalfCpltCallback = TIM_DMACaptureHalfCplt; + 13304 .loc 1 2471 52 view .LVU3991 + 13305 012a 3B4A ldr r2, .L924 + 13306 012c 9A62 str r2, [r3, #40] +2472:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 13307 .loc 1 2472 7 is_stmt 1 view .LVU3992 +2472:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 13308 .loc 1 2472 17 is_stmt 0 view .LVU3993 + 13309 012e 3B6B ldr r3, [r7, #48] +2472:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 13310 .loc 1 2472 56 view .LVU3994 + 13311 0130 3A4A ldr r2, .L924+4 + 13312 0132 DA62 str r2, [r3, #44] +2475:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 13313 .loc 1 2475 7 is_stmt 1 view .LVU3995 +2475:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 13314 .loc 1 2475 17 is_stmt 0 view .LVU3996 + 13315 0134 3B6B ldr r3, [r7, #48] +2475:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 13316 .loc 1 2475 53 view .LVU3997 + 13317 0136 3A4A ldr r2, .L924+8 + 13318 0138 1A63 str r2, [r3, #48] +2478:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** Length) != HAL_OK) + 13319 .loc 1 2478 7 is_stmt 1 view .LVU3998 +2478:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** Length) != HAL_OK) + 13320 .loc 1 2478 71 is_stmt 0 view .LVU3999 + 13321 013a 3968 ldr r1, [r7] +2478:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** Length) != HAL_OK) + 13322 .loc 1 2478 66 view .LVU4000 + 13323 013c 4031 adds r1, r1, #64 +2478:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** Length) != HAL_OK) + 13324 .loc 1 2478 11 view .LVU4001 + 13325 013e 386B ldr r0, [r7, #48] + 13326 0140 019B ldr r3, [sp, #4] + 13327 0142 2A00 movs r2, r5 + 13328 0144 FFF7FEFF bl HAL_DMA_Start_IT + 13329 .LVL1070: + ARM GAS /tmp/ccMtK8ce.s page 428 + + +2478:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** Length) != HAL_OK) + 13330 .loc 1 2478 10 discriminator 1 view .LVU4002 + 13331 0148 0028 cmp r0, #0 + 13332 014a 62D1 bne .L913 +2485:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** break; + 13333 .loc 1 2485 7 is_stmt 1 view .LVU4003 + 13334 014c 3A68 ldr r2, [r7] + 13335 014e D168 ldr r1, [r2, #12] + 13336 0150 8023 movs r3, #128 + 13337 0152 5B01 lsls r3, r3, #5 + 13338 0154 0B43 orrs r3, r1 + 13339 0156 D360 str r3, [r2, #12] +2486:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** } + 13340 .loc 1 2486 7 view .LVU4004 + 13341 0158 19E0 b .L902 + 13342 .L923: +2403:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** { + 13343 .loc 1 2403 3 is_stmt 0 view .LVU4005 + 13344 015a 3000 movs r0, r6 + 13345 015c 17E0 b .L902 + 13346 .L900: +2408:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** htim->hdma[TIM_DMA_ID_CC1]->XferHalfCpltCallback = TIM_DMACaptureHalfCplt; + 13347 .loc 1 2408 7 is_stmt 1 view .LVU4006 +2408:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** htim->hdma[TIM_DMA_ID_CC1]->XferHalfCpltCallback = TIM_DMACaptureHalfCplt; + 13348 .loc 1 2408 17 is_stmt 0 view .LVU4007 + 13349 015e 7B6A ldr r3, [r7, #36] +2408:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** htim->hdma[TIM_DMA_ID_CC1]->XferHalfCpltCallback = TIM_DMACaptureHalfCplt; + 13350 .loc 1 2408 52 view .LVU4008 + 13351 0160 2D4A ldr r2, .L924 + 13352 0162 9A62 str r2, [r3, #40] +2409:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 13353 .loc 1 2409 7 is_stmt 1 view .LVU4009 +2409:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 13354 .loc 1 2409 17 is_stmt 0 view .LVU4010 + 13355 0164 7B6A ldr r3, [r7, #36] +2409:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 13356 .loc 1 2409 56 view .LVU4011 + 13357 0166 2D4A ldr r2, .L924+4 + 13358 0168 DA62 str r2, [r3, #44] +2412:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 13359 .loc 1 2412 7 is_stmt 1 view .LVU4012 +2412:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 13360 .loc 1 2412 17 is_stmt 0 view .LVU4013 + 13361 016a 7B6A ldr r3, [r7, #36] +2412:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 13362 .loc 1 2412 53 view .LVU4014 + 13363 016c 2C4A ldr r2, .L924+8 + 13364 016e 1A63 str r2, [r3, #48] +2415:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** Length) != HAL_OK) + 13365 .loc 1 2415 7 is_stmt 1 view .LVU4015 +2415:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** Length) != HAL_OK) + 13366 .loc 1 2415 71 is_stmt 0 view .LVU4016 + 13367 0170 3968 ldr r1, [r7] +2415:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** Length) != HAL_OK) + 13368 .loc 1 2415 66 view .LVU4017 + 13369 0172 3431 adds r1, r1, #52 +2415:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** Length) != HAL_OK) + ARM GAS /tmp/ccMtK8ce.s page 429 + + + 13370 .loc 1 2415 11 view .LVU4018 + 13371 0174 786A ldr r0, [r7, #36] + 13372 0176 019B ldr r3, [sp, #4] + 13373 0178 2A00 movs r2, r5 + 13374 017a FFF7FEFF bl HAL_DMA_Start_IT + 13375 .LVL1071: +2415:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** Length) != HAL_OK) + 13376 .loc 1 2415 10 discriminator 1 view .LVU4019 + 13377 017e 0028 cmp r0, #0 + 13378 0180 41D1 bne .L910 +2422:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** break; + 13379 .loc 1 2422 7 is_stmt 1 view .LVU4020 + 13380 0182 3A68 ldr r2, [r7] + 13381 0184 D168 ldr r1, [r2, #12] + 13382 0186 8023 movs r3, #128 + 13383 0188 9B00 lsls r3, r3, #2 + 13384 018a 0B43 orrs r3, r1 + 13385 018c D360 str r3, [r2, #12] +2423:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** } + 13386 .loc 1 2423 7 view .LVU4021 + 13387 .L902: + 13388 .LVL1072: +2495:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** { + 13389 .loc 1 2495 3 view .LVU4022 +2495:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** { + 13390 .loc 1 2495 7 is_stmt 0 view .LVU4023 + 13391 018e 3B68 ldr r3, [r7] +2495:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** { + 13392 .loc 1 2495 6 view .LVU4024 + 13393 0190 244A ldr r2, .L924+12 + 13394 0192 9342 cmp r3, r2 + 13395 0194 24D0 beq .L904 +2495:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** { + 13396 .loc 1 2495 7 discriminator 1 view .LVU4025 + 13397 0196 8022 movs r2, #128 + 13398 0198 D205 lsls r2, r2, #23 + 13399 019a 9342 cmp r3, r2 + 13400 019c 20D0 beq .L904 +2495:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** { + 13401 .loc 1 2495 7 discriminator 2 view .LVU4026 + 13402 019e 224A ldr r2, .L924+16 + 13403 01a0 9342 cmp r3, r2 + 13404 01a2 1DD0 beq .L904 +2505:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** } + 13405 .loc 1 2505 5 is_stmt 1 view .LVU4027 + 13406 01a4 1A68 ldr r2, [r3] + 13407 01a6 0121 movs r1, #1 + 13408 01a8 0A43 orrs r2, r1 + 13409 01aa 1A60 str r2, [r3] + 13410 01ac 25E0 b .L890 + 13411 .LVL1073: + 13412 .L898: +2450:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** htim->hdma[TIM_DMA_ID_CC3]->XferHalfCpltCallback = TIM_DMACaptureHalfCplt; + 13413 .loc 1 2450 7 view .LVU4028 +2450:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** htim->hdma[TIM_DMA_ID_CC3]->XferHalfCpltCallback = TIM_DMACaptureHalfCplt; + 13414 .loc 1 2450 17 is_stmt 0 view .LVU4029 + 13415 01ae FB6A ldr r3, [r7, #44] + ARM GAS /tmp/ccMtK8ce.s page 430 + + +2450:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** htim->hdma[TIM_DMA_ID_CC3]->XferHalfCpltCallback = TIM_DMACaptureHalfCplt; + 13416 .loc 1 2450 52 view .LVU4030 + 13417 01b0 194A ldr r2, .L924 + 13418 01b2 9A62 str r2, [r3, #40] +2451:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 13419 .loc 1 2451 7 is_stmt 1 view .LVU4031 +2451:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 13420 .loc 1 2451 17 is_stmt 0 view .LVU4032 + 13421 01b4 FB6A ldr r3, [r7, #44] +2451:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 13422 .loc 1 2451 56 view .LVU4033 + 13423 01b6 194A ldr r2, .L924+4 + 13424 01b8 DA62 str r2, [r3, #44] +2454:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 13425 .loc 1 2454 7 is_stmt 1 view .LVU4034 +2454:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 13426 .loc 1 2454 17 is_stmt 0 view .LVU4035 + 13427 01ba FB6A ldr r3, [r7, #44] +2454:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 13428 .loc 1 2454 53 view .LVU4036 + 13429 01bc 184A ldr r2, .L924+8 + 13430 01be 1A63 str r2, [r3, #48] +2457:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** Length) != HAL_OK) + 13431 .loc 1 2457 7 is_stmt 1 view .LVU4037 +2457:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** Length) != HAL_OK) + 13432 .loc 1 2457 71 is_stmt 0 view .LVU4038 + 13433 01c0 3968 ldr r1, [r7] +2457:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** Length) != HAL_OK) + 13434 .loc 1 2457 66 view .LVU4039 + 13435 01c2 3C31 adds r1, r1, #60 +2457:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** Length) != HAL_OK) + 13436 .loc 1 2457 11 view .LVU4040 + 13437 01c4 F86A ldr r0, [r7, #44] + 13438 01c6 019B ldr r3, [sp, #4] + 13439 01c8 2A00 movs r2, r5 + 13440 01ca FFF7FEFF bl HAL_DMA_Start_IT + 13441 .LVL1074: +2457:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** Length) != HAL_OK) + 13442 .loc 1 2457 10 discriminator 1 view .LVU4041 + 13443 01ce 0028 cmp r0, #0 + 13444 01d0 1DD1 bne .L912 +2464:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** break; + 13445 .loc 1 2464 7 is_stmt 1 view .LVU4042 + 13446 01d2 3A68 ldr r2, [r7] + 13447 01d4 D168 ldr r1, [r2, #12] + 13448 01d6 8023 movs r3, #128 + 13449 01d8 1B01 lsls r3, r3, #4 + 13450 01da 0B43 orrs r3, r1 + 13451 01dc D360 str r3, [r2, #12] +2465:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** } + 13452 .loc 1 2465 7 view .LVU4043 + 13453 01de D6E7 b .L902 + 13454 .LVL1075: + 13455 .L904: +2497:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** if (!IS_TIM_SLAVEMODE_TRIGGER_ENABLED(tmpsmcr)) + 13456 .loc 1 2497 5 view .LVU4044 +2497:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** if (!IS_TIM_SLAVEMODE_TRIGGER_ENABLED(tmpsmcr)) + ARM GAS /tmp/ccMtK8ce.s page 431 + + + 13457 .loc 1 2497 29 is_stmt 0 view .LVU4045 + 13458 01e0 9968 ldr r1, [r3, #8] +2497:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** if (!IS_TIM_SLAVEMODE_TRIGGER_ENABLED(tmpsmcr)) + 13459 .loc 1 2497 13 view .LVU4046 + 13460 01e2 0722 movs r2, #7 + 13461 01e4 0A40 ands r2, r1 + 13462 .LVL1076: +2498:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** { + 13463 .loc 1 2498 5 is_stmt 1 view .LVU4047 +2498:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** { + 13464 .loc 1 2498 8 is_stmt 0 view .LVU4048 + 13465 01e6 062A cmp r2, #6 + 13466 01e8 07D0 beq .L890 +2500:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** } + 13467 .loc 1 2500 7 is_stmt 1 view .LVU4049 + 13468 01ea 1A68 ldr r2, [r3] + 13469 .LVL1077: +2500:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** } + 13470 .loc 1 2500 7 is_stmt 0 view .LVU4050 + 13471 01ec 0121 movs r1, #1 + 13472 .LVL1078: +2500:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** } + 13473 .loc 1 2500 7 view .LVU4051 + 13474 01ee 0A43 orrs r2, r1 + 13475 01f0 1A60 str r2, [r3] + 13476 01f2 02E0 b .L890 + 13477 .LVL1079: + 13478 .L906: +2380:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** } + 13479 .loc 1 2380 12 view .LVU4052 + 13480 01f4 3000 movs r0, r6 + 13481 .LVL1080: +2380:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** } + 13482 .loc 1 2380 12 view .LVU4053 + 13483 01f6 00E0 b .L890 + 13484 .LVL1081: + 13485 .L907: +2397:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** } + 13486 .loc 1 2397 12 view .LVU4054 + 13487 01f8 0120 movs r0, #1 + 13488 .LVL1082: + 13489 .L890: +2510:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 13490 .loc 1 2510 1 view .LVU4055 + 13491 01fa 03B0 add sp, sp, #12 + 13492 @ sp needed + 13493 .LVL1083: + 13494 .LVL1084: + 13495 .LVL1085: + 13496 .LVL1086: +2510:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 13497 .loc 1 2510 1 view .LVU4056 + 13498 01fc F0BD pop {r4, r5, r6, r7, pc} + 13499 .LVL1087: + 13500 .L908: +2387:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** } + 13501 .loc 1 2387 14 view .LVU4057 + ARM GAS /tmp/ccMtK8ce.s page 432 + + + 13502 01fe 3000 movs r0, r6 + 13503 .LVL1088: +2387:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** } + 13504 .loc 1 2387 14 view .LVU4058 + 13505 0200 FBE7 b .L890 + 13506 .LVL1089: + 13507 .L909: +2387:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** } + 13508 .loc 1 2387 14 view .LVU4059 + 13509 0202 3000 movs r0, r6 + 13510 .LVL1090: +2387:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** } + 13511 .loc 1 2387 14 view .LVU4060 + 13512 0204 F9E7 b .L890 + 13513 .LVL1091: + 13514 .L910: +2419:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** } + 13515 .loc 1 2419 16 view .LVU4061 + 13516 0206 3000 movs r0, r6 + 13517 0208 F7E7 b .L890 + 13518 .L911: +2440:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** } + 13519 .loc 1 2440 16 view .LVU4062 + 13520 020a 3000 movs r0, r6 + 13521 020c F5E7 b .L890 + 13522 .L912: +2461:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** } + 13523 .loc 1 2461 16 view .LVU4063 + 13524 020e 3000 movs r0, r6 + 13525 0210 F3E7 b .L890 + 13526 .L913: +2482:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** } + 13527 .loc 1 2482 16 view .LVU4064 + 13528 0212 3000 movs r0, r6 + 13529 0214 F1E7 b .L890 + 13530 .L925: + 13531 0216 C046 .align 2 + 13532 .L924: + 13533 0218 00000000 .word TIM_DMACaptureCplt + 13534 021c 00000000 .word TIM_DMACaptureHalfCplt + 13535 0220 00000000 .word TIM_DMAError + 13536 0224 002C0140 .word 1073818624 + 13537 0228 00040040 .word 1073742848 + 13538 .cfi_endproc + 13539 .LFE78: + 13541 .section .text.HAL_TIM_IC_Stop_DMA,"ax",%progbits + 13542 .align 1 + 13543 .global HAL_TIM_IC_Stop_DMA + 13544 .syntax unified + 13545 .code 16 + 13546 .thumb_func + 13548 HAL_TIM_IC_Stop_DMA: + 13549 .LVL1092: + 13550 .LFB79: +2524:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** HAL_StatusTypeDef status = HAL_OK; + 13551 .loc 1 2524 1 is_stmt 1 view -0 + 13552 .cfi_startproc + ARM GAS /tmp/ccMtK8ce.s page 433 + + + 13553 @ args = 0, pretend = 0, frame = 0 + 13554 @ frame_needed = 0, uses_anonymous_args = 0 +2524:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** HAL_StatusTypeDef status = HAL_OK; + 13555 .loc 1 2524 1 is_stmt 0 view .LVU4066 + 13556 0000 70B5 push {r4, r5, r6, lr} + 13557 .cfi_def_cfa_offset 16 + 13558 .cfi_offset 4, -16 + 13559 .cfi_offset 5, -12 + 13560 .cfi_offset 6, -8 + 13561 .cfi_offset 14, -4 + 13562 0002 0500 movs r5, r0 + 13563 0004 0C00 movs r4, r1 +2525:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 13564 .loc 1 2525 3 is_stmt 1 view .LVU4067 + 13565 .LVL1093: +2528:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** assert_param(IS_TIM_DMA_CC_INSTANCE(htim->Instance)); + 13566 .loc 1 2528 3 view .LVU4068 +2529:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 13567 .loc 1 2529 3 view .LVU4069 +2532:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 13568 .loc 1 2532 3 view .LVU4070 + 13569 0006 0068 ldr r0, [r0] + 13570 .LVL1094: +2532:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 13571 .loc 1 2532 3 is_stmt 0 view .LVU4071 + 13572 0008 0022 movs r2, #0 + 13573 000a FFF7FEFF bl TIM_CCxChannelCmd + 13574 .LVL1095: +2534:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** { + 13575 .loc 1 2534 3 is_stmt 1 view .LVU4072 + 13576 000e 082C cmp r4, #8 + 13577 0010 3AD0 beq .L927 + 13578 0012 0ED8 bhi .L928 + 13579 0014 002C cmp r4, #0 + 13580 0016 19D0 beq .L929 + 13581 0018 042C cmp r4, #4 + 13582 001a 08D1 bne .L941 +2547:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** (void)HAL_DMA_Abort_IT(htim->hdma[TIM_DMA_ID_CC2]); + 13583 .loc 1 2547 7 view .LVU4073 + 13584 001c 2A68 ldr r2, [r5] + 13585 001e D368 ldr r3, [r2, #12] + 13586 0020 2F49 ldr r1, .L947 + 13587 0022 0B40 ands r3, r1 + 13588 0024 D360 str r3, [r2, #12] +2548:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** break; + 13589 .loc 1 2548 7 view .LVU4074 +2548:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** break; + 13590 .loc 1 2548 13 is_stmt 0 view .LVU4075 + 13591 0026 A86A ldr r0, [r5, #40] + 13592 0028 FFF7FEFF bl HAL_DMA_Abort_IT + 13593 .LVL1096: +2549:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** } + 13594 .loc 1 2549 7 is_stmt 1 view .LVU4076 +2573:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** { + 13595 .loc 1 2573 3 view .LVU4077 + 13596 002c 16E0 b .L933 + 13597 .L941: + ARM GAS /tmp/ccMtK8ce.s page 434 + + +2534:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** { + 13598 .loc 1 2534 3 is_stmt 0 view .LVU4078 + 13599 002e 0120 movs r0, #1 + 13600 0030 29E0 b .L931 + 13601 .L928: + 13602 0032 0C2C cmp r4, #12 + 13603 0034 08D1 bne .L942 +2563:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** (void)HAL_DMA_Abort_IT(htim->hdma[TIM_DMA_ID_CC4]); + 13604 .loc 1 2563 7 is_stmt 1 view .LVU4079 + 13605 0036 2A68 ldr r2, [r5] + 13606 0038 D368 ldr r3, [r2, #12] + 13607 003a 2A49 ldr r1, .L947+4 + 13608 003c 0B40 ands r3, r1 + 13609 003e D360 str r3, [r2, #12] +2564:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** break; + 13610 .loc 1 2564 7 view .LVU4080 +2564:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** break; + 13611 .loc 1 2564 13 is_stmt 0 view .LVU4081 + 13612 0040 286B ldr r0, [r5, #48] + 13613 0042 FFF7FEFF bl HAL_DMA_Abort_IT + 13614 .LVL1097: +2565:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** } + 13615 .loc 1 2565 7 is_stmt 1 view .LVU4082 +2573:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** { + 13616 .loc 1 2573 3 view .LVU4083 + 13617 0046 09E0 b .L933 + 13618 .L942: +2534:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** { + 13619 .loc 1 2534 3 is_stmt 0 view .LVU4084 + 13620 0048 0120 movs r0, #1 + 13621 004a 1CE0 b .L931 + 13622 .L929: +2539:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** (void)HAL_DMA_Abort_IT(htim->hdma[TIM_DMA_ID_CC1]); + 13623 .loc 1 2539 7 is_stmt 1 view .LVU4085 + 13624 004c 2A68 ldr r2, [r5] + 13625 004e D368 ldr r3, [r2, #12] + 13626 0050 2549 ldr r1, .L947+8 + 13627 0052 0B40 ands r3, r1 + 13628 0054 D360 str r3, [r2, #12] +2540:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** break; + 13629 .loc 1 2540 7 view .LVU4086 +2540:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** break; + 13630 .loc 1 2540 13 is_stmt 0 view .LVU4087 + 13631 0056 686A ldr r0, [r5, #36] + 13632 0058 FFF7FEFF bl HAL_DMA_Abort_IT + 13633 .LVL1098: +2541:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** } + 13634 .loc 1 2541 7 is_stmt 1 view .LVU4088 +2573:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** { + 13635 .loc 1 2573 3 view .LVU4089 + 13636 .L933: +2576:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 13637 .loc 1 2576 5 view .LVU4090 +2576:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 13638 .loc 1 2576 5 view .LVU4091 + 13639 005c 2B68 ldr r3, [r5] + 13640 005e 196A ldr r1, [r3, #32] + ARM GAS /tmp/ccMtK8ce.s page 435 + + + 13641 0060 224A ldr r2, .L947+12 + 13642 0062 1142 tst r1, r2 + 13643 0064 07D1 bne .L934 +2576:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 13644 .loc 1 2576 5 discriminator 1 view .LVU4092 + 13645 0066 196A ldr r1, [r3, #32] + 13646 0068 214A ldr r2, .L947+16 + 13647 006a 1142 tst r1, r2 + 13648 006c 03D1 bne .L934 +2576:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 13649 .loc 1 2576 5 discriminator 3 view .LVU4093 + 13650 006e 1A68 ldr r2, [r3] + 13651 0070 0121 movs r1, #1 + 13652 0072 8A43 bics r2, r1 + 13653 0074 1A60 str r2, [r3] + 13654 .L934: +2576:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 13655 .loc 1 2576 5 discriminator 5 view .LVU4094 +2579:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** TIM_CHANNEL_N_STATE_SET(htim, Channel, HAL_TIM_CHANNEL_STATE_READY); + 13656 .loc 1 2579 5 view .LVU4095 + 13657 0076 002C cmp r4, #0 + 13658 0078 0FD1 bne .L935 +2579:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** TIM_CHANNEL_N_STATE_SET(htim, Channel, HAL_TIM_CHANNEL_STATE_READY); + 13659 .loc 1 2579 5 is_stmt 0 discriminator 1 view .LVU4096 + 13660 007a 0123 movs r3, #1 + 13661 007c 3E22 movs r2, #62 + 13662 007e AB54 strb r3, [r5, r2] +2580:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** } + 13663 .loc 1 2580 5 is_stmt 1 view .LVU4097 +2580:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** } + 13664 .loc 1 2580 5 is_stmt 0 discriminator 1 view .LVU4098 + 13665 0080 0432 adds r2, r2, #4 + 13666 0082 AB54 strb r3, [r5, r2] + 13667 0084 0020 movs r0, #0 + 13668 .L931: + 13669 .LVL1099: +2584:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** } + 13670 .loc 1 2584 3 is_stmt 1 view .LVU4099 +2585:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** /** + 13671 .loc 1 2585 1 is_stmt 0 view .LVU4100 + 13672 @ sp needed + 13673 .LVL1100: + 13674 .LVL1101: +2585:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** /** + 13675 .loc 1 2585 1 view .LVU4101 + 13676 0086 70BD pop {r4, r5, r6, pc} + 13677 .LVL1102: + 13678 .L927: +2555:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** (void)HAL_DMA_Abort_IT(htim->hdma[TIM_DMA_ID_CC3]); + 13679 .loc 1 2555 7 is_stmt 1 view .LVU4102 + 13680 0088 2A68 ldr r2, [r5] + 13681 008a D368 ldr r3, [r2, #12] + 13682 008c 1949 ldr r1, .L947+20 + 13683 008e 0B40 ands r3, r1 + 13684 0090 D360 str r3, [r2, #12] +2556:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** break; + 13685 .loc 1 2556 7 view .LVU4103 + ARM GAS /tmp/ccMtK8ce.s page 436 + + +2556:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** break; + 13686 .loc 1 2556 13 is_stmt 0 view .LVU4104 + 13687 0092 E86A ldr r0, [r5, #44] + 13688 0094 FFF7FEFF bl HAL_DMA_Abort_IT + 13689 .LVL1103: +2557:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** } + 13690 .loc 1 2557 7 is_stmt 1 view .LVU4105 +2573:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** { + 13691 .loc 1 2573 3 view .LVU4106 + 13692 0098 E0E7 b .L933 + 13693 .L935: +2579:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** TIM_CHANNEL_N_STATE_SET(htim, Channel, HAL_TIM_CHANNEL_STATE_READY); + 13694 .loc 1 2579 5 is_stmt 0 discriminator 2 view .LVU4107 + 13695 009a 042C cmp r4, #4 + 13696 009c 0DD0 beq .L943 +2579:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** TIM_CHANNEL_N_STATE_SET(htim, Channel, HAL_TIM_CHANNEL_STATE_READY); + 13697 .loc 1 2579 5 discriminator 4 view .LVU4108 + 13698 009e 082C cmp r4, #8 + 13699 00a0 0FD0 beq .L944 +2579:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** TIM_CHANNEL_N_STATE_SET(htim, Channel, HAL_TIM_CHANNEL_STATE_READY); + 13700 .loc 1 2579 5 discriminator 7 view .LVU4109 + 13701 00a2 4123 movs r3, #65 + 13702 00a4 0122 movs r2, #1 + 13703 00a6 EA54 strb r2, [r5, r3] +2580:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** } + 13704 .loc 1 2580 5 is_stmt 1 view .LVU4110 + 13705 .L937: +2580:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** } + 13706 .loc 1 2580 5 is_stmt 0 discriminator 2 view .LVU4111 + 13707 00a8 042C cmp r4, #4 + 13708 00aa 0ED0 beq .L945 +2580:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** } + 13709 .loc 1 2580 5 discriminator 4 view .LVU4112 + 13710 00ac 082C cmp r4, #8 + 13711 00ae 11D0 beq .L946 +2580:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** } + 13712 .loc 1 2580 5 discriminator 7 view .LVU4113 + 13713 00b0 4523 movs r3, #69 + 13714 00b2 0122 movs r2, #1 + 13715 00b4 EA54 strb r2, [r5, r3] + 13716 00b6 0020 movs r0, #0 + 13717 00b8 E5E7 b .L931 + 13718 .L943: +2579:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** TIM_CHANNEL_N_STATE_SET(htim, Channel, HAL_TIM_CHANNEL_STATE_READY); + 13719 .loc 1 2579 5 discriminator 3 view .LVU4114 + 13720 00ba 3F23 movs r3, #63 + 13721 00bc 0122 movs r2, #1 + 13722 00be EA54 strb r2, [r5, r3] +2580:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** } + 13723 .loc 1 2580 5 is_stmt 1 view .LVU4115 + 13724 00c0 F2E7 b .L937 + 13725 .L944: +2579:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** TIM_CHANNEL_N_STATE_SET(htim, Channel, HAL_TIM_CHANNEL_STATE_READY); + 13726 .loc 1 2579 5 is_stmt 0 discriminator 6 view .LVU4116 + 13727 00c2 4023 movs r3, #64 + 13728 00c4 0122 movs r2, #1 + 13729 00c6 EA54 strb r2, [r5, r3] + ARM GAS /tmp/ccMtK8ce.s page 437 + + +2580:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** } + 13730 .loc 1 2580 5 is_stmt 1 view .LVU4117 + 13731 00c8 EEE7 b .L937 + 13732 .L945: +2580:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** } + 13733 .loc 1 2580 5 is_stmt 0 discriminator 3 view .LVU4118 + 13734 00ca 4323 movs r3, #67 + 13735 00cc 0122 movs r2, #1 + 13736 00ce EA54 strb r2, [r5, r3] + 13737 00d0 0020 movs r0, #0 + 13738 00d2 D8E7 b .L931 + 13739 .L946: +2580:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** } + 13740 .loc 1 2580 5 discriminator 6 view .LVU4119 + 13741 00d4 4423 movs r3, #68 + 13742 00d6 0122 movs r2, #1 + 13743 00d8 EA54 strb r2, [r5, r3] + 13744 00da 0020 movs r0, #0 + 13745 00dc D3E7 b .L931 + 13746 .L948: + 13747 00de C046 .align 2 + 13748 .L947: + 13749 00e0 FFFBFFFF .word -1025 + 13750 00e4 FFEFFFFF .word -4097 + 13751 00e8 FFFDFFFF .word -513 + 13752 00ec 11110000 .word 4369 + 13753 00f0 44040000 .word 1092 + 13754 00f4 FFF7FFFF .word -2049 + 13755 .cfi_endproc + 13756 .LFE79: + 13758 .section .text.HAL_TIM_OnePulse_Start,"ax",%progbits + 13759 .align 1 + 13760 .global HAL_TIM_OnePulse_Start + 13761 .syntax unified + 13762 .code 16 + 13763 .thumb_func + 13765 HAL_TIM_OnePulse_Start: + 13766 .LVL1104: + 13767 .LFB84: +2778:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** HAL_TIM_ChannelStateTypeDef channel_1_state = TIM_CHANNEL_STATE_GET(htim, TIM_CHANNEL_1); + 13768 .loc 1 2778 1 is_stmt 1 view -0 + 13769 .cfi_startproc + 13770 @ args = 0, pretend = 0, frame = 0 + 13771 @ frame_needed = 0, uses_anonymous_args = 0 +2778:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** HAL_TIM_ChannelStateTypeDef channel_1_state = TIM_CHANNEL_STATE_GET(htim, TIM_CHANNEL_1); + 13772 .loc 1 2778 1 is_stmt 0 view .LVU4121 + 13773 0000 70B5 push {r4, r5, r6, lr} + 13774 .cfi_def_cfa_offset 16 + 13775 .cfi_offset 4, -16 + 13776 .cfi_offset 5, -12 + 13777 .cfi_offset 6, -8 + 13778 .cfi_offset 14, -4 + 13779 0002 0400 movs r4, r0 +2779:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** HAL_TIM_ChannelStateTypeDef channel_2_state = TIM_CHANNEL_STATE_GET(htim, TIM_CHANNEL_2); + 13780 .loc 1 2779 3 is_stmt 1 view .LVU4122 +2779:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** HAL_TIM_ChannelStateTypeDef channel_2_state = TIM_CHANNEL_STATE_GET(htim, TIM_CHANNEL_2); + 13781 .loc 1 2779 31 is_stmt 0 view .LVU4123 + ARM GAS /tmp/ccMtK8ce.s page 438 + + + 13782 0004 3E23 movs r3, #62 + 13783 0006 C55C ldrb r5, [r0, r3] + 13784 0008 E8B2 uxtb r0, r5 + 13785 .LVL1105: +2780:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** HAL_TIM_ChannelStateTypeDef complementary_channel_1_state = TIM_CHANNEL_N_STATE_GET(htim, TIM_CHA + 13786 .loc 1 2780 3 is_stmt 1 view .LVU4124 +2780:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** HAL_TIM_ChannelStateTypeDef complementary_channel_1_state = TIM_CHANNEL_N_STATE_GET(htim, TIM_CHA + 13787 .loc 1 2780 31 is_stmt 0 view .LVU4125 + 13788 000a 0133 adds r3, r3, #1 + 13789 000c E35C ldrb r3, [r4, r3] + 13790 000e DBB2 uxtb r3, r3 + 13791 .LVL1106: +2781:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** HAL_TIM_ChannelStateTypeDef complementary_channel_2_state = TIM_CHANNEL_N_STATE_GET(htim, TIM_CHA + 13792 .loc 1 2781 3 is_stmt 1 view .LVU4126 +2781:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** HAL_TIM_ChannelStateTypeDef complementary_channel_2_state = TIM_CHANNEL_N_STATE_GET(htim, TIM_CHA + 13793 .loc 1 2781 31 is_stmt 0 view .LVU4127 + 13794 0010 4222 movs r2, #66 + 13795 0012 A25C ldrb r2, [r4, r2] + 13796 0014 D2B2 uxtb r2, r2 + 13797 .LVL1107: +2782:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 13798 .loc 1 2782 3 is_stmt 1 view .LVU4128 +2782:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 13799 .loc 1 2782 31 is_stmt 0 view .LVU4129 + 13800 0016 4321 movs r1, #67 + 13801 .LVL1108: +2782:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 13802 .loc 1 2782 31 view .LVU4130 + 13803 0018 615C ldrb r1, [r4, r1] + 13804 001a C9B2 uxtb r1, r1 + 13805 .LVL1109: +2785:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 13806 .loc 1 2785 3 is_stmt 1 view .LVU4131 +2788:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** || (channel_2_state != HAL_TIM_CHANNEL_STATE_READY) + 13807 .loc 1 2788 3 view .LVU4132 +2788:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** || (channel_2_state != HAL_TIM_CHANNEL_STATE_READY) + 13808 .loc 1 2788 6 is_stmt 0 view .LVU4133 + 13809 001c 012D cmp r5, #1 + 13810 001e 2DD1 bne .L952 +2789:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** || (complementary_channel_1_state != HAL_TIM_CHANNEL_STATE_READY) + 13811 .loc 1 2789 7 view .LVU4134 + 13812 0020 012B cmp r3, #1 + 13813 0022 2CD1 bne .L950 +2790:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** || (complementary_channel_2_state != HAL_TIM_CHANNEL_STATE_READY)) + 13814 .loc 1 2790 7 view .LVU4135 + 13815 0024 012A cmp r2, #1 + 13816 0026 2BD1 bne .L953 +2791:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** { + 13817 .loc 1 2791 7 view .LVU4136 + 13818 0028 0129 cmp r1, #1 + 13819 002a 01D0 beq .L956 +2793:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** } + 13820 .loc 1 2793 12 view .LVU4137 + 13821 002c 1000 movs r0, r2 + 13822 .LVL1110: +2793:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** } + 13823 .loc 1 2793 12 view .LVU4138 + ARM GAS /tmp/ccMtK8ce.s page 439 + + + 13824 002e 26E0 b .L950 + 13825 .LVL1111: + 13826 .L956: +2797:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** TIM_CHANNEL_STATE_SET(htim, TIM_CHANNEL_2, HAL_TIM_CHANNEL_STATE_BUSY); + 13827 .loc 1 2797 3 is_stmt 1 view .LVU4139 + 13828 0030 0133 adds r3, r3, #1 + 13829 .LVL1112: +2797:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** TIM_CHANNEL_STATE_SET(htim, TIM_CHANNEL_2, HAL_TIM_CHANNEL_STATE_BUSY); + 13830 .loc 1 2797 3 is_stmt 0 view .LVU4140 + 13831 0032 3D32 adds r2, r2, #61 + 13832 .LVL1113: +2797:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** TIM_CHANNEL_STATE_SET(htim, TIM_CHANNEL_2, HAL_TIM_CHANNEL_STATE_BUSY); + 13833 .loc 1 2797 3 view .LVU4141 + 13834 0034 A354 strb r3, [r4, r2] +2798:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** TIM_CHANNEL_N_STATE_SET(htim, TIM_CHANNEL_1, HAL_TIM_CHANNEL_STATE_BUSY); + 13835 .loc 1 2798 3 is_stmt 1 view .LVU4142 + 13836 0036 0132 adds r2, r2, #1 + 13837 .LVL1114: +2798:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** TIM_CHANNEL_N_STATE_SET(htim, TIM_CHANNEL_1, HAL_TIM_CHANNEL_STATE_BUSY); + 13838 .loc 1 2798 3 is_stmt 0 view .LVU4143 + 13839 0038 A354 strb r3, [r4, r2] +2799:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** TIM_CHANNEL_N_STATE_SET(htim, TIM_CHANNEL_2, HAL_TIM_CHANNEL_STATE_BUSY); + 13840 .loc 1 2799 3 is_stmt 1 view .LVU4144 + 13841 003a 0332 adds r2, r2, #3 + 13842 .LVL1115: +2799:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** TIM_CHANNEL_N_STATE_SET(htim, TIM_CHANNEL_2, HAL_TIM_CHANNEL_STATE_BUSY); + 13843 .loc 1 2799 3 is_stmt 0 view .LVU4145 + 13844 003c A354 strb r3, [r4, r2] +2800:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 13845 .loc 1 2800 3 is_stmt 1 view .LVU4146 + 13846 003e 0132 adds r2, r2, #1 + 13847 .LVL1116: +2800:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 13848 .loc 1 2800 3 is_stmt 0 view .LVU4147 + 13849 0040 A354 strb r3, [r4, r2] +2811:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** TIM_CCxChannelCmd(htim->Instance, TIM_CHANNEL_2, TIM_CCx_ENABLE); + 13850 .loc 1 2811 3 is_stmt 1 view .LVU4148 + 13851 0042 2068 ldr r0, [r4] + 13852 .LVL1117: +2811:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** TIM_CCxChannelCmd(htim->Instance, TIM_CHANNEL_2, TIM_CCx_ENABLE); + 13853 .loc 1 2811 3 is_stmt 0 view .LVU4149 + 13854 0044 423A subs r2, r2, #66 + 13855 .LVL1118: +2811:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** TIM_CCxChannelCmd(htim->Instance, TIM_CHANNEL_2, TIM_CCx_ENABLE); + 13856 .loc 1 2811 3 view .LVU4150 + 13857 0046 0021 movs r1, #0 + 13858 .LVL1119: +2811:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** TIM_CCxChannelCmd(htim->Instance, TIM_CHANNEL_2, TIM_CCx_ENABLE); + 13859 .loc 1 2811 3 view .LVU4151 + 13860 0048 FFF7FEFF bl TIM_CCxChannelCmd + 13861 .LVL1120: +2812:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 13862 .loc 1 2812 3 is_stmt 1 view .LVU4152 + 13863 004c 2068 ldr r0, [r4] + 13864 004e 0122 movs r2, #1 + 13865 0050 0421 movs r1, #4 + 13866 0052 FFF7FEFF bl TIM_CCxChannelCmd + ARM GAS /tmp/ccMtK8ce.s page 440 + + + 13867 .LVL1121: +2814:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** { + 13868 .loc 1 2814 3 view .LVU4153 +2814:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** { + 13869 .loc 1 2814 7 is_stmt 0 view .LVU4154 + 13870 0056 2368 ldr r3, [r4] + 13871 0058 0A4A ldr r2, .L957 + 13872 005a 9342 cmp r3, r2 + 13873 005c 07D0 beq .L951 +2814:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** { + 13874 .loc 1 2814 7 discriminator 2 view .LVU4155 + 13875 005e 0A4A ldr r2, .L957+4 + 13876 0060 9342 cmp r3, r2 + 13877 0062 04D0 beq .L951 +2814:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** { + 13878 .loc 1 2814 7 discriminator 4 view .LVU4156 + 13879 0064 094A ldr r2, .L957+8 + 13880 0066 9342 cmp r3, r2 + 13881 0068 01D0 beq .L951 +2821:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** } + 13882 .loc 1 2821 10 view .LVU4157 + 13883 006a 0020 movs r0, #0 + 13884 006c 07E0 b .L950 + 13885 .L951: +2817:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** } + 13886 .loc 1 2817 5 is_stmt 1 view .LVU4158 + 13887 006e 596C ldr r1, [r3, #68] + 13888 0070 8022 movs r2, #128 + 13889 0072 1202 lsls r2, r2, #8 + 13890 0074 0A43 orrs r2, r1 + 13891 0076 5A64 str r2, [r3, #68] +2821:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** } + 13892 .loc 1 2821 10 is_stmt 0 view .LVU4159 + 13893 0078 0020 movs r0, #0 + 13894 007a 00E0 b .L950 + 13895 .LVL1122: + 13896 .L952: +2793:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** } + 13897 .loc 1 2793 12 view .LVU4160 + 13898 007c 0120 movs r0, #1 + 13899 .LVL1123: + 13900 .L950: +2822:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 13901 .loc 1 2822 1 view .LVU4161 + 13902 @ sp needed + 13903 .LVL1124: + 13904 .LVL1125: +2822:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 13905 .loc 1 2822 1 view .LVU4162 + 13906 007e 70BD pop {r4, r5, r6, pc} + 13907 .LVL1126: + 13908 .L953: +2793:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** } + 13909 .loc 1 2793 12 view .LVU4163 + 13910 0080 1800 movs r0, r3 + 13911 .LVL1127: +2793:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** } + ARM GAS /tmp/ccMtK8ce.s page 441 + + + 13912 .loc 1 2793 12 view .LVU4164 + 13913 0082 FCE7 b .L950 + 13914 .L958: + 13915 .align 2 + 13916 .L957: + 13917 0084 002C0140 .word 1073818624 + 13918 0088 00440140 .word 1073824768 + 13919 008c 00480140 .word 1073825792 + 13920 .cfi_endproc + 13921 .LFE84: + 13923 .section .text.HAL_TIM_OnePulse_Stop,"ax",%progbits + 13924 .align 1 + 13925 .global HAL_TIM_OnePulse_Stop + 13926 .syntax unified + 13927 .code 16 + 13928 .thumb_func + 13930 HAL_TIM_OnePulse_Stop: + 13931 .LVL1128: + 13932 .LFB85: +2835:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** /* Prevent unused argument(s) compilation warning */ + 13933 .loc 1 2835 1 is_stmt 1 view -0 + 13934 .cfi_startproc + 13935 @ args = 0, pretend = 0, frame = 0 + 13936 @ frame_needed = 0, uses_anonymous_args = 0 +2835:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** /* Prevent unused argument(s) compilation warning */ + 13937 .loc 1 2835 1 is_stmt 0 view .LVU4166 + 13938 0000 10B5 push {r4, lr} + 13939 .cfi_def_cfa_offset 8 + 13940 .cfi_offset 4, -8 + 13941 .cfi_offset 14, -4 + 13942 0002 0400 movs r4, r0 +2837:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 13943 .loc 1 2837 3 is_stmt 1 view .LVU4167 +2845:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** TIM_CCxChannelCmd(htim->Instance, TIM_CHANNEL_2, TIM_CCx_DISABLE); + 13944 .loc 1 2845 3 view .LVU4168 + 13945 0004 0068 ldr r0, [r0] + 13946 .LVL1129: +2845:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** TIM_CCxChannelCmd(htim->Instance, TIM_CHANNEL_2, TIM_CCx_DISABLE); + 13947 .loc 1 2845 3 is_stmt 0 view .LVU4169 + 13948 0006 0022 movs r2, #0 + 13949 0008 0021 movs r1, #0 + 13950 .LVL1130: +2845:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** TIM_CCxChannelCmd(htim->Instance, TIM_CHANNEL_2, TIM_CCx_DISABLE); + 13951 .loc 1 2845 3 view .LVU4170 + 13952 000a FFF7FEFF bl TIM_CCxChannelCmd + 13953 .LVL1131: +2846:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 13954 .loc 1 2846 3 is_stmt 1 view .LVU4171 + 13955 000e 2068 ldr r0, [r4] + 13956 0010 0022 movs r2, #0 + 13957 0012 0421 movs r1, #4 + 13958 0014 FFF7FEFF bl TIM_CCxChannelCmd + 13959 .LVL1132: +2848:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** { + 13960 .loc 1 2848 3 view .LVU4172 +2848:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** { + 13961 .loc 1 2848 7 is_stmt 0 view .LVU4173 + ARM GAS /tmp/ccMtK8ce.s page 442 + + + 13962 0018 2368 ldr r3, [r4] + 13963 001a 174A ldr r2, .L963 + 13964 001c 9342 cmp r3, r2 + 13965 001e 1DD0 beq .L960 +2848:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** { + 13966 .loc 1 2848 7 discriminator 2 view .LVU4174 + 13967 0020 164A ldr r2, .L963+4 + 13968 0022 9342 cmp r3, r2 + 13969 0024 1AD0 beq .L960 +2848:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** { + 13970 .loc 1 2848 7 discriminator 4 view .LVU4175 + 13971 0026 164A ldr r2, .L963+8 + 13972 0028 9342 cmp r3, r2 + 13973 002a 17D0 beq .L960 + 13974 .L961: +2851:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** } + 13975 .loc 1 2851 5 is_stmt 1 discriminator 5 view .LVU4176 +2855:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 13976 .loc 1 2855 3 view .LVU4177 +2855:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 13977 .loc 1 2855 3 view .LVU4178 + 13978 002c 2368 ldr r3, [r4] + 13979 002e 196A ldr r1, [r3, #32] + 13980 0030 144A ldr r2, .L963+12 + 13981 0032 1142 tst r1, r2 + 13982 0034 07D1 bne .L962 +2855:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 13983 .loc 1 2855 3 discriminator 1 view .LVU4179 + 13984 0036 196A ldr r1, [r3, #32] + 13985 0038 134A ldr r2, .L963+16 + 13986 003a 1142 tst r1, r2 + 13987 003c 03D1 bne .L962 +2855:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 13988 .loc 1 2855 3 discriminator 3 view .LVU4180 + 13989 003e 1A68 ldr r2, [r3] + 13990 0040 0121 movs r1, #1 + 13991 0042 8A43 bics r2, r1 + 13992 0044 1A60 str r2, [r3] + 13993 .L962: +2855:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 13994 .loc 1 2855 3 discriminator 5 view .LVU4181 +2858:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** TIM_CHANNEL_STATE_SET(htim, TIM_CHANNEL_2, HAL_TIM_CHANNEL_STATE_READY); + 13995 .loc 1 2858 3 view .LVU4182 + 13996 0046 0123 movs r3, #1 + 13997 0048 3E22 movs r2, #62 + 13998 004a A354 strb r3, [r4, r2] +2859:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** TIM_CHANNEL_N_STATE_SET(htim, TIM_CHANNEL_1, HAL_TIM_CHANNEL_STATE_READY); + 13999 .loc 1 2859 3 view .LVU4183 + 14000 004c 0132 adds r2, r2, #1 + 14001 004e A354 strb r3, [r4, r2] +2860:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** TIM_CHANNEL_N_STATE_SET(htim, TIM_CHANNEL_2, HAL_TIM_CHANNEL_STATE_READY); + 14002 .loc 1 2860 3 view .LVU4184 + 14003 0050 0332 adds r2, r2, #3 + 14004 0052 A354 strb r3, [r4, r2] +2861:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 14005 .loc 1 2861 3 view .LVU4185 + 14006 0054 0132 adds r2, r2, #1 + ARM GAS /tmp/ccMtK8ce.s page 443 + + + 14007 0056 A354 strb r3, [r4, r2] +2864:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** } + 14008 .loc 1 2864 3 view .LVU4186 +2865:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 14009 .loc 1 2865 1 is_stmt 0 view .LVU4187 + 14010 0058 0020 movs r0, #0 + 14011 @ sp needed + 14012 .LVL1133: +2865:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 14013 .loc 1 2865 1 view .LVU4188 + 14014 005a 10BD pop {r4, pc} + 14015 .LVL1134: + 14016 .L960: +2851:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** } + 14017 .loc 1 2851 5 is_stmt 1 view .LVU4189 +2851:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** } + 14018 .loc 1 2851 5 view .LVU4190 + 14019 005c 196A ldr r1, [r3, #32] + 14020 005e 094A ldr r2, .L963+12 + 14021 0060 1142 tst r1, r2 + 14022 0062 E3D1 bne .L961 +2851:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** } + 14023 .loc 1 2851 5 discriminator 1 view .LVU4191 + 14024 0064 196A ldr r1, [r3, #32] + 14025 0066 084A ldr r2, .L963+16 + 14026 0068 1142 tst r1, r2 + 14027 006a DFD1 bne .L961 +2851:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** } + 14028 .loc 1 2851 5 discriminator 3 view .LVU4192 + 14029 006c 5A6C ldr r2, [r3, #68] + 14030 006e 0749 ldr r1, .L963+20 + 14031 0070 0A40 ands r2, r1 + 14032 0072 5A64 str r2, [r3, #68] + 14033 0074 DAE7 b .L961 + 14034 .L964: + 14035 0076 C046 .align 2 + 14036 .L963: + 14037 0078 002C0140 .word 1073818624 + 14038 007c 00440140 .word 1073824768 + 14039 0080 00480140 .word 1073825792 + 14040 0084 11110000 .word 4369 + 14041 0088 44040000 .word 1092 + 14042 008c FF7FFFFF .word -32769 + 14043 .cfi_endproc + 14044 .LFE85: + 14046 .section .text.HAL_TIM_OnePulse_Start_IT,"ax",%progbits + 14047 .align 1 + 14048 .global HAL_TIM_OnePulse_Start_IT + 14049 .syntax unified + 14050 .code 16 + 14051 .thumb_func + 14053 HAL_TIM_OnePulse_Start_IT: + 14054 .LVL1135: + 14055 .LFB86: +2878:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** HAL_TIM_ChannelStateTypeDef channel_1_state = TIM_CHANNEL_STATE_GET(htim, TIM_CHANNEL_1); + 14056 .loc 1 2878 1 view -0 + 14057 .cfi_startproc + ARM GAS /tmp/ccMtK8ce.s page 444 + + + 14058 @ args = 0, pretend = 0, frame = 0 + 14059 @ frame_needed = 0, uses_anonymous_args = 0 +2878:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** HAL_TIM_ChannelStateTypeDef channel_1_state = TIM_CHANNEL_STATE_GET(htim, TIM_CHANNEL_1); + 14060 .loc 1 2878 1 is_stmt 0 view .LVU4194 + 14061 0000 70B5 push {r4, r5, r6, lr} + 14062 .cfi_def_cfa_offset 16 + 14063 .cfi_offset 4, -16 + 14064 .cfi_offset 5, -12 + 14065 .cfi_offset 6, -8 + 14066 .cfi_offset 14, -4 + 14067 0002 0400 movs r4, r0 +2879:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** HAL_TIM_ChannelStateTypeDef channel_2_state = TIM_CHANNEL_STATE_GET(htim, TIM_CHANNEL_2); + 14068 .loc 1 2879 3 is_stmt 1 view .LVU4195 +2879:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** HAL_TIM_ChannelStateTypeDef channel_2_state = TIM_CHANNEL_STATE_GET(htim, TIM_CHANNEL_2); + 14069 .loc 1 2879 31 is_stmt 0 view .LVU4196 + 14070 0004 3E23 movs r3, #62 + 14071 0006 C55C ldrb r5, [r0, r3] + 14072 0008 E8B2 uxtb r0, r5 + 14073 .LVL1136: +2880:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** HAL_TIM_ChannelStateTypeDef complementary_channel_1_state = TIM_CHANNEL_N_STATE_GET(htim, TIM_CHA + 14074 .loc 1 2880 3 is_stmt 1 view .LVU4197 +2880:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** HAL_TIM_ChannelStateTypeDef complementary_channel_1_state = TIM_CHANNEL_N_STATE_GET(htim, TIM_CHA + 14075 .loc 1 2880 31 is_stmt 0 view .LVU4198 + 14076 000a 0133 adds r3, r3, #1 + 14077 000c E35C ldrb r3, [r4, r3] + 14078 000e DBB2 uxtb r3, r3 + 14079 .LVL1137: +2881:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** HAL_TIM_ChannelStateTypeDef complementary_channel_2_state = TIM_CHANNEL_N_STATE_GET(htim, TIM_CHA + 14080 .loc 1 2881 3 is_stmt 1 view .LVU4199 +2881:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** HAL_TIM_ChannelStateTypeDef complementary_channel_2_state = TIM_CHANNEL_N_STATE_GET(htim, TIM_CHA + 14081 .loc 1 2881 31 is_stmt 0 view .LVU4200 + 14082 0010 4222 movs r2, #66 + 14083 0012 A25C ldrb r2, [r4, r2] + 14084 0014 D2B2 uxtb r2, r2 + 14085 .LVL1138: +2882:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 14086 .loc 1 2882 3 is_stmt 1 view .LVU4201 +2882:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 14087 .loc 1 2882 31 is_stmt 0 view .LVU4202 + 14088 0016 4321 movs r1, #67 + 14089 .LVL1139: +2882:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 14090 .loc 1 2882 31 view .LVU4203 + 14091 0018 615C ldrb r1, [r4, r1] + 14092 001a C9B2 uxtb r1, r1 + 14093 .LVL1140: +2885:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 14094 .loc 1 2885 3 is_stmt 1 view .LVU4204 +2888:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** || (channel_2_state != HAL_TIM_CHANNEL_STATE_READY) + 14095 .loc 1 2888 3 view .LVU4205 +2888:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** || (channel_2_state != HAL_TIM_CHANNEL_STATE_READY) + 14096 .loc 1 2888 6 is_stmt 0 view .LVU4206 + 14097 001c 012D cmp r5, #1 + 14098 001e 36D1 bne .L968 +2889:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** || (complementary_channel_1_state != HAL_TIM_CHANNEL_STATE_READY) + 14099 .loc 1 2889 7 view .LVU4207 + 14100 0020 012B cmp r3, #1 + ARM GAS /tmp/ccMtK8ce.s page 445 + + + 14101 0022 35D1 bne .L966 +2890:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** || (complementary_channel_2_state != HAL_TIM_CHANNEL_STATE_READY)) + 14102 .loc 1 2890 7 view .LVU4208 + 14103 0024 012A cmp r2, #1 + 14104 0026 34D1 bne .L969 +2891:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** { + 14105 .loc 1 2891 7 view .LVU4209 + 14106 0028 0129 cmp r1, #1 + 14107 002a 01D0 beq .L972 +2893:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** } + 14108 .loc 1 2893 12 view .LVU4210 + 14109 002c 1000 movs r0, r2 + 14110 .LVL1141: +2893:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** } + 14111 .loc 1 2893 12 view .LVU4211 + 14112 002e 2FE0 b .L966 + 14113 .LVL1142: + 14114 .L972: +2897:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** TIM_CHANNEL_STATE_SET(htim, TIM_CHANNEL_2, HAL_TIM_CHANNEL_STATE_BUSY); + 14115 .loc 1 2897 3 is_stmt 1 view .LVU4212 + 14116 0030 0133 adds r3, r3, #1 + 14117 .LVL1143: +2897:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** TIM_CHANNEL_STATE_SET(htim, TIM_CHANNEL_2, HAL_TIM_CHANNEL_STATE_BUSY); + 14118 .loc 1 2897 3 is_stmt 0 view .LVU4213 + 14119 0032 3D32 adds r2, r2, #61 + 14120 .LVL1144: +2897:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** TIM_CHANNEL_STATE_SET(htim, TIM_CHANNEL_2, HAL_TIM_CHANNEL_STATE_BUSY); + 14121 .loc 1 2897 3 view .LVU4214 + 14122 0034 A354 strb r3, [r4, r2] +2898:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** TIM_CHANNEL_N_STATE_SET(htim, TIM_CHANNEL_1, HAL_TIM_CHANNEL_STATE_BUSY); + 14123 .loc 1 2898 3 is_stmt 1 view .LVU4215 + 14124 0036 0132 adds r2, r2, #1 + 14125 .LVL1145: +2898:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** TIM_CHANNEL_N_STATE_SET(htim, TIM_CHANNEL_1, HAL_TIM_CHANNEL_STATE_BUSY); + 14126 .loc 1 2898 3 is_stmt 0 view .LVU4216 + 14127 0038 A354 strb r3, [r4, r2] +2899:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** TIM_CHANNEL_N_STATE_SET(htim, TIM_CHANNEL_2, HAL_TIM_CHANNEL_STATE_BUSY); + 14128 .loc 1 2899 3 is_stmt 1 view .LVU4217 + 14129 003a 0332 adds r2, r2, #3 + 14130 .LVL1146: +2899:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** TIM_CHANNEL_N_STATE_SET(htim, TIM_CHANNEL_2, HAL_TIM_CHANNEL_STATE_BUSY); + 14131 .loc 1 2899 3 is_stmt 0 view .LVU4218 + 14132 003c A354 strb r3, [r4, r2] +2900:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 14133 .loc 1 2900 3 is_stmt 1 view .LVU4219 + 14134 003e 0132 adds r2, r2, #1 + 14135 .LVL1147: +2900:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 14136 .loc 1 2900 3 is_stmt 0 view .LVU4220 + 14137 0040 A354 strb r3, [r4, r2] +2912:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 14138 .loc 1 2912 3 is_stmt 1 view .LVU4221 + 14139 0042 2168 ldr r1, [r4] + 14140 .LVL1148: +2912:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 14141 .loc 1 2912 3 is_stmt 0 view .LVU4222 + 14142 0044 CA68 ldr r2, [r1, #12] + ARM GAS /tmp/ccMtK8ce.s page 446 + + + 14143 .LVL1149: +2912:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 14144 .loc 1 2912 3 view .LVU4223 + 14145 0046 1343 orrs r3, r2 + 14146 .LVL1150: +2912:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 14147 .loc 1 2912 3 view .LVU4224 + 14148 0048 CB60 str r3, [r1, #12] +2915:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 14149 .loc 1 2915 3 is_stmt 1 view .LVU4225 + 14150 004a 2268 ldr r2, [r4] + 14151 004c D368 ldr r3, [r2, #12] + 14152 004e 0421 movs r1, #4 + 14153 0050 0B43 orrs r3, r1 + 14154 0052 D360 str r3, [r2, #12] +2917:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** TIM_CCxChannelCmd(htim->Instance, TIM_CHANNEL_2, TIM_CCx_ENABLE); + 14155 .loc 1 2917 3 view .LVU4226 + 14156 0054 2068 ldr r0, [r4] + 14157 .LVL1151: +2917:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** TIM_CCxChannelCmd(htim->Instance, TIM_CHANNEL_2, TIM_CCx_ENABLE); + 14158 .loc 1 2917 3 is_stmt 0 view .LVU4227 + 14159 0056 0122 movs r2, #1 + 14160 0058 0021 movs r1, #0 + 14161 005a FFF7FEFF bl TIM_CCxChannelCmd + 14162 .LVL1152: +2918:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 14163 .loc 1 2918 3 is_stmt 1 view .LVU4228 + 14164 005e 2068 ldr r0, [r4] + 14165 0060 0122 movs r2, #1 + 14166 0062 0421 movs r1, #4 + 14167 0064 FFF7FEFF bl TIM_CCxChannelCmd + 14168 .LVL1153: +2920:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** { + 14169 .loc 1 2920 3 view .LVU4229 +2920:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** { + 14170 .loc 1 2920 7 is_stmt 0 view .LVU4230 + 14171 0068 2368 ldr r3, [r4] + 14172 006a 0B4A ldr r2, .L973 + 14173 006c 9342 cmp r3, r2 + 14174 006e 07D0 beq .L967 +2920:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** { + 14175 .loc 1 2920 7 discriminator 2 view .LVU4231 + 14176 0070 0A4A ldr r2, .L973+4 + 14177 0072 9342 cmp r3, r2 + 14178 0074 04D0 beq .L967 +2920:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** { + 14179 .loc 1 2920 7 discriminator 4 view .LVU4232 + 14180 0076 0A4A ldr r2, .L973+8 + 14181 0078 9342 cmp r3, r2 + 14182 007a 01D0 beq .L967 +2927:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** } + 14183 .loc 1 2927 10 view .LVU4233 + 14184 007c 0020 movs r0, #0 + 14185 007e 07E0 b .L966 + 14186 .L967: +2923:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** } + 14187 .loc 1 2923 5 is_stmt 1 view .LVU4234 + ARM GAS /tmp/ccMtK8ce.s page 447 + + + 14188 0080 596C ldr r1, [r3, #68] + 14189 0082 8022 movs r2, #128 + 14190 0084 1202 lsls r2, r2, #8 + 14191 0086 0A43 orrs r2, r1 + 14192 0088 5A64 str r2, [r3, #68] +2927:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** } + 14193 .loc 1 2927 10 is_stmt 0 view .LVU4235 + 14194 008a 0020 movs r0, #0 + 14195 008c 00E0 b .L966 + 14196 .LVL1154: + 14197 .L968: +2893:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** } + 14198 .loc 1 2893 12 view .LVU4236 + 14199 008e 0120 movs r0, #1 + 14200 .LVL1155: + 14201 .L966: +2928:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 14202 .loc 1 2928 1 view .LVU4237 + 14203 @ sp needed + 14204 .LVL1156: + 14205 .LVL1157: +2928:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 14206 .loc 1 2928 1 view .LVU4238 + 14207 0090 70BD pop {r4, r5, r6, pc} + 14208 .LVL1158: + 14209 .L969: +2893:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** } + 14210 .loc 1 2893 12 view .LVU4239 + 14211 0092 1800 movs r0, r3 + 14212 .LVL1159: +2893:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** } + 14213 .loc 1 2893 12 view .LVU4240 + 14214 0094 FCE7 b .L966 + 14215 .L974: + 14216 0096 C046 .align 2 + 14217 .L973: + 14218 0098 002C0140 .word 1073818624 + 14219 009c 00440140 .word 1073824768 + 14220 00a0 00480140 .word 1073825792 + 14221 .cfi_endproc + 14222 .LFE86: + 14224 .section .text.HAL_TIM_OnePulse_Stop_IT,"ax",%progbits + 14225 .align 1 + 14226 .global HAL_TIM_OnePulse_Stop_IT + 14227 .syntax unified + 14228 .code 16 + 14229 .thumb_func + 14231 HAL_TIM_OnePulse_Stop_IT: + 14232 .LVL1160: + 14233 .LFB87: +2941:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** /* Prevent unused argument(s) compilation warning */ + 14234 .loc 1 2941 1 is_stmt 1 view -0 + 14235 .cfi_startproc + 14236 @ args = 0, pretend = 0, frame = 0 + 14237 @ frame_needed = 0, uses_anonymous_args = 0 +2941:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** /* Prevent unused argument(s) compilation warning */ + 14238 .loc 1 2941 1 is_stmt 0 view .LVU4242 + ARM GAS /tmp/ccMtK8ce.s page 448 + + + 14239 0000 10B5 push {r4, lr} + 14240 .cfi_def_cfa_offset 8 + 14241 .cfi_offset 4, -8 + 14242 .cfi_offset 14, -4 + 14243 0002 0400 movs r4, r0 +2943:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 14244 .loc 1 2943 3 is_stmt 1 view .LVU4243 +2946:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 14245 .loc 1 2946 3 view .LVU4244 + 14246 0004 0268 ldr r2, [r0] + 14247 0006 D368 ldr r3, [r2, #12] + 14248 0008 0221 movs r1, #2 + 14249 .LVL1161: +2946:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 14250 .loc 1 2946 3 is_stmt 0 view .LVU4245 + 14251 000a 8B43 bics r3, r1 + 14252 000c D360 str r3, [r2, #12] +2949:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 14253 .loc 1 2949 3 is_stmt 1 view .LVU4246 + 14254 000e 0268 ldr r2, [r0] + 14255 0010 D368 ldr r3, [r2, #12] + 14256 0012 0231 adds r1, r1, #2 + 14257 0014 8B43 bics r3, r1 + 14258 0016 D360 str r3, [r2, #12] +2956:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** TIM_CCxChannelCmd(htim->Instance, TIM_CHANNEL_2, TIM_CCx_DISABLE); + 14259 .loc 1 2956 3 view .LVU4247 + 14260 0018 0068 ldr r0, [r0] + 14261 .LVL1162: +2956:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** TIM_CCxChannelCmd(htim->Instance, TIM_CHANNEL_2, TIM_CCx_DISABLE); + 14262 .loc 1 2956 3 is_stmt 0 view .LVU4248 + 14263 001a 0022 movs r2, #0 + 14264 001c 0021 movs r1, #0 + 14265 001e FFF7FEFF bl TIM_CCxChannelCmd + 14266 .LVL1163: +2957:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 14267 .loc 1 2957 3 is_stmt 1 view .LVU4249 + 14268 0022 2068 ldr r0, [r4] + 14269 0024 0022 movs r2, #0 + 14270 0026 0421 movs r1, #4 + 14271 0028 FFF7FEFF bl TIM_CCxChannelCmd + 14272 .LVL1164: +2959:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** { + 14273 .loc 1 2959 3 view .LVU4250 +2959:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** { + 14274 .loc 1 2959 7 is_stmt 0 view .LVU4251 + 14275 002c 2368 ldr r3, [r4] + 14276 002e 174A ldr r2, .L979 + 14277 0030 9342 cmp r3, r2 + 14278 0032 1DD0 beq .L976 +2959:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** { + 14279 .loc 1 2959 7 discriminator 2 view .LVU4252 + 14280 0034 164A ldr r2, .L979+4 + 14281 0036 9342 cmp r3, r2 + 14282 0038 1AD0 beq .L976 +2959:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** { + 14283 .loc 1 2959 7 discriminator 4 view .LVU4253 + 14284 003a 164A ldr r2, .L979+8 + ARM GAS /tmp/ccMtK8ce.s page 449 + + + 14285 003c 9342 cmp r3, r2 + 14286 003e 17D0 beq .L976 + 14287 .L977: +2962:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** } + 14288 .loc 1 2962 5 is_stmt 1 discriminator 5 view .LVU4254 +2966:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 14289 .loc 1 2966 3 view .LVU4255 +2966:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 14290 .loc 1 2966 3 view .LVU4256 + 14291 0040 2368 ldr r3, [r4] + 14292 0042 196A ldr r1, [r3, #32] + 14293 0044 144A ldr r2, .L979+12 + 14294 0046 1142 tst r1, r2 + 14295 0048 07D1 bne .L978 +2966:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 14296 .loc 1 2966 3 discriminator 1 view .LVU4257 + 14297 004a 196A ldr r1, [r3, #32] + 14298 004c 134A ldr r2, .L979+16 + 14299 004e 1142 tst r1, r2 + 14300 0050 03D1 bne .L978 +2966:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 14301 .loc 1 2966 3 discriminator 3 view .LVU4258 + 14302 0052 1A68 ldr r2, [r3] + 14303 0054 0121 movs r1, #1 + 14304 0056 8A43 bics r2, r1 + 14305 0058 1A60 str r2, [r3] + 14306 .L978: +2966:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 14307 .loc 1 2966 3 discriminator 5 view .LVU4259 +2969:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** TIM_CHANNEL_STATE_SET(htim, TIM_CHANNEL_2, HAL_TIM_CHANNEL_STATE_READY); + 14308 .loc 1 2969 3 view .LVU4260 + 14309 005a 0123 movs r3, #1 + 14310 005c 3E22 movs r2, #62 + 14311 005e A354 strb r3, [r4, r2] +2970:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** TIM_CHANNEL_N_STATE_SET(htim, TIM_CHANNEL_1, HAL_TIM_CHANNEL_STATE_READY); + 14312 .loc 1 2970 3 view .LVU4261 + 14313 0060 0132 adds r2, r2, #1 + 14314 0062 A354 strb r3, [r4, r2] +2971:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** TIM_CHANNEL_N_STATE_SET(htim, TIM_CHANNEL_2, HAL_TIM_CHANNEL_STATE_READY); + 14315 .loc 1 2971 3 view .LVU4262 + 14316 0064 0332 adds r2, r2, #3 + 14317 0066 A354 strb r3, [r4, r2] +2972:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 14318 .loc 1 2972 3 view .LVU4263 + 14319 0068 0132 adds r2, r2, #1 + 14320 006a A354 strb r3, [r4, r2] +2975:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** } + 14321 .loc 1 2975 3 view .LVU4264 +2976:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 14322 .loc 1 2976 1 is_stmt 0 view .LVU4265 + 14323 006c 0020 movs r0, #0 + 14324 @ sp needed + 14325 .LVL1165: +2976:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 14326 .loc 1 2976 1 view .LVU4266 + 14327 006e 10BD pop {r4, pc} + 14328 .LVL1166: + ARM GAS /tmp/ccMtK8ce.s page 450 + + + 14329 .L976: +2962:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** } + 14330 .loc 1 2962 5 is_stmt 1 view .LVU4267 +2962:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** } + 14331 .loc 1 2962 5 view .LVU4268 + 14332 0070 196A ldr r1, [r3, #32] + 14333 0072 094A ldr r2, .L979+12 + 14334 0074 1142 tst r1, r2 + 14335 0076 E3D1 bne .L977 +2962:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** } + 14336 .loc 1 2962 5 discriminator 1 view .LVU4269 + 14337 0078 196A ldr r1, [r3, #32] + 14338 007a 084A ldr r2, .L979+16 + 14339 007c 1142 tst r1, r2 + 14340 007e DFD1 bne .L977 +2962:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** } + 14341 .loc 1 2962 5 discriminator 3 view .LVU4270 + 14342 0080 5A6C ldr r2, [r3, #68] + 14343 0082 0749 ldr r1, .L979+20 + 14344 0084 0A40 ands r2, r1 + 14345 0086 5A64 str r2, [r3, #68] + 14346 0088 DAE7 b .L977 + 14347 .L980: + 14348 008a C046 .align 2 + 14349 .L979: + 14350 008c 002C0140 .word 1073818624 + 14351 0090 00440140 .word 1073824768 + 14352 0094 00480140 .word 1073825792 + 14353 0098 11110000 .word 4369 + 14354 009c 44040000 .word 1092 + 14355 00a0 FF7FFFFF .word -32769 + 14356 .cfi_endproc + 14357 .LFE87: + 14359 .section .text.HAL_TIM_Encoder_Start,"ax",%progbits + 14360 .align 1 + 14361 .global HAL_TIM_Encoder_Start + 14362 .syntax unified + 14363 .code 16 + 14364 .thumb_func + 14366 HAL_TIM_Encoder_Start: + 14367 .LVL1167: + 14368 .LFB92: +3215:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** HAL_TIM_ChannelStateTypeDef channel_1_state = TIM_CHANNEL_STATE_GET(htim, TIM_CHANNEL_1); + 14369 .loc 1 3215 1 view -0 + 14370 .cfi_startproc + 14371 @ args = 0, pretend = 0, frame = 0 + 14372 @ frame_needed = 0, uses_anonymous_args = 0 +3215:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** HAL_TIM_ChannelStateTypeDef channel_1_state = TIM_CHANNEL_STATE_GET(htim, TIM_CHANNEL_1); + 14373 .loc 1 3215 1 is_stmt 0 view .LVU4272 + 14374 0000 70B5 push {r4, r5, r6, lr} + 14375 .cfi_def_cfa_offset 16 + 14376 .cfi_offset 4, -16 + 14377 .cfi_offset 5, -12 + 14378 .cfi_offset 6, -8 + 14379 .cfi_offset 14, -4 + 14380 0002 0400 movs r4, r0 +3216:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** HAL_TIM_ChannelStateTypeDef channel_2_state = TIM_CHANNEL_STATE_GET(htim, TIM_CHANNEL_2); + ARM GAS /tmp/ccMtK8ce.s page 451 + + + 14381 .loc 1 3216 3 is_stmt 1 view .LVU4273 +3216:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** HAL_TIM_ChannelStateTypeDef channel_2_state = TIM_CHANNEL_STATE_GET(htim, TIM_CHANNEL_2); + 14382 .loc 1 3216 31 is_stmt 0 view .LVU4274 + 14383 0004 3E23 movs r3, #62 + 14384 0006 C05C ldrb r0, [r0, r3] + 14385 .LVL1168: +3216:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** HAL_TIM_ChannelStateTypeDef channel_2_state = TIM_CHANNEL_STATE_GET(htim, TIM_CHANNEL_2); + 14386 .loc 1 3216 31 view .LVU4275 + 14387 0008 C0B2 uxtb r0, r0 + 14388 .LVL1169: +3217:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** HAL_TIM_ChannelStateTypeDef complementary_channel_1_state = TIM_CHANNEL_N_STATE_GET(htim, TIM_CHA + 14389 .loc 1 3217 3 is_stmt 1 view .LVU4276 +3217:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** HAL_TIM_ChannelStateTypeDef complementary_channel_1_state = TIM_CHANNEL_N_STATE_GET(htim, TIM_CHA + 14390 .loc 1 3217 31 is_stmt 0 view .LVU4277 + 14391 000a 0133 adds r3, r3, #1 + 14392 000c E35C ldrb r3, [r4, r3] + 14393 000e DBB2 uxtb r3, r3 + 14394 .LVL1170: +3218:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** HAL_TIM_ChannelStateTypeDef complementary_channel_2_state = TIM_CHANNEL_N_STATE_GET(htim, TIM_CHA + 14395 .loc 1 3218 3 is_stmt 1 view .LVU4278 +3218:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** HAL_TIM_ChannelStateTypeDef complementary_channel_2_state = TIM_CHANNEL_N_STATE_GET(htim, TIM_CHA + 14396 .loc 1 3218 31 is_stmt 0 view .LVU4279 + 14397 0010 4222 movs r2, #66 + 14398 0012 A25C ldrb r2, [r4, r2] + 14399 0014 D2B2 uxtb r2, r2 + 14400 .LVL1171: +3219:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 14401 .loc 1 3219 3 is_stmt 1 view .LVU4280 +3219:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 14402 .loc 1 3219 31 is_stmt 0 view .LVU4281 + 14403 0016 4325 movs r5, #67 + 14404 0018 655D ldrb r5, [r4, r5] + 14405 001a EDB2 uxtb r5, r5 + 14406 .LVL1172: +3222:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 14407 .loc 1 3222 3 is_stmt 1 view .LVU4282 +3225:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** { + 14408 .loc 1 3225 3 view .LVU4283 +3225:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** { + 14409 .loc 1 3225 6 is_stmt 0 view .LVU4284 + 14410 001c 0029 cmp r1, #0 + 14411 001e 17D1 bne .L982 +3227:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** || (complementary_channel_1_state != HAL_TIM_CHANNEL_STATE_READY)) + 14412 .loc 1 3227 5 is_stmt 1 view .LVU4285 +3227:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** || (complementary_channel_1_state != HAL_TIM_CHANNEL_STATE_READY)) + 14413 .loc 1 3227 8 is_stmt 0 view .LVU4286 + 14414 0020 0128 cmp r0, #1 + 14415 0022 45D1 bne .L990 +3228:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** { + 14416 .loc 1 3228 9 view .LVU4287 + 14417 0024 012A cmp r2, #1 + 14418 0026 44D1 bne .L983 +3234:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** TIM_CHANNEL_N_STATE_SET(htim, TIM_CHANNEL_1, HAL_TIM_CHANNEL_STATE_BUSY); + 14419 .loc 1 3234 7 is_stmt 1 view .LVU4288 + 14420 0028 0223 movs r3, #2 + 14421 .LVL1173: +3234:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** TIM_CHANNEL_N_STATE_SET(htim, TIM_CHANNEL_1, HAL_TIM_CHANNEL_STATE_BUSY); + ARM GAS /tmp/ccMtK8ce.s page 452 + + + 14422 .loc 1 3234 7 is_stmt 0 view .LVU4289 + 14423 002a 3D32 adds r2, r2, #61 + 14424 .LVL1174: +3234:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** TIM_CHANNEL_N_STATE_SET(htim, TIM_CHANNEL_1, HAL_TIM_CHANNEL_STATE_BUSY); + 14425 .loc 1 3234 7 view .LVU4290 + 14426 002c A354 strb r3, [r4, r2] +3235:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** } + 14427 .loc 1 3235 7 is_stmt 1 view .LVU4291 + 14428 002e 0432 adds r2, r2, #4 + 14429 .LVL1175: +3235:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** } + 14430 .loc 1 3235 7 is_stmt 0 view .LVU4292 + 14431 0030 A354 strb r3, [r4, r2] + 14432 .LVL1176: + 14433 .L984: +3270:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** { + 14434 .loc 1 3270 3 is_stmt 1 view .LVU4293 + 14435 0032 0029 cmp r1, #0 + 14436 0034 2AD0 beq .L986 + 14437 0036 0429 cmp r1, #4 + 14438 0038 34D0 beq .L987 +3286:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** TIM_CCxChannelCmd(htim->Instance, TIM_CHANNEL_2, TIM_CCx_ENABLE); + 14439 .loc 1 3286 7 view .LVU4294 + 14440 003a 2068 ldr r0, [r4] + 14441 .LVL1177: +3286:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** TIM_CCxChannelCmd(htim->Instance, TIM_CHANNEL_2, TIM_CCx_ENABLE); + 14442 .loc 1 3286 7 is_stmt 0 view .LVU4295 + 14443 003c 0122 movs r2, #1 + 14444 003e 0021 movs r1, #0 + 14445 .LVL1178: +3286:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** TIM_CCxChannelCmd(htim->Instance, TIM_CHANNEL_2, TIM_CCx_ENABLE); + 14446 .loc 1 3286 7 view .LVU4296 + 14447 0040 FFF7FEFF bl TIM_CCxChannelCmd + 14448 .LVL1179: +3287:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** break; + 14449 .loc 1 3287 7 is_stmt 1 view .LVU4297 + 14450 0044 2068 ldr r0, [r4] + 14451 0046 0122 movs r2, #1 + 14452 0048 0421 movs r1, #4 + 14453 004a FFF7FEFF bl TIM_CCxChannelCmd + 14454 .LVL1180: +3288:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** } + 14455 .loc 1 3288 7 view .LVU4298 + 14456 004e 22E0 b .L989 + 14457 .LVL1181: + 14458 .L982: +3238:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** { + 14459 .loc 1 3238 8 view .LVU4299 +3238:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** { + 14460 .loc 1 3238 11 is_stmt 0 view .LVU4300 + 14461 0050 0429 cmp r1, #4 + 14462 0052 11D0 beq .L997 +3253:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** || (channel_2_state != HAL_TIM_CHANNEL_STATE_READY) + 14463 .loc 1 3253 5 is_stmt 1 view .LVU4301 +3253:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** || (channel_2_state != HAL_TIM_CHANNEL_STATE_READY) + 14464 .loc 1 3253 8 is_stmt 0 view .LVU4302 + 14465 0054 0128 cmp r0, #1 + ARM GAS /tmp/ccMtK8ce.s page 453 + + + 14466 0056 31D1 bne .L993 +3254:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** || (complementary_channel_1_state != HAL_TIM_CHANNEL_STATE_READY) + 14467 .loc 1 3254 9 view .LVU4303 + 14468 0058 012B cmp r3, #1 + 14469 005a 2AD1 bne .L983 +3255:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** || (complementary_channel_2_state != HAL_TIM_CHANNEL_STATE_READY)) + 14470 .loc 1 3255 9 view .LVU4304 + 14471 005c 012A cmp r2, #1 + 14472 005e 2FD1 bne .L994 +3256:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** { + 14473 .loc 1 3256 9 view .LVU4305 + 14474 0060 012D cmp r5, #1 + 14475 0062 2FD1 bne .L995 +3262:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** TIM_CHANNEL_STATE_SET(htim, TIM_CHANNEL_2, HAL_TIM_CHANNEL_STATE_BUSY); + 14476 .loc 1 3262 7 is_stmt 1 view .LVU4306 + 14477 0064 0133 adds r3, r3, #1 + 14478 .LVL1182: +3262:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** TIM_CHANNEL_STATE_SET(htim, TIM_CHANNEL_2, HAL_TIM_CHANNEL_STATE_BUSY); + 14479 .loc 1 3262 7 is_stmt 0 view .LVU4307 + 14480 0066 3D32 adds r2, r2, #61 + 14481 .LVL1183: +3262:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** TIM_CHANNEL_STATE_SET(htim, TIM_CHANNEL_2, HAL_TIM_CHANNEL_STATE_BUSY); + 14482 .loc 1 3262 7 view .LVU4308 + 14483 0068 A354 strb r3, [r4, r2] +3263:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** TIM_CHANNEL_N_STATE_SET(htim, TIM_CHANNEL_1, HAL_TIM_CHANNEL_STATE_BUSY); + 14484 .loc 1 3263 7 is_stmt 1 view .LVU4309 + 14485 006a 0132 adds r2, r2, #1 + 14486 .LVL1184: +3263:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** TIM_CHANNEL_N_STATE_SET(htim, TIM_CHANNEL_1, HAL_TIM_CHANNEL_STATE_BUSY); + 14487 .loc 1 3263 7 is_stmt 0 view .LVU4310 + 14488 006c A354 strb r3, [r4, r2] +3264:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** TIM_CHANNEL_N_STATE_SET(htim, TIM_CHANNEL_2, HAL_TIM_CHANNEL_STATE_BUSY); + 14489 .loc 1 3264 7 is_stmt 1 view .LVU4311 + 14490 006e 0332 adds r2, r2, #3 + 14491 .LVL1185: +3264:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** TIM_CHANNEL_N_STATE_SET(htim, TIM_CHANNEL_2, HAL_TIM_CHANNEL_STATE_BUSY); + 14492 .loc 1 3264 7 is_stmt 0 view .LVU4312 + 14493 0070 A354 strb r3, [r4, r2] +3265:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** } + 14494 .loc 1 3265 7 is_stmt 1 view .LVU4313 + 14495 0072 0132 adds r2, r2, #1 + 14496 .LVL1186: +3265:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** } + 14497 .loc 1 3265 7 is_stmt 0 view .LVU4314 + 14498 0074 A354 strb r3, [r4, r2] + 14499 0076 DCE7 b .L984 + 14500 .LVL1187: + 14501 .L997: +3240:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** || (complementary_channel_2_state != HAL_TIM_CHANNEL_STATE_READY)) + 14502 .loc 1 3240 5 is_stmt 1 view .LVU4315 +3240:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** || (complementary_channel_2_state != HAL_TIM_CHANNEL_STATE_READY)) + 14503 .loc 1 3240 8 is_stmt 0 view .LVU4316 + 14504 0078 012B cmp r3, #1 + 14505 007a 1BD1 bne .L991 +3241:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** { + 14506 .loc 1 3241 9 view .LVU4317 + 14507 007c 012D cmp r5, #1 + ARM GAS /tmp/ccMtK8ce.s page 454 + + + 14508 007e 1BD1 bne .L992 +3247:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** TIM_CHANNEL_N_STATE_SET(htim, TIM_CHANNEL_2, HAL_TIM_CHANNEL_STATE_BUSY); + 14509 .loc 1 3247 7 is_stmt 1 view .LVU4318 + 14510 0080 0133 adds r3, r3, #1 + 14511 .LVL1188: +3247:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** TIM_CHANNEL_N_STATE_SET(htim, TIM_CHANNEL_2, HAL_TIM_CHANNEL_STATE_BUSY); + 14512 .loc 1 3247 7 is_stmt 0 view .LVU4319 + 14513 0082 3F22 movs r2, #63 + 14514 .LVL1189: +3247:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** TIM_CHANNEL_N_STATE_SET(htim, TIM_CHANNEL_2, HAL_TIM_CHANNEL_STATE_BUSY); + 14515 .loc 1 3247 7 view .LVU4320 + 14516 0084 A354 strb r3, [r4, r2] +3248:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** } + 14517 .loc 1 3248 7 is_stmt 1 view .LVU4321 + 14518 0086 0432 adds r2, r2, #4 + 14519 0088 A354 strb r3, [r4, r2] + 14520 008a D2E7 b .L984 + 14521 .LVL1190: + 14522 .L986: +3274:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** break; + 14523 .loc 1 3274 7 view .LVU4322 + 14524 008c 2068 ldr r0, [r4] + 14525 .LVL1191: +3274:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** break; + 14526 .loc 1 3274 7 is_stmt 0 view .LVU4323 + 14527 008e 0122 movs r2, #1 + 14528 0090 0021 movs r1, #0 + 14529 .LVL1192: +3274:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** break; + 14530 .loc 1 3274 7 view .LVU4324 + 14531 0092 FFF7FEFF bl TIM_CCxChannelCmd + 14532 .LVL1193: +3275:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** } + 14533 .loc 1 3275 7 is_stmt 1 view .LVU4325 + 14534 .L989: +3292:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 14535 .loc 1 3292 3 view .LVU4326 + 14536 0096 2268 ldr r2, [r4] + 14537 0098 1368 ldr r3, [r2] + 14538 009a 0121 movs r1, #1 + 14539 009c 0B43 orrs r3, r1 + 14540 009e 1360 str r3, [r2] +3295:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** } + 14541 .loc 1 3295 3 view .LVU4327 +3295:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** } + 14542 .loc 1 3295 10 is_stmt 0 view .LVU4328 + 14543 00a0 0020 movs r0, #0 + 14544 00a2 06E0 b .L983 + 14545 .LVL1194: + 14546 .L987: +3280:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** break; + 14547 .loc 1 3280 7 is_stmt 1 view .LVU4329 + 14548 00a4 2068 ldr r0, [r4] + 14549 .LVL1195: +3280:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** break; + 14550 .loc 1 3280 7 is_stmt 0 view .LVU4330 + 14551 00a6 0122 movs r2, #1 + ARM GAS /tmp/ccMtK8ce.s page 455 + + + 14552 00a8 0421 movs r1, #4 + 14553 .LVL1196: +3280:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** break; + 14554 .loc 1 3280 7 view .LVU4331 + 14555 00aa FFF7FEFF bl TIM_CCxChannelCmd + 14556 .LVL1197: +3281:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** } + 14557 .loc 1 3281 7 is_stmt 1 view .LVU4332 + 14558 00ae F2E7 b .L989 + 14559 .LVL1198: + 14560 .L990: +3230:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** } + 14561 .loc 1 3230 14 is_stmt 0 view .LVU4333 + 14562 00b0 0120 movs r0, #1 + 14563 .LVL1199: + 14564 .L983: +3296:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 14565 .loc 1 3296 1 view .LVU4334 + 14566 @ sp needed + 14567 .LVL1200: + 14568 .LVL1201: +3296:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 14569 .loc 1 3296 1 view .LVU4335 + 14570 00b2 70BD pop {r4, r5, r6, pc} + 14571 .LVL1202: + 14572 .L991: +3243:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** } + 14573 .loc 1 3243 14 view .LVU4336 + 14574 00b4 0120 movs r0, #1 + 14575 .LVL1203: +3243:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** } + 14576 .loc 1 3243 14 view .LVU4337 + 14577 00b6 FCE7 b .L983 + 14578 .LVL1204: + 14579 .L992: +3243:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** } + 14580 .loc 1 3243 14 view .LVU4338 + 14581 00b8 1800 movs r0, r3 + 14582 .LVL1205: +3243:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** } + 14583 .loc 1 3243 14 view .LVU4339 + 14584 00ba FAE7 b .L983 + 14585 .LVL1206: + 14586 .L993: +3258:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** } + 14587 .loc 1 3258 14 view .LVU4340 + 14588 00bc 0120 movs r0, #1 + 14589 .LVL1207: +3258:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** } + 14590 .loc 1 3258 14 view .LVU4341 + 14591 00be F8E7 b .L983 + 14592 .LVL1208: + 14593 .L994: +3258:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** } + 14594 .loc 1 3258 14 view .LVU4342 + 14595 00c0 1800 movs r0, r3 + 14596 .LVL1209: + ARM GAS /tmp/ccMtK8ce.s page 456 + + +3258:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** } + 14597 .loc 1 3258 14 view .LVU4343 + 14598 00c2 F6E7 b .L983 + 14599 .LVL1210: + 14600 .L995: +3258:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** } + 14601 .loc 1 3258 14 view .LVU4344 + 14602 00c4 1000 movs r0, r2 + 14603 .LVL1211: +3258:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** } + 14604 .loc 1 3258 14 view .LVU4345 + 14605 00c6 F4E7 b .L983 + 14606 .cfi_endproc + 14607 .LFE92: + 14609 .section .text.HAL_TIM_Encoder_Stop,"ax",%progbits + 14610 .align 1 + 14611 .global HAL_TIM_Encoder_Stop + 14612 .syntax unified + 14613 .code 16 + 14614 .thumb_func + 14616 HAL_TIM_Encoder_Stop: + 14617 .LVL1212: + 14618 .LFB93: +3309:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** /* Check the parameters */ + 14619 .loc 1 3309 1 is_stmt 1 view -0 + 14620 .cfi_startproc + 14621 @ args = 0, pretend = 0, frame = 0 + 14622 @ frame_needed = 0, uses_anonymous_args = 0 +3309:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** /* Check the parameters */ + 14623 .loc 1 3309 1 is_stmt 0 view .LVU4347 + 14624 0000 70B5 push {r4, r5, r6, lr} + 14625 .cfi_def_cfa_offset 16 + 14626 .cfi_offset 4, -16 + 14627 .cfi_offset 5, -12 + 14628 .cfi_offset 6, -8 + 14629 .cfi_offset 14, -4 + 14630 0002 0400 movs r4, r0 + 14631 0004 0D1E subs r5, r1, #0 +3311:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 14632 .loc 1 3311 3 is_stmt 1 view .LVU4348 +3315:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** { + 14633 .loc 1 3315 3 view .LVU4349 + 14634 0006 0CD0 beq .L999 + 14635 0008 0429 cmp r1, #4 + 14636 000a 2AD0 beq .L1000 +3331:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** TIM_CCxChannelCmd(htim->Instance, TIM_CHANNEL_2, TIM_CCx_DISABLE); + 14637 .loc 1 3331 7 view .LVU4350 + 14638 000c 0068 ldr r0, [r0] + 14639 .LVL1213: +3331:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** TIM_CCxChannelCmd(htim->Instance, TIM_CHANNEL_2, TIM_CCx_DISABLE); + 14640 .loc 1 3331 7 is_stmt 0 view .LVU4351 + 14641 000e 0022 movs r2, #0 + 14642 0010 0021 movs r1, #0 + 14643 .LVL1214: +3331:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** TIM_CCxChannelCmd(htim->Instance, TIM_CHANNEL_2, TIM_CCx_DISABLE); + 14644 .loc 1 3331 7 view .LVU4352 + 14645 0012 FFF7FEFF bl TIM_CCxChannelCmd + ARM GAS /tmp/ccMtK8ce.s page 457 + + + 14646 .LVL1215: +3332:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** break; + 14647 .loc 1 3332 7 is_stmt 1 view .LVU4353 + 14648 0016 2068 ldr r0, [r4] + 14649 0018 0022 movs r2, #0 + 14650 001a 0421 movs r1, #4 + 14651 001c FFF7FEFF bl TIM_CCxChannelCmd + 14652 .LVL1216: +3333:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** } + 14653 .loc 1 3333 7 view .LVU4354 + 14654 0020 04E0 b .L1002 + 14655 .LVL1217: + 14656 .L999: +3319:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** break; + 14657 .loc 1 3319 7 view .LVU4355 + 14658 0022 0068 ldr r0, [r0] + 14659 .LVL1218: +3319:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** break; + 14660 .loc 1 3319 7 is_stmt 0 view .LVU4356 + 14661 0024 0022 movs r2, #0 + 14662 0026 0021 movs r1, #0 + 14663 .LVL1219: +3319:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** break; + 14664 .loc 1 3319 7 view .LVU4357 + 14665 0028 FFF7FEFF bl TIM_CCxChannelCmd + 14666 .LVL1220: +3320:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** } + 14667 .loc 1 3320 7 is_stmt 1 view .LVU4358 + 14668 .L1002: +3338:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 14669 .loc 1 3338 3 view .LVU4359 +3338:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 14670 .loc 1 3338 3 view .LVU4360 + 14671 002c 2368 ldr r3, [r4] + 14672 002e 196A ldr r1, [r3, #32] + 14673 0030 154A ldr r2, .L1011 + 14674 0032 1142 tst r1, r2 + 14675 0034 07D1 bne .L1003 +3338:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 14676 .loc 1 3338 3 discriminator 1 view .LVU4361 + 14677 0036 196A ldr r1, [r3, #32] + 14678 0038 144A ldr r2, .L1011+4 + 14679 003a 1142 tst r1, r2 + 14680 003c 03D1 bne .L1003 +3338:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 14681 .loc 1 3338 3 discriminator 3 view .LVU4362 + 14682 003e 1A68 ldr r2, [r3] + 14683 0040 0121 movs r1, #1 + 14684 0042 8A43 bics r2, r1 + 14685 0044 1A60 str r2, [r3] + 14686 .L1003: +3338:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 14687 .loc 1 3338 3 discriminator 5 view .LVU4363 +3341:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** { + 14688 .loc 1 3341 3 view .LVU4364 +3341:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** { + 14689 .loc 1 3341 6 is_stmt 0 view .LVU4365 + ARM GAS /tmp/ccMtK8ce.s page 458 + + + 14690 0046 002D cmp r5, #0 + 14691 0048 11D0 beq .L1004 +3341:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** { + 14692 .loc 1 3341 34 discriminator 1 view .LVU4366 + 14693 004a 042D cmp r5, #4 + 14694 004c 16D0 beq .L1010 +3348:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** TIM_CHANNEL_STATE_SET(htim, TIM_CHANNEL_2, HAL_TIM_CHANNEL_STATE_READY); + 14695 .loc 1 3348 5 is_stmt 1 view .LVU4367 + 14696 004e 0123 movs r3, #1 + 14697 0050 3E22 movs r2, #62 + 14698 0052 A354 strb r3, [r4, r2] +3349:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** TIM_CHANNEL_N_STATE_SET(htim, TIM_CHANNEL_1, HAL_TIM_CHANNEL_STATE_READY); + 14699 .loc 1 3349 5 view .LVU4368 + 14700 0054 0132 adds r2, r2, #1 + 14701 0056 A354 strb r3, [r4, r2] +3350:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** TIM_CHANNEL_N_STATE_SET(htim, TIM_CHANNEL_2, HAL_TIM_CHANNEL_STATE_READY); + 14702 .loc 1 3350 5 view .LVU4369 + 14703 0058 0332 adds r2, r2, #3 + 14704 005a A354 strb r3, [r4, r2] +3351:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** } + 14705 .loc 1 3351 5 view .LVU4370 + 14706 005c 0132 adds r2, r2, #1 + 14707 005e A354 strb r3, [r4, r2] + 14708 0060 0AE0 b .L1007 + 14709 .LVL1221: + 14710 .L1000: +3325:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** break; + 14711 .loc 1 3325 7 view .LVU4371 + 14712 0062 0068 ldr r0, [r0] + 14713 .LVL1222: +3325:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** break; + 14714 .loc 1 3325 7 is_stmt 0 view .LVU4372 + 14715 0064 0022 movs r2, #0 + 14716 0066 0421 movs r1, #4 + 14717 .LVL1223: +3325:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** break; + 14718 .loc 1 3325 7 view .LVU4373 + 14719 0068 FFF7FEFF bl TIM_CCxChannelCmd + 14720 .LVL1224: +3326:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** } + 14721 .loc 1 3326 7 is_stmt 1 view .LVU4374 + 14722 006c DEE7 b .L1002 + 14723 .L1004: +3343:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** TIM_CHANNEL_N_STATE_SET(htim, Channel, HAL_TIM_CHANNEL_STATE_READY); + 14724 .loc 1 3343 5 view .LVU4375 +3343:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** TIM_CHANNEL_N_STATE_SET(htim, Channel, HAL_TIM_CHANNEL_STATE_READY); + 14725 .loc 1 3343 5 is_stmt 0 discriminator 1 view .LVU4376 + 14726 006e 0123 movs r3, #1 + 14727 0070 3E22 movs r2, #62 + 14728 0072 A354 strb r3, [r4, r2] +3344:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** } + 14729 .loc 1 3344 5 is_stmt 1 view .LVU4377 +3344:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** } + 14730 .loc 1 3344 5 is_stmt 0 discriminator 1 view .LVU4378 + 14731 0074 0432 adds r2, r2, #4 + 14732 0076 A354 strb r3, [r4, r2] + 14733 .L1007: + ARM GAS /tmp/ccMtK8ce.s page 459 + + +3355:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** } + 14734 .loc 1 3355 3 is_stmt 1 view .LVU4379 +3356:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 14735 .loc 1 3356 1 is_stmt 0 view .LVU4380 + 14736 0078 0020 movs r0, #0 + 14737 @ sp needed + 14738 .LVL1225: + 14739 .LVL1226: +3356:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 14740 .loc 1 3356 1 view .LVU4381 + 14741 007a 70BD pop {r4, r5, r6, pc} + 14742 .LVL1227: + 14743 .L1010: +3343:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** TIM_CHANNEL_N_STATE_SET(htim, Channel, HAL_TIM_CHANNEL_STATE_READY); + 14744 .loc 1 3343 5 is_stmt 1 view .LVU4382 +3343:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** TIM_CHANNEL_N_STATE_SET(htim, Channel, HAL_TIM_CHANNEL_STATE_READY); + 14745 .loc 1 3343 5 is_stmt 0 discriminator 3 view .LVU4383 + 14746 007c 0123 movs r3, #1 + 14747 007e 3F22 movs r2, #63 + 14748 0080 A354 strb r3, [r4, r2] +3344:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** } + 14749 .loc 1 3344 5 is_stmt 1 view .LVU4384 +3344:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** } + 14750 .loc 1 3344 5 is_stmt 0 discriminator 3 view .LVU4385 + 14751 0082 0432 adds r2, r2, #4 + 14752 0084 A354 strb r3, [r4, r2] + 14753 0086 F7E7 b .L1007 + 14754 .L1012: + 14755 .align 2 + 14756 .L1011: + 14757 0088 11110000 .word 4369 + 14758 008c 44040000 .word 1092 + 14759 .cfi_endproc + 14760 .LFE93: + 14762 .section .text.HAL_TIM_Encoder_Start_IT,"ax",%progbits + 14763 .align 1 + 14764 .global HAL_TIM_Encoder_Start_IT + 14765 .syntax unified + 14766 .code 16 + 14767 .thumb_func + 14769 HAL_TIM_Encoder_Start_IT: + 14770 .LVL1228: + 14771 .LFB94: +3369:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** HAL_TIM_ChannelStateTypeDef channel_1_state = TIM_CHANNEL_STATE_GET(htim, TIM_CHANNEL_1); + 14772 .loc 1 3369 1 is_stmt 1 view -0 + 14773 .cfi_startproc + 14774 @ args = 0, pretend = 0, frame = 0 + 14775 @ frame_needed = 0, uses_anonymous_args = 0 +3369:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** HAL_TIM_ChannelStateTypeDef channel_1_state = TIM_CHANNEL_STATE_GET(htim, TIM_CHANNEL_1); + 14776 .loc 1 3369 1 is_stmt 0 view .LVU4387 + 14777 0000 70B5 push {r4, r5, r6, lr} + 14778 .cfi_def_cfa_offset 16 + 14779 .cfi_offset 4, -16 + 14780 .cfi_offset 5, -12 + 14781 .cfi_offset 6, -8 + 14782 .cfi_offset 14, -4 + 14783 0002 0400 movs r4, r0 + ARM GAS /tmp/ccMtK8ce.s page 460 + + +3370:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** HAL_TIM_ChannelStateTypeDef channel_2_state = TIM_CHANNEL_STATE_GET(htim, TIM_CHANNEL_2); + 14784 .loc 1 3370 3 is_stmt 1 view .LVU4388 +3370:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** HAL_TIM_ChannelStateTypeDef channel_2_state = TIM_CHANNEL_STATE_GET(htim, TIM_CHANNEL_2); + 14785 .loc 1 3370 31 is_stmt 0 view .LVU4389 + 14786 0004 3E23 movs r3, #62 + 14787 0006 C05C ldrb r0, [r0, r3] + 14788 .LVL1229: +3370:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** HAL_TIM_ChannelStateTypeDef channel_2_state = TIM_CHANNEL_STATE_GET(htim, TIM_CHANNEL_2); + 14789 .loc 1 3370 31 view .LVU4390 + 14790 0008 C0B2 uxtb r0, r0 + 14791 .LVL1230: +3371:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** HAL_TIM_ChannelStateTypeDef complementary_channel_1_state = TIM_CHANNEL_N_STATE_GET(htim, TIM_CHA + 14792 .loc 1 3371 3 is_stmt 1 view .LVU4391 +3371:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** HAL_TIM_ChannelStateTypeDef complementary_channel_1_state = TIM_CHANNEL_N_STATE_GET(htim, TIM_CHA + 14793 .loc 1 3371 31 is_stmt 0 view .LVU4392 + 14794 000a 0133 adds r3, r3, #1 + 14795 000c E35C ldrb r3, [r4, r3] + 14796 000e DBB2 uxtb r3, r3 + 14797 .LVL1231: +3372:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** HAL_TIM_ChannelStateTypeDef complementary_channel_2_state = TIM_CHANNEL_N_STATE_GET(htim, TIM_CHA + 14798 .loc 1 3372 3 is_stmt 1 view .LVU4393 +3372:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** HAL_TIM_ChannelStateTypeDef complementary_channel_2_state = TIM_CHANNEL_N_STATE_GET(htim, TIM_CHA + 14799 .loc 1 3372 31 is_stmt 0 view .LVU4394 + 14800 0010 4222 movs r2, #66 + 14801 0012 A25C ldrb r2, [r4, r2] + 14802 0014 D2B2 uxtb r2, r2 + 14803 .LVL1232: +3373:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 14804 .loc 1 3373 3 is_stmt 1 view .LVU4395 +3373:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 14805 .loc 1 3373 31 is_stmt 0 view .LVU4396 + 14806 0016 4325 movs r5, #67 + 14807 0018 655D ldrb r5, [r4, r5] + 14808 001a EDB2 uxtb r5, r5 + 14809 .LVL1233: +3376:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 14810 .loc 1 3376 3 is_stmt 1 view .LVU4397 +3379:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** { + 14811 .loc 1 3379 3 view .LVU4398 +3379:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** { + 14812 .loc 1 3379 6 is_stmt 0 view .LVU4399 + 14813 001c 0029 cmp r1, #0 + 14814 001e 21D1 bne .L1014 +3381:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** || (complementary_channel_1_state != HAL_TIM_CHANNEL_STATE_READY)) + 14815 .loc 1 3381 5 is_stmt 1 view .LVU4400 +3381:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** || (complementary_channel_1_state != HAL_TIM_CHANNEL_STATE_READY)) + 14816 .loc 1 3381 8 is_stmt 0 view .LVU4401 + 14817 0020 0128 cmp r0, #1 + 14818 0022 59D1 bne .L1022 +3382:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** { + 14819 .loc 1 3382 9 view .LVU4402 + 14820 0024 012A cmp r2, #1 + 14821 0026 58D1 bne .L1015 +3388:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** TIM_CHANNEL_N_STATE_SET(htim, TIM_CHANNEL_1, HAL_TIM_CHANNEL_STATE_BUSY); + 14822 .loc 1 3388 7 is_stmt 1 view .LVU4403 + 14823 0028 0223 movs r3, #2 + 14824 .LVL1234: + ARM GAS /tmp/ccMtK8ce.s page 461 + + +3388:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** TIM_CHANNEL_N_STATE_SET(htim, TIM_CHANNEL_1, HAL_TIM_CHANNEL_STATE_BUSY); + 14825 .loc 1 3388 7 is_stmt 0 view .LVU4404 + 14826 002a 3D32 adds r2, r2, #61 + 14827 .LVL1235: +3388:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** TIM_CHANNEL_N_STATE_SET(htim, TIM_CHANNEL_1, HAL_TIM_CHANNEL_STATE_BUSY); + 14828 .loc 1 3388 7 view .LVU4405 + 14829 002c A354 strb r3, [r4, r2] +3389:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** } + 14830 .loc 1 3389 7 is_stmt 1 view .LVU4406 + 14831 002e 0432 adds r2, r2, #4 + 14832 .LVL1236: +3389:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** } + 14833 .loc 1 3389 7 is_stmt 0 view .LVU4407 + 14834 0030 A354 strb r3, [r4, r2] + 14835 .LVL1237: + 14836 .L1016: +3425:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** { + 14837 .loc 1 3425 3 is_stmt 1 view .LVU4408 + 14838 0032 0029 cmp r1, #0 + 14839 0034 34D0 beq .L1018 + 14840 0036 0429 cmp r1, #4 + 14841 0038 43D0 beq .L1019 +3443:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** TIM_CCxChannelCmd(htim->Instance, TIM_CHANNEL_2, TIM_CCx_ENABLE); + 14842 .loc 1 3443 7 view .LVU4409 + 14843 003a 2068 ldr r0, [r4] + 14844 .LVL1238: +3443:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** TIM_CCxChannelCmd(htim->Instance, TIM_CHANNEL_2, TIM_CCx_ENABLE); + 14845 .loc 1 3443 7 is_stmt 0 view .LVU4410 + 14846 003c 0122 movs r2, #1 + 14847 003e 0021 movs r1, #0 + 14848 .LVL1239: +3443:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** TIM_CCxChannelCmd(htim->Instance, TIM_CHANNEL_2, TIM_CCx_ENABLE); + 14849 .loc 1 3443 7 view .LVU4411 + 14850 0040 FFF7FEFF bl TIM_CCxChannelCmd + 14851 .LVL1240: +3444:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** __HAL_TIM_ENABLE_IT(htim, TIM_IT_CC1); + 14852 .loc 1 3444 7 is_stmt 1 view .LVU4412 + 14853 0044 2068 ldr r0, [r4] + 14854 0046 0122 movs r2, #1 + 14855 0048 0421 movs r1, #4 + 14856 004a FFF7FEFF bl TIM_CCxChannelCmd + 14857 .LVL1241: +3445:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** __HAL_TIM_ENABLE_IT(htim, TIM_IT_CC2); + 14858 .loc 1 3445 7 view .LVU4413 + 14859 004e 2268 ldr r2, [r4] + 14860 0050 D368 ldr r3, [r2, #12] + 14861 0052 0221 movs r1, #2 + 14862 0054 0B43 orrs r3, r1 + 14863 0056 D360 str r3, [r2, #12] +3446:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** break; + 14864 .loc 1 3446 7 view .LVU4414 + 14865 0058 2268 ldr r2, [r4] + 14866 005a D368 ldr r3, [r2, #12] + 14867 005c 0231 adds r1, r1, #2 + 14868 005e 0B43 orrs r3, r1 + 14869 0060 D360 str r3, [r2, #12] +3447:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** } + ARM GAS /tmp/ccMtK8ce.s page 462 + + + 14870 .loc 1 3447 7 view .LVU4415 + 14871 0062 27E0 b .L1021 + 14872 .LVL1242: + 14873 .L1014: +3392:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** { + 14874 .loc 1 3392 8 view .LVU4416 +3392:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** { + 14875 .loc 1 3392 11 is_stmt 0 view .LVU4417 + 14876 0064 0429 cmp r1, #4 + 14877 0066 11D0 beq .L1029 +3407:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** || (channel_2_state != HAL_TIM_CHANNEL_STATE_READY) + 14878 .loc 1 3407 5 is_stmt 1 view .LVU4418 +3407:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** || (channel_2_state != HAL_TIM_CHANNEL_STATE_READY) + 14879 .loc 1 3407 8 is_stmt 0 view .LVU4419 + 14880 0068 0128 cmp r0, #1 + 14881 006a 3BD1 bne .L1025 +3408:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** || (complementary_channel_1_state != HAL_TIM_CHANNEL_STATE_READY) + 14882 .loc 1 3408 9 view .LVU4420 + 14883 006c 012B cmp r3, #1 + 14884 006e 34D1 bne .L1015 +3409:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** || (complementary_channel_2_state != HAL_TIM_CHANNEL_STATE_READY)) + 14885 .loc 1 3409 9 view .LVU4421 + 14886 0070 012A cmp r2, #1 + 14887 0072 39D1 bne .L1026 +3410:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** { + 14888 .loc 1 3410 9 view .LVU4422 + 14889 0074 012D cmp r5, #1 + 14890 0076 39D1 bne .L1027 +3416:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** TIM_CHANNEL_STATE_SET(htim, TIM_CHANNEL_2, HAL_TIM_CHANNEL_STATE_BUSY); + 14891 .loc 1 3416 7 is_stmt 1 view .LVU4423 + 14892 0078 0133 adds r3, r3, #1 + 14893 .LVL1243: +3416:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** TIM_CHANNEL_STATE_SET(htim, TIM_CHANNEL_2, HAL_TIM_CHANNEL_STATE_BUSY); + 14894 .loc 1 3416 7 is_stmt 0 view .LVU4424 + 14895 007a 3D32 adds r2, r2, #61 + 14896 .LVL1244: +3416:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** TIM_CHANNEL_STATE_SET(htim, TIM_CHANNEL_2, HAL_TIM_CHANNEL_STATE_BUSY); + 14897 .loc 1 3416 7 view .LVU4425 + 14898 007c A354 strb r3, [r4, r2] +3417:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** TIM_CHANNEL_N_STATE_SET(htim, TIM_CHANNEL_1, HAL_TIM_CHANNEL_STATE_BUSY); + 14899 .loc 1 3417 7 is_stmt 1 view .LVU4426 + 14900 007e 0132 adds r2, r2, #1 + 14901 .LVL1245: +3417:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** TIM_CHANNEL_N_STATE_SET(htim, TIM_CHANNEL_1, HAL_TIM_CHANNEL_STATE_BUSY); + 14902 .loc 1 3417 7 is_stmt 0 view .LVU4427 + 14903 0080 A354 strb r3, [r4, r2] +3418:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** TIM_CHANNEL_N_STATE_SET(htim, TIM_CHANNEL_2, HAL_TIM_CHANNEL_STATE_BUSY); + 14904 .loc 1 3418 7 is_stmt 1 view .LVU4428 + 14905 0082 0332 adds r2, r2, #3 + 14906 .LVL1246: +3418:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** TIM_CHANNEL_N_STATE_SET(htim, TIM_CHANNEL_2, HAL_TIM_CHANNEL_STATE_BUSY); + 14907 .loc 1 3418 7 is_stmt 0 view .LVU4429 + 14908 0084 A354 strb r3, [r4, r2] +3419:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** } + 14909 .loc 1 3419 7 is_stmt 1 view .LVU4430 + 14910 0086 0132 adds r2, r2, #1 + 14911 .LVL1247: + ARM GAS /tmp/ccMtK8ce.s page 463 + + +3419:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** } + 14912 .loc 1 3419 7 is_stmt 0 view .LVU4431 + 14913 0088 A354 strb r3, [r4, r2] + 14914 008a D2E7 b .L1016 + 14915 .LVL1248: + 14916 .L1029: +3394:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** || (complementary_channel_2_state != HAL_TIM_CHANNEL_STATE_READY)) + 14917 .loc 1 3394 5 is_stmt 1 view .LVU4432 +3394:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** || (complementary_channel_2_state != HAL_TIM_CHANNEL_STATE_READY)) + 14918 .loc 1 3394 8 is_stmt 0 view .LVU4433 + 14919 008c 012B cmp r3, #1 + 14920 008e 25D1 bne .L1023 +3395:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** { + 14921 .loc 1 3395 9 view .LVU4434 + 14922 0090 012D cmp r5, #1 + 14923 0092 25D1 bne .L1024 +3401:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** TIM_CHANNEL_N_STATE_SET(htim, TIM_CHANNEL_2, HAL_TIM_CHANNEL_STATE_BUSY); + 14924 .loc 1 3401 7 is_stmt 1 view .LVU4435 + 14925 0094 0133 adds r3, r3, #1 + 14926 .LVL1249: +3401:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** TIM_CHANNEL_N_STATE_SET(htim, TIM_CHANNEL_2, HAL_TIM_CHANNEL_STATE_BUSY); + 14927 .loc 1 3401 7 is_stmt 0 view .LVU4436 + 14928 0096 3F22 movs r2, #63 + 14929 .LVL1250: +3401:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** TIM_CHANNEL_N_STATE_SET(htim, TIM_CHANNEL_2, HAL_TIM_CHANNEL_STATE_BUSY); + 14930 .loc 1 3401 7 view .LVU4437 + 14931 0098 A354 strb r3, [r4, r2] +3402:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** } + 14932 .loc 1 3402 7 is_stmt 1 view .LVU4438 + 14933 009a 0432 adds r2, r2, #4 + 14934 009c A354 strb r3, [r4, r2] + 14935 009e C8E7 b .L1016 + 14936 .LVL1251: + 14937 .L1018: +3429:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** __HAL_TIM_ENABLE_IT(htim, TIM_IT_CC1); + 14938 .loc 1 3429 7 view .LVU4439 + 14939 00a0 2068 ldr r0, [r4] + 14940 .LVL1252: +3429:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** __HAL_TIM_ENABLE_IT(htim, TIM_IT_CC1); + 14941 .loc 1 3429 7 is_stmt 0 view .LVU4440 + 14942 00a2 0122 movs r2, #1 + 14943 00a4 0021 movs r1, #0 + 14944 .LVL1253: +3429:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** __HAL_TIM_ENABLE_IT(htim, TIM_IT_CC1); + 14945 .loc 1 3429 7 view .LVU4441 + 14946 00a6 FFF7FEFF bl TIM_CCxChannelCmd + 14947 .LVL1254: +3430:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** break; + 14948 .loc 1 3430 7 is_stmt 1 view .LVU4442 + 14949 00aa 2268 ldr r2, [r4] + 14950 00ac D368 ldr r3, [r2, #12] + 14951 00ae 0221 movs r1, #2 + 14952 00b0 0B43 orrs r3, r1 + 14953 00b2 D360 str r3, [r2, #12] +3431:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** } + 14954 .loc 1 3431 7 view .LVU4443 + 14955 .L1021: + ARM GAS /tmp/ccMtK8ce.s page 464 + + +3452:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 14956 .loc 1 3452 3 view .LVU4444 + 14957 00b4 2268 ldr r2, [r4] + 14958 00b6 1368 ldr r3, [r2] + 14959 00b8 0121 movs r1, #1 + 14960 00ba 0B43 orrs r3, r1 + 14961 00bc 1360 str r3, [r2] +3455:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** } + 14962 .loc 1 3455 3 view .LVU4445 +3455:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** } + 14963 .loc 1 3455 10 is_stmt 0 view .LVU4446 + 14964 00be 0020 movs r0, #0 + 14965 00c0 0BE0 b .L1015 + 14966 .LVL1255: + 14967 .L1019: +3436:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** __HAL_TIM_ENABLE_IT(htim, TIM_IT_CC2); + 14968 .loc 1 3436 7 is_stmt 1 view .LVU4447 + 14969 00c2 2068 ldr r0, [r4] + 14970 .LVL1256: +3436:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** __HAL_TIM_ENABLE_IT(htim, TIM_IT_CC2); + 14971 .loc 1 3436 7 is_stmt 0 view .LVU4448 + 14972 00c4 0122 movs r2, #1 + 14973 00c6 0421 movs r1, #4 + 14974 .LVL1257: +3436:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** __HAL_TIM_ENABLE_IT(htim, TIM_IT_CC2); + 14975 .loc 1 3436 7 view .LVU4449 + 14976 00c8 FFF7FEFF bl TIM_CCxChannelCmd + 14977 .LVL1258: +3437:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** break; + 14978 .loc 1 3437 7 is_stmt 1 view .LVU4450 + 14979 00cc 2268 ldr r2, [r4] + 14980 00ce D368 ldr r3, [r2, #12] + 14981 00d0 0421 movs r1, #4 + 14982 00d2 0B43 orrs r3, r1 + 14983 00d4 D360 str r3, [r2, #12] +3438:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** } + 14984 .loc 1 3438 7 view .LVU4451 + 14985 00d6 EDE7 b .L1021 + 14986 .LVL1259: + 14987 .L1022: +3384:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** } + 14988 .loc 1 3384 14 is_stmt 0 view .LVU4452 + 14989 00d8 0120 movs r0, #1 + 14990 .LVL1260: + 14991 .L1015: +3456:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 14992 .loc 1 3456 1 view .LVU4453 + 14993 @ sp needed + 14994 .LVL1261: + 14995 .LVL1262: +3456:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 14996 .loc 1 3456 1 view .LVU4454 + 14997 00da 70BD pop {r4, r5, r6, pc} + 14998 .LVL1263: + 14999 .L1023: +3397:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** } + 15000 .loc 1 3397 14 view .LVU4455 + ARM GAS /tmp/ccMtK8ce.s page 465 + + + 15001 00dc 0120 movs r0, #1 + 15002 .LVL1264: +3397:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** } + 15003 .loc 1 3397 14 view .LVU4456 + 15004 00de FCE7 b .L1015 + 15005 .LVL1265: + 15006 .L1024: +3397:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** } + 15007 .loc 1 3397 14 view .LVU4457 + 15008 00e0 1800 movs r0, r3 + 15009 .LVL1266: +3397:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** } + 15010 .loc 1 3397 14 view .LVU4458 + 15011 00e2 FAE7 b .L1015 + 15012 .LVL1267: + 15013 .L1025: +3412:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** } + 15014 .loc 1 3412 14 view .LVU4459 + 15015 00e4 0120 movs r0, #1 + 15016 .LVL1268: +3412:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** } + 15017 .loc 1 3412 14 view .LVU4460 + 15018 00e6 F8E7 b .L1015 + 15019 .LVL1269: + 15020 .L1026: +3412:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** } + 15021 .loc 1 3412 14 view .LVU4461 + 15022 00e8 1800 movs r0, r3 + 15023 .LVL1270: +3412:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** } + 15024 .loc 1 3412 14 view .LVU4462 + 15025 00ea F6E7 b .L1015 + 15026 .LVL1271: + 15027 .L1027: +3412:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** } + 15028 .loc 1 3412 14 view .LVU4463 + 15029 00ec 1000 movs r0, r2 + 15030 .LVL1272: +3412:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** } + 15031 .loc 1 3412 14 view .LVU4464 + 15032 00ee F4E7 b .L1015 + 15033 .cfi_endproc + 15034 .LFE94: + 15036 .section .text.HAL_TIM_Encoder_Stop_IT,"ax",%progbits + 15037 .align 1 + 15038 .global HAL_TIM_Encoder_Stop_IT + 15039 .syntax unified + 15040 .code 16 + 15041 .thumb_func + 15043 HAL_TIM_Encoder_Stop_IT: + 15044 .LVL1273: + 15045 .LFB95: +3469:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** /* Check the parameters */ + 15046 .loc 1 3469 1 is_stmt 1 view -0 + 15047 .cfi_startproc + 15048 @ args = 0, pretend = 0, frame = 0 + 15049 @ frame_needed = 0, uses_anonymous_args = 0 + ARM GAS /tmp/ccMtK8ce.s page 466 + + +3469:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** /* Check the parameters */ + 15050 .loc 1 3469 1 is_stmt 0 view .LVU4466 + 15051 0000 70B5 push {r4, r5, r6, lr} + 15052 .cfi_def_cfa_offset 16 + 15053 .cfi_offset 4, -16 + 15054 .cfi_offset 5, -12 + 15055 .cfi_offset 6, -8 + 15056 .cfi_offset 14, -4 + 15057 0002 0400 movs r4, r0 + 15058 0004 0D1E subs r5, r1, #0 +3471:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 15059 .loc 1 3471 3 is_stmt 1 view .LVU4467 +3475:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** { + 15060 .loc 1 3475 3 view .LVU4468 +3475:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** { + 15061 .loc 1 3475 6 is_stmt 0 view .LVU4469 + 15062 0006 30D0 beq .L1040 +3482:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** { + 15063 .loc 1 3482 8 is_stmt 1 view .LVU4470 +3482:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** { + 15064 .loc 1 3482 11 is_stmt 0 view .LVU4471 + 15065 0008 0429 cmp r1, #4 + 15066 000a 39D0 beq .L1041 +3491:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** TIM_CCxChannelCmd(htim->Instance, TIM_CHANNEL_2, TIM_CCx_DISABLE); + 15067 .loc 1 3491 5 is_stmt 1 view .LVU4472 + 15068 000c 0068 ldr r0, [r0] + 15069 .LVL1274: +3491:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** TIM_CCxChannelCmd(htim->Instance, TIM_CHANNEL_2, TIM_CCx_DISABLE); + 15070 .loc 1 3491 5 is_stmt 0 view .LVU4473 + 15071 000e 0022 movs r2, #0 + 15072 0010 0021 movs r1, #0 + 15073 .LVL1275: +3491:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** TIM_CCxChannelCmd(htim->Instance, TIM_CHANNEL_2, TIM_CCx_DISABLE); + 15074 .loc 1 3491 5 view .LVU4474 + 15075 0012 FFF7FEFF bl TIM_CCxChannelCmd + 15076 .LVL1276: +3492:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 15077 .loc 1 3492 5 is_stmt 1 view .LVU4475 + 15078 0016 2068 ldr r0, [r4] + 15079 0018 0022 movs r2, #0 + 15080 001a 0421 movs r1, #4 + 15081 001c FFF7FEFF bl TIM_CCxChannelCmd + 15082 .LVL1277: +3495:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** __HAL_TIM_DISABLE_IT(htim, TIM_IT_CC2); + 15083 .loc 1 3495 5 view .LVU4476 + 15084 0020 2268 ldr r2, [r4] + 15085 0022 D368 ldr r3, [r2, #12] + 15086 0024 0221 movs r1, #2 + 15087 0026 8B43 bics r3, r1 + 15088 0028 D360 str r3, [r2, #12] +3496:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** } + 15089 .loc 1 3496 5 view .LVU4477 + 15090 002a 2268 ldr r2, [r4] + 15091 002c D368 ldr r3, [r2, #12] + 15092 002e 0231 adds r1, r1, #2 + 15093 0030 8B43 bics r3, r1 + 15094 0032 D360 str r3, [r2, #12] + ARM GAS /tmp/ccMtK8ce.s page 467 + + + 15095 .L1032: +3500:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 15096 .loc 1 3500 3 view .LVU4478 +3500:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 15097 .loc 1 3500 3 view .LVU4479 + 15098 0034 2368 ldr r3, [r4] + 15099 0036 196A ldr r1, [r3, #32] + 15100 0038 1D4A ldr r2, .L1043 + 15101 003a 1142 tst r1, r2 + 15102 003c 07D1 bne .L1034 +3500:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 15103 .loc 1 3500 3 discriminator 1 view .LVU4480 + 15104 003e 196A ldr r1, [r3, #32] + 15105 0040 1C4A ldr r2, .L1043+4 + 15106 0042 1142 tst r1, r2 + 15107 0044 03D1 bne .L1034 +3500:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 15108 .loc 1 3500 3 discriminator 3 view .LVU4481 + 15109 0046 1A68 ldr r2, [r3] + 15110 0048 0121 movs r1, #1 + 15111 004a 8A43 bics r2, r1 + 15112 004c 1A60 str r2, [r3] + 15113 .L1034: +3500:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 15114 .loc 1 3500 3 discriminator 5 view .LVU4482 +3503:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** { + 15115 .loc 1 3503 3 view .LVU4483 +3503:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** { + 15116 .loc 1 3503 6 is_stmt 0 view .LVU4484 + 15117 004e 002D cmp r5, #0 + 15118 0050 21D0 beq .L1035 +3503:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** { + 15119 .loc 1 3503 34 discriminator 1 view .LVU4485 + 15120 0052 042D cmp r5, #4 + 15121 0054 26D0 beq .L1042 +3510:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** TIM_CHANNEL_STATE_SET(htim, TIM_CHANNEL_2, HAL_TIM_CHANNEL_STATE_READY); + 15122 .loc 1 3510 5 is_stmt 1 view .LVU4486 + 15123 0056 0123 movs r3, #1 + 15124 0058 3E22 movs r2, #62 + 15125 005a A354 strb r3, [r4, r2] +3511:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** TIM_CHANNEL_N_STATE_SET(htim, TIM_CHANNEL_1, HAL_TIM_CHANNEL_STATE_READY); + 15126 .loc 1 3511 5 view .LVU4487 + 15127 005c 0132 adds r2, r2, #1 + 15128 005e A354 strb r3, [r4, r2] +3512:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** TIM_CHANNEL_N_STATE_SET(htim, TIM_CHANNEL_2, HAL_TIM_CHANNEL_STATE_READY); + 15129 .loc 1 3512 5 view .LVU4488 + 15130 0060 0332 adds r2, r2, #3 + 15131 0062 A354 strb r3, [r4, r2] +3513:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** } + 15132 .loc 1 3513 5 view .LVU4489 + 15133 0064 0132 adds r2, r2, #1 + 15134 0066 A354 strb r3, [r4, r2] + 15135 0068 1AE0 b .L1038 + 15136 .LVL1278: + 15137 .L1040: +3477:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 15138 .loc 1 3477 5 view .LVU4490 + ARM GAS /tmp/ccMtK8ce.s page 468 + + + 15139 006a 0068 ldr r0, [r0] + 15140 .LVL1279: +3477:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 15141 .loc 1 3477 5 is_stmt 0 view .LVU4491 + 15142 006c 0022 movs r2, #0 + 15143 006e 0021 movs r1, #0 + 15144 .LVL1280: +3477:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 15145 .loc 1 3477 5 view .LVU4492 + 15146 0070 FFF7FEFF bl TIM_CCxChannelCmd + 15147 .LVL1281: +3480:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** } + 15148 .loc 1 3480 5 is_stmt 1 view .LVU4493 + 15149 0074 2268 ldr r2, [r4] + 15150 0076 D368 ldr r3, [r2, #12] + 15151 0078 0221 movs r1, #2 + 15152 007a 8B43 bics r3, r1 + 15153 007c D360 str r3, [r2, #12] + 15154 007e D9E7 b .L1032 + 15155 .LVL1282: + 15156 .L1041: +3484:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 15157 .loc 1 3484 5 view .LVU4494 + 15158 0080 0068 ldr r0, [r0] + 15159 .LVL1283: +3484:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 15160 .loc 1 3484 5 is_stmt 0 view .LVU4495 + 15161 0082 0022 movs r2, #0 + 15162 0084 0421 movs r1, #4 + 15163 .LVL1284: +3484:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 15164 .loc 1 3484 5 view .LVU4496 + 15165 0086 FFF7FEFF bl TIM_CCxChannelCmd + 15166 .LVL1285: +3487:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** } + 15167 .loc 1 3487 5 is_stmt 1 view .LVU4497 + 15168 008a 2268 ldr r2, [r4] + 15169 008c D368 ldr r3, [r2, #12] + 15170 008e 0421 movs r1, #4 + 15171 0090 8B43 bics r3, r1 + 15172 0092 D360 str r3, [r2, #12] + 15173 0094 CEE7 b .L1032 + 15174 .L1035: +3505:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** TIM_CHANNEL_N_STATE_SET(htim, Channel, HAL_TIM_CHANNEL_STATE_READY); + 15175 .loc 1 3505 5 view .LVU4498 +3505:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** TIM_CHANNEL_N_STATE_SET(htim, Channel, HAL_TIM_CHANNEL_STATE_READY); + 15176 .loc 1 3505 5 is_stmt 0 discriminator 1 view .LVU4499 + 15177 0096 0123 movs r3, #1 + 15178 0098 3E22 movs r2, #62 + 15179 009a A354 strb r3, [r4, r2] +3506:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** } + 15180 .loc 1 3506 5 is_stmt 1 view .LVU4500 +3506:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** } + 15181 .loc 1 3506 5 is_stmt 0 discriminator 1 view .LVU4501 + 15182 009c 0432 adds r2, r2, #4 + 15183 009e A354 strb r3, [r4, r2] + 15184 .L1038: + ARM GAS /tmp/ccMtK8ce.s page 469 + + +3517:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** } + 15185 .loc 1 3517 3 is_stmt 1 view .LVU4502 +3518:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 15186 .loc 1 3518 1 is_stmt 0 view .LVU4503 + 15187 00a0 0020 movs r0, #0 + 15188 @ sp needed + 15189 .LVL1286: + 15190 .LVL1287: +3518:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 15191 .loc 1 3518 1 view .LVU4504 + 15192 00a2 70BD pop {r4, r5, r6, pc} + 15193 .LVL1288: + 15194 .L1042: +3505:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** TIM_CHANNEL_N_STATE_SET(htim, Channel, HAL_TIM_CHANNEL_STATE_READY); + 15195 .loc 1 3505 5 is_stmt 1 view .LVU4505 +3505:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** TIM_CHANNEL_N_STATE_SET(htim, Channel, HAL_TIM_CHANNEL_STATE_READY); + 15196 .loc 1 3505 5 is_stmt 0 discriminator 3 view .LVU4506 + 15197 00a4 0123 movs r3, #1 + 15198 00a6 3F22 movs r2, #63 + 15199 00a8 A354 strb r3, [r4, r2] +3506:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** } + 15200 .loc 1 3506 5 is_stmt 1 view .LVU4507 +3506:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** } + 15201 .loc 1 3506 5 is_stmt 0 discriminator 3 view .LVU4508 + 15202 00aa 0432 adds r2, r2, #4 + 15203 00ac A354 strb r3, [r4, r2] + 15204 00ae F7E7 b .L1038 + 15205 .L1044: + 15206 .align 2 + 15207 .L1043: + 15208 00b0 11110000 .word 4369 + 15209 00b4 44040000 .word 1092 + 15210 .cfi_endproc + 15211 .LFE95: + 15213 .section .text.HAL_TIM_Encoder_Start_DMA,"ax",%progbits + 15214 .align 1 + 15215 .global HAL_TIM_Encoder_Start_DMA + 15216 .syntax unified + 15217 .code 16 + 15218 .thumb_func + 15220 HAL_TIM_Encoder_Start_DMA: + 15221 .LVL1289: + 15222 .LFB96: +3535:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** HAL_TIM_ChannelStateTypeDef channel_1_state = TIM_CHANNEL_STATE_GET(htim, TIM_CHANNEL_1); + 15223 .loc 1 3535 1 is_stmt 1 view -0 + 15224 .cfi_startproc + 15225 @ args = 4, pretend = 0, frame = 8 + 15226 @ frame_needed = 0, uses_anonymous_args = 0 +3535:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** HAL_TIM_ChannelStateTypeDef channel_1_state = TIM_CHANNEL_STATE_GET(htim, TIM_CHANNEL_1); + 15227 .loc 1 3535 1 is_stmt 0 view .LVU4510 + 15228 0000 F0B5 push {r4, r5, r6, r7, lr} + 15229 .cfi_def_cfa_offset 20 + 15230 .cfi_offset 4, -20 + 15231 .cfi_offset 5, -16 + 15232 .cfi_offset 6, -12 + 15233 .cfi_offset 7, -8 + 15234 .cfi_offset 14, -4 + ARM GAS /tmp/ccMtK8ce.s page 470 + + + 15235 0002 83B0 sub sp, sp, #12 + 15236 .cfi_def_cfa_offset 32 + 15237 0004 0400 movs r4, r0 + 15238 0006 0193 str r3, [sp, #4] + 15239 0008 08AB add r3, sp, #32 + 15240 .LVL1290: +3535:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** HAL_TIM_ChannelStateTypeDef channel_1_state = TIM_CHANNEL_STATE_GET(htim, TIM_CHANNEL_1); + 15241 .loc 1 3535 1 view .LVU4511 + 15242 000a 1F88 ldrh r7, [r3] +3536:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** HAL_TIM_ChannelStateTypeDef channel_2_state = TIM_CHANNEL_STATE_GET(htim, TIM_CHANNEL_2); + 15243 .loc 1 3536 3 is_stmt 1 view .LVU4512 +3536:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** HAL_TIM_ChannelStateTypeDef channel_2_state = TIM_CHANNEL_STATE_GET(htim, TIM_CHANNEL_2); + 15244 .loc 1 3536 31 is_stmt 0 view .LVU4513 + 15245 000c 3E23 movs r3, #62 + 15246 .LVL1291: +3536:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** HAL_TIM_ChannelStateTypeDef channel_2_state = TIM_CHANNEL_STATE_GET(htim, TIM_CHANNEL_2); + 15247 .loc 1 3536 31 view .LVU4514 + 15248 000e C55C ldrb r5, [r0, r3] + 15249 0010 EDB2 uxtb r5, r5 + 15250 .LVL1292: +3537:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** HAL_TIM_ChannelStateTypeDef complementary_channel_1_state = TIM_CHANNEL_N_STATE_GET(htim, TIM_CHA + 15251 .loc 1 3537 3 is_stmt 1 view .LVU4515 +3537:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** HAL_TIM_ChannelStateTypeDef complementary_channel_1_state = TIM_CHANNEL_N_STATE_GET(htim, TIM_CHA + 15252 .loc 1 3537 31 is_stmt 0 view .LVU4516 + 15253 0012 0133 adds r3, r3, #1 + 15254 0014 C05C ldrb r0, [r0, r3] + 15255 .LVL1293: +3537:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** HAL_TIM_ChannelStateTypeDef complementary_channel_1_state = TIM_CHANNEL_N_STATE_GET(htim, TIM_CHA + 15256 .loc 1 3537 31 view .LVU4517 + 15257 0016 C0B2 uxtb r0, r0 + 15258 .LVL1294: +3538:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** HAL_TIM_ChannelStateTypeDef complementary_channel_2_state = TIM_CHANNEL_N_STATE_GET(htim, TIM_CHA + 15259 .loc 1 3538 3 is_stmt 1 view .LVU4518 +3538:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** HAL_TIM_ChannelStateTypeDef complementary_channel_2_state = TIM_CHANNEL_N_STATE_GET(htim, TIM_CHA + 15260 .loc 1 3538 31 is_stmt 0 view .LVU4519 + 15261 0018 0333 adds r3, r3, #3 + 15262 001a E35C ldrb r3, [r4, r3] + 15263 001c DBB2 uxtb r3, r3 + 15264 .LVL1295: +3539:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 15265 .loc 1 3539 3 is_stmt 1 view .LVU4520 +3539:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 15266 .loc 1 3539 31 is_stmt 0 view .LVU4521 + 15267 001e 4326 movs r6, #67 + 15268 0020 A65D ldrb r6, [r4, r6] + 15269 0022 F6B2 uxtb r6, r6 + 15270 .LVL1296: +3542:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 15271 .loc 1 3542 3 is_stmt 1 view .LVU4522 +3545:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** { + 15272 .loc 1 3545 3 view .LVU4523 +3545:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** { + 15273 .loc 1 3545 6 is_stmt 0 view .LVU4524 + 15274 0024 0029 cmp r1, #0 + 15275 0026 2ED1 bne .L1046 +3547:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** || (complementary_channel_1_state == HAL_TIM_CHANNEL_STATE_BUSY)) + 15276 .loc 1 3547 5 is_stmt 1 view .LVU4525 + ARM GAS /tmp/ccMtK8ce.s page 471 + + +3547:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** || (complementary_channel_1_state == HAL_TIM_CHANNEL_STATE_BUSY)) + 15277 .loc 1 3547 8 is_stmt 0 view .LVU4526 + 15278 0028 022D cmp r5, #2 + 15279 002a 00D1 bne .LCB14034 + 15280 002c EEE0 b .L1047 @long jump + 15281 .LCB14034: +3548:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** { + 15282 .loc 1 3548 9 view .LVU4527 + 15283 002e 022B cmp r3, #2 + 15284 0030 00D1 bne .LCB14036 + 15285 0032 E8E0 b .L1053 @long jump + 15286 .LCB14036: +3552:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** && (complementary_channel_1_state == HAL_TIM_CHANNEL_STATE_READY)) + 15287 .loc 1 3552 10 is_stmt 1 view .LVU4528 +3552:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** && (complementary_channel_1_state == HAL_TIM_CHANNEL_STATE_READY)) + 15288 .loc 1 3552 13 is_stmt 0 view .LVU4529 + 15289 0034 012D cmp r5, #1 + 15290 0036 00D0 beq .LCB14039 + 15291 0038 E7E0 b .L1054 @long jump + 15292 .LCB14039: +3553:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** { + 15293 .loc 1 3553 14 view .LVU4530 + 15294 003a 012B cmp r3, #1 + 15295 003c 00D0 beq .LCB14041 + 15296 003e E5E0 b .L1047 @long jump + 15297 .LCB14041: +3555:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** { + 15298 .loc 1 3555 7 is_stmt 1 view .LVU4531 +3555:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** { + 15299 .loc 1 3555 10 is_stmt 0 view .LVU4532 + 15300 0040 002A cmp r2, #0 + 15301 0042 00D1 bne .LCB14044 + 15302 0044 E5E0 b .L1055 @long jump + 15303 .LCB14044: +3555:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** { + 15304 .loc 1 3555 28 discriminator 1 view .LVU4533 + 15305 0046 002F cmp r7, #0 + 15306 0048 00D1 bne .LCB14046 + 15307 004a E4E0 b .L1056 @long jump + 15308 .LCB14046: +3561:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** TIM_CHANNEL_N_STATE_SET(htim, TIM_CHANNEL_1, HAL_TIM_CHANNEL_STATE_BUSY); + 15309 .loc 1 3561 9 is_stmt 1 view .LVU4534 + 15310 004c 0133 adds r3, r3, #1 + 15311 .LVL1297: +3561:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** TIM_CHANNEL_N_STATE_SET(htim, TIM_CHANNEL_1, HAL_TIM_CHANNEL_STATE_BUSY); + 15312 .loc 1 3561 9 is_stmt 0 view .LVU4535 + 15313 004e 3E20 movs r0, #62 + 15314 .LVL1298: +3561:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** TIM_CHANNEL_N_STATE_SET(htim, TIM_CHANNEL_1, HAL_TIM_CHANNEL_STATE_BUSY); + 15315 .loc 1 3561 9 view .LVU4536 + 15316 0050 2354 strb r3, [r4, r0] +3562:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** } + 15317 .loc 1 3562 9 is_stmt 1 view .LVU4537 + 15318 0052 0430 adds r0, r0, #4 + 15319 0054 2354 strb r3, [r4, r0] + 15320 .LVL1299: + 15321 .L1048: + ARM GAS /tmp/ccMtK8ce.s page 472 + + +3627:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** { + 15322 .loc 1 3627 3 view .LVU4538 + 15323 0056 0029 cmp r1, #0 + 15324 0058 5CD0 beq .L1050 + 15325 005a 0429 cmp r1, #4 + 15326 005c 7ED0 beq .L1051 +3687:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** htim->hdma[TIM_DMA_ID_CC1]->XferHalfCpltCallback = TIM_DMACaptureHalfCplt; + 15327 .loc 1 3687 7 view .LVU4539 +3687:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** htim->hdma[TIM_DMA_ID_CC1]->XferHalfCpltCallback = TIM_DMACaptureHalfCplt; + 15328 .loc 1 3687 17 is_stmt 0 view .LVU4540 + 15329 005e 636A ldr r3, [r4, #36] +3687:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** htim->hdma[TIM_DMA_ID_CC1]->XferHalfCpltCallback = TIM_DMACaptureHalfCplt; + 15330 .loc 1 3687 52 view .LVU4541 + 15331 0060 7D49 ldr r1, .L1082 + 15332 .LVL1300: +3687:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** htim->hdma[TIM_DMA_ID_CC1]->XferHalfCpltCallback = TIM_DMACaptureHalfCplt; + 15333 .loc 1 3687 52 view .LVU4542 + 15334 0062 9962 str r1, [r3, #40] +3688:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 15335 .loc 1 3688 7 is_stmt 1 view .LVU4543 +3688:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 15336 .loc 1 3688 17 is_stmt 0 view .LVU4544 + 15337 0064 636A ldr r3, [r4, #36] +3688:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 15338 .loc 1 3688 56 view .LVU4545 + 15339 0066 7D49 ldr r1, .L1082+4 + 15340 0068 D962 str r1, [r3, #44] +3691:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 15341 .loc 1 3691 7 is_stmt 1 view .LVU4546 +3691:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 15342 .loc 1 3691 17 is_stmt 0 view .LVU4547 + 15343 006a 636A ldr r3, [r4, #36] +3691:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 15344 .loc 1 3691 53 view .LVU4548 + 15345 006c 7C49 ldr r1, .L1082+8 + 15346 006e 1963 str r1, [r3, #48] +3694:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** Length) != HAL_OK) + 15347 .loc 1 3694 7 is_stmt 1 view .LVU4549 +3694:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** Length) != HAL_OK) + 15348 .loc 1 3694 71 is_stmt 0 view .LVU4550 + 15349 0070 2168 ldr r1, [r4] +3694:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** Length) != HAL_OK) + 15350 .loc 1 3694 66 view .LVU4551 + 15351 0072 3431 adds r1, r1, #52 +3694:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** Length) != HAL_OK) + 15352 .loc 1 3694 11 view .LVU4552 + 15353 0074 606A ldr r0, [r4, #36] + 15354 0076 3B00 movs r3, r7 + 15355 0078 FFF7FEFF bl HAL_DMA_Start_IT + 15356 .LVL1301: +3694:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** Length) != HAL_OK) + 15357 .loc 1 3694 10 discriminator 1 view .LVU4553 + 15358 007c 0028 cmp r0, #0 + 15359 007e 00D1 bne .LCB14086 + 15360 0080 91E0 b .L1077 @long jump + 15361 .LCB14086: +3698:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** } + ARM GAS /tmp/ccMtK8ce.s page 473 + + + 15362 .loc 1 3698 16 view .LVU4554 + 15363 0082 0125 movs r5, #1 + 15364 .LVL1302: +3698:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** } + 15365 .loc 1 3698 16 view .LVU4555 + 15366 0084 C2E0 b .L1047 + 15367 .LVL1303: + 15368 .L1046: +3570:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** { + 15369 .loc 1 3570 8 is_stmt 1 view .LVU4556 +3570:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** { + 15370 .loc 1 3570 11 is_stmt 0 view .LVU4557 + 15371 0086 0429 cmp r1, #4 + 15372 0088 2BD0 beq .L1078 +3597:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** || (channel_2_state == HAL_TIM_CHANNEL_STATE_BUSY) + 15373 .loc 1 3597 5 is_stmt 1 view .LVU4558 +3597:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** || (channel_2_state == HAL_TIM_CHANNEL_STATE_BUSY) + 15374 .loc 1 3597 8 is_stmt 0 view .LVU4559 + 15375 008a 022D cmp r5, #2 + 15376 008c 00D1 bne .LCB14105 + 15377 008e BDE0 b .L1047 @long jump + 15378 .LCB14105: +3598:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** || (complementary_channel_1_state == HAL_TIM_CHANNEL_STATE_BUSY) + 15379 .loc 1 3598 9 view .LVU4560 + 15380 0090 0228 cmp r0, #2 + 15381 0092 00D1 bne .LCB14107 + 15382 0094 CDE0 b .L1063 @long jump + 15383 .LCB14107: +3599:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** || (complementary_channel_2_state == HAL_TIM_CHANNEL_STATE_BUSY)) + 15384 .loc 1 3599 9 view .LVU4561 + 15385 0096 022B cmp r3, #2 + 15386 0098 00D1 bne .LCB14109 + 15387 009a CCE0 b .L1064 @long jump + 15388 .LCB14109: +3600:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** { + 15389 .loc 1 3600 9 view .LVU4562 + 15390 009c 022E cmp r6, #2 + 15391 009e 00D1 bne .LCB14111 + 15392 00a0 CBE0 b .L1065 @long jump + 15393 .LCB14111: +3604:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** && (channel_2_state == HAL_TIM_CHANNEL_STATE_READY) + 15394 .loc 1 3604 10 is_stmt 1 view .LVU4563 +3604:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** && (channel_2_state == HAL_TIM_CHANNEL_STATE_READY) + 15395 .loc 1 3604 13 is_stmt 0 view .LVU4564 + 15396 00a2 012D cmp r5, #1 + 15397 00a4 00D0 beq .LCB14114 + 15398 00a6 CAE0 b .L1066 @long jump + 15399 .LCB14114: +3605:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** && (complementary_channel_1_state == HAL_TIM_CHANNEL_STATE_READY) + 15400 .loc 1 3605 14 view .LVU4565 + 15401 00a8 0128 cmp r0, #1 + 15402 00aa 00D0 beq .LCB14116 + 15403 00ac AEE0 b .L1047 @long jump + 15404 .LCB14116: +3606:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** && (complementary_channel_2_state == HAL_TIM_CHANNEL_STATE_READY)) + 15405 .loc 1 3606 14 view .LVU4566 + 15406 00ae 012B cmp r3, #1 + ARM GAS /tmp/ccMtK8ce.s page 474 + + + 15407 00b0 00D0 beq .LCB14118 + 15408 00b2 C6E0 b .L1067 @long jump + 15409 .LCB14118: +3607:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** { + 15410 .loc 1 3607 14 view .LVU4567 + 15411 00b4 012E cmp r6, #1 + 15412 00b6 00D0 beq .LCB14120 + 15413 00b8 C5E0 b .L1068 @long jump + 15414 .LCB14120: +3609:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** { + 15415 .loc 1 3609 7 is_stmt 1 view .LVU4568 +3609:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** { + 15416 .loc 1 3609 10 is_stmt 0 view .LVU4569 + 15417 00ba 002A cmp r2, #0 + 15418 00bc 00D1 bne .LCB14123 + 15419 00be C4E0 b .L1069 @long jump + 15420 .LCB14123: +3609:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** { + 15421 .loc 1 3609 30 discriminator 1 view .LVU4570 + 15422 00c0 019B ldr r3, [sp, #4] + 15423 .LVL1304: +3609:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** { + 15424 .loc 1 3609 30 discriminator 1 view .LVU4571 + 15425 00c2 002B cmp r3, #0 + 15426 00c4 00D1 bne .LCB14127 + 15427 00c6 C2E0 b .L1070 @long jump + 15428 .LCB14127: +3609:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** { + 15429 .loc 1 3609 52 discriminator 2 view .LVU4572 + 15430 00c8 002F cmp r7, #0 + 15431 00ca 00D1 bne .LCB14129 + 15432 00cc C1E0 b .L1071 @long jump + 15433 .LCB14129: +3615:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** TIM_CHANNEL_STATE_SET(htim, TIM_CHANNEL_2, HAL_TIM_CHANNEL_STATE_BUSY); + 15434 .loc 1 3615 9 is_stmt 1 view .LVU4573 + 15435 00ce 0223 movs r3, #2 + 15436 00d0 3D30 adds r0, r0, #61 + 15437 .LVL1305: +3615:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** TIM_CHANNEL_STATE_SET(htim, TIM_CHANNEL_2, HAL_TIM_CHANNEL_STATE_BUSY); + 15438 .loc 1 3615 9 is_stmt 0 view .LVU4574 + 15439 00d2 2354 strb r3, [r4, r0] +3616:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** TIM_CHANNEL_N_STATE_SET(htim, TIM_CHANNEL_1, HAL_TIM_CHANNEL_STATE_BUSY); + 15440 .loc 1 3616 9 is_stmt 1 view .LVU4575 + 15441 00d4 0130 adds r0, r0, #1 + 15442 .LVL1306: +3616:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** TIM_CHANNEL_N_STATE_SET(htim, TIM_CHANNEL_1, HAL_TIM_CHANNEL_STATE_BUSY); + 15443 .loc 1 3616 9 is_stmt 0 view .LVU4576 + 15444 00d6 2354 strb r3, [r4, r0] +3617:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** TIM_CHANNEL_N_STATE_SET(htim, TIM_CHANNEL_2, HAL_TIM_CHANNEL_STATE_BUSY); + 15445 .loc 1 3617 9 is_stmt 1 view .LVU4577 + 15446 00d8 0330 adds r0, r0, #3 + 15447 .LVL1307: +3617:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** TIM_CHANNEL_N_STATE_SET(htim, TIM_CHANNEL_2, HAL_TIM_CHANNEL_STATE_BUSY); + 15448 .loc 1 3617 9 is_stmt 0 view .LVU4578 + 15449 00da 2354 strb r3, [r4, r0] +3618:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** } + 15450 .loc 1 3618 9 is_stmt 1 view .LVU4579 + ARM GAS /tmp/ccMtK8ce.s page 475 + + + 15451 00dc 0130 adds r0, r0, #1 + 15452 .LVL1308: +3618:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** } + 15453 .loc 1 3618 9 is_stmt 0 view .LVU4580 + 15454 00de 2354 strb r3, [r4, r0] +3609:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** { + 15455 .loc 1 3609 10 view .LVU4581 + 15456 00e0 B9E7 b .L1048 + 15457 .LVL1309: + 15458 .L1078: +3572:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** || (complementary_channel_2_state == HAL_TIM_CHANNEL_STATE_BUSY)) + 15459 .loc 1 3572 5 is_stmt 1 view .LVU4582 +3572:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** || (complementary_channel_2_state == HAL_TIM_CHANNEL_STATE_BUSY)) + 15460 .loc 1 3572 8 is_stmt 0 view .LVU4583 + 15461 00e2 0228 cmp r0, #2 + 15462 00e4 00D1 bne .LCB14156 + 15463 00e6 98E0 b .L1057 @long jump + 15464 .LCB14156: +3573:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** { + 15465 .loc 1 3573 9 view .LVU4584 + 15466 00e8 022E cmp r6, #2 + 15467 00ea 00D1 bne .LCB14158 + 15468 00ec 97E0 b .L1058 @long jump + 15469 .LCB14158: +3577:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** && (complementary_channel_2_state == HAL_TIM_CHANNEL_STATE_READY)) + 15470 .loc 1 3577 10 is_stmt 1 view .LVU4585 +3577:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** && (complementary_channel_2_state == HAL_TIM_CHANNEL_STATE_READY)) + 15471 .loc 1 3577 13 is_stmt 0 view .LVU4586 + 15472 00ee 0128 cmp r0, #1 + 15473 00f0 00D0 beq .LCB14161 + 15474 00f2 96E0 b .L1059 @long jump + 15475 .LCB14161: +3578:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** { + 15476 .loc 1 3578 14 view .LVU4587 + 15477 00f4 012E cmp r6, #1 + 15478 00f6 00D0 beq .LCB14163 + 15479 00f8 95E0 b .L1060 @long jump + 15480 .LCB14163: +3580:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** { + 15481 .loc 1 3580 7 is_stmt 1 view .LVU4588 +3580:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** { + 15482 .loc 1 3580 10 is_stmt 0 view .LVU4589 + 15483 00fa 019B ldr r3, [sp, #4] + 15484 .LVL1310: +3580:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** { + 15485 .loc 1 3580 10 view .LVU4590 + 15486 00fc 002B cmp r3, #0 + 15487 00fe 00D1 bne .LCB14168 + 15488 0100 93E0 b .L1061 @long jump + 15489 .LCB14168: +3580:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** { + 15490 .loc 1 3580 28 discriminator 1 view .LVU4591 + 15491 0102 002F cmp r7, #0 + 15492 0104 00D1 bne .LCB14170 + 15493 0106 92E0 b .L1062 @long jump + 15494 .LCB14170: +3586:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** TIM_CHANNEL_N_STATE_SET(htim, TIM_CHANNEL_2, HAL_TIM_CHANNEL_STATE_BUSY); + ARM GAS /tmp/ccMtK8ce.s page 476 + + + 15495 .loc 1 3586 9 is_stmt 1 view .LVU4592 + 15496 0108 0223 movs r3, #2 + 15497 010a 3E30 adds r0, r0, #62 + 15498 .LVL1311: +3586:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** TIM_CHANNEL_N_STATE_SET(htim, TIM_CHANNEL_2, HAL_TIM_CHANNEL_STATE_BUSY); + 15499 .loc 1 3586 9 is_stmt 0 view .LVU4593 + 15500 010c 2354 strb r3, [r4, r0] +3587:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** } + 15501 .loc 1 3587 9 is_stmt 1 view .LVU4594 + 15502 010e 0430 adds r0, r0, #4 + 15503 .LVL1312: +3587:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** } + 15504 .loc 1 3587 9 is_stmt 0 view .LVU4595 + 15505 0110 2354 strb r3, [r4, r0] + 15506 0112 A0E7 b .L1048 + 15507 .LVL1313: + 15508 .L1050: +3632:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** htim->hdma[TIM_DMA_ID_CC1]->XferHalfCpltCallback = TIM_DMACaptureHalfCplt; + 15509 .loc 1 3632 7 is_stmt 1 view .LVU4596 +3632:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** htim->hdma[TIM_DMA_ID_CC1]->XferHalfCpltCallback = TIM_DMACaptureHalfCplt; + 15510 .loc 1 3632 17 is_stmt 0 view .LVU4597 + 15511 0114 636A ldr r3, [r4, #36] +3632:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** htim->hdma[TIM_DMA_ID_CC1]->XferHalfCpltCallback = TIM_DMACaptureHalfCplt; + 15512 .loc 1 3632 52 view .LVU4598 + 15513 0116 5049 ldr r1, .L1082 + 15514 .LVL1314: +3632:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** htim->hdma[TIM_DMA_ID_CC1]->XferHalfCpltCallback = TIM_DMACaptureHalfCplt; + 15515 .loc 1 3632 52 view .LVU4599 + 15516 0118 9962 str r1, [r3, #40] +3633:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 15517 .loc 1 3633 7 is_stmt 1 view .LVU4600 +3633:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 15518 .loc 1 3633 17 is_stmt 0 view .LVU4601 + 15519 011a 636A ldr r3, [r4, #36] +3633:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 15520 .loc 1 3633 56 view .LVU4602 + 15521 011c 4F49 ldr r1, .L1082+4 + 15522 011e D962 str r1, [r3, #44] +3636:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 15523 .loc 1 3636 7 is_stmt 1 view .LVU4603 +3636:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 15524 .loc 1 3636 17 is_stmt 0 view .LVU4604 + 15525 0120 636A ldr r3, [r4, #36] +3636:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 15526 .loc 1 3636 53 view .LVU4605 + 15527 0122 4F49 ldr r1, .L1082+8 + 15528 0124 1963 str r1, [r3, #48] +3639:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** Length) != HAL_OK) + 15529 .loc 1 3639 7 is_stmt 1 view .LVU4606 +3639:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** Length) != HAL_OK) + 15530 .loc 1 3639 71 is_stmt 0 view .LVU4607 + 15531 0126 2168 ldr r1, [r4] +3639:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** Length) != HAL_OK) + 15532 .loc 1 3639 66 view .LVU4608 + 15533 0128 3431 adds r1, r1, #52 +3639:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** Length) != HAL_OK) + 15534 .loc 1 3639 11 view .LVU4609 + ARM GAS /tmp/ccMtK8ce.s page 477 + + + 15535 012a 606A ldr r0, [r4, #36] + 15536 012c 3B00 movs r3, r7 + 15537 012e FFF7FEFF bl HAL_DMA_Start_IT + 15538 .LVL1315: +3639:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** Length) != HAL_OK) + 15539 .loc 1 3639 11 view .LVU4610 + 15540 0132 051E subs r5, r0, #0 + 15541 .LVL1316: +3639:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** Length) != HAL_OK) + 15542 .loc 1 3639 10 discriminator 1 view .LVU4611 + 15543 0134 01D0 beq .L1079 +3643:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** } + 15544 .loc 1 3643 16 view .LVU4612 + 15545 0136 0125 movs r5, #1 + 15546 0138 68E0 b .L1047 + 15547 .L1079: +3646:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 15548 .loc 1 3646 7 is_stmt 1 view .LVU4613 + 15549 013a 2268 ldr r2, [r4] + 15550 013c D168 ldr r1, [r2, #12] + 15551 013e 8023 movs r3, #128 + 15552 0140 9B00 lsls r3, r3, #2 + 15553 0142 0B43 orrs r3, r1 + 15554 0144 D360 str r3, [r2, #12] +3649:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 15555 .loc 1 3649 7 view .LVU4614 + 15556 0146 2068 ldr r0, [r4] + 15557 0148 0122 movs r2, #1 + 15558 014a 0021 movs r1, #0 + 15559 014c FFF7FEFF bl TIM_CCxChannelCmd + 15560 .LVL1317: +3652:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 15561 .loc 1 3652 7 view .LVU4615 + 15562 0150 2268 ldr r2, [r4] + 15563 0152 1368 ldr r3, [r2] + 15564 0154 0121 movs r1, #1 + 15565 0156 0B43 orrs r3, r1 + 15566 0158 1360 str r3, [r2] +3654:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** } + 15567 .loc 1 3654 7 view .LVU4616 + 15568 015a 57E0 b .L1047 + 15569 .LVL1318: + 15570 .L1051: +3660:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** htim->hdma[TIM_DMA_ID_CC2]->XferHalfCpltCallback = TIM_DMACaptureHalfCplt; + 15571 .loc 1 3660 7 view .LVU4617 +3660:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** htim->hdma[TIM_DMA_ID_CC2]->XferHalfCpltCallback = TIM_DMACaptureHalfCplt; + 15572 .loc 1 3660 17 is_stmt 0 view .LVU4618 + 15573 015c A36A ldr r3, [r4, #40] +3660:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** htim->hdma[TIM_DMA_ID_CC2]->XferHalfCpltCallback = TIM_DMACaptureHalfCplt; + 15574 .loc 1 3660 52 view .LVU4619 + 15575 015e 3E4A ldr r2, .L1082 + 15576 .LVL1319: +3660:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** htim->hdma[TIM_DMA_ID_CC2]->XferHalfCpltCallback = TIM_DMACaptureHalfCplt; + 15577 .loc 1 3660 52 view .LVU4620 + 15578 0160 9A62 str r2, [r3, #40] +3661:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 15579 .loc 1 3661 7 is_stmt 1 view .LVU4621 + ARM GAS /tmp/ccMtK8ce.s page 478 + + +3661:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 15580 .loc 1 3661 17 is_stmt 0 view .LVU4622 + 15581 0162 A36A ldr r3, [r4, #40] +3661:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 15582 .loc 1 3661 56 view .LVU4623 + 15583 0164 3D4A ldr r2, .L1082+4 + 15584 0166 DA62 str r2, [r3, #44] +3664:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** /* Enable the DMA channel */ + 15585 .loc 1 3664 7 is_stmt 1 view .LVU4624 +3664:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** /* Enable the DMA channel */ + 15586 .loc 1 3664 17 is_stmt 0 view .LVU4625 + 15587 0168 A36A ldr r3, [r4, #40] +3664:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** /* Enable the DMA channel */ + 15588 .loc 1 3664 53 view .LVU4626 + 15589 016a 3D4A ldr r2, .L1082+8 + 15590 016c 1A63 str r2, [r3, #48] +3666:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** Length) != HAL_OK) + 15591 .loc 1 3666 7 is_stmt 1 view .LVU4627 +3666:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** Length) != HAL_OK) + 15592 .loc 1 3666 71 is_stmt 0 view .LVU4628 + 15593 016e 2168 ldr r1, [r4] + 15594 .LVL1320: +3666:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** Length) != HAL_OK) + 15595 .loc 1 3666 66 view .LVU4629 + 15596 0170 3831 adds r1, r1, #56 +3666:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** Length) != HAL_OK) + 15597 .loc 1 3666 11 view .LVU4630 + 15598 0172 A06A ldr r0, [r4, #40] + 15599 0174 3B00 movs r3, r7 + 15600 0176 019A ldr r2, [sp, #4] + 15601 0178 FFF7FEFF bl HAL_DMA_Start_IT + 15602 .LVL1321: + 15603 017c 051E subs r5, r0, #0 + 15604 .LVL1322: +3666:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** Length) != HAL_OK) + 15605 .loc 1 3666 10 discriminator 1 view .LVU4631 + 15606 017e 01D0 beq .L1080 +3670:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** } + 15607 .loc 1 3670 16 view .LVU4632 + 15608 0180 0125 movs r5, #1 + 15609 0182 43E0 b .L1047 + 15610 .L1080: +3673:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 15611 .loc 1 3673 7 is_stmt 1 view .LVU4633 + 15612 0184 2268 ldr r2, [r4] + 15613 0186 D168 ldr r1, [r2, #12] + 15614 0188 8023 movs r3, #128 + 15615 018a DB00 lsls r3, r3, #3 + 15616 018c 0B43 orrs r3, r1 + 15617 018e D360 str r3, [r2, #12] +3676:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 15618 .loc 1 3676 7 view .LVU4634 + 15619 0190 2068 ldr r0, [r4] + 15620 0192 0122 movs r2, #1 + 15621 0194 0421 movs r1, #4 + 15622 0196 FFF7FEFF bl TIM_CCxChannelCmd + 15623 .LVL1323: + ARM GAS /tmp/ccMtK8ce.s page 479 + + +3679:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 15624 .loc 1 3679 7 view .LVU4635 + 15625 019a 2268 ldr r2, [r4] + 15626 019c 1368 ldr r3, [r2] + 15627 019e 0121 movs r1, #1 + 15628 01a0 0B43 orrs r3, r1 + 15629 01a2 1360 str r3, [r2] +3681:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** } + 15630 .loc 1 3681 7 view .LVU4636 + 15631 01a4 32E0 b .L1047 + 15632 .LVL1324: + 15633 .L1077: +3702:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** htim->hdma[TIM_DMA_ID_CC2]->XferHalfCpltCallback = TIM_DMACaptureHalfCplt; + 15634 .loc 1 3702 7 view .LVU4637 +3702:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** htim->hdma[TIM_DMA_ID_CC2]->XferHalfCpltCallback = TIM_DMACaptureHalfCplt; + 15635 .loc 1 3702 17 is_stmt 0 view .LVU4638 + 15636 01a6 A36A ldr r3, [r4, #40] +3702:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** htim->hdma[TIM_DMA_ID_CC2]->XferHalfCpltCallback = TIM_DMACaptureHalfCplt; + 15637 .loc 1 3702 52 view .LVU4639 + 15638 01a8 2B4A ldr r2, .L1082 + 15639 01aa 9A62 str r2, [r3, #40] +3703:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 15640 .loc 1 3703 7 is_stmt 1 view .LVU4640 +3703:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 15641 .loc 1 3703 17 is_stmt 0 view .LVU4641 + 15642 01ac A36A ldr r3, [r4, #40] +3703:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 15643 .loc 1 3703 56 view .LVU4642 + 15644 01ae 2B4A ldr r2, .L1082+4 + 15645 01b0 DA62 str r2, [r3, #44] +3706:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 15646 .loc 1 3706 7 is_stmt 1 view .LVU4643 +3706:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 15647 .loc 1 3706 17 is_stmt 0 view .LVU4644 + 15648 01b2 A36A ldr r3, [r4, #40] +3706:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 15649 .loc 1 3706 53 view .LVU4645 + 15650 01b4 2A4A ldr r2, .L1082+8 + 15651 01b6 1A63 str r2, [r3, #48] +3709:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** Length) != HAL_OK) + 15652 .loc 1 3709 7 is_stmt 1 view .LVU4646 +3709:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** Length) != HAL_OK) + 15653 .loc 1 3709 71 is_stmt 0 view .LVU4647 + 15654 01b8 2168 ldr r1, [r4] +3709:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** Length) != HAL_OK) + 15655 .loc 1 3709 66 view .LVU4648 + 15656 01ba 3831 adds r1, r1, #56 +3709:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** Length) != HAL_OK) + 15657 .loc 1 3709 11 view .LVU4649 + 15658 01bc A06A ldr r0, [r4, #40] + 15659 01be 3B00 movs r3, r7 + 15660 01c0 019A ldr r2, [sp, #4] + 15661 01c2 FFF7FEFF bl HAL_DMA_Start_IT + 15662 .LVL1325: + 15663 01c6 051E subs r5, r0, #0 + 15664 .LVL1326: +3709:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** Length) != HAL_OK) + ARM GAS /tmp/ccMtK8ce.s page 480 + + + 15665 .loc 1 3709 10 discriminator 1 view .LVU4650 + 15666 01c8 01D0 beq .L1081 +3713:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** } + 15667 .loc 1 3713 16 view .LVU4651 + 15668 01ca 0125 movs r5, #1 + 15669 01cc 1EE0 b .L1047 + 15670 .L1081: +3717:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** /* Enable the TIM Input Capture DMA request */ + 15671 .loc 1 3717 7 is_stmt 1 view .LVU4652 + 15672 01ce 2268 ldr r2, [r4] + 15673 01d0 D168 ldr r1, [r2, #12] + 15674 01d2 8023 movs r3, #128 + 15675 01d4 9B00 lsls r3, r3, #2 + 15676 01d6 0B43 orrs r3, r1 + 15677 01d8 D360 str r3, [r2, #12] +3719:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 15678 .loc 1 3719 7 view .LVU4653 + 15679 01da 2268 ldr r2, [r4] + 15680 01dc D168 ldr r1, [r2, #12] + 15681 01de 8023 movs r3, #128 + 15682 01e0 DB00 lsls r3, r3, #3 + 15683 01e2 0B43 orrs r3, r1 + 15684 01e4 D360 str r3, [r2, #12] +3722:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** TIM_CCxChannelCmd(htim->Instance, TIM_CHANNEL_2, TIM_CCx_ENABLE); + 15685 .loc 1 3722 7 view .LVU4654 + 15686 01e6 2068 ldr r0, [r4] + 15687 01e8 0122 movs r2, #1 + 15688 01ea 0021 movs r1, #0 + 15689 01ec FFF7FEFF bl TIM_CCxChannelCmd + 15690 .LVL1327: +3723:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 15691 .loc 1 3723 7 view .LVU4655 + 15692 01f0 2068 ldr r0, [r4] + 15693 01f2 0122 movs r2, #1 + 15694 01f4 0421 movs r1, #4 + 15695 01f6 FFF7FEFF bl TIM_CCxChannelCmd + 15696 .LVL1328: +3726:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 15697 .loc 1 3726 7 view .LVU4656 + 15698 01fa 2268 ldr r2, [r4] + 15699 01fc 1368 ldr r3, [r2] + 15700 01fe 0121 movs r1, #1 + 15701 0200 0B43 orrs r3, r1 + 15702 0202 1360 str r3, [r2] +3728:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** } + 15703 .loc 1 3728 7 view .LVU4657 + 15704 0204 02E0 b .L1047 + 15705 .LVL1329: + 15706 .L1053: +3550:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** } + 15707 .loc 1 3550 14 is_stmt 0 view .LVU4658 + 15708 0206 1D00 movs r5, r3 + 15709 .LVL1330: +3550:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** } + 15710 .loc 1 3550 14 view .LVU4659 + 15711 0208 00E0 b .L1047 + 15712 .LVL1331: + ARM GAS /tmp/ccMtK8ce.s page 481 + + + 15713 .L1054: +3567:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** } + 15714 .loc 1 3567 14 view .LVU4660 + 15715 020a 0125 movs r5, #1 + 15716 .LVL1332: + 15717 .L1047: +3734:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 15718 .loc 1 3734 1 view .LVU4661 + 15719 020c 2800 movs r0, r5 + 15720 020e 03B0 add sp, sp, #12 + 15721 @ sp needed + 15722 .LVL1333: + 15723 .LVL1334: +3734:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 15724 .loc 1 3734 1 view .LVU4662 + 15725 0210 F0BD pop {r4, r5, r6, r7, pc} + 15726 .LVL1335: + 15727 .L1055: +3557:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** } + 15728 .loc 1 3557 16 view .LVU4663 + 15729 0212 1D00 movs r5, r3 + 15730 .LVL1336: +3557:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** } + 15731 .loc 1 3557 16 view .LVU4664 + 15732 0214 FAE7 b .L1047 + 15733 .LVL1337: + 15734 .L1056: +3557:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** } + 15735 .loc 1 3557 16 view .LVU4665 + 15736 0216 1D00 movs r5, r3 + 15737 .LVL1338: +3557:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** } + 15738 .loc 1 3557 16 view .LVU4666 + 15739 0218 F8E7 b .L1047 + 15740 .LVL1339: + 15741 .L1057: +3575:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** } + 15742 .loc 1 3575 14 view .LVU4667 + 15743 021a 0500 movs r5, r0 + 15744 .LVL1340: +3575:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** } + 15745 .loc 1 3575 14 view .LVU4668 + 15746 021c F6E7 b .L1047 + 15747 .LVL1341: + 15748 .L1058: +3575:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** } + 15749 .loc 1 3575 14 view .LVU4669 + 15750 021e 3500 movs r5, r6 + 15751 .LVL1342: +3575:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** } + 15752 .loc 1 3575 14 view .LVU4670 + 15753 0220 F4E7 b .L1047 + 15754 .LVL1343: + 15755 .L1059: +3592:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** } + 15756 .loc 1 3592 14 view .LVU4671 + 15757 0222 0125 movs r5, #1 + ARM GAS /tmp/ccMtK8ce.s page 482 + + + 15758 .LVL1344: +3592:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** } + 15759 .loc 1 3592 14 view .LVU4672 + 15760 0224 F2E7 b .L1047 + 15761 .LVL1345: + 15762 .L1060: +3592:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** } + 15763 .loc 1 3592 14 view .LVU4673 + 15764 0226 0500 movs r5, r0 + 15765 .LVL1346: +3592:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** } + 15766 .loc 1 3592 14 view .LVU4674 + 15767 0228 F0E7 b .L1047 + 15768 .LVL1347: + 15769 .L1061: +3582:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** } + 15770 .loc 1 3582 16 view .LVU4675 + 15771 022a 3500 movs r5, r6 + 15772 .LVL1348: +3582:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** } + 15773 .loc 1 3582 16 view .LVU4676 + 15774 022c EEE7 b .L1047 + 15775 .LVL1349: + 15776 .L1062: +3582:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** } + 15777 .loc 1 3582 16 view .LVU4677 + 15778 022e 3500 movs r5, r6 + 15779 .LVL1350: +3582:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** } + 15780 .loc 1 3582 16 view .LVU4678 + 15781 0230 ECE7 b .L1047 + 15782 .LVL1351: + 15783 .L1063: +3602:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** } + 15784 .loc 1 3602 14 view .LVU4679 + 15785 0232 0500 movs r5, r0 + 15786 .LVL1352: +3602:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** } + 15787 .loc 1 3602 14 view .LVU4680 + 15788 0234 EAE7 b .L1047 + 15789 .LVL1353: + 15790 .L1064: +3602:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** } + 15791 .loc 1 3602 14 view .LVU4681 + 15792 0236 1D00 movs r5, r3 + 15793 .LVL1354: +3602:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** } + 15794 .loc 1 3602 14 view .LVU4682 + 15795 0238 E8E7 b .L1047 + 15796 .LVL1355: + 15797 .L1065: +3602:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** } + 15798 .loc 1 3602 14 view .LVU4683 + 15799 023a 3500 movs r5, r6 + 15800 .LVL1356: +3602:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** } + 15801 .loc 1 3602 14 view .LVU4684 + ARM GAS /tmp/ccMtK8ce.s page 483 + + + 15802 023c E6E7 b .L1047 + 15803 .LVL1357: + 15804 .L1066: +3623:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** } + 15805 .loc 1 3623 14 view .LVU4685 + 15806 023e 0125 movs r5, #1 + 15807 .LVL1358: +3623:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** } + 15808 .loc 1 3623 14 view .LVU4686 + 15809 0240 E4E7 b .L1047 + 15810 .LVL1359: + 15811 .L1067: +3623:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** } + 15812 .loc 1 3623 14 view .LVU4687 + 15813 0242 0500 movs r5, r0 + 15814 .LVL1360: +3623:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** } + 15815 .loc 1 3623 14 view .LVU4688 + 15816 0244 E2E7 b .L1047 + 15817 .LVL1361: + 15818 .L1068: +3623:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** } + 15819 .loc 1 3623 14 view .LVU4689 + 15820 0246 1D00 movs r5, r3 + 15821 .LVL1362: +3623:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** } + 15822 .loc 1 3623 14 view .LVU4690 + 15823 0248 E0E7 b .L1047 + 15824 .LVL1363: + 15825 .L1069: +3611:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** } + 15826 .loc 1 3611 16 view .LVU4691 + 15827 024a 3500 movs r5, r6 + 15828 .LVL1364: +3611:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** } + 15829 .loc 1 3611 16 view .LVU4692 + 15830 024c DEE7 b .L1047 + 15831 .LVL1365: + 15832 .L1070: +3611:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** } + 15833 .loc 1 3611 16 view .LVU4693 + 15834 024e 3500 movs r5, r6 + 15835 .LVL1366: +3611:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** } + 15836 .loc 1 3611 16 view .LVU4694 + 15837 0250 DCE7 b .L1047 + 15838 .LVL1367: + 15839 .L1071: +3611:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** } + 15840 .loc 1 3611 16 view .LVU4695 + 15841 0252 3500 movs r5, r6 + 15842 .LVL1368: +3611:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** } + 15843 .loc 1 3611 16 view .LVU4696 + 15844 0254 DAE7 b .L1047 + 15845 .L1083: + 15846 0256 C046 .align 2 + ARM GAS /tmp/ccMtK8ce.s page 484 + + + 15847 .L1082: + 15848 0258 00000000 .word TIM_DMACaptureCplt + 15849 025c 00000000 .word TIM_DMACaptureHalfCplt + 15850 0260 00000000 .word TIM_DMAError + 15851 .cfi_endproc + 15852 .LFE96: + 15854 .section .text.HAL_TIM_Encoder_Stop_DMA,"ax",%progbits + 15855 .align 1 + 15856 .global HAL_TIM_Encoder_Stop_DMA + 15857 .syntax unified + 15858 .code 16 + 15859 .thumb_func + 15861 HAL_TIM_Encoder_Stop_DMA: + 15862 .LVL1369: + 15863 .LFB97: +3747:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** /* Check the parameters */ + 15864 .loc 1 3747 1 is_stmt 1 view -0 + 15865 .cfi_startproc + 15866 @ args = 0, pretend = 0, frame = 0 + 15867 @ frame_needed = 0, uses_anonymous_args = 0 +3747:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** /* Check the parameters */ + 15868 .loc 1 3747 1 is_stmt 0 view .LVU4698 + 15869 0000 70B5 push {r4, r5, r6, lr} + 15870 .cfi_def_cfa_offset 16 + 15871 .cfi_offset 4, -16 + 15872 .cfi_offset 5, -12 + 15873 .cfi_offset 6, -8 + 15874 .cfi_offset 14, -4 + 15875 0002 0400 movs r4, r0 + 15876 0004 0D1E subs r5, r1, #0 +3749:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 15877 .loc 1 3749 3 is_stmt 1 view .LVU4699 +3753:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** { + 15878 .loc 1 3753 3 view .LVU4700 +3753:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** { + 15879 .loc 1 3753 6 is_stmt 0 view .LVU4701 + 15880 0006 36D0 beq .L1094 +3761:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** { + 15881 .loc 1 3761 8 is_stmt 1 view .LVU4702 +3761:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** { + 15882 .loc 1 3761 11 is_stmt 0 view .LVU4703 + 15883 0008 0429 cmp r1, #4 + 15884 000a 42D0 beq .L1095 +3771:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** TIM_CCxChannelCmd(htim->Instance, TIM_CHANNEL_2, TIM_CCx_DISABLE); + 15885 .loc 1 3771 5 is_stmt 1 view .LVU4704 + 15886 000c 0068 ldr r0, [r0] + 15887 .LVL1370: +3771:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** TIM_CCxChannelCmd(htim->Instance, TIM_CHANNEL_2, TIM_CCx_DISABLE); + 15888 .loc 1 3771 5 is_stmt 0 view .LVU4705 + 15889 000e 0022 movs r2, #0 + 15890 0010 0021 movs r1, #0 + 15891 .LVL1371: +3771:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** TIM_CCxChannelCmd(htim->Instance, TIM_CHANNEL_2, TIM_CCx_DISABLE); + 15892 .loc 1 3771 5 view .LVU4706 + 15893 0012 FFF7FEFF bl TIM_CCxChannelCmd + 15894 .LVL1372: +3772:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + ARM GAS /tmp/ccMtK8ce.s page 485 + + + 15895 .loc 1 3772 5 is_stmt 1 view .LVU4707 + 15896 0016 2068 ldr r0, [r4] + 15897 0018 0022 movs r2, #0 + 15898 001a 0421 movs r1, #4 + 15899 001c FFF7FEFF bl TIM_CCxChannelCmd + 15900 .LVL1373: +3775:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** __HAL_TIM_DISABLE_DMA(htim, TIM_DMA_CC2); + 15901 .loc 1 3775 5 view .LVU4708 + 15902 0020 2268 ldr r2, [r4] + 15903 0022 D368 ldr r3, [r2, #12] + 15904 0024 2849 ldr r1, .L1097 + 15905 0026 0B40 ands r3, r1 + 15906 0028 D360 str r3, [r2, #12] +3776:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** (void)HAL_DMA_Abort_IT(htim->hdma[TIM_DMA_ID_CC1]); + 15907 .loc 1 3776 5 view .LVU4709 + 15908 002a 2268 ldr r2, [r4] + 15909 002c D368 ldr r3, [r2, #12] + 15910 002e 2749 ldr r1, .L1097+4 + 15911 0030 0B40 ands r3, r1 + 15912 0032 D360 str r3, [r2, #12] +3777:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** (void)HAL_DMA_Abort_IT(htim->hdma[TIM_DMA_ID_CC2]); + 15913 .loc 1 3777 5 view .LVU4710 +3777:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** (void)HAL_DMA_Abort_IT(htim->hdma[TIM_DMA_ID_CC2]); + 15914 .loc 1 3777 11 is_stmt 0 view .LVU4711 + 15915 0034 606A ldr r0, [r4, #36] + 15916 0036 FFF7FEFF bl HAL_DMA_Abort_IT + 15917 .LVL1374: +3778:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** } + 15918 .loc 1 3778 5 is_stmt 1 view .LVU4712 +3778:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** } + 15919 .loc 1 3778 11 is_stmt 0 view .LVU4713 + 15920 003a A06A ldr r0, [r4, #40] + 15921 003c FFF7FEFF bl HAL_DMA_Abort_IT + 15922 .LVL1375: + 15923 .L1086: +3782:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 15924 .loc 1 3782 3 is_stmt 1 view .LVU4714 +3782:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 15925 .loc 1 3782 3 view .LVU4715 + 15926 0040 2368 ldr r3, [r4] + 15927 0042 196A ldr r1, [r3, #32] + 15928 0044 224A ldr r2, .L1097+8 + 15929 0046 1142 tst r1, r2 + 15930 0048 07D1 bne .L1088 +3782:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 15931 .loc 1 3782 3 discriminator 1 view .LVU4716 + 15932 004a 196A ldr r1, [r3, #32] + 15933 004c 214A ldr r2, .L1097+12 + 15934 004e 1142 tst r1, r2 + 15935 0050 03D1 bne .L1088 +3782:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 15936 .loc 1 3782 3 discriminator 3 view .LVU4717 + 15937 0052 1A68 ldr r2, [r3] + 15938 0054 0121 movs r1, #1 + 15939 0056 8A43 bics r2, r1 + 15940 0058 1A60 str r2, [r3] + 15941 .L1088: + ARM GAS /tmp/ccMtK8ce.s page 486 + + +3782:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 15942 .loc 1 3782 3 discriminator 5 view .LVU4718 +3785:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** { + 15943 .loc 1 3785 3 view .LVU4719 +3785:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** { + 15944 .loc 1 3785 6 is_stmt 0 view .LVU4720 + 15945 005a 002D cmp r5, #0 + 15946 005c 27D0 beq .L1089 +3785:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** { + 15947 .loc 1 3785 34 discriminator 1 view .LVU4721 + 15948 005e 042D cmp r5, #4 + 15949 0060 2CD0 beq .L1096 +3792:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** TIM_CHANNEL_STATE_SET(htim, TIM_CHANNEL_2, HAL_TIM_CHANNEL_STATE_READY); + 15950 .loc 1 3792 5 is_stmt 1 view .LVU4722 + 15951 0062 0123 movs r3, #1 + 15952 0064 3E22 movs r2, #62 + 15953 0066 A354 strb r3, [r4, r2] +3793:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** TIM_CHANNEL_N_STATE_SET(htim, TIM_CHANNEL_1, HAL_TIM_CHANNEL_STATE_READY); + 15954 .loc 1 3793 5 view .LVU4723 + 15955 0068 0132 adds r2, r2, #1 + 15956 006a A354 strb r3, [r4, r2] +3794:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** TIM_CHANNEL_N_STATE_SET(htim, TIM_CHANNEL_2, HAL_TIM_CHANNEL_STATE_READY); + 15957 .loc 1 3794 5 view .LVU4724 + 15958 006c 0332 adds r2, r2, #3 + 15959 006e A354 strb r3, [r4, r2] +3795:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** } + 15960 .loc 1 3795 5 view .LVU4725 + 15961 0070 0132 adds r2, r2, #1 + 15962 0072 A354 strb r3, [r4, r2] + 15963 0074 20E0 b .L1092 + 15964 .LVL1376: + 15965 .L1094: +3755:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 15966 .loc 1 3755 5 view .LVU4726 + 15967 0076 0068 ldr r0, [r0] + 15968 .LVL1377: +3755:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 15969 .loc 1 3755 5 is_stmt 0 view .LVU4727 + 15970 0078 0022 movs r2, #0 + 15971 007a 0021 movs r1, #0 + 15972 .LVL1378: +3755:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 15973 .loc 1 3755 5 view .LVU4728 + 15974 007c FFF7FEFF bl TIM_CCxChannelCmd + 15975 .LVL1379: +3758:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** (void)HAL_DMA_Abort_IT(htim->hdma[TIM_DMA_ID_CC1]); + 15976 .loc 1 3758 5 is_stmt 1 view .LVU4729 + 15977 0080 2268 ldr r2, [r4] + 15978 0082 D368 ldr r3, [r2, #12] + 15979 0084 1049 ldr r1, .L1097 + 15980 0086 0B40 ands r3, r1 + 15981 0088 D360 str r3, [r2, #12] +3759:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** } + 15982 .loc 1 3759 5 view .LVU4730 +3759:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** } + 15983 .loc 1 3759 11 is_stmt 0 view .LVU4731 + 15984 008a 606A ldr r0, [r4, #36] + ARM GAS /tmp/ccMtK8ce.s page 487 + + + 15985 008c FFF7FEFF bl HAL_DMA_Abort_IT + 15986 .LVL1380: + 15987 0090 D6E7 b .L1086 + 15988 .LVL1381: + 15989 .L1095: +3763:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 15990 .loc 1 3763 5 is_stmt 1 view .LVU4732 + 15991 0092 0068 ldr r0, [r0] + 15992 .LVL1382: +3763:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 15993 .loc 1 3763 5 is_stmt 0 view .LVU4733 + 15994 0094 0022 movs r2, #0 + 15995 0096 0421 movs r1, #4 + 15996 .LVL1383: +3763:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 15997 .loc 1 3763 5 view .LVU4734 + 15998 0098 FFF7FEFF bl TIM_CCxChannelCmd + 15999 .LVL1384: +3766:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** (void)HAL_DMA_Abort_IT(htim->hdma[TIM_DMA_ID_CC2]); + 16000 .loc 1 3766 5 is_stmt 1 view .LVU4735 + 16001 009c 2268 ldr r2, [r4] + 16002 009e D368 ldr r3, [r2, #12] + 16003 00a0 0A49 ldr r1, .L1097+4 + 16004 00a2 0B40 ands r3, r1 + 16005 00a4 D360 str r3, [r2, #12] +3767:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** } + 16006 .loc 1 3767 5 view .LVU4736 +3767:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** } + 16007 .loc 1 3767 11 is_stmt 0 view .LVU4737 + 16008 00a6 A06A ldr r0, [r4, #40] + 16009 00a8 FFF7FEFF bl HAL_DMA_Abort_IT + 16010 .LVL1385: + 16011 00ac C8E7 b .L1086 + 16012 .L1089: +3787:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** TIM_CHANNEL_N_STATE_SET(htim, Channel, HAL_TIM_CHANNEL_STATE_READY); + 16013 .loc 1 3787 5 is_stmt 1 view .LVU4738 +3787:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** TIM_CHANNEL_N_STATE_SET(htim, Channel, HAL_TIM_CHANNEL_STATE_READY); + 16014 .loc 1 3787 5 is_stmt 0 discriminator 1 view .LVU4739 + 16015 00ae 0123 movs r3, #1 + 16016 00b0 3E22 movs r2, #62 + 16017 00b2 A354 strb r3, [r4, r2] +3788:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** } + 16018 .loc 1 3788 5 is_stmt 1 view .LVU4740 +3788:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** } + 16019 .loc 1 3788 5 is_stmt 0 discriminator 1 view .LVU4741 + 16020 00b4 0432 adds r2, r2, #4 + 16021 00b6 A354 strb r3, [r4, r2] + 16022 .L1092: +3799:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** } + 16023 .loc 1 3799 3 is_stmt 1 view .LVU4742 +3800:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + 16024 .loc 1 3800 1 is_stmt 0 view .LVU4743 + 16025 00b8 0020 movs r0, #0 + 16026 @ sp needed + 16027 .LVL1386: + 16028 .LVL1387: +3800:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** + ARM GAS /tmp/ccMtK8ce.s page 488 + + + 16029 .loc 1 3800 1 view .LVU4744 + 16030 00ba 70BD pop {r4, r5, r6, pc} + 16031 .LVL1388: + 16032 .L1096: +3787:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** TIM_CHANNEL_N_STATE_SET(htim, Channel, HAL_TIM_CHANNEL_STATE_READY); + 16033 .loc 1 3787 5 is_stmt 1 view .LVU4745 +3787:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** TIM_CHANNEL_N_STATE_SET(htim, Channel, HAL_TIM_CHANNEL_STATE_READY); + 16034 .loc 1 3787 5 is_stmt 0 discriminator 3 view .LVU4746 + 16035 00bc 0123 movs r3, #1 + 16036 00be 3F22 movs r2, #63 + 16037 00c0 A354 strb r3, [r4, r2] +3788:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** } + 16038 .loc 1 3788 5 is_stmt 1 view .LVU4747 +3788:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c **** } + 16039 .loc 1 3788 5 is_stmt 0 discriminator 3 view .LVU4748 + 16040 00c2 0432 adds r2, r2, #4 + 16041 00c4 A354 strb r3, [r4, r2] + 16042 00c6 F7E7 b .L1092 + 16043 .L1098: + 16044 .align 2 + 16045 .L1097: + 16046 00c8 FFFDFFFF .word -513 + 16047 00cc FFFBFFFF .word -1025 + 16048 00d0 11110000 .word 4369 + 16049 00d4 44040000 .word 1092 + 16050 .cfi_endproc + 16051 .LFE97: + 16053 .text + 16054 .Letext0: + 16055 .file 2 "/home/chiangni/.config/VSCodium/User/globalStorage/bmd.stm32-for-vscode/@xpack-dev-tools/ + 16056 .file 3 "/home/chiangni/.config/VSCodium/User/globalStorage/bmd.stm32-for-vscode/@xpack-dev-tools/ + 16057 .file 4 "Drivers/CMSIS/Device/ST/STM32F0xx/Include/stm32f042x6.h" + 16058 .file 5 "Drivers/CMSIS/Device/ST/STM32F0xx/Include/stm32f0xx.h" + 16059 .file 6 "Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_def.h" + 16060 .file 7 "Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_dma.h" + 16061 .file 8 "Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_tim.h" + 16062 .file 9 "Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_tim_ex.h" + ARM GAS /tmp/ccMtK8ce.s page 489 + + +DEFINED SYMBOLS + *ABS*:00000000 stm32f0xx_hal_tim.c + /tmp/ccMtK8ce.s:19 .text.TIM_OC1_SetConfig:00000000 $t + /tmp/ccMtK8ce.s:24 .text.TIM_OC1_SetConfig:00000000 TIM_OC1_SetConfig + /tmp/ccMtK8ce.s:177 .text.TIM_OC1_SetConfig:0000006c $d + /tmp/ccMtK8ce.s:185 .text.TIM_OC3_SetConfig:00000000 $t + /tmp/ccMtK8ce.s:190 .text.TIM_OC3_SetConfig:00000000 TIM_OC3_SetConfig + /tmp/ccMtK8ce.s:335 .text.TIM_OC3_SetConfig:00000060 $d + /tmp/ccMtK8ce.s:347 .text.TIM_OC4_SetConfig:00000000 $t + /tmp/ccMtK8ce.s:352 .text.TIM_OC4_SetConfig:00000000 TIM_OC4_SetConfig + /tmp/ccMtK8ce.s:467 .text.TIM_OC4_SetConfig:0000004c $d + /tmp/ccMtK8ce.s:478 .text.TIM_TI1_ConfigInputStage:00000000 $t + /tmp/ccMtK8ce.s:483 .text.TIM_TI1_ConfigInputStage:00000000 TIM_TI1_ConfigInputStage + /tmp/ccMtK8ce.s:547 .text.TIM_TI2_SetConfig:00000000 $t + /tmp/ccMtK8ce.s:552 .text.TIM_TI2_SetConfig:00000000 TIM_TI2_SetConfig + /tmp/ccMtK8ce.s:635 .text.TIM_TI2_SetConfig:00000030 $d + /tmp/ccMtK8ce.s:641 .text.TIM_TI2_ConfigInputStage:00000000 $t + /tmp/ccMtK8ce.s:646 .text.TIM_TI2_ConfigInputStage:00000000 TIM_TI2_ConfigInputStage + /tmp/ccMtK8ce.s:712 .text.TIM_TI2_ConfigInputStage:00000024 $d + /tmp/ccMtK8ce.s:717 .text.TIM_TI3_SetConfig:00000000 $t + /tmp/ccMtK8ce.s:722 .text.TIM_TI3_SetConfig:00000000 TIM_TI3_SetConfig + /tmp/ccMtK8ce.s:808 .text.TIM_TI3_SetConfig:00000034 $d + /tmp/ccMtK8ce.s:814 .text.TIM_TI4_SetConfig:00000000 $t + /tmp/ccMtK8ce.s:819 .text.TIM_TI4_SetConfig:00000000 TIM_TI4_SetConfig + /tmp/ccMtK8ce.s:904 .text.TIM_TI4_SetConfig:00000034 $d + /tmp/ccMtK8ce.s:912 .text.TIM_ITRx_SetConfig:00000000 $t + /tmp/ccMtK8ce.s:917 .text.TIM_ITRx_SetConfig:00000000 TIM_ITRx_SetConfig + /tmp/ccMtK8ce.s:954 .text.HAL_TIM_Base_MspInit:00000000 $t + /tmp/ccMtK8ce.s:960 .text.HAL_TIM_Base_MspInit:00000000 HAL_TIM_Base_MspInit + /tmp/ccMtK8ce.s:976 .text.HAL_TIM_Base_MspDeInit:00000000 $t + /tmp/ccMtK8ce.s:982 .text.HAL_TIM_Base_MspDeInit:00000000 HAL_TIM_Base_MspDeInit + /tmp/ccMtK8ce.s:998 .text.HAL_TIM_Base_DeInit:00000000 $t + /tmp/ccMtK8ce.s:1004 .text.HAL_TIM_Base_DeInit:00000000 HAL_TIM_Base_DeInit + /tmp/ccMtK8ce.s:1100 .text.HAL_TIM_Base_DeInit:0000005c $d + /tmp/ccMtK8ce.s:1106 .text.HAL_TIM_Base_Start:00000000 $t + /tmp/ccMtK8ce.s:1112 .text.HAL_TIM_Base_Start:00000000 HAL_TIM_Base_Start + /tmp/ccMtK8ce.s:1206 .text.HAL_TIM_Base_Start:00000050 $d + /tmp/ccMtK8ce.s:1212 .text.HAL_TIM_Base_Stop:00000000 $t + /tmp/ccMtK8ce.s:1218 .text.HAL_TIM_Base_Stop:00000000 HAL_TIM_Base_Stop + /tmp/ccMtK8ce.s:1261 .text.HAL_TIM_Base_Stop:00000024 $d + /tmp/ccMtK8ce.s:1267 .text.HAL_TIM_Base_Start_IT:00000000 $t + /tmp/ccMtK8ce.s:1273 .text.HAL_TIM_Base_Start_IT:00000000 HAL_TIM_Base_Start_IT + /tmp/ccMtK8ce.s:1373 .text.HAL_TIM_Base_Start_IT:00000058 $d + /tmp/ccMtK8ce.s:1379 .text.HAL_TIM_Base_Stop_IT:00000000 $t + /tmp/ccMtK8ce.s:1385 .text.HAL_TIM_Base_Stop_IT:00000000 HAL_TIM_Base_Stop_IT + /tmp/ccMtK8ce.s:1434 .text.HAL_TIM_Base_Stop_IT:00000030 $d + /tmp/ccMtK8ce.s:1440 .text.HAL_TIM_Base_Start_DMA:00000000 $t + /tmp/ccMtK8ce.s:1446 .text.HAL_TIM_Base_Start_DMA:00000000 HAL_TIM_Base_Start_DMA + /tmp/ccMtK8ce.s:1600 .text.HAL_TIM_Base_Start_DMA:00000094 $d + /tmp/ccMtK8ce.s:3906 .text.TIM_DMAPeriodElapsedCplt:00000000 TIM_DMAPeriodElapsedCplt + /tmp/ccMtK8ce.s:3973 .text.TIM_DMAPeriodElapsedHalfCplt:00000000 TIM_DMAPeriodElapsedHalfCplt + /tmp/ccMtK8ce.s:5038 .text.TIM_DMAError:00000000 TIM_DMAError + /tmp/ccMtK8ce.s:1609 .text.HAL_TIM_Base_Stop_DMA:00000000 $t + /tmp/ccMtK8ce.s:1615 .text.HAL_TIM_Base_Stop_DMA:00000000 HAL_TIM_Base_Stop_DMA + /tmp/ccMtK8ce.s:1676 .text.HAL_TIM_Base_Stop_DMA:00000038 $d + /tmp/ccMtK8ce.s:1683 .text.HAL_TIM_OC_MspInit:00000000 $t + /tmp/ccMtK8ce.s:1689 .text.HAL_TIM_OC_MspInit:00000000 HAL_TIM_OC_MspInit + ARM GAS /tmp/ccMtK8ce.s page 490 + + + /tmp/ccMtK8ce.s:1705 .text.HAL_TIM_OC_MspDeInit:00000000 $t + /tmp/ccMtK8ce.s:1711 .text.HAL_TIM_OC_MspDeInit:00000000 HAL_TIM_OC_MspDeInit + /tmp/ccMtK8ce.s:1727 .text.HAL_TIM_OC_DeInit:00000000 $t + /tmp/ccMtK8ce.s:1733 .text.HAL_TIM_OC_DeInit:00000000 HAL_TIM_OC_DeInit + /tmp/ccMtK8ce.s:1829 .text.HAL_TIM_OC_DeInit:0000005c $d + /tmp/ccMtK8ce.s:1835 .text.HAL_TIM_PWM_MspInit:00000000 $t + /tmp/ccMtK8ce.s:1841 .text.HAL_TIM_PWM_MspInit:00000000 HAL_TIM_PWM_MspInit + /tmp/ccMtK8ce.s:1857 .text.HAL_TIM_PWM_MspDeInit:00000000 $t + /tmp/ccMtK8ce.s:1863 .text.HAL_TIM_PWM_MspDeInit:00000000 HAL_TIM_PWM_MspDeInit + /tmp/ccMtK8ce.s:1879 .text.HAL_TIM_PWM_DeInit:00000000 $t + /tmp/ccMtK8ce.s:1885 .text.HAL_TIM_PWM_DeInit:00000000 HAL_TIM_PWM_DeInit + /tmp/ccMtK8ce.s:1981 .text.HAL_TIM_PWM_DeInit:0000005c $d + /tmp/ccMtK8ce.s:1987 .text.HAL_TIM_IC_MspInit:00000000 $t + /tmp/ccMtK8ce.s:1993 .text.HAL_TIM_IC_MspInit:00000000 HAL_TIM_IC_MspInit + /tmp/ccMtK8ce.s:2009 .text.HAL_TIM_IC_MspDeInit:00000000 $t + /tmp/ccMtK8ce.s:2015 .text.HAL_TIM_IC_MspDeInit:00000000 HAL_TIM_IC_MspDeInit + /tmp/ccMtK8ce.s:2031 .text.HAL_TIM_IC_DeInit:00000000 $t + /tmp/ccMtK8ce.s:2037 .text.HAL_TIM_IC_DeInit:00000000 HAL_TIM_IC_DeInit + /tmp/ccMtK8ce.s:2133 .text.HAL_TIM_IC_DeInit:0000005c $d + /tmp/ccMtK8ce.s:2139 .text.HAL_TIM_OnePulse_MspInit:00000000 $t + /tmp/ccMtK8ce.s:2145 .text.HAL_TIM_OnePulse_MspInit:00000000 HAL_TIM_OnePulse_MspInit + /tmp/ccMtK8ce.s:2161 .text.HAL_TIM_OnePulse_MspDeInit:00000000 $t + /tmp/ccMtK8ce.s:2167 .text.HAL_TIM_OnePulse_MspDeInit:00000000 HAL_TIM_OnePulse_MspDeInit + /tmp/ccMtK8ce.s:2183 .text.HAL_TIM_OnePulse_DeInit:00000000 $t + /tmp/ccMtK8ce.s:2189 .text.HAL_TIM_OnePulse_DeInit:00000000 HAL_TIM_OnePulse_DeInit + /tmp/ccMtK8ce.s:2269 .text.HAL_TIM_OnePulse_DeInit:0000004c $d + /tmp/ccMtK8ce.s:2275 .text.HAL_TIM_Encoder_MspInit:00000000 $t + /tmp/ccMtK8ce.s:2281 .text.HAL_TIM_Encoder_MspInit:00000000 HAL_TIM_Encoder_MspInit + /tmp/ccMtK8ce.s:2297 .text.HAL_TIM_Encoder_MspDeInit:00000000 $t + /tmp/ccMtK8ce.s:2303 .text.HAL_TIM_Encoder_MspDeInit:00000000 HAL_TIM_Encoder_MspDeInit + /tmp/ccMtK8ce.s:2319 .text.HAL_TIM_Encoder_DeInit:00000000 $t + /tmp/ccMtK8ce.s:2325 .text.HAL_TIM_Encoder_DeInit:00000000 HAL_TIM_Encoder_DeInit + /tmp/ccMtK8ce.s:2405 .text.HAL_TIM_Encoder_DeInit:0000004c $d + /tmp/ccMtK8ce.s:2411 .text.HAL_TIM_DMABurst_MultiWriteStart:00000000 $t + /tmp/ccMtK8ce.s:2417 .text.HAL_TIM_DMABurst_MultiWriteStart:00000000 HAL_TIM_DMABurst_MultiWriteStart + /tmp/ccMtK8ce.s:2812 .text.HAL_TIM_DMABurst_MultiWriteStart:0000019c $d + /tmp/ccMtK8ce.s:4326 .text.TIM_DMADelayPulseCplt:00000000 TIM_DMADelayPulseCplt + /tmp/ccMtK8ce.s:4480 .text.TIM_DMADelayPulseHalfCplt:00000000 TIM_DMADelayPulseHalfCplt + /tmp/ccMtK8ce.s:4917 .text.TIM_DMATriggerCplt:00000000 TIM_DMATriggerCplt + /tmp/ccMtK8ce.s:4984 .text.TIM_DMATriggerHalfCplt:00000000 TIM_DMATriggerHalfCplt + /tmp/ccMtK8ce.s:2825 .text.HAL_TIM_DMABurst_WriteStart:00000000 $t + /tmp/ccMtK8ce.s:2831 .text.HAL_TIM_DMABurst_WriteStart:00000000 HAL_TIM_DMABurst_WriteStart + /tmp/ccMtK8ce.s:2866 .text.HAL_TIM_DMABurst_WriteStop:00000000 $t + /tmp/ccMtK8ce.s:2872 .text.HAL_TIM_DMABurst_WriteStop:00000000 HAL_TIM_DMABurst_WriteStop + /tmp/ccMtK8ce.s:3042 .text.HAL_TIM_DMABurst_MultiReadStart:00000000 $t + /tmp/ccMtK8ce.s:3048 .text.HAL_TIM_DMABurst_MultiReadStart:00000000 HAL_TIM_DMABurst_MultiReadStart + /tmp/ccMtK8ce.s:3443 .text.HAL_TIM_DMABurst_MultiReadStart:0000019c $d + /tmp/ccMtK8ce.s:4049 .text.TIM_DMACaptureCplt:00000000 TIM_DMACaptureCplt + /tmp/ccMtK8ce.s:4215 .text.TIM_DMACaptureHalfCplt:00000000 TIM_DMACaptureHalfCplt + /tmp/ccMtK8ce.s:3456 .text.HAL_TIM_DMABurst_ReadStart:00000000 $t + /tmp/ccMtK8ce.s:3462 .text.HAL_TIM_DMABurst_ReadStart:00000000 HAL_TIM_DMABurst_ReadStart + /tmp/ccMtK8ce.s:3497 .text.HAL_TIM_DMABurst_ReadStop:00000000 $t + /tmp/ccMtK8ce.s:3503 .text.HAL_TIM_DMABurst_ReadStop:00000000 HAL_TIM_DMABurst_ReadStop + /tmp/ccMtK8ce.s:3673 .text.HAL_TIM_GenerateEvent:00000000 $t + /tmp/ccMtK8ce.s:3679 .text.HAL_TIM_GenerateEvent:00000000 HAL_TIM_GenerateEvent + /tmp/ccMtK8ce.s:3742 .text.HAL_TIM_ConfigTI1Input:00000000 $t + /tmp/ccMtK8ce.s:3748 .text.HAL_TIM_ConfigTI1Input:00000000 HAL_TIM_ConfigTI1Input + ARM GAS /tmp/ccMtK8ce.s page 491 + + + /tmp/ccMtK8ce.s:3788 .text.HAL_TIM_ReadCapturedValue:00000000 $t + /tmp/ccMtK8ce.s:3794 .text.HAL_TIM_ReadCapturedValue:00000000 HAL_TIM_ReadCapturedValue + /tmp/ccMtK8ce.s:3879 .text.HAL_TIM_PeriodElapsedCallback:00000000 $t + /tmp/ccMtK8ce.s:3885 .text.HAL_TIM_PeriodElapsedCallback:00000000 HAL_TIM_PeriodElapsedCallback + /tmp/ccMtK8ce.s:3901 .text.TIM_DMAPeriodElapsedCplt:00000000 $t + /tmp/ccMtK8ce.s:3946 .text.HAL_TIM_PeriodElapsedHalfCpltCallback:00000000 $t + /tmp/ccMtK8ce.s:3952 .text.HAL_TIM_PeriodElapsedHalfCpltCallback:00000000 HAL_TIM_PeriodElapsedHalfCpltCallback + /tmp/ccMtK8ce.s:3968 .text.TIM_DMAPeriodElapsedHalfCplt:00000000 $t + /tmp/ccMtK8ce.s:3999 .text.HAL_TIM_OC_DelayElapsedCallback:00000000 $t + /tmp/ccMtK8ce.s:4005 .text.HAL_TIM_OC_DelayElapsedCallback:00000000 HAL_TIM_OC_DelayElapsedCallback + /tmp/ccMtK8ce.s:4021 .text.HAL_TIM_IC_CaptureCallback:00000000 $t + /tmp/ccMtK8ce.s:4027 .text.HAL_TIM_IC_CaptureCallback:00000000 HAL_TIM_IC_CaptureCallback + /tmp/ccMtK8ce.s:4043 .text.TIM_DMACaptureCplt:00000000 $t + /tmp/ccMtK8ce.s:4187 .text.HAL_TIM_IC_CaptureHalfCpltCallback:00000000 $t + /tmp/ccMtK8ce.s:4193 .text.HAL_TIM_IC_CaptureHalfCpltCallback:00000000 HAL_TIM_IC_CaptureHalfCpltCallback + /tmp/ccMtK8ce.s:4209 .text.TIM_DMACaptureHalfCplt:00000000 $t + /tmp/ccMtK8ce.s:4299 .text.HAL_TIM_PWM_PulseFinishedCallback:00000000 $t + /tmp/ccMtK8ce.s:4305 .text.HAL_TIM_PWM_PulseFinishedCallback:00000000 HAL_TIM_PWM_PulseFinishedCallback + /tmp/ccMtK8ce.s:4321 .text.TIM_DMADelayPulseCplt:00000000 $t + /tmp/ccMtK8ce.s:4452 .text.HAL_TIM_PWM_PulseFinishedHalfCpltCallback:00000000 $t + /tmp/ccMtK8ce.s:4458 .text.HAL_TIM_PWM_PulseFinishedHalfCpltCallback:00000000 HAL_TIM_PWM_PulseFinishedHalfCpltCallback + /tmp/ccMtK8ce.s:4474 .text.TIM_DMADelayPulseHalfCplt:00000000 $t + /tmp/ccMtK8ce.s:4564 .text.HAL_TIM_TriggerCallback:00000000 $t + /tmp/ccMtK8ce.s:4570 .text.HAL_TIM_TriggerCallback:00000000 HAL_TIM_TriggerCallback + /tmp/ccMtK8ce.s:4586 .text.HAL_TIM_IRQHandler:00000000 $t + /tmp/ccMtK8ce.s:4592 .text.HAL_TIM_IRQHandler:00000000 HAL_TIM_IRQHandler + /tmp/ccMtK8ce.s:4912 .text.TIM_DMATriggerCplt:00000000 $t + /tmp/ccMtK8ce.s:4957 .text.HAL_TIM_TriggerHalfCpltCallback:00000000 $t + /tmp/ccMtK8ce.s:4963 .text.HAL_TIM_TriggerHalfCpltCallback:00000000 HAL_TIM_TriggerHalfCpltCallback + /tmp/ccMtK8ce.s:4979 .text.TIM_DMATriggerHalfCplt:00000000 $t + /tmp/ccMtK8ce.s:5010 .text.HAL_TIM_ErrorCallback:00000000 $t + /tmp/ccMtK8ce.s:5016 .text.HAL_TIM_ErrorCallback:00000000 HAL_TIM_ErrorCallback + /tmp/ccMtK8ce.s:5032 .text.TIM_DMAError:00000000 $t + /tmp/ccMtK8ce.s:5143 .text.HAL_TIM_Base_GetState:00000000 $t + /tmp/ccMtK8ce.s:5149 .text.HAL_TIM_Base_GetState:00000000 HAL_TIM_Base_GetState + /tmp/ccMtK8ce.s:5171 .text.HAL_TIM_OC_GetState:00000000 $t + /tmp/ccMtK8ce.s:5177 .text.HAL_TIM_OC_GetState:00000000 HAL_TIM_OC_GetState + /tmp/ccMtK8ce.s:5199 .text.HAL_TIM_PWM_GetState:00000000 $t + /tmp/ccMtK8ce.s:5205 .text.HAL_TIM_PWM_GetState:00000000 HAL_TIM_PWM_GetState + /tmp/ccMtK8ce.s:5227 .text.HAL_TIM_IC_GetState:00000000 $t + /tmp/ccMtK8ce.s:5233 .text.HAL_TIM_IC_GetState:00000000 HAL_TIM_IC_GetState + /tmp/ccMtK8ce.s:5255 .text.HAL_TIM_OnePulse_GetState:00000000 $t + /tmp/ccMtK8ce.s:5261 .text.HAL_TIM_OnePulse_GetState:00000000 HAL_TIM_OnePulse_GetState + /tmp/ccMtK8ce.s:5283 .text.HAL_TIM_Encoder_GetState:00000000 $t + /tmp/ccMtK8ce.s:5289 .text.HAL_TIM_Encoder_GetState:00000000 HAL_TIM_Encoder_GetState + /tmp/ccMtK8ce.s:5311 .text.HAL_TIM_GetActiveChannel:00000000 $t + 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.text.HAL_TIM_OnePulse_Stop:00000000 $t + /tmp/ccMtK8ce.s:13930 .text.HAL_TIM_OnePulse_Stop:00000000 HAL_TIM_OnePulse_Stop + /tmp/ccMtK8ce.s:14037 .text.HAL_TIM_OnePulse_Stop:00000078 $d + /tmp/ccMtK8ce.s:14047 .text.HAL_TIM_OnePulse_Start_IT:00000000 $t + /tmp/ccMtK8ce.s:14053 .text.HAL_TIM_OnePulse_Start_IT:00000000 HAL_TIM_OnePulse_Start_IT + /tmp/ccMtK8ce.s:14218 .text.HAL_TIM_OnePulse_Start_IT:00000098 $d + /tmp/ccMtK8ce.s:14225 .text.HAL_TIM_OnePulse_Stop_IT:00000000 $t + /tmp/ccMtK8ce.s:14231 .text.HAL_TIM_OnePulse_Stop_IT:00000000 HAL_TIM_OnePulse_Stop_IT + /tmp/ccMtK8ce.s:14350 .text.HAL_TIM_OnePulse_Stop_IT:0000008c $d + /tmp/ccMtK8ce.s:14360 .text.HAL_TIM_Encoder_Start:00000000 $t + /tmp/ccMtK8ce.s:14366 .text.HAL_TIM_Encoder_Start:00000000 HAL_TIM_Encoder_Start + ARM GAS /tmp/ccMtK8ce.s page 494 + + + /tmp/ccMtK8ce.s:14610 .text.HAL_TIM_Encoder_Stop:00000000 $t + /tmp/ccMtK8ce.s:14616 .text.HAL_TIM_Encoder_Stop:00000000 HAL_TIM_Encoder_Stop + /tmp/ccMtK8ce.s:14757 .text.HAL_TIM_Encoder_Stop:00000088 $d + /tmp/ccMtK8ce.s:14763 .text.HAL_TIM_Encoder_Start_IT:00000000 $t + /tmp/ccMtK8ce.s:14769 .text.HAL_TIM_Encoder_Start_IT:00000000 HAL_TIM_Encoder_Start_IT + /tmp/ccMtK8ce.s:15037 .text.HAL_TIM_Encoder_Stop_IT:00000000 $t + /tmp/ccMtK8ce.s:15043 .text.HAL_TIM_Encoder_Stop_IT:00000000 HAL_TIM_Encoder_Stop_IT + /tmp/ccMtK8ce.s:15208 .text.HAL_TIM_Encoder_Stop_IT:000000b0 $d + /tmp/ccMtK8ce.s:15214 .text.HAL_TIM_Encoder_Start_DMA:00000000 $t + /tmp/ccMtK8ce.s:15220 .text.HAL_TIM_Encoder_Start_DMA:00000000 HAL_TIM_Encoder_Start_DMA + /tmp/ccMtK8ce.s:15848 .text.HAL_TIM_Encoder_Start_DMA:00000258 $d + /tmp/ccMtK8ce.s:15855 .text.HAL_TIM_Encoder_Stop_DMA:00000000 $t + /tmp/ccMtK8ce.s:15861 .text.HAL_TIM_Encoder_Stop_DMA:00000000 HAL_TIM_Encoder_Stop_DMA + /tmp/ccMtK8ce.s:16046 .text.HAL_TIM_Encoder_Stop_DMA:000000c8 $d + +UNDEFINED SYMBOLS +HAL_DMA_Start_IT +HAL_DMA_Abort_IT +TIMEx_DMACommutationCplt +TIMEx_DMACommutationHalfCplt +HAL_TIMEx_BreakCallback +HAL_TIMEx_CommutCallback diff --git a/Software/build/stm32f0xx_hal_tim.o b/Software/build/stm32f0xx_hal_tim.o new file mode 100644 index 0000000..5281f06 Binary files /dev/null and b/Software/build/stm32f0xx_hal_tim.o differ diff --git a/Software/build/stm32f0xx_hal_tim_ex.d b/Software/build/stm32f0xx_hal_tim_ex.d new file mode 100644 index 0000000..031873d --- /dev/null +++ b/Software/build/stm32f0xx_hal_tim_ex.d @@ -0,0 +1,60 @@ +build/stm32f0xx_hal_tim_ex.o: \ + Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c \ + Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal.h \ + Core/Inc/stm32f0xx_hal_conf.h \ + Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_rcc.h \ + Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_def.h \ + Drivers/CMSIS/Device/ST/STM32F0xx/Include/stm32f0xx.h \ + Drivers/CMSIS/Device/ST/STM32F0xx/Include/stm32f042x6.h \ + Drivers/CMSIS/Include/core_cm0.h Drivers/CMSIS/Include/cmsis_version.h \ + Drivers/CMSIS/Include/cmsis_compiler.h Drivers/CMSIS/Include/cmsis_gcc.h \ + Drivers/CMSIS/Device/ST/STM32F0xx/Include/system_stm32f0xx.h \ + Drivers/STM32F0xx_HAL_Driver/Inc/Legacy/stm32_hal_legacy.h \ + Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_rcc_ex.h \ + Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_gpio.h \ + Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_gpio_ex.h \ + Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_exti.h \ + Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_dma.h \ + Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_dma_ex.h \ + Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_cortex.h \ + Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_adc.h \ + Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_adc_ex.h \ + Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_can.h \ + Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_flash.h \ + Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_flash_ex.h \ + Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_i2c.h \ + Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_i2c_ex.h \ + Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_pwr.h \ + Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_pwr_ex.h \ + Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_tim.h \ + Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_tim_ex.h +Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal.h: +Core/Inc/stm32f0xx_hal_conf.h: +Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_rcc.h: +Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_def.h: +Drivers/CMSIS/Device/ST/STM32F0xx/Include/stm32f0xx.h: +Drivers/CMSIS/Device/ST/STM32F0xx/Include/stm32f042x6.h: +Drivers/CMSIS/Include/core_cm0.h: +Drivers/CMSIS/Include/cmsis_version.h: +Drivers/CMSIS/Include/cmsis_compiler.h: +Drivers/CMSIS/Include/cmsis_gcc.h: +Drivers/CMSIS/Device/ST/STM32F0xx/Include/system_stm32f0xx.h: +Drivers/STM32F0xx_HAL_Driver/Inc/Legacy/stm32_hal_legacy.h: +Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_rcc_ex.h: +Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_gpio.h: +Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_gpio_ex.h: +Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_exti.h: +Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_dma.h: +Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_dma_ex.h: +Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_cortex.h: +Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_adc.h: +Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_adc_ex.h: +Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_can.h: +Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_flash.h: +Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_flash_ex.h: +Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_i2c.h: +Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_i2c_ex.h: +Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_pwr.h: +Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_pwr_ex.h: +Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_tim.h: +Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_tim_ex.h: diff --git a/Software/build/stm32f0xx_hal_tim_ex.lst b/Software/build/stm32f0xx_hal_tim_ex.lst new file mode 100644 index 0000000..eeaccef --- /dev/null +++ b/Software/build/stm32f0xx_hal_tim_ex.lst @@ -0,0 +1,10370 @@ +ARM GAS /tmp/ccUWVJFr.s page 1 + + + 1 .cpu cortex-m0 + 2 .arch armv6s-m + 3 .fpu softvfp + 4 .eabi_attribute 20, 1 + 5 .eabi_attribute 21, 1 + 6 .eabi_attribute 23, 3 + 7 .eabi_attribute 24, 1 + 8 .eabi_attribute 25, 1 + 9 .eabi_attribute 26, 1 + 10 .eabi_attribute 30, 1 + 11 .eabi_attribute 34, 0 + 12 .eabi_attribute 18, 4 + 13 .file "stm32f0xx_hal_tim_ex.c" + 14 .text + 15 .Ltext0: + 16 .cfi_sections .debug_frame + 17 .file 1 "Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c" + 18 .section .text.TIM_CCxNChannelCmd,"ax",%progbits + 19 .align 1 + 20 .syntax unified + 21 .code 16 + 22 .thumb_func + 24 TIM_CCxNChannelCmd: + 25 .LVL0: + 26 .LFB81: + 1:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** /** + 2:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** ****************************************************************************** + 3:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** * @file stm32f0xx_hal_tim_ex.c + 4:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** * @author MCD Application Team + 5:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** * @brief TIM HAL module driver. + 6:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** * This file provides firmware functions to manage the following + 7:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** * functionalities of the Timer Extended peripheral: + 8:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** * + Time Hall Sensor Interface Initialization + 9:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** * + Time Hall Sensor Interface Start + 10:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** * + Time Complementary signal break and dead time configuration + 11:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** * + Time Master and Slave synchronization configuration + 12:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** * + Time OCRef clear configuration + 13:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** * + Timer remapping capabilities configuration + 14:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** ****************************************************************************** + 15:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** * @attention + 16:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** * + 17:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** * Copyright (c) 2016 STMicroelectronics. + 18:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** * All rights reserved. + 19:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** * + 20:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** * This software is licensed under terms that can be found in the LICENSE file + 21:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** * in the root directory of this software component. + 22:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** * If no LICENSE file comes with this software, it is provided AS-IS. + 23:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** * + 24:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** ****************************************************************************** + 25:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** @verbatim + 26:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** ============================================================================== + 27:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** ##### TIMER Extended features ##### + 28:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** ============================================================================== + 29:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** [..] + 30:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** The Timer Extended features include: + 31:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** (#) Complementary outputs with programmable dead-time for : + 32:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** (++) Output Compare + ARM GAS /tmp/ccUWVJFr.s page 2 + + + 33:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** (++) PWM generation (Edge and Center-aligned Mode) + 34:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** (++) One-pulse mode output + 35:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** (#) Synchronization circuit to control the timer with external signals and to + 36:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** interconnect several timers together. + 37:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** (#) Break input to put the timer output signals in reset state or in a known state. + 38:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** (#) Supports incremental (quadrature) encoder and hall-sensor circuitry for + 39:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** positioning purposes + 40:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** + 41:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** ##### How to use this driver ##### + 42:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** ============================================================================== + 43:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** [..] + 44:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** (#) Initialize the TIM low level resources by implementing the following functions + 45:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** depending on the selected feature: + 46:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** (++) Hall Sensor output : HAL_TIMEx_HallSensor_MspInit() + 47:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** + 48:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** (#) Initialize the TIM low level resources : + 49:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** (##) Enable the TIM interface clock using __HAL_RCC_TIMx_CLK_ENABLE(); + 50:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** (##) TIM pins configuration + 51:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** (+++) Enable the clock for the TIM GPIOs using the following function: + 52:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** __HAL_RCC_GPIOx_CLK_ENABLE(); + 53:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** (+++) Configure these TIM pins in Alternate function mode using HAL_GPIO_Init(); + 54:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** + 55:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** (#) The external Clock can be configured, if needed (the default clock is the + 56:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** internal clock from the APBx), using the following function: + 57:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** HAL_TIM_ConfigClockSource, the clock configuration should be done before + 58:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** any start function. + 59:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** + 60:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** (#) Configure the TIM in the desired functioning mode using one of the + 61:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** initialization function of this driver: + 62:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** (++) HAL_TIMEx_HallSensor_Init() and HAL_TIMEx_ConfigCommutEvent(): to use the + 63:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** Timer Hall Sensor Interface and the commutation event with the corresponding + 64:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** Interrupt and DMA request if needed (Note that One Timer is used to interface + 65:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** with the Hall sensor Interface and another Timer should be used to use + 66:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** the commutation event). + 67:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** + 68:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** (#) Activate the TIM peripheral using one of the start functions: + 69:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** (++) Complementary Output Compare : HAL_TIMEx_OCN_Start(), HAL_TIMEx_OCN_Start_DMA(), + 70:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** HAL_TIMEx_OCN_Start_IT() + 71:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** (++) Complementary PWM generation : HAL_TIMEx_PWMN_Start(), HAL_TIMEx_PWMN_Start_DMA(), + 72:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** HAL_TIMEx_PWMN_Start_IT() + 73:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** (++) Complementary One-pulse mode output : HAL_TIMEx_OnePulseN_Start(), HAL_TIMEx_OnePul + 74:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** (++) Hall Sensor output : HAL_TIMEx_HallSensor_Start(), HAL_TIMEx_HallSensor_Start_DMA() + 75:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** HAL_TIMEx_HallSensor_Start_IT(). + 76:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** + 77:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** @endverbatim + 78:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** ****************************************************************************** + 79:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** */ + 80:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** + 81:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** /* Includes ------------------------------------------------------------------*/ + 82:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** #include "stm32f0xx_hal.h" + 83:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** + 84:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** /** @addtogroup STM32F0xx_HAL_Driver + 85:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** * @{ + 86:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** */ + 87:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** + 88:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** /** @defgroup TIMEx TIMEx + 89:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** * @brief TIM Extended HAL module driver + ARM GAS /tmp/ccUWVJFr.s page 3 + + + 90:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** * @{ + 91:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** */ + 92:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** + 93:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** #ifdef HAL_TIM_MODULE_ENABLED + 94:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** + 95:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** /* Private typedef -----------------------------------------------------------*/ + 96:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** /* Private define ------------------------------------------------------------*/ + 97:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** /* Private macros ------------------------------------------------------------*/ + 98:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** /* Private variables ---------------------------------------------------------*/ + 99:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** /* Private function prototypes -----------------------------------------------*/ + 100:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** static void TIM_DMADelayPulseNCplt(DMA_HandleTypeDef *hdma); + 101:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** static void TIM_DMAErrorCCxN(DMA_HandleTypeDef *hdma); + 102:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** static void TIM_CCxNChannelCmd(TIM_TypeDef *TIMx, uint32_t Channel, uint32_t ChannelNState); + 103:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** + 104:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** /* Exported functions --------------------------------------------------------*/ + 105:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** /** @defgroup TIMEx_Exported_Functions TIM Extended Exported Functions + 106:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** * @{ + 107:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** */ + 108:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** + 109:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** /** @defgroup TIMEx_Exported_Functions_Group1 Extended Timer Hall Sensor functions + 110:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** * @brief Timer Hall Sensor functions + 111:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** * + 112:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** @verbatim + 113:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** ============================================================================== + 114:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** ##### Timer Hall Sensor functions ##### + 115:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** ============================================================================== + 116:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** [..] + 117:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** This section provides functions allowing to: + 118:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** (+) Initialize and configure TIM HAL Sensor. + 119:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** (+) De-initialize TIM HAL Sensor. + 120:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** (+) Start the Hall Sensor Interface. + 121:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** (+) Stop the Hall Sensor Interface. + 122:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** (+) Start the Hall Sensor Interface and enable interrupts. + 123:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** (+) Stop the Hall Sensor Interface and disable interrupts. + 124:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** (+) Start the Hall Sensor Interface and enable DMA transfers. + 125:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** (+) Stop the Hall Sensor Interface and disable DMA transfers. + 126:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** + 127:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** @endverbatim + 128:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** * @{ + 129:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** */ + 130:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** /** + 131:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** * @brief Initializes the TIM Hall Sensor Interface and initialize the associated handle. + 132:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** * @note When the timer instance is initialized in Hall Sensor Interface mode, + 133:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** * timer channels 1 and channel 2 are reserved and cannot be used for + 134:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** * other purpose. + 135:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** * @param htim TIM Hall Sensor Interface handle + 136:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** * @param sConfig TIM Hall Sensor configuration structure + 137:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** * @retval HAL status + 138:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** */ + 139:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** HAL_StatusTypeDef HAL_TIMEx_HallSensor_Init(TIM_HandleTypeDef *htim, const TIM_HallSensor_InitTypeD + 140:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** { + 141:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** TIM_OC_InitTypeDef OC_Config; + 142:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** + 143:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** /* Check the TIM handle allocation */ + 144:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** if (htim == NULL) + 145:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** { + 146:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** return HAL_ERROR; + ARM GAS /tmp/ccUWVJFr.s page 4 + + + 147:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** } + 148:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** + 149:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** /* Check the parameters */ + 150:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** assert_param(IS_TIM_HALL_SENSOR_INTERFACE_INSTANCE(htim->Instance)); + 151:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** assert_param(IS_TIM_COUNTER_MODE(htim->Init.CounterMode)); + 152:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** assert_param(IS_TIM_CLOCKDIVISION_DIV(htim->Init.ClockDivision)); + 153:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** assert_param(IS_TIM_AUTORELOAD_PRELOAD(htim->Init.AutoReloadPreload)); + 154:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** assert_param(IS_TIM_IC_POLARITY(sConfig->IC1Polarity)); + 155:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** assert_param(IS_TIM_PERIOD(htim, htim->Init.Period)); + 156:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** assert_param(IS_TIM_IC_PRESCALER(sConfig->IC1Prescaler)); + 157:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** assert_param(IS_TIM_IC_FILTER(sConfig->IC1Filter)); + 158:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** + 159:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** if (htim->State == HAL_TIM_STATE_RESET) + 160:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** { + 161:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** /* Allocate lock resource and initialize it */ + 162:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** htim->Lock = HAL_UNLOCKED; + 163:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** + 164:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** #if (USE_HAL_TIM_REGISTER_CALLBACKS == 1) + 165:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** /* Reset interrupt callbacks to legacy week callbacks */ + 166:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** TIM_ResetCallback(htim); + 167:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** + 168:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** if (htim->HallSensor_MspInitCallback == NULL) + 169:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** { + 170:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** htim->HallSensor_MspInitCallback = HAL_TIMEx_HallSensor_MspInit; + 171:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** } + 172:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** /* Init the low level hardware : GPIO, CLOCK, NVIC */ + 173:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** htim->HallSensor_MspInitCallback(htim); + 174:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** #else + 175:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** /* Init the low level hardware : GPIO, CLOCK, NVIC and DMA */ + 176:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** HAL_TIMEx_HallSensor_MspInit(htim); + 177:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** #endif /* USE_HAL_TIM_REGISTER_CALLBACKS */ + 178:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** } + 179:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** + 180:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** /* Set the TIM state */ + 181:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** htim->State = HAL_TIM_STATE_BUSY; + 182:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** + 183:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** /* Configure the Time base in the Encoder Mode */ + 184:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** TIM_Base_SetConfig(htim->Instance, &htim->Init); + 185:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** + 186:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** /* Configure the Channel 1 as Input Channel to interface with the three Outputs of the Hall sens + 187:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** TIM_TI1_SetConfig(htim->Instance, sConfig->IC1Polarity, TIM_ICSELECTION_TRC, sConfig->IC1Filter); + 188:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** + 189:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** /* Reset the IC1PSC Bits */ + 190:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** htim->Instance->CCMR1 &= ~TIM_CCMR1_IC1PSC; + 191:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** /* Set the IC1PSC value */ + 192:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** htim->Instance->CCMR1 |= sConfig->IC1Prescaler; + 193:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** + 194:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** /* Enable the Hall sensor interface (XOR function of the three inputs) */ + 195:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** htim->Instance->CR2 |= TIM_CR2_TI1S; + 196:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** + 197:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** /* Select the TIM_TS_TI1F_ED signal as Input trigger for the TIM */ + 198:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** htim->Instance->SMCR &= ~TIM_SMCR_TS; + 199:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** htim->Instance->SMCR |= TIM_TS_TI1F_ED; + 200:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** + 201:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** /* Use the TIM_TS_TI1F_ED signal to reset the TIM counter each edge detection */ + 202:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** htim->Instance->SMCR &= ~TIM_SMCR_SMS; + 203:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** htim->Instance->SMCR |= TIM_SLAVEMODE_RESET; + ARM GAS /tmp/ccUWVJFr.s page 5 + + + 204:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** + 205:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** /* Program channel 2 in PWM 2 mode with the desired Commutation_Delay*/ + 206:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** OC_Config.OCFastMode = TIM_OCFAST_DISABLE; + 207:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** OC_Config.OCIdleState = TIM_OCIDLESTATE_RESET; + 208:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** OC_Config.OCMode = TIM_OCMODE_PWM2; + 209:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** OC_Config.OCNIdleState = TIM_OCNIDLESTATE_RESET; + 210:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** OC_Config.OCNPolarity = TIM_OCNPOLARITY_HIGH; + 211:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** OC_Config.OCPolarity = TIM_OCPOLARITY_HIGH; + 212:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** OC_Config.Pulse = sConfig->Commutation_Delay; + 213:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** + 214:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** TIM_OC2_SetConfig(htim->Instance, &OC_Config); + 215:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** + 216:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** /* Select OC2REF as trigger output on TRGO: write the MMS bits in the TIMx_CR2 + 217:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** register to 101 */ + 218:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** htim->Instance->CR2 &= ~TIM_CR2_MMS; + 219:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** htim->Instance->CR2 |= TIM_TRGO_OC2REF; + 220:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** + 221:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** /* Initialize the DMA burst operation state */ + 222:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** htim->DMABurstState = HAL_DMA_BURST_STATE_READY; + 223:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** + 224:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** /* Initialize the TIM channels state */ + 225:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** TIM_CHANNEL_STATE_SET(htim, TIM_CHANNEL_1, HAL_TIM_CHANNEL_STATE_READY); + 226:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** TIM_CHANNEL_STATE_SET(htim, TIM_CHANNEL_2, HAL_TIM_CHANNEL_STATE_READY); + 227:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** TIM_CHANNEL_N_STATE_SET(htim, TIM_CHANNEL_1, HAL_TIM_CHANNEL_STATE_READY); + 228:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** TIM_CHANNEL_N_STATE_SET(htim, TIM_CHANNEL_2, HAL_TIM_CHANNEL_STATE_READY); + 229:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** + 230:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** /* Initialize the TIM state*/ + 231:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** htim->State = HAL_TIM_STATE_READY; + 232:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** + 233:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** return HAL_OK; + 234:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** } + 235:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** + 236:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** /** + 237:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** * @brief DeInitializes the TIM Hall Sensor interface + 238:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** * @param htim TIM Hall Sensor Interface handle + 239:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** * @retval HAL status + 240:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** */ + 241:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** HAL_StatusTypeDef HAL_TIMEx_HallSensor_DeInit(TIM_HandleTypeDef *htim) + 242:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** { + 243:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** /* Check the parameters */ + 244:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** assert_param(IS_TIM_INSTANCE(htim->Instance)); + 245:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** + 246:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** htim->State = HAL_TIM_STATE_BUSY; + 247:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** + 248:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** /* Disable the TIM Peripheral Clock */ + 249:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** __HAL_TIM_DISABLE(htim); + 250:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** + 251:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** #if (USE_HAL_TIM_REGISTER_CALLBACKS == 1) + 252:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** if (htim->HallSensor_MspDeInitCallback == NULL) + 253:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** { + 254:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** htim->HallSensor_MspDeInitCallback = HAL_TIMEx_HallSensor_MspDeInit; + 255:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** } + 256:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** /* DeInit the low level hardware */ + 257:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** htim->HallSensor_MspDeInitCallback(htim); + 258:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** #else + 259:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** /* DeInit the low level hardware: GPIO, CLOCK, NVIC */ + 260:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** HAL_TIMEx_HallSensor_MspDeInit(htim); + ARM GAS /tmp/ccUWVJFr.s page 6 + + + 261:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** #endif /* USE_HAL_TIM_REGISTER_CALLBACKS */ + 262:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** + 263:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** /* Change the DMA burst operation state */ + 264:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** htim->DMABurstState = HAL_DMA_BURST_STATE_RESET; + 265:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** + 266:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** /* Change the TIM channels state */ + 267:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** TIM_CHANNEL_STATE_SET(htim, TIM_CHANNEL_1, HAL_TIM_CHANNEL_STATE_RESET); + 268:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** TIM_CHANNEL_STATE_SET(htim, TIM_CHANNEL_2, HAL_TIM_CHANNEL_STATE_RESET); + 269:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** TIM_CHANNEL_N_STATE_SET(htim, TIM_CHANNEL_1, HAL_TIM_CHANNEL_STATE_RESET); + 270:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** TIM_CHANNEL_N_STATE_SET(htim, TIM_CHANNEL_2, HAL_TIM_CHANNEL_STATE_RESET); + 271:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** + 272:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** /* Change TIM state */ + 273:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** htim->State = HAL_TIM_STATE_RESET; + 274:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** + 275:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** /* Release Lock */ + 276:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** __HAL_UNLOCK(htim); + 277:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** + 278:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** return HAL_OK; + 279:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** } + 280:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** + 281:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** /** + 282:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** * @brief Initializes the TIM Hall Sensor MSP. + 283:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** * @param htim TIM Hall Sensor Interface handle + 284:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** * @retval None + 285:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** */ + 286:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** __weak void HAL_TIMEx_HallSensor_MspInit(TIM_HandleTypeDef *htim) + 287:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** { + 288:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** /* Prevent unused argument(s) compilation warning */ + 289:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** UNUSED(htim); + 290:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** + 291:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** /* NOTE : This function should not be modified, when the callback is needed, + 292:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** the HAL_TIMEx_HallSensor_MspInit could be implemented in the user file + 293:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** */ + 294:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** } + 295:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** + 296:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** /** + 297:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** * @brief DeInitializes TIM Hall Sensor MSP. + 298:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** * @param htim TIM Hall Sensor Interface handle + 299:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** * @retval None + 300:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** */ + 301:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** __weak void HAL_TIMEx_HallSensor_MspDeInit(TIM_HandleTypeDef *htim) + 302:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** { + 303:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** /* Prevent unused argument(s) compilation warning */ + 304:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** UNUSED(htim); + 305:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** + 306:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** /* NOTE : This function should not be modified, when the callback is needed, + 307:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** the HAL_TIMEx_HallSensor_MspDeInit could be implemented in the user file + 308:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** */ + 309:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** } + 310:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** + 311:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** /** + 312:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** * @brief Starts the TIM Hall Sensor Interface. + 313:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** * @param htim TIM Hall Sensor Interface handle + 314:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** * @retval HAL status + 315:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** */ + 316:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** HAL_StatusTypeDef HAL_TIMEx_HallSensor_Start(TIM_HandleTypeDef *htim) + 317:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** { + ARM GAS /tmp/ccUWVJFr.s page 7 + + + 318:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** uint32_t tmpsmcr; + 319:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** HAL_TIM_ChannelStateTypeDef channel_1_state = TIM_CHANNEL_STATE_GET(htim, TIM_CHANNEL_1); + 320:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** HAL_TIM_ChannelStateTypeDef channel_2_state = TIM_CHANNEL_STATE_GET(htim, TIM_CHANNEL_2); + 321:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** HAL_TIM_ChannelStateTypeDef complementary_channel_1_state = TIM_CHANNEL_N_STATE_GET(htim, TIM_CHA + 322:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** HAL_TIM_ChannelStateTypeDef complementary_channel_2_state = TIM_CHANNEL_N_STATE_GET(htim, TIM_CHA + 323:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** + 324:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** /* Check the parameters */ + 325:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** assert_param(IS_TIM_HALL_SENSOR_INTERFACE_INSTANCE(htim->Instance)); + 326:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** + 327:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** /* Check the TIM channels state */ + 328:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** if ((channel_1_state != HAL_TIM_CHANNEL_STATE_READY) + 329:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** || (channel_2_state != HAL_TIM_CHANNEL_STATE_READY) + 330:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** || (complementary_channel_1_state != HAL_TIM_CHANNEL_STATE_READY) + 331:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** || (complementary_channel_2_state != HAL_TIM_CHANNEL_STATE_READY)) + 332:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** { + 333:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** return HAL_ERROR; + 334:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** } + 335:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** + 336:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** /* Set the TIM channels state */ + 337:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** TIM_CHANNEL_STATE_SET(htim, TIM_CHANNEL_1, HAL_TIM_CHANNEL_STATE_BUSY); + 338:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** TIM_CHANNEL_STATE_SET(htim, TIM_CHANNEL_2, HAL_TIM_CHANNEL_STATE_BUSY); + 339:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** TIM_CHANNEL_N_STATE_SET(htim, TIM_CHANNEL_1, HAL_TIM_CHANNEL_STATE_BUSY); + 340:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** TIM_CHANNEL_N_STATE_SET(htim, TIM_CHANNEL_2, HAL_TIM_CHANNEL_STATE_BUSY); + 341:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** + 342:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** /* Enable the Input Capture channel 1 + 343:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** (in the Hall Sensor Interface the three possible channels that can be used are TIM_CHANNEL_1, + 344:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** TIM_CHANNEL_2 and TIM_CHANNEL_3) */ + 345:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** TIM_CCxChannelCmd(htim->Instance, TIM_CHANNEL_1, TIM_CCx_ENABLE); + 346:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** + 347:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** /* Enable the Peripheral, except in trigger mode where enable is automatically done with trigger + 348:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** if (IS_TIM_SLAVE_INSTANCE(htim->Instance)) + 349:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** { + 350:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** tmpsmcr = htim->Instance->SMCR & TIM_SMCR_SMS; + 351:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** if (!IS_TIM_SLAVEMODE_TRIGGER_ENABLED(tmpsmcr)) + 352:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** { + 353:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** __HAL_TIM_ENABLE(htim); + 354:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** } + 355:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** } + 356:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** else + 357:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** { + 358:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** __HAL_TIM_ENABLE(htim); + 359:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** } + 360:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** + 361:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** /* Return function status */ + 362:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** return HAL_OK; + 363:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** } + 364:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** + 365:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** /** + 366:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** * @brief Stops the TIM Hall sensor Interface. + 367:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** * @param htim TIM Hall Sensor Interface handle + 368:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** * @retval HAL status + 369:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** */ + 370:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** HAL_StatusTypeDef HAL_TIMEx_HallSensor_Stop(TIM_HandleTypeDef *htim) + 371:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** { + 372:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** /* Check the parameters */ + 373:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** assert_param(IS_TIM_HALL_SENSOR_INTERFACE_INSTANCE(htim->Instance)); + 374:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** + ARM GAS /tmp/ccUWVJFr.s page 8 + + + 375:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** /* Disable the Input Capture channels 1, 2 and 3 + 376:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** (in the Hall Sensor Interface the three possible channels that can be used are TIM_CHANNEL_1, + 377:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** TIM_CHANNEL_2 and TIM_CHANNEL_3) */ + 378:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** TIM_CCxChannelCmd(htim->Instance, TIM_CHANNEL_1, TIM_CCx_DISABLE); + 379:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** + 380:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** /* Disable the Peripheral */ + 381:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** __HAL_TIM_DISABLE(htim); + 382:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** + 383:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** /* Set the TIM channels state */ + 384:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** TIM_CHANNEL_STATE_SET(htim, TIM_CHANNEL_1, HAL_TIM_CHANNEL_STATE_READY); + 385:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** TIM_CHANNEL_STATE_SET(htim, TIM_CHANNEL_2, HAL_TIM_CHANNEL_STATE_READY); + 386:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** TIM_CHANNEL_N_STATE_SET(htim, TIM_CHANNEL_1, HAL_TIM_CHANNEL_STATE_READY); + 387:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** TIM_CHANNEL_N_STATE_SET(htim, TIM_CHANNEL_2, HAL_TIM_CHANNEL_STATE_READY); + 388:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** + 389:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** /* Return function status */ + 390:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** return HAL_OK; + 391:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** } + 392:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** + 393:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** /** + 394:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** * @brief Starts the TIM Hall Sensor Interface in interrupt mode. + 395:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** * @param htim TIM Hall Sensor Interface handle + 396:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** * @retval HAL status + 397:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** */ + 398:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** HAL_StatusTypeDef HAL_TIMEx_HallSensor_Start_IT(TIM_HandleTypeDef *htim) + 399:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** { + 400:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** uint32_t tmpsmcr; + 401:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** HAL_TIM_ChannelStateTypeDef channel_1_state = TIM_CHANNEL_STATE_GET(htim, TIM_CHANNEL_1); + 402:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** HAL_TIM_ChannelStateTypeDef channel_2_state = TIM_CHANNEL_STATE_GET(htim, TIM_CHANNEL_2); + 403:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** HAL_TIM_ChannelStateTypeDef complementary_channel_1_state = TIM_CHANNEL_N_STATE_GET(htim, TIM_CHA + 404:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** HAL_TIM_ChannelStateTypeDef complementary_channel_2_state = TIM_CHANNEL_N_STATE_GET(htim, TIM_CHA + 405:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** + 406:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** /* Check the parameters */ + 407:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** assert_param(IS_TIM_HALL_SENSOR_INTERFACE_INSTANCE(htim->Instance)); + 408:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** + 409:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** /* Check the TIM channels state */ + 410:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** if ((channel_1_state != HAL_TIM_CHANNEL_STATE_READY) + 411:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** || (channel_2_state != HAL_TIM_CHANNEL_STATE_READY) + 412:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** || (complementary_channel_1_state != HAL_TIM_CHANNEL_STATE_READY) + 413:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** || (complementary_channel_2_state != HAL_TIM_CHANNEL_STATE_READY)) + 414:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** { + 415:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** return HAL_ERROR; + 416:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** } + 417:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** + 418:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** /* Set the TIM channels state */ + 419:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** TIM_CHANNEL_STATE_SET(htim, TIM_CHANNEL_1, HAL_TIM_CHANNEL_STATE_BUSY); + 420:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** TIM_CHANNEL_STATE_SET(htim, TIM_CHANNEL_2, HAL_TIM_CHANNEL_STATE_BUSY); + 421:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** TIM_CHANNEL_N_STATE_SET(htim, TIM_CHANNEL_1, HAL_TIM_CHANNEL_STATE_BUSY); + 422:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** TIM_CHANNEL_N_STATE_SET(htim, TIM_CHANNEL_2, HAL_TIM_CHANNEL_STATE_BUSY); + 423:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** + 424:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** /* Enable the capture compare Interrupts 1 event */ + 425:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** __HAL_TIM_ENABLE_IT(htim, TIM_IT_CC1); + 426:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** + 427:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** /* Enable the Input Capture channel 1 + 428:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** (in the Hall Sensor Interface the three possible channels that can be used are TIM_CHANNEL_1, + 429:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** TIM_CHANNEL_2 and TIM_CHANNEL_3) */ + 430:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** TIM_CCxChannelCmd(htim->Instance, TIM_CHANNEL_1, TIM_CCx_ENABLE); + 431:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** + ARM GAS /tmp/ccUWVJFr.s page 9 + + + 432:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** /* Enable the Peripheral, except in trigger mode where enable is automatically done with trigger + 433:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** if (IS_TIM_SLAVE_INSTANCE(htim->Instance)) + 434:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** { + 435:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** tmpsmcr = htim->Instance->SMCR & TIM_SMCR_SMS; + 436:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** if (!IS_TIM_SLAVEMODE_TRIGGER_ENABLED(tmpsmcr)) + 437:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** { + 438:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** __HAL_TIM_ENABLE(htim); + 439:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** } + 440:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** } + 441:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** else + 442:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** { + 443:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** __HAL_TIM_ENABLE(htim); + 444:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** } + 445:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** + 446:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** /* Return function status */ + 447:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** return HAL_OK; + 448:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** } + 449:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** + 450:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** /** + 451:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** * @brief Stops the TIM Hall Sensor Interface in interrupt mode. + 452:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** * @param htim TIM Hall Sensor Interface handle + 453:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** * @retval HAL status + 454:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** */ + 455:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** HAL_StatusTypeDef HAL_TIMEx_HallSensor_Stop_IT(TIM_HandleTypeDef *htim) + 456:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** { + 457:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** /* Check the parameters */ + 458:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** assert_param(IS_TIM_HALL_SENSOR_INTERFACE_INSTANCE(htim->Instance)); + 459:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** + 460:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** /* Disable the Input Capture channel 1 + 461:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** (in the Hall Sensor Interface the three possible channels that can be used are TIM_CHANNEL_1, + 462:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** TIM_CHANNEL_2 and TIM_CHANNEL_3) */ + 463:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** TIM_CCxChannelCmd(htim->Instance, TIM_CHANNEL_1, TIM_CCx_DISABLE); + 464:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** + 465:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** /* Disable the capture compare Interrupts event */ + 466:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** __HAL_TIM_DISABLE_IT(htim, TIM_IT_CC1); + 467:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** + 468:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** /* Disable the Peripheral */ + 469:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** __HAL_TIM_DISABLE(htim); + 470:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** + 471:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** /* Set the TIM channels state */ + 472:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** TIM_CHANNEL_STATE_SET(htim, TIM_CHANNEL_1, HAL_TIM_CHANNEL_STATE_READY); + 473:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** TIM_CHANNEL_STATE_SET(htim, TIM_CHANNEL_2, HAL_TIM_CHANNEL_STATE_READY); + 474:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** TIM_CHANNEL_N_STATE_SET(htim, TIM_CHANNEL_1, HAL_TIM_CHANNEL_STATE_READY); + 475:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** TIM_CHANNEL_N_STATE_SET(htim, TIM_CHANNEL_2, HAL_TIM_CHANNEL_STATE_READY); + 476:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** + 477:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** /* Return function status */ + 478:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** return HAL_OK; + 479:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** } + 480:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** + 481:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** /** + 482:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** * @brief Starts the TIM Hall Sensor Interface in DMA mode. + 483:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** * @param htim TIM Hall Sensor Interface handle + 484:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** * @param pData The destination Buffer address. + 485:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** * @param Length The length of data to be transferred from TIM peripheral to memory. + 486:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** * @retval HAL status + 487:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** */ + 488:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** HAL_StatusTypeDef HAL_TIMEx_HallSensor_Start_DMA(TIM_HandleTypeDef *htim, uint32_t *pData, uint16_t + ARM GAS /tmp/ccUWVJFr.s page 10 + + + 489:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** { + 490:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** uint32_t tmpsmcr; + 491:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** HAL_TIM_ChannelStateTypeDef channel_1_state = TIM_CHANNEL_STATE_GET(htim, TIM_CHANNEL_1); + 492:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** HAL_TIM_ChannelStateTypeDef complementary_channel_1_state = TIM_CHANNEL_N_STATE_GET(htim, TIM_CHA + 493:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** + 494:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** /* Check the parameters */ + 495:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** assert_param(IS_TIM_HALL_SENSOR_INTERFACE_INSTANCE(htim->Instance)); + 496:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** + 497:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** /* Set the TIM channel state */ + 498:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** if ((channel_1_state == HAL_TIM_CHANNEL_STATE_BUSY) + 499:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** || (complementary_channel_1_state == HAL_TIM_CHANNEL_STATE_BUSY)) + 500:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** { + 501:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** return HAL_BUSY; + 502:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** } + 503:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** else if ((channel_1_state == HAL_TIM_CHANNEL_STATE_READY) + 504:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** && (complementary_channel_1_state == HAL_TIM_CHANNEL_STATE_READY)) + 505:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** { + 506:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** if ((pData == NULL) || (Length == 0U)) + 507:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** { + 508:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** return HAL_ERROR; + 509:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** } + 510:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** else + 511:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** { + 512:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** TIM_CHANNEL_STATE_SET(htim, TIM_CHANNEL_1, HAL_TIM_CHANNEL_STATE_BUSY); + 513:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** TIM_CHANNEL_N_STATE_SET(htim, TIM_CHANNEL_1, HAL_TIM_CHANNEL_STATE_BUSY); + 514:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** } + 515:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** } + 516:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** else + 517:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** { + 518:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** return HAL_ERROR; + 519:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** } + 520:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** + 521:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** /* Enable the Input Capture channel 1 + 522:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** (in the Hall Sensor Interface the three possible channels that can be used are TIM_CHANNEL_1, + 523:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** TIM_CHANNEL_2 and TIM_CHANNEL_3) */ + 524:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** TIM_CCxChannelCmd(htim->Instance, TIM_CHANNEL_1, TIM_CCx_ENABLE); + 525:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** + 526:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** /* Set the DMA Input Capture 1 Callbacks */ + 527:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** htim->hdma[TIM_DMA_ID_CC1]->XferCpltCallback = TIM_DMACaptureCplt; + 528:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** htim->hdma[TIM_DMA_ID_CC1]->XferHalfCpltCallback = TIM_DMACaptureHalfCplt; + 529:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** /* Set the DMA error callback */ + 530:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** htim->hdma[TIM_DMA_ID_CC1]->XferErrorCallback = TIM_DMAError ; + 531:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** + 532:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** /* Enable the DMA channel for Capture 1*/ + 533:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** if (HAL_DMA_Start_IT(htim->hdma[TIM_DMA_ID_CC1], (uint32_t)&htim->Instance->CCR1, (uint32_t)pData + 534:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** { + 535:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** /* Return error status */ + 536:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** return HAL_ERROR; + 537:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** } + 538:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** /* Enable the capture compare 1 Interrupt */ + 539:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** __HAL_TIM_ENABLE_DMA(htim, TIM_DMA_CC1); + 540:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** + 541:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** /* Enable the Peripheral, except in trigger mode where enable is automatically done with trigger + 542:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** if (IS_TIM_SLAVE_INSTANCE(htim->Instance)) + 543:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** { + 544:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** tmpsmcr = htim->Instance->SMCR & TIM_SMCR_SMS; + 545:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** if (!IS_TIM_SLAVEMODE_TRIGGER_ENABLED(tmpsmcr)) + ARM GAS /tmp/ccUWVJFr.s page 11 + + + 546:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** { + 547:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** __HAL_TIM_ENABLE(htim); + 548:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** } + 549:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** } + 550:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** else + 551:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** { + 552:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** __HAL_TIM_ENABLE(htim); + 553:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** } + 554:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** + 555:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** /* Return function status */ + 556:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** return HAL_OK; + 557:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** } + 558:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** + 559:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** /** + 560:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** * @brief Stops the TIM Hall Sensor Interface in DMA mode. + 561:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** * @param htim TIM Hall Sensor Interface handle + 562:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** * @retval HAL status + 563:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** */ + 564:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** HAL_StatusTypeDef HAL_TIMEx_HallSensor_Stop_DMA(TIM_HandleTypeDef *htim) + 565:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** { + 566:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** /* Check the parameters */ + 567:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** assert_param(IS_TIM_HALL_SENSOR_INTERFACE_INSTANCE(htim->Instance)); + 568:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** + 569:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** /* Disable the Input Capture channel 1 + 570:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** (in the Hall Sensor Interface the three possible channels that can be used are TIM_CHANNEL_1, + 571:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** TIM_CHANNEL_2 and TIM_CHANNEL_3) */ + 572:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** TIM_CCxChannelCmd(htim->Instance, TIM_CHANNEL_1, TIM_CCx_DISABLE); + 573:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** + 574:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** + 575:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** /* Disable the capture compare Interrupts 1 event */ + 576:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** __HAL_TIM_DISABLE_DMA(htim, TIM_DMA_CC1); + 577:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** + 578:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** (void)HAL_DMA_Abort_IT(htim->hdma[TIM_DMA_ID_CC1]); + 579:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** + 580:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** /* Disable the Peripheral */ + 581:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** __HAL_TIM_DISABLE(htim); + 582:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** + 583:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** /* Set the TIM channel state */ + 584:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** TIM_CHANNEL_STATE_SET(htim, TIM_CHANNEL_1, HAL_TIM_CHANNEL_STATE_READY); + 585:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** TIM_CHANNEL_N_STATE_SET(htim, TIM_CHANNEL_1, HAL_TIM_CHANNEL_STATE_READY); + 586:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** + 587:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** /* Return function status */ + 588:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** return HAL_OK; + 589:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** } + 590:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** + 591:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** /** + 592:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** * @} + 593:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** */ + 594:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** + 595:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** /** @defgroup TIMEx_Exported_Functions_Group2 Extended Timer Complementary Output Compare functions + 596:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** * @brief Timer Complementary Output Compare functions + 597:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** * + 598:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** @verbatim + 599:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** ============================================================================== + 600:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** ##### Timer Complementary Output Compare functions ##### + 601:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** ============================================================================== + 602:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** [..] + ARM GAS /tmp/ccUWVJFr.s page 12 + + + 603:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** This section provides functions allowing to: + 604:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** (+) Start the Complementary Output Compare/PWM. + 605:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** (+) Stop the Complementary Output Compare/PWM. + 606:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** (+) Start the Complementary Output Compare/PWM and enable interrupts. + 607:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** (+) Stop the Complementary Output Compare/PWM and disable interrupts. + 608:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** (+) Start the Complementary Output Compare/PWM and enable DMA transfers. + 609:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** (+) Stop the Complementary Output Compare/PWM and disable DMA transfers. + 610:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** + 611:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** @endverbatim + 612:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** * @{ + 613:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** */ + 614:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** + 615:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** /** + 616:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** * @brief Starts the TIM Output Compare signal generation on the complementary + 617:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** * output. + 618:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** * @param htim TIM Output Compare handle + 619:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** * @param Channel TIM Channel to be enabled + 620:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** * This parameter can be one of the following values: + 621:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** * @arg TIM_CHANNEL_1: TIM Channel 1 selected + 622:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** * @arg TIM_CHANNEL_2: TIM Channel 2 selected + 623:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** * @arg TIM_CHANNEL_3: TIM Channel 3 selected + 624:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** * @retval HAL status + 625:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** */ + 626:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** HAL_StatusTypeDef HAL_TIMEx_OCN_Start(TIM_HandleTypeDef *htim, uint32_t Channel) + 627:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** { + 628:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** uint32_t tmpsmcr; + 629:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** + 630:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** /* Check the parameters */ + 631:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** assert_param(IS_TIM_CCXN_INSTANCE(htim->Instance, Channel)); + 632:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** + 633:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** /* Check the TIM complementary channel state */ + 634:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** if (TIM_CHANNEL_N_STATE_GET(htim, Channel) != HAL_TIM_CHANNEL_STATE_READY) + 635:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** { + 636:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** return HAL_ERROR; + 637:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** } + 638:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** + 639:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** /* Set the TIM complementary channel state */ + 640:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** TIM_CHANNEL_N_STATE_SET(htim, Channel, HAL_TIM_CHANNEL_STATE_BUSY); + 641:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** + 642:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** /* Enable the Capture compare channel N */ + 643:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** TIM_CCxNChannelCmd(htim->Instance, Channel, TIM_CCxN_ENABLE); + 644:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** + 645:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** /* Enable the Main Output */ + 646:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** __HAL_TIM_MOE_ENABLE(htim); + 647:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** + 648:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** /* Enable the Peripheral, except in trigger mode where enable is automatically done with trigger + 649:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** if (IS_TIM_SLAVE_INSTANCE(htim->Instance)) + 650:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** { + 651:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** tmpsmcr = htim->Instance->SMCR & TIM_SMCR_SMS; + 652:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** if (!IS_TIM_SLAVEMODE_TRIGGER_ENABLED(tmpsmcr)) + 653:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** { + 654:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** __HAL_TIM_ENABLE(htim); + 655:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** } + 656:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** } + 657:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** else + 658:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** { + 659:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** __HAL_TIM_ENABLE(htim); + ARM GAS /tmp/ccUWVJFr.s page 13 + + + 660:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** } + 661:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** + 662:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** /* Return function status */ + 663:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** return HAL_OK; + 664:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** } + 665:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** + 666:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** /** + 667:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** * @brief Stops the TIM Output Compare signal generation on the complementary + 668:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** * output. + 669:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** * @param htim TIM handle + 670:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** * @param Channel TIM Channel to be disabled + 671:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** * This parameter can be one of the following values: + 672:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** * @arg TIM_CHANNEL_1: TIM Channel 1 selected + 673:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** * @arg TIM_CHANNEL_2: TIM Channel 2 selected + 674:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** * @arg TIM_CHANNEL_3: TIM Channel 3 selected + 675:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** * @retval HAL status + 676:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** */ + 677:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** HAL_StatusTypeDef HAL_TIMEx_OCN_Stop(TIM_HandleTypeDef *htim, uint32_t Channel) + 678:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** { + 679:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** /* Check the parameters */ + 680:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** assert_param(IS_TIM_CCXN_INSTANCE(htim->Instance, Channel)); + 681:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** + 682:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** /* Disable the Capture compare channel N */ + 683:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** TIM_CCxNChannelCmd(htim->Instance, Channel, TIM_CCxN_DISABLE); + 684:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** + 685:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** /* Disable the Main Output */ + 686:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** __HAL_TIM_MOE_DISABLE(htim); + 687:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** + 688:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** /* Disable the Peripheral */ + 689:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** __HAL_TIM_DISABLE(htim); + 690:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** + 691:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** /* Set the TIM complementary channel state */ + 692:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** TIM_CHANNEL_N_STATE_SET(htim, Channel, HAL_TIM_CHANNEL_STATE_READY); + 693:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** + 694:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** /* Return function status */ + 695:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** return HAL_OK; + 696:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** } + 697:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** + 698:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** /** + 699:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** * @brief Starts the TIM Output Compare signal generation in interrupt mode + 700:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** * on the complementary output. + 701:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** * @param htim TIM OC handle + 702:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** * @param Channel TIM Channel to be enabled + 703:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** * This parameter can be one of the following values: + 704:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** * @arg TIM_CHANNEL_1: TIM Channel 1 selected + 705:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** * @arg TIM_CHANNEL_2: TIM Channel 2 selected + 706:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** * @arg TIM_CHANNEL_3: TIM Channel 3 selected + 707:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** * @retval HAL status + 708:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** */ + 709:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** HAL_StatusTypeDef HAL_TIMEx_OCN_Start_IT(TIM_HandleTypeDef *htim, uint32_t Channel) + 710:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** { + 711:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** HAL_StatusTypeDef status = HAL_OK; + 712:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** uint32_t tmpsmcr; + 713:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** + 714:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** /* Check the parameters */ + 715:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** assert_param(IS_TIM_CCXN_INSTANCE(htim->Instance, Channel)); + 716:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** + ARM GAS /tmp/ccUWVJFr.s page 14 + + + 717:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** /* Check the TIM complementary channel state */ + 718:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** if (TIM_CHANNEL_N_STATE_GET(htim, Channel) != HAL_TIM_CHANNEL_STATE_READY) + 719:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** { + 720:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** return HAL_ERROR; + 721:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** } + 722:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** + 723:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** /* Set the TIM complementary channel state */ + 724:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** TIM_CHANNEL_N_STATE_SET(htim, Channel, HAL_TIM_CHANNEL_STATE_BUSY); + 725:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** + 726:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** switch (Channel) + 727:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** { + 728:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** case TIM_CHANNEL_1: + 729:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** { + 730:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** /* Enable the TIM Output Compare interrupt */ + 731:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** __HAL_TIM_ENABLE_IT(htim, TIM_IT_CC1); + 732:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** break; + 733:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** } + 734:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** + 735:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** case TIM_CHANNEL_2: + 736:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** { + 737:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** /* Enable the TIM Output Compare interrupt */ + 738:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** __HAL_TIM_ENABLE_IT(htim, TIM_IT_CC2); + 739:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** break; + 740:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** } + 741:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** + 742:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** case TIM_CHANNEL_3: + 743:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** { + 744:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** /* Enable the TIM Output Compare interrupt */ + 745:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** __HAL_TIM_ENABLE_IT(htim, TIM_IT_CC3); + 746:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** break; + 747:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** } + 748:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** + 749:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** + 750:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** default: + 751:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** status = HAL_ERROR; + 752:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** break; + 753:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** } + 754:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** + 755:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** if (status == HAL_OK) + 756:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** { + 757:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** /* Enable the TIM Break interrupt */ + 758:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** __HAL_TIM_ENABLE_IT(htim, TIM_IT_BREAK); + 759:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** + 760:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** /* Enable the Capture compare channel N */ + 761:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** TIM_CCxNChannelCmd(htim->Instance, Channel, TIM_CCxN_ENABLE); + 762:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** + 763:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** /* Enable the Main Output */ + 764:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** __HAL_TIM_MOE_ENABLE(htim); + 765:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** + 766:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** /* Enable the Peripheral, except in trigger mode where enable is automatically done with trigge + 767:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** if (IS_TIM_SLAVE_INSTANCE(htim->Instance)) + 768:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** { + 769:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** tmpsmcr = htim->Instance->SMCR & TIM_SMCR_SMS; + 770:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** if (!IS_TIM_SLAVEMODE_TRIGGER_ENABLED(tmpsmcr)) + 771:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** { + 772:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** __HAL_TIM_ENABLE(htim); + 773:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** } + ARM GAS /tmp/ccUWVJFr.s page 15 + + + 774:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** } + 775:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** else + 776:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** { + 777:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** __HAL_TIM_ENABLE(htim); + 778:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** } + 779:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** } + 780:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** + 781:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** /* Return function status */ + 782:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** return status; + 783:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** } + 784:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** + 785:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** /** + 786:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** * @brief Stops the TIM Output Compare signal generation in interrupt mode + 787:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** * on the complementary output. + 788:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** * @param htim TIM Output Compare handle + 789:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** * @param Channel TIM Channel to be disabled + 790:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** * This parameter can be one of the following values: + 791:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** * @arg TIM_CHANNEL_1: TIM Channel 1 selected + 792:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** * @arg TIM_CHANNEL_2: TIM Channel 2 selected + 793:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** * @arg TIM_CHANNEL_3: TIM Channel 3 selected + 794:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** * @retval HAL status + 795:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** */ + 796:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** HAL_StatusTypeDef HAL_TIMEx_OCN_Stop_IT(TIM_HandleTypeDef *htim, uint32_t Channel) + 797:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** { + 798:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** HAL_StatusTypeDef status = HAL_OK; + 799:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** uint32_t tmpccer; + 800:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** + 801:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** /* Check the parameters */ + 802:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** assert_param(IS_TIM_CCXN_INSTANCE(htim->Instance, Channel)); + 803:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** + 804:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** switch (Channel) + 805:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** { + 806:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** case TIM_CHANNEL_1: + 807:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** { + 808:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** /* Disable the TIM Output Compare interrupt */ + 809:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** __HAL_TIM_DISABLE_IT(htim, TIM_IT_CC1); + 810:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** break; + 811:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** } + 812:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** + 813:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** case TIM_CHANNEL_2: + 814:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** { + 815:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** /* Disable the TIM Output Compare interrupt */ + 816:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** __HAL_TIM_DISABLE_IT(htim, TIM_IT_CC2); + 817:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** break; + 818:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** } + 819:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** + 820:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** case TIM_CHANNEL_3: + 821:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** { + 822:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** /* Disable the TIM Output Compare interrupt */ + 823:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** __HAL_TIM_DISABLE_IT(htim, TIM_IT_CC3); + 824:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** break; + 825:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** } + 826:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** + 827:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** default: + 828:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** status = HAL_ERROR; + 829:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** break; + 830:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** } + ARM GAS /tmp/ccUWVJFr.s page 16 + + + 831:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** + 832:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** if (status == HAL_OK) + 833:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** { + 834:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** /* Disable the Capture compare channel N */ + 835:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** TIM_CCxNChannelCmd(htim->Instance, Channel, TIM_CCxN_DISABLE); + 836:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** + 837:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** /* Disable the TIM Break interrupt (only if no more channel is active) */ + 838:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** tmpccer = htim->Instance->CCER; + 839:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** if ((tmpccer & (TIM_CCER_CC1NE | TIM_CCER_CC2NE | TIM_CCER_CC3NE)) == (uint32_t)RESET) + 840:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** { + 841:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** __HAL_TIM_DISABLE_IT(htim, TIM_IT_BREAK); + 842:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** } + 843:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** + 844:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** /* Disable the Main Output */ + 845:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** __HAL_TIM_MOE_DISABLE(htim); + 846:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** + 847:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** /* Disable the Peripheral */ + 848:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** __HAL_TIM_DISABLE(htim); + 849:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** + 850:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** /* Set the TIM complementary channel state */ + 851:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** TIM_CHANNEL_N_STATE_SET(htim, Channel, HAL_TIM_CHANNEL_STATE_READY); + 852:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** } + 853:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** + 854:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** /* Return function status */ + 855:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** return status; + 856:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** } + 857:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** + 858:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** /** + 859:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** * @brief Starts the TIM Output Compare signal generation in DMA mode + 860:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** * on the complementary output. + 861:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** * @param htim TIM Output Compare handle + 862:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** * @param Channel TIM Channel to be enabled + 863:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** * This parameter can be one of the following values: + 864:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** * @arg TIM_CHANNEL_1: TIM Channel 1 selected + 865:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** * @arg TIM_CHANNEL_2: TIM Channel 2 selected + 866:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** * @arg TIM_CHANNEL_3: TIM Channel 3 selected + 867:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** * @param pData The source Buffer address. + 868:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** * @param Length The length of data to be transferred from memory to TIM peripheral + 869:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** * @retval HAL status + 870:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** */ + 871:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** HAL_StatusTypeDef HAL_TIMEx_OCN_Start_DMA(TIM_HandleTypeDef *htim, uint32_t Channel, const uint32_t + 872:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** uint16_t Length) + 873:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** { + 874:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** HAL_StatusTypeDef status = HAL_OK; + 875:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** uint32_t tmpsmcr; + 876:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** + 877:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** /* Check the parameters */ + 878:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** assert_param(IS_TIM_CCXN_INSTANCE(htim->Instance, Channel)); + 879:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** + 880:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** /* Set the TIM complementary channel state */ + 881:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** if (TIM_CHANNEL_N_STATE_GET(htim, Channel) == HAL_TIM_CHANNEL_STATE_BUSY) + 882:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** { + 883:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** return HAL_BUSY; + 884:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** } + 885:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** else if (TIM_CHANNEL_N_STATE_GET(htim, Channel) == HAL_TIM_CHANNEL_STATE_READY) + 886:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** { + 887:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** if ((pData == NULL) || (Length == 0U)) + ARM GAS /tmp/ccUWVJFr.s page 17 + + + 888:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** { + 889:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** return HAL_ERROR; + 890:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** } + 891:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** else + 892:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** { + 893:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** TIM_CHANNEL_N_STATE_SET(htim, Channel, HAL_TIM_CHANNEL_STATE_BUSY); + 894:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** } + 895:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** } + 896:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** else + 897:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** { + 898:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** return HAL_ERROR; + 899:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** } + 900:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** + 901:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** switch (Channel) + 902:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** { + 903:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** case TIM_CHANNEL_1: + 904:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** { + 905:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** /* Set the DMA compare callbacks */ + 906:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** htim->hdma[TIM_DMA_ID_CC1]->XferCpltCallback = TIM_DMADelayPulseNCplt; + 907:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** htim->hdma[TIM_DMA_ID_CC1]->XferHalfCpltCallback = TIM_DMADelayPulseHalfCplt; + 908:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** + 909:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** /* Set the DMA error callback */ + 910:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** htim->hdma[TIM_DMA_ID_CC1]->XferErrorCallback = TIM_DMAErrorCCxN ; + 911:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** + 912:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** /* Enable the DMA channel */ + 913:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** if (HAL_DMA_Start_IT(htim->hdma[TIM_DMA_ID_CC1], (uint32_t)pData, (uint32_t)&htim->Instance-> + 914:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** Length) != HAL_OK) + 915:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** { + 916:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** /* Return error status */ + 917:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** return HAL_ERROR; + 918:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** } + 919:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** /* Enable the TIM Output Compare DMA request */ + 920:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** __HAL_TIM_ENABLE_DMA(htim, TIM_DMA_CC1); + 921:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** break; + 922:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** } + 923:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** + 924:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** case TIM_CHANNEL_2: + 925:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** { + 926:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** /* Set the DMA compare callbacks */ + 927:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** htim->hdma[TIM_DMA_ID_CC2]->XferCpltCallback = TIM_DMADelayPulseNCplt; + 928:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** htim->hdma[TIM_DMA_ID_CC2]->XferHalfCpltCallback = TIM_DMADelayPulseHalfCplt; + 929:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** + 930:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** /* Set the DMA error callback */ + 931:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** htim->hdma[TIM_DMA_ID_CC2]->XferErrorCallback = TIM_DMAErrorCCxN ; + 932:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** + 933:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** /* Enable the DMA channel */ + 934:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** if (HAL_DMA_Start_IT(htim->hdma[TIM_DMA_ID_CC2], (uint32_t)pData, (uint32_t)&htim->Instance-> + 935:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** Length) != HAL_OK) + 936:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** { + 937:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** /* Return error status */ + 938:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** return HAL_ERROR; + 939:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** } + 940:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** /* Enable the TIM Output Compare DMA request */ + 941:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** __HAL_TIM_ENABLE_DMA(htim, TIM_DMA_CC2); + 942:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** break; + 943:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** } + 944:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** + ARM GAS /tmp/ccUWVJFr.s page 18 + + + 945:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** case TIM_CHANNEL_3: + 946:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** { + 947:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** /* Set the DMA compare callbacks */ + 948:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** htim->hdma[TIM_DMA_ID_CC3]->XferCpltCallback = TIM_DMADelayPulseNCplt; + 949:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** htim->hdma[TIM_DMA_ID_CC3]->XferHalfCpltCallback = TIM_DMADelayPulseHalfCplt; + 950:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** + 951:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** /* Set the DMA error callback */ + 952:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** htim->hdma[TIM_DMA_ID_CC3]->XferErrorCallback = TIM_DMAErrorCCxN ; + 953:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** + 954:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** /* Enable the DMA channel */ + 955:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** if (HAL_DMA_Start_IT(htim->hdma[TIM_DMA_ID_CC3], (uint32_t)pData, (uint32_t)&htim->Instance-> + 956:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** Length) != HAL_OK) + 957:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** { + 958:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** /* Return error status */ + 959:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** return HAL_ERROR; + 960:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** } + 961:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** /* Enable the TIM Output Compare DMA request */ + 962:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** __HAL_TIM_ENABLE_DMA(htim, TIM_DMA_CC3); + 963:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** break; + 964:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** } + 965:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** + 966:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** default: + 967:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** status = HAL_ERROR; + 968:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** break; + 969:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** } + 970:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** + 971:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** if (status == HAL_OK) + 972:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** { + 973:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** /* Enable the Capture compare channel N */ + 974:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** TIM_CCxNChannelCmd(htim->Instance, Channel, TIM_CCxN_ENABLE); + 975:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** + 976:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** /* Enable the Main Output */ + 977:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** __HAL_TIM_MOE_ENABLE(htim); + 978:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** + 979:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** /* Enable the Peripheral, except in trigger mode where enable is automatically done with trigge + 980:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** if (IS_TIM_SLAVE_INSTANCE(htim->Instance)) + 981:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** { + 982:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** tmpsmcr = htim->Instance->SMCR & TIM_SMCR_SMS; + 983:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** if (!IS_TIM_SLAVEMODE_TRIGGER_ENABLED(tmpsmcr)) + 984:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** { + 985:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** __HAL_TIM_ENABLE(htim); + 986:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** } + 987:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** } + 988:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** else + 989:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** { + 990:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** __HAL_TIM_ENABLE(htim); + 991:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** } + 992:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** } + 993:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** + 994:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** /* Return function status */ + 995:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** return status; + 996:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** } + 997:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** + 998:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** /** + 999:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** * @brief Stops the TIM Output Compare signal generation in DMA mode +1000:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** * on the complementary output. +1001:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** * @param htim TIM Output Compare handle + ARM GAS /tmp/ccUWVJFr.s page 19 + + +1002:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** * @param Channel TIM Channel to be disabled +1003:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** * This parameter can be one of the following values: +1004:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** * @arg TIM_CHANNEL_1: TIM Channel 1 selected +1005:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** * @arg TIM_CHANNEL_2: TIM Channel 2 selected +1006:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** * @arg TIM_CHANNEL_3: TIM Channel 3 selected +1007:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** * @retval HAL status +1008:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** */ +1009:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** HAL_StatusTypeDef HAL_TIMEx_OCN_Stop_DMA(TIM_HandleTypeDef *htim, uint32_t Channel) +1010:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** { +1011:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** HAL_StatusTypeDef status = HAL_OK; +1012:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** +1013:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** /* Check the parameters */ +1014:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** assert_param(IS_TIM_CCXN_INSTANCE(htim->Instance, Channel)); +1015:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** +1016:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** switch (Channel) +1017:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** { +1018:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** case TIM_CHANNEL_1: +1019:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** { +1020:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** /* Disable the TIM Output Compare DMA request */ +1021:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** __HAL_TIM_DISABLE_DMA(htim, TIM_DMA_CC1); +1022:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** (void)HAL_DMA_Abort_IT(htim->hdma[TIM_DMA_ID_CC1]); +1023:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** break; +1024:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** } +1025:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** +1026:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** case TIM_CHANNEL_2: +1027:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** { +1028:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** /* Disable the TIM Output Compare DMA request */ +1029:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** __HAL_TIM_DISABLE_DMA(htim, TIM_DMA_CC2); +1030:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** (void)HAL_DMA_Abort_IT(htim->hdma[TIM_DMA_ID_CC2]); +1031:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** break; +1032:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** } +1033:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** +1034:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** case TIM_CHANNEL_3: +1035:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** { +1036:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** /* Disable the TIM Output Compare DMA request */ +1037:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** __HAL_TIM_DISABLE_DMA(htim, TIM_DMA_CC3); +1038:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** (void)HAL_DMA_Abort_IT(htim->hdma[TIM_DMA_ID_CC3]); +1039:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** break; +1040:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** } +1041:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** +1042:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** default: +1043:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** status = HAL_ERROR; +1044:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** break; +1045:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** } +1046:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** +1047:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** if (status == HAL_OK) +1048:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** { +1049:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** /* Disable the Capture compare channel N */ +1050:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** TIM_CCxNChannelCmd(htim->Instance, Channel, TIM_CCxN_DISABLE); +1051:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** +1052:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** /* Disable the Main Output */ +1053:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** __HAL_TIM_MOE_DISABLE(htim); +1054:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** +1055:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** /* Disable the Peripheral */ +1056:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** __HAL_TIM_DISABLE(htim); +1057:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** +1058:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** /* Set the TIM complementary channel state */ + ARM GAS /tmp/ccUWVJFr.s page 20 + + +1059:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** TIM_CHANNEL_N_STATE_SET(htim, Channel, HAL_TIM_CHANNEL_STATE_READY); +1060:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** } +1061:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** +1062:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** /* Return function status */ +1063:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** return status; +1064:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** } +1065:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** +1066:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** /** +1067:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** * @} +1068:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** */ +1069:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** +1070:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** /** @defgroup TIMEx_Exported_Functions_Group3 Extended Timer Complementary PWM functions +1071:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** * @brief Timer Complementary PWM functions +1072:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** * +1073:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** @verbatim +1074:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** ============================================================================== +1075:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** ##### Timer Complementary PWM functions ##### +1076:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** ============================================================================== +1077:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** [..] +1078:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** This section provides functions allowing to: +1079:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** (+) Start the Complementary PWM. +1080:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** (+) Stop the Complementary PWM. +1081:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** (+) Start the Complementary PWM and enable interrupts. +1082:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** (+) Stop the Complementary PWM and disable interrupts. +1083:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** (+) Start the Complementary PWM and enable DMA transfers. +1084:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** (+) Stop the Complementary PWM and disable DMA transfers. +1085:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** (+) Start the Complementary Input Capture measurement. +1086:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** (+) Stop the Complementary Input Capture. +1087:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** (+) Start the Complementary Input Capture and enable interrupts. +1088:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** (+) Stop the Complementary Input Capture and disable interrupts. +1089:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** (+) Start the Complementary Input Capture and enable DMA transfers. +1090:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** (+) Stop the Complementary Input Capture and disable DMA transfers. +1091:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** (+) Start the Complementary One Pulse generation. +1092:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** (+) Stop the Complementary One Pulse. +1093:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** (+) Start the Complementary One Pulse and enable interrupts. +1094:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** (+) Stop the Complementary One Pulse and disable interrupts. +1095:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** +1096:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** @endverbatim +1097:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** * @{ +1098:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** */ +1099:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** +1100:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** /** +1101:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** * @brief Starts the PWM signal generation on the complementary output. +1102:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** * @param htim TIM handle +1103:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** * @param Channel TIM Channel to be enabled +1104:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** * This parameter can be one of the following values: +1105:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** * @arg TIM_CHANNEL_1: TIM Channel 1 selected +1106:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** * @arg TIM_CHANNEL_2: TIM Channel 2 selected +1107:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** * @arg TIM_CHANNEL_3: TIM Channel 3 selected +1108:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** * @retval HAL status +1109:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** */ +1110:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** HAL_StatusTypeDef HAL_TIMEx_PWMN_Start(TIM_HandleTypeDef *htim, uint32_t Channel) +1111:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** { +1112:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** uint32_t tmpsmcr; +1113:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** +1114:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** /* Check the parameters */ +1115:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** assert_param(IS_TIM_CCXN_INSTANCE(htim->Instance, Channel)); + ARM GAS /tmp/ccUWVJFr.s page 21 + + +1116:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** +1117:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** /* Check the TIM complementary channel state */ +1118:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** if (TIM_CHANNEL_N_STATE_GET(htim, Channel) != HAL_TIM_CHANNEL_STATE_READY) +1119:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** { +1120:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** return HAL_ERROR; +1121:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** } +1122:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** +1123:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** /* Set the TIM complementary channel state */ +1124:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** TIM_CHANNEL_N_STATE_SET(htim, Channel, HAL_TIM_CHANNEL_STATE_BUSY); +1125:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** +1126:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** /* Enable the complementary PWM output */ +1127:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** TIM_CCxNChannelCmd(htim->Instance, Channel, TIM_CCxN_ENABLE); +1128:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** +1129:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** /* Enable the Main Output */ +1130:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** __HAL_TIM_MOE_ENABLE(htim); +1131:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** +1132:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** /* Enable the Peripheral, except in trigger mode where enable is automatically done with trigger +1133:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** if (IS_TIM_SLAVE_INSTANCE(htim->Instance)) +1134:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** { +1135:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** tmpsmcr = htim->Instance->SMCR & TIM_SMCR_SMS; +1136:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** if (!IS_TIM_SLAVEMODE_TRIGGER_ENABLED(tmpsmcr)) +1137:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** { +1138:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** __HAL_TIM_ENABLE(htim); +1139:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** } +1140:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** } +1141:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** else +1142:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** { +1143:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** __HAL_TIM_ENABLE(htim); +1144:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** } +1145:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** +1146:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** /* Return function status */ +1147:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** return HAL_OK; +1148:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** } +1149:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** +1150:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** /** +1151:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** * @brief Stops the PWM signal generation on the complementary output. +1152:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** * @param htim TIM handle +1153:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** * @param Channel TIM Channel to be disabled +1154:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** * This parameter can be one of the following values: +1155:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** * @arg TIM_CHANNEL_1: TIM Channel 1 selected +1156:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** * @arg TIM_CHANNEL_2: TIM Channel 2 selected +1157:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** * @arg TIM_CHANNEL_3: TIM Channel 3 selected +1158:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** * @retval HAL status +1159:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** */ +1160:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** HAL_StatusTypeDef HAL_TIMEx_PWMN_Stop(TIM_HandleTypeDef *htim, uint32_t Channel) +1161:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** { +1162:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** /* Check the parameters */ +1163:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** assert_param(IS_TIM_CCXN_INSTANCE(htim->Instance, Channel)); +1164:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** +1165:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** /* Disable the complementary PWM output */ +1166:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** TIM_CCxNChannelCmd(htim->Instance, Channel, TIM_CCxN_DISABLE); +1167:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** +1168:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** /* Disable the Main Output */ +1169:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** __HAL_TIM_MOE_DISABLE(htim); +1170:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** +1171:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** /* Disable the Peripheral */ +1172:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** __HAL_TIM_DISABLE(htim); + ARM GAS /tmp/ccUWVJFr.s page 22 + + +1173:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** +1174:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** /* Set the TIM complementary channel state */ +1175:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** TIM_CHANNEL_N_STATE_SET(htim, Channel, HAL_TIM_CHANNEL_STATE_READY); +1176:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** +1177:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** /* Return function status */ +1178:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** return HAL_OK; +1179:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** } +1180:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** +1181:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** /** +1182:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** * @brief Starts the PWM signal generation in interrupt mode on the +1183:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** * complementary output. +1184:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** * @param htim TIM handle +1185:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** * @param Channel TIM Channel to be disabled +1186:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** * This parameter can be one of the following values: +1187:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** * @arg TIM_CHANNEL_1: TIM Channel 1 selected +1188:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** * @arg TIM_CHANNEL_2: TIM Channel 2 selected +1189:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** * @arg TIM_CHANNEL_3: TIM Channel 3 selected +1190:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** * @retval HAL status +1191:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** */ +1192:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** HAL_StatusTypeDef HAL_TIMEx_PWMN_Start_IT(TIM_HandleTypeDef *htim, uint32_t Channel) +1193:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** { +1194:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** HAL_StatusTypeDef status = HAL_OK; +1195:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** uint32_t tmpsmcr; +1196:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** +1197:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** /* Check the parameters */ +1198:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** assert_param(IS_TIM_CCXN_INSTANCE(htim->Instance, Channel)); +1199:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** +1200:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** /* Check the TIM complementary channel state */ +1201:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** if (TIM_CHANNEL_N_STATE_GET(htim, Channel) != HAL_TIM_CHANNEL_STATE_READY) +1202:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** { +1203:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** return HAL_ERROR; +1204:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** } +1205:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** +1206:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** /* Set the TIM complementary channel state */ +1207:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** TIM_CHANNEL_N_STATE_SET(htim, Channel, HAL_TIM_CHANNEL_STATE_BUSY); +1208:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** +1209:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** switch (Channel) +1210:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** { +1211:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** case TIM_CHANNEL_1: +1212:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** { +1213:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** /* Enable the TIM Capture/Compare 1 interrupt */ +1214:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** __HAL_TIM_ENABLE_IT(htim, TIM_IT_CC1); +1215:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** break; +1216:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** } +1217:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** +1218:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** case TIM_CHANNEL_2: +1219:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** { +1220:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** /* Enable the TIM Capture/Compare 2 interrupt */ +1221:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** __HAL_TIM_ENABLE_IT(htim, TIM_IT_CC2); +1222:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** break; +1223:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** } +1224:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** +1225:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** case TIM_CHANNEL_3: +1226:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** { +1227:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** /* Enable the TIM Capture/Compare 3 interrupt */ +1228:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** __HAL_TIM_ENABLE_IT(htim, TIM_IT_CC3); +1229:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** break; + ARM GAS /tmp/ccUWVJFr.s page 23 + + +1230:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** } +1231:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** +1232:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** default: +1233:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** status = HAL_ERROR; +1234:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** break; +1235:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** } +1236:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** +1237:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** if (status == HAL_OK) +1238:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** { +1239:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** /* Enable the TIM Break interrupt */ +1240:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** __HAL_TIM_ENABLE_IT(htim, TIM_IT_BREAK); +1241:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** +1242:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** /* Enable the complementary PWM output */ +1243:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** TIM_CCxNChannelCmd(htim->Instance, Channel, TIM_CCxN_ENABLE); +1244:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** +1245:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** /* Enable the Main Output */ +1246:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** __HAL_TIM_MOE_ENABLE(htim); +1247:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** +1248:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** /* Enable the Peripheral, except in trigger mode where enable is automatically done with trigge +1249:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** if (IS_TIM_SLAVE_INSTANCE(htim->Instance)) +1250:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** { +1251:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** tmpsmcr = htim->Instance->SMCR & TIM_SMCR_SMS; +1252:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** if (!IS_TIM_SLAVEMODE_TRIGGER_ENABLED(tmpsmcr)) +1253:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** { +1254:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** __HAL_TIM_ENABLE(htim); +1255:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** } +1256:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** } +1257:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** else +1258:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** { +1259:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** __HAL_TIM_ENABLE(htim); +1260:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** } +1261:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** } +1262:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** +1263:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** /* Return function status */ +1264:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** return status; +1265:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** } +1266:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** +1267:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** /** +1268:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** * @brief Stops the PWM signal generation in interrupt mode on the +1269:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** * complementary output. +1270:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** * @param htim TIM handle +1271:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** * @param Channel TIM Channel to be disabled +1272:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** * This parameter can be one of the following values: +1273:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** * @arg TIM_CHANNEL_1: TIM Channel 1 selected +1274:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** * @arg TIM_CHANNEL_2: TIM Channel 2 selected +1275:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** * @arg TIM_CHANNEL_3: TIM Channel 3 selected +1276:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** * @retval HAL status +1277:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** */ +1278:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** HAL_StatusTypeDef HAL_TIMEx_PWMN_Stop_IT(TIM_HandleTypeDef *htim, uint32_t Channel) +1279:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** { +1280:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** HAL_StatusTypeDef status = HAL_OK; +1281:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** uint32_t tmpccer; +1282:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** +1283:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** /* Check the parameters */ +1284:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** assert_param(IS_TIM_CCXN_INSTANCE(htim->Instance, Channel)); +1285:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** +1286:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** switch (Channel) + ARM GAS /tmp/ccUWVJFr.s page 24 + + +1287:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** { +1288:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** case TIM_CHANNEL_1: +1289:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** { +1290:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** /* Disable the TIM Capture/Compare 1 interrupt */ +1291:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** __HAL_TIM_DISABLE_IT(htim, TIM_IT_CC1); +1292:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** break; +1293:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** } +1294:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** +1295:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** case TIM_CHANNEL_2: +1296:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** { +1297:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** /* Disable the TIM Capture/Compare 2 interrupt */ +1298:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** __HAL_TIM_DISABLE_IT(htim, TIM_IT_CC2); +1299:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** break; +1300:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** } +1301:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** +1302:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** case TIM_CHANNEL_3: +1303:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** { +1304:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** /* Disable the TIM Capture/Compare 3 interrupt */ +1305:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** __HAL_TIM_DISABLE_IT(htim, TIM_IT_CC3); +1306:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** break; +1307:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** } +1308:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** +1309:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** default: +1310:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** status = HAL_ERROR; +1311:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** break; +1312:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** } +1313:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** +1314:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** if (status == HAL_OK) +1315:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** { +1316:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** /* Disable the complementary PWM output */ +1317:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** TIM_CCxNChannelCmd(htim->Instance, Channel, TIM_CCxN_DISABLE); +1318:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** +1319:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** /* Disable the TIM Break interrupt (only if no more channel is active) */ +1320:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** tmpccer = htim->Instance->CCER; +1321:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** if ((tmpccer & (TIM_CCER_CC1NE | TIM_CCER_CC2NE | TIM_CCER_CC3NE)) == (uint32_t)RESET) +1322:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** { +1323:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** __HAL_TIM_DISABLE_IT(htim, TIM_IT_BREAK); +1324:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** } +1325:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** +1326:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** /* Disable the Main Output */ +1327:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** __HAL_TIM_MOE_DISABLE(htim); +1328:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** +1329:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** /* Disable the Peripheral */ +1330:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** __HAL_TIM_DISABLE(htim); +1331:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** +1332:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** /* Set the TIM complementary channel state */ +1333:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** TIM_CHANNEL_N_STATE_SET(htim, Channel, HAL_TIM_CHANNEL_STATE_READY); +1334:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** } +1335:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** +1336:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** /* Return function status */ +1337:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** return status; +1338:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** } +1339:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** +1340:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** /** +1341:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** * @brief Starts the TIM PWM signal generation in DMA mode on the +1342:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** * complementary output +1343:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** * @param htim TIM handle + ARM GAS /tmp/ccUWVJFr.s page 25 + + +1344:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** * @param Channel TIM Channel to be enabled +1345:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** * This parameter can be one of the following values: +1346:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** * @arg TIM_CHANNEL_1: TIM Channel 1 selected +1347:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** * @arg TIM_CHANNEL_2: TIM Channel 2 selected +1348:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** * @arg TIM_CHANNEL_3: TIM Channel 3 selected +1349:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** * @param pData The source Buffer address. +1350:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** * @param Length The length of data to be transferred from memory to TIM peripheral +1351:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** * @retval HAL status +1352:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** */ +1353:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** HAL_StatusTypeDef HAL_TIMEx_PWMN_Start_DMA(TIM_HandleTypeDef *htim, uint32_t Channel, const uint32_ +1354:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** uint16_t Length) +1355:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** { +1356:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** HAL_StatusTypeDef status = HAL_OK; +1357:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** uint32_t tmpsmcr; +1358:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** +1359:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** /* Check the parameters */ +1360:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** assert_param(IS_TIM_CCXN_INSTANCE(htim->Instance, Channel)); +1361:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** +1362:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** /* Set the TIM complementary channel state */ +1363:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** if (TIM_CHANNEL_N_STATE_GET(htim, Channel) == HAL_TIM_CHANNEL_STATE_BUSY) +1364:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** { +1365:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** return HAL_BUSY; +1366:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** } +1367:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** else if (TIM_CHANNEL_N_STATE_GET(htim, Channel) == HAL_TIM_CHANNEL_STATE_READY) +1368:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** { +1369:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** if ((pData == NULL) || (Length == 0U)) +1370:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** { +1371:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** return HAL_ERROR; +1372:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** } +1373:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** else +1374:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** { +1375:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** TIM_CHANNEL_N_STATE_SET(htim, Channel, HAL_TIM_CHANNEL_STATE_BUSY); +1376:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** } +1377:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** } +1378:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** else +1379:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** { +1380:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** return HAL_ERROR; +1381:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** } +1382:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** +1383:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** switch (Channel) +1384:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** { +1385:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** case TIM_CHANNEL_1: +1386:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** { +1387:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** /* Set the DMA compare callbacks */ +1388:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** htim->hdma[TIM_DMA_ID_CC1]->XferCpltCallback = TIM_DMADelayPulseNCplt; +1389:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** htim->hdma[TIM_DMA_ID_CC1]->XferHalfCpltCallback = TIM_DMADelayPulseHalfCplt; +1390:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** +1391:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** /* Set the DMA error callback */ +1392:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** htim->hdma[TIM_DMA_ID_CC1]->XferErrorCallback = TIM_DMAErrorCCxN ; +1393:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** +1394:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** /* Enable the DMA channel */ +1395:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** if (HAL_DMA_Start_IT(htim->hdma[TIM_DMA_ID_CC1], (uint32_t)pData, (uint32_t)&htim->Instance-> +1396:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** Length) != HAL_OK) +1397:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** { +1398:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** /* Return error status */ +1399:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** return HAL_ERROR; +1400:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** } + ARM GAS /tmp/ccUWVJFr.s page 26 + + +1401:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** /* Enable the TIM Capture/Compare 1 DMA request */ +1402:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** __HAL_TIM_ENABLE_DMA(htim, TIM_DMA_CC1); +1403:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** break; +1404:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** } +1405:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** +1406:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** case TIM_CHANNEL_2: +1407:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** { +1408:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** /* Set the DMA compare callbacks */ +1409:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** htim->hdma[TIM_DMA_ID_CC2]->XferCpltCallback = TIM_DMADelayPulseNCplt; +1410:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** htim->hdma[TIM_DMA_ID_CC2]->XferHalfCpltCallback = TIM_DMADelayPulseHalfCplt; +1411:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** +1412:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** /* Set the DMA error callback */ +1413:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** htim->hdma[TIM_DMA_ID_CC2]->XferErrorCallback = TIM_DMAErrorCCxN ; +1414:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** +1415:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** /* Enable the DMA channel */ +1416:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** if (HAL_DMA_Start_IT(htim->hdma[TIM_DMA_ID_CC2], (uint32_t)pData, (uint32_t)&htim->Instance-> +1417:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** Length) != HAL_OK) +1418:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** { +1419:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** /* Return error status */ +1420:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** return HAL_ERROR; +1421:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** } +1422:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** /* Enable the TIM Capture/Compare 2 DMA request */ +1423:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** __HAL_TIM_ENABLE_DMA(htim, TIM_DMA_CC2); +1424:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** break; +1425:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** } +1426:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** +1427:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** case TIM_CHANNEL_3: +1428:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** { +1429:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** /* Set the DMA compare callbacks */ +1430:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** htim->hdma[TIM_DMA_ID_CC3]->XferCpltCallback = TIM_DMADelayPulseNCplt; +1431:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** htim->hdma[TIM_DMA_ID_CC3]->XferHalfCpltCallback = TIM_DMADelayPulseHalfCplt; +1432:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** +1433:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** /* Set the DMA error callback */ +1434:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** htim->hdma[TIM_DMA_ID_CC3]->XferErrorCallback = TIM_DMAErrorCCxN ; +1435:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** +1436:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** /* Enable the DMA channel */ +1437:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** if (HAL_DMA_Start_IT(htim->hdma[TIM_DMA_ID_CC3], (uint32_t)pData, (uint32_t)&htim->Instance-> +1438:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** Length) != HAL_OK) +1439:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** { +1440:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** /* Return error status */ +1441:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** return HAL_ERROR; +1442:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** } +1443:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** /* Enable the TIM Capture/Compare 3 DMA request */ +1444:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** __HAL_TIM_ENABLE_DMA(htim, TIM_DMA_CC3); +1445:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** break; +1446:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** } +1447:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** +1448:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** default: +1449:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** status = HAL_ERROR; +1450:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** break; +1451:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** } +1452:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** +1453:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** if (status == HAL_OK) +1454:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** { +1455:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** /* Enable the complementary PWM output */ +1456:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** TIM_CCxNChannelCmd(htim->Instance, Channel, TIM_CCxN_ENABLE); +1457:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** + ARM GAS /tmp/ccUWVJFr.s page 27 + + +1458:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** /* Enable the Main Output */ +1459:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** __HAL_TIM_MOE_ENABLE(htim); +1460:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** +1461:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** /* Enable the Peripheral, except in trigger mode where enable is automatically done with trigge +1462:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** if (IS_TIM_SLAVE_INSTANCE(htim->Instance)) +1463:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** { +1464:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** tmpsmcr = htim->Instance->SMCR & TIM_SMCR_SMS; +1465:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** if (!IS_TIM_SLAVEMODE_TRIGGER_ENABLED(tmpsmcr)) +1466:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** { +1467:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** __HAL_TIM_ENABLE(htim); +1468:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** } +1469:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** } +1470:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** else +1471:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** { +1472:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** __HAL_TIM_ENABLE(htim); +1473:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** } +1474:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** } +1475:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** +1476:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** /* Return function status */ +1477:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** return status; +1478:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** } +1479:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** +1480:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** /** +1481:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** * @brief Stops the TIM PWM signal generation in DMA mode on the complementary +1482:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** * output +1483:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** * @param htim TIM handle +1484:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** * @param Channel TIM Channel to be disabled +1485:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** * This parameter can be one of the following values: +1486:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** * @arg TIM_CHANNEL_1: TIM Channel 1 selected +1487:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** * @arg TIM_CHANNEL_2: TIM Channel 2 selected +1488:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** * @arg TIM_CHANNEL_3: TIM Channel 3 selected +1489:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** * @retval HAL status +1490:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** */ +1491:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** HAL_StatusTypeDef HAL_TIMEx_PWMN_Stop_DMA(TIM_HandleTypeDef *htim, uint32_t Channel) +1492:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** { +1493:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** HAL_StatusTypeDef status = HAL_OK; +1494:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** +1495:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** /* Check the parameters */ +1496:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** assert_param(IS_TIM_CCXN_INSTANCE(htim->Instance, Channel)); +1497:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** +1498:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** switch (Channel) +1499:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** { +1500:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** case TIM_CHANNEL_1: +1501:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** { +1502:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** /* Disable the TIM Capture/Compare 1 DMA request */ +1503:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** __HAL_TIM_DISABLE_DMA(htim, TIM_DMA_CC1); +1504:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** (void)HAL_DMA_Abort_IT(htim->hdma[TIM_DMA_ID_CC1]); +1505:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** break; +1506:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** } +1507:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** +1508:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** case TIM_CHANNEL_2: +1509:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** { +1510:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** /* Disable the TIM Capture/Compare 2 DMA request */ +1511:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** __HAL_TIM_DISABLE_DMA(htim, TIM_DMA_CC2); +1512:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** (void)HAL_DMA_Abort_IT(htim->hdma[TIM_DMA_ID_CC2]); +1513:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** break; +1514:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** } + ARM GAS /tmp/ccUWVJFr.s page 28 + + +1515:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** +1516:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** case TIM_CHANNEL_3: +1517:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** { +1518:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** /* Disable the TIM Capture/Compare 3 DMA request */ +1519:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** __HAL_TIM_DISABLE_DMA(htim, TIM_DMA_CC3); +1520:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** (void)HAL_DMA_Abort_IT(htim->hdma[TIM_DMA_ID_CC3]); +1521:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** break; +1522:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** } +1523:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** +1524:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** default: +1525:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** status = HAL_ERROR; +1526:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** break; +1527:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** } +1528:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** +1529:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** if (status == HAL_OK) +1530:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** { +1531:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** /* Disable the complementary PWM output */ +1532:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** TIM_CCxNChannelCmd(htim->Instance, Channel, TIM_CCxN_DISABLE); +1533:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** +1534:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** /* Disable the Main Output */ +1535:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** __HAL_TIM_MOE_DISABLE(htim); +1536:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** +1537:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** /* Disable the Peripheral */ +1538:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** __HAL_TIM_DISABLE(htim); +1539:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** +1540:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** /* Set the TIM complementary channel state */ +1541:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** TIM_CHANNEL_N_STATE_SET(htim, Channel, HAL_TIM_CHANNEL_STATE_READY); +1542:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** } +1543:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** +1544:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** /* Return function status */ +1545:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** return status; +1546:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** } +1547:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** +1548:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** /** +1549:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** * @} +1550:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** */ +1551:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** +1552:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** /** @defgroup TIMEx_Exported_Functions_Group4 Extended Timer Complementary One Pulse functions +1553:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** * @brief Timer Complementary One Pulse functions +1554:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** * +1555:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** @verbatim +1556:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** ============================================================================== +1557:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** ##### Timer Complementary One Pulse functions ##### +1558:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** ============================================================================== +1559:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** [..] +1560:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** This section provides functions allowing to: +1561:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** (+) Start the Complementary One Pulse generation. +1562:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** (+) Stop the Complementary One Pulse. +1563:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** (+) Start the Complementary One Pulse and enable interrupts. +1564:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** (+) Stop the Complementary One Pulse and disable interrupts. +1565:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** +1566:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** @endverbatim +1567:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** * @{ +1568:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** */ +1569:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** +1570:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** /** +1571:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** * @brief Starts the TIM One Pulse signal generation on the complementary + ARM GAS /tmp/ccUWVJFr.s page 29 + + +1572:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** * output. +1573:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** * @note OutputChannel must match the pulse output channel chosen when calling +1574:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** * @ref HAL_TIM_OnePulse_ConfigChannel(). +1575:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** * @param htim TIM One Pulse handle +1576:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** * @param OutputChannel pulse output channel to enable +1577:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** * This parameter can be one of the following values: +1578:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** * @arg TIM_CHANNEL_1: TIM Channel 1 selected +1579:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** * @arg TIM_CHANNEL_2: TIM Channel 2 selected +1580:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** * @retval HAL status +1581:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** */ +1582:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** HAL_StatusTypeDef HAL_TIMEx_OnePulseN_Start(TIM_HandleTypeDef *htim, uint32_t OutputChannel) +1583:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** { +1584:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** uint32_t input_channel = (OutputChannel == TIM_CHANNEL_1) ? TIM_CHANNEL_2 : TIM_CHANNEL_1; +1585:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** HAL_TIM_ChannelStateTypeDef channel_1_state = TIM_CHANNEL_STATE_GET(htim, TIM_CHANNEL_1); +1586:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** HAL_TIM_ChannelStateTypeDef channel_2_state = TIM_CHANNEL_STATE_GET(htim, TIM_CHANNEL_2); +1587:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** HAL_TIM_ChannelStateTypeDef complementary_channel_1_state = TIM_CHANNEL_N_STATE_GET(htim, TIM_CHA +1588:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** HAL_TIM_ChannelStateTypeDef complementary_channel_2_state = TIM_CHANNEL_N_STATE_GET(htim, TIM_CHA +1589:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** +1590:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** /* Check the parameters */ +1591:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** assert_param(IS_TIM_CCXN_INSTANCE(htim->Instance, OutputChannel)); +1592:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** +1593:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** /* Check the TIM channels state */ +1594:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** if ((channel_1_state != HAL_TIM_CHANNEL_STATE_READY) +1595:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** || (channel_2_state != HAL_TIM_CHANNEL_STATE_READY) +1596:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** || (complementary_channel_1_state != HAL_TIM_CHANNEL_STATE_READY) +1597:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** || (complementary_channel_2_state != HAL_TIM_CHANNEL_STATE_READY)) +1598:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** { +1599:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** return HAL_ERROR; +1600:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** } +1601:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** +1602:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** /* Set the TIM channels state */ +1603:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** TIM_CHANNEL_STATE_SET(htim, TIM_CHANNEL_1, HAL_TIM_CHANNEL_STATE_BUSY); +1604:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** TIM_CHANNEL_STATE_SET(htim, TIM_CHANNEL_2, HAL_TIM_CHANNEL_STATE_BUSY); +1605:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** TIM_CHANNEL_N_STATE_SET(htim, TIM_CHANNEL_1, HAL_TIM_CHANNEL_STATE_BUSY); +1606:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** TIM_CHANNEL_N_STATE_SET(htim, TIM_CHANNEL_2, HAL_TIM_CHANNEL_STATE_BUSY); +1607:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** +1608:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** /* Enable the complementary One Pulse output channel and the Input Capture channel */ +1609:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** TIM_CCxNChannelCmd(htim->Instance, OutputChannel, TIM_CCxN_ENABLE); +1610:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** TIM_CCxChannelCmd(htim->Instance, input_channel, TIM_CCx_ENABLE); +1611:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** +1612:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** /* Enable the Main Output */ +1613:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** __HAL_TIM_MOE_ENABLE(htim); +1614:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** +1615:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** /* Return function status */ +1616:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** return HAL_OK; +1617:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** } +1618:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** +1619:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** /** +1620:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** * @brief Stops the TIM One Pulse signal generation on the complementary +1621:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** * output. +1622:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** * @note OutputChannel must match the pulse output channel chosen when calling +1623:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** * @ref HAL_TIM_OnePulse_ConfigChannel(). +1624:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** * @param htim TIM One Pulse handle +1625:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** * @param OutputChannel pulse output channel to disable +1626:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** * This parameter can be one of the following values: +1627:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** * @arg TIM_CHANNEL_1: TIM Channel 1 selected +1628:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** * @arg TIM_CHANNEL_2: TIM Channel 2 selected + ARM GAS /tmp/ccUWVJFr.s page 30 + + +1629:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** * @retval HAL status +1630:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** */ +1631:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** HAL_StatusTypeDef HAL_TIMEx_OnePulseN_Stop(TIM_HandleTypeDef *htim, uint32_t OutputChannel) +1632:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** { +1633:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** uint32_t input_channel = (OutputChannel == TIM_CHANNEL_1) ? TIM_CHANNEL_2 : TIM_CHANNEL_1; +1634:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** +1635:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** /* Check the parameters */ +1636:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** assert_param(IS_TIM_CCXN_INSTANCE(htim->Instance, OutputChannel)); +1637:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** +1638:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** /* Disable the complementary One Pulse output channel and the Input Capture channel */ +1639:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** TIM_CCxNChannelCmd(htim->Instance, OutputChannel, TIM_CCxN_DISABLE); +1640:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** TIM_CCxChannelCmd(htim->Instance, input_channel, TIM_CCx_DISABLE); +1641:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** +1642:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** /* Disable the Main Output */ +1643:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** __HAL_TIM_MOE_DISABLE(htim); +1644:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** +1645:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** /* Disable the Peripheral */ +1646:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** __HAL_TIM_DISABLE(htim); +1647:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** +1648:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** /* Set the TIM channels state */ +1649:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** TIM_CHANNEL_STATE_SET(htim, TIM_CHANNEL_1, HAL_TIM_CHANNEL_STATE_READY); +1650:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** TIM_CHANNEL_STATE_SET(htim, TIM_CHANNEL_2, HAL_TIM_CHANNEL_STATE_READY); +1651:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** TIM_CHANNEL_N_STATE_SET(htim, TIM_CHANNEL_1, HAL_TIM_CHANNEL_STATE_READY); +1652:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** TIM_CHANNEL_N_STATE_SET(htim, TIM_CHANNEL_2, HAL_TIM_CHANNEL_STATE_READY); +1653:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** +1654:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** /* Return function status */ +1655:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** return HAL_OK; +1656:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** } +1657:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** +1658:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** /** +1659:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** * @brief Starts the TIM One Pulse signal generation in interrupt mode on the +1660:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** * complementary channel. +1661:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** * @note OutputChannel must match the pulse output channel chosen when calling +1662:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** * @ref HAL_TIM_OnePulse_ConfigChannel(). +1663:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** * @param htim TIM One Pulse handle +1664:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** * @param OutputChannel pulse output channel to enable +1665:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** * This parameter can be one of the following values: +1666:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** * @arg TIM_CHANNEL_1: TIM Channel 1 selected +1667:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** * @arg TIM_CHANNEL_2: TIM Channel 2 selected +1668:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** * @retval HAL status +1669:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** */ +1670:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** HAL_StatusTypeDef HAL_TIMEx_OnePulseN_Start_IT(TIM_HandleTypeDef *htim, uint32_t OutputChannel) +1671:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** { +1672:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** uint32_t input_channel = (OutputChannel == TIM_CHANNEL_1) ? TIM_CHANNEL_2 : TIM_CHANNEL_1; +1673:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** HAL_TIM_ChannelStateTypeDef channel_1_state = TIM_CHANNEL_STATE_GET(htim, TIM_CHANNEL_1); +1674:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** HAL_TIM_ChannelStateTypeDef channel_2_state = TIM_CHANNEL_STATE_GET(htim, TIM_CHANNEL_2); +1675:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** HAL_TIM_ChannelStateTypeDef complementary_channel_1_state = TIM_CHANNEL_N_STATE_GET(htim, TIM_CHA +1676:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** HAL_TIM_ChannelStateTypeDef complementary_channel_2_state = TIM_CHANNEL_N_STATE_GET(htim, TIM_CHA +1677:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** +1678:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** /* Check the parameters */ +1679:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** assert_param(IS_TIM_CCXN_INSTANCE(htim->Instance, OutputChannel)); +1680:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** +1681:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** /* Check the TIM channels state */ +1682:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** if ((channel_1_state != HAL_TIM_CHANNEL_STATE_READY) +1683:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** || (channel_2_state != HAL_TIM_CHANNEL_STATE_READY) +1684:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** || (complementary_channel_1_state != HAL_TIM_CHANNEL_STATE_READY) +1685:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** || (complementary_channel_2_state != HAL_TIM_CHANNEL_STATE_READY)) + ARM GAS /tmp/ccUWVJFr.s page 31 + + +1686:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** { +1687:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** return HAL_ERROR; +1688:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** } +1689:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** +1690:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** /* Set the TIM channels state */ +1691:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** TIM_CHANNEL_STATE_SET(htim, TIM_CHANNEL_1, HAL_TIM_CHANNEL_STATE_BUSY); +1692:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** TIM_CHANNEL_STATE_SET(htim, TIM_CHANNEL_2, HAL_TIM_CHANNEL_STATE_BUSY); +1693:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** TIM_CHANNEL_N_STATE_SET(htim, TIM_CHANNEL_1, HAL_TIM_CHANNEL_STATE_BUSY); +1694:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** TIM_CHANNEL_N_STATE_SET(htim, TIM_CHANNEL_2, HAL_TIM_CHANNEL_STATE_BUSY); +1695:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** +1696:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** /* Enable the TIM Capture/Compare 1 interrupt */ +1697:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** __HAL_TIM_ENABLE_IT(htim, TIM_IT_CC1); +1698:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** +1699:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** /* Enable the TIM Capture/Compare 2 interrupt */ +1700:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** __HAL_TIM_ENABLE_IT(htim, TIM_IT_CC2); +1701:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** +1702:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** /* Enable the complementary One Pulse output channel and the Input Capture channel */ +1703:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** TIM_CCxNChannelCmd(htim->Instance, OutputChannel, TIM_CCxN_ENABLE); +1704:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** TIM_CCxChannelCmd(htim->Instance, input_channel, TIM_CCx_ENABLE); +1705:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** +1706:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** /* Enable the Main Output */ +1707:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** __HAL_TIM_MOE_ENABLE(htim); +1708:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** +1709:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** /* Return function status */ +1710:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** return HAL_OK; +1711:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** } +1712:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** +1713:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** /** +1714:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** * @brief Stops the TIM One Pulse signal generation in interrupt mode on the +1715:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** * complementary channel. +1716:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** * @note OutputChannel must match the pulse output channel chosen when calling +1717:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** * @ref HAL_TIM_OnePulse_ConfigChannel(). +1718:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** * @param htim TIM One Pulse handle +1719:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** * @param OutputChannel pulse output channel to disable +1720:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** * This parameter can be one of the following values: +1721:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** * @arg TIM_CHANNEL_1: TIM Channel 1 selected +1722:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** * @arg TIM_CHANNEL_2: TIM Channel 2 selected +1723:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** * @retval HAL status +1724:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** */ +1725:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** HAL_StatusTypeDef HAL_TIMEx_OnePulseN_Stop_IT(TIM_HandleTypeDef *htim, uint32_t OutputChannel) +1726:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** { +1727:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** uint32_t input_channel = (OutputChannel == TIM_CHANNEL_1) ? TIM_CHANNEL_2 : TIM_CHANNEL_1; +1728:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** +1729:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** /* Check the parameters */ +1730:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** assert_param(IS_TIM_CCXN_INSTANCE(htim->Instance, OutputChannel)); +1731:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** +1732:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** /* Disable the TIM Capture/Compare 1 interrupt */ +1733:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** __HAL_TIM_DISABLE_IT(htim, TIM_IT_CC1); +1734:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** +1735:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** /* Disable the TIM Capture/Compare 2 interrupt */ +1736:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** __HAL_TIM_DISABLE_IT(htim, TIM_IT_CC2); +1737:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** +1738:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** /* Disable the complementary One Pulse output channel and the Input Capture channel */ +1739:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** TIM_CCxNChannelCmd(htim->Instance, OutputChannel, TIM_CCxN_DISABLE); +1740:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** TIM_CCxChannelCmd(htim->Instance, input_channel, TIM_CCx_DISABLE); +1741:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** +1742:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** /* Disable the Main Output */ + ARM GAS /tmp/ccUWVJFr.s page 32 + + +1743:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** __HAL_TIM_MOE_DISABLE(htim); +1744:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** +1745:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** /* Disable the Peripheral */ +1746:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** __HAL_TIM_DISABLE(htim); +1747:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** +1748:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** /* Set the TIM channels state */ +1749:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** TIM_CHANNEL_STATE_SET(htim, TIM_CHANNEL_1, HAL_TIM_CHANNEL_STATE_READY); +1750:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** TIM_CHANNEL_STATE_SET(htim, TIM_CHANNEL_2, HAL_TIM_CHANNEL_STATE_READY); +1751:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** TIM_CHANNEL_N_STATE_SET(htim, TIM_CHANNEL_1, HAL_TIM_CHANNEL_STATE_READY); +1752:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** TIM_CHANNEL_N_STATE_SET(htim, TIM_CHANNEL_2, HAL_TIM_CHANNEL_STATE_READY); +1753:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** +1754:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** /* Return function status */ +1755:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** return HAL_OK; +1756:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** } +1757:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** +1758:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** /** +1759:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** * @} +1760:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** */ +1761:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** +1762:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** /** @defgroup TIMEx_Exported_Functions_Group5 Extended Peripheral Control functions +1763:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** * @brief Peripheral Control functions +1764:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** * +1765:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** @verbatim +1766:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** ============================================================================== +1767:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** ##### Peripheral Control functions ##### +1768:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** ============================================================================== +1769:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** [..] +1770:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** This section provides functions allowing to: +1771:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** (+) Configure the commutation event in case of use of the Hall sensor interface. +1772:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** (+) Configure Output channels for OC and PWM mode. +1773:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** +1774:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** (+) Configure Complementary channels, break features and dead time. +1775:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** (+) Configure Master synchronization. +1776:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** (+) Configure timer remapping capabilities. +1777:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** +1778:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** @endverbatim +1779:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** * @{ +1780:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** */ +1781:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** +1782:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** /** +1783:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** * @brief Configure the TIM commutation event sequence. +1784:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** * @note This function is mandatory to use the commutation event in order to +1785:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** * update the configuration at each commutation detection on the TRGI input of the Timer, +1786:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** * the typical use of this feature is with the use of another Timer(interface Timer) +1787:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** * configured in Hall sensor interface, this interface Timer will generate the +1788:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** * commutation at its TRGO output (connected to Timer used in this function) each time +1789:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** * the TI1 of the Interface Timer detect a commutation at its input TI1. +1790:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** * @param htim TIM handle +1791:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** * @param InputTrigger the Internal trigger corresponding to the Timer Interfacing with the Hall +1792:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** * This parameter can be one of the following values: +1793:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** * @arg TIM_TS_ITR0: Internal trigger 0 selected +1794:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** * @arg TIM_TS_ITR1: Internal trigger 1 selected +1795:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** * @arg TIM_TS_ITR2: Internal trigger 2 selected +1796:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** * @arg TIM_TS_ITR3: Internal trigger 3 selected +1797:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** * @arg TIM_TS_NONE: No trigger is needed +1798:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** * @param CommutationSource the Commutation Event source +1799:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** * This parameter can be one of the following values: + ARM GAS /tmp/ccUWVJFr.s page 33 + + +1800:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** * @arg TIM_COMMUTATION_TRGI: Commutation source is the TRGI of the Interface Timer +1801:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** * @arg TIM_COMMUTATION_SOFTWARE: Commutation source is set by software using the COMG +1802:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** * @retval HAL status +1803:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** */ +1804:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** HAL_StatusTypeDef HAL_TIMEx_ConfigCommutEvent(TIM_HandleTypeDef *htim, uint32_t InputTrigger, +1805:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** uint32_t CommutationSource) +1806:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** { +1807:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** /* Check the parameters */ +1808:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** assert_param(IS_TIM_COMMUTATION_EVENT_INSTANCE(htim->Instance)); +1809:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** assert_param(IS_TIM_INTERNAL_TRIGGEREVENT_SELECTION(InputTrigger)); +1810:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** +1811:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** __HAL_LOCK(htim); +1812:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** +1813:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** if ((InputTrigger == TIM_TS_ITR0) || (InputTrigger == TIM_TS_ITR1) || +1814:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** (InputTrigger == TIM_TS_ITR2) || (InputTrigger == TIM_TS_ITR3)) +1815:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** { +1816:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** /* Select the Input trigger */ +1817:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** htim->Instance->SMCR &= ~TIM_SMCR_TS; +1818:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** htim->Instance->SMCR |= InputTrigger; +1819:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** } +1820:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** +1821:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** /* Select the Capture Compare preload feature */ +1822:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** htim->Instance->CR2 |= TIM_CR2_CCPC; +1823:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** /* Select the Commutation event source */ +1824:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** htim->Instance->CR2 &= ~TIM_CR2_CCUS; +1825:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** htim->Instance->CR2 |= CommutationSource; +1826:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** +1827:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** /* Disable Commutation Interrupt */ +1828:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** __HAL_TIM_DISABLE_IT(htim, TIM_IT_COM); +1829:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** +1830:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** /* Disable Commutation DMA request */ +1831:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** __HAL_TIM_DISABLE_DMA(htim, TIM_DMA_COM); +1832:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** +1833:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** __HAL_UNLOCK(htim); +1834:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** +1835:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** return HAL_OK; +1836:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** } +1837:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** +1838:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** /** +1839:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** * @brief Configure the TIM commutation event sequence with interrupt. +1840:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** * @note This function is mandatory to use the commutation event in order to +1841:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** * update the configuration at each commutation detection on the TRGI input of the Timer, +1842:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** * the typical use of this feature is with the use of another Timer(interface Timer) +1843:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** * configured in Hall sensor interface, this interface Timer will generate the +1844:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** * commutation at its TRGO output (connected to Timer used in this function) each time +1845:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** * the TI1 of the Interface Timer detect a commutation at its input TI1. +1846:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** * @param htim TIM handle +1847:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** * @param InputTrigger the Internal trigger corresponding to the Timer Interfacing with the Hall +1848:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** * This parameter can be one of the following values: +1849:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** * @arg TIM_TS_ITR0: Internal trigger 0 selected +1850:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** * @arg TIM_TS_ITR1: Internal trigger 1 selected +1851:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** * @arg TIM_TS_ITR2: Internal trigger 2 selected +1852:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** * @arg TIM_TS_ITR3: Internal trigger 3 selected +1853:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** * @arg TIM_TS_NONE: No trigger is needed +1854:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** * @param CommutationSource the Commutation Event source +1855:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** * This parameter can be one of the following values: +1856:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** * @arg TIM_COMMUTATION_TRGI: Commutation source is the TRGI of the Interface Timer + ARM GAS /tmp/ccUWVJFr.s page 34 + + +1857:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** * @arg TIM_COMMUTATION_SOFTWARE: Commutation source is set by software using the COMG +1858:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** * @retval HAL status +1859:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** */ +1860:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** HAL_StatusTypeDef HAL_TIMEx_ConfigCommutEvent_IT(TIM_HandleTypeDef *htim, uint32_t InputTrigger, +1861:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** uint32_t CommutationSource) +1862:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** { +1863:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** /* Check the parameters */ +1864:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** assert_param(IS_TIM_COMMUTATION_EVENT_INSTANCE(htim->Instance)); +1865:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** assert_param(IS_TIM_INTERNAL_TRIGGEREVENT_SELECTION(InputTrigger)); +1866:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** +1867:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** __HAL_LOCK(htim); +1868:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** +1869:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** if ((InputTrigger == TIM_TS_ITR0) || (InputTrigger == TIM_TS_ITR1) || +1870:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** (InputTrigger == TIM_TS_ITR2) || (InputTrigger == TIM_TS_ITR3)) +1871:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** { +1872:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** /* Select the Input trigger */ +1873:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** htim->Instance->SMCR &= ~TIM_SMCR_TS; +1874:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** htim->Instance->SMCR |= InputTrigger; +1875:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** } +1876:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** +1877:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** /* Select the Capture Compare preload feature */ +1878:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** htim->Instance->CR2 |= TIM_CR2_CCPC; +1879:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** /* Select the Commutation event source */ +1880:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** htim->Instance->CR2 &= ~TIM_CR2_CCUS; +1881:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** htim->Instance->CR2 |= CommutationSource; +1882:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** +1883:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** /* Disable Commutation DMA request */ +1884:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** __HAL_TIM_DISABLE_DMA(htim, TIM_DMA_COM); +1885:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** +1886:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** /* Enable the Commutation Interrupt */ +1887:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** __HAL_TIM_ENABLE_IT(htim, TIM_IT_COM); +1888:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** +1889:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** __HAL_UNLOCK(htim); +1890:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** +1891:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** return HAL_OK; +1892:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** } +1893:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** +1894:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** /** +1895:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** * @brief Configure the TIM commutation event sequence with DMA. +1896:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** * @note This function is mandatory to use the commutation event in order to +1897:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** * update the configuration at each commutation detection on the TRGI input of the Timer, +1898:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** * the typical use of this feature is with the use of another Timer(interface Timer) +1899:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** * configured in Hall sensor interface, this interface Timer will generate the +1900:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** * commutation at its TRGO output (connected to Timer used in this function) each time +1901:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** * the TI1 of the Interface Timer detect a commutation at its input TI1. +1902:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** * @note The user should configure the DMA in his own software, in This function only the COMDE b +1903:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** * @param htim TIM handle +1904:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** * @param InputTrigger the Internal trigger corresponding to the Timer Interfacing with the Hall +1905:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** * This parameter can be one of the following values: +1906:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** * @arg TIM_TS_ITR0: Internal trigger 0 selected +1907:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** * @arg TIM_TS_ITR1: Internal trigger 1 selected +1908:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** * @arg TIM_TS_ITR2: Internal trigger 2 selected +1909:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** * @arg TIM_TS_ITR3: Internal trigger 3 selected +1910:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** * @arg TIM_TS_NONE: No trigger is needed +1911:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** * @param CommutationSource the Commutation Event source +1912:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** * This parameter can be one of the following values: +1913:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** * @arg TIM_COMMUTATION_TRGI: Commutation source is the TRGI of the Interface Timer + ARM GAS /tmp/ccUWVJFr.s page 35 + + +1914:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** * @arg TIM_COMMUTATION_SOFTWARE: Commutation source is set by software using the COMG +1915:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** * @retval HAL status +1916:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** */ +1917:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** HAL_StatusTypeDef HAL_TIMEx_ConfigCommutEvent_DMA(TIM_HandleTypeDef *htim, uint32_t InputTrigger, +1918:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** uint32_t CommutationSource) +1919:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** { +1920:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** /* Check the parameters */ +1921:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** assert_param(IS_TIM_COMMUTATION_EVENT_INSTANCE(htim->Instance)); +1922:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** assert_param(IS_TIM_INTERNAL_TRIGGEREVENT_SELECTION(InputTrigger)); +1923:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** +1924:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** __HAL_LOCK(htim); +1925:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** +1926:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** if ((InputTrigger == TIM_TS_ITR0) || (InputTrigger == TIM_TS_ITR1) || +1927:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** (InputTrigger == TIM_TS_ITR2) || (InputTrigger == TIM_TS_ITR3)) +1928:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** { +1929:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** /* Select the Input trigger */ +1930:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** htim->Instance->SMCR &= ~TIM_SMCR_TS; +1931:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** htim->Instance->SMCR |= InputTrigger; +1932:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** } +1933:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** +1934:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** /* Select the Capture Compare preload feature */ +1935:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** htim->Instance->CR2 |= TIM_CR2_CCPC; +1936:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** /* Select the Commutation event source */ +1937:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** htim->Instance->CR2 &= ~TIM_CR2_CCUS; +1938:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** htim->Instance->CR2 |= CommutationSource; +1939:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** +1940:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** /* Enable the Commutation DMA Request */ +1941:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** /* Set the DMA Commutation Callback */ +1942:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** htim->hdma[TIM_DMA_ID_COMMUTATION]->XferCpltCallback = TIMEx_DMACommutationCplt; +1943:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** htim->hdma[TIM_DMA_ID_COMMUTATION]->XferHalfCpltCallback = TIMEx_DMACommutationHalfCplt; +1944:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** /* Set the DMA error callback */ +1945:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** htim->hdma[TIM_DMA_ID_COMMUTATION]->XferErrorCallback = TIM_DMAError; +1946:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** +1947:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** /* Disable Commutation Interrupt */ +1948:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** __HAL_TIM_DISABLE_IT(htim, TIM_IT_COM); +1949:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** +1950:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** /* Enable the Commutation DMA Request */ +1951:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** __HAL_TIM_ENABLE_DMA(htim, TIM_DMA_COM); +1952:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** +1953:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** __HAL_UNLOCK(htim); +1954:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** +1955:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** return HAL_OK; +1956:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** } +1957:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** +1958:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** /** +1959:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** * @brief Configures the TIM in master mode. +1960:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** * @param htim TIM handle. +1961:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** * @param sMasterConfig pointer to a TIM_MasterConfigTypeDef structure that +1962:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** * contains the selected trigger output (TRGO) and the Master/Slave +1963:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** * mode. +1964:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** * @retval HAL status +1965:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** */ +1966:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** HAL_StatusTypeDef HAL_TIMEx_MasterConfigSynchronization(TIM_HandleTypeDef *htim, +1967:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** const TIM_MasterConfigTypeDef *sMasterConfi +1968:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** { +1969:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** uint32_t tmpcr2; +1970:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** uint32_t tmpsmcr; + ARM GAS /tmp/ccUWVJFr.s page 36 + + +1971:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** +1972:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** /* Check the parameters */ +1973:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** assert_param(IS_TIM_MASTER_INSTANCE(htim->Instance)); +1974:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** assert_param(IS_TIM_TRGO_SOURCE(sMasterConfig->MasterOutputTrigger)); +1975:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** assert_param(IS_TIM_MSM_STATE(sMasterConfig->MasterSlaveMode)); +1976:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** +1977:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** /* Check input state */ +1978:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** __HAL_LOCK(htim); +1979:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** +1980:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** /* Change the handler state */ +1981:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** htim->State = HAL_TIM_STATE_BUSY; +1982:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** +1983:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** /* Get the TIMx CR2 register value */ +1984:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** tmpcr2 = htim->Instance->CR2; +1985:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** +1986:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** /* Get the TIMx SMCR register value */ +1987:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** tmpsmcr = htim->Instance->SMCR; +1988:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** +1989:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** /* Reset the MMS Bits */ +1990:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** tmpcr2 &= ~TIM_CR2_MMS; +1991:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** /* Select the TRGO source */ +1992:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** tmpcr2 |= sMasterConfig->MasterOutputTrigger; +1993:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** +1994:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** /* Update TIMx CR2 */ +1995:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** htim->Instance->CR2 = tmpcr2; +1996:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** +1997:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** if (IS_TIM_SLAVE_INSTANCE(htim->Instance)) +1998:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** { +1999:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** /* Reset the MSM Bit */ +2000:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** tmpsmcr &= ~TIM_SMCR_MSM; +2001:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** /* Set master mode */ +2002:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** tmpsmcr |= sMasterConfig->MasterSlaveMode; +2003:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** +2004:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** /* Update TIMx SMCR */ +2005:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** htim->Instance->SMCR = tmpsmcr; +2006:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** } +2007:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** +2008:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** /* Change the htim state */ +2009:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** htim->State = HAL_TIM_STATE_READY; +2010:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** +2011:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** __HAL_UNLOCK(htim); +2012:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** +2013:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** return HAL_OK; +2014:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** } +2015:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** +2016:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** /** +2017:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** * @brief Configures the Break feature, dead time, Lock level, OSSI/OSSR State +2018:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** * and the AOE(automatic output enable). +2019:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** * @param htim TIM handle +2020:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** * @param sBreakDeadTimeConfig pointer to a TIM_ConfigBreakDeadConfigTypeDef structure that +2021:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** * contains the BDTR Register configuration information for the TIM peripheral. +2022:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** * @note Interrupts can be generated when an active level is detected on the +2023:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** * break input, the break 2 input or the system break input. Break +2024:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** * interrupt can be enabled by calling the @ref __HAL_TIM_ENABLE_IT macro. +2025:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** * @retval HAL status +2026:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** */ +2027:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** HAL_StatusTypeDef HAL_TIMEx_ConfigBreakDeadTime(TIM_HandleTypeDef *htim, + ARM GAS /tmp/ccUWVJFr.s page 37 + + +2028:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** const TIM_BreakDeadTimeConfigTypeDef *sBreakDeadTim +2029:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** { +2030:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** /* Keep this variable initialized to 0 as it is used to configure BDTR register */ +2031:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** uint32_t tmpbdtr = 0U; +2032:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** +2033:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** /* Check the parameters */ +2034:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** assert_param(IS_TIM_BREAK_INSTANCE(htim->Instance)); +2035:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** assert_param(IS_TIM_OSSR_STATE(sBreakDeadTimeConfig->OffStateRunMode)); +2036:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** assert_param(IS_TIM_OSSI_STATE(sBreakDeadTimeConfig->OffStateIDLEMode)); +2037:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** assert_param(IS_TIM_LOCK_LEVEL(sBreakDeadTimeConfig->LockLevel)); +2038:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** assert_param(IS_TIM_DEADTIME(sBreakDeadTimeConfig->DeadTime)); +2039:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** assert_param(IS_TIM_BREAK_STATE(sBreakDeadTimeConfig->BreakState)); +2040:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** assert_param(IS_TIM_BREAK_POLARITY(sBreakDeadTimeConfig->BreakPolarity)); +2041:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** assert_param(IS_TIM_AUTOMATIC_OUTPUT_STATE(sBreakDeadTimeConfig->AutomaticOutput)); +2042:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** +2043:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** /* Check input state */ +2044:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** __HAL_LOCK(htim); +2045:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** +2046:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** /* Set the Lock level, the Break enable Bit and the Polarity, the OSSR State, +2047:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** the OSSI State, the dead time value and the Automatic Output Enable Bit */ +2048:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** +2049:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** /* Set the BDTR bits */ +2050:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** MODIFY_REG(tmpbdtr, TIM_BDTR_DTG, sBreakDeadTimeConfig->DeadTime); +2051:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** MODIFY_REG(tmpbdtr, TIM_BDTR_LOCK, sBreakDeadTimeConfig->LockLevel); +2052:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** MODIFY_REG(tmpbdtr, TIM_BDTR_OSSI, sBreakDeadTimeConfig->OffStateIDLEMode); +2053:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** MODIFY_REG(tmpbdtr, TIM_BDTR_OSSR, sBreakDeadTimeConfig->OffStateRunMode); +2054:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** MODIFY_REG(tmpbdtr, TIM_BDTR_BKE, sBreakDeadTimeConfig->BreakState); +2055:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** MODIFY_REG(tmpbdtr, TIM_BDTR_BKP, sBreakDeadTimeConfig->BreakPolarity); +2056:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** MODIFY_REG(tmpbdtr, TIM_BDTR_AOE, sBreakDeadTimeConfig->AutomaticOutput); +2057:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** +2058:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** +2059:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** /* Set TIMx_BDTR */ +2060:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** htim->Instance->BDTR = tmpbdtr; +2061:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** +2062:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** __HAL_UNLOCK(htim); +2063:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** +2064:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** return HAL_OK; +2065:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** } +2066:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** +2067:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** /** +2068:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** * @brief Configures the TIMx Remapping input capabilities. +2069:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** * @param htim TIM handle. +2070:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** * @param Remap specifies the TIM remapping source. +2071:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** * For TIM14, the parameter can have the following values: +2072:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** * @arg TIM_TIM14_GPIO: TIM14 TI1 is connected to GPIO +2073:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** * @arg TIM_TIM14_RTC: TIM14 TI1 is connected to RTC_clock +2074:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** * @arg TIM_TIM14_HSE: TIM14 TI1 is connected to HSE/32 +2075:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** * @arg TIM_TIM14_MCO: TIM14 TI1 is connected to MCO +2076:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** * +2077:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** * @retval HAL status +2078:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** */ +2079:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** HAL_StatusTypeDef HAL_TIMEx_RemapConfig(TIM_HandleTypeDef *htim, uint32_t Remap) +2080:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** { +2081:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** +2082:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** /* Check parameters */ +2083:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** assert_param(IS_TIM_REMAP(htim->Instance, Remap)); +2084:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** + ARM GAS /tmp/ccUWVJFr.s page 38 + + +2085:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** __HAL_LOCK(htim); +2086:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** +2087:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** /* Set the Timer remapping configuration */ +2088:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** WRITE_REG(htim->Instance->OR, Remap); +2089:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** +2090:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** __HAL_UNLOCK(htim); +2091:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** +2092:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** return HAL_OK; +2093:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** } +2094:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** +2095:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** /** +2096:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** * @} +2097:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** */ +2098:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** +2099:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** /** @defgroup TIMEx_Exported_Functions_Group6 Extended Callbacks functions +2100:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** * @brief Extended Callbacks functions +2101:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** * +2102:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** @verbatim +2103:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** ============================================================================== +2104:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** ##### Extended Callbacks functions ##### +2105:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** ============================================================================== +2106:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** [..] +2107:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** This section provides Extended TIM callback functions: +2108:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** (+) Timer Commutation callback +2109:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** (+) Timer Break callback +2110:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** +2111:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** @endverbatim +2112:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** * @{ +2113:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** */ +2114:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** +2115:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** /** +2116:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** * @brief Hall commutation changed callback in non-blocking mode +2117:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** * @param htim TIM handle +2118:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** * @retval None +2119:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** */ +2120:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** __weak void HAL_TIMEx_CommutCallback(TIM_HandleTypeDef *htim) +2121:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** { +2122:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** /* Prevent unused argument(s) compilation warning */ +2123:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** UNUSED(htim); +2124:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** +2125:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** /* NOTE : This function should not be modified, when the callback is needed, +2126:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** the HAL_TIMEx_CommutCallback could be implemented in the user file +2127:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** */ +2128:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** } +2129:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** /** +2130:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** * @brief Hall commutation changed half complete callback in non-blocking mode +2131:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** * @param htim TIM handle +2132:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** * @retval None +2133:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** */ +2134:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** __weak void HAL_TIMEx_CommutHalfCpltCallback(TIM_HandleTypeDef *htim) +2135:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** { +2136:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** /* Prevent unused argument(s) compilation warning */ +2137:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** UNUSED(htim); +2138:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** +2139:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** /* NOTE : This function should not be modified, when the callback is needed, +2140:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** the HAL_TIMEx_CommutHalfCpltCallback could be implemented in the user file +2141:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** */ + ARM GAS /tmp/ccUWVJFr.s page 39 + + +2142:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** } +2143:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** +2144:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** /** +2145:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** * @brief Hall Break detection callback in non-blocking mode +2146:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** * @param htim TIM handle +2147:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** * @retval None +2148:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** */ +2149:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** __weak void HAL_TIMEx_BreakCallback(TIM_HandleTypeDef *htim) +2150:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** { +2151:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** /* Prevent unused argument(s) compilation warning */ +2152:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** UNUSED(htim); +2153:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** +2154:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** /* NOTE : This function should not be modified, when the callback is needed, +2155:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** the HAL_TIMEx_BreakCallback could be implemented in the user file +2156:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** */ +2157:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** } +2158:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** /** +2159:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** * @} +2160:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** */ +2161:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** +2162:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** /** @defgroup TIMEx_Exported_Functions_Group7 Extended Peripheral State functions +2163:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** * @brief Extended Peripheral State functions +2164:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** * +2165:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** @verbatim +2166:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** ============================================================================== +2167:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** ##### Extended Peripheral State functions ##### +2168:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** ============================================================================== +2169:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** [..] +2170:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** This subsection permits to get in run-time the status of the peripheral +2171:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** and the data flow. +2172:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** +2173:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** @endverbatim +2174:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** * @{ +2175:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** */ +2176:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** +2177:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** /** +2178:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** * @brief Return the TIM Hall Sensor interface handle state. +2179:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** * @param htim TIM Hall Sensor handle +2180:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** * @retval HAL state +2181:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** */ +2182:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** HAL_TIM_StateTypeDef HAL_TIMEx_HallSensor_GetState(const TIM_HandleTypeDef *htim) +2183:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** { +2184:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** return htim->State; +2185:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** } +2186:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** +2187:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** /** +2188:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** * @brief Return actual state of the TIM complementary channel. +2189:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** * @param htim TIM handle +2190:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** * @param ChannelN TIM Complementary channel +2191:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** * This parameter can be one of the following values: +2192:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** * @arg TIM_CHANNEL_1: TIM Channel 1 +2193:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** * @arg TIM_CHANNEL_2: TIM Channel 2 +2194:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** * @arg TIM_CHANNEL_3: TIM Channel 3 +2195:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** * @retval TIM Complementary channel state +2196:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** */ +2197:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** HAL_TIM_ChannelStateTypeDef HAL_TIMEx_GetChannelNState(const TIM_HandleTypeDef *htim, uint32_t Cha +2198:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** { + ARM GAS /tmp/ccUWVJFr.s page 40 + + +2199:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** HAL_TIM_ChannelStateTypeDef channel_state; +2200:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** +2201:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** /* Check the parameters */ +2202:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** assert_param(IS_TIM_CCXN_INSTANCE(htim->Instance, ChannelN)); +2203:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** +2204:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** channel_state = TIM_CHANNEL_N_STATE_GET(htim, ChannelN); +2205:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** +2206:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** return channel_state; +2207:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** } +2208:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** /** +2209:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** * @} +2210:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** */ +2211:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** +2212:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** /** +2213:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** * @} +2214:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** */ +2215:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** +2216:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** /* Private functions ---------------------------------------------------------*/ +2217:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** /** @defgroup TIMEx_Private_Functions TIM Extended Private Functions +2218:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** * @{ +2219:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** */ +2220:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** +2221:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** /** +2222:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** * @brief TIM DMA Commutation callback. +2223:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** * @param hdma pointer to DMA handle. +2224:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** * @retval None +2225:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** */ +2226:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** void TIMEx_DMACommutationCplt(DMA_HandleTypeDef *hdma) +2227:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** { +2228:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** TIM_HandleTypeDef *htim = (TIM_HandleTypeDef *)((DMA_HandleTypeDef *)hdma)->Parent; +2229:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** +2230:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** /* Change the htim state */ +2231:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** htim->State = HAL_TIM_STATE_READY; +2232:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** +2233:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** #if (USE_HAL_TIM_REGISTER_CALLBACKS == 1) +2234:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** htim->CommutationCallback(htim); +2235:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** #else +2236:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** HAL_TIMEx_CommutCallback(htim); +2237:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** #endif /* USE_HAL_TIM_REGISTER_CALLBACKS */ +2238:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** } +2239:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** +2240:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** /** +2241:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** * @brief TIM DMA Commutation half complete callback. +2242:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** * @param hdma pointer to DMA handle. +2243:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** * @retval None +2244:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** */ +2245:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** void TIMEx_DMACommutationHalfCplt(DMA_HandleTypeDef *hdma) +2246:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** { +2247:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** TIM_HandleTypeDef *htim = (TIM_HandleTypeDef *)((DMA_HandleTypeDef *)hdma)->Parent; +2248:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** +2249:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** /* Change the htim state */ +2250:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** htim->State = HAL_TIM_STATE_READY; +2251:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** +2252:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** #if (USE_HAL_TIM_REGISTER_CALLBACKS == 1) +2253:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** htim->CommutationHalfCpltCallback(htim); +2254:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** #else +2255:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** HAL_TIMEx_CommutHalfCpltCallback(htim); + ARM GAS /tmp/ccUWVJFr.s page 41 + + +2256:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** #endif /* USE_HAL_TIM_REGISTER_CALLBACKS */ +2257:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** } +2258:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** +2259:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** +2260:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** /** +2261:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** * @brief TIM DMA Delay Pulse complete callback (complementary channel). +2262:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** * @param hdma pointer to DMA handle. +2263:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** * @retval None +2264:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** */ +2265:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** static void TIM_DMADelayPulseNCplt(DMA_HandleTypeDef *hdma) +2266:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** { +2267:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** TIM_HandleTypeDef *htim = (TIM_HandleTypeDef *)((DMA_HandleTypeDef *)hdma)->Parent; +2268:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** +2269:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** if (hdma == htim->hdma[TIM_DMA_ID_CC1]) +2270:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** { +2271:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** htim->Channel = HAL_TIM_ACTIVE_CHANNEL_1; +2272:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** +2273:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** if (hdma->Init.Mode == DMA_NORMAL) +2274:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** { +2275:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** TIM_CHANNEL_N_STATE_SET(htim, TIM_CHANNEL_1, HAL_TIM_CHANNEL_STATE_READY); +2276:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** } +2277:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** } +2278:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** else if (hdma == htim->hdma[TIM_DMA_ID_CC2]) +2279:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** { +2280:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** htim->Channel = HAL_TIM_ACTIVE_CHANNEL_2; +2281:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** +2282:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** if (hdma->Init.Mode == DMA_NORMAL) +2283:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** { +2284:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** TIM_CHANNEL_N_STATE_SET(htim, TIM_CHANNEL_2, HAL_TIM_CHANNEL_STATE_READY); +2285:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** } +2286:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** } +2287:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** else if (hdma == htim->hdma[TIM_DMA_ID_CC3]) +2288:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** { +2289:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** htim->Channel = HAL_TIM_ACTIVE_CHANNEL_3; +2290:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** +2291:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** if (hdma->Init.Mode == DMA_NORMAL) +2292:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** { +2293:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** TIM_CHANNEL_N_STATE_SET(htim, TIM_CHANNEL_3, HAL_TIM_CHANNEL_STATE_READY); +2294:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** } +2295:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** } +2296:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** else if (hdma == htim->hdma[TIM_DMA_ID_CC4]) +2297:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** { +2298:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** htim->Channel = HAL_TIM_ACTIVE_CHANNEL_4; +2299:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** +2300:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** if (hdma->Init.Mode == DMA_NORMAL) +2301:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** { +2302:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** TIM_CHANNEL_N_STATE_SET(htim, TIM_CHANNEL_4, HAL_TIM_CHANNEL_STATE_READY); +2303:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** } +2304:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** } +2305:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** else +2306:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** { +2307:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** /* nothing to do */ +2308:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** } +2309:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** +2310:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** #if (USE_HAL_TIM_REGISTER_CALLBACKS == 1) +2311:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** htim->PWM_PulseFinishedCallback(htim); +2312:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** #else + ARM GAS /tmp/ccUWVJFr.s page 42 + + +2313:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** HAL_TIM_PWM_PulseFinishedCallback(htim); +2314:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** #endif /* USE_HAL_TIM_REGISTER_CALLBACKS */ +2315:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** +2316:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** htim->Channel = HAL_TIM_ACTIVE_CHANNEL_CLEARED; +2317:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** } +2318:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** +2319:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** /** +2320:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** * @brief TIM DMA error callback (complementary channel) +2321:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** * @param hdma pointer to DMA handle. +2322:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** * @retval None +2323:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** */ +2324:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** static void TIM_DMAErrorCCxN(DMA_HandleTypeDef *hdma) +2325:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** { +2326:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** TIM_HandleTypeDef *htim = (TIM_HandleTypeDef *)((DMA_HandleTypeDef *)hdma)->Parent; +2327:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** +2328:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** if (hdma == htim->hdma[TIM_DMA_ID_CC1]) +2329:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** { +2330:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** htim->Channel = HAL_TIM_ACTIVE_CHANNEL_1; +2331:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** TIM_CHANNEL_N_STATE_SET(htim, TIM_CHANNEL_1, HAL_TIM_CHANNEL_STATE_READY); +2332:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** } +2333:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** else if (hdma == htim->hdma[TIM_DMA_ID_CC2]) +2334:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** { +2335:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** htim->Channel = HAL_TIM_ACTIVE_CHANNEL_2; +2336:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** TIM_CHANNEL_N_STATE_SET(htim, TIM_CHANNEL_2, HAL_TIM_CHANNEL_STATE_READY); +2337:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** } +2338:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** else if (hdma == htim->hdma[TIM_DMA_ID_CC3]) +2339:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** { +2340:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** htim->Channel = HAL_TIM_ACTIVE_CHANNEL_3; +2341:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** TIM_CHANNEL_N_STATE_SET(htim, TIM_CHANNEL_3, HAL_TIM_CHANNEL_STATE_READY); +2342:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** } +2343:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** else +2344:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** { +2345:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** /* nothing to do */ +2346:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** } +2347:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** +2348:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** #if (USE_HAL_TIM_REGISTER_CALLBACKS == 1) +2349:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** htim->ErrorCallback(htim); +2350:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** #else +2351:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** HAL_TIM_ErrorCallback(htim); +2352:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** #endif /* USE_HAL_TIM_REGISTER_CALLBACKS */ +2353:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** +2354:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** htim->Channel = HAL_TIM_ACTIVE_CHANNEL_CLEARED; +2355:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** } +2356:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** +2357:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** /** +2358:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** * @brief Enables or disables the TIM Capture Compare Channel xN. +2359:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** * @param TIMx to select the TIM peripheral +2360:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** * @param Channel specifies the TIM Channel +2361:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** * This parameter can be one of the following values: +2362:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** * @arg TIM_CHANNEL_1: TIM Channel 1 +2363:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** * @arg TIM_CHANNEL_2: TIM Channel 2 +2364:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** * @arg TIM_CHANNEL_3: TIM Channel 3 +2365:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** * @param ChannelNState specifies the TIM Channel CCxNE bit new state. +2366:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** * This parameter can be: TIM_CCxN_ENABLE or TIM_CCxN_Disable. +2367:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** * @retval None +2368:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** */ +2369:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** static void TIM_CCxNChannelCmd(TIM_TypeDef *TIMx, uint32_t Channel, uint32_t ChannelNState) + ARM GAS /tmp/ccUWVJFr.s page 43 + + +2370:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** { + 27 .loc 1 2370 1 view -0 + 28 .cfi_startproc + 29 @ args = 0, pretend = 0, frame = 0 + 30 @ frame_needed = 0, uses_anonymous_args = 0 + 31 .loc 1 2370 1 is_stmt 0 view .LVU1 + 32 0000 10B5 push {r4, lr} + 33 .cfi_def_cfa_offset 8 + 34 .cfi_offset 4, -8 + 35 .cfi_offset 14, -4 +2371:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** uint32_t tmp; + 36 .loc 1 2371 3 is_stmt 1 view .LVU2 +2372:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** +2373:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** tmp = TIM_CCER_CC1NE << (Channel & 0x1FU); /* 0x1FU = 31 bits max shift */ + 37 .loc 1 2373 3 view .LVU3 + 38 .loc 1 2373 36 is_stmt 0 view .LVU4 + 39 0002 1F23 movs r3, #31 + 40 0004 1940 ands r1, r3 + 41 .LVL1: + 42 .loc 1 2373 7 view .LVU5 + 43 0006 0424 movs r4, #4 + 44 0008 8C40 lsls r4, r4, r1 + 45 .LVL2: +2374:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** +2375:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** /* Reset the CCxNE Bit */ +2376:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** TIMx->CCER &= ~tmp; + 46 .loc 1 2376 3 is_stmt 1 view .LVU6 + 47 .loc 1 2376 7 is_stmt 0 view .LVU7 + 48 000a 036A ldr r3, [r0, #32] + 49 .loc 1 2376 14 view .LVU8 + 50 000c A343 bics r3, r4 + 51 000e 0362 str r3, [r0, #32] +2377:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** +2378:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** /* Set or reset the CCxNE Bit */ +2379:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** TIMx->CCER |= (uint32_t)(ChannelNState << (Channel & 0x1FU)); /* 0x1FU = 31 bits max shift */ + 52 .loc 1 2379 3 is_stmt 1 view .LVU9 + 53 .loc 1 2379 7 is_stmt 0 view .LVU10 + 54 0010 036A ldr r3, [r0, #32] + 55 .loc 1 2379 42 view .LVU11 + 56 0012 8A40 lsls r2, r2, r1 + 57 .LVL3: + 58 .loc 1 2379 14 view .LVU12 + 59 0014 1343 orrs r3, r2 + 60 0016 0362 str r3, [r0, #32] +2380:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** } + 61 .loc 1 2380 1 view .LVU13 + 62 @ sp needed + 63 .LVL4: + 64 .loc 1 2380 1 view .LVU14 + 65 0018 10BD pop {r4, pc} + 66 .cfi_endproc + 67 .LFE81: + 69 .section .text.TIM_DMAErrorCCxN,"ax",%progbits + 70 .align 1 + 71 .syntax unified + 72 .code 16 + 73 .thumb_func + ARM GAS /tmp/ccUWVJFr.s page 44 + + + 75 TIM_DMAErrorCCxN: + 76 .LVL5: + 77 .LFB80: +2325:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** TIM_HandleTypeDef *htim = (TIM_HandleTypeDef *)((DMA_HandleTypeDef *)hdma)->Parent; + 78 .loc 1 2325 1 is_stmt 1 view -0 + 79 .cfi_startproc + 80 @ args = 0, pretend = 0, frame = 0 + 81 @ frame_needed = 0, uses_anonymous_args = 0 +2325:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** TIM_HandleTypeDef *htim = (TIM_HandleTypeDef *)((DMA_HandleTypeDef *)hdma)->Parent; + 82 .loc 1 2325 1 is_stmt 0 view .LVU16 + 83 0000 10B5 push {r4, lr} + 84 .cfi_def_cfa_offset 8 + 85 .cfi_offset 4, -8 + 86 .cfi_offset 14, -4 +2326:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** + 87 .loc 1 2326 3 is_stmt 1 view .LVU17 +2326:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** + 88 .loc 1 2326 22 is_stmt 0 view .LVU18 + 89 0002 446A ldr r4, [r0, #36] + 90 .LVL6: +2328:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** { + 91 .loc 1 2328 3 is_stmt 1 view .LVU19 +2328:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** { + 92 .loc 1 2328 25 is_stmt 0 view .LVU20 + 93 0004 636A ldr r3, [r4, #36] +2328:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** { + 94 .loc 1 2328 6 view .LVU21 + 95 0006 8342 cmp r3, r0 + 96 0008 0BD0 beq .L6 +2333:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** { + 97 .loc 1 2333 8 is_stmt 1 view .LVU22 +2333:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** { + 98 .loc 1 2333 30 is_stmt 0 view .LVU23 + 99 000a A36A ldr r3, [r4, #40] +2333:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** { + 100 .loc 1 2333 11 view .LVU24 + 101 000c 8342 cmp r3, r0 + 102 000e 0DD0 beq .L7 +2338:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** { + 103 .loc 1 2338 8 is_stmt 1 view .LVU25 +2338:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** { + 104 .loc 1 2338 30 is_stmt 0 view .LVU26 + 105 0010 E36A ldr r3, [r4, #44] +2338:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** { + 106 .loc 1 2338 11 view .LVU27 + 107 0012 8342 cmp r3, r0 + 108 0014 10D0 beq .L8 + 109 .L4: +2346:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** + 110 .loc 1 2346 3 is_stmt 1 view .LVU28 +2351:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** #endif /* USE_HAL_TIM_REGISTER_CALLBACKS */ + 111 .loc 1 2351 3 view .LVU29 + 112 0016 2000 movs r0, r4 + 113 .LVL7: +2351:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** #endif /* USE_HAL_TIM_REGISTER_CALLBACKS */ + 114 .loc 1 2351 3 is_stmt 0 view .LVU30 + 115 0018 FFF7FEFF bl HAL_TIM_ErrorCallback + ARM GAS /tmp/ccUWVJFr.s page 45 + + + 116 .LVL8: +2354:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** } + 117 .loc 1 2354 3 is_stmt 1 view .LVU31 +2354:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** } + 118 .loc 1 2354 17 is_stmt 0 view .LVU32 + 119 001c 0023 movs r3, #0 + 120 001e 2377 strb r3, [r4, #28] +2355:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** + 121 .loc 1 2355 1 view .LVU33 + 122 @ sp needed + 123 .LVL9: +2355:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** + 124 .loc 1 2355 1 view .LVU34 + 125 0020 10BD pop {r4, pc} + 126 .LVL10: + 127 .L6: +2330:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** TIM_CHANNEL_N_STATE_SET(htim, TIM_CHANNEL_1, HAL_TIM_CHANNEL_STATE_READY); + 128 .loc 1 2330 5 is_stmt 1 view .LVU35 +2330:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** TIM_CHANNEL_N_STATE_SET(htim, TIM_CHANNEL_1, HAL_TIM_CHANNEL_STATE_READY); + 129 .loc 1 2330 19 is_stmt 0 view .LVU36 + 130 0022 0123 movs r3, #1 + 131 0024 2377 strb r3, [r4, #28] +2331:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** } + 132 .loc 1 2331 5 is_stmt 1 view .LVU37 + 133 0026 4222 movs r2, #66 + 134 0028 A354 strb r3, [r4, r2] + 135 002a F4E7 b .L4 + 136 .L7: +2335:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** TIM_CHANNEL_N_STATE_SET(htim, TIM_CHANNEL_2, HAL_TIM_CHANNEL_STATE_READY); + 137 .loc 1 2335 5 view .LVU38 +2335:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** TIM_CHANNEL_N_STATE_SET(htim, TIM_CHANNEL_2, HAL_TIM_CHANNEL_STATE_READY); + 138 .loc 1 2335 19 is_stmt 0 view .LVU39 + 139 002c 0223 movs r3, #2 + 140 002e 2377 strb r3, [r4, #28] +2336:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** } + 141 .loc 1 2336 5 is_stmt 1 view .LVU40 + 142 0030 4133 adds r3, r3, #65 + 143 0032 0122 movs r2, #1 + 144 0034 E254 strb r2, [r4, r3] + 145 0036 EEE7 b .L4 + 146 .L8: +2340:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** TIM_CHANNEL_N_STATE_SET(htim, TIM_CHANNEL_3, HAL_TIM_CHANNEL_STATE_READY); + 147 .loc 1 2340 5 view .LVU41 +2340:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** TIM_CHANNEL_N_STATE_SET(htim, TIM_CHANNEL_3, HAL_TIM_CHANNEL_STATE_READY); + 148 .loc 1 2340 19 is_stmt 0 view .LVU42 + 149 0038 0423 movs r3, #4 + 150 003a 2377 strb r3, [r4, #28] +2341:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** } + 151 .loc 1 2341 5 is_stmt 1 view .LVU43 + 152 003c 4033 adds r3, r3, #64 + 153 003e 0122 movs r2, #1 + 154 0040 E254 strb r2, [r4, r3] + 155 0042 E8E7 b .L4 + 156 .cfi_endproc + 157 .LFE80: + 159 .section .text.TIM_DMADelayPulseNCplt,"ax",%progbits + 160 .align 1 + ARM GAS /tmp/ccUWVJFr.s page 46 + + + 161 .syntax unified + 162 .code 16 + 163 .thumb_func + 165 TIM_DMADelayPulseNCplt: + 166 .LVL11: + 167 .LFB79: +2266:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** TIM_HandleTypeDef *htim = (TIM_HandleTypeDef *)((DMA_HandleTypeDef *)hdma)->Parent; + 168 .loc 1 2266 1 view -0 + 169 .cfi_startproc + 170 @ args = 0, pretend = 0, frame = 0 + 171 @ frame_needed = 0, uses_anonymous_args = 0 +2266:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** TIM_HandleTypeDef *htim = (TIM_HandleTypeDef *)((DMA_HandleTypeDef *)hdma)->Parent; + 172 .loc 1 2266 1 is_stmt 0 view .LVU45 + 173 0000 10B5 push {r4, lr} + 174 .cfi_def_cfa_offset 8 + 175 .cfi_offset 4, -8 + 176 .cfi_offset 14, -4 +2267:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** + 177 .loc 1 2267 3 is_stmt 1 view .LVU46 +2267:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** + 178 .loc 1 2267 22 is_stmt 0 view .LVU47 + 179 0002 446A ldr r4, [r0, #36] + 180 .LVL12: +2269:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** { + 181 .loc 1 2269 3 is_stmt 1 view .LVU48 +2269:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** { + 182 .loc 1 2269 25 is_stmt 0 view .LVU49 + 183 0004 636A ldr r3, [r4, #36] +2269:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** { + 184 .loc 1 2269 6 view .LVU50 + 185 0006 8342 cmp r3, r0 + 186 0008 0ED0 beq .L14 +2278:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** { + 187 .loc 1 2278 8 is_stmt 1 view .LVU51 +2278:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** { + 188 .loc 1 2278 30 is_stmt 0 view .LVU52 + 189 000a A36A ldr r3, [r4, #40] +2278:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** { + 190 .loc 1 2278 11 view .LVU53 + 191 000c 8342 cmp r3, r0 + 192 000e 14D0 beq .L15 +2287:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** { + 193 .loc 1 2287 8 is_stmt 1 view .LVU54 +2287:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** { + 194 .loc 1 2287 30 is_stmt 0 view .LVU55 + 195 0010 E36A ldr r3, [r4, #44] +2287:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** { + 196 .loc 1 2287 11 view .LVU56 + 197 0012 8342 cmp r3, r0 + 198 0014 1AD0 beq .L16 +2296:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** { + 199 .loc 1 2296 8 is_stmt 1 view .LVU57 +2296:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** { + 200 .loc 1 2296 30 is_stmt 0 view .LVU58 + 201 0016 236B ldr r3, [r4, #48] +2296:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** { + 202 .loc 1 2296 11 view .LVU59 + ARM GAS /tmp/ccUWVJFr.s page 47 + + + 203 0018 8342 cmp r3, r0 + 204 001a 20D0 beq .L17 + 205 .L11: +2308:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** + 206 .loc 1 2308 3 is_stmt 1 view .LVU60 +2313:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** #endif /* USE_HAL_TIM_REGISTER_CALLBACKS */ + 207 .loc 1 2313 3 view .LVU61 + 208 001c 2000 movs r0, r4 + 209 .LVL13: +2313:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** #endif /* USE_HAL_TIM_REGISTER_CALLBACKS */ + 210 .loc 1 2313 3 is_stmt 0 view .LVU62 + 211 001e FFF7FEFF bl HAL_TIM_PWM_PulseFinishedCallback + 212 .LVL14: +2316:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** } + 213 .loc 1 2316 3 is_stmt 1 view .LVU63 +2316:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** } + 214 .loc 1 2316 17 is_stmt 0 view .LVU64 + 215 0022 0023 movs r3, #0 + 216 0024 2377 strb r3, [r4, #28] +2317:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** + 217 .loc 1 2317 1 view .LVU65 + 218 @ sp needed + 219 .LVL15: +2317:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** + 220 .loc 1 2317 1 view .LVU66 + 221 0026 10BD pop {r4, pc} + 222 .LVL16: + 223 .L14: +2271:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** + 224 .loc 1 2271 5 is_stmt 1 view .LVU67 +2271:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** + 225 .loc 1 2271 19 is_stmt 0 view .LVU68 + 226 0028 0123 movs r3, #1 + 227 002a 2377 strb r3, [r4, #28] +2273:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** { + 228 .loc 1 2273 5 is_stmt 1 view .LVU69 +2273:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** { + 229 .loc 1 2273 19 is_stmt 0 view .LVU70 + 230 002c 8369 ldr r3, [r0, #24] +2273:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** { + 231 .loc 1 2273 8 view .LVU71 + 232 002e 002B cmp r3, #0 + 233 0030 F4D1 bne .L11 +2275:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** } + 234 .loc 1 2275 7 is_stmt 1 view .LVU72 + 235 0032 4233 adds r3, r3, #66 + 236 0034 0122 movs r2, #1 + 237 0036 E254 strb r2, [r4, r3] + 238 0038 F0E7 b .L11 + 239 .L15: +2280:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** + 240 .loc 1 2280 5 view .LVU73 +2280:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** + 241 .loc 1 2280 19 is_stmt 0 view .LVU74 + 242 003a 0223 movs r3, #2 + 243 003c 2377 strb r3, [r4, #28] +2282:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** { + ARM GAS /tmp/ccUWVJFr.s page 48 + + + 244 .loc 1 2282 5 is_stmt 1 view .LVU75 +2282:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** { + 245 .loc 1 2282 19 is_stmt 0 view .LVU76 + 246 003e 8369 ldr r3, [r0, #24] +2282:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** { + 247 .loc 1 2282 8 view .LVU77 + 248 0040 002B cmp r3, #0 + 249 0042 EBD1 bne .L11 +2284:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** } + 250 .loc 1 2284 7 is_stmt 1 view .LVU78 + 251 0044 4333 adds r3, r3, #67 + 252 0046 0122 movs r2, #1 + 253 0048 E254 strb r2, [r4, r3] + 254 004a E7E7 b .L11 + 255 .L16: +2289:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** + 256 .loc 1 2289 5 view .LVU79 +2289:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** + 257 .loc 1 2289 19 is_stmt 0 view .LVU80 + 258 004c 0423 movs r3, #4 + 259 004e 2377 strb r3, [r4, #28] +2291:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** { + 260 .loc 1 2291 5 is_stmt 1 view .LVU81 +2291:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** { + 261 .loc 1 2291 19 is_stmt 0 view .LVU82 + 262 0050 8369 ldr r3, [r0, #24] +2291:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** { + 263 .loc 1 2291 8 view .LVU83 + 264 0052 002B cmp r3, #0 + 265 0054 E2D1 bne .L11 +2293:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** } + 266 .loc 1 2293 7 is_stmt 1 view .LVU84 + 267 0056 4433 adds r3, r3, #68 + 268 0058 0122 movs r2, #1 + 269 005a E254 strb r2, [r4, r3] + 270 005c DEE7 b .L11 + 271 .L17: +2298:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** + 272 .loc 1 2298 5 view .LVU85 +2298:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** + 273 .loc 1 2298 19 is_stmt 0 view .LVU86 + 274 005e 0823 movs r3, #8 + 275 0060 2377 strb r3, [r4, #28] +2300:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** { + 276 .loc 1 2300 5 is_stmt 1 view .LVU87 +2300:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** { + 277 .loc 1 2300 19 is_stmt 0 view .LVU88 + 278 0062 8369 ldr r3, [r0, #24] +2300:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** { + 279 .loc 1 2300 8 view .LVU89 + 280 0064 002B cmp r3, #0 + 281 0066 D9D1 bne .L11 +2302:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** } + 282 .loc 1 2302 7 is_stmt 1 view .LVU90 + 283 0068 4533 adds r3, r3, #69 + 284 006a 0122 movs r2, #1 + 285 006c E254 strb r2, [r4, r3] + ARM GAS /tmp/ccUWVJFr.s page 49 + + + 286 006e D5E7 b .L11 + 287 .cfi_endproc + 288 .LFE79: + 290 .section .text.HAL_TIMEx_HallSensor_MspInit,"ax",%progbits + 291 .align 1 + 292 .weak HAL_TIMEx_HallSensor_MspInit + 293 .syntax unified + 294 .code 16 + 295 .thumb_func + 297 HAL_TIMEx_HallSensor_MspInit: + 298 .LVL17: + 299 .LFB42: + 287:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** /* Prevent unused argument(s) compilation warning */ + 300 .loc 1 287 1 view -0 + 301 .cfi_startproc + 302 @ args = 0, pretend = 0, frame = 0 + 303 @ frame_needed = 0, uses_anonymous_args = 0 + 304 @ link register save eliminated. + 289:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** + 305 .loc 1 289 3 view .LVU92 + 294:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** + 306 .loc 1 294 1 is_stmt 0 view .LVU93 + 307 @ sp needed + 308 0000 7047 bx lr + 309 .cfi_endproc + 310 .LFE42: + 312 .section .text.HAL_TIMEx_HallSensor_Init,"ax",%progbits + 313 .align 1 + 314 .global HAL_TIMEx_HallSensor_Init + 315 .syntax unified + 316 .code 16 + 317 .thumb_func + 319 HAL_TIMEx_HallSensor_Init: + 320 .LVL18: + 321 .LFB40: + 140:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** TIM_OC_InitTypeDef OC_Config; + 322 .loc 1 140 1 is_stmt 1 view -0 + 323 .cfi_startproc + 324 @ args = 0, pretend = 0, frame = 32 + 325 @ frame_needed = 0, uses_anonymous_args = 0 + 140:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** TIM_OC_InitTypeDef OC_Config; + 326 .loc 1 140 1 is_stmt 0 view .LVU95 + 327 0000 F0B5 push {r4, r5, r6, r7, lr} + 328 .cfi_def_cfa_offset 20 + 329 .cfi_offset 4, -20 + 330 .cfi_offset 5, -16 + 331 .cfi_offset 6, -12 + 332 .cfi_offset 7, -8 + 333 .cfi_offset 14, -4 + 334 0002 89B0 sub sp, sp, #36 + 335 .cfi_def_cfa_offset 56 + 336 0004 0400 movs r4, r0 + 337 0006 0D00 movs r5, r1 + 141:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** + 338 .loc 1 141 3 is_stmt 1 view .LVU96 + 144:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** { + 339 .loc 1 144 3 view .LVU97 + ARM GAS /tmp/ccUWVJFr.s page 50 + + + 144:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** { + 340 .loc 1 144 6 is_stmt 0 view .LVU98 + 341 0008 0028 cmp r0, #0 + 342 000a 5ED0 beq .L22 + 150:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** assert_param(IS_TIM_COUNTER_MODE(htim->Init.CounterMode)); + 343 .loc 1 150 3 is_stmt 1 view .LVU99 + 151:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** assert_param(IS_TIM_CLOCKDIVISION_DIV(htim->Init.ClockDivision)); + 344 .loc 1 151 3 view .LVU100 + 152:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** assert_param(IS_TIM_AUTORELOAD_PRELOAD(htim->Init.AutoReloadPreload)); + 345 .loc 1 152 3 view .LVU101 + 153:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** assert_param(IS_TIM_IC_POLARITY(sConfig->IC1Polarity)); + 346 .loc 1 153 3 view .LVU102 + 154:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** assert_param(IS_TIM_PERIOD(htim, htim->Init.Period)); + 347 .loc 1 154 3 view .LVU103 + 155:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** assert_param(IS_TIM_IC_PRESCALER(sConfig->IC1Prescaler)); + 348 .loc 1 155 3 view .LVU104 + 156:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** assert_param(IS_TIM_IC_FILTER(sConfig->IC1Filter)); + 349 .loc 1 156 3 view .LVU105 + 157:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** + 350 .loc 1 157 3 view .LVU106 + 159:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** { + 351 .loc 1 159 3 view .LVU107 + 159:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** { + 352 .loc 1 159 11 is_stmt 0 view .LVU108 + 353 000c 3D23 movs r3, #61 + 354 000e C35C ldrb r3, [r0, r3] + 159:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** { + 355 .loc 1 159 6 view .LVU109 + 356 0010 002B cmp r3, #0 + 357 0012 54D0 beq .L23 + 358 .LVL19: + 359 .L21: + 181:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** + 360 .loc 1 181 3 is_stmt 1 view .LVU110 + 181:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** + 361 .loc 1 181 15 is_stmt 0 view .LVU111 + 362 0014 3D26 movs r6, #61 + 363 0016 0223 movs r3, #2 + 364 0018 A355 strb r3, [r4, r6] + 184:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** + 365 .loc 1 184 3 is_stmt 1 view .LVU112 + 184:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** + 366 .loc 1 184 38 is_stmt 0 view .LVU113 + 367 001a 2100 movs r1, r4 + 184:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** + 368 .loc 1 184 3 view .LVU114 + 369 001c 01C9 ldmia r1!, {r0} + 370 001e FFF7FEFF bl TIM_Base_SetConfig + 371 .LVL20: + 187:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** + 372 .loc 1 187 3 is_stmt 1 view .LVU115 + 187:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** + 373 .loc 1 187 44 is_stmt 0 view .LVU116 + 374 0022 2968 ldr r1, [r5] + 187:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** + 375 .loc 1 187 87 view .LVU117 + 376 0024 AB68 ldr r3, [r5, #8] + ARM GAS /tmp/ccUWVJFr.s page 51 + + + 187:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** + 377 .loc 1 187 3 view .LVU118 + 378 0026 2068 ldr r0, [r4] + 379 0028 0322 movs r2, #3 + 380 002a FFF7FEFF bl TIM_TI1_SetConfig + 381 .LVL21: + 190:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** /* Set the IC1PSC value */ + 382 .loc 1 190 3 is_stmt 1 view .LVU119 + 190:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** /* Set the IC1PSC value */ + 383 .loc 1 190 7 is_stmt 0 view .LVU120 + 384 002e 2268 ldr r2, [r4] + 190:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** /* Set the IC1PSC value */ + 385 .loc 1 190 17 view .LVU121 + 386 0030 9369 ldr r3, [r2, #24] + 190:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** /* Set the IC1PSC value */ + 387 .loc 1 190 25 view .LVU122 + 388 0032 0C21 movs r1, #12 + 389 0034 8B43 bics r3, r1 + 390 0036 9361 str r3, [r2, #24] + 192:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** + 391 .loc 1 192 3 is_stmt 1 view .LVU123 + 192:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** + 392 .loc 1 192 7 is_stmt 0 view .LVU124 + 393 0038 2268 ldr r2, [r4] + 192:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** + 394 .loc 1 192 17 view .LVU125 + 395 003a 9369 ldr r3, [r2, #24] + 192:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** + 396 .loc 1 192 35 view .LVU126 + 397 003c 6968 ldr r1, [r5, #4] + 192:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** + 398 .loc 1 192 25 view .LVU127 + 399 003e 0B43 orrs r3, r1 + 400 0040 9361 str r3, [r2, #24] + 195:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** + 401 .loc 1 195 3 is_stmt 1 view .LVU128 + 195:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** + 402 .loc 1 195 7 is_stmt 0 view .LVU129 + 403 0042 2268 ldr r2, [r4] + 195:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** + 404 .loc 1 195 17 view .LVU130 + 405 0044 5368 ldr r3, [r2, #4] + 195:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** + 406 .loc 1 195 23 view .LVU131 + 407 0046 8021 movs r1, #128 + 408 0048 0B43 orrs r3, r1 + 409 004a 5360 str r3, [r2, #4] + 198:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** htim->Instance->SMCR |= TIM_TS_TI1F_ED; + 410 .loc 1 198 3 is_stmt 1 view .LVU132 + 198:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** htim->Instance->SMCR |= TIM_TS_TI1F_ED; + 411 .loc 1 198 7 is_stmt 0 view .LVU133 + 412 004c 2268 ldr r2, [r4] + 198:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** htim->Instance->SMCR |= TIM_TS_TI1F_ED; + 413 .loc 1 198 17 view .LVU134 + 414 004e 9368 ldr r3, [r2, #8] + 198:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** htim->Instance->SMCR |= TIM_TS_TI1F_ED; + 415 .loc 1 198 24 view .LVU135 + ARM GAS /tmp/ccUWVJFr.s page 52 + + + 416 0050 7027 movs r7, #112 + 417 0052 BB43 bics r3, r7 + 418 0054 9360 str r3, [r2, #8] + 199:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** + 419 .loc 1 199 3 is_stmt 1 view .LVU136 + 199:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** + 420 .loc 1 199 7 is_stmt 0 view .LVU137 + 421 0056 2268 ldr r2, [r4] + 199:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** + 422 .loc 1 199 17 view .LVU138 + 423 0058 9368 ldr r3, [r2, #8] + 199:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** + 424 .loc 1 199 24 view .LVU139 + 425 005a 4039 subs r1, r1, #64 + 426 005c 0B43 orrs r3, r1 + 427 005e 9360 str r3, [r2, #8] + 202:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** htim->Instance->SMCR |= TIM_SLAVEMODE_RESET; + 428 .loc 1 202 3 is_stmt 1 view .LVU140 + 202:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** htim->Instance->SMCR |= TIM_SLAVEMODE_RESET; + 429 .loc 1 202 7 is_stmt 0 view .LVU141 + 430 0060 2268 ldr r2, [r4] + 202:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** htim->Instance->SMCR |= TIM_SLAVEMODE_RESET; + 431 .loc 1 202 17 view .LVU142 + 432 0062 9368 ldr r3, [r2, #8] + 202:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** htim->Instance->SMCR |= TIM_SLAVEMODE_RESET; + 433 .loc 1 202 24 view .LVU143 + 434 0064 3939 subs r1, r1, #57 + 435 0066 8B43 bics r3, r1 + 436 0068 9360 str r3, [r2, #8] + 203:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** + 437 .loc 1 203 3 is_stmt 1 view .LVU144 + 203:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** + 438 .loc 1 203 7 is_stmt 0 view .LVU145 + 439 006a 2268 ldr r2, [r4] + 203:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** + 440 .loc 1 203 17 view .LVU146 + 441 006c 9368 ldr r3, [r2, #8] + 203:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** + 442 .loc 1 203 24 view .LVU147 + 443 006e 0339 subs r1, r1, #3 + 444 0070 0B43 orrs r3, r1 + 445 0072 9360 str r3, [r2, #8] + 206:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** OC_Config.OCIdleState = TIM_OCIDLESTATE_RESET; + 446 .loc 1 206 3 is_stmt 1 view .LVU148 + 206:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** OC_Config.OCIdleState = TIM_OCIDLESTATE_RESET; + 447 .loc 1 206 24 is_stmt 0 view .LVU149 + 448 0074 0023 movs r3, #0 + 449 0076 0593 str r3, [sp, #20] + 207:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** OC_Config.OCMode = TIM_OCMODE_PWM2; + 450 .loc 1 207 3 is_stmt 1 view .LVU150 + 207:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** OC_Config.OCMode = TIM_OCMODE_PWM2; + 451 .loc 1 207 25 is_stmt 0 view .LVU151 + 452 0078 0693 str r3, [sp, #24] + 208:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** OC_Config.OCNIdleState = TIM_OCNIDLESTATE_RESET; + 453 .loc 1 208 3 is_stmt 1 view .LVU152 + 208:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** OC_Config.OCNIdleState = TIM_OCNIDLESTATE_RESET; + 454 .loc 1 208 20 is_stmt 0 view .LVU153 + ARM GAS /tmp/ccUWVJFr.s page 53 + + + 455 007a 0197 str r7, [sp, #4] + 209:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** OC_Config.OCNPolarity = TIM_OCNPOLARITY_HIGH; + 456 .loc 1 209 3 is_stmt 1 view .LVU154 + 209:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** OC_Config.OCNPolarity = TIM_OCNPOLARITY_HIGH; + 457 .loc 1 209 26 is_stmt 0 view .LVU155 + 458 007c 0793 str r3, [sp, #28] + 210:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** OC_Config.OCPolarity = TIM_OCPOLARITY_HIGH; + 459 .loc 1 210 3 is_stmt 1 view .LVU156 + 210:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** OC_Config.OCPolarity = TIM_OCPOLARITY_HIGH; + 460 .loc 1 210 25 is_stmt 0 view .LVU157 + 461 007e 0493 str r3, [sp, #16] + 211:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** OC_Config.Pulse = sConfig->Commutation_Delay; + 462 .loc 1 211 3 is_stmt 1 view .LVU158 + 211:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** OC_Config.Pulse = sConfig->Commutation_Delay; + 463 .loc 1 211 24 is_stmt 0 view .LVU159 + 464 0080 0393 str r3, [sp, #12] + 212:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** + 465 .loc 1 212 3 is_stmt 1 view .LVU160 + 212:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** + 466 .loc 1 212 28 is_stmt 0 view .LVU161 + 467 0082 EB68 ldr r3, [r5, #12] + 212:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** + 468 .loc 1 212 19 view .LVU162 + 469 0084 0293 str r3, [sp, #8] + 214:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** + 470 .loc 1 214 3 is_stmt 1 view .LVU163 + 471 0086 2068 ldr r0, [r4] + 472 0088 01A9 add r1, sp, #4 + 473 008a FFF7FEFF bl TIM_OC2_SetConfig + 474 .LVL22: + 218:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** htim->Instance->CR2 |= TIM_TRGO_OC2REF; + 475 .loc 1 218 3 view .LVU164 + 218:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** htim->Instance->CR2 |= TIM_TRGO_OC2REF; + 476 .loc 1 218 7 is_stmt 0 view .LVU165 + 477 008e 2268 ldr r2, [r4] + 218:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** htim->Instance->CR2 |= TIM_TRGO_OC2REF; + 478 .loc 1 218 17 view .LVU166 + 479 0090 5368 ldr r3, [r2, #4] + 218:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** htim->Instance->CR2 |= TIM_TRGO_OC2REF; + 480 .loc 1 218 23 view .LVU167 + 481 0092 BB43 bics r3, r7 + 482 0094 5360 str r3, [r2, #4] + 219:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** + 483 .loc 1 219 3 is_stmt 1 view .LVU168 + 219:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** + 484 .loc 1 219 7 is_stmt 0 view .LVU169 + 485 0096 2268 ldr r2, [r4] + 219:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** + 486 .loc 1 219 17 view .LVU170 + 487 0098 5368 ldr r3, [r2, #4] + 219:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** + 488 .loc 1 219 23 view .LVU171 + 489 009a 5021 movs r1, #80 + 490 009c 0B43 orrs r3, r1 + 491 009e 5360 str r3, [r2, #4] + 222:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** + 492 .loc 1 222 3 is_stmt 1 view .LVU172 + ARM GAS /tmp/ccUWVJFr.s page 54 + + + 222:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** + 493 .loc 1 222 23 is_stmt 0 view .LVU173 + 494 00a0 0123 movs r3, #1 + 495 00a2 4622 movs r2, #70 + 496 00a4 A354 strb r3, [r4, r2] + 225:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** TIM_CHANNEL_STATE_SET(htim, TIM_CHANNEL_2, HAL_TIM_CHANNEL_STATE_READY); + 497 .loc 1 225 3 is_stmt 1 view .LVU174 + 498 00a6 083A subs r2, r2, #8 + 499 00a8 A354 strb r3, [r4, r2] + 226:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** TIM_CHANNEL_N_STATE_SET(htim, TIM_CHANNEL_1, HAL_TIM_CHANNEL_STATE_READY); + 500 .loc 1 226 3 view .LVU175 + 501 00aa 0132 adds r2, r2, #1 + 502 00ac A354 strb r3, [r4, r2] + 227:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** TIM_CHANNEL_N_STATE_SET(htim, TIM_CHANNEL_2, HAL_TIM_CHANNEL_STATE_READY); + 503 .loc 1 227 3 view .LVU176 + 504 00ae 0332 adds r2, r2, #3 + 505 00b0 A354 strb r3, [r4, r2] + 228:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** + 506 .loc 1 228 3 view .LVU177 + 507 00b2 0132 adds r2, r2, #1 + 508 00b4 A354 strb r3, [r4, r2] + 231:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** + 509 .loc 1 231 3 view .LVU178 + 231:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** + 510 .loc 1 231 15 is_stmt 0 view .LVU179 + 511 00b6 A355 strb r3, [r4, r6] + 233:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** } + 512 .loc 1 233 3 is_stmt 1 view .LVU180 + 233:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** } + 513 .loc 1 233 10 is_stmt 0 view .LVU181 + 514 00b8 0020 movs r0, #0 + 515 .L20: + 234:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** + 516 .loc 1 234 1 view .LVU182 + 517 00ba 09B0 add sp, sp, #36 + 518 @ sp needed + 519 .LVL23: + 520 .LVL24: + 234:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** + 521 .loc 1 234 1 view .LVU183 + 522 00bc F0BD pop {r4, r5, r6, r7, pc} + 523 .LVL25: + 524 .L23: + 162:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** + 525 .loc 1 162 5 is_stmt 1 view .LVU184 + 162:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** + 526 .loc 1 162 16 is_stmt 0 view .LVU185 + 527 00be 3C33 adds r3, r3, #60 + 528 00c0 0022 movs r2, #0 + 529 00c2 C254 strb r2, [r0, r3] + 176:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** #endif /* USE_HAL_TIM_REGISTER_CALLBACKS */ + 530 .loc 1 176 5 is_stmt 1 view .LVU186 + 531 00c4 FFF7FEFF bl HAL_TIMEx_HallSensor_MspInit + 532 .LVL26: + 176:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** #endif /* USE_HAL_TIM_REGISTER_CALLBACKS */ + 533 .loc 1 176 5 is_stmt 0 view .LVU187 + 534 00c8 A4E7 b .L21 + ARM GAS /tmp/ccUWVJFr.s page 55 + + + 535 .LVL27: + 536 .L22: + 146:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** } + 537 .loc 1 146 12 view .LVU188 + 538 00ca 0120 movs r0, #1 + 539 .LVL28: + 146:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** } + 540 .loc 1 146 12 view .LVU189 + 541 00cc F5E7 b .L20 + 542 .cfi_endproc + 543 .LFE40: + 545 .section .text.HAL_TIMEx_HallSensor_MspDeInit,"ax",%progbits + 546 .align 1 + 547 .weak HAL_TIMEx_HallSensor_MspDeInit + 548 .syntax unified + 549 .code 16 + 550 .thumb_func + 552 HAL_TIMEx_HallSensor_MspDeInit: + 553 .LVL29: + 554 .LFB43: + 302:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** /* Prevent unused argument(s) compilation warning */ + 555 .loc 1 302 1 is_stmt 1 view -0 + 556 .cfi_startproc + 557 @ args = 0, pretend = 0, frame = 0 + 558 @ frame_needed = 0, uses_anonymous_args = 0 + 559 @ link register save eliminated. + 304:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** + 560 .loc 1 304 3 view .LVU191 + 309:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** + 561 .loc 1 309 1 is_stmt 0 view .LVU192 + 562 @ sp needed + 563 0000 7047 bx lr + 564 .cfi_endproc + 565 .LFE43: + 567 .section .text.HAL_TIMEx_HallSensor_DeInit,"ax",%progbits + 568 .align 1 + 569 .global HAL_TIMEx_HallSensor_DeInit + 570 .syntax unified + 571 .code 16 + 572 .thumb_func + 574 HAL_TIMEx_HallSensor_DeInit: + 575 .LVL30: + 576 .LFB41: + 242:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** /* Check the parameters */ + 577 .loc 1 242 1 is_stmt 1 view -0 + 578 .cfi_startproc + 579 @ args = 0, pretend = 0, frame = 0 + 580 @ frame_needed = 0, uses_anonymous_args = 0 + 242:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** /* Check the parameters */ + 581 .loc 1 242 1 is_stmt 0 view .LVU194 + 582 0000 10B5 push {r4, lr} + 583 .cfi_def_cfa_offset 8 + 584 .cfi_offset 4, -8 + 585 .cfi_offset 14, -4 + 586 0002 0400 movs r4, r0 + 244:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** + 587 .loc 1 244 3 is_stmt 1 view .LVU195 + ARM GAS /tmp/ccUWVJFr.s page 56 + + + 246:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** + 588 .loc 1 246 3 view .LVU196 + 246:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** + 589 .loc 1 246 15 is_stmt 0 view .LVU197 + 590 0004 3D23 movs r3, #61 + 591 0006 0222 movs r2, #2 + 592 0008 C254 strb r2, [r0, r3] + 249:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** + 593 .loc 1 249 3 is_stmt 1 view .LVU198 + 249:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** + 594 .loc 1 249 3 view .LVU199 + 595 000a 0368 ldr r3, [r0] + 596 000c 196A ldr r1, [r3, #32] + 597 000e 0F4A ldr r2, .L27 + 598 0010 1142 tst r1, r2 + 599 0012 07D1 bne .L26 + 249:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** + 600 .loc 1 249 3 discriminator 1 view .LVU200 + 601 0014 196A ldr r1, [r3, #32] + 602 0016 0E4A ldr r2, .L27+4 + 603 0018 1142 tst r1, r2 + 604 001a 03D1 bne .L26 + 249:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** + 605 .loc 1 249 3 discriminator 3 view .LVU201 + 606 001c 1A68 ldr r2, [r3] + 607 001e 0121 movs r1, #1 + 608 0020 8A43 bics r2, r1 + 609 0022 1A60 str r2, [r3] + 610 .L26: + 249:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** + 611 .loc 1 249 3 discriminator 5 view .LVU202 + 260:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** #endif /* USE_HAL_TIM_REGISTER_CALLBACKS */ + 612 .loc 1 260 3 view .LVU203 + 613 0024 2000 movs r0, r4 + 614 .LVL31: + 260:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** #endif /* USE_HAL_TIM_REGISTER_CALLBACKS */ + 615 .loc 1 260 3 is_stmt 0 view .LVU204 + 616 0026 FFF7FEFF bl HAL_TIMEx_HallSensor_MspDeInit + 617 .LVL32: + 264:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** + 618 .loc 1 264 3 is_stmt 1 view .LVU205 + 264:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** + 619 .loc 1 264 23 is_stmt 0 view .LVU206 + 620 002a 0023 movs r3, #0 + 621 002c 4622 movs r2, #70 + 622 002e A354 strb r3, [r4, r2] + 267:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** TIM_CHANNEL_STATE_SET(htim, TIM_CHANNEL_2, HAL_TIM_CHANNEL_STATE_RESET); + 623 .loc 1 267 3 is_stmt 1 view .LVU207 + 624 0030 083A subs r2, r2, #8 + 625 0032 A354 strb r3, [r4, r2] + 268:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** TIM_CHANNEL_N_STATE_SET(htim, TIM_CHANNEL_1, HAL_TIM_CHANNEL_STATE_RESET); + 626 .loc 1 268 3 view .LVU208 + 627 0034 0132 adds r2, r2, #1 + 628 0036 A354 strb r3, [r4, r2] + 269:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** TIM_CHANNEL_N_STATE_SET(htim, TIM_CHANNEL_2, HAL_TIM_CHANNEL_STATE_RESET); + 629 .loc 1 269 3 view .LVU209 + 630 0038 0332 adds r2, r2, #3 + ARM GAS /tmp/ccUWVJFr.s page 57 + + + 631 003a A354 strb r3, [r4, r2] + 270:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** + 632 .loc 1 270 3 view .LVU210 + 633 003c 0132 adds r2, r2, #1 + 634 003e A354 strb r3, [r4, r2] + 273:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** + 635 .loc 1 273 3 view .LVU211 + 273:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** + 636 .loc 1 273 15 is_stmt 0 view .LVU212 + 637 0040 063A subs r2, r2, #6 + 638 0042 A354 strb r3, [r4, r2] + 276:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** + 639 .loc 1 276 3 is_stmt 1 view .LVU213 + 276:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** + 640 .loc 1 276 3 view .LVU214 + 641 0044 013A subs r2, r2, #1 + 642 0046 A354 strb r3, [r4, r2] + 276:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** + 643 .loc 1 276 3 view .LVU215 + 278:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** } + 644 .loc 1 278 3 view .LVU216 + 279:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** + 645 .loc 1 279 1 is_stmt 0 view .LVU217 + 646 0048 0020 movs r0, #0 + 647 @ sp needed + 648 .LVL33: + 279:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** + 649 .loc 1 279 1 view .LVU218 + 650 004a 10BD pop {r4, pc} + 651 .L28: + 652 .align 2 + 653 .L27: + 654 004c 11110000 .word 4369 + 655 0050 44040000 .word 1092 + 656 .cfi_endproc + 657 .LFE41: + 659 .section .text.HAL_TIMEx_HallSensor_Start,"ax",%progbits + 660 .align 1 + 661 .global HAL_TIMEx_HallSensor_Start + 662 .syntax unified + 663 .code 16 + 664 .thumb_func + 666 HAL_TIMEx_HallSensor_Start: + 667 .LVL34: + 668 .LFB44: + 317:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** uint32_t tmpsmcr; + 669 .loc 1 317 1 is_stmt 1 view -0 + 670 .cfi_startproc + 671 @ args = 0, pretend = 0, frame = 0 + 672 @ frame_needed = 0, uses_anonymous_args = 0 + 317:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** uint32_t tmpsmcr; + 673 .loc 1 317 1 is_stmt 0 view .LVU220 + 674 0000 70B5 push {r4, r5, r6, lr} + 675 .cfi_def_cfa_offset 16 + 676 .cfi_offset 4, -16 + 677 .cfi_offset 5, -12 + 678 .cfi_offset 6, -8 + ARM GAS /tmp/ccUWVJFr.s page 58 + + + 679 .cfi_offset 14, -4 + 680 0002 0400 movs r4, r0 + 318:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** HAL_TIM_ChannelStateTypeDef channel_1_state = TIM_CHANNEL_STATE_GET(htim, TIM_CHANNEL_1); + 681 .loc 1 318 3 is_stmt 1 view .LVU221 + 319:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** HAL_TIM_ChannelStateTypeDef channel_2_state = TIM_CHANNEL_STATE_GET(htim, TIM_CHANNEL_2); + 682 .loc 1 319 3 view .LVU222 + 319:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** HAL_TIM_ChannelStateTypeDef channel_2_state = TIM_CHANNEL_STATE_GET(htim, TIM_CHANNEL_2); + 683 .loc 1 319 31 is_stmt 0 view .LVU223 + 684 0004 3E23 movs r3, #62 + 685 0006 C55C ldrb r5, [r0, r3] + 686 0008 E8B2 uxtb r0, r5 + 687 .LVL35: + 320:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** HAL_TIM_ChannelStateTypeDef complementary_channel_1_state = TIM_CHANNEL_N_STATE_GET(htim, TIM_CHA + 688 .loc 1 320 3 is_stmt 1 view .LVU224 + 320:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** HAL_TIM_ChannelStateTypeDef complementary_channel_1_state = TIM_CHANNEL_N_STATE_GET(htim, TIM_CHA + 689 .loc 1 320 31 is_stmt 0 view .LVU225 + 690 000a 0133 adds r3, r3, #1 + 691 000c E35C ldrb r3, [r4, r3] + 692 000e DBB2 uxtb r3, r3 + 693 .LVL36: + 321:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** HAL_TIM_ChannelStateTypeDef complementary_channel_2_state = TIM_CHANNEL_N_STATE_GET(htim, TIM_CHA + 694 .loc 1 321 3 is_stmt 1 view .LVU226 + 321:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** HAL_TIM_ChannelStateTypeDef complementary_channel_2_state = TIM_CHANNEL_N_STATE_GET(htim, TIM_CHA + 695 .loc 1 321 31 is_stmt 0 view .LVU227 + 696 0010 4222 movs r2, #66 + 697 0012 A25C ldrb r2, [r4, r2] + 698 0014 D2B2 uxtb r2, r2 + 699 .LVL37: + 322:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** + 700 .loc 1 322 3 is_stmt 1 view .LVU228 + 322:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** + 701 .loc 1 322 31 is_stmt 0 view .LVU229 + 702 0016 4321 movs r1, #67 + 703 0018 615C ldrb r1, [r4, r1] + 704 001a C9B2 uxtb r1, r1 + 705 .LVL38: + 325:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** + 706 .loc 1 325 3 is_stmt 1 view .LVU230 + 328:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** || (channel_2_state != HAL_TIM_CHANNEL_STATE_READY) + 707 .loc 1 328 3 view .LVU231 + 328:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** || (channel_2_state != HAL_TIM_CHANNEL_STATE_READY) + 708 .loc 1 328 6 is_stmt 0 view .LVU232 + 709 001c 012D cmp r5, #1 + 710 001e 31D1 bne .L33 + 329:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** || (complementary_channel_1_state != HAL_TIM_CHANNEL_STATE_READY) + 711 .loc 1 329 7 view .LVU233 + 712 0020 012B cmp r3, #1 + 713 0022 30D1 bne .L30 + 330:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** || (complementary_channel_2_state != HAL_TIM_CHANNEL_STATE_READY)) + 714 .loc 1 330 7 view .LVU234 + 715 0024 012A cmp r2, #1 + 716 0026 2FD1 bne .L34 + 331:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** { + 717 .loc 1 331 7 view .LVU235 + 718 0028 0129 cmp r1, #1 + 719 002a 01D0 beq .L37 + 333:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** } + ARM GAS /tmp/ccUWVJFr.s page 59 + + + 720 .loc 1 333 12 view .LVU236 + 721 002c 1000 movs r0, r2 + 722 .LVL39: + 333:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** } + 723 .loc 1 333 12 view .LVU237 + 724 002e 2AE0 b .L30 + 725 .LVL40: + 726 .L37: + 337:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** TIM_CHANNEL_STATE_SET(htim, TIM_CHANNEL_2, HAL_TIM_CHANNEL_STATE_BUSY); + 727 .loc 1 337 3 is_stmt 1 view .LVU238 + 728 0030 0133 adds r3, r3, #1 + 729 .LVL41: + 337:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** TIM_CHANNEL_STATE_SET(htim, TIM_CHANNEL_2, HAL_TIM_CHANNEL_STATE_BUSY); + 730 .loc 1 337 3 is_stmt 0 view .LVU239 + 731 0032 3D32 adds r2, r2, #61 + 732 .LVL42: + 337:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** TIM_CHANNEL_STATE_SET(htim, TIM_CHANNEL_2, HAL_TIM_CHANNEL_STATE_BUSY); + 733 .loc 1 337 3 view .LVU240 + 734 0034 A354 strb r3, [r4, r2] + 338:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** TIM_CHANNEL_N_STATE_SET(htim, TIM_CHANNEL_1, HAL_TIM_CHANNEL_STATE_BUSY); + 735 .loc 1 338 3 is_stmt 1 view .LVU241 + 736 0036 0132 adds r2, r2, #1 + 737 .LVL43: + 338:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** TIM_CHANNEL_N_STATE_SET(htim, TIM_CHANNEL_1, HAL_TIM_CHANNEL_STATE_BUSY); + 738 .loc 1 338 3 is_stmt 0 view .LVU242 + 739 0038 A354 strb r3, [r4, r2] + 339:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** TIM_CHANNEL_N_STATE_SET(htim, TIM_CHANNEL_2, HAL_TIM_CHANNEL_STATE_BUSY); + 740 .loc 1 339 3 is_stmt 1 view .LVU243 + 741 003a 0332 adds r2, r2, #3 + 742 .LVL44: + 339:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** TIM_CHANNEL_N_STATE_SET(htim, TIM_CHANNEL_2, HAL_TIM_CHANNEL_STATE_BUSY); + 743 .loc 1 339 3 is_stmt 0 view .LVU244 + 744 003c A354 strb r3, [r4, r2] + 340:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** + 745 .loc 1 340 3 is_stmt 1 view .LVU245 + 746 003e 0132 adds r2, r2, #1 + 747 .LVL45: + 340:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** + 748 .loc 1 340 3 is_stmt 0 view .LVU246 + 749 0040 A354 strb r3, [r4, r2] + 345:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** + 750 .loc 1 345 3 is_stmt 1 view .LVU247 + 751 0042 2068 ldr r0, [r4] + 752 .LVL46: + 345:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** + 753 .loc 1 345 3 is_stmt 0 view .LVU248 + 754 0044 423A subs r2, r2, #66 + 755 .LVL47: + 345:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** + 756 .loc 1 345 3 view .LVU249 + 757 0046 0021 movs r1, #0 + 758 .LVL48: + 345:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** + 759 .loc 1 345 3 view .LVU250 + 760 0048 FFF7FEFF bl TIM_CCxChannelCmd + 761 .LVL49: + 348:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** { + ARM GAS /tmp/ccUWVJFr.s page 60 + + + 762 .loc 1 348 3 is_stmt 1 view .LVU251 + 348:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** { + 763 .loc 1 348 7 is_stmt 0 view .LVU252 + 764 004c 2368 ldr r3, [r4] + 348:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** { + 765 .loc 1 348 6 view .LVU253 + 766 004e 104A ldr r2, .L38 + 767 0050 9342 cmp r3, r2 + 768 0052 0CD0 beq .L31 + 348:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** { + 769 .loc 1 348 7 discriminator 1 view .LVU254 + 770 0054 8022 movs r2, #128 + 771 0056 D205 lsls r2, r2, #23 + 772 0058 9342 cmp r3, r2 + 773 005a 08D0 beq .L31 + 348:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** { + 774 .loc 1 348 7 discriminator 2 view .LVU255 + 775 005c 0D4A ldr r2, .L38+4 + 776 005e 9342 cmp r3, r2 + 777 0060 05D0 beq .L31 + 358:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** } + 778 .loc 1 358 5 is_stmt 1 view .LVU256 + 779 0062 1A68 ldr r2, [r3] + 780 0064 0121 movs r1, #1 + 781 0066 0A43 orrs r2, r1 + 782 0068 1A60 str r2, [r3] + 362:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** } + 783 .loc 1 362 10 is_stmt 0 view .LVU257 + 784 006a 0020 movs r0, #0 + 785 006c 0BE0 b .L30 + 786 .L31: + 350:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** if (!IS_TIM_SLAVEMODE_TRIGGER_ENABLED(tmpsmcr)) + 787 .loc 1 350 5 is_stmt 1 view .LVU258 + 350:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** if (!IS_TIM_SLAVEMODE_TRIGGER_ENABLED(tmpsmcr)) + 788 .loc 1 350 29 is_stmt 0 view .LVU259 + 789 006e 9968 ldr r1, [r3, #8] + 350:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** if (!IS_TIM_SLAVEMODE_TRIGGER_ENABLED(tmpsmcr)) + 790 .loc 1 350 13 view .LVU260 + 791 0070 0722 movs r2, #7 + 792 0072 0A40 ands r2, r1 + 793 .LVL50: + 351:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** { + 794 .loc 1 351 5 is_stmt 1 view .LVU261 + 351:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** { + 795 .loc 1 351 8 is_stmt 0 view .LVU262 + 796 0074 062A cmp r2, #6 + 797 0076 09D0 beq .L36 + 353:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** } + 798 .loc 1 353 7 is_stmt 1 view .LVU263 + 799 0078 1A68 ldr r2, [r3] + 800 .LVL51: + 353:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** } + 801 .loc 1 353 7 is_stmt 0 view .LVU264 + 802 007a 0121 movs r1, #1 + 803 .LVL52: + 353:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** } + 804 .loc 1 353 7 view .LVU265 + ARM GAS /tmp/ccUWVJFr.s page 61 + + + 805 007c 0A43 orrs r2, r1 + 806 007e 1A60 str r2, [r3] + 362:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** } + 807 .loc 1 362 10 view .LVU266 + 808 0080 0020 movs r0, #0 + 809 0082 00E0 b .L30 + 810 .LVL53: + 811 .L33: + 333:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** } + 812 .loc 1 333 12 view .LVU267 + 813 0084 0120 movs r0, #1 + 814 .LVL54: + 815 .L30: + 363:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** + 816 .loc 1 363 1 view .LVU268 + 817 @ sp needed + 818 .LVL55: + 819 .LVL56: + 363:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** + 820 .loc 1 363 1 view .LVU269 + 821 0086 70BD pop {r4, r5, r6, pc} + 822 .LVL57: + 823 .L34: + 333:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** } + 824 .loc 1 333 12 view .LVU270 + 825 0088 1800 movs r0, r3 + 826 .LVL58: + 333:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** } + 827 .loc 1 333 12 view .LVU271 + 828 008a FCE7 b .L30 + 829 .LVL59: + 830 .L36: + 362:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** } + 831 .loc 1 362 10 view .LVU272 + 832 008c 0020 movs r0, #0 + 833 008e FAE7 b .L30 + 834 .L39: + 835 .align 2 + 836 .L38: + 837 0090 002C0140 .word 1073818624 + 838 0094 00040040 .word 1073742848 + 839 .cfi_endproc + 840 .LFE44: + 842 .section .text.HAL_TIMEx_HallSensor_Stop,"ax",%progbits + 843 .align 1 + 844 .global HAL_TIMEx_HallSensor_Stop + 845 .syntax unified + 846 .code 16 + 847 .thumb_func + 849 HAL_TIMEx_HallSensor_Stop: + 850 .LVL60: + 851 .LFB45: + 371:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** /* Check the parameters */ + 852 .loc 1 371 1 is_stmt 1 view -0 + 853 .cfi_startproc + 854 @ args = 0, pretend = 0, frame = 0 + 855 @ frame_needed = 0, uses_anonymous_args = 0 + ARM GAS /tmp/ccUWVJFr.s page 62 + + + 371:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** /* Check the parameters */ + 856 .loc 1 371 1 is_stmt 0 view .LVU274 + 857 0000 10B5 push {r4, lr} + 858 .cfi_def_cfa_offset 8 + 859 .cfi_offset 4, -8 + 860 .cfi_offset 14, -4 + 861 0002 0400 movs r4, r0 + 373:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** + 862 .loc 1 373 3 is_stmt 1 view .LVU275 + 378:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** + 863 .loc 1 378 3 view .LVU276 + 864 0004 0068 ldr r0, [r0] + 865 .LVL61: + 378:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** + 866 .loc 1 378 3 is_stmt 0 view .LVU277 + 867 0006 0022 movs r2, #0 + 868 0008 0021 movs r1, #0 + 869 000a FFF7FEFF bl TIM_CCxChannelCmd + 870 .LVL62: + 381:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** + 871 .loc 1 381 3 is_stmt 1 view .LVU278 + 381:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** + 872 .loc 1 381 3 view .LVU279 + 873 000e 2368 ldr r3, [r4] + 874 0010 196A ldr r1, [r3, #32] + 875 0012 0B4A ldr r2, .L42 + 876 0014 1142 tst r1, r2 + 877 0016 07D1 bne .L41 + 381:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** + 878 .loc 1 381 3 discriminator 1 view .LVU280 + 879 0018 196A ldr r1, [r3, #32] + 880 001a 0A4A ldr r2, .L42+4 + 881 001c 1142 tst r1, r2 + 882 001e 03D1 bne .L41 + 381:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** + 883 .loc 1 381 3 discriminator 3 view .LVU281 + 884 0020 1A68 ldr r2, [r3] + 885 0022 0121 movs r1, #1 + 886 0024 8A43 bics r2, r1 + 887 0026 1A60 str r2, [r3] + 888 .L41: + 381:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** + 889 .loc 1 381 3 discriminator 5 view .LVU282 + 384:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** TIM_CHANNEL_STATE_SET(htim, TIM_CHANNEL_2, HAL_TIM_CHANNEL_STATE_READY); + 890 .loc 1 384 3 view .LVU283 + 891 0028 0123 movs r3, #1 + 892 002a 3E22 movs r2, #62 + 893 002c A354 strb r3, [r4, r2] + 385:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** TIM_CHANNEL_N_STATE_SET(htim, TIM_CHANNEL_1, HAL_TIM_CHANNEL_STATE_READY); + 894 .loc 1 385 3 view .LVU284 + 895 002e 0132 adds r2, r2, #1 + 896 0030 A354 strb r3, [r4, r2] + 386:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** TIM_CHANNEL_N_STATE_SET(htim, TIM_CHANNEL_2, HAL_TIM_CHANNEL_STATE_READY); + 897 .loc 1 386 3 view .LVU285 + 898 0032 0332 adds r2, r2, #3 + 899 0034 A354 strb r3, [r4, r2] + 387:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** + ARM GAS /tmp/ccUWVJFr.s page 63 + + + 900 .loc 1 387 3 view .LVU286 + 901 0036 0132 adds r2, r2, #1 + 902 0038 A354 strb r3, [r4, r2] + 390:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** } + 903 .loc 1 390 3 view .LVU287 + 391:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** + 904 .loc 1 391 1 is_stmt 0 view .LVU288 + 905 003a 0020 movs r0, #0 + 906 @ sp needed + 907 .LVL63: + 391:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** + 908 .loc 1 391 1 view .LVU289 + 909 003c 10BD pop {r4, pc} + 910 .L43: + 911 003e C046 .align 2 + 912 .L42: + 913 0040 11110000 .word 4369 + 914 0044 44040000 .word 1092 + 915 .cfi_endproc + 916 .LFE45: + 918 .section .text.HAL_TIMEx_HallSensor_Start_IT,"ax",%progbits + 919 .align 1 + 920 .global HAL_TIMEx_HallSensor_Start_IT + 921 .syntax unified + 922 .code 16 + 923 .thumb_func + 925 HAL_TIMEx_HallSensor_Start_IT: + 926 .LVL64: + 927 .LFB46: + 399:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** uint32_t tmpsmcr; + 928 .loc 1 399 1 is_stmt 1 view -0 + 929 .cfi_startproc + 930 @ args = 0, pretend = 0, frame = 0 + 931 @ frame_needed = 0, uses_anonymous_args = 0 + 399:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** uint32_t tmpsmcr; + 932 .loc 1 399 1 is_stmt 0 view .LVU291 + 933 0000 70B5 push {r4, r5, r6, lr} + 934 .cfi_def_cfa_offset 16 + 935 .cfi_offset 4, -16 + 936 .cfi_offset 5, -12 + 937 .cfi_offset 6, -8 + 938 .cfi_offset 14, -4 + 939 0002 0400 movs r4, r0 + 400:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** HAL_TIM_ChannelStateTypeDef channel_1_state = TIM_CHANNEL_STATE_GET(htim, TIM_CHANNEL_1); + 940 .loc 1 400 3 is_stmt 1 view .LVU292 + 401:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** HAL_TIM_ChannelStateTypeDef channel_2_state = TIM_CHANNEL_STATE_GET(htim, TIM_CHANNEL_2); + 941 .loc 1 401 3 view .LVU293 + 401:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** HAL_TIM_ChannelStateTypeDef channel_2_state = TIM_CHANNEL_STATE_GET(htim, TIM_CHANNEL_2); + 942 .loc 1 401 31 is_stmt 0 view .LVU294 + 943 0004 3E23 movs r3, #62 + 944 0006 C55C ldrb r5, [r0, r3] + 945 0008 E8B2 uxtb r0, r5 + 946 .LVL65: + 402:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** HAL_TIM_ChannelStateTypeDef complementary_channel_1_state = TIM_CHANNEL_N_STATE_GET(htim, TIM_CHA + 947 .loc 1 402 3 is_stmt 1 view .LVU295 + 402:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** HAL_TIM_ChannelStateTypeDef complementary_channel_1_state = TIM_CHANNEL_N_STATE_GET(htim, TIM_CHA + 948 .loc 1 402 31 is_stmt 0 view .LVU296 + ARM GAS /tmp/ccUWVJFr.s page 64 + + + 949 000a 0133 adds r3, r3, #1 + 950 000c E35C ldrb r3, [r4, r3] + 951 000e DBB2 uxtb r3, r3 + 952 .LVL66: + 403:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** HAL_TIM_ChannelStateTypeDef complementary_channel_2_state = TIM_CHANNEL_N_STATE_GET(htim, TIM_CHA + 953 .loc 1 403 3 is_stmt 1 view .LVU297 + 403:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** HAL_TIM_ChannelStateTypeDef complementary_channel_2_state = TIM_CHANNEL_N_STATE_GET(htim, TIM_CHA + 954 .loc 1 403 31 is_stmt 0 view .LVU298 + 955 0010 4222 movs r2, #66 + 956 0012 A25C ldrb r2, [r4, r2] + 957 0014 D2B2 uxtb r2, r2 + 958 .LVL67: + 404:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** + 959 .loc 1 404 3 is_stmt 1 view .LVU299 + 404:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** + 960 .loc 1 404 31 is_stmt 0 view .LVU300 + 961 0016 4321 movs r1, #67 + 962 0018 615C ldrb r1, [r4, r1] + 963 001a C9B2 uxtb r1, r1 + 964 .LVL68: + 407:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** + 965 .loc 1 407 3 is_stmt 1 view .LVU301 + 410:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** || (channel_2_state != HAL_TIM_CHANNEL_STATE_READY) + 966 .loc 1 410 3 view .LVU302 + 410:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** || (channel_2_state != HAL_TIM_CHANNEL_STATE_READY) + 967 .loc 1 410 6 is_stmt 0 view .LVU303 + 968 001c 012D cmp r5, #1 + 969 001e 35D1 bne .L48 + 411:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** || (complementary_channel_1_state != HAL_TIM_CHANNEL_STATE_READY) + 970 .loc 1 411 7 view .LVU304 + 971 0020 012B cmp r3, #1 + 972 0022 34D1 bne .L45 + 412:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** || (complementary_channel_2_state != HAL_TIM_CHANNEL_STATE_READY)) + 973 .loc 1 412 7 view .LVU305 + 974 0024 012A cmp r2, #1 + 975 0026 33D1 bne .L49 + 413:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** { + 976 .loc 1 413 7 view .LVU306 + 977 0028 0129 cmp r1, #1 + 978 002a 01D0 beq .L52 + 415:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** } + 979 .loc 1 415 12 view .LVU307 + 980 002c 1000 movs r0, r2 + 981 .LVL69: + 415:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** } + 982 .loc 1 415 12 view .LVU308 + 983 002e 2EE0 b .L45 + 984 .LVL70: + 985 .L52: + 419:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** TIM_CHANNEL_STATE_SET(htim, TIM_CHANNEL_2, HAL_TIM_CHANNEL_STATE_BUSY); + 986 .loc 1 419 3 is_stmt 1 view .LVU309 + 987 0030 0133 adds r3, r3, #1 + 988 .LVL71: + 419:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** TIM_CHANNEL_STATE_SET(htim, TIM_CHANNEL_2, HAL_TIM_CHANNEL_STATE_BUSY); + 989 .loc 1 419 3 is_stmt 0 view .LVU310 + 990 0032 3D32 adds r2, r2, #61 + 991 .LVL72: + ARM GAS /tmp/ccUWVJFr.s page 65 + + + 419:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** TIM_CHANNEL_STATE_SET(htim, TIM_CHANNEL_2, HAL_TIM_CHANNEL_STATE_BUSY); + 992 .loc 1 419 3 view .LVU311 + 993 0034 A354 strb r3, [r4, r2] + 420:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** TIM_CHANNEL_N_STATE_SET(htim, TIM_CHANNEL_1, HAL_TIM_CHANNEL_STATE_BUSY); + 994 .loc 1 420 3 is_stmt 1 view .LVU312 + 995 0036 0132 adds r2, r2, #1 + 996 .LVL73: + 420:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** TIM_CHANNEL_N_STATE_SET(htim, TIM_CHANNEL_1, HAL_TIM_CHANNEL_STATE_BUSY); + 997 .loc 1 420 3 is_stmt 0 view .LVU313 + 998 0038 A354 strb r3, [r4, r2] + 421:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** TIM_CHANNEL_N_STATE_SET(htim, TIM_CHANNEL_2, HAL_TIM_CHANNEL_STATE_BUSY); + 999 .loc 1 421 3 is_stmt 1 view .LVU314 + 1000 003a 0332 adds r2, r2, #3 + 1001 .LVL74: + 421:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** TIM_CHANNEL_N_STATE_SET(htim, TIM_CHANNEL_2, HAL_TIM_CHANNEL_STATE_BUSY); + 1002 .loc 1 421 3 is_stmt 0 view .LVU315 + 1003 003c A354 strb r3, [r4, r2] + 422:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** + 1004 .loc 1 422 3 is_stmt 1 view .LVU316 + 1005 003e 0132 adds r2, r2, #1 + 1006 .LVL75: + 422:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** + 1007 .loc 1 422 3 is_stmt 0 view .LVU317 + 1008 0040 A354 strb r3, [r4, r2] + 425:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** + 1009 .loc 1 425 3 is_stmt 1 view .LVU318 + 1010 0042 2168 ldr r1, [r4] + 1011 .LVL76: + 425:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** + 1012 .loc 1 425 3 is_stmt 0 view .LVU319 + 1013 0044 CA68 ldr r2, [r1, #12] + 1014 .LVL77: + 425:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** + 1015 .loc 1 425 3 view .LVU320 + 1016 0046 1343 orrs r3, r2 + 1017 .LVL78: + 425:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** + 1018 .loc 1 425 3 view .LVU321 + 1019 0048 CB60 str r3, [r1, #12] + 430:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** + 1020 .loc 1 430 3 is_stmt 1 view .LVU322 + 1021 004a 2068 ldr r0, [r4] + 1022 .LVL79: + 430:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** + 1023 .loc 1 430 3 is_stmt 0 view .LVU323 + 1024 004c 0122 movs r2, #1 + 1025 004e 0021 movs r1, #0 + 1026 0050 FFF7FEFF bl TIM_CCxChannelCmd + 1027 .LVL80: + 433:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** { + 1028 .loc 1 433 3 is_stmt 1 view .LVU324 + 433:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** { + 1029 .loc 1 433 7 is_stmt 0 view .LVU325 + 1030 0054 2368 ldr r3, [r4] + 433:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** { + 1031 .loc 1 433 6 view .LVU326 + 1032 0056 104A ldr r2, .L53 + ARM GAS /tmp/ccUWVJFr.s page 66 + + + 1033 0058 9342 cmp r3, r2 + 1034 005a 0CD0 beq .L46 + 433:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** { + 1035 .loc 1 433 7 discriminator 1 view .LVU327 + 1036 005c 8022 movs r2, #128 + 1037 005e D205 lsls r2, r2, #23 + 1038 0060 9342 cmp r3, r2 + 1039 0062 08D0 beq .L46 + 433:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** { + 1040 .loc 1 433 7 discriminator 2 view .LVU328 + 1041 0064 0D4A ldr r2, .L53+4 + 1042 0066 9342 cmp r3, r2 + 1043 0068 05D0 beq .L46 + 443:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** } + 1044 .loc 1 443 5 is_stmt 1 view .LVU329 + 1045 006a 1A68 ldr r2, [r3] + 1046 006c 0121 movs r1, #1 + 1047 006e 0A43 orrs r2, r1 + 1048 0070 1A60 str r2, [r3] + 447:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** } + 1049 .loc 1 447 10 is_stmt 0 view .LVU330 + 1050 0072 0020 movs r0, #0 + 1051 0074 0BE0 b .L45 + 1052 .L46: + 435:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** if (!IS_TIM_SLAVEMODE_TRIGGER_ENABLED(tmpsmcr)) + 1053 .loc 1 435 5 is_stmt 1 view .LVU331 + 435:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** if (!IS_TIM_SLAVEMODE_TRIGGER_ENABLED(tmpsmcr)) + 1054 .loc 1 435 29 is_stmt 0 view .LVU332 + 1055 0076 9968 ldr r1, [r3, #8] + 435:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** if (!IS_TIM_SLAVEMODE_TRIGGER_ENABLED(tmpsmcr)) + 1056 .loc 1 435 13 view .LVU333 + 1057 0078 0722 movs r2, #7 + 1058 007a 0A40 ands r2, r1 + 1059 .LVL81: + 436:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** { + 1060 .loc 1 436 5 is_stmt 1 view .LVU334 + 436:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** { + 1061 .loc 1 436 8 is_stmt 0 view .LVU335 + 1062 007c 062A cmp r2, #6 + 1063 007e 09D0 beq .L51 + 438:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** } + 1064 .loc 1 438 7 is_stmt 1 view .LVU336 + 1065 0080 1A68 ldr r2, [r3] + 1066 .LVL82: + 438:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** } + 1067 .loc 1 438 7 is_stmt 0 view .LVU337 + 1068 0082 0121 movs r1, #1 + 1069 .LVL83: + 438:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** } + 1070 .loc 1 438 7 view .LVU338 + 1071 0084 0A43 orrs r2, r1 + 1072 0086 1A60 str r2, [r3] + 447:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** } + 1073 .loc 1 447 10 view .LVU339 + 1074 0088 0020 movs r0, #0 + 1075 008a 00E0 b .L45 + 1076 .LVL84: + ARM GAS /tmp/ccUWVJFr.s page 67 + + + 1077 .L48: + 415:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** } + 1078 .loc 1 415 12 view .LVU340 + 1079 008c 0120 movs r0, #1 + 1080 .LVL85: + 1081 .L45: + 448:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** + 1082 .loc 1 448 1 view .LVU341 + 1083 @ sp needed + 1084 .LVL86: + 1085 .LVL87: + 448:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** + 1086 .loc 1 448 1 view .LVU342 + 1087 008e 70BD pop {r4, r5, r6, pc} + 1088 .LVL88: + 1089 .L49: + 415:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** } + 1090 .loc 1 415 12 view .LVU343 + 1091 0090 1800 movs r0, r3 + 1092 .LVL89: + 415:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** } + 1093 .loc 1 415 12 view .LVU344 + 1094 0092 FCE7 b .L45 + 1095 .LVL90: + 1096 .L51: + 447:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** } + 1097 .loc 1 447 10 view .LVU345 + 1098 0094 0020 movs r0, #0 + 1099 0096 FAE7 b .L45 + 1100 .L54: + 1101 .align 2 + 1102 .L53: + 1103 0098 002C0140 .word 1073818624 + 1104 009c 00040040 .word 1073742848 + 1105 .cfi_endproc + 1106 .LFE46: + 1108 .section .text.HAL_TIMEx_HallSensor_Stop_IT,"ax",%progbits + 1109 .align 1 + 1110 .global HAL_TIMEx_HallSensor_Stop_IT + 1111 .syntax unified + 1112 .code 16 + 1113 .thumb_func + 1115 HAL_TIMEx_HallSensor_Stop_IT: + 1116 .LVL91: + 1117 .LFB47: + 456:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** /* Check the parameters */ + 1118 .loc 1 456 1 is_stmt 1 view -0 + 1119 .cfi_startproc + 1120 @ args = 0, pretend = 0, frame = 0 + 1121 @ frame_needed = 0, uses_anonymous_args = 0 + 456:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** /* Check the parameters */ + 1122 .loc 1 456 1 is_stmt 0 view .LVU347 + 1123 0000 10B5 push {r4, lr} + 1124 .cfi_def_cfa_offset 8 + 1125 .cfi_offset 4, -8 + 1126 .cfi_offset 14, -4 + 1127 0002 0400 movs r4, r0 + ARM GAS /tmp/ccUWVJFr.s page 68 + + + 458:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** + 1128 .loc 1 458 3 is_stmt 1 view .LVU348 + 463:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** + 1129 .loc 1 463 3 view .LVU349 + 1130 0004 0068 ldr r0, [r0] + 1131 .LVL92: + 463:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** + 1132 .loc 1 463 3 is_stmt 0 view .LVU350 + 1133 0006 0022 movs r2, #0 + 1134 0008 0021 movs r1, #0 + 1135 000a FFF7FEFF bl TIM_CCxChannelCmd + 1136 .LVL93: + 466:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** + 1137 .loc 1 466 3 is_stmt 1 view .LVU351 + 1138 000e 2268 ldr r2, [r4] + 1139 0010 D368 ldr r3, [r2, #12] + 1140 0012 0221 movs r1, #2 + 1141 0014 8B43 bics r3, r1 + 1142 0016 D360 str r3, [r2, #12] + 469:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** + 1143 .loc 1 469 3 view .LVU352 + 469:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** + 1144 .loc 1 469 3 view .LVU353 + 1145 0018 2368 ldr r3, [r4] + 1146 001a 196A ldr r1, [r3, #32] + 1147 001c 0A4A ldr r2, .L57 + 1148 001e 1142 tst r1, r2 + 1149 0020 07D1 bne .L56 + 469:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** + 1150 .loc 1 469 3 discriminator 1 view .LVU354 + 1151 0022 196A ldr r1, [r3, #32] + 1152 0024 094A ldr r2, .L57+4 + 1153 0026 1142 tst r1, r2 + 1154 0028 03D1 bne .L56 + 469:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** + 1155 .loc 1 469 3 discriminator 3 view .LVU355 + 1156 002a 1A68 ldr r2, [r3] + 1157 002c 0121 movs r1, #1 + 1158 002e 8A43 bics r2, r1 + 1159 0030 1A60 str r2, [r3] + 1160 .L56: + 469:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** + 1161 .loc 1 469 3 discriminator 5 view .LVU356 + 472:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** TIM_CHANNEL_STATE_SET(htim, TIM_CHANNEL_2, HAL_TIM_CHANNEL_STATE_READY); + 1162 .loc 1 472 3 view .LVU357 + 1163 0032 0123 movs r3, #1 + 1164 0034 3E22 movs r2, #62 + 1165 0036 A354 strb r3, [r4, r2] + 473:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** TIM_CHANNEL_N_STATE_SET(htim, TIM_CHANNEL_1, HAL_TIM_CHANNEL_STATE_READY); + 1166 .loc 1 473 3 view .LVU358 + 1167 0038 0132 adds r2, r2, #1 + 1168 003a A354 strb r3, [r4, r2] + 474:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** TIM_CHANNEL_N_STATE_SET(htim, TIM_CHANNEL_2, HAL_TIM_CHANNEL_STATE_READY); + 1169 .loc 1 474 3 view .LVU359 + 1170 003c 0332 adds r2, r2, #3 + 1171 003e A354 strb r3, [r4, r2] + 475:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** + ARM GAS /tmp/ccUWVJFr.s page 69 + + + 1172 .loc 1 475 3 view .LVU360 + 1173 0040 0132 adds r2, r2, #1 + 1174 0042 A354 strb r3, [r4, r2] + 478:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** } + 1175 .loc 1 478 3 view .LVU361 + 479:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** + 1176 .loc 1 479 1 is_stmt 0 view .LVU362 + 1177 0044 0020 movs r0, #0 + 1178 @ sp needed + 1179 .LVL94: + 479:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** + 1180 .loc 1 479 1 view .LVU363 + 1181 0046 10BD pop {r4, pc} + 1182 .L58: + 1183 .align 2 + 1184 .L57: + 1185 0048 11110000 .word 4369 + 1186 004c 44040000 .word 1092 + 1187 .cfi_endproc + 1188 .LFE47: + 1190 .section .text.HAL_TIMEx_HallSensor_Start_DMA,"ax",%progbits + 1191 .align 1 + 1192 .global HAL_TIMEx_HallSensor_Start_DMA + 1193 .syntax unified + 1194 .code 16 + 1195 .thumb_func + 1197 HAL_TIMEx_HallSensor_Start_DMA: + 1198 .LVL95: + 1199 .LFB48: + 489:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** uint32_t tmpsmcr; + 1200 .loc 1 489 1 is_stmt 1 view -0 + 1201 .cfi_startproc + 1202 @ args = 0, pretend = 0, frame = 0 + 1203 @ frame_needed = 0, uses_anonymous_args = 0 + 489:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** uint32_t tmpsmcr; + 1204 .loc 1 489 1 is_stmt 0 view .LVU365 + 1205 0000 F8B5 push {r3, r4, r5, r6, r7, lr} + 1206 .cfi_def_cfa_offset 24 + 1207 .cfi_offset 3, -24 + 1208 .cfi_offset 4, -20 + 1209 .cfi_offset 5, -16 + 1210 .cfi_offset 6, -12 + 1211 .cfi_offset 7, -8 + 1212 .cfi_offset 14, -4 + 1213 0002 0400 movs r4, r0 + 1214 0004 0E00 movs r6, r1 + 1215 0006 1700 movs r7, r2 + 490:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** HAL_TIM_ChannelStateTypeDef channel_1_state = TIM_CHANNEL_STATE_GET(htim, TIM_CHANNEL_1); + 1216 .loc 1 490 3 is_stmt 1 view .LVU366 + 491:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** HAL_TIM_ChannelStateTypeDef complementary_channel_1_state = TIM_CHANNEL_N_STATE_GET(htim, TIM_CHA + 1217 .loc 1 491 3 view .LVU367 + 491:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** HAL_TIM_ChannelStateTypeDef complementary_channel_1_state = TIM_CHANNEL_N_STATE_GET(htim, TIM_CHA + 1218 .loc 1 491 31 is_stmt 0 view .LVU368 + 1219 0008 3E23 movs r3, #62 + 1220 000a C35C ldrb r3, [r0, r3] + 1221 000c D8B2 uxtb r0, r3 + 1222 .LVL96: + ARM GAS /tmp/ccUWVJFr.s page 70 + + + 492:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** + 1223 .loc 1 492 3 is_stmt 1 view .LVU369 + 492:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** + 1224 .loc 1 492 31 is_stmt 0 view .LVU370 + 1225 000e 4222 movs r2, #66 + 1226 .LVL97: + 492:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** + 1227 .loc 1 492 31 view .LVU371 + 1228 0010 A55C ldrb r5, [r4, r2] + 1229 0012 EDB2 uxtb r5, r5 + 1230 .LVL98: + 495:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** + 1231 .loc 1 495 3 is_stmt 1 view .LVU372 + 498:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** || (complementary_channel_1_state == HAL_TIM_CHANNEL_STATE_BUSY)) + 1232 .loc 1 498 3 view .LVU373 + 498:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** || (complementary_channel_1_state == HAL_TIM_CHANNEL_STATE_BUSY)) + 1233 .loc 1 498 6 is_stmt 0 view .LVU374 + 1234 0014 022B cmp r3, #2 + 1235 0016 4AD0 beq .L60 + 499:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** { + 1236 .loc 1 499 7 view .LVU375 + 1237 0018 022D cmp r5, #2 + 1238 001a 45D0 beq .L63 + 503:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** && (complementary_channel_1_state == HAL_TIM_CHANNEL_STATE_READY)) + 1239 .loc 1 503 8 is_stmt 1 view .LVU376 + 503:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** && (complementary_channel_1_state == HAL_TIM_CHANNEL_STATE_READY)) + 1240 .loc 1 503 11 is_stmt 0 view .LVU377 + 1241 001c 0128 cmp r0, #1 + 1242 001e 45D1 bne .L64 + 504:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** { + 1243 .loc 1 504 12 view .LVU378 + 1244 0020 012D cmp r5, #1 + 1245 0022 44D1 bne .L60 + 506:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** { + 1246 .loc 1 506 5 is_stmt 1 view .LVU379 + 506:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** { + 1247 .loc 1 506 8 is_stmt 0 view .LVU380 + 1248 0024 0029 cmp r1, #0 + 1249 0026 43D0 beq .L65 + 506:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** { + 1250 .loc 1 506 25 discriminator 1 view .LVU381 + 1251 0028 002F cmp r7, #0 + 1252 002a 01D1 bne .L68 + 508:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** } + 1253 .loc 1 508 14 view .LVU382 + 1254 002c 2800 movs r0, r5 + 1255 .LVL99: + 508:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** } + 1256 .loc 1 508 14 view .LVU383 + 1257 002e 3EE0 b .L60 + 1258 .LVL100: + 1259 .L68: + 512:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** TIM_CHANNEL_N_STATE_SET(htim, TIM_CHANNEL_1, HAL_TIM_CHANNEL_STATE_BUSY); + 1260 .loc 1 512 7 is_stmt 1 view .LVU384 + 1261 0030 0223 movs r3, #2 + 1262 0032 043A subs r2, r2, #4 + 1263 0034 A354 strb r3, [r4, r2] + ARM GAS /tmp/ccUWVJFr.s page 71 + + + 513:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** } + 1264 .loc 1 513 7 view .LVU385 + 1265 0036 0432 adds r2, r2, #4 + 1266 0038 A354 strb r3, [r4, r2] + 524:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** + 1267 .loc 1 524 3 view .LVU386 + 1268 003a 2068 ldr r0, [r4] + 1269 .LVL101: + 524:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** + 1270 .loc 1 524 3 is_stmt 0 view .LVU387 + 1271 003c 413A subs r2, r2, #65 + 1272 003e 0021 movs r1, #0 + 1273 .LVL102: + 524:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** + 1274 .loc 1 524 3 view .LVU388 + 1275 0040 FFF7FEFF bl TIM_CCxChannelCmd + 1276 .LVL103: + 527:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** htim->hdma[TIM_DMA_ID_CC1]->XferHalfCpltCallback = TIM_DMACaptureHalfCplt; + 1277 .loc 1 527 3 is_stmt 1 view .LVU389 + 527:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** htim->hdma[TIM_DMA_ID_CC1]->XferHalfCpltCallback = TIM_DMACaptureHalfCplt; + 1278 .loc 1 527 13 is_stmt 0 view .LVU390 + 1279 0044 636A ldr r3, [r4, #36] + 527:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** htim->hdma[TIM_DMA_ID_CC1]->XferHalfCpltCallback = TIM_DMACaptureHalfCplt; + 1280 .loc 1 527 48 view .LVU391 + 1281 0046 1C4A ldr r2, .L69 + 1282 0048 9A62 str r2, [r3, #40] + 528:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** /* Set the DMA error callback */ + 1283 .loc 1 528 3 is_stmt 1 view .LVU392 + 528:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** /* Set the DMA error callback */ + 1284 .loc 1 528 13 is_stmt 0 view .LVU393 + 1285 004a 636A ldr r3, [r4, #36] + 528:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** /* Set the DMA error callback */ + 1286 .loc 1 528 52 view .LVU394 + 1287 004c 1B4A ldr r2, .L69+4 + 1288 004e DA62 str r2, [r3, #44] + 530:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** + 1289 .loc 1 530 3 is_stmt 1 view .LVU395 + 530:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** + 1290 .loc 1 530 13 is_stmt 0 view .LVU396 + 1291 0050 636A ldr r3, [r4, #36] + 530:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** + 1292 .loc 1 530 49 view .LVU397 + 1293 0052 1B4A ldr r2, .L69+8 + 1294 0054 1A63 str r2, [r3, #48] + 533:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** { + 1295 .loc 1 533 3 is_stmt 1 view .LVU398 + 533:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** { + 1296 .loc 1 533 67 is_stmt 0 view .LVU399 + 1297 0056 2168 ldr r1, [r4] + 533:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** { + 1298 .loc 1 533 62 view .LVU400 + 1299 0058 3431 adds r1, r1, #52 + 533:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** { + 1300 .loc 1 533 7 view .LVU401 + 1301 005a 606A ldr r0, [r4, #36] + 1302 005c 3B00 movs r3, r7 + 1303 005e 3200 movs r2, r6 + ARM GAS /tmp/ccUWVJFr.s page 72 + + + 1304 0060 FFF7FEFF bl HAL_DMA_Start_IT + 1305 .LVL104: + 533:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** { + 1306 .loc 1 533 6 discriminator 1 view .LVU402 + 1307 0064 0028 cmp r0, #0 + 1308 0066 25D1 bne .L67 + 539:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** + 1309 .loc 1 539 3 is_stmt 1 view .LVU403 + 1310 0068 2268 ldr r2, [r4] + 1311 006a D168 ldr r1, [r2, #12] + 1312 006c 8023 movs r3, #128 + 1313 006e 9B00 lsls r3, r3, #2 + 1314 0070 0B43 orrs r3, r1 + 1315 0072 D360 str r3, [r2, #12] + 542:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** { + 1316 .loc 1 542 3 view .LVU404 + 542:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** { + 1317 .loc 1 542 7 is_stmt 0 view .LVU405 + 1318 0074 2368 ldr r3, [r4] + 542:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** { + 1319 .loc 1 542 6 view .LVU406 + 1320 0076 134A ldr r2, .L69+12 + 1321 0078 9342 cmp r3, r2 + 1322 007a 0BD0 beq .L61 + 542:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** { + 1323 .loc 1 542 7 discriminator 1 view .LVU407 + 1324 007c 8022 movs r2, #128 + 1325 007e D205 lsls r2, r2, #23 + 1326 0080 9342 cmp r3, r2 + 1327 0082 07D0 beq .L61 + 542:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** { + 1328 .loc 1 542 7 discriminator 2 view .LVU408 + 1329 0084 104A ldr r2, .L69+16 + 1330 0086 9342 cmp r3, r2 + 1331 0088 04D0 beq .L61 + 552:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** } + 1332 .loc 1 552 5 is_stmt 1 view .LVU409 + 1333 008a 1A68 ldr r2, [r3] + 1334 008c 0121 movs r1, #1 + 1335 008e 0A43 orrs r2, r1 + 1336 0090 1A60 str r2, [r3] + 1337 0092 0CE0 b .L60 + 1338 .L61: + 544:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** if (!IS_TIM_SLAVEMODE_TRIGGER_ENABLED(tmpsmcr)) + 1339 .loc 1 544 5 view .LVU410 + 544:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** if (!IS_TIM_SLAVEMODE_TRIGGER_ENABLED(tmpsmcr)) + 1340 .loc 1 544 29 is_stmt 0 view .LVU411 + 1341 0094 9968 ldr r1, [r3, #8] + 544:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** if (!IS_TIM_SLAVEMODE_TRIGGER_ENABLED(tmpsmcr)) + 1342 .loc 1 544 13 view .LVU412 + 1343 0096 0722 movs r2, #7 + 1344 0098 0A40 ands r2, r1 + 1345 .LVL105: + 545:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** { + 1346 .loc 1 545 5 is_stmt 1 view .LVU413 + 545:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** { + 1347 .loc 1 545 8 is_stmt 0 view .LVU414 + ARM GAS /tmp/ccUWVJFr.s page 73 + + + 1348 009a 062A cmp r2, #6 + 1349 009c 07D0 beq .L60 + 547:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** } + 1350 .loc 1 547 7 is_stmt 1 view .LVU415 + 1351 009e 1A68 ldr r2, [r3] + 1352 .LVL106: + 547:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** } + 1353 .loc 1 547 7 is_stmt 0 view .LVU416 + 1354 00a0 0121 movs r1, #1 + 1355 .LVL107: + 547:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** } + 1356 .loc 1 547 7 view .LVU417 + 1357 00a2 0A43 orrs r2, r1 + 1358 00a4 1A60 str r2, [r3] + 1359 00a6 02E0 b .L60 + 1360 .LVL108: + 1361 .L63: + 501:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** } + 1362 .loc 1 501 12 view .LVU418 + 1363 00a8 2800 movs r0, r5 + 1364 .LVL109: + 501:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** } + 1365 .loc 1 501 12 view .LVU419 + 1366 00aa 00E0 b .L60 + 1367 .LVL110: + 1368 .L64: + 518:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** } + 1369 .loc 1 518 12 view .LVU420 + 1370 00ac 0120 movs r0, #1 + 1371 .LVL111: + 1372 .L60: + 557:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** + 1373 .loc 1 557 1 view .LVU421 + 1374 @ sp needed + 1375 .LVL112: + 1376 .LVL113: + 1377 .LVL114: + 1378 .LVL115: + 557:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** + 1379 .loc 1 557 1 view .LVU422 + 1380 00ae F8BD pop {r3, r4, r5, r6, r7, pc} + 1381 .LVL116: + 1382 .L65: + 508:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** } + 1383 .loc 1 508 14 view .LVU423 + 1384 00b0 2800 movs r0, r5 + 1385 .LVL117: + 508:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** } + 1386 .loc 1 508 14 view .LVU424 + 1387 00b2 FCE7 b .L60 + 1388 .LVL118: + 1389 .L67: + 536:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** } + 1390 .loc 1 536 12 view .LVU425 + 1391 00b4 2800 movs r0, r5 + 1392 00b6 FAE7 b .L60 + 1393 .L70: + ARM GAS /tmp/ccUWVJFr.s page 74 + + + 1394 .align 2 + 1395 .L69: + 1396 00b8 00000000 .word TIM_DMACaptureCplt + 1397 00bc 00000000 .word TIM_DMACaptureHalfCplt + 1398 00c0 00000000 .word TIM_DMAError + 1399 00c4 002C0140 .word 1073818624 + 1400 00c8 00040040 .word 1073742848 + 1401 .cfi_endproc + 1402 .LFE48: + 1404 .section .text.HAL_TIMEx_HallSensor_Stop_DMA,"ax",%progbits + 1405 .align 1 + 1406 .global HAL_TIMEx_HallSensor_Stop_DMA + 1407 .syntax unified + 1408 .code 16 + 1409 .thumb_func + 1411 HAL_TIMEx_HallSensor_Stop_DMA: + 1412 .LVL119: + 1413 .LFB49: + 565:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** /* Check the parameters */ + 1414 .loc 1 565 1 is_stmt 1 view -0 + 1415 .cfi_startproc + 1416 @ args = 0, pretend = 0, frame = 0 + 1417 @ frame_needed = 0, uses_anonymous_args = 0 + 565:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** /* Check the parameters */ + 1418 .loc 1 565 1 is_stmt 0 view .LVU427 + 1419 0000 10B5 push {r4, lr} + 1420 .cfi_def_cfa_offset 8 + 1421 .cfi_offset 4, -8 + 1422 .cfi_offset 14, -4 + 1423 0002 0400 movs r4, r0 + 567:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** + 1424 .loc 1 567 3 is_stmt 1 view .LVU428 + 572:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** + 1425 .loc 1 572 3 view .LVU429 + 1426 0004 0068 ldr r0, [r0] + 1427 .LVL120: + 572:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** + 1428 .loc 1 572 3 is_stmt 0 view .LVU430 + 1429 0006 0022 movs r2, #0 + 1430 0008 0021 movs r1, #0 + 1431 000a FFF7FEFF bl TIM_CCxChannelCmd + 1432 .LVL121: + 576:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** + 1433 .loc 1 576 3 is_stmt 1 view .LVU431 + 1434 000e 2268 ldr r2, [r4] + 1435 0010 D368 ldr r3, [r2, #12] + 1436 0012 0D49 ldr r1, .L73 + 1437 0014 0B40 ands r3, r1 + 1438 0016 D360 str r3, [r2, #12] + 578:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** + 1439 .loc 1 578 3 view .LVU432 + 578:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** + 1440 .loc 1 578 9 is_stmt 0 view .LVU433 + 1441 0018 606A ldr r0, [r4, #36] + 1442 001a FFF7FEFF bl HAL_DMA_Abort_IT + 1443 .LVL122: + 581:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** + ARM GAS /tmp/ccUWVJFr.s page 75 + + + 1444 .loc 1 581 3 is_stmt 1 view .LVU434 + 581:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** + 1445 .loc 1 581 3 view .LVU435 + 1446 001e 2368 ldr r3, [r4] + 1447 0020 196A ldr r1, [r3, #32] + 1448 0022 0A4A ldr r2, .L73+4 + 1449 0024 1142 tst r1, r2 + 1450 0026 07D1 bne .L72 + 581:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** + 1451 .loc 1 581 3 discriminator 1 view .LVU436 + 1452 0028 196A ldr r1, [r3, #32] + 1453 002a 094A ldr r2, .L73+8 + 1454 002c 1142 tst r1, r2 + 1455 002e 03D1 bne .L72 + 581:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** + 1456 .loc 1 581 3 discriminator 3 view .LVU437 + 1457 0030 1A68 ldr r2, [r3] + 1458 0032 0121 movs r1, #1 + 1459 0034 8A43 bics r2, r1 + 1460 0036 1A60 str r2, [r3] + 1461 .L72: + 581:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** + 1462 .loc 1 581 3 discriminator 5 view .LVU438 + 584:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** TIM_CHANNEL_N_STATE_SET(htim, TIM_CHANNEL_1, HAL_TIM_CHANNEL_STATE_READY); + 1463 .loc 1 584 3 view .LVU439 + 1464 0038 0123 movs r3, #1 + 1465 003a 3E22 movs r2, #62 + 1466 003c A354 strb r3, [r4, r2] + 585:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** + 1467 .loc 1 585 3 view .LVU440 + 1468 003e 0432 adds r2, r2, #4 + 1469 0040 A354 strb r3, [r4, r2] + 588:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** } + 1470 .loc 1 588 3 view .LVU441 + 589:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** + 1471 .loc 1 589 1 is_stmt 0 view .LVU442 + 1472 0042 0020 movs r0, #0 + 1473 @ sp needed + 1474 .LVL123: + 589:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** + 1475 .loc 1 589 1 view .LVU443 + 1476 0044 10BD pop {r4, pc} + 1477 .L74: + 1478 0046 C046 .align 2 + 1479 .L73: + 1480 0048 FFFDFFFF .word -513 + 1481 004c 11110000 .word 4369 + 1482 0050 44040000 .word 1092 + 1483 .cfi_endproc + 1484 .LFE49: + 1486 .section .text.HAL_TIMEx_OCN_Start,"ax",%progbits + 1487 .align 1 + 1488 .global HAL_TIMEx_OCN_Start + 1489 .syntax unified + 1490 .code 16 + 1491 .thumb_func + 1493 HAL_TIMEx_OCN_Start: + ARM GAS /tmp/ccUWVJFr.s page 76 + + + 1494 .LVL124: + 1495 .LFB50: + 627:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** uint32_t tmpsmcr; + 1496 .loc 1 627 1 is_stmt 1 view -0 + 1497 .cfi_startproc + 1498 @ args = 0, pretend = 0, frame = 0 + 1499 @ frame_needed = 0, uses_anonymous_args = 0 + 627:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** uint32_t tmpsmcr; + 1500 .loc 1 627 1 is_stmt 0 view .LVU445 + 1501 0000 10B5 push {r4, lr} + 1502 .cfi_def_cfa_offset 8 + 1503 .cfi_offset 4, -8 + 1504 .cfi_offset 14, -4 + 1505 0002 0400 movs r4, r0 + 628:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** + 1506 .loc 1 628 3 is_stmt 1 view .LVU446 + 631:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** + 1507 .loc 1 631 3 view .LVU447 + 634:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** { + 1508 .loc 1 634 3 view .LVU448 + 634:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** { + 1509 .loc 1 634 46 is_stmt 0 view .LVU449 + 1510 0004 0029 cmp r1, #0 + 1511 0006 27D1 bne .L76 + 634:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** { + 1512 .loc 1 634 7 discriminator 1 view .LVU450 + 1513 0008 4223 movs r3, #66 + 1514 000a C35C ldrb r3, [r0, r3] + 634:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** { + 1515 .loc 1 634 46 discriminator 1 view .LVU451 + 1516 000c 013B subs r3, r3, #1 + 1517 000e 5A1E subs r2, r3, #1 + 1518 0010 9341 sbcs r3, r3, r2 + 1519 0012 DBB2 uxtb r3, r3 + 1520 .L77: + 634:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** { + 1521 .loc 1 634 6 discriminator 12 view .LVU452 + 1522 0014 002B cmp r3, #0 + 1523 0016 53D1 bne .L87 + 640:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** + 1524 .loc 1 640 3 is_stmt 1 view .LVU453 + 1525 0018 0029 cmp r1, #0 + 1526 001a 36D1 bne .L81 + 640:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** + 1527 .loc 1 640 3 is_stmt 0 discriminator 1 view .LVU454 + 1528 001c 4233 adds r3, r3, #66 + 1529 001e 0222 movs r2, #2 + 1530 0020 E254 strb r2, [r4, r3] + 1531 .L82: + 643:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** + 1532 .loc 1 643 3 is_stmt 1 view .LVU455 + 1533 0022 2068 ldr r0, [r4] + 1534 .LVL125: + 643:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** + 1535 .loc 1 643 3 is_stmt 0 view .LVU456 + 1536 0024 0422 movs r2, #4 + 1537 0026 FFF7FEFF bl TIM_CCxNChannelCmd + ARM GAS /tmp/ccUWVJFr.s page 77 + + + 1538 .LVL126: + 646:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** + 1539 .loc 1 646 3 is_stmt 1 view .LVU457 + 1540 002a 2268 ldr r2, [r4] + 1541 002c 516C ldr r1, [r2, #68] + 1542 002e 8023 movs r3, #128 + 1543 0030 1B02 lsls r3, r3, #8 + 1544 0032 0B43 orrs r3, r1 + 1545 0034 5364 str r3, [r2, #68] + 649:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** { + 1546 .loc 1 649 3 view .LVU458 + 649:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** { + 1547 .loc 1 649 7 is_stmt 0 view .LVU459 + 1548 0036 2368 ldr r3, [r4] + 649:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** { + 1549 .loc 1 649 6 view .LVU460 + 1550 0038 234A ldr r2, .L93 + 1551 003a 9342 cmp r3, r2 + 1552 003c 35D0 beq .L85 + 649:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** { + 1553 .loc 1 649 7 discriminator 1 view .LVU461 + 1554 003e 8022 movs r2, #128 + 1555 0040 D205 lsls r2, r2, #23 + 1556 0042 9342 cmp r3, r2 + 1557 0044 31D0 beq .L85 + 649:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** { + 1558 .loc 1 649 7 discriminator 2 view .LVU462 + 1559 0046 214A ldr r2, .L93+4 + 1560 0048 9342 cmp r3, r2 + 1561 004a 2ED0 beq .L85 + 659:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** } + 1562 .loc 1 659 5 is_stmt 1 view .LVU463 + 1563 004c 1A68 ldr r2, [r3] + 1564 004e 0121 movs r1, #1 + 1565 0050 0A43 orrs r2, r1 + 1566 0052 1A60 str r2, [r3] + 663:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** } + 1567 .loc 1 663 10 is_stmt 0 view .LVU464 + 1568 0054 0020 movs r0, #0 + 1569 0056 34E0 b .L80 + 1570 .LVL127: + 1571 .L76: + 634:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** { + 1572 .loc 1 634 46 discriminator 2 view .LVU465 + 1573 0058 0429 cmp r1, #4 + 1574 005a 08D0 beq .L89 + 634:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** { + 1575 .loc 1 634 46 discriminator 5 view .LVU466 + 1576 005c 0829 cmp r1, #8 + 1577 005e 0DD0 beq .L90 + 634:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** { + 1578 .loc 1 634 7 discriminator 8 view .LVU467 + 1579 0060 4523 movs r3, #69 + 1580 0062 C35C ldrb r3, [r0, r3] + 634:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** { + 1581 .loc 1 634 46 discriminator 8 view .LVU468 + 1582 0064 013B subs r3, r3, #1 + ARM GAS /tmp/ccUWVJFr.s page 78 + + + 1583 0066 5A1E subs r2, r3, #1 + 1584 0068 9341 sbcs r3, r3, r2 + 1585 006a DBB2 uxtb r3, r3 + 1586 006c D2E7 b .L77 + 1587 .L89: + 634:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** { + 1588 .loc 1 634 7 discriminator 4 view .LVU469 + 1589 006e 4323 movs r3, #67 + 1590 0070 C35C ldrb r3, [r0, r3] + 634:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** { + 1591 .loc 1 634 46 discriminator 4 view .LVU470 + 1592 0072 013B subs r3, r3, #1 + 1593 0074 5A1E subs r2, r3, #1 + 1594 0076 9341 sbcs r3, r3, r2 + 1595 0078 DBB2 uxtb r3, r3 + 1596 007a CBE7 b .L77 + 1597 .L90: + 634:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** { + 1598 .loc 1 634 7 discriminator 7 view .LVU471 + 1599 007c 4423 movs r3, #68 + 1600 007e C35C ldrb r3, [r0, r3] + 634:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** { + 1601 .loc 1 634 46 discriminator 7 view .LVU472 + 1602 0080 013B subs r3, r3, #1 + 1603 0082 5A1E subs r2, r3, #1 + 1604 0084 9341 sbcs r3, r3, r2 + 1605 0086 DBB2 uxtb r3, r3 + 1606 0088 C4E7 b .L77 + 1607 .L81: + 640:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** + 1608 .loc 1 640 3 discriminator 2 view .LVU473 + 1609 008a 0429 cmp r1, #4 + 1610 008c 05D0 beq .L91 + 640:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** + 1611 .loc 1 640 3 discriminator 4 view .LVU474 + 1612 008e 0829 cmp r1, #8 + 1613 0090 07D0 beq .L92 + 640:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** + 1614 .loc 1 640 3 discriminator 7 view .LVU475 + 1615 0092 4523 movs r3, #69 + 1616 0094 0222 movs r2, #2 + 1617 0096 E254 strb r2, [r4, r3] + 1618 0098 C3E7 b .L82 + 1619 .L91: + 640:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** + 1620 .loc 1 640 3 discriminator 3 view .LVU476 + 1621 009a 4323 movs r3, #67 + 1622 009c 0222 movs r2, #2 + 1623 009e E254 strb r2, [r4, r3] + 1624 00a0 BFE7 b .L82 + 1625 .L92: + 640:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** + 1626 .loc 1 640 3 discriminator 6 view .LVU477 + 1627 00a2 4423 movs r3, #68 + 1628 00a4 0222 movs r2, #2 + 1629 00a6 E254 strb r2, [r4, r3] + 1630 00a8 BBE7 b .L82 + ARM GAS /tmp/ccUWVJFr.s page 79 + + + 1631 .LVL128: + 1632 .L85: + 651:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** if (!IS_TIM_SLAVEMODE_TRIGGER_ENABLED(tmpsmcr)) + 1633 .loc 1 651 5 is_stmt 1 view .LVU478 + 651:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** if (!IS_TIM_SLAVEMODE_TRIGGER_ENABLED(tmpsmcr)) + 1634 .loc 1 651 29 is_stmt 0 view .LVU479 + 1635 00aa 9968 ldr r1, [r3, #8] + 651:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** if (!IS_TIM_SLAVEMODE_TRIGGER_ENABLED(tmpsmcr)) + 1636 .loc 1 651 13 view .LVU480 + 1637 00ac 0722 movs r2, #7 + 1638 00ae 0A40 ands r2, r1 + 1639 .LVL129: + 652:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** { + 1640 .loc 1 652 5 is_stmt 1 view .LVU481 + 652:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** { + 1641 .loc 1 652 8 is_stmt 0 view .LVU482 + 1642 00b0 062A cmp r2, #6 + 1643 00b2 07D0 beq .L88 + 654:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** } + 1644 .loc 1 654 7 is_stmt 1 view .LVU483 + 1645 00b4 1A68 ldr r2, [r3] + 1646 .LVL130: + 654:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** } + 1647 .loc 1 654 7 is_stmt 0 view .LVU484 + 1648 00b6 0121 movs r1, #1 + 1649 .LVL131: + 654:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** } + 1650 .loc 1 654 7 view .LVU485 + 1651 00b8 0A43 orrs r2, r1 + 1652 00ba 1A60 str r2, [r3] + 663:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** } + 1653 .loc 1 663 10 view .LVU486 + 1654 00bc 0020 movs r0, #0 + 1655 00be 00E0 b .L80 + 1656 .LVL132: + 1657 .L87: + 636:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** } + 1658 .loc 1 636 12 view .LVU487 + 1659 00c0 0120 movs r0, #1 + 1660 .LVL133: + 1661 .L80: + 664:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** + 1662 .loc 1 664 1 view .LVU488 + 1663 @ sp needed + 1664 .LVL134: + 664:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** + 1665 .loc 1 664 1 view .LVU489 + 1666 00c2 10BD pop {r4, pc} + 1667 .LVL135: + 1668 .L88: + 663:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** } + 1669 .loc 1 663 10 view .LVU490 + 1670 00c4 0020 movs r0, #0 + 1671 00c6 FCE7 b .L80 + 1672 .L94: + 1673 .align 2 + 1674 .L93: + ARM GAS /tmp/ccUWVJFr.s page 80 + + + 1675 00c8 002C0140 .word 1073818624 + 1676 00cc 00040040 .word 1073742848 + 1677 .cfi_endproc + 1678 .LFE50: + 1680 .section .text.HAL_TIMEx_OCN_Stop,"ax",%progbits + 1681 .align 1 + 1682 .global HAL_TIMEx_OCN_Stop + 1683 .syntax unified + 1684 .code 16 + 1685 .thumb_func + 1687 HAL_TIMEx_OCN_Stop: + 1688 .LVL136: + 1689 .LFB51: + 678:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** /* Check the parameters */ + 1690 .loc 1 678 1 is_stmt 1 view -0 + 1691 .cfi_startproc + 1692 @ args = 0, pretend = 0, frame = 0 + 1693 @ frame_needed = 0, uses_anonymous_args = 0 + 678:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** /* Check the parameters */ + 1694 .loc 1 678 1 is_stmt 0 view .LVU492 + 1695 0000 70B5 push {r4, r5, r6, lr} + 1696 .cfi_def_cfa_offset 16 + 1697 .cfi_offset 4, -16 + 1698 .cfi_offset 5, -12 + 1699 .cfi_offset 6, -8 + 1700 .cfi_offset 14, -4 + 1701 0002 0400 movs r4, r0 + 1702 0004 0D00 movs r5, r1 + 680:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** + 1703 .loc 1 680 3 is_stmt 1 view .LVU493 + 683:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** + 1704 .loc 1 683 3 view .LVU494 + 1705 0006 0068 ldr r0, [r0] + 1706 .LVL137: + 683:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** + 1707 .loc 1 683 3 is_stmt 0 view .LVU495 + 1708 0008 0022 movs r2, #0 + 1709 000a FFF7FEFF bl TIM_CCxNChannelCmd + 1710 .LVL138: + 686:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** + 1711 .loc 1 686 3 is_stmt 1 view .LVU496 + 686:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** + 1712 .loc 1 686 3 view .LVU497 + 1713 000e 2368 ldr r3, [r4] + 1714 0010 196A ldr r1, [r3, #32] + 1715 0012 174A ldr r2, .L104 + 1716 0014 1142 tst r1, r2 + 1717 0016 07D1 bne .L96 + 686:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** + 1718 .loc 1 686 3 discriminator 1 view .LVU498 + 1719 0018 196A ldr r1, [r3, #32] + 1720 001a 164A ldr r2, .L104+4 + 1721 001c 1142 tst r1, r2 + 1722 001e 03D1 bne .L96 + 686:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** + 1723 .loc 1 686 3 discriminator 3 view .LVU499 + 1724 0020 5A6C ldr r2, [r3, #68] + ARM GAS /tmp/ccUWVJFr.s page 81 + + + 1725 0022 1549 ldr r1, .L104+8 + 1726 0024 0A40 ands r2, r1 + 1727 0026 5A64 str r2, [r3, #68] + 1728 .L96: + 686:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** + 1729 .loc 1 686 3 discriminator 5 view .LVU500 + 689:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** + 1730 .loc 1 689 3 view .LVU501 + 689:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** + 1731 .loc 1 689 3 view .LVU502 + 1732 0028 2368 ldr r3, [r4] + 1733 002a 196A ldr r1, [r3, #32] + 1734 002c 104A ldr r2, .L104 + 1735 002e 1142 tst r1, r2 + 1736 0030 07D1 bne .L97 + 689:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** + 1737 .loc 1 689 3 discriminator 1 view .LVU503 + 1738 0032 196A ldr r1, [r3, #32] + 1739 0034 0F4A ldr r2, .L104+4 + 1740 0036 1142 tst r1, r2 + 1741 0038 03D1 bne .L97 + 689:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** + 1742 .loc 1 689 3 discriminator 3 view .LVU504 + 1743 003a 1A68 ldr r2, [r3] + 1744 003c 0121 movs r1, #1 + 1745 003e 8A43 bics r2, r1 + 1746 0040 1A60 str r2, [r3] + 1747 .L97: + 689:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** + 1748 .loc 1 689 3 discriminator 5 view .LVU505 + 692:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** + 1749 .loc 1 692 3 view .LVU506 + 1750 0042 002D cmp r5, #0 + 1751 0044 04D1 bne .L98 + 692:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** + 1752 .loc 1 692 3 is_stmt 0 discriminator 1 view .LVU507 + 1753 0046 4223 movs r3, #66 + 1754 0048 0122 movs r2, #1 + 1755 004a E254 strb r2, [r4, r3] + 1756 .L99: + 695:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** } + 1757 .loc 1 695 3 is_stmt 1 view .LVU508 + 696:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** + 1758 .loc 1 696 1 is_stmt 0 view .LVU509 + 1759 004c 0020 movs r0, #0 + 1760 @ sp needed + 1761 .LVL139: + 1762 .LVL140: + 696:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** + 1763 .loc 1 696 1 view .LVU510 + 1764 004e 70BD pop {r4, r5, r6, pc} + 1765 .LVL141: + 1766 .L98: + 692:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** + 1767 .loc 1 692 3 discriminator 2 view .LVU511 + 1768 0050 042D cmp r5, #4 + 1769 0052 05D0 beq .L102 + ARM GAS /tmp/ccUWVJFr.s page 82 + + + 692:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** + 1770 .loc 1 692 3 discriminator 4 view .LVU512 + 1771 0054 082D cmp r5, #8 + 1772 0056 07D0 beq .L103 + 692:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** + 1773 .loc 1 692 3 discriminator 7 view .LVU513 + 1774 0058 4523 movs r3, #69 + 1775 005a 0122 movs r2, #1 + 1776 005c E254 strb r2, [r4, r3] + 1777 005e F5E7 b .L99 + 1778 .L102: + 692:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** + 1779 .loc 1 692 3 discriminator 3 view .LVU514 + 1780 0060 4323 movs r3, #67 + 1781 0062 0122 movs r2, #1 + 1782 0064 E254 strb r2, [r4, r3] + 1783 0066 F1E7 b .L99 + 1784 .L103: + 692:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** + 1785 .loc 1 692 3 discriminator 6 view .LVU515 + 1786 0068 4423 movs r3, #68 + 1787 006a 0122 movs r2, #1 + 1788 006c E254 strb r2, [r4, r3] + 1789 006e EDE7 b .L99 + 1790 .L105: + 1791 .align 2 + 1792 .L104: + 1793 0070 11110000 .word 4369 + 1794 0074 44040000 .word 1092 + 1795 0078 FF7FFFFF .word -32769 + 1796 .cfi_endproc + 1797 .LFE51: + 1799 .section .text.HAL_TIMEx_OCN_Start_IT,"ax",%progbits + 1800 .align 1 + 1801 .global HAL_TIMEx_OCN_Start_IT + 1802 .syntax unified + 1803 .code 16 + 1804 .thumb_func + 1806 HAL_TIMEx_OCN_Start_IT: + 1807 .LVL142: + 1808 .LFB52: + 710:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** HAL_StatusTypeDef status = HAL_OK; + 1809 .loc 1 710 1 is_stmt 1 view -0 + 1810 .cfi_startproc + 1811 @ args = 0, pretend = 0, frame = 0 + 1812 @ frame_needed = 0, uses_anonymous_args = 0 + 710:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** HAL_StatusTypeDef status = HAL_OK; + 1813 .loc 1 710 1 is_stmt 0 view .LVU517 + 1814 0000 10B5 push {r4, lr} + 1815 .cfi_def_cfa_offset 8 + 1816 .cfi_offset 4, -8 + 1817 .cfi_offset 14, -4 + 1818 0002 0400 movs r4, r0 + 711:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** uint32_t tmpsmcr; + 1819 .loc 1 711 3 is_stmt 1 view .LVU518 + 1820 .LVL143: + 712:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** + ARM GAS /tmp/ccUWVJFr.s page 83 + + + 1821 .loc 1 712 3 view .LVU519 + 715:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** + 1822 .loc 1 715 3 view .LVU520 + 718:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** { + 1823 .loc 1 718 3 view .LVU521 + 718:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** { + 1824 .loc 1 718 46 is_stmt 0 view .LVU522 + 1825 0004 0029 cmp r1, #0 + 1826 0006 31D1 bne .L107 + 718:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** { + 1827 .loc 1 718 7 discriminator 1 view .LVU523 + 1828 0008 4223 movs r3, #66 + 1829 000a C35C ldrb r3, [r0, r3] + 718:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** { + 1830 .loc 1 718 46 discriminator 1 view .LVU524 + 1831 000c 013B subs r3, r3, #1 + 1832 000e 5A1E subs r2, r3, #1 + 1833 0010 9341 sbcs r3, r3, r2 + 1834 0012 DBB2 uxtb r3, r3 + 1835 .L108: + 718:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** { + 1836 .loc 1 718 6 discriminator 12 view .LVU525 + 1837 0014 002B cmp r3, #0 + 1838 0016 6ED1 bne .L121 + 724:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** + 1839 .loc 1 724 3 is_stmt 1 view .LVU526 + 1840 0018 0029 cmp r1, #0 + 1841 001a 40D1 bne .L112 + 724:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** + 1842 .loc 1 724 3 is_stmt 0 discriminator 1 view .LVU527 + 1843 001c 4233 adds r3, r3, #66 + 1844 001e 0222 movs r2, #2 + 1845 0020 E254 strb r2, [r4, r3] + 726:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** { + 1846 .loc 1 726 3 is_stmt 1 view .LVU528 + 1847 .L113: + 731:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** break; + 1848 .loc 1 731 7 view .LVU529 + 1849 0022 2268 ldr r2, [r4] + 1850 0024 D368 ldr r3, [r2, #12] + 1851 0026 0220 movs r0, #2 + 1852 .LVL144: + 731:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** break; + 1853 .loc 1 731 7 is_stmt 0 view .LVU530 + 1854 0028 0343 orrs r3, r0 + 1855 002a D360 str r3, [r2, #12] + 732:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** } + 1856 .loc 1 732 7 is_stmt 1 view .LVU531 + 755:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** { + 1857 .loc 1 755 3 view .LVU532 + 1858 .L118: + 758:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** + 1859 .loc 1 758 5 view .LVU533 + 1860 002c 2268 ldr r2, [r4] + 1861 002e D368 ldr r3, [r2, #12] + 1862 0030 8020 movs r0, #128 + 1863 0032 0343 orrs r3, r0 + ARM GAS /tmp/ccUWVJFr.s page 84 + + + 1864 0034 D360 str r3, [r2, #12] + 761:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** + 1865 .loc 1 761 5 view .LVU534 + 1866 0036 2068 ldr r0, [r4] + 1867 0038 0422 movs r2, #4 + 1868 003a FFF7FEFF bl TIM_CCxNChannelCmd + 1869 .LVL145: + 764:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** + 1870 .loc 1 764 5 view .LVU535 + 1871 003e 2268 ldr r2, [r4] + 1872 0040 516C ldr r1, [r2, #68] + 1873 0042 8023 movs r3, #128 + 1874 0044 1B02 lsls r3, r3, #8 + 1875 0046 0B43 orrs r3, r1 + 1876 0048 5364 str r3, [r2, #68] + 767:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** { + 1877 .loc 1 767 5 view .LVU536 + 767:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** { + 1878 .loc 1 767 9 is_stmt 0 view .LVU537 + 1879 004a 2368 ldr r3, [r4] + 767:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** { + 1880 .loc 1 767 8 view .LVU538 + 1881 004c 2C4A ldr r2, .L128 + 1882 004e 9342 cmp r3, r2 + 1883 0050 46D0 beq .L119 + 767:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** { + 1884 .loc 1 767 9 discriminator 1 view .LVU539 + 1885 0052 8022 movs r2, #128 + 1886 0054 D205 lsls r2, r2, #23 + 1887 0056 9342 cmp r3, r2 + 1888 0058 42D0 beq .L119 + 767:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** { + 1889 .loc 1 767 9 discriminator 2 view .LVU540 + 1890 005a 2A4A ldr r2, .L128+4 + 1891 005c 9342 cmp r3, r2 + 1892 005e 3FD0 beq .L119 + 777:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** } + 1893 .loc 1 777 7 is_stmt 1 view .LVU541 + 1894 0060 1A68 ldr r2, [r3] + 1895 0062 0121 movs r1, #1 + 1896 0064 0A43 orrs r2, r1 + 1897 0066 1A60 str r2, [r3] + 1898 0068 0020 movs r0, #0 + 1899 006a 45E0 b .L111 + 1900 .LVL146: + 1901 .L107: + 718:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** { + 1902 .loc 1 718 46 is_stmt 0 discriminator 2 view .LVU542 + 1903 006c 0429 cmp r1, #4 + 1904 006e 08D0 beq .L124 + 718:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** { + 1905 .loc 1 718 46 discriminator 5 view .LVU543 + 1906 0070 0829 cmp r1, #8 + 1907 0072 0DD0 beq .L125 + 718:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** { + 1908 .loc 1 718 7 discriminator 8 view .LVU544 + 1909 0074 4523 movs r3, #69 + ARM GAS /tmp/ccUWVJFr.s page 85 + + + 1910 0076 C35C ldrb r3, [r0, r3] + 718:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** { + 1911 .loc 1 718 46 discriminator 8 view .LVU545 + 1912 0078 013B subs r3, r3, #1 + 1913 007a 5A1E subs r2, r3, #1 + 1914 007c 9341 sbcs r3, r3, r2 + 1915 007e DBB2 uxtb r3, r3 + 1916 0080 C8E7 b .L108 + 1917 .L124: + 718:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** { + 1918 .loc 1 718 7 discriminator 4 view .LVU546 + 1919 0082 4323 movs r3, #67 + 1920 0084 C35C ldrb r3, [r0, r3] + 718:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** { + 1921 .loc 1 718 46 discriminator 4 view .LVU547 + 1922 0086 013B subs r3, r3, #1 + 1923 0088 5A1E subs r2, r3, #1 + 1924 008a 9341 sbcs r3, r3, r2 + 1925 008c DBB2 uxtb r3, r3 + 1926 008e C1E7 b .L108 + 1927 .L125: + 718:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** { + 1928 .loc 1 718 7 discriminator 7 view .LVU548 + 1929 0090 4423 movs r3, #68 + 1930 0092 C35C ldrb r3, [r0, r3] + 718:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** { + 1931 .loc 1 718 46 discriminator 7 view .LVU549 + 1932 0094 013B subs r3, r3, #1 + 1933 0096 5A1E subs r2, r3, #1 + 1934 0098 9341 sbcs r3, r3, r2 + 1935 009a DBB2 uxtb r3, r3 + 1936 009c BAE7 b .L108 + 1937 .L112: + 724:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** + 1938 .loc 1 724 3 discriminator 2 view .LVU550 + 1939 009e 0429 cmp r1, #4 + 1940 00a0 0CD0 beq .L126 + 724:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** + 1941 .loc 1 724 3 discriminator 4 view .LVU551 + 1942 00a2 0829 cmp r1, #8 + 1943 00a4 13D0 beq .L127 + 724:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** + 1944 .loc 1 724 3 discriminator 7 view .LVU552 + 1945 00a6 4523 movs r3, #69 + 1946 00a8 0222 movs r2, #2 + 1947 00aa E254 strb r2, [r4, r3] + 726:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** { + 1948 .loc 1 726 3 is_stmt 1 view .LVU553 + 1949 00ac 0429 cmp r1, #4 + 1950 00ae 08D0 beq .L115 + 1951 00b0 0829 cmp r1, #8 + 1952 00b2 0FD0 beq .L117 + 1953 00b4 0029 cmp r1, #0 + 1954 00b6 B4D0 beq .L113 + 1955 00b8 0120 movs r0, #1 + 1956 .LVL147: + 726:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** { + ARM GAS /tmp/ccUWVJFr.s page 86 + + + 1957 .loc 1 726 3 is_stmt 0 view .LVU554 + 1958 00ba 1DE0 b .L111 + 1959 .LVL148: + 1960 .L126: + 724:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** + 1961 .loc 1 724 3 discriminator 3 view .LVU555 + 1962 00bc 4323 movs r3, #67 + 1963 00be 0222 movs r2, #2 + 1964 00c0 E254 strb r2, [r4, r3] + 726:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** { + 1965 .loc 1 726 3 is_stmt 1 view .LVU556 + 1966 .L115: + 738:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** break; + 1967 .loc 1 738 7 view .LVU557 + 1968 00c2 2268 ldr r2, [r4] + 1969 00c4 D368 ldr r3, [r2, #12] + 1970 00c6 0420 movs r0, #4 + 1971 .LVL149: + 738:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** break; + 1972 .loc 1 738 7 is_stmt 0 view .LVU558 + 1973 00c8 0343 orrs r3, r0 + 1974 00ca D360 str r3, [r2, #12] + 739:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** } + 1975 .loc 1 739 7 is_stmt 1 view .LVU559 + 755:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** { + 1976 .loc 1 755 3 view .LVU560 + 1977 00cc AEE7 b .L118 + 1978 .LVL150: + 1979 .L127: + 724:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** + 1980 .loc 1 724 3 is_stmt 0 discriminator 6 view .LVU561 + 1981 00ce 4423 movs r3, #68 + 1982 00d0 0222 movs r2, #2 + 1983 00d2 E254 strb r2, [r4, r3] + 726:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** { + 1984 .loc 1 726 3 is_stmt 1 view .LVU562 + 1985 .L117: + 745:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** break; + 1986 .loc 1 745 7 view .LVU563 + 1987 00d4 2268 ldr r2, [r4] + 1988 00d6 D368 ldr r3, [r2, #12] + 1989 00d8 0820 movs r0, #8 + 1990 .LVL151: + 745:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** break; + 1991 .loc 1 745 7 is_stmt 0 view .LVU564 + 1992 00da 0343 orrs r3, r0 + 1993 00dc D360 str r3, [r2, #12] + 746:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** } + 1994 .loc 1 746 7 is_stmt 1 view .LVU565 + 755:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** { + 1995 .loc 1 755 3 view .LVU566 + 1996 00de A5E7 b .L118 + 1997 .LVL152: + 1998 .L119: + 769:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** if (!IS_TIM_SLAVEMODE_TRIGGER_ENABLED(tmpsmcr)) + 1999 .loc 1 769 7 view .LVU567 + 769:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** if (!IS_TIM_SLAVEMODE_TRIGGER_ENABLED(tmpsmcr)) + ARM GAS /tmp/ccUWVJFr.s page 87 + + + 2000 .loc 1 769 31 is_stmt 0 view .LVU568 + 2001 00e0 9968 ldr r1, [r3, #8] + 769:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** if (!IS_TIM_SLAVEMODE_TRIGGER_ENABLED(tmpsmcr)) + 2002 .loc 1 769 15 view .LVU569 + 2003 00e2 0722 movs r2, #7 + 2004 00e4 0A40 ands r2, r1 + 2005 .LVL153: + 770:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** { + 2006 .loc 1 770 7 is_stmt 1 view .LVU570 + 770:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** { + 2007 .loc 1 770 10 is_stmt 0 view .LVU571 + 2008 00e6 062A cmp r2, #6 + 2009 00e8 07D0 beq .L123 + 772:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** } + 2010 .loc 1 772 9 is_stmt 1 view .LVU572 + 2011 00ea 1A68 ldr r2, [r3] + 2012 .LVL154: + 772:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** } + 2013 .loc 1 772 9 is_stmt 0 view .LVU573 + 2014 00ec 0121 movs r1, #1 + 2015 .LVL155: + 772:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** } + 2016 .loc 1 772 9 view .LVU574 + 2017 00ee 0A43 orrs r2, r1 + 2018 00f0 1A60 str r2, [r3] + 2019 00f2 0020 movs r0, #0 + 2020 00f4 00E0 b .L111 + 2021 .LVL156: + 2022 .L121: + 720:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** } + 2023 .loc 1 720 12 view .LVU575 + 2024 00f6 0120 movs r0, #1 + 2025 .LVL157: + 2026 .L111: + 783:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** + 2027 .loc 1 783 1 view .LVU576 + 2028 @ sp needed + 2029 .LVL158: + 783:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** + 2030 .loc 1 783 1 view .LVU577 + 2031 00f8 10BD pop {r4, pc} + 2032 .LVL159: + 2033 .L123: + 783:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** + 2034 .loc 1 783 1 view .LVU578 + 2035 00fa 0020 movs r0, #0 + 2036 00fc FCE7 b .L111 + 2037 .L129: + 2038 00fe C046 .align 2 + 2039 .L128: + 2040 0100 002C0140 .word 1073818624 + 2041 0104 00040040 .word 1073742848 + 2042 .cfi_endproc + 2043 .LFE52: + 2045 .section .text.HAL_TIMEx_OCN_Stop_IT,"ax",%progbits + 2046 .align 1 + 2047 .global HAL_TIMEx_OCN_Stop_IT + ARM GAS /tmp/ccUWVJFr.s page 88 + + + 2048 .syntax unified + 2049 .code 16 + 2050 .thumb_func + 2052 HAL_TIMEx_OCN_Stop_IT: + 2053 .LVL160: + 2054 .LFB53: + 797:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** HAL_StatusTypeDef status = HAL_OK; + 2055 .loc 1 797 1 is_stmt 1 view -0 + 2056 .cfi_startproc + 2057 @ args = 0, pretend = 0, frame = 0 + 2058 @ frame_needed = 0, uses_anonymous_args = 0 + 797:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** HAL_StatusTypeDef status = HAL_OK; + 2059 .loc 1 797 1 is_stmt 0 view .LVU580 + 2060 0000 70B5 push {r4, r5, r6, lr} + 2061 .cfi_def_cfa_offset 16 + 2062 .cfi_offset 4, -16 + 2063 .cfi_offset 5, -12 + 2064 .cfi_offset 6, -8 + 2065 .cfi_offset 14, -4 + 2066 0002 0400 movs r4, r0 + 2067 0004 0D00 movs r5, r1 + 798:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** uint32_t tmpccer; + 2068 .loc 1 798 3 is_stmt 1 view .LVU581 + 2069 .LVL161: + 799:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** + 2070 .loc 1 799 3 view .LVU582 + 802:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** + 2071 .loc 1 802 3 view .LVU583 + 804:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** { + 2072 .loc 1 804 3 view .LVU584 + 2073 0006 0429 cmp r1, #4 + 2074 0008 37D0 beq .L131 + 2075 000a 0829 cmp r1, #8 + 2076 000c 3BD0 beq .L132 + 2077 000e 0029 cmp r1, #0 + 2078 0010 52D1 bne .L141 + 809:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** break; + 2079 .loc 1 809 7 view .LVU585 + 2080 0012 0268 ldr r2, [r0] + 2081 0014 D368 ldr r3, [r2, #12] + 2082 0016 0221 movs r1, #2 + 2083 .LVL162: + 809:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** break; + 2084 .loc 1 809 7 is_stmt 0 view .LVU586 + 2085 0018 8B43 bics r3, r1 + 2086 001a D360 str r3, [r2, #12] + 810:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** } + 2087 .loc 1 810 7 is_stmt 1 view .LVU587 + 832:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** { + 2088 .loc 1 832 3 view .LVU588 + 2089 .L134: + 835:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** + 2090 .loc 1 835 5 view .LVU589 + 2091 001c 2068 ldr r0, [r4] + 2092 .LVL163: + 835:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** + 2093 .loc 1 835 5 is_stmt 0 view .LVU590 + ARM GAS /tmp/ccUWVJFr.s page 89 + + + 2094 001e 0022 movs r2, #0 + 2095 0020 2900 movs r1, r5 + 2096 0022 FFF7FEFF bl TIM_CCxNChannelCmd + 2097 .LVL164: + 838:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** if ((tmpccer & (TIM_CCER_CC1NE | TIM_CCER_CC2NE | TIM_CCER_CC3NE)) == (uint32_t)RESET) + 2098 .loc 1 838 5 is_stmt 1 view .LVU591 + 838:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** if ((tmpccer & (TIM_CCER_CC1NE | TIM_CCER_CC2NE | TIM_CCER_CC3NE)) == (uint32_t)RESET) + 2099 .loc 1 838 19 is_stmt 0 view .LVU592 + 2100 0026 2368 ldr r3, [r4] + 838:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** if ((tmpccer & (TIM_CCER_CC1NE | TIM_CCER_CC2NE | TIM_CCER_CC3NE)) == (uint32_t)RESET) + 2101 .loc 1 838 13 view .LVU593 + 2102 0028 196A ldr r1, [r3, #32] + 2103 .LVL165: + 839:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** { + 2104 .loc 1 839 5 is_stmt 1 view .LVU594 + 839:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** { + 2105 .loc 1 839 18 is_stmt 0 view .LVU595 + 2106 002a 244A ldr r2, .L144 + 839:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** { + 2107 .loc 1 839 8 view .LVU596 + 2108 002c 1142 tst r1, r2 + 2109 002e 03D1 bne .L135 + 841:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** } + 2110 .loc 1 841 7 is_stmt 1 view .LVU597 + 2111 0030 DA68 ldr r2, [r3, #12] + 2112 0032 8021 movs r1, #128 + 2113 .LVL166: + 841:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** } + 2114 .loc 1 841 7 is_stmt 0 view .LVU598 + 2115 0034 8A43 bics r2, r1 + 2116 0036 DA60 str r2, [r3, #12] + 2117 .L135: + 845:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** + 2118 .loc 1 845 5 is_stmt 1 view .LVU599 + 845:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** + 2119 .loc 1 845 5 view .LVU600 + 2120 0038 2368 ldr r3, [r4] + 2121 003a 196A ldr r1, [r3, #32] + 2122 003c 204A ldr r2, .L144+4 + 2123 003e 1142 tst r1, r2 + 2124 0040 07D1 bne .L136 + 845:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** + 2125 .loc 1 845 5 discriminator 1 view .LVU601 + 2126 0042 196A ldr r1, [r3, #32] + 2127 0044 1D4A ldr r2, .L144 + 2128 0046 1142 tst r1, r2 + 2129 0048 03D1 bne .L136 + 845:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** + 2130 .loc 1 845 5 discriminator 3 view .LVU602 + 2131 004a 5A6C ldr r2, [r3, #68] + 2132 004c 1D49 ldr r1, .L144+8 + 2133 004e 0A40 ands r2, r1 + 2134 0050 5A64 str r2, [r3, #68] + 2135 .L136: + 845:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** + 2136 .loc 1 845 5 discriminator 5 view .LVU603 + 848:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** + ARM GAS /tmp/ccUWVJFr.s page 90 + + + 2137 .loc 1 848 5 view .LVU604 + 848:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** + 2138 .loc 1 848 5 view .LVU605 + 2139 0052 2368 ldr r3, [r4] + 2140 0054 196A ldr r1, [r3, #32] + 2141 0056 1A4A ldr r2, .L144+4 + 2142 0058 1142 tst r1, r2 + 2143 005a 07D1 bne .L137 + 848:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** + 2144 .loc 1 848 5 discriminator 1 view .LVU606 + 2145 005c 196A ldr r1, [r3, #32] + 2146 005e 174A ldr r2, .L144 + 2147 0060 1142 tst r1, r2 + 2148 0062 03D1 bne .L137 + 848:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** + 2149 .loc 1 848 5 discriminator 3 view .LVU607 + 2150 0064 1A68 ldr r2, [r3] + 2151 0066 0121 movs r1, #1 + 2152 0068 8A43 bics r2, r1 + 2153 006a 1A60 str r2, [r3] + 2154 .L137: + 848:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** + 2155 .loc 1 848 5 discriminator 5 view .LVU608 + 851:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** } + 2156 .loc 1 851 5 view .LVU609 + 2157 006c 002D cmp r5, #0 + 2158 006e 10D1 bne .L138 + 851:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** } + 2159 .loc 1 851 5 is_stmt 0 discriminator 1 view .LVU610 + 2160 0070 4223 movs r3, #66 + 2161 0072 0122 movs r2, #1 + 2162 0074 E254 strb r2, [r4, r3] + 2163 0076 0020 movs r0, #0 + 2164 .LVL167: + 2165 .L133: + 855:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** } + 2166 .loc 1 855 3 is_stmt 1 view .LVU611 + 856:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** + 2167 .loc 1 856 1 is_stmt 0 view .LVU612 + 2168 @ sp needed + 2169 .LVL168: + 2170 .LVL169: + 856:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** + 2171 .loc 1 856 1 view .LVU613 + 2172 0078 70BD pop {r4, r5, r6, pc} + 2173 .LVL170: + 2174 .L131: + 816:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** break; + 2175 .loc 1 816 7 is_stmt 1 view .LVU614 + 2176 007a 0268 ldr r2, [r0] + 2177 007c D368 ldr r3, [r2, #12] + 2178 007e 0421 movs r1, #4 + 2179 .LVL171: + 816:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** break; + 2180 .loc 1 816 7 is_stmt 0 view .LVU615 + 2181 0080 8B43 bics r3, r1 + 2182 0082 D360 str r3, [r2, #12] + ARM GAS /tmp/ccUWVJFr.s page 91 + + + 817:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** } + 2183 .loc 1 817 7 is_stmt 1 view .LVU616 + 832:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** { + 2184 .loc 1 832 3 view .LVU617 + 2185 0084 CAE7 b .L134 + 2186 .LVL172: + 2187 .L132: + 823:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** break; + 2188 .loc 1 823 7 view .LVU618 + 2189 0086 0268 ldr r2, [r0] + 2190 0088 D368 ldr r3, [r2, #12] + 2191 008a 0821 movs r1, #8 + 2192 .LVL173: + 823:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** break; + 2193 .loc 1 823 7 is_stmt 0 view .LVU619 + 2194 008c 8B43 bics r3, r1 + 2195 008e D360 str r3, [r2, #12] + 824:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** } + 2196 .loc 1 824 7 is_stmt 1 view .LVU620 + 832:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** { + 2197 .loc 1 832 3 view .LVU621 + 2198 0090 C4E7 b .L134 + 2199 .LVL174: + 2200 .L138: + 851:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** } + 2201 .loc 1 851 5 is_stmt 0 discriminator 2 view .LVU622 + 2202 0092 042D cmp r5, #4 + 2203 0094 06D0 beq .L142 + 851:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** } + 2204 .loc 1 851 5 discriminator 4 view .LVU623 + 2205 0096 082D cmp r5, #8 + 2206 0098 09D0 beq .L143 + 851:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** } + 2207 .loc 1 851 5 discriminator 7 view .LVU624 + 2208 009a 4523 movs r3, #69 + 2209 009c 0122 movs r2, #1 + 2210 009e E254 strb r2, [r4, r3] + 2211 00a0 0020 movs r0, #0 + 2212 00a2 E9E7 b .L133 + 2213 .L142: + 851:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** } + 2214 .loc 1 851 5 discriminator 3 view .LVU625 + 2215 00a4 4323 movs r3, #67 + 2216 00a6 0122 movs r2, #1 + 2217 00a8 E254 strb r2, [r4, r3] + 2218 00aa 0020 movs r0, #0 + 2219 00ac E4E7 b .L133 + 2220 .L143: + 851:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** } + 2221 .loc 1 851 5 discriminator 6 view .LVU626 + 2222 00ae 4423 movs r3, #68 + 2223 00b0 0122 movs r2, #1 + 2224 00b2 E254 strb r2, [r4, r3] + 2225 00b4 0020 movs r0, #0 + 2226 00b6 DFE7 b .L133 + 2227 .LVL175: + 2228 .L141: + ARM GAS /tmp/ccUWVJFr.s page 92 + + + 804:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** { + 2229 .loc 1 804 3 view .LVU627 + 2230 00b8 0120 movs r0, #1 + 2231 .LVL176: + 804:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** { + 2232 .loc 1 804 3 view .LVU628 + 2233 00ba DDE7 b .L133 + 2234 .L145: + 2235 .align 2 + 2236 .L144: + 2237 00bc 44040000 .word 1092 + 2238 00c0 11110000 .word 4369 + 2239 00c4 FF7FFFFF .word -32769 + 2240 .cfi_endproc + 2241 .LFE53: + 2243 .section .text.HAL_TIMEx_OCN_Start_DMA,"ax",%progbits + 2244 .align 1 + 2245 .global HAL_TIMEx_OCN_Start_DMA + 2246 .syntax unified + 2247 .code 16 + 2248 .thumb_func + 2250 HAL_TIMEx_OCN_Start_DMA: + 2251 .LVL177: + 2252 .LFB54: + 873:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** HAL_StatusTypeDef status = HAL_OK; + 2253 .loc 1 873 1 is_stmt 1 view -0 + 2254 .cfi_startproc + 2255 @ args = 0, pretend = 0, frame = 0 + 2256 @ frame_needed = 0, uses_anonymous_args = 0 + 873:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** HAL_StatusTypeDef status = HAL_OK; + 2257 .loc 1 873 1 is_stmt 0 view .LVU630 + 2258 0000 70B5 push {r4, r5, r6, lr} + 2259 .cfi_def_cfa_offset 16 + 2260 .cfi_offset 4, -16 + 2261 .cfi_offset 5, -12 + 2262 .cfi_offset 6, -8 + 2263 .cfi_offset 14, -4 + 2264 0002 0600 movs r6, r0 + 2265 0004 0D00 movs r5, r1 + 2266 0006 1100 movs r1, r2 + 2267 .LVL178: + 874:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** uint32_t tmpsmcr; + 2268 .loc 1 874 3 is_stmt 1 view .LVU631 + 875:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** + 2269 .loc 1 875 3 view .LVU632 + 878:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** + 2270 .loc 1 878 3 view .LVU633 + 881:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** { + 2271 .loc 1 881 3 view .LVU634 + 881:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** { + 2272 .loc 1 881 46 is_stmt 0 view .LVU635 + 2273 0008 002D cmp r5, #0 + 2274 000a 52D1 bne .L147 + 881:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** { + 2275 .loc 1 881 7 discriminator 1 view .LVU636 + 2276 000c 4222 movs r2, #66 + 2277 .LVL179: + ARM GAS /tmp/ccUWVJFr.s page 93 + + + 881:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** { + 2278 .loc 1 881 7 discriminator 1 view .LVU637 + 2279 000e 845C ldrb r4, [r0, r2] + 881:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** { + 2280 .loc 1 881 46 discriminator 1 view .LVU638 + 2281 0010 023C subs r4, r4, #2 + 2282 0012 6242 rsbs r2, r4, #0 + 2283 0014 5441 adcs r4, r4, r2 + 2284 0016 E4B2 uxtb r4, r4 + 2285 .L148: + 881:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** { + 2286 .loc 1 881 6 discriminator 12 view .LVU639 + 2287 0018 002C cmp r4, #0 + 2288 001a 00D0 beq .LCB2083 + 2289 001c C9E0 b .L165 @long jump + 2290 .LCB2083: + 885:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** { + 2291 .loc 1 885 8 is_stmt 1 view .LVU640 + 885:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** { + 2292 .loc 1 885 51 is_stmt 0 view .LVU641 + 2293 001e 002D cmp r5, #0 + 2294 0020 60D1 bne .L152 + 885:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** { + 2295 .loc 1 885 12 discriminator 1 view .LVU642 + 2296 0022 4222 movs r2, #66 + 2297 0024 B25C ldrb r2, [r6, r2] + 885:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** { + 2298 .loc 1 885 51 discriminator 1 view .LVU643 + 2299 0026 013A subs r2, r2, #1 + 2300 0028 5042 rsbs r0, r2, #0 + 2301 002a 4241 adcs r2, r2, r0 + 2302 .LVL180: + 885:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** { + 2303 .loc 1 885 51 discriminator 1 view .LVU644 + 2304 002c D2B2 uxtb r2, r2 + 2305 .L153: + 885:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** { + 2306 .loc 1 885 11 discriminator 12 view .LVU645 + 2307 002e 002A cmp r2, #0 + 2308 0030 00D1 bne .LCB2097 + 2309 0032 C0E0 b .L166 @long jump + 2310 .LCB2097: + 887:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** { + 2311 .loc 1 887 5 is_stmt 1 view .LVU646 + 887:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** { + 2312 .loc 1 887 8 is_stmt 0 view .LVU647 + 2313 0034 0029 cmp r1, #0 + 2314 0036 00D1 bne .LCB2100 + 2315 0038 BFE0 b .L167 @long jump + 2316 .LCB2100: + 887:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** { + 2317 .loc 1 887 25 discriminator 1 view .LVU648 + 2318 003a 002B cmp r3, #0 + 2319 003c 00D1 bne .LCB2102 + 2320 003e BEE0 b .L168 @long jump + 2321 .LCB2102: + 893:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** } + ARM GAS /tmp/ccUWVJFr.s page 94 + + + 2322 .loc 1 893 7 is_stmt 1 view .LVU649 + 2323 0040 002D cmp r5, #0 + 2324 0042 68D1 bne .L156 + 893:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** } + 2325 .loc 1 893 7 is_stmt 0 discriminator 1 view .LVU650 + 2326 0044 4222 movs r2, #66 + 2327 0046 0220 movs r0, #2 + 2328 0048 B054 strb r0, [r6, r2] + 901:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** { + 2329 .loc 1 901 3 is_stmt 1 view .LVU651 + 2330 .L157: + 906:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** htim->hdma[TIM_DMA_ID_CC1]->XferHalfCpltCallback = TIM_DMADelayPulseHalfCplt; + 2331 .loc 1 906 7 view .LVU652 + 906:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** htim->hdma[TIM_DMA_ID_CC1]->XferHalfCpltCallback = TIM_DMADelayPulseHalfCplt; + 2332 .loc 1 906 17 is_stmt 0 view .LVU653 + 2333 004a 726A ldr r2, [r6, #36] + 906:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** htim->hdma[TIM_DMA_ID_CC1]->XferHalfCpltCallback = TIM_DMADelayPulseHalfCplt; + 2334 .loc 1 906 52 view .LVU654 + 2335 004c 6148 ldr r0, .L180 + 2336 004e 9062 str r0, [r2, #40] + 907:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** + 2337 .loc 1 907 7 is_stmt 1 view .LVU655 + 907:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** + 2338 .loc 1 907 17 is_stmt 0 view .LVU656 + 2339 0050 726A ldr r2, [r6, #36] + 907:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** + 2340 .loc 1 907 56 view .LVU657 + 2341 0052 6148 ldr r0, .L180+4 + 2342 0054 D062 str r0, [r2, #44] + 910:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** + 2343 .loc 1 910 7 is_stmt 1 view .LVU658 + 910:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** + 2344 .loc 1 910 17 is_stmt 0 view .LVU659 + 2345 0056 726A ldr r2, [r6, #36] + 910:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** + 2346 .loc 1 910 53 view .LVU660 + 2347 0058 6048 ldr r0, .L180+8 + 2348 005a 1063 str r0, [r2, #48] + 913:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** Length) != HAL_OK) + 2349 .loc 1 913 7 is_stmt 1 view .LVU661 + 913:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** Length) != HAL_OK) + 2350 .loc 1 913 88 is_stmt 0 view .LVU662 + 2351 005c 3268 ldr r2, [r6] + 913:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** Length) != HAL_OK) + 2352 .loc 1 913 83 view .LVU663 + 2353 005e 3432 adds r2, r2, #52 + 913:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** Length) != HAL_OK) + 2354 .loc 1 913 11 view .LVU664 + 2355 0060 706A ldr r0, [r6, #36] + 2356 0062 FFF7FEFF bl HAL_DMA_Start_IT + 2357 .LVL181: + 913:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** Length) != HAL_OK) + 2358 .loc 1 913 10 discriminator 1 view .LVU665 + 2359 0066 0028 cmp r0, #0 + 2360 0068 00D0 beq .LCB2134 + 2361 006a AAE0 b .L170 @long jump + 2362 .LCB2134: + ARM GAS /tmp/ccUWVJFr.s page 95 + + + 920:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** break; + 2363 .loc 1 920 7 is_stmt 1 view .LVU666 + 2364 006c 3268 ldr r2, [r6] + 2365 006e D168 ldr r1, [r2, #12] + 2366 0070 8023 movs r3, #128 + 2367 0072 9B00 lsls r3, r3, #2 + 2368 0074 0B43 orrs r3, r1 + 2369 0076 D360 str r3, [r2, #12] + 921:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** } + 2370 .loc 1 921 7 view .LVU667 + 971:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** { + 2371 .loc 1 971 3 view .LVU668 + 2372 .L162: + 974:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** + 2373 .loc 1 974 5 view .LVU669 + 2374 0078 3068 ldr r0, [r6] + 2375 007a 0422 movs r2, #4 + 2376 007c 2900 movs r1, r5 + 2377 007e FFF7FEFF bl TIM_CCxNChannelCmd + 2378 .LVL182: + 977:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** + 2379 .loc 1 977 5 view .LVU670 + 2380 0082 3268 ldr r2, [r6] + 2381 0084 516C ldr r1, [r2, #68] + 2382 0086 8023 movs r3, #128 + 2383 0088 1B02 lsls r3, r3, #8 + 2384 008a 0B43 orrs r3, r1 + 2385 008c 5364 str r3, [r2, #68] + 980:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** { + 2386 .loc 1 980 5 view .LVU671 + 980:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** { + 2387 .loc 1 980 9 is_stmt 0 view .LVU672 + 2388 008e 3368 ldr r3, [r6] + 980:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** { + 2389 .loc 1 980 8 view .LVU673 + 2390 0090 534A ldr r2, .L180+12 + 2391 0092 9342 cmp r3, r2 + 2392 0094 00D1 bne .LCB2164 + 2393 0096 81E0 b .L163 @long jump + 2394 .LCB2164: + 980:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** { + 2395 .loc 1 980 9 discriminator 1 view .LVU674 + 2396 0098 8022 movs r2, #128 + 2397 009a D205 lsls r2, r2, #23 + 2398 009c 9342 cmp r3, r2 + 2399 009e 7DD0 beq .L163 + 980:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** { + 2400 .loc 1 980 9 discriminator 2 view .LVU675 + 2401 00a0 504A ldr r2, .L180+16 + 2402 00a2 9342 cmp r3, r2 + 2403 00a4 7AD0 beq .L163 + 990:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** } + 2404 .loc 1 990 7 is_stmt 1 view .LVU676 + 2405 00a6 1A68 ldr r2, [r3] + 2406 00a8 0121 movs r1, #1 + 2407 00aa 0A43 orrs r2, r1 + 2408 00ac 1A60 str r2, [r3] + ARM GAS /tmp/ccUWVJFr.s page 96 + + + 2409 00ae 0020 movs r0, #0 + 2410 00b0 82E0 b .L151 + 2411 .LVL183: + 2412 .L147: + 881:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** { + 2413 .loc 1 881 46 is_stmt 0 discriminator 2 view .LVU677 + 2414 00b2 042D cmp r5, #4 + 2415 00b4 08D0 beq .L174 + 881:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** { + 2416 .loc 1 881 46 discriminator 5 view .LVU678 + 2417 00b6 082D cmp r5, #8 + 2418 00b8 0DD0 beq .L175 + 881:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** { + 2419 .loc 1 881 7 discriminator 8 view .LVU679 + 2420 00ba 4522 movs r2, #69 + 2421 00bc 845C ldrb r4, [r0, r2] + 881:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** { + 2422 .loc 1 881 46 discriminator 8 view .LVU680 + 2423 00be 023C subs r4, r4, #2 + 2424 00c0 6242 rsbs r2, r4, #0 + 2425 00c2 5441 adcs r4, r4, r2 + 2426 00c4 E4B2 uxtb r4, r4 + 2427 00c6 A7E7 b .L148 + 2428 .L174: + 881:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** { + 2429 .loc 1 881 7 discriminator 4 view .LVU681 + 2430 00c8 4322 movs r2, #67 + 2431 00ca 845C ldrb r4, [r0, r2] + 881:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** { + 2432 .loc 1 881 46 discriminator 4 view .LVU682 + 2433 00cc 023C subs r4, r4, #2 + 2434 00ce 6242 rsbs r2, r4, #0 + 2435 00d0 5441 adcs r4, r4, r2 + 2436 00d2 E4B2 uxtb r4, r4 + 2437 00d4 A0E7 b .L148 + 2438 .L175: + 881:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** { + 2439 .loc 1 881 7 discriminator 7 view .LVU683 + 2440 00d6 4422 movs r2, #68 + 2441 00d8 845C ldrb r4, [r0, r2] + 881:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** { + 2442 .loc 1 881 46 discriminator 7 view .LVU684 + 2443 00da 023C subs r4, r4, #2 + 2444 00dc 6242 rsbs r2, r4, #0 + 2445 00de 5441 adcs r4, r4, r2 + 2446 00e0 E4B2 uxtb r4, r4 + 2447 00e2 99E7 b .L148 + 2448 .L152: + 885:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** { + 2449 .loc 1 885 51 discriminator 2 view .LVU685 + 2450 00e4 042D cmp r5, #4 + 2451 00e6 08D0 beq .L176 + 885:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** { + 2452 .loc 1 885 51 discriminator 5 view .LVU686 + 2453 00e8 082D cmp r5, #8 + 2454 00ea 0DD0 beq .L177 + 885:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** { + ARM GAS /tmp/ccUWVJFr.s page 97 + + + 2455 .loc 1 885 12 discriminator 8 view .LVU687 + 2456 00ec 4522 movs r2, #69 + 2457 00ee B25C ldrb r2, [r6, r2] + 885:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** { + 2458 .loc 1 885 51 discriminator 8 view .LVU688 + 2459 00f0 013A subs r2, r2, #1 + 2460 00f2 5042 rsbs r0, r2, #0 + 2461 00f4 4241 adcs r2, r2, r0 + 2462 .LVL184: + 885:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** { + 2463 .loc 1 885 51 discriminator 8 view .LVU689 + 2464 00f6 D2B2 uxtb r2, r2 + 2465 00f8 99E7 b .L153 + 2466 .LVL185: + 2467 .L176: + 885:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** { + 2468 .loc 1 885 12 discriminator 4 view .LVU690 + 2469 00fa 4322 movs r2, #67 + 2470 00fc B25C ldrb r2, [r6, r2] + 885:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** { + 2471 .loc 1 885 51 discriminator 4 view .LVU691 + 2472 00fe 013A subs r2, r2, #1 + 2473 0100 5042 rsbs r0, r2, #0 + 2474 0102 4241 adcs r2, r2, r0 + 2475 .LVL186: + 885:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** { + 2476 .loc 1 885 51 discriminator 4 view .LVU692 + 2477 0104 D2B2 uxtb r2, r2 + 2478 0106 92E7 b .L153 + 2479 .LVL187: + 2480 .L177: + 885:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** { + 2481 .loc 1 885 12 discriminator 7 view .LVU693 + 2482 0108 4422 movs r2, #68 + 2483 010a B25C ldrb r2, [r6, r2] + 885:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** { + 2484 .loc 1 885 51 discriminator 7 view .LVU694 + 2485 010c 013A subs r2, r2, #1 + 2486 010e 5042 rsbs r0, r2, #0 + 2487 0110 4241 adcs r2, r2, r0 + 2488 .LVL188: + 885:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** { + 2489 .loc 1 885 51 discriminator 7 view .LVU695 + 2490 0112 D2B2 uxtb r2, r2 + 2491 0114 8BE7 b .L153 + 2492 .L156: + 893:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** } + 2493 .loc 1 893 7 discriminator 2 view .LVU696 + 2494 0116 042D cmp r5, #4 + 2495 0118 0CD0 beq .L178 + 893:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** } + 2496 .loc 1 893 7 discriminator 4 view .LVU697 + 2497 011a 082D cmp r5, #8 + 2498 011c 24D0 beq .L179 + 893:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** } + 2499 .loc 1 893 7 discriminator 7 view .LVU698 + 2500 011e 4522 movs r2, #69 + ARM GAS /tmp/ccUWVJFr.s page 98 + + + 2501 0120 0220 movs r0, #2 + 2502 0122 B054 strb r0, [r6, r2] + 901:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** { + 2503 .loc 1 901 3 is_stmt 1 view .LVU699 + 2504 0124 042D cmp r5, #4 + 2505 0126 08D0 beq .L159 + 2506 0128 082D cmp r5, #8 + 2507 012a 20D0 beq .L161 + 2508 012c 002D cmp r5, #0 + 2509 012e 8CD0 beq .L157 + 2510 0130 0120 movs r0, #1 + 2511 0132 41E0 b .L151 + 2512 .L178: + 893:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** } + 2513 .loc 1 893 7 is_stmt 0 discriminator 3 view .LVU700 + 2514 0134 4322 movs r2, #67 + 2515 0136 0220 movs r0, #2 + 2516 0138 B054 strb r0, [r6, r2] + 901:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** { + 2517 .loc 1 901 3 is_stmt 1 view .LVU701 + 2518 .L159: + 927:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** htim->hdma[TIM_DMA_ID_CC2]->XferHalfCpltCallback = TIM_DMADelayPulseHalfCplt; + 2519 .loc 1 927 7 view .LVU702 + 927:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** htim->hdma[TIM_DMA_ID_CC2]->XferHalfCpltCallback = TIM_DMADelayPulseHalfCplt; + 2520 .loc 1 927 17 is_stmt 0 view .LVU703 + 2521 013a B26A ldr r2, [r6, #40] + 927:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** htim->hdma[TIM_DMA_ID_CC2]->XferHalfCpltCallback = TIM_DMADelayPulseHalfCplt; + 2522 .loc 1 927 52 view .LVU704 + 2523 013c 2548 ldr r0, .L180 + 2524 013e 9062 str r0, [r2, #40] + 928:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** + 2525 .loc 1 928 7 is_stmt 1 view .LVU705 + 928:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** + 2526 .loc 1 928 17 is_stmt 0 view .LVU706 + 2527 0140 B26A ldr r2, [r6, #40] + 928:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** + 2528 .loc 1 928 56 view .LVU707 + 2529 0142 2548 ldr r0, .L180+4 + 2530 0144 D062 str r0, [r2, #44] + 931:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** + 2531 .loc 1 931 7 is_stmt 1 view .LVU708 + 931:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** + 2532 .loc 1 931 17 is_stmt 0 view .LVU709 + 2533 0146 B26A ldr r2, [r6, #40] + 931:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** + 2534 .loc 1 931 53 view .LVU710 + 2535 0148 2448 ldr r0, .L180+8 + 2536 014a 1063 str r0, [r2, #48] + 934:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** Length) != HAL_OK) + 2537 .loc 1 934 7 is_stmt 1 view .LVU711 + 934:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** Length) != HAL_OK) + 2538 .loc 1 934 88 is_stmt 0 view .LVU712 + 2539 014c 3268 ldr r2, [r6] + 934:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** Length) != HAL_OK) + 2540 .loc 1 934 83 view .LVU713 + 2541 014e 3832 adds r2, r2, #56 + 934:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** Length) != HAL_OK) + ARM GAS /tmp/ccUWVJFr.s page 99 + + + 2542 .loc 1 934 11 view .LVU714 + 2543 0150 B06A ldr r0, [r6, #40] + 2544 0152 FFF7FEFF bl HAL_DMA_Start_IT + 2545 .LVL189: + 934:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** Length) != HAL_OK) + 2546 .loc 1 934 10 discriminator 1 view .LVU715 + 2547 0156 0028 cmp r0, #0 + 2548 0158 35D1 bne .L171 + 941:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** break; + 2549 .loc 1 941 7 is_stmt 1 view .LVU716 + 2550 015a 3268 ldr r2, [r6] + 2551 015c D168 ldr r1, [r2, #12] + 2552 015e 8023 movs r3, #128 + 2553 0160 DB00 lsls r3, r3, #3 + 2554 0162 0B43 orrs r3, r1 + 2555 0164 D360 str r3, [r2, #12] + 942:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** } + 2556 .loc 1 942 7 view .LVU717 + 971:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** { + 2557 .loc 1 971 3 view .LVU718 + 2558 0166 87E7 b .L162 + 2559 .LVL190: + 2560 .L179: + 893:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** } + 2561 .loc 1 893 7 is_stmt 0 discriminator 6 view .LVU719 + 2562 0168 4422 movs r2, #68 + 2563 016a 0220 movs r0, #2 + 2564 016c B054 strb r0, [r6, r2] + 901:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** { + 2565 .loc 1 901 3 is_stmt 1 view .LVU720 + 2566 .L161: + 948:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** htim->hdma[TIM_DMA_ID_CC3]->XferHalfCpltCallback = TIM_DMADelayPulseHalfCplt; + 2567 .loc 1 948 7 view .LVU721 + 948:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** htim->hdma[TIM_DMA_ID_CC3]->XferHalfCpltCallback = TIM_DMADelayPulseHalfCplt; + 2568 .loc 1 948 17 is_stmt 0 view .LVU722 + 2569 016e F26A ldr r2, [r6, #44] + 948:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** htim->hdma[TIM_DMA_ID_CC3]->XferHalfCpltCallback = TIM_DMADelayPulseHalfCplt; + 2570 .loc 1 948 52 view .LVU723 + 2571 0170 1848 ldr r0, .L180 + 2572 0172 9062 str r0, [r2, #40] + 949:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** + 2573 .loc 1 949 7 is_stmt 1 view .LVU724 + 949:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** + 2574 .loc 1 949 17 is_stmt 0 view .LVU725 + 2575 0174 F26A ldr r2, [r6, #44] + 949:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** + 2576 .loc 1 949 56 view .LVU726 + 2577 0176 1848 ldr r0, .L180+4 + 2578 0178 D062 str r0, [r2, #44] + 952:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** + 2579 .loc 1 952 7 is_stmt 1 view .LVU727 + 952:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** + 2580 .loc 1 952 17 is_stmt 0 view .LVU728 + 2581 017a F26A ldr r2, [r6, #44] + 952:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** + 2582 .loc 1 952 53 view .LVU729 + 2583 017c 1748 ldr r0, .L180+8 + ARM GAS /tmp/ccUWVJFr.s page 100 + + + 2584 017e 1063 str r0, [r2, #48] + 955:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** Length) != HAL_OK) + 2585 .loc 1 955 7 is_stmt 1 view .LVU730 + 955:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** Length) != HAL_OK) + 2586 .loc 1 955 88 is_stmt 0 view .LVU731 + 2587 0180 3268 ldr r2, [r6] + 955:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** Length) != HAL_OK) + 2588 .loc 1 955 83 view .LVU732 + 2589 0182 3C32 adds r2, r2, #60 + 955:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** Length) != HAL_OK) + 2590 .loc 1 955 11 view .LVU733 + 2591 0184 F06A ldr r0, [r6, #44] + 2592 0186 FFF7FEFF bl HAL_DMA_Start_IT + 2593 .LVL191: + 955:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** Length) != HAL_OK) + 2594 .loc 1 955 10 discriminator 1 view .LVU734 + 2595 018a 0028 cmp r0, #0 + 2596 018c 1DD1 bne .L172 + 962:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** break; + 2597 .loc 1 962 7 is_stmt 1 view .LVU735 + 2598 018e 3268 ldr r2, [r6] + 2599 0190 D168 ldr r1, [r2, #12] + 2600 0192 8023 movs r3, #128 + 2601 0194 1B01 lsls r3, r3, #4 + 2602 0196 0B43 orrs r3, r1 + 2603 0198 D360 str r3, [r2, #12] + 963:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** } + 2604 .loc 1 963 7 view .LVU736 + 971:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** { + 2605 .loc 1 971 3 view .LVU737 + 2606 019a 6DE7 b .L162 + 2607 .L163: + 982:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** if (!IS_TIM_SLAVEMODE_TRIGGER_ENABLED(tmpsmcr)) + 2608 .loc 1 982 7 view .LVU738 + 982:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** if (!IS_TIM_SLAVEMODE_TRIGGER_ENABLED(tmpsmcr)) + 2609 .loc 1 982 31 is_stmt 0 view .LVU739 + 2610 019c 9968 ldr r1, [r3, #8] + 982:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** if (!IS_TIM_SLAVEMODE_TRIGGER_ENABLED(tmpsmcr)) + 2611 .loc 1 982 15 view .LVU740 + 2612 019e 0722 movs r2, #7 + 2613 01a0 0A40 ands r2, r1 + 2614 .LVL192: + 983:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** { + 2615 .loc 1 983 7 is_stmt 1 view .LVU741 + 983:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** { + 2616 .loc 1 983 10 is_stmt 0 view .LVU742 + 2617 01a2 062A cmp r2, #6 + 2618 01a4 13D0 beq .L173 + 985:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** } + 2619 .loc 1 985 9 is_stmt 1 view .LVU743 + 2620 01a6 1A68 ldr r2, [r3] + 2621 .LVL193: + 985:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** } + 2622 .loc 1 985 9 is_stmt 0 view .LVU744 + 2623 01a8 0121 movs r1, #1 + 2624 .LVL194: + 985:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** } + ARM GAS /tmp/ccUWVJFr.s page 101 + + + 2625 .loc 1 985 9 view .LVU745 + 2626 01aa 0A43 orrs r2, r1 + 2627 01ac 1A60 str r2, [r3] + 2628 01ae 0020 movs r0, #0 + 2629 01b0 02E0 b .L151 + 2630 .LVL195: + 2631 .L165: + 883:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** } + 2632 .loc 1 883 12 view .LVU746 + 2633 01b2 0220 movs r0, #2 + 2634 .LVL196: + 883:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** } + 2635 .loc 1 883 12 view .LVU747 + 2636 01b4 00E0 b .L151 + 2637 .L166: + 898:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** } + 2638 .loc 1 898 12 view .LVU748 + 2639 01b6 0120 movs r0, #1 + 2640 .LVL197: + 2641 .L151: + 996:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** + 2642 .loc 1 996 1 view .LVU749 + 2643 @ sp needed + 2644 .LVL198: + 2645 .LVL199: + 996:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** + 2646 .loc 1 996 1 view .LVU750 + 2647 01b8 70BD pop {r4, r5, r6, pc} + 2648 .LVL200: + 2649 .L167: + 889:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** } + 2650 .loc 1 889 14 view .LVU751 + 2651 01ba 0120 movs r0, #1 + 2652 01bc FCE7 b .L151 + 2653 .L168: + 2654 01be 0120 movs r0, #1 + 2655 01c0 FAE7 b .L151 + 2656 .LVL201: + 2657 .L170: + 917:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** } + 2658 .loc 1 917 16 view .LVU752 + 2659 01c2 0120 movs r0, #1 + 2660 01c4 F8E7 b .L151 + 2661 .L171: + 938:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** } + 2662 .loc 1 938 16 view .LVU753 + 2663 01c6 0120 movs r0, #1 + 2664 01c8 F6E7 b .L151 + 2665 .L172: + 959:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** } + 2666 .loc 1 959 16 view .LVU754 + 2667 01ca 0120 movs r0, #1 + 2668 01cc F4E7 b .L151 + 2669 .LVL202: + 2670 .L173: + 959:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** } + 2671 .loc 1 959 16 view .LVU755 + ARM GAS /tmp/ccUWVJFr.s page 102 + + + 2672 01ce 0020 movs r0, #0 + 2673 01d0 F2E7 b .L151 + 2674 .L181: + 2675 01d2 C046 .align 2 + 2676 .L180: + 2677 01d4 00000000 .word TIM_DMADelayPulseNCplt + 2678 01d8 00000000 .word TIM_DMADelayPulseHalfCplt + 2679 01dc 00000000 .word TIM_DMAErrorCCxN + 2680 01e0 002C0140 .word 1073818624 + 2681 01e4 00040040 .word 1073742848 + 2682 .cfi_endproc + 2683 .LFE54: + 2685 .section .text.HAL_TIMEx_OCN_Stop_DMA,"ax",%progbits + 2686 .align 1 + 2687 .global HAL_TIMEx_OCN_Stop_DMA + 2688 .syntax unified + 2689 .code 16 + 2690 .thumb_func + 2692 HAL_TIMEx_OCN_Stop_DMA: + 2693 .LVL203: + 2694 .LFB55: +1010:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** HAL_StatusTypeDef status = HAL_OK; + 2695 .loc 1 1010 1 is_stmt 1 view -0 + 2696 .cfi_startproc + 2697 @ args = 0, pretend = 0, frame = 0 + 2698 @ frame_needed = 0, uses_anonymous_args = 0 +1010:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** HAL_StatusTypeDef status = HAL_OK; + 2699 .loc 1 1010 1 is_stmt 0 view .LVU757 + 2700 0000 70B5 push {r4, r5, r6, lr} + 2701 .cfi_def_cfa_offset 16 + 2702 .cfi_offset 4, -16 + 2703 .cfi_offset 5, -12 + 2704 .cfi_offset 6, -8 + 2705 .cfi_offset 14, -4 + 2706 0002 0400 movs r4, r0 + 2707 0004 0D00 movs r5, r1 +1011:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** + 2708 .loc 1 1011 3 is_stmt 1 view .LVU758 + 2709 .LVL204: +1014:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** + 2710 .loc 1 1014 3 view .LVU759 +1016:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** { + 2711 .loc 1 1016 3 view .LVU760 + 2712 0006 0429 cmp r1, #4 + 2713 0008 31D0 beq .L183 + 2714 000a 0829 cmp r1, #8 + 2715 000c 38D0 beq .L184 + 2716 000e 0029 cmp r1, #0 + 2717 0010 52D1 bne .L192 +1021:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** (void)HAL_DMA_Abort_IT(htim->hdma[TIM_DMA_ID_CC1]); + 2718 .loc 1 1021 7 view .LVU761 + 2719 0012 0268 ldr r2, [r0] + 2720 0014 D368 ldr r3, [r2, #12] + 2721 0016 2949 ldr r1, .L195 + 2722 .LVL205: +1021:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** (void)HAL_DMA_Abort_IT(htim->hdma[TIM_DMA_ID_CC1]); + 2723 .loc 1 1021 7 is_stmt 0 view .LVU762 + ARM GAS /tmp/ccUWVJFr.s page 103 + + + 2724 0018 0B40 ands r3, r1 + 2725 001a D360 str r3, [r2, #12] +1022:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** break; + 2726 .loc 1 1022 7 is_stmt 1 view .LVU763 +1022:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** break; + 2727 .loc 1 1022 13 is_stmt 0 view .LVU764 + 2728 001c 406A ldr r0, [r0, #36] + 2729 .LVL206: +1022:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** break; + 2730 .loc 1 1022 13 view .LVU765 + 2731 001e FFF7FEFF bl HAL_DMA_Abort_IT + 2732 .LVL207: +1023:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** } + 2733 .loc 1 1023 7 is_stmt 1 view .LVU766 +1047:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** { + 2734 .loc 1 1047 3 view .LVU767 + 2735 .L186: +1050:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** + 2736 .loc 1 1050 5 view .LVU768 + 2737 0022 2068 ldr r0, [r4] + 2738 0024 0022 movs r2, #0 + 2739 0026 2900 movs r1, r5 + 2740 0028 FFF7FEFF bl TIM_CCxNChannelCmd + 2741 .LVL208: +1053:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** + 2742 .loc 1 1053 5 view .LVU769 +1053:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** + 2743 .loc 1 1053 5 view .LVU770 + 2744 002c 2368 ldr r3, [r4] + 2745 002e 196A ldr r1, [r3, #32] + 2746 0030 234A ldr r2, .L195+4 + 2747 0032 1142 tst r1, r2 + 2748 0034 07D1 bne .L187 +1053:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** + 2749 .loc 1 1053 5 discriminator 1 view .LVU771 + 2750 0036 196A ldr r1, [r3, #32] + 2751 0038 224A ldr r2, .L195+8 + 2752 003a 1142 tst r1, r2 + 2753 003c 03D1 bne .L187 +1053:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** + 2754 .loc 1 1053 5 discriminator 3 view .LVU772 + 2755 003e 5A6C ldr r2, [r3, #68] + 2756 0040 2149 ldr r1, .L195+12 + 2757 0042 0A40 ands r2, r1 + 2758 0044 5A64 str r2, [r3, #68] + 2759 .L187: +1053:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** + 2760 .loc 1 1053 5 discriminator 5 view .LVU773 +1056:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** + 2761 .loc 1 1056 5 view .LVU774 +1056:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** + 2762 .loc 1 1056 5 view .LVU775 + 2763 0046 2368 ldr r3, [r4] + 2764 0048 196A ldr r1, [r3, #32] + 2765 004a 1D4A ldr r2, .L195+4 + 2766 004c 1142 tst r1, r2 + 2767 004e 07D1 bne .L188 + ARM GAS /tmp/ccUWVJFr.s page 104 + + +1056:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** + 2768 .loc 1 1056 5 discriminator 1 view .LVU776 + 2769 0050 196A ldr r1, [r3, #32] + 2770 0052 1C4A ldr r2, .L195+8 + 2771 0054 1142 tst r1, r2 + 2772 0056 03D1 bne .L188 +1056:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** + 2773 .loc 1 1056 5 discriminator 3 view .LVU777 + 2774 0058 1A68 ldr r2, [r3] + 2775 005a 0121 movs r1, #1 + 2776 005c 8A43 bics r2, r1 + 2777 005e 1A60 str r2, [r3] + 2778 .L188: +1056:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** + 2779 .loc 1 1056 5 discriminator 5 view .LVU778 +1059:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** } + 2780 .loc 1 1059 5 view .LVU779 + 2781 0060 002D cmp r5, #0 + 2782 0062 16D1 bne .L189 +1059:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** } + 2783 .loc 1 1059 5 is_stmt 0 discriminator 1 view .LVU780 + 2784 0064 4223 movs r3, #66 + 2785 0066 0122 movs r2, #1 + 2786 0068 E254 strb r2, [r4, r3] + 2787 006a 0020 movs r0, #0 + 2788 .L185: + 2789 .LVL209: +1063:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** } + 2790 .loc 1 1063 3 is_stmt 1 view .LVU781 +1064:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** + 2791 .loc 1 1064 1 is_stmt 0 view .LVU782 + 2792 @ sp needed + 2793 .LVL210: + 2794 .LVL211: +1064:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** + 2795 .loc 1 1064 1 view .LVU783 + 2796 006c 70BD pop {r4, r5, r6, pc} + 2797 .LVL212: + 2798 .L183: +1029:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** (void)HAL_DMA_Abort_IT(htim->hdma[TIM_DMA_ID_CC2]); + 2799 .loc 1 1029 7 is_stmt 1 view .LVU784 + 2800 006e 0268 ldr r2, [r0] + 2801 0070 D368 ldr r3, [r2, #12] + 2802 0072 1649 ldr r1, .L195+16 + 2803 .LVL213: +1029:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** (void)HAL_DMA_Abort_IT(htim->hdma[TIM_DMA_ID_CC2]); + 2804 .loc 1 1029 7 is_stmt 0 view .LVU785 + 2805 0074 0B40 ands r3, r1 + 2806 0076 D360 str r3, [r2, #12] +1030:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** break; + 2807 .loc 1 1030 7 is_stmt 1 view .LVU786 +1030:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** break; + 2808 .loc 1 1030 13 is_stmt 0 view .LVU787 + 2809 0078 806A ldr r0, [r0, #40] + 2810 .LVL214: +1030:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** break; + 2811 .loc 1 1030 13 view .LVU788 + ARM GAS /tmp/ccUWVJFr.s page 105 + + + 2812 007a FFF7FEFF bl HAL_DMA_Abort_IT + 2813 .LVL215: +1031:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** } + 2814 .loc 1 1031 7 is_stmt 1 view .LVU789 +1047:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** { + 2815 .loc 1 1047 3 view .LVU790 + 2816 007e D0E7 b .L186 + 2817 .LVL216: + 2818 .L184: +1037:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** (void)HAL_DMA_Abort_IT(htim->hdma[TIM_DMA_ID_CC3]); + 2819 .loc 1 1037 7 view .LVU791 + 2820 0080 0268 ldr r2, [r0] + 2821 0082 D368 ldr r3, [r2, #12] + 2822 0084 1249 ldr r1, .L195+20 + 2823 .LVL217: +1037:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** (void)HAL_DMA_Abort_IT(htim->hdma[TIM_DMA_ID_CC3]); + 2824 .loc 1 1037 7 is_stmt 0 view .LVU792 + 2825 0086 0B40 ands r3, r1 + 2826 0088 D360 str r3, [r2, #12] +1038:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** break; + 2827 .loc 1 1038 7 is_stmt 1 view .LVU793 +1038:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** break; + 2828 .loc 1 1038 13 is_stmt 0 view .LVU794 + 2829 008a C06A ldr r0, [r0, #44] + 2830 .LVL218: +1038:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** break; + 2831 .loc 1 1038 13 view .LVU795 + 2832 008c FFF7FEFF bl HAL_DMA_Abort_IT + 2833 .LVL219: +1039:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** } + 2834 .loc 1 1039 7 is_stmt 1 view .LVU796 +1047:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** { + 2835 .loc 1 1047 3 view .LVU797 + 2836 0090 C7E7 b .L186 + 2837 .L189: +1059:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** } + 2838 .loc 1 1059 5 is_stmt 0 discriminator 2 view .LVU798 + 2839 0092 042D cmp r5, #4 + 2840 0094 06D0 beq .L193 +1059:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** } + 2841 .loc 1 1059 5 discriminator 4 view .LVU799 + 2842 0096 082D cmp r5, #8 + 2843 0098 09D0 beq .L194 +1059:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** } + 2844 .loc 1 1059 5 discriminator 7 view .LVU800 + 2845 009a 4523 movs r3, #69 + 2846 009c 0122 movs r2, #1 + 2847 009e E254 strb r2, [r4, r3] + 2848 00a0 0020 movs r0, #0 + 2849 00a2 E3E7 b .L185 + 2850 .L193: +1059:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** } + 2851 .loc 1 1059 5 discriminator 3 view .LVU801 + 2852 00a4 4323 movs r3, #67 + 2853 00a6 0122 movs r2, #1 + 2854 00a8 E254 strb r2, [r4, r3] + 2855 00aa 0020 movs r0, #0 + ARM GAS /tmp/ccUWVJFr.s page 106 + + + 2856 00ac DEE7 b .L185 + 2857 .L194: +1059:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** } + 2858 .loc 1 1059 5 discriminator 6 view .LVU802 + 2859 00ae 4423 movs r3, #68 + 2860 00b0 0122 movs r2, #1 + 2861 00b2 E254 strb r2, [r4, r3] + 2862 00b4 0020 movs r0, #0 + 2863 00b6 D9E7 b .L185 + 2864 .LVL220: + 2865 .L192: +1016:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** { + 2866 .loc 1 1016 3 view .LVU803 + 2867 00b8 0120 movs r0, #1 + 2868 .LVL221: +1016:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** { + 2869 .loc 1 1016 3 view .LVU804 + 2870 00ba D7E7 b .L185 + 2871 .L196: + 2872 .align 2 + 2873 .L195: + 2874 00bc FFFDFFFF .word -513 + 2875 00c0 11110000 .word 4369 + 2876 00c4 44040000 .word 1092 + 2877 00c8 FF7FFFFF .word -32769 + 2878 00cc FFFBFFFF .word -1025 + 2879 00d0 FFF7FFFF .word -2049 + 2880 .cfi_endproc + 2881 .LFE55: + 2883 .section .text.HAL_TIMEx_PWMN_Start,"ax",%progbits + 2884 .align 1 + 2885 .global HAL_TIMEx_PWMN_Start + 2886 .syntax unified + 2887 .code 16 + 2888 .thumb_func + 2890 HAL_TIMEx_PWMN_Start: + 2891 .LVL222: + 2892 .LFB56: +1111:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** uint32_t tmpsmcr; + 2893 .loc 1 1111 1 is_stmt 1 view -0 + 2894 .cfi_startproc + 2895 @ args = 0, pretend = 0, frame = 0 + 2896 @ frame_needed = 0, uses_anonymous_args = 0 +1111:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** uint32_t tmpsmcr; + 2897 .loc 1 1111 1 is_stmt 0 view .LVU806 + 2898 0000 10B5 push {r4, lr} + 2899 .cfi_def_cfa_offset 8 + 2900 .cfi_offset 4, -8 + 2901 .cfi_offset 14, -4 + 2902 0002 0400 movs r4, r0 +1112:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** + 2903 .loc 1 1112 3 is_stmt 1 view .LVU807 +1115:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** + 2904 .loc 1 1115 3 view .LVU808 +1118:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** { + 2905 .loc 1 1118 3 view .LVU809 +1118:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** { + ARM GAS /tmp/ccUWVJFr.s page 107 + + + 2906 .loc 1 1118 46 is_stmt 0 view .LVU810 + 2907 0004 0029 cmp r1, #0 + 2908 0006 27D1 bne .L198 +1118:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** { + 2909 .loc 1 1118 7 discriminator 1 view .LVU811 + 2910 0008 4223 movs r3, #66 + 2911 000a C35C ldrb r3, [r0, r3] +1118:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** { + 2912 .loc 1 1118 46 discriminator 1 view .LVU812 + 2913 000c 013B subs r3, r3, #1 + 2914 000e 5A1E subs r2, r3, #1 + 2915 0010 9341 sbcs r3, r3, r2 + 2916 0012 DBB2 uxtb r3, r3 + 2917 .L199: +1118:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** { + 2918 .loc 1 1118 6 discriminator 12 view .LVU813 + 2919 0014 002B cmp r3, #0 + 2920 0016 53D1 bne .L209 +1124:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** + 2921 .loc 1 1124 3 is_stmt 1 view .LVU814 + 2922 0018 0029 cmp r1, #0 + 2923 001a 36D1 bne .L203 +1124:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** + 2924 .loc 1 1124 3 is_stmt 0 discriminator 1 view .LVU815 + 2925 001c 4233 adds r3, r3, #66 + 2926 001e 0222 movs r2, #2 + 2927 0020 E254 strb r2, [r4, r3] + 2928 .L204: +1127:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** + 2929 .loc 1 1127 3 is_stmt 1 view .LVU816 + 2930 0022 2068 ldr r0, [r4] + 2931 .LVL223: +1127:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** + 2932 .loc 1 1127 3 is_stmt 0 view .LVU817 + 2933 0024 0422 movs r2, #4 + 2934 0026 FFF7FEFF bl TIM_CCxNChannelCmd + 2935 .LVL224: +1130:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** + 2936 .loc 1 1130 3 is_stmt 1 view .LVU818 + 2937 002a 2268 ldr r2, [r4] + 2938 002c 516C ldr r1, [r2, #68] + 2939 002e 8023 movs r3, #128 + 2940 0030 1B02 lsls r3, r3, #8 + 2941 0032 0B43 orrs r3, r1 + 2942 0034 5364 str r3, [r2, #68] +1133:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** { + 2943 .loc 1 1133 3 view .LVU819 +1133:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** { + 2944 .loc 1 1133 7 is_stmt 0 view .LVU820 + 2945 0036 2368 ldr r3, [r4] +1133:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** { + 2946 .loc 1 1133 6 view .LVU821 + 2947 0038 234A ldr r2, .L215 + 2948 003a 9342 cmp r3, r2 + 2949 003c 35D0 beq .L207 +1133:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** { + 2950 .loc 1 1133 7 discriminator 1 view .LVU822 + ARM GAS /tmp/ccUWVJFr.s page 108 + + + 2951 003e 8022 movs r2, #128 + 2952 0040 D205 lsls r2, r2, #23 + 2953 0042 9342 cmp r3, r2 + 2954 0044 31D0 beq .L207 +1133:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** { + 2955 .loc 1 1133 7 discriminator 2 view .LVU823 + 2956 0046 214A ldr r2, .L215+4 + 2957 0048 9342 cmp r3, r2 + 2958 004a 2ED0 beq .L207 +1143:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** } + 2959 .loc 1 1143 5 is_stmt 1 view .LVU824 + 2960 004c 1A68 ldr r2, [r3] + 2961 004e 0121 movs r1, #1 + 2962 0050 0A43 orrs r2, r1 + 2963 0052 1A60 str r2, [r3] +1147:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** } + 2964 .loc 1 1147 10 is_stmt 0 view .LVU825 + 2965 0054 0020 movs r0, #0 + 2966 0056 34E0 b .L202 + 2967 .LVL225: + 2968 .L198: +1118:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** { + 2969 .loc 1 1118 46 discriminator 2 view .LVU826 + 2970 0058 0429 cmp r1, #4 + 2971 005a 08D0 beq .L211 +1118:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** { + 2972 .loc 1 1118 46 discriminator 5 view .LVU827 + 2973 005c 0829 cmp r1, #8 + 2974 005e 0DD0 beq .L212 +1118:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** { + 2975 .loc 1 1118 7 discriminator 8 view .LVU828 + 2976 0060 4523 movs r3, #69 + 2977 0062 C35C ldrb r3, [r0, r3] +1118:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** { + 2978 .loc 1 1118 46 discriminator 8 view .LVU829 + 2979 0064 013B subs r3, r3, #1 + 2980 0066 5A1E subs r2, r3, #1 + 2981 0068 9341 sbcs r3, r3, r2 + 2982 006a DBB2 uxtb r3, r3 + 2983 006c D2E7 b .L199 + 2984 .L211: +1118:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** { + 2985 .loc 1 1118 7 discriminator 4 view .LVU830 + 2986 006e 4323 movs r3, #67 + 2987 0070 C35C ldrb r3, [r0, r3] +1118:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** { + 2988 .loc 1 1118 46 discriminator 4 view .LVU831 + 2989 0072 013B subs r3, r3, #1 + 2990 0074 5A1E subs r2, r3, #1 + 2991 0076 9341 sbcs r3, r3, r2 + 2992 0078 DBB2 uxtb r3, r3 + 2993 007a CBE7 b .L199 + 2994 .L212: +1118:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** { + 2995 .loc 1 1118 7 discriminator 7 view .LVU832 + 2996 007c 4423 movs r3, #68 + 2997 007e C35C ldrb r3, [r0, r3] + ARM GAS /tmp/ccUWVJFr.s page 109 + + +1118:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** { + 2998 .loc 1 1118 46 discriminator 7 view .LVU833 + 2999 0080 013B subs r3, r3, #1 + 3000 0082 5A1E subs r2, r3, #1 + 3001 0084 9341 sbcs r3, r3, r2 + 3002 0086 DBB2 uxtb r3, r3 + 3003 0088 C4E7 b .L199 + 3004 .L203: +1124:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** + 3005 .loc 1 1124 3 discriminator 2 view .LVU834 + 3006 008a 0429 cmp r1, #4 + 3007 008c 05D0 beq .L213 +1124:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** + 3008 .loc 1 1124 3 discriminator 4 view .LVU835 + 3009 008e 0829 cmp r1, #8 + 3010 0090 07D0 beq .L214 +1124:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** + 3011 .loc 1 1124 3 discriminator 7 view .LVU836 + 3012 0092 4523 movs r3, #69 + 3013 0094 0222 movs r2, #2 + 3014 0096 E254 strb r2, [r4, r3] + 3015 0098 C3E7 b .L204 + 3016 .L213: +1124:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** + 3017 .loc 1 1124 3 discriminator 3 view .LVU837 + 3018 009a 4323 movs r3, #67 + 3019 009c 0222 movs r2, #2 + 3020 009e E254 strb r2, [r4, r3] + 3021 00a0 BFE7 b .L204 + 3022 .L214: +1124:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** + 3023 .loc 1 1124 3 discriminator 6 view .LVU838 + 3024 00a2 4423 movs r3, #68 + 3025 00a4 0222 movs r2, #2 + 3026 00a6 E254 strb r2, [r4, r3] + 3027 00a8 BBE7 b .L204 + 3028 .LVL226: + 3029 .L207: +1135:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** if (!IS_TIM_SLAVEMODE_TRIGGER_ENABLED(tmpsmcr)) + 3030 .loc 1 1135 5 is_stmt 1 view .LVU839 +1135:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** if (!IS_TIM_SLAVEMODE_TRIGGER_ENABLED(tmpsmcr)) + 3031 .loc 1 1135 29 is_stmt 0 view .LVU840 + 3032 00aa 9968 ldr r1, [r3, #8] +1135:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** if (!IS_TIM_SLAVEMODE_TRIGGER_ENABLED(tmpsmcr)) + 3033 .loc 1 1135 13 view .LVU841 + 3034 00ac 0722 movs r2, #7 + 3035 00ae 0A40 ands r2, r1 + 3036 .LVL227: +1136:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** { + 3037 .loc 1 1136 5 is_stmt 1 view .LVU842 +1136:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** { + 3038 .loc 1 1136 8 is_stmt 0 view .LVU843 + 3039 00b0 062A cmp r2, #6 + 3040 00b2 07D0 beq .L210 +1138:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** } + 3041 .loc 1 1138 7 is_stmt 1 view .LVU844 + 3042 00b4 1A68 ldr r2, [r3] + ARM GAS /tmp/ccUWVJFr.s page 110 + + + 3043 .LVL228: +1138:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** } + 3044 .loc 1 1138 7 is_stmt 0 view .LVU845 + 3045 00b6 0121 movs r1, #1 + 3046 .LVL229: +1138:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** } + 3047 .loc 1 1138 7 view .LVU846 + 3048 00b8 0A43 orrs r2, r1 + 3049 00ba 1A60 str r2, [r3] +1147:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** } + 3050 .loc 1 1147 10 view .LVU847 + 3051 00bc 0020 movs r0, #0 + 3052 00be 00E0 b .L202 + 3053 .LVL230: + 3054 .L209: +1120:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** } + 3055 .loc 1 1120 12 view .LVU848 + 3056 00c0 0120 movs r0, #1 + 3057 .LVL231: + 3058 .L202: +1148:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** + 3059 .loc 1 1148 1 view .LVU849 + 3060 @ sp needed + 3061 .LVL232: +1148:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** + 3062 .loc 1 1148 1 view .LVU850 + 3063 00c2 10BD pop {r4, pc} + 3064 .LVL233: + 3065 .L210: +1147:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** } + 3066 .loc 1 1147 10 view .LVU851 + 3067 00c4 0020 movs r0, #0 + 3068 00c6 FCE7 b .L202 + 3069 .L216: + 3070 .align 2 + 3071 .L215: + 3072 00c8 002C0140 .word 1073818624 + 3073 00cc 00040040 .word 1073742848 + 3074 .cfi_endproc + 3075 .LFE56: + 3077 .section .text.HAL_TIMEx_PWMN_Stop,"ax",%progbits + 3078 .align 1 + 3079 .global HAL_TIMEx_PWMN_Stop + 3080 .syntax unified + 3081 .code 16 + 3082 .thumb_func + 3084 HAL_TIMEx_PWMN_Stop: + 3085 .LVL234: + 3086 .LFB57: +1161:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** /* Check the parameters */ + 3087 .loc 1 1161 1 is_stmt 1 view -0 + 3088 .cfi_startproc + 3089 @ args = 0, pretend = 0, frame = 0 + 3090 @ frame_needed = 0, uses_anonymous_args = 0 +1161:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** /* Check the parameters */ + 3091 .loc 1 1161 1 is_stmt 0 view .LVU853 + 3092 0000 70B5 push {r4, r5, r6, lr} + ARM GAS /tmp/ccUWVJFr.s page 111 + + + 3093 .cfi_def_cfa_offset 16 + 3094 .cfi_offset 4, -16 + 3095 .cfi_offset 5, -12 + 3096 .cfi_offset 6, -8 + 3097 .cfi_offset 14, -4 + 3098 0002 0400 movs r4, r0 + 3099 0004 0D00 movs r5, r1 +1163:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** + 3100 .loc 1 1163 3 is_stmt 1 view .LVU854 +1166:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** + 3101 .loc 1 1166 3 view .LVU855 + 3102 0006 0068 ldr r0, [r0] + 3103 .LVL235: +1166:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** + 3104 .loc 1 1166 3 is_stmt 0 view .LVU856 + 3105 0008 0022 movs r2, #0 + 3106 000a FFF7FEFF bl TIM_CCxNChannelCmd + 3107 .LVL236: +1169:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** + 3108 .loc 1 1169 3 is_stmt 1 view .LVU857 +1169:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** + 3109 .loc 1 1169 3 view .LVU858 + 3110 000e 2368 ldr r3, [r4] + 3111 0010 196A ldr r1, [r3, #32] + 3112 0012 174A ldr r2, .L226 + 3113 0014 1142 tst r1, r2 + 3114 0016 07D1 bne .L218 +1169:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** + 3115 .loc 1 1169 3 discriminator 1 view .LVU859 + 3116 0018 196A ldr r1, [r3, #32] + 3117 001a 164A ldr r2, .L226+4 + 3118 001c 1142 tst r1, r2 + 3119 001e 03D1 bne .L218 +1169:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** + 3120 .loc 1 1169 3 discriminator 3 view .LVU860 + 3121 0020 5A6C ldr r2, [r3, #68] + 3122 0022 1549 ldr r1, .L226+8 + 3123 0024 0A40 ands r2, r1 + 3124 0026 5A64 str r2, [r3, #68] + 3125 .L218: +1169:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** + 3126 .loc 1 1169 3 discriminator 5 view .LVU861 +1172:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** + 3127 .loc 1 1172 3 view .LVU862 +1172:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** + 3128 .loc 1 1172 3 view .LVU863 + 3129 0028 2368 ldr r3, [r4] + 3130 002a 196A ldr r1, [r3, #32] + 3131 002c 104A ldr r2, .L226 + 3132 002e 1142 tst r1, r2 + 3133 0030 07D1 bne .L219 +1172:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** + 3134 .loc 1 1172 3 discriminator 1 view .LVU864 + 3135 0032 196A ldr r1, [r3, #32] + 3136 0034 0F4A ldr r2, .L226+4 + 3137 0036 1142 tst r1, r2 + 3138 0038 03D1 bne .L219 + ARM GAS /tmp/ccUWVJFr.s page 112 + + +1172:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** + 3139 .loc 1 1172 3 discriminator 3 view .LVU865 + 3140 003a 1A68 ldr r2, [r3] + 3141 003c 0121 movs r1, #1 + 3142 003e 8A43 bics r2, r1 + 3143 0040 1A60 str r2, [r3] + 3144 .L219: +1172:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** + 3145 .loc 1 1172 3 discriminator 5 view .LVU866 +1175:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** + 3146 .loc 1 1175 3 view .LVU867 + 3147 0042 002D cmp r5, #0 + 3148 0044 04D1 bne .L220 +1175:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** + 3149 .loc 1 1175 3 is_stmt 0 discriminator 1 view .LVU868 + 3150 0046 4223 movs r3, #66 + 3151 0048 0122 movs r2, #1 + 3152 004a E254 strb r2, [r4, r3] + 3153 .L221: +1178:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** } + 3154 .loc 1 1178 3 is_stmt 1 view .LVU869 +1179:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** + 3155 .loc 1 1179 1 is_stmt 0 view .LVU870 + 3156 004c 0020 movs r0, #0 + 3157 @ sp needed + 3158 .LVL237: + 3159 .LVL238: +1179:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** + 3160 .loc 1 1179 1 view .LVU871 + 3161 004e 70BD pop {r4, r5, r6, pc} + 3162 .LVL239: + 3163 .L220: +1175:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** + 3164 .loc 1 1175 3 discriminator 2 view .LVU872 + 3165 0050 042D cmp r5, #4 + 3166 0052 05D0 beq .L224 +1175:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** + 3167 .loc 1 1175 3 discriminator 4 view .LVU873 + 3168 0054 082D cmp r5, #8 + 3169 0056 07D0 beq .L225 +1175:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** + 3170 .loc 1 1175 3 discriminator 7 view .LVU874 + 3171 0058 4523 movs r3, #69 + 3172 005a 0122 movs r2, #1 + 3173 005c E254 strb r2, [r4, r3] + 3174 005e F5E7 b .L221 + 3175 .L224: +1175:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** + 3176 .loc 1 1175 3 discriminator 3 view .LVU875 + 3177 0060 4323 movs r3, #67 + 3178 0062 0122 movs r2, #1 + 3179 0064 E254 strb r2, [r4, r3] + 3180 0066 F1E7 b .L221 + 3181 .L225: +1175:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** + 3182 .loc 1 1175 3 discriminator 6 view .LVU876 + 3183 0068 4423 movs r3, #68 + ARM GAS /tmp/ccUWVJFr.s page 113 + + + 3184 006a 0122 movs r2, #1 + 3185 006c E254 strb r2, [r4, r3] + 3186 006e EDE7 b .L221 + 3187 .L227: + 3188 .align 2 + 3189 .L226: + 3190 0070 11110000 .word 4369 + 3191 0074 44040000 .word 1092 + 3192 0078 FF7FFFFF .word -32769 + 3193 .cfi_endproc + 3194 .LFE57: + 3196 .section .text.HAL_TIMEx_PWMN_Start_IT,"ax",%progbits + 3197 .align 1 + 3198 .global HAL_TIMEx_PWMN_Start_IT + 3199 .syntax unified + 3200 .code 16 + 3201 .thumb_func + 3203 HAL_TIMEx_PWMN_Start_IT: + 3204 .LVL240: + 3205 .LFB58: +1193:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** HAL_StatusTypeDef status = HAL_OK; + 3206 .loc 1 1193 1 is_stmt 1 view -0 + 3207 .cfi_startproc + 3208 @ args = 0, pretend = 0, frame = 0 + 3209 @ frame_needed = 0, uses_anonymous_args = 0 +1193:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** HAL_StatusTypeDef status = HAL_OK; + 3210 .loc 1 1193 1 is_stmt 0 view .LVU878 + 3211 0000 10B5 push {r4, lr} + 3212 .cfi_def_cfa_offset 8 + 3213 .cfi_offset 4, -8 + 3214 .cfi_offset 14, -4 + 3215 0002 0400 movs r4, r0 +1194:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** uint32_t tmpsmcr; + 3216 .loc 1 1194 3 is_stmt 1 view .LVU879 + 3217 .LVL241: +1195:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** + 3218 .loc 1 1195 3 view .LVU880 +1198:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** + 3219 .loc 1 1198 3 view .LVU881 +1201:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** { + 3220 .loc 1 1201 3 view .LVU882 +1201:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** { + 3221 .loc 1 1201 46 is_stmt 0 view .LVU883 + 3222 0004 0029 cmp r1, #0 + 3223 0006 31D1 bne .L229 +1201:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** { + 3224 .loc 1 1201 7 discriminator 1 view .LVU884 + 3225 0008 4223 movs r3, #66 + 3226 000a C35C ldrb r3, [r0, r3] +1201:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** { + 3227 .loc 1 1201 46 discriminator 1 view .LVU885 + 3228 000c 013B subs r3, r3, #1 + 3229 000e 5A1E subs r2, r3, #1 + 3230 0010 9341 sbcs r3, r3, r2 + 3231 0012 DBB2 uxtb r3, r3 + 3232 .L230: +1201:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** { + ARM GAS /tmp/ccUWVJFr.s page 114 + + + 3233 .loc 1 1201 6 discriminator 12 view .LVU886 + 3234 0014 002B cmp r3, #0 + 3235 0016 6ED1 bne .L243 +1207:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** + 3236 .loc 1 1207 3 is_stmt 1 view .LVU887 + 3237 0018 0029 cmp r1, #0 + 3238 001a 40D1 bne .L234 +1207:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** + 3239 .loc 1 1207 3 is_stmt 0 discriminator 1 view .LVU888 + 3240 001c 4233 adds r3, r3, #66 + 3241 001e 0222 movs r2, #2 + 3242 0020 E254 strb r2, [r4, r3] +1209:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** { + 3243 .loc 1 1209 3 is_stmt 1 view .LVU889 + 3244 .L235: +1214:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** break; + 3245 .loc 1 1214 7 view .LVU890 + 3246 0022 2268 ldr r2, [r4] + 3247 0024 D368 ldr r3, [r2, #12] + 3248 0026 0220 movs r0, #2 + 3249 .LVL242: +1214:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** break; + 3250 .loc 1 1214 7 is_stmt 0 view .LVU891 + 3251 0028 0343 orrs r3, r0 + 3252 002a D360 str r3, [r2, #12] +1215:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** } + 3253 .loc 1 1215 7 is_stmt 1 view .LVU892 +1237:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** { + 3254 .loc 1 1237 3 view .LVU893 + 3255 .L240: +1240:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** + 3256 .loc 1 1240 5 view .LVU894 + 3257 002c 2268 ldr r2, [r4] + 3258 002e D368 ldr r3, [r2, #12] + 3259 0030 8020 movs r0, #128 + 3260 0032 0343 orrs r3, r0 + 3261 0034 D360 str r3, [r2, #12] +1243:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** + 3262 .loc 1 1243 5 view .LVU895 + 3263 0036 2068 ldr r0, [r4] + 3264 0038 0422 movs r2, #4 + 3265 003a FFF7FEFF bl TIM_CCxNChannelCmd + 3266 .LVL243: +1246:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** + 3267 .loc 1 1246 5 view .LVU896 + 3268 003e 2268 ldr r2, [r4] + 3269 0040 516C ldr r1, [r2, #68] + 3270 0042 8023 movs r3, #128 + 3271 0044 1B02 lsls r3, r3, #8 + 3272 0046 0B43 orrs r3, r1 + 3273 0048 5364 str r3, [r2, #68] +1249:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** { + 3274 .loc 1 1249 5 view .LVU897 +1249:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** { + 3275 .loc 1 1249 9 is_stmt 0 view .LVU898 + 3276 004a 2368 ldr r3, [r4] +1249:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** { + ARM GAS /tmp/ccUWVJFr.s page 115 + + + 3277 .loc 1 1249 8 view .LVU899 + 3278 004c 2C4A ldr r2, .L250 + 3279 004e 9342 cmp r3, r2 + 3280 0050 46D0 beq .L241 +1249:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** { + 3281 .loc 1 1249 9 discriminator 1 view .LVU900 + 3282 0052 8022 movs r2, #128 + 3283 0054 D205 lsls r2, r2, #23 + 3284 0056 9342 cmp r3, r2 + 3285 0058 42D0 beq .L241 +1249:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** { + 3286 .loc 1 1249 9 discriminator 2 view .LVU901 + 3287 005a 2A4A ldr r2, .L250+4 + 3288 005c 9342 cmp r3, r2 + 3289 005e 3FD0 beq .L241 +1259:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** } + 3290 .loc 1 1259 7 is_stmt 1 view .LVU902 + 3291 0060 1A68 ldr r2, [r3] + 3292 0062 0121 movs r1, #1 + 3293 0064 0A43 orrs r2, r1 + 3294 0066 1A60 str r2, [r3] + 3295 0068 0020 movs r0, #0 + 3296 006a 45E0 b .L233 + 3297 .LVL244: + 3298 .L229: +1201:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** { + 3299 .loc 1 1201 46 is_stmt 0 discriminator 2 view .LVU903 + 3300 006c 0429 cmp r1, #4 + 3301 006e 08D0 beq .L246 +1201:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** { + 3302 .loc 1 1201 46 discriminator 5 view .LVU904 + 3303 0070 0829 cmp r1, #8 + 3304 0072 0DD0 beq .L247 +1201:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** { + 3305 .loc 1 1201 7 discriminator 8 view .LVU905 + 3306 0074 4523 movs r3, #69 + 3307 0076 C35C ldrb r3, [r0, r3] +1201:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** { + 3308 .loc 1 1201 46 discriminator 8 view .LVU906 + 3309 0078 013B subs r3, r3, #1 + 3310 007a 5A1E subs r2, r3, #1 + 3311 007c 9341 sbcs r3, r3, r2 + 3312 007e DBB2 uxtb r3, r3 + 3313 0080 C8E7 b .L230 + 3314 .L246: +1201:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** { + 3315 .loc 1 1201 7 discriminator 4 view .LVU907 + 3316 0082 4323 movs r3, #67 + 3317 0084 C35C ldrb r3, [r0, r3] +1201:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** { + 3318 .loc 1 1201 46 discriminator 4 view .LVU908 + 3319 0086 013B subs r3, r3, #1 + 3320 0088 5A1E subs r2, r3, #1 + 3321 008a 9341 sbcs r3, r3, r2 + 3322 008c DBB2 uxtb r3, r3 + 3323 008e C1E7 b .L230 + 3324 .L247: + ARM GAS /tmp/ccUWVJFr.s page 116 + + +1201:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** { + 3325 .loc 1 1201 7 discriminator 7 view .LVU909 + 3326 0090 4423 movs r3, #68 + 3327 0092 C35C ldrb r3, [r0, r3] +1201:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** { + 3328 .loc 1 1201 46 discriminator 7 view .LVU910 + 3329 0094 013B subs r3, r3, #1 + 3330 0096 5A1E subs r2, r3, #1 + 3331 0098 9341 sbcs r3, r3, r2 + 3332 009a DBB2 uxtb r3, r3 + 3333 009c BAE7 b .L230 + 3334 .L234: +1207:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** + 3335 .loc 1 1207 3 discriminator 2 view .LVU911 + 3336 009e 0429 cmp r1, #4 + 3337 00a0 0CD0 beq .L248 +1207:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** + 3338 .loc 1 1207 3 discriminator 4 view .LVU912 + 3339 00a2 0829 cmp r1, #8 + 3340 00a4 13D0 beq .L249 +1207:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** + 3341 .loc 1 1207 3 discriminator 7 view .LVU913 + 3342 00a6 4523 movs r3, #69 + 3343 00a8 0222 movs r2, #2 + 3344 00aa E254 strb r2, [r4, r3] +1209:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** { + 3345 .loc 1 1209 3 is_stmt 1 view .LVU914 + 3346 00ac 0429 cmp r1, #4 + 3347 00ae 08D0 beq .L237 + 3348 00b0 0829 cmp r1, #8 + 3349 00b2 0FD0 beq .L239 + 3350 00b4 0029 cmp r1, #0 + 3351 00b6 B4D0 beq .L235 + 3352 00b8 0120 movs r0, #1 + 3353 .LVL245: +1209:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** { + 3354 .loc 1 1209 3 is_stmt 0 view .LVU915 + 3355 00ba 1DE0 b .L233 + 3356 .LVL246: + 3357 .L248: +1207:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** + 3358 .loc 1 1207 3 discriminator 3 view .LVU916 + 3359 00bc 4323 movs r3, #67 + 3360 00be 0222 movs r2, #2 + 3361 00c0 E254 strb r2, [r4, r3] +1209:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** { + 3362 .loc 1 1209 3 is_stmt 1 view .LVU917 + 3363 .L237: +1221:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** break; + 3364 .loc 1 1221 7 view .LVU918 + 3365 00c2 2268 ldr r2, [r4] + 3366 00c4 D368 ldr r3, [r2, #12] + 3367 00c6 0420 movs r0, #4 + 3368 .LVL247: +1221:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** break; + 3369 .loc 1 1221 7 is_stmt 0 view .LVU919 + 3370 00c8 0343 orrs r3, r0 + ARM GAS /tmp/ccUWVJFr.s page 117 + + + 3371 00ca D360 str r3, [r2, #12] +1222:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** } + 3372 .loc 1 1222 7 is_stmt 1 view .LVU920 +1237:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** { + 3373 .loc 1 1237 3 view .LVU921 + 3374 00cc AEE7 b .L240 + 3375 .LVL248: + 3376 .L249: +1207:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** + 3377 .loc 1 1207 3 is_stmt 0 discriminator 6 view .LVU922 + 3378 00ce 4423 movs r3, #68 + 3379 00d0 0222 movs r2, #2 + 3380 00d2 E254 strb r2, [r4, r3] +1209:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** { + 3381 .loc 1 1209 3 is_stmt 1 view .LVU923 + 3382 .L239: +1228:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** break; + 3383 .loc 1 1228 7 view .LVU924 + 3384 00d4 2268 ldr r2, [r4] + 3385 00d6 D368 ldr r3, [r2, #12] + 3386 00d8 0820 movs r0, #8 + 3387 .LVL249: +1228:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** break; + 3388 .loc 1 1228 7 is_stmt 0 view .LVU925 + 3389 00da 0343 orrs r3, r0 + 3390 00dc D360 str r3, [r2, #12] +1229:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** } + 3391 .loc 1 1229 7 is_stmt 1 view .LVU926 +1237:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** { + 3392 .loc 1 1237 3 view .LVU927 + 3393 00de A5E7 b .L240 + 3394 .LVL250: + 3395 .L241: +1251:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** if (!IS_TIM_SLAVEMODE_TRIGGER_ENABLED(tmpsmcr)) + 3396 .loc 1 1251 7 view .LVU928 +1251:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** if (!IS_TIM_SLAVEMODE_TRIGGER_ENABLED(tmpsmcr)) + 3397 .loc 1 1251 31 is_stmt 0 view .LVU929 + 3398 00e0 9968 ldr r1, [r3, #8] +1251:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** if (!IS_TIM_SLAVEMODE_TRIGGER_ENABLED(tmpsmcr)) + 3399 .loc 1 1251 15 view .LVU930 + 3400 00e2 0722 movs r2, #7 + 3401 00e4 0A40 ands r2, r1 + 3402 .LVL251: +1252:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** { + 3403 .loc 1 1252 7 is_stmt 1 view .LVU931 +1252:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** { + 3404 .loc 1 1252 10 is_stmt 0 view .LVU932 + 3405 00e6 062A cmp r2, #6 + 3406 00e8 07D0 beq .L245 +1254:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** } + 3407 .loc 1 1254 9 is_stmt 1 view .LVU933 + 3408 00ea 1A68 ldr r2, [r3] + 3409 .LVL252: +1254:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** } + 3410 .loc 1 1254 9 is_stmt 0 view .LVU934 + 3411 00ec 0121 movs r1, #1 + 3412 .LVL253: + ARM GAS /tmp/ccUWVJFr.s page 118 + + +1254:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** } + 3413 .loc 1 1254 9 view .LVU935 + 3414 00ee 0A43 orrs r2, r1 + 3415 00f0 1A60 str r2, [r3] + 3416 00f2 0020 movs r0, #0 + 3417 00f4 00E0 b .L233 + 3418 .LVL254: + 3419 .L243: +1203:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** } + 3420 .loc 1 1203 12 view .LVU936 + 3421 00f6 0120 movs r0, #1 + 3422 .LVL255: + 3423 .L233: +1265:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** + 3424 .loc 1 1265 1 view .LVU937 + 3425 @ sp needed + 3426 .LVL256: +1265:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** + 3427 .loc 1 1265 1 view .LVU938 + 3428 00f8 10BD pop {r4, pc} + 3429 .LVL257: + 3430 .L245: +1265:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** + 3431 .loc 1 1265 1 view .LVU939 + 3432 00fa 0020 movs r0, #0 + 3433 00fc FCE7 b .L233 + 3434 .L251: + 3435 00fe C046 .align 2 + 3436 .L250: + 3437 0100 002C0140 .word 1073818624 + 3438 0104 00040040 .word 1073742848 + 3439 .cfi_endproc + 3440 .LFE58: + 3442 .section .text.HAL_TIMEx_PWMN_Stop_IT,"ax",%progbits + 3443 .align 1 + 3444 .global HAL_TIMEx_PWMN_Stop_IT + 3445 .syntax unified + 3446 .code 16 + 3447 .thumb_func + 3449 HAL_TIMEx_PWMN_Stop_IT: + 3450 .LVL258: + 3451 .LFB59: +1279:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** HAL_StatusTypeDef status = HAL_OK; + 3452 .loc 1 1279 1 is_stmt 1 view -0 + 3453 .cfi_startproc + 3454 @ args = 0, pretend = 0, frame = 0 + 3455 @ frame_needed = 0, uses_anonymous_args = 0 +1279:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** HAL_StatusTypeDef status = HAL_OK; + 3456 .loc 1 1279 1 is_stmt 0 view .LVU941 + 3457 0000 70B5 push {r4, r5, r6, lr} + 3458 .cfi_def_cfa_offset 16 + 3459 .cfi_offset 4, -16 + 3460 .cfi_offset 5, -12 + 3461 .cfi_offset 6, -8 + 3462 .cfi_offset 14, -4 + 3463 0002 0400 movs r4, r0 + 3464 0004 0D00 movs r5, r1 + ARM GAS /tmp/ccUWVJFr.s page 119 + + +1280:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** uint32_t tmpccer; + 3465 .loc 1 1280 3 is_stmt 1 view .LVU942 + 3466 .LVL259: +1281:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** + 3467 .loc 1 1281 3 view .LVU943 +1284:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** + 3468 .loc 1 1284 3 view .LVU944 +1286:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** { + 3469 .loc 1 1286 3 view .LVU945 + 3470 0006 0429 cmp r1, #4 + 3471 0008 37D0 beq .L253 + 3472 000a 0829 cmp r1, #8 + 3473 000c 3BD0 beq .L254 + 3474 000e 0029 cmp r1, #0 + 3475 0010 52D1 bne .L263 +1291:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** break; + 3476 .loc 1 1291 7 view .LVU946 + 3477 0012 0268 ldr r2, [r0] + 3478 0014 D368 ldr r3, [r2, #12] + 3479 0016 0221 movs r1, #2 + 3480 .LVL260: +1291:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** break; + 3481 .loc 1 1291 7 is_stmt 0 view .LVU947 + 3482 0018 8B43 bics r3, r1 + 3483 001a D360 str r3, [r2, #12] +1292:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** } + 3484 .loc 1 1292 7 is_stmt 1 view .LVU948 +1314:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** { + 3485 .loc 1 1314 3 view .LVU949 + 3486 .L256: +1317:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** + 3487 .loc 1 1317 5 view .LVU950 + 3488 001c 2068 ldr r0, [r4] + 3489 .LVL261: +1317:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** + 3490 .loc 1 1317 5 is_stmt 0 view .LVU951 + 3491 001e 0022 movs r2, #0 + 3492 0020 2900 movs r1, r5 + 3493 0022 FFF7FEFF bl TIM_CCxNChannelCmd + 3494 .LVL262: +1320:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** if ((tmpccer & (TIM_CCER_CC1NE | TIM_CCER_CC2NE | TIM_CCER_CC3NE)) == (uint32_t)RESET) + 3495 .loc 1 1320 5 is_stmt 1 view .LVU952 +1320:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** if ((tmpccer & (TIM_CCER_CC1NE | TIM_CCER_CC2NE | TIM_CCER_CC3NE)) == (uint32_t)RESET) + 3496 .loc 1 1320 19 is_stmt 0 view .LVU953 + 3497 0026 2368 ldr r3, [r4] +1320:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** if ((tmpccer & (TIM_CCER_CC1NE | TIM_CCER_CC2NE | TIM_CCER_CC3NE)) == (uint32_t)RESET) + 3498 .loc 1 1320 13 view .LVU954 + 3499 0028 196A ldr r1, [r3, #32] + 3500 .LVL263: +1321:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** { + 3501 .loc 1 1321 5 is_stmt 1 view .LVU955 +1321:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** { + 3502 .loc 1 1321 18 is_stmt 0 view .LVU956 + 3503 002a 244A ldr r2, .L266 +1321:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** { + 3504 .loc 1 1321 8 view .LVU957 + 3505 002c 1142 tst r1, r2 + ARM GAS /tmp/ccUWVJFr.s page 120 + + + 3506 002e 03D1 bne .L257 +1323:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** } + 3507 .loc 1 1323 7 is_stmt 1 view .LVU958 + 3508 0030 DA68 ldr r2, [r3, #12] + 3509 0032 8021 movs r1, #128 + 3510 .LVL264: +1323:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** } + 3511 .loc 1 1323 7 is_stmt 0 view .LVU959 + 3512 0034 8A43 bics r2, r1 + 3513 0036 DA60 str r2, [r3, #12] + 3514 .L257: +1327:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** + 3515 .loc 1 1327 5 is_stmt 1 view .LVU960 +1327:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** + 3516 .loc 1 1327 5 view .LVU961 + 3517 0038 2368 ldr r3, [r4] + 3518 003a 196A ldr r1, [r3, #32] + 3519 003c 204A ldr r2, .L266+4 + 3520 003e 1142 tst r1, r2 + 3521 0040 07D1 bne .L258 +1327:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** + 3522 .loc 1 1327 5 discriminator 1 view .LVU962 + 3523 0042 196A ldr r1, [r3, #32] + 3524 0044 1D4A ldr r2, .L266 + 3525 0046 1142 tst r1, r2 + 3526 0048 03D1 bne .L258 +1327:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** + 3527 .loc 1 1327 5 discriminator 3 view .LVU963 + 3528 004a 5A6C ldr r2, [r3, #68] + 3529 004c 1D49 ldr r1, .L266+8 + 3530 004e 0A40 ands r2, r1 + 3531 0050 5A64 str r2, [r3, #68] + 3532 .L258: +1327:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** + 3533 .loc 1 1327 5 discriminator 5 view .LVU964 +1330:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** + 3534 .loc 1 1330 5 view .LVU965 +1330:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** + 3535 .loc 1 1330 5 view .LVU966 + 3536 0052 2368 ldr r3, [r4] + 3537 0054 196A ldr r1, [r3, #32] + 3538 0056 1A4A ldr r2, .L266+4 + 3539 0058 1142 tst r1, r2 + 3540 005a 07D1 bne .L259 +1330:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** + 3541 .loc 1 1330 5 discriminator 1 view .LVU967 + 3542 005c 196A ldr r1, [r3, #32] + 3543 005e 174A ldr r2, .L266 + 3544 0060 1142 tst r1, r2 + 3545 0062 03D1 bne .L259 +1330:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** + 3546 .loc 1 1330 5 discriminator 3 view .LVU968 + 3547 0064 1A68 ldr r2, [r3] + 3548 0066 0121 movs r1, #1 + 3549 0068 8A43 bics r2, r1 + 3550 006a 1A60 str r2, [r3] + 3551 .L259: + ARM GAS /tmp/ccUWVJFr.s page 121 + + +1330:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** + 3552 .loc 1 1330 5 discriminator 5 view .LVU969 +1333:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** } + 3553 .loc 1 1333 5 view .LVU970 + 3554 006c 002D cmp r5, #0 + 3555 006e 10D1 bne .L260 +1333:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** } + 3556 .loc 1 1333 5 is_stmt 0 discriminator 1 view .LVU971 + 3557 0070 4223 movs r3, #66 + 3558 0072 0122 movs r2, #1 + 3559 0074 E254 strb r2, [r4, r3] + 3560 0076 0020 movs r0, #0 + 3561 .LVL265: + 3562 .L255: +1337:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** } + 3563 .loc 1 1337 3 is_stmt 1 view .LVU972 +1338:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** + 3564 .loc 1 1338 1 is_stmt 0 view .LVU973 + 3565 @ sp needed + 3566 .LVL266: + 3567 .LVL267: +1338:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** + 3568 .loc 1 1338 1 view .LVU974 + 3569 0078 70BD pop {r4, r5, r6, pc} + 3570 .LVL268: + 3571 .L253: +1298:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** break; + 3572 .loc 1 1298 7 is_stmt 1 view .LVU975 + 3573 007a 0268 ldr r2, [r0] + 3574 007c D368 ldr r3, [r2, #12] + 3575 007e 0421 movs r1, #4 + 3576 .LVL269: +1298:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** break; + 3577 .loc 1 1298 7 is_stmt 0 view .LVU976 + 3578 0080 8B43 bics r3, r1 + 3579 0082 D360 str r3, [r2, #12] +1299:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** } + 3580 .loc 1 1299 7 is_stmt 1 view .LVU977 +1314:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** { + 3581 .loc 1 1314 3 view .LVU978 + 3582 0084 CAE7 b .L256 + 3583 .LVL270: + 3584 .L254: +1305:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** break; + 3585 .loc 1 1305 7 view .LVU979 + 3586 0086 0268 ldr r2, [r0] + 3587 0088 D368 ldr r3, [r2, #12] + 3588 008a 0821 movs r1, #8 + 3589 .LVL271: +1305:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** break; + 3590 .loc 1 1305 7 is_stmt 0 view .LVU980 + 3591 008c 8B43 bics r3, r1 + 3592 008e D360 str r3, [r2, #12] +1306:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** } + 3593 .loc 1 1306 7 is_stmt 1 view .LVU981 +1314:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** { + 3594 .loc 1 1314 3 view .LVU982 + ARM GAS /tmp/ccUWVJFr.s page 122 + + + 3595 0090 C4E7 b .L256 + 3596 .LVL272: + 3597 .L260: +1333:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** } + 3598 .loc 1 1333 5 is_stmt 0 discriminator 2 view .LVU983 + 3599 0092 042D cmp r5, #4 + 3600 0094 06D0 beq .L264 +1333:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** } + 3601 .loc 1 1333 5 discriminator 4 view .LVU984 + 3602 0096 082D cmp r5, #8 + 3603 0098 09D0 beq .L265 +1333:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** } + 3604 .loc 1 1333 5 discriminator 7 view .LVU985 + 3605 009a 4523 movs r3, #69 + 3606 009c 0122 movs r2, #1 + 3607 009e E254 strb r2, [r4, r3] + 3608 00a0 0020 movs r0, #0 + 3609 00a2 E9E7 b .L255 + 3610 .L264: +1333:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** } + 3611 .loc 1 1333 5 discriminator 3 view .LVU986 + 3612 00a4 4323 movs r3, #67 + 3613 00a6 0122 movs r2, #1 + 3614 00a8 E254 strb r2, [r4, r3] + 3615 00aa 0020 movs r0, #0 + 3616 00ac E4E7 b .L255 + 3617 .L265: +1333:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** } + 3618 .loc 1 1333 5 discriminator 6 view .LVU987 + 3619 00ae 4423 movs r3, #68 + 3620 00b0 0122 movs r2, #1 + 3621 00b2 E254 strb r2, [r4, r3] + 3622 00b4 0020 movs r0, #0 + 3623 00b6 DFE7 b .L255 + 3624 .LVL273: + 3625 .L263: +1286:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** { + 3626 .loc 1 1286 3 view .LVU988 + 3627 00b8 0120 movs r0, #1 + 3628 .LVL274: +1286:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** { + 3629 .loc 1 1286 3 view .LVU989 + 3630 00ba DDE7 b .L255 + 3631 .L267: + 3632 .align 2 + 3633 .L266: + 3634 00bc 44040000 .word 1092 + 3635 00c0 11110000 .word 4369 + 3636 00c4 FF7FFFFF .word -32769 + 3637 .cfi_endproc + 3638 .LFE59: + 3640 .section .text.HAL_TIMEx_PWMN_Start_DMA,"ax",%progbits + 3641 .align 1 + 3642 .global HAL_TIMEx_PWMN_Start_DMA + 3643 .syntax unified + 3644 .code 16 + 3645 .thumb_func + ARM GAS /tmp/ccUWVJFr.s page 123 + + + 3647 HAL_TIMEx_PWMN_Start_DMA: + 3648 .LVL275: + 3649 .LFB60: +1355:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** HAL_StatusTypeDef status = HAL_OK; + 3650 .loc 1 1355 1 is_stmt 1 view -0 + 3651 .cfi_startproc + 3652 @ args = 0, pretend = 0, frame = 0 + 3653 @ frame_needed = 0, uses_anonymous_args = 0 +1355:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** HAL_StatusTypeDef status = HAL_OK; + 3654 .loc 1 1355 1 is_stmt 0 view .LVU991 + 3655 0000 70B5 push {r4, r5, r6, lr} + 3656 .cfi_def_cfa_offset 16 + 3657 .cfi_offset 4, -16 + 3658 .cfi_offset 5, -12 + 3659 .cfi_offset 6, -8 + 3660 .cfi_offset 14, -4 + 3661 0002 0600 movs r6, r0 + 3662 0004 0D00 movs r5, r1 + 3663 0006 1100 movs r1, r2 + 3664 .LVL276: +1356:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** uint32_t tmpsmcr; + 3665 .loc 1 1356 3 is_stmt 1 view .LVU992 +1357:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** + 3666 .loc 1 1357 3 view .LVU993 +1360:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** + 3667 .loc 1 1360 3 view .LVU994 +1363:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** { + 3668 .loc 1 1363 3 view .LVU995 +1363:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** { + 3669 .loc 1 1363 46 is_stmt 0 view .LVU996 + 3670 0008 002D cmp r5, #0 + 3671 000a 52D1 bne .L269 +1363:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** { + 3672 .loc 1 1363 7 discriminator 1 view .LVU997 + 3673 000c 4222 movs r2, #66 + 3674 .LVL277: +1363:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** { + 3675 .loc 1 1363 7 discriminator 1 view .LVU998 + 3676 000e 845C ldrb r4, [r0, r2] +1363:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** { + 3677 .loc 1 1363 46 discriminator 1 view .LVU999 + 3678 0010 023C subs r4, r4, #2 + 3679 0012 6242 rsbs r2, r4, #0 + 3680 0014 5441 adcs r4, r4, r2 + 3681 0016 E4B2 uxtb r4, r4 + 3682 .L270: +1363:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** { + 3683 .loc 1 1363 6 discriminator 12 view .LVU1000 + 3684 0018 002C cmp r4, #0 + 3685 001a 00D0 beq .LCB3476 + 3686 001c C9E0 b .L287 @long jump + 3687 .LCB3476: +1367:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** { + 3688 .loc 1 1367 8 is_stmt 1 view .LVU1001 +1367:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** { + 3689 .loc 1 1367 51 is_stmt 0 view .LVU1002 + 3690 001e 002D cmp r5, #0 + ARM GAS /tmp/ccUWVJFr.s page 124 + + + 3691 0020 60D1 bne .L274 +1367:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** { + 3692 .loc 1 1367 12 discriminator 1 view .LVU1003 + 3693 0022 4222 movs r2, #66 + 3694 0024 B25C ldrb r2, [r6, r2] +1367:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** { + 3695 .loc 1 1367 51 discriminator 1 view .LVU1004 + 3696 0026 013A subs r2, r2, #1 + 3697 0028 5042 rsbs r0, r2, #0 + 3698 002a 4241 adcs r2, r2, r0 + 3699 .LVL278: +1367:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** { + 3700 .loc 1 1367 51 discriminator 1 view .LVU1005 + 3701 002c D2B2 uxtb r2, r2 + 3702 .L275: +1367:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** { + 3703 .loc 1 1367 11 discriminator 12 view .LVU1006 + 3704 002e 002A cmp r2, #0 + 3705 0030 00D1 bne .LCB3490 + 3706 0032 C0E0 b .L288 @long jump + 3707 .LCB3490: +1369:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** { + 3708 .loc 1 1369 5 is_stmt 1 view .LVU1007 +1369:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** { + 3709 .loc 1 1369 8 is_stmt 0 view .LVU1008 + 3710 0034 0029 cmp r1, #0 + 3711 0036 00D1 bne .LCB3493 + 3712 0038 BFE0 b .L289 @long jump + 3713 .LCB3493: +1369:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** { + 3714 .loc 1 1369 25 discriminator 1 view .LVU1009 + 3715 003a 002B cmp r3, #0 + 3716 003c 00D1 bne .LCB3495 + 3717 003e BEE0 b .L290 @long jump + 3718 .LCB3495: +1375:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** } + 3719 .loc 1 1375 7 is_stmt 1 view .LVU1010 + 3720 0040 002D cmp r5, #0 + 3721 0042 68D1 bne .L278 +1375:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** } + 3722 .loc 1 1375 7 is_stmt 0 discriminator 1 view .LVU1011 + 3723 0044 4222 movs r2, #66 + 3724 0046 0220 movs r0, #2 + 3725 0048 B054 strb r0, [r6, r2] +1383:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** { + 3726 .loc 1 1383 3 is_stmt 1 view .LVU1012 + 3727 .L279: +1388:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** htim->hdma[TIM_DMA_ID_CC1]->XferHalfCpltCallback = TIM_DMADelayPulseHalfCplt; + 3728 .loc 1 1388 7 view .LVU1013 +1388:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** htim->hdma[TIM_DMA_ID_CC1]->XferHalfCpltCallback = TIM_DMADelayPulseHalfCplt; + 3729 .loc 1 1388 17 is_stmt 0 view .LVU1014 + 3730 004a 726A ldr r2, [r6, #36] +1388:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** htim->hdma[TIM_DMA_ID_CC1]->XferHalfCpltCallback = TIM_DMADelayPulseHalfCplt; + 3731 .loc 1 1388 52 view .LVU1015 + 3732 004c 6148 ldr r0, .L302 + 3733 004e 9062 str r0, [r2, #40] +1389:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** + ARM GAS /tmp/ccUWVJFr.s page 125 + + + 3734 .loc 1 1389 7 is_stmt 1 view .LVU1016 +1389:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** + 3735 .loc 1 1389 17 is_stmt 0 view .LVU1017 + 3736 0050 726A ldr r2, [r6, #36] +1389:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** + 3737 .loc 1 1389 56 view .LVU1018 + 3738 0052 6148 ldr r0, .L302+4 + 3739 0054 D062 str r0, [r2, #44] +1392:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** + 3740 .loc 1 1392 7 is_stmt 1 view .LVU1019 +1392:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** + 3741 .loc 1 1392 17 is_stmt 0 view .LVU1020 + 3742 0056 726A ldr r2, [r6, #36] +1392:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** + 3743 .loc 1 1392 53 view .LVU1021 + 3744 0058 6048 ldr r0, .L302+8 + 3745 005a 1063 str r0, [r2, #48] +1395:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** Length) != HAL_OK) + 3746 .loc 1 1395 7 is_stmt 1 view .LVU1022 +1395:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** Length) != HAL_OK) + 3747 .loc 1 1395 88 is_stmt 0 view .LVU1023 + 3748 005c 3268 ldr r2, [r6] +1395:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** Length) != HAL_OK) + 3749 .loc 1 1395 83 view .LVU1024 + 3750 005e 3432 adds r2, r2, #52 +1395:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** Length) != HAL_OK) + 3751 .loc 1 1395 11 view .LVU1025 + 3752 0060 706A ldr r0, [r6, #36] + 3753 0062 FFF7FEFF bl HAL_DMA_Start_IT + 3754 .LVL279: +1395:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** Length) != HAL_OK) + 3755 .loc 1 1395 10 discriminator 1 view .LVU1026 + 3756 0066 0028 cmp r0, #0 + 3757 0068 00D0 beq .LCB3527 + 3758 006a AAE0 b .L292 @long jump + 3759 .LCB3527: +1402:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** break; + 3760 .loc 1 1402 7 is_stmt 1 view .LVU1027 + 3761 006c 3268 ldr r2, [r6] + 3762 006e D168 ldr r1, [r2, #12] + 3763 0070 8023 movs r3, #128 + 3764 0072 9B00 lsls r3, r3, #2 + 3765 0074 0B43 orrs r3, r1 + 3766 0076 D360 str r3, [r2, #12] +1403:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** } + 3767 .loc 1 1403 7 view .LVU1028 +1453:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** { + 3768 .loc 1 1453 3 view .LVU1029 + 3769 .L284: +1456:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** + 3770 .loc 1 1456 5 view .LVU1030 + 3771 0078 3068 ldr r0, [r6] + 3772 007a 0422 movs r2, #4 + 3773 007c 2900 movs r1, r5 + 3774 007e FFF7FEFF bl TIM_CCxNChannelCmd + 3775 .LVL280: +1459:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** + ARM GAS /tmp/ccUWVJFr.s page 126 + + + 3776 .loc 1 1459 5 view .LVU1031 + 3777 0082 3268 ldr r2, [r6] + 3778 0084 516C ldr r1, [r2, #68] + 3779 0086 8023 movs r3, #128 + 3780 0088 1B02 lsls r3, r3, #8 + 3781 008a 0B43 orrs r3, r1 + 3782 008c 5364 str r3, [r2, #68] +1462:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** { + 3783 .loc 1 1462 5 view .LVU1032 +1462:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** { + 3784 .loc 1 1462 9 is_stmt 0 view .LVU1033 + 3785 008e 3368 ldr r3, [r6] +1462:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** { + 3786 .loc 1 1462 8 view .LVU1034 + 3787 0090 534A ldr r2, .L302+12 + 3788 0092 9342 cmp r3, r2 + 3789 0094 00D1 bne .LCB3557 + 3790 0096 81E0 b .L285 @long jump + 3791 .LCB3557: +1462:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** { + 3792 .loc 1 1462 9 discriminator 1 view .LVU1035 + 3793 0098 8022 movs r2, #128 + 3794 009a D205 lsls r2, r2, #23 + 3795 009c 9342 cmp r3, r2 + 3796 009e 7DD0 beq .L285 +1462:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** { + 3797 .loc 1 1462 9 discriminator 2 view .LVU1036 + 3798 00a0 504A ldr r2, .L302+16 + 3799 00a2 9342 cmp r3, r2 + 3800 00a4 7AD0 beq .L285 +1472:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** } + 3801 .loc 1 1472 7 is_stmt 1 view .LVU1037 + 3802 00a6 1A68 ldr r2, [r3] + 3803 00a8 0121 movs r1, #1 + 3804 00aa 0A43 orrs r2, r1 + 3805 00ac 1A60 str r2, [r3] + 3806 00ae 0020 movs r0, #0 + 3807 00b0 82E0 b .L273 + 3808 .LVL281: + 3809 .L269: +1363:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** { + 3810 .loc 1 1363 46 is_stmt 0 discriminator 2 view .LVU1038 + 3811 00b2 042D cmp r5, #4 + 3812 00b4 08D0 beq .L296 +1363:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** { + 3813 .loc 1 1363 46 discriminator 5 view .LVU1039 + 3814 00b6 082D cmp r5, #8 + 3815 00b8 0DD0 beq .L297 +1363:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** { + 3816 .loc 1 1363 7 discriminator 8 view .LVU1040 + 3817 00ba 4522 movs r2, #69 + 3818 00bc 845C ldrb r4, [r0, r2] +1363:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** { + 3819 .loc 1 1363 46 discriminator 8 view .LVU1041 + 3820 00be 023C subs r4, r4, #2 + 3821 00c0 6242 rsbs r2, r4, #0 + 3822 00c2 5441 adcs r4, r4, r2 + ARM GAS /tmp/ccUWVJFr.s page 127 + + + 3823 00c4 E4B2 uxtb r4, r4 + 3824 00c6 A7E7 b .L270 + 3825 .L296: +1363:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** { + 3826 .loc 1 1363 7 discriminator 4 view .LVU1042 + 3827 00c8 4322 movs r2, #67 + 3828 00ca 845C ldrb r4, [r0, r2] +1363:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** { + 3829 .loc 1 1363 46 discriminator 4 view .LVU1043 + 3830 00cc 023C subs r4, r4, #2 + 3831 00ce 6242 rsbs r2, r4, #0 + 3832 00d0 5441 adcs r4, r4, r2 + 3833 00d2 E4B2 uxtb r4, r4 + 3834 00d4 A0E7 b .L270 + 3835 .L297: +1363:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** { + 3836 .loc 1 1363 7 discriminator 7 view .LVU1044 + 3837 00d6 4422 movs r2, #68 + 3838 00d8 845C ldrb r4, [r0, r2] +1363:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** { + 3839 .loc 1 1363 46 discriminator 7 view .LVU1045 + 3840 00da 023C subs r4, r4, #2 + 3841 00dc 6242 rsbs r2, r4, #0 + 3842 00de 5441 adcs r4, r4, r2 + 3843 00e0 E4B2 uxtb r4, r4 + 3844 00e2 99E7 b .L270 + 3845 .L274: +1367:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** { + 3846 .loc 1 1367 51 discriminator 2 view .LVU1046 + 3847 00e4 042D cmp r5, #4 + 3848 00e6 08D0 beq .L298 +1367:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** { + 3849 .loc 1 1367 51 discriminator 5 view .LVU1047 + 3850 00e8 082D cmp r5, #8 + 3851 00ea 0DD0 beq .L299 +1367:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** { + 3852 .loc 1 1367 12 discriminator 8 view .LVU1048 + 3853 00ec 4522 movs r2, #69 + 3854 00ee B25C ldrb r2, [r6, r2] +1367:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** { + 3855 .loc 1 1367 51 discriminator 8 view .LVU1049 + 3856 00f0 013A subs r2, r2, #1 + 3857 00f2 5042 rsbs r0, r2, #0 + 3858 00f4 4241 adcs r2, r2, r0 + 3859 .LVL282: +1367:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** { + 3860 .loc 1 1367 51 discriminator 8 view .LVU1050 + 3861 00f6 D2B2 uxtb r2, r2 + 3862 00f8 99E7 b .L275 + 3863 .LVL283: + 3864 .L298: +1367:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** { + 3865 .loc 1 1367 12 discriminator 4 view .LVU1051 + 3866 00fa 4322 movs r2, #67 + 3867 00fc B25C ldrb r2, [r6, r2] +1367:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** { + 3868 .loc 1 1367 51 discriminator 4 view .LVU1052 + ARM GAS /tmp/ccUWVJFr.s page 128 + + + 3869 00fe 013A subs r2, r2, #1 + 3870 0100 5042 rsbs r0, r2, #0 + 3871 0102 4241 adcs r2, r2, r0 + 3872 .LVL284: +1367:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** { + 3873 .loc 1 1367 51 discriminator 4 view .LVU1053 + 3874 0104 D2B2 uxtb r2, r2 + 3875 0106 92E7 b .L275 + 3876 .LVL285: + 3877 .L299: +1367:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** { + 3878 .loc 1 1367 12 discriminator 7 view .LVU1054 + 3879 0108 4422 movs r2, #68 + 3880 010a B25C ldrb r2, [r6, r2] +1367:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** { + 3881 .loc 1 1367 51 discriminator 7 view .LVU1055 + 3882 010c 013A subs r2, r2, #1 + 3883 010e 5042 rsbs r0, r2, #0 + 3884 0110 4241 adcs r2, r2, r0 + 3885 .LVL286: +1367:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** { + 3886 .loc 1 1367 51 discriminator 7 view .LVU1056 + 3887 0112 D2B2 uxtb r2, r2 + 3888 0114 8BE7 b .L275 + 3889 .L278: +1375:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** } + 3890 .loc 1 1375 7 discriminator 2 view .LVU1057 + 3891 0116 042D cmp r5, #4 + 3892 0118 0CD0 beq .L300 +1375:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** } + 3893 .loc 1 1375 7 discriminator 4 view .LVU1058 + 3894 011a 082D cmp r5, #8 + 3895 011c 24D0 beq .L301 +1375:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** } + 3896 .loc 1 1375 7 discriminator 7 view .LVU1059 + 3897 011e 4522 movs r2, #69 + 3898 0120 0220 movs r0, #2 + 3899 0122 B054 strb r0, [r6, r2] +1383:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** { + 3900 .loc 1 1383 3 is_stmt 1 view .LVU1060 + 3901 0124 042D cmp r5, #4 + 3902 0126 08D0 beq .L281 + 3903 0128 082D cmp r5, #8 + 3904 012a 20D0 beq .L283 + 3905 012c 002D cmp r5, #0 + 3906 012e 8CD0 beq .L279 + 3907 0130 0120 movs r0, #1 + 3908 0132 41E0 b .L273 + 3909 .L300: +1375:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** } + 3910 .loc 1 1375 7 is_stmt 0 discriminator 3 view .LVU1061 + 3911 0134 4322 movs r2, #67 + 3912 0136 0220 movs r0, #2 + 3913 0138 B054 strb r0, [r6, r2] +1383:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** { + 3914 .loc 1 1383 3 is_stmt 1 view .LVU1062 + 3915 .L281: + ARM GAS /tmp/ccUWVJFr.s page 129 + + +1409:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** htim->hdma[TIM_DMA_ID_CC2]->XferHalfCpltCallback = TIM_DMADelayPulseHalfCplt; + 3916 .loc 1 1409 7 view .LVU1063 +1409:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** htim->hdma[TIM_DMA_ID_CC2]->XferHalfCpltCallback = TIM_DMADelayPulseHalfCplt; + 3917 .loc 1 1409 17 is_stmt 0 view .LVU1064 + 3918 013a B26A ldr r2, [r6, #40] +1409:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** htim->hdma[TIM_DMA_ID_CC2]->XferHalfCpltCallback = TIM_DMADelayPulseHalfCplt; + 3919 .loc 1 1409 52 view .LVU1065 + 3920 013c 2548 ldr r0, .L302 + 3921 013e 9062 str r0, [r2, #40] +1410:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** + 3922 .loc 1 1410 7 is_stmt 1 view .LVU1066 +1410:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** + 3923 .loc 1 1410 17 is_stmt 0 view .LVU1067 + 3924 0140 B26A ldr r2, [r6, #40] +1410:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** + 3925 .loc 1 1410 56 view .LVU1068 + 3926 0142 2548 ldr r0, .L302+4 + 3927 0144 D062 str r0, [r2, #44] +1413:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** + 3928 .loc 1 1413 7 is_stmt 1 view .LVU1069 +1413:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** + 3929 .loc 1 1413 17 is_stmt 0 view .LVU1070 + 3930 0146 B26A ldr r2, [r6, #40] +1413:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** + 3931 .loc 1 1413 53 view .LVU1071 + 3932 0148 2448 ldr r0, .L302+8 + 3933 014a 1063 str r0, [r2, #48] +1416:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** Length) != HAL_OK) + 3934 .loc 1 1416 7 is_stmt 1 view .LVU1072 +1416:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** Length) != HAL_OK) + 3935 .loc 1 1416 88 is_stmt 0 view .LVU1073 + 3936 014c 3268 ldr r2, [r6] +1416:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** Length) != HAL_OK) + 3937 .loc 1 1416 83 view .LVU1074 + 3938 014e 3832 adds r2, r2, #56 +1416:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** Length) != HAL_OK) + 3939 .loc 1 1416 11 view .LVU1075 + 3940 0150 B06A ldr r0, [r6, #40] + 3941 0152 FFF7FEFF bl HAL_DMA_Start_IT + 3942 .LVL287: +1416:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** Length) != HAL_OK) + 3943 .loc 1 1416 10 discriminator 1 view .LVU1076 + 3944 0156 0028 cmp r0, #0 + 3945 0158 35D1 bne .L293 +1423:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** break; + 3946 .loc 1 1423 7 is_stmt 1 view .LVU1077 + 3947 015a 3268 ldr r2, [r6] + 3948 015c D168 ldr r1, [r2, #12] + 3949 015e 8023 movs r3, #128 + 3950 0160 DB00 lsls r3, r3, #3 + 3951 0162 0B43 orrs r3, r1 + 3952 0164 D360 str r3, [r2, #12] +1424:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** } + 3953 .loc 1 1424 7 view .LVU1078 +1453:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** { + 3954 .loc 1 1453 3 view .LVU1079 + 3955 0166 87E7 b .L284 + ARM GAS /tmp/ccUWVJFr.s page 130 + + + 3956 .LVL288: + 3957 .L301: +1375:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** } + 3958 .loc 1 1375 7 is_stmt 0 discriminator 6 view .LVU1080 + 3959 0168 4422 movs r2, #68 + 3960 016a 0220 movs r0, #2 + 3961 016c B054 strb r0, [r6, r2] +1383:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** { + 3962 .loc 1 1383 3 is_stmt 1 view .LVU1081 + 3963 .L283: +1430:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** htim->hdma[TIM_DMA_ID_CC3]->XferHalfCpltCallback = TIM_DMADelayPulseHalfCplt; + 3964 .loc 1 1430 7 view .LVU1082 +1430:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** htim->hdma[TIM_DMA_ID_CC3]->XferHalfCpltCallback = TIM_DMADelayPulseHalfCplt; + 3965 .loc 1 1430 17 is_stmt 0 view .LVU1083 + 3966 016e F26A ldr r2, [r6, #44] +1430:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** htim->hdma[TIM_DMA_ID_CC3]->XferHalfCpltCallback = TIM_DMADelayPulseHalfCplt; + 3967 .loc 1 1430 52 view .LVU1084 + 3968 0170 1848 ldr r0, .L302 + 3969 0172 9062 str r0, [r2, #40] +1431:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** + 3970 .loc 1 1431 7 is_stmt 1 view .LVU1085 +1431:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** + 3971 .loc 1 1431 17 is_stmt 0 view .LVU1086 + 3972 0174 F26A ldr r2, [r6, #44] +1431:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** + 3973 .loc 1 1431 56 view .LVU1087 + 3974 0176 1848 ldr r0, .L302+4 + 3975 0178 D062 str r0, [r2, #44] +1434:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** + 3976 .loc 1 1434 7 is_stmt 1 view .LVU1088 +1434:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** + 3977 .loc 1 1434 17 is_stmt 0 view .LVU1089 + 3978 017a F26A ldr r2, [r6, #44] +1434:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** + 3979 .loc 1 1434 53 view .LVU1090 + 3980 017c 1748 ldr r0, .L302+8 + 3981 017e 1063 str r0, [r2, #48] +1437:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** Length) != HAL_OK) + 3982 .loc 1 1437 7 is_stmt 1 view .LVU1091 +1437:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** Length) != HAL_OK) + 3983 .loc 1 1437 88 is_stmt 0 view .LVU1092 + 3984 0180 3268 ldr r2, [r6] +1437:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** Length) != HAL_OK) + 3985 .loc 1 1437 83 view .LVU1093 + 3986 0182 3C32 adds r2, r2, #60 +1437:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** Length) != HAL_OK) + 3987 .loc 1 1437 11 view .LVU1094 + 3988 0184 F06A ldr r0, [r6, #44] + 3989 0186 FFF7FEFF bl HAL_DMA_Start_IT + 3990 .LVL289: +1437:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** Length) != HAL_OK) + 3991 .loc 1 1437 10 discriminator 1 view .LVU1095 + 3992 018a 0028 cmp r0, #0 + 3993 018c 1DD1 bne .L294 +1444:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** break; + 3994 .loc 1 1444 7 is_stmt 1 view .LVU1096 + 3995 018e 3268 ldr r2, [r6] + ARM GAS /tmp/ccUWVJFr.s page 131 + + + 3996 0190 D168 ldr r1, [r2, #12] + 3997 0192 8023 movs r3, #128 + 3998 0194 1B01 lsls r3, r3, #4 + 3999 0196 0B43 orrs r3, r1 + 4000 0198 D360 str r3, [r2, #12] +1445:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** } + 4001 .loc 1 1445 7 view .LVU1097 +1453:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** { + 4002 .loc 1 1453 3 view .LVU1098 + 4003 019a 6DE7 b .L284 + 4004 .L285: +1464:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** if (!IS_TIM_SLAVEMODE_TRIGGER_ENABLED(tmpsmcr)) + 4005 .loc 1 1464 7 view .LVU1099 +1464:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** if (!IS_TIM_SLAVEMODE_TRIGGER_ENABLED(tmpsmcr)) + 4006 .loc 1 1464 31 is_stmt 0 view .LVU1100 + 4007 019c 9968 ldr r1, [r3, #8] +1464:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** if (!IS_TIM_SLAVEMODE_TRIGGER_ENABLED(tmpsmcr)) + 4008 .loc 1 1464 15 view .LVU1101 + 4009 019e 0722 movs r2, #7 + 4010 01a0 0A40 ands r2, r1 + 4011 .LVL290: +1465:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** { + 4012 .loc 1 1465 7 is_stmt 1 view .LVU1102 +1465:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** { + 4013 .loc 1 1465 10 is_stmt 0 view .LVU1103 + 4014 01a2 062A cmp r2, #6 + 4015 01a4 13D0 beq .L295 +1467:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** } + 4016 .loc 1 1467 9 is_stmt 1 view .LVU1104 + 4017 01a6 1A68 ldr r2, [r3] + 4018 .LVL291: +1467:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** } + 4019 .loc 1 1467 9 is_stmt 0 view .LVU1105 + 4020 01a8 0121 movs r1, #1 + 4021 .LVL292: +1467:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** } + 4022 .loc 1 1467 9 view .LVU1106 + 4023 01aa 0A43 orrs r2, r1 + 4024 01ac 1A60 str r2, [r3] + 4025 01ae 0020 movs r0, #0 + 4026 01b0 02E0 b .L273 + 4027 .LVL293: + 4028 .L287: +1365:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** } + 4029 .loc 1 1365 12 view .LVU1107 + 4030 01b2 0220 movs r0, #2 + 4031 .LVL294: +1365:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** } + 4032 .loc 1 1365 12 view .LVU1108 + 4033 01b4 00E0 b .L273 + 4034 .L288: +1380:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** } + 4035 .loc 1 1380 12 view .LVU1109 + 4036 01b6 0120 movs r0, #1 + 4037 .LVL295: + 4038 .L273: +1478:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** + ARM GAS /tmp/ccUWVJFr.s page 132 + + + 4039 .loc 1 1478 1 view .LVU1110 + 4040 @ sp needed + 4041 .LVL296: + 4042 .LVL297: +1478:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** + 4043 .loc 1 1478 1 view .LVU1111 + 4044 01b8 70BD pop {r4, r5, r6, pc} + 4045 .LVL298: + 4046 .L289: +1371:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** } + 4047 .loc 1 1371 14 view .LVU1112 + 4048 01ba 0120 movs r0, #1 + 4049 01bc FCE7 b .L273 + 4050 .L290: + 4051 01be 0120 movs r0, #1 + 4052 01c0 FAE7 b .L273 + 4053 .LVL299: + 4054 .L292: +1399:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** } + 4055 .loc 1 1399 16 view .LVU1113 + 4056 01c2 0120 movs r0, #1 + 4057 01c4 F8E7 b .L273 + 4058 .L293: +1420:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** } + 4059 .loc 1 1420 16 view .LVU1114 + 4060 01c6 0120 movs r0, #1 + 4061 01c8 F6E7 b .L273 + 4062 .L294: +1441:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** } + 4063 .loc 1 1441 16 view .LVU1115 + 4064 01ca 0120 movs r0, #1 + 4065 01cc F4E7 b .L273 + 4066 .LVL300: + 4067 .L295: +1441:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** } + 4068 .loc 1 1441 16 view .LVU1116 + 4069 01ce 0020 movs r0, #0 + 4070 01d0 F2E7 b .L273 + 4071 .L303: + 4072 01d2 C046 .align 2 + 4073 .L302: + 4074 01d4 00000000 .word TIM_DMADelayPulseNCplt + 4075 01d8 00000000 .word TIM_DMADelayPulseHalfCplt + 4076 01dc 00000000 .word TIM_DMAErrorCCxN + 4077 01e0 002C0140 .word 1073818624 + 4078 01e4 00040040 .word 1073742848 + 4079 .cfi_endproc + 4080 .LFE60: + 4082 .section .text.HAL_TIMEx_PWMN_Stop_DMA,"ax",%progbits + 4083 .align 1 + 4084 .global HAL_TIMEx_PWMN_Stop_DMA + 4085 .syntax unified + 4086 .code 16 + 4087 .thumb_func + 4089 HAL_TIMEx_PWMN_Stop_DMA: + 4090 .LVL301: + 4091 .LFB61: + ARM GAS /tmp/ccUWVJFr.s page 133 + + +1492:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** HAL_StatusTypeDef status = HAL_OK; + 4092 .loc 1 1492 1 is_stmt 1 view -0 + 4093 .cfi_startproc + 4094 @ args = 0, pretend = 0, frame = 0 + 4095 @ frame_needed = 0, uses_anonymous_args = 0 +1492:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** HAL_StatusTypeDef status = HAL_OK; + 4096 .loc 1 1492 1 is_stmt 0 view .LVU1118 + 4097 0000 70B5 push {r4, r5, r6, lr} + 4098 .cfi_def_cfa_offset 16 + 4099 .cfi_offset 4, -16 + 4100 .cfi_offset 5, -12 + 4101 .cfi_offset 6, -8 + 4102 .cfi_offset 14, -4 + 4103 0002 0400 movs r4, r0 + 4104 0004 0D00 movs r5, r1 +1493:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** + 4105 .loc 1 1493 3 is_stmt 1 view .LVU1119 + 4106 .LVL302: +1496:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** + 4107 .loc 1 1496 3 view .LVU1120 +1498:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** { + 4108 .loc 1 1498 3 view .LVU1121 + 4109 0006 0429 cmp r1, #4 + 4110 0008 31D0 beq .L305 + 4111 000a 0829 cmp r1, #8 + 4112 000c 38D0 beq .L306 + 4113 000e 0029 cmp r1, #0 + 4114 0010 52D1 bne .L314 +1503:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** (void)HAL_DMA_Abort_IT(htim->hdma[TIM_DMA_ID_CC1]); + 4115 .loc 1 1503 7 view .LVU1122 + 4116 0012 0268 ldr r2, [r0] + 4117 0014 D368 ldr r3, [r2, #12] + 4118 0016 2949 ldr r1, .L317 + 4119 .LVL303: +1503:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** (void)HAL_DMA_Abort_IT(htim->hdma[TIM_DMA_ID_CC1]); + 4120 .loc 1 1503 7 is_stmt 0 view .LVU1123 + 4121 0018 0B40 ands r3, r1 + 4122 001a D360 str r3, [r2, #12] +1504:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** break; + 4123 .loc 1 1504 7 is_stmt 1 view .LVU1124 +1504:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** break; + 4124 .loc 1 1504 13 is_stmt 0 view .LVU1125 + 4125 001c 406A ldr r0, [r0, #36] + 4126 .LVL304: +1504:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** break; + 4127 .loc 1 1504 13 view .LVU1126 + 4128 001e FFF7FEFF bl HAL_DMA_Abort_IT + 4129 .LVL305: +1505:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** } + 4130 .loc 1 1505 7 is_stmt 1 view .LVU1127 +1529:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** { + 4131 .loc 1 1529 3 view .LVU1128 + 4132 .L308: +1532:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** + 4133 .loc 1 1532 5 view .LVU1129 + 4134 0022 2068 ldr r0, [r4] + 4135 0024 0022 movs r2, #0 + ARM GAS /tmp/ccUWVJFr.s page 134 + + + 4136 0026 2900 movs r1, r5 + 4137 0028 FFF7FEFF bl TIM_CCxNChannelCmd + 4138 .LVL306: +1535:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** + 4139 .loc 1 1535 5 view .LVU1130 +1535:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** + 4140 .loc 1 1535 5 view .LVU1131 + 4141 002c 2368 ldr r3, [r4] + 4142 002e 196A ldr r1, [r3, #32] + 4143 0030 234A ldr r2, .L317+4 + 4144 0032 1142 tst r1, r2 + 4145 0034 07D1 bne .L309 +1535:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** + 4146 .loc 1 1535 5 discriminator 1 view .LVU1132 + 4147 0036 196A ldr r1, [r3, #32] + 4148 0038 224A ldr r2, .L317+8 + 4149 003a 1142 tst r1, r2 + 4150 003c 03D1 bne .L309 +1535:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** + 4151 .loc 1 1535 5 discriminator 3 view .LVU1133 + 4152 003e 5A6C ldr r2, [r3, #68] + 4153 0040 2149 ldr r1, .L317+12 + 4154 0042 0A40 ands r2, r1 + 4155 0044 5A64 str r2, [r3, #68] + 4156 .L309: +1535:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** + 4157 .loc 1 1535 5 discriminator 5 view .LVU1134 +1538:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** + 4158 .loc 1 1538 5 view .LVU1135 +1538:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** + 4159 .loc 1 1538 5 view .LVU1136 + 4160 0046 2368 ldr r3, [r4] + 4161 0048 196A ldr r1, [r3, #32] + 4162 004a 1D4A ldr r2, .L317+4 + 4163 004c 1142 tst r1, r2 + 4164 004e 07D1 bne .L310 +1538:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** + 4165 .loc 1 1538 5 discriminator 1 view .LVU1137 + 4166 0050 196A ldr r1, [r3, #32] + 4167 0052 1C4A ldr r2, .L317+8 + 4168 0054 1142 tst r1, r2 + 4169 0056 03D1 bne .L310 +1538:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** + 4170 .loc 1 1538 5 discriminator 3 view .LVU1138 + 4171 0058 1A68 ldr r2, [r3] + 4172 005a 0121 movs r1, #1 + 4173 005c 8A43 bics r2, r1 + 4174 005e 1A60 str r2, [r3] + 4175 .L310: +1538:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** + 4176 .loc 1 1538 5 discriminator 5 view .LVU1139 +1541:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** } + 4177 .loc 1 1541 5 view .LVU1140 + 4178 0060 002D cmp r5, #0 + 4179 0062 16D1 bne .L311 +1541:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** } + 4180 .loc 1 1541 5 is_stmt 0 discriminator 1 view .LVU1141 + ARM GAS /tmp/ccUWVJFr.s page 135 + + + 4181 0064 4223 movs r3, #66 + 4182 0066 0122 movs r2, #1 + 4183 0068 E254 strb r2, [r4, r3] + 4184 006a 0020 movs r0, #0 + 4185 .L307: + 4186 .LVL307: +1545:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** } + 4187 .loc 1 1545 3 is_stmt 1 view .LVU1142 +1546:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** + 4188 .loc 1 1546 1 is_stmt 0 view .LVU1143 + 4189 @ sp needed + 4190 .LVL308: + 4191 .LVL309: +1546:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** + 4192 .loc 1 1546 1 view .LVU1144 + 4193 006c 70BD pop {r4, r5, r6, pc} + 4194 .LVL310: + 4195 .L305: +1511:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** (void)HAL_DMA_Abort_IT(htim->hdma[TIM_DMA_ID_CC2]); + 4196 .loc 1 1511 7 is_stmt 1 view .LVU1145 + 4197 006e 0268 ldr r2, [r0] + 4198 0070 D368 ldr r3, [r2, #12] + 4199 0072 1649 ldr r1, .L317+16 + 4200 .LVL311: +1511:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** (void)HAL_DMA_Abort_IT(htim->hdma[TIM_DMA_ID_CC2]); + 4201 .loc 1 1511 7 is_stmt 0 view .LVU1146 + 4202 0074 0B40 ands r3, r1 + 4203 0076 D360 str r3, [r2, #12] +1512:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** break; + 4204 .loc 1 1512 7 is_stmt 1 view .LVU1147 +1512:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** break; + 4205 .loc 1 1512 13 is_stmt 0 view .LVU1148 + 4206 0078 806A ldr r0, [r0, #40] + 4207 .LVL312: +1512:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** break; + 4208 .loc 1 1512 13 view .LVU1149 + 4209 007a FFF7FEFF bl HAL_DMA_Abort_IT + 4210 .LVL313: +1513:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** } + 4211 .loc 1 1513 7 is_stmt 1 view .LVU1150 +1529:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** { + 4212 .loc 1 1529 3 view .LVU1151 + 4213 007e D0E7 b .L308 + 4214 .LVL314: + 4215 .L306: +1519:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** (void)HAL_DMA_Abort_IT(htim->hdma[TIM_DMA_ID_CC3]); + 4216 .loc 1 1519 7 view .LVU1152 + 4217 0080 0268 ldr r2, [r0] + 4218 0082 D368 ldr r3, [r2, #12] + 4219 0084 1249 ldr r1, .L317+20 + 4220 .LVL315: +1519:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** (void)HAL_DMA_Abort_IT(htim->hdma[TIM_DMA_ID_CC3]); + 4221 .loc 1 1519 7 is_stmt 0 view .LVU1153 + 4222 0086 0B40 ands r3, r1 + 4223 0088 D360 str r3, [r2, #12] +1520:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** break; + 4224 .loc 1 1520 7 is_stmt 1 view .LVU1154 + ARM GAS /tmp/ccUWVJFr.s page 136 + + +1520:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** break; + 4225 .loc 1 1520 13 is_stmt 0 view .LVU1155 + 4226 008a C06A ldr r0, [r0, #44] + 4227 .LVL316: +1520:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** break; + 4228 .loc 1 1520 13 view .LVU1156 + 4229 008c FFF7FEFF bl HAL_DMA_Abort_IT + 4230 .LVL317: +1521:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** } + 4231 .loc 1 1521 7 is_stmt 1 view .LVU1157 +1529:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** { + 4232 .loc 1 1529 3 view .LVU1158 + 4233 0090 C7E7 b .L308 + 4234 .L311: +1541:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** } + 4235 .loc 1 1541 5 is_stmt 0 discriminator 2 view .LVU1159 + 4236 0092 042D cmp r5, #4 + 4237 0094 06D0 beq .L315 +1541:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** } + 4238 .loc 1 1541 5 discriminator 4 view .LVU1160 + 4239 0096 082D cmp r5, #8 + 4240 0098 09D0 beq .L316 +1541:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** } + 4241 .loc 1 1541 5 discriminator 7 view .LVU1161 + 4242 009a 4523 movs r3, #69 + 4243 009c 0122 movs r2, #1 + 4244 009e E254 strb r2, [r4, r3] + 4245 00a0 0020 movs r0, #0 + 4246 00a2 E3E7 b .L307 + 4247 .L315: +1541:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** } + 4248 .loc 1 1541 5 discriminator 3 view .LVU1162 + 4249 00a4 4323 movs r3, #67 + 4250 00a6 0122 movs r2, #1 + 4251 00a8 E254 strb r2, [r4, r3] + 4252 00aa 0020 movs r0, #0 + 4253 00ac DEE7 b .L307 + 4254 .L316: +1541:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** } + 4255 .loc 1 1541 5 discriminator 6 view .LVU1163 + 4256 00ae 4423 movs r3, #68 + 4257 00b0 0122 movs r2, #1 + 4258 00b2 E254 strb r2, [r4, r3] + 4259 00b4 0020 movs r0, #0 + 4260 00b6 D9E7 b .L307 + 4261 .LVL318: + 4262 .L314: +1498:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** { + 4263 .loc 1 1498 3 view .LVU1164 + 4264 00b8 0120 movs r0, #1 + 4265 .LVL319: +1498:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** { + 4266 .loc 1 1498 3 view .LVU1165 + 4267 00ba D7E7 b .L307 + 4268 .L318: + 4269 .align 2 + 4270 .L317: + ARM GAS /tmp/ccUWVJFr.s page 137 + + + 4271 00bc FFFDFFFF .word -513 + 4272 00c0 11110000 .word 4369 + 4273 00c4 44040000 .word 1092 + 4274 00c8 FF7FFFFF .word -32769 + 4275 00cc FFFBFFFF .word -1025 + 4276 00d0 FFF7FFFF .word -2049 + 4277 .cfi_endproc + 4278 .LFE61: + 4280 .section .text.HAL_TIMEx_OnePulseN_Start,"ax",%progbits + 4281 .align 1 + 4282 .global HAL_TIMEx_OnePulseN_Start + 4283 .syntax unified + 4284 .code 16 + 4285 .thumb_func + 4287 HAL_TIMEx_OnePulseN_Start: + 4288 .LVL320: + 4289 .LFB62: +1583:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** uint32_t input_channel = (OutputChannel == TIM_CHANNEL_1) ? TIM_CHANNEL_2 : TIM_CHANNEL_1; + 4290 .loc 1 1583 1 is_stmt 1 view -0 + 4291 .cfi_startproc + 4292 @ args = 0, pretend = 0, frame = 0 + 4293 @ frame_needed = 0, uses_anonymous_args = 0 +1583:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** uint32_t input_channel = (OutputChannel == TIM_CHANNEL_1) ? TIM_CHANNEL_2 : TIM_CHANNEL_1; + 4294 .loc 1 1583 1 is_stmt 0 view .LVU1167 + 4295 0000 F8B5 push {r3, r4, r5, r6, r7, lr} + 4296 .cfi_def_cfa_offset 24 + 4297 .cfi_offset 3, -24 + 4298 .cfi_offset 4, -20 + 4299 .cfi_offset 5, -16 + 4300 .cfi_offset 6, -12 + 4301 .cfi_offset 7, -8 + 4302 .cfi_offset 14, -4 + 4303 0002 0400 movs r4, r0 +1584:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** HAL_TIM_ChannelStateTypeDef channel_1_state = TIM_CHANNEL_STATE_GET(htim, TIM_CHANNEL_1); + 4304 .loc 1 1584 3 is_stmt 1 view .LVU1168 +1584:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** HAL_TIM_ChannelStateTypeDef channel_1_state = TIM_CHANNEL_STATE_GET(htim, TIM_CHANNEL_1); + 4305 .loc 1 1584 77 is_stmt 0 view .LVU1169 + 4306 0004 0029 cmp r1, #0 + 4307 0006 16D1 bne .L322 +1584:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** HAL_TIM_ChannelStateTypeDef channel_1_state = TIM_CHANNEL_STATE_GET(htim, TIM_CHANNEL_1); + 4308 .loc 1 1584 77 discriminator 1 view .LVU1170 + 4309 0008 0426 movs r6, #4 + 4310 .L320: + 4311 .LVL321: +1585:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** HAL_TIM_ChannelStateTypeDef channel_2_state = TIM_CHANNEL_STATE_GET(htim, TIM_CHANNEL_2); + 4312 .loc 1 1585 3 is_stmt 1 view .LVU1171 +1585:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** HAL_TIM_ChannelStateTypeDef channel_2_state = TIM_CHANNEL_STATE_GET(htim, TIM_CHANNEL_2); + 4313 .loc 1 1585 31 is_stmt 0 view .LVU1172 + 4314 000a 3E23 movs r3, #62 + 4315 000c E75C ldrb r7, [r4, r3] + 4316 000e F8B2 uxtb r0, r7 + 4317 .LVL322: +1586:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** HAL_TIM_ChannelStateTypeDef complementary_channel_1_state = TIM_CHANNEL_N_STATE_GET(htim, TIM_CHA + 4318 .loc 1 1586 3 is_stmt 1 view .LVU1173 +1586:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** HAL_TIM_ChannelStateTypeDef complementary_channel_1_state = TIM_CHANNEL_N_STATE_GET(htim, TIM_CHA + 4319 .loc 1 1586 31 is_stmt 0 view .LVU1174 + 4320 0010 0133 adds r3, r3, #1 + ARM GAS /tmp/ccUWVJFr.s page 138 + + + 4321 0012 E35C ldrb r3, [r4, r3] + 4322 0014 DBB2 uxtb r3, r3 + 4323 .LVL323: +1587:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** HAL_TIM_ChannelStateTypeDef complementary_channel_2_state = TIM_CHANNEL_N_STATE_GET(htim, TIM_CHA + 4324 .loc 1 1587 3 is_stmt 1 view .LVU1175 +1587:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** HAL_TIM_ChannelStateTypeDef complementary_channel_2_state = TIM_CHANNEL_N_STATE_GET(htim, TIM_CHA + 4325 .loc 1 1587 31 is_stmt 0 view .LVU1176 + 4326 0016 4222 movs r2, #66 + 4327 0018 A25C ldrb r2, [r4, r2] + 4328 001a D2B2 uxtb r2, r2 + 4329 .LVL324: +1588:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** + 4330 .loc 1 1588 3 is_stmt 1 view .LVU1177 +1588:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** + 4331 .loc 1 1588 31 is_stmt 0 view .LVU1178 + 4332 001c 4325 movs r5, #67 + 4333 001e 655D ldrb r5, [r4, r5] + 4334 0020 EDB2 uxtb r5, r5 + 4335 .LVL325: +1591:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** + 4336 .loc 1 1591 3 is_stmt 1 view .LVU1179 +1594:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** || (channel_2_state != HAL_TIM_CHANNEL_STATE_READY) + 4337 .loc 1 1594 3 view .LVU1180 +1594:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** || (channel_2_state != HAL_TIM_CHANNEL_STATE_READY) + 4338 .loc 1 1594 6 is_stmt 0 view .LVU1181 + 4339 0022 012F cmp r7, #1 + 4340 0024 23D1 bne .L323 +1595:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** || (complementary_channel_1_state != HAL_TIM_CHANNEL_STATE_READY) + 4341 .loc 1 1595 7 view .LVU1182 + 4342 0026 012B cmp r3, #1 + 4343 0028 22D1 bne .L321 +1596:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** || (complementary_channel_2_state != HAL_TIM_CHANNEL_STATE_READY)) + 4344 .loc 1 1596 7 view .LVU1183 + 4345 002a 012A cmp r2, #1 + 4346 002c 21D1 bne .L324 +1597:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** { + 4347 .loc 1 1597 7 view .LVU1184 + 4348 002e 012D cmp r5, #1 + 4349 0030 03D0 beq .L326 +1599:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** } + 4350 .loc 1 1599 12 view .LVU1185 + 4351 0032 1000 movs r0, r2 + 4352 .LVL326: +1599:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** } + 4353 .loc 1 1599 12 view .LVU1186 + 4354 0034 1CE0 b .L321 + 4355 .LVL327: + 4356 .L322: +1584:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** HAL_TIM_ChannelStateTypeDef channel_1_state = TIM_CHANNEL_STATE_GET(htim, TIM_CHANNEL_1); + 4357 .loc 1 1584 77 discriminator 2 view .LVU1187 + 4358 0036 0026 movs r6, #0 + 4359 0038 E7E7 b .L320 + 4360 .LVL328: + 4361 .L326: +1603:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** TIM_CHANNEL_STATE_SET(htim, TIM_CHANNEL_2, HAL_TIM_CHANNEL_STATE_BUSY); + 4362 .loc 1 1603 3 is_stmt 1 view .LVU1188 + 4363 003a 0133 adds r3, r3, #1 + ARM GAS /tmp/ccUWVJFr.s page 139 + + + 4364 .LVL329: +1603:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** TIM_CHANNEL_STATE_SET(htim, TIM_CHANNEL_2, HAL_TIM_CHANNEL_STATE_BUSY); + 4365 .loc 1 1603 3 is_stmt 0 view .LVU1189 + 4366 003c 3D32 adds r2, r2, #61 + 4367 .LVL330: +1603:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** TIM_CHANNEL_STATE_SET(htim, TIM_CHANNEL_2, HAL_TIM_CHANNEL_STATE_BUSY); + 4368 .loc 1 1603 3 view .LVU1190 + 4369 003e A354 strb r3, [r4, r2] +1604:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** TIM_CHANNEL_N_STATE_SET(htim, TIM_CHANNEL_1, HAL_TIM_CHANNEL_STATE_BUSY); + 4370 .loc 1 1604 3 is_stmt 1 view .LVU1191 + 4371 0040 0132 adds r2, r2, #1 + 4372 .LVL331: +1604:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** TIM_CHANNEL_N_STATE_SET(htim, TIM_CHANNEL_1, HAL_TIM_CHANNEL_STATE_BUSY); + 4373 .loc 1 1604 3 is_stmt 0 view .LVU1192 + 4374 0042 A354 strb r3, [r4, r2] +1605:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** TIM_CHANNEL_N_STATE_SET(htim, TIM_CHANNEL_2, HAL_TIM_CHANNEL_STATE_BUSY); + 4375 .loc 1 1605 3 is_stmt 1 view .LVU1193 + 4376 0044 0332 adds r2, r2, #3 + 4377 .LVL332: +1605:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** TIM_CHANNEL_N_STATE_SET(htim, TIM_CHANNEL_2, HAL_TIM_CHANNEL_STATE_BUSY); + 4378 .loc 1 1605 3 is_stmt 0 view .LVU1194 + 4379 0046 A354 strb r3, [r4, r2] +1606:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** + 4380 .loc 1 1606 3 is_stmt 1 view .LVU1195 + 4381 0048 0132 adds r2, r2, #1 + 4382 .LVL333: +1606:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** + 4383 .loc 1 1606 3 is_stmt 0 view .LVU1196 + 4384 004a A354 strb r3, [r4, r2] +1609:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** TIM_CCxChannelCmd(htim->Instance, input_channel, TIM_CCx_ENABLE); + 4385 .loc 1 1609 3 is_stmt 1 view .LVU1197 + 4386 004c 2068 ldr r0, [r4] + 4387 .LVL334: +1609:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** TIM_CCxChannelCmd(htim->Instance, input_channel, TIM_CCx_ENABLE); + 4388 .loc 1 1609 3 is_stmt 0 view .LVU1198 + 4389 004e 3F3A subs r2, r2, #63 + 4390 .LVL335: +1609:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** TIM_CCxChannelCmd(htim->Instance, input_channel, TIM_CCx_ENABLE); + 4391 .loc 1 1609 3 view .LVU1199 + 4392 0050 FFF7FEFF bl TIM_CCxNChannelCmd + 4393 .LVL336: +1610:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** + 4394 .loc 1 1610 3 is_stmt 1 view .LVU1200 + 4395 0054 2068 ldr r0, [r4] + 4396 0056 0122 movs r2, #1 + 4397 0058 3100 movs r1, r6 + 4398 005a FFF7FEFF bl TIM_CCxChannelCmd + 4399 .LVL337: +1613:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** + 4400 .loc 1 1613 3 view .LVU1201 + 4401 005e 2268 ldr r2, [r4] + 4402 0060 516C ldr r1, [r2, #68] + 4403 0062 8023 movs r3, #128 + 4404 0064 1B02 lsls r3, r3, #8 + 4405 0066 0B43 orrs r3, r1 + 4406 0068 5364 str r3, [r2, #68] +1616:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** } + ARM GAS /tmp/ccUWVJFr.s page 140 + + + 4407 .loc 1 1616 3 view .LVU1202 +1616:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** } + 4408 .loc 1 1616 10 is_stmt 0 view .LVU1203 + 4409 006a 0020 movs r0, #0 + 4410 006c 00E0 b .L321 + 4411 .LVL338: + 4412 .L323: +1599:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** } + 4413 .loc 1 1599 12 view .LVU1204 + 4414 006e 0120 movs r0, #1 + 4415 .LVL339: + 4416 .L321: +1617:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** + 4417 .loc 1 1617 1 view .LVU1205 + 4418 @ sp needed + 4419 .LVL340: + 4420 .LVL341: + 4421 .LVL342: + 4422 .LVL343: +1617:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** + 4423 .loc 1 1617 1 view .LVU1206 + 4424 0070 F8BD pop {r3, r4, r5, r6, r7, pc} + 4425 .LVL344: + 4426 .L324: +1599:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** } + 4427 .loc 1 1599 12 view .LVU1207 + 4428 0072 1800 movs r0, r3 + 4429 .LVL345: +1599:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** } + 4430 .loc 1 1599 12 view .LVU1208 + 4431 0074 FCE7 b .L321 + 4432 .cfi_endproc + 4433 .LFE62: + 4435 .section .text.HAL_TIMEx_OnePulseN_Stop,"ax",%progbits + 4436 .align 1 + 4437 .global HAL_TIMEx_OnePulseN_Stop + 4438 .syntax unified + 4439 .code 16 + 4440 .thumb_func + 4442 HAL_TIMEx_OnePulseN_Stop: + 4443 .LVL346: + 4444 .LFB63: +1632:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** uint32_t input_channel = (OutputChannel == TIM_CHANNEL_1) ? TIM_CHANNEL_2 : TIM_CHANNEL_1; + 4445 .loc 1 1632 1 is_stmt 1 view -0 + 4446 .cfi_startproc + 4447 @ args = 0, pretend = 0, frame = 0 + 4448 @ frame_needed = 0, uses_anonymous_args = 0 +1632:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** uint32_t input_channel = (OutputChannel == TIM_CHANNEL_1) ? TIM_CHANNEL_2 : TIM_CHANNEL_1; + 4449 .loc 1 1632 1 is_stmt 0 view .LVU1210 + 4450 0000 70B5 push {r4, r5, r6, lr} + 4451 .cfi_def_cfa_offset 16 + 4452 .cfi_offset 4, -16 + 4453 .cfi_offset 5, -12 + 4454 .cfi_offset 6, -8 + 4455 .cfi_offset 14, -4 + 4456 0002 0400 movs r4, r0 +1633:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** + ARM GAS /tmp/ccUWVJFr.s page 141 + + + 4457 .loc 1 1633 3 is_stmt 1 view .LVU1211 +1633:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** + 4458 .loc 1 1633 77 is_stmt 0 view .LVU1212 + 4459 0004 0029 cmp r1, #0 + 4460 0006 2ED1 bne .L331 +1633:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** + 4461 .loc 1 1633 77 discriminator 1 view .LVU1213 + 4462 0008 0425 movs r5, #4 + 4463 .L328: + 4464 .LVL347: +1636:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** + 4465 .loc 1 1636 3 is_stmt 1 view .LVU1214 +1639:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** TIM_CCxChannelCmd(htim->Instance, input_channel, TIM_CCx_DISABLE); + 4466 .loc 1 1639 3 view .LVU1215 + 4467 000a 2068 ldr r0, [r4] + 4468 .LVL348: +1639:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** TIM_CCxChannelCmd(htim->Instance, input_channel, TIM_CCx_DISABLE); + 4469 .loc 1 1639 3 is_stmt 0 view .LVU1216 + 4470 000c 0022 movs r2, #0 + 4471 000e FFF7FEFF bl TIM_CCxNChannelCmd + 4472 .LVL349: +1640:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** + 4473 .loc 1 1640 3 is_stmt 1 view .LVU1217 + 4474 0012 2068 ldr r0, [r4] + 4475 0014 0022 movs r2, #0 + 4476 0016 2900 movs r1, r5 + 4477 0018 FFF7FEFF bl TIM_CCxChannelCmd + 4478 .LVL350: +1643:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** + 4479 .loc 1 1643 3 view .LVU1218 +1643:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** + 4480 .loc 1 1643 3 view .LVU1219 + 4481 001c 2368 ldr r3, [r4] + 4482 001e 196A ldr r1, [r3, #32] + 4483 0020 124A ldr r2, .L332 + 4484 0022 1142 tst r1, r2 + 4485 0024 07D1 bne .L329 +1643:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** + 4486 .loc 1 1643 3 discriminator 1 view .LVU1220 + 4487 0026 196A ldr r1, [r3, #32] + 4488 0028 114A ldr r2, .L332+4 + 4489 002a 1142 tst r1, r2 + 4490 002c 03D1 bne .L329 +1643:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** + 4491 .loc 1 1643 3 discriminator 3 view .LVU1221 + 4492 002e 5A6C ldr r2, [r3, #68] + 4493 0030 1049 ldr r1, .L332+8 + 4494 0032 0A40 ands r2, r1 + 4495 0034 5A64 str r2, [r3, #68] + 4496 .L329: +1643:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** + 4497 .loc 1 1643 3 discriminator 5 view .LVU1222 +1646:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** + 4498 .loc 1 1646 3 view .LVU1223 +1646:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** + 4499 .loc 1 1646 3 view .LVU1224 + 4500 0036 2368 ldr r3, [r4] + ARM GAS /tmp/ccUWVJFr.s page 142 + + + 4501 0038 196A ldr r1, [r3, #32] + 4502 003a 0C4A ldr r2, .L332 + 4503 003c 1142 tst r1, r2 + 4504 003e 07D1 bne .L330 +1646:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** + 4505 .loc 1 1646 3 discriminator 1 view .LVU1225 + 4506 0040 196A ldr r1, [r3, #32] + 4507 0042 0B4A ldr r2, .L332+4 + 4508 0044 1142 tst r1, r2 + 4509 0046 03D1 bne .L330 +1646:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** + 4510 .loc 1 1646 3 discriminator 3 view .LVU1226 + 4511 0048 1A68 ldr r2, [r3] + 4512 004a 0121 movs r1, #1 + 4513 004c 8A43 bics r2, r1 + 4514 004e 1A60 str r2, [r3] + 4515 .L330: +1646:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** + 4516 .loc 1 1646 3 discriminator 5 view .LVU1227 +1649:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** TIM_CHANNEL_STATE_SET(htim, TIM_CHANNEL_2, HAL_TIM_CHANNEL_STATE_READY); + 4517 .loc 1 1649 3 view .LVU1228 + 4518 0050 0123 movs r3, #1 + 4519 0052 3E22 movs r2, #62 + 4520 0054 A354 strb r3, [r4, r2] +1650:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** TIM_CHANNEL_N_STATE_SET(htim, TIM_CHANNEL_1, HAL_TIM_CHANNEL_STATE_READY); + 4521 .loc 1 1650 3 view .LVU1229 + 4522 0056 0132 adds r2, r2, #1 + 4523 0058 A354 strb r3, [r4, r2] +1651:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** TIM_CHANNEL_N_STATE_SET(htim, TIM_CHANNEL_2, HAL_TIM_CHANNEL_STATE_READY); + 4524 .loc 1 1651 3 view .LVU1230 + 4525 005a 0332 adds r2, r2, #3 + 4526 005c A354 strb r3, [r4, r2] +1652:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** + 4527 .loc 1 1652 3 view .LVU1231 + 4528 005e 0132 adds r2, r2, #1 + 4529 0060 A354 strb r3, [r4, r2] +1655:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** } + 4530 .loc 1 1655 3 view .LVU1232 +1656:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** + 4531 .loc 1 1656 1 is_stmt 0 view .LVU1233 + 4532 0062 0020 movs r0, #0 + 4533 @ sp needed + 4534 .LVL351: + 4535 .LVL352: +1656:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** + 4536 .loc 1 1656 1 view .LVU1234 + 4537 0064 70BD pop {r4, r5, r6, pc} + 4538 .LVL353: + 4539 .L331: +1633:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** + 4540 .loc 1 1633 77 discriminator 2 view .LVU1235 + 4541 0066 0025 movs r5, #0 + 4542 0068 CFE7 b .L328 + 4543 .L333: + 4544 006a C046 .align 2 + 4545 .L332: + 4546 006c 11110000 .word 4369 + ARM GAS /tmp/ccUWVJFr.s page 143 + + + 4547 0070 44040000 .word 1092 + 4548 0074 FF7FFFFF .word -32769 + 4549 .cfi_endproc + 4550 .LFE63: + 4552 .section .text.HAL_TIMEx_OnePulseN_Start_IT,"ax",%progbits + 4553 .align 1 + 4554 .global HAL_TIMEx_OnePulseN_Start_IT + 4555 .syntax unified + 4556 .code 16 + 4557 .thumb_func + 4559 HAL_TIMEx_OnePulseN_Start_IT: + 4560 .LVL354: + 4561 .LFB64: +1671:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** uint32_t input_channel = (OutputChannel == TIM_CHANNEL_1) ? TIM_CHANNEL_2 : TIM_CHANNEL_1; + 4562 .loc 1 1671 1 is_stmt 1 view -0 + 4563 .cfi_startproc + 4564 @ args = 0, pretend = 0, frame = 0 + 4565 @ frame_needed = 0, uses_anonymous_args = 0 +1671:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** uint32_t input_channel = (OutputChannel == TIM_CHANNEL_1) ? TIM_CHANNEL_2 : TIM_CHANNEL_1; + 4566 .loc 1 1671 1 is_stmt 0 view .LVU1237 + 4567 0000 F8B5 push {r3, r4, r5, r6, r7, lr} + 4568 .cfi_def_cfa_offset 24 + 4569 .cfi_offset 3, -24 + 4570 .cfi_offset 4, -20 + 4571 .cfi_offset 5, -16 + 4572 .cfi_offset 6, -12 + 4573 .cfi_offset 7, -8 + 4574 .cfi_offset 14, -4 + 4575 0002 0400 movs r4, r0 +1672:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** HAL_TIM_ChannelStateTypeDef channel_1_state = TIM_CHANNEL_STATE_GET(htim, TIM_CHANNEL_1); + 4576 .loc 1 1672 3 is_stmt 1 view .LVU1238 +1672:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** HAL_TIM_ChannelStateTypeDef channel_1_state = TIM_CHANNEL_STATE_GET(htim, TIM_CHANNEL_1); + 4577 .loc 1 1672 77 is_stmt 0 view .LVU1239 + 4578 0004 0029 cmp r1, #0 + 4579 0006 16D1 bne .L337 +1672:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** HAL_TIM_ChannelStateTypeDef channel_1_state = TIM_CHANNEL_STATE_GET(htim, TIM_CHANNEL_1); + 4580 .loc 1 1672 77 discriminator 1 view .LVU1240 + 4581 0008 0426 movs r6, #4 + 4582 .L335: + 4583 .LVL355: +1673:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** HAL_TIM_ChannelStateTypeDef channel_2_state = TIM_CHANNEL_STATE_GET(htim, TIM_CHANNEL_2); + 4584 .loc 1 1673 3 is_stmt 1 view .LVU1241 +1673:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** HAL_TIM_ChannelStateTypeDef channel_2_state = TIM_CHANNEL_STATE_GET(htim, TIM_CHANNEL_2); + 4585 .loc 1 1673 31 is_stmt 0 view .LVU1242 + 4586 000a 3E23 movs r3, #62 + 4587 000c E75C ldrb r7, [r4, r3] + 4588 000e F8B2 uxtb r0, r7 + 4589 .LVL356: +1674:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** HAL_TIM_ChannelStateTypeDef complementary_channel_1_state = TIM_CHANNEL_N_STATE_GET(htim, TIM_CHA + 4590 .loc 1 1674 3 is_stmt 1 view .LVU1243 +1674:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** HAL_TIM_ChannelStateTypeDef complementary_channel_1_state = TIM_CHANNEL_N_STATE_GET(htim, TIM_CHA + 4591 .loc 1 1674 31 is_stmt 0 view .LVU1244 + 4592 0010 0133 adds r3, r3, #1 + 4593 0012 E35C ldrb r3, [r4, r3] + 4594 0014 DBB2 uxtb r3, r3 + 4595 .LVL357: +1675:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** HAL_TIM_ChannelStateTypeDef complementary_channel_2_state = TIM_CHANNEL_N_STATE_GET(htim, TIM_CHA + ARM GAS /tmp/ccUWVJFr.s page 144 + + + 4596 .loc 1 1675 3 is_stmt 1 view .LVU1245 +1675:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** HAL_TIM_ChannelStateTypeDef complementary_channel_2_state = TIM_CHANNEL_N_STATE_GET(htim, TIM_CHA + 4597 .loc 1 1675 31 is_stmt 0 view .LVU1246 + 4598 0016 4222 movs r2, #66 + 4599 0018 A25C ldrb r2, [r4, r2] + 4600 001a D2B2 uxtb r2, r2 + 4601 .LVL358: +1676:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** + 4602 .loc 1 1676 3 is_stmt 1 view .LVU1247 +1676:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** + 4603 .loc 1 1676 31 is_stmt 0 view .LVU1248 + 4604 001c 4325 movs r5, #67 + 4605 001e 655D ldrb r5, [r4, r5] + 4606 0020 EDB2 uxtb r5, r5 + 4607 .LVL359: +1679:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** + 4608 .loc 1 1679 3 is_stmt 1 view .LVU1249 +1682:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** || (channel_2_state != HAL_TIM_CHANNEL_STATE_READY) + 4609 .loc 1 1682 3 view .LVU1250 +1682:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** || (channel_2_state != HAL_TIM_CHANNEL_STATE_READY) + 4610 .loc 1 1682 6 is_stmt 0 view .LVU1251 + 4611 0022 012F cmp r7, #1 + 4612 0024 2CD1 bne .L338 +1683:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** || (complementary_channel_1_state != HAL_TIM_CHANNEL_STATE_READY) + 4613 .loc 1 1683 7 view .LVU1252 + 4614 0026 012B cmp r3, #1 + 4615 0028 2BD1 bne .L336 +1684:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** || (complementary_channel_2_state != HAL_TIM_CHANNEL_STATE_READY)) + 4616 .loc 1 1684 7 view .LVU1253 + 4617 002a 012A cmp r2, #1 + 4618 002c 2AD1 bne .L339 +1685:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** { + 4619 .loc 1 1685 7 view .LVU1254 + 4620 002e 012D cmp r5, #1 + 4621 0030 03D0 beq .L341 +1687:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** } + 4622 .loc 1 1687 12 view .LVU1255 + 4623 0032 1000 movs r0, r2 + 4624 .LVL360: +1687:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** } + 4625 .loc 1 1687 12 view .LVU1256 + 4626 0034 25E0 b .L336 + 4627 .LVL361: + 4628 .L337: +1672:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** HAL_TIM_ChannelStateTypeDef channel_1_state = TIM_CHANNEL_STATE_GET(htim, TIM_CHANNEL_1); + 4629 .loc 1 1672 77 discriminator 2 view .LVU1257 + 4630 0036 0026 movs r6, #0 + 4631 0038 E7E7 b .L335 + 4632 .LVL362: + 4633 .L341: +1691:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** TIM_CHANNEL_STATE_SET(htim, TIM_CHANNEL_2, HAL_TIM_CHANNEL_STATE_BUSY); + 4634 .loc 1 1691 3 is_stmt 1 view .LVU1258 + 4635 003a 0133 adds r3, r3, #1 + 4636 .LVL363: +1691:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** TIM_CHANNEL_STATE_SET(htim, TIM_CHANNEL_2, HAL_TIM_CHANNEL_STATE_BUSY); + 4637 .loc 1 1691 3 is_stmt 0 view .LVU1259 + 4638 003c 3D32 adds r2, r2, #61 + ARM GAS /tmp/ccUWVJFr.s page 145 + + + 4639 .LVL364: +1691:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** TIM_CHANNEL_STATE_SET(htim, TIM_CHANNEL_2, HAL_TIM_CHANNEL_STATE_BUSY); + 4640 .loc 1 1691 3 view .LVU1260 + 4641 003e A354 strb r3, [r4, r2] +1692:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** TIM_CHANNEL_N_STATE_SET(htim, TIM_CHANNEL_1, HAL_TIM_CHANNEL_STATE_BUSY); + 4642 .loc 1 1692 3 is_stmt 1 view .LVU1261 + 4643 0040 0132 adds r2, r2, #1 + 4644 .LVL365: +1692:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** TIM_CHANNEL_N_STATE_SET(htim, TIM_CHANNEL_1, HAL_TIM_CHANNEL_STATE_BUSY); + 4645 .loc 1 1692 3 is_stmt 0 view .LVU1262 + 4646 0042 A354 strb r3, [r4, r2] +1693:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** TIM_CHANNEL_N_STATE_SET(htim, TIM_CHANNEL_2, HAL_TIM_CHANNEL_STATE_BUSY); + 4647 .loc 1 1693 3 is_stmt 1 view .LVU1263 + 4648 0044 0332 adds r2, r2, #3 + 4649 .LVL366: +1693:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** TIM_CHANNEL_N_STATE_SET(htim, TIM_CHANNEL_2, HAL_TIM_CHANNEL_STATE_BUSY); + 4650 .loc 1 1693 3 is_stmt 0 view .LVU1264 + 4651 0046 A354 strb r3, [r4, r2] +1694:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** + 4652 .loc 1 1694 3 is_stmt 1 view .LVU1265 + 4653 0048 0132 adds r2, r2, #1 + 4654 .LVL367: +1694:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** + 4655 .loc 1 1694 3 is_stmt 0 view .LVU1266 + 4656 004a A354 strb r3, [r4, r2] +1697:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** + 4657 .loc 1 1697 3 is_stmt 1 view .LVU1267 + 4658 004c 2068 ldr r0, [r4] + 4659 .LVL368: +1697:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** + 4660 .loc 1 1697 3 is_stmt 0 view .LVU1268 + 4661 004e C268 ldr r2, [r0, #12] + 4662 .LVL369: +1697:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** + 4663 .loc 1 1697 3 view .LVU1269 + 4664 0050 1343 orrs r3, r2 + 4665 .LVL370: +1697:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** + 4666 .loc 1 1697 3 view .LVU1270 + 4667 0052 C360 str r3, [r0, #12] +1700:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** + 4668 .loc 1 1700 3 is_stmt 1 view .LVU1271 + 4669 0054 2268 ldr r2, [r4] + 4670 0056 D368 ldr r3, [r2, #12] + 4671 0058 0420 movs r0, #4 + 4672 005a 0343 orrs r3, r0 + 4673 005c D360 str r3, [r2, #12] +1703:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** TIM_CCxChannelCmd(htim->Instance, input_channel, TIM_CCx_ENABLE); + 4674 .loc 1 1703 3 view .LVU1272 + 4675 005e 2068 ldr r0, [r4] + 4676 0060 0422 movs r2, #4 + 4677 0062 FFF7FEFF bl TIM_CCxNChannelCmd + 4678 .LVL371: +1704:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** + 4679 .loc 1 1704 3 view .LVU1273 + 4680 0066 2068 ldr r0, [r4] + 4681 0068 0122 movs r2, #1 + ARM GAS /tmp/ccUWVJFr.s page 146 + + + 4682 006a 3100 movs r1, r6 + 4683 006c FFF7FEFF bl TIM_CCxChannelCmd + 4684 .LVL372: +1707:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** + 4685 .loc 1 1707 3 view .LVU1274 + 4686 0070 2268 ldr r2, [r4] + 4687 0072 516C ldr r1, [r2, #68] + 4688 0074 8023 movs r3, #128 + 4689 0076 1B02 lsls r3, r3, #8 + 4690 0078 0B43 orrs r3, r1 + 4691 007a 5364 str r3, [r2, #68] +1710:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** } + 4692 .loc 1 1710 3 view .LVU1275 +1710:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** } + 4693 .loc 1 1710 10 is_stmt 0 view .LVU1276 + 4694 007c 0020 movs r0, #0 + 4695 007e 00E0 b .L336 + 4696 .LVL373: + 4697 .L338: +1687:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** } + 4698 .loc 1 1687 12 view .LVU1277 + 4699 0080 0120 movs r0, #1 + 4700 .LVL374: + 4701 .L336: +1711:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** + 4702 .loc 1 1711 1 view .LVU1278 + 4703 @ sp needed + 4704 .LVL375: + 4705 .LVL376: + 4706 .LVL377: + 4707 .LVL378: +1711:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** + 4708 .loc 1 1711 1 view .LVU1279 + 4709 0082 F8BD pop {r3, r4, r5, r6, r7, pc} + 4710 .LVL379: + 4711 .L339: +1687:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** } + 4712 .loc 1 1687 12 view .LVU1280 + 4713 0084 1800 movs r0, r3 + 4714 .LVL380: +1687:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** } + 4715 .loc 1 1687 12 view .LVU1281 + 4716 0086 FCE7 b .L336 + 4717 .cfi_endproc + 4718 .LFE64: + 4720 .section .text.HAL_TIMEx_OnePulseN_Stop_IT,"ax",%progbits + 4721 .align 1 + 4722 .global HAL_TIMEx_OnePulseN_Stop_IT + 4723 .syntax unified + 4724 .code 16 + 4725 .thumb_func + 4727 HAL_TIMEx_OnePulseN_Stop_IT: + 4728 .LVL381: + 4729 .LFB65: +1726:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** uint32_t input_channel = (OutputChannel == TIM_CHANNEL_1) ? TIM_CHANNEL_2 : TIM_CHANNEL_1; + 4730 .loc 1 1726 1 is_stmt 1 view -0 + 4731 .cfi_startproc + ARM GAS /tmp/ccUWVJFr.s page 147 + + + 4732 @ args = 0, pretend = 0, frame = 0 + 4733 @ frame_needed = 0, uses_anonymous_args = 0 +1726:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** uint32_t input_channel = (OutputChannel == TIM_CHANNEL_1) ? TIM_CHANNEL_2 : TIM_CHANNEL_1; + 4734 .loc 1 1726 1 is_stmt 0 view .LVU1283 + 4735 0000 70B5 push {r4, r5, r6, lr} + 4736 .cfi_def_cfa_offset 16 + 4737 .cfi_offset 4, -16 + 4738 .cfi_offset 5, -12 + 4739 .cfi_offset 6, -8 + 4740 .cfi_offset 14, -4 + 4741 0002 0400 movs r4, r0 +1727:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** + 4742 .loc 1 1727 3 is_stmt 1 view .LVU1284 +1727:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** + 4743 .loc 1 1727 77 is_stmt 0 view .LVU1285 + 4744 0004 0029 cmp r1, #0 + 4745 0006 38D1 bne .L346 +1727:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** + 4746 .loc 1 1727 77 discriminator 1 view .LVU1286 + 4747 0008 0425 movs r5, #4 + 4748 .L343: + 4749 .LVL382: +1730:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** + 4750 .loc 1 1730 3 is_stmt 1 view .LVU1287 +1733:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** + 4751 .loc 1 1733 3 view .LVU1288 + 4752 000a 2268 ldr r2, [r4] + 4753 000c D368 ldr r3, [r2, #12] + 4754 000e 0220 movs r0, #2 + 4755 .LVL383: +1733:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** + 4756 .loc 1 1733 3 is_stmt 0 view .LVU1289 + 4757 0010 8343 bics r3, r0 + 4758 0012 D360 str r3, [r2, #12] +1736:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** + 4759 .loc 1 1736 3 is_stmt 1 view .LVU1290 + 4760 0014 2268 ldr r2, [r4] + 4761 0016 D368 ldr r3, [r2, #12] + 4762 0018 0230 adds r0, r0, #2 + 4763 001a 8343 bics r3, r0 + 4764 001c D360 str r3, [r2, #12] +1739:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** TIM_CCxChannelCmd(htim->Instance, input_channel, TIM_CCx_DISABLE); + 4765 .loc 1 1739 3 view .LVU1291 + 4766 001e 2068 ldr r0, [r4] + 4767 0020 0022 movs r2, #0 + 4768 0022 FFF7FEFF bl TIM_CCxNChannelCmd + 4769 .LVL384: +1740:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** + 4770 .loc 1 1740 3 view .LVU1292 + 4771 0026 2068 ldr r0, [r4] + 4772 0028 0022 movs r2, #0 + 4773 002a 2900 movs r1, r5 + 4774 002c FFF7FEFF bl TIM_CCxChannelCmd + 4775 .LVL385: +1743:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** + 4776 .loc 1 1743 3 view .LVU1293 +1743:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** + ARM GAS /tmp/ccUWVJFr.s page 148 + + + 4777 .loc 1 1743 3 view .LVU1294 + 4778 0030 2368 ldr r3, [r4] + 4779 0032 196A ldr r1, [r3, #32] + 4780 0034 124A ldr r2, .L347 + 4781 0036 1142 tst r1, r2 + 4782 0038 07D1 bne .L344 +1743:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** + 4783 .loc 1 1743 3 discriminator 1 view .LVU1295 + 4784 003a 196A ldr r1, [r3, #32] + 4785 003c 114A ldr r2, .L347+4 + 4786 003e 1142 tst r1, r2 + 4787 0040 03D1 bne .L344 +1743:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** + 4788 .loc 1 1743 3 discriminator 3 view .LVU1296 + 4789 0042 5A6C ldr r2, [r3, #68] + 4790 0044 1049 ldr r1, .L347+8 + 4791 0046 0A40 ands r2, r1 + 4792 0048 5A64 str r2, [r3, #68] + 4793 .L344: +1743:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** + 4794 .loc 1 1743 3 discriminator 5 view .LVU1297 +1746:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** + 4795 .loc 1 1746 3 view .LVU1298 +1746:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** + 4796 .loc 1 1746 3 view .LVU1299 + 4797 004a 2368 ldr r3, [r4] + 4798 004c 196A ldr r1, [r3, #32] + 4799 004e 0C4A ldr r2, .L347 + 4800 0050 1142 tst r1, r2 + 4801 0052 07D1 bne .L345 +1746:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** + 4802 .loc 1 1746 3 discriminator 1 view .LVU1300 + 4803 0054 196A ldr r1, [r3, #32] + 4804 0056 0B4A ldr r2, .L347+4 + 4805 0058 1142 tst r1, r2 + 4806 005a 03D1 bne .L345 +1746:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** + 4807 .loc 1 1746 3 discriminator 3 view .LVU1301 + 4808 005c 1A68 ldr r2, [r3] + 4809 005e 0121 movs r1, #1 + 4810 0060 8A43 bics r2, r1 + 4811 0062 1A60 str r2, [r3] + 4812 .L345: +1746:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** + 4813 .loc 1 1746 3 discriminator 5 view .LVU1302 +1749:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** TIM_CHANNEL_STATE_SET(htim, TIM_CHANNEL_2, HAL_TIM_CHANNEL_STATE_READY); + 4814 .loc 1 1749 3 view .LVU1303 + 4815 0064 0123 movs r3, #1 + 4816 0066 3E22 movs r2, #62 + 4817 0068 A354 strb r3, [r4, r2] +1750:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** TIM_CHANNEL_N_STATE_SET(htim, TIM_CHANNEL_1, HAL_TIM_CHANNEL_STATE_READY); + 4818 .loc 1 1750 3 view .LVU1304 + 4819 006a 0132 adds r2, r2, #1 + 4820 006c A354 strb r3, [r4, r2] +1751:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** TIM_CHANNEL_N_STATE_SET(htim, TIM_CHANNEL_2, HAL_TIM_CHANNEL_STATE_READY); + 4821 .loc 1 1751 3 view .LVU1305 + 4822 006e 0332 adds r2, r2, #3 + ARM GAS /tmp/ccUWVJFr.s page 149 + + + 4823 0070 A354 strb r3, [r4, r2] +1752:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** + 4824 .loc 1 1752 3 view .LVU1306 + 4825 0072 0132 adds r2, r2, #1 + 4826 0074 A354 strb r3, [r4, r2] +1755:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** } + 4827 .loc 1 1755 3 view .LVU1307 +1756:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** + 4828 .loc 1 1756 1 is_stmt 0 view .LVU1308 + 4829 0076 0020 movs r0, #0 + 4830 @ sp needed + 4831 .LVL386: + 4832 .LVL387: +1756:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** + 4833 .loc 1 1756 1 view .LVU1309 + 4834 0078 70BD pop {r4, r5, r6, pc} + 4835 .LVL388: + 4836 .L346: +1727:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** + 4837 .loc 1 1727 77 discriminator 2 view .LVU1310 + 4838 007a 0025 movs r5, #0 + 4839 007c C5E7 b .L343 + 4840 .L348: + 4841 007e C046 .align 2 + 4842 .L347: + 4843 0080 11110000 .word 4369 + 4844 0084 44040000 .word 1092 + 4845 0088 FF7FFFFF .word -32769 + 4846 .cfi_endproc + 4847 .LFE65: + 4849 .section .text.HAL_TIMEx_ConfigCommutEvent,"ax",%progbits + 4850 .align 1 + 4851 .global HAL_TIMEx_ConfigCommutEvent + 4852 .syntax unified + 4853 .code 16 + 4854 .thumb_func + 4856 HAL_TIMEx_ConfigCommutEvent: + 4857 .LVL389: + 4858 .LFB66: +1806:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** /* Check the parameters */ + 4859 .loc 1 1806 1 is_stmt 1 view -0 + 4860 .cfi_startproc + 4861 @ args = 0, pretend = 0, frame = 0 + 4862 @ frame_needed = 0, uses_anonymous_args = 0 +1806:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** /* Check the parameters */ + 4863 .loc 1 1806 1 is_stmt 0 view .LVU1312 + 4864 0000 30B5 push {r4, r5, lr} + 4865 .cfi_def_cfa_offset 12 + 4866 .cfi_offset 4, -12 + 4867 .cfi_offset 5, -8 + 4868 .cfi_offset 14, -4 +1808:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** assert_param(IS_TIM_INTERNAL_TRIGGEREVENT_SELECTION(InputTrigger)); + 4869 .loc 1 1808 3 is_stmt 1 view .LVU1313 +1809:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** + 4870 .loc 1 1809 3 view .LVU1314 +1811:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** + 4871 .loc 1 1811 3 view .LVU1315 + ARM GAS /tmp/ccUWVJFr.s page 150 + + +1811:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** + 4872 .loc 1 1811 3 view .LVU1316 + 4873 0002 3C23 movs r3, #60 + 4874 0004 C35C ldrb r3, [r0, r3] + 4875 0006 012B cmp r3, #1 + 4876 0008 30D0 beq .L353 +1811:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** + 4877 .loc 1 1811 3 discriminator 2 view .LVU1317 + 4878 000a 3C23 movs r3, #60 + 4879 000c 0124 movs r4, #1 + 4880 000e C454 strb r4, [r0, r3] +1811:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** + 4881 .loc 1 1811 3 discriminator 2 view .LVU1318 +1813:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** (InputTrigger == TIM_TS_ITR2) || (InputTrigger == TIM_TS_ITR3)) + 4882 .loc 1 1813 3 view .LVU1319 +1813:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** (InputTrigger == TIM_TS_ITR2) || (InputTrigger == TIM_TS_ITR3)) + 4883 .loc 1 1813 6 is_stmt 0 view .LVU1320 + 4884 0010 0029 cmp r1, #0 + 4885 0012 05D0 beq .L351 +1813:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** (InputTrigger == TIM_TS_ITR2) || (InputTrigger == TIM_TS_ITR3)) + 4886 .loc 1 1813 37 discriminator 1 view .LVU1321 + 4887 0014 1029 cmp r1, #16 + 4888 0016 03D0 beq .L351 +1813:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** (InputTrigger == TIM_TS_ITR2) || (InputTrigger == TIM_TS_ITR3)) + 4889 .loc 1 1813 70 discriminator 2 view .LVU1322 + 4890 0018 2029 cmp r1, #32 + 4891 001a 01D0 beq .L351 +1814:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** { + 4892 .loc 1 1814 37 view .LVU1323 + 4893 001c 3029 cmp r1, #48 + 4894 001e 08D1 bne .L352 + 4895 .L351: +1817:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** htim->Instance->SMCR |= InputTrigger; + 4896 .loc 1 1817 5 is_stmt 1 view .LVU1324 +1817:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** htim->Instance->SMCR |= InputTrigger; + 4897 .loc 1 1817 9 is_stmt 0 view .LVU1325 + 4898 0020 0468 ldr r4, [r0] +1817:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** htim->Instance->SMCR |= InputTrigger; + 4899 .loc 1 1817 19 view .LVU1326 + 4900 0022 A368 ldr r3, [r4, #8] +1817:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** htim->Instance->SMCR |= InputTrigger; + 4901 .loc 1 1817 26 view .LVU1327 + 4902 0024 7025 movs r5, #112 + 4903 0026 AB43 bics r3, r5 + 4904 0028 A360 str r3, [r4, #8] +1818:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** } + 4905 .loc 1 1818 5 is_stmt 1 view .LVU1328 +1818:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** } + 4906 .loc 1 1818 9 is_stmt 0 view .LVU1329 + 4907 002a 0468 ldr r4, [r0] +1818:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** } + 4908 .loc 1 1818 19 view .LVU1330 + 4909 002c A368 ldr r3, [r4, #8] +1818:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** } + 4910 .loc 1 1818 26 view .LVU1331 + 4911 002e 0B43 orrs r3, r1 + 4912 0030 A360 str r3, [r4, #8] + ARM GAS /tmp/ccUWVJFr.s page 151 + + + 4913 .L352: +1822:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** /* Select the Commutation event source */ + 4914 .loc 1 1822 3 is_stmt 1 view .LVU1332 +1822:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** /* Select the Commutation event source */ + 4915 .loc 1 1822 7 is_stmt 0 view .LVU1333 + 4916 0032 0168 ldr r1, [r0] + 4917 .LVL390: +1822:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** /* Select the Commutation event source */ + 4918 .loc 1 1822 17 view .LVU1334 + 4919 0034 4B68 ldr r3, [r1, #4] +1822:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** /* Select the Commutation event source */ + 4920 .loc 1 1822 23 view .LVU1335 + 4921 0036 0124 movs r4, #1 + 4922 0038 2343 orrs r3, r4 + 4923 003a 4B60 str r3, [r1, #4] +1824:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** htim->Instance->CR2 |= CommutationSource; + 4924 .loc 1 1824 3 is_stmt 1 view .LVU1336 +1824:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** htim->Instance->CR2 |= CommutationSource; + 4925 .loc 1 1824 7 is_stmt 0 view .LVU1337 + 4926 003c 0168 ldr r1, [r0] +1824:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** htim->Instance->CR2 |= CommutationSource; + 4927 .loc 1 1824 17 view .LVU1338 + 4928 003e 4B68 ldr r3, [r1, #4] +1824:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** htim->Instance->CR2 |= CommutationSource; + 4929 .loc 1 1824 23 view .LVU1339 + 4930 0040 0334 adds r4, r4, #3 + 4931 0042 A343 bics r3, r4 + 4932 0044 4B60 str r3, [r1, #4] +1825:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** + 4933 .loc 1 1825 3 is_stmt 1 view .LVU1340 +1825:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** + 4934 .loc 1 1825 7 is_stmt 0 view .LVU1341 + 4935 0046 0168 ldr r1, [r0] +1825:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** + 4936 .loc 1 1825 17 view .LVU1342 + 4937 0048 4B68 ldr r3, [r1, #4] +1825:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** + 4938 .loc 1 1825 23 view .LVU1343 + 4939 004a 1343 orrs r3, r2 + 4940 004c 4B60 str r3, [r1, #4] +1828:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** + 4941 .loc 1 1828 3 is_stmt 1 view .LVU1344 + 4942 004e 0268 ldr r2, [r0] + 4943 .LVL391: +1828:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** + 4944 .loc 1 1828 3 is_stmt 0 view .LVU1345 + 4945 0050 D368 ldr r3, [r2, #12] + 4946 0052 2021 movs r1, #32 + 4947 0054 8B43 bics r3, r1 + 4948 0056 D360 str r3, [r2, #12] +1831:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** + 4949 .loc 1 1831 3 is_stmt 1 view .LVU1346 + 4950 0058 0268 ldr r2, [r0] + 4951 005a D368 ldr r3, [r2, #12] + 4952 005c 0449 ldr r1, .L354 + 4953 005e 0B40 ands r3, r1 + 4954 0060 D360 str r3, [r2, #12] + ARM GAS /tmp/ccUWVJFr.s page 152 + + +1833:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** + 4955 .loc 1 1833 3 view .LVU1347 +1833:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** + 4956 .loc 1 1833 3 view .LVU1348 + 4957 0062 3C23 movs r3, #60 + 4958 0064 0022 movs r2, #0 + 4959 0066 C254 strb r2, [r0, r3] +1833:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** + 4960 .loc 1 1833 3 view .LVU1349 +1835:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** } + 4961 .loc 1 1835 3 view .LVU1350 +1835:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** } + 4962 .loc 1 1835 10 is_stmt 0 view .LVU1351 + 4963 0068 0020 movs r0, #0 + 4964 .LVL392: + 4965 .L350: +1836:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** + 4966 .loc 1 1836 1 view .LVU1352 + 4967 @ sp needed + 4968 006a 30BD pop {r4, r5, pc} + 4969 .LVL393: + 4970 .L353: +1811:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** + 4971 .loc 1 1811 3 discriminator 1 view .LVU1353 + 4972 006c 0220 movs r0, #2 + 4973 .LVL394: +1811:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** + 4974 .loc 1 1811 3 discriminator 1 view .LVU1354 + 4975 006e FCE7 b .L350 + 4976 .L355: + 4977 .align 2 + 4978 .L354: + 4979 0070 FFDFFFFF .word -8193 + 4980 .cfi_endproc + 4981 .LFE66: + 4983 .section .text.HAL_TIMEx_ConfigCommutEvent_IT,"ax",%progbits + 4984 .align 1 + 4985 .global HAL_TIMEx_ConfigCommutEvent_IT + 4986 .syntax unified + 4987 .code 16 + 4988 .thumb_func + 4990 HAL_TIMEx_ConfigCommutEvent_IT: + 4991 .LVL395: + 4992 .LFB67: +1862:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** /* Check the parameters */ + 4993 .loc 1 1862 1 is_stmt 1 view -0 + 4994 .cfi_startproc + 4995 @ args = 0, pretend = 0, frame = 0 + 4996 @ frame_needed = 0, uses_anonymous_args = 0 +1862:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** /* Check the parameters */ + 4997 .loc 1 1862 1 is_stmt 0 view .LVU1356 + 4998 0000 30B5 push {r4, r5, lr} + 4999 .cfi_def_cfa_offset 12 + 5000 .cfi_offset 4, -12 + 5001 .cfi_offset 5, -8 + 5002 .cfi_offset 14, -4 +1864:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** assert_param(IS_TIM_INTERNAL_TRIGGEREVENT_SELECTION(InputTrigger)); + ARM GAS /tmp/ccUWVJFr.s page 153 + + + 5003 .loc 1 1864 3 is_stmt 1 view .LVU1357 +1865:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** + 5004 .loc 1 1865 3 view .LVU1358 +1867:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** + 5005 .loc 1 1867 3 view .LVU1359 +1867:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** + 5006 .loc 1 1867 3 view .LVU1360 + 5007 0002 3C23 movs r3, #60 + 5008 0004 C35C ldrb r3, [r0, r3] + 5009 0006 012B cmp r3, #1 + 5010 0008 30D0 beq .L360 +1867:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** + 5011 .loc 1 1867 3 discriminator 2 view .LVU1361 + 5012 000a 3C23 movs r3, #60 + 5013 000c 0124 movs r4, #1 + 5014 000e C454 strb r4, [r0, r3] +1867:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** + 5015 .loc 1 1867 3 discriminator 2 view .LVU1362 +1869:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** (InputTrigger == TIM_TS_ITR2) || (InputTrigger == TIM_TS_ITR3)) + 5016 .loc 1 1869 3 view .LVU1363 +1869:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** (InputTrigger == TIM_TS_ITR2) || (InputTrigger == TIM_TS_ITR3)) + 5017 .loc 1 1869 6 is_stmt 0 view .LVU1364 + 5018 0010 0029 cmp r1, #0 + 5019 0012 05D0 beq .L358 +1869:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** (InputTrigger == TIM_TS_ITR2) || (InputTrigger == TIM_TS_ITR3)) + 5020 .loc 1 1869 37 discriminator 1 view .LVU1365 + 5021 0014 1029 cmp r1, #16 + 5022 0016 03D0 beq .L358 +1869:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** (InputTrigger == TIM_TS_ITR2) || (InputTrigger == TIM_TS_ITR3)) + 5023 .loc 1 1869 70 discriminator 2 view .LVU1366 + 5024 0018 2029 cmp r1, #32 + 5025 001a 01D0 beq .L358 +1870:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** { + 5026 .loc 1 1870 37 view .LVU1367 + 5027 001c 3029 cmp r1, #48 + 5028 001e 08D1 bne .L359 + 5029 .L358: +1873:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** htim->Instance->SMCR |= InputTrigger; + 5030 .loc 1 1873 5 is_stmt 1 view .LVU1368 +1873:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** htim->Instance->SMCR |= InputTrigger; + 5031 .loc 1 1873 9 is_stmt 0 view .LVU1369 + 5032 0020 0468 ldr r4, [r0] +1873:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** htim->Instance->SMCR |= InputTrigger; + 5033 .loc 1 1873 19 view .LVU1370 + 5034 0022 A368 ldr r3, [r4, #8] +1873:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** htim->Instance->SMCR |= InputTrigger; + 5035 .loc 1 1873 26 view .LVU1371 + 5036 0024 7025 movs r5, #112 + 5037 0026 AB43 bics r3, r5 + 5038 0028 A360 str r3, [r4, #8] +1874:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** } + 5039 .loc 1 1874 5 is_stmt 1 view .LVU1372 +1874:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** } + 5040 .loc 1 1874 9 is_stmt 0 view .LVU1373 + 5041 002a 0468 ldr r4, [r0] +1874:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** } + 5042 .loc 1 1874 19 view .LVU1374 + ARM GAS /tmp/ccUWVJFr.s page 154 + + + 5043 002c A368 ldr r3, [r4, #8] +1874:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** } + 5044 .loc 1 1874 26 view .LVU1375 + 5045 002e 0B43 orrs r3, r1 + 5046 0030 A360 str r3, [r4, #8] + 5047 .L359: +1878:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** /* Select the Commutation event source */ + 5048 .loc 1 1878 3 is_stmt 1 view .LVU1376 +1878:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** /* Select the Commutation event source */ + 5049 .loc 1 1878 7 is_stmt 0 view .LVU1377 + 5050 0032 0168 ldr r1, [r0] + 5051 .LVL396: +1878:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** /* Select the Commutation event source */ + 5052 .loc 1 1878 17 view .LVU1378 + 5053 0034 4B68 ldr r3, [r1, #4] +1878:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** /* Select the Commutation event source */ + 5054 .loc 1 1878 23 view .LVU1379 + 5055 0036 0124 movs r4, #1 + 5056 0038 2343 orrs r3, r4 + 5057 003a 4B60 str r3, [r1, #4] +1880:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** htim->Instance->CR2 |= CommutationSource; + 5058 .loc 1 1880 3 is_stmt 1 view .LVU1380 +1880:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** htim->Instance->CR2 |= CommutationSource; + 5059 .loc 1 1880 7 is_stmt 0 view .LVU1381 + 5060 003c 0168 ldr r1, [r0] +1880:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** htim->Instance->CR2 |= CommutationSource; + 5061 .loc 1 1880 17 view .LVU1382 + 5062 003e 4B68 ldr r3, [r1, #4] +1880:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** htim->Instance->CR2 |= CommutationSource; + 5063 .loc 1 1880 23 view .LVU1383 + 5064 0040 0334 adds r4, r4, #3 + 5065 0042 A343 bics r3, r4 + 5066 0044 4B60 str r3, [r1, #4] +1881:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** + 5067 .loc 1 1881 3 is_stmt 1 view .LVU1384 +1881:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** + 5068 .loc 1 1881 7 is_stmt 0 view .LVU1385 + 5069 0046 0168 ldr r1, [r0] +1881:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** + 5070 .loc 1 1881 17 view .LVU1386 + 5071 0048 4B68 ldr r3, [r1, #4] +1881:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** + 5072 .loc 1 1881 23 view .LVU1387 + 5073 004a 1343 orrs r3, r2 + 5074 004c 4B60 str r3, [r1, #4] +1884:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** + 5075 .loc 1 1884 3 is_stmt 1 view .LVU1388 + 5076 004e 0268 ldr r2, [r0] + 5077 .LVL397: +1884:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** + 5078 .loc 1 1884 3 is_stmt 0 view .LVU1389 + 5079 0050 D368 ldr r3, [r2, #12] + 5080 0052 0749 ldr r1, .L361 + 5081 0054 0B40 ands r3, r1 + 5082 0056 D360 str r3, [r2, #12] +1887:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** + 5083 .loc 1 1887 3 is_stmt 1 view .LVU1390 + ARM GAS /tmp/ccUWVJFr.s page 155 + + + 5084 0058 0268 ldr r2, [r0] + 5085 005a D368 ldr r3, [r2, #12] + 5086 005c 2021 movs r1, #32 + 5087 005e 0B43 orrs r3, r1 + 5088 0060 D360 str r3, [r2, #12] +1889:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** + 5089 .loc 1 1889 3 view .LVU1391 +1889:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** + 5090 .loc 1 1889 3 view .LVU1392 + 5091 0062 3C23 movs r3, #60 + 5092 0064 0022 movs r2, #0 + 5093 0066 C254 strb r2, [r0, r3] +1889:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** + 5094 .loc 1 1889 3 view .LVU1393 +1891:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** } + 5095 .loc 1 1891 3 view .LVU1394 +1891:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** } + 5096 .loc 1 1891 10 is_stmt 0 view .LVU1395 + 5097 0068 0020 movs r0, #0 + 5098 .LVL398: + 5099 .L357: +1892:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** + 5100 .loc 1 1892 1 view .LVU1396 + 5101 @ sp needed + 5102 006a 30BD pop {r4, r5, pc} + 5103 .LVL399: + 5104 .L360: +1867:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** + 5105 .loc 1 1867 3 discriminator 1 view .LVU1397 + 5106 006c 0220 movs r0, #2 + 5107 .LVL400: +1867:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** + 5108 .loc 1 1867 3 discriminator 1 view .LVU1398 + 5109 006e FCE7 b .L357 + 5110 .L362: + 5111 .align 2 + 5112 .L361: + 5113 0070 FFDFFFFF .word -8193 + 5114 .cfi_endproc + 5115 .LFE67: + 5117 .section .text.HAL_TIMEx_ConfigCommutEvent_DMA,"ax",%progbits + 5118 .align 1 + 5119 .global HAL_TIMEx_ConfigCommutEvent_DMA + 5120 .syntax unified + 5121 .code 16 + 5122 .thumb_func + 5124 HAL_TIMEx_ConfigCommutEvent_DMA: + 5125 .LVL401: + 5126 .LFB68: +1919:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** /* Check the parameters */ + 5127 .loc 1 1919 1 is_stmt 1 view -0 + 5128 .cfi_startproc + 5129 @ args = 0, pretend = 0, frame = 0 + 5130 @ frame_needed = 0, uses_anonymous_args = 0 +1919:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** /* Check the parameters */ + 5131 .loc 1 1919 1 is_stmt 0 view .LVU1400 + 5132 0000 30B5 push {r4, r5, lr} + ARM GAS /tmp/ccUWVJFr.s page 156 + + + 5133 .cfi_def_cfa_offset 12 + 5134 .cfi_offset 4, -12 + 5135 .cfi_offset 5, -8 + 5136 .cfi_offset 14, -4 +1921:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** assert_param(IS_TIM_INTERNAL_TRIGGEREVENT_SELECTION(InputTrigger)); + 5137 .loc 1 1921 3 is_stmt 1 view .LVU1401 +1922:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** + 5138 .loc 1 1922 3 view .LVU1402 +1924:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** + 5139 .loc 1 1924 3 view .LVU1403 +1924:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** + 5140 .loc 1 1924 3 view .LVU1404 + 5141 0002 3C23 movs r3, #60 + 5142 0004 C35C ldrb r3, [r0, r3] + 5143 0006 012B cmp r3, #1 + 5144 0008 3AD0 beq .L367 +1924:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** + 5145 .loc 1 1924 3 discriminator 2 view .LVU1405 + 5146 000a 3C23 movs r3, #60 + 5147 000c 0124 movs r4, #1 + 5148 000e C454 strb r4, [r0, r3] +1924:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** + 5149 .loc 1 1924 3 discriminator 2 view .LVU1406 +1926:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** (InputTrigger == TIM_TS_ITR2) || (InputTrigger == TIM_TS_ITR3)) + 5150 .loc 1 1926 3 view .LVU1407 +1926:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** (InputTrigger == TIM_TS_ITR2) || (InputTrigger == TIM_TS_ITR3)) + 5151 .loc 1 1926 6 is_stmt 0 view .LVU1408 + 5152 0010 0029 cmp r1, #0 + 5153 0012 05D0 beq .L365 +1926:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** (InputTrigger == TIM_TS_ITR2) || (InputTrigger == TIM_TS_ITR3)) + 5154 .loc 1 1926 37 discriminator 1 view .LVU1409 + 5155 0014 1029 cmp r1, #16 + 5156 0016 03D0 beq .L365 +1926:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** (InputTrigger == TIM_TS_ITR2) || (InputTrigger == TIM_TS_ITR3)) + 5157 .loc 1 1926 70 discriminator 2 view .LVU1410 + 5158 0018 2029 cmp r1, #32 + 5159 001a 01D0 beq .L365 +1927:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** { + 5160 .loc 1 1927 37 view .LVU1411 + 5161 001c 3029 cmp r1, #48 + 5162 001e 08D1 bne .L366 + 5163 .L365: +1930:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** htim->Instance->SMCR |= InputTrigger; + 5164 .loc 1 1930 5 is_stmt 1 view .LVU1412 +1930:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** htim->Instance->SMCR |= InputTrigger; + 5165 .loc 1 1930 9 is_stmt 0 view .LVU1413 + 5166 0020 0468 ldr r4, [r0] +1930:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** htim->Instance->SMCR |= InputTrigger; + 5167 .loc 1 1930 19 view .LVU1414 + 5168 0022 A368 ldr r3, [r4, #8] +1930:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** htim->Instance->SMCR |= InputTrigger; + 5169 .loc 1 1930 26 view .LVU1415 + 5170 0024 7025 movs r5, #112 + 5171 0026 AB43 bics r3, r5 + 5172 0028 A360 str r3, [r4, #8] +1931:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** } + 5173 .loc 1 1931 5 is_stmt 1 view .LVU1416 + ARM GAS /tmp/ccUWVJFr.s page 157 + + +1931:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** } + 5174 .loc 1 1931 9 is_stmt 0 view .LVU1417 + 5175 002a 0468 ldr r4, [r0] +1931:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** } + 5176 .loc 1 1931 19 view .LVU1418 + 5177 002c A368 ldr r3, [r4, #8] +1931:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** } + 5178 .loc 1 1931 26 view .LVU1419 + 5179 002e 0B43 orrs r3, r1 + 5180 0030 A360 str r3, [r4, #8] + 5181 .L366: +1935:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** /* Select the Commutation event source */ + 5182 .loc 1 1935 3 is_stmt 1 view .LVU1420 +1935:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** /* Select the Commutation event source */ + 5183 .loc 1 1935 7 is_stmt 0 view .LVU1421 + 5184 0032 0168 ldr r1, [r0] + 5185 .LVL402: +1935:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** /* Select the Commutation event source */ + 5186 .loc 1 1935 17 view .LVU1422 + 5187 0034 4B68 ldr r3, [r1, #4] +1935:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** /* Select the Commutation event source */ + 5188 .loc 1 1935 23 view .LVU1423 + 5189 0036 0124 movs r4, #1 + 5190 0038 2343 orrs r3, r4 + 5191 003a 4B60 str r3, [r1, #4] +1937:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** htim->Instance->CR2 |= CommutationSource; + 5192 .loc 1 1937 3 is_stmt 1 view .LVU1424 +1937:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** htim->Instance->CR2 |= CommutationSource; + 5193 .loc 1 1937 7 is_stmt 0 view .LVU1425 + 5194 003c 0168 ldr r1, [r0] +1937:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** htim->Instance->CR2 |= CommutationSource; + 5195 .loc 1 1937 17 view .LVU1426 + 5196 003e 4B68 ldr r3, [r1, #4] +1937:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** htim->Instance->CR2 |= CommutationSource; + 5197 .loc 1 1937 23 view .LVU1427 + 5198 0040 0334 adds r4, r4, #3 + 5199 0042 A343 bics r3, r4 + 5200 0044 4B60 str r3, [r1, #4] +1938:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** + 5201 .loc 1 1938 3 is_stmt 1 view .LVU1428 +1938:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** + 5202 .loc 1 1938 7 is_stmt 0 view .LVU1429 + 5203 0046 0168 ldr r1, [r0] +1938:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** + 5204 .loc 1 1938 17 view .LVU1430 + 5205 0048 4B68 ldr r3, [r1, #4] +1938:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** + 5206 .loc 1 1938 23 view .LVU1431 + 5207 004a 1343 orrs r3, r2 + 5208 004c 4B60 str r3, [r1, #4] +1942:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** htim->hdma[TIM_DMA_ID_COMMUTATION]->XferHalfCpltCallback = TIMEx_DMACommutationHalfCplt; + 5209 .loc 1 1942 3 is_stmt 1 view .LVU1432 +1942:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** htim->hdma[TIM_DMA_ID_COMMUTATION]->XferHalfCpltCallback = TIMEx_DMACommutationHalfCplt; + 5210 .loc 1 1942 13 is_stmt 0 view .LVU1433 + 5211 004e 436B ldr r3, [r0, #52] +1942:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** htim->hdma[TIM_DMA_ID_COMMUTATION]->XferHalfCpltCallback = TIMEx_DMACommutationHalfCplt; + 5212 .loc 1 1942 56 view .LVU1434 + ARM GAS /tmp/ccUWVJFr.s page 158 + + + 5213 0050 0C4A ldr r2, .L368 + 5214 .LVL403: +1942:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** htim->hdma[TIM_DMA_ID_COMMUTATION]->XferHalfCpltCallback = TIMEx_DMACommutationHalfCplt; + 5215 .loc 1 1942 56 view .LVU1435 + 5216 0052 9A62 str r2, [r3, #40] +1943:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** /* Set the DMA error callback */ + 5217 .loc 1 1943 3 is_stmt 1 view .LVU1436 +1943:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** /* Set the DMA error callback */ + 5218 .loc 1 1943 13 is_stmt 0 view .LVU1437 + 5219 0054 436B ldr r3, [r0, #52] +1943:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** /* Set the DMA error callback */ + 5220 .loc 1 1943 60 view .LVU1438 + 5221 0056 0C4A ldr r2, .L368+4 + 5222 0058 DA62 str r2, [r3, #44] +1945:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** + 5223 .loc 1 1945 3 is_stmt 1 view .LVU1439 +1945:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** + 5224 .loc 1 1945 13 is_stmt 0 view .LVU1440 + 5225 005a 436B ldr r3, [r0, #52] +1945:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** + 5226 .loc 1 1945 57 view .LVU1441 + 5227 005c 0B4A ldr r2, .L368+8 + 5228 005e 1A63 str r2, [r3, #48] +1948:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** + 5229 .loc 1 1948 3 is_stmt 1 view .LVU1442 + 5230 0060 0268 ldr r2, [r0] + 5231 0062 D368 ldr r3, [r2, #12] + 5232 0064 2021 movs r1, #32 + 5233 0066 8B43 bics r3, r1 + 5234 0068 D360 str r3, [r2, #12] +1951:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** + 5235 .loc 1 1951 3 view .LVU1443 + 5236 006a 0268 ldr r2, [r0] + 5237 006c D168 ldr r1, [r2, #12] + 5238 006e 8023 movs r3, #128 + 5239 0070 9B01 lsls r3, r3, #6 + 5240 0072 0B43 orrs r3, r1 + 5241 0074 D360 str r3, [r2, #12] +1953:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** + 5242 .loc 1 1953 3 view .LVU1444 +1953:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** + 5243 .loc 1 1953 3 view .LVU1445 + 5244 0076 3C23 movs r3, #60 + 5245 0078 0022 movs r2, #0 + 5246 007a C254 strb r2, [r0, r3] +1953:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** + 5247 .loc 1 1953 3 view .LVU1446 +1955:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** } + 5248 .loc 1 1955 3 view .LVU1447 +1955:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** } + 5249 .loc 1 1955 10 is_stmt 0 view .LVU1448 + 5250 007c 0020 movs r0, #0 + 5251 .LVL404: + 5252 .L364: +1956:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** + 5253 .loc 1 1956 1 view .LVU1449 + 5254 @ sp needed + ARM GAS /tmp/ccUWVJFr.s page 159 + + + 5255 007e 30BD pop {r4, r5, pc} + 5256 .LVL405: + 5257 .L367: +1924:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** + 5258 .loc 1 1924 3 discriminator 1 view .LVU1450 + 5259 0080 0220 movs r0, #2 + 5260 .LVL406: +1924:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** + 5261 .loc 1 1924 3 discriminator 1 view .LVU1451 + 5262 0082 FCE7 b .L364 + 5263 .L369: + 5264 .align 2 + 5265 .L368: + 5266 0084 00000000 .word TIMEx_DMACommutationCplt + 5267 0088 00000000 .word TIMEx_DMACommutationHalfCplt + 5268 008c 00000000 .word TIM_DMAError + 5269 .cfi_endproc + 5270 .LFE68: + 5272 .section .text.HAL_TIMEx_MasterConfigSynchronization,"ax",%progbits + 5273 .align 1 + 5274 .global HAL_TIMEx_MasterConfigSynchronization + 5275 .syntax unified + 5276 .code 16 + 5277 .thumb_func + 5279 HAL_TIMEx_MasterConfigSynchronization: + 5280 .LVL407: + 5281 .LFB69: +1968:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** uint32_t tmpcr2; + 5282 .loc 1 1968 1 is_stmt 1 view -0 + 5283 .cfi_startproc + 5284 @ args = 0, pretend = 0, frame = 0 + 5285 @ frame_needed = 0, uses_anonymous_args = 0 +1968:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** uint32_t tmpcr2; + 5286 .loc 1 1968 1 is_stmt 0 view .LVU1453 + 5287 0000 30B5 push {r4, r5, lr} + 5288 .cfi_def_cfa_offset 12 + 5289 .cfi_offset 4, -12 + 5290 .cfi_offset 5, -8 + 5291 .cfi_offset 14, -4 +1969:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** uint32_t tmpsmcr; + 5292 .loc 1 1969 3 is_stmt 1 view .LVU1454 +1970:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** + 5293 .loc 1 1970 3 view .LVU1455 +1973:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** assert_param(IS_TIM_TRGO_SOURCE(sMasterConfig->MasterOutputTrigger)); + 5294 .loc 1 1973 3 view .LVU1456 +1974:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** assert_param(IS_TIM_MSM_STATE(sMasterConfig->MasterSlaveMode)); + 5295 .loc 1 1974 3 view .LVU1457 +1975:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** + 5296 .loc 1 1975 3 view .LVU1458 +1978:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** + 5297 .loc 1 1978 3 view .LVU1459 +1978:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** + 5298 .loc 1 1978 3 view .LVU1460 + 5299 0002 3C23 movs r3, #60 + 5300 0004 C35C ldrb r3, [r0, r3] + 5301 0006 012B cmp r3, #1 + 5302 0008 25D0 beq .L374 + ARM GAS /tmp/ccUWVJFr.s page 160 + + +1978:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** + 5303 .loc 1 1978 3 discriminator 2 view .LVU1461 + 5304 000a 3C23 movs r3, #60 + 5305 000c 0122 movs r2, #1 + 5306 000e C254 strb r2, [r0, r3] +1978:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** + 5307 .loc 1 1978 3 discriminator 2 view .LVU1462 +1981:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** + 5308 .loc 1 1981 3 view .LVU1463 +1981:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** + 5309 .loc 1 1981 15 is_stmt 0 view .LVU1464 + 5310 0010 0133 adds r3, r3, #1 + 5311 0012 0132 adds r2, r2, #1 + 5312 0014 C254 strb r2, [r0, r3] +1984:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** + 5313 .loc 1 1984 3 is_stmt 1 view .LVU1465 +1984:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** + 5314 .loc 1 1984 16 is_stmt 0 view .LVU1466 + 5315 0016 0368 ldr r3, [r0] +1984:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** + 5316 .loc 1 1984 10 view .LVU1467 + 5317 0018 5C68 ldr r4, [r3, #4] + 5318 .LVL408: +1987:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** + 5319 .loc 1 1987 3 is_stmt 1 view .LVU1468 +1987:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** + 5320 .loc 1 1987 11 is_stmt 0 view .LVU1469 + 5321 001a 9D68 ldr r5, [r3, #8] + 5322 .LVL409: +1990:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** /* Select the TRGO source */ + 5323 .loc 1 1990 3 is_stmt 1 view .LVU1470 +1990:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** /* Select the TRGO source */ + 5324 .loc 1 1990 10 is_stmt 0 view .LVU1471 + 5325 001c 6E32 adds r2, r2, #110 + 5326 001e 9443 bics r4, r2 + 5327 .LVL410: +1992:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** + 5328 .loc 1 1992 3 is_stmt 1 view .LVU1472 +1992:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** + 5329 .loc 1 1992 27 is_stmt 0 view .LVU1473 + 5330 0020 0A68 ldr r2, [r1] +1992:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** + 5331 .loc 1 1992 10 view .LVU1474 + 5332 0022 2243 orrs r2, r4 + 5333 .LVL411: +1995:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** + 5334 .loc 1 1995 3 is_stmt 1 view .LVU1475 +1995:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** + 5335 .loc 1 1995 23 is_stmt 0 view .LVU1476 + 5336 0024 5A60 str r2, [r3, #4] +1997:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** { + 5337 .loc 1 1997 3 is_stmt 1 view .LVU1477 +1997:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** { + 5338 .loc 1 1997 7 is_stmt 0 view .LVU1478 + 5339 0026 0368 ldr r3, [r0] +1997:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** { + 5340 .loc 1 1997 6 view .LVU1479 + ARM GAS /tmp/ccUWVJFr.s page 161 + + + 5341 0028 0C4A ldr r2, .L375 + 5342 .LVL412: +1997:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** { + 5343 .loc 1 1997 6 view .LVU1480 + 5344 002a 9342 cmp r3, r2 + 5345 002c 06D0 beq .L372 +1997:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** { + 5346 .loc 1 1997 7 discriminator 1 view .LVU1481 + 5347 002e 8022 movs r2, #128 + 5348 0030 D205 lsls r2, r2, #23 + 5349 0032 9342 cmp r3, r2 + 5350 0034 02D0 beq .L372 +1997:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** { + 5351 .loc 1 1997 7 discriminator 2 view .LVU1482 + 5352 0036 0A4A ldr r2, .L375+4 + 5353 0038 9342 cmp r3, r2 + 5354 003a 04D1 bne .L373 + 5355 .L372: +2000:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** /* Set master mode */ + 5356 .loc 1 2000 5 is_stmt 1 view .LVU1483 +2000:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** /* Set master mode */ + 5357 .loc 1 2000 13 is_stmt 0 view .LVU1484 + 5358 003c 8022 movs r2, #128 + 5359 003e 9543 bics r5, r2 + 5360 .LVL413: +2002:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** + 5361 .loc 1 2002 5 is_stmt 1 view .LVU1485 +2002:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** + 5362 .loc 1 2002 29 is_stmt 0 view .LVU1486 + 5363 0040 4A68 ldr r2, [r1, #4] +2002:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** + 5364 .loc 1 2002 13 view .LVU1487 + 5365 0042 2A43 orrs r2, r5 + 5366 .LVL414: +2005:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** } + 5367 .loc 1 2005 5 is_stmt 1 view .LVU1488 +2005:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** } + 5368 .loc 1 2005 26 is_stmt 0 view .LVU1489 + 5369 0044 9A60 str r2, [r3, #8] + 5370 .LVL415: + 5371 .L373: +2009:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** + 5372 .loc 1 2009 3 is_stmt 1 view .LVU1490 +2009:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** + 5373 .loc 1 2009 15 is_stmt 0 view .LVU1491 + 5374 0046 3D23 movs r3, #61 + 5375 0048 0122 movs r2, #1 + 5376 004a C254 strb r2, [r0, r3] +2011:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** + 5377 .loc 1 2011 3 is_stmt 1 view .LVU1492 +2011:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** + 5378 .loc 1 2011 3 view .LVU1493 + 5379 004c 013B subs r3, r3, #1 + 5380 004e 0022 movs r2, #0 + 5381 0050 C254 strb r2, [r0, r3] +2011:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** + 5382 .loc 1 2011 3 view .LVU1494 + ARM GAS /tmp/ccUWVJFr.s page 162 + + +2013:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** } + 5383 .loc 1 2013 3 view .LVU1495 +2013:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** } + 5384 .loc 1 2013 10 is_stmt 0 view .LVU1496 + 5385 0052 0020 movs r0, #0 + 5386 .LVL416: + 5387 .L371: +2014:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** + 5388 .loc 1 2014 1 view .LVU1497 + 5389 @ sp needed + 5390 0054 30BD pop {r4, r5, pc} + 5391 .LVL417: + 5392 .L374: +1978:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** + 5393 .loc 1 1978 3 discriminator 1 view .LVU1498 + 5394 0056 0220 movs r0, #2 + 5395 .LVL418: +1978:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** + 5396 .loc 1 1978 3 discriminator 1 view .LVU1499 + 5397 0058 FCE7 b .L371 + 5398 .L376: + 5399 005a C046 .align 2 + 5400 .L375: + 5401 005c 002C0140 .word 1073818624 + 5402 0060 00040040 .word 1073742848 + 5403 .cfi_endproc + 5404 .LFE69: + 5406 .section .text.HAL_TIMEx_ConfigBreakDeadTime,"ax",%progbits + 5407 .align 1 + 5408 .global HAL_TIMEx_ConfigBreakDeadTime + 5409 .syntax unified + 5410 .code 16 + 5411 .thumb_func + 5413 HAL_TIMEx_ConfigBreakDeadTime: + 5414 .LVL419: + 5415 .LFB70: +2029:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** /* Keep this variable initialized to 0 as it is used to configure BDTR register */ + 5416 .loc 1 2029 1 is_stmt 1 view -0 + 5417 .cfi_startproc + 5418 @ args = 0, pretend = 0, frame = 0 + 5419 @ frame_needed = 0, uses_anonymous_args = 0 +2029:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** /* Keep this variable initialized to 0 as it is used to configure BDTR register */ + 5420 .loc 1 2029 1 is_stmt 0 view .LVU1501 + 5421 0000 10B5 push {r4, lr} + 5422 .cfi_def_cfa_offset 8 + 5423 .cfi_offset 4, -8 + 5424 .cfi_offset 14, -4 +2031:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** + 5425 .loc 1 2031 3 is_stmt 1 view .LVU1502 + 5426 .LVL420: +2034:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** assert_param(IS_TIM_OSSR_STATE(sBreakDeadTimeConfig->OffStateRunMode)); + 5427 .loc 1 2034 3 view .LVU1503 +2035:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** assert_param(IS_TIM_OSSI_STATE(sBreakDeadTimeConfig->OffStateIDLEMode)); + 5428 .loc 1 2035 3 view .LVU1504 +2036:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** assert_param(IS_TIM_LOCK_LEVEL(sBreakDeadTimeConfig->LockLevel)); + 5429 .loc 1 2036 3 view .LVU1505 +2037:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** assert_param(IS_TIM_DEADTIME(sBreakDeadTimeConfig->DeadTime)); + ARM GAS /tmp/ccUWVJFr.s page 163 + + + 5430 .loc 1 2037 3 view .LVU1506 +2038:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** assert_param(IS_TIM_BREAK_STATE(sBreakDeadTimeConfig->BreakState)); + 5431 .loc 1 2038 3 view .LVU1507 +2039:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** assert_param(IS_TIM_BREAK_POLARITY(sBreakDeadTimeConfig->BreakPolarity)); + 5432 .loc 1 2039 3 view .LVU1508 +2040:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** assert_param(IS_TIM_AUTOMATIC_OUTPUT_STATE(sBreakDeadTimeConfig->AutomaticOutput)); + 5433 .loc 1 2040 3 view .LVU1509 +2041:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** + 5434 .loc 1 2041 3 view .LVU1510 +2044:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** + 5435 .loc 1 2044 3 view .LVU1511 +2044:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** + 5436 .loc 1 2044 3 view .LVU1512 + 5437 0002 3C23 movs r3, #60 + 5438 0004 C35C ldrb r3, [r0, r3] + 5439 0006 012B cmp r3, #1 + 5440 0008 21D0 beq .L379 +2044:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** + 5441 .loc 1 2044 3 discriminator 2 view .LVU1513 + 5442 000a 3C22 movs r2, #60 + 5443 000c 0123 movs r3, #1 + 5444 000e 8354 strb r3, [r0, r2] +2044:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** + 5445 .loc 1 2044 3 discriminator 2 view .LVU1514 +2050:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** MODIFY_REG(tmpbdtr, TIM_BDTR_LOCK, sBreakDeadTimeConfig->LockLevel); + 5446 .loc 1 2050 3 view .LVU1515 + 5447 0010 CB68 ldr r3, [r1, #12] + 5448 .LVL421: +2051:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** MODIFY_REG(tmpbdtr, TIM_BDTR_OSSI, sBreakDeadTimeConfig->OffStateIDLEMode); + 5449 .loc 1 2051 3 view .LVU1516 + 5450 0012 104C ldr r4, .L380 + 5451 0014 2340 ands r3, r4 + 5452 .LVL422: +2051:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** MODIFY_REG(tmpbdtr, TIM_BDTR_OSSI, sBreakDeadTimeConfig->OffStateIDLEMode); + 5453 .loc 1 2051 3 is_stmt 0 view .LVU1517 + 5454 0016 8C68 ldr r4, [r1, #8] + 5455 0018 2343 orrs r3, r4 + 5456 .LVL423: +2052:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** MODIFY_REG(tmpbdtr, TIM_BDTR_OSSR, sBreakDeadTimeConfig->OffStateRunMode); + 5457 .loc 1 2052 3 is_stmt 1 view .LVU1518 + 5458 001a 0F4C ldr r4, .L380+4 + 5459 001c 2340 ands r3, r4 + 5460 .LVL424: +2052:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** MODIFY_REG(tmpbdtr, TIM_BDTR_OSSR, sBreakDeadTimeConfig->OffStateRunMode); + 5461 .loc 1 2052 3 is_stmt 0 view .LVU1519 + 5462 001e 4C68 ldr r4, [r1, #4] + 5463 0020 2343 orrs r3, r4 + 5464 .LVL425: +2053:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** MODIFY_REG(tmpbdtr, TIM_BDTR_BKE, sBreakDeadTimeConfig->BreakState); + 5465 .loc 1 2053 3 is_stmt 1 view .LVU1520 + 5466 0022 0E4C ldr r4, .L380+8 + 5467 0024 2340 ands r3, r4 + 5468 .LVL426: +2053:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** MODIFY_REG(tmpbdtr, TIM_BDTR_BKE, sBreakDeadTimeConfig->BreakState); + 5469 .loc 1 2053 3 is_stmt 0 view .LVU1521 + 5470 0026 0C68 ldr r4, [r1] + 5471 0028 2343 orrs r3, r4 + ARM GAS /tmp/ccUWVJFr.s page 164 + + + 5472 .LVL427: +2054:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** MODIFY_REG(tmpbdtr, TIM_BDTR_BKP, sBreakDeadTimeConfig->BreakPolarity); + 5473 .loc 1 2054 3 is_stmt 1 view .LVU1522 + 5474 002a 0D4C ldr r4, .L380+12 + 5475 002c 2340 ands r3, r4 + 5476 .LVL428: +2054:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** MODIFY_REG(tmpbdtr, TIM_BDTR_BKP, sBreakDeadTimeConfig->BreakPolarity); + 5477 .loc 1 2054 3 is_stmt 0 view .LVU1523 + 5478 002e 0C69 ldr r4, [r1, #16] + 5479 0030 2343 orrs r3, r4 + 5480 .LVL429: +2055:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** MODIFY_REG(tmpbdtr, TIM_BDTR_AOE, sBreakDeadTimeConfig->AutomaticOutput); + 5481 .loc 1 2055 3 is_stmt 1 view .LVU1524 + 5482 0032 0C4C ldr r4, .L380+16 + 5483 0034 2340 ands r3, r4 + 5484 .LVL430: +2055:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** MODIFY_REG(tmpbdtr, TIM_BDTR_AOE, sBreakDeadTimeConfig->AutomaticOutput); + 5485 .loc 1 2055 3 is_stmt 0 view .LVU1525 + 5486 0036 4C69 ldr r4, [r1, #20] + 5487 0038 2343 orrs r3, r4 + 5488 .LVL431: +2056:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** + 5489 .loc 1 2056 3 is_stmt 1 view .LVU1526 + 5490 003a 0B4C ldr r4, .L380+20 + 5491 003c 2340 ands r3, r4 + 5492 .LVL432: +2056:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** + 5493 .loc 1 2056 3 is_stmt 0 view .LVU1527 + 5494 003e C969 ldr r1, [r1, #28] + 5495 .LVL433: +2056:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** + 5496 .loc 1 2056 3 view .LVU1528 + 5497 0040 0B43 orrs r3, r1 + 5498 .LVL434: +2060:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** + 5499 .loc 1 2060 3 is_stmt 1 view .LVU1529 +2060:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** + 5500 .loc 1 2060 7 is_stmt 0 view .LVU1530 + 5501 0042 0168 ldr r1, [r0] +2060:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** + 5502 .loc 1 2060 24 view .LVU1531 + 5503 0044 4B64 str r3, [r1, #68] +2062:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** + 5504 .loc 1 2062 3 is_stmt 1 view .LVU1532 +2062:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** + 5505 .loc 1 2062 3 view .LVU1533 + 5506 0046 0023 movs r3, #0 + 5507 .LVL435: +2062:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** + 5508 .loc 1 2062 3 is_stmt 0 view .LVU1534 + 5509 0048 8354 strb r3, [r0, r2] + 5510 .LVL436: +2062:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** + 5511 .loc 1 2062 3 is_stmt 1 view .LVU1535 +2064:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** } + 5512 .loc 1 2064 3 view .LVU1536 +2064:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** } + ARM GAS /tmp/ccUWVJFr.s page 165 + + + 5513 .loc 1 2064 10 is_stmt 0 view .LVU1537 + 5514 004a 0020 movs r0, #0 + 5515 .LVL437: + 5516 .L378: +2065:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** + 5517 .loc 1 2065 1 view .LVU1538 + 5518 @ sp needed + 5519 004c 10BD pop {r4, pc} + 5520 .LVL438: + 5521 .L379: +2044:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** + 5522 .loc 1 2044 3 discriminator 1 view .LVU1539 + 5523 004e 0220 movs r0, #2 + 5524 .LVL439: +2044:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** + 5525 .loc 1 2044 3 discriminator 1 view .LVU1540 + 5526 0050 FCE7 b .L378 + 5527 .L381: + 5528 0052 C046 .align 2 + 5529 .L380: + 5530 0054 FFFCFFFF .word -769 + 5531 0058 FFFBFFFF .word -1025 + 5532 005c FFF7FFFF .word -2049 + 5533 0060 FFEFFFFF .word -4097 + 5534 0064 FFDFFFFF .word -8193 + 5535 0068 FFBFFFFF .word -16385 + 5536 .cfi_endproc + 5537 .LFE70: + 5539 .section .text.HAL_TIMEx_RemapConfig,"ax",%progbits + 5540 .align 1 + 5541 .global HAL_TIMEx_RemapConfig + 5542 .syntax unified + 5543 .code 16 + 5544 .thumb_func + 5546 HAL_TIMEx_RemapConfig: + 5547 .LVL440: + 5548 .LFB71: +2080:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** + 5549 .loc 1 2080 1 is_stmt 1 view -0 + 5550 .cfi_startproc + 5551 @ args = 0, pretend = 0, frame = 0 + 5552 @ frame_needed = 0, uses_anonymous_args = 0 + 5553 @ link register save eliminated. +2083:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** + 5554 .loc 1 2083 3 view .LVU1542 +2085:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** + 5555 .loc 1 2085 3 view .LVU1543 +2085:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** + 5556 .loc 1 2085 3 view .LVU1544 + 5557 0000 3C23 movs r3, #60 + 5558 0002 C35C ldrb r3, [r0, r3] + 5559 0004 012B cmp r3, #1 + 5560 0006 08D0 beq .L384 +2085:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** + 5561 .loc 1 2085 3 discriminator 2 view .LVU1545 + 5562 0008 3C23 movs r3, #60 + 5563 000a 0122 movs r2, #1 + ARM GAS /tmp/ccUWVJFr.s page 166 + + + 5564 000c C254 strb r2, [r0, r3] +2085:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** + 5565 .loc 1 2085 3 discriminator 2 view .LVU1546 +2088:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** + 5566 .loc 1 2088 3 view .LVU1547 + 5567 000e 0268 ldr r2, [r0] + 5568 0010 1165 str r1, [r2, #80] +2090:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** + 5569 .loc 1 2090 3 view .LVU1548 +2090:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** + 5570 .loc 1 2090 3 view .LVU1549 + 5571 0012 0022 movs r2, #0 + 5572 0014 C254 strb r2, [r0, r3] +2090:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** + 5573 .loc 1 2090 3 view .LVU1550 +2092:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** } + 5574 .loc 1 2092 3 view .LVU1551 +2092:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** } + 5575 .loc 1 2092 10 is_stmt 0 view .LVU1552 + 5576 0016 0020 movs r0, #0 + 5577 .LVL441: + 5578 .L383: +2093:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** + 5579 .loc 1 2093 1 view .LVU1553 + 5580 @ sp needed + 5581 0018 7047 bx lr + 5582 .LVL442: + 5583 .L384: +2085:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** + 5584 .loc 1 2085 3 discriminator 1 view .LVU1554 + 5585 001a 0220 movs r0, #2 + 5586 .LVL443: +2085:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** + 5587 .loc 1 2085 3 discriminator 1 view .LVU1555 + 5588 001c FCE7 b .L383 + 5589 .cfi_endproc + 5590 .LFE71: + 5592 .section .text.HAL_TIMEx_CommutCallback,"ax",%progbits + 5593 .align 1 + 5594 .weak HAL_TIMEx_CommutCallback + 5595 .syntax unified + 5596 .code 16 + 5597 .thumb_func + 5599 HAL_TIMEx_CommutCallback: + 5600 .LVL444: + 5601 .LFB72: +2121:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** /* Prevent unused argument(s) compilation warning */ + 5602 .loc 1 2121 1 is_stmt 1 view -0 + 5603 .cfi_startproc + 5604 @ args = 0, pretend = 0, frame = 0 + 5605 @ frame_needed = 0, uses_anonymous_args = 0 + 5606 @ link register save eliminated. +2123:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** + 5607 .loc 1 2123 3 view .LVU1557 +2128:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** /** + 5608 .loc 1 2128 1 is_stmt 0 view .LVU1558 + 5609 @ sp needed + ARM GAS /tmp/ccUWVJFr.s page 167 + + + 5610 0000 7047 bx lr + 5611 .cfi_endproc + 5612 .LFE72: + 5614 .section .text.TIMEx_DMACommutationCplt,"ax",%progbits + 5615 .align 1 + 5616 .global TIMEx_DMACommutationCplt + 5617 .syntax unified + 5618 .code 16 + 5619 .thumb_func + 5621 TIMEx_DMACommutationCplt: + 5622 .LVL445: + 5623 .LFB77: +2227:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** TIM_HandleTypeDef *htim = (TIM_HandleTypeDef *)((DMA_HandleTypeDef *)hdma)->Parent; + 5624 .loc 1 2227 1 is_stmt 1 view -0 + 5625 .cfi_startproc + 5626 @ args = 0, pretend = 0, frame = 0 + 5627 @ frame_needed = 0, uses_anonymous_args = 0 +2227:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** TIM_HandleTypeDef *htim = (TIM_HandleTypeDef *)((DMA_HandleTypeDef *)hdma)->Parent; + 5628 .loc 1 2227 1 is_stmt 0 view .LVU1560 + 5629 0000 10B5 push {r4, lr} + 5630 .cfi_def_cfa_offset 8 + 5631 .cfi_offset 4, -8 + 5632 .cfi_offset 14, -4 +2228:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** + 5633 .loc 1 2228 3 is_stmt 1 view .LVU1561 +2228:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** + 5634 .loc 1 2228 22 is_stmt 0 view .LVU1562 + 5635 0002 406A ldr r0, [r0, #36] + 5636 .LVL446: +2231:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** + 5637 .loc 1 2231 3 is_stmt 1 view .LVU1563 +2231:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** + 5638 .loc 1 2231 15 is_stmt 0 view .LVU1564 + 5639 0004 3D23 movs r3, #61 + 5640 0006 0122 movs r2, #1 + 5641 0008 C254 strb r2, [r0, r3] +2236:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** #endif /* USE_HAL_TIM_REGISTER_CALLBACKS */ + 5642 .loc 1 2236 3 is_stmt 1 view .LVU1565 + 5643 000a FFF7FEFF bl HAL_TIMEx_CommutCallback + 5644 .LVL447: +2238:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** + 5645 .loc 1 2238 1 is_stmt 0 view .LVU1566 + 5646 @ sp needed + 5647 000e 10BD pop {r4, pc} + 5648 .cfi_endproc + 5649 .LFE77: + 5651 .section .text.HAL_TIMEx_CommutHalfCpltCallback,"ax",%progbits + 5652 .align 1 + 5653 .weak HAL_TIMEx_CommutHalfCpltCallback + 5654 .syntax unified + 5655 .code 16 + 5656 .thumb_func + 5658 HAL_TIMEx_CommutHalfCpltCallback: + 5659 .LVL448: + 5660 .LFB73: +2135:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** /* Prevent unused argument(s) compilation warning */ + 5661 .loc 1 2135 1 is_stmt 1 view -0 + ARM GAS /tmp/ccUWVJFr.s page 168 + + + 5662 .cfi_startproc + 5663 @ args = 0, pretend = 0, frame = 0 + 5664 @ frame_needed = 0, uses_anonymous_args = 0 + 5665 @ link register save eliminated. +2137:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** + 5666 .loc 1 2137 3 view .LVU1568 +2142:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** + 5667 .loc 1 2142 1 is_stmt 0 view .LVU1569 + 5668 @ sp needed + 5669 0000 7047 bx lr + 5670 .cfi_endproc + 5671 .LFE73: + 5673 .section .text.TIMEx_DMACommutationHalfCplt,"ax",%progbits + 5674 .align 1 + 5675 .global TIMEx_DMACommutationHalfCplt + 5676 .syntax unified + 5677 .code 16 + 5678 .thumb_func + 5680 TIMEx_DMACommutationHalfCplt: + 5681 .LVL449: + 5682 .LFB78: +2246:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** TIM_HandleTypeDef *htim = (TIM_HandleTypeDef *)((DMA_HandleTypeDef *)hdma)->Parent; + 5683 .loc 1 2246 1 is_stmt 1 view -0 + 5684 .cfi_startproc + 5685 @ args = 0, pretend = 0, frame = 0 + 5686 @ frame_needed = 0, uses_anonymous_args = 0 +2246:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** TIM_HandleTypeDef *htim = (TIM_HandleTypeDef *)((DMA_HandleTypeDef *)hdma)->Parent; + 5687 .loc 1 2246 1 is_stmt 0 view .LVU1571 + 5688 0000 10B5 push {r4, lr} + 5689 .cfi_def_cfa_offset 8 + 5690 .cfi_offset 4, -8 + 5691 .cfi_offset 14, -4 +2247:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** + 5692 .loc 1 2247 3 is_stmt 1 view .LVU1572 +2247:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** + 5693 .loc 1 2247 22 is_stmt 0 view .LVU1573 + 5694 0002 406A ldr r0, [r0, #36] + 5695 .LVL450: +2250:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** + 5696 .loc 1 2250 3 is_stmt 1 view .LVU1574 +2250:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** + 5697 .loc 1 2250 15 is_stmt 0 view .LVU1575 + 5698 0004 3D23 movs r3, #61 + 5699 0006 0122 movs r2, #1 + 5700 0008 C254 strb r2, [r0, r3] +2255:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** #endif /* USE_HAL_TIM_REGISTER_CALLBACKS */ + 5701 .loc 1 2255 3 is_stmt 1 view .LVU1576 + 5702 000a FFF7FEFF bl HAL_TIMEx_CommutHalfCpltCallback + 5703 .LVL451: +2257:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** + 5704 .loc 1 2257 1 is_stmt 0 view .LVU1577 + 5705 @ sp needed + 5706 000e 10BD pop {r4, pc} + 5707 .cfi_endproc + 5708 .LFE78: + 5710 .section .text.HAL_TIMEx_BreakCallback,"ax",%progbits + 5711 .align 1 + ARM GAS /tmp/ccUWVJFr.s page 169 + + + 5712 .weak HAL_TIMEx_BreakCallback + 5713 .syntax unified + 5714 .code 16 + 5715 .thumb_func + 5717 HAL_TIMEx_BreakCallback: + 5718 .LVL452: + 5719 .LFB74: +2150:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** /* Prevent unused argument(s) compilation warning */ + 5720 .loc 1 2150 1 is_stmt 1 view -0 + 5721 .cfi_startproc + 5722 @ args = 0, pretend = 0, frame = 0 + 5723 @ frame_needed = 0, uses_anonymous_args = 0 + 5724 @ link register save eliminated. +2152:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** + 5725 .loc 1 2152 3 view .LVU1579 +2157:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** /** + 5726 .loc 1 2157 1 is_stmt 0 view .LVU1580 + 5727 @ sp needed + 5728 0000 7047 bx lr + 5729 .cfi_endproc + 5730 .LFE74: + 5732 .section .text.HAL_TIMEx_HallSensor_GetState,"ax",%progbits + 5733 .align 1 + 5734 .global HAL_TIMEx_HallSensor_GetState + 5735 .syntax unified + 5736 .code 16 + 5737 .thumb_func + 5739 HAL_TIMEx_HallSensor_GetState: + 5740 .LVL453: + 5741 .LFB75: +2183:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** return htim->State; + 5742 .loc 1 2183 1 is_stmt 1 view -0 + 5743 .cfi_startproc + 5744 @ args = 0, pretend = 0, frame = 0 + 5745 @ frame_needed = 0, uses_anonymous_args = 0 + 5746 @ link register save eliminated. +2184:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** } + 5747 .loc 1 2184 3 view .LVU1582 +2184:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** } + 5748 .loc 1 2184 14 is_stmt 0 view .LVU1583 + 5749 0000 3D23 movs r3, #61 + 5750 0002 C05C ldrb r0, [r0, r3] + 5751 .LVL454: +2184:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** } + 5752 .loc 1 2184 14 view .LVU1584 + 5753 0004 C0B2 uxtb r0, r0 +2185:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** + 5754 .loc 1 2185 1 view .LVU1585 + 5755 @ sp needed + 5756 0006 7047 bx lr + 5757 .cfi_endproc + 5758 .LFE75: + 5760 .section .text.HAL_TIMEx_GetChannelNState,"ax",%progbits + 5761 .align 1 + 5762 .global HAL_TIMEx_GetChannelNState + 5763 .syntax unified + 5764 .code 16 + ARM GAS /tmp/ccUWVJFr.s page 170 + + + 5765 .thumb_func + 5767 HAL_TIMEx_GetChannelNState: + 5768 .LVL455: + 5769 .LFB76: +2198:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** HAL_TIM_ChannelStateTypeDef channel_state; + 5770 .loc 1 2198 1 is_stmt 1 view -0 + 5771 .cfi_startproc + 5772 @ args = 0, pretend = 0, frame = 0 + 5773 @ frame_needed = 0, uses_anonymous_args = 0 + 5774 @ link register save eliminated. +2199:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** + 5775 .loc 1 2199 3 view .LVU1587 +2202:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** + 5776 .loc 1 2202 3 view .LVU1588 +2204:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** + 5777 .loc 1 2204 3 view .LVU1589 +2204:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** + 5778 .loc 1 2204 19 is_stmt 0 view .LVU1590 + 5779 0000 0029 cmp r1, #0 + 5780 0002 03D1 bne .L392 +2204:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** + 5781 .loc 1 2204 19 discriminator 1 view .LVU1591 + 5782 0004 4223 movs r3, #66 + 5783 0006 C05C ldrb r0, [r0, r3] + 5784 .LVL456: +2204:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** + 5785 .loc 1 2204 19 discriminator 1 view .LVU1592 + 5786 0008 C0B2 uxtb r0, r0 + 5787 .L393: + 5788 .LVL457: +2206:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** } + 5789 .loc 1 2206 3 is_stmt 1 view .LVU1593 +2207:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** /** + 5790 .loc 1 2207 1 is_stmt 0 view .LVU1594 + 5791 @ sp needed + 5792 000a 7047 bx lr + 5793 .LVL458: + 5794 .L392: +2204:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** + 5795 .loc 1 2204 19 discriminator 2 view .LVU1595 + 5796 000c 0429 cmp r1, #4 + 5797 000e 05D0 beq .L396 +2204:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** + 5798 .loc 1 2204 19 discriminator 5 view .LVU1596 + 5799 0010 0829 cmp r1, #8 + 5800 0012 07D0 beq .L397 +2204:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** + 5801 .loc 1 2204 19 discriminator 8 view .LVU1597 + 5802 0014 4523 movs r3, #69 + 5803 0016 C05C ldrb r0, [r0, r3] + 5804 .LVL459: +2204:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** + 5805 .loc 1 2204 19 discriminator 8 view .LVU1598 + 5806 0018 C0B2 uxtb r0, r0 + 5807 001a F6E7 b .L393 + 5808 .LVL460: + 5809 .L396: + ARM GAS /tmp/ccUWVJFr.s page 171 + + +2204:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** + 5810 .loc 1 2204 19 discriminator 4 view .LVU1599 + 5811 001c 4323 movs r3, #67 + 5812 001e C05C ldrb r0, [r0, r3] + 5813 .LVL461: +2204:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** + 5814 .loc 1 2204 19 discriminator 4 view .LVU1600 + 5815 0020 C0B2 uxtb r0, r0 + 5816 0022 F2E7 b .L393 + 5817 .LVL462: + 5818 .L397: +2204:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** + 5819 .loc 1 2204 19 discriminator 7 view .LVU1601 + 5820 0024 4423 movs r3, #68 + 5821 0026 C05C ldrb r0, [r0, r3] + 5822 .LVL463: +2204:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c **** + 5823 .loc 1 2204 19 discriminator 7 view .LVU1602 + 5824 0028 C0B2 uxtb r0, r0 + 5825 002a EEE7 b .L393 + 5826 .cfi_endproc + 5827 .LFE76: + 5829 .text + 5830 .Letext0: + 5831 .file 2 "/home/chiangni/.config/VSCodium/User/globalStorage/bmd.stm32-for-vscode/@xpack-dev-tools/ + 5832 .file 3 "/home/chiangni/.config/VSCodium/User/globalStorage/bmd.stm32-for-vscode/@xpack-dev-tools/ + 5833 .file 4 "Drivers/CMSIS/Device/ST/STM32F0xx/Include/stm32f042x6.h" + 5834 .file 5 "Drivers/CMSIS/Device/ST/STM32F0xx/Include/stm32f0xx.h" + 5835 .file 6 "Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_def.h" + 5836 .file 7 "Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_dma.h" + 5837 .file 8 "Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_tim.h" + 5838 .file 9 "Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_tim_ex.h" + ARM GAS /tmp/ccUWVJFr.s page 172 + + +DEFINED SYMBOLS + *ABS*:00000000 stm32f0xx_hal_tim_ex.c + /tmp/ccUWVJFr.s:19 .text.TIM_CCxNChannelCmd:00000000 $t + /tmp/ccUWVJFr.s:24 .text.TIM_CCxNChannelCmd:00000000 TIM_CCxNChannelCmd + /tmp/ccUWVJFr.s:70 .text.TIM_DMAErrorCCxN:00000000 $t + /tmp/ccUWVJFr.s:75 .text.TIM_DMAErrorCCxN:00000000 TIM_DMAErrorCCxN + /tmp/ccUWVJFr.s:160 .text.TIM_DMADelayPulseNCplt:00000000 $t + /tmp/ccUWVJFr.s:165 .text.TIM_DMADelayPulseNCplt:00000000 TIM_DMADelayPulseNCplt + /tmp/ccUWVJFr.s:291 .text.HAL_TIMEx_HallSensor_MspInit:00000000 $t + /tmp/ccUWVJFr.s:297 .text.HAL_TIMEx_HallSensor_MspInit:00000000 HAL_TIMEx_HallSensor_MspInit + /tmp/ccUWVJFr.s:313 .text.HAL_TIMEx_HallSensor_Init:00000000 $t + /tmp/ccUWVJFr.s:319 .text.HAL_TIMEx_HallSensor_Init:00000000 HAL_TIMEx_HallSensor_Init + /tmp/ccUWVJFr.s:546 .text.HAL_TIMEx_HallSensor_MspDeInit:00000000 $t + /tmp/ccUWVJFr.s:552 .text.HAL_TIMEx_HallSensor_MspDeInit:00000000 HAL_TIMEx_HallSensor_MspDeInit + /tmp/ccUWVJFr.s:568 .text.HAL_TIMEx_HallSensor_DeInit:00000000 $t + /tmp/ccUWVJFr.s:574 .text.HAL_TIMEx_HallSensor_DeInit:00000000 HAL_TIMEx_HallSensor_DeInit + /tmp/ccUWVJFr.s:654 .text.HAL_TIMEx_HallSensor_DeInit:0000004c $d + /tmp/ccUWVJFr.s:660 .text.HAL_TIMEx_HallSensor_Start:00000000 $t + /tmp/ccUWVJFr.s:666 .text.HAL_TIMEx_HallSensor_Start:00000000 HAL_TIMEx_HallSensor_Start + /tmp/ccUWVJFr.s:837 .text.HAL_TIMEx_HallSensor_Start:00000090 $d + /tmp/ccUWVJFr.s:843 .text.HAL_TIMEx_HallSensor_Stop:00000000 $t + /tmp/ccUWVJFr.s:849 .text.HAL_TIMEx_HallSensor_Stop:00000000 HAL_TIMEx_HallSensor_Stop + /tmp/ccUWVJFr.s:913 .text.HAL_TIMEx_HallSensor_Stop:00000040 $d + /tmp/ccUWVJFr.s:919 .text.HAL_TIMEx_HallSensor_Start_IT:00000000 $t + /tmp/ccUWVJFr.s:925 .text.HAL_TIMEx_HallSensor_Start_IT:00000000 HAL_TIMEx_HallSensor_Start_IT + /tmp/ccUWVJFr.s:1103 .text.HAL_TIMEx_HallSensor_Start_IT:00000098 $d + /tmp/ccUWVJFr.s:1109 .text.HAL_TIMEx_HallSensor_Stop_IT:00000000 $t + /tmp/ccUWVJFr.s:1115 .text.HAL_TIMEx_HallSensor_Stop_IT:00000000 HAL_TIMEx_HallSensor_Stop_IT + /tmp/ccUWVJFr.s:1185 .text.HAL_TIMEx_HallSensor_Stop_IT:00000048 $d + /tmp/ccUWVJFr.s:1191 .text.HAL_TIMEx_HallSensor_Start_DMA:00000000 $t + /tmp/ccUWVJFr.s:1197 .text.HAL_TIMEx_HallSensor_Start_DMA:00000000 HAL_TIMEx_HallSensor_Start_DMA + /tmp/ccUWVJFr.s:1396 .text.HAL_TIMEx_HallSensor_Start_DMA:000000b8 $d + /tmp/ccUWVJFr.s:1405 .text.HAL_TIMEx_HallSensor_Stop_DMA:00000000 $t + /tmp/ccUWVJFr.s:1411 .text.HAL_TIMEx_HallSensor_Stop_DMA:00000000 HAL_TIMEx_HallSensor_Stop_DMA + /tmp/ccUWVJFr.s:1480 .text.HAL_TIMEx_HallSensor_Stop_DMA:00000048 $d + /tmp/ccUWVJFr.s:1487 .text.HAL_TIMEx_OCN_Start:00000000 $t + /tmp/ccUWVJFr.s:1493 .text.HAL_TIMEx_OCN_Start:00000000 HAL_TIMEx_OCN_Start + /tmp/ccUWVJFr.s:1675 .text.HAL_TIMEx_OCN_Start:000000c8 $d + /tmp/ccUWVJFr.s:1681 .text.HAL_TIMEx_OCN_Stop:00000000 $t + /tmp/ccUWVJFr.s:1687 .text.HAL_TIMEx_OCN_Stop:00000000 HAL_TIMEx_OCN_Stop + /tmp/ccUWVJFr.s:1793 .text.HAL_TIMEx_OCN_Stop:00000070 $d + /tmp/ccUWVJFr.s:1800 .text.HAL_TIMEx_OCN_Start_IT:00000000 $t + /tmp/ccUWVJFr.s:1806 .text.HAL_TIMEx_OCN_Start_IT:00000000 HAL_TIMEx_OCN_Start_IT + /tmp/ccUWVJFr.s:2040 .text.HAL_TIMEx_OCN_Start_IT:00000100 $d + /tmp/ccUWVJFr.s:2046 .text.HAL_TIMEx_OCN_Stop_IT:00000000 $t + /tmp/ccUWVJFr.s:2052 .text.HAL_TIMEx_OCN_Stop_IT:00000000 HAL_TIMEx_OCN_Stop_IT + /tmp/ccUWVJFr.s:2237 .text.HAL_TIMEx_OCN_Stop_IT:000000bc $d + /tmp/ccUWVJFr.s:2244 .text.HAL_TIMEx_OCN_Start_DMA:00000000 $t + /tmp/ccUWVJFr.s:2250 .text.HAL_TIMEx_OCN_Start_DMA:00000000 HAL_TIMEx_OCN_Start_DMA + /tmp/ccUWVJFr.s:2677 .text.HAL_TIMEx_OCN_Start_DMA:000001d4 $d + /tmp/ccUWVJFr.s:2686 .text.HAL_TIMEx_OCN_Stop_DMA:00000000 $t + /tmp/ccUWVJFr.s:2692 .text.HAL_TIMEx_OCN_Stop_DMA:00000000 HAL_TIMEx_OCN_Stop_DMA + /tmp/ccUWVJFr.s:2874 .text.HAL_TIMEx_OCN_Stop_DMA:000000bc $d + /tmp/ccUWVJFr.s:2884 .text.HAL_TIMEx_PWMN_Start:00000000 $t + /tmp/ccUWVJFr.s:2890 .text.HAL_TIMEx_PWMN_Start:00000000 HAL_TIMEx_PWMN_Start + /tmp/ccUWVJFr.s:3072 .text.HAL_TIMEx_PWMN_Start:000000c8 $d + /tmp/ccUWVJFr.s:3078 .text.HAL_TIMEx_PWMN_Stop:00000000 $t + ARM GAS /tmp/ccUWVJFr.s page 173 + + + /tmp/ccUWVJFr.s:3084 .text.HAL_TIMEx_PWMN_Stop:00000000 HAL_TIMEx_PWMN_Stop + /tmp/ccUWVJFr.s:3190 .text.HAL_TIMEx_PWMN_Stop:00000070 $d + /tmp/ccUWVJFr.s:3197 .text.HAL_TIMEx_PWMN_Start_IT:00000000 $t + /tmp/ccUWVJFr.s:3203 .text.HAL_TIMEx_PWMN_Start_IT:00000000 HAL_TIMEx_PWMN_Start_IT + /tmp/ccUWVJFr.s:3437 .text.HAL_TIMEx_PWMN_Start_IT:00000100 $d + /tmp/ccUWVJFr.s:3443 .text.HAL_TIMEx_PWMN_Stop_IT:00000000 $t + /tmp/ccUWVJFr.s:3449 .text.HAL_TIMEx_PWMN_Stop_IT:00000000 HAL_TIMEx_PWMN_Stop_IT + /tmp/ccUWVJFr.s:3634 .text.HAL_TIMEx_PWMN_Stop_IT:000000bc $d + /tmp/ccUWVJFr.s:3641 .text.HAL_TIMEx_PWMN_Start_DMA:00000000 $t + /tmp/ccUWVJFr.s:3647 .text.HAL_TIMEx_PWMN_Start_DMA:00000000 HAL_TIMEx_PWMN_Start_DMA + /tmp/ccUWVJFr.s:4074 .text.HAL_TIMEx_PWMN_Start_DMA:000001d4 $d + /tmp/ccUWVJFr.s:4083 .text.HAL_TIMEx_PWMN_Stop_DMA:00000000 $t + /tmp/ccUWVJFr.s:4089 .text.HAL_TIMEx_PWMN_Stop_DMA:00000000 HAL_TIMEx_PWMN_Stop_DMA + /tmp/ccUWVJFr.s:4271 .text.HAL_TIMEx_PWMN_Stop_DMA:000000bc $d + /tmp/ccUWVJFr.s:4281 .text.HAL_TIMEx_OnePulseN_Start:00000000 $t + /tmp/ccUWVJFr.s:4287 .text.HAL_TIMEx_OnePulseN_Start:00000000 HAL_TIMEx_OnePulseN_Start + /tmp/ccUWVJFr.s:4436 .text.HAL_TIMEx_OnePulseN_Stop:00000000 $t + /tmp/ccUWVJFr.s:4442 .text.HAL_TIMEx_OnePulseN_Stop:00000000 HAL_TIMEx_OnePulseN_Stop + /tmp/ccUWVJFr.s:4546 .text.HAL_TIMEx_OnePulseN_Stop:0000006c $d + /tmp/ccUWVJFr.s:4553 .text.HAL_TIMEx_OnePulseN_Start_IT:00000000 $t + /tmp/ccUWVJFr.s:4559 .text.HAL_TIMEx_OnePulseN_Start_IT:00000000 HAL_TIMEx_OnePulseN_Start_IT + /tmp/ccUWVJFr.s:4721 .text.HAL_TIMEx_OnePulseN_Stop_IT:00000000 $t + /tmp/ccUWVJFr.s:4727 .text.HAL_TIMEx_OnePulseN_Stop_IT:00000000 HAL_TIMEx_OnePulseN_Stop_IT + /tmp/ccUWVJFr.s:4843 .text.HAL_TIMEx_OnePulseN_Stop_IT:00000080 $d + /tmp/ccUWVJFr.s:4850 .text.HAL_TIMEx_ConfigCommutEvent:00000000 $t + /tmp/ccUWVJFr.s:4856 .text.HAL_TIMEx_ConfigCommutEvent:00000000 HAL_TIMEx_ConfigCommutEvent + /tmp/ccUWVJFr.s:4979 .text.HAL_TIMEx_ConfigCommutEvent:00000070 $d + /tmp/ccUWVJFr.s:4984 .text.HAL_TIMEx_ConfigCommutEvent_IT:00000000 $t + /tmp/ccUWVJFr.s:4990 .text.HAL_TIMEx_ConfigCommutEvent_IT:00000000 HAL_TIMEx_ConfigCommutEvent_IT + /tmp/ccUWVJFr.s:5113 .text.HAL_TIMEx_ConfigCommutEvent_IT:00000070 $d + /tmp/ccUWVJFr.s:5118 .text.HAL_TIMEx_ConfigCommutEvent_DMA:00000000 $t + /tmp/ccUWVJFr.s:5124 .text.HAL_TIMEx_ConfigCommutEvent_DMA:00000000 HAL_TIMEx_ConfigCommutEvent_DMA + /tmp/ccUWVJFr.s:5266 .text.HAL_TIMEx_ConfigCommutEvent_DMA:00000084 $d + /tmp/ccUWVJFr.s:5621 .text.TIMEx_DMACommutationCplt:00000000 TIMEx_DMACommutationCplt + /tmp/ccUWVJFr.s:5680 .text.TIMEx_DMACommutationHalfCplt:00000000 TIMEx_DMACommutationHalfCplt + /tmp/ccUWVJFr.s:5273 .text.HAL_TIMEx_MasterConfigSynchronization:00000000 $t + /tmp/ccUWVJFr.s:5279 .text.HAL_TIMEx_MasterConfigSynchronization:00000000 HAL_TIMEx_MasterConfigSynchronization + /tmp/ccUWVJFr.s:5401 .text.HAL_TIMEx_MasterConfigSynchronization:0000005c $d + /tmp/ccUWVJFr.s:5407 .text.HAL_TIMEx_ConfigBreakDeadTime:00000000 $t + /tmp/ccUWVJFr.s:5413 .text.HAL_TIMEx_ConfigBreakDeadTime:00000000 HAL_TIMEx_ConfigBreakDeadTime + /tmp/ccUWVJFr.s:5530 .text.HAL_TIMEx_ConfigBreakDeadTime:00000054 $d + /tmp/ccUWVJFr.s:5540 .text.HAL_TIMEx_RemapConfig:00000000 $t + /tmp/ccUWVJFr.s:5546 .text.HAL_TIMEx_RemapConfig:00000000 HAL_TIMEx_RemapConfig + /tmp/ccUWVJFr.s:5593 .text.HAL_TIMEx_CommutCallback:00000000 $t + /tmp/ccUWVJFr.s:5599 .text.HAL_TIMEx_CommutCallback:00000000 HAL_TIMEx_CommutCallback + /tmp/ccUWVJFr.s:5615 .text.TIMEx_DMACommutationCplt:00000000 $t + /tmp/ccUWVJFr.s:5652 .text.HAL_TIMEx_CommutHalfCpltCallback:00000000 $t + /tmp/ccUWVJFr.s:5658 .text.HAL_TIMEx_CommutHalfCpltCallback:00000000 HAL_TIMEx_CommutHalfCpltCallback + /tmp/ccUWVJFr.s:5674 .text.TIMEx_DMACommutationHalfCplt:00000000 $t + /tmp/ccUWVJFr.s:5711 .text.HAL_TIMEx_BreakCallback:00000000 $t + /tmp/ccUWVJFr.s:5717 .text.HAL_TIMEx_BreakCallback:00000000 HAL_TIMEx_BreakCallback + /tmp/ccUWVJFr.s:5733 .text.HAL_TIMEx_HallSensor_GetState:00000000 $t + /tmp/ccUWVJFr.s:5739 .text.HAL_TIMEx_HallSensor_GetState:00000000 HAL_TIMEx_HallSensor_GetState + /tmp/ccUWVJFr.s:5761 .text.HAL_TIMEx_GetChannelNState:00000000 $t + /tmp/ccUWVJFr.s:5767 .text.HAL_TIMEx_GetChannelNState:00000000 HAL_TIMEx_GetChannelNState + +UNDEFINED SYMBOLS + ARM GAS /tmp/ccUWVJFr.s page 174 + + +HAL_TIM_ErrorCallback +HAL_TIM_PWM_PulseFinishedCallback +TIM_Base_SetConfig +TIM_TI1_SetConfig +TIM_OC2_SetConfig +TIM_CCxChannelCmd +HAL_DMA_Start_IT +TIM_DMACaptureCplt +TIM_DMACaptureHalfCplt +TIM_DMAError +HAL_DMA_Abort_IT +TIM_DMADelayPulseHalfCplt diff --git a/Software/build/stm32f0xx_hal_tim_ex.o b/Software/build/stm32f0xx_hal_tim_ex.o new file mode 100644 index 0000000..eaa3faf Binary files /dev/null and b/Software/build/stm32f0xx_hal_tim_ex.o differ diff --git a/Software/build/stm32f0xx_it.d b/Software/build/stm32f0xx_it.d new file mode 100644 index 0000000..93ce233 --- /dev/null +++ b/Software/build/stm32f0xx_it.d @@ -0,0 +1,62 @@ +build/stm32f0xx_it.o: Core/Src/stm32f0xx_it.c Core/Inc/main.h \ + Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal.h \ + Core/Inc/stm32f0xx_hal_conf.h \ + Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_rcc.h \ + Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_def.h \ + Drivers/CMSIS/Device/ST/STM32F0xx/Include/stm32f0xx.h \ + Drivers/CMSIS/Device/ST/STM32F0xx/Include/stm32f042x6.h \ + Drivers/CMSIS/Include/core_cm0.h Drivers/CMSIS/Include/cmsis_version.h \ + Drivers/CMSIS/Include/cmsis_compiler.h Drivers/CMSIS/Include/cmsis_gcc.h \ + Drivers/CMSIS/Device/ST/STM32F0xx/Include/system_stm32f0xx.h \ + Drivers/STM32F0xx_HAL_Driver/Inc/Legacy/stm32_hal_legacy.h \ + Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_rcc_ex.h \ + Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_gpio.h \ + Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_gpio_ex.h \ + Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_exti.h \ + Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_dma.h \ + Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_dma_ex.h \ + Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_cortex.h \ + Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_adc.h \ + Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_adc_ex.h \ + Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_can.h \ + Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_flash.h \ + Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_flash_ex.h \ + Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_i2c.h \ + Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_i2c_ex.h \ + Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_pwr.h \ + Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_pwr_ex.h \ + Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_tim.h \ + Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_tim_ex.h \ + Core/Inc/stm32f0xx_it.h +Core/Inc/main.h: +Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal.h: +Core/Inc/stm32f0xx_hal_conf.h: +Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_rcc.h: +Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_def.h: +Drivers/CMSIS/Device/ST/STM32F0xx/Include/stm32f0xx.h: +Drivers/CMSIS/Device/ST/STM32F0xx/Include/stm32f042x6.h: +Drivers/CMSIS/Include/core_cm0.h: +Drivers/CMSIS/Include/cmsis_version.h: +Drivers/CMSIS/Include/cmsis_compiler.h: +Drivers/CMSIS/Include/cmsis_gcc.h: +Drivers/CMSIS/Device/ST/STM32F0xx/Include/system_stm32f0xx.h: +Drivers/STM32F0xx_HAL_Driver/Inc/Legacy/stm32_hal_legacy.h: +Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_rcc_ex.h: +Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_gpio.h: +Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_gpio_ex.h: +Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_exti.h: +Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_dma.h: +Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_dma_ex.h: +Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_cortex.h: +Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_adc.h: +Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_adc_ex.h: +Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_can.h: +Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_flash.h: +Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_flash_ex.h: +Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_i2c.h: +Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_i2c_ex.h: +Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_pwr.h: +Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_pwr_ex.h: +Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_tim.h: +Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_tim_ex.h: +Core/Inc/stm32f0xx_it.h: diff --git a/Software/build/stm32f0xx_it.lst b/Software/build/stm32f0xx_it.lst new file mode 100644 index 0000000..3ab3439 --- /dev/null +++ b/Software/build/stm32f0xx_it.lst @@ -0,0 +1,291 @@ +ARM GAS /tmp/ccDtjY0E.s page 1 + + + 1 .cpu cortex-m0 + 2 .arch armv6s-m + 3 .fpu softvfp + 4 .eabi_attribute 20, 1 + 5 .eabi_attribute 21, 1 + 6 .eabi_attribute 23, 3 + 7 .eabi_attribute 24, 1 + 8 .eabi_attribute 25, 1 + 9 .eabi_attribute 26, 1 + 10 .eabi_attribute 30, 1 + 11 .eabi_attribute 34, 0 + 12 .eabi_attribute 18, 4 + 13 .file "stm32f0xx_it.c" + 14 .text + 15 .Ltext0: + 16 .cfi_sections .debug_frame + 17 .file 1 "Core/Src/stm32f0xx_it.c" + 18 .section .text.NMI_Handler,"ax",%progbits + 19 .align 1 + 20 .global NMI_Handler + 21 .syntax unified + 22 .code 16 + 23 .thumb_func + 25 NMI_Handler: + 26 .LFB40: + 1:Core/Src/stm32f0xx_it.c **** /* USER CODE BEGIN Header */ + 2:Core/Src/stm32f0xx_it.c **** /** + 3:Core/Src/stm32f0xx_it.c **** ****************************************************************************** + 4:Core/Src/stm32f0xx_it.c **** * @file stm32f0xx_it.c + 5:Core/Src/stm32f0xx_it.c **** * @brief Interrupt Service Routines. + 6:Core/Src/stm32f0xx_it.c **** ****************************************************************************** + 7:Core/Src/stm32f0xx_it.c **** * @attention + 8:Core/Src/stm32f0xx_it.c **** * + 9:Core/Src/stm32f0xx_it.c **** * Copyright (c) 2024 STMicroelectronics. + 10:Core/Src/stm32f0xx_it.c **** * All rights reserved. + 11:Core/Src/stm32f0xx_it.c **** * + 12:Core/Src/stm32f0xx_it.c **** * This software is licensed under terms that can be found in the LICENSE file + 13:Core/Src/stm32f0xx_it.c **** * in the root directory of this software component. + 14:Core/Src/stm32f0xx_it.c **** * If no LICENSE file comes with this software, it is provided AS-IS. + 15:Core/Src/stm32f0xx_it.c **** * + 16:Core/Src/stm32f0xx_it.c **** ****************************************************************************** + 17:Core/Src/stm32f0xx_it.c **** */ + 18:Core/Src/stm32f0xx_it.c **** /* USER CODE END Header */ + 19:Core/Src/stm32f0xx_it.c **** + 20:Core/Src/stm32f0xx_it.c **** /* Includes ------------------------------------------------------------------*/ + 21:Core/Src/stm32f0xx_it.c **** #include "main.h" + 22:Core/Src/stm32f0xx_it.c **** #include "stm32f0xx_it.h" + 23:Core/Src/stm32f0xx_it.c **** /* Private includes ----------------------------------------------------------*/ + 24:Core/Src/stm32f0xx_it.c **** /* USER CODE BEGIN Includes */ + 25:Core/Src/stm32f0xx_it.c **** /* USER CODE END Includes */ + 26:Core/Src/stm32f0xx_it.c **** + 27:Core/Src/stm32f0xx_it.c **** /* Private typedef -----------------------------------------------------------*/ + 28:Core/Src/stm32f0xx_it.c **** /* USER CODE BEGIN TD */ + 29:Core/Src/stm32f0xx_it.c **** + 30:Core/Src/stm32f0xx_it.c **** /* USER CODE END TD */ + 31:Core/Src/stm32f0xx_it.c **** + 32:Core/Src/stm32f0xx_it.c **** /* Private define ------------------------------------------------------------*/ + ARM GAS /tmp/ccDtjY0E.s page 2 + + + 33:Core/Src/stm32f0xx_it.c **** /* USER CODE BEGIN PD */ + 34:Core/Src/stm32f0xx_it.c **** + 35:Core/Src/stm32f0xx_it.c **** /* USER CODE END PD */ + 36:Core/Src/stm32f0xx_it.c **** + 37:Core/Src/stm32f0xx_it.c **** /* Private macro -------------------------------------------------------------*/ + 38:Core/Src/stm32f0xx_it.c **** /* USER CODE BEGIN PM */ + 39:Core/Src/stm32f0xx_it.c **** + 40:Core/Src/stm32f0xx_it.c **** /* USER CODE END PM */ + 41:Core/Src/stm32f0xx_it.c **** + 42:Core/Src/stm32f0xx_it.c **** /* Private variables ---------------------------------------------------------*/ + 43:Core/Src/stm32f0xx_it.c **** /* USER CODE BEGIN PV */ + 44:Core/Src/stm32f0xx_it.c **** + 45:Core/Src/stm32f0xx_it.c **** /* USER CODE END PV */ + 46:Core/Src/stm32f0xx_it.c **** + 47:Core/Src/stm32f0xx_it.c **** /* Private function prototypes -----------------------------------------------*/ + 48:Core/Src/stm32f0xx_it.c **** /* USER CODE BEGIN PFP */ + 49:Core/Src/stm32f0xx_it.c **** + 50:Core/Src/stm32f0xx_it.c **** /* USER CODE END PFP */ + 51:Core/Src/stm32f0xx_it.c **** + 52:Core/Src/stm32f0xx_it.c **** /* Private user code ---------------------------------------------------------*/ + 53:Core/Src/stm32f0xx_it.c **** /* USER CODE BEGIN 0 */ + 54:Core/Src/stm32f0xx_it.c **** + 55:Core/Src/stm32f0xx_it.c **** /* USER CODE END 0 */ + 56:Core/Src/stm32f0xx_it.c **** + 57:Core/Src/stm32f0xx_it.c **** /* External variables --------------------------------------------------------*/ + 58:Core/Src/stm32f0xx_it.c **** + 59:Core/Src/stm32f0xx_it.c **** /* USER CODE BEGIN EV */ + 60:Core/Src/stm32f0xx_it.c **** + 61:Core/Src/stm32f0xx_it.c **** /* USER CODE END EV */ + 62:Core/Src/stm32f0xx_it.c **** + 63:Core/Src/stm32f0xx_it.c **** /******************************************************************************/ + 64:Core/Src/stm32f0xx_it.c **** /* Cortex-M0 Processor Interruption and Exception Handlers */ + 65:Core/Src/stm32f0xx_it.c **** /******************************************************************************/ + 66:Core/Src/stm32f0xx_it.c **** /** + 67:Core/Src/stm32f0xx_it.c **** * @brief This function handles Non maskable interrupt. + 68:Core/Src/stm32f0xx_it.c **** */ + 69:Core/Src/stm32f0xx_it.c **** void NMI_Handler(void) + 70:Core/Src/stm32f0xx_it.c **** { + 27 .loc 1 70 1 view -0 + 28 .cfi_startproc + 29 @ Volatile: function does not return. + 30 @ args = 0, pretend = 0, frame = 0 + 31 @ frame_needed = 0, uses_anonymous_args = 0 + 32 @ link register save eliminated. + 33 .L2: + 71:Core/Src/stm32f0xx_it.c **** /* USER CODE BEGIN NonMaskableInt_IRQn 0 */ + 72:Core/Src/stm32f0xx_it.c **** + 73:Core/Src/stm32f0xx_it.c **** /* USER CODE END NonMaskableInt_IRQn 0 */ + 74:Core/Src/stm32f0xx_it.c **** /* USER CODE BEGIN NonMaskableInt_IRQn 1 */ + 75:Core/Src/stm32f0xx_it.c **** while (1) + 34 .loc 1 75 3 view .LVU1 + 76:Core/Src/stm32f0xx_it.c **** { + 77:Core/Src/stm32f0xx_it.c **** } + 35 .loc 1 77 3 view .LVU2 + 75:Core/Src/stm32f0xx_it.c **** { + 36 .loc 1 75 9 view .LVU3 + 37 0000 FEE7 b .L2 + ARM GAS /tmp/ccDtjY0E.s page 3 + + + 38 .cfi_endproc + 39 .LFE40: + 41 .section .text.HardFault_Handler,"ax",%progbits + 42 .align 1 + 43 .global HardFault_Handler + 44 .syntax unified + 45 .code 16 + 46 .thumb_func + 48 HardFault_Handler: + 49 .LFB41: + 78:Core/Src/stm32f0xx_it.c **** /* USER CODE END NonMaskableInt_IRQn 1 */ + 79:Core/Src/stm32f0xx_it.c **** } + 80:Core/Src/stm32f0xx_it.c **** + 81:Core/Src/stm32f0xx_it.c **** /** + 82:Core/Src/stm32f0xx_it.c **** * @brief This function handles Hard fault interrupt. + 83:Core/Src/stm32f0xx_it.c **** */ + 84:Core/Src/stm32f0xx_it.c **** void HardFault_Handler(void) + 85:Core/Src/stm32f0xx_it.c **** { + 50 .loc 1 85 1 view -0 + 51 .cfi_startproc + 52 @ Volatile: function does not return. + 53 @ args = 0, pretend = 0, frame = 0 + 54 @ frame_needed = 0, uses_anonymous_args = 0 + 55 @ link register save eliminated. + 56 .L4: + 86:Core/Src/stm32f0xx_it.c **** /* USER CODE BEGIN HardFault_IRQn 0 */ + 87:Core/Src/stm32f0xx_it.c **** + 88:Core/Src/stm32f0xx_it.c **** /* USER CODE END HardFault_IRQn 0 */ + 89:Core/Src/stm32f0xx_it.c **** while (1) + 57 .loc 1 89 3 view .LVU5 + 90:Core/Src/stm32f0xx_it.c **** { + 91:Core/Src/stm32f0xx_it.c **** /* USER CODE BEGIN W1_HardFault_IRQn 0 */ + 92:Core/Src/stm32f0xx_it.c **** /* USER CODE END W1_HardFault_IRQn 0 */ + 93:Core/Src/stm32f0xx_it.c **** } + 58 .loc 1 93 3 view .LVU6 + 89:Core/Src/stm32f0xx_it.c **** { + 59 .loc 1 89 9 view .LVU7 + 60 0000 FEE7 b .L4 + 61 .cfi_endproc + 62 .LFE41: + 64 .section .text.SVC_Handler,"ax",%progbits + 65 .align 1 + 66 .global SVC_Handler + 67 .syntax unified + 68 .code 16 + 69 .thumb_func + 71 SVC_Handler: + 72 .LFB42: + 94:Core/Src/stm32f0xx_it.c **** } + 95:Core/Src/stm32f0xx_it.c **** + 96:Core/Src/stm32f0xx_it.c **** /** + 97:Core/Src/stm32f0xx_it.c **** * @brief This function handles System service call via SWI instruction. + 98:Core/Src/stm32f0xx_it.c **** */ + 99:Core/Src/stm32f0xx_it.c **** void SVC_Handler(void) + 100:Core/Src/stm32f0xx_it.c **** { + 73 .loc 1 100 1 view -0 + 74 .cfi_startproc + ARM GAS /tmp/ccDtjY0E.s page 4 + + + 75 @ args = 0, pretend = 0, frame = 0 + 76 @ frame_needed = 0, uses_anonymous_args = 0 + 77 @ link register save eliminated. + 101:Core/Src/stm32f0xx_it.c **** /* USER CODE BEGIN SVC_IRQn 0 */ + 102:Core/Src/stm32f0xx_it.c **** + 103:Core/Src/stm32f0xx_it.c **** /* USER CODE END SVC_IRQn 0 */ + 104:Core/Src/stm32f0xx_it.c **** /* USER CODE BEGIN SVC_IRQn 1 */ + 105:Core/Src/stm32f0xx_it.c **** + 106:Core/Src/stm32f0xx_it.c **** /* USER CODE END SVC_IRQn 1 */ + 107:Core/Src/stm32f0xx_it.c **** } + 78 .loc 1 107 1 view .LVU9 + 79 @ sp needed + 80 0000 7047 bx lr + 81 .cfi_endproc + 82 .LFE42: + 84 .section .text.PendSV_Handler,"ax",%progbits + 85 .align 1 + 86 .global PendSV_Handler + 87 .syntax unified + 88 .code 16 + 89 .thumb_func + 91 PendSV_Handler: + 92 .LFB43: + 108:Core/Src/stm32f0xx_it.c **** + 109:Core/Src/stm32f0xx_it.c **** /** + 110:Core/Src/stm32f0xx_it.c **** * @brief This function handles Pendable request for system service. + 111:Core/Src/stm32f0xx_it.c **** */ + 112:Core/Src/stm32f0xx_it.c **** void PendSV_Handler(void) + 113:Core/Src/stm32f0xx_it.c **** { + 93 .loc 1 113 1 view -0 + 94 .cfi_startproc + 95 @ args = 0, pretend = 0, frame = 0 + 96 @ frame_needed = 0, uses_anonymous_args = 0 + 97 @ link register save eliminated. + 114:Core/Src/stm32f0xx_it.c **** /* USER CODE BEGIN PendSV_IRQn 0 */ + 115:Core/Src/stm32f0xx_it.c **** + 116:Core/Src/stm32f0xx_it.c **** /* USER CODE END PendSV_IRQn 0 */ + 117:Core/Src/stm32f0xx_it.c **** /* USER CODE BEGIN PendSV_IRQn 1 */ + 118:Core/Src/stm32f0xx_it.c **** + 119:Core/Src/stm32f0xx_it.c **** /* USER CODE END PendSV_IRQn 1 */ + 120:Core/Src/stm32f0xx_it.c **** } + 98 .loc 1 120 1 view .LVU11 + 99 @ sp needed + 100 0000 7047 bx lr + 101 .cfi_endproc + 102 .LFE43: + 104 .section .text.SysTick_Handler,"ax",%progbits + 105 .align 1 + 106 .global SysTick_Handler + 107 .syntax unified + 108 .code 16 + 109 .thumb_func + 111 SysTick_Handler: + 112 .LFB44: + 121:Core/Src/stm32f0xx_it.c **** + 122:Core/Src/stm32f0xx_it.c **** /** + 123:Core/Src/stm32f0xx_it.c **** * @brief This function handles System tick timer. + ARM GAS /tmp/ccDtjY0E.s page 5 + + + 124:Core/Src/stm32f0xx_it.c **** */ + 125:Core/Src/stm32f0xx_it.c **** void SysTick_Handler(void) + 126:Core/Src/stm32f0xx_it.c **** { + 113 .loc 1 126 1 view -0 + 114 .cfi_startproc + 115 @ args = 0, pretend = 0, frame = 0 + 116 @ frame_needed = 0, uses_anonymous_args = 0 + 117 0000 10B5 push {r4, lr} + 118 .cfi_def_cfa_offset 8 + 119 .cfi_offset 4, -8 + 120 .cfi_offset 14, -4 + 127:Core/Src/stm32f0xx_it.c **** /* USER CODE BEGIN SysTick_IRQn 0 */ + 128:Core/Src/stm32f0xx_it.c **** + 129:Core/Src/stm32f0xx_it.c **** /* USER CODE END SysTick_IRQn 0 */ + 130:Core/Src/stm32f0xx_it.c **** HAL_IncTick(); + 121 .loc 1 130 3 view .LVU13 + 122 0002 FFF7FEFF bl HAL_IncTick + 123 .LVL0: + 131:Core/Src/stm32f0xx_it.c **** /* USER CODE BEGIN SysTick_IRQn 1 */ + 132:Core/Src/stm32f0xx_it.c **** + 133:Core/Src/stm32f0xx_it.c **** /* USER CODE END SysTick_IRQn 1 */ + 134:Core/Src/stm32f0xx_it.c **** } + 124 .loc 1 134 1 is_stmt 0 view .LVU14 + 125 @ sp needed + 126 0006 10BD pop {r4, pc} + 127 .cfi_endproc + 128 .LFE44: + 130 .text + 131 .Letext0: + 132 .file 2 "Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal.h" + ARM GAS /tmp/ccDtjY0E.s page 6 + + +DEFINED SYMBOLS + *ABS*:00000000 stm32f0xx_it.c + /tmp/ccDtjY0E.s:19 .text.NMI_Handler:00000000 $t + /tmp/ccDtjY0E.s:25 .text.NMI_Handler:00000000 NMI_Handler + /tmp/ccDtjY0E.s:42 .text.HardFault_Handler:00000000 $t + /tmp/ccDtjY0E.s:48 .text.HardFault_Handler:00000000 HardFault_Handler + /tmp/ccDtjY0E.s:65 .text.SVC_Handler:00000000 $t + /tmp/ccDtjY0E.s:71 .text.SVC_Handler:00000000 SVC_Handler + /tmp/ccDtjY0E.s:85 .text.PendSV_Handler:00000000 $t + /tmp/ccDtjY0E.s:91 .text.PendSV_Handler:00000000 PendSV_Handler + /tmp/ccDtjY0E.s:105 .text.SysTick_Handler:00000000 $t + /tmp/ccDtjY0E.s:111 .text.SysTick_Handler:00000000 SysTick_Handler + +UNDEFINED SYMBOLS +HAL_IncTick diff --git a/Software/build/stm32f0xx_it.o b/Software/build/stm32f0xx_it.o new file mode 100644 index 0000000..0189440 Binary files /dev/null and b/Software/build/stm32f0xx_it.o differ diff --git a/Software/build/system_stm32f0xx.d b/Software/build/system_stm32f0xx.d new file mode 100644 index 0000000..1cd3e96 --- /dev/null +++ b/Software/build/system_stm32f0xx.d @@ -0,0 +1,59 @@ +build/system_stm32f0xx.o: Core/Src/system_stm32f0xx.c \ + Drivers/CMSIS/Device/ST/STM32F0xx/Include/stm32f0xx.h \ + Drivers/CMSIS/Device/ST/STM32F0xx/Include/stm32f042x6.h \ + Drivers/CMSIS/Include/core_cm0.h Drivers/CMSIS/Include/cmsis_version.h \ + Drivers/CMSIS/Include/cmsis_compiler.h Drivers/CMSIS/Include/cmsis_gcc.h \ + Drivers/CMSIS/Device/ST/STM32F0xx/Include/system_stm32f0xx.h \ + Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal.h \ + Core/Inc/stm32f0xx_hal_conf.h \ + Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_rcc.h \ + Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_def.h \ + Drivers/STM32F0xx_HAL_Driver/Inc/Legacy/stm32_hal_legacy.h \ + Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_rcc_ex.h \ + Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_gpio.h \ + Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_gpio_ex.h \ + Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_exti.h \ + Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_dma.h \ + Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_dma_ex.h \ + Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_cortex.h \ + Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_adc.h \ + Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_adc_ex.h \ + Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_can.h \ + Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_flash.h \ + Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_flash_ex.h \ + Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_i2c.h \ + Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_i2c_ex.h \ + Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_pwr.h \ + Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_pwr_ex.h \ + Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_tim.h \ + Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_tim_ex.h +Drivers/CMSIS/Device/ST/STM32F0xx/Include/stm32f0xx.h: +Drivers/CMSIS/Device/ST/STM32F0xx/Include/stm32f042x6.h: +Drivers/CMSIS/Include/core_cm0.h: +Drivers/CMSIS/Include/cmsis_version.h: +Drivers/CMSIS/Include/cmsis_compiler.h: +Drivers/CMSIS/Include/cmsis_gcc.h: +Drivers/CMSIS/Device/ST/STM32F0xx/Include/system_stm32f0xx.h: +Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal.h: +Core/Inc/stm32f0xx_hal_conf.h: +Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_rcc.h: +Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_def.h: +Drivers/STM32F0xx_HAL_Driver/Inc/Legacy/stm32_hal_legacy.h: +Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_rcc_ex.h: +Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_gpio.h: +Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_gpio_ex.h: +Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_exti.h: +Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_dma.h: +Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_dma_ex.h: +Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_cortex.h: +Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_adc.h: +Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_adc_ex.h: +Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_can.h: +Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_flash.h: +Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_flash_ex.h: +Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_i2c.h: +Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_i2c_ex.h: +Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_pwr.h: +Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_pwr_ex.h: +Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_tim.h: +Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_tim_ex.h: diff --git a/Software/build/system_stm32f0xx.lst b/Software/build/system_stm32f0xx.lst new file mode 100644 index 0000000..712b783 --- /dev/null +++ b/Software/build/system_stm32f0xx.lst @@ -0,0 +1,571 @@ +ARM GAS /tmp/ccDxas5Z.s page 1 + + + 1 .cpu cortex-m0 + 2 .arch armv6s-m + 3 .fpu softvfp + 4 .eabi_attribute 20, 1 + 5 .eabi_attribute 21, 1 + 6 .eabi_attribute 23, 3 + 7 .eabi_attribute 24, 1 + 8 .eabi_attribute 25, 1 + 9 .eabi_attribute 26, 1 + 10 .eabi_attribute 30, 1 + 11 .eabi_attribute 34, 0 + 12 .eabi_attribute 18, 4 + 13 .file "system_stm32f0xx.c" + 14 .text + 15 .Ltext0: + 16 .cfi_sections .debug_frame + 17 .file 1 "Core/Src/system_stm32f0xx.c" + 18 .section .text.SystemInit,"ax",%progbits + 19 .align 1 + 20 .global SystemInit + 21 .syntax unified + 22 .code 16 + 23 .thumb_func + 25 SystemInit: + 26 .LFB40: + 1:Core/Src/system_stm32f0xx.c **** /** + 2:Core/Src/system_stm32f0xx.c **** ****************************************************************************** + 3:Core/Src/system_stm32f0xx.c **** * @file system_stm32f0xx.c + 4:Core/Src/system_stm32f0xx.c **** * @author MCD Application Team + 5:Core/Src/system_stm32f0xx.c **** * @brief CMSIS Cortex-M0 Device Peripheral Access Layer System Source File. + 6:Core/Src/system_stm32f0xx.c **** * + 7:Core/Src/system_stm32f0xx.c **** * 1. This file provides two functions and one global variable to be called from + 8:Core/Src/system_stm32f0xx.c **** * user application: + 9:Core/Src/system_stm32f0xx.c **** * - SystemInit(): This function is called at startup just after reset and + 10:Core/Src/system_stm32f0xx.c **** * before branch to main program. This call is made inside + 11:Core/Src/system_stm32f0xx.c **** * the "startup_stm32f0xx.s" file. + 12:Core/Src/system_stm32f0xx.c **** * + 13:Core/Src/system_stm32f0xx.c **** * - SystemCoreClock variable: Contains the core clock (HCLK), it can be used + 14:Core/Src/system_stm32f0xx.c **** * by the user application to setup the SysTick + 15:Core/Src/system_stm32f0xx.c **** * timer or configure other parameters. + 16:Core/Src/system_stm32f0xx.c **** * + 17:Core/Src/system_stm32f0xx.c **** * - SystemCoreClockUpdate(): Updates the variable SystemCoreClock and must + 18:Core/Src/system_stm32f0xx.c **** * be called whenever the core clock is changed + 19:Core/Src/system_stm32f0xx.c **** * during program execution. + 20:Core/Src/system_stm32f0xx.c **** * + 21:Core/Src/system_stm32f0xx.c **** * + 22:Core/Src/system_stm32f0xx.c **** ****************************************************************************** + 23:Core/Src/system_stm32f0xx.c **** * @attention + 24:Core/Src/system_stm32f0xx.c **** * + 25:Core/Src/system_stm32f0xx.c **** * Copyright (c) 2016 STMicroelectronics. + 26:Core/Src/system_stm32f0xx.c **** * All rights reserved. + 27:Core/Src/system_stm32f0xx.c **** * + 28:Core/Src/system_stm32f0xx.c **** * This software is licensed under terms that can be found in the LICENSE file + 29:Core/Src/system_stm32f0xx.c **** * in the root directory of this software component. + 30:Core/Src/system_stm32f0xx.c **** * If no LICENSE file comes with this software, it is provided AS-IS. + 31:Core/Src/system_stm32f0xx.c **** * + 32:Core/Src/system_stm32f0xx.c **** ****************************************************************************** + ARM GAS /tmp/ccDxas5Z.s page 2 + + + 33:Core/Src/system_stm32f0xx.c **** */ + 34:Core/Src/system_stm32f0xx.c **** /** @addtogroup CMSIS + 35:Core/Src/system_stm32f0xx.c **** * @{ + 36:Core/Src/system_stm32f0xx.c **** */ + 37:Core/Src/system_stm32f0xx.c **** + 38:Core/Src/system_stm32f0xx.c **** /** @addtogroup stm32f0xx_system + 39:Core/Src/system_stm32f0xx.c **** * @{ + 40:Core/Src/system_stm32f0xx.c **** */ + 41:Core/Src/system_stm32f0xx.c **** + 42:Core/Src/system_stm32f0xx.c **** /** @addtogroup STM32F0xx_System_Private_Includes + 43:Core/Src/system_stm32f0xx.c **** * @{ + 44:Core/Src/system_stm32f0xx.c **** */ + 45:Core/Src/system_stm32f0xx.c **** + 46:Core/Src/system_stm32f0xx.c **** #include "stm32f0xx.h" + 47:Core/Src/system_stm32f0xx.c **** + 48:Core/Src/system_stm32f0xx.c **** /** + 49:Core/Src/system_stm32f0xx.c **** * @} + 50:Core/Src/system_stm32f0xx.c **** */ + 51:Core/Src/system_stm32f0xx.c **** + 52:Core/Src/system_stm32f0xx.c **** /** @addtogroup STM32F0xx_System_Private_TypesDefinitions + 53:Core/Src/system_stm32f0xx.c **** * @{ + 54:Core/Src/system_stm32f0xx.c **** */ + 55:Core/Src/system_stm32f0xx.c **** + 56:Core/Src/system_stm32f0xx.c **** /** + 57:Core/Src/system_stm32f0xx.c **** * @} + 58:Core/Src/system_stm32f0xx.c **** */ + 59:Core/Src/system_stm32f0xx.c **** + 60:Core/Src/system_stm32f0xx.c **** /** @addtogroup STM32F0xx_System_Private_Defines + 61:Core/Src/system_stm32f0xx.c **** * @{ + 62:Core/Src/system_stm32f0xx.c **** */ + 63:Core/Src/system_stm32f0xx.c **** #if !defined (HSE_VALUE) + 64:Core/Src/system_stm32f0xx.c **** #define HSE_VALUE ((uint32_t)8000000) /*!< Default value of the External oscillator in Hz. + 65:Core/Src/system_stm32f0xx.c **** This value can be provided and adapted by the user + 66:Core/Src/system_stm32f0xx.c **** #endif /* HSE_VALUE */ + 67:Core/Src/system_stm32f0xx.c **** + 68:Core/Src/system_stm32f0xx.c **** #if !defined (HSI_VALUE) + 69:Core/Src/system_stm32f0xx.c **** #define HSI_VALUE ((uint32_t)8000000) /*!< Default value of the Internal oscillator in Hz. + 70:Core/Src/system_stm32f0xx.c **** This value can be provided and adapted by the user + 71:Core/Src/system_stm32f0xx.c **** #endif /* HSI_VALUE */ + 72:Core/Src/system_stm32f0xx.c **** + 73:Core/Src/system_stm32f0xx.c **** #if !defined (HSI48_VALUE) + 74:Core/Src/system_stm32f0xx.c **** #define HSI48_VALUE ((uint32_t)48000000) /*!< Default value of the HSI48 Internal oscillator in + 75:Core/Src/system_stm32f0xx.c **** This value can be provided and adapted by the user + 76:Core/Src/system_stm32f0xx.c **** #endif /* HSI48_VALUE */ + 77:Core/Src/system_stm32f0xx.c **** /** + 78:Core/Src/system_stm32f0xx.c **** * @} + 79:Core/Src/system_stm32f0xx.c **** */ + 80:Core/Src/system_stm32f0xx.c **** + 81:Core/Src/system_stm32f0xx.c **** /** @addtogroup STM32F0xx_System_Private_Macros + 82:Core/Src/system_stm32f0xx.c **** * @{ + 83:Core/Src/system_stm32f0xx.c **** */ + 84:Core/Src/system_stm32f0xx.c **** + 85:Core/Src/system_stm32f0xx.c **** /** + 86:Core/Src/system_stm32f0xx.c **** * @} + 87:Core/Src/system_stm32f0xx.c **** */ + 88:Core/Src/system_stm32f0xx.c **** + 89:Core/Src/system_stm32f0xx.c **** /** @addtogroup STM32F0xx_System_Private_Variables + ARM GAS /tmp/ccDxas5Z.s page 3 + + + 90:Core/Src/system_stm32f0xx.c **** * @{ + 91:Core/Src/system_stm32f0xx.c **** */ + 92:Core/Src/system_stm32f0xx.c **** /* This variable is updated in three ways: + 93:Core/Src/system_stm32f0xx.c **** 1) by calling CMSIS function SystemCoreClockUpdate() + 94:Core/Src/system_stm32f0xx.c **** 2) by calling HAL API function HAL_RCC_GetHCLKFreq() + 95:Core/Src/system_stm32f0xx.c **** 3) each time HAL_RCC_ClockConfig() is called to configure the system clock frequency + 96:Core/Src/system_stm32f0xx.c **** Note: If you use this function to configure the system clock; then there + 97:Core/Src/system_stm32f0xx.c **** is no need to call the 2 first functions listed above, since SystemCoreClock + 98:Core/Src/system_stm32f0xx.c **** variable is updated automatically. + 99:Core/Src/system_stm32f0xx.c **** */ + 100:Core/Src/system_stm32f0xx.c **** uint32_t SystemCoreClock = 8000000; + 101:Core/Src/system_stm32f0xx.c **** + 102:Core/Src/system_stm32f0xx.c **** const uint8_t AHBPrescTable[16] = {0, 0, 0, 0, 0, 0, 0, 0, 1, 2, 3, 4, 6, 7, 8, 9}; + 103:Core/Src/system_stm32f0xx.c **** const uint8_t APBPrescTable[8] = {0, 0, 0, 0, 1, 2, 3, 4}; + 104:Core/Src/system_stm32f0xx.c **** + 105:Core/Src/system_stm32f0xx.c **** /** + 106:Core/Src/system_stm32f0xx.c **** * @} + 107:Core/Src/system_stm32f0xx.c **** */ + 108:Core/Src/system_stm32f0xx.c **** + 109:Core/Src/system_stm32f0xx.c **** /** @addtogroup STM32F0xx_System_Private_FunctionPrototypes + 110:Core/Src/system_stm32f0xx.c **** * @{ + 111:Core/Src/system_stm32f0xx.c **** */ + 112:Core/Src/system_stm32f0xx.c **** + 113:Core/Src/system_stm32f0xx.c **** /** + 114:Core/Src/system_stm32f0xx.c **** * @} + 115:Core/Src/system_stm32f0xx.c **** */ + 116:Core/Src/system_stm32f0xx.c **** + 117:Core/Src/system_stm32f0xx.c **** /** @addtogroup STM32F0xx_System_Private_Functions + 118:Core/Src/system_stm32f0xx.c **** * @{ + 119:Core/Src/system_stm32f0xx.c **** */ + 120:Core/Src/system_stm32f0xx.c **** + 121:Core/Src/system_stm32f0xx.c **** /** + 122:Core/Src/system_stm32f0xx.c **** * @brief Setup the microcontroller system + 123:Core/Src/system_stm32f0xx.c **** * @param None + 124:Core/Src/system_stm32f0xx.c **** * @retval None + 125:Core/Src/system_stm32f0xx.c **** */ + 126:Core/Src/system_stm32f0xx.c **** void SystemInit(void) + 127:Core/Src/system_stm32f0xx.c **** { + 27 .loc 1 127 1 view -0 + 28 .cfi_startproc + 29 @ args = 0, pretend = 0, frame = 0 + 30 @ frame_needed = 0, uses_anonymous_args = 0 + 31 @ link register save eliminated. + 128:Core/Src/system_stm32f0xx.c **** /* NOTE :SystemInit(): This function is called at startup just after reset and + 129:Core/Src/system_stm32f0xx.c **** before branch to main program. This call is made inside + 130:Core/Src/system_stm32f0xx.c **** the "startup_stm32f0xx.s" file. + 131:Core/Src/system_stm32f0xx.c **** User can setups the default system clock (System clock source, PLL Multipl + 132:Core/Src/system_stm32f0xx.c **** and Divider factors, AHB/APBx prescalers and Flash settings). + 133:Core/Src/system_stm32f0xx.c **** */ + 134:Core/Src/system_stm32f0xx.c **** } + 32 .loc 1 134 1 view .LVU1 + 33 @ sp needed + 34 0000 7047 bx lr + 35 .cfi_endproc + 36 .LFE40: + 38 .global __aeabi_uidiv + 39 .section .text.SystemCoreClockUpdate,"ax",%progbits + ARM GAS /tmp/ccDxas5Z.s page 4 + + + 40 .align 1 + 41 .global SystemCoreClockUpdate + 42 .syntax unified + 43 .code 16 + 44 .thumb_func + 46 SystemCoreClockUpdate: + 47 .LFB41: + 135:Core/Src/system_stm32f0xx.c **** + 136:Core/Src/system_stm32f0xx.c **** /** + 137:Core/Src/system_stm32f0xx.c **** * @brief Update SystemCoreClock variable according to Clock Register Values. + 138:Core/Src/system_stm32f0xx.c **** * The SystemCoreClock variable contains the core clock (HCLK), it can + 139:Core/Src/system_stm32f0xx.c **** * be used by the user application to setup the SysTick timer or configure + 140:Core/Src/system_stm32f0xx.c **** * other parameters. + 141:Core/Src/system_stm32f0xx.c **** * + 142:Core/Src/system_stm32f0xx.c **** * @note Each time the core clock (HCLK) changes, this function must be called + 143:Core/Src/system_stm32f0xx.c **** * to update SystemCoreClock variable value. Otherwise, any configuration + 144:Core/Src/system_stm32f0xx.c **** * based on this variable will be incorrect. + 145:Core/Src/system_stm32f0xx.c **** * + 146:Core/Src/system_stm32f0xx.c **** * @note - The system frequency computed by this function is not the real + 147:Core/Src/system_stm32f0xx.c **** * frequency in the chip. It is calculated based on the predefined + 148:Core/Src/system_stm32f0xx.c **** * constant and the selected clock source: + 149:Core/Src/system_stm32f0xx.c **** * + 150:Core/Src/system_stm32f0xx.c **** * - If SYSCLK source is HSI, SystemCoreClock will contain the HSI_VALUE(*) + 151:Core/Src/system_stm32f0xx.c **** * + 152:Core/Src/system_stm32f0xx.c **** * - If SYSCLK source is HSE, SystemCoreClock will contain the HSE_VALUE(**) + 153:Core/Src/system_stm32f0xx.c **** * + 154:Core/Src/system_stm32f0xx.c **** * - If SYSCLK source is PLL, SystemCoreClock will contain the HSE_VALUE(**) + 155:Core/Src/system_stm32f0xx.c **** * or HSI_VALUE(*) multiplied/divided by the PLL factors. + 156:Core/Src/system_stm32f0xx.c **** * + 157:Core/Src/system_stm32f0xx.c **** * - If SYSCLK source is HSI48, SystemCoreClock will contain the HSI48_VALUE(***) + 158:Core/Src/system_stm32f0xx.c **** * + 159:Core/Src/system_stm32f0xx.c **** * (*) HSI_VALUE is a constant defined in stm32f0xx_hal_conf.h file (default value + 160:Core/Src/system_stm32f0xx.c **** * 8 MHz) but the real value may vary depending on the variations + 161:Core/Src/system_stm32f0xx.c **** * in voltage and temperature. + 162:Core/Src/system_stm32f0xx.c **** * + 163:Core/Src/system_stm32f0xx.c **** * (**) HSE_VALUE is a constant defined in stm32f0xx_hal_conf.h file (its value + 164:Core/Src/system_stm32f0xx.c **** * depends on the application requirements), user has to ensure that HSE_VALUE + 165:Core/Src/system_stm32f0xx.c **** * is same as the real frequency of the crystal used. Otherwise, this function + 166:Core/Src/system_stm32f0xx.c **** * may have wrong result. + 167:Core/Src/system_stm32f0xx.c **** * + 168:Core/Src/system_stm32f0xx.c **** * (***) HSI48_VALUE is a constant defined in stm32f0xx_hal_conf.h file (default value + 169:Core/Src/system_stm32f0xx.c **** * 48 MHz) but the real value may vary depending on the variations + 170:Core/Src/system_stm32f0xx.c **** * in voltage and temperature. + 171:Core/Src/system_stm32f0xx.c **** * + 172:Core/Src/system_stm32f0xx.c **** * - The result of this function could be not correct when using fractional + 173:Core/Src/system_stm32f0xx.c **** * value for HSE crystal. + 174:Core/Src/system_stm32f0xx.c **** * + 175:Core/Src/system_stm32f0xx.c **** * @param None + 176:Core/Src/system_stm32f0xx.c **** * @retval None + 177:Core/Src/system_stm32f0xx.c **** */ + 178:Core/Src/system_stm32f0xx.c **** void SystemCoreClockUpdate (void) + 179:Core/Src/system_stm32f0xx.c **** { + 48 .loc 1 179 1 view -0 + 49 .cfi_startproc + 50 @ args = 0, pretend = 0, frame = 0 + 51 @ frame_needed = 0, uses_anonymous_args = 0 + 52 0000 10B5 push {r4, lr} + ARM GAS /tmp/ccDxas5Z.s page 5 + + + 53 .cfi_def_cfa_offset 8 + 54 .cfi_offset 4, -8 + 55 .cfi_offset 14, -4 + 180:Core/Src/system_stm32f0xx.c **** uint32_t tmp = 0, pllmull = 0, pllsource = 0, predivfactor = 0; + 56 .loc 1 180 3 view .LVU3 + 57 .LVL0: + 181:Core/Src/system_stm32f0xx.c **** + 182:Core/Src/system_stm32f0xx.c **** /* Get SYSCLK source -------------------------------------------------------*/ + 183:Core/Src/system_stm32f0xx.c **** tmp = RCC->CFGR & RCC_CFGR_SWS; + 58 .loc 1 183 3 view .LVU4 + 59 .loc 1 183 12 is_stmt 0 view .LVU5 + 60 0002 254B ldr r3, .L11 + 61 0004 5A68 ldr r2, [r3, #4] + 62 .loc 1 183 7 view .LVU6 + 63 0006 0C23 movs r3, #12 + 64 0008 1340 ands r3, r2 + 65 .LVL1: + 184:Core/Src/system_stm32f0xx.c **** + 185:Core/Src/system_stm32f0xx.c **** switch (tmp) + 66 .loc 1 185 3 is_stmt 1 view .LVU7 + 67 000a 042B cmp r3, #4 + 68 000c 12D0 beq .L3 + 69 000e 082B cmp r3, #8 + 70 0010 14D0 beq .L4 + 71 0012 002B cmp r3, #0 + 72 0014 3CD1 bne .L5 + 186:Core/Src/system_stm32f0xx.c **** { + 187:Core/Src/system_stm32f0xx.c **** case RCC_CFGR_SWS_HSI: /* HSI used as system clock */ + 188:Core/Src/system_stm32f0xx.c **** SystemCoreClock = HSI_VALUE; + 73 .loc 1 188 7 view .LVU8 + 74 .loc 1 188 23 is_stmt 0 view .LVU9 + 75 0016 214B ldr r3, .L11+4 + 76 .LVL2: + 77 .loc 1 188 23 view .LVU10 + 78 0018 214A ldr r2, .L11+8 + 79 .LVL3: + 80 .loc 1 188 23 view .LVU11 + 81 001a 1A60 str r2, [r3] + 189:Core/Src/system_stm32f0xx.c **** break; + 82 .loc 1 189 7 is_stmt 1 view .LVU12 + 83 .LVL4: + 84 .L6: + 190:Core/Src/system_stm32f0xx.c **** case RCC_CFGR_SWS_HSE: /* HSE used as system clock */ + 191:Core/Src/system_stm32f0xx.c **** SystemCoreClock = HSE_VALUE; + 192:Core/Src/system_stm32f0xx.c **** break; + 193:Core/Src/system_stm32f0xx.c **** case RCC_CFGR_SWS_PLL: /* PLL used as system clock */ + 194:Core/Src/system_stm32f0xx.c **** /* Get PLL clock source and multiplication factor ----------------------*/ + 195:Core/Src/system_stm32f0xx.c **** pllmull = RCC->CFGR & RCC_CFGR_PLLMUL; + 196:Core/Src/system_stm32f0xx.c **** pllsource = RCC->CFGR & RCC_CFGR_PLLSRC; + 197:Core/Src/system_stm32f0xx.c **** pllmull = ( pllmull >> 18) + 2; + 198:Core/Src/system_stm32f0xx.c **** predivfactor = (RCC->CFGR2 & RCC_CFGR2_PREDIV) + 1; + 199:Core/Src/system_stm32f0xx.c **** + 200:Core/Src/system_stm32f0xx.c **** if (pllsource == RCC_CFGR_PLLSRC_HSE_PREDIV) + 201:Core/Src/system_stm32f0xx.c **** { + 202:Core/Src/system_stm32f0xx.c **** /* HSE used as PLL clock source : SystemCoreClock = HSE/PREDIV * PLLMUL */ + 203:Core/Src/system_stm32f0xx.c **** SystemCoreClock = (HSE_VALUE/predivfactor) * pllmull; + 204:Core/Src/system_stm32f0xx.c **** } + ARM GAS /tmp/ccDxas5Z.s page 6 + + + 205:Core/Src/system_stm32f0xx.c **** #if defined(STM32F042x6) || defined(STM32F048xx) || defined(STM32F071xB) || defined(STM32F072xB) || + 206:Core/Src/system_stm32f0xx.c **** else if (pllsource == RCC_CFGR_PLLSRC_HSI48_PREDIV) + 207:Core/Src/system_stm32f0xx.c **** { + 208:Core/Src/system_stm32f0xx.c **** /* HSI48 used as PLL clock source : SystemCoreClock = HSI48/PREDIV * PLLMUL */ + 209:Core/Src/system_stm32f0xx.c **** SystemCoreClock = (HSI48_VALUE/predivfactor) * pllmull; + 210:Core/Src/system_stm32f0xx.c **** } + 211:Core/Src/system_stm32f0xx.c **** #endif /* STM32F042x6 || STM32F048xx || STM32F071xB || STM32F072xB || STM32F078xx || STM32F091xC || + 212:Core/Src/system_stm32f0xx.c **** else + 213:Core/Src/system_stm32f0xx.c **** { + 214:Core/Src/system_stm32f0xx.c **** #if defined(STM32F042x6) || defined(STM32F048xx) || defined(STM32F070x6) \ + 215:Core/Src/system_stm32f0xx.c **** || defined(STM32F078xx) || defined(STM32F071xB) || defined(STM32F072xB) \ + 216:Core/Src/system_stm32f0xx.c **** || defined(STM32F070xB) || defined(STM32F091xC) || defined(STM32F098xx) || defined(STM32F030xC) + 217:Core/Src/system_stm32f0xx.c **** /* HSI used as PLL clock source : SystemCoreClock = HSI/PREDIV * PLLMUL */ + 218:Core/Src/system_stm32f0xx.c **** SystemCoreClock = (HSI_VALUE/predivfactor) * pllmull; + 219:Core/Src/system_stm32f0xx.c **** #else + 220:Core/Src/system_stm32f0xx.c **** /* HSI used as PLL clock source : SystemCoreClock = HSI/2 * PLLMUL */ + 221:Core/Src/system_stm32f0xx.c **** SystemCoreClock = (HSI_VALUE >> 1) * pllmull; + 222:Core/Src/system_stm32f0xx.c **** #endif /* STM32F042x6 || STM32F048xx || STM32F070x6 || + 223:Core/Src/system_stm32f0xx.c **** STM32F071xB || STM32F072xB || STM32F078xx || STM32F070xB || + 224:Core/Src/system_stm32f0xx.c **** STM32F091xC || STM32F098xx || STM32F030xC */ + 225:Core/Src/system_stm32f0xx.c **** } + 226:Core/Src/system_stm32f0xx.c **** break; + 227:Core/Src/system_stm32f0xx.c **** default: /* HSI used as system clock */ + 228:Core/Src/system_stm32f0xx.c **** SystemCoreClock = HSI_VALUE; + 229:Core/Src/system_stm32f0xx.c **** break; + 230:Core/Src/system_stm32f0xx.c **** } + 231:Core/Src/system_stm32f0xx.c **** /* Compute HCLK clock frequency ----------------*/ + 232:Core/Src/system_stm32f0xx.c **** /* Get HCLK prescaler */ + 233:Core/Src/system_stm32f0xx.c **** tmp = AHBPrescTable[((RCC->CFGR & RCC_CFGR_HPRE) >> 4)]; + 85 .loc 1 233 3 view .LVU13 + 86 .loc 1 233 28 is_stmt 0 view .LVU14 + 87 001c 1E4B ldr r3, .L11 + 88 001e 5A68 ldr r2, [r3, #4] + 89 .loc 1 233 52 view .LVU15 + 90 0020 1209 lsrs r2, r2, #4 + 91 0022 0F23 movs r3, #15 + 92 0024 1340 ands r3, r2 + 93 .loc 1 233 22 view .LVU16 + 94 0026 1F4A ldr r2, .L11+12 + 95 0028 D15C ldrb r1, [r2, r3] + 96 .LVL5: + 234:Core/Src/system_stm32f0xx.c **** /* HCLK clock frequency */ + 235:Core/Src/system_stm32f0xx.c **** SystemCoreClock >>= tmp; + 97 .loc 1 235 3 is_stmt 1 view .LVU17 + 98 .loc 1 235 19 is_stmt 0 view .LVU18 + 99 002a 1C4A ldr r2, .L11+4 + 100 002c 1368 ldr r3, [r2] + 101 002e CB40 lsrs r3, r3, r1 + 102 0030 1360 str r3, [r2] + 236:Core/Src/system_stm32f0xx.c **** } + 103 .loc 1 236 1 view .LVU19 + 104 @ sp needed + 105 0032 10BD pop {r4, pc} + 106 .LVL6: + 107 .L3: + 191:Core/Src/system_stm32f0xx.c **** break; + 108 .loc 1 191 7 is_stmt 1 view .LVU20 + ARM GAS /tmp/ccDxas5Z.s page 7 + + + 191:Core/Src/system_stm32f0xx.c **** break; + 109 .loc 1 191 23 is_stmt 0 view .LVU21 + 110 0034 194B ldr r3, .L11+4 + 111 .LVL7: + 191:Core/Src/system_stm32f0xx.c **** break; + 112 .loc 1 191 23 view .LVU22 + 113 0036 1A4A ldr r2, .L11+8 + 114 .LVL8: + 191:Core/Src/system_stm32f0xx.c **** break; + 115 .loc 1 191 23 view .LVU23 + 116 0038 1A60 str r2, [r3] + 192:Core/Src/system_stm32f0xx.c **** case RCC_CFGR_SWS_PLL: /* PLL used as system clock */ + 117 .loc 1 192 7 is_stmt 1 view .LVU24 + 118 003a EFE7 b .L6 + 119 .LVL9: + 120 .L4: + 195:Core/Src/system_stm32f0xx.c **** pllsource = RCC->CFGR & RCC_CFGR_PLLSRC; + 121 .loc 1 195 7 view .LVU25 + 195:Core/Src/system_stm32f0xx.c **** pllsource = RCC->CFGR & RCC_CFGR_PLLSRC; + 122 .loc 1 195 20 is_stmt 0 view .LVU26 + 123 003c 164A ldr r2, .L11 + 124 003e 5068 ldr r0, [r2, #4] + 125 .LVL10: + 196:Core/Src/system_stm32f0xx.c **** pllmull = ( pllmull >> 18) + 2; + 126 .loc 1 196 7 is_stmt 1 view .LVU27 + 196:Core/Src/system_stm32f0xx.c **** pllmull = ( pllmull >> 18) + 2; + 127 .loc 1 196 22 is_stmt 0 view .LVU28 + 128 0040 5368 ldr r3, [r2, #4] + 129 .LVL11: + 196:Core/Src/system_stm32f0xx.c **** pllmull = ( pllmull >> 18) + 2; + 130 .loc 1 196 17 view .LVU29 + 131 0042 C021 movs r1, #192 + 132 0044 4902 lsls r1, r1, #9 + 133 0046 0B40 ands r3, r1 + 134 .LVL12: + 197:Core/Src/system_stm32f0xx.c **** predivfactor = (RCC->CFGR2 & RCC_CFGR2_PREDIV) + 1; + 135 .loc 1 197 7 is_stmt 1 view .LVU30 + 197:Core/Src/system_stm32f0xx.c **** predivfactor = (RCC->CFGR2 & RCC_CFGR2_PREDIV) + 1; + 136 .loc 1 197 27 is_stmt 0 view .LVU31 + 137 0048 800C lsrs r0, r0, #18 + 138 .LVL13: + 197:Core/Src/system_stm32f0xx.c **** predivfactor = (RCC->CFGR2 & RCC_CFGR2_PREDIV) + 1; + 139 .loc 1 197 27 view .LVU32 + 140 004a 0F21 movs r1, #15 + 141 004c 0840 ands r0, r1 + 197:Core/Src/system_stm32f0xx.c **** predivfactor = (RCC->CFGR2 & RCC_CFGR2_PREDIV) + 1; + 142 .loc 1 197 15 view .LVU33 + 143 004e 841C adds r4, r0, #2 + 144 .LVL14: + 198:Core/Src/system_stm32f0xx.c **** + 145 .loc 1 198 7 is_stmt 1 view .LVU34 + 198:Core/Src/system_stm32f0xx.c **** + 146 .loc 1 198 26 is_stmt 0 view .LVU35 + 147 0050 D26A ldr r2, [r2, #44] + 198:Core/Src/system_stm32f0xx.c **** + 148 .loc 1 198 34 view .LVU36 + 149 0052 1140 ands r1, r2 + ARM GAS /tmp/ccDxas5Z.s page 8 + + + 198:Core/Src/system_stm32f0xx.c **** + 150 .loc 1 198 20 view .LVU37 + 151 0054 0131 adds r1, r1, #1 + 152 .LVL15: + 200:Core/Src/system_stm32f0xx.c **** { + 153 .loc 1 200 7 is_stmt 1 view .LVU38 + 200:Core/Src/system_stm32f0xx.c **** { + 154 .loc 1 200 10 is_stmt 0 view .LVU39 + 155 0056 8022 movs r2, #128 + 156 0058 5202 lsls r2, r2, #9 + 157 005a 9342 cmp r3, r2 + 158 005c 0AD0 beq .L9 + 206:Core/Src/system_stm32f0xx.c **** { + 159 .loc 1 206 12 is_stmt 1 view .LVU40 + 206:Core/Src/system_stm32f0xx.c **** { + 160 .loc 1 206 15 is_stmt 0 view .LVU41 + 161 005e C022 movs r2, #192 + 162 0060 5202 lsls r2, r2, #9 + 163 0062 9342 cmp r3, r2 + 164 0064 0DD0 beq .L10 + 218:Core/Src/system_stm32f0xx.c **** #else + 165 .loc 1 218 9 is_stmt 1 view .LVU42 + 218:Core/Src/system_stm32f0xx.c **** #else + 166 .loc 1 218 37 is_stmt 0 view .LVU43 + 167 0066 0E48 ldr r0, .L11+8 + 168 0068 FFF7FEFF bl __aeabi_uidiv + 169 .LVL16: + 218:Core/Src/system_stm32f0xx.c **** #else + 170 .loc 1 218 52 view .LVU44 + 171 006c 6043 muls r0, r4 + 218:Core/Src/system_stm32f0xx.c **** #else + 172 .loc 1 218 25 view .LVU45 + 173 006e 0B4B ldr r3, .L11+4 + 174 0070 1860 str r0, [r3] + 175 0072 D3E7 b .L6 + 176 .LVL17: + 177 .L9: + 203:Core/Src/system_stm32f0xx.c **** } + 178 .loc 1 203 9 is_stmt 1 view .LVU46 + 203:Core/Src/system_stm32f0xx.c **** } + 179 .loc 1 203 37 is_stmt 0 view .LVU47 + 180 0074 0A48 ldr r0, .L11+8 + 181 0076 FFF7FEFF bl __aeabi_uidiv + 182 .LVL18: + 203:Core/Src/system_stm32f0xx.c **** } + 183 .loc 1 203 52 view .LVU48 + 184 007a 6043 muls r0, r4 + 203:Core/Src/system_stm32f0xx.c **** } + 185 .loc 1 203 25 view .LVU49 + 186 007c 074B ldr r3, .L11+4 + 187 007e 1860 str r0, [r3] + 188 0080 CCE7 b .L6 + 189 .LVL19: + 190 .L10: + 209:Core/Src/system_stm32f0xx.c **** } + 191 .loc 1 209 9 is_stmt 1 view .LVU50 + 209:Core/Src/system_stm32f0xx.c **** } + ARM GAS /tmp/ccDxas5Z.s page 9 + + + 192 .loc 1 209 39 is_stmt 0 view .LVU51 + 193 0082 0948 ldr r0, .L11+16 + 194 0084 FFF7FEFF bl __aeabi_uidiv + 195 .LVL20: + 209:Core/Src/system_stm32f0xx.c **** } + 196 .loc 1 209 54 view .LVU52 + 197 0088 6043 muls r0, r4 + 209:Core/Src/system_stm32f0xx.c **** } + 198 .loc 1 209 25 view .LVU53 + 199 008a 044B ldr r3, .L11+4 + 200 008c 1860 str r0, [r3] + 201 008e C5E7 b .L6 + 202 .LVL21: + 203 .L5: + 228:Core/Src/system_stm32f0xx.c **** break; + 204 .loc 1 228 7 is_stmt 1 view .LVU54 + 228:Core/Src/system_stm32f0xx.c **** break; + 205 .loc 1 228 23 is_stmt 0 view .LVU55 + 206 0090 024B ldr r3, .L11+4 + 207 .LVL22: + 228:Core/Src/system_stm32f0xx.c **** break; + 208 .loc 1 228 23 view .LVU56 + 209 0092 034A ldr r2, .L11+8 + 210 .LVL23: + 228:Core/Src/system_stm32f0xx.c **** break; + 211 .loc 1 228 23 view .LVU57 + 212 0094 1A60 str r2, [r3] + 229:Core/Src/system_stm32f0xx.c **** } + 213 .loc 1 229 7 is_stmt 1 view .LVU58 + 214 0096 C1E7 b .L6 + 215 .L12: + 216 .align 2 + 217 .L11: + 218 0098 00100240 .word 1073876992 + 219 009c 00000000 .word SystemCoreClock + 220 00a0 00127A00 .word 8000000 + 221 00a4 00000000 .word AHBPrescTable + 222 00a8 006CDC02 .word 48000000 + 223 .cfi_endproc + 224 .LFE41: + 226 .global APBPrescTable + 227 .section .rodata.APBPrescTable,"a" + 228 .align 2 + 231 APBPrescTable: + 232 0000 00000000 .ascii "\000\000\000\000\001\002\003\004" + 232 01020304 + 233 .global AHBPrescTable + 234 .section .rodata.AHBPrescTable,"a" + 235 .align 2 + 238 AHBPrescTable: + 239 0000 00000000 .ascii "\000\000\000\000\000\000\000\000\001\002\003\004\006" + 239 00000000 + 239 01020304 + 239 06 + 240 000d 070809 .ascii "\007\010\011" + 241 .global SystemCoreClock + 242 .section .data.SystemCoreClock,"aw" + ARM GAS /tmp/ccDxas5Z.s page 10 + + + 243 .align 2 + 246 SystemCoreClock: + 247 0000 00127A00 .word 8000000 + 248 .text + 249 .Letext0: + 250 .file 2 "/home/chiangni/.config/VSCodium/User/globalStorage/bmd.stm32-for-vscode/@xpack-dev-tools/ + 251 .file 3 "/home/chiangni/.config/VSCodium/User/globalStorage/bmd.stm32-for-vscode/@xpack-dev-tools/ + 252 .file 4 "Drivers/CMSIS/Device/ST/STM32F0xx/Include/system_stm32f0xx.h" + 253 .file 5 "Drivers/CMSIS/Device/ST/STM32F0xx/Include/stm32f042x6.h" + ARM GAS /tmp/ccDxas5Z.s page 11 + + +DEFINED SYMBOLS + *ABS*:00000000 system_stm32f0xx.c + /tmp/ccDxas5Z.s:19 .text.SystemInit:00000000 $t + /tmp/ccDxas5Z.s:25 .text.SystemInit:00000000 SystemInit + /tmp/ccDxas5Z.s:40 .text.SystemCoreClockUpdate:00000000 $t + /tmp/ccDxas5Z.s:46 .text.SystemCoreClockUpdate:00000000 SystemCoreClockUpdate + /tmp/ccDxas5Z.s:218 .text.SystemCoreClockUpdate:00000098 $d + /tmp/ccDxas5Z.s:246 .data.SystemCoreClock:00000000 SystemCoreClock + /tmp/ccDxas5Z.s:238 .rodata.AHBPrescTable:00000000 AHBPrescTable + /tmp/ccDxas5Z.s:231 .rodata.APBPrescTable:00000000 APBPrescTable + /tmp/ccDxas5Z.s:228 .rodata.APBPrescTable:00000000 $d + /tmp/ccDxas5Z.s:235 .rodata.AHBPrescTable:00000000 $d + /tmp/ccDxas5Z.s:243 .data.SystemCoreClock:00000000 $d + +UNDEFINED SYMBOLS +__aeabi_uidiv diff --git a/Software/build/system_stm32f0xx.o b/Software/build/system_stm32f0xx.o new file mode 100644 index 0000000..6e513d9 Binary files /dev/null and b/Software/build/system_stm32f0xx.o differ diff --git a/Software/compile_commands.json b/Software/compile_commands.json new file mode 100644 index 0000000..59be623 --- /dev/null +++ b/Software/compile_commands.json @@ -0,0 +1,739 @@ +[ + { + "arguments": [ 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@@ +#OpenOCD configuration file, generated by STM32 for VSCode + +# Programmer, can be changed to several interfaces +# Standard will be the stlink interface as this is the standard for STM32 dev boards +source [find interface/stlink.cfg] + +# The target MCU. This should match your board +source [find target/stm32f0x.cfg]