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This commit is contained in:
Johnny Hsu
2024-11-03 14:57:15 +01:00
parent 54e4414260
commit 5a9391a692
75 changed files with 116787 additions and 17 deletions
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60
Software/build/debug/Core/Src/adc.d Normal file
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build/debug/Core/Src/adc.o: Core/Src/adc.c Core/Lib/can-halal/can-halal.h \
Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal.h \
Core/Inc/stm32f0xx_hal_conf.h \
Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_rcc.h \
Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_def.h \
Drivers/CMSIS/Device/ST/STM32F0xx/Include/stm32f0xx.h \
Drivers/CMSIS/Device/ST/STM32F0xx/Include/stm32f042x6.h \
Drivers/CMSIS/Include/core_cm0.h Drivers/CMSIS/Include/cmsis_version.h \
Drivers/CMSIS/Include/cmsis_compiler.h Drivers/CMSIS/Include/cmsis_gcc.h \
Drivers/CMSIS/Device/ST/STM32F0xx/Include/system_stm32f0xx.h \
Drivers/STM32F0xx_HAL_Driver/Inc/Legacy/stm32_hal_legacy.h \
Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_rcc_ex.h \
Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_gpio.h \
Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_gpio_ex.h \
Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_exti.h \
Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_dma.h \
Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_dma_ex.h \
Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_cortex.h \
Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_adc.h \
Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_adc_ex.h \
Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_can.h \
Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_flash.h \
Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_flash_ex.h \
Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_i2c.h \
Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_i2c_ex.h \
Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_pwr.h \
Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_pwr_ex.h \
Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_tim.h \
Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_tim_ex.h
Core/Lib/can-halal/can-halal.h:
Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal.h:
Core/Inc/stm32f0xx_hal_conf.h:
Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_rcc.h:
Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_def.h:
Drivers/CMSIS/Device/ST/STM32F0xx/Include/stm32f0xx.h:
Drivers/CMSIS/Device/ST/STM32F0xx/Include/stm32f042x6.h:
Drivers/CMSIS/Include/core_cm0.h:
Drivers/CMSIS/Include/cmsis_version.h:
Drivers/CMSIS/Include/cmsis_compiler.h:
Drivers/CMSIS/Include/cmsis_gcc.h:
Drivers/CMSIS/Device/ST/STM32F0xx/Include/system_stm32f0xx.h:
Drivers/STM32F0xx_HAL_Driver/Inc/Legacy/stm32_hal_legacy.h:
Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_rcc_ex.h:
Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_gpio.h:
Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_gpio_ex.h:
Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_exti.h:
Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_dma.h:
Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_dma_ex.h:
Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_cortex.h:
Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_adc.h:
Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_adc_ex.h:
Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_can.h:
Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_flash.h:
Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_flash_ex.h:
Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_i2c.h:
Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_i2c_ex.h:
Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_pwr.h:
Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_pwr_ex.h:
Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_tim.h:
Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_tim_ex.h:

225
Software/build/debug/Core/Src/adc.lst Normal file
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ARM GAS /tmp/ccZUAizG.s page 1
1 .cpu cortex-m0
2 .arch armv6s-m
3 .fpu softvfp
4 .eabi_attribute 20, 1
5 .eabi_attribute 21, 1
6 .eabi_attribute 23, 3
7 .eabi_attribute 24, 1
8 .eabi_attribute 25, 1
9 .eabi_attribute 26, 1
10 .eabi_attribute 30, 1
11 .eabi_attribute 34, 0
12 .eabi_attribute 18, 4
13 .file "adc.c"
14 .text
15 .Ltext0:
16 .cfi_sections .debug_frame
17 .file 1 "Core/Src/adc.c"
18 .section .text.adc_init,"ax",%progbits
19 .align 1
20 .global adc_init
21 .syntax unified
22 .code 16
23 .thumb_func
25 adc_init:
26 .LVL0:
27 .LFB40:
1:Core/Src/adc.c **** #include <stdint.h>
2:Core/Src/adc.c ****
3:Core/Src/adc.c **** #include "can-halal.h"
4:Core/Src/adc.c **** #include "stm32f0xx_hal_adc.h"
5:Core/Src/adc.c ****
6:Core/Src/adc.c **** int16_t id = 0x200;
7:Core/Src/adc.c **** int32_t adcRes = 0;
8:Core/Src/adc.c ****
9:Core/Src/adc.c **** void adc_init(ADC_HandleTypeDef* hadc){
28 .loc 1 9 39 view -0
29 .cfi_startproc
30 @ args = 0, pretend = 0, frame = 0
31 @ frame_needed = 0, uses_anonymous_args = 0
32 .loc 1 9 39 is_stmt 0 view .LVU1
33 0000 10B5 push {r4, lr}
34 .cfi_def_cfa_offset 8
35 .cfi_offset 4, -8
36 .cfi_offset 14, -4
10:Core/Src/adc.c **** HAL_ADCEx_Calibration_Start(hadc);
37 .loc 1 10 5 is_stmt 1 view .LVU2
38 0002 FFF7FEFF bl HAL_ADCEx_Calibration_Start
39 .LVL1:
11:Core/Src/adc.c **** }
40 .loc 1 11 1 is_stmt 0 view .LVU3
41 @ sp needed
42 0006 10BD pop {r4, pc}
43 .cfi_endproc
44 .LFE40:
46 .section .text.adc_loop,"ax",%progbits
47 .align 1
48 .global adc_loop
ARM GAS /tmp/ccZUAizG.s page 2
49 .syntax unified
50 .code 16
51 .thumb_func
53 adc_loop:
54 .LVL2:
55 .LFB41:
12:Core/Src/adc.c ****
13:Core/Src/adc.c **** void adc_loop(ADC_HandleTypeDef* hadc){
56 .loc 1 13 39 is_stmt 1 view -0
57 .cfi_startproc
58 @ args = 0, pretend = 0, frame = 0
59 @ frame_needed = 0, uses_anonymous_args = 0
60 .loc 1 13 39 is_stmt 0 view .LVU5
61 0000 10B5 push {r4, lr}
62 .cfi_def_cfa_offset 8
63 .cfi_offset 4, -8
64 .cfi_offset 14, -4
65 0002 82B0 sub sp, sp, #8
66 .cfi_def_cfa_offset 16
14:Core/Src/adc.c **** HAL_ADC_Start_IT(hadc);
67 .loc 1 14 5 is_stmt 1 view .LVU6
68 0004 FFF7FEFF bl HAL_ADC_Start_IT
69 .LVL3:
15:Core/Src/adc.c **** static uint8_t data[8];
70 .loc 1 15 5 view .LVU7
16:Core/Src/adc.c **** ftcan_marshal_unsigned(data, adcRes, 4);
71 .loc 1 16 5 view .LVU8
72 0008 094B ldr r3, .L3
73 000a 1A68 ldr r2, [r3]
74 000c D317 asrs r3, r2, #31
75 000e 094C ldr r4, .L3+4
76 0010 0421 movs r1, #4
77 0012 0091 str r1, [sp]
78 0014 2000 movs r0, r4
79 0016 FFF7FEFF bl ftcan_marshal_unsigned
80 .LVL4:
17:Core/Src/adc.c **** ftcan_transmit(id, data, sizeof(data));
81 .loc 1 17 5 view .LVU9
82 001a 074B ldr r3, .L3+8
83 001c 1888 ldrh r0, [r3]
84 001e 0822 movs r2, #8
85 0020 2100 movs r1, r4
86 0022 FFF7FEFF bl ftcan_transmit
87 .LVL5:
18:Core/Src/adc.c **** HAL_Delay(5);
88 .loc 1 18 5 view .LVU10
89 0026 0520 movs r0, #5
90 0028 FFF7FEFF bl HAL_Delay
91 .LVL6:
19:Core/Src/adc.c **** //testing gitignore
20:Core/Src/adc.c **** }
92 .loc 1 20 1 is_stmt 0 view .LVU11
93 002c 02B0 add sp, sp, #8
94 @ sp needed
95 002e 10BD pop {r4, pc}
96 .L4:
97 .align 2
ARM GAS /tmp/ccZUAizG.s page 3
98 .L3:
99 0030 00000000 .word adcRes
100 0034 00000000 .word data.0
101 0038 00000000 .word id
102 .cfi_endproc
103 .LFE41:
105 .section .text.HAL_ADC_ConvCpltCallback,"ax",%progbits
106 .align 1
107 .global HAL_ADC_ConvCpltCallback
108 .syntax unified
109 .code 16
110 .thumb_func
112 HAL_ADC_ConvCpltCallback:
113 .LVL7:
114 .LFB42:
21:Core/Src/adc.c ****
22:Core/Src/adc.c **** void HAL_ADC_ConvCpltCallback(ADC_HandleTypeDef* hadc){
115 .loc 1 22 55 is_stmt 1 view -0
116 .cfi_startproc
117 @ args = 0, pretend = 0, frame = 0
118 @ frame_needed = 0, uses_anonymous_args = 0
119 .loc 1 22 55 is_stmt 0 view .LVU13
120 0000 10B5 push {r4, lr}
121 .cfi_def_cfa_offset 8
122 .cfi_offset 4, -8
123 .cfi_offset 14, -4
23:Core/Src/adc.c **** adcRes = HAL_ADC_GetValue(hadc);
124 .loc 1 23 5 is_stmt 1 view .LVU14
125 .loc 1 23 14 is_stmt 0 view .LVU15
126 0002 FFF7FEFF bl HAL_ADC_GetValue
127 .LVL8:
128 .loc 1 23 12 discriminator 1 view .LVU16
129 0006 014B ldr r3, .L6
130 0008 1860 str r0, [r3]
24:Core/Src/adc.c **** }...
131 .loc 1 24 1 view .LVU17
132 @ sp needed
133 000a 10BD pop {r4, pc}
134 .L7:
135 .align 2
136 .L6:
137 000c 00000000 .word adcRes
138 .cfi_endproc
139 .LFE42:
141 .section .bss.data.0,"aw",%nobits
142 .align 2
145 data.0:
146 0000 00000000 .space 8
146 00000000
147 .global adcRes
148 .section .bss.adcRes,"aw",%nobits
149 .align 2
152 adcRes:
153 0000 00000000 .space 4
154 .global id
155 .section .data.id,"aw"
156 .align 1
ARM GAS /tmp/ccZUAizG.s page 4
159 id:
160 0000 0002 .short 512
161 .text
162 .Letext0:
163 .file 2 "/home/chiangni/.config/Code/User/globalStorage/bmd.stm32-for-vscode/@xpack-dev-tools/arm-
164 .file 3 "/home/chiangni/.config/Code/User/globalStorage/bmd.stm32-for-vscode/@xpack-dev-tools/arm-
165 .file 4 "Drivers/CMSIS/Device/ST/STM32F0xx/Include/stm32f042x6.h"
166 .file 5 "Drivers/CMSIS/Device/ST/STM32F0xx/Include/stm32f0xx.h"
167 .file 6 "/home/chiangni/.config/Code/User/globalStorage/bmd.stm32-for-vscode/@xpack-dev-tools/arm-
168 .file 7 "Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_def.h"
169 .file 8 "Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_dma.h"
170 .file 9 "Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_adc.h"
171 .file 10 "Core/Lib/can-halal/can-halal.h"
172 .file 11 "Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_adc_ex.h"
173 .file 12 "Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal.h"
ARM GAS /tmp/ccZUAizG.s page 5
DEFINED SYMBOLS
*ABS*:00000000 adc.c
/tmp/ccZUAizG.s:19 .text.adc_init:00000000 $t
/tmp/ccZUAizG.s:25 .text.adc_init:00000000 adc_init
/tmp/ccZUAizG.s:47 .text.adc_loop:00000000 $t
/tmp/ccZUAizG.s:53 .text.adc_loop:00000000 adc_loop
/tmp/ccZUAizG.s:99 .text.adc_loop:00000030 $d
/tmp/ccZUAizG.s:152 .bss.adcRes:00000000 adcRes
/tmp/ccZUAizG.s:145 .bss.data.0:00000000 data.0
/tmp/ccZUAizG.s:159 .data.id:00000000 id
/tmp/ccZUAizG.s:106 .text.HAL_ADC_ConvCpltCallback:00000000 $t
/tmp/ccZUAizG.s:112 .text.HAL_ADC_ConvCpltCallback:00000000 HAL_ADC_ConvCpltCallback
/tmp/ccZUAizG.s:137 .text.HAL_ADC_ConvCpltCallback:0000000c $d
/tmp/ccZUAizG.s:142 .bss.data.0:00000000 $d
/tmp/ccZUAizG.s:149 .bss.adcRes:00000000 $d
/tmp/ccZUAizG.s:156 .data.id:00000000 $d
UNDEFINED SYMBOLS
HAL_ADCEx_Calibration_Start
HAL_ADC_Start_IT
ftcan_marshal_unsigned
ftcan_transmit
HAL_Delay
HAL_ADC_GetValue

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build/debug/Core/Src/main.o: Core/Src/main.c Core/Inc/main.h \
Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal.h \
Core/Inc/stm32f0xx_hal_conf.h \
Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_rcc.h \
Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_def.h \
Drivers/CMSIS/Device/ST/STM32F0xx/Include/stm32f0xx.h \
Drivers/CMSIS/Device/ST/STM32F0xx/Include/stm32f042x6.h \
Drivers/CMSIS/Include/core_cm0.h Drivers/CMSIS/Include/cmsis_version.h \
Drivers/CMSIS/Include/cmsis_compiler.h Drivers/CMSIS/Include/cmsis_gcc.h \
Drivers/CMSIS/Device/ST/STM32F0xx/Include/system_stm32f0xx.h \
Drivers/STM32F0xx_HAL_Driver/Inc/Legacy/stm32_hal_legacy.h \
Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_rcc_ex.h \
Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_gpio.h \
Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_gpio_ex.h \
Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_exti.h \
Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_dma.h \
Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_dma_ex.h \
Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_cortex.h \
Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_adc.h \
Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_adc_ex.h \
Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_can.h \
Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_flash.h \
Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_flash_ex.h \
Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_i2c.h \
Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_i2c_ex.h \
Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_pwr.h \
Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_pwr_ex.h \
Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_tim.h \
Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_tim_ex.h Core/Inc/adc.h
Core/Inc/main.h:
Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal.h:
Core/Inc/stm32f0xx_hal_conf.h:
Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_rcc.h:
Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_def.h:
Drivers/CMSIS/Device/ST/STM32F0xx/Include/stm32f0xx.h:
Drivers/CMSIS/Device/ST/STM32F0xx/Include/stm32f042x6.h:
Drivers/CMSIS/Include/core_cm0.h:
Drivers/CMSIS/Include/cmsis_version.h:
Drivers/CMSIS/Include/cmsis_compiler.h:
Drivers/CMSIS/Include/cmsis_gcc.h:
Drivers/CMSIS/Device/ST/STM32F0xx/Include/system_stm32f0xx.h:
Drivers/STM32F0xx_HAL_Driver/Inc/Legacy/stm32_hal_legacy.h:
Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_rcc_ex.h:
Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_gpio.h:
Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_gpio_ex.h:
Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_exti.h:
Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_dma.h:
Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_dma_ex.h:
Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_cortex.h:
Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_adc.h:
Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_adc_ex.h:
Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_can.h:
Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_flash.h:
Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_flash_ex.h:
Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_i2c.h:
Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_i2c_ex.h:
Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_pwr.h:
Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_pwr_ex.h:
Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_tim.h:
Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_tim_ex.h:
Core/Inc/adc.h:

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build/debug/Core/Src/stm32f0xx_hal_msp.o: Core/Src/stm32f0xx_hal_msp.c \
Core/Inc/main.h Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal.h \
Core/Inc/stm32f0xx_hal_conf.h \
Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_rcc.h \
Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_def.h \
Drivers/CMSIS/Device/ST/STM32F0xx/Include/stm32f0xx.h \
Drivers/CMSIS/Device/ST/STM32F0xx/Include/stm32f042x6.h \
Drivers/CMSIS/Include/core_cm0.h Drivers/CMSIS/Include/cmsis_version.h \
Drivers/CMSIS/Include/cmsis_compiler.h Drivers/CMSIS/Include/cmsis_gcc.h \
Drivers/CMSIS/Device/ST/STM32F0xx/Include/system_stm32f0xx.h \
Drivers/STM32F0xx_HAL_Driver/Inc/Legacy/stm32_hal_legacy.h \
Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_rcc_ex.h \
Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_gpio.h \
Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_gpio_ex.h \
Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_exti.h \
Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_dma.h \
Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_dma_ex.h \
Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_cortex.h \
Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_adc.h \
Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_adc_ex.h \
Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_can.h \
Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_flash.h \
Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_flash_ex.h \
Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_i2c.h \
Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_i2c_ex.h \
Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_pwr.h \
Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_pwr_ex.h \
Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_tim.h \
Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_tim_ex.h
Core/Inc/main.h:
Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal.h:
Core/Inc/stm32f0xx_hal_conf.h:
Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_rcc.h:
Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_def.h:
Drivers/CMSIS/Device/ST/STM32F0xx/Include/stm32f0xx.h:
Drivers/CMSIS/Device/ST/STM32F0xx/Include/stm32f042x6.h:
Drivers/CMSIS/Include/core_cm0.h:
Drivers/CMSIS/Include/cmsis_version.h:
Drivers/CMSIS/Include/cmsis_compiler.h:
Drivers/CMSIS/Include/cmsis_gcc.h:
Drivers/CMSIS/Device/ST/STM32F0xx/Include/system_stm32f0xx.h:
Drivers/STM32F0xx_HAL_Driver/Inc/Legacy/stm32_hal_legacy.h:
Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_rcc_ex.h:
Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_gpio.h:
Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_gpio_ex.h:
Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_exti.h:
Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_dma.h:
Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_dma_ex.h:
Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_cortex.h:
Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_adc.h:
Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_adc_ex.h:
Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_can.h:
Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_flash.h:
Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_flash_ex.h:
Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_i2c.h:
Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_i2c_ex.h:
Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_pwr.h:
Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_pwr_ex.h:
Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_tim.h:
Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_tim_ex.h:

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build/debug/Core/Src/stm32f0xx_it.o: Core/Src/stm32f0xx_it.c \
Core/Inc/main.h Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal.h \
Core/Inc/stm32f0xx_hal_conf.h \
Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_rcc.h \
Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_def.h \
Drivers/CMSIS/Device/ST/STM32F0xx/Include/stm32f0xx.h \
Drivers/CMSIS/Device/ST/STM32F0xx/Include/stm32f042x6.h \
Drivers/CMSIS/Include/core_cm0.h Drivers/CMSIS/Include/cmsis_version.h \
Drivers/CMSIS/Include/cmsis_compiler.h Drivers/CMSIS/Include/cmsis_gcc.h \
Drivers/CMSIS/Device/ST/STM32F0xx/Include/system_stm32f0xx.h \
Drivers/STM32F0xx_HAL_Driver/Inc/Legacy/stm32_hal_legacy.h \
Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_rcc_ex.h \
Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_gpio.h \
Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_gpio_ex.h \
Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_exti.h \
Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_dma.h \
Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_dma_ex.h \
Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_cortex.h \
Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_adc.h \
Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_adc_ex.h \
Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_can.h \
Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_flash.h \
Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_flash_ex.h \
Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_i2c.h \
Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_i2c_ex.h \
Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_pwr.h \
Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_pwr_ex.h \
Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_tim.h \
Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_tim_ex.h \
Core/Inc/stm32f0xx_it.h
Core/Inc/main.h:
Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal.h:
Core/Inc/stm32f0xx_hal_conf.h:
Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_rcc.h:
Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_def.h:
Drivers/CMSIS/Device/ST/STM32F0xx/Include/stm32f0xx.h:
Drivers/CMSIS/Device/ST/STM32F0xx/Include/stm32f042x6.h:
Drivers/CMSIS/Include/core_cm0.h:
Drivers/CMSIS/Include/cmsis_version.h:
Drivers/CMSIS/Include/cmsis_compiler.h:
Drivers/CMSIS/Include/cmsis_gcc.h:
Drivers/CMSIS/Device/ST/STM32F0xx/Include/system_stm32f0xx.h:
Drivers/STM32F0xx_HAL_Driver/Inc/Legacy/stm32_hal_legacy.h:
Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_rcc_ex.h:
Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_gpio.h:
Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_gpio_ex.h:
Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_exti.h:
Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_dma.h:
Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_dma_ex.h:
Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_cortex.h:
Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_adc.h:
Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_adc_ex.h:
Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_can.h:
Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_flash.h:
Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_flash_ex.h:
Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_i2c.h:
Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_i2c_ex.h:
Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_pwr.h:
Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_pwr_ex.h:
Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_tim.h:
Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_tim_ex.h:
Core/Inc/stm32f0xx_it.h:

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ARM GAS /tmp/ccMhmmlx.s page 1
1 .cpu cortex-m0
2 .arch armv6s-m
3 .fpu softvfp
4 .eabi_attribute 20, 1
5 .eabi_attribute 21, 1
6 .eabi_attribute 23, 3
7 .eabi_attribute 24, 1
8 .eabi_attribute 25, 1
9 .eabi_attribute 26, 1
10 .eabi_attribute 30, 1
11 .eabi_attribute 34, 0
12 .eabi_attribute 18, 4
13 .file "stm32f0xx_it.c"
14 .text
15 .Ltext0:
16 .cfi_sections .debug_frame
17 .file 1 "Core/Src/stm32f0xx_it.c"
18 .section .text.NMI_Handler,"ax",%progbits
19 .align 1
20 .global NMI_Handler
21 .syntax unified
22 .code 16
23 .thumb_func
25 NMI_Handler:
26 .LFB40:
1:Core/Src/stm32f0xx_it.c **** /* USER CODE BEGIN Header */
2:Core/Src/stm32f0xx_it.c **** /**
3:Core/Src/stm32f0xx_it.c **** ******************************************************************************
4:Core/Src/stm32f0xx_it.c **** * @file stm32f0xx_it.c
5:Core/Src/stm32f0xx_it.c **** * @brief Interrupt Service Routines.
6:Core/Src/stm32f0xx_it.c **** ******************************************************************************
7:Core/Src/stm32f0xx_it.c **** * @attention
8:Core/Src/stm32f0xx_it.c **** *
9:Core/Src/stm32f0xx_it.c **** * Copyright (c) 2024 STMicroelectronics.
10:Core/Src/stm32f0xx_it.c **** * All rights reserved.
11:Core/Src/stm32f0xx_it.c **** *
12:Core/Src/stm32f0xx_it.c **** * This software is licensed under terms that can be found in the LICENSE file
13:Core/Src/stm32f0xx_it.c **** * in the root directory of this software component.
14:Core/Src/stm32f0xx_it.c **** * If no LICENSE file comes with this software, it is provided AS-IS.
15:Core/Src/stm32f0xx_it.c **** *
16:Core/Src/stm32f0xx_it.c **** ******************************************************************************
17:Core/Src/stm32f0xx_it.c **** */
18:Core/Src/stm32f0xx_it.c **** /* USER CODE END Header */
19:Core/Src/stm32f0xx_it.c ****
20:Core/Src/stm32f0xx_it.c **** /* Includes ------------------------------------------------------------------*/
21:Core/Src/stm32f0xx_it.c **** #include "main.h"
22:Core/Src/stm32f0xx_it.c **** #include "stm32f0xx_it.h"
23:Core/Src/stm32f0xx_it.c **** /* Private includes ----------------------------------------------------------*/
24:Core/Src/stm32f0xx_it.c **** /* USER CODE BEGIN Includes */
25:Core/Src/stm32f0xx_it.c **** /* USER CODE END Includes */
26:Core/Src/stm32f0xx_it.c ****
27:Core/Src/stm32f0xx_it.c **** /* Private typedef -----------------------------------------------------------*/
28:Core/Src/stm32f0xx_it.c **** /* USER CODE BEGIN TD */
29:Core/Src/stm32f0xx_it.c ****
30:Core/Src/stm32f0xx_it.c **** /* USER CODE END TD */
31:Core/Src/stm32f0xx_it.c ****
32:Core/Src/stm32f0xx_it.c **** /* Private define ------------------------------------------------------------*/
ARM GAS /tmp/ccMhmmlx.s page 2
33:Core/Src/stm32f0xx_it.c **** /* USER CODE BEGIN PD */
34:Core/Src/stm32f0xx_it.c ****
35:Core/Src/stm32f0xx_it.c **** /* USER CODE END PD */
36:Core/Src/stm32f0xx_it.c ****
37:Core/Src/stm32f0xx_it.c **** /* Private macro -------------------------------------------------------------*/
38:Core/Src/stm32f0xx_it.c **** /* USER CODE BEGIN PM */
39:Core/Src/stm32f0xx_it.c ****
40:Core/Src/stm32f0xx_it.c **** /* USER CODE END PM */
41:Core/Src/stm32f0xx_it.c ****
42:Core/Src/stm32f0xx_it.c **** /* Private variables ---------------------------------------------------------*/
43:Core/Src/stm32f0xx_it.c **** /* USER CODE BEGIN PV */
44:Core/Src/stm32f0xx_it.c ****
45:Core/Src/stm32f0xx_it.c **** /* USER CODE END PV */
46:Core/Src/stm32f0xx_it.c ****
47:Core/Src/stm32f0xx_it.c **** /* Private function prototypes -----------------------------------------------*/
48:Core/Src/stm32f0xx_it.c **** /* USER CODE BEGIN PFP */
49:Core/Src/stm32f0xx_it.c ****
50:Core/Src/stm32f0xx_it.c **** /* USER CODE END PFP */
51:Core/Src/stm32f0xx_it.c ****
52:Core/Src/stm32f0xx_it.c **** /* Private user code ---------------------------------------------------------*/
53:Core/Src/stm32f0xx_it.c **** /* USER CODE BEGIN 0 */
54:Core/Src/stm32f0xx_it.c ****
55:Core/Src/stm32f0xx_it.c **** /* USER CODE END 0 */
56:Core/Src/stm32f0xx_it.c ****
57:Core/Src/stm32f0xx_it.c **** /* External variables --------------------------------------------------------*/
58:Core/Src/stm32f0xx_it.c ****
59:Core/Src/stm32f0xx_it.c **** /* USER CODE BEGIN EV */
60:Core/Src/stm32f0xx_it.c ****
61:Core/Src/stm32f0xx_it.c **** /* USER CODE END EV */
62:Core/Src/stm32f0xx_it.c ****
63:Core/Src/stm32f0xx_it.c **** /******************************************************************************/
64:Core/Src/stm32f0xx_it.c **** /* Cortex-M0 Processor Interruption and Exception Handlers */
65:Core/Src/stm32f0xx_it.c **** /******************************************************************************/
66:Core/Src/stm32f0xx_it.c **** /**
67:Core/Src/stm32f0xx_it.c **** * @brief This function handles Non maskable interrupt.
68:Core/Src/stm32f0xx_it.c **** */
69:Core/Src/stm32f0xx_it.c **** void NMI_Handler(void)
70:Core/Src/stm32f0xx_it.c **** {
27 .loc 1 70 1 view -0
28 .cfi_startproc
29 @ Volatile: function does not return.
30 @ args = 0, pretend = 0, frame = 0
31 @ frame_needed = 0, uses_anonymous_args = 0
32 @ link register save eliminated.
33 .L2:
71:Core/Src/stm32f0xx_it.c **** /* USER CODE BEGIN NonMaskableInt_IRQn 0 */
72:Core/Src/stm32f0xx_it.c ****
73:Core/Src/stm32f0xx_it.c **** /* USER CODE END NonMaskableInt_IRQn 0 */
74:Core/Src/stm32f0xx_it.c **** /* USER CODE BEGIN NonMaskableInt_IRQn 1 */
75:Core/Src/stm32f0xx_it.c **** while (1)
34 .loc 1 75 3 view .LVU1
76:Core/Src/stm32f0xx_it.c **** {
77:Core/Src/stm32f0xx_it.c **** }
35 .loc 1 77 3 view .LVU2
75:Core/Src/stm32f0xx_it.c **** {
36 .loc 1 75 9 view .LVU3
37 0000 FEE7 b .L2
ARM GAS /tmp/ccMhmmlx.s page 3
38 .cfi_endproc
39 .LFE40:
41 .section .text.HardFault_Handler,"ax",%progbits
42 .align 1
43 .global HardFault_Handler
44 .syntax unified
45 .code 16
46 .thumb_func
48 HardFault_Handler:
49 .LFB41:
78:Core/Src/stm32f0xx_it.c **** /* USER CODE END NonMaskableInt_IRQn 1 */
79:Core/Src/stm32f0xx_it.c **** }
80:Core/Src/stm32f0xx_it.c ****
81:Core/Src/stm32f0xx_it.c **** /**
82:Core/Src/stm32f0xx_it.c **** * @brief This function handles Hard fault interrupt.
83:Core/Src/stm32f0xx_it.c **** */
84:Core/Src/stm32f0xx_it.c **** void HardFault_Handler(void)
85:Core/Src/stm32f0xx_it.c **** {
50 .loc 1 85 1 view -0
51 .cfi_startproc
52 @ Volatile: function does not return.
53 @ args = 0, pretend = 0, frame = 0
54 @ frame_needed = 0, uses_anonymous_args = 0
55 @ link register save eliminated.
56 .L4:
86:Core/Src/stm32f0xx_it.c **** /* USER CODE BEGIN HardFault_IRQn 0 */
87:Core/Src/stm32f0xx_it.c ****
88:Core/Src/stm32f0xx_it.c **** /* USER CODE END HardFault_IRQn 0 */
89:Core/Src/stm32f0xx_it.c **** while (1)
57 .loc 1 89 3 view .LVU5
90:Core/Src/stm32f0xx_it.c **** {
91:Core/Src/stm32f0xx_it.c **** /* USER CODE BEGIN W1_HardFault_IRQn 0 */
92:Core/Src/stm32f0xx_it.c **** /* USER CODE END W1_HardFault_IRQn 0 */
93:Core/Src/stm32f0xx_it.c **** }
58 .loc 1 93 3 view .LVU6
89:Core/Src/stm32f0xx_it.c **** {
59 .loc 1 89 9 view .LVU7
60 0000 FEE7 b .L4
61 .cfi_endproc
62 .LFE41:
64 .section .text.SVC_Handler,"ax",%progbits
65 .align 1
66 .global SVC_Handler
67 .syntax unified
68 .code 16
69 .thumb_func
71 SVC_Handler:
72 .LFB42:
94:Core/Src/stm32f0xx_it.c **** }
95:Core/Src/stm32f0xx_it.c ****
96:Core/Src/stm32f0xx_it.c **** /**
97:Core/Src/stm32f0xx_it.c **** * @brief This function handles System service call via SWI instruction.
98:Core/Src/stm32f0xx_it.c **** */
99:Core/Src/stm32f0xx_it.c **** void SVC_Handler(void)
100:Core/Src/stm32f0xx_it.c **** {
73 .loc 1 100 1 view -0
74 .cfi_startproc
ARM GAS /tmp/ccMhmmlx.s page 4
75 @ args = 0, pretend = 0, frame = 0
76 @ frame_needed = 0, uses_anonymous_args = 0
77 @ link register save eliminated.
101:Core/Src/stm32f0xx_it.c **** /* USER CODE BEGIN SVC_IRQn 0 */
102:Core/Src/stm32f0xx_it.c ****
103:Core/Src/stm32f0xx_it.c **** /* USER CODE END SVC_IRQn 0 */
104:Core/Src/stm32f0xx_it.c **** /* USER CODE BEGIN SVC_IRQn 1 */
105:Core/Src/stm32f0xx_it.c ****
106:Core/Src/stm32f0xx_it.c **** /* USER CODE END SVC_IRQn 1 */
107:Core/Src/stm32f0xx_it.c **** }
78 .loc 1 107 1 view .LVU9
79 @ sp needed
80 0000 7047 bx lr
81 .cfi_endproc
82 .LFE42:
84 .section .text.PendSV_Handler,"ax",%progbits
85 .align 1
86 .global PendSV_Handler
87 .syntax unified
88 .code 16
89 .thumb_func
91 PendSV_Handler:
92 .LFB43:
108:Core/Src/stm32f0xx_it.c ****
109:Core/Src/stm32f0xx_it.c **** /**
110:Core/Src/stm32f0xx_it.c **** * @brief This function handles Pendable request for system service.
111:Core/Src/stm32f0xx_it.c **** */
112:Core/Src/stm32f0xx_it.c **** void PendSV_Handler(void)
113:Core/Src/stm32f0xx_it.c **** {
93 .loc 1 113 1 view -0
94 .cfi_startproc
95 @ args = 0, pretend = 0, frame = 0
96 @ frame_needed = 0, uses_anonymous_args = 0
97 @ link register save eliminated.
114:Core/Src/stm32f0xx_it.c **** /* USER CODE BEGIN PendSV_IRQn 0 */
115:Core/Src/stm32f0xx_it.c ****
116:Core/Src/stm32f0xx_it.c **** /* USER CODE END PendSV_IRQn 0 */
117:Core/Src/stm32f0xx_it.c **** /* USER CODE BEGIN PendSV_IRQn 1 */
118:Core/Src/stm32f0xx_it.c ****
119:Core/Src/stm32f0xx_it.c **** /* USER CODE END PendSV_IRQn 1 */
120:Core/Src/stm32f0xx_it.c **** }
98 .loc 1 120 1 view .LVU11
99 @ sp needed
100 0000 7047 bx lr
101 .cfi_endproc
102 .LFE43:
104 .section .text.SysTick_Handler,"ax",%progbits
105 .align 1
106 .global SysTick_Handler
107 .syntax unified
108 .code 16
109 .thumb_func
111 SysTick_Handler:
112 .LFB44:
121:Core/Src/stm32f0xx_it.c ****
122:Core/Src/stm32f0xx_it.c **** /**
123:Core/Src/stm32f0xx_it.c **** * @brief This function handles System tick timer.
ARM GAS /tmp/ccMhmmlx.s page 5
124:Core/Src/stm32f0xx_it.c **** */
125:Core/Src/stm32f0xx_it.c **** void SysTick_Handler(void)
126:Core/Src/stm32f0xx_it.c **** {
113 .loc 1 126 1 view -0
114 .cfi_startproc
115 @ args = 0, pretend = 0, frame = 0
116 @ frame_needed = 0, uses_anonymous_args = 0
117 0000 10B5 push {r4, lr}
118 .cfi_def_cfa_offset 8
119 .cfi_offset 4, -8
120 .cfi_offset 14, -4
127:Core/Src/stm32f0xx_it.c **** /* USER CODE BEGIN SysTick_IRQn 0 */
128:Core/Src/stm32f0xx_it.c ****
129:Core/Src/stm32f0xx_it.c **** /* USER CODE END SysTick_IRQn 0 */
130:Core/Src/stm32f0xx_it.c **** HAL_IncTick();
121 .loc 1 130 3 view .LVU13
122 0002 FFF7FEFF bl HAL_IncTick
123 .LVL0:
131:Core/Src/stm32f0xx_it.c **** /* USER CODE BEGIN SysTick_IRQn 1 */
132:Core/Src/stm32f0xx_it.c ****
133:Core/Src/stm32f0xx_it.c **** /* USER CODE END SysTick_IRQn 1 */
134:Core/Src/stm32f0xx_it.c **** }
124 .loc 1 134 1 is_stmt 0 view .LVU14
125 @ sp needed
126 0006 10BD pop {r4, pc}
127 .cfi_endproc
128 .LFE44:
130 .text
131 .Letext0:
132 .file 2 "Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal.h"
ARM GAS /tmp/ccMhmmlx.s page 6
DEFINED SYMBOLS
*ABS*:00000000 stm32f0xx_it.c
/tmp/ccMhmmlx.s:19 .text.NMI_Handler:00000000 $t
/tmp/ccMhmmlx.s:25 .text.NMI_Handler:00000000 NMI_Handler
/tmp/ccMhmmlx.s:42 .text.HardFault_Handler:00000000 $t
/tmp/ccMhmmlx.s:48 .text.HardFault_Handler:00000000 HardFault_Handler
/tmp/ccMhmmlx.s:65 .text.SVC_Handler:00000000 $t
/tmp/ccMhmmlx.s:71 .text.SVC_Handler:00000000 SVC_Handler
/tmp/ccMhmmlx.s:85 .text.PendSV_Handler:00000000 $t
/tmp/ccMhmmlx.s:91 .text.PendSV_Handler:00000000 PendSV_Handler
/tmp/ccMhmmlx.s:105 .text.SysTick_Handler:00000000 $t
/tmp/ccMhmmlx.s:111 .text.SysTick_Handler:00000000 SysTick_Handler
UNDEFINED SYMBOLS
HAL_IncTick

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build/debug/Core/Src/system_stm32f0xx.o: Core/Src/system_stm32f0xx.c \
Drivers/CMSIS/Device/ST/STM32F0xx/Include/stm32f0xx.h \
Drivers/CMSIS/Device/ST/STM32F0xx/Include/stm32f042x6.h \
Drivers/CMSIS/Include/core_cm0.h Drivers/CMSIS/Include/cmsis_version.h \
Drivers/CMSIS/Include/cmsis_compiler.h Drivers/CMSIS/Include/cmsis_gcc.h \
Drivers/CMSIS/Device/ST/STM32F0xx/Include/system_stm32f0xx.h \
Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal.h \
Core/Inc/stm32f0xx_hal_conf.h \
Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_rcc.h \
Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_def.h \
Drivers/STM32F0xx_HAL_Driver/Inc/Legacy/stm32_hal_legacy.h \
Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_rcc_ex.h \
Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_gpio.h \
Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_gpio_ex.h \
Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_exti.h \
Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_dma.h \
Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_dma_ex.h \
Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_cortex.h \
Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_adc.h \
Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_adc_ex.h \
Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_can.h \
Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_flash.h \
Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_flash_ex.h \
Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_i2c.h \
Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_i2c_ex.h \
Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_pwr.h \
Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_pwr_ex.h \
Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_tim.h \
Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_tim_ex.h
Drivers/CMSIS/Device/ST/STM32F0xx/Include/stm32f0xx.h:
Drivers/CMSIS/Device/ST/STM32F0xx/Include/stm32f042x6.h:
Drivers/CMSIS/Include/core_cm0.h:
Drivers/CMSIS/Include/cmsis_version.h:
Drivers/CMSIS/Include/cmsis_compiler.h:
Drivers/CMSIS/Include/cmsis_gcc.h:
Drivers/CMSIS/Device/ST/STM32F0xx/Include/system_stm32f0xx.h:
Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal.h:
Core/Inc/stm32f0xx_hal_conf.h:
Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_rcc.h:
Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_def.h:
Drivers/STM32F0xx_HAL_Driver/Inc/Legacy/stm32_hal_legacy.h:
Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_rcc_ex.h:
Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_gpio.h:
Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_gpio_ex.h:
Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_exti.h:
Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_dma.h:
Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_dma_ex.h:
Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_cortex.h:
Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_adc.h:
Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_adc_ex.h:
Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_can.h:
Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_flash.h:
Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_flash_ex.h:
Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_i2c.h:
Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_i2c_ex.h:
Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_pwr.h:
Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_pwr_ex.h:
Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_tim.h:
Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_tim_ex.h:

571
Software/build/debug/Core/Src/system_stm32f0xx.lst Normal file
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@ -0,0 +1,571 @@
ARM GAS /tmp/ccUgyWfH.s page 1
1 .cpu cortex-m0
2 .arch armv6s-m
3 .fpu softvfp
4 .eabi_attribute 20, 1
5 .eabi_attribute 21, 1
6 .eabi_attribute 23, 3
7 .eabi_attribute 24, 1
8 .eabi_attribute 25, 1
9 .eabi_attribute 26, 1
10 .eabi_attribute 30, 1
11 .eabi_attribute 34, 0
12 .eabi_attribute 18, 4
13 .file "system_stm32f0xx.c"
14 .text
15 .Ltext0:
16 .cfi_sections .debug_frame
17 .file 1 "Core/Src/system_stm32f0xx.c"
18 .section .text.SystemInit,"ax",%progbits
19 .align 1
20 .global SystemInit
21 .syntax unified
22 .code 16
23 .thumb_func
25 SystemInit:
26 .LFB40:
1:Core/Src/system_stm32f0xx.c **** /**
2:Core/Src/system_stm32f0xx.c **** ******************************************************************************
3:Core/Src/system_stm32f0xx.c **** * @file system_stm32f0xx.c
4:Core/Src/system_stm32f0xx.c **** * @author MCD Application Team
5:Core/Src/system_stm32f0xx.c **** * @brief CMSIS Cortex-M0 Device Peripheral Access Layer System Source File.
6:Core/Src/system_stm32f0xx.c **** *
7:Core/Src/system_stm32f0xx.c **** * 1. This file provides two functions and one global variable to be called from
8:Core/Src/system_stm32f0xx.c **** * user application:
9:Core/Src/system_stm32f0xx.c **** * - SystemInit(): This function is called at startup just after reset and
10:Core/Src/system_stm32f0xx.c **** * before branch to main program. This call is made inside
11:Core/Src/system_stm32f0xx.c **** * the "startup_stm32f0xx.s" file.
12:Core/Src/system_stm32f0xx.c **** *
13:Core/Src/system_stm32f0xx.c **** * - SystemCoreClock variable: Contains the core clock (HCLK), it can be used
14:Core/Src/system_stm32f0xx.c **** * by the user application to setup the SysTick
15:Core/Src/system_stm32f0xx.c **** * timer or configure other parameters.
16:Core/Src/system_stm32f0xx.c **** *
17:Core/Src/system_stm32f0xx.c **** * - SystemCoreClockUpdate(): Updates the variable SystemCoreClock and must
18:Core/Src/system_stm32f0xx.c **** * be called whenever the core clock is changed
19:Core/Src/system_stm32f0xx.c **** * during program execution.
20:Core/Src/system_stm32f0xx.c **** *
21:Core/Src/system_stm32f0xx.c **** *
22:Core/Src/system_stm32f0xx.c **** ******************************************************************************
23:Core/Src/system_stm32f0xx.c **** * @attention
24:Core/Src/system_stm32f0xx.c **** *
25:Core/Src/system_stm32f0xx.c **** * Copyright (c) 2016 STMicroelectronics.
26:Core/Src/system_stm32f0xx.c **** * All rights reserved.
27:Core/Src/system_stm32f0xx.c **** *
28:Core/Src/system_stm32f0xx.c **** * This software is licensed under terms that can be found in the LICENSE file
29:Core/Src/system_stm32f0xx.c **** * in the root directory of this software component.
30:Core/Src/system_stm32f0xx.c **** * If no LICENSE file comes with this software, it is provided AS-IS.
31:Core/Src/system_stm32f0xx.c **** *
32:Core/Src/system_stm32f0xx.c **** ******************************************************************************
ARM GAS /tmp/ccUgyWfH.s page 2
33:Core/Src/system_stm32f0xx.c **** */
34:Core/Src/system_stm32f0xx.c **** /** @addtogroup CMSIS
35:Core/Src/system_stm32f0xx.c **** * @{
36:Core/Src/system_stm32f0xx.c **** */
37:Core/Src/system_stm32f0xx.c ****
38:Core/Src/system_stm32f0xx.c **** /** @addtogroup stm32f0xx_system
39:Core/Src/system_stm32f0xx.c **** * @{
40:Core/Src/system_stm32f0xx.c **** */
41:Core/Src/system_stm32f0xx.c ****
42:Core/Src/system_stm32f0xx.c **** /** @addtogroup STM32F0xx_System_Private_Includes
43:Core/Src/system_stm32f0xx.c **** * @{
44:Core/Src/system_stm32f0xx.c **** */
45:Core/Src/system_stm32f0xx.c ****
46:Core/Src/system_stm32f0xx.c **** #include "stm32f0xx.h"
47:Core/Src/system_stm32f0xx.c ****
48:Core/Src/system_stm32f0xx.c **** /**
49:Core/Src/system_stm32f0xx.c **** * @}
50:Core/Src/system_stm32f0xx.c **** */
51:Core/Src/system_stm32f0xx.c ****
52:Core/Src/system_stm32f0xx.c **** /** @addtogroup STM32F0xx_System_Private_TypesDefinitions
53:Core/Src/system_stm32f0xx.c **** * @{
54:Core/Src/system_stm32f0xx.c **** */
55:Core/Src/system_stm32f0xx.c ****
56:Core/Src/system_stm32f0xx.c **** /**
57:Core/Src/system_stm32f0xx.c **** * @}
58:Core/Src/system_stm32f0xx.c **** */
59:Core/Src/system_stm32f0xx.c ****
60:Core/Src/system_stm32f0xx.c **** /** @addtogroup STM32F0xx_System_Private_Defines
61:Core/Src/system_stm32f0xx.c **** * @{
62:Core/Src/system_stm32f0xx.c **** */
63:Core/Src/system_stm32f0xx.c **** #if !defined (HSE_VALUE)
64:Core/Src/system_stm32f0xx.c **** #define HSE_VALUE ((uint32_t)8000000) /*!< Default value of the External oscillator in Hz.
65:Core/Src/system_stm32f0xx.c **** This value can be provided and adapted by the user
66:Core/Src/system_stm32f0xx.c **** #endif /* HSE_VALUE */
67:Core/Src/system_stm32f0xx.c ****
68:Core/Src/system_stm32f0xx.c **** #if !defined (HSI_VALUE)
69:Core/Src/system_stm32f0xx.c **** #define HSI_VALUE ((uint32_t)8000000) /*!< Default value of the Internal oscillator in Hz.
70:Core/Src/system_stm32f0xx.c **** This value can be provided and adapted by the user
71:Core/Src/system_stm32f0xx.c **** #endif /* HSI_VALUE */
72:Core/Src/system_stm32f0xx.c ****
73:Core/Src/system_stm32f0xx.c **** #if !defined (HSI48_VALUE)
74:Core/Src/system_stm32f0xx.c **** #define HSI48_VALUE ((uint32_t)48000000) /*!< Default value of the HSI48 Internal oscillator in
75:Core/Src/system_stm32f0xx.c **** This value can be provided and adapted by the user
76:Core/Src/system_stm32f0xx.c **** #endif /* HSI48_VALUE */
77:Core/Src/system_stm32f0xx.c **** /**
78:Core/Src/system_stm32f0xx.c **** * @}
79:Core/Src/system_stm32f0xx.c **** */
80:Core/Src/system_stm32f0xx.c ****
81:Core/Src/system_stm32f0xx.c **** /** @addtogroup STM32F0xx_System_Private_Macros
82:Core/Src/system_stm32f0xx.c **** * @{
83:Core/Src/system_stm32f0xx.c **** */
84:Core/Src/system_stm32f0xx.c ****
85:Core/Src/system_stm32f0xx.c **** /**
86:Core/Src/system_stm32f0xx.c **** * @}
87:Core/Src/system_stm32f0xx.c **** */
88:Core/Src/system_stm32f0xx.c ****
89:Core/Src/system_stm32f0xx.c **** /** @addtogroup STM32F0xx_System_Private_Variables
ARM GAS /tmp/ccUgyWfH.s page 3
90:Core/Src/system_stm32f0xx.c **** * @{
91:Core/Src/system_stm32f0xx.c **** */
92:Core/Src/system_stm32f0xx.c **** /* This variable is updated in three ways:
93:Core/Src/system_stm32f0xx.c **** 1) by calling CMSIS function SystemCoreClockUpdate()
94:Core/Src/system_stm32f0xx.c **** 2) by calling HAL API function HAL_RCC_GetHCLKFreq()
95:Core/Src/system_stm32f0xx.c **** 3) each time HAL_RCC_ClockConfig() is called to configure the system clock frequency
96:Core/Src/system_stm32f0xx.c **** Note: If you use this function to configure the system clock; then there
97:Core/Src/system_stm32f0xx.c **** is no need to call the 2 first functions listed above, since SystemCoreClock
98:Core/Src/system_stm32f0xx.c **** variable is updated automatically.
99:Core/Src/system_stm32f0xx.c **** */
100:Core/Src/system_stm32f0xx.c **** uint32_t SystemCoreClock = 8000000;
101:Core/Src/system_stm32f0xx.c ****
102:Core/Src/system_stm32f0xx.c **** const uint8_t AHBPrescTable[16] = {0, 0, 0, 0, 0, 0, 0, 0, 1, 2, 3, 4, 6, 7, 8, 9};
103:Core/Src/system_stm32f0xx.c **** const uint8_t APBPrescTable[8] = {0, 0, 0, 0, 1, 2, 3, 4};
104:Core/Src/system_stm32f0xx.c ****
105:Core/Src/system_stm32f0xx.c **** /**
106:Core/Src/system_stm32f0xx.c **** * @}
107:Core/Src/system_stm32f0xx.c **** */
108:Core/Src/system_stm32f0xx.c ****
109:Core/Src/system_stm32f0xx.c **** /** @addtogroup STM32F0xx_System_Private_FunctionPrototypes
110:Core/Src/system_stm32f0xx.c **** * @{
111:Core/Src/system_stm32f0xx.c **** */
112:Core/Src/system_stm32f0xx.c ****
113:Core/Src/system_stm32f0xx.c **** /**
114:Core/Src/system_stm32f0xx.c **** * @}
115:Core/Src/system_stm32f0xx.c **** */
116:Core/Src/system_stm32f0xx.c ****
117:Core/Src/system_stm32f0xx.c **** /** @addtogroup STM32F0xx_System_Private_Functions
118:Core/Src/system_stm32f0xx.c **** * @{
119:Core/Src/system_stm32f0xx.c **** */
120:Core/Src/system_stm32f0xx.c ****
121:Core/Src/system_stm32f0xx.c **** /**
122:Core/Src/system_stm32f0xx.c **** * @brief Setup the microcontroller system
123:Core/Src/system_stm32f0xx.c **** * @param None
124:Core/Src/system_stm32f0xx.c **** * @retval None
125:Core/Src/system_stm32f0xx.c **** */
126:Core/Src/system_stm32f0xx.c **** void SystemInit(void)
127:Core/Src/system_stm32f0xx.c **** {
27 .loc 1 127 1 view -0
28 .cfi_startproc
29 @ args = 0, pretend = 0, frame = 0
30 @ frame_needed = 0, uses_anonymous_args = 0
31 @ link register save eliminated.
128:Core/Src/system_stm32f0xx.c **** /* NOTE :SystemInit(): This function is called at startup just after reset and
129:Core/Src/system_stm32f0xx.c **** before branch to main program. This call is made inside
130:Core/Src/system_stm32f0xx.c **** the "startup_stm32f0xx.s" file.
131:Core/Src/system_stm32f0xx.c **** User can setups the default system clock (System clock source, PLL Multipl
132:Core/Src/system_stm32f0xx.c **** and Divider factors, AHB/APBx prescalers and Flash settings).
133:Core/Src/system_stm32f0xx.c **** */
134:Core/Src/system_stm32f0xx.c **** }
32 .loc 1 134 1 view .LVU1
33 @ sp needed
34 0000 7047 bx lr
35 .cfi_endproc
36 .LFE40:
38 .global __aeabi_uidiv
39 .section .text.SystemCoreClockUpdate,"ax",%progbits
ARM GAS /tmp/ccUgyWfH.s page 4
40 .align 1
41 .global SystemCoreClockUpdate
42 .syntax unified
43 .code 16
44 .thumb_func
46 SystemCoreClockUpdate:
47 .LFB41:
135:Core/Src/system_stm32f0xx.c ****
136:Core/Src/system_stm32f0xx.c **** /**
137:Core/Src/system_stm32f0xx.c **** * @brief Update SystemCoreClock variable according to Clock Register Values.
138:Core/Src/system_stm32f0xx.c **** * The SystemCoreClock variable contains the core clock (HCLK), it can
139:Core/Src/system_stm32f0xx.c **** * be used by the user application to setup the SysTick timer or configure
140:Core/Src/system_stm32f0xx.c **** * other parameters.
141:Core/Src/system_stm32f0xx.c **** *
142:Core/Src/system_stm32f0xx.c **** * @note Each time the core clock (HCLK) changes, this function must be called
143:Core/Src/system_stm32f0xx.c **** * to update SystemCoreClock variable value. Otherwise, any configuration
144:Core/Src/system_stm32f0xx.c **** * based on this variable will be incorrect.
145:Core/Src/system_stm32f0xx.c **** *
146:Core/Src/system_stm32f0xx.c **** * @note - The system frequency computed by this function is not the real
147:Core/Src/system_stm32f0xx.c **** * frequency in the chip. It is calculated based on the predefined
148:Core/Src/system_stm32f0xx.c **** * constant and the selected clock source:
149:Core/Src/system_stm32f0xx.c **** *
150:Core/Src/system_stm32f0xx.c **** * - If SYSCLK source is HSI, SystemCoreClock will contain the HSI_VALUE(*)
151:Core/Src/system_stm32f0xx.c **** *
152:Core/Src/system_stm32f0xx.c **** * - If SYSCLK source is HSE, SystemCoreClock will contain the HSE_VALUE(**)
153:Core/Src/system_stm32f0xx.c **** *
154:Core/Src/system_stm32f0xx.c **** * - If SYSCLK source is PLL, SystemCoreClock will contain the HSE_VALUE(**)
155:Core/Src/system_stm32f0xx.c **** * or HSI_VALUE(*) multiplied/divided by the PLL factors.
156:Core/Src/system_stm32f0xx.c **** *
157:Core/Src/system_stm32f0xx.c **** * - If SYSCLK source is HSI48, SystemCoreClock will contain the HSI48_VALUE(***)
158:Core/Src/system_stm32f0xx.c **** *
159:Core/Src/system_stm32f0xx.c **** * (*) HSI_VALUE is a constant defined in stm32f0xx_hal_conf.h file (default value
160:Core/Src/system_stm32f0xx.c **** * 8 MHz) but the real value may vary depending on the variations
161:Core/Src/system_stm32f0xx.c **** * in voltage and temperature.
162:Core/Src/system_stm32f0xx.c **** *
163:Core/Src/system_stm32f0xx.c **** * (**) HSE_VALUE is a constant defined in stm32f0xx_hal_conf.h file (its value
164:Core/Src/system_stm32f0xx.c **** * depends on the application requirements), user has to ensure that HSE_VALUE
165:Core/Src/system_stm32f0xx.c **** * is same as the real frequency of the crystal used. Otherwise, this function
166:Core/Src/system_stm32f0xx.c **** * may have wrong result.
167:Core/Src/system_stm32f0xx.c **** *
168:Core/Src/system_stm32f0xx.c **** * (***) HSI48_VALUE is a constant defined in stm32f0xx_hal_conf.h file (default value
169:Core/Src/system_stm32f0xx.c **** * 48 MHz) but the real value may vary depending on the variations
170:Core/Src/system_stm32f0xx.c **** * in voltage and temperature.
171:Core/Src/system_stm32f0xx.c **** *
172:Core/Src/system_stm32f0xx.c **** * - The result of this function could be not correct when using fractional
173:Core/Src/system_stm32f0xx.c **** * value for HSE crystal.
174:Core/Src/system_stm32f0xx.c **** *
175:Core/Src/system_stm32f0xx.c **** * @param None
176:Core/Src/system_stm32f0xx.c **** * @retval None
177:Core/Src/system_stm32f0xx.c **** */
178:Core/Src/system_stm32f0xx.c **** void SystemCoreClockUpdate (void)
179:Core/Src/system_stm32f0xx.c **** {
48 .loc 1 179 1 view -0
49 .cfi_startproc
50 @ args = 0, pretend = 0, frame = 0
51 @ frame_needed = 0, uses_anonymous_args = 0
52 0000 10B5 push {r4, lr}
ARM GAS /tmp/ccUgyWfH.s page 5
53 .cfi_def_cfa_offset 8
54 .cfi_offset 4, -8
55 .cfi_offset 14, -4
180:Core/Src/system_stm32f0xx.c **** uint32_t tmp = 0, pllmull = 0, pllsource = 0, predivfactor = 0;
56 .loc 1 180 3 view .LVU3
57 .LVL0:
181:Core/Src/system_stm32f0xx.c ****
182:Core/Src/system_stm32f0xx.c **** /* Get SYSCLK source -------------------------------------------------------*/
183:Core/Src/system_stm32f0xx.c **** tmp = RCC->CFGR & RCC_CFGR_SWS;
58 .loc 1 183 3 view .LVU4
59 .loc 1 183 12 is_stmt 0 view .LVU5
60 0002 254B ldr r3, .L11
61 0004 5A68 ldr r2, [r3, #4]
62 .loc 1 183 7 view .LVU6
63 0006 0C23 movs r3, #12
64 0008 1340 ands r3, r2
65 .LVL1:
184:Core/Src/system_stm32f0xx.c ****
185:Core/Src/system_stm32f0xx.c **** switch (tmp)
66 .loc 1 185 3 is_stmt 1 view .LVU7
67 000a 042B cmp r3, #4
68 000c 12D0 beq .L3
69 000e 082B cmp r3, #8
70 0010 14D0 beq .L4
71 0012 002B cmp r3, #0
72 0014 3CD1 bne .L5
186:Core/Src/system_stm32f0xx.c **** {
187:Core/Src/system_stm32f0xx.c **** case RCC_CFGR_SWS_HSI: /* HSI used as system clock */
188:Core/Src/system_stm32f0xx.c **** SystemCoreClock = HSI_VALUE;
73 .loc 1 188 7 view .LVU8
74 .loc 1 188 23 is_stmt 0 view .LVU9
75 0016 214B ldr r3, .L11+4
76 .LVL2:
77 .loc 1 188 23 view .LVU10
78 0018 214A ldr r2, .L11+8
79 .LVL3:
80 .loc 1 188 23 view .LVU11
81 001a 1A60 str r2, [r3]
189:Core/Src/system_stm32f0xx.c **** break;
82 .loc 1 189 7 is_stmt 1 view .LVU12
83 .LVL4:
84 .L6:
190:Core/Src/system_stm32f0xx.c **** case RCC_CFGR_SWS_HSE: /* HSE used as system clock */
191:Core/Src/system_stm32f0xx.c **** SystemCoreClock = HSE_VALUE;
192:Core/Src/system_stm32f0xx.c **** break;
193:Core/Src/system_stm32f0xx.c **** case RCC_CFGR_SWS_PLL: /* PLL used as system clock */
194:Core/Src/system_stm32f0xx.c **** /* Get PLL clock source and multiplication factor ----------------------*/
195:Core/Src/system_stm32f0xx.c **** pllmull = RCC->CFGR & RCC_CFGR_PLLMUL;
196:Core/Src/system_stm32f0xx.c **** pllsource = RCC->CFGR & RCC_CFGR_PLLSRC;
197:Core/Src/system_stm32f0xx.c **** pllmull = ( pllmull >> 18) + 2;
198:Core/Src/system_stm32f0xx.c **** predivfactor = (RCC->CFGR2 & RCC_CFGR2_PREDIV) + 1;
199:Core/Src/system_stm32f0xx.c ****
200:Core/Src/system_stm32f0xx.c **** if (pllsource == RCC_CFGR_PLLSRC_HSE_PREDIV)
201:Core/Src/system_stm32f0xx.c **** {
202:Core/Src/system_stm32f0xx.c **** /* HSE used as PLL clock source : SystemCoreClock = HSE/PREDIV * PLLMUL */
203:Core/Src/system_stm32f0xx.c **** SystemCoreClock = (HSE_VALUE/predivfactor) * pllmull;
204:Core/Src/system_stm32f0xx.c **** }
ARM GAS /tmp/ccUgyWfH.s page 6
205:Core/Src/system_stm32f0xx.c **** #if defined(STM32F042x6) || defined(STM32F048xx) || defined(STM32F071xB) || defined(STM32F072xB) ||
206:Core/Src/system_stm32f0xx.c **** else if (pllsource == RCC_CFGR_PLLSRC_HSI48_PREDIV)
207:Core/Src/system_stm32f0xx.c **** {
208:Core/Src/system_stm32f0xx.c **** /* HSI48 used as PLL clock source : SystemCoreClock = HSI48/PREDIV * PLLMUL */
209:Core/Src/system_stm32f0xx.c **** SystemCoreClock = (HSI48_VALUE/predivfactor) * pllmull;
210:Core/Src/system_stm32f0xx.c **** }
211:Core/Src/system_stm32f0xx.c **** #endif /* STM32F042x6 || STM32F048xx || STM32F071xB || STM32F072xB || STM32F078xx || STM32F091xC ||
212:Core/Src/system_stm32f0xx.c **** else
213:Core/Src/system_stm32f0xx.c **** {
214:Core/Src/system_stm32f0xx.c **** #if defined(STM32F042x6) || defined(STM32F048xx) || defined(STM32F070x6) \
215:Core/Src/system_stm32f0xx.c **** || defined(STM32F078xx) || defined(STM32F071xB) || defined(STM32F072xB) \
216:Core/Src/system_stm32f0xx.c **** || defined(STM32F070xB) || defined(STM32F091xC) || defined(STM32F098xx) || defined(STM32F030xC)
217:Core/Src/system_stm32f0xx.c **** /* HSI used as PLL clock source : SystemCoreClock = HSI/PREDIV * PLLMUL */
218:Core/Src/system_stm32f0xx.c **** SystemCoreClock = (HSI_VALUE/predivfactor) * pllmull;
219:Core/Src/system_stm32f0xx.c **** #else
220:Core/Src/system_stm32f0xx.c **** /* HSI used as PLL clock source : SystemCoreClock = HSI/2 * PLLMUL */
221:Core/Src/system_stm32f0xx.c **** SystemCoreClock = (HSI_VALUE >> 1) * pllmull;
222:Core/Src/system_stm32f0xx.c **** #endif /* STM32F042x6 || STM32F048xx || STM32F070x6 ||
223:Core/Src/system_stm32f0xx.c **** STM32F071xB || STM32F072xB || STM32F078xx || STM32F070xB ||
224:Core/Src/system_stm32f0xx.c **** STM32F091xC || STM32F098xx || STM32F030xC */
225:Core/Src/system_stm32f0xx.c **** }
226:Core/Src/system_stm32f0xx.c **** break;
227:Core/Src/system_stm32f0xx.c **** default: /* HSI used as system clock */
228:Core/Src/system_stm32f0xx.c **** SystemCoreClock = HSI_VALUE;
229:Core/Src/system_stm32f0xx.c **** break;
230:Core/Src/system_stm32f0xx.c **** }
231:Core/Src/system_stm32f0xx.c **** /* Compute HCLK clock frequency ----------------*/
232:Core/Src/system_stm32f0xx.c **** /* Get HCLK prescaler */
233:Core/Src/system_stm32f0xx.c **** tmp = AHBPrescTable[((RCC->CFGR & RCC_CFGR_HPRE) >> 4)];
85 .loc 1 233 3 view .LVU13
86 .loc 1 233 28 is_stmt 0 view .LVU14
87 001c 1E4B ldr r3, .L11
88 001e 5A68 ldr r2, [r3, #4]
89 .loc 1 233 52 view .LVU15
90 0020 1209 lsrs r2, r2, #4
91 0022 0F23 movs r3, #15
92 0024 1340 ands r3, r2
93 .loc 1 233 22 view .LVU16
94 0026 1F4A ldr r2, .L11+12
95 0028 D15C ldrb r1, [r2, r3]
96 .LVL5:
234:Core/Src/system_stm32f0xx.c **** /* HCLK clock frequency */
235:Core/Src/system_stm32f0xx.c **** SystemCoreClock >>= tmp;
97 .loc 1 235 3 is_stmt 1 view .LVU17
98 .loc 1 235 19 is_stmt 0 view .LVU18
99 002a 1C4A ldr r2, .L11+4
100 002c 1368 ldr r3, [r2]
101 002e CB40 lsrs r3, r3, r1
102 0030 1360 str r3, [r2]
236:Core/Src/system_stm32f0xx.c **** }
103 .loc 1 236 1 view .LVU19
104 @ sp needed
105 0032 10BD pop {r4, pc}
106 .LVL6:
107 .L3:
191:Core/Src/system_stm32f0xx.c **** break;
108 .loc 1 191 7 is_stmt 1 view .LVU20
ARM GAS /tmp/ccUgyWfH.s page 7
191:Core/Src/system_stm32f0xx.c **** break;
109 .loc 1 191 23 is_stmt 0 view .LVU21
110 0034 194B ldr r3, .L11+4
111 .LVL7:
191:Core/Src/system_stm32f0xx.c **** break;
112 .loc 1 191 23 view .LVU22
113 0036 1A4A ldr r2, .L11+8
114 .LVL8:
191:Core/Src/system_stm32f0xx.c **** break;
115 .loc 1 191 23 view .LVU23
116 0038 1A60 str r2, [r3]
192:Core/Src/system_stm32f0xx.c **** case RCC_CFGR_SWS_PLL: /* PLL used as system clock */
117 .loc 1 192 7 is_stmt 1 view .LVU24
118 003a EFE7 b .L6
119 .LVL9:
120 .L4:
195:Core/Src/system_stm32f0xx.c **** pllsource = RCC->CFGR & RCC_CFGR_PLLSRC;
121 .loc 1 195 7 view .LVU25
195:Core/Src/system_stm32f0xx.c **** pllsource = RCC->CFGR & RCC_CFGR_PLLSRC;
122 .loc 1 195 20 is_stmt 0 view .LVU26
123 003c 164A ldr r2, .L11
124 003e 5068 ldr r0, [r2, #4]
125 .LVL10:
196:Core/Src/system_stm32f0xx.c **** pllmull = ( pllmull >> 18) + 2;
126 .loc 1 196 7 is_stmt 1 view .LVU27
196:Core/Src/system_stm32f0xx.c **** pllmull = ( pllmull >> 18) + 2;
127 .loc 1 196 22 is_stmt 0 view .LVU28
128 0040 5368 ldr r3, [r2, #4]
129 .LVL11:
196:Core/Src/system_stm32f0xx.c **** pllmull = ( pllmull >> 18) + 2;
130 .loc 1 196 17 view .LVU29
131 0042 C021 movs r1, #192
132 0044 4902 lsls r1, r1, #9
133 0046 0B40 ands r3, r1
134 .LVL12:
197:Core/Src/system_stm32f0xx.c **** predivfactor = (RCC->CFGR2 & RCC_CFGR2_PREDIV) + 1;
135 .loc 1 197 7 is_stmt 1 view .LVU30
197:Core/Src/system_stm32f0xx.c **** predivfactor = (RCC->CFGR2 & RCC_CFGR2_PREDIV) + 1;
136 .loc 1 197 27 is_stmt 0 view .LVU31
137 0048 800C lsrs r0, r0, #18
138 .LVL13:
197:Core/Src/system_stm32f0xx.c **** predivfactor = (RCC->CFGR2 & RCC_CFGR2_PREDIV) + 1;
139 .loc 1 197 27 view .LVU32
140 004a 0F21 movs r1, #15
141 004c 0840 ands r0, r1
197:Core/Src/system_stm32f0xx.c **** predivfactor = (RCC->CFGR2 & RCC_CFGR2_PREDIV) + 1;
142 .loc 1 197 15 view .LVU33
143 004e 841C adds r4, r0, #2
144 .LVL14:
198:Core/Src/system_stm32f0xx.c ****
145 .loc 1 198 7 is_stmt 1 view .LVU34
198:Core/Src/system_stm32f0xx.c ****
146 .loc 1 198 26 is_stmt 0 view .LVU35
147 0050 D26A ldr r2, [r2, #44]
198:Core/Src/system_stm32f0xx.c ****
148 .loc 1 198 34 view .LVU36
149 0052 1140 ands r1, r2
ARM GAS /tmp/ccUgyWfH.s page 8
198:Core/Src/system_stm32f0xx.c ****
150 .loc 1 198 20 view .LVU37
151 0054 0131 adds r1, r1, #1
152 .LVL15:
200:Core/Src/system_stm32f0xx.c **** {
153 .loc 1 200 7 is_stmt 1 view .LVU38
200:Core/Src/system_stm32f0xx.c **** {
154 .loc 1 200 10 is_stmt 0 view .LVU39
155 0056 8022 movs r2, #128
156 0058 5202 lsls r2, r2, #9
157 005a 9342 cmp r3, r2
158 005c 0AD0 beq .L9
206:Core/Src/system_stm32f0xx.c **** {
159 .loc 1 206 12 is_stmt 1 view .LVU40
206:Core/Src/system_stm32f0xx.c **** {
160 .loc 1 206 15 is_stmt 0 view .LVU41
161 005e C022 movs r2, #192
162 0060 5202 lsls r2, r2, #9
163 0062 9342 cmp r3, r2
164 0064 0DD0 beq .L10
218:Core/Src/system_stm32f0xx.c **** #else
165 .loc 1 218 9 is_stmt 1 view .LVU42
218:Core/Src/system_stm32f0xx.c **** #else
166 .loc 1 218 37 is_stmt 0 view .LVU43
167 0066 0E48 ldr r0, .L11+8
168 0068 FFF7FEFF bl __aeabi_uidiv
169 .LVL16:
218:Core/Src/system_stm32f0xx.c **** #else
170 .loc 1 218 52 view .LVU44
171 006c 6043 muls r0, r4
218:Core/Src/system_stm32f0xx.c **** #else
172 .loc 1 218 25 view .LVU45
173 006e 0B4B ldr r3, .L11+4
174 0070 1860 str r0, [r3]
175 0072 D3E7 b .L6
176 .LVL17:
177 .L9:
203:Core/Src/system_stm32f0xx.c **** }
178 .loc 1 203 9 is_stmt 1 view .LVU46
203:Core/Src/system_stm32f0xx.c **** }
179 .loc 1 203 37 is_stmt 0 view .LVU47
180 0074 0A48 ldr r0, .L11+8
181 0076 FFF7FEFF bl __aeabi_uidiv
182 .LVL18:
203:Core/Src/system_stm32f0xx.c **** }
183 .loc 1 203 52 view .LVU48
184 007a 6043 muls r0, r4
203:Core/Src/system_stm32f0xx.c **** }
185 .loc 1 203 25 view .LVU49
186 007c 074B ldr r3, .L11+4
187 007e 1860 str r0, [r3]
188 0080 CCE7 b .L6
189 .LVL19:
190 .L10:
209:Core/Src/system_stm32f0xx.c **** }
191 .loc 1 209 9 is_stmt 1 view .LVU50
209:Core/Src/system_stm32f0xx.c **** }
ARM GAS /tmp/ccUgyWfH.s page 9
192 .loc 1 209 39 is_stmt 0 view .LVU51
193 0082 0948 ldr r0, .L11+16
194 0084 FFF7FEFF bl __aeabi_uidiv
195 .LVL20:
209:Core/Src/system_stm32f0xx.c **** }
196 .loc 1 209 54 view .LVU52
197 0088 6043 muls r0, r4
209:Core/Src/system_stm32f0xx.c **** }
198 .loc 1 209 25 view .LVU53
199 008a 044B ldr r3, .L11+4
200 008c 1860 str r0, [r3]
201 008e C5E7 b .L6
202 .LVL21:
203 .L5:
228:Core/Src/system_stm32f0xx.c **** break;
204 .loc 1 228 7 is_stmt 1 view .LVU54
228:Core/Src/system_stm32f0xx.c **** break;
205 .loc 1 228 23 is_stmt 0 view .LVU55
206 0090 024B ldr r3, .L11+4
207 .LVL22:
228:Core/Src/system_stm32f0xx.c **** break;
208 .loc 1 228 23 view .LVU56
209 0092 034A ldr r2, .L11+8
210 .LVL23:
228:Core/Src/system_stm32f0xx.c **** break;
211 .loc 1 228 23 view .LVU57
212 0094 1A60 str r2, [r3]
229:Core/Src/system_stm32f0xx.c **** }
213 .loc 1 229 7 is_stmt 1 view .LVU58
214 0096 C1E7 b .L6
215 .L12:
216 .align 2
217 .L11:
218 0098 00100240 .word 1073876992
219 009c 00000000 .word SystemCoreClock
220 00a0 00127A00 .word 8000000
221 00a4 00000000 .word AHBPrescTable
222 00a8 006CDC02 .word 48000000
223 .cfi_endproc
224 .LFE41:
226 .global APBPrescTable
227 .section .rodata.APBPrescTable,"a"
228 .align 2
231 APBPrescTable:
232 0000 00000000 .ascii "\000\000\000\000\001\002\003\004"
232 01020304
233 .global AHBPrescTable
234 .section .rodata.AHBPrescTable,"a"
235 .align 2
238 AHBPrescTable:
239 0000 00000000 .ascii "\000\000\000\000\000\000\000\000\001\002\003\004\006"
239 00000000
239 01020304
239 06
240 000d 070809 .ascii "\007\010\011"
241 .global SystemCoreClock
242 .section .data.SystemCoreClock,"aw"
ARM GAS /tmp/ccUgyWfH.s page 10
243 .align 2
246 SystemCoreClock:
247 0000 00127A00 .word 8000000
248 .text
249 .Letext0:
250 .file 2 "/home/chiangni/.config/Code/User/globalStorage/bmd.stm32-for-vscode/@xpack-dev-tools/arm-
251 .file 3 "/home/chiangni/.config/Code/User/globalStorage/bmd.stm32-for-vscode/@xpack-dev-tools/arm-
252 .file 4 "Drivers/CMSIS/Device/ST/STM32F0xx/Include/system_stm32f0xx.h"
253 .file 5 "Drivers/CMSIS/Device/ST/STM32F0xx/Include/stm32f042x6.h"
ARM GAS /tmp/ccUgyWfH.s page 11
DEFINED SYMBOLS
*ABS*:00000000 system_stm32f0xx.c
/tmp/ccUgyWfH.s:19 .text.SystemInit:00000000 $t
/tmp/ccUgyWfH.s:25 .text.SystemInit:00000000 SystemInit
/tmp/ccUgyWfH.s:40 .text.SystemCoreClockUpdate:00000000 $t
/tmp/ccUgyWfH.s:46 .text.SystemCoreClockUpdate:00000000 SystemCoreClockUpdate
/tmp/ccUgyWfH.s:218 .text.SystemCoreClockUpdate:00000098 $d
/tmp/ccUgyWfH.s:246 .data.SystemCoreClock:00000000 SystemCoreClock
/tmp/ccUgyWfH.s:238 .rodata.AHBPrescTable:00000000 AHBPrescTable
/tmp/ccUgyWfH.s:231 .rodata.APBPrescTable:00000000 APBPrescTable
/tmp/ccUgyWfH.s:228 .rodata.APBPrescTable:00000000 $d
/tmp/ccUgyWfH.s:235 .rodata.AHBPrescTable:00000000 $d
/tmp/ccUgyWfH.s:243 .data.SystemCoreClock:00000000 $d
UNDEFINED SYMBOLS
__aeabi_uidiv

BIN
Software/build/debug/Core/Src/system_stm32f0xx.o Normal file
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